Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 09:46:43.364831 lava-dispatcher, installed at version: 2022.06
2 09:46:43.365030 start: 0 validate
3 09:46:43.365168 Start time: 2022-08-12 09:46:43.365160+00:00 (UTC)
4 09:46:43.365324 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:46:43.365456 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20220805.0%2Famd64%2Frootfs.cpio.gz exists
6 09:46:43.655886 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:46:43.656068 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:46:46.656853 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:46:46.657612 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 09:46:46.662447 validate duration: 3.30
12 09:46:46.662695 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 09:46:46.662809 start: 1.1 download-retry (timeout 00:10:00) [common]
14 09:46:46.662907 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 09:46:46.663025 Not decompressing ramdisk as can be used compressed.
16 09:46:46.663119 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20220805.0/amd64/rootfs.cpio.gz
17 09:46:46.663191 saving as /var/lib/lava/dispatcher/tmp/7022949/tftp-deploy-r8ukbdbf/ramdisk/rootfs.cpio.gz
18 09:46:46.663256 total size: 35708631 (34MB)
19 09:46:46.664202 progress 0% (0MB)
20 09:46:46.673219 progress 5% (1MB)
21 09:46:46.681968 progress 10% (3MB)
22 09:46:46.690686 progress 15% (5MB)
23 09:46:46.699091 progress 20% (6MB)
24 09:46:46.707597 progress 25% (8MB)
25 09:46:46.716098 progress 30% (10MB)
26 09:46:46.724739 progress 35% (11MB)
27 09:46:46.733167 progress 40% (13MB)
28 09:46:46.741752 progress 45% (15MB)
29 09:46:46.750212 progress 50% (17MB)
30 09:46:46.758830 progress 55% (18MB)
31 09:46:46.767282 progress 60% (20MB)
32 09:46:46.775883 progress 65% (22MB)
33 09:46:46.784273 progress 70% (23MB)
34 09:46:46.792782 progress 75% (25MB)
35 09:46:46.801202 progress 80% (27MB)
36 09:46:46.809718 progress 85% (28MB)
37 09:46:46.818114 progress 90% (30MB)
38 09:46:46.826548 progress 95% (32MB)
39 09:46:46.834875 progress 100% (34MB)
40 09:46:46.835161 34MB downloaded in 0.17s (198.11MB/s)
41 09:46:46.835327 end: 1.1.1 http-download (duration 00:00:00) [common]
43 09:46:46.835576 end: 1.1 download-retry (duration 00:00:00) [common]
44 09:46:46.835668 start: 1.2 download-retry (timeout 00:10:00) [common]
45 09:46:46.835757 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 09:46:46.835865 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 09:46:46.835934 saving as /var/lib/lava/dispatcher/tmp/7022949/tftp-deploy-r8ukbdbf/kernel/bzImage
48 09:46:46.835997 total size: 6815632 (6MB)
49 09:46:46.836058 No compression specified
50 09:46:46.837123 progress 0% (0MB)
51 09:46:46.838862 progress 5% (0MB)
52 09:46:46.840524 progress 10% (0MB)
53 09:46:46.842360 progress 15% (1MB)
54 09:46:46.843984 progress 20% (1MB)
55 09:46:46.845656 progress 25% (1MB)
56 09:46:46.847423 progress 30% (1MB)
57 09:46:46.849062 progress 35% (2MB)
58 09:46:46.850912 progress 40% (2MB)
59 09:46:46.852512 progress 45% (2MB)
60 09:46:46.854150 progress 50% (3MB)
61 09:46:46.855908 progress 55% (3MB)
62 09:46:46.857548 progress 60% (3MB)
63 09:46:46.859286 progress 65% (4MB)
64 09:46:46.860875 progress 70% (4MB)
65 09:46:46.862503 progress 75% (4MB)
66 09:46:46.864305 progress 80% (5MB)
67 09:46:46.865954 progress 85% (5MB)
68 09:46:46.867697 progress 90% (5MB)
69 09:46:46.869290 progress 95% (6MB)
70 09:46:46.870899 progress 100% (6MB)
71 09:46:46.871190 6MB downloaded in 0.04s (184.71MB/s)
72 09:46:46.871341 end: 1.2.1 http-download (duration 00:00:00) [common]
74 09:46:46.871582 end: 1.2 download-retry (duration 00:00:00) [common]
75 09:46:46.871673 start: 1.3 download-retry (timeout 00:10:00) [common]
76 09:46:46.871762 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 09:46:46.871870 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 09:46:46.871939 saving as /var/lib/lava/dispatcher/tmp/7022949/tftp-deploy-r8ukbdbf/modules/modules.tar
79 09:46:46.872001 total size: 51724 (0MB)
80 09:46:46.872062 Using unxz to decompress xz
81 09:46:46.875350 progress 63% (0MB)
82 09:46:46.875753 progress 100% (0MB)
83 09:46:46.879124 0MB downloaded in 0.01s (6.93MB/s)
84 09:46:46.879353 end: 1.3.1 http-download (duration 00:00:00) [common]
86 09:46:46.879615 end: 1.3 download-retry (duration 00:00:00) [common]
87 09:46:46.879715 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 09:46:46.879813 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 09:46:46.879900 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 09:46:46.879990 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 09:46:46.880164 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5
92 09:46:46.880274 makedir: /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin
93 09:46:46.880362 makedir: /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/tests
94 09:46:46.880445 makedir: /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/results
95 09:46:46.880551 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-add-keys
96 09:46:46.880687 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-add-sources
97 09:46:46.880806 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-background-process-start
98 09:46:46.880921 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-background-process-stop
99 09:46:46.881034 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-common-functions
100 09:46:46.881144 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-echo-ipv4
101 09:46:46.881266 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-install-packages
102 09:46:46.881417 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-installed-packages
103 09:46:46.881526 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-os-build
104 09:46:46.881637 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-probe-channel
105 09:46:46.881749 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-probe-ip
106 09:46:46.881857 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-target-ip
107 09:46:46.881967 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-target-mac
108 09:46:46.882075 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-target-storage
109 09:46:46.882187 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-test-case
110 09:46:46.882297 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-test-event
111 09:46:46.882407 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-test-feedback
112 09:46:46.882519 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-test-raise
113 09:46:46.882632 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-test-reference
114 09:46:46.882741 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-test-runner
115 09:46:46.882849 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-test-set
116 09:46:46.882957 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-test-shell
117 09:46:46.883070 Updating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-install-packages (oe)
118 09:46:46.883182 Updating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/bin/lava-installed-packages (oe)
119 09:46:46.883280 Creating /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/environment
120 09:46:46.883369 LAVA metadata
121 09:46:46.883441 - LAVA_JOB_ID=7022949
122 09:46:46.883508 - LAVA_DISPATCHER_IP=192.168.201.1
123 09:46:46.883607 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 09:46:46.883681 skipped lava-vland-overlay
125 09:46:46.883768 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 09:46:46.883863 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 09:46:46.883931 skipped lava-multinode-overlay
128 09:46:46.884011 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 09:46:46.884099 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 09:46:46.884178 Loading test definitions
131 09:46:46.884277 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 09:46:46.884357 Using /lava-7022949 at stage 0
133 09:46:46.884624 uuid=7022949_1.4.2.3.1 testdef=None
134 09:46:46.884716 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 09:46:46.884809 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 09:46:46.885306 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 09:46:46.885555 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 09:46:46.886098 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 09:46:46.886354 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 09:46:46.886866 runner path: /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/0/tests/0_cros-ec test_uuid 7022949_1.4.2.3.1
143 09:46:46.887017 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 09:46:46.887229 Creating lava-test-runner.conf files
146 09:46:46.887295 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7022949/lava-overlay-re5rwgt5/lava-7022949/0 for stage 0
147 09:46:46.887377 - 0_cros-ec
148 09:46:46.887471 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 09:46:46.887561 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
150 09:46:46.892557 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 09:46:46.892748 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
152 09:46:46.892838 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 09:46:46.892926 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 09:46:46.893016 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
155 09:46:47.721482 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 09:46:47.721929 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
157 09:46:47.722094 extracting modules file /var/lib/lava/dispatcher/tmp/7022949/tftp-deploy-r8ukbdbf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022949/extract-overlay-ramdisk-mxjokhjd/ramdisk
158 09:46:47.728333 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 09:46:47.728551 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
160 09:46:47.728690 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7022949/compress-overlay-noeyuek4/overlay-1.4.2.4.tar.gz to ramdisk
161 09:46:47.728804 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7022949/compress-overlay-noeyuek4/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7022949/extract-overlay-ramdisk-mxjokhjd/ramdisk
162 09:46:47.733558 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 09:46:47.733745 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
164 09:46:47.733885 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 09:46:47.734021 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
166 09:46:47.734149 Building ramdisk /var/lib/lava/dispatcher/tmp/7022949/extract-overlay-ramdisk-mxjokhjd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7022949/extract-overlay-ramdisk-mxjokhjd/ramdisk
167 09:46:48.066570 >> 182227 blocks
168 09:46:51.555837 rename /var/lib/lava/dispatcher/tmp/7022949/extract-overlay-ramdisk-mxjokhjd/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7022949/tftp-deploy-r8ukbdbf/ramdisk/ramdisk.cpio.gz
169 09:46:51.556374 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
170 09:46:51.556553 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
171 09:46:51.556705 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
172 09:46:51.556848 No mkimage arch provided, not using FIT.
173 09:46:51.556981 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 09:46:51.557117 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 09:46:51.557273 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
176 09:46:51.557419 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
177 09:46:51.557540 No LXC device requested
178 09:46:51.557668 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 09:46:51.557808 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
180 09:46:51.557939 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 09:46:51.558046 Checking files for TFTP limit of 4294967296 bytes.
182 09:46:51.558590 end: 1 tftp-deploy (duration 00:00:05) [common]
183 09:46:51.558743 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 09:46:51.558884 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 09:46:51.559065 substitutions:
186 09:46:51.559173 - {DTB}: None
187 09:46:51.559278 - {INITRD}: 7022949/tftp-deploy-r8ukbdbf/ramdisk/ramdisk.cpio.gz
188 09:46:51.559378 - {KERNEL}: 7022949/tftp-deploy-r8ukbdbf/kernel/bzImage
189 09:46:51.559479 - {LAVA_MAC}: None
190 09:46:51.559580 - {PRESEED_CONFIG}: None
191 09:46:51.559679 - {PRESEED_LOCAL}: None
192 09:46:51.559777 - {RAMDISK}: 7022949/tftp-deploy-r8ukbdbf/ramdisk/ramdisk.cpio.gz
193 09:46:51.559875 - {ROOT_PART}: None
194 09:46:51.559974 - {ROOT}: None
195 09:46:51.560071 - {SERVER_IP}: 192.168.201.1
196 09:46:51.560168 - {TEE}: None
197 09:46:51.560266 Parsed boot commands:
198 09:46:51.560361 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 09:46:51.560585 Parsed boot commands: tftpboot 192.168.201.1 7022949/tftp-deploy-r8ukbdbf/kernel/bzImage 7022949/tftp-deploy-r8ukbdbf/kernel/cmdline 7022949/tftp-deploy-r8ukbdbf/ramdisk/ramdisk.cpio.gz
200 09:46:51.560728 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 09:46:51.560866 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 09:46:51.561008 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 09:46:51.561144 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 09:46:51.561259 Not connected, no need to disconnect.
205 09:46:51.561391 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 09:46:51.561527 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 09:46:51.561639 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
208 09:46:51.564965 Setting prompt string to ['lava-test: # ']
209 09:46:51.565360 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 09:46:51.565513 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 09:46:51.565656 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 09:46:51.565793 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 09:46:51.566078 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
214 09:46:51.587169 >> Command sent successfully.
215 09:46:51.589196 Returned 0 in 0 seconds
216 09:46:51.690029 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 09:46:51.690488 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 09:46:51.690638 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 09:46:51.690767 Setting prompt string to 'Starting depthcharge on Voema...'
221 09:46:51.690870 Changing prompt to 'Starting depthcharge on Voema...'
222 09:46:51.690978 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 09:46:51.691361 [Enter `^Ec?' for help]
224 09:46:59.076908
225 09:46:59.077070
226 09:46:59.086800 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 09:46:59.090062 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
228 09:46:59.097154 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 09:46:59.101066 CPU: AES supported, TXT NOT supported, VT supported
230 09:46:59.107858 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 09:46:59.111065 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 09:46:59.117479 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
233 09:46:59.121512 VBOOT: Loading verstage.
234 09:46:59.124201 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
235 09:46:59.131328 FMAP: base = 0x0 size = 0x2000000 #areas = 32
236 09:46:59.134660 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
237 09:46:59.144140 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
238 09:46:59.150748 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
239 09:46:59.150843
240 09:46:59.150914
241 09:46:59.160889 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
242 09:46:59.177662 Probing TPM: . done!
243 09:46:59.181068 TPM ready after 0 ms
244 09:46:59.184363 Connected to device vid:did:rid of 1ae0:0028:00
245 09:46:59.195627 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
246 09:46:59.202206 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
247 09:46:59.205994 Initialized TPM device CR50 revision 0
248 09:46:59.262247 tlcl_send_startup: Startup return code is 0
249 09:46:59.262506 TPM: setup succeeded
250 09:46:59.278105 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
251 09:46:59.292254 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
252 09:46:59.304773 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
253 09:46:59.314536 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
254 09:46:59.318591 Chrome EC: UHEPI supported
255 09:46:59.321728 Phase 1
256 09:46:59.325191 FMAP: area GBB found @ 1805000 (458752 bytes)
257 09:46:59.334882 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
258 09:46:59.341209 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
259 09:46:59.348054 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
260 09:46:59.354803 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
261 09:46:59.357994 Recovery requested (1009000e)
262 09:46:59.361363 TPM: Extending digest for VBOOT: boot mode into PCR 0
263 09:46:59.372932 tlcl_extend: response is 0
264 09:46:59.379455 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
265 09:46:59.389633 tlcl_extend: response is 0
266 09:46:59.396111 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
267 09:46:59.402618 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
268 09:46:59.408829 BS: verstage times (exec / console): total (unknown) / 142 ms
269 09:46:59.408921
270 09:46:59.408996
271 09:46:59.422230 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
272 09:46:59.428859 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
273 09:46:59.432017 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
274 09:46:59.438700 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
275 09:46:59.441899 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
276 09:46:59.445171 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
277 09:46:59.448419 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
278 09:46:59.451584 TCO_STS: 0000 0000
279 09:46:59.454968 GEN_PMCON: d0015038 00002200
280 09:46:59.458211 GBLRST_CAUSE: 00000000 00000000
281 09:46:59.462105 HPR_CAUSE0: 00000000
282 09:46:59.462197 prev_sleep_state 5
283 09:46:59.465300 Boot Count incremented to 6946
284 09:46:59.471889 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 09:46:59.478412 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
286 09:46:59.488267 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
287 09:46:59.494485 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
288 09:46:59.498350 Chrome EC: UHEPI supported
289 09:46:59.504860 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
290 09:46:59.516749 Probing TPM: done!
291 09:46:59.523255 Connected to device vid:did:rid of 1ae0:0028:00
292 09:46:59.533040 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
293 09:46:59.536302 Initialized TPM device CR50 revision 0
294 09:46:59.551656 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
295 09:46:59.558165 MRC: Hash idx 0x100b comparison successful.
296 09:46:59.561598 MRC cache found, size faa8
297 09:46:59.561684 bootmode is set to: 2
298 09:46:59.565045 SPD index = 2
299 09:46:59.571108 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
300 09:46:59.574325 SPD: module type is LPDDR4X
301 09:46:59.577656 SPD: module part number is MT53D1G64D4NW-046
302 09:46:59.584327 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
303 09:46:59.587596 SPD: device width 16 bits, bus width 16 bits
304 09:46:59.595122 SPD: module size is 2048 MB (per channel)
305 09:47:00.023504 CBMEM:
306 09:47:00.026857 IMD: root @ 0x76fff000 254 entries.
307 09:47:00.030067 IMD: root @ 0x76ffec00 62 entries.
308 09:47:00.032908 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
309 09:47:00.039661 FMAP: area RW_VPD found @ f35000 (8192 bytes)
310 09:47:00.042928 External stage cache:
311 09:47:00.046433 IMD: root @ 0x7b3ff000 254 entries.
312 09:47:00.049659 IMD: root @ 0x7b3fec00 62 entries.
313 09:47:00.064466 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
314 09:47:00.071361 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
315 09:47:00.077416 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
316 09:47:00.091682 MRC: 'RECOVERY_MRC_CACHE' does not need update.
317 09:47:00.098217 cse_lite: Skip switching to RW in the recovery path
318 09:47:00.098307 8 DIMMs found
319 09:47:00.098399 SMM Memory Map
320 09:47:00.104789 SMRAM : 0x7b000000 0x800000
321 09:47:00.108154 Subregion 0: 0x7b000000 0x200000
322 09:47:00.111400 Subregion 1: 0x7b200000 0x200000
323 09:47:00.114609 Subregion 2: 0x7b400000 0x400000
324 09:47:00.114695 top_of_ram = 0x77000000
325 09:47:00.121082 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
326 09:47:00.127748 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
327 09:47:00.131192 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
328 09:47:00.137732 MTRR Range: Start=ff000000 End=0 (Size 1000000)
329 09:47:00.144371 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
330 09:47:00.150820 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
331 09:47:00.161166 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
332 09:47:00.168113 Processing 211 relocs. Offset value of 0x74c0b000
333 09:47:00.175022 BS: romstage times (exec / console): total (unknown) / 276 ms
334 09:47:00.179790
335 09:47:00.179885
336 09:47:00.190250 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
337 09:47:00.193065 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 09:47:00.202915 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 09:47:00.209801 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 09:47:00.216304 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
341 09:47:00.222966 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
342 09:47:00.267321 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
343 09:47:00.273843 Processing 5008 relocs. Offset value of 0x75d98000
344 09:47:00.276945 BS: postcar times (exec / console): total (unknown) / 59 ms
345 09:47:00.280502
346 09:47:00.280605
347 09:47:00.290221 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
348 09:47:00.290315 Normal boot
349 09:47:00.293682 FW_CONFIG value is 0x804c02
350 09:47:00.296924 PCI: 00:07.0 disabled by fw_config
351 09:47:00.300322 PCI: 00:07.1 disabled by fw_config
352 09:47:00.303665 PCI: 00:0d.2 disabled by fw_config
353 09:47:00.310482 PCI: 00:1c.7 disabled by fw_config
354 09:47:00.313178 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
355 09:47:00.320106 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
356 09:47:00.323371 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
357 09:47:00.330103 GENERIC: 0.0 disabled by fw_config
358 09:47:00.333437 GENERIC: 1.0 disabled by fw_config
359 09:47:00.336788 fw_config match found: DB_USB=USB3_ACTIVE
360 09:47:00.340117 fw_config match found: DB_USB=USB3_ACTIVE
361 09:47:00.343487 fw_config match found: DB_USB=USB3_ACTIVE
362 09:47:00.350361 fw_config match found: DB_USB=USB3_ACTIVE
363 09:47:00.353474 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
364 09:47:00.359900 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
365 09:47:00.369626 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
366 09:47:00.376196 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
367 09:47:00.380180 microcode: sig=0x806c1 pf=0x80 revision=0x86
368 09:47:00.386122 microcode: Update skipped, already up-to-date
369 09:47:00.392872 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
370 09:47:00.420991 Detected 4 core, 8 thread CPU.
371 09:47:00.423596 Setting up SMI for CPU
372 09:47:00.427495 IED base = 0x7b400000
373 09:47:00.430770 IED size = 0x00400000
374 09:47:00.430859 Will perform SMM setup.
375 09:47:00.437278 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
376 09:47:00.444019 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
377 09:47:00.450737 Processing 16 relocs. Offset value of 0x00030000
378 09:47:00.454138 Attempting to start 7 APs
379 09:47:00.457189 Waiting for 10ms after sending INIT.
380 09:47:00.472698 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
381 09:47:00.472810 done.
382 09:47:00.475802 AP: slot 4 apic_id 4.
383 09:47:00.479113 AP: slot 7 apic_id 5.
384 09:47:00.479193 AP: slot 5 apic_id 6.
385 09:47:00.482232 AP: slot 2 apic_id 7.
386 09:47:00.485689 AP: slot 3 apic_id 3.
387 09:47:00.489040 Waiting for 2nd SIPI to complete...done.
388 09:47:00.492262 AP: slot 6 apic_id 2.
389 09:47:00.498840 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
390 09:47:00.505923 Processing 13 relocs. Offset value of 0x00038000
391 09:47:00.509161 Unable to locate Global NVS
392 09:47:00.515386 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
393 09:47:00.519243 Installing permanent SMM handler to 0x7b000000
394 09:47:00.528650 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
395 09:47:00.532043 Processing 794 relocs. Offset value of 0x7b010000
396 09:47:00.541868 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
397 09:47:00.545189 Processing 13 relocs. Offset value of 0x7b008000
398 09:47:00.551826 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
399 09:47:00.558644 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
400 09:47:00.561942 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
401 09:47:00.568888 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
402 09:47:00.575598 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
403 09:47:00.582180 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
404 09:47:00.588746 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
405 09:47:00.588867 Unable to locate Global NVS
406 09:47:00.598204 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
407 09:47:00.601992 Clearing SMI status registers
408 09:47:00.602078 SMI_STS: PM1
409 09:47:00.605359 PM1_STS: PWRBTN
410 09:47:00.611386 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
411 09:47:00.615325 In relocation handler: CPU 0
412 09:47:00.618106 New SMBASE=0x7b000000 IEDBASE=0x7b400000
413 09:47:00.624767 Writing SMRR. base = 0x7b000006, mask=0xff800c00
414 09:47:00.624854 Relocation complete.
415 09:47:00.634562 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
416 09:47:00.637985 In relocation handler: CPU 1
417 09:47:00.641365 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
418 09:47:00.641447 Relocation complete.
419 09:47:00.651231 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
420 09:47:00.651326 In relocation handler: CPU 3
421 09:47:00.657826 New SMBASE=0x7afff400 IEDBASE=0x7b400000
422 09:47:00.657910 Relocation complete.
423 09:47:00.668096 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
424 09:47:00.668189 In relocation handler: CPU 6
425 09:47:00.674683 New SMBASE=0x7affe800 IEDBASE=0x7b400000
426 09:47:00.677931 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 09:47:00.681191 Relocation complete.
428 09:47:00.687727 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
429 09:47:00.691215 In relocation handler: CPU 5
430 09:47:00.694419 New SMBASE=0x7affec00 IEDBASE=0x7b400000
431 09:47:00.701016 Writing SMRR. base = 0x7b000006, mask=0xff800c00
432 09:47:00.701108 Relocation complete.
433 09:47:00.707458 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
434 09:47:00.710850 In relocation handler: CPU 2
435 09:47:00.717449 New SMBASE=0x7afff800 IEDBASE=0x7b400000
436 09:47:00.717574 Relocation complete.
437 09:47:00.724078 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
438 09:47:00.727285 In relocation handler: CPU 7
439 09:47:00.734272 New SMBASE=0x7affe400 IEDBASE=0x7b400000
440 09:47:00.734366 Relocation complete.
441 09:47:00.740903 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
442 09:47:00.743659 In relocation handler: CPU 4
443 09:47:00.750298 New SMBASE=0x7afff000 IEDBASE=0x7b400000
444 09:47:00.753634 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 09:47:00.757383 Relocation complete.
446 09:47:00.757465 Initializing CPU #0
447 09:47:00.760651 CPU: vendor Intel device 806c1
448 09:47:00.763926 CPU: family 06, model 8c, stepping 01
449 09:47:00.767067 Clearing out pending MCEs
450 09:47:00.770734 Setting up local APIC...
451 09:47:00.774033 apic_id: 0x00 done.
452 09:47:00.777271 Turbo is available but hidden
453 09:47:00.780569 Turbo is available and visible
454 09:47:00.783718 microcode: Update skipped, already up-to-date
455 09:47:00.786953 CPU #0 initialized
456 09:47:00.787038 Initializing CPU #4
457 09:47:00.790352 Initializing CPU #7
458 09:47:00.793675 CPU: vendor Intel device 806c1
459 09:47:00.796981 CPU: family 06, model 8c, stepping 01
460 09:47:00.800373 CPU: vendor Intel device 806c1
461 09:47:00.803579 CPU: family 06, model 8c, stepping 01
462 09:47:00.806802 Clearing out pending MCEs
463 09:47:00.810131 Initializing CPU #2
464 09:47:00.810215 Initializing CPU #5
465 09:47:00.813298 CPU: vendor Intel device 806c1
466 09:47:00.816737 CPU: family 06, model 8c, stepping 01
467 09:47:00.820264 CPU: vendor Intel device 806c1
468 09:47:00.823509 CPU: family 06, model 8c, stepping 01
469 09:47:00.826893 Clearing out pending MCEs
470 09:47:00.830054 Clearing out pending MCEs
471 09:47:00.833234 Setting up local APIC...
472 09:47:00.833325 Clearing out pending MCEs
473 09:47:00.837078 Setting up local APIC...
474 09:47:00.840830 Initializing CPU #3
475 09:47:00.840914 apic_id: 0x07 done.
476 09:47:00.844949 Setting up local APIC...
477 09:47:00.848140 apic_id: 0x04 done.
478 09:47:00.848224 Setting up local APIC...
479 09:47:00.854703 microcode: Update skipped, already up-to-date
480 09:47:00.854789 apic_id: 0x06 done.
481 09:47:00.857997 CPU #2 initialized
482 09:47:00.861086 Initializing CPU #6
483 09:47:00.861201 CPU: vendor Intel device 806c1
484 09:47:00.867720 CPU: family 06, model 8c, stepping 01
485 09:47:00.867830 Initializing CPU #1
486 09:47:00.874116 microcode: Update skipped, already up-to-date
487 09:47:00.877322 CPU: vendor Intel device 806c1
488 09:47:00.881169 CPU: family 06, model 8c, stepping 01
489 09:47:00.884322 CPU: vendor Intel device 806c1
490 09:47:00.887649 CPU: family 06, model 8c, stepping 01
491 09:47:00.891037 Clearing out pending MCEs
492 09:47:00.891120 Clearing out pending MCEs
493 09:47:00.894252 Setting up local APIC...
494 09:47:00.897768 Clearing out pending MCEs
495 09:47:00.901093 apic_id: 0x03 done.
496 09:47:00.901172 Setting up local APIC...
497 09:47:00.904149 Setting up local APIC...
498 09:47:00.907477 apic_id: 0x02 done.
499 09:47:00.910728 microcode: Update skipped, already up-to-date
500 09:47:00.917491 microcode: Update skipped, already up-to-date
501 09:47:00.917611 CPU #3 initialized
502 09:47:00.920867 CPU #5 initialized
503 09:47:00.920963 CPU #6 initialized
504 09:47:00.924118 apic_id: 0x01 done.
505 09:47:00.927412 apic_id: 0x05 done.
506 09:47:00.930753 microcode: Update skipped, already up-to-date
507 09:47:00.933841 microcode: Update skipped, already up-to-date
508 09:47:00.937079 CPU #4 initialized
509 09:47:00.940239 CPU #7 initialized
510 09:47:00.943413 microcode: Update skipped, already up-to-date
511 09:47:00.946835 CPU #1 initialized
512 09:47:00.950226 bsp_do_flight_plan done after 456 msecs.
513 09:47:00.953480 CPU: frequency set to 4400 MHz
514 09:47:00.953564 Enabling SMIs.
515 09:47:00.960134 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
516 09:47:00.977178 SATAXPCIE1 indicates PCIe NVMe is present
517 09:47:00.980542 Probing TPM: done!
518 09:47:00.983858 Connected to device vid:did:rid of 1ae0:0028:00
519 09:47:00.994526 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
520 09:47:00.997926 Initialized TPM device CR50 revision 0
521 09:47:01.001212 Enabling S0i3.4
522 09:47:01.007807 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
523 09:47:01.011134 Found a VBT of 8704 bytes after decompression
524 09:47:01.018103 cse_lite: CSE RO boot. HybridStorageMode disabled
525 09:47:01.024638 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
526 09:47:01.100235 FSPS returned 0
527 09:47:01.103654 Executing Phase 1 of FspMultiPhaseSiInit
528 09:47:01.113392 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
529 09:47:01.116828 port C0 DISC req: usage 1 usb3 1 usb2 5
530 09:47:01.120108 Raw Buffer output 0 00000511
531 09:47:01.123315 Raw Buffer output 1 00000000
532 09:47:01.127374 pmc_send_ipc_cmd succeeded
533 09:47:01.133918 port C1 DISC req: usage 1 usb3 2 usb2 3
534 09:47:01.133999 Raw Buffer output 0 00000321
535 09:47:01.137066 Raw Buffer output 1 00000000
536 09:47:01.140901 pmc_send_ipc_cmd succeeded
537 09:47:01.146803 Detected 4 core, 8 thread CPU.
538 09:47:01.149909 Detected 4 core, 8 thread CPU.
539 09:47:01.349820 Display FSP Version Info HOB
540 09:47:01.353151 Reference Code - CPU = a.0.4c.31
541 09:47:01.357040 uCode Version = 0.0.0.86
542 09:47:01.359758 TXT ACM version = ff.ff.ff.ffff
543 09:47:01.363613 Reference Code - ME = a.0.4c.31
544 09:47:01.366804 MEBx version = 0.0.0.0
545 09:47:01.370166 ME Firmware Version = Consumer SKU
546 09:47:01.373521 Reference Code - PCH = a.0.4c.31
547 09:47:01.376787 PCH-CRID Status = Disabled
548 09:47:01.380130 PCH-CRID Original Value = ff.ff.ff.ffff
549 09:47:01.383519 PCH-CRID New Value = ff.ff.ff.ffff
550 09:47:01.386750 OPROM - RST - RAID = ff.ff.ff.ffff
551 09:47:01.390317 PCH Hsio Version = 4.0.0.0
552 09:47:01.392950 Reference Code - SA - System Agent = a.0.4c.31
553 09:47:01.396227 Reference Code - MRC = 2.0.0.1
554 09:47:01.400199 SA - PCIe Version = a.0.4c.31
555 09:47:01.402898 SA-CRID Status = Disabled
556 09:47:01.406228 SA-CRID Original Value = 0.0.0.1
557 09:47:01.409623 SA-CRID New Value = 0.0.0.1
558 09:47:01.413548 OPROM - VBIOS = ff.ff.ff.ffff
559 09:47:01.416870 IO Manageability Engine FW Version = 11.1.4.0
560 09:47:01.420885 PHY Build Version = 0.0.0.e0
561 09:47:01.424231 Thunderbolt(TM) FW Version = 0.0.0.0
562 09:47:01.430932 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
563 09:47:01.431020 ITSS IRQ Polarities Before:
564 09:47:01.434374 IPC0: 0xffffffff
565 09:47:01.434465 IPC1: 0xffffffff
566 09:47:01.437575 IPC2: 0xffffffff
567 09:47:01.437659 IPC3: 0xffffffff
568 09:47:01.440764 ITSS IRQ Polarities After:
569 09:47:01.443908 IPC0: 0xffffffff
570 09:47:01.444005 IPC1: 0xffffffff
571 09:47:01.447333 IPC2: 0xffffffff
572 09:47:01.447418 IPC3: 0xffffffff
573 09:47:01.453772 Found PCIe Root Port #9 at PCI: 00:1d.0.
574 09:47:01.463641 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
575 09:47:01.477391 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
576 09:47:01.490597 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
577 09:47:01.496942 BS: BS_DEV_INIT_CHIPS run times (exec / console): 292 / 236 ms
578 09:47:01.497044 Enumerating buses...
579 09:47:01.503540 Show all devs... Before device enumeration.
580 09:47:01.503629 Root Device: enabled 1
581 09:47:01.506908 DOMAIN: 0000: enabled 1
582 09:47:01.510291 CPU_CLUSTER: 0: enabled 1
583 09:47:01.513711 PCI: 00:00.0: enabled 1
584 09:47:01.513800 PCI: 00:02.0: enabled 1
585 09:47:01.516905 PCI: 00:04.0: enabled 1
586 09:47:01.520180 PCI: 00:05.0: enabled 1
587 09:47:01.520267 PCI: 00:06.0: enabled 0
588 09:47:01.523409 PCI: 00:07.0: enabled 0
589 09:47:01.526653 PCI: 00:07.1: enabled 0
590 09:47:01.530051 PCI: 00:07.2: enabled 0
591 09:47:01.530137 PCI: 00:07.3: enabled 0
592 09:47:01.533512 PCI: 00:08.0: enabled 1
593 09:47:01.536865 PCI: 00:09.0: enabled 0
594 09:47:01.540117 PCI: 00:0a.0: enabled 0
595 09:47:01.540204 PCI: 00:0d.0: enabled 1
596 09:47:01.543395 PCI: 00:0d.1: enabled 0
597 09:47:01.546730 PCI: 00:0d.2: enabled 0
598 09:47:01.549838 PCI: 00:0d.3: enabled 0
599 09:47:01.549919 PCI: 00:0e.0: enabled 0
600 09:47:01.553212 PCI: 00:10.2: enabled 1
601 09:47:01.556533 PCI: 00:10.6: enabled 0
602 09:47:01.559932 PCI: 00:10.7: enabled 0
603 09:47:01.560013 PCI: 00:12.0: enabled 0
604 09:47:01.563237 PCI: 00:12.6: enabled 0
605 09:47:01.566627 PCI: 00:13.0: enabled 0
606 09:47:01.566708 PCI: 00:14.0: enabled 1
607 09:47:01.569850 PCI: 00:14.1: enabled 0
608 09:47:01.573098 PCI: 00:14.2: enabled 1
609 09:47:01.576339 PCI: 00:14.3: enabled 1
610 09:47:01.576430 PCI: 00:15.0: enabled 1
611 09:47:01.579625 PCI: 00:15.1: enabled 1
612 09:47:01.583031 PCI: 00:15.2: enabled 1
613 09:47:01.586317 PCI: 00:15.3: enabled 1
614 09:47:01.586408 PCI: 00:16.0: enabled 1
615 09:47:01.589440 PCI: 00:16.1: enabled 0
616 09:47:01.592837 PCI: 00:16.2: enabled 0
617 09:47:01.596063 PCI: 00:16.3: enabled 0
618 09:47:01.596144 PCI: 00:16.4: enabled 0
619 09:47:01.599308 PCI: 00:16.5: enabled 0
620 09:47:01.603090 PCI: 00:17.0: enabled 1
621 09:47:01.606390 PCI: 00:19.0: enabled 0
622 09:47:01.606475 PCI: 00:19.1: enabled 1
623 09:47:01.609578 PCI: 00:19.2: enabled 0
624 09:47:01.613231 PCI: 00:1c.0: enabled 1
625 09:47:01.613319 PCI: 00:1c.1: enabled 0
626 09:47:01.616360 PCI: 00:1c.2: enabled 0
627 09:47:01.619499 PCI: 00:1c.3: enabled 0
628 09:47:01.622852 PCI: 00:1c.4: enabled 0
629 09:47:01.622931 PCI: 00:1c.5: enabled 0
630 09:47:01.626244 PCI: 00:1c.6: enabled 1
631 09:47:01.629611 PCI: 00:1c.7: enabled 0
632 09:47:01.632805 PCI: 00:1d.0: enabled 1
633 09:47:01.632891 PCI: 00:1d.1: enabled 0
634 09:47:01.636292 PCI: 00:1d.2: enabled 1
635 09:47:01.639656 PCI: 00:1d.3: enabled 0
636 09:47:01.642886 PCI: 00:1e.0: enabled 1
637 09:47:01.642965 PCI: 00:1e.1: enabled 0
638 09:47:01.646632 PCI: 00:1e.2: enabled 1
639 09:47:01.649229 PCI: 00:1e.3: enabled 1
640 09:47:01.652369 PCI: 00:1f.0: enabled 1
641 09:47:01.652456 PCI: 00:1f.1: enabled 0
642 09:47:01.655507 PCI: 00:1f.2: enabled 1
643 09:47:01.658957 PCI: 00:1f.3: enabled 1
644 09:47:01.659048 PCI: 00:1f.4: enabled 0
645 09:47:01.662265 PCI: 00:1f.5: enabled 1
646 09:47:01.665519 PCI: 00:1f.6: enabled 0
647 09:47:01.668816 PCI: 00:1f.7: enabled 0
648 09:47:01.668903 APIC: 00: enabled 1
649 09:47:01.672196 GENERIC: 0.0: enabled 1
650 09:47:01.675544 GENERIC: 0.0: enabled 1
651 09:47:01.678735 GENERIC: 1.0: enabled 1
652 09:47:01.678821 GENERIC: 0.0: enabled 1
653 09:47:01.682109 GENERIC: 1.0: enabled 1
654 09:47:01.685520 USB0 port 0: enabled 1
655 09:47:01.685609 GENERIC: 0.0: enabled 1
656 09:47:01.688781 USB0 port 0: enabled 1
657 09:47:01.692597 GENERIC: 0.0: enabled 1
658 09:47:01.695848 I2C: 00:1a: enabled 1
659 09:47:01.695931 I2C: 00:31: enabled 1
660 09:47:01.699364 I2C: 00:32: enabled 1
661 09:47:01.702288 I2C: 00:10: enabled 1
662 09:47:01.702369 I2C: 00:15: enabled 1
663 09:47:01.705574 GENERIC: 0.0: enabled 0
664 09:47:01.708944 GENERIC: 1.0: enabled 0
665 09:47:01.712141 GENERIC: 0.0: enabled 1
666 09:47:01.712225 SPI: 00: enabled 1
667 09:47:01.715533 SPI: 00: enabled 1
668 09:47:01.715617 PNP: 0c09.0: enabled 1
669 09:47:01.718690 GENERIC: 0.0: enabled 1
670 09:47:01.722000 USB3 port 0: enabled 1
671 09:47:01.725402 USB3 port 1: enabled 1
672 09:47:01.725483 USB3 port 2: enabled 0
673 09:47:01.728732 USB3 port 3: enabled 0
674 09:47:01.731945 USB2 port 0: enabled 0
675 09:47:01.732042 USB2 port 1: enabled 1
676 09:47:01.735250 USB2 port 2: enabled 1
677 09:47:01.738584 USB2 port 3: enabled 0
678 09:47:01.742007 USB2 port 4: enabled 1
679 09:47:01.742106 USB2 port 5: enabled 0
680 09:47:01.745150 USB2 port 6: enabled 0
681 09:47:01.748521 USB2 port 7: enabled 0
682 09:47:01.748609 USB2 port 8: enabled 0
683 09:47:01.751840 USB2 port 9: enabled 0
684 09:47:01.754978 USB3 port 0: enabled 0
685 09:47:01.755100 USB3 port 1: enabled 1
686 09:47:01.758280 USB3 port 2: enabled 0
687 09:47:01.761682 USB3 port 3: enabled 0
688 09:47:01.764837 GENERIC: 0.0: enabled 1
689 09:47:01.764920 GENERIC: 1.0: enabled 1
690 09:47:01.768247 APIC: 01: enabled 1
691 09:47:01.771508 APIC: 07: enabled 1
692 09:47:01.771599 APIC: 03: enabled 1
693 09:47:01.774841 APIC: 04: enabled 1
694 09:47:01.774937 APIC: 06: enabled 1
695 09:47:01.778362 APIC: 02: enabled 1
696 09:47:01.781665 APIC: 05: enabled 1
697 09:47:01.781751 Compare with tree...
698 09:47:01.784981 Root Device: enabled 1
699 09:47:01.788401 DOMAIN: 0000: enabled 1
700 09:47:01.791557 PCI: 00:00.0: enabled 1
701 09:47:01.791636 PCI: 00:02.0: enabled 1
702 09:47:01.794755 PCI: 00:04.0: enabled 1
703 09:47:01.798007 GENERIC: 0.0: enabled 1
704 09:47:01.801145 PCI: 00:05.0: enabled 1
705 09:47:01.805008 PCI: 00:06.0: enabled 0
706 09:47:01.805099 PCI: 00:07.0: enabled 0
707 09:47:01.808309 GENERIC: 0.0: enabled 1
708 09:47:01.811660 PCI: 00:07.1: enabled 0
709 09:47:01.815046 GENERIC: 1.0: enabled 1
710 09:47:01.818093 PCI: 00:07.2: enabled 0
711 09:47:01.818179 GENERIC: 0.0: enabled 1
712 09:47:01.821428 PCI: 00:07.3: enabled 0
713 09:47:01.824611 GENERIC: 1.0: enabled 1
714 09:47:01.827982 PCI: 00:08.0: enabled 1
715 09:47:01.831259 PCI: 00:09.0: enabled 0
716 09:47:01.834783 PCI: 00:0a.0: enabled 0
717 09:47:01.834903 PCI: 00:0d.0: enabled 1
718 09:47:01.837905 USB0 port 0: enabled 1
719 09:47:01.841307 USB3 port 0: enabled 1
720 09:47:01.844644 USB3 port 1: enabled 1
721 09:47:01.847831 USB3 port 2: enabled 0
722 09:47:01.847918 USB3 port 3: enabled 0
723 09:47:01.851163 PCI: 00:0d.1: enabled 0
724 09:47:01.854340 PCI: 00:0d.2: enabled 0
725 09:47:01.857610 GENERIC: 0.0: enabled 1
726 09:47:01.860810 PCI: 00:0d.3: enabled 0
727 09:47:01.860895 PCI: 00:0e.0: enabled 0
728 09:47:01.864095 PCI: 00:10.2: enabled 1
729 09:47:01.867528 PCI: 00:10.6: enabled 0
730 09:47:01.870817 PCI: 00:10.7: enabled 0
731 09:47:01.874095 PCI: 00:12.0: enabled 0
732 09:47:01.874181 PCI: 00:12.6: enabled 0
733 09:47:01.877426 PCI: 00:13.0: enabled 0
734 09:47:01.880741 PCI: 00:14.0: enabled 1
735 09:47:01.884136 USB0 port 0: enabled 1
736 09:47:01.887434 USB2 port 0: enabled 0
737 09:47:01.887527 USB2 port 1: enabled 1
738 09:47:01.890669 USB2 port 2: enabled 1
739 09:47:01.893894 USB2 port 3: enabled 0
740 09:47:01.897238 USB2 port 4: enabled 1
741 09:47:01.900394 USB2 port 5: enabled 0
742 09:47:01.903751 USB2 port 6: enabled 0
743 09:47:01.903834 USB2 port 7: enabled 0
744 09:47:01.907602 USB2 port 8: enabled 0
745 09:47:01.910861 USB2 port 9: enabled 0
746 09:47:01.914247 USB3 port 0: enabled 0
747 09:47:01.917534 USB3 port 1: enabled 1
748 09:47:01.920864 USB3 port 2: enabled 0
749 09:47:01.920952 USB3 port 3: enabled 0
750 09:47:01.924157 PCI: 00:14.1: enabled 0
751 09:47:01.927465 PCI: 00:14.2: enabled 1
752 09:47:01.930751 PCI: 00:14.3: enabled 1
753 09:47:01.934250 GENERIC: 0.0: enabled 1
754 09:47:01.934336 PCI: 00:15.0: enabled 1
755 09:47:01.937505 I2C: 00:1a: enabled 1
756 09:47:01.940863 I2C: 00:31: enabled 1
757 09:47:01.944086 I2C: 00:32: enabled 1
758 09:47:01.944166 PCI: 00:15.1: enabled 1
759 09:47:01.947410 I2C: 00:10: enabled 1
760 09:47:01.950686 PCI: 00:15.2: enabled 1
761 09:47:01.954091 PCI: 00:15.3: enabled 1
762 09:47:01.957228 PCI: 00:16.0: enabled 1
763 09:47:01.957320 PCI: 00:16.1: enabled 0
764 09:47:01.960271 PCI: 00:16.2: enabled 0
765 09:47:01.963445 PCI: 00:16.3: enabled 0
766 09:47:01.966730 PCI: 00:16.4: enabled 0
767 09:47:01.970102 PCI: 00:16.5: enabled 0
768 09:47:01.970190 PCI: 00:17.0: enabled 1
769 09:47:01.974038 PCI: 00:19.0: enabled 0
770 09:47:01.976792 PCI: 00:19.1: enabled 1
771 09:47:01.980286 I2C: 00:15: enabled 1
772 09:47:01.980379 PCI: 00:19.2: enabled 0
773 09:47:01.983332 PCI: 00:1d.0: enabled 1
774 09:47:01.986673 GENERIC: 0.0: enabled 1
775 09:47:01.990714 PCI: 00:1e.0: enabled 1
776 09:47:01.993847 PCI: 00:1e.1: enabled 0
777 09:47:01.996605 PCI: 00:1e.2: enabled 1
778 09:47:01.996704 SPI: 00: enabled 1
779 09:47:02.000465 PCI: 00:1e.3: enabled 1
780 09:47:02.003861 SPI: 00: enabled 1
781 09:47:02.003950 PCI: 00:1f.0: enabled 1
782 09:47:02.006865 PNP: 0c09.0: enabled 1
783 09:47:02.010202 PCI: 00:1f.1: enabled 0
784 09:47:02.013511 PCI: 00:1f.2: enabled 1
785 09:47:02.016734 GENERIC: 0.0: enabled 1
786 09:47:02.020122 GENERIC: 0.0: enabled 1
787 09:47:02.020212 GENERIC: 1.0: enabled 1
788 09:47:02.023422 PCI: 00:1f.3: enabled 1
789 09:47:02.026665 PCI: 00:1f.4: enabled 0
790 09:47:02.030080 PCI: 00:1f.5: enabled 1
791 09:47:02.033266 PCI: 00:1f.6: enabled 0
792 09:47:02.033346 PCI: 00:1f.7: enabled 0
793 09:47:02.084712 CPU_CLUSTER: 0: enabled 1
794 09:47:02.084854 APIC: 00: enabled 1
795 09:47:02.085137 APIC: 01: enabled 1
796 09:47:02.085211 APIC: 07: enabled 1
797 09:47:02.085285 APIC: 03: enabled 1
798 09:47:02.085538 APIC: 04: enabled 1
799 09:47:02.085607 APIC: 06: enabled 1
800 09:47:02.085673 APIC: 02: enabled 1
801 09:47:02.085733 APIC: 05: enabled 1
802 09:47:02.085792 Root Device scanning...
803 09:47:02.086045 scan_static_bus for Root Device
804 09:47:02.086115 DOMAIN: 0000 enabled
805 09:47:02.086176 CPU_CLUSTER: 0 enabled
806 09:47:02.086234 DOMAIN: 0000 scanning...
807 09:47:02.086302 PCI: pci_scan_bus for bus 00
808 09:47:02.086381 PCI: 00:00.0 [8086/0000] ops
809 09:47:02.086440 PCI: 00:00.0 [8086/9a12] enabled
810 09:47:02.086497 PCI: 00:02.0 [8086/0000] bus ops
811 09:47:02.086566 PCI: 00:02.0 [8086/9a40] enabled
812 09:47:02.135111 PCI: 00:04.0 [8086/0000] bus ops
813 09:47:02.135244 PCI: 00:04.0 [8086/9a03] enabled
814 09:47:02.135516 PCI: 00:05.0 [8086/9a19] enabled
815 09:47:02.135592 PCI: 00:07.0 [0000/0000] hidden
816 09:47:02.135673 PCI: 00:08.0 [8086/9a11] enabled
817 09:47:02.135737 PCI: 00:0a.0 [8086/9a0d] disabled
818 09:47:02.135801 PCI: 00:0d.0 [8086/0000] bus ops
819 09:47:02.136049 PCI: 00:0d.0 [8086/9a13] enabled
820 09:47:02.136121 PCI: 00:14.0 [8086/0000] bus ops
821 09:47:02.136466 PCI: 00:14.0 [8086/a0ed] enabled
822 09:47:02.136535 PCI: 00:14.2 [8086/a0ef] enabled
823 09:47:02.137096 PCI: 00:14.3 [8086/0000] bus ops
824 09:47:02.137165 PCI: 00:14.3 [8086/a0f0] enabled
825 09:47:02.137416 PCI: 00:15.0 [8086/0000] bus ops
826 09:47:02.137485 PCI: 00:15.0 [8086/a0e8] enabled
827 09:47:02.185693 PCI: 00:15.1 [8086/0000] bus ops
828 09:47:02.185873 PCI: 00:15.1 [8086/a0e9] enabled
829 09:47:02.186216 PCI: 00:15.2 [8086/0000] bus ops
830 09:47:02.186326 PCI: 00:15.2 [8086/a0ea] enabled
831 09:47:02.186434 PCI: 00:15.3 [8086/0000] bus ops
832 09:47:02.186527 PCI: 00:15.3 [8086/a0eb] enabled
833 09:47:02.186628 PCI: 00:16.0 [8086/0000] ops
834 09:47:02.186720 PCI: 00:16.0 [8086/a0e0] enabled
835 09:47:02.186826 PCI: Static device PCI: 00:17.0 not found, disabling it.
836 09:47:02.186919 PCI: 00:19.0 [8086/0000] bus ops
837 09:47:02.187010 PCI: 00:19.0 [8086/a0c5] disabled
838 09:47:02.187301 PCI: 00:19.1 [8086/0000] bus ops
839 09:47:02.187618 PCI: 00:19.1 [8086/a0c6] enabled
840 09:47:02.187723 PCI: 00:1d.0 [8086/0000] bus ops
841 09:47:02.215951 PCI: 00:1d.0 [8086/a0b0] enabled
842 09:47:02.216141 PCI: 00:1e.0 [8086/0000] ops
843 09:47:02.216468 PCI: 00:1e.0 [8086/a0a8] enabled
844 09:47:02.216589 PCI: 00:1e.2 [8086/0000] bus ops
845 09:47:02.216695 PCI: 00:1e.2 [8086/a0aa] enabled
846 09:47:02.216800 PCI: 00:1e.3 [8086/0000] bus ops
847 09:47:02.216901 PCI: 00:1e.3 [8086/a0ab] enabled
848 09:47:02.217002 PCI: 00:1f.0 [8086/0000] bus ops
849 09:47:02.219812 PCI: 00:1f.0 [8086/a087] enabled
850 09:47:02.219930 RTC Init
851 09:47:02.220044 Set power on after power failure.
852 09:47:02.223160 Disabling Deep S3
853 09:47:02.223279 Disabling Deep S3
854 09:47:02.223384 Disabling Deep S4
855 09:47:02.226523 Disabling Deep S4
856 09:47:02.229792 Disabling Deep S5
857 09:47:02.229884 Disabling Deep S5
858 09:47:02.233226 PCI: 00:1f.2 [0000/0000] hidden
859 09:47:02.236629 PCI: 00:1f.3 [8086/0000] bus ops
860 09:47:02.239912 PCI: 00:1f.3 [8086/a0c8] enabled
861 09:47:02.242569 PCI: 00:1f.5 [8086/0000] bus ops
862 09:47:02.245961 PCI: 00:1f.5 [8086/a0a4] enabled
863 09:47:02.249372 PCI: Leftover static devices:
864 09:47:02.249460 PCI: 00:10.2
865 09:47:02.252763 PCI: 00:10.6
866 09:47:02.252848 PCI: 00:10.7
867 09:47:02.256067 PCI: 00:06.0
868 09:47:02.256167 PCI: 00:07.1
869 09:47:02.256241 PCI: 00:07.2
870 09:47:02.259506 PCI: 00:07.3
871 09:47:02.259594 PCI: 00:09.0
872 09:47:02.262740 PCI: 00:0d.1
873 09:47:02.262845 PCI: 00:0d.2
874 09:47:02.265903 PCI: 00:0d.3
875 09:47:02.266000 PCI: 00:0e.0
876 09:47:02.266069 PCI: 00:12.0
877 09:47:02.269212 PCI: 00:12.6
878 09:47:02.269321 PCI: 00:13.0
879 09:47:02.272520 PCI: 00:14.1
880 09:47:02.272612 PCI: 00:16.1
881 09:47:02.272683 PCI: 00:16.2
882 09:47:02.276430 PCI: 00:16.3
883 09:47:02.276528 PCI: 00:16.4
884 09:47:02.279731 PCI: 00:16.5
885 09:47:02.279825 PCI: 00:17.0
886 09:47:02.279896 PCI: 00:19.2
887 09:47:02.282936 PCI: 00:1e.1
888 09:47:02.283068 PCI: 00:1f.1
889 09:47:02.286219 PCI: 00:1f.4
890 09:47:02.286341 PCI: 00:1f.6
891 09:47:02.289560 PCI: 00:1f.7
892 09:47:02.289651 PCI: Check your devicetree.cb.
893 09:47:02.292992 PCI: 00:02.0 scanning...
894 09:47:02.296171 scan_generic_bus for PCI: 00:02.0
895 09:47:02.302678 scan_generic_bus for PCI: 00:02.0 done
896 09:47:02.306042 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
897 09:47:02.309236 PCI: 00:04.0 scanning...
898 09:47:02.312170 scan_generic_bus for PCI: 00:04.0
899 09:47:02.312264 GENERIC: 0.0 enabled
900 09:47:02.319064 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
901 09:47:02.326112 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
902 09:47:02.329318 PCI: 00:0d.0 scanning...
903 09:47:02.332635 scan_static_bus for PCI: 00:0d.0
904 09:47:02.332728 USB0 port 0 enabled
905 09:47:02.335840 USB0 port 0 scanning...
906 09:47:02.338689 scan_static_bus for USB0 port 0
907 09:47:02.342065 USB3 port 0 enabled
908 09:47:02.342157 USB3 port 1 enabled
909 09:47:02.345400 USB3 port 2 disabled
910 09:47:02.348791 USB3 port 3 disabled
911 09:47:02.348879 USB3 port 0 scanning...
912 09:47:02.352219 scan_static_bus for USB3 port 0
913 09:47:02.355606 scan_static_bus for USB3 port 0 done
914 09:47:02.362251 scan_bus: bus USB3 port 0 finished in 6 msecs
915 09:47:02.365663 USB3 port 1 scanning...
916 09:47:02.368858 scan_static_bus for USB3 port 1
917 09:47:02.372118 scan_static_bus for USB3 port 1 done
918 09:47:02.375361 scan_bus: bus USB3 port 1 finished in 6 msecs
919 09:47:02.378808 scan_static_bus for USB0 port 0 done
920 09:47:02.385277 scan_bus: bus USB0 port 0 finished in 43 msecs
921 09:47:02.388668 scan_static_bus for PCI: 00:0d.0 done
922 09:47:02.392118 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
923 09:47:02.395280 PCI: 00:14.0 scanning...
924 09:47:02.398665 scan_static_bus for PCI: 00:14.0
925 09:47:02.401995 USB0 port 0 enabled
926 09:47:02.402086 USB0 port 0 scanning...
927 09:47:02.405329 scan_static_bus for USB0 port 0
928 09:47:02.408576 USB2 port 0 disabled
929 09:47:02.411901 USB2 port 1 enabled
930 09:47:02.412002 USB2 port 2 enabled
931 09:47:02.415014 USB2 port 3 disabled
932 09:47:02.418345 USB2 port 4 enabled
933 09:47:02.418437 USB2 port 5 disabled
934 09:47:02.421557 USB2 port 6 disabled
935 09:47:02.424881 USB2 port 7 disabled
936 09:47:02.424962 USB2 port 8 disabled
937 09:47:02.428328 USB2 port 9 disabled
938 09:47:02.431436 USB3 port 0 disabled
939 09:47:02.431538 USB3 port 1 enabled
940 09:47:02.434748 USB3 port 2 disabled
941 09:47:02.434835 USB3 port 3 disabled
942 09:47:02.438580 USB2 port 1 scanning...
943 09:47:02.441336 scan_static_bus for USB2 port 1
944 09:47:02.444719 scan_static_bus for USB2 port 1 done
945 09:47:02.451409 scan_bus: bus USB2 port 1 finished in 6 msecs
946 09:47:02.451505 USB2 port 2 scanning...
947 09:47:02.454867 scan_static_bus for USB2 port 2
948 09:47:02.461545 scan_static_bus for USB2 port 2 done
949 09:47:02.464846 scan_bus: bus USB2 port 2 finished in 6 msecs
950 09:47:02.468080 USB2 port 4 scanning...
951 09:47:02.471243 scan_static_bus for USB2 port 4
952 09:47:02.475001 scan_static_bus for USB2 port 4 done
953 09:47:02.478322 scan_bus: bus USB2 port 4 finished in 6 msecs
954 09:47:02.481591 USB3 port 1 scanning...
955 09:47:02.484883 scan_static_bus for USB3 port 1
956 09:47:02.488255 scan_static_bus for USB3 port 1 done
957 09:47:02.494940 scan_bus: bus USB3 port 1 finished in 6 msecs
958 09:47:02.498277 scan_static_bus for USB0 port 0 done
959 09:47:02.501412 scan_bus: bus USB0 port 0 finished in 93 msecs
960 09:47:02.504686 scan_static_bus for PCI: 00:14.0 done
961 09:47:02.511294 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
962 09:47:02.511390 PCI: 00:14.3 scanning...
963 09:47:02.517746 scan_static_bus for PCI: 00:14.3
964 09:47:02.517849 GENERIC: 0.0 enabled
965 09:47:02.521137 scan_static_bus for PCI: 00:14.3 done
966 09:47:02.527793 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
967 09:47:02.530933 PCI: 00:15.0 scanning...
968 09:47:02.534247 scan_static_bus for PCI: 00:15.0
969 09:47:02.534345 I2C: 00:1a enabled
970 09:47:02.537630 I2C: 00:31 enabled
971 09:47:02.537710 I2C: 00:32 enabled
972 09:47:02.544100 scan_static_bus for PCI: 00:15.0 done
973 09:47:02.547700 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
974 09:47:02.550981 PCI: 00:15.1 scanning...
975 09:47:02.554351 scan_static_bus for PCI: 00:15.1
976 09:47:02.554445 I2C: 00:10 enabled
977 09:47:02.561122 scan_static_bus for PCI: 00:15.1 done
978 09:47:02.564314 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
979 09:47:02.567538 PCI: 00:15.2 scanning...
980 09:47:02.570828 scan_static_bus for PCI: 00:15.2
981 09:47:02.574026 scan_static_bus for PCI: 00:15.2 done
982 09:47:02.577197 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
983 09:47:02.580700 PCI: 00:15.3 scanning...
984 09:47:02.584047 scan_static_bus for PCI: 00:15.3
985 09:47:02.587420 scan_static_bus for PCI: 00:15.3 done
986 09:47:02.593424 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
987 09:47:02.597185 PCI: 00:19.1 scanning...
988 09:47:02.600116 scan_static_bus for PCI: 00:19.1
989 09:47:02.600202 I2C: 00:15 enabled
990 09:47:02.603318 scan_static_bus for PCI: 00:19.1 done
991 09:47:02.609924 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
992 09:47:02.613240 PCI: 00:1d.0 scanning...
993 09:47:02.616507 do_pci_scan_bridge for PCI: 00:1d.0
994 09:47:02.620357 PCI: pci_scan_bus for bus 01
995 09:47:02.622992 PCI: 01:00.0 [15b7/5009] enabled
996 09:47:02.623104 GENERIC: 0.0 enabled
997 09:47:02.629682 Enabling Common Clock Configuration
998 09:47:02.633635 L1 Sub-State supported from root port 29
999 09:47:02.636872 L1 Sub-State Support = 0x5
1000 09:47:02.640250 CommonModeRestoreTime = 0x28
1001 09:47:02.643500 Power On Value = 0x16, Power On Scale = 0x0
1002 09:47:02.643590 ASPM: Enabled L1
1003 09:47:02.649956 PCIe: Max_Payload_Size adjusted to 128
1004 09:47:02.653455 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1005 09:47:02.656621 PCI: 00:1e.2 scanning...
1006 09:47:02.659975 scan_generic_bus for PCI: 00:1e.2
1007 09:47:02.660060 SPI: 00 enabled
1008 09:47:02.667379 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1009 09:47:02.670681 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1010 09:47:02.673885 PCI: 00:1e.3 scanning...
1011 09:47:02.677148 scan_generic_bus for PCI: 00:1e.3
1012 09:47:02.680454 SPI: 00 enabled
1013 09:47:02.686946 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1014 09:47:02.690269 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1015 09:47:02.693679 PCI: 00:1f.0 scanning...
1016 09:47:02.697027 scan_static_bus for PCI: 00:1f.0
1017 09:47:02.699766 PNP: 0c09.0 enabled
1018 09:47:02.699851 PNP: 0c09.0 scanning...
1019 09:47:02.703757 scan_static_bus for PNP: 0c09.0
1020 09:47:02.707020 scan_static_bus for PNP: 0c09.0 done
1021 09:47:02.713621 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1022 09:47:02.717018 scan_static_bus for PCI: 00:1f.0 done
1023 09:47:02.720321 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1024 09:47:02.723556 PCI: 00:1f.2 scanning...
1025 09:47:02.726960 scan_static_bus for PCI: 00:1f.2
1026 09:47:02.730352 GENERIC: 0.0 enabled
1027 09:47:02.732864 GENERIC: 0.0 scanning...
1028 09:47:02.736202 scan_static_bus for GENERIC: 0.0
1029 09:47:02.736288 GENERIC: 0.0 enabled
1030 09:47:02.740145 GENERIC: 1.0 enabled
1031 09:47:02.742807 scan_static_bus for GENERIC: 0.0 done
1032 09:47:02.749974 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1033 09:47:02.753335 scan_static_bus for PCI: 00:1f.2 done
1034 09:47:02.756780 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1035 09:47:02.759981 PCI: 00:1f.3 scanning...
1036 09:47:02.762707 scan_static_bus for PCI: 00:1f.3
1037 09:47:02.766111 scan_static_bus for PCI: 00:1f.3 done
1038 09:47:02.772788 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1039 09:47:02.772881 PCI: 00:1f.5 scanning...
1040 09:47:02.779750 scan_generic_bus for PCI: 00:1f.5
1041 09:47:02.783049 scan_generic_bus for PCI: 00:1f.5 done
1042 09:47:02.786366 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1043 09:47:02.792943 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1044 09:47:02.796260 scan_static_bus for Root Device done
1045 09:47:02.799605 scan_bus: bus Root Device finished in 736 msecs
1046 09:47:02.799691 done
1047 09:47:02.806299 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1048 09:47:02.809629 Chrome EC: UHEPI supported
1049 09:47:02.816154 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1050 09:47:02.822531 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1051 09:47:02.825777 SPI flash protection: WPSW=0 SRP0=1
1052 09:47:02.832317 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1053 09:47:02.835786 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1054 09:47:02.839176 found VGA at PCI: 00:02.0
1055 09:47:02.842303 Setting up VGA for PCI: 00:02.0
1056 09:47:02.848982 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1057 09:47:02.852340 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1058 09:47:02.855631 Allocating resources...
1059 09:47:02.859039 Reading resources...
1060 09:47:02.862359 Root Device read_resources bus 0 link: 0
1061 09:47:02.865684 DOMAIN: 0000 read_resources bus 0 link: 0
1062 09:47:02.872326 PCI: 00:04.0 read_resources bus 1 link: 0
1063 09:47:02.875733 PCI: 00:04.0 read_resources bus 1 link: 0 done
1064 09:47:02.882006 PCI: 00:0d.0 read_resources bus 0 link: 0
1065 09:47:02.885308 USB0 port 0 read_resources bus 0 link: 0
1066 09:47:02.892145 USB0 port 0 read_resources bus 0 link: 0 done
1067 09:47:02.895326 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1068 09:47:02.898704 PCI: 00:14.0 read_resources bus 0 link: 0
1069 09:47:02.905223 USB0 port 0 read_resources bus 0 link: 0
1070 09:47:02.908707 USB0 port 0 read_resources bus 0 link: 0 done
1071 09:47:02.915259 PCI: 00:14.0 read_resources bus 0 link: 0 done
1072 09:47:02.918489 PCI: 00:14.3 read_resources bus 0 link: 0
1073 09:47:02.925185 PCI: 00:14.3 read_resources bus 0 link: 0 done
1074 09:47:02.928430 PCI: 00:15.0 read_resources bus 0 link: 0
1075 09:47:02.935648 PCI: 00:15.0 read_resources bus 0 link: 0 done
1076 09:47:02.938941 PCI: 00:15.1 read_resources bus 0 link: 0
1077 09:47:02.945603 PCI: 00:15.1 read_resources bus 0 link: 0 done
1078 09:47:02.949079 PCI: 00:19.1 read_resources bus 0 link: 0
1079 09:47:02.955661 PCI: 00:19.1 read_resources bus 0 link: 0 done
1080 09:47:02.958978 PCI: 00:1d.0 read_resources bus 1 link: 0
1081 09:47:02.965757 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1082 09:47:02.969181 PCI: 00:1e.2 read_resources bus 2 link: 0
1083 09:47:02.975614 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1084 09:47:02.978859 PCI: 00:1e.3 read_resources bus 3 link: 0
1085 09:47:02.985293 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1086 09:47:02.988774 PCI: 00:1f.0 read_resources bus 0 link: 0
1087 09:47:02.995420 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1088 09:47:02.998717 PCI: 00:1f.2 read_resources bus 0 link: 0
1089 09:47:03.002170 GENERIC: 0.0 read_resources bus 0 link: 0
1090 09:47:03.009309 GENERIC: 0.0 read_resources bus 0 link: 0 done
1091 09:47:03.012624 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1092 09:47:03.019884 DOMAIN: 0000 read_resources bus 0 link: 0 done
1093 09:47:03.023149 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1094 09:47:03.029391 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1095 09:47:03.032782 Root Device read_resources bus 0 link: 0 done
1096 09:47:03.036081 Done reading resources.
1097 09:47:03.042763 Show resources in subtree (Root Device)...After reading.
1098 09:47:03.045949 Root Device child on link 0 DOMAIN: 0000
1099 09:47:03.049252 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1100 09:47:03.059481 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1101 09:47:03.069211 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1102 09:47:03.072696 PCI: 00:00.0
1103 09:47:03.082634 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1104 09:47:03.089200 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1105 09:47:03.099266 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1106 09:47:03.109238 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1107 09:47:03.118753 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1108 09:47:03.128725 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1109 09:47:03.138902 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1110 09:47:03.145617 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1111 09:47:03.155523 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1112 09:47:03.165597 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1113 09:47:03.175307 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1114 09:47:03.185118 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1115 09:47:03.194866 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1116 09:47:03.201598 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1117 09:47:03.211405 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1118 09:47:03.221796 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1119 09:47:03.231252 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1120 09:47:03.241578 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1121 09:47:03.251549 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1122 09:47:03.260955 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1123 09:47:03.261109 PCI: 00:02.0
1124 09:47:03.271018 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 09:47:03.280944 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 09:47:03.290895 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 09:47:03.294707 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1128 09:47:03.304409 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1129 09:47:03.307826 GENERIC: 0.0
1130 09:47:03.307967 PCI: 00:05.0
1131 09:47:03.317581 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 09:47:03.324144 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1133 09:47:03.324283 GENERIC: 0.0
1134 09:47:03.327861 PCI: 00:08.0
1135 09:47:03.337799 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 09:47:03.337938 PCI: 00:0a.0
1137 09:47:03.344237 PCI: 00:0d.0 child on link 0 USB0 port 0
1138 09:47:03.354235 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1139 09:47:03.357521 USB0 port 0 child on link 0 USB3 port 0
1140 09:47:03.357677 USB3 port 0
1141 09:47:03.360902 USB3 port 1
1142 09:47:03.363688 USB3 port 2
1143 09:47:03.363801 USB3 port 3
1144 09:47:03.367073 PCI: 00:14.0 child on link 0 USB0 port 0
1145 09:47:03.377017 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1146 09:47:03.383598 USB0 port 0 child on link 0 USB2 port 0
1147 09:47:03.383753 USB2 port 0
1148 09:47:03.387582 USB2 port 1
1149 09:47:03.387719 USB2 port 2
1150 09:47:03.390824 USB2 port 3
1151 09:47:03.390938 USB2 port 4
1152 09:47:03.394168 USB2 port 5
1153 09:47:03.394280 USB2 port 6
1154 09:47:03.397639 USB2 port 7
1155 09:47:03.397756 USB2 port 8
1156 09:47:03.400761 USB2 port 9
1157 09:47:03.403960 USB3 port 0
1158 09:47:03.404081 USB3 port 1
1159 09:47:03.407220 USB3 port 2
1160 09:47:03.407337 USB3 port 3
1161 09:47:03.410660 PCI: 00:14.2
1162 09:47:03.420119 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1163 09:47:03.430858 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1164 09:47:03.433863 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1165 09:47:03.443653 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1166 09:47:03.446973 GENERIC: 0.0
1167 09:47:03.450457 PCI: 00:15.0 child on link 0 I2C: 00:1a
1168 09:47:03.460485 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 09:47:03.460633 I2C: 00:1a
1170 09:47:03.463839 I2C: 00:31
1171 09:47:03.463950 I2C: 00:32
1172 09:47:03.469993 PCI: 00:15.1 child on link 0 I2C: 00:10
1173 09:47:03.480037 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 09:47:03.480176 I2C: 00:10
1175 09:47:03.483364 PCI: 00:15.2
1176 09:47:03.493479 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 09:47:03.493585 PCI: 00:15.3
1178 09:47:03.503292 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 09:47:03.506664 PCI: 00:16.0
1180 09:47:03.516590 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 09:47:03.516697 PCI: 00:19.0
1182 09:47:03.519944 PCI: 00:19.1 child on link 0 I2C: 00:15
1183 09:47:03.529762 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 09:47:03.533006 I2C: 00:15
1185 09:47:03.536274 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1186 09:47:03.546036 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1187 09:47:03.555858 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1188 09:47:03.565844 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1189 09:47:03.565949 GENERIC: 0.0
1190 09:47:03.569196 PCI: 01:00.0
1191 09:47:03.579316 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 09:47:03.589099 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1193 09:47:03.589209 PCI: 00:1e.0
1194 09:47:03.599157 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1195 09:47:03.605704 PCI: 00:1e.2 child on link 0 SPI: 00
1196 09:47:03.615603 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 09:47:03.615727 SPI: 00
1198 09:47:03.619534 PCI: 00:1e.3 child on link 0 SPI: 00
1199 09:47:03.629386 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 09:47:03.632778 SPI: 00
1201 09:47:03.635423 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1202 09:47:03.645246 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1203 09:47:03.645356 PNP: 0c09.0
1204 09:47:03.655363 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1205 09:47:03.658704 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1206 09:47:03.668360 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1207 09:47:03.678519 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1208 09:47:03.681925 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1209 09:47:03.685082 GENERIC: 0.0
1210 09:47:03.685167 GENERIC: 1.0
1211 09:47:03.688387 PCI: 00:1f.3
1212 09:47:03.698479 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1213 09:47:03.708338 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1214 09:47:03.708444 PCI: 00:1f.5
1215 09:47:03.718284 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1216 09:47:03.721603 CPU_CLUSTER: 0 child on link 0 APIC: 00
1217 09:47:03.725041 APIC: 00
1218 09:47:03.725129 APIC: 01
1219 09:47:03.728321 APIC: 07
1220 09:47:03.728405 APIC: 03
1221 09:47:03.728474 APIC: 04
1222 09:47:03.731369 APIC: 06
1223 09:47:03.731451 APIC: 02
1224 09:47:03.731518 APIC: 05
1225 09:47:03.741954 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1226 09:47:03.745253 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1227 09:47:03.751742 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1228 09:47:03.758302 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1229 09:47:03.761646 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1230 09:47:03.768328 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1231 09:47:03.775067 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 09:47:03.781691 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1233 09:47:03.788454 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1234 09:47:03.798403 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1235 09:47:03.801121 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1236 09:47:03.811124 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1237 09:47:03.817670 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1238 09:47:03.824222 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1239 09:47:03.827742 DOMAIN: 0000: Resource ranges:
1240 09:47:03.831025 * Base: 1000, Size: 800, Tag: 100
1241 09:47:03.834365 * Base: 1900, Size: e700, Tag: 100
1242 09:47:03.840740 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1243 09:47:03.847364 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1244 09:47:03.853786 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1245 09:47:03.861013 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1246 09:47:03.870978 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1247 09:47:03.877126 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1248 09:47:03.883975 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1249 09:47:03.893947 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1250 09:47:03.900524 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1251 09:47:03.907219 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1252 09:47:03.916964 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1253 09:47:03.923677 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1254 09:47:03.930372 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1255 09:47:03.940169 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1256 09:47:03.946652 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1257 09:47:03.953136 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1258 09:47:03.962986 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1259 09:47:03.969717 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1260 09:47:03.976446 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1261 09:47:03.986360 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1262 09:47:03.993078 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1263 09:47:04.003001 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1264 09:47:04.009011 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1265 09:47:04.015741 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1266 09:47:04.025881 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1267 09:47:04.026052 DOMAIN: 0000: Resource ranges:
1268 09:47:04.032646 * Base: 7fc00000, Size: 40400000, Tag: 200
1269 09:47:04.035836 * Base: d0000000, Size: 28000000, Tag: 200
1270 09:47:04.039101 * Base: fa000000, Size: 1000000, Tag: 200
1271 09:47:04.045731 * Base: fb001000, Size: 2fff000, Tag: 200
1272 09:47:04.048856 * Base: fe010000, Size: 2e000, Tag: 200
1273 09:47:04.052176 * Base: fe03f000, Size: d41000, Tag: 200
1274 09:47:04.055507 * Base: fed88000, Size: 8000, Tag: 200
1275 09:47:04.061976 * Base: fed93000, Size: d000, Tag: 200
1276 09:47:04.065200 * Base: feda2000, Size: 1e000, Tag: 200
1277 09:47:04.068461 * Base: fede0000, Size: 1220000, Tag: 200
1278 09:47:04.075740 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1279 09:47:04.081798 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1280 09:47:04.088513 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1281 09:47:04.095233 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1282 09:47:04.101785 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1283 09:47:04.108383 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1284 09:47:04.115196 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1285 09:47:04.121751 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1286 09:47:04.128318 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1287 09:47:04.135087 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1288 09:47:04.141663 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1289 09:47:04.147741 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1290 09:47:04.154831 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1291 09:47:04.161396 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1292 09:47:04.168027 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1293 09:47:04.174708 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1294 09:47:04.181452 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1295 09:47:04.187473 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1296 09:47:04.194165 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1297 09:47:04.200893 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1298 09:47:04.207490 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1299 09:47:04.214055 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1300 09:47:04.221192 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1301 09:47:04.227690 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1302 09:47:04.237626 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1303 09:47:04.240929 PCI: 00:1d.0: Resource ranges:
1304 09:47:04.244110 * Base: 7fc00000, Size: 100000, Tag: 200
1305 09:47:04.250561 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1306 09:47:04.257115 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1307 09:47:04.263884 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1308 09:47:04.273775 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1309 09:47:04.277036 Root Device assign_resources, bus 0 link: 0
1310 09:47:04.280364 DOMAIN: 0000 assign_resources, bus 0 link: 0
1311 09:47:04.290416 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1312 09:47:04.297267 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1313 09:47:04.306641 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1314 09:47:04.313392 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1315 09:47:04.320026 PCI: 00:04.0 assign_resources, bus 1 link: 0
1316 09:47:04.323325 PCI: 00:04.0 assign_resources, bus 1 link: 0
1317 09:47:04.329881 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1318 09:47:04.340424 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1319 09:47:04.346391 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1320 09:47:04.353066 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1321 09:47:04.356824 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1322 09:47:04.366700 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1323 09:47:04.370182 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 09:47:04.372880 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 09:47:04.383387 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1326 09:47:04.389717 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1327 09:47:04.399592 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1328 09:47:04.402844 PCI: 00:14.3 assign_resources, bus 0 link: 0
1329 09:47:04.409638 PCI: 00:14.3 assign_resources, bus 0 link: 0
1330 09:47:04.416232 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1331 09:47:04.419465 PCI: 00:15.0 assign_resources, bus 0 link: 0
1332 09:47:04.426145 PCI: 00:15.0 assign_resources, bus 0 link: 0
1333 09:47:04.432739 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1334 09:47:04.439404 PCI: 00:15.1 assign_resources, bus 0 link: 0
1335 09:47:04.442684 PCI: 00:15.1 assign_resources, bus 0 link: 0
1336 09:47:04.453024 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1337 09:47:04.459685 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1338 09:47:04.469603 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1339 09:47:04.476274 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1340 09:47:04.479543 PCI: 00:19.1 assign_resources, bus 0 link: 0
1341 09:47:04.485659 PCI: 00:19.1 assign_resources, bus 0 link: 0
1342 09:47:04.492210 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1343 09:47:04.502306 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1344 09:47:04.512086 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1345 09:47:04.515413 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1346 09:47:04.525445 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1347 09:47:04.532089 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1348 09:47:04.538579 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1349 09:47:04.545354 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1350 09:47:04.551764 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1351 09:47:04.555199 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1352 09:47:04.565155 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1353 09:47:04.568443 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1354 09:47:04.571861 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1355 09:47:04.578396 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1356 09:47:04.581775 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1357 09:47:04.588569 LPC: Trying to open IO window from 800 size 1ff
1358 09:47:04.595089 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1359 09:47:04.605295 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1360 09:47:04.611328 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1361 09:47:04.617771 DOMAIN: 0000 assign_resources, bus 0 link: 0
1362 09:47:04.621153 Root Device assign_resources, bus 0 link: 0
1363 09:47:04.624374 Done setting resources.
1364 09:47:04.631041 Show resources in subtree (Root Device)...After assigning values.
1365 09:47:04.634927 Root Device child on link 0 DOMAIN: 0000
1366 09:47:04.637647 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1367 09:47:04.648185 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1368 09:47:04.658019 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1369 09:47:04.661279 PCI: 00:00.0
1370 09:47:04.667967 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1371 09:47:04.677787 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1372 09:47:04.687714 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1373 09:47:04.697967 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1374 09:47:04.707342 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1375 09:47:04.717274 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1376 09:47:04.723932 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1377 09:47:04.734424 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1378 09:47:04.743809 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1379 09:47:04.753837 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1380 09:47:04.763804 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1381 09:47:04.773730 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1382 09:47:04.780344 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1383 09:47:04.790158 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1384 09:47:04.800317 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1385 09:47:04.810416 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1386 09:47:04.820295 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1387 09:47:04.830362 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1388 09:47:04.837061 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1389 09:47:04.846963 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1390 09:47:04.850240 PCI: 00:02.0
1391 09:47:04.860051 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1392 09:47:04.869815 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1393 09:47:04.879775 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1394 09:47:04.883128 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1395 09:47:04.896587 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1396 09:47:04.896689 GENERIC: 0.0
1397 09:47:04.899744 PCI: 00:05.0
1398 09:47:04.909762 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1399 09:47:04.913161 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1400 09:47:04.916392 GENERIC: 0.0
1401 09:47:04.916560 PCI: 00:08.0
1402 09:47:04.926241 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1403 09:47:04.929555 PCI: 00:0a.0
1404 09:47:04.932815 PCI: 00:0d.0 child on link 0 USB0 port 0
1405 09:47:04.942779 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1406 09:47:04.949372 USB0 port 0 child on link 0 USB3 port 0
1407 09:47:04.949510 USB3 port 0
1408 09:47:04.952835 USB3 port 1
1409 09:47:04.952956 USB3 port 2
1410 09:47:04.955624 USB3 port 3
1411 09:47:04.959518 PCI: 00:14.0 child on link 0 USB0 port 0
1412 09:47:04.969480 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1413 09:47:04.976075 USB0 port 0 child on link 0 USB2 port 0
1414 09:47:04.976209 USB2 port 0
1415 09:47:04.979532 USB2 port 1
1416 09:47:04.979653 USB2 port 2
1417 09:47:04.982116 USB2 port 3
1418 09:47:04.982238 USB2 port 4
1419 09:47:04.985441 USB2 port 5
1420 09:47:04.985560 USB2 port 6
1421 09:47:04.989386 USB2 port 7
1422 09:47:04.989505 USB2 port 8
1423 09:47:04.992133 USB2 port 9
1424 09:47:04.992249 USB3 port 0
1425 09:47:04.995521 USB3 port 1
1426 09:47:04.995639 USB3 port 2
1427 09:47:04.998954 USB3 port 3
1428 09:47:05.002236 PCI: 00:14.2
1429 09:47:05.012190 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1430 09:47:05.022195 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1431 09:47:05.025643 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1432 09:47:05.035676 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1433 09:47:05.038722 GENERIC: 0.0
1434 09:47:05.042044 PCI: 00:15.0 child on link 0 I2C: 00:1a
1435 09:47:05.051966 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1436 09:47:05.055289 I2C: 00:1a
1437 09:47:05.055416 I2C: 00:31
1438 09:47:05.058620 I2C: 00:32
1439 09:47:05.061843 PCI: 00:15.1 child on link 0 I2C: 00:10
1440 09:47:05.071576 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1441 09:47:05.075086 I2C: 00:10
1442 09:47:05.075205 PCI: 00:15.2
1443 09:47:05.084695 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1444 09:47:05.088634 PCI: 00:15.3
1445 09:47:05.098085 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1446 09:47:05.098227 PCI: 00:16.0
1447 09:47:05.107973 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1448 09:47:05.111414 PCI: 00:19.0
1449 09:47:05.114780 PCI: 00:19.1 child on link 0 I2C: 00:15
1450 09:47:05.124733 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1451 09:47:05.128065 I2C: 00:15
1452 09:47:05.131328 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1453 09:47:05.141318 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1454 09:47:05.151253 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1455 09:47:05.164605 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1456 09:47:05.164709 GENERIC: 0.0
1457 09:47:05.167768 PCI: 01:00.0
1458 09:47:05.177756 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1459 09:47:05.187544 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1460 09:47:05.187647 PCI: 00:1e.0
1461 09:47:05.200931 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1462 09:47:05.204365 PCI: 00:1e.2 child on link 0 SPI: 00
1463 09:47:05.214331 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1464 09:47:05.217684 SPI: 00
1465 09:47:05.220416 PCI: 00:1e.3 child on link 0 SPI: 00
1466 09:47:05.230811 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1467 09:47:05.230908 SPI: 00
1468 09:47:05.237165 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1469 09:47:05.243789 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1470 09:47:05.247037 PNP: 0c09.0
1471 09:47:05.253961 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1472 09:47:05.260383 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1473 09:47:05.270100 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1474 09:47:05.277135 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1475 09:47:05.283720 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1476 09:47:05.283823 GENERIC: 0.0
1477 09:47:05.286940 GENERIC: 1.0
1478 09:47:05.287030 PCI: 00:1f.3
1479 09:47:05.300145 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1480 09:47:05.310304 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1481 09:47:05.310395 PCI: 00:1f.5
1482 09:47:05.319743 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1483 09:47:05.326412 CPU_CLUSTER: 0 child on link 0 APIC: 00
1484 09:47:05.326510 APIC: 00
1485 09:47:05.326580 APIC: 01
1486 09:47:05.329726 APIC: 07
1487 09:47:05.329813 APIC: 03
1488 09:47:05.333096 APIC: 04
1489 09:47:05.333184 APIC: 06
1490 09:47:05.333261 APIC: 02
1491 09:47:05.336492 APIC: 05
1492 09:47:05.336580 Done allocating resources.
1493 09:47:05.343191 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1494 09:47:05.349543 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1495 09:47:05.352848 Configure GPIOs for I2S audio on UP4.
1496 09:47:05.360664 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1497 09:47:05.364087 Enabling resources...
1498 09:47:05.367354 PCI: 00:00.0 subsystem <- 8086/9a12
1499 09:47:05.370679 PCI: 00:00.0 cmd <- 06
1500 09:47:05.373297 PCI: 00:02.0 subsystem <- 8086/9a40
1501 09:47:05.376599 PCI: 00:02.0 cmd <- 03
1502 09:47:05.379918 PCI: 00:04.0 subsystem <- 8086/9a03
1503 09:47:05.383316 PCI: 00:04.0 cmd <- 02
1504 09:47:05.386619 PCI: 00:05.0 subsystem <- 8086/9a19
1505 09:47:05.386739 PCI: 00:05.0 cmd <- 02
1506 09:47:05.393340 PCI: 00:08.0 subsystem <- 8086/9a11
1507 09:47:05.393463 PCI: 00:08.0 cmd <- 06
1508 09:47:05.396675 PCI: 00:0d.0 subsystem <- 8086/9a13
1509 09:47:05.399998 PCI: 00:0d.0 cmd <- 02
1510 09:47:05.403311 PCI: 00:14.0 subsystem <- 8086/a0ed
1511 09:47:05.406773 PCI: 00:14.0 cmd <- 02
1512 09:47:05.410115 PCI: 00:14.2 subsystem <- 8086/a0ef
1513 09:47:05.413508 PCI: 00:14.2 cmd <- 02
1514 09:47:05.416764 PCI: 00:14.3 subsystem <- 8086/a0f0
1515 09:47:05.419457 PCI: 00:14.3 cmd <- 02
1516 09:47:05.422776 PCI: 00:15.0 subsystem <- 8086/a0e8
1517 09:47:05.426196 PCI: 00:15.0 cmd <- 02
1518 09:47:05.429421 PCI: 00:15.1 subsystem <- 8086/a0e9
1519 09:47:05.432699 PCI: 00:15.1 cmd <- 02
1520 09:47:05.436039 PCI: 00:15.2 subsystem <- 8086/a0ea
1521 09:47:05.439345 PCI: 00:15.2 cmd <- 02
1522 09:47:05.442797 PCI: 00:15.3 subsystem <- 8086/a0eb
1523 09:47:05.442888 PCI: 00:15.3 cmd <- 02
1524 09:47:05.449546 PCI: 00:16.0 subsystem <- 8086/a0e0
1525 09:47:05.449637 PCI: 00:16.0 cmd <- 02
1526 09:47:05.452810 PCI: 00:19.1 subsystem <- 8086/a0c6
1527 09:47:05.456191 PCI: 00:19.1 cmd <- 02
1528 09:47:05.459457 PCI: 00:1d.0 bridge ctrl <- 0013
1529 09:47:05.462806 PCI: 00:1d.0 subsystem <- 8086/a0b0
1530 09:47:05.465930 PCI: 00:1d.0 cmd <- 06
1531 09:47:05.469251 PCI: 00:1e.0 subsystem <- 8086/a0a8
1532 09:47:05.472446 PCI: 00:1e.0 cmd <- 06
1533 09:47:05.475641 PCI: 00:1e.2 subsystem <- 8086/a0aa
1534 09:47:05.478956 PCI: 00:1e.2 cmd <- 06
1535 09:47:05.482246 PCI: 00:1e.3 subsystem <- 8086/a0ab
1536 09:47:05.485521 PCI: 00:1e.3 cmd <- 02
1537 09:47:05.488873 PCI: 00:1f.0 subsystem <- 8086/a087
1538 09:47:05.492328 PCI: 00:1f.0 cmd <- 407
1539 09:47:05.495672 PCI: 00:1f.3 subsystem <- 8086/a0c8
1540 09:47:05.495799 PCI: 00:1f.3 cmd <- 02
1541 09:47:05.502206 PCI: 00:1f.5 subsystem <- 8086/a0a4
1542 09:47:05.502330 PCI: 00:1f.5 cmd <- 406
1543 09:47:05.507365 PCI: 01:00.0 cmd <- 02
1544 09:47:05.512083 done.
1545 09:47:05.515571 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1546 09:47:05.518951 Initializing devices...
1547 09:47:05.521534 Root Device init
1548 09:47:05.524868 Chrome EC: Set SMI mask to 0x0000000000000000
1549 09:47:05.531995 Chrome EC: clear events_b mask to 0x0000000000000000
1550 09:47:05.538631 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1551 09:47:05.541889 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1552 09:47:05.548877 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1553 09:47:05.555407 Chrome EC: Set WAKE mask to 0x0000000000000000
1554 09:47:05.558751 fw_config match found: DB_USB=USB3_ACTIVE
1555 09:47:05.565339 Configure Right Type-C port orientation for retimer
1556 09:47:05.568584 Root Device init finished in 43 msecs
1557 09:47:05.571799 PCI: 00:00.0 init
1558 09:47:05.574943 CPU TDP = 9 Watts
1559 09:47:05.575030 CPU PL1 = 9 Watts
1560 09:47:05.578171 CPU PL2 = 40 Watts
1561 09:47:05.578262 CPU PL4 = 83 Watts
1562 09:47:05.584824 PCI: 00:00.0 init finished in 8 msecs
1563 09:47:05.584931 PCI: 00:02.0 init
1564 09:47:05.588573 GMA: Found VBT in CBFS
1565 09:47:05.591986 GMA: Found valid VBT in CBFS
1566 09:47:05.598665 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1567 09:47:05.604691 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1568 09:47:05.608007 PCI: 00:02.0 init finished in 18 msecs
1569 09:47:05.611297 PCI: 00:05.0 init
1570 09:47:05.614698 PCI: 00:05.0 init finished in 0 msecs
1571 09:47:05.618041 PCI: 00:08.0 init
1572 09:47:05.621311 PCI: 00:08.0 init finished in 0 msecs
1573 09:47:05.624696 PCI: 00:14.0 init
1574 09:47:05.628170 PCI: 00:14.0 init finished in 0 msecs
1575 09:47:05.628259 PCI: 00:14.2 init
1576 09:47:05.634777 PCI: 00:14.2 init finished in 0 msecs
1577 09:47:05.634866 PCI: 00:15.0 init
1578 09:47:05.638022 I2C bus 0 version 0x3230302a
1579 09:47:05.641238 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1580 09:47:05.648009 PCI: 00:15.0 init finished in 6 msecs
1581 09:47:05.648133 PCI: 00:15.1 init
1582 09:47:05.651284 I2C bus 1 version 0x3230302a
1583 09:47:05.654570 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1584 09:47:05.657900 PCI: 00:15.1 init finished in 6 msecs
1585 09:47:05.661223 PCI: 00:15.2 init
1586 09:47:05.664383 I2C bus 2 version 0x3230302a
1587 09:47:05.667635 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1588 09:47:05.671028 PCI: 00:15.2 init finished in 6 msecs
1589 09:47:05.674338 PCI: 00:15.3 init
1590 09:47:05.677746 I2C bus 3 version 0x3230302a
1591 09:47:05.680987 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1592 09:47:05.684160 PCI: 00:15.3 init finished in 6 msecs
1593 09:47:05.687582 PCI: 00:16.0 init
1594 09:47:05.690738 PCI: 00:16.0 init finished in 0 msecs
1595 09:47:05.694123 PCI: 00:19.1 init
1596 09:47:05.694262 I2C bus 5 version 0x3230302a
1597 09:47:05.700791 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1598 09:47:05.704055 PCI: 00:19.1 init finished in 6 msecs
1599 09:47:05.704179 PCI: 00:1d.0 init
1600 09:47:05.707374 Initializing PCH PCIe bridge.
1601 09:47:05.710773 PCI: 00:1d.0 init finished in 3 msecs
1602 09:47:05.714812 PCI: 00:1f.0 init
1603 09:47:05.718111 IOAPIC: Initializing IOAPIC at 0xfec00000
1604 09:47:05.724974 IOAPIC: Bootstrap Processor Local APIC = 0x00
1605 09:47:05.725104 IOAPIC: ID = 0x02
1606 09:47:05.728297 IOAPIC: Dumping registers
1607 09:47:05.731668 reg 0x0000: 0x02000000
1608 09:47:05.735091 reg 0x0001: 0x00770020
1609 09:47:05.735201 reg 0x0002: 0x00000000
1610 09:47:05.741601 PCI: 00:1f.0 init finished in 21 msecs
1611 09:47:05.741693 PCI: 00:1f.2 init
1612 09:47:05.744941 Disabling ACPI via APMC.
1613 09:47:05.749535 APMC done.
1614 09:47:05.752725 PCI: 00:1f.2 init finished in 6 msecs
1615 09:47:05.764743 PCI: 01:00.0 init
1616 09:47:05.767391 PCI: 01:00.0 init finished in 0 msecs
1617 09:47:05.770749 PNP: 0c09.0 init
1618 09:47:05.774011 Google Chrome EC uptime: 8.291 seconds
1619 09:47:05.781082 Google Chrome AP resets since EC boot: 1
1620 09:47:05.784305 Google Chrome most recent AP reset causes:
1621 09:47:05.787564 0.455: 32775 shutdown: entering G3
1622 09:47:05.794323 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1623 09:47:05.797656 PNP: 0c09.0 init finished in 22 msecs
1624 09:47:05.802976 Devices initialized
1625 09:47:05.806326 Show all devs... After init.
1626 09:47:05.809643 Root Device: enabled 1
1627 09:47:05.809736 DOMAIN: 0000: enabled 1
1628 09:47:05.812867 CPU_CLUSTER: 0: enabled 1
1629 09:47:05.816721 PCI: 00:00.0: enabled 1
1630 09:47:05.820056 PCI: 00:02.0: enabled 1
1631 09:47:05.820144 PCI: 00:04.0: enabled 1
1632 09:47:05.823346 PCI: 00:05.0: enabled 1
1633 09:47:05.826699 PCI: 00:06.0: enabled 0
1634 09:47:05.830058 PCI: 00:07.0: enabled 0
1635 09:47:05.830147 PCI: 00:07.1: enabled 0
1636 09:47:05.832798 PCI: 00:07.2: enabled 0
1637 09:47:05.836083 PCI: 00:07.3: enabled 0
1638 09:47:05.839588 PCI: 00:08.0: enabled 1
1639 09:47:05.839676 PCI: 00:09.0: enabled 0
1640 09:47:05.842697 PCI: 00:0a.0: enabled 0
1641 09:47:05.846523 PCI: 00:0d.0: enabled 1
1642 09:47:05.849931 PCI: 00:0d.1: enabled 0
1643 09:47:05.850020 PCI: 00:0d.2: enabled 0
1644 09:47:05.853017 PCI: 00:0d.3: enabled 0
1645 09:47:05.856495 PCI: 00:0e.0: enabled 0
1646 09:47:05.856584 PCI: 00:10.2: enabled 1
1647 09:47:05.859667 PCI: 00:10.6: enabled 0
1648 09:47:05.863129 PCI: 00:10.7: enabled 0
1649 09:47:05.866561 PCI: 00:12.0: enabled 0
1650 09:47:05.866650 PCI: 00:12.6: enabled 0
1651 09:47:05.869224 PCI: 00:13.0: enabled 0
1652 09:47:05.872617 PCI: 00:14.0: enabled 1
1653 09:47:05.875886 PCI: 00:14.1: enabled 0
1654 09:47:05.875974 PCI: 00:14.2: enabled 1
1655 09:47:05.879109 PCI: 00:14.3: enabled 1
1656 09:47:05.882904 PCI: 00:15.0: enabled 1
1657 09:47:05.886161 PCI: 00:15.1: enabled 1
1658 09:47:05.886252 PCI: 00:15.2: enabled 1
1659 09:47:05.889538 PCI: 00:15.3: enabled 1
1660 09:47:05.892954 PCI: 00:16.0: enabled 1
1661 09:47:05.895677 PCI: 00:16.1: enabled 0
1662 09:47:05.895776 PCI: 00:16.2: enabled 0
1663 09:47:05.899009 PCI: 00:16.3: enabled 0
1664 09:47:05.902322 PCI: 00:16.4: enabled 0
1665 09:47:05.902420 PCI: 00:16.5: enabled 0
1666 09:47:05.905670 PCI: 00:17.0: enabled 0
1667 09:47:05.909628 PCI: 00:19.0: enabled 0
1668 09:47:05.912338 PCI: 00:19.1: enabled 1
1669 09:47:05.912427 PCI: 00:19.2: enabled 0
1670 09:47:05.915722 PCI: 00:1c.0: enabled 1
1671 09:47:05.918950 PCI: 00:1c.1: enabled 0
1672 09:47:05.922179 PCI: 00:1c.2: enabled 0
1673 09:47:05.922267 PCI: 00:1c.3: enabled 0
1674 09:47:05.925680 PCI: 00:1c.4: enabled 0
1675 09:47:05.929084 PCI: 00:1c.5: enabled 0
1676 09:47:05.932337 PCI: 00:1c.6: enabled 1
1677 09:47:05.932425 PCI: 00:1c.7: enabled 0
1678 09:47:05.935677 PCI: 00:1d.0: enabled 1
1679 09:47:05.939005 PCI: 00:1d.1: enabled 0
1680 09:47:05.939093 PCI: 00:1d.2: enabled 1
1681 09:47:05.942318 PCI: 00:1d.3: enabled 0
1682 09:47:05.945658 PCI: 00:1e.0: enabled 1
1683 09:47:05.948955 PCI: 00:1e.1: enabled 0
1684 09:47:05.949044 PCI: 00:1e.2: enabled 1
1685 09:47:05.952303 PCI: 00:1e.3: enabled 1
1686 09:47:05.955408 PCI: 00:1f.0: enabled 1
1687 09:47:05.958732 PCI: 00:1f.1: enabled 0
1688 09:47:05.958821 PCI: 00:1f.2: enabled 1
1689 09:47:05.962023 PCI: 00:1f.3: enabled 1
1690 09:47:05.965943 PCI: 00:1f.4: enabled 0
1691 09:47:05.969010 PCI: 00:1f.5: enabled 1
1692 09:47:05.969099 PCI: 00:1f.6: enabled 0
1693 09:47:05.972351 PCI: 00:1f.7: enabled 0
1694 09:47:05.975691 APIC: 00: enabled 1
1695 09:47:05.975780 GENERIC: 0.0: enabled 1
1696 09:47:05.978928 GENERIC: 0.0: enabled 1
1697 09:47:05.982271 GENERIC: 1.0: enabled 1
1698 09:47:05.985492 GENERIC: 0.0: enabled 1
1699 09:47:05.985579 GENERIC: 1.0: enabled 1
1700 09:47:05.988730 USB0 port 0: enabled 1
1701 09:47:05.991975 GENERIC: 0.0: enabled 1
1702 09:47:05.992064 USB0 port 0: enabled 1
1703 09:47:05.995360 GENERIC: 0.0: enabled 1
1704 09:47:05.998668 I2C: 00:1a: enabled 1
1705 09:47:06.002041 I2C: 00:31: enabled 1
1706 09:47:06.002156 I2C: 00:32: enabled 1
1707 09:47:06.005153 I2C: 00:10: enabled 1
1708 09:47:06.008593 I2C: 00:15: enabled 1
1709 09:47:06.008683 GENERIC: 0.0: enabled 0
1710 09:47:06.011826 GENERIC: 1.0: enabled 0
1711 09:47:06.015338 GENERIC: 0.0: enabled 1
1712 09:47:06.015425 SPI: 00: enabled 1
1713 09:47:06.018617 SPI: 00: enabled 1
1714 09:47:06.021845 PNP: 0c09.0: enabled 1
1715 09:47:06.021962 GENERIC: 0.0: enabled 1
1716 09:47:06.025213 USB3 port 0: enabled 1
1717 09:47:06.028506 USB3 port 1: enabled 1
1718 09:47:06.031923 USB3 port 2: enabled 0
1719 09:47:06.032047 USB3 port 3: enabled 0
1720 09:47:06.035176 USB2 port 0: enabled 0
1721 09:47:06.038481 USB2 port 1: enabled 1
1722 09:47:06.038599 USB2 port 2: enabled 1
1723 09:47:06.041841 USB2 port 3: enabled 0
1724 09:47:06.045046 USB2 port 4: enabled 1
1725 09:47:06.048383 USB2 port 5: enabled 0
1726 09:47:06.048496 USB2 port 6: enabled 0
1727 09:47:06.051696 USB2 port 7: enabled 0
1728 09:47:06.054885 USB2 port 8: enabled 0
1729 09:47:06.055000 USB2 port 9: enabled 0
1730 09:47:06.058796 USB3 port 0: enabled 0
1731 09:47:06.062077 USB3 port 1: enabled 1
1732 09:47:06.062197 USB3 port 2: enabled 0
1733 09:47:06.065279 USB3 port 3: enabled 0
1734 09:47:06.068614 GENERIC: 0.0: enabled 1
1735 09:47:06.071857 GENERIC: 1.0: enabled 1
1736 09:47:06.071973 APIC: 01: enabled 1
1737 09:47:06.075186 APIC: 07: enabled 1
1738 09:47:06.078623 APIC: 03: enabled 1
1739 09:47:06.078743 APIC: 04: enabled 1
1740 09:47:06.081733 APIC: 06: enabled 1
1741 09:47:06.081864 APIC: 02: enabled 1
1742 09:47:06.084916 APIC: 05: enabled 1
1743 09:47:06.088267 PCI: 01:00.0: enabled 1
1744 09:47:06.091508 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1745 09:47:06.098094 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1746 09:47:06.101378 ELOG: NV offset 0xf30000 size 0x1000
1747 09:47:06.108622 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1748 09:47:06.114590 ELOG: Event(17) added with size 13 at 2022-08-12 08:28:14 UTC
1749 09:47:06.121285 ELOG: Event(92) added with size 9 at 2022-08-12 08:28:14 UTC
1750 09:47:06.128054 ELOG: Event(93) added with size 9 at 2022-08-12 08:28:14 UTC
1751 09:47:06.134868 ELOG: Event(9E) added with size 10 at 2022-08-12 08:28:14 UTC
1752 09:47:06.141411 ELOG: Event(9F) added with size 14 at 2022-08-12 08:28:14 UTC
1753 09:47:06.148052 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1754 09:47:06.154591 ELOG: Event(A1) added with size 10 at 2022-08-12 08:28:14 UTC
1755 09:47:06.161096 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1756 09:47:06.167695 ELOG: Event(A0) added with size 9 at 2022-08-12 08:28:14 UTC
1757 09:47:06.171000 elog_add_boot_reason: Logged dev mode boot
1758 09:47:06.177596 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1759 09:47:06.177718 Finalize devices...
1760 09:47:06.180951 Devices finalized
1761 09:47:06.187476 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1762 09:47:06.190667 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1763 09:47:06.197808 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1764 09:47:06.201119 ME: HFSTS1 : 0x80030055
1765 09:47:06.207490 ME: HFSTS2 : 0x30280116
1766 09:47:06.210953 ME: HFSTS3 : 0x00000050
1767 09:47:06.214102 ME: HFSTS4 : 0x00004000
1768 09:47:06.220838 ME: HFSTS5 : 0x00000000
1769 09:47:06.224165 ME: HFSTS6 : 0x40400006
1770 09:47:06.227417 ME: Manufacturing Mode : YES
1771 09:47:06.230708 ME: SPI Protection Mode Enabled : NO
1772 09:47:06.233995 ME: FW Partition Table : OK
1773 09:47:06.241009 ME: Bringup Loader Failure : NO
1774 09:47:06.243986 ME: Firmware Init Complete : NO
1775 09:47:06.247346 ME: Boot Options Present : NO
1776 09:47:06.250630 ME: Update In Progress : NO
1777 09:47:06.254057 ME: D0i3 Support : YES
1778 09:47:06.257199 ME: Low Power State Enabled : NO
1779 09:47:06.260481 ME: CPU Replaced : YES
1780 09:47:06.267210 ME: CPU Replacement Valid : YES
1781 09:47:06.270503 ME: Current Working State : 5
1782 09:47:06.273619 ME: Current Operation State : 1
1783 09:47:06.277001 ME: Current Operation Mode : 3
1784 09:47:06.280370 ME: Error Code : 0
1785 09:47:06.283657 ME: Enhanced Debug Mode : NO
1786 09:47:06.286813 ME: CPU Debug Disabled : YES
1787 09:47:06.290022 ME: TXT Support : NO
1788 09:47:06.296676 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1789 09:47:06.303082 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1790 09:47:06.306432 CBFS: 'fallback/slic' not found.
1791 09:47:06.313660 ACPI: Writing ACPI tables at 76b01000.
1792 09:47:06.313754 ACPI: * FACS
1793 09:47:06.316904 ACPI: * DSDT
1794 09:47:06.320321 Ramoops buffer: 0x100000@0x76a00000.
1795 09:47:06.323605 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1796 09:47:06.329741 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1797 09:47:06.333664 Google Chrome EC: version:
1798 09:47:06.336188 ro: voema_v2.0.10114-a447f03e46
1799 09:47:06.340141 rw: voema_v2.0.10114-a447f03e46
1800 09:47:06.340251 running image: 2
1801 09:47:06.346138 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1802 09:47:06.350785 ACPI: * FADT
1803 09:47:06.350877 SCI is IRQ9
1804 09:47:06.358011 ACPI: added table 1/32, length now 40
1805 09:47:06.358099 ACPI: * SSDT
1806 09:47:06.361089 Found 1 CPU(s) with 8 core(s) each.
1807 09:47:06.367777 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1808 09:47:06.371074 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1809 09:47:06.374389 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1810 09:47:06.377655 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1811 09:47:06.384260 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1812 09:47:06.390886 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1813 09:47:06.394298 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1814 09:47:06.400617 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1815 09:47:06.407203 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1816 09:47:06.410655 \_SB.PCI0.RP09: Added StorageD3Enable property
1817 09:47:06.417088 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1818 09:47:06.420346 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1819 09:47:06.427067 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1820 09:47:06.430400 PS2K: Passing 80 keymaps to kernel
1821 09:47:06.436994 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1822 09:47:06.443715 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1823 09:47:06.450574 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1824 09:47:06.457008 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1825 09:47:06.463609 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1826 09:47:06.470061 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1827 09:47:06.476828 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1828 09:47:06.483412 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1829 09:47:06.486683 ACPI: added table 2/32, length now 44
1830 09:47:06.486773 ACPI: * MCFG
1831 09:47:06.490015 ACPI: added table 3/32, length now 48
1832 09:47:06.493282 ACPI: * TPM2
1833 09:47:06.496831 TPM2 log created at 0x769f0000
1834 09:47:06.499983 ACPI: added table 4/32, length now 52
1835 09:47:06.500072 ACPI: * MADT
1836 09:47:06.503331 SCI is IRQ9
1837 09:47:06.506705 ACPI: added table 5/32, length now 56
1838 09:47:06.510031 current = 76b09850
1839 09:47:06.510119 ACPI: * DMAR
1840 09:47:06.513289 ACPI: added table 6/32, length now 60
1841 09:47:06.516726 ACPI: added table 7/32, length now 64
1842 09:47:06.520046 ACPI: * HPET
1843 09:47:06.523280 ACPI: added table 8/32, length now 68
1844 09:47:06.523368 ACPI: done.
1845 09:47:06.526625 ACPI tables: 35216 bytes.
1846 09:47:06.529932 smbios_write_tables: 769ef000
1847 09:47:06.533242 EC returned error result code 3
1848 09:47:06.536629 Couldn't obtain OEM name from CBI
1849 09:47:06.540018 Create SMBIOS type 16
1850 09:47:06.543372 Create SMBIOS type 17
1851 09:47:06.546707 GENERIC: 0.0 (WIFI Device)
1852 09:47:06.546795 SMBIOS tables: 1734 bytes.
1853 09:47:06.553180 Writing table forward entry at 0x00000500
1854 09:47:06.559583 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1855 09:47:06.562947 Writing coreboot table at 0x76b25000
1856 09:47:06.569583 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1857 09:47:06.572924 1. 0000000000001000-000000000009ffff: RAM
1858 09:47:06.576023 2. 00000000000a0000-00000000000fffff: RESERVED
1859 09:47:06.582583 3. 0000000000100000-00000000769eefff: RAM
1860 09:47:06.585928 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1861 09:47:06.592523 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1862 09:47:06.599123 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1863 09:47:06.602950 7. 0000000077000000-000000007fbfffff: RESERVED
1864 09:47:06.606160 8. 00000000c0000000-00000000cfffffff: RESERVED
1865 09:47:06.612545 9. 00000000f8000000-00000000f9ffffff: RESERVED
1866 09:47:06.615788 10. 00000000fb000000-00000000fb000fff: RESERVED
1867 09:47:06.622410 11. 00000000fe000000-00000000fe00ffff: RESERVED
1868 09:47:06.625794 12. 00000000fed80000-00000000fed87fff: RESERVED
1869 09:47:06.632385 13. 00000000fed90000-00000000fed92fff: RESERVED
1870 09:47:06.635680 14. 00000000feda0000-00000000feda1fff: RESERVED
1871 09:47:06.642167 15. 00000000fedc0000-00000000feddffff: RESERVED
1872 09:47:06.645565 16. 0000000100000000-00000004803fffff: RAM
1873 09:47:06.649086 Passing 4 GPIOs to payload:
1874 09:47:06.652304 NAME | PORT | POLARITY | VALUE
1875 09:47:06.658844 lid | undefined | high | high
1876 09:47:06.662032 power | undefined | high | low
1877 09:47:06.669337 oprom | undefined | high | low
1878 09:47:06.676055 EC in RW | 0x000000e5 | high | high
1879 09:47:06.682498 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1880 09:47:06.682592 coreboot table: 1576 bytes.
1881 09:47:06.688516 IMD ROOT 0. 0x76fff000 0x00001000
1882 09:47:06.691799 IMD SMALL 1. 0x76ffe000 0x00001000
1883 09:47:06.695142 FSP MEMORY 2. 0x76c4e000 0x003b0000
1884 09:47:06.698351 VPD 3. 0x76c4d000 0x00000367
1885 09:47:06.702413 RO MCACHE 4. 0x76c4c000 0x00000fdc
1886 09:47:06.705649 CONSOLE 5. 0x76c2c000 0x00020000
1887 09:47:06.708964 FMAP 6. 0x76c2b000 0x00000578
1888 09:47:06.712335 TIME STAMP 7. 0x76c2a000 0x00000910
1889 09:47:06.718819 VBOOT WORK 8. 0x76c16000 0x00014000
1890 09:47:06.721555 ROMSTG STCK 9. 0x76c15000 0x00001000
1891 09:47:06.725042 AFTER CAR 10. 0x76c0a000 0x0000b000
1892 09:47:06.728436 RAMSTAGE 11. 0x76b97000 0x00073000
1893 09:47:06.731789 REFCODE 12. 0x76b42000 0x00055000
1894 09:47:06.734917 SMM BACKUP 13. 0x76b32000 0x00010000
1895 09:47:06.738269 4f444749 14. 0x76b30000 0x00002000
1896 09:47:06.741667 EXT VBT15. 0x76b2d000 0x0000219f
1897 09:47:06.744953 COREBOOT 16. 0x76b25000 0x00008000
1898 09:47:06.751673 ACPI 17. 0x76b01000 0x00024000
1899 09:47:06.754981 ACPI GNVS 18. 0x76b00000 0x00001000
1900 09:47:06.758418 RAMOOPS 19. 0x76a00000 0x00100000
1901 09:47:06.761597 TPM2 TCGLOG20. 0x769f0000 0x00010000
1902 09:47:06.764973 SMBIOS 21. 0x769ef000 0x00000800
1903 09:47:06.768689 IMD small region:
1904 09:47:06.771239 IMD ROOT 0. 0x76ffec00 0x00000400
1905 09:47:06.775060 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1906 09:47:06.778321 POWER STATE 2. 0x76ffeb80 0x00000044
1907 09:47:06.781411 ROMSTAGE 3. 0x76ffeb60 0x00000004
1908 09:47:06.788039 MEM INFO 4. 0x76ffe980 0x000001e0
1909 09:47:06.791318 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1910 09:47:06.794601 MTRR: Physical address space:
1911 09:47:06.801772 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1912 09:47:06.808342 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1913 09:47:06.814835 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1914 09:47:06.821348 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1915 09:47:06.827899 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1916 09:47:06.834625 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1917 09:47:06.838001 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1918 09:47:06.844686 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 09:47:06.848055 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 09:47:06.851317 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 09:47:06.854663 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 09:47:06.861166 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 09:47:06.864580 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 09:47:06.867782 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 09:47:06.871201 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 09:47:06.877827 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 09:47:06.880975 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 09:47:06.884243 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 09:47:06.888063 call enable_fixed_mtrr()
1930 09:47:06.891356 CPU physical address size: 39 bits
1931 09:47:06.897990 MTRR: default type WB/UC MTRR counts: 6/7.
1932 09:47:06.901313 MTRR: WB selected as default type.
1933 09:47:06.907776 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1934 09:47:06.910986 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1935 09:47:06.918153 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1936 09:47:06.924791 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1937 09:47:06.931429 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1938 09:47:06.937972 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1939 09:47:06.944654 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 09:47:06.948006 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 09:47:06.951269 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 09:47:06.954637 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 09:47:06.961296 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 09:47:06.964528 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 09:47:06.967770 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 09:47:06.971012 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 09:47:06.977791 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 09:47:06.981042 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 09:47:06.984272 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 09:47:06.984362
1951 09:47:06.988176 MTRR check
1952 09:47:06.992054 call enable_fixed_mtrr()
1953 09:47:06.992141 Fixed MTRRs : Enabled
1954 09:47:06.995380 Variable MTRRs: Enabled
1955 09:47:06.995473
1956 09:47:06.998713 CPU physical address size: 39 bits
1957 09:47:07.006294 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
1958 09:47:07.009681 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 09:47:07.016210 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 09:47:07.019554 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 09:47:07.022745 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 09:47:07.026185 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 09:47:07.032955 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 09:47:07.036286 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 09:47:07.039007 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 09:47:07.042403 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 09:47:07.049070 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 09:47:07.052402 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 09:47:07.055749 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 09:47:07.063122 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 09:47:07.063215 call enable_fixed_mtrr()
1972 09:47:07.069514 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 09:47:07.072887 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 09:47:07.076223 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 09:47:07.079420 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 09:47:07.085863 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 09:47:07.089726 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 09:47:07.092941 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 09:47:07.096319 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 09:47:07.102926 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 09:47:07.106290 CPU physical address size: 39 bits
1982 09:47:07.110076 call enable_fixed_mtrr()
1983 09:47:07.113240 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 09:47:07.120381 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 09:47:07.123618 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 09:47:07.126999 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 09:47:07.130142 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 09:47:07.136905 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 09:47:07.140083 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 09:47:07.143553 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 09:47:07.146969 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 09:47:07.153119 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 09:47:07.156590 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 09:47:07.159791 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 09:47:07.167163 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 09:47:07.170573 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 09:47:07.173848 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 09:47:07.177172 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 09:47:07.183671 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 09:47:07.186971 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 09:47:07.190157 MTRR: Fixed MSR 0x26c 0x0606060606060606
2002 09:47:07.193414 MTRR: Fixed MSR 0x26d 0x0606060606060606
2003 09:47:07.199995 MTRR: Fixed MSR 0x26e 0x0606060606060606
2004 09:47:07.203290 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 09:47:07.206573 call enable_fixed_mtrr()
2006 09:47:07.209887 call enable_fixed_mtrr()
2007 09:47:07.213094 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 09:47:07.216334 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 09:47:07.222937 MTRR: Fixed MSR 0x258 0x0606060606060606
2010 09:47:07.226398 MTRR: Fixed MSR 0x259 0x0000000000000000
2011 09:47:07.229691 MTRR: Fixed MSR 0x268 0x0606060606060606
2012 09:47:07.233009 MTRR: Fixed MSR 0x269 0x0606060606060606
2013 09:47:07.236342 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 09:47:07.242921 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 09:47:07.246400 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 09:47:07.249721 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 09:47:07.252968 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 09:47:07.259643 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 09:47:07.262887 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 09:47:07.266203 call enable_fixed_mtrr()
2021 09:47:07.269391 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 09:47:07.276061 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 09:47:07.279300 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 09:47:07.282672 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 09:47:07.286003 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 09:47:07.292638 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 09:47:07.295889 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 09:47:07.299755 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 09:47:07.302421 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 09:47:07.307699 CPU physical address size: 39 bits
2031 09:47:07.314043 call enable_fixed_mtrr()
2032 09:47:07.317325 CPU physical address size: 39 bits
2033 09:47:07.320599 CPU physical address size: 39 bits
2034 09:47:07.324583 CPU physical address size: 39 bits
2035 09:47:07.331814 Checking cr50 for pending updates
2036 09:47:07.331940 CPU physical address size: 39 bits
2037 09:47:07.336495 Reading cr50 TPM mode
2038 09:47:07.346391 BS: BS_PAYLOAD_LOAD entry times (exec / console): 328 / 6 ms
2039 09:47:07.356349 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2040 09:47:07.359665 Checking segment from ROM address 0xffc02b38
2041 09:47:07.362990 Checking segment from ROM address 0xffc02b54
2042 09:47:07.369725 Loading segment from ROM address 0xffc02b38
2043 09:47:07.369847 code (compression=0)
2044 09:47:07.379695 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2045 09:47:07.389416 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2046 09:47:07.389547 it's not compressed!
2047 09:47:07.530591 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2048 09:47:07.537041 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2049 09:47:07.543658 Loading segment from ROM address 0xffc02b54
2050 09:47:07.547080 Entry Point 0x30000000
2051 09:47:07.547192 Loaded segments
2052 09:47:07.553626 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2053 09:47:07.598604 Finalizing chipset.
2054 09:47:07.601793 Finalizing SMM.
2055 09:47:07.601913 APMC done.
2056 09:47:07.608421 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2057 09:47:07.611740 mp_park_aps done after 0 msecs.
2058 09:47:07.614977 Jumping to boot code at 0x30000000(0x76b25000)
2059 09:47:07.625429 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2060 09:47:07.625571
2061 09:47:07.628522 Starting depthcharge on Voema...
2062 09:47:07.628971 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2063 09:47:07.629142 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2064 09:47:07.629288 Setting prompt string to ['volteer:']
2065 09:47:07.629426 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2066 09:47:07.638505 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2067 09:47:07.645066 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2068 09:47:07.651740 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2069 09:47:07.655097 Failed to find eMMC card reader
2070 09:47:07.655212 Wipe memory regions:
2071 09:47:07.661591 [0x00000000001000, 0x000000000a0000)
2072 09:47:07.664890 [0x00000000100000, 0x00000030000000)
2073 09:47:07.701888 [0x00000032662db0, 0x000000769ef000)
2074 09:47:07.753191 [0x00000100000000, 0x00000480400000)
2075 09:47:08.379827 ec_init: CrosEC protocol v3 supported (256, 256)
2076 09:47:08.810859 R8152: Initializing
2077 09:47:08.814139 Version 6 (ocp_data = 5c30)
2078 09:47:08.817545 R8152: Done initializing
2079 09:47:08.820629 Adding net device
2080 09:47:09.125434 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2081 09:47:09.125572
2082 09:47:09.128965 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2084 09:47:09.229712 volteer: tftpboot 192.168.201.1 7022949/tftp-deploy-r8ukbdbf/kernel/bzImage 7022949/tftp-deploy-r8ukbdbf/kernel/cmdline 7022949/tftp-deploy-r8ukbdbf/ramdisk/ramdisk.cpio.gz
2085 09:47:09.229900 Setting prompt string to 'Starting kernel'
2086 09:47:09.229990 Setting prompt string to ['Starting kernel']
2087 09:47:09.230079 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2088 09:47:09.230165 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
2089 09:47:09.234181 tftpboot 192.168.201.1 7022949/tftp-deploy-r8ukbdbf/kernel/bzImoy-r8ukbdbf/kernel/cmdline 7022949/tftp-deploy-r8ukbdbf/ramdisk/ramdisk.cpio.gz
2090 09:47:09.234273 Waiting for link
2091 09:47:09.437183 done.
2092 09:47:09.437334 MAC: 00:24:32:30:78:e4
2093 09:47:09.440516 Sending DHCP discover... done.
2094 09:47:09.443859 Waiting for reply... done.
2095 09:47:09.447190 Sending DHCP request... done.
2096 09:47:09.450550 Waiting for reply... done.
2097 09:47:09.453713 My ip is 192.168.201.24
2098 09:47:09.456905 The DHCP server ip is 192.168.201.1
2099 09:47:09.460363 TFTP server IP predefined by user: 192.168.201.1
2100 09:47:09.466835 Bootfile predefined by user: 7022949/tftp-deploy-r8ukbdbf/kernel/bzImage
2101 09:47:09.470201 Sending tftp read request... done.
2102 09:47:09.476588 Waiting for the transfer...
2103 09:47:09.954463 00000000 ################################################################
2104 09:47:10.432969 00080000 ################################################################
2105 09:47:10.907348 00100000 ################################################################
2106 09:47:11.388053 00180000 ################################################################
2107 09:47:11.864749 00200000 ################################################################
2108 09:47:12.345230 00280000 ################################################################
2109 09:47:12.827208 00300000 ################################################################
2110 09:47:13.306263 00380000 ################################################################
2111 09:47:13.785491 00400000 ################################################################
2112 09:47:14.267305 00480000 ################################################################
2113 09:47:14.752048 00500000 ################################################################
2114 09:47:15.237747 00580000 ################################################################
2115 09:47:15.722585 00600000 ################################################################ done.
2116 09:47:15.725987 The bootfile was 6815632 bytes long.
2117 09:47:15.728789 Sending tftp read request... done.
2118 09:47:15.732265 Waiting for the transfer...
2119 09:47:16.203989 00000000 ################################################################
2120 09:47:16.675531 00080000 ################################################################
2121 09:47:17.160593 00100000 ################################################################
2122 09:47:17.657935 00180000 ################################################################
2123 09:47:18.134044 00200000 ################################################################
2124 09:47:18.649605 00280000 ################################################################
2125 09:47:19.198842 00300000 ################################################################
2126 09:47:19.756579 00380000 ################################################################
2127 09:47:20.335579 00400000 ################################################################
2128 09:47:20.891993 00480000 ################################################################
2129 09:47:21.442723 00500000 ################################################################
2130 09:47:21.946566 00580000 ################################################################
2131 09:47:22.464631 00600000 ################################################################
2132 09:47:22.977990 00680000 ################################################################
2133 09:47:23.556213 00700000 ################################################################
2134 09:47:24.115494 00780000 ################################################################
2135 09:47:24.628615 00800000 ################################################################
2136 09:47:25.141899 00880000 ################################################################
2137 09:47:25.623647 00900000 ################################################################
2138 09:47:26.110001 00980000 ################################################################
2139 09:47:26.589358 00a00000 ################################################################
2140 09:47:27.070968 00a80000 ################################################################
2141 09:47:27.558159 00b00000 ################################################################
2142 09:47:28.030754 00b80000 ################################################################
2143 09:47:28.511852 00c00000 ################################################################
2144 09:47:28.983222 00c80000 ################################################################
2145 09:47:29.460658 00d00000 ################################################################
2146 09:47:29.928728 00d80000 ################################################################
2147 09:47:30.386547 00e00000 ################################################################
2148 09:47:30.861919 00e80000 ################################################################
2149 09:47:31.337271 00f00000 ################################################################
2150 09:47:31.804111 00f80000 ################################################################
2151 09:47:32.272535 01000000 ################################################################
2152 09:47:32.744223 01080000 ################################################################
2153 09:47:33.213138 01100000 ################################################################
2154 09:47:33.693585 01180000 ################################################################
2155 09:47:34.182508 01200000 ################################################################
2156 09:47:34.656813 01280000 ################################################################
2157 09:47:35.146773 01300000 ################################################################
2158 09:47:35.631313 01380000 ################################################################
2159 09:47:36.103250 01400000 ################################################################
2160 09:47:36.575762 01480000 ################################################################
2161 09:47:37.052651 01500000 ################################################################
2162 09:47:37.585117 01580000 ################################################################
2163 09:47:38.235949 01600000 ################################################################
2164 09:47:38.885954 01680000 ################################################################
2165 09:47:39.522440 01700000 ################################################################
2166 09:47:40.128695 01780000 ################################################################
2167 09:47:40.739553 01800000 ################################################################
2168 09:47:41.355954 01880000 ################################################################
2169 09:47:42.012461 01900000 ################################################################
2170 09:47:42.679863 01980000 ################################################################
2171 09:47:43.340943 01a00000 ################################################################
2172 09:47:43.988569 01a80000 ################################################################
2173 09:47:44.647058 01b00000 ################################################################
2174 09:47:45.307615 01b80000 ################################################################
2175 09:47:45.959697 01c00000 ################################################################
2176 09:47:46.590310 01c80000 ################################################################
2177 09:47:47.246817 01d00000 ################################################################
2178 09:47:47.819022 01d80000 ################################################################
2179 09:47:48.392166 01e00000 ################################################################
2180 09:47:48.950607 01e80000 ################################################################
2181 09:47:49.501940 01f00000 ################################################################
2182 09:47:50.130157 01f80000 ################################################################
2183 09:47:50.752111 02000000 ################################################################
2184 09:47:51.399116 02080000 ################################################################
2185 09:47:52.046578 02100000 ################################################################
2186 09:47:52.696061 02180000 ################################################################
2187 09:47:52.843623 02200000 ############### done.
2188 09:47:52.847022 Sending tftp read request... done.
2189 09:47:52.850329 Waiting for the transfer...
2190 09:47:52.850758 00000000 # done.
2191 09:47:52.860481 Command line loaded dynamically from TFTP file: 7022949/tftp-deploy-r8ukbdbf/kernel/cmdline
2192 09:47:52.873800 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2193 09:47:52.882135 Shutting down all USB controllers.
2194 09:47:52.882622 Removing current net device
2195 09:47:52.885343 Finalizing coreboot
2196 09:47:52.891846 Exiting depthcharge with code 4 at timestamp: 53841394
2197 09:47:52.892428
2198 09:47:52.892845 Starting kernel ...
2199 09:47:52.893206
2200 09:47:52.893657
2201 09:47:52.894732 end: 2.2.4 bootloader-commands (duration 00:00:45) [common]
2202 09:47:52.895294 start: 2.2.5 auto-login-action (timeout 00:03:59) [common]
2203 09:47:52.895717 Setting prompt string to ['Linux version [0-9]']
2204 09:47:52.896115 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2205 09:47:52.896678 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2207 09:51:51.896241 end: 2.2.5 auto-login-action (duration 00:03:59) [common]
2209 09:51:51.898268 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 239 seconds'
2211 09:51:51.899223 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2214 09:51:51.900713 end: 2 depthcharge-action (duration 00:05:00) [common]
2216 09:51:51.902171 Cleaning after the job
2217 09:51:51.902725 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022949/tftp-deploy-r8ukbdbf/ramdisk
2218 09:51:51.913879 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022949/tftp-deploy-r8ukbdbf/kernel
2219 09:51:51.916615 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022949/tftp-deploy-r8ukbdbf/modules
2220 09:51:51.917771 start: 4.1 power-off (timeout 00:00:30) [common]
2221 09:51:51.918633 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2222 09:51:51.945008 >> Command sent successfully.
2223 09:51:51.946846 Returned 0 in 0 seconds
2224 09:51:52.047645 end: 4.1 power-off (duration 00:00:00) [common]
2226 09:51:52.048001 start: 4.2 read-feedback (timeout 00:10:00) [common]
2227 09:51:52.048244 Listened to connection for namespace 'common' for up to 1s
2228 09:51:53.053224 Finalising connection for namespace 'common'
2229 09:51:53.053471 Disconnecting from shell: Finalise
2230 09:51:53.154266 end: 4.2 read-feedback (duration 00:00:01) [common]
2231 09:51:53.154504 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7022949
2232 09:51:53.191423 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7022949
2233 09:51:53.191643 JobError: Your job cannot terminate cleanly.