Boot log: asus-C436FA-Flip-hatch

    1 09:52:35.489415  lava-dispatcher, installed at version: 2022.06
    2 09:52:35.489599  start: 0 validate
    3 09:52:35.489724  Start time: 2022-08-12 09:52:35.489717+00:00 (UTC)
    4 09:52:35.489874  Using caching service: 'http://localhost/cache/?uri=%s'
    5 09:52:35.489997  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220805.0%2Famd64%2Finitrd.cpio.gz exists
    6 09:52:35.784001  Using caching service: 'http://localhost/cache/?uri=%s'
    7 09:52:35.784752  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 09:52:36.073505  Using caching service: 'http://localhost/cache/?uri=%s'
    9 09:52:36.074192  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220805.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 09:52:36.368035  Using caching service: 'http://localhost/cache/?uri=%s'
   11 09:52:36.368730  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 09:52:36.669314  validate duration: 1.18
   14 09:52:36.670684  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 09:52:36.671235  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 09:52:36.671729  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 09:52:36.672231  Not decompressing ramdisk as can be used compressed.
   18 09:52:36.672675  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220805.0/amd64/initrd.cpio.gz
   19 09:52:36.673061  saving as /var/lib/lava/dispatcher/tmp/7022998/tftp-deploy-tfm5a7wg/ramdisk/initrd.cpio.gz
   20 09:52:36.673404  total size: 5411035 (5MB)
   21 09:52:36.678727  progress   0% (0MB)
   22 09:52:36.687055  progress   5% (0MB)
   23 09:52:36.694550  progress  10% (0MB)
   24 09:52:36.699655  progress  15% (0MB)
   25 09:52:36.703980  progress  20% (1MB)
   26 09:52:36.707092  progress  25% (1MB)
   27 09:52:36.709952  progress  30% (1MB)
   28 09:52:36.712418  progress  35% (1MB)
   29 09:52:36.715038  progress  40% (2MB)
   30 09:52:36.717138  progress  45% (2MB)
   31 09:52:36.719240  progress  50% (2MB)
   32 09:52:36.721080  progress  55% (2MB)
   33 09:52:36.723131  progress  60% (3MB)
   34 09:52:36.724887  progress  65% (3MB)
   35 09:52:36.726534  progress  70% (3MB)
   36 09:52:36.728226  progress  75% (3MB)
   37 09:52:36.729995  progress  80% (4MB)
   38 09:52:36.731463  progress  85% (4MB)
   39 09:52:36.732935  progress  90% (4MB)
   40 09:52:36.734455  progress  95% (4MB)
   41 09:52:36.735968  progress 100% (5MB)
   42 09:52:36.736150  5MB downloaded in 0.06s (82.24MB/s)
   43 09:52:36.736308  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 09:52:36.736560  end: 1.1 download-retry (duration 00:00:00) [common]
   46 09:52:36.736652  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 09:52:36.736739  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 09:52:36.736846  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 09:52:36.736915  saving as /var/lib/lava/dispatcher/tmp/7022998/tftp-deploy-tfm5a7wg/kernel/bzImage
   50 09:52:36.736987  total size: 6815632 (6MB)
   51 09:52:36.737051  No compression specified
   52 09:52:36.738151  progress   0% (0MB)
   53 09:52:36.739909  progress   5% (0MB)
   54 09:52:36.741580  progress  10% (0MB)
   55 09:52:36.743306  progress  15% (1MB)
   56 09:52:36.744883  progress  20% (1MB)
   57 09:52:36.746497  progress  25% (1MB)
   58 09:52:36.748219  progress  30% (1MB)
   59 09:52:36.749820  progress  35% (2MB)
   60 09:52:36.751514  progress  40% (2MB)
   61 09:52:36.753097  progress  45% (2MB)
   62 09:52:36.754647  progress  50% (3MB)
   63 09:52:36.756388  progress  55% (3MB)
   64 09:52:36.758000  progress  60% (3MB)
   65 09:52:36.759689  progress  65% (4MB)
   66 09:52:36.761299  progress  70% (4MB)
   67 09:52:36.762894  progress  75% (4MB)
   68 09:52:36.764615  progress  80% (5MB)
   69 09:52:36.766192  progress  85% (5MB)
   70 09:52:36.767915  progress  90% (5MB)
   71 09:52:36.769496  progress  95% (6MB)
   72 09:52:36.771086  progress 100% (6MB)
   73 09:52:36.771355  6MB downloaded in 0.03s (189.15MB/s)
   74 09:52:36.771496  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 09:52:36.771729  end: 1.2 download-retry (duration 00:00:00) [common]
   77 09:52:36.771817  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 09:52:36.771902  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 09:52:36.772005  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220805.0/amd64/full.rootfs.tar.xz
   80 09:52:36.772071  saving as /var/lib/lava/dispatcher/tmp/7022998/tftp-deploy-tfm5a7wg/nfsrootfs/full.rootfs.tar
   81 09:52:36.772130  total size: 207096212 (197MB)
   82 09:52:36.772189  Using unxz to decompress xz
   83 09:52:36.775416  progress   0% (0MB)
   84 09:52:37.328491  progress   5% (9MB)
   85 09:52:37.854728  progress  10% (19MB)
   86 09:52:38.439123  progress  15% (29MB)
   87 09:52:38.790626  progress  20% (39MB)
   88 09:52:39.150550  progress  25% (49MB)
   89 09:52:39.738338  progress  30% (59MB)
   90 09:52:40.284244  progress  35% (69MB)
   91 09:52:40.875601  progress  40% (79MB)
   92 09:52:41.427325  progress  45% (88MB)
   93 09:52:41.999155  progress  50% (98MB)
   94 09:52:42.624608  progress  55% (108MB)
   95 09:52:43.300282  progress  60% (118MB)
   96 09:52:43.439352  progress  65% (128MB)
   97 09:52:43.592960  progress  70% (138MB)
   98 09:52:43.684506  progress  75% (148MB)
   99 09:52:43.758094  progress  80% (158MB)
  100 09:52:43.828189  progress  85% (167MB)
  101 09:52:43.930550  progress  90% (177MB)
  102 09:52:44.200290  progress  95% (187MB)
  103 09:52:44.787002  progress 100% (197MB)
  104 09:52:44.791802  197MB downloaded in 8.02s (24.63MB/s)
  105 09:52:44.792054  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 09:52:44.792318  end: 1.3 download-retry (duration 00:00:08) [common]
  108 09:52:44.792411  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 09:52:44.792499  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 09:52:44.792616  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 09:52:44.792687  saving as /var/lib/lava/dispatcher/tmp/7022998/tftp-deploy-tfm5a7wg/modules/modules.tar
  112 09:52:44.792749  total size: 51724 (0MB)
  113 09:52:44.792810  Using unxz to decompress xz
  114 09:52:44.795870  progress  63% (0MB)
  115 09:52:44.796246  progress 100% (0MB)
  116 09:52:44.799501  0MB downloaded in 0.01s (7.31MB/s)
  117 09:52:44.799715  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 09:52:44.799985  end: 1.4 download-retry (duration 00:00:00) [common]
  120 09:52:44.800110  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  121 09:52:44.800208  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  122 09:52:46.780117  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7022998/extract-nfsrootfs-y_sn568m
  123 09:52:46.780313  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 09:52:46.780420  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  125 09:52:46.780554  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf
  126 09:52:46.780654  makedir: /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin
  127 09:52:46.780737  makedir: /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/tests
  128 09:52:46.780819  makedir: /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/results
  129 09:52:46.780913  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-add-keys
  130 09:52:46.781055  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-add-sources
  131 09:52:46.781168  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-background-process-start
  132 09:52:46.781277  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-background-process-stop
  133 09:52:46.781386  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-common-functions
  134 09:52:46.781492  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-echo-ipv4
  135 09:52:46.781598  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-install-packages
  136 09:52:46.781705  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-installed-packages
  137 09:52:46.781812  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-os-build
  138 09:52:46.781917  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-probe-channel
  139 09:52:46.782023  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-probe-ip
  140 09:52:46.782129  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-target-ip
  141 09:52:46.782234  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-target-mac
  142 09:52:46.782338  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-target-storage
  143 09:52:46.782446  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-test-case
  144 09:52:46.782552  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-test-event
  145 09:52:46.782657  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-test-feedback
  146 09:52:46.782760  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-test-raise
  147 09:52:46.782864  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-test-reference
  148 09:52:46.782969  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-test-runner
  149 09:52:46.783074  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-test-set
  150 09:52:46.783177  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-test-shell
  151 09:52:46.783282  Updating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-add-keys (debian)
  152 09:52:46.783391  Updating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-add-sources (debian)
  153 09:52:46.783498  Updating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-install-packages (debian)
  154 09:52:46.783604  Updating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-installed-packages (debian)
  155 09:52:46.783709  Updating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/bin/lava-os-build (debian)
  156 09:52:46.783801  Creating /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/environment
  157 09:52:46.783882  LAVA metadata
  158 09:52:46.783946  - LAVA_JOB_ID=7022998
  159 09:52:46.784008  - LAVA_DISPATCHER_IP=192.168.201.1
  160 09:52:46.784101  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  161 09:52:46.784167  skipped lava-vland-overlay
  162 09:52:46.784241  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  163 09:52:46.784323  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  164 09:52:46.784383  skipped lava-multinode-overlay
  165 09:52:46.784456  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  166 09:52:46.784536  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  167 09:52:46.784607  Loading test definitions
  168 09:52:46.784695  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  169 09:52:46.784768  Using /lava-7022998 at stage 0
  170 09:52:46.785102  uuid=7022998_1.5.2.3.1 testdef=None
  171 09:52:46.785192  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  172 09:52:46.785278  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  173 09:52:46.785692  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  175 09:52:46.785919  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  176 09:52:46.786396  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  178 09:52:46.786635  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  179 09:52:46.787086  runner path: /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/0/tests/0_timesync-off test_uuid 7022998_1.5.2.3.1
  180 09:52:46.787230  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  182 09:52:46.787462  start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
  183 09:52:46.787535  Using /lava-7022998 at stage 0
  184 09:52:46.787631  Fetching tests from https://github.com/kernelci/test-definitions.git
  185 09:52:46.787710  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/0/tests/1_kselftest-alsa'
  186 09:52:51.527545  Running '/usr/bin/git checkout kernelci.org
  187 09:52:51.661226  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
  188 09:52:51.661889  uuid=7022998_1.5.2.3.5 testdef=None
  189 09:52:51.662048  end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
  191 09:52:51.662296  start: 1.5.2.3.6 test-overlay (timeout 00:09:45) [common]
  192 09:52:51.662978  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  194 09:52:51.663218  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:45) [common]
  195 09:52:51.664066  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  197 09:52:51.664312  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
  198 09:52:51.665228  runner path: /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/0/tests/1_kselftest-alsa test_uuid 7022998_1.5.2.3.5
  199 09:52:51.665316  BOARD='asus-C436FA-Flip-hatch'
  200 09:52:51.665382  BRANCH='cip-gitlab'
  201 09:52:51.665441  SKIPFILE='skipfile-lkft.yaml'
  202 09:52:51.665499  TESTPROG_URL='None'
  203 09:52:51.665556  TST_CASENAME=''
  204 09:52:51.665612  TST_CMDFILES='alsa'
  205 09:52:51.665740  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  207 09:52:51.665950  Creating lava-test-runner.conf files
  208 09:52:51.666015  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7022998/lava-overlay-w8dqucdf/lava-7022998/0 for stage 0
  209 09:52:51.666100  - 0_timesync-off
  210 09:52:51.666166  - 1_kselftest-alsa
  211 09:52:51.666257  end: 1.5.2.3 test-definition (duration 00:00:05) [common]
  212 09:52:51.666344  start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
  213 09:52:58.724676  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  214 09:52:58.724837  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
  215 09:52:58.724931  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 09:52:58.725068  end: 1.5.2 lava-overlay (duration 00:00:12) [common]
  217 09:52:58.725159  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
  218 09:52:58.825035  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 09:52:58.825374  start: 1.5.4 extract-modules (timeout 00:09:38) [common]
  220 09:52:58.825483  extracting modules file /var/lib/lava/dispatcher/tmp/7022998/tftp-deploy-tfm5a7wg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022998/extract-nfsrootfs-y_sn568m
  221 09:52:58.829383  extracting modules file /var/lib/lava/dispatcher/tmp/7022998/tftp-deploy-tfm5a7wg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022998/extract-overlay-ramdisk-bmhe2i5x/ramdisk
  222 09:52:58.833200  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 09:52:58.833311  start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
  224 09:52:58.833397  [common] Applying overlay to NFS
  225 09:52:58.833473  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7022998/compress-overlay-5gn_mhik/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7022998/extract-nfsrootfs-y_sn568m
  226 09:52:59.267715  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 09:52:59.267884  start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
  228 09:52:59.267978  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 09:52:59.268066  start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
  230 09:52:59.268149  Building ramdisk /var/lib/lava/dispatcher/tmp/7022998/extract-overlay-ramdisk-bmhe2i5x/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7022998/extract-overlay-ramdisk-bmhe2i5x/ramdisk
  231 09:52:59.300456  >> 24431 blocks

  232 09:52:59.751356  rename /var/lib/lava/dispatcher/tmp/7022998/extract-overlay-ramdisk-bmhe2i5x/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7022998/tftp-deploy-tfm5a7wg/ramdisk/ramdisk.cpio.gz
  233 09:52:59.751753  end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
  234 09:52:59.751871  start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
  235 09:52:59.751974  start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
  236 09:52:59.752068  No mkimage arch provided, not using FIT.
  237 09:52:59.752159  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 09:52:59.752244  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 09:52:59.752337  end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
  240 09:52:59.752428  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
  241 09:52:59.752507  No LXC device requested
  242 09:52:59.752590  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 09:52:59.752676  start: 1.7 deploy-device-env (timeout 00:09:37) [common]
  244 09:52:59.752757  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 09:52:59.752831  Checking files for TFTP limit of 4294967296 bytes.
  246 09:52:59.753261  end: 1 tftp-deploy (duration 00:00:23) [common]
  247 09:52:59.753364  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 09:52:59.753456  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 09:52:59.753584  substitutions:
  250 09:52:59.753650  - {DTB}: None
  251 09:52:59.753712  - {INITRD}: 7022998/tftp-deploy-tfm5a7wg/ramdisk/ramdisk.cpio.gz
  252 09:52:59.753771  - {KERNEL}: 7022998/tftp-deploy-tfm5a7wg/kernel/bzImage
  253 09:52:59.753828  - {LAVA_MAC}: None
  254 09:52:59.753884  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7022998/extract-nfsrootfs-y_sn568m
  255 09:52:59.753942  - {NFS_SERVER_IP}: 192.168.201.1
  256 09:52:59.753998  - {PRESEED_CONFIG}: None
  257 09:52:59.754055  - {PRESEED_LOCAL}: None
  258 09:52:59.754110  - {RAMDISK}: 7022998/tftp-deploy-tfm5a7wg/ramdisk/ramdisk.cpio.gz
  259 09:52:59.754165  - {ROOT_PART}: None
  260 09:52:59.754218  - {ROOT}: None
  261 09:52:59.754272  - {SERVER_IP}: 192.168.201.1
  262 09:52:59.754326  - {TEE}: None
  263 09:52:59.754379  Parsed boot commands:
  264 09:52:59.754432  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 09:52:59.754582  Parsed boot commands: tftpboot 192.168.201.1 7022998/tftp-deploy-tfm5a7wg/kernel/bzImage 7022998/tftp-deploy-tfm5a7wg/kernel/cmdline 7022998/tftp-deploy-tfm5a7wg/ramdisk/ramdisk.cpio.gz
  266 09:52:59.754672  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 09:52:59.754759  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 09:52:59.754855  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 09:52:59.754941  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 09:52:59.755011  Not connected, no need to disconnect.
  271 09:52:59.755086  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 09:52:59.755168  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 09:52:59.755240  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  274 09:52:59.757833  Setting prompt string to ['lava-test: # ']
  275 09:52:59.758112  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 09:52:59.758215  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 09:52:59.758310  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 09:52:59.758398  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 09:52:59.758575  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  280 09:52:59.777031  >> Command sent successfully.

  281 09:52:59.778755  Returned 0 in 0 seconds
  282 09:52:59.879986  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  284 09:52:59.881566  end: 2.2.2 reset-device (duration 00:00:00) [common]
  285 09:52:59.882127  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  286 09:52:59.882539  Setting prompt string to 'Starting depthcharge on Helios...'
  287 09:52:59.882861  Changing prompt to 'Starting depthcharge on Helios...'
  288 09:52:59.883203  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  289 09:52:59.884374  [Enter `^Ec?' for help]
  290 09:53:06.797606  
  291 09:53:06.798208  
  292 09:53:06.807723  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  293 09:53:06.811157  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  294 09:53:06.817297  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  295 09:53:06.820663  CPU: AES supported, TXT NOT supported, VT supported
  296 09:53:06.827428  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  297 09:53:06.833885  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  298 09:53:06.837499  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  299 09:53:06.840580  VBOOT: Loading verstage.
  300 09:53:06.844026  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  301 09:53:06.850610  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  302 09:53:06.857549  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  303 09:53:06.858142  CBFS @ c08000 size 3f8000
  304 09:53:06.863734  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  305 09:53:06.866966  CBFS: Locating 'fallback/verstage'
  306 09:53:06.870281  CBFS: Found @ offset 10fb80 size 1072c
  307 09:53:06.874771  
  308 09:53:06.875251  
  309 09:53:06.884057  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  310 09:53:06.898772  Probing TPM: . done!
  311 09:53:06.902133  TPM ready after 0 ms
  312 09:53:06.905864  Connected to device vid:did:rid of 1ae0:0028:00
  313 09:53:06.915885  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  314 09:53:06.919311  Initialized TPM device CR50 revision 0
  315 09:53:06.954406  tlcl_send_startup: Startup return code is 0
  316 09:53:06.954973  TPM: setup succeeded
  317 09:53:06.967161  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  318 09:53:06.971247  Chrome EC: UHEPI supported
  319 09:53:06.974356  Phase 1
  320 09:53:06.978144  FMAP: area GBB found @ c05000 (12288 bytes)
  321 09:53:06.984471  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  322 09:53:06.987715  Phase 2
  323 09:53:06.988290  Phase 3
  324 09:53:06.991052  FMAP: area GBB found @ c05000 (12288 bytes)
  325 09:53:06.997890  VB2:vb2_report_dev_firmware() This is developer signed firmware
  326 09:53:07.004511  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  327 09:53:07.007765  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  328 09:53:07.014134  VB2:vb2_verify_keyblock() Checking keyblock signature...
  329 09:53:07.030023  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  330 09:53:07.033065  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  331 09:53:07.040040  VB2:vb2_verify_fw_preamble() Verifying preamble.
  332 09:53:07.043993  Phase 4
  333 09:53:07.047723  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
  334 09:53:07.054047  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  335 09:53:07.233736  VB2:vb2_rsa_verify_digest() Digest check failed!
  336 09:53:07.240437  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  337 09:53:07.241071  Saving nvdata
  338 09:53:07.243432  Reboot requested (10020007)
  339 09:53:07.247055  board_reset() called!
  340 09:53:07.247632  full_reset() called!
  341 09:53:11.764533  
  342 09:53:11.765156  
  343 09:53:11.774633  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  344 09:53:11.777413  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  345 09:53:11.784689  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  346 09:53:11.787805  CPU: AES supported, TXT NOT supported, VT supported
  347 09:53:11.794287  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  348 09:53:11.797365  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  349 09:53:11.803696  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  350 09:53:11.807823  VBOOT: Loading verstage.
  351 09:53:11.810508  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  352 09:53:11.817814  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  353 09:53:11.824126  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  354 09:53:11.824695  CBFS @ c08000 size 3f8000
  355 09:53:11.830945  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  356 09:53:11.833914  CBFS: Locating 'fallback/verstage'
  357 09:53:11.837590  CBFS: Found @ offset 10fb80 size 1072c
  358 09:53:11.841114  
  359 09:53:11.841680  
  360 09:53:11.851224  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  361 09:53:11.865940  Probing TPM: . done!
  362 09:53:11.869203  TPM ready after 0 ms
  363 09:53:11.872483  Connected to device vid:did:rid of 1ae0:0028:00
  364 09:53:11.882438  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  365 09:53:11.885804  Initialized TPM device CR50 revision 0
  366 09:53:11.921732  tlcl_send_startup: Startup return code is 0
  367 09:53:11.922333  TPM: setup succeeded
  368 09:53:11.934567  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  369 09:53:11.937904  Chrome EC: UHEPI supported
  370 09:53:11.941315  Phase 1
  371 09:53:11.944601  FMAP: area GBB found @ c05000 (12288 bytes)
  372 09:53:11.951490  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  373 09:53:11.957621  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  374 09:53:11.960940  Recovery requested (1009000e)
  375 09:53:11.967161  Saving nvdata
  376 09:53:11.972988  tlcl_extend: response is 0
  377 09:53:11.982180  tlcl_extend: response is 0
  378 09:53:11.988854  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  379 09:53:11.991985  CBFS @ c08000 size 3f8000
  380 09:53:11.998329  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  381 09:53:12.001893  CBFS: Locating 'fallback/romstage'
  382 09:53:12.005069  CBFS: Found @ offset 80 size 145fc
  383 09:53:12.008587  Accumulated console time in verstage 98 ms
  384 09:53:12.009206  
  385 09:53:12.009594  
  386 09:53:12.021767  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  387 09:53:12.028505  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  388 09:53:12.031627  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  389 09:53:12.035282  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  390 09:53:12.041471  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  391 09:53:12.044675  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  392 09:53:12.048312  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
  393 09:53:12.052030  TCO_STS:   0000 0000
  394 09:53:12.054756  GEN_PMCON: e0015238 00000200
  395 09:53:12.057975  GBLRST_CAUSE: 00000000 00000000
  396 09:53:12.058479  prev_sleep_state 5
  397 09:53:12.061773  Boot Count incremented to 35120
  398 09:53:12.068613  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  399 09:53:12.071829  CBFS @ c08000 size 3f8000
  400 09:53:12.078569  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  401 09:53:12.079152  CBFS: Locating 'fspm.bin'
  402 09:53:12.084658  CBFS: Found @ offset 5ffc0 size 71000
  403 09:53:12.088345  Chrome EC: UHEPI supported
  404 09:53:12.094796  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  405 09:53:12.098320  Probing TPM:  done!
  406 09:53:12.104761  Connected to device vid:did:rid of 1ae0:0028:00
  407 09:53:12.115629  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  408 09:53:12.121036  Initialized TPM device CR50 revision 0
  409 09:53:12.129794  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  410 09:53:12.136688  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  411 09:53:12.140185  MRC cache found, size 1948
  412 09:53:12.143464  bootmode is set to: 2
  413 09:53:12.146348  PRMRR disabled by config.
  414 09:53:12.149990  SPD INDEX = 1
  415 09:53:12.153468  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  416 09:53:12.156542  CBFS @ c08000 size 3f8000
  417 09:53:12.163289  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  418 09:53:12.163879  CBFS: Locating 'spd.bin'
  419 09:53:12.166042  CBFS: Found @ offset 5fb80 size 400
  420 09:53:12.169956  SPD: module type is LPDDR3
  421 09:53:12.173199  SPD: module part is 
  422 09:53:12.179747  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  423 09:53:12.182966  SPD: device width 4 bits, bus width 8 bits
  424 09:53:12.186243  SPD: module size is 4096 MB (per channel)
  425 09:53:12.189483  memory slot: 0 configuration done.
  426 09:53:12.193229  memory slot: 2 configuration done.
  427 09:53:12.244548  CBMEM:
  428 09:53:12.247415  IMD: root @ 99fff000 254 entries.
  429 09:53:12.250602  IMD: root @ 99ffec00 62 entries.
  430 09:53:12.254008  External stage cache:
  431 09:53:12.257232  IMD: root @ 9abff000 254 entries.
  432 09:53:12.260664  IMD: root @ 9abfec00 62 entries.
  433 09:53:12.263873  Chrome EC: clear events_b mask to 0x0000000020004000
  434 09:53:12.279913  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  435 09:53:12.289944  tlcl_write: response is 0
  436 09:53:12.302470  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  437 09:53:12.309166  MRC: TPM MRC hash updated successfully.
  438 09:53:12.309780  2 DIMMs found
  439 09:53:12.311926  SMM Memory Map
  440 09:53:12.315576  SMRAM       : 0x9a000000 0x1000000
  441 09:53:12.318674   Subregion 0: 0x9a000000 0xa00000
  442 09:53:12.322365   Subregion 1: 0x9aa00000 0x200000
  443 09:53:12.325328   Subregion 2: 0x9ac00000 0x400000
  444 09:53:12.328756  top_of_ram = 0x9a000000
  445 09:53:12.332188  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  446 09:53:12.338497  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  447 09:53:12.341670  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  448 09:53:12.348398  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  449 09:53:12.351916  CBFS @ c08000 size 3f8000
  450 09:53:12.355382  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  451 09:53:12.358458  CBFS: Locating 'fallback/postcar'
  452 09:53:12.365159  CBFS: Found @ offset 107000 size 4b44
  453 09:53:12.368408  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  454 09:53:12.381072  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  455 09:53:12.384602  Processing 180 relocs. Offset value of 0x97c0c000
  456 09:53:12.392610  Accumulated console time in romstage 286 ms
  457 09:53:12.393232  
  458 09:53:12.393617  
  459 09:53:12.402589  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  460 09:53:12.409535  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  461 09:53:12.412556  CBFS @ c08000 size 3f8000
  462 09:53:12.416087  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  463 09:53:12.423156  CBFS: Locating 'fallback/ramstage'
  464 09:53:12.426242  CBFS: Found @ offset 43380 size 1b9e8
  465 09:53:12.432909  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  466 09:53:12.464591  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  467 09:53:12.467737  Processing 3976 relocs. Offset value of 0x98db0000
  468 09:53:12.474259  Accumulated console time in postcar 52 ms
  469 09:53:12.474735  
  470 09:53:12.475111  
  471 09:53:12.484092  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  472 09:53:12.490994  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  473 09:53:12.494268  WARNING: RO_VPD is uninitialized or empty.
  474 09:53:12.497908  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  475 09:53:12.504387  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  476 09:53:12.505024  Normal boot.
  477 09:53:12.510938  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  478 09:53:12.513730  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  479 09:53:12.517466  CBFS @ c08000 size 3f8000
  480 09:53:12.524037  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  481 09:53:12.527521  CBFS: Locating 'cpu_microcode_blob.bin'
  482 09:53:12.531042  CBFS: Found @ offset 14700 size 2ec00
  483 09:53:12.534099  microcode: sig=0x806ec pf=0x4 revision=0xc9
  484 09:53:12.537318  Skip microcode update
  485 09:53:12.544086  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  486 09:53:12.544703  CBFS @ c08000 size 3f8000
  487 09:53:12.550808  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  488 09:53:12.553825  CBFS: Locating 'fsps.bin'
  489 09:53:12.557591  CBFS: Found @ offset d1fc0 size 35000
  490 09:53:12.582838  Detected 4 core, 8 thread CPU.
  491 09:53:12.586168  Setting up SMI for CPU
  492 09:53:12.589426  IED base = 0x9ac00000
  493 09:53:12.590004  IED size = 0x00400000
  494 09:53:12.593300  Will perform SMM setup.
  495 09:53:12.598990  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  496 09:53:12.605957  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  497 09:53:12.609143  Processing 16 relocs. Offset value of 0x00030000
  498 09:53:12.613024  Attempting to start 7 APs
  499 09:53:12.616381  Waiting for 10ms after sending INIT.
  500 09:53:12.632423  Waiting for 1st SIPI to complete...done.
  501 09:53:12.633052  AP: slot 2 apic_id 1.
  502 09:53:12.638915  Waiting for 2nd SIPI to complete...done.
  503 09:53:12.639480  AP: slot 6 apic_id 7.
  504 09:53:12.642406  AP: slot 7 apic_id 6.
  505 09:53:12.645569  AP: slot 1 apic_id 2.
  506 09:53:12.646047  AP: slot 3 apic_id 3.
  507 09:53:12.649062  AP: slot 4 apic_id 4.
  508 09:53:12.652707  AP: slot 5 apic_id 5.
  509 09:53:12.658883  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  510 09:53:12.665333  Processing 13 relocs. Offset value of 0x00038000
  511 09:53:12.668740  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  512 09:53:12.675874  Installing SMM handler to 0x9a000000
  513 09:53:12.682287  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  514 09:53:12.685808  Processing 658 relocs. Offset value of 0x9a010000
  515 09:53:12.695659  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  516 09:53:12.698430  Processing 13 relocs. Offset value of 0x9a008000
  517 09:53:12.705038  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  518 09:53:12.712133  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  519 09:53:12.715210  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  520 09:53:12.721935  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  521 09:53:12.728910  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  522 09:53:12.735208  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  523 09:53:12.738992  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  524 09:53:12.745363  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  525 09:53:12.749121  Clearing SMI status registers
  526 09:53:12.751997  SMI_STS: PM1 
  527 09:53:12.752581  PM1_STS: PWRBTN 
  528 09:53:12.755670  TCO_STS: SECOND_TO 
  529 09:53:12.759311  New SMBASE 0x9a000000
  530 09:53:12.759901  In relocation handler: CPU 0
  531 09:53:12.765601  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  532 09:53:12.768518  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 09:53:12.772380  Relocation complete.
  534 09:53:12.775376  New SMBASE 0x99fff800
  535 09:53:12.775963  In relocation handler: CPU 2
  536 09:53:12.781630  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  537 09:53:12.785352  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 09:53:12.788733  Relocation complete.
  539 09:53:12.789355  New SMBASE 0x99ffe800
  540 09:53:12.791942  In relocation handler: CPU 6
  541 09:53:12.798652  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  542 09:53:12.801636  Writing SMRR. base = 0x9a000006, mask=0xff000800
  543 09:53:12.805192  Relocation complete.
  544 09:53:12.805677  New SMBASE 0x99ffe400
  545 09:53:12.808384  In relocation handler: CPU 7
  546 09:53:12.815194  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  547 09:53:12.818651  Writing SMRR. base = 0x9a000006, mask=0xff000800
  548 09:53:12.821554  Relocation complete.
  549 09:53:12.822139  New SMBASE 0x99fff400
  550 09:53:12.824757  In relocation handler: CPU 3
  551 09:53:12.828380  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  552 09:53:12.835406  Writing SMRR. base = 0x9a000006, mask=0xff000800
  553 09:53:12.838755  Relocation complete.
  554 09:53:12.839364  New SMBASE 0x99fffc00
  555 09:53:12.841458  In relocation handler: CPU 1
  556 09:53:12.844715  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  557 09:53:12.851484  Writing SMRR. base = 0x9a000006, mask=0xff000800
  558 09:53:12.855176  Relocation complete.
  559 09:53:12.855755  New SMBASE 0x99ffec00
  560 09:53:12.857868  In relocation handler: CPU 5
  561 09:53:12.861816  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  562 09:53:12.868338  Writing SMRR. base = 0x9a000006, mask=0xff000800
  563 09:53:12.868941  Relocation complete.
  564 09:53:12.871247  New SMBASE 0x99fff000
  565 09:53:12.874813  In relocation handler: CPU 4
  566 09:53:12.877817  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  567 09:53:12.885047  Writing SMRR. base = 0x9a000006, mask=0xff000800
  568 09:53:12.885641  Relocation complete.
  569 09:53:12.888195  Initializing CPU #0
  570 09:53:12.891279  CPU: vendor Intel device 806ec
  571 09:53:12.894703  CPU: family 06, model 8e, stepping 0c
  572 09:53:12.897829  Clearing out pending MCEs
  573 09:53:12.900906  Setting up local APIC...
  574 09:53:12.901434   apic_id: 0x00 done.
  575 09:53:12.904591  Turbo is available but hidden
  576 09:53:12.907715  Turbo is available and visible
  577 09:53:12.911709  VMX status: enabled
  578 09:53:12.914294  IA32_FEATURE_CONTROL status: locked
  579 09:53:12.917666  Skip microcode update
  580 09:53:12.918146  CPU #0 initialized
  581 09:53:12.920933  Initializing CPU #2
  582 09:53:12.924409  Initializing CPU #4
  583 09:53:12.925033  Initializing CPU #5
  584 09:53:12.928221  CPU: vendor Intel device 806ec
  585 09:53:12.930925  CPU: family 06, model 8e, stepping 0c
  586 09:53:12.934223  CPU: vendor Intel device 806ec
  587 09:53:12.937501  CPU: family 06, model 8e, stepping 0c
  588 09:53:12.941590  Clearing out pending MCEs
  589 09:53:12.944156  Clearing out pending MCEs
  590 09:53:12.947995  Setting up local APIC...
  591 09:53:12.948473  Initializing CPU #6
  592 09:53:12.950890  Initializing CPU #7
  593 09:53:12.954402  CPU: vendor Intel device 806ec
  594 09:53:12.957785  CPU: family 06, model 8e, stepping 0c
  595 09:53:12.961244  CPU: vendor Intel device 806ec
  596 09:53:12.964455  CPU: family 06, model 8e, stepping 0c
  597 09:53:12.967897  Setting up local APIC...
  598 09:53:12.968379  Initializing CPU #1
  599 09:53:12.971182  Initializing CPU #3
  600 09:53:12.974264  CPU: vendor Intel device 806ec
  601 09:53:12.977357  CPU: family 06, model 8e, stepping 0c
  602 09:53:12.980604  CPU: vendor Intel device 806ec
  603 09:53:12.984276  CPU: family 06, model 8e, stepping 0c
  604 09:53:12.987654  Clearing out pending MCEs
  605 09:53:12.991657  Clearing out pending MCEs
  606 09:53:12.992242  Setting up local APIC...
  607 09:53:12.994289  CPU: vendor Intel device 806ec
  608 09:53:13.000547  CPU: family 06, model 8e, stepping 0c
  609 09:53:13.001100  Clearing out pending MCEs
  610 09:53:13.004080  Clearing out pending MCEs
  611 09:53:13.007479  Clearing out pending MCEs
  612 09:53:13.010622  Setting up local APIC...
  613 09:53:13.011103  Setting up local APIC...
  614 09:53:13.013811   apic_id: 0x04 done.
  615 09:53:13.017169   apic_id: 0x05 done.
  616 09:53:13.017652  VMX status: enabled
  617 09:53:13.021133  VMX status: enabled
  618 09:53:13.024200  IA32_FEATURE_CONTROL status: locked
  619 09:53:13.027708  IA32_FEATURE_CONTROL status: locked
  620 09:53:13.030672  Skip microcode update
  621 09:53:13.033857  Skip microcode update
  622 09:53:13.034338  CPU #4 initialized
  623 09:53:13.037509  CPU #5 initialized
  624 09:53:13.038101   apic_id: 0x03 done.
  625 09:53:13.040666   apic_id: 0x02 done.
  626 09:53:13.044475  VMX status: enabled
  627 09:53:13.045095  VMX status: enabled
  628 09:53:13.047100  IA32_FEATURE_CONTROL status: locked
  629 09:53:13.050187  IA32_FEATURE_CONTROL status: locked
  630 09:53:13.053895  Skip microcode update
  631 09:53:13.056872  Skip microcode update
  632 09:53:13.057405  CPU #3 initialized
  633 09:53:13.060832  CPU #1 initialized
  634 09:53:13.063674   apic_id: 0x01 done.
  635 09:53:13.064156  Setting up local APIC...
  636 09:53:13.067270  VMX status: enabled
  637 09:53:13.070411  Setting up local APIC...
  638 09:53:13.073855  IA32_FEATURE_CONTROL status: locked
  639 09:53:13.076869   apic_id: 0x06 done.
  640 09:53:13.077393   apic_id: 0x07 done.
  641 09:53:13.080299  VMX status: enabled
  642 09:53:13.080886  VMX status: enabled
  643 09:53:13.084091  IA32_FEATURE_CONTROL status: locked
  644 09:53:13.090109  IA32_FEATURE_CONTROL status: locked
  645 09:53:13.090700  Skip microcode update
  646 09:53:13.093630  Skip microcode update
  647 09:53:13.096993  Skip microcode update
  648 09:53:13.097584  CPU #7 initialized
  649 09:53:13.099887  CPU #6 initialized
  650 09:53:13.100368  CPU #2 initialized
  651 09:53:13.106881  bsp_do_flight_plan done after 466 msecs.
  652 09:53:13.109862  CPU: frequency set to 4200 MHz
  653 09:53:13.110348  Enabling SMIs.
  654 09:53:13.110724  Locking SMM.
  655 09:53:13.126115  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  656 09:53:13.129852  CBFS @ c08000 size 3f8000
  657 09:53:13.136438  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  658 09:53:13.137068  CBFS: Locating 'vbt.bin'
  659 09:53:13.139715  CBFS: Found @ offset 5f5c0 size 499
  660 09:53:13.146024  Found a VBT of 4608 bytes after decompression
  661 09:53:13.331643  Display FSP Version Info HOB
  662 09:53:13.334817  Reference Code - CPU = 9.0.1e.30
  663 09:53:13.338534  uCode Version = 0.0.0.ca
  664 09:53:13.341541  TXT ACM version = ff.ff.ff.ffff
  665 09:53:13.344697  Display FSP Version Info HOB
  666 09:53:13.348272  Reference Code - ME = 9.0.1e.30
  667 09:53:13.351181  MEBx version = 0.0.0.0
  668 09:53:13.354516  ME Firmware Version = Consumer SKU
  669 09:53:13.357993  Display FSP Version Info HOB
  670 09:53:13.361499  Reference Code - CML PCH = 9.0.1e.30
  671 09:53:13.364889  PCH-CRID Status = Disabled
  672 09:53:13.367705  PCH-CRID Original Value = ff.ff.ff.ffff
  673 09:53:13.371555  PCH-CRID New Value = ff.ff.ff.ffff
  674 09:53:13.374618  OPROM - RST - RAID = ff.ff.ff.ffff
  675 09:53:13.377741  ChipsetInit Base Version = ff.ff.ff.ffff
  676 09:53:13.381230  ChipsetInit Oem Version = ff.ff.ff.ffff
  677 09:53:13.384251  Display FSP Version Info HOB
  678 09:53:13.391260  Reference Code - SA - System Agent = 9.0.1e.30
  679 09:53:13.394449  Reference Code - MRC = 0.7.1.6c
  680 09:53:13.395035  SA - PCIe Version = 9.0.1e.30
  681 09:53:13.398282  SA-CRID Status = Disabled
  682 09:53:13.401595  SA-CRID Original Value = 0.0.0.c
  683 09:53:13.404668  SA-CRID New Value = 0.0.0.c
  684 09:53:13.407934  OPROM - VBIOS = ff.ff.ff.ffff
  685 09:53:13.410807  RTC Init
  686 09:53:13.413855  Set power on after power failure.
  687 09:53:13.414342  Disabling Deep S3
  688 09:53:13.417805  Disabling Deep S3
  689 09:53:13.418395  Disabling Deep S4
  690 09:53:13.420715  Disabling Deep S4
  691 09:53:13.424076  Disabling Deep S5
  692 09:53:13.424673  Disabling Deep S5
  693 09:53:13.431686  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
  694 09:53:13.432276  Enumerating buses...
  695 09:53:13.437184  Show all devs... Before device enumeration.
  696 09:53:13.440284  Root Device: enabled 1
  697 09:53:13.440764  CPU_CLUSTER: 0: enabled 1
  698 09:53:13.443642  DOMAIN: 0000: enabled 1
  699 09:53:13.446993  APIC: 00: enabled 1
  700 09:53:13.447477  PCI: 00:00.0: enabled 1
  701 09:53:13.450310  PCI: 00:02.0: enabled 1
  702 09:53:13.453895  PCI: 00:04.0: enabled 0
  703 09:53:13.457285  PCI: 00:05.0: enabled 0
  704 09:53:13.457863  PCI: 00:12.0: enabled 1
  705 09:53:13.460914  PCI: 00:12.5: enabled 0
  706 09:53:13.463491  PCI: 00:12.6: enabled 0
  707 09:53:13.466842  PCI: 00:14.0: enabled 1
  708 09:53:13.467324  PCI: 00:14.1: enabled 0
  709 09:53:13.470805  PCI: 00:14.3: enabled 1
  710 09:53:13.473476  PCI: 00:14.5: enabled 0
  711 09:53:13.473963  PCI: 00:15.0: enabled 1
  712 09:53:13.477113  PCI: 00:15.1: enabled 1
  713 09:53:13.480831  PCI: 00:15.2: enabled 0
  714 09:53:13.483503  PCI: 00:15.3: enabled 0
  715 09:53:13.483989  PCI: 00:16.0: enabled 1
  716 09:53:13.487211  PCI: 00:16.1: enabled 0
  717 09:53:13.490260  PCI: 00:16.2: enabled 0
  718 09:53:13.494099  PCI: 00:16.3: enabled 0
  719 09:53:13.494686  PCI: 00:16.4: enabled 0
  720 09:53:13.497206  PCI: 00:16.5: enabled 0
  721 09:53:13.501026  PCI: 00:17.0: enabled 1
  722 09:53:13.503116  PCI: 00:19.0: enabled 1
  723 09:53:13.503715  PCI: 00:19.1: enabled 0
  724 09:53:13.507209  PCI: 00:19.2: enabled 0
  725 09:53:13.509861  PCI: 00:1a.0: enabled 0
  726 09:53:13.510341  PCI: 00:1c.0: enabled 0
  727 09:53:13.513389  PCI: 00:1c.1: enabled 0
  728 09:53:13.517181  PCI: 00:1c.2: enabled 0
  729 09:53:13.519958  PCI: 00:1c.3: enabled 0
  730 09:53:13.520436  PCI: 00:1c.4: enabled 0
  731 09:53:13.523314  PCI: 00:1c.5: enabled 0
  732 09:53:13.526952  PCI: 00:1c.6: enabled 0
  733 09:53:13.530366  PCI: 00:1c.7: enabled 0
  734 09:53:13.530952  PCI: 00:1d.0: enabled 1
  735 09:53:13.533332  PCI: 00:1d.1: enabled 0
  736 09:53:13.536624  PCI: 00:1d.2: enabled 0
  737 09:53:13.539946  PCI: 00:1d.3: enabled 0
  738 09:53:13.540486  PCI: 00:1d.4: enabled 0
  739 09:53:13.542908  PCI: 00:1d.5: enabled 1
  740 09:53:13.546428  PCI: 00:1e.0: enabled 1
  741 09:53:13.549729  PCI: 00:1e.1: enabled 0
  742 09:53:13.550210  PCI: 00:1e.2: enabled 1
  743 09:53:13.552730  PCI: 00:1e.3: enabled 1
  744 09:53:13.557051  PCI: 00:1f.0: enabled 1
  745 09:53:13.557637  PCI: 00:1f.1: enabled 1
  746 09:53:13.560198  PCI: 00:1f.2: enabled 1
  747 09:53:13.563311  PCI: 00:1f.3: enabled 1
  748 09:53:13.566789  PCI: 00:1f.4: enabled 1
  749 09:53:13.567271  PCI: 00:1f.5: enabled 1
  750 09:53:13.569496  PCI: 00:1f.6: enabled 0
  751 09:53:13.572924  USB0 port 0: enabled 1
  752 09:53:13.576467  I2C: 00:15: enabled 1
  753 09:53:13.577080  I2C: 00:5d: enabled 1
  754 09:53:13.580029  GENERIC: 0.0: enabled 1
  755 09:53:13.583037  I2C: 00:1a: enabled 1
  756 09:53:13.583518  I2C: 00:38: enabled 1
  757 09:53:13.586811  I2C: 00:39: enabled 1
  758 09:53:13.589632  I2C: 00:3a: enabled 1
  759 09:53:13.590115  I2C: 00:3b: enabled 1
  760 09:53:13.592802  PCI: 00:00.0: enabled 1
  761 09:53:13.596354  SPI: 00: enabled 1
  762 09:53:13.596942  SPI: 01: enabled 1
  763 09:53:13.599580  PNP: 0c09.0: enabled 1
  764 09:53:13.602247  USB2 port 0: enabled 1
  765 09:53:13.602737  USB2 port 1: enabled 1
  766 09:53:13.606065  USB2 port 2: enabled 0
  767 09:53:13.609426  USB2 port 3: enabled 0
  768 09:53:13.609902  USB2 port 5: enabled 0
  769 09:53:13.612222  USB2 port 6: enabled 1
  770 09:53:13.615936  USB2 port 9: enabled 1
  771 09:53:13.619294  USB3 port 0: enabled 1
  772 09:53:13.619824  USB3 port 1: enabled 1
  773 09:53:13.622850  USB3 port 2: enabled 1
  774 09:53:13.625840  USB3 port 3: enabled 1
  775 09:53:13.626420  USB3 port 4: enabled 0
  776 09:53:13.629017  APIC: 02: enabled 1
  777 09:53:13.632279  APIC: 01: enabled 1
  778 09:53:13.632866  APIC: 03: enabled 1
  779 09:53:13.635491  APIC: 04: enabled 1
  780 09:53:13.638577  APIC: 05: enabled 1
  781 09:53:13.639142  APIC: 07: enabled 1
  782 09:53:13.642145  APIC: 06: enabled 1
  783 09:53:13.642630  Compare with tree...
  784 09:53:13.645319  Root Device: enabled 1
  785 09:53:13.648550   CPU_CLUSTER: 0: enabled 1
  786 09:53:13.651982    APIC: 00: enabled 1
  787 09:53:13.652462    APIC: 02: enabled 1
  788 09:53:13.655921    APIC: 01: enabled 1
  789 09:53:13.658615    APIC: 03: enabled 1
  790 09:53:13.659103    APIC: 04: enabled 1
  791 09:53:13.662130    APIC: 05: enabled 1
  792 09:53:13.665476    APIC: 07: enabled 1
  793 09:53:13.665989    APIC: 06: enabled 1
  794 09:53:13.668080   DOMAIN: 0000: enabled 1
  795 09:53:13.671645    PCI: 00:00.0: enabled 1
  796 09:53:13.675681    PCI: 00:02.0: enabled 1
  797 09:53:13.678629    PCI: 00:04.0: enabled 0
  798 09:53:13.679214    PCI: 00:05.0: enabled 0
  799 09:53:13.681868    PCI: 00:12.0: enabled 1
  800 09:53:13.685073    PCI: 00:12.5: enabled 0
  801 09:53:13.688552    PCI: 00:12.6: enabled 0
  802 09:53:13.691542    PCI: 00:14.0: enabled 1
  803 09:53:13.692125     USB0 port 0: enabled 1
  804 09:53:13.695310      USB2 port 0: enabled 1
  805 09:53:13.698829      USB2 port 1: enabled 1
  806 09:53:13.701851      USB2 port 2: enabled 0
  807 09:53:13.704554      USB2 port 3: enabled 0
  808 09:53:13.705169      USB2 port 5: enabled 0
  809 09:53:13.708091      USB2 port 6: enabled 1
  810 09:53:13.711714      USB2 port 9: enabled 1
  811 09:53:13.715057      USB3 port 0: enabled 1
  812 09:53:13.718072      USB3 port 1: enabled 1
  813 09:53:13.721218      USB3 port 2: enabled 1
  814 09:53:13.721704      USB3 port 3: enabled 1
  815 09:53:13.724942      USB3 port 4: enabled 0
  816 09:53:13.728046    PCI: 00:14.1: enabled 0
  817 09:53:13.731693    PCI: 00:14.3: enabled 1
  818 09:53:13.734288    PCI: 00:14.5: enabled 0
  819 09:53:13.734798    PCI: 00:15.0: enabled 1
  820 09:53:13.738100     I2C: 00:15: enabled 1
  821 09:53:13.741667    PCI: 00:15.1: enabled 1
  822 09:53:13.744339     I2C: 00:5d: enabled 1
  823 09:53:13.748446     GENERIC: 0.0: enabled 1
  824 09:53:13.749070    PCI: 00:15.2: enabled 0
  825 09:53:13.751559    PCI: 00:15.3: enabled 0
  826 09:53:13.754357    PCI: 00:16.0: enabled 1
  827 09:53:13.757617    PCI: 00:16.1: enabled 0
  828 09:53:13.758123    PCI: 00:16.2: enabled 0
  829 09:53:13.761568    PCI: 00:16.3: enabled 0
  830 09:53:13.764758    PCI: 00:16.4: enabled 0
  831 09:53:13.767809    PCI: 00:16.5: enabled 0
  832 09:53:13.770760    PCI: 00:17.0: enabled 1
  833 09:53:13.771247    PCI: 00:19.0: enabled 1
  834 09:53:13.774250     I2C: 00:1a: enabled 1
  835 09:53:13.777418     I2C: 00:38: enabled 1
  836 09:53:13.781475     I2C: 00:39: enabled 1
  837 09:53:13.784442     I2C: 00:3a: enabled 1
  838 09:53:13.785057     I2C: 00:3b: enabled 1
  839 09:53:13.787632    PCI: 00:19.1: enabled 0
  840 09:53:13.790633    PCI: 00:19.2: enabled 0
  841 09:53:13.794131    PCI: 00:1a.0: enabled 0
  842 09:53:13.794712    PCI: 00:1c.0: enabled 0
  843 09:53:13.797898    PCI: 00:1c.1: enabled 0
  844 09:53:13.801323    PCI: 00:1c.2: enabled 0
  845 09:53:13.803900    PCI: 00:1c.3: enabled 0
  846 09:53:13.807653    PCI: 00:1c.4: enabled 0
  847 09:53:13.808140    PCI: 00:1c.5: enabled 0
  848 09:53:13.810605    PCI: 00:1c.6: enabled 0
  849 09:53:13.814083    PCI: 00:1c.7: enabled 0
  850 09:53:13.817442    PCI: 00:1d.0: enabled 1
  851 09:53:13.820519    PCI: 00:1d.1: enabled 0
  852 09:53:13.821140    PCI: 00:1d.2: enabled 0
  853 09:53:13.824290    PCI: 00:1d.3: enabled 0
  854 09:53:13.827297    PCI: 00:1d.4: enabled 0
  855 09:53:13.831102    PCI: 00:1d.5: enabled 1
  856 09:53:13.833808     PCI: 00:00.0: enabled 1
  857 09:53:13.834287    PCI: 00:1e.0: enabled 1
  858 09:53:13.837017    PCI: 00:1e.1: enabled 0
  859 09:53:13.840459    PCI: 00:1e.2: enabled 1
  860 09:53:13.844036     SPI: 00: enabled 1
  861 09:53:13.844621    PCI: 00:1e.3: enabled 1
  862 09:53:13.847518     SPI: 01: enabled 1
  863 09:53:13.850584    PCI: 00:1f.0: enabled 1
  864 09:53:13.853559     PNP: 0c09.0: enabled 1
  865 09:53:13.857112    PCI: 00:1f.1: enabled 1
  866 09:53:13.857590    PCI: 00:1f.2: enabled 1
  867 09:53:13.860333    PCI: 00:1f.3: enabled 1
  868 09:53:13.863811    PCI: 00:1f.4: enabled 1
  869 09:53:13.866990    PCI: 00:1f.5: enabled 1
  870 09:53:13.870181    PCI: 00:1f.6: enabled 0
  871 09:53:13.870701  Root Device scanning...
  872 09:53:13.873428  scan_static_bus for Root Device
  873 09:53:13.876763  CPU_CLUSTER: 0 enabled
  874 09:53:13.880621  DOMAIN: 0000 enabled
  875 09:53:13.881261  DOMAIN: 0000 scanning...
  876 09:53:13.883845  PCI: pci_scan_bus for bus 00
  877 09:53:13.886915  PCI: 00:00.0 [8086/0000] ops
  878 09:53:13.889994  PCI: 00:00.0 [8086/9b61] enabled
  879 09:53:13.893662  PCI: 00:02.0 [8086/0000] bus ops
  880 09:53:13.896893  PCI: 00:02.0 [8086/9b41] enabled
  881 09:53:13.900040  PCI: 00:04.0 [8086/1903] disabled
  882 09:53:13.903489  PCI: 00:08.0 [8086/1911] enabled
  883 09:53:13.906754  PCI: 00:12.0 [8086/02f9] enabled
  884 09:53:13.909834  PCI: 00:14.0 [8086/0000] bus ops
  885 09:53:13.913545  PCI: 00:14.0 [8086/02ed] enabled
  886 09:53:13.916996  PCI: 00:14.2 [8086/02ef] enabled
  887 09:53:13.920234  PCI: 00:14.3 [8086/02f0] enabled
  888 09:53:13.923344  PCI: 00:15.0 [8086/0000] bus ops
  889 09:53:13.927023  PCI: 00:15.0 [8086/02e8] enabled
  890 09:53:13.929744  PCI: 00:15.1 [8086/0000] bus ops
  891 09:53:13.933489  PCI: 00:15.1 [8086/02e9] enabled
  892 09:53:13.936543  PCI: 00:16.0 [8086/0000] ops
  893 09:53:13.940064  PCI: 00:16.0 [8086/02e0] enabled
  894 09:53:13.942844  PCI: 00:17.0 [8086/0000] ops
  895 09:53:13.946565  PCI: 00:17.0 [8086/02d3] enabled
  896 09:53:13.950118  PCI: 00:19.0 [8086/0000] bus ops
  897 09:53:13.953744  PCI: 00:19.0 [8086/02c5] enabled
  898 09:53:13.956683  PCI: 00:1d.0 [8086/0000] bus ops
  899 09:53:13.960284  PCI: 00:1d.0 [8086/02b0] enabled
  900 09:53:13.966509  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  901 09:53:13.970107  PCI: 00:1e.0 [8086/0000] ops
  902 09:53:13.973267  PCI: 00:1e.0 [8086/02a8] enabled
  903 09:53:13.976709  PCI: 00:1e.2 [8086/0000] bus ops
  904 09:53:13.979573  PCI: 00:1e.2 [8086/02aa] enabled
  905 09:53:13.983433  PCI: 00:1e.3 [8086/0000] bus ops
  906 09:53:13.985985  PCI: 00:1e.3 [8086/02ab] enabled
  907 09:53:13.989899  PCI: 00:1f.0 [8086/0000] bus ops
  908 09:53:13.993044  PCI: 00:1f.0 [8086/0284] enabled
  909 09:53:13.999622  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  910 09:53:14.002965  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  911 09:53:14.006117  PCI: 00:1f.3 [8086/0000] bus ops
  912 09:53:14.009129  PCI: 00:1f.3 [8086/02c8] enabled
  913 09:53:14.012896  PCI: 00:1f.4 [8086/0000] bus ops
  914 09:53:14.016017  PCI: 00:1f.4 [8086/02a3] enabled
  915 09:53:14.020160  PCI: 00:1f.5 [8086/0000] bus ops
  916 09:53:14.023081  PCI: 00:1f.5 [8086/02a4] enabled
  917 09:53:14.025895  PCI: Leftover static devices:
  918 09:53:14.029070  PCI: 00:05.0
  919 09:53:14.029563  PCI: 00:12.5
  920 09:53:14.030041  PCI: 00:12.6
  921 09:53:14.032718  PCI: 00:14.1
  922 09:53:14.033354  PCI: 00:14.5
  923 09:53:14.036056  PCI: 00:15.2
  924 09:53:14.036682  PCI: 00:15.3
  925 09:53:14.037213  PCI: 00:16.1
  926 09:53:14.039895  PCI: 00:16.2
  927 09:53:14.040484  PCI: 00:16.3
  928 09:53:14.043036  PCI: 00:16.4
  929 09:53:14.043639  PCI: 00:16.5
  930 09:53:14.044130  PCI: 00:19.1
  931 09:53:14.046228  PCI: 00:19.2
  932 09:53:14.046718  PCI: 00:1a.0
  933 09:53:14.049585  PCI: 00:1c.0
  934 09:53:14.050223  PCI: 00:1c.1
  935 09:53:14.052594  PCI: 00:1c.2
  936 09:53:14.053158  PCI: 00:1c.3
  937 09:53:14.053639  PCI: 00:1c.4
  938 09:53:14.055951  PCI: 00:1c.5
  939 09:53:14.056536  PCI: 00:1c.6
  940 09:53:14.059483  PCI: 00:1c.7
  941 09:53:14.060072  PCI: 00:1d.1
  942 09:53:14.060568  PCI: 00:1d.2
  943 09:53:14.062472  PCI: 00:1d.3
  944 09:53:14.062960  PCI: 00:1d.4
  945 09:53:14.065604  PCI: 00:1d.5
  946 09:53:14.066093  PCI: 00:1e.1
  947 09:53:14.066573  PCI: 00:1f.1
  948 09:53:14.069754  PCI: 00:1f.2
  949 09:53:14.070243  PCI: 00:1f.6
  950 09:53:14.072391  PCI: Check your devicetree.cb.
  951 09:53:14.075895  PCI: 00:02.0 scanning...
  952 09:53:14.078907  scan_generic_bus for PCI: 00:02.0
  953 09:53:14.082553  scan_generic_bus for PCI: 00:02.0 done
  954 09:53:14.089229  scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs
  955 09:53:14.092453  PCI: 00:14.0 scanning...
  956 09:53:14.095724  scan_static_bus for PCI: 00:14.0
  957 09:53:14.096309  USB0 port 0 enabled
  958 09:53:14.098782  USB0 port 0 scanning...
  959 09:53:14.102324  scan_static_bus for USB0 port 0
  960 09:53:14.105637  USB2 port 0 enabled
  961 09:53:14.106119  USB2 port 1 enabled
  962 09:53:14.108903  USB2 port 2 disabled
  963 09:53:14.112649  USB2 port 3 disabled
  964 09:53:14.113302  USB2 port 5 disabled
  965 09:53:14.115212  USB2 port 6 enabled
  966 09:53:14.118834  USB2 port 9 enabled
  967 09:53:14.119414  USB3 port 0 enabled
  968 09:53:14.122012  USB3 port 1 enabled
  969 09:53:14.125383  USB3 port 2 enabled
  970 09:53:14.125861  USB3 port 3 enabled
  971 09:53:14.128463  USB3 port 4 disabled
  972 09:53:14.132251  USB2 port 0 scanning...
  973 09:53:14.135662  scan_static_bus for USB2 port 0
  974 09:53:14.138352  scan_static_bus for USB2 port 0 done
  975 09:53:14.141964  scan_bus: scanning of bus USB2 port 0 took 9706 usecs
  976 09:53:14.145706  USB2 port 1 scanning...
  977 09:53:14.148680  scan_static_bus for USB2 port 1
  978 09:53:14.151901  scan_static_bus for USB2 port 1 done
  979 09:53:14.158330  scan_bus: scanning of bus USB2 port 1 took 9708 usecs
  980 09:53:14.161582  USB2 port 6 scanning...
  981 09:53:14.165093  scan_static_bus for USB2 port 6
  982 09:53:14.168652  scan_static_bus for USB2 port 6 done
  983 09:53:14.171713  scan_bus: scanning of bus USB2 port 6 took 9698 usecs
  984 09:53:14.174854  USB2 port 9 scanning...
  985 09:53:14.178943  scan_static_bus for USB2 port 9
  986 09:53:14.181638  scan_static_bus for USB2 port 9 done
  987 09:53:14.188638  scan_bus: scanning of bus USB2 port 9 took 9707 usecs
  988 09:53:14.191953  USB3 port 0 scanning...
  989 09:53:14.195085  scan_static_bus for USB3 port 0
  990 09:53:14.198276  scan_static_bus for USB3 port 0 done
  991 09:53:14.201675  scan_bus: scanning of bus USB3 port 0 took 9693 usecs
  992 09:53:14.205336  USB3 port 1 scanning...
  993 09:53:14.208066  scan_static_bus for USB3 port 1
  994 09:53:14.211635  scan_static_bus for USB3 port 1 done
  995 09:53:14.218004  scan_bus: scanning of bus USB3 port 1 took 9695 usecs
  996 09:53:14.221347  USB3 port 2 scanning...
  997 09:53:14.224747  scan_static_bus for USB3 port 2
  998 09:53:14.227926  scan_static_bus for USB3 port 2 done
  999 09:53:14.234908  scan_bus: scanning of bus USB3 port 2 took 9711 usecs
 1000 09:53:14.235492  USB3 port 3 scanning...
 1001 09:53:14.237977  scan_static_bus for USB3 port 3
 1002 09:53:14.241374  scan_static_bus for USB3 port 3 done
 1003 09:53:14.247616  scan_bus: scanning of bus USB3 port 3 took 9708 usecs
 1004 09:53:14.250821  scan_static_bus for USB0 port 0 done
 1005 09:53:14.257978  scan_bus: scanning of bus USB0 port 0 took 155405 usecs
 1006 09:53:14.261084  scan_static_bus for PCI: 00:14.0 done
 1007 09:53:14.267755  scan_bus: scanning of bus PCI: 00:14.0 took 173031 usecs
 1008 09:53:14.268338  PCI: 00:15.0 scanning...
 1009 09:53:14.274271  scan_generic_bus for PCI: 00:15.0
 1010 09:53:14.277831  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1011 09:53:14.280980  scan_generic_bus for PCI: 00:15.0 done
 1012 09:53:14.287650  scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
 1013 09:53:14.288219  PCI: 00:15.1 scanning...
 1014 09:53:14.294545  scan_generic_bus for PCI: 00:15.1
 1015 09:53:14.297899  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1016 09:53:14.301307  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1017 09:53:14.303989  scan_generic_bus for PCI: 00:15.1 done
 1018 09:53:14.310904  scan_bus: scanning of bus PCI: 00:15.1 took 18605 usecs
 1019 09:53:14.314432  PCI: 00:19.0 scanning...
 1020 09:53:14.317639  scan_generic_bus for PCI: 00:19.0
 1021 09:53:14.320828  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1022 09:53:14.324102  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1023 09:53:14.327527  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1024 09:53:14.334441  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1025 09:53:14.337340  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1026 09:53:14.341308  scan_generic_bus for PCI: 00:19.0 done
 1027 09:53:14.347394  scan_bus: scanning of bus PCI: 00:19.0 took 30750 usecs
 1028 09:53:14.350574  PCI: 00:1d.0 scanning...
 1029 09:53:14.353953  do_pci_scan_bridge for PCI: 00:1d.0
 1030 09:53:14.357299  PCI: pci_scan_bus for bus 01
 1031 09:53:14.360665  PCI: 01:00.0 [1c5c/1327] enabled
 1032 09:53:14.364132  Enabling Common Clock Configuration
 1033 09:53:14.367648  L1 Sub-State supported from root port 29
 1034 09:53:14.370291  L1 Sub-State Support = 0xf
 1035 09:53:14.373824  CommonModeRestoreTime = 0x28
 1036 09:53:14.376809  Power On Value = 0x16, Power On Scale = 0x0
 1037 09:53:14.380664  ASPM: Enabled L1
 1038 09:53:14.383934  scan_bus: scanning of bus PCI: 00:1d.0 took 32806 usecs
 1039 09:53:14.386781  PCI: 00:1e.2 scanning...
 1040 09:53:14.390273  scan_generic_bus for PCI: 00:1e.2
 1041 09:53:14.393878  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1042 09:53:14.400414  scan_generic_bus for PCI: 00:1e.2 done
 1043 09:53:14.404000  scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
 1044 09:53:14.406955  PCI: 00:1e.3 scanning...
 1045 09:53:14.410191  scan_generic_bus for PCI: 00:1e.3
 1046 09:53:14.413929  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1047 09:53:14.417083  scan_generic_bus for PCI: 00:1e.3 done
 1048 09:53:14.423501  scan_bus: scanning of bus PCI: 00:1e.3 took 14010 usecs
 1049 09:53:14.426734  PCI: 00:1f.0 scanning...
 1050 09:53:14.430344  scan_static_bus for PCI: 00:1f.0
 1051 09:53:14.433933  PNP: 0c09.0 enabled
 1052 09:53:14.437145  scan_static_bus for PCI: 00:1f.0 done
 1053 09:53:14.440394  scan_bus: scanning of bus PCI: 00:1f.0 took 12067 usecs
 1054 09:53:14.443280  PCI: 00:1f.3 scanning...
 1055 09:53:14.450186  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
 1056 09:53:14.453695  PCI: 00:1f.4 scanning...
 1057 09:53:14.457336  scan_generic_bus for PCI: 00:1f.4
 1058 09:53:14.459933  scan_generic_bus for PCI: 00:1f.4 done
 1059 09:53:14.466458  scan_bus: scanning of bus PCI: 00:1f.4 took 10200 usecs
 1060 09:53:14.467049  PCI: 00:1f.5 scanning...
 1061 09:53:14.472891  scan_generic_bus for PCI: 00:1f.5
 1062 09:53:14.476502  scan_generic_bus for PCI: 00:1f.5 done
 1063 09:53:14.480164  scan_bus: scanning of bus PCI: 00:1f.5 took 10202 usecs
 1064 09:53:14.486603  scan_bus: scanning of bus DOMAIN: 0000 took 605188 usecs
 1065 09:53:14.489931  scan_static_bus for Root Device done
 1066 09:53:14.497261  scan_bus: scanning of bus Root Device took 625056 usecs
 1067 09:53:14.497851  done
 1068 09:53:14.499937  Chrome EC: UHEPI supported
 1069 09:53:14.506226  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1070 09:53:14.512778  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1071 09:53:14.519891  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1072 09:53:14.526176  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1073 09:53:14.529294  SPI flash protection: WPSW=0 SRP0=0
 1074 09:53:14.532795  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1075 09:53:14.539154  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
 1076 09:53:14.542917  found VGA at PCI: 00:02.0
 1077 09:53:14.546193  Setting up VGA for PCI: 00:02.0
 1078 09:53:14.549870  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1079 09:53:14.555910  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1080 09:53:14.556521  Allocating resources...
 1081 09:53:14.559150  Reading resources...
 1082 09:53:14.562659  Root Device read_resources bus 0 link: 0
 1083 09:53:14.569137  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1084 09:53:14.572611  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1085 09:53:14.579460  DOMAIN: 0000 read_resources bus 0 link: 0
 1086 09:53:14.582624  PCI: 00:14.0 read_resources bus 0 link: 0
 1087 09:53:14.589029  USB0 port 0 read_resources bus 0 link: 0
 1088 09:53:14.596493  USB0 port 0 read_resources bus 0 link: 0 done
 1089 09:53:14.599209  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1090 09:53:14.607035  PCI: 00:15.0 read_resources bus 1 link: 0
 1091 09:53:14.610204  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1092 09:53:14.616629  PCI: 00:15.1 read_resources bus 2 link: 0
 1093 09:53:14.620358  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1094 09:53:14.627929  PCI: 00:19.0 read_resources bus 3 link: 0
 1095 09:53:14.634336  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1096 09:53:14.637526  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 09:53:14.644317  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 09:53:14.647759  PCI: 00:1e.2 read_resources bus 4 link: 0
 1099 09:53:14.654001  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1100 09:53:14.658423  PCI: 00:1e.3 read_resources bus 5 link: 0
 1101 09:53:14.664312  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1102 09:53:14.667758  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 09:53:14.673855  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 09:53:14.680781  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1105 09:53:14.683816  Root Device read_resources bus 0 link: 0 done
 1106 09:53:14.687381  Done reading resources.
 1107 09:53:14.690771  Show resources in subtree (Root Device)...After reading.
 1108 09:53:14.697165   Root Device child on link 0 CPU_CLUSTER: 0
 1109 09:53:14.700655    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1110 09:53:14.701272     APIC: 00
 1111 09:53:14.704182     APIC: 02
 1112 09:53:14.704762     APIC: 01
 1113 09:53:14.707196     APIC: 03
 1114 09:53:14.707690     APIC: 04
 1115 09:53:14.708103     APIC: 05
 1116 09:53:14.710607     APIC: 07
 1117 09:53:14.711093     APIC: 06
 1118 09:53:14.713554    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1119 09:53:14.723796    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1120 09:53:14.780125    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1121 09:53:14.780726     PCI: 00:00.0
 1122 09:53:14.781570     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1123 09:53:14.781981     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1124 09:53:14.782776     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1125 09:53:14.783550     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1126 09:53:14.796588     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1127 09:53:14.797248     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1128 09:53:14.803478     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1129 09:53:14.810136     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1130 09:53:14.820281     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1131 09:53:14.829857     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1132 09:53:14.840053     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1133 09:53:14.846518     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1134 09:53:14.856822     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1135 09:53:14.866554     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1136 09:53:14.876385     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1137 09:53:14.886238     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1138 09:53:14.886805     PCI: 00:02.0
 1139 09:53:14.896109     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1140 09:53:14.909390     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1141 09:53:14.915773     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1142 09:53:14.919852     PCI: 00:04.0
 1143 09:53:14.920450     PCI: 00:08.0
 1144 09:53:14.929504     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1145 09:53:14.933170     PCI: 00:12.0
 1146 09:53:14.942752     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1147 09:53:14.945945     PCI: 00:14.0 child on link 0 USB0 port 0
 1148 09:53:14.956124     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1149 09:53:14.958983      USB0 port 0 child on link 0 USB2 port 0
 1150 09:53:14.962587       USB2 port 0
 1151 09:53:14.963170       USB2 port 1
 1152 09:53:14.966272       USB2 port 2
 1153 09:53:14.966859       USB2 port 3
 1154 09:53:14.969259       USB2 port 5
 1155 09:53:14.972513       USB2 port 6
 1156 09:53:14.973174       USB2 port 9
 1157 09:53:14.975731       USB3 port 0
 1158 09:53:14.976212       USB3 port 1
 1159 09:53:14.978503       USB3 port 2
 1160 09:53:14.978984       USB3 port 3
 1161 09:53:14.981911       USB3 port 4
 1162 09:53:14.982392     PCI: 00:14.2
 1163 09:53:14.992493     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1164 09:53:15.002432     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1165 09:53:15.006146     PCI: 00:14.3
 1166 09:53:15.015561     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1167 09:53:15.018380     PCI: 00:15.0 child on link 0 I2C: 01:15
 1168 09:53:15.029211     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1169 09:53:15.029794      I2C: 01:15
 1170 09:53:15.035237     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1171 09:53:15.045026     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1172 09:53:15.045520      I2C: 02:5d
 1173 09:53:15.048609      GENERIC: 0.0
 1174 09:53:15.049144     PCI: 00:16.0
 1175 09:53:15.058667     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1176 09:53:15.062304     PCI: 00:17.0
 1177 09:53:15.071886     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1178 09:53:15.078238     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1179 09:53:15.088097     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1180 09:53:15.095187     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1181 09:53:15.104811     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1182 09:53:15.111478     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1183 09:53:15.118025     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1184 09:53:15.128115     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 09:53:15.128712      I2C: 03:1a
 1186 09:53:15.131608      I2C: 03:38
 1187 09:53:15.132185      I2C: 03:39
 1188 09:53:15.134447      I2C: 03:3a
 1189 09:53:15.134927      I2C: 03:3b
 1190 09:53:15.138222     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1191 09:53:15.148395     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1192 09:53:15.157779     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1193 09:53:15.168156     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1194 09:53:15.168766      PCI: 01:00.0
 1195 09:53:15.177799      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1196 09:53:15.180763     PCI: 00:1e.0
 1197 09:53:15.190710     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1198 09:53:15.201328     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1199 09:53:15.204481     PCI: 00:1e.2 child on link 0 SPI: 00
 1200 09:53:15.214228     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1201 09:53:15.217258      SPI: 00
 1202 09:53:15.220905     PCI: 00:1e.3 child on link 0 SPI: 01
 1203 09:53:15.230597     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1204 09:53:15.231169      SPI: 01
 1205 09:53:15.237427     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1206 09:53:15.243731     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1207 09:53:15.253747     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1208 09:53:15.254329      PNP: 0c09.0
 1209 09:53:15.263894      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1210 09:53:15.267343     PCI: 00:1f.3
 1211 09:53:15.277422     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1212 09:53:15.287039     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1213 09:53:15.287609     PCI: 00:1f.4
 1214 09:53:15.297211     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1215 09:53:15.306574     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1216 09:53:15.307147     PCI: 00:1f.5
 1217 09:53:15.316699     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1218 09:53:15.323659  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1219 09:53:15.330474  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1220 09:53:15.337051  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1221 09:53:15.340131  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1222 09:53:15.343984  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1223 09:53:15.346784  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1224 09:53:15.350200  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1225 09:53:15.357014  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1226 09:53:15.363167  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1227 09:53:15.373376  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1228 09:53:15.380024  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1229 09:53:15.386276  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1230 09:53:15.392925  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1231 09:53:15.399950  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1232 09:53:15.403327  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1233 09:53:15.409186  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1234 09:53:15.412915  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1235 09:53:15.419220  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1236 09:53:15.422953  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1237 09:53:15.429055  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1238 09:53:15.432361  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1239 09:53:15.439451  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1240 09:53:15.442948  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1241 09:53:15.449372  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1242 09:53:15.452489  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1243 09:53:15.459677  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1244 09:53:15.462710  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1245 09:53:15.465887  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1246 09:53:15.472254  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1247 09:53:15.475455  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1248 09:53:15.482270  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1249 09:53:15.486017  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1250 09:53:15.492552  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1251 09:53:15.495052  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1252 09:53:15.502069  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1253 09:53:15.505323  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1254 09:53:15.512344  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1255 09:53:15.518619  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1256 09:53:15.521855  avoid_fixed_resources: DOMAIN: 0000
 1257 09:53:15.528311  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1258 09:53:15.535579  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1259 09:53:15.542509  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1260 09:53:15.551711  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1261 09:53:15.558624  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1262 09:53:15.565694  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1263 09:53:15.574907  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1264 09:53:15.581905  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1265 09:53:15.588325  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1266 09:53:15.595204  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1267 09:53:15.605069  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1268 09:53:15.611732  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1269 09:53:15.612439  Setting resources...
 1270 09:53:15.618900  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1271 09:53:15.624562  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1272 09:53:15.628547  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1273 09:53:15.631800  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1274 09:53:15.634858  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1275 09:53:15.641627  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1276 09:53:15.648161  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1277 09:53:15.655103  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1278 09:53:15.661359  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1279 09:53:15.668265  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1280 09:53:15.671343  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1281 09:53:15.677675  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1282 09:53:15.681038  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1283 09:53:15.687963  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1284 09:53:15.691059  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1285 09:53:15.697668  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1286 09:53:15.701166  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1287 09:53:15.704795  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1288 09:53:15.711016  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1289 09:53:15.714675  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1290 09:53:15.720930  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1291 09:53:15.724004  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1292 09:53:15.731036  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1293 09:53:15.734263  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1294 09:53:15.741512  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1295 09:53:15.744193  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1296 09:53:15.751525  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1297 09:53:15.754005  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1298 09:53:15.760721  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1299 09:53:15.764756  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1300 09:53:15.771157  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1301 09:53:15.774147  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1302 09:53:15.780979  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1303 09:53:15.787510  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1304 09:53:15.797144  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1305 09:53:15.803947  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1306 09:53:15.807415  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1307 09:53:15.816889  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1308 09:53:15.820847  Root Device assign_resources, bus 0 link: 0
 1309 09:53:15.823567  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1310 09:53:15.834231  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1311 09:53:15.841178  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1312 09:53:15.851115  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1313 09:53:15.857398  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1314 09:53:15.867371  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1315 09:53:15.874027  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1316 09:53:15.880571  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1317 09:53:15.883805  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1318 09:53:15.894021  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1319 09:53:15.900289  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1320 09:53:15.906918  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1321 09:53:15.917060  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1322 09:53:15.920604  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1323 09:53:15.926994  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1324 09:53:15.933914  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1325 09:53:15.940099  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1326 09:53:15.944042  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1327 09:53:15.949883  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1328 09:53:15.960479  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1329 09:53:15.967187  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1330 09:53:15.976938  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1331 09:53:15.983531  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1332 09:53:15.990551  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1333 09:53:16.000275  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1334 09:53:16.006615  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1335 09:53:16.009845  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1336 09:53:16.016594  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1337 09:53:16.022967  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1338 09:53:16.033133  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1339 09:53:16.043465  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1340 09:53:16.046435  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1341 09:53:16.056102  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1342 09:53:16.059909  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1343 09:53:16.069442  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1344 09:53:16.075788  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1345 09:53:16.079363  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1346 09:53:16.086206  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1347 09:53:16.092600  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1348 09:53:16.099528  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1349 09:53:16.102784  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1350 09:53:16.109373  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1351 09:53:16.112484  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1352 09:53:16.119094  LPC: Trying to open IO window from 800 size 1ff
 1353 09:53:16.125600  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1354 09:53:16.136025  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1355 09:53:16.142412  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1356 09:53:16.151880  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1357 09:53:16.155451  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1358 09:53:16.158748  Root Device assign_resources, bus 0 link: 0
 1359 09:53:16.161874  Done setting resources.
 1360 09:53:16.168978  Show resources in subtree (Root Device)...After assigning values.
 1361 09:53:16.171918   Root Device child on link 0 CPU_CLUSTER: 0
 1362 09:53:16.178326    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1363 09:53:16.178801     APIC: 00
 1364 09:53:16.179167     APIC: 02
 1365 09:53:16.181694     APIC: 01
 1366 09:53:16.182162     APIC: 03
 1367 09:53:16.185004     APIC: 04
 1368 09:53:16.185480     APIC: 05
 1369 09:53:16.185841     APIC: 07
 1370 09:53:16.188681     APIC: 06
 1371 09:53:16.191958    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1372 09:53:16.201332    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1373 09:53:16.212015    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1374 09:53:16.214650     PCI: 00:00.0
 1375 09:53:16.224548     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1376 09:53:16.234761     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1377 09:53:16.241342     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1378 09:53:16.251251     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1379 09:53:16.261247     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1380 09:53:16.271363     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1381 09:53:16.280851     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1382 09:53:16.291152     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1383 09:53:16.297468     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1384 09:53:16.307436     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1385 09:53:16.317295     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1386 09:53:16.327322     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1387 09:53:16.337539     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1388 09:53:16.347165     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1389 09:53:16.356689     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1390 09:53:16.363916     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1391 09:53:16.366541     PCI: 00:02.0
 1392 09:53:16.377060     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1393 09:53:16.386931     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1394 09:53:16.397155     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1395 09:53:16.400029     PCI: 00:04.0
 1396 09:53:16.400629     PCI: 00:08.0
 1397 09:53:16.409540     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1398 09:53:16.412814     PCI: 00:12.0
 1399 09:53:16.422958     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1400 09:53:16.426681     PCI: 00:14.0 child on link 0 USB0 port 0
 1401 09:53:16.435981     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1402 09:53:16.443050      USB0 port 0 child on link 0 USB2 port 0
 1403 09:53:16.443638       USB2 port 0
 1404 09:53:16.446456       USB2 port 1
 1405 09:53:16.447037       USB2 port 2
 1406 09:53:16.449462       USB2 port 3
 1407 09:53:16.449947       USB2 port 5
 1408 09:53:16.453103       USB2 port 6
 1409 09:53:16.453681       USB2 port 9
 1410 09:53:16.456425       USB3 port 0
 1411 09:53:16.457038       USB3 port 1
 1412 09:53:16.459361       USB3 port 2
 1413 09:53:16.459931       USB3 port 3
 1414 09:53:16.463156       USB3 port 4
 1415 09:53:16.463777     PCI: 00:14.2
 1416 09:53:16.476059     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1417 09:53:16.486659     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1418 09:53:16.487246     PCI: 00:14.3
 1419 09:53:16.495754     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1420 09:53:16.502588     PCI: 00:15.0 child on link 0 I2C: 01:15
 1421 09:53:16.512991     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1422 09:53:16.513582      I2C: 01:15
 1423 09:53:16.515737     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1424 09:53:16.528998     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1425 09:53:16.529494      I2C: 02:5d
 1426 09:53:16.532463      GENERIC: 0.0
 1427 09:53:16.533008     PCI: 00:16.0
 1428 09:53:16.542508     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1429 09:53:16.545529     PCI: 00:17.0
 1430 09:53:16.555603     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1431 09:53:16.565854     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1432 09:53:16.575091     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1433 09:53:16.582286     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1434 09:53:16.592350     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1435 09:53:16.601999     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1436 09:53:16.605210     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1437 09:53:16.618674     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1438 09:53:16.619244      I2C: 03:1a
 1439 09:53:16.619627      I2C: 03:38
 1440 09:53:16.621641      I2C: 03:39
 1441 09:53:16.622121      I2C: 03:3a
 1442 09:53:16.625322      I2C: 03:3b
 1443 09:53:16.628311     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1444 09:53:16.638775     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1445 09:53:16.648272     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1446 09:53:16.658433     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1447 09:53:16.661325      PCI: 01:00.0
 1448 09:53:16.672379      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1449 09:53:16.672998     PCI: 00:1e.0
 1450 09:53:16.684695     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1451 09:53:16.694619     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1452 09:53:16.697876     PCI: 00:1e.2 child on link 0 SPI: 00
 1453 09:53:16.707835     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1454 09:53:16.710865      SPI: 00
 1455 09:53:16.714168     PCI: 00:1e.3 child on link 0 SPI: 01
 1456 09:53:16.724315     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1457 09:53:16.724898      SPI: 01
 1458 09:53:16.731123     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1459 09:53:16.737378     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1460 09:53:16.747842     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1461 09:53:16.748429      PNP: 0c09.0
 1462 09:53:16.757959      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1463 09:53:16.761118     PCI: 00:1f.3
 1464 09:53:16.770575     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1465 09:53:16.780846     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1466 09:53:16.781495     PCI: 00:1f.4
 1467 09:53:16.790743     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1468 09:53:16.800695     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1469 09:53:16.803834     PCI: 00:1f.5
 1470 09:53:16.813874     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1471 09:53:16.816865  Done allocating resources.
 1472 09:53:16.819779  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1473 09:53:16.823199  Enabling resources...
 1474 09:53:16.830155  PCI: 00:00.0 subsystem <- 8086/9b61
 1475 09:53:16.830647  PCI: 00:00.0 cmd <- 06
 1476 09:53:16.833722  PCI: 00:02.0 subsystem <- 8086/9b41
 1477 09:53:16.836717  PCI: 00:02.0 cmd <- 03
 1478 09:53:16.839946  PCI: 00:08.0 cmd <- 06
 1479 09:53:16.843242  PCI: 00:12.0 subsystem <- 8086/02f9
 1480 09:53:16.847615  PCI: 00:12.0 cmd <- 02
 1481 09:53:16.849706  PCI: 00:14.0 subsystem <- 8086/02ed
 1482 09:53:16.852820  PCI: 00:14.0 cmd <- 02
 1483 09:53:16.856503  PCI: 00:14.2 cmd <- 02
 1484 09:53:16.860098  PCI: 00:14.3 subsystem <- 8086/02f0
 1485 09:53:16.860690  PCI: 00:14.3 cmd <- 02
 1486 09:53:16.866900  PCI: 00:15.0 subsystem <- 8086/02e8
 1487 09:53:16.867491  PCI: 00:15.0 cmd <- 02
 1488 09:53:16.870346  PCI: 00:15.1 subsystem <- 8086/02e9
 1489 09:53:16.873390  PCI: 00:15.1 cmd <- 02
 1490 09:53:16.876257  PCI: 00:16.0 subsystem <- 8086/02e0
 1491 09:53:16.879712  PCI: 00:16.0 cmd <- 02
 1492 09:53:16.882611  PCI: 00:17.0 subsystem <- 8086/02d3
 1493 09:53:16.886835  PCI: 00:17.0 cmd <- 03
 1494 09:53:16.889648  PCI: 00:19.0 subsystem <- 8086/02c5
 1495 09:53:16.893257  PCI: 00:19.0 cmd <- 02
 1496 09:53:16.896324  PCI: 00:1d.0 bridge ctrl <- 0013
 1497 09:53:16.899644  PCI: 00:1d.0 subsystem <- 8086/02b0
 1498 09:53:16.902968  PCI: 00:1d.0 cmd <- 06
 1499 09:53:16.906650  PCI: 00:1e.0 subsystem <- 8086/02a8
 1500 09:53:16.909686  PCI: 00:1e.0 cmd <- 06
 1501 09:53:16.912996  PCI: 00:1e.2 subsystem <- 8086/02aa
 1502 09:53:16.915663  PCI: 00:1e.2 cmd <- 06
 1503 09:53:16.919535  PCI: 00:1e.3 subsystem <- 8086/02ab
 1504 09:53:16.920025  PCI: 00:1e.3 cmd <- 02
 1505 09:53:16.926301  PCI: 00:1f.0 subsystem <- 8086/0284
 1506 09:53:16.926953  PCI: 00:1f.0 cmd <- 407
 1507 09:53:16.933216  PCI: 00:1f.3 subsystem <- 8086/02c8
 1508 09:53:16.933816  PCI: 00:1f.3 cmd <- 02
 1509 09:53:16.936212  PCI: 00:1f.4 subsystem <- 8086/02a3
 1510 09:53:16.939486  PCI: 00:1f.4 cmd <- 03
 1511 09:53:16.943433  PCI: 00:1f.5 subsystem <- 8086/02a4
 1512 09:53:16.945996  PCI: 00:1f.5 cmd <- 406
 1513 09:53:16.955056  PCI: 01:00.0 cmd <- 02
 1514 09:53:16.960163  done.
 1515 09:53:16.971138  ME: Version: 14.0.39.1367
 1516 09:53:16.977741  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
 1517 09:53:16.980654  Initializing devices...
 1518 09:53:16.981127  Root Device init ...
 1519 09:53:16.987725  Chrome EC: Set SMI mask to 0x0000000000000000
 1520 09:53:16.990656  Chrome EC: clear events_b mask to 0x0000000000000000
 1521 09:53:16.997327  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1522 09:53:17.004246  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1523 09:53:17.010537  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1524 09:53:17.013608  Chrome EC: Set WAKE mask to 0x0000000000000000
 1525 09:53:17.020379  Root Device init finished in 35176 usecs
 1526 09:53:17.020985  CPU_CLUSTER: 0 init ...
 1527 09:53:17.026673  CPU_CLUSTER: 0 init finished in 2449 usecs
 1528 09:53:17.031874  PCI: 00:00.0 init ...
 1529 09:53:17.034815  CPU TDP: 15 Watts
 1530 09:53:17.038993  CPU PL2 = 64 Watts
 1531 09:53:17.041758  PCI: 00:00.0 init finished in 7082 usecs
 1532 09:53:17.044760  PCI: 00:02.0 init ...
 1533 09:53:17.048372  PCI: 00:02.0 init finished in 2254 usecs
 1534 09:53:17.051410  PCI: 00:08.0 init ...
 1535 09:53:17.054806  PCI: 00:08.0 init finished in 2253 usecs
 1536 09:53:17.058050  PCI: 00:12.0 init ...
 1537 09:53:17.061812  PCI: 00:12.0 init finished in 2253 usecs
 1538 09:53:17.065522  PCI: 00:14.0 init ...
 1539 09:53:17.068288  PCI: 00:14.0 init finished in 2244 usecs
 1540 09:53:17.071902  PCI: 00:14.2 init ...
 1541 09:53:17.074706  PCI: 00:14.2 init finished in 2253 usecs
 1542 09:53:17.077825  PCI: 00:14.3 init ...
 1543 09:53:17.081306  PCI: 00:14.3 init finished in 2271 usecs
 1544 09:53:17.084454  PCI: 00:15.0 init ...
 1545 09:53:17.088351  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1546 09:53:17.091030  PCI: 00:15.0 init finished in 5977 usecs
 1547 09:53:17.094749  PCI: 00:15.1 init ...
 1548 09:53:17.098238  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1549 09:53:17.104507  PCI: 00:15.1 init finished in 5976 usecs
 1550 09:53:17.105133  PCI: 00:16.0 init ...
 1551 09:53:17.111227  PCI: 00:16.0 init finished in 2244 usecs
 1552 09:53:17.114108  PCI: 00:19.0 init ...
 1553 09:53:17.117614  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1554 09:53:17.120793  PCI: 00:19.0 init finished in 5979 usecs
 1555 09:53:17.123804  PCI: 00:1d.0 init ...
 1556 09:53:17.127219  Initializing PCH PCIe bridge.
 1557 09:53:17.131277  PCI: 00:1d.0 init finished in 5286 usecs
 1558 09:53:17.134140  PCI: 00:1f.0 init ...
 1559 09:53:17.137015  IOAPIC: Initializing IOAPIC at 0xfec00000
 1560 09:53:17.144169  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1561 09:53:17.144761  IOAPIC: ID = 0x02
 1562 09:53:17.147189  IOAPIC: Dumping registers
 1563 09:53:17.150626    reg 0x0000: 0x02000000
 1564 09:53:17.153692    reg 0x0001: 0x00770020
 1565 09:53:17.154180    reg 0x0002: 0x00000000
 1566 09:53:17.160272  PCI: 00:1f.0 init finished in 23555 usecs
 1567 09:53:17.164048  PCI: 00:1f.4 init ...
 1568 09:53:17.167482  PCI: 00:1f.4 init finished in 2264 usecs
 1569 09:53:17.178098  PCI: 01:00.0 init ...
 1570 09:53:17.181118  PCI: 01:00.0 init finished in 2253 usecs
 1571 09:53:17.185341  PNP: 0c09.0 init ...
 1572 09:53:17.189229  Google Chrome EC uptime: 11.105 seconds
 1573 09:53:17.195428  Google Chrome AP resets since EC boot: 0
 1574 09:53:17.198806  Google Chrome most recent AP reset causes:
 1575 09:53:17.205584  Google Chrome EC reset flags at last EC boot: reset-pin
 1576 09:53:17.208937  PNP: 0c09.0 init finished in 20636 usecs
 1577 09:53:17.212229  Devices initialized
 1578 09:53:17.214829  Show all devs... After init.
 1579 09:53:17.215317  Root Device: enabled 1
 1580 09:53:17.218550  CPU_CLUSTER: 0: enabled 1
 1581 09:53:17.222211  DOMAIN: 0000: enabled 1
 1582 09:53:17.222708  APIC: 00: enabled 1
 1583 09:53:17.224689  PCI: 00:00.0: enabled 1
 1584 09:53:17.228366  PCI: 00:02.0: enabled 1
 1585 09:53:17.231355  PCI: 00:04.0: enabled 0
 1586 09:53:17.231839  PCI: 00:05.0: enabled 0
 1587 09:53:17.235274  PCI: 00:12.0: enabled 1
 1588 09:53:17.237770  PCI: 00:12.5: enabled 0
 1589 09:53:17.241341  PCI: 00:12.6: enabled 0
 1590 09:53:17.241814  PCI: 00:14.0: enabled 1
 1591 09:53:17.244645  PCI: 00:14.1: enabled 0
 1592 09:53:17.248484  PCI: 00:14.3: enabled 1
 1593 09:53:17.251806  PCI: 00:14.5: enabled 0
 1594 09:53:17.252284  PCI: 00:15.0: enabled 1
 1595 09:53:17.254465  PCI: 00:15.1: enabled 1
 1596 09:53:17.258243  PCI: 00:15.2: enabled 0
 1597 09:53:17.258717  PCI: 00:15.3: enabled 0
 1598 09:53:17.261269  PCI: 00:16.0: enabled 1
 1599 09:53:17.264765  PCI: 00:16.1: enabled 0
 1600 09:53:17.267840  PCI: 00:16.2: enabled 0
 1601 09:53:17.268424  PCI: 00:16.3: enabled 0
 1602 09:53:17.271428  PCI: 00:16.4: enabled 0
 1603 09:53:17.274753  PCI: 00:16.5: enabled 0
 1604 09:53:17.277785  PCI: 00:17.0: enabled 1
 1605 09:53:17.278293  PCI: 00:19.0: enabled 1
 1606 09:53:17.281583  PCI: 00:19.1: enabled 0
 1607 09:53:17.284395  PCI: 00:19.2: enabled 0
 1608 09:53:17.287477  PCI: 00:1a.0: enabled 0
 1609 09:53:17.287958  PCI: 00:1c.0: enabled 0
 1610 09:53:17.291017  PCI: 00:1c.1: enabled 0
 1611 09:53:17.294318  PCI: 00:1c.2: enabled 0
 1612 09:53:17.294966  PCI: 00:1c.3: enabled 0
 1613 09:53:17.297932  PCI: 00:1c.4: enabled 0
 1614 09:53:17.301237  PCI: 00:1c.5: enabled 0
 1615 09:53:17.304666  PCI: 00:1c.6: enabled 0
 1616 09:53:17.305276  PCI: 00:1c.7: enabled 0
 1617 09:53:17.307680  PCI: 00:1d.0: enabled 1
 1618 09:53:17.311102  PCI: 00:1d.1: enabled 0
 1619 09:53:17.314019  PCI: 00:1d.2: enabled 0
 1620 09:53:17.314501  PCI: 00:1d.3: enabled 0
 1621 09:53:17.317366  PCI: 00:1d.4: enabled 0
 1622 09:53:17.320660  PCI: 00:1d.5: enabled 0
 1623 09:53:17.324404  PCI: 00:1e.0: enabled 1
 1624 09:53:17.324891  PCI: 00:1e.1: enabled 0
 1625 09:53:17.327495  PCI: 00:1e.2: enabled 1
 1626 09:53:17.330591  PCI: 00:1e.3: enabled 1
 1627 09:53:17.334037  PCI: 00:1f.0: enabled 1
 1628 09:53:17.334518  PCI: 00:1f.1: enabled 0
 1629 09:53:17.336929  PCI: 00:1f.2: enabled 0
 1630 09:53:17.340520  PCI: 00:1f.3: enabled 1
 1631 09:53:17.341154  PCI: 00:1f.4: enabled 1
 1632 09:53:17.344010  PCI: 00:1f.5: enabled 1
 1633 09:53:17.347132  PCI: 00:1f.6: enabled 0
 1634 09:53:17.350506  USB0 port 0: enabled 1
 1635 09:53:17.351091  I2C: 01:15: enabled 1
 1636 09:53:17.353737  I2C: 02:5d: enabled 1
 1637 09:53:17.357267  GENERIC: 0.0: enabled 1
 1638 09:53:17.357747  I2C: 03:1a: enabled 1
 1639 09:53:17.360336  I2C: 03:38: enabled 1
 1640 09:53:17.363694  I2C: 03:39: enabled 1
 1641 09:53:17.364281  I2C: 03:3a: enabled 1
 1642 09:53:17.367137  I2C: 03:3b: enabled 1
 1643 09:53:17.370899  PCI: 00:00.0: enabled 1
 1644 09:53:17.371486  SPI: 00: enabled 1
 1645 09:53:17.373657  SPI: 01: enabled 1
 1646 09:53:17.377123  PNP: 0c09.0: enabled 1
 1647 09:53:17.377749  USB2 port 0: enabled 1
 1648 09:53:17.380158  USB2 port 1: enabled 1
 1649 09:53:17.384034  USB2 port 2: enabled 0
 1650 09:53:17.387101  USB2 port 3: enabled 0
 1651 09:53:17.387699  USB2 port 5: enabled 0
 1652 09:53:17.389801  USB2 port 6: enabled 1
 1653 09:53:17.393917  USB2 port 9: enabled 1
 1654 09:53:17.394509  USB3 port 0: enabled 1
 1655 09:53:17.396753  USB3 port 1: enabled 1
 1656 09:53:17.400084  USB3 port 2: enabled 1
 1657 09:53:17.404148  USB3 port 3: enabled 1
 1658 09:53:17.404746  USB3 port 4: enabled 0
 1659 09:53:17.406813  APIC: 02: enabled 1
 1660 09:53:17.407402  APIC: 01: enabled 1
 1661 09:53:17.410487  APIC: 03: enabled 1
 1662 09:53:17.413541  APIC: 04: enabled 1
 1663 09:53:17.414142  APIC: 05: enabled 1
 1664 09:53:17.416978  APIC: 07: enabled 1
 1665 09:53:17.419820  APIC: 06: enabled 1
 1666 09:53:17.420304  PCI: 00:08.0: enabled 1
 1667 09:53:17.423408  PCI: 00:14.2: enabled 1
 1668 09:53:17.426433  PCI: 01:00.0: enabled 1
 1669 09:53:17.429883  Disabling ACPI via APMC:
 1670 09:53:17.433268  done.
 1671 09:53:17.436772  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1672 09:53:17.440077  ELOG: NV offset 0xaf0000 size 0x4000
 1673 09:53:17.447213  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1674 09:53:17.453544  ELOG: Event(17) added with size 13 at 2022-08-12 09:53:13 UTC
 1675 09:53:17.460340  ELOG: Event(92) added with size 9 at 2022-08-12 09:53:13 UTC
 1676 09:53:17.467020  ELOG: Event(93) added with size 9 at 2022-08-12 09:53:13 UTC
 1677 09:53:17.473573  ELOG: Event(9A) added with size 9 at 2022-08-12 09:53:13 UTC
 1678 09:53:17.479993  ELOG: Event(9E) added with size 10 at 2022-08-12 09:53:13 UTC
 1679 09:53:17.487018  ELOG: Event(9F) added with size 14 at 2022-08-12 09:53:13 UTC
 1680 09:53:17.490515  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
 1681 09:53:17.497126  ELOG: Event(A1) added with size 10 at 2022-08-12 09:53:13 UTC
 1682 09:53:17.508154  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1683 09:53:17.513995  ELOG: Event(A0) added with size 9 at 2022-08-12 09:53:13 UTC
 1684 09:53:17.517194  elog_add_boot_reason: Logged dev mode boot
 1685 09:53:17.520719  Finalize devices...
 1686 09:53:17.521343  PCI: 00:17.0 final
 1687 09:53:17.523858  Devices finalized
 1688 09:53:17.527193  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1689 09:53:17.533628  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1690 09:53:17.537106  ME: HFSTS1                  : 0x90000245
 1691 09:53:17.540323  ME: HFSTS2                  : 0x3B850126
 1692 09:53:17.546855  ME: HFSTS3                  : 0x00000020
 1693 09:53:17.550026  ME: HFSTS4                  : 0x00004800
 1694 09:53:17.553580  ME: HFSTS5                  : 0x00000000
 1695 09:53:17.557000  ME: HFSTS6                  : 0x40400006
 1696 09:53:17.559915  ME: Manufacturing Mode      : NO
 1697 09:53:17.563500  ME: FW Partition Table      : OK
 1698 09:53:17.567023  ME: Bringup Loader Failure  : NO
 1699 09:53:17.570307  ME: Firmware Init Complete  : YES
 1700 09:53:17.573186  ME: Boot Options Present    : NO
 1701 09:53:17.576770  ME: Update In Progress      : NO
 1702 09:53:17.580806  ME: D0i3 Support            : YES
 1703 09:53:17.583407  ME: Low Power State Enabled : NO
 1704 09:53:17.586531  ME: CPU Replaced            : NO
 1705 09:53:17.590236  ME: CPU Replacement Valid   : YES
 1706 09:53:17.593918  ME: Current Working State   : 5
 1707 09:53:17.596670  ME: Current Operation State : 1
 1708 09:53:17.599930  ME: Current Operation Mode  : 0
 1709 09:53:17.603416  ME: Error Code              : 0
 1710 09:53:17.606551  ME: CPU Debug Disabled      : YES
 1711 09:53:17.609865  ME: TXT Support             : NO
 1712 09:53:17.616840  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1713 09:53:17.623094  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1714 09:53:17.623682  CBFS @ c08000 size 3f8000
 1715 09:53:17.629367  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1716 09:53:17.633128  CBFS: Locating 'fallback/dsdt.aml'
 1717 09:53:17.636075  CBFS: Found @ offset 10bb80 size 3fa5
 1718 09:53:17.642914  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1719 09:53:17.646088  CBFS @ c08000 size 3f8000
 1720 09:53:17.649392  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1721 09:53:17.653325  CBFS: Locating 'fallback/slic'
 1722 09:53:17.658531  CBFS: 'fallback/slic' not found.
 1723 09:53:17.665144  ACPI: Writing ACPI tables at 99b3e000.
 1724 09:53:17.665736  ACPI:    * FACS
 1725 09:53:17.668415  ACPI:    * DSDT
 1726 09:53:17.671328  Ramoops buffer: 0x100000@0x99a3d000.
 1727 09:53:17.674249  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1728 09:53:17.681475  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1729 09:53:17.684405  Google Chrome EC: version:
 1730 09:53:17.687733  	ro: helios_v2.0.2659-56403530b
 1731 09:53:17.691051  	rw: helios_v2.0.2849-c41de27e7d
 1732 09:53:17.691635    running image: 1
 1733 09:53:17.695268  ACPI:    * FADT
 1734 09:53:17.695848  SCI is IRQ9
 1735 09:53:17.702289  ACPI: added table 1/32, length now 40
 1736 09:53:17.702871  ACPI:     * SSDT
 1737 09:53:17.705597  Found 1 CPU(s) with 8 core(s) each.
 1738 09:53:17.709094  Error: Could not locate 'wifi_sar' in VPD.
 1739 09:53:17.715485  Checking CBFS for default SAR values
 1740 09:53:17.718738  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1741 09:53:17.722064  CBFS @ c08000 size 3f8000
 1742 09:53:17.729140  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1743 09:53:17.731752  CBFS: Locating 'wifi_sar_defaults.hex'
 1744 09:53:17.735753  CBFS: Found @ offset 5fac0 size 77
 1745 09:53:17.738818  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1746 09:53:17.744899  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1747 09:53:17.748617  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1748 09:53:17.754834  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1749 09:53:17.758270  failed to find key in VPD: dsm_calib_r0_0
 1750 09:53:17.767952  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1751 09:53:17.772044  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1752 09:53:17.774447  failed to find key in VPD: dsm_calib_r0_1
 1753 09:53:17.784635  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1754 09:53:17.791579  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1755 09:53:17.794576  failed to find key in VPD: dsm_calib_r0_2
 1756 09:53:17.804418  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1757 09:53:17.808064  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1758 09:53:17.814519  failed to find key in VPD: dsm_calib_r0_3
 1759 09:53:17.820847  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1760 09:53:17.827731  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1761 09:53:17.830811  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1762 09:53:17.837585  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1763 09:53:17.841091  EC returned error result code 1
 1764 09:53:17.844709  EC returned error result code 1
 1765 09:53:17.847898  EC returned error result code 1
 1766 09:53:17.851446  PS2K: Bad resp from EC. Vivaldi disabled!
 1767 09:53:17.857965  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1768 09:53:17.864463  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1769 09:53:17.868190  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1770 09:53:17.874720  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1771 09:53:17.877692  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1772 09:53:17.884690  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1773 09:53:17.890818  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1774 09:53:17.898124  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1775 09:53:17.901492  ACPI: added table 2/32, length now 44
 1776 09:53:17.902081  ACPI:    * MCFG
 1777 09:53:17.907736  ACPI: added table 3/32, length now 48
 1778 09:53:17.908316  ACPI:    * TPM2
 1779 09:53:17.911302  TPM2 log created at 99a2d000
 1780 09:53:17.914255  ACPI: added table 4/32, length now 52
 1781 09:53:17.917919  ACPI:    * MADT
 1782 09:53:17.918499  SCI is IRQ9
 1783 09:53:17.921156  ACPI: added table 5/32, length now 56
 1784 09:53:17.924099  current = 99b43ac0
 1785 09:53:17.924615  ACPI:    * DMAR
 1786 09:53:17.927077  ACPI: added table 6/32, length now 60
 1787 09:53:17.930746  ACPI:    * IGD OpRegion
 1788 09:53:17.934098  GMA: Found VBT in CBFS
 1789 09:53:17.937159  GMA: Found valid VBT in CBFS
 1790 09:53:17.940939  ACPI: added table 7/32, length now 64
 1791 09:53:17.941499  ACPI:    * HPET
 1792 09:53:17.944002  ACPI: added table 8/32, length now 68
 1793 09:53:17.947381  ACPI: done.
 1794 09:53:17.950201  ACPI tables: 31744 bytes.
 1795 09:53:17.953959  smbios_write_tables: 99a2c000
 1796 09:53:17.957388  EC returned error result code 3
 1797 09:53:17.960712  Couldn't obtain OEM name from CBI
 1798 09:53:17.961323  Create SMBIOS type 17
 1799 09:53:17.964343  PCI: 00:00.0 (Intel Cannonlake)
 1800 09:53:17.967520  PCI: 00:14.3 (Intel WiFi)
 1801 09:53:17.970422  SMBIOS tables: 939 bytes.
 1802 09:53:17.973657  Writing table forward entry at 0x00000500
 1803 09:53:17.980211  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1804 09:53:17.983639  Writing coreboot table at 0x99b62000
 1805 09:53:17.990812   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1806 09:53:17.993599   1. 0000000000001000-000000000009ffff: RAM
 1807 09:53:18.000670   2. 00000000000a0000-00000000000fffff: RESERVED
 1808 09:53:18.003793   3. 0000000000100000-0000000099a2bfff: RAM
 1809 09:53:18.010161   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1810 09:53:18.013681   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1811 09:53:18.020184   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1812 09:53:18.026517   7. 000000009a000000-000000009f7fffff: RESERVED
 1813 09:53:18.029882   8. 00000000e0000000-00000000efffffff: RESERVED
 1814 09:53:18.033133   9. 00000000fc000000-00000000fc000fff: RESERVED
 1815 09:53:18.039568  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1816 09:53:18.044021  11. 00000000fed10000-00000000fed17fff: RESERVED
 1817 09:53:18.050175  12. 00000000fed80000-00000000fed83fff: RESERVED
 1818 09:53:18.053173  13. 00000000fed90000-00000000fed91fff: RESERVED
 1819 09:53:18.059852  14. 00000000feda0000-00000000feda1fff: RESERVED
 1820 09:53:18.063124  15. 0000000100000000-000000045e7fffff: RAM
 1821 09:53:18.066262  Graphics framebuffer located at 0xc0000000
 1822 09:53:18.069434  Passing 5 GPIOs to payload:
 1823 09:53:18.076229              NAME |       PORT | POLARITY |     VALUE
 1824 09:53:18.079470     write protect |  undefined |     high |       low
 1825 09:53:18.086214               lid |  undefined |     high |      high
 1826 09:53:18.089520             power |  undefined |     high |       low
 1827 09:53:18.096322             oprom |  undefined |     high |       low
 1828 09:53:18.102649          EC in RW | 0x000000cb |     high |       low
 1829 09:53:18.103231  Board ID: 4
 1830 09:53:18.109543  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1831 09:53:18.110129  CBFS @ c08000 size 3f8000
 1832 09:53:18.116187  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1833 09:53:18.122651  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6b8a
 1834 09:53:18.125780  coreboot table: 1492 bytes.
 1835 09:53:18.129260  IMD ROOT    0. 99fff000 00001000
 1836 09:53:18.133307  IMD SMALL   1. 99ffe000 00001000
 1837 09:53:18.136199  FSP MEMORY  2. 99c4e000 003b0000
 1838 09:53:18.139360  CONSOLE     3. 99c2e000 00020000
 1839 09:53:18.143065  FMAP        4. 99c2d000 0000054e
 1840 09:53:18.145817  TIME STAMP  5. 99c2c000 00000910
 1841 09:53:18.149374  VBOOT WORK  6. 99c18000 00014000
 1842 09:53:18.152412  MRC DATA    7. 99c16000 00001958
 1843 09:53:18.155992  ROMSTG STCK 8. 99c15000 00001000
 1844 09:53:18.159487  AFTER CAR   9. 99c0b000 0000a000
 1845 09:53:18.162242  RAMSTAGE   10. 99baf000 0005c000
 1846 09:53:18.165599  REFCODE    11. 99b7a000 00035000
 1847 09:53:18.169327  SMM BACKUP 12. 99b6a000 00010000
 1848 09:53:18.172391  COREBOOT   13. 99b62000 00008000
 1849 09:53:18.176065  ACPI       14. 99b3e000 00024000
 1850 09:53:18.179371  ACPI GNVS  15. 99b3d000 00001000
 1851 09:53:18.182393  RAMOOPS    16. 99a3d000 00100000
 1852 09:53:18.185802  TPM2 TCGLOG17. 99a2d000 00010000
 1853 09:53:18.189120  SMBIOS     18. 99a2c000 00000800
 1854 09:53:18.189642  IMD small region:
 1855 09:53:18.192491    IMD ROOT    0. 99ffec00 00000400
 1856 09:53:18.196293    FSP RUNTIME 1. 99ffebe0 00000004
 1857 09:53:18.202344    EC HOSTEVENT 2. 99ffebc0 00000008
 1858 09:53:18.205876    POWER STATE 3. 99ffeb80 00000040
 1859 09:53:18.208904    ROMSTAGE    4. 99ffeb60 00000004
 1860 09:53:18.212437    MEM INFO    5. 99ffe9a0 000001b9
 1861 09:53:18.215692    VPD         6. 99ffe940 0000004c
 1862 09:53:18.219143  MTRR: Physical address space:
 1863 09:53:18.225539  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1864 09:53:18.232698  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1865 09:53:18.235307  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1866 09:53:18.242008  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1867 09:53:18.249005  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1868 09:53:18.255213  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1869 09:53:18.261829  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1870 09:53:18.265342  MTRR: Fixed MSR 0x250 0x0606060606060606
 1871 09:53:18.268308  MTRR: Fixed MSR 0x258 0x0606060606060606
 1872 09:53:18.275463  MTRR: Fixed MSR 0x259 0x0000000000000000
 1873 09:53:18.278260  MTRR: Fixed MSR 0x268 0x0606060606060606
 1874 09:53:18.281686  MTRR: Fixed MSR 0x269 0x0606060606060606
 1875 09:53:18.285318  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1876 09:53:18.291822  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1877 09:53:18.295092  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1878 09:53:18.298468  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1879 09:53:18.301594  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1880 09:53:18.308297  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1881 09:53:18.311412  call enable_fixed_mtrr()
 1882 09:53:18.315122  CPU physical address size: 39 bits
 1883 09:53:18.318141  MTRR: default type WB/UC MTRR counts: 6/8.
 1884 09:53:18.321595  MTRR: WB selected as default type.
 1885 09:53:18.327810  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1886 09:53:18.334452  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1887 09:53:18.341275  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1888 09:53:18.348274  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1889 09:53:18.351698  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1890 09:53:18.357461  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1891 09:53:18.361655  
 1892 09:53:18.362247  MTRR check
 1893 09:53:18.365479  Fixed MTRRs   : Enabled
 1894 09:53:18.366061  Variable MTRRs: Enabled
 1895 09:53:18.366438  
 1896 09:53:18.371419  MTRR: Fixed MSR 0x250 0x0606060606060606
 1897 09:53:18.374667  MTRR: Fixed MSR 0x258 0x0606060606060606
 1898 09:53:18.378017  MTRR: Fixed MSR 0x259 0x0000000000000000
 1899 09:53:18.381073  MTRR: Fixed MSR 0x268 0x0606060606060606
 1900 09:53:18.387930  MTRR: Fixed MSR 0x269 0x0606060606060606
 1901 09:53:18.391289  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1902 09:53:18.394786  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1903 09:53:18.397923  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1904 09:53:18.404288  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1905 09:53:18.407717  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1906 09:53:18.411079  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1907 09:53:18.417701  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1908 09:53:18.421003  call enable_fixed_mtrr()
 1909 09:53:18.424336  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1910 09:53:18.427102  CPU physical address size: 39 bits
 1911 09:53:18.430654  CBFS @ c08000 size 3f8000
 1912 09:53:18.437175  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1913 09:53:18.440452  CBFS: Locating 'fallback/payload'
 1914 09:53:18.443946  MTRR: Fixed MSR 0x250 0x0606060606060606
 1915 09:53:18.447829  MTRR: Fixed MSR 0x258 0x0606060606060606
 1916 09:53:18.450998  MTRR: Fixed MSR 0x259 0x0000000000000000
 1917 09:53:18.457171  MTRR: Fixed MSR 0x268 0x0606060606060606
 1918 09:53:18.460808  MTRR: Fixed MSR 0x269 0x0606060606060606
 1919 09:53:18.463963  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1920 09:53:18.467333  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1921 09:53:18.473564  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1922 09:53:18.477313  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1923 09:53:18.480064  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1924 09:53:18.484291  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1925 09:53:18.490461  MTRR: Fixed MSR 0x250 0x0606060606060606
 1926 09:53:18.493866  MTRR: Fixed MSR 0x258 0x0606060606060606
 1927 09:53:18.497585  MTRR: Fixed MSR 0x259 0x0000000000000000
 1928 09:53:18.500654  MTRR: Fixed MSR 0x268 0x0606060606060606
 1929 09:53:18.507390  MTRR: Fixed MSR 0x269 0x0606060606060606
 1930 09:53:18.511014  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1931 09:53:18.514118  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1932 09:53:18.517348  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1933 09:53:18.520311  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1934 09:53:18.527183  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1935 09:53:18.529927  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1936 09:53:18.533636  call enable_fixed_mtrr()
 1937 09:53:18.537189  call enable_fixed_mtrr()
 1938 09:53:18.540013  CPU physical address size: 39 bits
 1939 09:53:18.543424  CPU physical address size: 39 bits
 1940 09:53:18.546973  CBFS: Found @ offset 1c96c0 size 3f798
 1941 09:53:18.549874  MTRR: Fixed MSR 0x250 0x0606060606060606
 1942 09:53:18.553102  MTRR: Fixed MSR 0x250 0x0606060606060606
 1943 09:53:18.560157  MTRR: Fixed MSR 0x258 0x0606060606060606
 1944 09:53:18.563485  MTRR: Fixed MSR 0x259 0x0000000000000000
 1945 09:53:18.566866  MTRR: Fixed MSR 0x268 0x0606060606060606
 1946 09:53:18.570136  MTRR: Fixed MSR 0x269 0x0606060606060606
 1947 09:53:18.576287  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1948 09:53:18.579546  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1949 09:53:18.583014  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1950 09:53:18.586234  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1951 09:53:18.593159  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1952 09:53:18.596437  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1953 09:53:18.599203  MTRR: Fixed MSR 0x258 0x0606060606060606
 1954 09:53:18.603055  call enable_fixed_mtrr()
 1955 09:53:18.606055  MTRR: Fixed MSR 0x259 0x0000000000000000
 1956 09:53:18.609689  MTRR: Fixed MSR 0x268 0x0606060606060606
 1957 09:53:18.616169  MTRR: Fixed MSR 0x269 0x0606060606060606
 1958 09:53:18.619291  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1959 09:53:18.622727  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1960 09:53:18.625827  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1961 09:53:18.632160  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1962 09:53:18.635572  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1963 09:53:18.639079  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1964 09:53:18.642053  CPU physical address size: 39 bits
 1965 09:53:18.646427  call enable_fixed_mtrr()
 1966 09:53:18.649411  MTRR: Fixed MSR 0x250 0x0606060606060606
 1967 09:53:18.656239  MTRR: Fixed MSR 0x250 0x0606060606060606
 1968 09:53:18.659156  MTRR: Fixed MSR 0x258 0x0606060606060606
 1969 09:53:18.662221  MTRR: Fixed MSR 0x259 0x0000000000000000
 1970 09:53:18.665716  MTRR: Fixed MSR 0x268 0x0606060606060606
 1971 09:53:18.669070  MTRR: Fixed MSR 0x269 0x0606060606060606
 1972 09:53:18.675645  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1973 09:53:18.679256  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1974 09:53:18.682519  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1975 09:53:18.685475  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1976 09:53:18.692243  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1977 09:53:18.695215  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1978 09:53:18.698744  MTRR: Fixed MSR 0x258 0x0606060606060606
 1979 09:53:18.702923  call enable_fixed_mtrr()
 1980 09:53:18.705822  MTRR: Fixed MSR 0x259 0x0000000000000000
 1981 09:53:18.709231  MTRR: Fixed MSR 0x268 0x0606060606060606
 1982 09:53:18.715721  MTRR: Fixed MSR 0x269 0x0606060606060606
 1983 09:53:18.718583  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1984 09:53:18.721814  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1985 09:53:18.725589  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1986 09:53:18.731708  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1987 09:53:18.735298  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1988 09:53:18.738938  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1989 09:53:18.742054  CPU physical address size: 39 bits
 1990 09:53:18.745525  call enable_fixed_mtrr()
 1991 09:53:18.749253  CPU physical address size: 39 bits
 1992 09:53:18.752197  CPU physical address size: 39 bits
 1993 09:53:18.758732  Checking segment from ROM address 0xffdd16f8
 1994 09:53:18.761999  Checking segment from ROM address 0xffdd1714
 1995 09:53:18.765266  Loading segment from ROM address 0xffdd16f8
 1996 09:53:18.768628    code (compression=0)
 1997 09:53:18.775563    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 1998 09:53:18.785399  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 1999 09:53:18.788354  it's not compressed!
 2000 09:53:18.879765  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2001 09:53:18.886416  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2002 09:53:18.889996  Loading segment from ROM address 0xffdd1714
 2003 09:53:18.893475    Entry Point 0x30000000
 2004 09:53:18.897139  Loaded segments
 2005 09:53:18.902252  Finalizing chipset.
 2006 09:53:18.905589  Finalizing SMM.
 2007 09:53:18.908839  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 2008 09:53:18.912199  mp_park_aps done after 0 msecs.
 2009 09:53:18.918663  Jumping to boot code at 30000000(99b62000)
 2010 09:53:18.925563  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2011 09:53:18.926156  
 2012 09:53:18.928183  Starting depthcharge on Helios...
 2013 09:53:18.929604  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 2014 09:53:18.930360  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2015 09:53:18.930889  Setting prompt string to ['hatch:']
 2016 09:53:18.931466  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 2017 09:53:18.939088  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2018 09:53:18.944849  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2019 09:53:18.951890  board_setup: Info: eMMC controller not present; skipping
 2020 09:53:18.954823  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2021 09:53:18.962242  board_setup: Info: SDHCI controller not present; skipping
 2022 09:53:18.968517  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2023 09:53:18.969133  Wipe memory regions:
 2024 09:53:18.971448  	[0x00000000001000, 0x000000000a0000)
 2025 09:53:18.977801  	[0x00000000100000, 0x00000030000000)
 2026 09:53:19.043962  	[0x00000030657430, 0x00000099a2c000)
 2027 09:53:19.185639  	[0x00000100000000, 0x0000045e800000)
 2028 09:53:20.568478  R8152: Initializing
 2029 09:53:20.571610  Version 9 (ocp_data = 6010)
 2030 09:53:20.576538  R8152: Done initializing
 2031 09:53:20.579146  Adding net device
 2032 09:53:21.076219  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2033 09:53:21.076819  
 2034 09:53:21.077661  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2036 09:53:21.179331  hatch: tftpboot 192.168.201.1 7022998/tftp-deploy-tfm5a7wg/kernel/bzImage 7022998/tftp-deploy-tfm5a7wg/kernel/cmdline 7022998/tftp-deploy-tfm5a7wg/ramdisk/ramdisk.cpio.gz
 2037 09:53:21.180008  Setting prompt string to 'Starting kernel'
 2038 09:53:21.180419  Setting prompt string to ['Starting kernel']
 2039 09:53:21.180813  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2040 09:53:21.181246  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
 2041 09:53:21.185886  tftpboot 192.168.201.1 7022998/tftp-deploy-tfm5a7wg/kernel/bzImoy-tfm5a7wg/kernel/cmdline 7022998/tftp-deploy-tfm5a7wg/ramdisk/ramdisk.cpio.gz
 2042 09:53:21.186488  Waiting for link
 2043 09:53:21.386369  done.
 2044 09:53:21.386949  MAC: f4:f5:e8:50:dc:f7
 2045 09:53:21.389722  Sending DHCP discover... done.
 2046 09:53:21.393002  Waiting for reply... done.
 2047 09:53:21.396507  Sending DHCP request... done.
 2048 09:53:21.399845  Waiting for reply... done.
 2049 09:53:21.402506  My ip is 192.168.201.10
 2050 09:53:21.406022  The DHCP server ip is 192.168.201.1
 2051 09:53:21.409436  TFTP server IP predefined by user: 192.168.201.1
 2052 09:53:21.419161  Bootfile predefined by user: 7022998/tftp-deploy-tfm5a7wg/kernel/bzImage
 2053 09:53:21.422525  Sending tftp read request... done.
 2054 09:53:21.427622  Waiting for the transfer... 
 2055 09:53:21.718617  00000000 ################################################################
 2056 09:53:22.013732  00080000 ################################################################
 2057 09:53:22.279124  00100000 ################################################################
 2058 09:53:22.574883  00180000 ################################################################
 2059 09:53:22.819762  00200000 ################################################################
 2060 09:53:23.106102  00280000 ################################################################
 2061 09:53:23.357698  00300000 ################################################################
 2062 09:53:23.585387  00380000 ################################################################
 2063 09:53:23.850755  00400000 ################################################################
 2064 09:53:24.101708  00480000 ################################################################
 2065 09:53:24.353117  00500000 ################################################################
 2066 09:53:24.599392  00580000 ################################################################
 2067 09:53:24.895200  00600000 ################################################################ done.
 2068 09:53:24.898720  The bootfile was 6815632 bytes long.
 2069 09:53:24.901997  Sending tftp read request... done.
 2070 09:53:24.905280  Waiting for the transfer... 
 2071 09:53:25.265992  00000000 ################################################################
 2072 09:53:25.558752  00080000 ################################################################
 2073 09:53:25.853861  00100000 ################################################################
 2074 09:53:26.148724  00180000 ################################################################
 2075 09:53:26.443484  00200000 ################################################################
 2076 09:53:26.736694  00280000 ################################################################
 2077 09:53:27.032139  00300000 ################################################################
 2078 09:53:27.322950  00380000 ################################################################
 2079 09:53:27.591287  00400000 ################################################################
 2080 09:53:27.884384  00480000 ################################################################
 2081 09:53:28.006452  00500000 ############################# done.
 2082 09:53:28.010280  Sending tftp read request... done.
 2083 09:53:28.013182  Waiting for the transfer... 
 2084 09:53:28.013275  00000000 # done.
 2085 09:53:28.023457  Command line loaded dynamically from TFTP file: 7022998/tftp-deploy-tfm5a7wg/kernel/cmdline
 2086 09:53:28.049825  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7022998/extract-nfsrootfs-y_sn568m,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2087 09:53:28.056524  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2088 09:53:28.059505  Shutting down all USB controllers.
 2089 09:53:28.063287  Removing current net device
 2090 09:53:28.066549  Finalizing coreboot
 2091 09:53:28.073408  Exiting depthcharge with code 4 at timestamp: 16415572
 2092 09:53:28.073972  
 2093 09:53:28.074349  Starting kernel ...
 2094 09:53:28.074701  
 2095 09:53:28.075046  
 2096 09:53:28.075903  end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
 2097 09:53:28.076428  start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
 2098 09:53:28.076837  Setting prompt string to ['Linux version [0-9]']
 2099 09:53:28.077279  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2100 09:53:28.077685  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
 2102 09:58:00.076676  end: 2.2.5 auto-login-action (duration 00:04:32) [common]
 2104 09:58:00.076898  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
 2106 09:58:00.077104  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2109 09:58:00.077459  end: 2 depthcharge-action (duration 00:05:00) [common]
 2111 09:58:00.077658  Cleaning after the job
 2112 09:58:00.077741  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022998/tftp-deploy-tfm5a7wg/ramdisk
 2113 09:58:00.078202  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022998/tftp-deploy-tfm5a7wg/kernel
 2114 09:58:00.078693  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022998/tftp-deploy-tfm5a7wg/nfsrootfs
 2115 09:58:00.117923  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022998/tftp-deploy-tfm5a7wg/modules
 2116 09:58:00.118261  start: 4.1 power-off (timeout 00:00:30) [common]
 2117 09:58:00.118448  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2118 09:58:00.137690  >> Command sent successfully.

 2119 09:58:00.139565  Returned 0 in 0 seconds
 2120 09:58:00.239880  end: 4.1 power-off (duration 00:00:00) [common]
 2122 09:58:00.240228  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2123 09:58:00.240471  Listened to connection for namespace 'common' for up to 1s
 2124 09:58:01.245086  Finalising connection for namespace 'common'
 2125 09:58:01.245352  Disconnecting from shell: Finalise
 2126 09:58:01.346164  end: 4.2 read-feedback (duration 00:00:01) [common]
 2127 09:58:01.346322  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7022998
 2128 09:58:01.512889  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7022998
 2129 09:58:01.513130  JobError: Your job cannot terminate cleanly.