Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 09:46:43.223264 lava-dispatcher, installed at version: 2022.06
2 09:46:43.223461 start: 0 validate
3 09:46:43.223592 Start time: 2022-08-12 09:46:43.223585+00:00 (UTC)
4 09:46:43.223726 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:46:43.223852 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220805.0%2Famd64%2Finitrd.cpio.gz exists
6 09:46:43.512955 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:46:43.513756 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:46:46.521505 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:46:46.521756 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220805.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 09:46:46.807679 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:46:46.807897 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 09:46:46.811180 validate duration: 3.59
14 09:46:46.811520 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:46:46.811663 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:46:46.811792 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:46:46.811928 Not decompressing ramdisk as can be used compressed.
18 09:46:46.812047 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220805.0/amd64/initrd.cpio.gz
19 09:46:46.812146 saving as /var/lib/lava/dispatcher/tmp/7022948/tftp-deploy-se56dipb/ramdisk/initrd.cpio.gz
20 09:46:46.812242 total size: 5411035 (5MB)
21 09:46:46.813553 progress 0% (0MB)
22 09:46:46.815847 progress 5% (0MB)
23 09:46:46.818031 progress 10% (0MB)
24 09:46:46.820205 progress 15% (0MB)
25 09:46:46.822584 progress 20% (1MB)
26 09:46:46.824671 progress 25% (1MB)
27 09:46:46.826796 progress 30% (1MB)
28 09:46:46.828873 progress 35% (1MB)
29 09:46:46.831333 progress 40% (2MB)
30 09:46:46.833415 progress 45% (2MB)
31 09:46:46.835531 progress 50% (2MB)
32 09:46:46.837731 progress 55% (2MB)
33 09:46:46.840050 progress 60% (3MB)
34 09:46:46.842181 progress 65% (3MB)
35 09:46:46.844297 progress 70% (3MB)
36 09:46:46.846496 progress 75% (3MB)
37 09:46:46.848873 progress 80% (4MB)
38 09:46:46.851004 progress 85% (4MB)
39 09:46:46.853131 progress 90% (4MB)
40 09:46:46.855289 progress 95% (4MB)
41 09:46:46.857735 progress 100% (5MB)
42 09:46:46.857983 5MB downloaded in 0.05s (112.83MB/s)
43 09:46:46.858201 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:46:46.858585 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:46:46.858717 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:46:46.858850 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:46:46.859003 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 09:46:46.859112 saving as /var/lib/lava/dispatcher/tmp/7022948/tftp-deploy-se56dipb/kernel/bzImage
50 09:46:46.859211 total size: 6815632 (6MB)
51 09:46:46.859309 No compression specified
52 09:46:46.860711 progress 0% (0MB)
53 09:46:46.862881 progress 5% (0MB)
54 09:46:46.864564 progress 10% (0MB)
55 09:46:46.866379 progress 15% (1MB)
56 09:46:46.867998 progress 20% (1MB)
57 09:46:46.869666 progress 25% (1MB)
58 09:46:46.871436 progress 30% (1MB)
59 09:46:46.873045 progress 35% (2MB)
60 09:46:46.874797 progress 40% (2MB)
61 09:46:46.876384 progress 45% (2MB)
62 09:46:46.878021 progress 50% (3MB)
63 09:46:46.879767 progress 55% (3MB)
64 09:46:46.881351 progress 60% (3MB)
65 09:46:46.883090 progress 65% (4MB)
66 09:46:46.884681 progress 70% (4MB)
67 09:46:46.886274 progress 75% (4MB)
68 09:46:46.888010 progress 80% (5MB)
69 09:46:46.889607 progress 85% (5MB)
70 09:46:46.891345 progress 90% (5MB)
71 09:46:46.892932 progress 95% (6MB)
72 09:46:46.894556 progress 100% (6MB)
73 09:46:46.894843 6MB downloaded in 0.04s (182.43MB/s)
74 09:46:46.894995 end: 1.2.1 http-download (duration 00:00:00) [common]
76 09:46:46.895235 end: 1.2 download-retry (duration 00:00:00) [common]
77 09:46:46.895325 start: 1.3 download-retry (timeout 00:10:00) [common]
78 09:46:46.895413 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 09:46:46.895521 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220805.0/amd64/full.rootfs.tar.xz
80 09:46:46.895588 saving as /var/lib/lava/dispatcher/tmp/7022948/tftp-deploy-se56dipb/nfsrootfs/full.rootfs.tar
81 09:46:46.895651 total size: 207096212 (197MB)
82 09:46:46.895713 Using unxz to decompress xz
83 09:46:46.899109 progress 0% (0MB)
84 09:46:47.464356 progress 5% (9MB)
85 09:46:48.007917 progress 10% (19MB)
86 09:46:48.607277 progress 15% (29MB)
87 09:46:48.970387 progress 20% (39MB)
88 09:46:49.344062 progress 25% (49MB)
89 09:46:49.958074 progress 30% (59MB)
90 09:46:50.514539 progress 35% (69MB)
91 09:46:51.116031 progress 40% (79MB)
92 09:46:51.677096 progress 45% (88MB)
93 09:46:52.270857 progress 50% (98MB)
94 09:46:52.904197 progress 55% (108MB)
95 09:46:53.591546 progress 60% (118MB)
96 09:46:53.732031 progress 65% (128MB)
97 09:46:53.886753 progress 70% (138MB)
98 09:46:53.978586 progress 75% (148MB)
99 09:46:54.052004 progress 80% (158MB)
100 09:46:54.122588 progress 85% (167MB)
101 09:46:54.225469 progress 90% (177MB)
102 09:46:54.500962 progress 95% (187MB)
103 09:46:55.099805 progress 100% (197MB)
104 09:46:55.104602 197MB downloaded in 8.21s (24.06MB/s)
105 09:46:55.104860 end: 1.3.1 http-download (duration 00:00:08) [common]
107 09:46:55.105126 end: 1.3 download-retry (duration 00:00:08) [common]
108 09:46:55.105226 start: 1.4 download-retry (timeout 00:09:52) [common]
109 09:46:55.105315 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 09:46:55.105430 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 09:46:55.105504 saving as /var/lib/lava/dispatcher/tmp/7022948/tftp-deploy-se56dipb/modules/modules.tar
112 09:46:55.105571 total size: 51724 (0MB)
113 09:46:55.105638 Using unxz to decompress xz
114 09:46:55.400251 progress 63% (0MB)
115 09:46:55.400685 progress 100% (0MB)
116 09:46:55.403944 0MB downloaded in 0.30s (0.17MB/s)
117 09:46:55.404180 end: 1.4.1 http-download (duration 00:00:00) [common]
119 09:46:55.404441 end: 1.4 download-retry (duration 00:00:00) [common]
120 09:46:55.404537 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 09:46:55.404632 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 09:46:57.456566 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7022948/extract-nfsrootfs-chdw1vf0
123 09:46:57.456775 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 09:46:57.456876 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 09:46:57.457013 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig
126 09:46:57.457115 makedir: /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin
127 09:46:57.457201 makedir: /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/tests
128 09:46:57.457283 makedir: /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/results
129 09:46:57.457380 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-add-keys
130 09:46:57.457508 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-add-sources
131 09:46:57.457630 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-background-process-start
132 09:46:57.457744 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-background-process-stop
133 09:46:57.457857 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-common-functions
134 09:46:57.457966 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-echo-ipv4
135 09:46:57.458077 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-install-packages
136 09:46:57.458186 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-installed-packages
137 09:46:57.458293 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-os-build
138 09:46:57.458406 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-probe-channel
139 09:46:57.458515 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-probe-ip
140 09:46:57.458622 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-target-ip
141 09:46:57.458732 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-target-mac
142 09:46:57.458839 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-target-storage
143 09:46:57.458950 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-test-case
144 09:46:57.459060 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-test-event
145 09:46:57.459168 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-test-feedback
146 09:46:57.459276 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-test-raise
147 09:46:57.459383 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-test-reference
148 09:46:57.459490 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-test-runner
149 09:46:57.459598 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-test-set
150 09:46:57.459706 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-test-shell
151 09:46:57.459814 Updating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-add-keys (debian)
152 09:46:57.459927 Updating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-add-sources (debian)
153 09:46:57.460039 Updating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-install-packages (debian)
154 09:46:57.460149 Updating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-installed-packages (debian)
155 09:46:57.460260 Updating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/bin/lava-os-build (debian)
156 09:46:57.460357 Creating /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/environment
157 09:46:57.460442 LAVA metadata
158 09:46:57.460508 - LAVA_JOB_ID=7022948
159 09:46:57.460572 - LAVA_DISPATCHER_IP=192.168.201.1
160 09:46:57.460673 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
161 09:46:57.460740 skipped lava-vland-overlay
162 09:46:57.460817 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 09:46:57.460899 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
164 09:46:57.460963 skipped lava-multinode-overlay
165 09:46:57.461037 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 09:46:57.461119 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
167 09:46:57.461190 Loading test definitions
168 09:46:57.461279 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
169 09:46:57.461353 Using /lava-7022948 at stage 0
170 09:46:57.461767 uuid=7022948_1.5.2.3.1 testdef=None
171 09:46:57.461861 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 09:46:57.461949 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
173 09:46:57.462369 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 09:46:57.462601 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
176 09:46:57.463086 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 09:46:57.463327 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
179 09:46:57.463787 runner path: /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/0/tests/0_timesync-off test_uuid 7022948_1.5.2.3.1
180 09:46:57.463934 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 09:46:57.464170 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
183 09:46:57.464245 Using /lava-7022948 at stage 0
184 09:46:57.464341 Fetching tests from https://github.com/kernelci/test-definitions.git
185 09:46:57.464422 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/0/tests/1_kselftest-alsa'
186 09:47:04.910385 Running '/usr/bin/git checkout kernelci.org
187 09:47:05.044405 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
188 09:47:05.045304 uuid=7022948_1.5.2.3.5 testdef=None
189 09:47:05.045515 end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
191 09:47:05.045937 start: 1.5.2.3.6 test-overlay (timeout 00:09:42) [common]
192 09:47:05.047016 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 09:47:05.047387 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:42) [common]
195 09:47:05.048764 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 09:47:05.049140 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
198 09:47:05.050619 runner path: /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/0/tests/1_kselftest-alsa test_uuid 7022948_1.5.2.3.5
199 09:47:05.050747 BOARD='asus-cx9400-volteer'
200 09:47:05.050849 BRANCH='cip-gitlab'
201 09:47:05.050945 SKIPFILE='skipfile-lkft.yaml'
202 09:47:05.051039 TESTPROG_URL='None'
203 09:47:05.051131 TST_CASENAME=''
204 09:47:05.051222 TST_CMDFILES='alsa'
205 09:47:05.051409 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 09:47:05.051756 Creating lava-test-runner.conf files
208 09:47:05.051857 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7022948/lava-overlay-bkcs_jig/lava-7022948/0 for stage 0
209 09:47:05.051983 - 0_timesync-off
210 09:47:05.052087 - 1_kselftest-alsa
211 09:47:05.052224 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
212 09:47:05.052357 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
213 09:47:12.258368 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
214 09:47:12.258524 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
215 09:47:12.258621 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 09:47:12.258720 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
217 09:47:12.258812 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
218 09:47:12.360643 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 09:47:12.360987 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
220 09:47:12.361104 extracting modules file /var/lib/lava/dispatcher/tmp/7022948/tftp-deploy-se56dipb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022948/extract-nfsrootfs-chdw1vf0
221 09:47:12.365111 extracting modules file /var/lib/lava/dispatcher/tmp/7022948/tftp-deploy-se56dipb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022948/extract-overlay-ramdisk-ypxdlbwt/ramdisk
222 09:47:12.368883 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 09:47:12.368993 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
224 09:47:12.369076 [common] Applying overlay to NFS
225 09:47:12.369146 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7022948/compress-overlay-k4sqkehw/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7022948/extract-nfsrootfs-chdw1vf0
226 09:47:12.814380 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 09:47:12.814536 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
228 09:47:12.814641 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 09:47:12.814727 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
230 09:47:12.814842 Building ramdisk /var/lib/lava/dispatcher/tmp/7022948/extract-overlay-ramdisk-ypxdlbwt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7022948/extract-overlay-ramdisk-ypxdlbwt/ramdisk
231 09:47:12.847716 >> 24431 blocks
232 09:47:13.313499 rename /var/lib/lava/dispatcher/tmp/7022948/extract-overlay-ramdisk-ypxdlbwt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7022948/tftp-deploy-se56dipb/ramdisk/ramdisk.cpio.gz
233 09:47:13.313940 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
234 09:47:13.314061 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
235 09:47:13.314161 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
236 09:47:13.314253 No mkimage arch provided, not using FIT.
237 09:47:13.314339 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 09:47:13.314420 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 09:47:13.314519 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
240 09:47:13.314611 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
241 09:47:13.314690 No LXC device requested
242 09:47:13.314768 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 09:47:13.314856 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
244 09:47:13.314939 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 09:47:13.315010 Checking files for TFTP limit of 4294967296 bytes.
246 09:47:13.315410 end: 1 tftp-deploy (duration 00:00:27) [common]
247 09:47:13.315511 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 09:47:13.315603 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 09:47:13.315728 substitutions:
250 09:47:13.315795 - {DTB}: None
251 09:47:13.315856 - {INITRD}: 7022948/tftp-deploy-se56dipb/ramdisk/ramdisk.cpio.gz
252 09:47:13.315915 - {KERNEL}: 7022948/tftp-deploy-se56dipb/kernel/bzImage
253 09:47:13.315973 - {LAVA_MAC}: None
254 09:47:13.316029 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7022948/extract-nfsrootfs-chdw1vf0
255 09:47:13.316086 - {NFS_SERVER_IP}: 192.168.201.1
256 09:47:13.316141 - {PRESEED_CONFIG}: None
257 09:47:13.316197 - {PRESEED_LOCAL}: None
258 09:47:13.316251 - {RAMDISK}: 7022948/tftp-deploy-se56dipb/ramdisk/ramdisk.cpio.gz
259 09:47:13.316304 - {ROOT_PART}: None
260 09:47:13.316358 - {ROOT}: None
261 09:47:13.316412 - {SERVER_IP}: 192.168.201.1
262 09:47:13.316482 - {TEE}: None
263 09:47:13.316550 Parsed boot commands:
264 09:47:13.316602 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 09:47:13.316748 Parsed boot commands: tftpboot 192.168.201.1 7022948/tftp-deploy-se56dipb/kernel/bzImage 7022948/tftp-deploy-se56dipb/kernel/cmdline 7022948/tftp-deploy-se56dipb/ramdisk/ramdisk.cpio.gz
266 09:47:13.316839 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 09:47:13.316923 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 09:47:13.317017 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 09:47:13.317102 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 09:47:13.317170 Not connected, no need to disconnect.
271 09:47:13.317243 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 09:47:13.317322 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 09:47:13.317390 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
274 09:47:13.320203 Setting prompt string to ['lava-test: # ']
275 09:47:13.320483 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 09:47:13.320585 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 09:47:13.320675 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 09:47:13.320761 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 09:47:13.320936 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
280 09:47:13.339715 >> Command sent successfully.
281 09:47:13.341455 Returned 0 in 0 seconds
282 09:47:13.442631 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 09:47:13.444117 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 09:47:13.444586 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 09:47:13.444986 Setting prompt string to 'Starting depthcharge on Voema...'
287 09:47:13.445301 Changing prompt to 'Starting depthcharge on Voema...'
288 09:47:13.445653 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 09:47:13.446829 [Enter `^Ec?' for help]
290 09:47:21.782345
291 09:47:21.782922
292 09:47:21.792305 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 09:47:21.795548 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
294 09:47:21.802211 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 09:47:21.805541 CPU: AES supported, TXT NOT supported, VT supported
296 09:47:21.812369 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 09:47:21.818668 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 09:47:21.822291 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 09:47:21.825385 VBOOT: Loading verstage.
300 09:47:21.831944 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
301 09:47:21.836004 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 09:47:21.839017 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 09:47:21.849275 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 09:47:21.856002 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 09:47:21.856432
306 09:47:21.856773
307 09:47:21.869220 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 09:47:21.883168 Probing TPM: . done!
309 09:47:21.886363 TPM ready after 0 ms
310 09:47:21.889709 Connected to device vid:did:rid of 1ae0:0028:00
311 09:47:21.901248 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
312 09:47:21.907901 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 09:47:21.911082 Initialized TPM device CR50 revision 0
314 09:47:21.960332 tlcl_send_startup: Startup return code is 0
315 09:47:21.960792 TPM: setup succeeded
316 09:47:21.975771 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 09:47:21.989907 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 09:47:22.002535 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 09:47:22.012508 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 09:47:22.016847 Chrome EC: UHEPI supported
321 09:47:22.019875 Phase 1
322 09:47:22.023090 FMAP: area GBB found @ 1805000 (458752 bytes)
323 09:47:22.032828 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 09:47:22.039933 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 09:47:22.046597 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 09:47:22.053246 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 09:47:22.056429 Recovery requested (1009000e)
328 09:47:22.059960 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 09:47:22.071122 tlcl_extend: response is 0
330 09:47:22.078039 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 09:47:22.087650 tlcl_extend: response is 0
332 09:47:22.094220 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 09:47:22.101161 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 09:47:22.107543 BS: verstage times (exec / console): total (unknown) / 142 ms
335 09:47:22.107952
336 09:47:22.108291
337 09:47:22.121209 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 09:47:22.127530 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 09:47:22.130712 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 09:47:22.133788 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 09:47:22.140527 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 09:47:22.144091 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 09:47:22.147299 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 09:47:22.150654 TCO_STS: 0000 0000
345 09:47:22.153753 GEN_PMCON: d0015038 00002200
346 09:47:22.157221 GBLRST_CAUSE: 00000000 00000000
347 09:47:22.160834 HPR_CAUSE0: 00000000
348 09:47:22.161276 prev_sleep_state 5
349 09:47:22.163941 Boot Count incremented to 9133
350 09:47:22.170721 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 09:47:22.177255 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 09:47:22.183820 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 09:47:22.190521 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 09:47:22.195246 Chrome EC: UHEPI supported
355 09:47:22.201589 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 09:47:22.214560 Probing TPM: done!
357 09:47:22.221564 Connected to device vid:did:rid of 1ae0:0028:00
358 09:47:22.232451 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
359 09:47:22.239617 Initialized TPM device CR50 revision 0
360 09:47:22.249340 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 09:47:22.256190 MRC: Hash idx 0x100b comparison successful.
362 09:47:22.259122 MRC cache found, size faa8
363 09:47:22.259551 bootmode is set to: 2
364 09:47:22.262579 SPD index = 0
365 09:47:22.269372 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 09:47:22.272827 SPD: module type is LPDDR4X
367 09:47:22.275868 SPD: module part number is MT53E512M64D4NW-046
368 09:47:22.282521 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
369 09:47:22.289025 SPD: device width 16 bits, bus width 16 bits
370 09:47:22.292716 SPD: module size is 1024 MB (per channel)
371 09:47:22.724152 CBMEM:
372 09:47:22.727455 IMD: root @ 0x76fff000 254 entries.
373 09:47:22.730779 IMD: root @ 0x76ffec00 62 entries.
374 09:47:22.734073 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 09:47:22.740423 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 09:47:22.744137 External stage cache:
377 09:47:22.747207 IMD: root @ 0x7b3ff000 254 entries.
378 09:47:22.750953 IMD: root @ 0x7b3fec00 62 entries.
379 09:47:22.765882 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 09:47:22.772317 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 09:47:22.778879 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 09:47:22.793178 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 09:47:22.800175 cse_lite: Skip switching to RW in the recovery path
384 09:47:22.800621 8 DIMMs found
385 09:47:22.801005 SMM Memory Map
386 09:47:22.804090 SMRAM : 0x7b000000 0x800000
387 09:47:22.807684 Subregion 0: 0x7b000000 0x200000
388 09:47:22.811126 Subregion 1: 0x7b200000 0x200000
389 09:47:22.814274 Subregion 2: 0x7b400000 0x400000
390 09:47:22.817656 top_of_ram = 0x77000000
391 09:47:22.824587 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 09:47:22.827834 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 09:47:22.834233 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 09:47:22.837699 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 09:47:22.844297 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 09:47:22.850980 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 09:47:22.863016 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 09:47:22.869501 Processing 211 relocs. Offset value of 0x74c0b000
399 09:47:22.876306 BS: romstage times (exec / console): total (unknown) / 277 ms
400 09:47:22.882244
401 09:47:22.882715
402 09:47:22.892098 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 09:47:22.895144 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 09:47:22.905137 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 09:47:22.911743 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 09:47:22.918490 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 09:47:22.925194 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 09:47:22.972702 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 09:47:22.978557 Processing 5008 relocs. Offset value of 0x75d98000
410 09:47:22.982050 BS: postcar times (exec / console): total (unknown) / 59 ms
411 09:47:22.985643
412 09:47:22.986133
413 09:47:22.995734 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 09:47:22.996168 Normal boot
415 09:47:22.999183 FW_CONFIG value is 0x804c02
416 09:47:23.002431 PCI: 00:07.0 disabled by fw_config
417 09:47:23.005541 PCI: 00:07.1 disabled by fw_config
418 09:47:23.008789 PCI: 00:0d.2 disabled by fw_config
419 09:47:23.011953 PCI: 00:1c.7 disabled by fw_config
420 09:47:23.019013 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 09:47:23.025471 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 09:47:23.028709 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 09:47:23.031988 GENERIC: 0.0 disabled by fw_config
424 09:47:23.035320 GENERIC: 1.0 disabled by fw_config
425 09:47:23.041739 fw_config match found: DB_USB=USB3_ACTIVE
426 09:47:23.045380 fw_config match found: DB_USB=USB3_ACTIVE
427 09:47:23.048706 fw_config match found: DB_USB=USB3_ACTIVE
428 09:47:23.054817 fw_config match found: DB_USB=USB3_ACTIVE
429 09:47:23.058425 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 09:47:23.065009 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 09:47:23.075355 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 09:47:23.081846 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 09:47:23.085162 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 09:47:23.091622 microcode: Update skipped, already up-to-date
435 09:47:23.098076 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 09:47:23.125811 Detected 4 core, 8 thread CPU.
437 09:47:23.128970 Setting up SMI for CPU
438 09:47:23.132236 IED base = 0x7b400000
439 09:47:23.132674 IED size = 0x00400000
440 09:47:23.135669 Will perform SMM setup.
441 09:47:23.142619 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
442 09:47:23.149098 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 09:47:23.155647 Processing 16 relocs. Offset value of 0x00030000
444 09:47:23.158879 Attempting to start 7 APs
445 09:47:23.162058 Waiting for 10ms after sending INIT.
446 09:47:23.177751 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
447 09:47:23.180974 AP: slot 6 apic_id 7.
448 09:47:23.184177 AP: slot 2 apic_id 6.
449 09:47:23.184614 AP: slot 5 apic_id 4.
450 09:47:23.187411 AP: slot 4 apic_id 5.
451 09:47:23.191035 AP: slot 7 apic_id 3.
452 09:47:23.191468 AP: slot 3 apic_id 2.
453 09:47:23.191810 done.
454 09:47:23.197531 Waiting for 2nd SIPI to complete...done.
455 09:47:23.204544 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 09:47:23.210828 Processing 13 relocs. Offset value of 0x00038000
457 09:47:23.214426 Unable to locate Global NVS
458 09:47:23.220749 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 09:47:23.224297 Installing permanent SMM handler to 0x7b000000
460 09:47:23.234386 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 09:47:23.237502 Processing 794 relocs. Offset value of 0x7b010000
462 09:47:23.247659 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 09:47:23.250783 Processing 13 relocs. Offset value of 0x7b008000
464 09:47:23.257492 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 09:47:23.264020 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 09:47:23.267780 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 09:47:23.274047 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 09:47:23.280801 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 09:47:23.287336 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 09:47:23.294231 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 09:47:23.294728 Unable to locate Global NVS
472 09:47:23.303933 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 09:47:23.307274 Clearing SMI status registers
474 09:47:23.307702 SMI_STS: PM1
475 09:47:23.310537 PM1_STS: PWRBTN
476 09:47:23.316996 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 09:47:23.320736 In relocation handler: CPU 0
478 09:47:23.323946 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 09:47:23.330438 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 09:47:23.330868 Relocation complete.
481 09:47:23.340272 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 09:47:23.343675 In relocation handler: CPU 1
483 09:47:23.346878 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 09:47:23.347314 Relocation complete.
485 09:47:23.356978 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
486 09:47:23.357409 In relocation handler: CPU 2
487 09:47:23.363318 New SMBASE=0x7afff800 IEDBASE=0x7b400000
488 09:47:23.366659 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 09:47:23.370113 Relocation complete.
490 09:47:23.376973 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
491 09:47:23.380042 In relocation handler: CPU 6
492 09:47:23.383578 New SMBASE=0x7affe800 IEDBASE=0x7b400000
493 09:47:23.387157 Relocation complete.
494 09:47:23.393641 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
495 09:47:23.396847 In relocation handler: CPU 7
496 09:47:23.400205 New SMBASE=0x7affe400 IEDBASE=0x7b400000
497 09:47:23.403284 Relocation complete.
498 09:47:23.409828 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
499 09:47:23.412975 In relocation handler: CPU 3
500 09:47:23.416470 New SMBASE=0x7afff400 IEDBASE=0x7b400000
501 09:47:23.423214 Writing SMRR. base = 0x7b000006, mask=0xff800c00
502 09:47:23.423648 Relocation complete.
503 09:47:23.430284 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
504 09:47:23.433066 In relocation handler: CPU 5
505 09:47:23.439572 New SMBASE=0x7affec00 IEDBASE=0x7b400000
506 09:47:23.443030 Writing SMRR. base = 0x7b000006, mask=0xff800c00
507 09:47:23.446146 Relocation complete.
508 09:47:23.453285 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
509 09:47:23.456766 In relocation handler: CPU 4
510 09:47:23.459624 New SMBASE=0x7afff000 IEDBASE=0x7b400000
511 09:47:23.462986 Relocation complete.
512 09:47:23.463419 Initializing CPU #0
513 09:47:23.466922 CPU: vendor Intel device 806c1
514 09:47:23.470641 CPU: family 06, model 8c, stepping 01
515 09:47:23.473933 Clearing out pending MCEs
516 09:47:23.477482 Setting up local APIC...
517 09:47:23.477935 apic_id: 0x00 done.
518 09:47:23.480734 Turbo is available but hidden
519 09:47:23.484078 Turbo is available and visible
520 09:47:23.490816 microcode: Update skipped, already up-to-date
521 09:47:23.491240 CPU #0 initialized
522 09:47:23.493838 Initializing CPU #5
523 09:47:23.494280 Initializing CPU #4
524 09:47:23.497279 CPU: vendor Intel device 806c1
525 09:47:23.503953 CPU: family 06, model 8c, stepping 01
526 09:47:23.507131 CPU: vendor Intel device 806c1
527 09:47:23.510424 CPU: family 06, model 8c, stepping 01
528 09:47:23.510905 Clearing out pending MCEs
529 09:47:23.513749 Clearing out pending MCEs
530 09:47:23.516936 Setting up local APIC...
531 09:47:23.520584 Initializing CPU #2
532 09:47:23.521033 Initializing CPU #6
533 09:47:23.523999 CPU: vendor Intel device 806c1
534 09:47:23.527156 CPU: family 06, model 8c, stepping 01
535 09:47:23.530602 CPU: vendor Intel device 806c1
536 09:47:23.533734 CPU: family 06, model 8c, stepping 01
537 09:47:23.537406 Clearing out pending MCEs
538 09:47:23.540501 Clearing out pending MCEs
539 09:47:23.543671 Setting up local APIC...
540 09:47:23.544092 apic_id: 0x04 done.
541 09:47:23.546948 Setting up local APIC...
542 09:47:23.550268 Initializing CPU #3
543 09:47:23.550741 Initializing CPU #7
544 09:47:23.553567 CPU: vendor Intel device 806c1
545 09:47:23.560433 CPU: family 06, model 8c, stepping 01
546 09:47:23.560915 CPU: vendor Intel device 806c1
547 09:47:23.566728 CPU: family 06, model 8c, stepping 01
548 09:47:23.567155 Clearing out pending MCEs
549 09:47:23.570273 Clearing out pending MCEs
550 09:47:23.573479 Setting up local APIC...
551 09:47:23.577179 Initializing CPU #1
552 09:47:23.580313 microcode: Update skipped, already up-to-date
553 09:47:23.583774 apic_id: 0x05 done.
554 09:47:23.584224 CPU #5 initialized
555 09:47:23.586663 Setting up local APIC...
556 09:47:23.590066 microcode: Update skipped, already up-to-date
557 09:47:23.593541 apic_id: 0x03 done.
558 09:47:23.596818 Setting up local APIC...
559 09:47:23.597301 apic_id: 0x06 done.
560 09:47:23.600047 apic_id: 0x02 done.
561 09:47:23.604013 microcode: Update skipped, already up-to-date
562 09:47:23.610102 microcode: Update skipped, already up-to-date
563 09:47:23.610587 CPU #7 initialized
564 09:47:23.613476 CPU #3 initialized
565 09:47:23.616655 CPU: vendor Intel device 806c1
566 09:47:23.619899 CPU: family 06, model 8c, stepping 01
567 09:47:23.623184 apic_id: 0x07 done.
568 09:47:23.626857 microcode: Update skipped, already up-to-date
569 09:47:23.630166 microcode: Update skipped, already up-to-date
570 09:47:23.633192 CPU #2 initialized
571 09:47:23.636531 CPU #6 initialized
572 09:47:23.637018 CPU #4 initialized
573 09:47:23.640250 Clearing out pending MCEs
574 09:47:23.643258 Setting up local APIC...
575 09:47:23.646681 apic_id: 0x01 done.
576 09:47:23.650089 microcode: Update skipped, already up-to-date
577 09:47:23.653459 CPU #1 initialized
578 09:47:23.656422 bsp_do_flight_plan done after 455 msecs.
579 09:47:23.659877 CPU: frequency set to 4000 MHz
580 09:47:23.660360 Enabling SMIs.
581 09:47:23.666440 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
582 09:47:23.682994 SATAXPCIE1 indicates PCIe NVMe is present
583 09:47:23.686295 Probing TPM: done!
584 09:47:23.689656 Connected to device vid:did:rid of 1ae0:0028:00
585 09:47:23.700172 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
586 09:47:23.703482 Initialized TPM device CR50 revision 0
587 09:47:23.706859 Enabling S0i3.4
588 09:47:23.713948 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 09:47:23.717087 Found a VBT of 8704 bytes after decompression
590 09:47:23.723679 cse_lite: CSE RO boot. HybridStorageMode disabled
591 09:47:23.729948 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 09:47:23.805521 FSPS returned 0
593 09:47:23.808707 Executing Phase 1 of FspMultiPhaseSiInit
594 09:47:23.818625 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 09:47:23.822159 port C0 DISC req: usage 1 usb3 1 usb2 5
596 09:47:23.825542 Raw Buffer output 0 00000511
597 09:47:23.828537 Raw Buffer output 1 00000000
598 09:47:23.832476 pmc_send_ipc_cmd succeeded
599 09:47:23.838926 port C1 DISC req: usage 1 usb3 2 usb2 3
600 09:47:23.839406 Raw Buffer output 0 00000321
601 09:47:23.842229 Raw Buffer output 1 00000000
602 09:47:23.846549 pmc_send_ipc_cmd succeeded
603 09:47:23.851680 Detected 4 core, 8 thread CPU.
604 09:47:23.854813 Detected 4 core, 8 thread CPU.
605 09:47:24.089313 Display FSP Version Info HOB
606 09:47:24.092508 Reference Code - CPU = a.0.4c.31
607 09:47:24.096421 uCode Version = 0.0.0.86
608 09:47:24.099404 TXT ACM version = ff.ff.ff.ffff
609 09:47:24.102562 Reference Code - ME = a.0.4c.31
610 09:47:24.105973 MEBx version = 0.0.0.0
611 09:47:24.108987 ME Firmware Version = Consumer SKU
612 09:47:24.112653 Reference Code - PCH = a.0.4c.31
613 09:47:24.115875 PCH-CRID Status = Disabled
614 09:47:24.119256 PCH-CRID Original Value = ff.ff.ff.ffff
615 09:47:24.122643 PCH-CRID New Value = ff.ff.ff.ffff
616 09:47:24.125597 OPROM - RST - RAID = ff.ff.ff.ffff
617 09:47:24.129496 PCH Hsio Version = 4.0.0.0
618 09:47:24.132410 Reference Code - SA - System Agent = a.0.4c.31
619 09:47:24.135675 Reference Code - MRC = 2.0.0.1
620 09:47:24.139467 SA - PCIe Version = a.0.4c.31
621 09:47:24.142327 SA-CRID Status = Disabled
622 09:47:24.145511 SA-CRID Original Value = 0.0.0.1
623 09:47:24.149251 SA-CRID New Value = 0.0.0.1
624 09:47:24.152675 OPROM - VBIOS = ff.ff.ff.ffff
625 09:47:24.155686 IO Manageability Engine FW Version = 11.1.4.0
626 09:47:24.159288 PHY Build Version = 0.0.0.e0
627 09:47:24.162338 Thunderbolt(TM) FW Version = 0.0.0.0
628 09:47:24.168885 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 09:47:24.172176 ITSS IRQ Polarities Before:
630 09:47:24.172609 IPC0: 0xffffffff
631 09:47:24.175705 IPC1: 0xffffffff
632 09:47:24.176140 IPC2: 0xffffffff
633 09:47:24.178934 IPC3: 0xffffffff
634 09:47:24.182182 ITSS IRQ Polarities After:
635 09:47:24.182614 IPC0: 0xffffffff
636 09:47:24.185827 IPC1: 0xffffffff
637 09:47:24.186267 IPC2: 0xffffffff
638 09:47:24.188849 IPC3: 0xffffffff
639 09:47:24.192009 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 09:47:24.205341 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 09:47:24.215156 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 09:47:24.228405 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 09:47:24.235103 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
644 09:47:24.238491 Enumerating buses...
645 09:47:24.241995 Show all devs... Before device enumeration.
646 09:47:24.245200 Root Device: enabled 1
647 09:47:24.245678 DOMAIN: 0000: enabled 1
648 09:47:24.248827 CPU_CLUSTER: 0: enabled 1
649 09:47:24.251814 PCI: 00:00.0: enabled 1
650 09:47:24.255133 PCI: 00:02.0: enabled 1
651 09:47:24.255569 PCI: 00:04.0: enabled 1
652 09:47:24.258473 PCI: 00:05.0: enabled 1
653 09:47:24.261731 PCI: 00:06.0: enabled 0
654 09:47:24.264912 PCI: 00:07.0: enabled 0
655 09:47:24.265343 PCI: 00:07.1: enabled 0
656 09:47:24.268331 PCI: 00:07.2: enabled 0
657 09:47:24.271764 PCI: 00:07.3: enabled 0
658 09:47:24.272198 PCI: 00:08.0: enabled 1
659 09:47:24.275039 PCI: 00:09.0: enabled 0
660 09:47:24.278559 PCI: 00:0a.0: enabled 0
661 09:47:24.281749 PCI: 00:0d.0: enabled 1
662 09:47:24.282184 PCI: 00:0d.1: enabled 0
663 09:47:24.284916 PCI: 00:0d.2: enabled 0
664 09:47:24.288333 PCI: 00:0d.3: enabled 0
665 09:47:24.291602 PCI: 00:0e.0: enabled 0
666 09:47:24.292038 PCI: 00:10.2: enabled 1
667 09:47:24.294940 PCI: 00:10.6: enabled 0
668 09:47:24.298534 PCI: 00:10.7: enabled 0
669 09:47:24.301624 PCI: 00:12.0: enabled 0
670 09:47:24.302102 PCI: 00:12.6: enabled 0
671 09:47:24.304948 PCI: 00:13.0: enabled 0
672 09:47:24.308187 PCI: 00:14.0: enabled 1
673 09:47:24.308621 PCI: 00:14.1: enabled 0
674 09:47:24.311449 PCI: 00:14.2: enabled 1
675 09:47:24.314825 PCI: 00:14.3: enabled 1
676 09:47:24.318106 PCI: 00:15.0: enabled 1
677 09:47:24.318539 PCI: 00:15.1: enabled 1
678 09:47:24.321480 PCI: 00:15.2: enabled 1
679 09:47:24.324996 PCI: 00:15.3: enabled 1
680 09:47:24.328105 PCI: 00:16.0: enabled 1
681 09:47:24.328539 PCI: 00:16.1: enabled 0
682 09:47:24.331617 PCI: 00:16.2: enabled 0
683 09:47:24.334625 PCI: 00:16.3: enabled 0
684 09:47:24.338049 PCI: 00:16.4: enabled 0
685 09:47:24.338483 PCI: 00:16.5: enabled 0
686 09:47:24.341501 PCI: 00:17.0: enabled 1
687 09:47:24.344937 PCI: 00:19.0: enabled 0
688 09:47:24.347961 PCI: 00:19.1: enabled 1
689 09:47:24.348404 PCI: 00:19.2: enabled 0
690 09:47:24.351696 PCI: 00:1c.0: enabled 1
691 09:47:24.354973 PCI: 00:1c.1: enabled 0
692 09:47:24.355407 PCI: 00:1c.2: enabled 0
693 09:47:24.358254 PCI: 00:1c.3: enabled 0
694 09:47:24.361517 PCI: 00:1c.4: enabled 0
695 09:47:24.364637 PCI: 00:1c.5: enabled 0
696 09:47:24.365071 PCI: 00:1c.6: enabled 1
697 09:47:24.368009 PCI: 00:1c.7: enabled 0
698 09:47:24.371548 PCI: 00:1d.0: enabled 1
699 09:47:24.374815 PCI: 00:1d.1: enabled 0
700 09:47:24.375248 PCI: 00:1d.2: enabled 1
701 09:47:24.378222 PCI: 00:1d.3: enabled 0
702 09:47:24.381504 PCI: 00:1e.0: enabled 1
703 09:47:24.384601 PCI: 00:1e.1: enabled 0
704 09:47:24.385034 PCI: 00:1e.2: enabled 1
705 09:47:24.388177 PCI: 00:1e.3: enabled 1
706 09:47:24.391193 PCI: 00:1f.0: enabled 1
707 09:47:24.391629 PCI: 00:1f.1: enabled 0
708 09:47:24.394921 PCI: 00:1f.2: enabled 1
709 09:47:24.397821 PCI: 00:1f.3: enabled 1
710 09:47:24.401292 PCI: 00:1f.4: enabled 0
711 09:47:24.401756 PCI: 00:1f.5: enabled 1
712 09:47:24.404621 PCI: 00:1f.6: enabled 0
713 09:47:24.407734 PCI: 00:1f.7: enabled 0
714 09:47:24.411043 APIC: 00: enabled 1
715 09:47:24.411513 GENERIC: 0.0: enabled 1
716 09:47:24.414604 GENERIC: 0.0: enabled 1
717 09:47:24.417647 GENERIC: 1.0: enabled 1
718 09:47:24.418084 GENERIC: 0.0: enabled 1
719 09:47:24.420940 GENERIC: 1.0: enabled 1
720 09:47:24.424359 USB0 port 0: enabled 1
721 09:47:24.427538 GENERIC: 0.0: enabled 1
722 09:47:24.427981 USB0 port 0: enabled 1
723 09:47:24.431066 GENERIC: 0.0: enabled 1
724 09:47:24.434224 I2C: 00:1a: enabled 1
725 09:47:24.434627 I2C: 00:31: enabled 1
726 09:47:24.437792 I2C: 00:32: enabled 1
727 09:47:24.440969 I2C: 00:10: enabled 1
728 09:47:24.441342 I2C: 00:15: enabled 1
729 09:47:24.444248 GENERIC: 0.0: enabled 0
730 09:47:24.447691 GENERIC: 1.0: enabled 0
731 09:47:24.450939 GENERIC: 0.0: enabled 1
732 09:47:24.451377 SPI: 00: enabled 1
733 09:47:24.454583 SPI: 00: enabled 1
734 09:47:24.457686 PNP: 0c09.0: enabled 1
735 09:47:24.458124 GENERIC: 0.0: enabled 1
736 09:47:24.461354 USB3 port 0: enabled 1
737 09:47:24.464415 USB3 port 1: enabled 1
738 09:47:24.464857 USB3 port 2: enabled 0
739 09:47:24.468009 USB3 port 3: enabled 0
740 09:47:24.470831 USB2 port 0: enabled 0
741 09:47:24.474040 USB2 port 1: enabled 1
742 09:47:24.474476 USB2 port 2: enabled 1
743 09:47:24.477476 USB2 port 3: enabled 0
744 09:47:24.481026 USB2 port 4: enabled 1
745 09:47:24.481470 USB2 port 5: enabled 0
746 09:47:24.484260 USB2 port 6: enabled 0
747 09:47:24.487430 USB2 port 7: enabled 0
748 09:47:24.487843 USB2 port 8: enabled 0
749 09:47:24.491413 USB2 port 9: enabled 0
750 09:47:24.494026 USB3 port 0: enabled 0
751 09:47:24.497519 USB3 port 1: enabled 1
752 09:47:24.498004 USB3 port 2: enabled 0
753 09:47:24.501080 USB3 port 3: enabled 0
754 09:47:24.504271 GENERIC: 0.0: enabled 1
755 09:47:24.504728 GENERIC: 1.0: enabled 1
756 09:47:24.507421 APIC: 01: enabled 1
757 09:47:24.510972 APIC: 06: enabled 1
758 09:47:24.511469 APIC: 02: enabled 1
759 09:47:24.513948 APIC: 05: enabled 1
760 09:47:24.517476 APIC: 04: enabled 1
761 09:47:24.517990 APIC: 07: enabled 1
762 09:47:24.520603 APIC: 03: enabled 1
763 09:47:24.521062 Compare with tree...
764 09:47:24.523981 Root Device: enabled 1
765 09:47:24.527682 DOMAIN: 0000: enabled 1
766 09:47:24.530616 PCI: 00:00.0: enabled 1
767 09:47:24.534205 PCI: 00:02.0: enabled 1
768 09:47:24.534654 PCI: 00:04.0: enabled 1
769 09:47:24.537355 GENERIC: 0.0: enabled 1
770 09:47:24.540595 PCI: 00:05.0: enabled 1
771 09:47:24.543940 PCI: 00:06.0: enabled 0
772 09:47:24.547381 PCI: 00:07.0: enabled 0
773 09:47:24.547845 GENERIC: 0.0: enabled 1
774 09:47:24.550875 PCI: 00:07.1: enabled 0
775 09:47:24.554140 GENERIC: 1.0: enabled 1
776 09:47:24.557215 PCI: 00:07.2: enabled 0
777 09:47:24.560542 GENERIC: 0.0: enabled 1
778 09:47:24.560982 PCI: 00:07.3: enabled 0
779 09:47:24.563778 GENERIC: 1.0: enabled 1
780 09:47:24.567196 PCI: 00:08.0: enabled 1
781 09:47:24.570447 PCI: 00:09.0: enabled 0
782 09:47:24.573850 PCI: 00:0a.0: enabled 0
783 09:47:24.574289 PCI: 00:0d.0: enabled 1
784 09:47:24.577436 USB0 port 0: enabled 1
785 09:47:24.580587 USB3 port 0: enabled 1
786 09:47:24.583720 USB3 port 1: enabled 1
787 09:47:24.587237 USB3 port 2: enabled 0
788 09:47:24.587691 USB3 port 3: enabled 0
789 09:47:24.590790 PCI: 00:0d.1: enabled 0
790 09:47:24.593941 PCI: 00:0d.2: enabled 0
791 09:47:24.597304 GENERIC: 0.0: enabled 1
792 09:47:24.600349 PCI: 00:0d.3: enabled 0
793 09:47:24.600812 PCI: 00:0e.0: enabled 0
794 09:47:24.603972 PCI: 00:10.2: enabled 1
795 09:47:24.607501 PCI: 00:10.6: enabled 0
796 09:47:24.610359 PCI: 00:10.7: enabled 0
797 09:47:24.614026 PCI: 00:12.0: enabled 0
798 09:47:24.614490 PCI: 00:12.6: enabled 0
799 09:47:24.617040 PCI: 00:13.0: enabled 0
800 09:47:24.620414 PCI: 00:14.0: enabled 1
801 09:47:24.623883 USB0 port 0: enabled 1
802 09:47:24.626917 USB2 port 0: enabled 0
803 09:47:24.627357 USB2 port 1: enabled 1
804 09:47:24.630176 USB2 port 2: enabled 1
805 09:47:24.633669 USB2 port 3: enabled 0
806 09:47:24.637089 USB2 port 4: enabled 1
807 09:47:24.640370 USB2 port 5: enabled 0
808 09:47:24.643783 USB2 port 6: enabled 0
809 09:47:24.644357 USB2 port 7: enabled 0
810 09:47:24.646995 USB2 port 8: enabled 0
811 09:47:24.650075 USB2 port 9: enabled 0
812 09:47:24.653380 USB3 port 0: enabled 0
813 09:47:24.656728 USB3 port 1: enabled 1
814 09:47:24.660552 USB3 port 2: enabled 0
815 09:47:24.661001 USB3 port 3: enabled 0
816 09:47:24.663469 PCI: 00:14.1: enabled 0
817 09:47:24.667248 PCI: 00:14.2: enabled 1
818 09:47:24.670126 PCI: 00:14.3: enabled 1
819 09:47:24.673497 GENERIC: 0.0: enabled 1
820 09:47:24.673976 PCI: 00:15.0: enabled 1
821 09:47:24.676767 I2C: 00:1a: enabled 1
822 09:47:24.680067 I2C: 00:31: enabled 1
823 09:47:24.683655 I2C: 00:32: enabled 1
824 09:47:24.684117 PCI: 00:15.1: enabled 1
825 09:47:24.686909 I2C: 00:10: enabled 1
826 09:47:24.689985 PCI: 00:15.2: enabled 1
827 09:47:24.693433 PCI: 00:15.3: enabled 1
828 09:47:24.696805 PCI: 00:16.0: enabled 1
829 09:47:24.697246 PCI: 00:16.1: enabled 0
830 09:47:24.699784 PCI: 00:16.2: enabled 0
831 09:47:24.703639 PCI: 00:16.3: enabled 0
832 09:47:24.706690 PCI: 00:16.4: enabled 0
833 09:47:24.710262 PCI: 00:16.5: enabled 0
834 09:47:24.710706 PCI: 00:17.0: enabled 1
835 09:47:24.714584 PCI: 00:19.0: enabled 0
836 09:47:24.718573 PCI: 00:19.1: enabled 1
837 09:47:24.719185 I2C: 00:15: enabled 1
838 09:47:24.721459 PCI: 00:19.2: enabled 0
839 09:47:24.725016 PCI: 00:1d.0: enabled 1
840 09:47:24.727991 GENERIC: 0.0: enabled 1
841 09:47:24.728486 PCI: 00:1e.0: enabled 1
842 09:47:24.731215 PCI: 00:1e.1: enabled 0
843 09:47:24.734920 PCI: 00:1e.2: enabled 1
844 09:47:24.738043 SPI: 00: enabled 1
845 09:47:24.741459 PCI: 00:1e.3: enabled 1
846 09:47:24.741912 SPI: 00: enabled 1
847 09:47:24.744664 PCI: 00:1f.0: enabled 1
848 09:47:24.795900 PNP: 0c09.0: enabled 1
849 09:47:24.796369 PCI: 00:1f.1: enabled 0
850 09:47:24.796761 PCI: 00:1f.2: enabled 1
851 09:47:24.797115 GENERIC: 0.0: enabled 1
852 09:47:24.797445 GENERIC: 0.0: enabled 1
853 09:47:24.798224 GENERIC: 1.0: enabled 1
854 09:47:24.798578 PCI: 00:1f.3: enabled 1
855 09:47:24.798972 PCI: 00:1f.4: enabled 0
856 09:47:24.799301 PCI: 00:1f.5: enabled 1
857 09:47:24.799649 PCI: 00:1f.6: enabled 0
858 09:47:24.799991 PCI: 00:1f.7: enabled 0
859 09:47:24.800327 CPU_CLUSTER: 0: enabled 1
860 09:47:24.800672 APIC: 00: enabled 1
861 09:47:24.800977 APIC: 01: enabled 1
862 09:47:24.801336 APIC: 06: enabled 1
863 09:47:24.801673 APIC: 02: enabled 1
864 09:47:24.802040 APIC: 05: enabled 1
865 09:47:24.802352 APIC: 04: enabled 1
866 09:47:24.802720 APIC: 07: enabled 1
867 09:47:24.803133 APIC: 03: enabled 1
868 09:47:24.826574 Root Device scanning...
869 09:47:24.827065 scan_static_bus for Root Device
870 09:47:24.827418 DOMAIN: 0000 enabled
871 09:47:24.827936 CPU_CLUSTER: 0 enabled
872 09:47:24.828428 DOMAIN: 0000 scanning...
873 09:47:24.829201 PCI: pci_scan_bus for bus 00
874 09:47:24.829602 PCI: 00:00.0 [8086/0000] ops
875 09:47:24.829958 PCI: 00:00.0 [8086/9a12] enabled
876 09:47:24.830285 PCI: 00:02.0 [8086/0000] bus ops
877 09:47:24.830974 PCI: 00:02.0 [8086/9a40] enabled
878 09:47:24.831422 PCI: 00:04.0 [8086/0000] bus ops
879 09:47:24.833470 PCI: 00:04.0 [8086/9a03] enabled
880 09:47:24.836894 PCI: 00:05.0 [8086/9a19] enabled
881 09:47:24.840247 PCI: 00:07.0 [0000/0000] hidden
882 09:47:24.843374 PCI: 00:08.0 [8086/9a11] enabled
883 09:47:24.846640 PCI: 00:0a.0 [8086/9a0d] disabled
884 09:47:24.850008 PCI: 00:0d.0 [8086/0000] bus ops
885 09:47:24.853545 PCI: 00:0d.0 [8086/9a13] enabled
886 09:47:24.856637 PCI: 00:14.0 [8086/0000] bus ops
887 09:47:24.860204 PCI: 00:14.0 [8086/a0ed] enabled
888 09:47:24.863380 PCI: 00:14.2 [8086/a0ef] enabled
889 09:47:24.866550 PCI: 00:14.3 [8086/0000] bus ops
890 09:47:24.869994 PCI: 00:14.3 [8086/a0f0] enabled
891 09:47:24.873214 PCI: 00:15.0 [8086/0000] bus ops
892 09:47:24.876451 PCI: 00:15.0 [8086/a0e8] enabled
893 09:47:24.879713 PCI: 00:15.1 [8086/0000] bus ops
894 09:47:24.883107 PCI: 00:15.1 [8086/a0e9] enabled
895 09:47:24.886676 PCI: 00:15.2 [8086/0000] bus ops
896 09:47:24.890104 PCI: 00:15.2 [8086/a0ea] enabled
897 09:47:24.893284 PCI: 00:15.3 [8086/0000] bus ops
898 09:47:24.898287 PCI: 00:15.3 [8086/a0eb] enabled
899 09:47:24.899723 PCI: 00:16.0 [8086/0000] ops
900 09:47:24.903348 PCI: 00:16.0 [8086/a0e0] enabled
901 09:47:24.906823 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 09:47:24.909560 PCI: 00:19.0 [8086/0000] bus ops
903 09:47:24.913258 PCI: 00:19.0 [8086/a0c5] disabled
904 09:47:24.916748 PCI: 00:19.1 [8086/0000] bus ops
905 09:47:24.919548 PCI: 00:19.1 [8086/a0c6] enabled
906 09:47:24.922930 PCI: 00:1d.0 [8086/0000] bus ops
907 09:47:24.926280 PCI: 00:1d.0 [8086/a0b0] enabled
908 09:47:24.929812 PCI: 00:1e.0 [8086/0000] ops
909 09:47:24.933308 PCI: 00:1e.0 [8086/a0a8] enabled
910 09:47:24.936550 PCI: 00:1e.2 [8086/0000] bus ops
911 09:47:24.939797 PCI: 00:1e.2 [8086/a0aa] enabled
912 09:47:24.942907 PCI: 00:1e.3 [8086/0000] bus ops
913 09:47:24.946233 PCI: 00:1e.3 [8086/a0ab] enabled
914 09:47:24.949719 PCI: 00:1f.0 [8086/0000] bus ops
915 09:47:24.953063 PCI: 00:1f.0 [8086/a087] enabled
916 09:47:24.956097 RTC Init
917 09:47:24.959517 Set power on after power failure.
918 09:47:24.959950 Disabling Deep S3
919 09:47:24.962633 Disabling Deep S3
920 09:47:24.963063 Disabling Deep S4
921 09:47:24.965969 Disabling Deep S4
922 09:47:24.969418 Disabling Deep S5
923 09:47:24.969875 Disabling Deep S5
924 09:47:24.972902 PCI: 00:1f.2 [0000/0000] hidden
925 09:47:24.976328 PCI: 00:1f.3 [8086/0000] bus ops
926 09:47:24.979571 PCI: 00:1f.3 [8086/a0c8] enabled
927 09:47:24.982908 PCI: 00:1f.5 [8086/0000] bus ops
928 09:47:24.986065 PCI: 00:1f.5 [8086/a0a4] enabled
929 09:47:24.989172 PCI: Leftover static devices:
930 09:47:24.989615 PCI: 00:10.2
931 09:47:24.992689 PCI: 00:10.6
932 09:47:24.993116 PCI: 00:10.7
933 09:47:24.995897 PCI: 00:06.0
934 09:47:24.996326 PCI: 00:07.1
935 09:47:24.999527 PCI: 00:07.2
936 09:47:24.999958 PCI: 00:07.3
937 09:47:25.000295 PCI: 00:09.0
938 09:47:25.002622 PCI: 00:0d.1
939 09:47:25.003052 PCI: 00:0d.2
940 09:47:25.006288 PCI: 00:0d.3
941 09:47:25.006717 PCI: 00:0e.0
942 09:47:25.007055 PCI: 00:12.0
943 09:47:25.009622 PCI: 00:12.6
944 09:47:25.010050 PCI: 00:13.0
945 09:47:25.012578 PCI: 00:14.1
946 09:47:25.013005 PCI: 00:16.1
947 09:47:25.013348 PCI: 00:16.2
948 09:47:25.016088 PCI: 00:16.3
949 09:47:25.016517 PCI: 00:16.4
950 09:47:25.019566 PCI: 00:16.5
951 09:47:25.020015 PCI: 00:17.0
952 09:47:25.023021 PCI: 00:19.2
953 09:47:25.023454 PCI: 00:1e.1
954 09:47:25.023795 PCI: 00:1f.1
955 09:47:25.026002 PCI: 00:1f.4
956 09:47:25.026463 PCI: 00:1f.6
957 09:47:25.029118 PCI: 00:1f.7
958 09:47:25.032765 PCI: Check your devicetree.cb.
959 09:47:25.033207 PCI: 00:02.0 scanning...
960 09:47:25.036206 scan_generic_bus for PCI: 00:02.0
961 09:47:25.042851 scan_generic_bus for PCI: 00:02.0 done
962 09:47:25.045822 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 09:47:25.049297 PCI: 00:04.0 scanning...
964 09:47:25.052783 scan_generic_bus for PCI: 00:04.0
965 09:47:25.053276 GENERIC: 0.0 enabled
966 09:47:25.059179 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 09:47:25.065556 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 09:47:25.069308 PCI: 00:0d.0 scanning...
969 09:47:25.072413 scan_static_bus for PCI: 00:0d.0
970 09:47:25.072846 USB0 port 0 enabled
971 09:47:25.075582 USB0 port 0 scanning...
972 09:47:25.078841 scan_static_bus for USB0 port 0
973 09:47:25.082230 USB3 port 0 enabled
974 09:47:25.082662 USB3 port 1 enabled
975 09:47:25.085839 USB3 port 2 disabled
976 09:47:25.088628 USB3 port 3 disabled
977 09:47:25.089063 USB3 port 0 scanning...
978 09:47:25.091983 scan_static_bus for USB3 port 0
979 09:47:25.098573 scan_static_bus for USB3 port 0 done
980 09:47:25.102091 scan_bus: bus USB3 port 0 finished in 6 msecs
981 09:47:25.105505 USB3 port 1 scanning...
982 09:47:25.108427 scan_static_bus for USB3 port 1
983 09:47:25.112188 scan_static_bus for USB3 port 1 done
984 09:47:25.115566 scan_bus: bus USB3 port 1 finished in 6 msecs
985 09:47:25.118432 scan_static_bus for USB0 port 0 done
986 09:47:25.125132 scan_bus: bus USB0 port 0 finished in 43 msecs
987 09:47:25.128415 scan_static_bus for PCI: 00:0d.0 done
988 09:47:25.132024 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 09:47:25.135311 PCI: 00:14.0 scanning...
990 09:47:25.138661 scan_static_bus for PCI: 00:14.0
991 09:47:25.141745 USB0 port 0 enabled
992 09:47:25.145050 USB0 port 0 scanning...
993 09:47:25.148380 scan_static_bus for USB0 port 0
994 09:47:25.148821 USB2 port 0 disabled
995 09:47:25.151717 USB2 port 1 enabled
996 09:47:25.152151 USB2 port 2 enabled
997 09:47:25.155147 USB2 port 3 disabled
998 09:47:25.158636 USB2 port 4 enabled
999 09:47:25.159071 USB2 port 5 disabled
1000 09:47:25.161468 USB2 port 6 disabled
1001 09:47:25.165105 USB2 port 7 disabled
1002 09:47:25.165540 USB2 port 8 disabled
1003 09:47:25.168399 USB2 port 9 disabled
1004 09:47:25.171792 USB3 port 0 disabled
1005 09:47:25.172229 USB3 port 1 enabled
1006 09:47:25.174925 USB3 port 2 disabled
1007 09:47:25.178163 USB3 port 3 disabled
1008 09:47:25.178596 USB2 port 1 scanning...
1009 09:47:25.181539 scan_static_bus for USB2 port 1
1010 09:47:25.185151 scan_static_bus for USB2 port 1 done
1011 09:47:25.191559 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 09:47:25.194830 USB2 port 2 scanning...
1013 09:47:25.198107 scan_static_bus for USB2 port 2
1014 09:47:25.201252 scan_static_bus for USB2 port 2 done
1015 09:47:25.204503 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 09:47:25.208196 USB2 port 4 scanning...
1017 09:47:25.211467 scan_static_bus for USB2 port 4
1018 09:47:25.214488 scan_static_bus for USB2 port 4 done
1019 09:47:25.218040 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 09:47:25.221211 USB3 port 1 scanning...
1021 09:47:25.224685 scan_static_bus for USB3 port 1
1022 09:47:25.227860 scan_static_bus for USB3 port 1 done
1023 09:47:25.234723 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 09:47:25.237884 scan_static_bus for USB0 port 0 done
1025 09:47:25.241333 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 09:47:25.244308 scan_static_bus for PCI: 00:14.0 done
1027 09:47:25.251081 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1028 09:47:25.254220 PCI: 00:14.3 scanning...
1029 09:47:25.257670 scan_static_bus for PCI: 00:14.3
1030 09:47:25.258150 GENERIC: 0.0 enabled
1031 09:47:25.260836 scan_static_bus for PCI: 00:14.3 done
1032 09:47:25.267607 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 09:47:25.271069 PCI: 00:15.0 scanning...
1034 09:47:25.274138 scan_static_bus for PCI: 00:15.0
1035 09:47:25.274601 I2C: 00:1a enabled
1036 09:47:25.277621 I2C: 00:31 enabled
1037 09:47:25.280869 I2C: 00:32 enabled
1038 09:47:25.284177 scan_static_bus for PCI: 00:15.0 done
1039 09:47:25.287952 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1040 09:47:25.291251 PCI: 00:15.1 scanning...
1041 09:47:25.294588 scan_static_bus for PCI: 00:15.1
1042 09:47:25.295018 I2C: 00:10 enabled
1043 09:47:25.301517 scan_static_bus for PCI: 00:15.1 done
1044 09:47:25.304833 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 09:47:25.307651 PCI: 00:15.2 scanning...
1046 09:47:25.311282 scan_static_bus for PCI: 00:15.2
1047 09:47:25.314265 scan_static_bus for PCI: 00:15.2 done
1048 09:47:25.317982 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 09:47:25.321436 PCI: 00:15.3 scanning...
1050 09:47:25.324249 scan_static_bus for PCI: 00:15.3
1051 09:47:25.327868 scan_static_bus for PCI: 00:15.3 done
1052 09:47:25.334306 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 09:47:25.337632 PCI: 00:19.1 scanning...
1054 09:47:25.340863 scan_static_bus for PCI: 00:19.1
1055 09:47:25.341334 I2C: 00:15 enabled
1056 09:47:25.344764 scan_static_bus for PCI: 00:19.1 done
1057 09:47:25.350905 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 09:47:25.354055 PCI: 00:1d.0 scanning...
1059 09:47:25.357457 do_pci_scan_bridge for PCI: 00:1d.0
1060 09:47:25.360842 PCI: pci_scan_bus for bus 01
1061 09:47:25.364094 PCI: 01:00.0 [1c5c/174a] enabled
1062 09:47:25.364528 GENERIC: 0.0 enabled
1063 09:47:25.367557 Enabling Common Clock Configuration
1064 09:47:25.374092 L1 Sub-State supported from root port 29
1065 09:47:25.377314 L1 Sub-State Support = 0xf
1066 09:47:25.377777 CommonModeRestoreTime = 0x28
1067 09:47:25.383860 Power On Value = 0x16, Power On Scale = 0x0
1068 09:47:25.384289 ASPM: Enabled L1
1069 09:47:25.387244 PCIe: Max_Payload_Size adjusted to 128
1070 09:47:25.394020 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 09:47:25.397239 PCI: 00:1e.2 scanning...
1072 09:47:25.400349 scan_generic_bus for PCI: 00:1e.2
1073 09:47:25.400784 SPI: 00 enabled
1074 09:47:25.407036 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 09:47:25.413677 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 09:47:25.414118 PCI: 00:1e.3 scanning...
1077 09:47:25.417013 scan_generic_bus for PCI: 00:1e.3
1078 09:47:25.420474 SPI: 00 enabled
1079 09:47:25.427271 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 09:47:25.430559 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 09:47:25.433886 PCI: 00:1f.0 scanning...
1082 09:47:25.436791 scan_static_bus for PCI: 00:1f.0
1083 09:47:25.440268 PNP: 0c09.0 enabled
1084 09:47:25.440703 PNP: 0c09.0 scanning...
1085 09:47:25.443602 scan_static_bus for PNP: 0c09.0
1086 09:47:25.450347 scan_static_bus for PNP: 0c09.0 done
1087 09:47:25.453361 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 09:47:25.456634 scan_static_bus for PCI: 00:1f.0 done
1089 09:47:25.463438 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 09:47:25.463878 PCI: 00:1f.2 scanning...
1091 09:47:25.466770 scan_static_bus for PCI: 00:1f.2
1092 09:47:25.469977 GENERIC: 0.0 enabled
1093 09:47:25.473245 GENERIC: 0.0 scanning...
1094 09:47:25.476541 scan_static_bus for GENERIC: 0.0
1095 09:47:25.479890 GENERIC: 0.0 enabled
1096 09:47:25.480328 GENERIC: 1.0 enabled
1097 09:47:25.483234 scan_static_bus for GENERIC: 0.0 done
1098 09:47:25.490054 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 09:47:25.493259 scan_static_bus for PCI: 00:1f.2 done
1100 09:47:25.496658 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 09:47:25.499947 PCI: 00:1f.3 scanning...
1102 09:47:25.503265 scan_static_bus for PCI: 00:1f.3
1103 09:47:25.506601 scan_static_bus for PCI: 00:1f.3 done
1104 09:47:25.513250 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 09:47:25.516605 PCI: 00:1f.5 scanning...
1106 09:47:25.519721 scan_generic_bus for PCI: 00:1f.5
1107 09:47:25.522938 scan_generic_bus for PCI: 00:1f.5 done
1108 09:47:25.526382 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 09:47:25.532836 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1110 09:47:25.536396 scan_static_bus for Root Device done
1111 09:47:25.539774 scan_bus: bus Root Device finished in 737 msecs
1112 09:47:25.543026 done
1113 09:47:25.546158 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1114 09:47:25.549663 Chrome EC: UHEPI supported
1115 09:47:25.556326 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 09:47:25.562827 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 09:47:25.566310 SPI flash protection: WPSW=0 SRP0=0
1118 09:47:25.572903 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 09:47:25.576087 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1120 09:47:25.579361 found VGA at PCI: 00:02.0
1121 09:47:25.582378 Setting up VGA for PCI: 00:02.0
1122 09:47:25.589098 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 09:47:25.592472 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 09:47:25.595666 Allocating resources...
1125 09:47:25.599109 Reading resources...
1126 09:47:25.602747 Root Device read_resources bus 0 link: 0
1127 09:47:25.605840 DOMAIN: 0000 read_resources bus 0 link: 0
1128 09:47:25.612261 PCI: 00:04.0 read_resources bus 1 link: 0
1129 09:47:25.615614 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 09:47:25.622591 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 09:47:25.625766 USB0 port 0 read_resources bus 0 link: 0
1132 09:47:25.632460 USB0 port 0 read_resources bus 0 link: 0 done
1133 09:47:25.635403 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 09:47:25.641996 PCI: 00:14.0 read_resources bus 0 link: 0
1135 09:47:25.645843 USB0 port 0 read_resources bus 0 link: 0
1136 09:47:25.651944 USB0 port 0 read_resources bus 0 link: 0 done
1137 09:47:25.655411 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 09:47:25.661886 PCI: 00:14.3 read_resources bus 0 link: 0
1139 09:47:25.665590 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 09:47:25.672155 PCI: 00:15.0 read_resources bus 0 link: 0
1141 09:47:25.675373 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 09:47:25.682157 PCI: 00:15.1 read_resources bus 0 link: 0
1143 09:47:25.685370 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 09:47:25.691845 PCI: 00:19.1 read_resources bus 0 link: 0
1145 09:47:25.695240 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 09:47:25.702175 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 09:47:25.705217 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 09:47:25.712198 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 09:47:25.715199 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 09:47:25.721807 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 09:47:25.725028 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 09:47:25.731698 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 09:47:25.735299 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 09:47:25.741499 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 09:47:25.745097 GENERIC: 0.0 read_resources bus 0 link: 0
1156 09:47:25.751503 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 09:47:25.754710 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 09:47:25.761473 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 09:47:25.764595 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 09:47:25.771368 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 09:47:25.774575 Root Device read_resources bus 0 link: 0 done
1162 09:47:25.777998 Done reading resources.
1163 09:47:25.784857 Show resources in subtree (Root Device)...After reading.
1164 09:47:25.788070 Root Device child on link 0 DOMAIN: 0000
1165 09:47:25.791038 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 09:47:25.801106 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 09:47:25.811026 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 09:47:25.811111 PCI: 00:00.0
1169 09:47:25.821071 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 09:47:25.831469 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 09:47:25.840901 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 09:47:25.850880 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 09:47:25.860756 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 09:47:25.871048 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 09:47:25.877527 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 09:47:25.887766 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 09:47:25.897485 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 09:47:25.907077 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 09:47:25.917318 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 09:47:25.923754 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 09:47:25.934290 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 09:47:25.944028 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 09:47:25.953956 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 09:47:25.963277 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 09:47:25.973512 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 09:47:25.983501 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 09:47:25.990115 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 09:47:25.999980 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 09:47:26.003449 PCI: 00:02.0
1190 09:47:26.013144 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 09:47:26.023279 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 09:47:26.033423 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 09:47:26.036493 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 09:47:26.046443 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 09:47:26.046527 GENERIC: 0.0
1196 09:47:26.049547 PCI: 00:05.0
1197 09:47:26.059828 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 09:47:26.063117 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 09:47:26.066891 GENERIC: 0.0
1200 09:47:26.066975 PCI: 00:08.0
1201 09:47:26.076616 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 09:47:26.079781 PCI: 00:0a.0
1203 09:47:26.083107 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 09:47:26.092723 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 09:47:26.099469 USB0 port 0 child on link 0 USB3 port 0
1206 09:47:26.099549 USB3 port 0
1207 09:47:26.102837 USB3 port 1
1208 09:47:26.102913 USB3 port 2
1209 09:47:26.106010 USB3 port 3
1210 09:47:26.109392 PCI: 00:14.0 child on link 0 USB0 port 0
1211 09:47:26.119372 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 09:47:26.122740 USB0 port 0 child on link 0 USB2 port 0
1213 09:47:26.126379 USB2 port 0
1214 09:47:26.126458 USB2 port 1
1215 09:47:26.129346 USB2 port 2
1216 09:47:26.132492 USB2 port 3
1217 09:47:26.132568 USB2 port 4
1218 09:47:26.136044 USB2 port 5
1219 09:47:26.136118 USB2 port 6
1220 09:47:26.140205 USB2 port 7
1221 09:47:26.140280 USB2 port 8
1222 09:47:26.142800 USB2 port 9
1223 09:47:26.142875 USB3 port 0
1224 09:47:26.145910 USB3 port 1
1225 09:47:26.145983 USB3 port 2
1226 09:47:26.149458 USB3 port 3
1227 09:47:26.149534 PCI: 00:14.2
1228 09:47:26.159368 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 09:47:26.169096 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 09:47:26.175969 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 09:47:26.185762 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 09:47:26.185846 GENERIC: 0.0
1233 09:47:26.192233 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 09:47:26.202289 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 09:47:26.202373 I2C: 00:1a
1236 09:47:26.205546 I2C: 00:31
1237 09:47:26.205668 I2C: 00:32
1238 09:47:26.209010 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 09:47:26.219049 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 09:47:26.222309 I2C: 00:10
1241 09:47:26.222392 PCI: 00:15.2
1242 09:47:26.232200 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 09:47:26.235636 PCI: 00:15.3
1244 09:47:26.245671 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 09:47:26.245755 PCI: 00:16.0
1246 09:47:26.255213 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 09:47:26.258485 PCI: 00:19.0
1248 09:47:26.262230 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 09:47:26.272101 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 09:47:26.275472 I2C: 00:15
1251 09:47:26.278587 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 09:47:26.288652 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 09:47:26.295284 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 09:47:26.305038 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 09:47:26.308238 GENERIC: 0.0
1256 09:47:26.308322 PCI: 01:00.0
1257 09:47:26.318290 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 09:47:26.328343 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1259 09:47:26.338342 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1260 09:47:26.338428 PCI: 00:1e.0
1261 09:47:26.351290 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1262 09:47:26.354982 PCI: 00:1e.2 child on link 0 SPI: 00
1263 09:47:26.364653 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 09:47:26.364740 SPI: 00
1265 09:47:26.371216 PCI: 00:1e.3 child on link 0 SPI: 00
1266 09:47:26.381325 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 09:47:26.381410 SPI: 00
1268 09:47:26.384670 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1269 09:47:26.394702 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1270 09:47:26.394788 PNP: 0c09.0
1271 09:47:26.404852 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1272 09:47:26.408100 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1273 09:47:26.418359 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1274 09:47:26.427812 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1275 09:47:26.431210 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1276 09:47:26.434552 GENERIC: 0.0
1277 09:47:26.434628 GENERIC: 1.0
1278 09:47:26.437663 PCI: 00:1f.3
1279 09:47:26.447776 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1280 09:47:26.457551 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1281 09:47:26.461018 PCI: 00:1f.5
1282 09:47:26.467950 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1283 09:47:26.474208 CPU_CLUSTER: 0 child on link 0 APIC: 00
1284 09:47:26.474282 APIC: 00
1285 09:47:26.474346 APIC: 01
1286 09:47:26.477386 APIC: 06
1287 09:47:26.477456 APIC: 02
1288 09:47:26.477517 APIC: 05
1289 09:47:26.481011 APIC: 04
1290 09:47:26.481080 APIC: 07
1291 09:47:26.484314 APIC: 03
1292 09:47:26.491059 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1293 09:47:26.497683 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1294 09:47:26.504082 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1295 09:47:26.507478 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1296 09:47:26.514046 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1297 09:47:26.517775 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1298 09:47:26.521058 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1299 09:47:26.527641 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1300 09:47:26.537125 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1301 09:47:26.544291 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1302 09:47:26.550623 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1303 09:47:26.557235 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1304 09:47:26.563731 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1305 09:47:26.570503 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1306 09:47:26.580657 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1307 09:47:26.583794 DOMAIN: 0000: Resource ranges:
1308 09:47:26.587104 * Base: 1000, Size: 800, Tag: 100
1309 09:47:26.590227 * Base: 1900, Size: e700, Tag: 100
1310 09:47:26.597306 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1311 09:47:26.603850 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1312 09:47:26.610251 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1313 09:47:26.616749 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1314 09:47:26.623480 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1315 09:47:26.633477 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1316 09:47:26.640427 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1317 09:47:26.646854 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1318 09:47:26.657274 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1319 09:47:26.663501 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1320 09:47:26.670095 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1321 09:47:26.676375 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1322 09:47:26.686821 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1323 09:47:26.693111 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1324 09:47:26.699935 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1325 09:47:26.709588 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1326 09:47:26.716356 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1327 09:47:26.722814 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1328 09:47:26.733173 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1329 09:47:26.739580 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1330 09:47:26.746556 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1331 09:47:26.756060 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1332 09:47:26.762599 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1333 09:47:26.769447 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1334 09:47:26.779099 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1335 09:47:26.782563 DOMAIN: 0000: Resource ranges:
1336 09:47:26.786101 * Base: 7fc00000, Size: 40400000, Tag: 200
1337 09:47:26.789373 * Base: d0000000, Size: 28000000, Tag: 200
1338 09:47:26.795744 * Base: fa000000, Size: 1000000, Tag: 200
1339 09:47:26.799595 * Base: fb001000, Size: 2fff000, Tag: 200
1340 09:47:26.802397 * Base: fe010000, Size: 2e000, Tag: 200
1341 09:47:26.806096 * Base: fe03f000, Size: d41000, Tag: 200
1342 09:47:26.812785 * Base: fed88000, Size: 8000, Tag: 200
1343 09:47:26.816216 * Base: fed93000, Size: d000, Tag: 200
1344 09:47:26.819531 * Base: feda2000, Size: 1e000, Tag: 200
1345 09:47:26.822451 * Base: fede0000, Size: 1220000, Tag: 200
1346 09:47:26.828970 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1347 09:47:26.835995 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1348 09:47:26.842645 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1349 09:47:26.848882 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1350 09:47:26.856094 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1351 09:47:26.862130 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1352 09:47:26.868774 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1353 09:47:26.875797 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1354 09:47:26.882143 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1355 09:47:26.888727 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1356 09:47:26.895692 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1357 09:47:26.902001 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1358 09:47:26.908599 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1359 09:47:26.915319 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1360 09:47:26.921985 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1361 09:47:26.928493 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1362 09:47:26.935062 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1363 09:47:26.941838 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1364 09:47:26.948465 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1365 09:47:26.955255 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1366 09:47:26.961714 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1367 09:47:26.968428 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1368 09:47:26.974815 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1369 09:47:26.981545 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1370 09:47:26.991595 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1371 09:47:26.994738 PCI: 00:1d.0: Resource ranges:
1372 09:47:26.998035 * Base: 7fc00000, Size: 100000, Tag: 200
1373 09:47:27.005008 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1374 09:47:27.011629 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1375 09:47:27.018121 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1376 09:47:27.024814 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1377 09:47:27.034630 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1378 09:47:27.038221 Root Device assign_resources, bus 0 link: 0
1379 09:47:27.041410 DOMAIN: 0000 assign_resources, bus 0 link: 0
1380 09:47:27.051472 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1381 09:47:27.057708 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1382 09:47:27.067814 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1383 09:47:27.074658 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1384 09:47:27.080830 PCI: 00:04.0 assign_resources, bus 1 link: 0
1385 09:47:27.084550 PCI: 00:04.0 assign_resources, bus 1 link: 0
1386 09:47:27.094052 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1387 09:47:27.100643 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1388 09:47:27.110792 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1389 09:47:27.113836 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1390 09:47:27.117293 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1391 09:47:27.127350 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1392 09:47:27.130660 PCI: 00:14.0 assign_resources, bus 0 link: 0
1393 09:47:27.137294 PCI: 00:14.0 assign_resources, bus 0 link: 0
1394 09:47:27.143433 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1395 09:47:27.153552 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1396 09:47:27.160326 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1397 09:47:27.163348 PCI: 00:14.3 assign_resources, bus 0 link: 0
1398 09:47:27.170004 PCI: 00:14.3 assign_resources, bus 0 link: 0
1399 09:47:27.176847 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1400 09:47:27.183119 PCI: 00:15.0 assign_resources, bus 0 link: 0
1401 09:47:27.186750 PCI: 00:15.0 assign_resources, bus 0 link: 0
1402 09:47:27.196869 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1403 09:47:27.199817 PCI: 00:15.1 assign_resources, bus 0 link: 0
1404 09:47:27.203003 PCI: 00:15.1 assign_resources, bus 0 link: 0
1405 09:47:27.213057 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1406 09:47:27.219682 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1407 09:47:27.229718 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1408 09:47:27.236122 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1409 09:47:27.243175 PCI: 00:19.1 assign_resources, bus 0 link: 0
1410 09:47:27.246090 PCI: 00:19.1 assign_resources, bus 0 link: 0
1411 09:47:27.256225 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1412 09:47:27.265891 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1413 09:47:27.273014 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1414 09:47:27.279203 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 09:47:27.285988 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1416 09:47:27.295751 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1417 09:47:27.302425 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1418 09:47:27.305509 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1419 09:47:27.315922 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1420 09:47:27.318986 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1421 09:47:27.325791 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1422 09:47:27.332376 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1423 09:47:27.339053 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1424 09:47:27.341878 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1425 09:47:27.345319 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1426 09:47:27.352222 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1427 09:47:27.355803 LPC: Trying to open IO window from 800 size 1ff
1428 09:47:27.365914 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1429 09:47:27.372050 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1430 09:47:27.382107 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1431 09:47:27.385384 DOMAIN: 0000 assign_resources, bus 0 link: 0
1432 09:47:27.392167 Root Device assign_resources, bus 0 link: 0
1433 09:47:27.392251 Done setting resources.
1434 09:47:27.398528 Show resources in subtree (Root Device)...After assigning values.
1435 09:47:27.405347 Root Device child on link 0 DOMAIN: 0000
1436 09:47:27.408719 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1437 09:47:27.418735 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1438 09:47:27.428801 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1439 09:47:27.428885 PCI: 00:00.0
1440 09:47:27.438855 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1441 09:47:27.448342 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1442 09:47:27.458243 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1443 09:47:27.468232 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1444 09:47:27.475065 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1445 09:47:27.485145 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1446 09:47:27.495061 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1447 09:47:27.504719 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1448 09:47:27.514626 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1449 09:47:27.521724 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1450 09:47:27.531422 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1451 09:47:27.541081 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1452 09:47:27.551511 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1453 09:47:27.561315 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1454 09:47:27.567737 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1455 09:47:27.578025 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1456 09:47:27.587698 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1457 09:47:27.597743 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1458 09:47:27.607722 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1459 09:47:27.617841 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1460 09:47:27.617925 PCI: 00:02.0
1461 09:47:27.630657 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1462 09:47:27.640917 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1463 09:47:27.650778 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1464 09:47:27.654002 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1465 09:47:27.664055 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1466 09:47:27.667383 GENERIC: 0.0
1467 09:47:27.667469 PCI: 00:05.0
1468 09:47:27.677176 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1469 09:47:27.683718 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1470 09:47:27.683803 GENERIC: 0.0
1471 09:47:27.687038 PCI: 00:08.0
1472 09:47:27.697006 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1473 09:47:27.697092 PCI: 00:0a.0
1474 09:47:27.703684 PCI: 00:0d.0 child on link 0 USB0 port 0
1475 09:47:27.713731 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1476 09:47:27.717122 USB0 port 0 child on link 0 USB3 port 0
1477 09:47:27.720026 USB3 port 0
1478 09:47:27.720110 USB3 port 1
1479 09:47:27.723444 USB3 port 2
1480 09:47:27.723529 USB3 port 3
1481 09:47:27.730573 PCI: 00:14.0 child on link 0 USB0 port 0
1482 09:47:27.740192 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1483 09:47:27.743346 USB0 port 0 child on link 0 USB2 port 0
1484 09:47:27.746782 USB2 port 0
1485 09:47:27.746867 USB2 port 1
1486 09:47:27.749947 USB2 port 2
1487 09:47:27.750042 USB2 port 3
1488 09:47:27.753240 USB2 port 4
1489 09:47:27.753325 USB2 port 5
1490 09:47:27.756766 USB2 port 6
1491 09:47:27.756850 USB2 port 7
1492 09:47:27.760359 USB2 port 8
1493 09:47:27.760444 USB2 port 9
1494 09:47:27.763464 USB3 port 0
1495 09:47:27.763548 USB3 port 1
1496 09:47:27.766736 USB3 port 2
1497 09:47:27.770571 USB3 port 3
1498 09:47:27.770661 PCI: 00:14.2
1499 09:47:27.780098 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1500 09:47:27.789958 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1501 09:47:27.796871 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1502 09:47:27.806662 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1503 09:47:27.806848 GENERIC: 0.0
1504 09:47:27.813364 PCI: 00:15.0 child on link 0 I2C: 00:1a
1505 09:47:27.823282 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1506 09:47:27.823594 I2C: 00:1a
1507 09:47:27.826631 I2C: 00:31
1508 09:47:27.827032 I2C: 00:32
1509 09:47:27.829961 PCI: 00:15.1 child on link 0 I2C: 00:10
1510 09:47:27.843363 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1511 09:47:27.843842 I2C: 00:10
1512 09:47:27.846660 PCI: 00:15.2
1513 09:47:27.856611 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1514 09:47:27.857052 PCI: 00:15.3
1515 09:47:27.866351 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1516 09:47:27.869842 PCI: 00:16.0
1517 09:47:27.880148 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1518 09:47:27.880578 PCI: 00:19.0
1519 09:47:27.886584 PCI: 00:19.1 child on link 0 I2C: 00:15
1520 09:47:27.896420 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1521 09:47:27.896854 I2C: 00:15
1522 09:47:27.902978 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1523 09:47:27.909676 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1524 09:47:27.923034 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1525 09:47:27.932770 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1526 09:47:27.936416 GENERIC: 0.0
1527 09:47:27.936837 PCI: 01:00.0
1528 09:47:27.945974 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1529 09:47:27.956014 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1530 09:47:27.969316 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1531 09:47:27.969800 PCI: 00:1e.0
1532 09:47:27.979471 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1533 09:47:27.985899 PCI: 00:1e.2 child on link 0 SPI: 00
1534 09:47:27.995594 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1535 09:47:27.996027 SPI: 00
1536 09:47:27.999249 PCI: 00:1e.3 child on link 0 SPI: 00
1537 09:47:28.012117 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1538 09:47:28.012544 SPI: 00
1539 09:47:28.015843 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1540 09:47:28.025672 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1541 09:47:28.026106 PNP: 0c09.0
1542 09:47:28.036019 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1543 09:47:28.039124 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1544 09:47:28.049045 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1545 09:47:28.058796 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1546 09:47:28.062082 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1547 09:47:28.065658 GENERIC: 0.0
1548 09:47:28.066097 GENERIC: 1.0
1549 09:47:28.068955 PCI: 00:1f.3
1550 09:47:28.078654 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1551 09:47:28.088782 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1552 09:47:28.092054 PCI: 00:1f.5
1553 09:47:28.102197 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1554 09:47:28.105459 CPU_CLUSTER: 0 child on link 0 APIC: 00
1555 09:47:28.108573 APIC: 00
1556 09:47:28.109015 APIC: 01
1557 09:47:28.109444 APIC: 06
1558 09:47:28.112064 APIC: 02
1559 09:47:28.112527 APIC: 05
1560 09:47:28.112946 APIC: 04
1561 09:47:28.115157 APIC: 07
1562 09:47:28.115591 APIC: 03
1563 09:47:28.118775 Done allocating resources.
1564 09:47:28.125190 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1565 09:47:28.131886 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1566 09:47:28.135008 Configure GPIOs for I2S audio on UP4.
1567 09:47:28.141615 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1568 09:47:28.145117 Enabling resources...
1569 09:47:28.148150 PCI: 00:00.0 subsystem <- 8086/9a12
1570 09:47:28.151453 PCI: 00:00.0 cmd <- 06
1571 09:47:28.154756 PCI: 00:02.0 subsystem <- 8086/9a40
1572 09:47:28.155209 PCI: 00:02.0 cmd <- 03
1573 09:47:28.161648 PCI: 00:04.0 subsystem <- 8086/9a03
1574 09:47:28.162084 PCI: 00:04.0 cmd <- 02
1575 09:47:28.165218 PCI: 00:05.0 subsystem <- 8086/9a19
1576 09:47:28.168533 PCI: 00:05.0 cmd <- 02
1577 09:47:28.171815 PCI: 00:08.0 subsystem <- 8086/9a11
1578 09:47:28.174872 PCI: 00:08.0 cmd <- 06
1579 09:47:28.178079 PCI: 00:0d.0 subsystem <- 8086/9a13
1580 09:47:28.181388 PCI: 00:0d.0 cmd <- 02
1581 09:47:28.184867 PCI: 00:14.0 subsystem <- 8086/a0ed
1582 09:47:28.188009 PCI: 00:14.0 cmd <- 02
1583 09:47:28.191384 PCI: 00:14.2 subsystem <- 8086/a0ef
1584 09:47:28.194650 PCI: 00:14.2 cmd <- 02
1585 09:47:28.197995 PCI: 00:14.3 subsystem <- 8086/a0f0
1586 09:47:28.201323 PCI: 00:14.3 cmd <- 02
1587 09:47:28.204437 PCI: 00:15.0 subsystem <- 8086/a0e8
1588 09:47:28.204842 PCI: 00:15.0 cmd <- 02
1589 09:47:28.211635 PCI: 00:15.1 subsystem <- 8086/a0e9
1590 09:47:28.212099 PCI: 00:15.1 cmd <- 02
1591 09:47:28.214821 PCI: 00:15.2 subsystem <- 8086/a0ea
1592 09:47:28.217782 PCI: 00:15.2 cmd <- 02
1593 09:47:28.221215 PCI: 00:15.3 subsystem <- 8086/a0eb
1594 09:47:28.224812 PCI: 00:15.3 cmd <- 02
1595 09:47:28.228239 PCI: 00:16.0 subsystem <- 8086/a0e0
1596 09:47:28.231354 PCI: 00:16.0 cmd <- 02
1597 09:47:28.234646 PCI: 00:19.1 subsystem <- 8086/a0c6
1598 09:47:28.237909 PCI: 00:19.1 cmd <- 02
1599 09:47:28.241228 PCI: 00:1d.0 bridge ctrl <- 0013
1600 09:47:28.244652 PCI: 00:1d.0 subsystem <- 8086/a0b0
1601 09:47:28.247882 PCI: 00:1d.0 cmd <- 06
1602 09:47:28.251468 PCI: 00:1e.0 subsystem <- 8086/a0a8
1603 09:47:28.251916 PCI: 00:1e.0 cmd <- 06
1604 09:47:28.258409 PCI: 00:1e.2 subsystem <- 8086/a0aa
1605 09:47:28.258842 PCI: 00:1e.2 cmd <- 06
1606 09:47:28.261688 PCI: 00:1e.3 subsystem <- 8086/a0ab
1607 09:47:28.264926 PCI: 00:1e.3 cmd <- 02
1608 09:47:28.267871 PCI: 00:1f.0 subsystem <- 8086/a087
1609 09:47:28.271430 PCI: 00:1f.0 cmd <- 407
1610 09:47:28.274698 PCI: 00:1f.3 subsystem <- 8086/a0c8
1611 09:47:28.277762 PCI: 00:1f.3 cmd <- 02
1612 09:47:28.281432 PCI: 00:1f.5 subsystem <- 8086/a0a4
1613 09:47:28.284510 PCI: 00:1f.5 cmd <- 406
1614 09:47:28.288695 PCI: 01:00.0 cmd <- 02
1615 09:47:28.293142 done.
1616 09:47:28.296276 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1617 09:47:28.299231 Initializing devices...
1618 09:47:28.302619 Root Device init
1619 09:47:28.305829 Chrome EC: Set SMI mask to 0x0000000000000000
1620 09:47:28.313331 Chrome EC: clear events_b mask to 0x0000000000000000
1621 09:47:28.320188 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1622 09:47:28.326892 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1623 09:47:28.333152 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1624 09:47:28.336563 Chrome EC: Set WAKE mask to 0x0000000000000000
1625 09:47:28.344700 fw_config match found: DB_USB=USB3_ACTIVE
1626 09:47:28.347433 Configure Right Type-C port orientation for retimer
1627 09:47:28.353897 Root Device init finished in 46 msecs
1628 09:47:28.354346 PCI: 00:00.0 init
1629 09:47:28.357962 CPU TDP = 9 Watts
1630 09:47:28.361440 CPU PL1 = 9 Watts
1631 09:47:28.361905 CPU PL2 = 40 Watts
1632 09:47:28.364881 CPU PL4 = 83 Watts
1633 09:47:28.368319 PCI: 00:00.0 init finished in 8 msecs
1634 09:47:28.371239 PCI: 00:02.0 init
1635 09:47:28.371684 GMA: Found VBT in CBFS
1636 09:47:28.374937 GMA: Found valid VBT in CBFS
1637 09:47:28.381178 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1638 09:47:28.387844 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1639 09:47:28.391395 PCI: 00:02.0 init finished in 18 msecs
1640 09:47:28.394634 PCI: 00:05.0 init
1641 09:47:28.397881 PCI: 00:05.0 init finished in 0 msecs
1642 09:47:28.401370 PCI: 00:08.0 init
1643 09:47:28.404657 PCI: 00:08.0 init finished in 0 msecs
1644 09:47:28.408113 PCI: 00:14.0 init
1645 09:47:28.411309 PCI: 00:14.0 init finished in 0 msecs
1646 09:47:28.414876 PCI: 00:14.2 init
1647 09:47:28.417966 PCI: 00:14.2 init finished in 0 msecs
1648 09:47:28.421181 PCI: 00:15.0 init
1649 09:47:28.424862 I2C bus 0 version 0x3230302a
1650 09:47:28.427824 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1651 09:47:28.431366 PCI: 00:15.0 init finished in 6 msecs
1652 09:47:28.431803 PCI: 00:15.1 init
1653 09:47:28.434782 I2C bus 1 version 0x3230302a
1654 09:47:28.437914 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1655 09:47:28.444534 PCI: 00:15.1 init finished in 6 msecs
1656 09:47:28.444966 PCI: 00:15.2 init
1657 09:47:28.448124 I2C bus 2 version 0x3230302a
1658 09:47:28.451221 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1659 09:47:28.454307 PCI: 00:15.2 init finished in 6 msecs
1660 09:47:28.458134 PCI: 00:15.3 init
1661 09:47:28.461092 I2C bus 3 version 0x3230302a
1662 09:47:28.464497 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1663 09:47:28.467603 PCI: 00:15.3 init finished in 6 msecs
1664 09:47:28.471033 PCI: 00:16.0 init
1665 09:47:28.474599 PCI: 00:16.0 init finished in 0 msecs
1666 09:47:28.477759 PCI: 00:19.1 init
1667 09:47:28.480701 I2C bus 5 version 0x3230302a
1668 09:47:28.484386 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1669 09:47:28.487636 PCI: 00:19.1 init finished in 6 msecs
1670 09:47:28.490688 PCI: 00:1d.0 init
1671 09:47:28.491123 Initializing PCH PCIe bridge.
1672 09:47:28.497538 PCI: 00:1d.0 init finished in 3 msecs
1673 09:47:28.500889 PCI: 00:1f.0 init
1674 09:47:28.504322 IOAPIC: Initializing IOAPIC at 0xfec00000
1675 09:47:28.507418 IOAPIC: Bootstrap Processor Local APIC = 0x00
1676 09:47:28.510705 IOAPIC: ID = 0x02
1677 09:47:28.514178 IOAPIC: Dumping registers
1678 09:47:28.514614 reg 0x0000: 0x02000000
1679 09:47:28.517698 reg 0x0001: 0x00770020
1680 09:47:28.520868 reg 0x0002: 0x00000000
1681 09:47:28.523889 PCI: 00:1f.0 init finished in 21 msecs
1682 09:47:28.527385 PCI: 00:1f.2 init
1683 09:47:28.530919 Disabling ACPI via APMC.
1684 09:47:28.534270 APMC done.
1685 09:47:28.537449 PCI: 00:1f.2 init finished in 5 msecs
1686 09:47:28.548415 PCI: 01:00.0 init
1687 09:47:28.551556 PCI: 01:00.0 init finished in 0 msecs
1688 09:47:28.554881 PNP: 0c09.0 init
1689 09:47:28.558221 Google Chrome EC uptime: 8.411 seconds
1690 09:47:28.564869 Google Chrome AP resets since EC boot: 1
1691 09:47:28.568443 Google Chrome most recent AP reset causes:
1692 09:47:28.571603 0.348: 32775 shutdown: entering G3
1693 09:47:28.578094 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1694 09:47:28.581387 PNP: 0c09.0 init finished in 22 msecs
1695 09:47:28.587326 Devices initialized
1696 09:47:28.590649 Show all devs... After init.
1697 09:47:28.593834 Root Device: enabled 1
1698 09:47:28.594273 DOMAIN: 0000: enabled 1
1699 09:47:28.597401 CPU_CLUSTER: 0: enabled 1
1700 09:47:28.600693 PCI: 00:00.0: enabled 1
1701 09:47:28.603863 PCI: 00:02.0: enabled 1
1702 09:47:28.604298 PCI: 00:04.0: enabled 1
1703 09:47:28.607598 PCI: 00:05.0: enabled 1
1704 09:47:28.610314 PCI: 00:06.0: enabled 0
1705 09:47:28.613689 PCI: 00:07.0: enabled 0
1706 09:47:28.614140 PCI: 00:07.1: enabled 0
1707 09:47:28.617162 PCI: 00:07.2: enabled 0
1708 09:47:28.620464 PCI: 00:07.3: enabled 0
1709 09:47:28.623899 PCI: 00:08.0: enabled 1
1710 09:47:28.624339 PCI: 00:09.0: enabled 0
1711 09:47:28.626928 PCI: 00:0a.0: enabled 0
1712 09:47:28.630448 PCI: 00:0d.0: enabled 1
1713 09:47:28.633510 PCI: 00:0d.1: enabled 0
1714 09:47:28.633986 PCI: 00:0d.2: enabled 0
1715 09:47:28.637185 PCI: 00:0d.3: enabled 0
1716 09:47:28.640395 PCI: 00:0e.0: enabled 0
1717 09:47:28.640898 PCI: 00:10.2: enabled 1
1718 09:47:28.644186 PCI: 00:10.6: enabled 0
1719 09:47:28.646687 PCI: 00:10.7: enabled 0
1720 09:47:28.650172 PCI: 00:12.0: enabled 0
1721 09:47:28.650557 PCI: 00:12.6: enabled 0
1722 09:47:28.653470 PCI: 00:13.0: enabled 0
1723 09:47:28.656748 PCI: 00:14.0: enabled 1
1724 09:47:28.660051 PCI: 00:14.1: enabled 0
1725 09:47:28.660460 PCI: 00:14.2: enabled 1
1726 09:47:28.663235 PCI: 00:14.3: enabled 1
1727 09:47:28.666708 PCI: 00:15.0: enabled 1
1728 09:47:28.670462 PCI: 00:15.1: enabled 1
1729 09:47:28.670860 PCI: 00:15.2: enabled 1
1730 09:47:28.673707 PCI: 00:15.3: enabled 1
1731 09:47:28.676898 PCI: 00:16.0: enabled 1
1732 09:47:28.677281 PCI: 00:16.1: enabled 0
1733 09:47:28.680229 PCI: 00:16.2: enabled 0
1734 09:47:28.683226 PCI: 00:16.3: enabled 0
1735 09:47:28.686784 PCI: 00:16.4: enabled 0
1736 09:47:28.687178 PCI: 00:16.5: enabled 0
1737 09:47:28.690433 PCI: 00:17.0: enabled 0
1738 09:47:28.693291 PCI: 00:19.0: enabled 0
1739 09:47:28.696874 PCI: 00:19.1: enabled 1
1740 09:47:28.697281 PCI: 00:19.2: enabled 0
1741 09:47:28.700428 PCI: 00:1c.0: enabled 1
1742 09:47:28.703666 PCI: 00:1c.1: enabled 0
1743 09:47:28.706617 PCI: 00:1c.2: enabled 0
1744 09:47:28.706996 PCI: 00:1c.3: enabled 0
1745 09:47:28.710279 PCI: 00:1c.4: enabled 0
1746 09:47:28.713444 PCI: 00:1c.5: enabled 0
1747 09:47:28.716951 PCI: 00:1c.6: enabled 1
1748 09:47:28.717351 PCI: 00:1c.7: enabled 0
1749 09:47:28.719840 PCI: 00:1d.0: enabled 1
1750 09:47:28.723217 PCI: 00:1d.1: enabled 0
1751 09:47:28.723601 PCI: 00:1d.2: enabled 1
1752 09:47:28.726460 PCI: 00:1d.3: enabled 0
1753 09:47:28.729983 PCI: 00:1e.0: enabled 1
1754 09:47:28.733507 PCI: 00:1e.1: enabled 0
1755 09:47:28.733938 PCI: 00:1e.2: enabled 1
1756 09:47:28.736592 PCI: 00:1e.3: enabled 1
1757 09:47:28.739947 PCI: 00:1f.0: enabled 1
1758 09:47:28.743189 PCI: 00:1f.1: enabled 0
1759 09:47:28.743732 PCI: 00:1f.2: enabled 1
1760 09:47:28.746819 PCI: 00:1f.3: enabled 1
1761 09:47:28.749722 PCI: 00:1f.4: enabled 0
1762 09:47:28.753549 PCI: 00:1f.5: enabled 1
1763 09:47:28.753971 PCI: 00:1f.6: enabled 0
1764 09:47:28.756562 PCI: 00:1f.7: enabled 0
1765 09:47:28.759900 APIC: 00: enabled 1
1766 09:47:28.760309 GENERIC: 0.0: enabled 1
1767 09:47:28.763186 GENERIC: 0.0: enabled 1
1768 09:47:28.766482 GENERIC: 1.0: enabled 1
1769 09:47:28.770013 GENERIC: 0.0: enabled 1
1770 09:47:28.770419 GENERIC: 1.0: enabled 1
1771 09:47:28.773135 USB0 port 0: enabled 1
1772 09:47:28.776390 GENERIC: 0.0: enabled 1
1773 09:47:28.776802 USB0 port 0: enabled 1
1774 09:47:28.779669 GENERIC: 0.0: enabled 1
1775 09:47:28.783331 I2C: 00:1a: enabled 1
1776 09:47:28.786511 I2C: 00:31: enabled 1
1777 09:47:28.787022 I2C: 00:32: enabled 1
1778 09:47:28.789733 I2C: 00:10: enabled 1
1779 09:47:28.792919 I2C: 00:15: enabled 1
1780 09:47:28.793348 GENERIC: 0.0: enabled 0
1781 09:47:28.796390 GENERIC: 1.0: enabled 0
1782 09:47:28.799582 GENERIC: 0.0: enabled 1
1783 09:47:28.800012 SPI: 00: enabled 1
1784 09:47:28.803007 SPI: 00: enabled 1
1785 09:47:28.806238 PNP: 0c09.0: enabled 1
1786 09:47:28.806660 GENERIC: 0.0: enabled 1
1787 09:47:28.809371 USB3 port 0: enabled 1
1788 09:47:28.812810 USB3 port 1: enabled 1
1789 09:47:28.816369 USB3 port 2: enabled 0
1790 09:47:28.816841 USB3 port 3: enabled 0
1791 09:47:28.819380 USB2 port 0: enabled 0
1792 09:47:28.823314 USB2 port 1: enabled 1
1793 09:47:28.823742 USB2 port 2: enabled 1
1794 09:47:28.826455 USB2 port 3: enabled 0
1795 09:47:28.829727 USB2 port 4: enabled 1
1796 09:47:28.830157 USB2 port 5: enabled 0
1797 09:47:28.832676 USB2 port 6: enabled 0
1798 09:47:28.836349 USB2 port 7: enabled 0
1799 09:47:28.839582 USB2 port 8: enabled 0
1800 09:47:28.840091 USB2 port 9: enabled 0
1801 09:47:28.842870 USB3 port 0: enabled 0
1802 09:47:28.846005 USB3 port 1: enabled 1
1803 09:47:28.846434 USB3 port 2: enabled 0
1804 09:47:28.849683 USB3 port 3: enabled 0
1805 09:47:28.852778 GENERIC: 0.0: enabled 1
1806 09:47:28.856224 GENERIC: 1.0: enabled 1
1807 09:47:28.856760 APIC: 01: enabled 1
1808 09:47:28.859409 APIC: 06: enabled 1
1809 09:47:28.859852 APIC: 02: enabled 1
1810 09:47:28.862711 APIC: 05: enabled 1
1811 09:47:28.866037 APIC: 04: enabled 1
1812 09:47:28.866471 APIC: 07: enabled 1
1813 09:47:28.869349 APIC: 03: enabled 1
1814 09:47:28.872787 PCI: 01:00.0: enabled 1
1815 09:47:28.876023 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1816 09:47:28.882567 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1817 09:47:28.885842 ELOG: NV offset 0xf30000 size 0x1000
1818 09:47:28.892877 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1819 09:47:28.899111 ELOG: Event(17) added with size 13 at 2022-08-12 08:38:46 UTC
1820 09:47:28.905648 ELOG: Event(92) added with size 9 at 2022-08-12 08:38:46 UTC
1821 09:47:28.912604 ELOG: Event(93) added with size 9 at 2022-08-12 08:38:46 UTC
1822 09:47:28.919080 ELOG: Event(9E) added with size 10 at 2022-08-12 08:38:46 UTC
1823 09:47:28.925505 ELOG: Event(9F) added with size 14 at 2022-08-12 08:38:47 UTC
1824 09:47:28.932049 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1825 09:47:28.935166 ELOG: Event(A1) added with size 10 at 2022-08-12 08:38:47 UTC
1826 09:47:28.942278 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1827 09:47:28.948654 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1828 09:47:28.951827 Finalize devices...
1829 09:47:28.952274 Devices finalized
1830 09:47:28.958448 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1831 09:47:28.965184 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1832 09:47:28.968417 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1833 09:47:28.975114 ME: HFSTS1 : 0x80030055
1834 09:47:28.978355 ME: HFSTS2 : 0x30280116
1835 09:47:28.981503 ME: HFSTS3 : 0x00000050
1836 09:47:28.988228 ME: HFSTS4 : 0x00004000
1837 09:47:28.991568 ME: HFSTS5 : 0x00000000
1838 09:47:28.995238 ME: HFSTS6 : 0x00400006
1839 09:47:29.001618 ME: Manufacturing Mode : YES
1840 09:47:29.004993 ME: SPI Protection Mode Enabled : NO
1841 09:47:29.008313 ME: FW Partition Table : OK
1842 09:47:29.011414 ME: Bringup Loader Failure : NO
1843 09:47:29.015144 ME: Firmware Init Complete : NO
1844 09:47:29.018413 ME: Boot Options Present : NO
1845 09:47:29.021631 ME: Update In Progress : NO
1846 09:47:29.025208 ME: D0i3 Support : YES
1847 09:47:29.031702 ME: Low Power State Enabled : NO
1848 09:47:29.034712 ME: CPU Replaced : YES
1849 09:47:29.037985 ME: CPU Replacement Valid : YES
1850 09:47:29.041990 ME: Current Working State : 5
1851 09:47:29.044858 ME: Current Operation State : 1
1852 09:47:29.047939 ME: Current Operation Mode : 3
1853 09:47:29.051595 ME: Error Code : 0
1854 09:47:29.054496 ME: Enhanced Debug Mode : NO
1855 09:47:29.057844 ME: CPU Debug Disabled : YES
1856 09:47:29.064583 ME: TXT Support : NO
1857 09:47:29.067716 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1858 09:47:29.078013 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1859 09:47:29.080861 CBFS: 'fallback/slic' not found.
1860 09:47:29.084016 ACPI: Writing ACPI tables at 76b01000.
1861 09:47:29.084099 ACPI: * FACS
1862 09:47:29.087520 ACPI: * DSDT
1863 09:47:29.091169 Ramoops buffer: 0x100000@0x76a00000.
1864 09:47:29.097252 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1865 09:47:29.100961 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1866 09:47:29.104172 Google Chrome EC: version:
1867 09:47:29.107360 ro: voema_v2.0.7540-147f8d37d1
1868 09:47:29.110933 rw: voema_v2.0.7540-147f8d37d1
1869 09:47:29.114078 running image: 2
1870 09:47:29.117517 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1871 09:47:29.122757 ACPI: * FADT
1872 09:47:29.122840 SCI is IRQ9
1873 09:47:29.129218 ACPI: added table 1/32, length now 40
1874 09:47:29.129301 ACPI: * SSDT
1875 09:47:29.132720 Found 1 CPU(s) with 8 core(s) each.
1876 09:47:29.139639 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1877 09:47:29.142673 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1878 09:47:29.146023 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1879 09:47:29.149139 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1880 09:47:29.156213 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1881 09:47:29.162359 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1882 09:47:29.165863 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1883 09:47:29.172649 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1884 09:47:29.179110 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1885 09:47:29.182443 \_SB.PCI0.RP09: Added StorageD3Enable property
1886 09:47:29.185721 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1887 09:47:29.192381 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1888 09:47:29.199090 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1889 09:47:29.202577 PS2K: Passing 80 keymaps to kernel
1890 09:47:29.208843 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1891 09:47:29.215735 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1892 09:47:29.222025 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1893 09:47:29.228788 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1894 09:47:29.235461 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1895 09:47:29.242426 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1896 09:47:29.248327 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1897 09:47:29.255256 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1898 09:47:29.258228 ACPI: added table 2/32, length now 44
1899 09:47:29.258312 ACPI: * MCFG
1900 09:47:29.261748 ACPI: added table 3/32, length now 48
1901 09:47:29.264785 ACPI: * TPM2
1902 09:47:29.268160 TPM2 log created at 0x769f0000
1903 09:47:29.271687 ACPI: added table 4/32, length now 52
1904 09:47:29.271761 ACPI: * MADT
1905 09:47:29.275087 SCI is IRQ9
1906 09:47:29.278250 ACPI: added table 5/32, length now 56
1907 09:47:29.281561 current = 76b09850
1908 09:47:29.281669 ACPI: * DMAR
1909 09:47:29.284858 ACPI: added table 6/32, length now 60
1910 09:47:29.288105 ACPI: added table 7/32, length now 64
1911 09:47:29.291712 ACPI: * HPET
1912 09:47:29.294942 ACPI: added table 8/32, length now 68
1913 09:47:29.295016 ACPI: done.
1914 09:47:29.298099 ACPI tables: 35216 bytes.
1915 09:47:29.301619 smbios_write_tables: 769ef000
1916 09:47:29.304876 EC returned error result code 3
1917 09:47:29.307992 Couldn't obtain OEM name from CBI
1918 09:47:29.311628 Create SMBIOS type 16
1919 09:47:29.314942 Create SMBIOS type 17
1920 09:47:29.318198 GENERIC: 0.0 (WIFI Device)
1921 09:47:29.318267 SMBIOS tables: 1750 bytes.
1922 09:47:29.325114 Writing table forward entry at 0x00000500
1923 09:47:29.331738 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1924 09:47:29.334880 Writing coreboot table at 0x76b25000
1925 09:47:29.338091 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1926 09:47:29.344653 1. 0000000000001000-000000000009ffff: RAM
1927 09:47:29.348134 2. 00000000000a0000-00000000000fffff: RESERVED
1928 09:47:29.354549 3. 0000000000100000-00000000769eefff: RAM
1929 09:47:29.357973 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1930 09:47:29.364383 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1931 09:47:29.370970 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1932 09:47:29.374336 7. 0000000077000000-000000007fbfffff: RESERVED
1933 09:47:29.377833 8. 00000000c0000000-00000000cfffffff: RESERVED
1934 09:47:29.384626 9. 00000000f8000000-00000000f9ffffff: RESERVED
1935 09:47:29.387940 10. 00000000fb000000-00000000fb000fff: RESERVED
1936 09:47:29.394532 11. 00000000fe000000-00000000fe00ffff: RESERVED
1937 09:47:29.397775 12. 00000000fed80000-00000000fed87fff: RESERVED
1938 09:47:29.404631 13. 00000000fed90000-00000000fed92fff: RESERVED
1939 09:47:29.407785 14. 00000000feda0000-00000000feda1fff: RESERVED
1940 09:47:29.414206 15. 00000000fedc0000-00000000feddffff: RESERVED
1941 09:47:29.417566 16. 0000000100000000-00000002803fffff: RAM
1942 09:47:29.420782 Passing 4 GPIOs to payload:
1943 09:47:29.424427 NAME | PORT | POLARITY | VALUE
1944 09:47:29.430834 lid | undefined | high | high
1945 09:47:29.434497 power | undefined | high | low
1946 09:47:29.440666 oprom | undefined | high | low
1947 09:47:29.447491 EC in RW | 0x000000e5 | high | high
1948 09:47:29.453924 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 6d50
1949 09:47:29.454001 coreboot table: 1576 bytes.
1950 09:47:29.461020 IMD ROOT 0. 0x76fff000 0x00001000
1951 09:47:29.464402 IMD SMALL 1. 0x76ffe000 0x00001000
1952 09:47:29.467274 FSP MEMORY 2. 0x76c4e000 0x003b0000
1953 09:47:29.471054 VPD 3. 0x76c4d000 0x00000367
1954 09:47:29.474279 RO MCACHE 4. 0x76c4c000 0x00000fdc
1955 09:47:29.477504 CONSOLE 5. 0x76c2c000 0x00020000
1956 09:47:29.480820 FMAP 6. 0x76c2b000 0x00000578
1957 09:47:29.483909 TIME STAMP 7. 0x76c2a000 0x00000910
1958 09:47:29.487111 VBOOT WORK 8. 0x76c16000 0x00014000
1959 09:47:29.494011 ROMSTG STCK 9. 0x76c15000 0x00001000
1960 09:47:29.497638 AFTER CAR 10. 0x76c0a000 0x0000b000
1961 09:47:29.500579 RAMSTAGE 11. 0x76b97000 0x00073000
1962 09:47:29.504054 REFCODE 12. 0x76b42000 0x00055000
1963 09:47:29.507273 SMM BACKUP 13. 0x76b32000 0x00010000
1964 09:47:29.510880 4f444749 14. 0x76b30000 0x00002000
1965 09:47:29.514307 EXT VBT15. 0x76b2d000 0x0000219f
1966 09:47:29.517436 COREBOOT 16. 0x76b25000 0x00008000
1967 09:47:29.520401 ACPI 17. 0x76b01000 0x00024000
1968 09:47:29.526982 ACPI GNVS 18. 0x76b00000 0x00001000
1969 09:47:29.530286 RAMOOPS 19. 0x76a00000 0x00100000
1970 09:47:29.533823 TPM2 TCGLOG20. 0x769f0000 0x00010000
1971 09:47:29.537064 SMBIOS 21. 0x769ef000 0x00000800
1972 09:47:29.540295 IMD small region:
1973 09:47:29.543907 IMD ROOT 0. 0x76ffec00 0x00000400
1974 09:47:29.547047 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1975 09:47:29.550550 POWER STATE 2. 0x76ffeb80 0x00000044
1976 09:47:29.553950 ROMSTAGE 3. 0x76ffeb60 0x00000004
1977 09:47:29.556950 MEM INFO 4. 0x76ffe980 0x000001e0
1978 09:47:29.563752 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1979 09:47:29.567065 MTRR: Physical address space:
1980 09:47:29.573700 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1981 09:47:29.580284 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1982 09:47:29.586877 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1983 09:47:29.593763 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1984 09:47:29.600201 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1985 09:47:29.603447 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1986 09:47:29.610343 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1987 09:47:29.617137 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 09:47:29.620115 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 09:47:29.623423 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 09:47:29.626553 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 09:47:29.630061 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 09:47:29.636668 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 09:47:29.640169 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 09:47:29.643413 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 09:47:29.646759 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 09:47:29.653450 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 09:47:29.657074 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 09:47:29.659965 call enable_fixed_mtrr()
1999 09:47:29.663450 CPU physical address size: 39 bits
2000 09:47:29.666634 MTRR: default type WB/UC MTRR counts: 6/6.
2001 09:47:29.669968 MTRR: UC selected as default type.
2002 09:47:29.676449 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2003 09:47:29.683078 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2004 09:47:29.689832 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2005 09:47:29.696628 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2006 09:47:29.703245 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2007 09:47:29.709748 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2008 09:47:29.709833
2009 09:47:29.712760 MTRR check
2010 09:47:29.712844 Fixed MTRRs : Enabled
2011 09:47:29.716056 Variable MTRRs: Enabled
2012 09:47:29.716140
2013 09:47:29.719572 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 09:47:29.726937 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 09:47:29.729666 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 09:47:29.732871 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 09:47:29.736272 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 09:47:29.742699 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 09:47:29.746507 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 09:47:29.749508 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 09:47:29.753085 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 09:47:29.755979 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 09:47:29.762613 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 09:47:29.769356 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2025 09:47:29.772758 call enable_fixed_mtrr()
2026 09:47:29.776471 Checking cr50 for pending updates
2027 09:47:29.776555 CPU physical address size: 39 bits
2028 09:47:29.783180 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 09:47:29.786976 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 09:47:29.790047 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 09:47:29.793652 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 09:47:29.799953 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 09:47:29.803326 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 09:47:29.806409 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 09:47:29.810031 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 09:47:29.816396 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 09:47:29.819775 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 09:47:29.823675 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 09:47:29.826530 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 09:47:29.833564 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 09:47:29.833654 call enable_fixed_mtrr()
2042 09:47:29.840422 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 09:47:29.843677 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 09:47:29.846922 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 09:47:29.849999 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 09:47:29.856899 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 09:47:29.859968 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 09:47:29.863503 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 09:47:29.866656 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 09:47:29.873686 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 09:47:29.876904 CPU physical address size: 39 bits
2052 09:47:29.880161 call enable_fixed_mtrr()
2053 09:47:29.884064 Reading cr50 TPM mode
2054 09:47:29.887386 CPU physical address size: 39 bits
2055 09:47:29.890992 MTRR: Fixed MSR 0x250 0x0606060606060606
2056 09:47:29.894269 MTRR: Fixed MSR 0x250 0x0606060606060606
2057 09:47:29.897942 MTRR: Fixed MSR 0x258 0x0606060606060606
2058 09:47:29.900979 MTRR: Fixed MSR 0x259 0x0000000000000000
2059 09:47:29.907544 MTRR: Fixed MSR 0x268 0x0606060606060606
2060 09:47:29.910583 MTRR: Fixed MSR 0x269 0x0606060606060606
2061 09:47:29.914407 MTRR: Fixed MSR 0x26a 0x0606060606060606
2062 09:47:29.917444 MTRR: Fixed MSR 0x26b 0x0606060606060606
2063 09:47:29.923968 MTRR: Fixed MSR 0x26c 0x0606060606060606
2064 09:47:29.927302 MTRR: Fixed MSR 0x26d 0x0606060606060606
2065 09:47:29.930713 MTRR: Fixed MSR 0x26e 0x0606060606060606
2066 09:47:29.933832 MTRR: Fixed MSR 0x26f 0x0606060606060606
2067 09:47:29.941050 MTRR: Fixed MSR 0x258 0x0606060606060606
2068 09:47:29.944684 MTRR: Fixed MSR 0x259 0x0000000000000000
2069 09:47:29.947794 MTRR: Fixed MSR 0x268 0x0606060606060606
2070 09:47:29.951684 MTRR: Fixed MSR 0x269 0x0606060606060606
2071 09:47:29.957935 MTRR: Fixed MSR 0x26a 0x0606060606060606
2072 09:47:29.961263 MTRR: Fixed MSR 0x26b 0x0606060606060606
2073 09:47:29.964625 MTRR: Fixed MSR 0x26c 0x0606060606060606
2074 09:47:29.967955 MTRR: Fixed MSR 0x26d 0x0606060606060606
2075 09:47:29.974543 MTRR: Fixed MSR 0x26e 0x0606060606060606
2076 09:47:29.977847 MTRR: Fixed MSR 0x26f 0x0606060606060606
2077 09:47:29.981134 call enable_fixed_mtrr()
2078 09:47:29.984389 call enable_fixed_mtrr()
2079 09:47:29.987668 MTRR: Fixed MSR 0x250 0x0606060606060606
2080 09:47:29.990852 MTRR: Fixed MSR 0x250 0x0606060606060606
2081 09:47:29.994577 MTRR: Fixed MSR 0x258 0x0606060606060606
2082 09:47:30.001264 MTRR: Fixed MSR 0x259 0x0000000000000000
2083 09:47:30.004563 MTRR: Fixed MSR 0x268 0x0606060606060606
2084 09:47:30.007858 MTRR: Fixed MSR 0x269 0x0606060606060606
2085 09:47:30.010959 MTRR: Fixed MSR 0x26a 0x0606060606060606
2086 09:47:30.017760 MTRR: Fixed MSR 0x26b 0x0606060606060606
2087 09:47:30.020922 MTRR: Fixed MSR 0x26c 0x0606060606060606
2088 09:47:30.024114 MTRR: Fixed MSR 0x26d 0x0606060606060606
2089 09:47:30.027539 MTRR: Fixed MSR 0x26e 0x0606060606060606
2090 09:47:30.030866 MTRR: Fixed MSR 0x26f 0x0606060606060606
2091 09:47:30.037759 MTRR: Fixed MSR 0x258 0x0606060606060606
2092 09:47:30.041439 call enable_fixed_mtrr()
2093 09:47:30.044941 MTRR: Fixed MSR 0x259 0x0000000000000000
2094 09:47:30.047865 MTRR: Fixed MSR 0x268 0x0606060606060606
2095 09:47:30.051069 MTRR: Fixed MSR 0x269 0x0606060606060606
2096 09:47:30.057747 MTRR: Fixed MSR 0x26a 0x0606060606060606
2097 09:47:30.060875 MTRR: Fixed MSR 0x26b 0x0606060606060606
2098 09:47:30.064481 MTRR: Fixed MSR 0x26c 0x0606060606060606
2099 09:47:30.067932 MTRR: Fixed MSR 0x26d 0x0606060606060606
2100 09:47:30.074756 MTRR: Fixed MSR 0x26e 0x0606060606060606
2101 09:47:30.077751 MTRR: Fixed MSR 0x26f 0x0606060606060606
2102 09:47:30.081245 CPU physical address size: 39 bits
2103 09:47:30.084483 call enable_fixed_mtrr()
2104 09:47:30.087722 CPU physical address size: 39 bits
2105 09:47:30.091505 CPU physical address size: 39 bits
2106 09:47:30.098410 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2107 09:47:30.101503 CPU physical address size: 39 bits
2108 09:47:30.111627 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2109 09:47:30.115017 Checking segment from ROM address 0xffc02b38
2110 09:47:30.118257 Checking segment from ROM address 0xffc02b54
2111 09:47:30.124908 Loading segment from ROM address 0xffc02b38
2112 09:47:30.124995 code (compression=0)
2113 09:47:30.134539 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2114 09:47:30.144677 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2115 09:47:30.144763 it's not compressed!
2116 09:47:30.284132 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2117 09:47:30.291038 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2118 09:47:30.297634 Loading segment from ROM address 0xffc02b54
2119 09:47:30.297716 Entry Point 0x30000000
2120 09:47:30.301067 Loaded segments
2121 09:47:30.307530 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2122 09:47:30.350807 Finalizing chipset.
2123 09:47:30.354013 Finalizing SMM.
2124 09:47:30.354138 APMC done.
2125 09:47:30.360341 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2126 09:47:30.363610 mp_park_aps done after 0 msecs.
2127 09:47:30.367531 Jumping to boot code at 0x30000000(0x76b25000)
2128 09:47:30.377140 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2129 09:47:30.377366
2130 09:47:30.380471 Starting depthcharge on Voema...
2131 09:47:30.381086 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2132 09:47:30.381310 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2133 09:47:30.381470 Setting prompt string to ['volteer:']
2134 09:47:30.381638 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2135 09:47:30.390360 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2136 09:47:30.397292 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2137 09:47:30.403757 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2138 09:47:30.406845 Failed to find eMMC card reader
2139 09:47:30.407338 Wipe memory regions:
2140 09:47:30.414023 [0x00000000001000, 0x000000000a0000)
2141 09:47:30.417138 [0x00000000100000, 0x00000030000000)
2142 09:47:30.445796 [0x00000032662db0, 0x000000769ef000)
2143 09:47:30.485071 [0x00000100000000, 0x00000280400000)
2144 09:47:30.689845 ec_init: CrosEC protocol v3 supported (256, 256)
2145 09:47:30.696820 update_port_state: port C0 state: usb enable 1 mux conn 0
2146 09:47:30.706532 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2147 09:47:30.713900 pmc_check_ipc_sts: STS_BUSY done after 2266 us
2148 09:47:30.717116 send_conn_disc_msg: pmc_send_cmd succeeded
2149 09:47:31.149776 R8152: Initializing
2150 09:47:31.152646 Version 6 (ocp_data = 5c30)
2151 09:47:31.156006 R8152: Done initializing
2152 09:47:31.159192 Adding net device
2153 09:47:31.465519 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2154 09:47:31.466145
2155 09:47:31.469143 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2157 09:47:31.571042 volteer: tftpboot 192.168.201.1 7022948/tftp-deploy-se56dipb/kernel/bzImage 7022948/tftp-deploy-se56dipb/kernel/cmdline 7022948/tftp-deploy-se56dipb/ramdisk/ramdisk.cpio.gz
2158 09:47:31.571754 Setting prompt string to 'Starting kernel'
2159 09:47:31.572179 Setting prompt string to ['Starting kernel']
2160 09:47:31.572571 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2161 09:47:31.572977 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
2162 09:47:31.576321 tftpboot 192.168.201.1 7022948/tftp-deploy-se56dipb/kernel/bzImoy-se56dipb/kernel/cmdline 7022948/tftp-deploy-se56dipb/ramdisk/ramdisk.cpio.gz
2163 09:47:31.576839 Waiting for link
2164 09:47:31.781148 done.
2165 09:47:31.781763 MAC: 00:24:32:30:7c:e4
2166 09:47:31.784465 Sending DHCP discover... done.
2167 09:47:31.787535 Waiting for reply... done.
2168 09:47:31.790962 Sending DHCP request... done.
2169 09:47:31.794090 Waiting for reply... done.
2170 09:47:31.797493 My ip is 192.168.201.12
2171 09:47:31.800721 The DHCP server ip is 192.168.201.1
2172 09:47:31.803951 TFTP server IP predefined by user: 192.168.201.1
2173 09:47:31.813489 Bootfile predefined by user: 7022948/tftp-deploy-se56dipb/kernel/bzImage
2174 09:47:31.817060 Sending tftp read request... done.
2175 09:47:31.820005 Waiting for the transfer...
2176 09:47:32.495818 00000000 ################################################################
2177 09:47:33.177671 00080000 ################################################################
2178 09:47:33.838444 00100000 ################################################################
2179 09:47:34.513725 00180000 ################################################################
2180 09:47:35.192407 00200000 ################################################################
2181 09:47:35.858428 00280000 ################################################################
2182 09:47:36.463466 00300000 ################################################################
2183 09:47:37.091459 00380000 ################################################################
2184 09:47:37.734651 00400000 ################################################################
2185 09:47:38.353481 00480000 ################################################################
2186 09:47:38.946869 00500000 ################################################################
2187 09:47:39.620195 00580000 ################################################################
2188 09:47:40.291346 00600000 ################################################################ done.
2189 09:47:40.294543 The bootfile was 6815632 bytes long.
2190 09:47:40.297677 Sending tftp read request... done.
2191 09:47:40.300779 Waiting for the transfer...
2192 09:47:40.945861 00000000 ################################################################
2193 09:47:41.577152 00080000 ################################################################
2194 09:47:42.164771 00100000 ################################################################
2195 09:47:42.706726 00180000 ################################################################
2196 09:47:43.239678 00200000 ################################################################
2197 09:47:43.768161 00280000 ################################################################
2198 09:47:44.308128 00300000 ################################################################
2199 09:47:44.872136 00380000 ################################################################
2200 09:47:45.424410 00400000 ################################################################
2201 09:47:45.969664 00480000 ################################################################
2202 09:47:46.224926 00500000 ############################# done.
2203 09:47:46.228367 Sending tftp read request... done.
2204 09:47:46.231733 Waiting for the transfer...
2205 09:47:46.231809 00000000 # done.
2206 09:47:46.241733 Command line loaded dynamically from TFTP file: 7022948/tftp-deploy-se56dipb/kernel/cmdline
2207 09:47:46.261367 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7022948/extract-nfsrootfs-chdw1vf0,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2208 09:47:46.269763 Shutting down all USB controllers.
2209 09:47:46.269844 Removing current net device
2210 09:47:46.273085 Finalizing coreboot
2211 09:47:46.279709 Exiting depthcharge with code 4 at timestamp: 24534886
2212 09:47:46.279787
2213 09:47:46.279852 Starting kernel ...
2214 09:47:46.279912
2215 09:47:46.279971
2216 09:47:46.280268 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2217 09:47:46.280365 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2218 09:47:46.280441 Setting prompt string to ['Linux version [0-9]']
2219 09:47:46.280509 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2220 09:47:46.280577 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2222 09:52:13.281440 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2224 09:52:13.282648 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2226 09:52:13.283499 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2229 09:52:13.285046 end: 2 depthcharge-action (duration 00:05:00) [common]
2231 09:52:13.286062 Cleaning after the job
2232 09:52:13.286146 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022948/tftp-deploy-se56dipb/ramdisk
2233 09:52:13.286626 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022948/tftp-deploy-se56dipb/kernel
2234 09:52:13.287125 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022948/tftp-deploy-se56dipb/nfsrootfs
2235 09:52:13.325521 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022948/tftp-deploy-se56dipb/modules
2236 09:52:13.325874 start: 4.1 power-off (timeout 00:00:30) [common]
2237 09:52:13.326039 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2238 09:52:13.344839 >> Command sent successfully.
2239 09:52:13.346706 Returned 0 in 0 seconds
2240 09:52:13.447903 end: 4.1 power-off (duration 00:00:00) [common]
2242 09:52:13.449876 start: 4.2 read-feedback (timeout 00:10:00) [common]
2243 09:52:13.451287 Listened to connection for namespace 'common' for up to 1s
2244 09:52:14.456127 Finalising connection for namespace 'common'
2245 09:52:14.456837 Disconnecting from shell: Finalise
2246 09:52:14.557716 end: 4.2 read-feedback (duration 00:00:01) [common]
2247 09:52:14.557886 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7022948
2248 09:52:14.724471 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7022948
2249 09:52:14.724675 JobError: Your job cannot terminate cleanly.