Boot log: asus-C436FA-Flip-hatch

    1 09:46:35.223214  lava-dispatcher, installed at version: 2022.06
    2 09:46:35.223437  start: 0 validate
    3 09:46:35.223601  Start time: 2022-08-12 09:46:35.223592+00:00 (UTC)
    4 09:46:35.223767  Using caching service: 'http://localhost/cache/?uri=%s'
    5 09:46:35.223906  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220805.0%2Famd64%2Finitrd.cpio.gz exists
    6 09:46:35.523570  Using caching service: 'http://localhost/cache/?uri=%s'
    7 09:46:35.523743  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 09:46:35.814915  Using caching service: 'http://localhost/cache/?uri=%s'
    9 09:46:35.815127  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220805.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 09:46:36.102386  Using caching service: 'http://localhost/cache/?uri=%s'
   11 09:46:36.103102  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 09:46:36.398314  validate duration: 1.17
   14 09:46:36.398687  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 09:46:36.398807  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 09:46:36.398908  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 09:46:36.399004  Not decompressing ramdisk as can be used compressed.
   18 09:46:36.399112  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220805.0/amd64/initrd.cpio.gz
   19 09:46:36.399175  saving as /var/lib/lava/dispatcher/tmp/7022974/tftp-deploy-h3ggnhma/ramdisk/initrd.cpio.gz
   20 09:46:36.399249  total size: 5411035 (5MB)
   21 09:46:36.400333  progress   0% (0MB)
   22 09:46:36.401825  progress   5% (0MB)
   23 09:46:36.403144  progress  10% (0MB)
   24 09:46:36.404572  progress  15% (0MB)
   25 09:46:36.406111  progress  20% (1MB)
   26 09:46:36.407477  progress  25% (1MB)
   27 09:46:36.408818  progress  30% (1MB)
   28 09:46:36.410183  progress  35% (1MB)
   29 09:46:36.411696  progress  40% (2MB)
   30 09:46:36.413038  progress  45% (2MB)
   31 09:46:36.414392  progress  50% (2MB)
   32 09:46:36.415749  progress  55% (2MB)
   33 09:46:36.417267  progress  60% (3MB)
   34 09:46:36.418627  progress  65% (3MB)
   35 09:46:36.419982  progress  70% (3MB)
   36 09:46:36.421334  progress  75% (3MB)
   37 09:46:36.422887  progress  80% (4MB)
   38 09:46:36.424260  progress  85% (4MB)
   39 09:46:36.425658  progress  90% (4MB)
   40 09:46:36.427062  progress  95% (4MB)
   41 09:46:36.428596  progress 100% (5MB)
   42 09:46:36.428787  5MB downloaded in 0.03s (174.73MB/s)
   43 09:46:36.428951  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 09:46:36.429208  end: 1.1 download-retry (duration 00:00:00) [common]
   46 09:46:36.429310  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 09:46:36.429394  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 09:46:36.429495  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 09:46:36.429561  saving as /var/lib/lava/dispatcher/tmp/7022974/tftp-deploy-h3ggnhma/kernel/bzImage
   50 09:46:36.429622  total size: 6815632 (6MB)
   51 09:46:36.429681  No compression specified
   52 09:46:37.931867  progress   0% (0MB)
   53 09:46:37.936759  progress   5% (0MB)
   54 09:46:37.938527  progress  10% (0MB)
   55 09:46:37.940277  progress  15% (1MB)
   56 09:46:37.942027  progress  20% (1MB)
   57 09:46:37.943628  progress  25% (1MB)
   58 09:46:37.945472  progress  30% (1MB)
   59 09:46:37.947139  progress  35% (2MB)
   60 09:46:37.948918  progress  40% (2MB)
   61 09:46:37.950544  progress  45% (2MB)
   62 09:46:37.952135  progress  50% (3MB)
   63 09:46:37.953959  progress  55% (3MB)
   64 09:46:37.955562  progress  60% (3MB)
   65 09:46:37.957369  progress  65% (4MB)
   66 09:46:37.958959  progress  70% (4MB)
   67 09:46:37.960515  progress  75% (4MB)
   68 09:46:37.962329  progress  80% (5MB)
   69 09:46:37.964025  progress  85% (5MB)
   70 09:46:37.965778  progress  90% (5MB)
   71 09:46:37.967416  progress  95% (6MB)
   72 09:46:37.969084  progress 100% (6MB)
   73 09:46:37.969371  6MB downloaded in 1.54s (4.22MB/s)
   74 09:46:37.969522  end: 1.2.1 http-download (duration 00:00:02) [common]
   76 09:46:37.969763  end: 1.2 download-retry (duration 00:00:02) [common]
   77 09:46:37.969853  start: 1.3 download-retry (timeout 00:09:58) [common]
   78 09:46:37.969939  start: 1.3.1 http-download (timeout 00:09:58) [common]
   79 09:46:37.970048  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220805.0/amd64/full.rootfs.tar.xz
   80 09:46:37.970117  saving as /var/lib/lava/dispatcher/tmp/7022974/tftp-deploy-h3ggnhma/nfsrootfs/full.rootfs.tar
   81 09:46:37.970179  total size: 207096212 (197MB)
   82 09:46:37.970241  Using unxz to decompress xz
   83 09:46:37.973587  progress   0% (0MB)
   84 09:46:38.549926  progress   5% (9MB)
   85 09:46:39.132424  progress  10% (19MB)
   86 09:46:39.750756  progress  15% (29MB)
   87 09:46:40.124439  progress  20% (39MB)
   88 09:46:40.508705  progress  25% (49MB)
   89 09:46:41.125650  progress  30% (59MB)
   90 09:46:41.709722  progress  35% (69MB)
   91 09:46:42.333377  progress  40% (79MB)
   92 09:46:42.910632  progress  45% (88MB)
   93 09:46:43.512747  progress  50% (98MB)
   94 09:46:44.151003  progress  55% (108MB)
   95 09:46:44.855098  progress  60% (118MB)
   96 09:46:44.997670  progress  65% (128MB)
   97 09:46:45.161848  progress  70% (138MB)
   98 09:46:45.259240  progress  75% (148MB)
   99 09:46:45.334003  progress  80% (158MB)
  100 09:46:45.409891  progress  85% (167MB)
  101 09:46:45.517138  progress  90% (177MB)
  102 09:46:45.801980  progress  95% (187MB)
  103 09:46:46.438175  progress 100% (197MB)
  104 09:46:46.443253  197MB downloaded in 8.47s (23.31MB/s)
  105 09:46:46.443527  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 09:46:46.443801  end: 1.3 download-retry (duration 00:00:08) [common]
  108 09:46:46.443896  start: 1.4 download-retry (timeout 00:09:50) [common]
  109 09:46:46.443986  start: 1.4.1 http-download (timeout 00:09:50) [common]
  110 09:46:46.444103  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 09:46:46.444218  saving as /var/lib/lava/dispatcher/tmp/7022974/tftp-deploy-h3ggnhma/modules/modules.tar
  112 09:46:46.444282  total size: 51724 (0MB)
  113 09:46:46.444348  Using unxz to decompress xz
  114 09:46:46.447658  progress  63% (0MB)
  115 09:46:46.448133  progress 100% (0MB)
  116 09:46:46.451471  0MB downloaded in 0.01s (6.87MB/s)
  117 09:46:46.451703  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 09:46:46.451970  end: 1.4 download-retry (duration 00:00:00) [common]
  120 09:46:46.452069  start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
  121 09:46:46.452164  start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
  122 09:46:48.504953  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7022974/extract-nfsrootfs-r31_m2du
  123 09:46:48.505235  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 09:46:48.505345  start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
  125 09:46:48.505495  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8
  126 09:46:48.505599  makedir: /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin
  127 09:46:48.505688  makedir: /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/tests
  128 09:46:48.505770  makedir: /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/results
  129 09:46:48.505875  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-add-keys
  130 09:46:48.506009  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-add-sources
  131 09:46:48.506143  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-background-process-start
  132 09:46:48.506286  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-background-process-stop
  133 09:46:48.506403  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-common-functions
  134 09:46:48.506516  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-echo-ipv4
  135 09:46:48.506629  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-install-packages
  136 09:46:48.506741  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-installed-packages
  137 09:46:48.506851  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-os-build
  138 09:46:48.506963  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-probe-channel
  139 09:46:48.507074  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-probe-ip
  140 09:46:48.507185  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-target-ip
  141 09:46:48.507297  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-target-mac
  142 09:46:48.507407  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-target-storage
  143 09:46:48.507520  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-test-case
  144 09:46:48.507633  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-test-event
  145 09:46:48.507743  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-test-feedback
  146 09:46:48.507854  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-test-raise
  147 09:46:48.507965  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-test-reference
  148 09:46:48.508075  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-test-runner
  149 09:46:48.508185  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-test-set
  150 09:46:48.508295  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-test-shell
  151 09:46:48.508407  Updating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-add-keys (debian)
  152 09:46:48.508523  Updating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-add-sources (debian)
  153 09:46:48.508637  Updating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-install-packages (debian)
  154 09:46:48.508750  Updating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-installed-packages (debian)
  155 09:46:48.508862  Updating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/bin/lava-os-build (debian)
  156 09:46:48.509190  Creating /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/environment
  157 09:46:48.509286  LAVA metadata
  158 09:46:48.509356  - LAVA_JOB_ID=7022974
  159 09:46:48.509423  - LAVA_DISPATCHER_IP=192.168.201.1
  160 09:46:48.509536  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  161 09:46:48.509604  skipped lava-vland-overlay
  162 09:46:48.509685  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  163 09:46:48.509775  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  164 09:46:48.509872  skipped lava-multinode-overlay
  165 09:46:48.509955  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  166 09:46:48.510042  start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
  167 09:46:48.510120  Loading test definitions
  168 09:46:48.510216  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
  169 09:46:48.510295  Using /lava-7022974 at stage 0
  170 09:46:48.510537  uuid=7022974_1.5.2.3.1 testdef=None
  171 09:46:48.510631  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  172 09:46:48.510720  start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
  173 09:46:48.511147  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  175 09:46:48.511385  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  176 09:46:48.511878  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  178 09:46:48.512123  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  179 09:46:48.512586  runner path: /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/0/tests/0_timesync-off test_uuid 7022974_1.5.2.3.1
  180 09:46:48.512737  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  182 09:46:48.513028  start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
  183 09:46:48.513126  Using /lava-7022974 at stage 0
  184 09:46:48.513230  Fetching tests from https://github.com/kernelci/test-definitions.git
  185 09:46:48.513315  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/0/tests/1_kselftest-rtc'
  186 09:46:53.464568  Running '/usr/bin/git checkout kernelci.org
  187 09:46:53.604610  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
  188 09:46:53.605324  uuid=7022974_1.5.2.3.5 testdef=None
  189 09:46:53.605489  end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
  191 09:46:53.605831  start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
  192 09:46:53.606606  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  194 09:46:53.606846  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
  195 09:46:53.607776  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  197 09:46:53.608118  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
  198 09:46:53.609128  runner path: /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/0/tests/1_kselftest-rtc test_uuid 7022974_1.5.2.3.5
  199 09:46:53.609221  BOARD='asus-C436FA-Flip-hatch'
  200 09:46:53.609288  BRANCH='cip-gitlab'
  201 09:46:53.609355  SKIPFILE='skipfile-lkft.yaml'
  202 09:46:53.609463  TESTPROG_URL='None'
  203 09:46:53.609608  TST_CASENAME=''
  204 09:46:53.609709  TST_CMDFILES='rtc'
  205 09:46:53.609849  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  207 09:46:53.610093  Creating lava-test-runner.conf files
  208 09:46:53.610189  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7022974/lava-overlay-oue_af_8/lava-7022974/0 for stage 0
  209 09:46:53.610327  - 0_timesync-off
  210 09:46:53.610434  - 1_kselftest-rtc
  211 09:46:53.610583  end: 1.5.2.3 test-definition (duration 00:00:05) [common]
  212 09:46:53.610690  start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
  213 09:47:00.933135  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  214 09:47:00.933307  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
  215 09:47:00.933404  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 09:47:00.933512  end: 1.5.2 lava-overlay (duration 00:00:12) [common]
  217 09:47:00.933607  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
  218 09:47:01.037746  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 09:47:01.038188  start: 1.5.4 extract-modules (timeout 00:09:35) [common]
  220 09:47:01.038303  extracting modules file /var/lib/lava/dispatcher/tmp/7022974/tftp-deploy-h3ggnhma/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022974/extract-nfsrootfs-r31_m2du
  221 09:47:01.042983  extracting modules file /var/lib/lava/dispatcher/tmp/7022974/tftp-deploy-h3ggnhma/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022974/extract-overlay-ramdisk-8nzoc8_f/ramdisk
  222 09:47:01.047156  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 09:47:01.047273  start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
  224 09:47:01.047370  [common] Applying overlay to NFS
  225 09:47:01.047520  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7022974/compress-overlay-kjxs_a2d/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7022974/extract-nfsrootfs-r31_m2du
  226 09:47:01.515094  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 09:47:01.515262  start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
  228 09:47:01.515366  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 09:47:01.515461  start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
  230 09:47:01.515556  Building ramdisk /var/lib/lava/dispatcher/tmp/7022974/extract-overlay-ramdisk-8nzoc8_f/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7022974/extract-overlay-ramdisk-8nzoc8_f/ramdisk
  231 09:47:01.548979  >> 24431 blocks

  232 09:47:02.026658  rename /var/lib/lava/dispatcher/tmp/7022974/extract-overlay-ramdisk-8nzoc8_f/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7022974/tftp-deploy-h3ggnhma/ramdisk/ramdisk.cpio.gz
  233 09:47:02.027086  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  234 09:47:02.027210  start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
  235 09:47:02.027316  start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
  236 09:47:02.027430  No mkimage arch provided, not using FIT.
  237 09:47:02.027525  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 09:47:02.027631  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 09:47:02.027732  end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
  240 09:47:02.027828  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
  241 09:47:02.027910  No LXC device requested
  242 09:47:02.027994  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 09:47:02.028089  start: 1.7 deploy-device-env (timeout 00:09:34) [common]
  244 09:47:02.028174  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 09:47:02.028248  Checking files for TFTP limit of 4294967296 bytes.
  246 09:47:02.028651  end: 1 tftp-deploy (duration 00:00:26) [common]
  247 09:47:02.028766  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 09:47:02.028866  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 09:47:02.029004  substitutions:
  250 09:47:02.029078  - {DTB}: None
  251 09:47:02.029145  - {INITRD}: 7022974/tftp-deploy-h3ggnhma/ramdisk/ramdisk.cpio.gz
  252 09:47:02.029210  - {KERNEL}: 7022974/tftp-deploy-h3ggnhma/kernel/bzImage
  253 09:47:02.029272  - {LAVA_MAC}: None
  254 09:47:02.029341  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7022974/extract-nfsrootfs-r31_m2du
  255 09:47:02.029403  - {NFS_SERVER_IP}: 192.168.201.1
  256 09:47:02.029463  - {PRESEED_CONFIG}: None
  257 09:47:02.029522  - {PRESEED_LOCAL}: None
  258 09:47:02.029597  - {RAMDISK}: 7022974/tftp-deploy-h3ggnhma/ramdisk/ramdisk.cpio.gz
  259 09:47:02.029656  - {ROOT_PART}: None
  260 09:47:02.029715  - {ROOT}: None
  261 09:47:02.029772  - {SERVER_IP}: 192.168.201.1
  262 09:47:02.029829  - {TEE}: None
  263 09:47:02.029886  Parsed boot commands:
  264 09:47:02.029946  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 09:47:02.030098  Parsed boot commands: tftpboot 192.168.201.1 7022974/tftp-deploy-h3ggnhma/kernel/bzImage 7022974/tftp-deploy-h3ggnhma/kernel/cmdline 7022974/tftp-deploy-h3ggnhma/ramdisk/ramdisk.cpio.gz
  266 09:47:02.030197  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 09:47:02.030289  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 09:47:02.030391  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 09:47:02.030483  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 09:47:02.030557  Not connected, no need to disconnect.
  271 09:47:02.030636  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 09:47:02.030723  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 09:47:02.030796  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  274 09:47:02.033700  Setting prompt string to ['lava-test: # ']
  275 09:47:02.034016  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 09:47:02.034126  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 09:47:02.034227  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 09:47:02.034322  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 09:47:02.034532  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  280 09:47:02.053981  >> Command sent successfully.

  281 09:47:02.055914  Returned 0 in 0 seconds
  282 09:47:02.156683  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  284 09:47:02.157013  end: 2.2.2 reset-device (duration 00:00:00) [common]
  285 09:47:02.157118  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  286 09:47:02.157212  Setting prompt string to 'Starting depthcharge on Helios...'
  287 09:47:02.157285  Changing prompt to 'Starting depthcharge on Helios...'
  288 09:47:02.157358  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  289 09:47:02.157636  [Enter `^Ec?' for help]
  290 09:47:09.041507  
  291 09:47:09.041661  
  292 09:47:09.051262  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  293 09:47:09.054919  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  294 09:47:09.061332  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  295 09:47:09.064457  CPU: AES supported, TXT NOT supported, VT supported
  296 09:47:09.071181  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  297 09:47:09.074371  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  298 09:47:09.081020  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  299 09:47:09.084673  VBOOT: Loading verstage.
  300 09:47:09.087949  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  301 09:47:09.094409  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  302 09:47:09.101251  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  303 09:47:09.101367  CBFS @ c08000 size 3f8000
  304 09:47:09.107571  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  305 09:47:09.111289  CBFS: Locating 'fallback/verstage'
  306 09:47:09.114526  CBFS: Found @ offset 10fb80 size 1072c
  307 09:47:09.118683  
  308 09:47:09.118765  
  309 09:47:09.128258  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  310 09:47:09.142941  Probing TPM: . done!
  311 09:47:09.146281  TPM ready after 0 ms
  312 09:47:09.149597  Connected to device vid:did:rid of 1ae0:0028:00
  313 09:47:09.159709  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  314 09:47:09.163106  Initialized TPM device CR50 revision 0
  315 09:47:09.198984  tlcl_send_startup: Startup return code is 0
  316 09:47:09.199087  TPM: setup succeeded
  317 09:47:09.211070  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  318 09:47:09.215258  Chrome EC: UHEPI supported
  319 09:47:09.218435  Phase 1
  320 09:47:09.221650  FMAP: area GBB found @ c05000 (12288 bytes)
  321 09:47:09.228358  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  322 09:47:09.231597  Phase 2
  323 09:47:09.231675  Phase 3
  324 09:47:09.234625  FMAP: area GBB found @ c05000 (12288 bytes)
  325 09:47:09.241357  VB2:vb2_report_dev_firmware() This is developer signed firmware
  326 09:47:09.248044  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  327 09:47:09.251279  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  328 09:47:09.258073  VB2:vb2_verify_keyblock() Checking keyblock signature...
  329 09:47:09.273784  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  330 09:47:09.277103  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  331 09:47:09.283522  VB2:vb2_verify_fw_preamble() Verifying preamble.
  332 09:47:09.287777  Phase 4
  333 09:47:09.291471  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
  334 09:47:09.298095  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  335 09:47:09.477707  VB2:vb2_rsa_verify_digest() Digest check failed!
  336 09:47:09.484406  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  337 09:47:09.484497  Saving nvdata
  338 09:47:09.487017  Reboot requested (10020007)
  339 09:47:09.490658  board_reset() called!
  340 09:47:09.490746  full_reset() called!
  341 09:47:14.008477  
  342 09:47:14.008625  
  343 09:47:14.018154  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  344 09:47:14.021368  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  345 09:47:14.028125  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  346 09:47:14.031352  CPU: AES supported, TXT NOT supported, VT supported
  347 09:47:14.038299  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  348 09:47:14.041414  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  349 09:47:14.047870  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  350 09:47:14.051196  VBOOT: Loading verstage.
  351 09:47:14.054852  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  352 09:47:14.061105  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  353 09:47:14.067796  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  354 09:47:14.067885  CBFS @ c08000 size 3f8000
  355 09:47:14.074642  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  356 09:47:14.077681  CBFS: Locating 'fallback/verstage'
  357 09:47:14.081268  CBFS: Found @ offset 10fb80 size 1072c
  358 09:47:14.085058  
  359 09:47:14.085143  
  360 09:47:14.095311  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  361 09:47:14.110322  Probing TPM: . done!
  362 09:47:14.113116  TPM ready after 0 ms
  363 09:47:14.116590  Connected to device vid:did:rid of 1ae0:0028:00
  364 09:47:14.126523  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  365 09:47:14.130128  Initialized TPM device CR50 revision 0
  366 09:47:14.165278  tlcl_send_startup: Startup return code is 0
  367 09:47:14.165366  TPM: setup succeeded
  368 09:47:14.178052  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  369 09:47:14.182200  Chrome EC: UHEPI supported
  370 09:47:14.185322  Phase 1
  371 09:47:14.188650  FMAP: area GBB found @ c05000 (12288 bytes)
  372 09:47:14.195045  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  373 09:47:14.201941  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  374 09:47:14.205198  Recovery requested (1009000e)
  375 09:47:14.211126  Saving nvdata
  376 09:47:14.217250  tlcl_extend: response is 0
  377 09:47:14.225833  tlcl_extend: response is 0
  378 09:47:14.232748  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  379 09:47:14.235986  CBFS @ c08000 size 3f8000
  380 09:47:14.242451  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  381 09:47:14.246202  CBFS: Locating 'fallback/romstage'
  382 09:47:14.249178  CBFS: Found @ offset 80 size 145fc
  383 09:47:14.252730  Accumulated console time in verstage 98 ms
  384 09:47:14.252815  
  385 09:47:14.252882  
  386 09:47:14.266123  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  387 09:47:14.272232  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  388 09:47:14.275932  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  389 09:47:14.279030  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  390 09:47:14.285898  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  391 09:47:14.288956  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  392 09:47:14.292474  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
  393 09:47:14.295688  TCO_STS:   0000 0000
  394 09:47:14.298847  GEN_PMCON: e0015238 00000200
  395 09:47:14.302093  GBLRST_CAUSE: 00000000 00000000
  396 09:47:14.302178  prev_sleep_state 5
  397 09:47:14.305834  Boot Count incremented to 35119
  398 09:47:14.312631  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  399 09:47:14.315775  CBFS @ c08000 size 3f8000
  400 09:47:14.322130  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  401 09:47:14.322216  CBFS: Locating 'fspm.bin'
  402 09:47:14.329012  CBFS: Found @ offset 5ffc0 size 71000
  403 09:47:14.332316  Chrome EC: UHEPI supported
  404 09:47:14.338671  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  405 09:47:14.342822  Probing TPM:  done!
  406 09:47:14.349198  Connected to device vid:did:rid of 1ae0:0028:00
  407 09:47:14.359066  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  408 09:47:14.365185  Initialized TPM device CR50 revision 0
  409 09:47:14.374393  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  410 09:47:14.380551  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  411 09:47:14.384328  MRC cache found, size 1948
  412 09:47:14.387498  bootmode is set to: 2
  413 09:47:14.390850  PRMRR disabled by config.
  414 09:47:14.390936  SPD INDEX = 1
  415 09:47:14.397248  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  416 09:47:14.400438  CBFS @ c08000 size 3f8000
  417 09:47:14.407387  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  418 09:47:14.407473  CBFS: Locating 'spd.bin'
  419 09:47:14.410482  CBFS: Found @ offset 5fb80 size 400
  420 09:47:14.413619  SPD: module type is LPDDR3
  421 09:47:14.417491  SPD: module part is 
  422 09:47:14.423601  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  423 09:47:14.427181  SPD: device width 4 bits, bus width 8 bits
  424 09:47:14.430382  SPD: module size is 4096 MB (per channel)
  425 09:47:14.433558  memory slot: 0 configuration done.
  426 09:47:14.437127  memory slot: 2 configuration done.
  427 09:47:14.488318  CBMEM:
  428 09:47:14.491495  IMD: root @ 99fff000 254 entries.
  429 09:47:14.494586  IMD: root @ 99ffec00 62 entries.
  430 09:47:14.497863  External stage cache:
  431 09:47:14.501611  IMD: root @ 9abff000 254 entries.
  432 09:47:14.504834  IMD: root @ 9abfec00 62 entries.
  433 09:47:14.508074  Chrome EC: clear events_b mask to 0x0000000020004000
  434 09:47:14.524217  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  435 09:47:14.537674  tlcl_write: response is 0
  436 09:47:14.546470  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  437 09:47:14.553253  MRC: TPM MRC hash updated successfully.
  438 09:47:14.553339  2 DIMMs found
  439 09:47:14.556680  SMM Memory Map
  440 09:47:14.559590  SMRAM       : 0x9a000000 0x1000000
  441 09:47:14.563311   Subregion 0: 0x9a000000 0xa00000
  442 09:47:14.566561   Subregion 1: 0x9aa00000 0x200000
  443 09:47:14.569826   Subregion 2: 0x9ac00000 0x400000
  444 09:47:14.572801  top_of_ram = 0x9a000000
  445 09:47:14.576478  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  446 09:47:14.582845  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  447 09:47:14.586436  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  448 09:47:14.592969  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  449 09:47:14.596260  CBFS @ c08000 size 3f8000
  450 09:47:14.599451  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  451 09:47:14.602668  CBFS: Locating 'fallback/postcar'
  452 09:47:14.606486  CBFS: Found @ offset 107000 size 4b44
  453 09:47:14.612890  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  454 09:47:14.625180  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  455 09:47:14.628844  Processing 180 relocs. Offset value of 0x97c0c000
  456 09:47:14.637215  Accumulated console time in romstage 286 ms
  457 09:47:14.637303  
  458 09:47:14.637391  
  459 09:47:14.647262  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  460 09:47:14.653599  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  461 09:47:14.657192  CBFS @ c08000 size 3f8000
  462 09:47:14.660139  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  463 09:47:14.666966  CBFS: Locating 'fallback/ramstage'
  464 09:47:14.670446  CBFS: Found @ offset 43380 size 1b9e8
  465 09:47:14.677095  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  466 09:47:14.708979  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  467 09:47:14.712475  Processing 3976 relocs. Offset value of 0x98db0000
  468 09:47:14.718835  Accumulated console time in postcar 52 ms
  469 09:47:14.718928  
  470 09:47:14.719000  
  471 09:47:14.728736  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  472 09:47:14.735212  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  473 09:47:14.738360  WARNING: RO_VPD is uninitialized or empty.
  474 09:47:14.741945  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  475 09:47:14.748342  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  476 09:47:14.748423  Normal boot.
  477 09:47:14.755310  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  478 09:47:14.758257  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  479 09:47:14.761932  CBFS @ c08000 size 3f8000
  480 09:47:14.768314  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  481 09:47:14.771696  CBFS: Locating 'cpu_microcode_blob.bin'
  482 09:47:14.775205  CBFS: Found @ offset 14700 size 2ec00
  483 09:47:14.778237  microcode: sig=0x806ec pf=0x4 revision=0xc9
  484 09:47:14.781696  Skip microcode update
  485 09:47:14.788088  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  486 09:47:14.788173  CBFS @ c08000 size 3f8000
  487 09:47:14.794731  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  488 09:47:14.797841  CBFS: Locating 'fsps.bin'
  489 09:47:14.801131  CBFS: Found @ offset d1fc0 size 35000
  490 09:47:14.826670  Detected 4 core, 8 thread CPU.
  491 09:47:14.830211  Setting up SMI for CPU
  492 09:47:14.833322  IED base = 0x9ac00000
  493 09:47:14.833396  IED size = 0x00400000
  494 09:47:14.837116  Will perform SMM setup.
  495 09:47:14.843337  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  496 09:47:14.850202  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  497 09:47:14.853388  Processing 16 relocs. Offset value of 0x00030000
  498 09:47:14.857126  Attempting to start 7 APs
  499 09:47:14.860238  Waiting for 10ms after sending INIT.
  500 09:47:14.876367  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
  501 09:47:14.876456  done.
  502 09:47:14.879974  AP: slot 5 apic_id 6.
  503 09:47:14.883008  AP: slot 2 apic_id 7.
  504 09:47:14.883089  AP: slot 6 apic_id 4.
  505 09:47:14.886285  AP: slot 7 apic_id 5.
  506 09:47:14.889940  AP: slot 1 apic_id 3.
  507 09:47:14.890016  AP: slot 4 apic_id 2.
  508 09:47:14.896360  Waiting for 2nd SIPI to complete...done.
  509 09:47:14.902810  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  510 09:47:14.906229  Processing 13 relocs. Offset value of 0x00038000
  511 09:47:14.913147  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  512 09:47:14.919649  Installing SMM handler to 0x9a000000
  513 09:47:14.926230  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  514 09:47:14.929366  Processing 658 relocs. Offset value of 0x9a010000
  515 09:47:14.939783  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  516 09:47:14.943044  Processing 13 relocs. Offset value of 0x9a008000
  517 09:47:14.949391  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  518 09:47:14.955991  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  519 09:47:14.962357  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  520 09:47:14.965796  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  521 09:47:14.972694  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  522 09:47:14.979090  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  523 09:47:14.982160  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  524 09:47:14.988806  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  525 09:47:14.992727  Clearing SMI status registers
  526 09:47:14.995721  SMI_STS: PM1 
  527 09:47:14.995807  PM1_STS: PWRBTN 
  528 09:47:14.999460  TCO_STS: SECOND_TO 
  529 09:47:15.002697  New SMBASE 0x9a000000
  530 09:47:15.005831  In relocation handler: CPU 0
  531 09:47:15.009491  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  532 09:47:15.012796  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 09:47:15.015936  Relocation complete.
  534 09:47:15.019246  New SMBASE 0x99fff400
  535 09:47:15.019328  In relocation handler: CPU 3
  536 09:47:15.025633  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  537 09:47:15.029023  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 09:47:15.032597  Relocation complete.
  539 09:47:15.035761  New SMBASE 0x99ffe800
  540 09:47:15.035845  In relocation handler: CPU 6
  541 09:47:15.042705  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  542 09:47:15.045892  Writing SMRR. base = 0x9a000006, mask=0xff000800
  543 09:47:15.049018  Relocation complete.
  544 09:47:15.049092  New SMBASE 0x99ffe400
  545 09:47:15.052235  In relocation handler: CPU 7
  546 09:47:15.059248  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  547 09:47:15.062496  Writing SMRR. base = 0x9a000006, mask=0xff000800
  548 09:47:15.066130  Relocation complete.
  549 09:47:15.066209  New SMBASE 0x99fffc00
  550 09:47:15.069283  In relocation handler: CPU 1
  551 09:47:15.072453  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  552 09:47:15.079131  Writing SMRR. base = 0x9a000006, mask=0xff000800
  553 09:47:15.082451  Relocation complete.
  554 09:47:15.082532  New SMBASE 0x99fff000
  555 09:47:15.085779  In relocation handler: CPU 4
  556 09:47:15.088780  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  557 09:47:15.095720  Writing SMRR. base = 0x9a000006, mask=0xff000800
  558 09:47:15.098666  Relocation complete.
  559 09:47:15.098742  New SMBASE 0x99ffec00
  560 09:47:15.102439  In relocation handler: CPU 5
  561 09:47:15.105595  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  562 09:47:15.112079  Writing SMRR. base = 0x9a000006, mask=0xff000800
  563 09:47:15.112164  Relocation complete.
  564 09:47:15.115776  New SMBASE 0x99fff800
  565 09:47:15.118661  In relocation handler: CPU 2
  566 09:47:15.122290  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  567 09:47:15.128572  Writing SMRR. base = 0x9a000006, mask=0xff000800
  568 09:47:15.128657  Relocation complete.
  569 09:47:15.132078  Initializing CPU #0
  570 09:47:15.135258  CPU: vendor Intel device 806ec
  571 09:47:15.138708  CPU: family 06, model 8e, stepping 0c
  572 09:47:15.141933  Clearing out pending MCEs
  573 09:47:15.145256  Setting up local APIC...
  574 09:47:15.145342   apic_id: 0x00 done.
  575 09:47:15.148881  Turbo is available but hidden
  576 09:47:15.152029  Turbo is available and visible
  577 09:47:15.155287  VMX status: enabled
  578 09:47:15.158388  IA32_FEATURE_CONTROL status: locked
  579 09:47:15.162216  Skip microcode update
  580 09:47:15.162292  CPU #0 initialized
  581 09:47:15.165499  Initializing CPU #3
  582 09:47:15.165576  Initializing CPU #7
  583 09:47:15.168349  Initializing CPU #6
  584 09:47:15.171710  CPU: vendor Intel device 806ec
  585 09:47:15.175268  CPU: family 06, model 8e, stepping 0c
  586 09:47:15.178401  Initializing CPU #4
  587 09:47:15.178485  Initializing CPU #1
  588 09:47:15.181616  CPU: vendor Intel device 806ec
  589 09:47:15.188349  CPU: family 06, model 8e, stepping 0c
  590 09:47:15.188433  CPU: vendor Intel device 806ec
  591 09:47:15.194796  CPU: family 06, model 8e, stepping 0c
  592 09:47:15.194904  Clearing out pending MCEs
  593 09:47:15.198328  Clearing out pending MCEs
  594 09:47:15.201723  Setting up local APIC...
  595 09:47:15.204938  CPU: vendor Intel device 806ec
  596 09:47:15.208101  CPU: family 06, model 8e, stepping 0c
  597 09:47:15.211894  Clearing out pending MCEs
  598 09:47:15.215216  Clearing out pending MCEs
  599 09:47:15.218432  CPU: vendor Intel device 806ec
  600 09:47:15.221642  CPU: family 06, model 8e, stepping 0c
  601 09:47:15.221723  Setting up local APIC...
  602 09:47:15.224845   apic_id: 0x03 done.
  603 09:47:15.228108  Setting up local APIC...
  604 09:47:15.228189   apic_id: 0x05 done.
  605 09:47:15.231385  Clearing out pending MCEs
  606 09:47:15.235105  VMX status: enabled
  607 09:47:15.238233  Setting up local APIC...
  608 09:47:15.238341  Setting up local APIC...
  609 09:47:15.241909  Initializing CPU #5
  610 09:47:15.245068  Initializing CPU #2
  611 09:47:15.248214  CPU: vendor Intel device 806ec
  612 09:47:15.251282  CPU: family 06, model 8e, stepping 0c
  613 09:47:15.254975  CPU: vendor Intel device 806ec
  614 09:47:15.258195  CPU: family 06, model 8e, stepping 0c
  615 09:47:15.261438  Clearing out pending MCEs
  616 09:47:15.261517  Clearing out pending MCEs
  617 09:47:15.264500  Setting up local APIC...
  618 09:47:15.268107   apic_id: 0x04 done.
  619 09:47:15.271295  IA32_FEATURE_CONTROL status: locked
  620 09:47:15.274854  VMX status: enabled
  621 09:47:15.274937  Skip microcode update
  622 09:47:15.278149  IA32_FEATURE_CONTROL status: locked
  623 09:47:15.281709  CPU #7 initialized
  624 09:47:15.284833  Skip microcode update
  625 09:47:15.284918  Setting up local APIC...
  626 09:47:15.287703   apic_id: 0x01 done.
  627 09:47:15.291438  VMX status: enabled
  628 09:47:15.291525   apic_id: 0x02 done.
  629 09:47:15.294585  IA32_FEATURE_CONTROL status: locked
  630 09:47:15.297810  VMX status: enabled
  631 09:47:15.301030  Skip microcode update
  632 09:47:15.304740  IA32_FEATURE_CONTROL status: locked
  633 09:47:15.304826  CPU #1 initialized
  634 09:47:15.308107  Skip microcode update
  635 09:47:15.311250   apic_id: 0x07 done.
  636 09:47:15.311337   apic_id: 0x06 done.
  637 09:47:15.314563  VMX status: enabled
  638 09:47:15.314650  VMX status: enabled
  639 09:47:15.320967  IA32_FEATURE_CONTROL status: locked
  640 09:47:15.325151  IA32_FEATURE_CONTROL status: locked
  641 09:47:15.325238  Skip microcode update
  642 09:47:15.327808  Skip microcode update
  643 09:47:15.331028  CPU #2 initialized
  644 09:47:15.331114  CPU #5 initialized
  645 09:47:15.334564  CPU #4 initialized
  646 09:47:15.334651  CPU #6 initialized
  647 09:47:15.337661  VMX status: enabled
  648 09:47:15.341156  IA32_FEATURE_CONTROL status: locked
  649 09:47:15.344337  Skip microcode update
  650 09:47:15.344426  CPU #3 initialized
  651 09:47:15.350780  bsp_do_flight_plan done after 452 msecs.
  652 09:47:15.354077  CPU: frequency set to 4200 MHz
  653 09:47:15.354156  Enabling SMIs.
  654 09:47:15.354240  Locking SMM.
  655 09:47:15.370451  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  656 09:47:15.373504  CBFS @ c08000 size 3f8000
  657 09:47:15.380376  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  658 09:47:15.380463  CBFS: Locating 'vbt.bin'
  659 09:47:15.383699  CBFS: Found @ offset 5f5c0 size 499
  660 09:47:15.390359  Found a VBT of 4608 bytes after decompression
  661 09:47:15.574578  Display FSP Version Info HOB
  662 09:47:15.578255  Reference Code - CPU = 9.0.1e.30
  663 09:47:15.581396  uCode Version = 0.0.0.ca
  664 09:47:15.584552  TXT ACM version = ff.ff.ff.ffff
  665 09:47:15.588236  Display FSP Version Info HOB
  666 09:47:15.591095  Reference Code - ME = 9.0.1e.30
  667 09:47:15.594578  MEBx version = 0.0.0.0
  668 09:47:15.597670  ME Firmware Version = Consumer SKU
  669 09:47:15.601206  Display FSP Version Info HOB
  670 09:47:15.604753  Reference Code - CML PCH = 9.0.1e.30
  671 09:47:15.607579  PCH-CRID Status = Disabled
  672 09:47:15.611366  PCH-CRID Original Value = ff.ff.ff.ffff
  673 09:47:15.614487  PCH-CRID New Value = ff.ff.ff.ffff
  674 09:47:15.617587  OPROM - RST - RAID = ff.ff.ff.ffff
  675 09:47:15.620880  ChipsetInit Base Version = ff.ff.ff.ffff
  676 09:47:15.624189  ChipsetInit Oem Version = ff.ff.ff.ffff
  677 09:47:15.627861  Display FSP Version Info HOB
  678 09:47:15.634328  Reference Code - SA - System Agent = 9.0.1e.30
  679 09:47:15.637617  Reference Code - MRC = 0.7.1.6c
  680 09:47:15.637697  SA - PCIe Version = 9.0.1e.30
  681 09:47:15.640813  SA-CRID Status = Disabled
  682 09:47:15.644285  SA-CRID Original Value = 0.0.0.c
  683 09:47:15.647368  SA-CRID New Value = 0.0.0.c
  684 09:47:15.650663  OPROM - VBIOS = ff.ff.ff.ffff
  685 09:47:15.654299  RTC Init
  686 09:47:15.657587  Set power on after power failure.
  687 09:47:15.657662  Disabling Deep S3
  688 09:47:15.660740  Disabling Deep S3
  689 09:47:15.660812  Disabling Deep S4
  690 09:47:15.664057  Disabling Deep S4
  691 09:47:15.664160  Disabling Deep S5
  692 09:47:15.667279  Disabling Deep S5
  693 09:47:15.674084  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
  694 09:47:15.674190  Enumerating buses...
  695 09:47:15.680572  Show all devs... Before device enumeration.
  696 09:47:15.680662  Root Device: enabled 1
  697 09:47:15.684319  CPU_CLUSTER: 0: enabled 1
  698 09:47:15.687550  DOMAIN: 0000: enabled 1
  699 09:47:15.690666  APIC: 00: enabled 1
  700 09:47:15.690747  PCI: 00:00.0: enabled 1
  701 09:47:15.693664  PCI: 00:02.0: enabled 1
  702 09:47:15.697182  PCI: 00:04.0: enabled 0
  703 09:47:15.700797  PCI: 00:05.0: enabled 0
  704 09:47:15.700883  PCI: 00:12.0: enabled 1
  705 09:47:15.703916  PCI: 00:12.5: enabled 0
  706 09:47:15.707028  PCI: 00:12.6: enabled 0
  707 09:47:15.707109  PCI: 00:14.0: enabled 1
  708 09:47:15.710574  PCI: 00:14.1: enabled 0
  709 09:47:15.713881  PCI: 00:14.3: enabled 1
  710 09:47:15.717008  PCI: 00:14.5: enabled 0
  711 09:47:15.717096  PCI: 00:15.0: enabled 1
  712 09:47:15.720226  PCI: 00:15.1: enabled 1
  713 09:47:15.723456  PCI: 00:15.2: enabled 0
  714 09:47:15.726652  PCI: 00:15.3: enabled 0
  715 09:47:15.726733  PCI: 00:16.0: enabled 1
  716 09:47:15.730462  PCI: 00:16.1: enabled 0
  717 09:47:15.733719  PCI: 00:16.2: enabled 0
  718 09:47:15.736688  PCI: 00:16.3: enabled 0
  719 09:47:15.736818  PCI: 00:16.4: enabled 0
  720 09:47:15.740542  PCI: 00:16.5: enabled 0
  721 09:47:15.743789  PCI: 00:17.0: enabled 1
  722 09:47:15.743876  PCI: 00:19.0: enabled 1
  723 09:47:15.747268  PCI: 00:19.1: enabled 0
  724 09:47:15.750265  PCI: 00:19.2: enabled 0
  725 09:47:15.753508  PCI: 00:1a.0: enabled 0
  726 09:47:15.753590  PCI: 00:1c.0: enabled 0
  727 09:47:15.756707  PCI: 00:1c.1: enabled 0
  728 09:47:15.760296  PCI: 00:1c.2: enabled 0
  729 09:47:15.763511  PCI: 00:1c.3: enabled 0
  730 09:47:15.763607  PCI: 00:1c.4: enabled 0
  731 09:47:15.766616  PCI: 00:1c.5: enabled 0
  732 09:47:15.770601  PCI: 00:1c.6: enabled 0
  733 09:47:15.773290  PCI: 00:1c.7: enabled 0
  734 09:47:15.773372  PCI: 00:1d.0: enabled 1
  735 09:47:15.776958  PCI: 00:1d.1: enabled 0
  736 09:47:15.780238  PCI: 00:1d.2: enabled 0
  737 09:47:15.780321  PCI: 00:1d.3: enabled 0
  738 09:47:15.783296  PCI: 00:1d.4: enabled 0
  739 09:47:15.787013  PCI: 00:1d.5: enabled 1
  740 09:47:15.790119  PCI: 00:1e.0: enabled 1
  741 09:47:15.790205  PCI: 00:1e.1: enabled 0
  742 09:47:15.793496  PCI: 00:1e.2: enabled 1
  743 09:47:15.796388  PCI: 00:1e.3: enabled 1
  744 09:47:15.799870  PCI: 00:1f.0: enabled 1
  745 09:47:15.799957  PCI: 00:1f.1: enabled 1
  746 09:47:15.802959  PCI: 00:1f.2: enabled 1
  747 09:47:15.806593  PCI: 00:1f.3: enabled 1
  748 09:47:15.809635  PCI: 00:1f.4: enabled 1
  749 09:47:15.809717  PCI: 00:1f.5: enabled 1
  750 09:47:15.813196  PCI: 00:1f.6: enabled 0
  751 09:47:15.816454  USB0 port 0: enabled 1
  752 09:47:15.816542  I2C: 00:15: enabled 1
  753 09:47:15.820111  I2C: 00:5d: enabled 1
  754 09:47:15.823455  GENERIC: 0.0: enabled 1
  755 09:47:15.823536  I2C: 00:1a: enabled 1
  756 09:47:15.826625  I2C: 00:38: enabled 1
  757 09:47:15.829662  I2C: 00:39: enabled 1
  758 09:47:15.833060  I2C: 00:3a: enabled 1
  759 09:47:15.833141  I2C: 00:3b: enabled 1
  760 09:47:15.836384  PCI: 00:00.0: enabled 1
  761 09:47:15.839644  SPI: 00: enabled 1
  762 09:47:15.839726  SPI: 01: enabled 1
  763 09:47:15.843027  PNP: 0c09.0: enabled 1
  764 09:47:15.846434  USB2 port 0: enabled 1
  765 09:47:15.846521  USB2 port 1: enabled 1
  766 09:47:15.849554  USB2 port 2: enabled 0
  767 09:47:15.853191  USB2 port 3: enabled 0
  768 09:47:15.853278  USB2 port 5: enabled 0
  769 09:47:15.856401  USB2 port 6: enabled 1
  770 09:47:15.859588  USB2 port 9: enabled 1
  771 09:47:15.859685  USB3 port 0: enabled 1
  772 09:47:15.862777  USB3 port 1: enabled 1
  773 09:47:15.866503  USB3 port 2: enabled 1
  774 09:47:15.869518  USB3 port 3: enabled 1
  775 09:47:15.869604  USB3 port 4: enabled 0
  776 09:47:15.872830  APIC: 03: enabled 1
  777 09:47:15.872923  APIC: 07: enabled 1
  778 09:47:15.876015  APIC: 01: enabled 1
  779 09:47:15.879643  APIC: 02: enabled 1
  780 09:47:15.879755  APIC: 06: enabled 1
  781 09:47:15.883239  APIC: 04: enabled 1
  782 09:47:15.886217  APIC: 05: enabled 1
  783 09:47:15.886302  Compare with tree...
  784 09:47:15.889563  Root Device: enabled 1
  785 09:47:15.893144   CPU_CLUSTER: 0: enabled 1
  786 09:47:15.893229    APIC: 00: enabled 1
  787 09:47:15.896312    APIC: 03: enabled 1
  788 09:47:15.899498    APIC: 07: enabled 1
  789 09:47:15.899587    APIC: 01: enabled 1
  790 09:47:15.903084    APIC: 02: enabled 1
  791 09:47:15.906178    APIC: 06: enabled 1
  792 09:47:15.906265    APIC: 04: enabled 1
  793 09:47:15.909865    APIC: 05: enabled 1
  794 09:47:15.913004   DOMAIN: 0000: enabled 1
  795 09:47:15.916535    PCI: 00:00.0: enabled 1
  796 09:47:15.916614    PCI: 00:02.0: enabled 1
  797 09:47:15.919945    PCI: 00:04.0: enabled 0
  798 09:47:15.923134    PCI: 00:05.0: enabled 0
  799 09:47:15.926132    PCI: 00:12.0: enabled 1
  800 09:47:15.929425    PCI: 00:12.5: enabled 0
  801 09:47:15.929515    PCI: 00:12.6: enabled 0
  802 09:47:15.932624    PCI: 00:14.0: enabled 1
  803 09:47:15.935902     USB0 port 0: enabled 1
  804 09:47:15.939210      USB2 port 0: enabled 1
  805 09:47:15.942991      USB2 port 1: enabled 1
  806 09:47:15.943076      USB2 port 2: enabled 0
  807 09:47:15.946127      USB2 port 3: enabled 0
  808 09:47:15.949194      USB2 port 5: enabled 0
  809 09:47:15.952755      USB2 port 6: enabled 1
  810 09:47:15.956633      USB2 port 9: enabled 1
  811 09:47:15.956720      USB3 port 0: enabled 1
  812 09:47:15.959564      USB3 port 1: enabled 1
  813 09:47:15.962788      USB3 port 2: enabled 1
  814 09:47:15.966055      USB3 port 3: enabled 1
  815 09:47:15.969760      USB3 port 4: enabled 0
  816 09:47:15.972877    PCI: 00:14.1: enabled 0
  817 09:47:15.972983    PCI: 00:14.3: enabled 1
  818 09:47:15.975910    PCI: 00:14.5: enabled 0
  819 09:47:15.979566    PCI: 00:15.0: enabled 1
  820 09:47:15.982758     I2C: 00:15: enabled 1
  821 09:47:15.982843    PCI: 00:15.1: enabled 1
  822 09:47:15.986003     I2C: 00:5d: enabled 1
  823 09:47:15.989538     GENERIC: 0.0: enabled 1
  824 09:47:15.992867    PCI: 00:15.2: enabled 0
  825 09:47:15.996208    PCI: 00:15.3: enabled 0
  826 09:47:15.996294    PCI: 00:16.0: enabled 1
  827 09:47:15.999634    PCI: 00:16.1: enabled 0
  828 09:47:16.002815    PCI: 00:16.2: enabled 0
  829 09:47:16.005890    PCI: 00:16.3: enabled 0
  830 09:47:16.009097    PCI: 00:16.4: enabled 0
  831 09:47:16.009182    PCI: 00:16.5: enabled 0
  832 09:47:16.012671    PCI: 00:17.0: enabled 1
  833 09:47:16.016169    PCI: 00:19.0: enabled 1
  834 09:47:16.019491     I2C: 00:1a: enabled 1
  835 09:47:16.022609     I2C: 00:38: enabled 1
  836 09:47:16.022708     I2C: 00:39: enabled 1
  837 09:47:16.025930     I2C: 00:3a: enabled 1
  838 09:47:16.029306     I2C: 00:3b: enabled 1
  839 09:47:16.032498    PCI: 00:19.1: enabled 0
  840 09:47:16.032608    PCI: 00:19.2: enabled 0
  841 09:47:16.035780    PCI: 00:1a.0: enabled 0
  842 09:47:16.039029    PCI: 00:1c.0: enabled 0
  843 09:47:16.042951    PCI: 00:1c.1: enabled 0
  844 09:47:16.045847    PCI: 00:1c.2: enabled 0
  845 09:47:16.045932    PCI: 00:1c.3: enabled 0
  846 09:47:16.049308    PCI: 00:1c.4: enabled 0
  847 09:47:16.052548    PCI: 00:1c.5: enabled 0
  848 09:47:16.056078    PCI: 00:1c.6: enabled 0
  849 09:47:16.056149    PCI: 00:1c.7: enabled 0
  850 09:47:16.059316    PCI: 00:1d.0: enabled 1
  851 09:47:16.062659    PCI: 00:1d.1: enabled 0
  852 09:47:16.065910    PCI: 00:1d.2: enabled 0
  853 09:47:16.069199    PCI: 00:1d.3: enabled 0
  854 09:47:16.069283    PCI: 00:1d.4: enabled 0
  855 09:47:16.072629    PCI: 00:1d.5: enabled 1
  856 09:47:16.075665     PCI: 00:00.0: enabled 1
  857 09:47:16.078702    PCI: 00:1e.0: enabled 1
  858 09:47:16.082439    PCI: 00:1e.1: enabled 0
  859 09:47:16.082524    PCI: 00:1e.2: enabled 1
  860 09:47:16.085607     SPI: 00: enabled 1
  861 09:47:16.088610    PCI: 00:1e.3: enabled 1
  862 09:47:16.092225     SPI: 01: enabled 1
  863 09:47:16.092309    PCI: 00:1f.0: enabled 1
  864 09:47:16.095398     PNP: 0c09.0: enabled 1
  865 09:47:16.098869    PCI: 00:1f.1: enabled 1
  866 09:47:16.102466    PCI: 00:1f.2: enabled 1
  867 09:47:16.105538    PCI: 00:1f.3: enabled 1
  868 09:47:16.105616    PCI: 00:1f.4: enabled 1
  869 09:47:16.108488    PCI: 00:1f.5: enabled 1
  870 09:47:16.112158    PCI: 00:1f.6: enabled 0
  871 09:47:16.115213  Root Device scanning...
  872 09:47:16.118537  scan_static_bus for Root Device
  873 09:47:16.118621  CPU_CLUSTER: 0 enabled
  874 09:47:16.122157  DOMAIN: 0000 enabled
  875 09:47:16.125262  DOMAIN: 0000 scanning...
  876 09:47:16.128601  PCI: pci_scan_bus for bus 00
  877 09:47:16.132315  PCI: 00:00.0 [8086/0000] ops
  878 09:47:16.135414  PCI: 00:00.0 [8086/9b61] enabled
  879 09:47:16.138656  PCI: 00:02.0 [8086/0000] bus ops
  880 09:47:16.141947  PCI: 00:02.0 [8086/9b41] enabled
  881 09:47:16.145636  PCI: 00:04.0 [8086/1903] disabled
  882 09:47:16.148472  PCI: 00:08.0 [8086/1911] enabled
  883 09:47:16.151695  PCI: 00:12.0 [8086/02f9] enabled
  884 09:47:16.155202  PCI: 00:14.0 [8086/0000] bus ops
  885 09:47:16.158803  PCI: 00:14.0 [8086/02ed] enabled
  886 09:47:16.162098  PCI: 00:14.2 [8086/02ef] enabled
  887 09:47:16.165251  PCI: 00:14.3 [8086/02f0] enabled
  888 09:47:16.168382  PCI: 00:15.0 [8086/0000] bus ops
  889 09:47:16.172095  PCI: 00:15.0 [8086/02e8] enabled
  890 09:47:16.175256  PCI: 00:15.1 [8086/0000] bus ops
  891 09:47:16.178448  PCI: 00:15.1 [8086/02e9] enabled
  892 09:47:16.181509  PCI: 00:16.0 [8086/0000] ops
  893 09:47:16.185192  PCI: 00:16.0 [8086/02e0] enabled
  894 09:47:16.188524  PCI: 00:17.0 [8086/0000] ops
  895 09:47:16.191621  PCI: 00:17.0 [8086/02d3] enabled
  896 09:47:16.195226  PCI: 00:19.0 [8086/0000] bus ops
  897 09:47:16.198561  PCI: 00:19.0 [8086/02c5] enabled
  898 09:47:16.201758  PCI: 00:1d.0 [8086/0000] bus ops
  899 09:47:16.204875  PCI: 00:1d.0 [8086/02b0] enabled
  900 09:47:16.208455  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  901 09:47:16.211567  PCI: 00:1e.0 [8086/0000] ops
  902 09:47:16.214745  PCI: 00:1e.0 [8086/02a8] enabled
  903 09:47:16.217990  PCI: 00:1e.2 [8086/0000] bus ops
  904 09:47:16.221496  PCI: 00:1e.2 [8086/02aa] enabled
  905 09:47:16.224802  PCI: 00:1e.3 [8086/0000] bus ops
  906 09:47:16.228560  PCI: 00:1e.3 [8086/02ab] enabled
  907 09:47:16.231742  PCI: 00:1f.0 [8086/0000] bus ops
  908 09:47:16.234980  PCI: 00:1f.0 [8086/0284] enabled
  909 09:47:16.241191  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  910 09:47:16.247910  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  911 09:47:16.251522  PCI: 00:1f.3 [8086/0000] bus ops
  912 09:47:16.254638  PCI: 00:1f.3 [8086/02c8] enabled
  913 09:47:16.258301  PCI: 00:1f.4 [8086/0000] bus ops
  914 09:47:16.261269  PCI: 00:1f.4 [8086/02a3] enabled
  915 09:47:16.264584  PCI: 00:1f.5 [8086/0000] bus ops
  916 09:47:16.267925  PCI: 00:1f.5 [8086/02a4] enabled
  917 09:47:16.271155  PCI: Leftover static devices:
  918 09:47:16.271242  PCI: 00:05.0
  919 09:47:16.271310  PCI: 00:12.5
  920 09:47:16.274683  PCI: 00:12.6
  921 09:47:16.274767  PCI: 00:14.1
  922 09:47:16.277985  PCI: 00:14.5
  923 09:47:16.278065  PCI: 00:15.2
  924 09:47:16.278132  PCI: 00:15.3
  925 09:47:16.281203  PCI: 00:16.1
  926 09:47:16.281289  PCI: 00:16.2
  927 09:47:16.284347  PCI: 00:16.3
  928 09:47:16.284426  PCI: 00:16.4
  929 09:47:16.284490  PCI: 00:16.5
  930 09:47:16.288118  PCI: 00:19.1
  931 09:47:16.288203  PCI: 00:19.2
  932 09:47:16.291457  PCI: 00:1a.0
  933 09:47:16.291542  PCI: 00:1c.0
  934 09:47:16.291609  PCI: 00:1c.1
  935 09:47:16.294678  PCI: 00:1c.2
  936 09:47:16.294763  PCI: 00:1c.3
  937 09:47:16.298111  PCI: 00:1c.4
  938 09:47:16.298196  PCI: 00:1c.5
  939 09:47:16.301082  PCI: 00:1c.6
  940 09:47:16.301167  PCI: 00:1c.7
  941 09:47:16.301233  PCI: 00:1d.1
  942 09:47:16.304369  PCI: 00:1d.2
  943 09:47:16.304454  PCI: 00:1d.3
  944 09:47:16.307652  PCI: 00:1d.4
  945 09:47:16.307736  PCI: 00:1d.5
  946 09:47:16.307804  PCI: 00:1e.1
  947 09:47:16.311041  PCI: 00:1f.1
  948 09:47:16.311131  PCI: 00:1f.2
  949 09:47:16.314143  PCI: 00:1f.6
  950 09:47:16.317846  PCI: Check your devicetree.cb.
  951 09:47:16.317930  PCI: 00:02.0 scanning...
  952 09:47:16.321259  scan_generic_bus for PCI: 00:02.0
  953 09:47:16.327812  scan_generic_bus for PCI: 00:02.0 done
  954 09:47:16.331020  scan_bus: scanning of bus PCI: 00:02.0 took 10175 usecs
  955 09:47:16.334413  PCI: 00:14.0 scanning...
  956 09:47:16.337675  scan_static_bus for PCI: 00:14.0
  957 09:47:16.340749  USB0 port 0 enabled
  958 09:47:16.344109  USB0 port 0 scanning...
  959 09:47:16.347393  scan_static_bus for USB0 port 0
  960 09:47:16.347479  USB2 port 0 enabled
  961 09:47:16.351102  USB2 port 1 enabled
  962 09:47:16.351188  USB2 port 2 disabled
  963 09:47:16.354291  USB2 port 3 disabled
  964 09:47:16.357364  USB2 port 5 disabled
  965 09:47:16.357449  USB2 port 6 enabled
  966 09:47:16.361041  USB2 port 9 enabled
  967 09:47:16.364108  USB3 port 0 enabled
  968 09:47:16.364193  USB3 port 1 enabled
  969 09:47:16.367352  USB3 port 2 enabled
  970 09:47:16.367438  USB3 port 3 enabled
  971 09:47:16.370448  USB3 port 4 disabled
  972 09:47:16.374254  USB2 port 0 scanning...
  973 09:47:16.377508  scan_static_bus for USB2 port 0
  974 09:47:16.380866  scan_static_bus for USB2 port 0 done
  975 09:47:16.387167  scan_bus: scanning of bus USB2 port 0 took 9687 usecs
  976 09:47:16.387255  USB2 port 1 scanning...
  977 09:47:16.390731  scan_static_bus for USB2 port 1
  978 09:47:16.397324  scan_static_bus for USB2 port 1 done
  979 09:47:16.400848  scan_bus: scanning of bus USB2 port 1 took 9727 usecs
  980 09:47:16.403703  USB2 port 6 scanning...
  981 09:47:16.407091  scan_static_bus for USB2 port 6
  982 09:47:16.410669  scan_static_bus for USB2 port 6 done
  983 09:47:16.417335  scan_bus: scanning of bus USB2 port 6 took 9704 usecs
  984 09:47:16.417424  USB2 port 9 scanning...
  985 09:47:16.420451  scan_static_bus for USB2 port 9
  986 09:47:16.427014  scan_static_bus for USB2 port 9 done
  987 09:47:16.430269  scan_bus: scanning of bus USB2 port 9 took 9701 usecs
  988 09:47:16.433556  USB3 port 0 scanning...
  989 09:47:16.437383  scan_static_bus for USB3 port 0
  990 09:47:16.440062  scan_static_bus for USB3 port 0 done
  991 09:47:16.447041  scan_bus: scanning of bus USB3 port 0 took 9696 usecs
  992 09:47:16.447126  USB3 port 1 scanning...
  993 09:47:16.451026  scan_static_bus for USB3 port 1
  994 09:47:16.457259  scan_static_bus for USB3 port 1 done
  995 09:47:16.460346  scan_bus: scanning of bus USB3 port 1 took 9694 usecs
  996 09:47:16.463694  USB3 port 2 scanning...
  997 09:47:16.467277  scan_static_bus for USB3 port 2
  998 09:47:16.470504  scan_static_bus for USB3 port 2 done
  999 09:47:16.477055  scan_bus: scanning of bus USB3 port 2 took 9702 usecs
 1000 09:47:16.477142  USB3 port 3 scanning...
 1001 09:47:16.480361  scan_static_bus for USB3 port 3
 1002 09:47:16.487251  scan_static_bus for USB3 port 3 done
 1003 09:47:16.490606  scan_bus: scanning of bus USB3 port 3 took 9702 usecs
 1004 09:47:16.493605  scan_static_bus for USB0 port 0 done
 1005 09:47:16.500575  scan_bus: scanning of bus USB0 port 0 took 155328 usecs
 1006 09:47:16.503690  scan_static_bus for PCI: 00:14.0 done
 1007 09:47:16.510126  scan_bus: scanning of bus PCI: 00:14.0 took 172950 usecs
 1008 09:47:16.513636  PCI: 00:15.0 scanning...
 1009 09:47:16.516866  scan_generic_bus for PCI: 00:15.0
 1010 09:47:16.520241  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1011 09:47:16.523874  scan_generic_bus for PCI: 00:15.0 done
 1012 09:47:16.530241  scan_bus: scanning of bus PCI: 00:15.0 took 14301 usecs
 1013 09:47:16.533406  PCI: 00:15.1 scanning...
 1014 09:47:16.536748  scan_generic_bus for PCI: 00:15.1
 1015 09:47:16.539979  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1016 09:47:16.543203  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1017 09:47:16.546993  scan_generic_bus for PCI: 00:15.1 done
 1018 09:47:16.553359  scan_bus: scanning of bus PCI: 00:15.1 took 18588 usecs
 1019 09:47:16.556605  PCI: 00:19.0 scanning...
 1020 09:47:16.559918  scan_generic_bus for PCI: 00:19.0
 1021 09:47:16.563000  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1022 09:47:16.566509  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1023 09:47:16.573126  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1024 09:47:16.576617  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1025 09:47:16.579793  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1026 09:47:16.583224  scan_generic_bus for PCI: 00:19.0 done
 1027 09:47:16.589852  scan_bus: scanning of bus PCI: 00:19.0 took 30727 usecs
 1028 09:47:16.593058  PCI: 00:1d.0 scanning...
 1029 09:47:16.596695  do_pci_scan_bridge for PCI: 00:1d.0
 1030 09:47:16.600216  PCI: pci_scan_bus for bus 01
 1031 09:47:16.602930  PCI: 01:00.0 [1c5c/1327] enabled
 1032 09:47:16.606624  Enabling Common Clock Configuration
 1033 09:47:16.610222  L1 Sub-State supported from root port 29
 1034 09:47:16.613070  L1 Sub-State Support = 0xf
 1035 09:47:16.616135  CommonModeRestoreTime = 0x28
 1036 09:47:16.619880  Power On Value = 0x16, Power On Scale = 0x0
 1037 09:47:16.622892  ASPM: Enabled L1
 1038 09:47:16.626485  scan_bus: scanning of bus PCI: 00:1d.0 took 32777 usecs
 1039 09:47:16.629531  PCI: 00:1e.2 scanning...
 1040 09:47:16.632774  scan_generic_bus for PCI: 00:1e.2
 1041 09:47:16.636511  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1042 09:47:16.643111  scan_generic_bus for PCI: 00:1e.2 done
 1043 09:47:16.646178  scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
 1044 09:47:16.649572  PCI: 00:1e.3 scanning...
 1045 09:47:16.652713  scan_generic_bus for PCI: 00:1e.3
 1046 09:47:16.655994  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1047 09:47:16.662598  scan_generic_bus for PCI: 00:1e.3 done
 1048 09:47:16.666286  scan_bus: scanning of bus PCI: 00:1e.3 took 13991 usecs
 1049 09:47:16.669742  PCI: 00:1f.0 scanning...
 1050 09:47:16.672370  scan_static_bus for PCI: 00:1f.0
 1051 09:47:16.676205  PNP: 0c09.0 enabled
 1052 09:47:16.679279  scan_static_bus for PCI: 00:1f.0 done
 1053 09:47:16.682489  scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
 1054 09:47:16.686242  PCI: 00:1f.3 scanning...
 1055 09:47:16.692509  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
 1056 09:47:16.696172  PCI: 00:1f.4 scanning...
 1057 09:47:16.699422  scan_generic_bus for PCI: 00:1f.4
 1058 09:47:16.702491  scan_generic_bus for PCI: 00:1f.4 done
 1059 09:47:16.708791  scan_bus: scanning of bus PCI: 00:1f.4 took 10182 usecs
 1060 09:47:16.712257  PCI: 00:1f.5 scanning...
 1061 09:47:16.715625  scan_generic_bus for PCI: 00:1f.5
 1062 09:47:16.718733  scan_generic_bus for PCI: 00:1f.5 done
 1063 09:47:16.722388  scan_bus: scanning of bus PCI: 00:1f.5 took 10183 usecs
 1064 09:47:16.729142  scan_bus: scanning of bus DOMAIN: 0000 took 604826 usecs
 1065 09:47:16.732346  scan_static_bus for Root Device done
 1066 09:47:16.738839  scan_bus: scanning of bus Root Device took 624698 usecs
 1067 09:47:16.738955  done
 1068 09:47:16.742131  Chrome EC: UHEPI supported
 1069 09:47:16.749099  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1070 09:47:16.755590  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1071 09:47:16.762036  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1072 09:47:16.769044  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1073 09:47:16.772089  SPI flash protection: WPSW=0 SRP0=0
 1074 09:47:16.775219  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1075 09:47:16.782005  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
 1076 09:47:16.785224  found VGA at PCI: 00:02.0
 1077 09:47:16.788265  Setting up VGA for PCI: 00:02.0
 1078 09:47:16.791760  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1079 09:47:16.798345  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1080 09:47:16.801521  Allocating resources...
 1081 09:47:16.801607  Reading resources...
 1082 09:47:16.805058  Root Device read_resources bus 0 link: 0
 1083 09:47:16.811619  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1084 09:47:16.814826  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1085 09:47:16.821307  DOMAIN: 0000 read_resources bus 0 link: 0
 1086 09:47:16.828054  PCI: 00:14.0 read_resources bus 0 link: 0
 1087 09:47:16.831160  USB0 port 0 read_resources bus 0 link: 0
 1088 09:47:16.838560  USB0 port 0 read_resources bus 0 link: 0 done
 1089 09:47:16.841831  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1090 09:47:16.849329  PCI: 00:15.0 read_resources bus 1 link: 0
 1091 09:47:16.852545  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1092 09:47:16.859427  PCI: 00:15.1 read_resources bus 2 link: 0
 1093 09:47:16.862661  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1094 09:47:16.870036  PCI: 00:19.0 read_resources bus 3 link: 0
 1095 09:47:16.876758  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1096 09:47:16.879922  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 09:47:16.886870  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 09:47:16.890093  PCI: 00:1e.2 read_resources bus 4 link: 0
 1099 09:47:16.896956  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1100 09:47:16.900127  PCI: 00:1e.3 read_resources bus 5 link: 0
 1101 09:47:16.906853  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1102 09:47:16.909985  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 09:47:16.916774  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 09:47:16.923141  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1105 09:47:16.926842  Root Device read_resources bus 0 link: 0 done
 1106 09:47:16.929967  Done reading resources.
 1107 09:47:16.933082  Show resources in subtree (Root Device)...After reading.
 1108 09:47:16.939966   Root Device child on link 0 CPU_CLUSTER: 0
 1109 09:47:16.943164    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1110 09:47:16.943257     APIC: 00
 1111 09:47:16.946368     APIC: 03
 1112 09:47:16.946452     APIC: 07
 1113 09:47:16.950251     APIC: 01
 1114 09:47:16.950334     APIC: 02
 1115 09:47:16.950417     APIC: 06
 1116 09:47:16.953265     APIC: 04
 1117 09:47:16.953342     APIC: 05
 1118 09:47:16.956692    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1119 09:47:16.966644    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1120 09:47:16.976276    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1121 09:47:16.980033     PCI: 00:00.0
 1122 09:47:17.030036     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1123 09:47:17.030362     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1124 09:47:17.030929     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1125 09:47:17.031634     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1126 09:47:17.031965     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1127 09:47:17.040842     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1128 09:47:17.047655     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1129 09:47:17.054308     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1130 09:47:17.064102     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1131 09:47:17.070525     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1132 09:47:17.080705     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1133 09:47:17.090463     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1134 09:47:17.100512     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1135 09:47:17.110438     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1136 09:47:17.120830     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1137 09:47:17.127155     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1138 09:47:17.130745     PCI: 00:02.0
 1139 09:47:17.140826     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1140 09:47:17.150796     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1141 09:47:17.160344     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1142 09:47:17.160428     PCI: 00:04.0
 1143 09:47:17.163628     PCI: 00:08.0
 1144 09:47:17.170300     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1145 09:47:17.173962     PCI: 00:12.0
 1146 09:47:17.183609     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1147 09:47:17.186814     PCI: 00:14.0 child on link 0 USB0 port 0
 1148 09:47:17.196956     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1149 09:47:17.203427      USB0 port 0 child on link 0 USB2 port 0
 1150 09:47:17.203510       USB2 port 0
 1151 09:47:17.206592       USB2 port 1
 1152 09:47:17.206672       USB2 port 2
 1153 09:47:17.210218       USB2 port 3
 1154 09:47:17.210320       USB2 port 5
 1155 09:47:17.213255       USB2 port 6
 1156 09:47:17.213340       USB2 port 9
 1157 09:47:17.217063       USB3 port 0
 1158 09:47:17.217149       USB3 port 1
 1159 09:47:17.220170       USB3 port 2
 1160 09:47:17.220247       USB3 port 3
 1161 09:47:17.223441       USB3 port 4
 1162 09:47:17.226608     PCI: 00:14.2
 1163 09:47:17.236506     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1164 09:47:17.243498     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1165 09:47:17.246489     PCI: 00:14.3
 1166 09:47:17.256745     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1167 09:47:17.260074     PCI: 00:15.0 child on link 0 I2C: 01:15
 1168 09:47:17.269673     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1169 09:47:17.272947      I2C: 01:15
 1170 09:47:17.276497     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1171 09:47:17.286448     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1172 09:47:17.289552      I2C: 02:5d
 1173 09:47:17.289659      GENERIC: 0.0
 1174 09:47:17.293246     PCI: 00:16.0
 1175 09:47:17.302848     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1176 09:47:17.302936     PCI: 00:17.0
 1177 09:47:17.312832     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1178 09:47:17.319266     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1179 09:47:17.329331     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1180 09:47:17.335706     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1181 09:47:17.345688     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1182 09:47:17.355990     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1183 09:47:17.359168     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1184 09:47:17.369080     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 09:47:17.369161      I2C: 03:1a
 1186 09:47:17.372684      I2C: 03:38
 1187 09:47:17.372761      I2C: 03:39
 1188 09:47:17.375943      I2C: 03:3a
 1189 09:47:17.376039      I2C: 03:3b
 1190 09:47:17.383023     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1191 09:47:17.389087     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1192 09:47:17.399312     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1193 09:47:17.408839     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1194 09:47:17.412049      PCI: 01:00.0
 1195 09:47:17.422006      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1196 09:47:17.422096     PCI: 00:1e.0
 1197 09:47:17.432074     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1198 09:47:17.442019     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1199 09:47:17.448724     PCI: 00:1e.2 child on link 0 SPI: 00
 1200 09:47:17.458246     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1201 09:47:17.458328      SPI: 00
 1202 09:47:17.461914     PCI: 00:1e.3 child on link 0 SPI: 01
 1203 09:47:17.471649     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1204 09:47:17.475260      SPI: 01
 1205 09:47:17.478485     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1206 09:47:17.488251     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1207 09:47:17.494677     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1208 09:47:17.498328      PNP: 0c09.0
 1209 09:47:17.504618      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1210 09:47:17.508374     PCI: 00:1f.3
 1211 09:47:17.518343     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1212 09:47:17.527846     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1213 09:47:17.527926     PCI: 00:1f.4
 1214 09:47:17.537755     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1215 09:47:17.547933     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1216 09:47:17.551615     PCI: 00:1f.5
 1217 09:47:17.557682     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1218 09:47:17.564594  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1219 09:47:17.571086  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1220 09:47:17.577572  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1221 09:47:17.580850  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1222 09:47:17.584430  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1223 09:47:17.590795  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1224 09:47:17.594049  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1225 09:47:17.600856  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1226 09:47:17.607292  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1227 09:47:17.614210  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1228 09:47:17.624308  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1229 09:47:17.630722  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1230 09:47:17.633844  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1231 09:47:17.640559  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1232 09:47:17.647316  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1233 09:47:17.650518  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1234 09:47:17.657268  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1235 09:47:17.660272  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1236 09:47:17.667307  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1237 09:47:17.670503  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1238 09:47:17.673752  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1239 09:47:17.680061  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1240 09:47:17.683706  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1241 09:47:17.689983  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1242 09:47:17.693624  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1243 09:47:17.699911  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1244 09:47:17.703609  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1245 09:47:17.710051  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1246 09:47:17.713223  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1247 09:47:17.720040  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1248 09:47:17.723193  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1249 09:47:17.730049  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1250 09:47:17.733239  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1251 09:47:17.740059  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1252 09:47:17.743172  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1253 09:47:17.746363  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1254 09:47:17.753293  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1255 09:47:17.759549  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1256 09:47:17.766438  avoid_fixed_resources: DOMAIN: 0000
 1257 09:47:17.769700  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1258 09:47:17.776654  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1259 09:47:17.782814  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1260 09:47:17.793075  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1261 09:47:17.799472  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1262 09:47:17.806103  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1263 09:47:17.816167  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1264 09:47:17.822741  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1265 09:47:17.829054  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1266 09:47:17.839242  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1267 09:47:17.846015  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1268 09:47:17.852568  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1269 09:47:17.855832  Setting resources...
 1270 09:47:17.862264  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1271 09:47:17.865808  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1272 09:47:17.869047  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1273 09:47:17.872276  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1274 09:47:17.875551  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1275 09:47:17.882403  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1276 09:47:17.889256  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1277 09:47:17.895754  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1278 09:47:17.902213  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1279 09:47:17.909074  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1280 09:47:17.912220  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1281 09:47:17.918527  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1282 09:47:17.922400  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1283 09:47:17.928927  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1284 09:47:17.932132  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1285 09:47:17.939100  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1286 09:47:17.942143  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1287 09:47:17.948441  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1288 09:47:17.952013  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1289 09:47:17.958709  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1290 09:47:17.961718  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1291 09:47:17.968728  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1292 09:47:17.971931  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1293 09:47:17.978383  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1294 09:47:17.981535  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1295 09:47:17.985262  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1296 09:47:17.991610  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1297 09:47:17.994837  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1298 09:47:18.001437  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1299 09:47:18.004683  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1300 09:47:18.011528  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1301 09:47:18.014701  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1302 09:47:18.024720  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1303 09:47:18.031570  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1304 09:47:18.038042  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1305 09:47:18.044819  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1306 09:47:18.051292  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1307 09:47:18.057930  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1308 09:47:18.061164  Root Device assign_resources, bus 0 link: 0
 1309 09:47:18.067616  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1310 09:47:18.074488  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1311 09:47:18.084524  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1312 09:47:18.090847  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1313 09:47:18.101054  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1314 09:47:18.107500  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1315 09:47:18.117313  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1316 09:47:18.121090  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1317 09:47:18.124116  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1318 09:47:18.134155  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1319 09:47:18.141045  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1320 09:47:18.150887  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1321 09:47:18.157746  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1322 09:47:18.164106  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1323 09:47:18.167657  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1324 09:47:18.177194  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1325 09:47:18.181016  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1326 09:47:18.184238  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1327 09:47:18.193732  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1328 09:47:18.200513  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1329 09:47:18.210775  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1330 09:47:18.217116  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1331 09:47:18.223907  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1332 09:47:18.233561  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1333 09:47:18.240320  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1334 09:47:18.247224  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1335 09:47:18.253501  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1336 09:47:18.256748  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1337 09:47:18.267270  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1338 09:47:18.277073  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1339 09:47:18.283608  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1340 09:47:18.286874  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1341 09:47:18.296751  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1342 09:47:18.300521  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1343 09:47:18.310215  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1344 09:47:18.316495  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1345 09:47:18.323488  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1346 09:47:18.326530  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1347 09:47:18.336580  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1348 09:47:18.339628  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1349 09:47:18.343022  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1350 09:47:18.349873  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1351 09:47:18.353098  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1352 09:47:18.359939  LPC: Trying to open IO window from 800 size 1ff
 1353 09:47:18.366489  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1354 09:47:18.376026  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1355 09:47:18.383007  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1356 09:47:18.392545  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1357 09:47:18.396335  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1358 09:47:18.402523  Root Device assign_resources, bus 0 link: 0
 1359 09:47:18.402605  Done setting resources.
 1360 09:47:18.409230  Show resources in subtree (Root Device)...After assigning values.
 1361 09:47:18.416063   Root Device child on link 0 CPU_CLUSTER: 0
 1362 09:47:18.419246    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1363 09:47:18.419329     APIC: 00
 1364 09:47:18.422436     APIC: 03
 1365 09:47:18.422510     APIC: 07
 1366 09:47:18.422573     APIC: 01
 1367 09:47:18.426088     APIC: 02
 1368 09:47:18.426168     APIC: 06
 1369 09:47:18.429142     APIC: 04
 1370 09:47:18.429215     APIC: 05
 1371 09:47:18.432768    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1372 09:47:18.442438    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1373 09:47:18.455781    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1374 09:47:18.455872     PCI: 00:00.0
 1375 09:47:18.465443     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1376 09:47:18.475363     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1377 09:47:18.485490     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1378 09:47:18.492264     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1379 09:47:18.501764     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1380 09:47:18.511573     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1381 09:47:18.522015     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1382 09:47:18.531542     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1383 09:47:18.541695     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1384 09:47:18.548160     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1385 09:47:18.558164     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1386 09:47:18.567826     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1387 09:47:18.577639     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1388 09:47:18.587851     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1389 09:47:18.597836     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1390 09:47:18.607741     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1391 09:47:18.607826     PCI: 00:02.0
 1392 09:47:18.617683     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1393 09:47:18.627212     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1394 09:47:18.637073     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1395 09:47:18.640655     PCI: 00:04.0
 1396 09:47:18.640740     PCI: 00:08.0
 1397 09:47:18.650559     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1398 09:47:18.653776     PCI: 00:12.0
 1399 09:47:18.663925     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1400 09:47:18.667044     PCI: 00:14.0 child on link 0 USB0 port 0
 1401 09:47:18.677461     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1402 09:47:18.683455      USB0 port 0 child on link 0 USB2 port 0
 1403 09:47:18.683539       USB2 port 0
 1404 09:47:18.687107       USB2 port 1
 1405 09:47:18.687191       USB2 port 2
 1406 09:47:18.690299       USB2 port 3
 1407 09:47:18.690383       USB2 port 5
 1408 09:47:18.693496       USB2 port 6
 1409 09:47:18.693580       USB2 port 9
 1410 09:47:18.696747       USB3 port 0
 1411 09:47:18.700467       USB3 port 1
 1412 09:47:18.700552       USB3 port 2
 1413 09:47:18.703550       USB3 port 3
 1414 09:47:18.703634       USB3 port 4
 1415 09:47:18.707084     PCI: 00:14.2
 1416 09:47:18.716675     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1417 09:47:18.726761     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1418 09:47:18.726848     PCI: 00:14.3
 1419 09:47:18.736705     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1420 09:47:18.743264     PCI: 00:15.0 child on link 0 I2C: 01:15
 1421 09:47:18.753223     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1422 09:47:18.753308      I2C: 01:15
 1423 09:47:18.760117     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1424 09:47:18.769582     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1425 09:47:18.769667      I2C: 02:5d
 1426 09:47:18.773168      GENERIC: 0.0
 1427 09:47:18.773252     PCI: 00:16.0
 1428 09:47:18.782963     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1429 09:47:18.786146     PCI: 00:17.0
 1430 09:47:18.796313     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1431 09:47:18.806396     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1432 09:47:18.816038     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1433 09:47:18.826150     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1434 09:47:18.832469     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1435 09:47:18.842302     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1436 09:47:18.849291     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1437 09:47:18.858821     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1438 09:47:18.858907      I2C: 03:1a
 1439 09:47:18.862113      I2C: 03:38
 1440 09:47:18.862199      I2C: 03:39
 1441 09:47:18.865754      I2C: 03:3a
 1442 09:47:18.865839      I2C: 03:3b
 1443 09:47:18.868862     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1444 09:47:18.878756     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1445 09:47:18.888697     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1446 09:47:18.898441     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1447 09:47:18.902353      PCI: 01:00.0
 1448 09:47:18.912141      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1449 09:47:18.915266     PCI: 00:1e.0
 1450 09:47:18.925221     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1451 09:47:18.935190     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1452 09:47:18.938393     PCI: 00:1e.2 child on link 0 SPI: 00
 1453 09:47:18.948126     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1454 09:47:18.951501      SPI: 00
 1455 09:47:18.954645     PCI: 00:1e.3 child on link 0 SPI: 01
 1456 09:47:18.964679     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1457 09:47:18.967819      SPI: 01
 1458 09:47:18.971524     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1459 09:47:18.981218     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1460 09:47:18.988068     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1461 09:47:18.991216      PNP: 0c09.0
 1462 09:47:18.997671      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1463 09:47:19.001398     PCI: 00:1f.3
 1464 09:47:19.010969     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1465 09:47:19.020941     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1466 09:47:19.024313     PCI: 00:1f.4
 1467 09:47:19.031009     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1468 09:47:19.040615     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1469 09:47:19.044187     PCI: 00:1f.5
 1470 09:47:19.053943     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1471 09:47:19.057081  Done allocating resources.
 1472 09:47:19.063877  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1473 09:47:19.063965  Enabling resources...
 1474 09:47:19.071382  PCI: 00:00.0 subsystem <- 8086/9b61
 1475 09:47:19.071469  PCI: 00:00.0 cmd <- 06
 1476 09:47:19.074515  PCI: 00:02.0 subsystem <- 8086/9b41
 1477 09:47:19.077939  PCI: 00:02.0 cmd <- 03
 1478 09:47:19.081391  PCI: 00:08.0 cmd <- 06
 1479 09:47:19.084402  PCI: 00:12.0 subsystem <- 8086/02f9
 1480 09:47:19.087643  PCI: 00:12.0 cmd <- 02
 1481 09:47:19.091266  PCI: 00:14.0 subsystem <- 8086/02ed
 1482 09:47:19.094054  PCI: 00:14.0 cmd <- 02
 1483 09:47:19.097695  PCI: 00:14.2 cmd <- 02
 1484 09:47:19.100802  PCI: 00:14.3 subsystem <- 8086/02f0
 1485 09:47:19.104068  PCI: 00:14.3 cmd <- 02
 1486 09:47:19.107285  PCI: 00:15.0 subsystem <- 8086/02e8
 1487 09:47:19.107361  PCI: 00:15.0 cmd <- 02
 1488 09:47:19.114120  PCI: 00:15.1 subsystem <- 8086/02e9
 1489 09:47:19.114199  PCI: 00:15.1 cmd <- 02
 1490 09:47:19.117482  PCI: 00:16.0 subsystem <- 8086/02e0
 1491 09:47:19.120905  PCI: 00:16.0 cmd <- 02
 1492 09:47:19.124004  PCI: 00:17.0 subsystem <- 8086/02d3
 1493 09:47:19.127113  PCI: 00:17.0 cmd <- 03
 1494 09:47:19.130370  PCI: 00:19.0 subsystem <- 8086/02c5
 1495 09:47:19.133924  PCI: 00:19.0 cmd <- 02
 1496 09:47:19.137071  PCI: 00:1d.0 bridge ctrl <- 0013
 1497 09:47:19.140286  PCI: 00:1d.0 subsystem <- 8086/02b0
 1498 09:47:19.143916  PCI: 00:1d.0 cmd <- 06
 1499 09:47:19.147097  PCI: 00:1e.0 subsystem <- 8086/02a8
 1500 09:47:19.150579  PCI: 00:1e.0 cmd <- 06
 1501 09:47:19.153602  PCI: 00:1e.2 subsystem <- 8086/02aa
 1502 09:47:19.157091  PCI: 00:1e.2 cmd <- 06
 1503 09:47:19.160382  PCI: 00:1e.3 subsystem <- 8086/02ab
 1504 09:47:19.163623  PCI: 00:1e.3 cmd <- 02
 1505 09:47:19.166753  PCI: 00:1f.0 subsystem <- 8086/0284
 1506 09:47:19.170093  PCI: 00:1f.0 cmd <- 407
 1507 09:47:19.173619  PCI: 00:1f.3 subsystem <- 8086/02c8
 1508 09:47:19.173692  PCI: 00:1f.3 cmd <- 02
 1509 09:47:19.180155  PCI: 00:1f.4 subsystem <- 8086/02a3
 1510 09:47:19.180235  PCI: 00:1f.4 cmd <- 03
 1511 09:47:19.184025  PCI: 00:1f.5 subsystem <- 8086/02a4
 1512 09:47:19.186583  PCI: 00:1f.5 cmd <- 406
 1513 09:47:19.196239  PCI: 01:00.0 cmd <- 02
 1514 09:47:19.201558  done.
 1515 09:47:19.214930  ME: Version: 14.0.39.1367
 1516 09:47:19.221737  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
 1517 09:47:19.224923  Initializing devices...
 1518 09:47:19.225034  Root Device init ...
 1519 09:47:19.231771  Chrome EC: Set SMI mask to 0x0000000000000000
 1520 09:47:19.235033  Chrome EC: clear events_b mask to 0x0000000000000000
 1521 09:47:19.241879  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1522 09:47:19.248243  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1523 09:47:19.254860  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1524 09:47:19.258035  Chrome EC: Set WAKE mask to 0x0000000000000000
 1525 09:47:19.261352  Root Device init finished in 35178 usecs
 1526 09:47:19.265014  CPU_CLUSTER: 0 init ...
 1527 09:47:19.271916  CPU_CLUSTER: 0 init finished in 2448 usecs
 1528 09:47:19.275997  PCI: 00:00.0 init ...
 1529 09:47:19.279098  CPU TDP: 15 Watts
 1530 09:47:19.282223  CPU PL2 = 64 Watts
 1531 09:47:19.285858  PCI: 00:00.0 init finished in 7078 usecs
 1532 09:47:19.289820  PCI: 00:02.0 init ...
 1533 09:47:19.292332  PCI: 00:02.0 init finished in 2254 usecs
 1534 09:47:19.295607  PCI: 00:08.0 init ...
 1535 09:47:19.299179  PCI: 00:08.0 init finished in 2253 usecs
 1536 09:47:19.302464  PCI: 00:12.0 init ...
 1537 09:47:19.305719  PCI: 00:12.0 init finished in 2253 usecs
 1538 09:47:19.309312  PCI: 00:14.0 init ...
 1539 09:47:19.312183  PCI: 00:14.0 init finished in 2254 usecs
 1540 09:47:19.315318  PCI: 00:14.2 init ...
 1541 09:47:19.319119  PCI: 00:14.2 init finished in 2254 usecs
 1542 09:47:19.322026  PCI: 00:14.3 init ...
 1543 09:47:19.325736  PCI: 00:14.3 init finished in 2261 usecs
 1544 09:47:19.328771  PCI: 00:15.0 init ...
 1545 09:47:19.332011  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1546 09:47:19.335245  PCI: 00:15.0 init finished in 5974 usecs
 1547 09:47:19.338839  PCI: 00:15.1 init ...
 1548 09:47:19.342071  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1549 09:47:19.348853  PCI: 00:15.1 init finished in 5980 usecs
 1550 09:47:19.348939  PCI: 00:16.0 init ...
 1551 09:47:19.354905  PCI: 00:16.0 init finished in 2245 usecs
 1552 09:47:19.358459  PCI: 00:19.0 init ...
 1553 09:47:19.361702  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1554 09:47:19.365354  PCI: 00:19.0 init finished in 5979 usecs
 1555 09:47:19.368514  PCI: 00:1d.0 init ...
 1556 09:47:19.371618  Initializing PCH PCIe bridge.
 1557 09:47:19.375290  PCI: 00:1d.0 init finished in 5288 usecs
 1558 09:47:19.378662  PCI: 00:1f.0 init ...
 1559 09:47:19.381571  IOAPIC: Initializing IOAPIC at 0xfec00000
 1560 09:47:19.388272  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1561 09:47:19.388358  IOAPIC: ID = 0x02
 1562 09:47:19.391817  IOAPIC: Dumping registers
 1563 09:47:19.394869    reg 0x0000: 0x02000000
 1564 09:47:19.398060    reg 0x0001: 0x00770020
 1565 09:47:19.398147    reg 0x0002: 0x00000000
 1566 09:47:19.405069  PCI: 00:1f.0 init finished in 23545 usecs
 1567 09:47:19.408293  PCI: 00:1f.4 init ...
 1568 09:47:19.411447  PCI: 00:1f.4 init finished in 2264 usecs
 1569 09:47:19.422221  PCI: 01:00.0 init ...
 1570 09:47:19.425576  PCI: 01:00.0 init finished in 2253 usecs
 1571 09:47:19.429815  PNP: 0c09.0 init ...
 1572 09:47:19.433082  Google Chrome EC uptime: 11.098 seconds
 1573 09:47:19.439514  Google Chrome AP resets since EC boot: 0
 1574 09:47:19.442949  Google Chrome most recent AP reset causes:
 1575 09:47:19.449288  Google Chrome EC reset flags at last EC boot: reset-pin
 1576 09:47:19.452898  PNP: 0c09.0 init finished in 20578 usecs
 1577 09:47:19.456293  Devices initialized
 1578 09:47:19.459033  Show all devs... After init.
 1579 09:47:19.459121  Root Device: enabled 1
 1580 09:47:19.462553  CPU_CLUSTER: 0: enabled 1
 1581 09:47:19.465795  DOMAIN: 0000: enabled 1
 1582 09:47:19.465883  APIC: 00: enabled 1
 1583 09:47:19.469113  PCI: 00:00.0: enabled 1
 1584 09:47:19.472677  PCI: 00:02.0: enabled 1
 1585 09:47:19.475828  PCI: 00:04.0: enabled 0
 1586 09:47:19.475915  PCI: 00:05.0: enabled 0
 1587 09:47:19.479065  PCI: 00:12.0: enabled 1
 1588 09:47:19.482171  PCI: 00:12.5: enabled 0
 1589 09:47:19.485652  PCI: 00:12.6: enabled 0
 1590 09:47:19.485738  PCI: 00:14.0: enabled 1
 1591 09:47:19.488760  PCI: 00:14.1: enabled 0
 1592 09:47:19.492300  PCI: 00:14.3: enabled 1
 1593 09:47:19.495510  PCI: 00:14.5: enabled 0
 1594 09:47:19.495596  PCI: 00:15.0: enabled 1
 1595 09:47:19.499163  PCI: 00:15.1: enabled 1
 1596 09:47:19.502376  PCI: 00:15.2: enabled 0
 1597 09:47:19.502462  PCI: 00:15.3: enabled 0
 1598 09:47:19.505629  PCI: 00:16.0: enabled 1
 1599 09:47:19.508778  PCI: 00:16.1: enabled 0
 1600 09:47:19.512027  PCI: 00:16.2: enabled 0
 1601 09:47:19.512113  PCI: 00:16.3: enabled 0
 1602 09:47:19.515648  PCI: 00:16.4: enabled 0
 1603 09:47:19.518989  PCI: 00:16.5: enabled 0
 1604 09:47:19.522077  PCI: 00:17.0: enabled 1
 1605 09:47:19.522163  PCI: 00:19.0: enabled 1
 1606 09:47:19.525093  PCI: 00:19.1: enabled 0
 1607 09:47:19.528669  PCI: 00:19.2: enabled 0
 1608 09:47:19.531636  PCI: 00:1a.0: enabled 0
 1609 09:47:19.531722  PCI: 00:1c.0: enabled 0
 1610 09:47:19.535310  PCI: 00:1c.1: enabled 0
 1611 09:47:19.538534  PCI: 00:1c.2: enabled 0
 1612 09:47:19.541589  PCI: 00:1c.3: enabled 0
 1613 09:47:19.541675  PCI: 00:1c.4: enabled 0
 1614 09:47:19.544822  PCI: 00:1c.5: enabled 0
 1615 09:47:19.548589  PCI: 00:1c.6: enabled 0
 1616 09:47:19.548677  PCI: 00:1c.7: enabled 0
 1617 09:47:19.551883  PCI: 00:1d.0: enabled 1
 1618 09:47:19.554810  PCI: 00:1d.1: enabled 0
 1619 09:47:19.558472  PCI: 00:1d.2: enabled 0
 1620 09:47:19.558558  PCI: 00:1d.3: enabled 0
 1621 09:47:19.561499  PCI: 00:1d.4: enabled 0
 1622 09:47:19.565246  PCI: 00:1d.5: enabled 0
 1623 09:47:19.568532  PCI: 00:1e.0: enabled 1
 1624 09:47:19.568618  PCI: 00:1e.1: enabled 0
 1625 09:47:19.571700  PCI: 00:1e.2: enabled 1
 1626 09:47:19.574757  PCI: 00:1e.3: enabled 1
 1627 09:47:19.577947  PCI: 00:1f.0: enabled 1
 1628 09:47:19.578033  PCI: 00:1f.1: enabled 0
 1629 09:47:19.581660  PCI: 00:1f.2: enabled 0
 1630 09:47:19.584670  PCI: 00:1f.3: enabled 1
 1631 09:47:19.584755  PCI: 00:1f.4: enabled 1
 1632 09:47:19.588145  PCI: 00:1f.5: enabled 1
 1633 09:47:19.591400  PCI: 00:1f.6: enabled 0
 1634 09:47:19.595025  USB0 port 0: enabled 1
 1635 09:47:19.595110  I2C: 01:15: enabled 1
 1636 09:47:19.597827  I2C: 02:5d: enabled 1
 1637 09:47:19.601589  GENERIC: 0.0: enabled 1
 1638 09:47:19.601677  I2C: 03:1a: enabled 1
 1639 09:47:19.604876  I2C: 03:38: enabled 1
 1640 09:47:19.608045  I2C: 03:39: enabled 1
 1641 09:47:19.608130  I2C: 03:3a: enabled 1
 1642 09:47:19.611264  I2C: 03:3b: enabled 1
 1643 09:47:19.614590  PCI: 00:00.0: enabled 1
 1644 09:47:19.614675  SPI: 00: enabled 1
 1645 09:47:19.617705  SPI: 01: enabled 1
 1646 09:47:19.621334  PNP: 0c09.0: enabled 1
 1647 09:47:19.621420  USB2 port 0: enabled 1
 1648 09:47:19.624576  USB2 port 1: enabled 1
 1649 09:47:19.627854  USB2 port 2: enabled 0
 1650 09:47:19.631323  USB2 port 3: enabled 0
 1651 09:47:19.631408  USB2 port 5: enabled 0
 1652 09:47:19.634383  USB2 port 6: enabled 1
 1653 09:47:19.637673  USB2 port 9: enabled 1
 1654 09:47:19.637758  USB3 port 0: enabled 1
 1655 09:47:19.640860  USB3 port 1: enabled 1
 1656 09:47:19.644105  USB3 port 2: enabled 1
 1657 09:47:19.647816  USB3 port 3: enabled 1
 1658 09:47:19.647901  USB3 port 4: enabled 0
 1659 09:47:19.650799  APIC: 03: enabled 1
 1660 09:47:19.650885  APIC: 07: enabled 1
 1661 09:47:19.654032  APIC: 01: enabled 1
 1662 09:47:19.657571  APIC: 02: enabled 1
 1663 09:47:19.657658  APIC: 06: enabled 1
 1664 09:47:19.660669  APIC: 04: enabled 1
 1665 09:47:19.664191  APIC: 05: enabled 1
 1666 09:47:19.664277  PCI: 00:08.0: enabled 1
 1667 09:47:19.667574  PCI: 00:14.2: enabled 1
 1668 09:47:19.670923  PCI: 01:00.0: enabled 1
 1669 09:47:19.674156  Disabling ACPI via APMC:
 1670 09:47:19.677801  done.
 1671 09:47:19.680908  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1672 09:47:19.684197  ELOG: NV offset 0xaf0000 size 0x4000
 1673 09:47:19.691402  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1674 09:47:19.697793  ELOG: Event(17) added with size 13 at 2022-08-12 09:47:15 UTC
 1675 09:47:19.704580  ELOG: Event(92) added with size 9 at 2022-08-12 09:47:15 UTC
 1676 09:47:19.710995  ELOG: Event(93) added with size 9 at 2022-08-12 09:47:15 UTC
 1677 09:47:19.717914  ELOG: Event(9A) added with size 9 at 2022-08-12 09:47:15 UTC
 1678 09:47:19.724316  ELOG: Event(9E) added with size 10 at 2022-08-12 09:47:15 UTC
 1679 09:47:19.731179  ELOG: Event(9F) added with size 14 at 2022-08-12 09:47:15 UTC
 1680 09:47:19.734178  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
 1681 09:47:19.741501  ELOG: Event(A1) added with size 10 at 2022-08-12 09:47:15 UTC
 1682 09:47:19.751641  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1683 09:47:19.758500  ELOG: Event(A0) added with size 9 at 2022-08-12 09:47:15 UTC
 1684 09:47:19.761647  elog_add_boot_reason: Logged dev mode boot
 1685 09:47:19.761733  Finalize devices...
 1686 09:47:19.764646  PCI: 00:17.0 final
 1687 09:47:19.768142  Devices finalized
 1688 09:47:19.771463  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1689 09:47:19.778263  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1690 09:47:19.781356  ME: HFSTS1                  : 0x90000245
 1691 09:47:19.784577  ME: HFSTS2                  : 0x3B850126
 1692 09:47:19.791430  ME: HFSTS3                  : 0x00000020
 1693 09:47:19.794549  ME: HFSTS4                  : 0x00004800
 1694 09:47:19.798068  ME: HFSTS5                  : 0x00000000
 1695 09:47:19.801236  ME: HFSTS6                  : 0x40400006
 1696 09:47:19.804446  ME: Manufacturing Mode      : NO
 1697 09:47:19.807771  ME: FW Partition Table      : OK
 1698 09:47:19.811286  ME: Bringup Loader Failure  : NO
 1699 09:47:19.814572  ME: Firmware Init Complete  : YES
 1700 09:47:19.817750  ME: Boot Options Present    : NO
 1701 09:47:19.821315  ME: Update In Progress      : NO
 1702 09:47:19.824557  ME: D0i3 Support            : YES
 1703 09:47:19.827673  ME: Low Power State Enabled : NO
 1704 09:47:19.831269  ME: CPU Replaced            : NO
 1705 09:47:19.834509  ME: CPU Replacement Valid   : YES
 1706 09:47:19.838079  ME: Current Working State   : 5
 1707 09:47:19.841098  ME: Current Operation State : 1
 1708 09:47:19.844186  ME: Current Operation Mode  : 0
 1709 09:47:19.847411  ME: Error Code              : 0
 1710 09:47:19.851134  ME: CPU Debug Disabled      : YES
 1711 09:47:19.854324  ME: TXT Support             : NO
 1712 09:47:19.860733  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1713 09:47:19.867362  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1714 09:47:19.867448  CBFS @ c08000 size 3f8000
 1715 09:47:19.874087  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1716 09:47:19.877281  CBFS: Locating 'fallback/dsdt.aml'
 1717 09:47:19.880422  CBFS: Found @ offset 10bb80 size 3fa5
 1718 09:47:19.887269  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1719 09:47:19.890455  CBFS @ c08000 size 3f8000
 1720 09:47:19.893551  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1721 09:47:19.897138  CBFS: Locating 'fallback/slic'
 1722 09:47:19.902244  CBFS: 'fallback/slic' not found.
 1723 09:47:19.908597  ACPI: Writing ACPI tables at 99b3e000.
 1724 09:47:19.908683  ACPI:    * FACS
 1725 09:47:19.912521  ACPI:    * DSDT
 1726 09:47:19.915581  Ramoops buffer: 0x100000@0x99a3d000.
 1727 09:47:19.918856  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1728 09:47:19.925349  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1729 09:47:19.928576  Google Chrome EC: version:
 1730 09:47:19.931997  	ro: helios_v2.0.2659-56403530b
 1731 09:47:19.935204  	rw: helios_v2.0.2849-c41de27e7d
 1732 09:47:19.935289    running image: 1
 1733 09:47:19.939728  ACPI:    * FADT
 1734 09:47:19.939813  SCI is IRQ9
 1735 09:47:19.945901  ACPI: added table 1/32, length now 40
 1736 09:47:19.945986  ACPI:     * SSDT
 1737 09:47:19.949559  Found 1 CPU(s) with 8 core(s) each.
 1738 09:47:19.952659  Error: Could not locate 'wifi_sar' in VPD.
 1739 09:47:19.959616  Checking CBFS for default SAR values
 1740 09:47:19.962672  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1741 09:47:19.966272  CBFS @ c08000 size 3f8000
 1742 09:47:19.972573  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1743 09:47:19.975746  CBFS: Locating 'wifi_sar_defaults.hex'
 1744 09:47:19.979688  CBFS: Found @ offset 5fac0 size 77
 1745 09:47:19.982614  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1746 09:47:19.989061  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1747 09:47:19.992185  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1748 09:47:19.998860  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1749 09:47:20.002090  failed to find key in VPD: dsm_calib_r0_0
 1750 09:47:20.012216  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1751 09:47:20.015420  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1752 09:47:20.018612  failed to find key in VPD: dsm_calib_r0_1
 1753 09:47:20.028831  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1754 09:47:20.035531  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1755 09:47:20.038653  failed to find key in VPD: dsm_calib_r0_2
 1756 09:47:20.048577  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1757 09:47:20.051790  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1758 09:47:20.058550  failed to find key in VPD: dsm_calib_r0_3
 1759 09:47:20.065249  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1760 09:47:20.071846  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1761 09:47:20.075256  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1762 09:47:20.078559  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1763 09:47:20.082282  EC returned error result code 1
 1764 09:47:20.085973  EC returned error result code 1
 1765 09:47:20.089685  EC returned error result code 1
 1766 09:47:20.096494  PS2K: Bad resp from EC. Vivaldi disabled!
 1767 09:47:20.099657  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1768 09:47:20.106296  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1769 09:47:20.113157  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1770 09:47:20.116390  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1771 09:47:20.122733  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1772 09:47:20.129618  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1773 09:47:20.135886  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1774 09:47:20.139607  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1775 09:47:20.145688  ACPI: added table 2/32, length now 44
 1776 09:47:20.145773  ACPI:    * MCFG
 1777 09:47:20.149367  ACPI: added table 3/32, length now 48
 1778 09:47:20.152627  ACPI:    * TPM2
 1779 09:47:20.155616  TPM2 log created at 99a2d000
 1780 09:47:20.159418  ACPI: added table 4/32, length now 52
 1781 09:47:20.159503  ACPI:    * MADT
 1782 09:47:20.162410  SCI is IRQ9
 1783 09:47:20.165692  ACPI: added table 5/32, length now 56
 1784 09:47:20.165778  current = 99b43ac0
 1785 09:47:20.168911  ACPI:    * DMAR
 1786 09:47:20.172541  ACPI: added table 6/32, length now 60
 1787 09:47:20.175848  ACPI:    * IGD OpRegion
 1788 09:47:20.175935  GMA: Found VBT in CBFS
 1789 09:47:20.178926  GMA: Found valid VBT in CBFS
 1790 09:47:20.182124  ACPI: added table 7/32, length now 64
 1791 09:47:20.185706  ACPI:    * HPET
 1792 09:47:20.188840  ACPI: added table 8/32, length now 68
 1793 09:47:20.192062  ACPI: done.
 1794 09:47:20.192148  ACPI tables: 31744 bytes.
 1795 09:47:20.196357  smbios_write_tables: 99a2c000
 1796 09:47:20.199402  EC returned error result code 3
 1797 09:47:20.202558  Couldn't obtain OEM name from CBI
 1798 09:47:20.206286  Create SMBIOS type 17
 1799 09:47:20.209378  PCI: 00:00.0 (Intel Cannonlake)
 1800 09:47:20.212797  PCI: 00:14.3 (Intel WiFi)
 1801 09:47:20.215717  SMBIOS tables: 939 bytes.
 1802 09:47:20.219335  Writing table forward entry at 0x00000500
 1803 09:47:20.225767  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1804 09:47:20.229044  Writing coreboot table at 0x99b62000
 1805 09:47:20.235846   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1806 09:47:20.238779   1. 0000000000001000-000000000009ffff: RAM
 1807 09:47:20.242513   2. 00000000000a0000-00000000000fffff: RESERVED
 1808 09:47:20.248737   3. 0000000000100000-0000000099a2bfff: RAM
 1809 09:47:20.255532   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1810 09:47:20.258652   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1811 09:47:20.265070   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1812 09:47:20.268825   7. 000000009a000000-000000009f7fffff: RESERVED
 1813 09:47:20.275340   8. 00000000e0000000-00000000efffffff: RESERVED
 1814 09:47:20.278491   9. 00000000fc000000-00000000fc000fff: RESERVED
 1815 09:47:20.284886  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1816 09:47:20.288569  11. 00000000fed10000-00000000fed17fff: RESERVED
 1817 09:47:20.291729  12. 00000000fed80000-00000000fed83fff: RESERVED
 1818 09:47:20.298068  13. 00000000fed90000-00000000fed91fff: RESERVED
 1819 09:47:20.302160  14. 00000000feda0000-00000000feda1fff: RESERVED
 1820 09:47:20.308142  15. 0000000100000000-000000045e7fffff: RAM
 1821 09:47:20.311613  Graphics framebuffer located at 0xc0000000
 1822 09:47:20.314838  Passing 5 GPIOs to payload:
 1823 09:47:20.318046              NAME |       PORT | POLARITY |     VALUE
 1824 09:47:20.324381     write protect |  undefined |     high |       low
 1825 09:47:20.331184               lid |  undefined |     high |      high
 1826 09:47:20.334485             power |  undefined |     high |       low
 1827 09:47:20.341063             oprom |  undefined |     high |       low
 1828 09:47:20.344277          EC in RW | 0x000000cb |     high |       low
 1829 09:47:20.347836  Board ID: 4
 1830 09:47:20.351018  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1831 09:47:20.354178  CBFS @ c08000 size 3f8000
 1832 09:47:20.361094  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1833 09:47:20.367487  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6b8a
 1834 09:47:20.370525  coreboot table: 1492 bytes.
 1835 09:47:20.374049  IMD ROOT    0. 99fff000 00001000
 1836 09:47:20.377579  IMD SMALL   1. 99ffe000 00001000
 1837 09:47:20.380883  FSP MEMORY  2. 99c4e000 003b0000
 1838 09:47:20.384333  CONSOLE     3. 99c2e000 00020000
 1839 09:47:20.387143  FMAP        4. 99c2d000 0000054e
 1840 09:47:20.390836  TIME STAMP  5. 99c2c000 00000910
 1841 09:47:20.393973  VBOOT WORK  6. 99c18000 00014000
 1842 09:47:20.397258  MRC DATA    7. 99c16000 00001958
 1843 09:47:20.400525  ROMSTG STCK 8. 99c15000 00001000
 1844 09:47:20.404420  AFTER CAR   9. 99c0b000 0000a000
 1845 09:47:20.407157  RAMSTAGE   10. 99baf000 0005c000
 1846 09:47:20.410783  REFCODE    11. 99b7a000 00035000
 1847 09:47:20.413717  SMM BACKUP 12. 99b6a000 00010000
 1848 09:47:20.417502  COREBOOT   13. 99b62000 00008000
 1849 09:47:20.420188  ACPI       14. 99b3e000 00024000
 1850 09:47:20.423501  ACPI GNVS  15. 99b3d000 00001000
 1851 09:47:20.427176  RAMOOPS    16. 99a3d000 00100000
 1852 09:47:20.430381  TPM2 TCGLOG17. 99a2d000 00010000
 1853 09:47:20.433564  SMBIOS     18. 99a2c000 00000800
 1854 09:47:20.433650  IMD small region:
 1855 09:47:20.437286    IMD ROOT    0. 99ffec00 00000400
 1856 09:47:20.440565    FSP RUNTIME 1. 99ffebe0 00000004
 1857 09:47:20.443588    EC HOSTEVENT 2. 99ffebc0 00000008
 1858 09:47:20.446747    POWER STATE 3. 99ffeb80 00000040
 1859 09:47:20.453540    ROMSTAGE    4. 99ffeb60 00000004
 1860 09:47:20.456658    MEM INFO    5. 99ffe9a0 000001b9
 1861 09:47:20.460328    VPD         6. 99ffe940 0000004c
 1862 09:47:20.463598  MTRR: Physical address space:
 1863 09:47:20.466745  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1864 09:47:20.473637  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1865 09:47:20.480231  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1866 09:47:20.486514  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1867 09:47:20.493197  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1868 09:47:20.500108  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1869 09:47:20.506306  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1870 09:47:20.509811  MTRR: Fixed MSR 0x250 0x0606060606060606
 1871 09:47:20.513425  MTRR: Fixed MSR 0x258 0x0606060606060606
 1872 09:47:20.519743  MTRR: Fixed MSR 0x259 0x0000000000000000
 1873 09:47:20.522903  MTRR: Fixed MSR 0x268 0x0606060606060606
 1874 09:47:20.526135  MTRR: Fixed MSR 0x269 0x0606060606060606
 1875 09:47:20.529850  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1876 09:47:20.533098  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1877 09:47:20.539454  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1878 09:47:20.542569  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1879 09:47:20.546078  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1880 09:47:20.549212  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1881 09:47:20.553198  call enable_fixed_mtrr()
 1882 09:47:20.556896  CPU physical address size: 39 bits
 1883 09:47:20.563184  MTRR: default type WB/UC MTRR counts: 6/8.
 1884 09:47:20.566615  MTRR: WB selected as default type.
 1885 09:47:20.573077  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1886 09:47:20.576226  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1887 09:47:20.583185  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1888 09:47:20.589496  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1889 09:47:20.596048  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1890 09:47:20.602939  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1891 09:47:20.609492  MTRR: Fixed MSR 0x250 0x0606060606060606
 1892 09:47:20.612954  MTRR: Fixed MSR 0x258 0x0606060606060606
 1893 09:47:20.616298  MTRR: Fixed MSR 0x259 0x0000000000000000
 1894 09:47:20.619334  MTRR: Fixed MSR 0x268 0x0606060606060606
 1895 09:47:20.622524  MTRR: Fixed MSR 0x269 0x0606060606060606
 1896 09:47:20.629115  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1897 09:47:20.632254  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1898 09:47:20.635967  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1899 09:47:20.639352  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1900 09:47:20.645627  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1901 09:47:20.649092  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1902 09:47:20.649183  
 1903 09:47:20.649254  MTRR check
 1904 09:47:20.652248  Fixed MTRRs   : Enabled
 1905 09:47:20.655840  Variable MTRRs: Enabled
 1906 09:47:20.655926  
 1907 09:47:20.659113  call enable_fixed_mtrr()
 1908 09:47:20.662252  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1909 09:47:20.665350  CPU physical address size: 39 bits
 1910 09:47:20.672092  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1911 09:47:20.675459  MTRR: Fixed MSR 0x250 0x0606060606060606
 1912 09:47:20.682164  MTRR: Fixed MSR 0x258 0x0606060606060606
 1913 09:47:20.685117  MTRR: Fixed MSR 0x259 0x0000000000000000
 1914 09:47:20.688636  MTRR: Fixed MSR 0x268 0x0606060606060606
 1915 09:47:20.691833  MTRR: Fixed MSR 0x269 0x0606060606060606
 1916 09:47:20.695087  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1917 09:47:20.702056  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1918 09:47:20.705127  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1919 09:47:20.708966  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1920 09:47:20.711629  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1921 09:47:20.718401  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1922 09:47:20.721440  MTRR: Fixed MSR 0x250 0x0606060606060606
 1923 09:47:20.725202  call enable_fixed_mtrr()
 1924 09:47:20.728453  MTRR: Fixed MSR 0x258 0x0606060606060606
 1925 09:47:20.731700  MTRR: Fixed MSR 0x259 0x0000000000000000
 1926 09:47:20.738097  MTRR: Fixed MSR 0x268 0x0606060606060606
 1927 09:47:20.741327  MTRR: Fixed MSR 0x269 0x0606060606060606
 1928 09:47:20.744593  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1929 09:47:20.747767  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1930 09:47:20.754530  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1931 09:47:20.757656  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1932 09:47:20.760890  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1933 09:47:20.764569  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1934 09:47:20.768285  CPU physical address size: 39 bits
 1935 09:47:20.771252  call enable_fixed_mtrr()
 1936 09:47:20.778010  MTRR: Fixed MSR 0x250 0x0606060606060606
 1937 09:47:20.781208  MTRR: Fixed MSR 0x258 0x0606060606060606
 1938 09:47:20.784279  MTRR: Fixed MSR 0x259 0x0000000000000000
 1939 09:47:20.787701  MTRR: Fixed MSR 0x268 0x0606060606060606
 1940 09:47:20.790940  MTRR: Fixed MSR 0x269 0x0606060606060606
 1941 09:47:20.797372  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1942 09:47:20.801136  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1943 09:47:20.804337  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1944 09:47:20.807619  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1945 09:47:20.814218  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1946 09:47:20.817613  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1947 09:47:20.820766  MTRR: Fixed MSR 0x250 0x0606060606060606
 1948 09:47:20.823896  call enable_fixed_mtrr()
 1949 09:47:20.827124  MTRR: Fixed MSR 0x258 0x0606060606060606
 1950 09:47:20.830896  MTRR: Fixed MSR 0x259 0x0000000000000000
 1951 09:47:20.837278  MTRR: Fixed MSR 0x268 0x0606060606060606
 1952 09:47:20.840470  MTRR: Fixed MSR 0x269 0x0606060606060606
 1953 09:47:20.843771  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1954 09:47:20.847143  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1955 09:47:20.853751  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1956 09:47:20.857283  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1957 09:47:20.860386  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1958 09:47:20.863616  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1959 09:47:20.870536  CPU physical address size: 39 bits
 1960 09:47:20.870621  call enable_fixed_mtrr()
 1961 09:47:20.873785  CBFS @ c08000 size 3f8000
 1962 09:47:20.880486  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1963 09:47:20.883659  CBFS: Locating 'fallback/payload'
 1964 09:47:20.886700  MTRR: Fixed MSR 0x250 0x0606060606060606
 1965 09:47:20.890130  MTRR: Fixed MSR 0x258 0x0606060606060606
 1966 09:47:20.896395  MTRR: Fixed MSR 0x259 0x0000000000000000
 1967 09:47:20.900063  MTRR: Fixed MSR 0x268 0x0606060606060606
 1968 09:47:20.903182  MTRR: Fixed MSR 0x269 0x0606060606060606
 1969 09:47:20.906426  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1970 09:47:20.913310  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1971 09:47:20.916406  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1972 09:47:20.919547  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1973 09:47:20.923029  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1974 09:47:20.929331  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1975 09:47:20.933081  MTRR: Fixed MSR 0x250 0x0606060606060606
 1976 09:47:20.936238  call enable_fixed_mtrr()
 1977 09:47:20.939536  MTRR: Fixed MSR 0x258 0x0606060606060606
 1978 09:47:20.942637  MTRR: Fixed MSR 0x259 0x0000000000000000
 1979 09:47:20.945940  MTRR: Fixed MSR 0x268 0x0606060606060606
 1980 09:47:20.952661  MTRR: Fixed MSR 0x269 0x0606060606060606
 1981 09:47:20.955845  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1982 09:47:20.959476  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1983 09:47:20.962594  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1984 09:47:20.969124  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1985 09:47:20.972653  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1986 09:47:20.975844  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1987 09:47:20.978911  CPU physical address size: 39 bits
 1988 09:47:20.982598  call enable_fixed_mtrr()
 1989 09:47:20.986235  CPU physical address size: 39 bits
 1990 09:47:20.989208  CBFS: Found @ offset 1c96c0 size 3f798
 1991 09:47:20.992673  CPU physical address size: 39 bits
 1992 09:47:20.995946  CPU physical address size: 39 bits
 1993 09:47:21.002765  Checking segment from ROM address 0xffdd16f8
 1994 09:47:21.005795  Checking segment from ROM address 0xffdd1714
 1995 09:47:21.008982  Loading segment from ROM address 0xffdd16f8
 1996 09:47:21.012748    code (compression=0)
 1997 09:47:21.022541    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 1998 09:47:21.029259  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 1999 09:47:21.032424  it's not compressed!
 2000 09:47:21.124060  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2001 09:47:21.131156  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2002 09:47:21.134246  Loading segment from ROM address 0xffdd1714
 2003 09:47:21.137549    Entry Point 0x30000000
 2004 09:47:21.140725  Loaded segments
 2005 09:47:21.146717  Finalizing chipset.
 2006 09:47:21.149784  Finalizing SMM.
 2007 09:47:21.152850  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 2008 09:47:21.156564  mp_park_aps done after 0 msecs.
 2009 09:47:21.162823  Jumping to boot code at 30000000(99b62000)
 2010 09:47:21.169599  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2011 09:47:21.169679  
 2012 09:47:21.172637  Starting depthcharge on Helios...
 2013 09:47:21.173019  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 2014 09:47:21.173127  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2015 09:47:21.173216  Setting prompt string to ['hatch:']
 2016 09:47:21.173307  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 2017 09:47:21.182461  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2018 09:47:21.189291  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2019 09:47:21.195934  board_setup: Info: eMMC controller not present; skipping
 2020 09:47:21.199196  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2021 09:47:21.205741  board_setup: Info: SDHCI controller not present; skipping
 2022 09:47:21.212507  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2023 09:47:21.212594  Wipe memory regions:
 2024 09:47:21.215888  	[0x00000000001000, 0x000000000a0000)
 2025 09:47:21.222332  	[0x00000000100000, 0x00000030000000)
 2026 09:47:21.288698  	[0x00000030657430, 0x00000099a2c000)
 2027 09:47:21.428915  	[0x00000100000000, 0x0000045e800000)
 2028 09:47:22.811226  R8152: Initializing
 2029 09:47:22.814437  Version 9 (ocp_data = 6010)
 2030 09:47:22.818714  R8152: Done initializing
 2031 09:47:22.821755  Adding net device
 2032 09:47:23.319141  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2033 09:47:23.319278  
 2034 09:47:23.319569  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2036 09:47:23.420285  hatch: tftpboot 192.168.201.1 7022974/tftp-deploy-h3ggnhma/kernel/bzImage 7022974/tftp-deploy-h3ggnhma/kernel/cmdline 7022974/tftp-deploy-h3ggnhma/ramdisk/ramdisk.cpio.gz
 2037 09:47:23.420440  Setting prompt string to 'Starting kernel'
 2038 09:47:23.420529  Setting prompt string to ['Starting kernel']
 2039 09:47:23.420606  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2040 09:47:23.420687  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
 2041 09:47:23.424613  tftpboot 192.168.201.1 7022974/tftp-deploy-h3ggnhma/kernel/bzImoy-h3ggnhma/kernel/cmdline 7022974/tftp-deploy-h3ggnhma/ramdisk/ramdisk.cpio.gz
 2042 09:47:23.424699  Waiting for link
 2043 09:47:23.625773  done.
 2044 09:47:23.625915  MAC: f4:f5:e8:50:dc:f7
 2045 09:47:23.628887  Sending DHCP discover... done.
 2046 09:47:23.632094  Waiting for reply... done.
 2047 09:47:23.635783  Sending DHCP request... done.
 2048 09:47:23.638904  Waiting for reply... done.
 2049 09:47:23.641972  My ip is 192.168.201.10
 2050 09:47:23.645230  The DHCP server ip is 192.168.201.1
 2051 09:47:23.652423  TFTP server IP predefined by user: 192.168.201.1
 2052 09:47:23.658784  Bootfile predefined by user: 7022974/tftp-deploy-h3ggnhma/kernel/bzImage
 2053 09:47:23.662024  Sending tftp read request... done.
 2054 09:47:23.665139  Waiting for the transfer... 
 2055 09:47:23.917195  00000000 ################################################################
 2056 09:47:24.169024  00080000 ################################################################
 2057 09:47:24.409179  00100000 ################################################################
 2058 09:47:24.653668  00180000 ################################################################
 2059 09:47:24.893024  00200000 ################################################################
 2060 09:47:25.134285  00280000 ################################################################
 2061 09:47:25.389437  00300000 ################################################################
 2062 09:47:25.654382  00380000 ################################################################
 2063 09:47:25.920696  00400000 ################################################################
 2064 09:47:26.166106  00480000 ################################################################
 2065 09:47:26.424405  00500000 ################################################################
 2066 09:47:26.699302  00580000 ################################################################
 2067 09:47:26.956178  00600000 ################################################################ done.
 2068 09:47:26.959795  The bootfile was 6815632 bytes long.
 2069 09:47:26.962967  Sending tftp read request... done.
 2070 09:47:26.966221  Waiting for the transfer... 
 2071 09:47:27.281297  00000000 ################################################################
 2072 09:47:27.573644  00080000 ################################################################
 2073 09:47:27.823585  00100000 ################################################################
 2074 09:47:28.071269  00180000 ################################################################
 2075 09:47:28.300864  00200000 ################################################################
 2076 09:47:28.531015  00280000 ################################################################
 2077 09:47:28.806546  00300000 ################################################################
 2078 09:47:29.097499  00380000 ################################################################
 2079 09:47:29.392902  00400000 ################################################################
 2080 09:47:29.649072  00480000 ################################################################
 2081 09:47:29.784983  00500000 ############################# done.
 2082 09:47:29.788211  Sending tftp read request... done.
 2083 09:47:29.791730  Waiting for the transfer... 
 2084 09:47:29.791816  00000000 # done.
 2085 09:47:29.801501  Command line loaded dynamically from TFTP file: 7022974/tftp-deploy-h3ggnhma/kernel/cmdline
 2086 09:47:29.828022  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7022974/extract-nfsrootfs-r31_m2du,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2087 09:47:29.834449  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2088 09:47:29.840992  Shutting down all USB controllers.
 2089 09:47:29.841078  Removing current net device
 2090 09:47:29.844683  Finalizing coreboot
 2091 09:47:29.851317  Exiting depthcharge with code 4 at timestamp: 15946804
 2092 09:47:29.851403  
 2093 09:47:29.851472  Starting kernel ...
 2094 09:47:29.851536  
 2095 09:47:29.851833  end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
 2096 09:47:29.851933  start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
 2097 09:47:29.852009  Setting prompt string to ['Linux version [0-9]']
 2098 09:47:29.852081  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2099 09:47:29.852151  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
 2100 09:47:29.854513  
 2102 09:52:01.853044  end: 2.2.5 auto-login-action (duration 00:04:32) [common]
 2104 09:52:01.854239  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
 2106 09:52:01.855093  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2109 09:52:01.856635  end: 2 depthcharge-action (duration 00:05:00) [common]
 2111 09:52:01.857606  Cleaning after the job
 2112 09:52:01.857693  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022974/tftp-deploy-h3ggnhma/ramdisk
 2113 09:52:01.858168  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022974/tftp-deploy-h3ggnhma/kernel
 2114 09:52:01.858673  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022974/tftp-deploy-h3ggnhma/nfsrootfs
 2115 09:52:01.897872  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022974/tftp-deploy-h3ggnhma/modules
 2116 09:52:01.898182  start: 4.1 power-off (timeout 00:00:30) [common]
 2117 09:52:01.898342  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2118 09:52:01.917273  >> Command sent successfully.

 2119 09:52:01.919075  Returned 0 in 0 seconds
 2120 09:52:02.020305  end: 4.1 power-off (duration 00:00:00) [common]
 2122 09:52:02.021970  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2123 09:52:02.023167  Listened to connection for namespace 'common' for up to 1s
 2124 09:52:02.918097  Listened to connection for namespace 'common' for up to 1s
 2125 09:52:02.921688  Listened to connection for namespace 'common' for up to 1s
 2126 09:52:02.924519  Listened to connection for namespace 'common' for up to 1s
 2127 09:52:02.928198  Listened to connection for namespace 'common' for up to 1s
 2128 09:52:02.931541  Listened to connection for namespace 'common' for up to 1s
 2129 09:52:02.934762  Listened to connection for namespace 'common' for up to 1s
 2130 09:52:02.938162  Listened to connection for namespace 'common' for up to 1s
 2131 09:52:02.941413  Listened to connection for namespace 'common' for up to 1s
 2132 09:52:02.944564  Listened to connection for namespace 'common' for up to 1s
 2133 09:52:02.947999  Listened to connection for namespace 'common' for up to 1s
 2134 09:52:02.951457  Listened to connection for namespace 'common' for up to 1s
 2135 09:52:02.955129  Listened to connection for namespace 'common' for up to 1s
 2136 09:52:02.957919  Listened to connection for namespace 'common' for up to 1s
 2137 09:52:02.961497  Listened to connection for namespace 'common' for up to 1s
 2138 09:52:02.965142  Listened to connection for namespace 'common' for up to 1s
 2139 09:52:02.968575  Listened to connection for namespace 'common' for up to 1s
 2140 09:52:02.971683  Listened to connection for namespace 'common' for up to 1s
 2141 09:52:02.975356  Listened to connection for namespace 'common' for up to 1s
 2142 09:52:02.980905  Listened to connection for namespace 'common' for up to 1s
 2143 09:52:02.985401  Listened to connection for namespace 'common' for up to 1s
 2144 09:52:03.023093  Finalising connection for namespace 'common'
 2145 09:52:03.023798  Disconnecting from shell: Finalise
 2146 09:52:03.024257  
 2147 09:52:03.125918  end: 4.2 read-feedback (duration 00:00:01) [common]
 2148 09:52:03.126548  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7022974
 2149 09:52:03.336005  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7022974
 2150 09:52:03.336206  JobError: Your job cannot terminate cleanly.