Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 09:46:43.567141 lava-dispatcher, installed at version: 2022.06
2 09:46:43.567410 start: 0 validate
3 09:46:43.567574 Start time: 2022-08-12 09:46:43.567565+00:00 (UTC)
4 09:46:43.567759 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:46:43.567941 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220805.0%2Famd64%2Finitrd.cpio.gz exists
6 09:46:43.863163 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:46:43.863910 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:46:44.153996 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:46:44.154737 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220805.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 09:46:44.448507 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:46:44.449272 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 09:46:44.747886 validate duration: 1.18
14 09:46:44.748189 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:46:44.748302 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:46:44.748401 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:46:44.748509 Not decompressing ramdisk as can be used compressed.
18 09:46:44.748605 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220805.0/amd64/initrd.cpio.gz
19 09:46:44.748682 saving as /var/lib/lava/dispatcher/tmp/7022961/tftp-deploy-ml9iueij/ramdisk/initrd.cpio.gz
20 09:46:44.748752 total size: 5411079 (5MB)
21 09:46:44.749962 progress 0% (0MB)
22 09:46:44.751532 progress 5% (0MB)
23 09:46:44.752978 progress 10% (0MB)
24 09:46:44.754505 progress 15% (0MB)
25 09:46:44.756103 progress 20% (1MB)
26 09:46:44.757528 progress 25% (1MB)
27 09:46:44.758938 progress 30% (1MB)
28 09:46:44.760351 progress 35% (1MB)
29 09:46:44.761964 progress 40% (2MB)
30 09:46:44.763372 progress 45% (2MB)
31 09:46:44.764779 progress 50% (2MB)
32 09:46:44.766200 progress 55% (2MB)
33 09:46:44.767769 progress 60% (3MB)
34 09:46:44.769183 progress 65% (3MB)
35 09:46:44.770588 progress 70% (3MB)
36 09:46:44.772044 progress 75% (3MB)
37 09:46:44.773673 progress 80% (4MB)
38 09:46:44.775083 progress 85% (4MB)
39 09:46:44.776549 progress 90% (4MB)
40 09:46:44.778001 progress 95% (4MB)
41 09:46:44.779592 progress 100% (5MB)
42 09:46:44.779778 5MB downloaded in 0.03s (166.35MB/s)
43 09:46:44.779936 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:46:44.780200 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:46:44.780300 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:46:44.780397 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:46:44.780509 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 09:46:44.780585 saving as /var/lib/lava/dispatcher/tmp/7022961/tftp-deploy-ml9iueij/kernel/bzImage
50 09:46:44.780655 total size: 6815632 (6MB)
51 09:46:44.780723 No compression specified
52 09:46:46.787345 progress 0% (0MB)
53 09:46:46.792630 progress 5% (0MB)
54 09:46:46.794462 progress 10% (0MB)
55 09:46:46.796403 progress 15% (1MB)
56 09:46:46.798217 progress 20% (1MB)
57 09:46:46.799984 progress 25% (1MB)
58 09:46:46.801922 progress 30% (1MB)
59 09:46:46.803675 progress 35% (2MB)
60 09:46:46.805617 progress 40% (2MB)
61 09:46:46.807397 progress 45% (2MB)
62 09:46:46.809070 progress 50% (3MB)
63 09:46:46.811024 progress 55% (3MB)
64 09:46:46.812679 progress 60% (3MB)
65 09:46:46.814498 progress 65% (4MB)
66 09:46:46.816151 progress 70% (4MB)
67 09:46:46.817933 progress 75% (4MB)
68 09:46:46.819892 progress 80% (5MB)
69 09:46:46.821761 progress 85% (5MB)
70 09:46:46.823577 progress 90% (5MB)
71 09:46:46.825433 progress 95% (6MB)
72 09:46:46.827209 progress 100% (6MB)
73 09:46:46.827512 6MB downloaded in 2.05s (3.18MB/s)
74 09:46:46.827670 end: 1.2.1 http-download (duration 00:00:02) [common]
76 09:46:46.827923 end: 1.2 download-retry (duration 00:00:02) [common]
77 09:46:46.828018 start: 1.3 download-retry (timeout 00:09:58) [common]
78 09:46:46.828110 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 09:46:46.828221 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220805.0/amd64/full.rootfs.tar.xz
80 09:46:46.828293 saving as /var/lib/lava/dispatcher/tmp/7022961/tftp-deploy-ml9iueij/nfsrootfs/full.rootfs.tar
81 09:46:46.828397 total size: 122705212 (117MB)
82 09:46:46.828462 Using unxz to decompress xz
83 09:46:46.831953 progress 0% (0MB)
84 09:46:47.321058 progress 5% (5MB)
85 09:46:47.819798 progress 10% (11MB)
86 09:46:48.317445 progress 15% (17MB)
87 09:46:48.822710 progress 20% (23MB)
88 09:46:49.173337 progress 25% (29MB)
89 09:46:49.546918 progress 30% (35MB)
90 09:46:49.804164 progress 35% (40MB)
91 09:46:50.035876 progress 40% (46MB)
92 09:46:50.417301 progress 45% (52MB)
93 09:46:50.809521 progress 50% (58MB)
94 09:46:51.175650 progress 55% (64MB)
95 09:46:51.554656 progress 60% (70MB)
96 09:46:51.915581 progress 65% (76MB)
97 09:46:52.335401 progress 70% (81MB)
98 09:46:52.783370 progress 75% (87MB)
99 09:46:53.240602 progress 80% (93MB)
100 09:46:53.367564 progress 85% (99MB)
101 09:46:53.547068 progress 90% (105MB)
102 09:46:53.898473 progress 95% (111MB)
103 09:46:54.291963 progress 100% (117MB)
104 09:46:54.298568 117MB downloaded in 7.47s (15.67MB/s)
105 09:46:54.298849 end: 1.3.1 http-download (duration 00:00:07) [common]
107 09:46:54.299144 end: 1.3 download-retry (duration 00:00:07) [common]
108 09:46:54.299248 start: 1.4 download-retry (timeout 00:09:50) [common]
109 09:46:54.299346 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 09:46:54.299481 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 09:46:54.299593 saving as /var/lib/lava/dispatcher/tmp/7022961/tftp-deploy-ml9iueij/modules/modules.tar
112 09:46:54.299663 total size: 51724 (0MB)
113 09:46:54.299734 Using unxz to decompress xz
114 09:46:54.303164 progress 63% (0MB)
115 09:46:54.303562 progress 100% (0MB)
116 09:46:54.307133 0MB downloaded in 0.01s (6.61MB/s)
117 09:46:54.307381 end: 1.4.1 http-download (duration 00:00:00) [common]
119 09:46:54.307676 end: 1.4 download-retry (duration 00:00:00) [common]
120 09:46:54.307781 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
121 09:46:54.307886 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
122 09:46:56.120213 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7022961/extract-nfsrootfs-i0mjvgvr
123 09:46:56.120432 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 09:46:56.120553 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 09:46:56.120699 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc
126 09:46:56.120808 makedir: /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin
127 09:46:56.120903 makedir: /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/tests
128 09:46:56.120993 makedir: /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/results
129 09:46:56.121144 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-add-keys
130 09:46:56.121283 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-add-sources
131 09:46:56.121410 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-background-process-start
132 09:46:56.121535 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-background-process-stop
133 09:46:56.121657 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-common-functions
134 09:46:56.121777 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-echo-ipv4
135 09:46:56.121898 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-install-packages
136 09:46:56.122017 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-installed-packages
137 09:46:56.122134 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-os-build
138 09:46:56.122254 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-probe-channel
139 09:46:56.122372 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-probe-ip
140 09:46:56.122490 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-target-ip
141 09:46:56.122608 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-target-mac
142 09:46:56.122725 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-target-storage
143 09:46:56.122845 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-test-case
144 09:46:56.122968 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-test-event
145 09:46:56.123086 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-test-feedback
146 09:46:56.123204 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-test-raise
147 09:46:56.123322 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-test-reference
148 09:46:56.123439 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-test-runner
149 09:46:56.123557 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-test-set
150 09:46:56.123673 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-test-shell
151 09:46:56.123792 Updating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-install-packages (oe)
152 09:46:56.123916 Updating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/bin/lava-installed-packages (oe)
153 09:46:56.124021 Creating /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/environment
154 09:46:56.124114 LAVA metadata
155 09:46:56.124187 - LAVA_JOB_ID=7022961
156 09:46:56.124258 - LAVA_DISPATCHER_IP=192.168.201.1
157 09:46:56.124363 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 09:46:56.124435 skipped lava-vland-overlay
159 09:46:56.124519 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 09:46:56.124608 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 09:46:56.124677 skipped lava-multinode-overlay
162 09:46:56.124759 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 09:46:56.124847 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 09:46:56.124926 Loading test definitions
165 09:46:56.125027 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
166 09:46:56.125144 Using /lava-7022961 at stage 0
167 09:46:56.125249 Fetching tests from https://github.com/kernelci/test-definitions
168 09:46:56.125338 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/0/tests/0_ltp-ipc'
169 09:47:03.788149 Running '/usr/bin/git checkout kernelci.org
170 09:47:03.935082 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 09:47:03.935872 uuid=7022961_1.5.2.3.1 testdef=None
172 09:47:03.936050 end: 1.5.2.3.1 git-repo-action (duration 00:00:08) [common]
174 09:47:03.936330 start: 1.5.2.3.2 test-overlay (timeout 00:09:41) [common]
175 09:47:03.937205 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 09:47:03.937476 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:41) [common]
178 09:47:03.938527 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 09:47:03.938805 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:41) [common]
181 09:47:03.939812 runner path: /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/0/tests/0_ltp-ipc test_uuid 7022961_1.5.2.3.1
182 09:47:03.939916 SKIPFILE='skipfile-lkft.yaml'
183 09:47:03.939991 SKIP_INSTALL='true'
184 09:47:03.940060 TST_CMDFILES='ipc'
185 09:47:03.940242 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 09:47:03.940484 Creating lava-test-runner.conf files
188 09:47:03.940556 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7022961/lava-overlay-zz0cpbyc/lava-7022961/0 for stage 0
189 09:47:03.940649 - 0_ltp-ipc
190 09:47:03.940757 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
191 09:47:03.940855 start: 1.5.2.4 compress-overlay (timeout 00:09:41) [common]
192 09:47:12.098019 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 09:47:12.098196 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
194 09:47:12.098340 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 09:47:12.098455 end: 1.5.2 lava-overlay (duration 00:00:16) [common]
196 09:47:12.098558 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
197 09:47:12.210576 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 09:47:12.210947 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
199 09:47:12.211075 extracting modules file /var/lib/lava/dispatcher/tmp/7022961/tftp-deploy-ml9iueij/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022961/extract-nfsrootfs-i0mjvgvr
200 09:47:12.215544 extracting modules file /var/lib/lava/dispatcher/tmp/7022961/tftp-deploy-ml9iueij/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022961/extract-overlay-ramdisk-vektz41v/ramdisk
201 09:47:12.219643 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 09:47:12.219766 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
203 09:47:12.219860 [common] Applying overlay to NFS
204 09:47:12.219943 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7022961/compress-overlay-dk2p3odv/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7022961/extract-nfsrootfs-i0mjvgvr
205 09:47:12.704515 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 09:47:12.704696 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
207 09:47:12.704811 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 09:47:12.704915 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
209 09:47:12.705006 Building ramdisk /var/lib/lava/dispatcher/tmp/7022961/extract-overlay-ramdisk-vektz41v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7022961/extract-overlay-ramdisk-vektz41v/ramdisk
210 09:47:12.742095 >> 24431 blocks
211 09:47:13.263723 rename /var/lib/lava/dispatcher/tmp/7022961/extract-overlay-ramdisk-vektz41v/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7022961/tftp-deploy-ml9iueij/ramdisk/ramdisk.cpio.gz
212 09:47:13.264175 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 09:47:13.264314 start: 1.5.8 prepare-kernel (timeout 00:09:31) [common]
214 09:47:13.264433 start: 1.5.8.1 prepare-fit (timeout 00:09:31) [common]
215 09:47:13.264543 No mkimage arch provided, not using FIT.
216 09:47:13.264646 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 09:47:13.264743 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 09:47:13.264857 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
219 09:47:13.264961 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
220 09:47:13.265051 No LXC device requested
221 09:47:13.265152 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 09:47:13.265255 start: 1.7 deploy-device-env (timeout 00:09:31) [common]
223 09:47:13.265350 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 09:47:13.265429 Checking files for TFTP limit of 4294967296 bytes.
225 09:47:13.265859 end: 1 tftp-deploy (duration 00:00:29) [common]
226 09:47:13.265977 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 09:47:13.266085 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 09:47:13.266232 substitutions:
229 09:47:13.266314 - {DTB}: None
230 09:47:13.266392 - {INITRD}: 7022961/tftp-deploy-ml9iueij/ramdisk/ramdisk.cpio.gz
231 09:47:13.266471 - {KERNEL}: 7022961/tftp-deploy-ml9iueij/kernel/bzImage
232 09:47:13.266548 - {LAVA_MAC}: None
233 09:47:13.266624 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7022961/extract-nfsrootfs-i0mjvgvr
234 09:47:13.266700 - {NFS_SERVER_IP}: 192.168.201.1
235 09:47:13.266774 - {PRESEED_CONFIG}: None
236 09:47:13.266847 - {PRESEED_LOCAL}: None
237 09:47:13.266921 - {RAMDISK}: 7022961/tftp-deploy-ml9iueij/ramdisk/ramdisk.cpio.gz
238 09:47:13.266994 - {ROOT_PART}: None
239 09:47:13.267068 - {ROOT}: None
240 09:47:13.267141 - {SERVER_IP}: 192.168.201.1
241 09:47:13.267213 - {TEE}: None
242 09:47:13.267286 Parsed boot commands:
243 09:47:13.267357 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 09:47:13.267537 Parsed boot commands: tftpboot 192.168.201.1 7022961/tftp-deploy-ml9iueij/kernel/bzImage 7022961/tftp-deploy-ml9iueij/kernel/cmdline 7022961/tftp-deploy-ml9iueij/ramdisk/ramdisk.cpio.gz
245 09:47:13.267645 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 09:47:13.267762 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 09:47:13.267876 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 09:47:13.267979 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 09:47:13.268065 Not connected, no need to disconnect.
250 09:47:13.268175 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 09:47:13.268279 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 09:47:13.268365 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
253 09:47:13.271421 Setting prompt string to ['lava-test: # ']
254 09:47:13.271743 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 09:47:13.271859 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 09:47:13.271970 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 09:47:13.272073 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 09:47:13.272276 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
259 09:47:13.293805 >> Command sent successfully.
260 09:47:13.295803 Returned 0 in 0 seconds
261 09:47:13.396834 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 09:47:13.397905 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 09:47:13.398301 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 09:47:13.398640 Setting prompt string to 'Starting depthcharge on Helios...'
266 09:47:13.398908 Changing prompt to 'Starting depthcharge on Helios...'
267 09:47:13.399187 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 09:47:13.400140 [Enter `^Ec?' for help]
269 09:47:20.516176
270 09:47:20.516762
271 09:47:20.525673 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 09:47:20.529172 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 09:47:20.535771 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 09:47:20.539127 CPU: AES supported, TXT NOT supported, VT supported
275 09:47:20.546142 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 09:47:20.548865 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 09:47:20.555756 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 09:47:20.558815 VBOOT: Loading verstage.
279 09:47:20.562361 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
280 09:47:20.569170 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 09:47:20.575762 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 09:47:20.576214 CBFS @ c08000 size 3f8000
283 09:47:20.582401 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 09:47:20.585648 CBFS: Locating 'fallback/verstage'
285 09:47:20.588749 CBFS: Found @ offset 10fb80 size 1072c
286 09:47:20.592801
287 09:47:20.593279
288 09:47:20.603007 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 09:47:20.617213 Probing TPM: . done!
290 09:47:20.620444 TPM ready after 0 ms
291 09:47:20.623883 Connected to device vid:did:rid of 1ae0:0028:00
292 09:47:20.633982 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
293 09:47:20.637678 Initialized TPM device CR50 revision 0
294 09:47:20.684393 tlcl_send_startup: Startup return code is 0
295 09:47:20.684927 TPM: setup succeeded
296 09:47:20.696972 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 09:47:20.700918 Chrome EC: UHEPI supported
298 09:47:20.704354 Phase 1
299 09:47:20.707383 FMAP: area GBB found @ c05000 (12288 bytes)
300 09:47:20.713929 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 09:47:20.717692 Phase 2
302 09:47:20.718139 Phase 3
303 09:47:20.720988 FMAP: area GBB found @ c05000 (12288 bytes)
304 09:47:20.727061 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 09:47:20.733937 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
306 09:47:20.737162 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 09:47:20.744683 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 09:47:20.759877 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
309 09:47:20.762804 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 09:47:20.769529 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 09:47:20.773947 Phase 4
312 09:47:20.776951 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
313 09:47:20.783857 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 09:47:20.963362 VB2:vb2_rsa_verify_digest() Digest check failed!
315 09:47:20.970361 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 09:47:20.970830 Saving nvdata
317 09:47:20.973404 Reboot requested (10020007)
318 09:47:20.976226 board_reset() called!
319 09:47:20.976652 full_reset() called!
320 09:47:25.482604
321 09:47:25.483174
322 09:47:25.492510 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 09:47:25.495580 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 09:47:25.502222 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 09:47:25.505729 CPU: AES supported, TXT NOT supported, VT supported
326 09:47:25.512380 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 09:47:25.519109 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 09:47:25.522182 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 09:47:25.525446 VBOOT: Loading verstage.
330 09:47:25.531753 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
331 09:47:25.535342 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 09:47:25.541730 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 09:47:25.542263 CBFS @ c08000 size 3f8000
334 09:47:25.548934 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 09:47:25.552423 CBFS: Locating 'fallback/verstage'
336 09:47:25.555438 CBFS: Found @ offset 10fb80 size 1072c
337 09:47:25.559607
338 09:47:25.560129
339 09:47:25.569542 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 09:47:25.583865 Probing TPM: . done!
341 09:47:25.587371 TPM ready after 0 ms
342 09:47:25.590392 Connected to device vid:did:rid of 1ae0:0028:00
343 09:47:25.600868 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
344 09:47:25.604717 Initialized TPM device CR50 revision 0
345 09:47:25.651029 tlcl_send_startup: Startup return code is 0
346 09:47:25.651655 TPM: setup succeeded
347 09:47:25.664034 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 09:47:25.667706 Chrome EC: UHEPI supported
349 09:47:25.671212 Phase 1
350 09:47:25.674226 FMAP: area GBB found @ c05000 (12288 bytes)
351 09:47:25.680915 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 09:47:25.687583 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 09:47:25.690531 Recovery requested (1009000e)
354 09:47:25.696653 Saving nvdata
355 09:47:25.702732 tlcl_extend: response is 0
356 09:47:25.711658 tlcl_extend: response is 0
357 09:47:25.718774 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 09:47:25.721715 CBFS @ c08000 size 3f8000
359 09:47:25.728458 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 09:47:25.731521 CBFS: Locating 'fallback/romstage'
361 09:47:25.734924 CBFS: Found @ offset 80 size 145fc
362 09:47:25.738206 Accumulated console time in verstage 98 ms
363 09:47:25.738646
364 09:47:25.738998
365 09:47:25.751506 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 09:47:25.758332 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 09:47:25.761179 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 09:47:25.764785 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 09:47:25.771521 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 09:47:25.774888 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 09:47:25.778113 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
372 09:47:25.781453 TCO_STS: 0000 0000
373 09:47:25.785047 GEN_PMCON: e0015238 00000200
374 09:47:25.787770 GBLRST_CAUSE: 00000000 00000000
375 09:47:25.788236 prev_sleep_state 5
376 09:47:25.791045 Boot Count incremented to 25263
377 09:47:25.798797 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 09:47:25.801633 CBFS @ c08000 size 3f8000
379 09:47:25.808279 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 09:47:25.808723 CBFS: Locating 'fspm.bin'
381 09:47:25.814547 CBFS: Found @ offset 5ffc0 size 71000
382 09:47:25.817863 Chrome EC: UHEPI supported
383 09:47:25.824541 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 09:47:25.828456 Probing TPM: done!
385 09:47:25.834562 Connected to device vid:did:rid of 1ae0:0028:00
386 09:47:25.844698 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
387 09:47:25.851051 Initialized TPM device CR50 revision 0
388 09:47:25.860790 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 09:47:25.867208 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 09:47:25.870594 MRC cache found, size 1948
391 09:47:25.873911 bootmode is set to: 2
392 09:47:25.877408 PRMRR disabled by config.
393 09:47:25.877975 SPD INDEX = 1
394 09:47:25.883989 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 09:47:25.887554 CBFS @ c08000 size 3f8000
396 09:47:25.893644 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 09:47:25.894099 CBFS: Locating 'spd.bin'
398 09:47:25.897240 CBFS: Found @ offset 5fb80 size 400
399 09:47:25.900448 SPD: module type is LPDDR3
400 09:47:25.903709 SPD: module part is
401 09:47:25.910114 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 09:47:25.913562 SPD: device width 4 bits, bus width 8 bits
403 09:47:25.916851 SPD: module size is 4096 MB (per channel)
404 09:47:25.920255 memory slot: 0 configuration done.
405 09:47:25.923500 memory slot: 2 configuration done.
406 09:47:25.975328 CBMEM:
407 09:47:25.979014 IMD: root @ 99fff000 254 entries.
408 09:47:25.981955 IMD: root @ 99ffec00 62 entries.
409 09:47:25.985308 External stage cache:
410 09:47:25.988908 IMD: root @ 9abff000 254 entries.
411 09:47:25.992021 IMD: root @ 9abfec00 62 entries.
412 09:47:25.995271 Chrome EC: clear events_b mask to 0x0000000020004000
413 09:47:26.012298 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 09:47:26.027735 tlcl_write: response is 0
415 09:47:26.037153 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 09:47:26.043392 MRC: TPM MRC hash updated successfully.
417 09:47:26.043834 2 DIMMs found
418 09:47:26.046668 SMM Memory Map
419 09:47:26.050240 SMRAM : 0x9a000000 0x1000000
420 09:47:26.053273 Subregion 0: 0x9a000000 0xa00000
421 09:47:26.056957 Subregion 1: 0x9aa00000 0x200000
422 09:47:26.060412 Subregion 2: 0x9ac00000 0x400000
423 09:47:26.063378 top_of_ram = 0x9a000000
424 09:47:26.066950 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 09:47:26.073505 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 09:47:26.076642 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 09:47:26.083538 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 09:47:26.086587 CBFS @ c08000 size 3f8000
429 09:47:26.090385 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 09:47:26.093362 CBFS: Locating 'fallback/postcar'
431 09:47:26.100032 CBFS: Found @ offset 107000 size 4b44
432 09:47:26.103268 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 09:47:26.115387 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 09:47:26.118809 Processing 180 relocs. Offset value of 0x97c0c000
435 09:47:26.127324 Accumulated console time in romstage 286 ms
436 09:47:26.127856
437 09:47:26.128218
438 09:47:26.137501 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 09:47:26.143938 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 09:47:26.147197 CBFS @ c08000 size 3f8000
441 09:47:26.150300 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 09:47:26.156809 CBFS: Locating 'fallback/ramstage'
443 09:47:26.160232 CBFS: Found @ offset 43380 size 1b9e8
444 09:47:26.167114 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 09:47:26.198763 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 09:47:26.201855 Processing 3976 relocs. Offset value of 0x98db0000
447 09:47:26.208793 Accumulated console time in postcar 52 ms
448 09:47:26.209377
449 09:47:26.209740
450 09:47:26.218865 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 09:47:26.225239 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 09:47:26.228806 WARNING: RO_VPD is uninitialized or empty.
453 09:47:26.232300 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 09:47:26.238726 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 09:47:26.239204 Normal boot.
456 09:47:26.244874 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 09:47:26.248641 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 09:47:26.251880 CBFS @ c08000 size 3f8000
459 09:47:26.258329 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 09:47:26.261615 CBFS: Locating 'cpu_microcode_blob.bin'
461 09:47:26.265252 CBFS: Found @ offset 14700 size 2ec00
462 09:47:26.268469 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 09:47:26.271937 Skip microcode update
464 09:47:26.278740 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 09:47:26.279293 CBFS @ c08000 size 3f8000
466 09:47:26.285356 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 09:47:26.288286 CBFS: Locating 'fsps.bin'
468 09:47:26.291465 CBFS: Found @ offset d1fc0 size 35000
469 09:47:26.317263 Detected 4 core, 8 thread CPU.
470 09:47:26.320332 Setting up SMI for CPU
471 09:47:26.323811 IED base = 0x9ac00000
472 09:47:26.324370 IED size = 0x00400000
473 09:47:26.326802 Will perform SMM setup.
474 09:47:26.333496 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 09:47:26.339912 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 09:47:26.343826 Processing 16 relocs. Offset value of 0x00030000
477 09:47:26.346935 Attempting to start 7 APs
478 09:47:26.350621 Waiting for 10ms after sending INIT.
479 09:47:26.366946 Waiting for 1st SIPI to complete...done.
480 09:47:26.367392 AP: slot 3 apic_id 3.
481 09:47:26.370122 AP: slot 1 apic_id 2.
482 09:47:26.373953 AP: slot 5 apic_id 4.
483 09:47:26.374504 AP: slot 4 apic_id 5.
484 09:47:26.377034 AP: slot 7 apic_id 7.
485 09:47:26.380138 AP: slot 6 apic_id 6.
486 09:47:26.380680 AP: slot 2 apic_id 1.
487 09:47:26.387025 Waiting for 2nd SIPI to complete...done.
488 09:47:26.393399 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 09:47:26.396742 Processing 13 relocs. Offset value of 0x00038000
490 09:47:26.402896 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 09:47:26.409733 Installing SMM handler to 0x9a000000
492 09:47:26.416372 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 09:47:26.420011 Processing 658 relocs. Offset value of 0x9a010000
494 09:47:26.429507 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 09:47:26.432886 Processing 13 relocs. Offset value of 0x9a008000
496 09:47:26.439372 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 09:47:26.446145 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 09:47:26.449243 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 09:47:26.456215 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 09:47:26.462601 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 09:47:26.469649 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 09:47:26.472734 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 09:47:26.479574 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 09:47:26.482879 Clearing SMI status registers
505 09:47:26.485987 SMI_STS: PM1
506 09:47:26.486430 PM1_STS: PWRBTN
507 09:47:26.489696 TCO_STS: SECOND_TO
508 09:47:26.492505 New SMBASE 0x9a000000
509 09:47:26.495951 In relocation handler: CPU 0
510 09:47:26.499453 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 09:47:26.502391 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 09:47:26.505797 Relocation complete.
513 09:47:26.509464 New SMBASE 0x99fff800
514 09:47:26.512702 In relocation handler: CPU 2
515 09:47:26.515845 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
516 09:47:26.519291 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 09:47:26.522748 Relocation complete.
518 09:47:26.525655 New SMBASE 0x99fffc00
519 09:47:26.526105 In relocation handler: CPU 1
520 09:47:26.532645 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
521 09:47:26.535610 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 09:47:26.538908 Relocation complete.
523 09:47:26.539371 New SMBASE 0x99fff400
524 09:47:26.542216 In relocation handler: CPU 3
525 09:47:26.548859 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
526 09:47:26.552381 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 09:47:26.555737 Relocation complete.
528 09:47:26.556194 New SMBASE 0x99ffe400
529 09:47:26.558973 In relocation handler: CPU 7
530 09:47:26.566095 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
531 09:47:26.568859 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 09:47:26.572484 Relocation complete.
533 09:47:26.573043 New SMBASE 0x99ffe800
534 09:47:26.575907 In relocation handler: CPU 6
535 09:47:26.579350 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
536 09:47:26.585455 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 09:47:26.589233 Relocation complete.
538 09:47:26.589809 New SMBASE 0x99fff000
539 09:47:26.592133 In relocation handler: CPU 4
540 09:47:26.595272 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
541 09:47:26.602433 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 09:47:26.605362 Relocation complete.
543 09:47:26.605829 New SMBASE 0x99ffec00
544 09:47:26.608627 In relocation handler: CPU 5
545 09:47:26.612175 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
546 09:47:26.618709 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 09:47:26.619252 Relocation complete.
548 09:47:26.621964 Initializing CPU #0
549 09:47:26.625388 CPU: vendor Intel device 806ec
550 09:47:26.628593 CPU: family 06, model 8e, stepping 0c
551 09:47:26.632107 Clearing out pending MCEs
552 09:47:26.635352 Setting up local APIC...
553 09:47:26.635811 apic_id: 0x00 done.
554 09:47:26.638664 Turbo is available but hidden
555 09:47:26.642075 Turbo is available and visible
556 09:47:26.645596 VMX status: enabled
557 09:47:26.648937 IA32_FEATURE_CONTROL status: locked
558 09:47:26.651814 Skip microcode update
559 09:47:26.652258 CPU #0 initialized
560 09:47:26.655169 Initializing CPU #2
561 09:47:26.658648 Initializing CPU #6
562 09:47:26.659115 Initializing CPU #7
563 09:47:26.662131 CPU: vendor Intel device 806ec
564 09:47:26.664925 CPU: family 06, model 8e, stepping 0c
565 09:47:26.668797 CPU: vendor Intel device 806ec
566 09:47:26.672116 CPU: family 06, model 8e, stepping 0c
567 09:47:26.675322 Clearing out pending MCEs
568 09:47:26.678542 Clearing out pending MCEs
569 09:47:26.682152 Setting up local APIC...
570 09:47:26.684879 CPU: vendor Intel device 806ec
571 09:47:26.688225 CPU: family 06, model 8e, stepping 0c
572 09:47:26.691769 Clearing out pending MCEs
573 09:47:26.692377 apic_id: 0x06 done.
574 09:47:26.694852 Setting up local APIC...
575 09:47:26.698364 Initializing CPU #4
576 09:47:26.698855 Initializing CPU #5
577 09:47:26.701397 CPU: vendor Intel device 806ec
578 09:47:26.704686 CPU: family 06, model 8e, stepping 0c
579 09:47:26.708360 CPU: vendor Intel device 806ec
580 09:47:26.711583 CPU: family 06, model 8e, stepping 0c
581 09:47:26.715030 Clearing out pending MCEs
582 09:47:26.717993 Clearing out pending MCEs
583 09:47:26.721571 Setting up local APIC...
584 09:47:26.722066 Initializing CPU #1
585 09:47:26.725176 Initializing CPU #3
586 09:47:26.727957 CPU: vendor Intel device 806ec
587 09:47:26.731385 CPU: family 06, model 8e, stepping 0c
588 09:47:26.734705 CPU: vendor Intel device 806ec
589 09:47:26.738464 CPU: family 06, model 8e, stepping 0c
590 09:47:26.741547 Clearing out pending MCEs
591 09:47:26.744569 Clearing out pending MCEs
592 09:47:26.745088 Setting up local APIC...
593 09:47:26.747841 apic_id: 0x07 done.
594 09:47:26.751209 VMX status: enabled
595 09:47:26.751700 VMX status: enabled
596 09:47:26.754426 IA32_FEATURE_CONTROL status: locked
597 09:47:26.758397 IA32_FEATURE_CONTROL status: locked
598 09:47:26.761173 Skip microcode update
599 09:47:26.764626 Skip microcode update
600 09:47:26.765212 CPU #6 initialized
601 09:47:26.768158 CPU #7 initialized
602 09:47:26.771554 Setting up local APIC...
603 09:47:26.774545 Setting up local APIC...
604 09:47:26.775102 apic_id: 0x01 done.
605 09:47:26.777782 apic_id: 0x03 done.
606 09:47:26.778282 apic_id: 0x02 done.
607 09:47:26.781206 VMX status: enabled
608 09:47:26.784495 VMX status: enabled
609 09:47:26.788033 IA32_FEATURE_CONTROL status: locked
610 09:47:26.791469 IA32_FEATURE_CONTROL status: locked
611 09:47:26.794479 Skip microcode update
612 09:47:26.794974 Skip microcode update
613 09:47:26.797923 CPU #3 initialized
614 09:47:26.798507 CPU #1 initialized
615 09:47:26.801100 VMX status: enabled
616 09:47:26.804028 Setting up local APIC...
617 09:47:26.807934 IA32_FEATURE_CONTROL status: locked
618 09:47:26.811327 apic_id: 0x04 done.
619 09:47:26.811935 apic_id: 0x05 done.
620 09:47:26.814499 VMX status: enabled
621 09:47:26.815064 VMX status: enabled
622 09:47:26.820847 IA32_FEATURE_CONTROL status: locked
623 09:47:26.823991 IA32_FEATURE_CONTROL status: locked
624 09:47:26.824482 Skip microcode update
625 09:47:26.827648 Skip microcode update
626 09:47:26.830750 CPU #5 initialized
627 09:47:26.831249 CPU #4 initialized
628 09:47:26.834170 Skip microcode update
629 09:47:26.834675 CPU #2 initialized
630 09:47:26.840724 bsp_do_flight_plan done after 452 msecs.
631 09:47:26.843875 CPU: frequency set to 4200 MHz
632 09:47:26.844323 Enabling SMIs.
633 09:47:26.847051 Locking SMM.
634 09:47:26.860905 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 09:47:26.863974 CBFS @ c08000 size 3f8000
636 09:47:26.870594 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 09:47:26.871047 CBFS: Locating 'vbt.bin'
638 09:47:26.874331 CBFS: Found @ offset 5f5c0 size 499
639 09:47:26.880568 Found a VBT of 4608 bytes after decompression
640 09:47:27.064364 Display FSP Version Info HOB
641 09:47:27.067251 Reference Code - CPU = 9.0.1e.30
642 09:47:27.070789 uCode Version = 0.0.0.ca
643 09:47:27.073856 TXT ACM version = ff.ff.ff.ffff
644 09:47:27.077294 Display FSP Version Info HOB
645 09:47:27.080721 Reference Code - ME = 9.0.1e.30
646 09:47:27.084168 MEBx version = 0.0.0.0
647 09:47:27.088039 ME Firmware Version = Consumer SKU
648 09:47:27.090800 Display FSP Version Info HOB
649 09:47:27.093981 Reference Code - CML PCH = 9.0.1e.30
650 09:47:27.097056 PCH-CRID Status = Disabled
651 09:47:27.100479 PCH-CRID Original Value = ff.ff.ff.ffff
652 09:47:27.104229 PCH-CRID New Value = ff.ff.ff.ffff
653 09:47:27.106958 OPROM - RST - RAID = ff.ff.ff.ffff
654 09:47:27.110920 ChipsetInit Base Version = ff.ff.ff.ffff
655 09:47:27.113754 ChipsetInit Oem Version = ff.ff.ff.ffff
656 09:47:27.117269 Display FSP Version Info HOB
657 09:47:27.123843 Reference Code - SA - System Agent = 9.0.1e.30
658 09:47:27.127066 Reference Code - MRC = 0.7.1.6c
659 09:47:27.130352 SA - PCIe Version = 9.0.1e.30
660 09:47:27.130802 SA-CRID Status = Disabled
661 09:47:27.133695 SA-CRID Original Value = 0.0.0.c
662 09:47:27.137342 SA-CRID New Value = 0.0.0.c
663 09:47:27.140665 OPROM - VBIOS = ff.ff.ff.ffff
664 09:47:27.143322 RTC Init
665 09:47:27.146942 Set power on after power failure.
666 09:47:27.147408 Disabling Deep S3
667 09:47:27.149920 Disabling Deep S3
668 09:47:27.150374 Disabling Deep S4
669 09:47:27.153614 Disabling Deep S4
670 09:47:27.156843 Disabling Deep S5
671 09:47:27.157324 Disabling Deep S5
672 09:47:27.163596 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
673 09:47:27.164046 Enumerating buses...
674 09:47:27.170111 Show all devs... Before device enumeration.
675 09:47:27.173541 Root Device: enabled 1
676 09:47:27.173991 CPU_CLUSTER: 0: enabled 1
677 09:47:27.177042 DOMAIN: 0000: enabled 1
678 09:47:27.179952 APIC: 00: enabled 1
679 09:47:27.180397 PCI: 00:00.0: enabled 1
680 09:47:27.183533 PCI: 00:02.0: enabled 1
681 09:47:27.186464 PCI: 00:04.0: enabled 0
682 09:47:27.189719 PCI: 00:05.0: enabled 0
683 09:47:27.190170 PCI: 00:12.0: enabled 1
684 09:47:27.193142 PCI: 00:12.5: enabled 0
685 09:47:27.196734 PCI: 00:12.6: enabled 0
686 09:47:27.199740 PCI: 00:14.0: enabled 1
687 09:47:27.200187 PCI: 00:14.1: enabled 0
688 09:47:27.203527 PCI: 00:14.3: enabled 1
689 09:47:27.206849 PCI: 00:14.5: enabled 0
690 09:47:27.207397 PCI: 00:15.0: enabled 1
691 09:47:27.209939 PCI: 00:15.1: enabled 1
692 09:47:27.213140 PCI: 00:15.2: enabled 0
693 09:47:27.216355 PCI: 00:15.3: enabled 0
694 09:47:27.216804 PCI: 00:16.0: enabled 1
695 09:47:27.219682 PCI: 00:16.1: enabled 0
696 09:47:27.223396 PCI: 00:16.2: enabled 0
697 09:47:27.226660 PCI: 00:16.3: enabled 0
698 09:47:27.227208 PCI: 00:16.4: enabled 0
699 09:47:27.229958 PCI: 00:16.5: enabled 0
700 09:47:27.233213 PCI: 00:17.0: enabled 1
701 09:47:27.236893 PCI: 00:19.0: enabled 1
702 09:47:27.237408 PCI: 00:19.1: enabled 0
703 09:47:27.239855 PCI: 00:19.2: enabled 0
704 09:47:27.242803 PCI: 00:1a.0: enabled 0
705 09:47:27.243271 PCI: 00:1c.0: enabled 0
706 09:47:27.246100 PCI: 00:1c.1: enabled 0
707 09:47:27.249903 PCI: 00:1c.2: enabled 0
708 09:47:27.252829 PCI: 00:1c.3: enabled 0
709 09:47:27.253345 PCI: 00:1c.4: enabled 0
710 09:47:27.256565 PCI: 00:1c.5: enabled 0
711 09:47:27.259478 PCI: 00:1c.6: enabled 0
712 09:47:27.262897 PCI: 00:1c.7: enabled 0
713 09:47:27.263342 PCI: 00:1d.0: enabled 1
714 09:47:27.266128 PCI: 00:1d.1: enabled 0
715 09:47:27.269597 PCI: 00:1d.2: enabled 0
716 09:47:27.272712 PCI: 00:1d.3: enabled 0
717 09:47:27.273184 PCI: 00:1d.4: enabled 0
718 09:47:27.276613 PCI: 00:1d.5: enabled 1
719 09:47:27.279478 PCI: 00:1e.0: enabled 1
720 09:47:27.279926 PCI: 00:1e.1: enabled 0
721 09:47:27.282893 PCI: 00:1e.2: enabled 1
722 09:47:27.285911 PCI: 00:1e.3: enabled 1
723 09:47:27.289506 PCI: 00:1f.0: enabled 1
724 09:47:27.289956 PCI: 00:1f.1: enabled 1
725 09:47:27.292809 PCI: 00:1f.2: enabled 1
726 09:47:27.295560 PCI: 00:1f.3: enabled 1
727 09:47:27.299062 PCI: 00:1f.4: enabled 1
728 09:47:27.299622 PCI: 00:1f.5: enabled 1
729 09:47:27.302448 PCI: 00:1f.6: enabled 0
730 09:47:27.305962 USB0 port 0: enabled 1
731 09:47:27.309437 I2C: 00:15: enabled 1
732 09:47:27.309974 I2C: 00:5d: enabled 1
733 09:47:27.312638 GENERIC: 0.0: enabled 1
734 09:47:27.315767 I2C: 00:1a: enabled 1
735 09:47:27.316315 I2C: 00:38: enabled 1
736 09:47:27.319414 I2C: 00:39: enabled 1
737 09:47:27.322518 I2C: 00:3a: enabled 1
738 09:47:27.323073 I2C: 00:3b: enabled 1
739 09:47:27.325884 PCI: 00:00.0: enabled 1
740 09:47:27.329113 SPI: 00: enabled 1
741 09:47:27.329574 SPI: 01: enabled 1
742 09:47:27.332568 PNP: 0c09.0: enabled 1
743 09:47:27.335252 USB2 port 0: enabled 1
744 09:47:27.335721 USB2 port 1: enabled 1
745 09:47:27.338935 USB2 port 2: enabled 0
746 09:47:27.342258 USB2 port 3: enabled 0
747 09:47:27.342708 USB2 port 5: enabled 0
748 09:47:27.345176 USB2 port 6: enabled 1
749 09:47:27.348872 USB2 port 9: enabled 1
750 09:47:27.351979 USB3 port 0: enabled 1
751 09:47:27.352427 USB3 port 1: enabled 1
752 09:47:27.355861 USB3 port 2: enabled 1
753 09:47:27.359053 USB3 port 3: enabled 1
754 09:47:27.359505 USB3 port 4: enabled 0
755 09:47:27.361918 APIC: 02: enabled 1
756 09:47:27.365163 APIC: 01: enabled 1
757 09:47:27.365613 APIC: 03: enabled 1
758 09:47:27.368718 APIC: 05: enabled 1
759 09:47:27.372276 APIC: 04: enabled 1
760 09:47:27.372843 APIC: 06: enabled 1
761 09:47:27.375156 APIC: 07: enabled 1
762 09:47:27.375617 Compare with tree...
763 09:47:27.378530 Root Device: enabled 1
764 09:47:27.381677 CPU_CLUSTER: 0: enabled 1
765 09:47:27.385277 APIC: 00: enabled 1
766 09:47:27.385742 APIC: 02: enabled 1
767 09:47:27.388559 APIC: 01: enabled 1
768 09:47:27.392356 APIC: 03: enabled 1
769 09:47:27.392829 APIC: 05: enabled 1
770 09:47:27.395132 APIC: 04: enabled 1
771 09:47:27.398581 APIC: 06: enabled 1
772 09:47:27.399039 APIC: 07: enabled 1
773 09:47:27.401657 DOMAIN: 0000: enabled 1
774 09:47:27.404982 PCI: 00:00.0: enabled 1
775 09:47:27.408564 PCI: 00:02.0: enabled 1
776 09:47:27.409136 PCI: 00:04.0: enabled 0
777 09:47:27.411996 PCI: 00:05.0: enabled 0
778 09:47:27.415215 PCI: 00:12.0: enabled 1
779 09:47:27.418444 PCI: 00:12.5: enabled 0
780 09:47:27.421881 PCI: 00:12.6: enabled 0
781 09:47:27.422435 PCI: 00:14.0: enabled 1
782 09:47:27.425047 USB0 port 0: enabled 1
783 09:47:27.428262 USB2 port 0: enabled 1
784 09:47:27.431660 USB2 port 1: enabled 1
785 09:47:27.435074 USB2 port 2: enabled 0
786 09:47:27.437870 USB2 port 3: enabled 0
787 09:47:27.438313 USB2 port 5: enabled 0
788 09:47:27.441335 USB2 port 6: enabled 1
789 09:47:27.444740 USB2 port 9: enabled 1
790 09:47:27.448178 USB3 port 0: enabled 1
791 09:47:27.451082 USB3 port 1: enabled 1
792 09:47:27.454864 USB3 port 2: enabled 1
793 09:47:27.455308 USB3 port 3: enabled 1
794 09:47:27.457711 USB3 port 4: enabled 0
795 09:47:27.461255 PCI: 00:14.1: enabled 0
796 09:47:27.464750 PCI: 00:14.3: enabled 1
797 09:47:27.467859 PCI: 00:14.5: enabled 0
798 09:47:27.468320 PCI: 00:15.0: enabled 1
799 09:47:27.471060 I2C: 00:15: enabled 1
800 09:47:27.474311 PCI: 00:15.1: enabled 1
801 09:47:27.478063 I2C: 00:5d: enabled 1
802 09:47:27.478513 GENERIC: 0.0: enabled 1
803 09:47:27.481236 PCI: 00:15.2: enabled 0
804 09:47:27.484507 PCI: 00:15.3: enabled 0
805 09:47:27.487867 PCI: 00:16.0: enabled 1
806 09:47:27.491072 PCI: 00:16.1: enabled 0
807 09:47:27.491522 PCI: 00:16.2: enabled 0
808 09:47:27.493948 PCI: 00:16.3: enabled 0
809 09:47:27.497191 PCI: 00:16.4: enabled 0
810 09:47:27.500417 PCI: 00:16.5: enabled 0
811 09:47:27.503835 PCI: 00:17.0: enabled 1
812 09:47:27.504279 PCI: 00:19.0: enabled 1
813 09:47:27.507163 I2C: 00:1a: enabled 1
814 09:47:27.510773 I2C: 00:38: enabled 1
815 09:47:27.514047 I2C: 00:39: enabled 1
816 09:47:27.517079 I2C: 00:3a: enabled 1
817 09:47:27.517533 I2C: 00:3b: enabled 1
818 09:47:27.520600 PCI: 00:19.1: enabled 0
819 09:47:27.523711 PCI: 00:19.2: enabled 0
820 09:47:27.527316 PCI: 00:1a.0: enabled 0
821 09:47:27.527764 PCI: 00:1c.0: enabled 0
822 09:47:27.530250 PCI: 00:1c.1: enabled 0
823 09:47:27.533785 PCI: 00:1c.2: enabled 0
824 09:47:27.537289 PCI: 00:1c.3: enabled 0
825 09:47:27.540424 PCI: 00:1c.4: enabled 0
826 09:47:27.540863 PCI: 00:1c.5: enabled 0
827 09:47:27.543813 PCI: 00:1c.6: enabled 0
828 09:47:27.546890 PCI: 00:1c.7: enabled 0
829 09:47:27.550218 PCI: 00:1d.0: enabled 1
830 09:47:27.553723 PCI: 00:1d.1: enabled 0
831 09:47:27.554264 PCI: 00:1d.2: enabled 0
832 09:47:27.556978 PCI: 00:1d.3: enabled 0
833 09:47:27.560197 PCI: 00:1d.4: enabled 0
834 09:47:27.563499 PCI: 00:1d.5: enabled 1
835 09:47:27.567074 PCI: 00:00.0: enabled 1
836 09:47:27.567515 PCI: 00:1e.0: enabled 1
837 09:47:27.570173 PCI: 00:1e.1: enabled 0
838 09:47:27.573345 PCI: 00:1e.2: enabled 1
839 09:47:27.577112 SPI: 00: enabled 1
840 09:47:27.577574 PCI: 00:1e.3: enabled 1
841 09:47:27.580437 SPI: 01: enabled 1
842 09:47:27.583820 PCI: 00:1f.0: enabled 1
843 09:47:27.586920 PNP: 0c09.0: enabled 1
844 09:47:27.590656 PCI: 00:1f.1: enabled 1
845 09:47:27.591232 PCI: 00:1f.2: enabled 1
846 09:47:27.593461 PCI: 00:1f.3: enabled 1
847 09:47:27.596512 PCI: 00:1f.4: enabled 1
848 09:47:27.599868 PCI: 00:1f.5: enabled 1
849 09:47:27.600406 PCI: 00:1f.6: enabled 0
850 09:47:27.603200 Root Device scanning...
851 09:47:27.606586 scan_static_bus for Root Device
852 09:47:27.609865 CPU_CLUSTER: 0 enabled
853 09:47:27.613310 DOMAIN: 0000 enabled
854 09:47:27.613856 DOMAIN: 0000 scanning...
855 09:47:27.616444 PCI: pci_scan_bus for bus 00
856 09:47:27.619743 PCI: 00:00.0 [8086/0000] ops
857 09:47:27.623313 PCI: 00:00.0 [8086/9b61] enabled
858 09:47:27.626564 PCI: 00:02.0 [8086/0000] bus ops
859 09:47:27.629709 PCI: 00:02.0 [8086/9b41] enabled
860 09:47:27.633231 PCI: 00:04.0 [8086/1903] disabled
861 09:47:27.636364 PCI: 00:08.0 [8086/1911] enabled
862 09:47:27.639763 PCI: 00:12.0 [8086/02f9] enabled
863 09:47:27.643078 PCI: 00:14.0 [8086/0000] bus ops
864 09:47:27.646900 PCI: 00:14.0 [8086/02ed] enabled
865 09:47:27.650344 PCI: 00:14.2 [8086/02ef] enabled
866 09:47:27.653322 PCI: 00:14.3 [8086/02f0] enabled
867 09:47:27.656655 PCI: 00:15.0 [8086/0000] bus ops
868 09:47:27.659463 PCI: 00:15.0 [8086/02e8] enabled
869 09:47:27.663007 PCI: 00:15.1 [8086/0000] bus ops
870 09:47:27.666379 PCI: 00:15.1 [8086/02e9] enabled
871 09:47:27.669811 PCI: 00:16.0 [8086/0000] ops
872 09:47:27.672929 PCI: 00:16.0 [8086/02e0] enabled
873 09:47:27.676832 PCI: 00:17.0 [8086/0000] ops
874 09:47:27.679771 PCI: 00:17.0 [8086/02d3] enabled
875 09:47:27.683354 PCI: 00:19.0 [8086/0000] bus ops
876 09:47:27.686308 PCI: 00:19.0 [8086/02c5] enabled
877 09:47:27.689592 PCI: 00:1d.0 [8086/0000] bus ops
878 09:47:27.693050 PCI: 00:1d.0 [8086/02b0] enabled
879 09:47:27.699377 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 09:47:27.702971 PCI: 00:1e.0 [8086/0000] ops
881 09:47:27.706195 PCI: 00:1e.0 [8086/02a8] enabled
882 09:47:27.709401 PCI: 00:1e.2 [8086/0000] bus ops
883 09:47:27.712804 PCI: 00:1e.2 [8086/02aa] enabled
884 09:47:27.716226 PCI: 00:1e.3 [8086/0000] bus ops
885 09:47:27.719499 PCI: 00:1e.3 [8086/02ab] enabled
886 09:47:27.722914 PCI: 00:1f.0 [8086/0000] bus ops
887 09:47:27.726117 PCI: 00:1f.0 [8086/0284] enabled
888 09:47:27.729366 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 09:47:27.736028 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 09:47:27.739467 PCI: 00:1f.3 [8086/0000] bus ops
891 09:47:27.742707 PCI: 00:1f.3 [8086/02c8] enabled
892 09:47:27.746422 PCI: 00:1f.4 [8086/0000] bus ops
893 09:47:27.749381 PCI: 00:1f.4 [8086/02a3] enabled
894 09:47:27.752306 PCI: 00:1f.5 [8086/0000] bus ops
895 09:47:27.755720 PCI: 00:1f.5 [8086/02a4] enabled
896 09:47:27.759203 PCI: Leftover static devices:
897 09:47:27.759652 PCI: 00:05.0
898 09:47:27.762536 PCI: 00:12.5
899 09:47:27.763030 PCI: 00:12.6
900 09:47:27.765649 PCI: 00:14.1
901 09:47:27.766147 PCI: 00:14.5
902 09:47:27.769132 PCI: 00:15.2
903 09:47:27.769601 PCI: 00:15.3
904 09:47:27.769953 PCI: 00:16.1
905 09:47:27.772970 PCI: 00:16.2
906 09:47:27.773470 PCI: 00:16.3
907 09:47:27.775739 PCI: 00:16.4
908 09:47:27.776177 PCI: 00:16.5
909 09:47:27.776550 PCI: 00:19.1
910 09:47:27.779170 PCI: 00:19.2
911 09:47:27.779610 PCI: 00:1a.0
912 09:47:27.782508 PCI: 00:1c.0
913 09:47:27.782954 PCI: 00:1c.1
914 09:47:27.783303 PCI: 00:1c.2
915 09:47:27.785609 PCI: 00:1c.3
916 09:47:27.786046 PCI: 00:1c.4
917 09:47:27.788992 PCI: 00:1c.5
918 09:47:27.789451 PCI: 00:1c.6
919 09:47:27.792145 PCI: 00:1c.7
920 09:47:27.792582 PCI: 00:1d.1
921 09:47:27.792925 PCI: 00:1d.2
922 09:47:27.796200 PCI: 00:1d.3
923 09:47:27.796637 PCI: 00:1d.4
924 09:47:27.798823 PCI: 00:1d.5
925 09:47:27.799259 PCI: 00:1e.1
926 09:47:27.799601 PCI: 00:1f.1
927 09:47:27.802183 PCI: 00:1f.2
928 09:47:27.802623 PCI: 00:1f.6
929 09:47:27.805576 PCI: Check your devicetree.cb.
930 09:47:27.808832 PCI: 00:02.0 scanning...
931 09:47:27.812354 scan_generic_bus for PCI: 00:02.0
932 09:47:27.816120 scan_generic_bus for PCI: 00:02.0 done
933 09:47:27.822487 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
934 09:47:27.825688 PCI: 00:14.0 scanning...
935 09:47:27.829038 scan_static_bus for PCI: 00:14.0
936 09:47:27.829505 USB0 port 0 enabled
937 09:47:27.832054 USB0 port 0 scanning...
938 09:47:27.835507 scan_static_bus for USB0 port 0
939 09:47:27.838561 USB2 port 0 enabled
940 09:47:27.839028 USB2 port 1 enabled
941 09:47:27.841934 USB2 port 2 disabled
942 09:47:27.845311 USB2 port 3 disabled
943 09:47:27.845763 USB2 port 5 disabled
944 09:47:27.848964 USB2 port 6 enabled
945 09:47:27.852403 USB2 port 9 enabled
946 09:47:27.852848 USB3 port 0 enabled
947 09:47:27.855481 USB3 port 1 enabled
948 09:47:27.855949 USB3 port 2 enabled
949 09:47:27.858808 USB3 port 3 enabled
950 09:47:27.861884 USB3 port 4 disabled
951 09:47:27.862358 USB2 port 0 scanning...
952 09:47:27.865353 scan_static_bus for USB2 port 0
953 09:47:27.872121 scan_static_bus for USB2 port 0 done
954 09:47:27.875608 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
955 09:47:27.878833 USB2 port 1 scanning...
956 09:47:27.881885 scan_static_bus for USB2 port 1
957 09:47:27.885368 scan_static_bus for USB2 port 1 done
958 09:47:27.891805 scan_bus: scanning of bus USB2 port 1 took 9707 usecs
959 09:47:27.892264 USB2 port 6 scanning...
960 09:47:27.895324 scan_static_bus for USB2 port 6
961 09:47:27.902083 scan_static_bus for USB2 port 6 done
962 09:47:27.905560 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
963 09:47:27.909020 USB2 port 9 scanning...
964 09:47:27.911871 scan_static_bus for USB2 port 9
965 09:47:27.915344 scan_static_bus for USB2 port 9 done
966 09:47:27.922054 scan_bus: scanning of bus USB2 port 9 took 9697 usecs
967 09:47:27.922596 USB3 port 0 scanning...
968 09:47:27.928754 scan_static_bus for USB3 port 0
969 09:47:27.931938 scan_static_bus for USB3 port 0 done
970 09:47:27.935259 scan_bus: scanning of bus USB3 port 0 took 9690 usecs
971 09:47:27.938296 USB3 port 1 scanning...
972 09:47:27.941846 scan_static_bus for USB3 port 1
973 09:47:27.945329 scan_static_bus for USB3 port 1 done
974 09:47:27.951535 scan_bus: scanning of bus USB3 port 1 took 9691 usecs
975 09:47:27.951976 USB3 port 2 scanning...
976 09:47:27.955810 scan_static_bus for USB3 port 2
977 09:47:27.961945 scan_static_bus for USB3 port 2 done
978 09:47:27.965348 scan_bus: scanning of bus USB3 port 2 took 9706 usecs
979 09:47:27.968753 USB3 port 3 scanning...
980 09:47:27.971706 scan_static_bus for USB3 port 3
981 09:47:27.975161 scan_static_bus for USB3 port 3 done
982 09:47:27.982084 scan_bus: scanning of bus USB3 port 3 took 9709 usecs
983 09:47:27.985137 scan_static_bus for USB0 port 0 done
984 09:47:27.988651 scan_bus: scanning of bus USB0 port 0 took 155402 usecs
985 09:47:27.995660 scan_static_bus for PCI: 00:14.0 done
986 09:47:27.998345 scan_bus: scanning of bus PCI: 00:14.0 took 173030 usecs
987 09:47:28.001622 PCI: 00:15.0 scanning...
988 09:47:28.005135 scan_generic_bus for PCI: 00:15.0
989 09:47:28.008247 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 09:47:28.015229 scan_generic_bus for PCI: 00:15.0 done
991 09:47:28.018372 scan_bus: scanning of bus PCI: 00:15.0 took 14289 usecs
992 09:47:28.021855 PCI: 00:15.1 scanning...
993 09:47:28.025088 scan_generic_bus for PCI: 00:15.1
994 09:47:28.028377 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 09:47:28.035095 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 09:47:28.038091 scan_generic_bus for PCI: 00:15.1 done
997 09:47:28.044977 scan_bus: scanning of bus PCI: 00:15.1 took 18576 usecs
998 09:47:28.045448 PCI: 00:19.0 scanning...
999 09:47:28.047899 scan_generic_bus for PCI: 00:19.0
1000 09:47:28.054576 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 09:47:28.058658 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 09:47:28.061329 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 09:47:28.064802 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 09:47:28.071176 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 09:47:28.074727 scan_generic_bus for PCI: 00:19.0 done
1006 09:47:28.077925 scan_bus: scanning of bus PCI: 00:19.0 took 30750 usecs
1007 09:47:28.081396 PCI: 00:1d.0 scanning...
1008 09:47:28.084570 do_pci_scan_bridge for PCI: 00:1d.0
1009 09:47:28.087722 PCI: pci_scan_bus for bus 01
1010 09:47:28.091303 PCI: 01:00.0 [1c5c/1327] enabled
1011 09:47:28.095029 Enabling Common Clock Configuration
1012 09:47:28.101470 L1 Sub-State supported from root port 29
1013 09:47:28.104716 L1 Sub-State Support = 0xf
1014 09:47:28.105300 CommonModeRestoreTime = 0x28
1015 09:47:28.111431 Power On Value = 0x16, Power On Scale = 0x0
1016 09:47:28.111928 ASPM: Enabled L1
1017 09:47:28.118157 scan_bus: scanning of bus PCI: 00:1d.0 took 32783 usecs
1018 09:47:28.121627 PCI: 00:1e.2 scanning...
1019 09:47:28.124337 scan_generic_bus for PCI: 00:1e.2
1020 09:47:28.127884 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 09:47:28.131382 scan_generic_bus for PCI: 00:1e.2 done
1022 09:47:28.137932 scan_bus: scanning of bus PCI: 00:1e.2 took 14012 usecs
1023 09:47:28.140823 PCI: 00:1e.3 scanning...
1024 09:47:28.144478 scan_generic_bus for PCI: 00:1e.3
1025 09:47:28.147777 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 09:47:28.151064 scan_generic_bus for PCI: 00:1e.3 done
1027 09:47:28.157514 scan_bus: scanning of bus PCI: 00:1e.3 took 14013 usecs
1028 09:47:28.157964 PCI: 00:1f.0 scanning...
1029 09:47:28.161020 scan_static_bus for PCI: 00:1f.0
1030 09:47:28.164404 PNP: 0c09.0 enabled
1031 09:47:28.167693 scan_static_bus for PCI: 00:1f.0 done
1032 09:47:28.174292 scan_bus: scanning of bus PCI: 00:1f.0 took 12036 usecs
1033 09:47:28.177835 PCI: 00:1f.3 scanning...
1034 09:47:28.181105 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1035 09:47:28.184060 PCI: 00:1f.4 scanning...
1036 09:47:28.187599 scan_generic_bus for PCI: 00:1f.4
1037 09:47:28.191094 scan_generic_bus for PCI: 00:1f.4 done
1038 09:47:28.197809 scan_bus: scanning of bus PCI: 00:1f.4 took 10179 usecs
1039 09:47:28.200929 PCI: 00:1f.5 scanning...
1040 09:47:28.204351 scan_generic_bus for PCI: 00:1f.5
1041 09:47:28.207909 scan_generic_bus for PCI: 00:1f.5 done
1042 09:47:28.214225 scan_bus: scanning of bus PCI: 00:1f.5 took 10196 usecs
1043 09:47:28.221017 scan_bus: scanning of bus DOMAIN: 0000 took 605042 usecs
1044 09:47:28.224199 scan_static_bus for Root Device done
1045 09:47:28.227591 scan_bus: scanning of bus Root Device took 624916 usecs
1046 09:47:28.230923 done
1047 09:47:28.234127 Chrome EC: UHEPI supported
1048 09:47:28.237058 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 09:47:28.244305 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 09:47:28.250534 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 09:47:28.257360 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 09:47:28.260733 SPI flash protection: WPSW=0 SRP0=0
1053 09:47:28.267426 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 09:47:28.270542 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 09:47:28.274005 found VGA at PCI: 00:02.0
1056 09:47:28.277188 Setting up VGA for PCI: 00:02.0
1057 09:47:28.283946 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 09:47:28.287181 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 09:47:28.290273 Allocating resources...
1060 09:47:28.293924 Reading resources...
1061 09:47:28.296982 Root Device read_resources bus 0 link: 0
1062 09:47:28.300338 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 09:47:28.307037 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 09:47:28.310257 DOMAIN: 0000 read_resources bus 0 link: 0
1065 09:47:28.317255 PCI: 00:14.0 read_resources bus 0 link: 0
1066 09:47:28.320895 USB0 port 0 read_resources bus 0 link: 0
1067 09:47:28.329110 USB0 port 0 read_resources bus 0 link: 0 done
1068 09:47:28.332154 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 09:47:28.339198 PCI: 00:15.0 read_resources bus 1 link: 0
1070 09:47:28.342626 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 09:47:28.349018 PCI: 00:15.1 read_resources bus 2 link: 0
1072 09:47:28.352303 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 09:47:28.360023 PCI: 00:19.0 read_resources bus 3 link: 0
1074 09:47:28.366750 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 09:47:28.369989 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 09:47:28.376788 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 09:47:28.380263 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 09:47:28.386720 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 09:47:28.390158 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 09:47:28.396439 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 09:47:28.399894 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 09:47:28.406441 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 09:47:28.412936 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 09:47:28.416831 Root Device read_resources bus 0 link: 0 done
1085 09:47:28.419631 Done reading resources.
1086 09:47:28.423328 Show resources in subtree (Root Device)...After reading.
1087 09:47:28.429810 Root Device child on link 0 CPU_CLUSTER: 0
1088 09:47:28.433219 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 09:47:28.433707 APIC: 00
1090 09:47:28.436164 APIC: 02
1091 09:47:28.436608 APIC: 01
1092 09:47:28.439475 APIC: 03
1093 09:47:28.439964 APIC: 05
1094 09:47:28.440413 APIC: 04
1095 09:47:28.443163 APIC: 06
1096 09:47:28.443641 APIC: 07
1097 09:47:28.446075 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 09:47:28.499178 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 09:47:28.500177 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 09:47:28.500618 PCI: 00:00.0
1101 09:47:28.501394 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 09:47:28.501831 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 09:47:28.502327 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 09:47:28.533250 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 09:47:28.534165 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 09:47:28.534906 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 09:47:28.537646 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 09:47:28.544175 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 09:47:28.554221 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 09:47:28.560697 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 09:47:28.570736 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 09:47:28.580278 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 09:47:28.590868 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 09:47:28.600897 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 09:47:28.610387 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 09:47:28.616778 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 09:47:28.620389 PCI: 00:02.0
1118 09:47:28.629832 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 09:47:28.640050 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 09:47:28.649996 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 09:47:28.650438 PCI: 00:04.0
1122 09:47:28.653172 PCI: 00:08.0
1123 09:47:28.663560 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 09:47:28.664140 PCI: 00:12.0
1125 09:47:28.673111 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 09:47:28.680041 PCI: 00:14.0 child on link 0 USB0 port 0
1127 09:47:28.690433 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 09:47:28.693193 USB0 port 0 child on link 0 USB2 port 0
1129 09:47:28.693635 USB2 port 0
1130 09:47:28.696602 USB2 port 1
1131 09:47:28.697178 USB2 port 2
1132 09:47:28.699710 USB2 port 3
1133 09:47:28.702817 USB2 port 5
1134 09:47:28.703259 USB2 port 6
1135 09:47:28.706789 USB2 port 9
1136 09:47:28.707275 USB3 port 0
1137 09:47:28.709393 USB3 port 1
1138 09:47:28.709830 USB3 port 2
1139 09:47:28.712999 USB3 port 3
1140 09:47:28.713576 USB3 port 4
1141 09:47:28.716553 PCI: 00:14.2
1142 09:47:28.726040 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 09:47:28.736041 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 09:47:28.736595 PCI: 00:14.3
1145 09:47:28.746105 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 09:47:28.752509 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 09:47:28.762674 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 09:47:28.763119 I2C: 01:15
1149 09:47:28.765710 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 09:47:28.775672 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 09:47:28.779018 I2C: 02:5d
1152 09:47:28.779587 GENERIC: 0.0
1153 09:47:28.782168 PCI: 00:16.0
1154 09:47:28.792164 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 09:47:28.792613 PCI: 00:17.0
1156 09:47:28.802156 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 09:47:28.811692 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 09:47:28.818681 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 09:47:28.828971 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 09:47:28.835081 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 09:47:28.845110 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 09:47:28.848351 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 09:47:28.858562 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 09:47:28.861380 I2C: 03:1a
1165 09:47:28.861822 I2C: 03:38
1166 09:47:28.864998 I2C: 03:39
1167 09:47:28.865468 I2C: 03:3a
1168 09:47:28.868348 I2C: 03:3b
1169 09:47:28.871349 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 09:47:28.881376 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 09:47:28.891203 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 09:47:28.898629 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 09:47:28.901389 PCI: 01:00.0
1174 09:47:28.911230 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 09:47:28.911671 PCI: 00:1e.0
1176 09:47:28.924509 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 09:47:28.934163 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 09:47:28.937412 PCI: 00:1e.2 child on link 0 SPI: 00
1179 09:47:28.947226 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 09:47:28.947670 SPI: 00
1181 09:47:28.953905 PCI: 00:1e.3 child on link 0 SPI: 01
1182 09:47:28.964238 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 09:47:28.964685 SPI: 01
1184 09:47:28.967375 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 09:47:28.977140 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 09:47:28.987336 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 09:47:28.987865 PNP: 0c09.0
1188 09:47:28.996892 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 09:47:28.997358 PCI: 00:1f.3
1190 09:47:29.006950 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 09:47:29.016882 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 09:47:29.020380 PCI: 00:1f.4
1193 09:47:29.030352 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 09:47:29.040215 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 09:47:29.040685 PCI: 00:1f.5
1196 09:47:29.050029 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 09:47:29.056845 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 09:47:29.063450 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 09:47:29.070035 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 09:47:29.073149 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 09:47:29.076356 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 09:47:29.079698 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 09:47:29.083140 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 09:47:29.090124 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 09:47:29.096342 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 09:47:29.103025 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 09:47:29.113097 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 09:47:29.119303 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 09:47:29.122712 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 09:47:29.132704 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 09:47:29.135871 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 09:47:29.142704 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 09:47:29.146505 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 09:47:29.149478 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 09:47:29.155730 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 09:47:29.159142 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 09:47:29.165589 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 09:47:29.169059 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 09:47:29.175651 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 09:47:29.179253 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 09:47:29.185837 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 09:47:29.188901 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 09:47:29.195343 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 09:47:29.198878 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 09:47:29.205758 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 09:47:29.208694 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 09:47:29.215340 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 09:47:29.218906 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 09:47:29.225649 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 09:47:29.228789 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 09:47:29.231909 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 09:47:29.238876 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 09:47:29.242153 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 09:47:29.252219 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 09:47:29.255010 avoid_fixed_resources: DOMAIN: 0000
1236 09:47:29.261668 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 09:47:29.268419 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 09:47:29.274885 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 09:47:29.281660 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 09:47:29.291290 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 09:47:29.298204 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 09:47:29.304608 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 09:47:29.314871 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 09:47:29.321522 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 09:47:29.327841 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 09:47:29.334470 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 09:47:29.344540 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 09:47:29.344989 Setting resources...
1249 09:47:29.351249 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 09:47:29.354271 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 09:47:29.361121 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 09:47:29.364024 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 09:47:29.368005 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 09:47:29.374338 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 09:47:29.380937 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 09:47:29.387408 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 09:47:29.393978 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 09:47:29.400624 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 09:47:29.403795 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 09:47:29.407223 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 09:47:29.413877 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 09:47:29.417489 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 09:47:29.424226 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 09:47:29.426944 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 09:47:29.433521 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 09:47:29.436846 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 09:47:29.443281 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 09:47:29.446504 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 09:47:29.453316 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 09:47:29.456657 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 09:47:29.463127 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 09:47:29.466917 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 09:47:29.473382 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 09:47:29.476659 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 09:47:29.483193 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 09:47:29.486735 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 09:47:29.489814 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 09:47:29.496341 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 09:47:29.499779 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 09:47:29.506385 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 09:47:29.512994 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 09:47:29.519468 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 09:47:29.529287 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 09:47:29.535960 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 09:47:29.539361 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 09:47:29.549394 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 09:47:29.552867 Root Device assign_resources, bus 0 link: 0
1288 09:47:29.556082 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 09:47:29.565904 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 09:47:29.572434 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 09:47:29.582308 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 09:47:29.589055 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 09:47:29.598977 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 09:47:29.605730 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 09:47:29.612377 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 09:47:29.615463 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 09:47:29.625688 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 09:47:29.632000 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 09:47:29.638432 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 09:47:29.649008 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 09:47:29.652460 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 09:47:29.658664 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 09:47:29.665499 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 09:47:29.672216 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 09:47:29.675665 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 09:47:29.685670 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 09:47:29.691987 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 09:47:29.698695 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 09:47:29.708383 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 09:47:29.715609 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 09:47:29.721924 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 09:47:29.732130 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 09:47:29.737947 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 09:47:29.744516 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 09:47:29.747712 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 09:47:29.757692 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 09:47:29.764313 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 09:47:29.774455 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 09:47:29.777515 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 09:47:29.787659 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 09:47:29.791159 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 09:47:29.801661 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 09:47:29.807181 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 09:47:29.814053 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 09:47:29.817221 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 09:47:29.827240 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 09:47:29.830330 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 09:47:29.834195 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 09:47:29.840020 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 09:47:29.843741 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 09:47:29.850154 LPC: Trying to open IO window from 800 size 1ff
1332 09:47:29.857054 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 09:47:29.866946 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 09:47:29.873053 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 09:47:29.883595 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 09:47:29.886599 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 09:47:29.893443 Root Device assign_resources, bus 0 link: 0
1338 09:47:29.893995 Done setting resources.
1339 09:47:29.899940 Show resources in subtree (Root Device)...After assigning values.
1340 09:47:29.906314 Root Device child on link 0 CPU_CLUSTER: 0
1341 09:47:29.909561 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 09:47:29.910050 APIC: 00
1343 09:47:29.913349 APIC: 02
1344 09:47:29.913784 APIC: 01
1345 09:47:29.914143 APIC: 03
1346 09:47:29.916330 APIC: 05
1347 09:47:29.916766 APIC: 04
1348 09:47:29.919843 APIC: 06
1349 09:47:29.920277 APIC: 07
1350 09:47:29.922890 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 09:47:29.932904 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 09:47:29.945887 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 09:47:29.946362 PCI: 00:00.0
1354 09:47:29.956030 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 09:47:29.965549 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 09:47:29.975532 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 09:47:29.982249 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 09:47:29.992497 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 09:47:30.001944 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 09:47:30.012291 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 09:47:30.022275 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 09:47:30.032087 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 09:47:30.038604 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 09:47:30.048368 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 09:47:30.058521 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 09:47:30.068300 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 09:47:30.078067 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 09:47:30.088204 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 09:47:30.094678 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 09:47:30.098092 PCI: 00:02.0
1371 09:47:30.107753 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 09:47:30.117856 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 09:47:30.127821 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 09:47:30.130859 PCI: 00:04.0
1375 09:47:30.131306 PCI: 00:08.0
1376 09:47:30.141223 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 09:47:30.144143 PCI: 00:12.0
1378 09:47:30.154290 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 09:47:30.157578 PCI: 00:14.0 child on link 0 USB0 port 0
1380 09:47:30.167320 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 09:47:30.174029 USB0 port 0 child on link 0 USB2 port 0
1382 09:47:30.174480 USB2 port 0
1383 09:47:30.177112 USB2 port 1
1384 09:47:30.177632 USB2 port 2
1385 09:47:30.180559 USB2 port 3
1386 09:47:30.181009 USB2 port 5
1387 09:47:30.184081 USB2 port 6
1388 09:47:30.184526 USB2 port 9
1389 09:47:30.187184 USB3 port 0
1390 09:47:30.187630 USB3 port 1
1391 09:47:30.190440 USB3 port 2
1392 09:47:30.193899 USB3 port 3
1393 09:47:30.194346 USB3 port 4
1394 09:47:30.197177 PCI: 00:14.2
1395 09:47:30.207038 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 09:47:30.217289 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 09:47:30.217734 PCI: 00:14.3
1398 09:47:30.227266 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 09:47:30.234174 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 09:47:30.243223 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 09:47:30.243676 I2C: 01:15
1402 09:47:30.249778 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 09:47:30.260057 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 09:47:30.260545 I2C: 02:5d
1405 09:47:30.263362 GENERIC: 0.0
1406 09:47:30.263813 PCI: 00:16.0
1407 09:47:30.273603 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 09:47:30.276505 PCI: 00:17.0
1409 09:47:30.286662 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 09:47:30.296431 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 09:47:30.306119 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 09:47:30.313381 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 09:47:30.322999 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 09:47:30.332680 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 09:47:30.339323 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 09:47:30.349096 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 09:47:30.349626 I2C: 03:1a
1418 09:47:30.352528 I2C: 03:38
1419 09:47:30.352984 I2C: 03:39
1420 09:47:30.355629 I2C: 03:3a
1421 09:47:30.356080 I2C: 03:3b
1422 09:47:30.359097 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 09:47:30.369417 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 09:47:30.378693 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 09:47:30.392182 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 09:47:30.392648 PCI: 01:00.0
1427 09:47:30.401882 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 09:47:30.404963 PCI: 00:1e.0
1429 09:47:30.415531 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 09:47:30.425356 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 09:47:30.428362 PCI: 00:1e.2 child on link 0 SPI: 00
1432 09:47:30.438499 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 09:47:30.441704 SPI: 00
1434 09:47:30.444882 PCI: 00:1e.3 child on link 0 SPI: 01
1435 09:47:30.454804 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 09:47:30.458014 SPI: 01
1437 09:47:30.461601 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 09:47:30.471393 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 09:47:30.478319 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 09:47:30.481027 PNP: 0c09.0
1441 09:47:30.488387 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 09:47:30.491749 PCI: 00:1f.3
1443 09:47:30.501096 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 09:47:30.511071 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 09:47:30.514667 PCI: 00:1f.4
1446 09:47:30.520818 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 09:47:30.530871 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 09:47:30.534640 PCI: 00:1f.5
1449 09:47:30.544293 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 09:47:30.547221 Done allocating resources.
1451 09:47:30.553883 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 09:47:30.554342 Enabling resources...
1453 09:47:30.561510 PCI: 00:00.0 subsystem <- 8086/9b61
1454 09:47:30.561952 PCI: 00:00.0 cmd <- 06
1455 09:47:30.564558 PCI: 00:02.0 subsystem <- 8086/9b41
1456 09:47:30.567791 PCI: 00:02.0 cmd <- 03
1457 09:47:30.570982 PCI: 00:08.0 cmd <- 06
1458 09:47:30.574542 PCI: 00:12.0 subsystem <- 8086/02f9
1459 09:47:30.578046 PCI: 00:12.0 cmd <- 02
1460 09:47:30.581872 PCI: 00:14.0 subsystem <- 8086/02ed
1461 09:47:30.584536 PCI: 00:14.0 cmd <- 02
1462 09:47:30.588153 PCI: 00:14.2 cmd <- 02
1463 09:47:30.591037 PCI: 00:14.3 subsystem <- 8086/02f0
1464 09:47:30.591486 PCI: 00:14.3 cmd <- 02
1465 09:47:30.598078 PCI: 00:15.0 subsystem <- 8086/02e8
1466 09:47:30.598621 PCI: 00:15.0 cmd <- 02
1467 09:47:30.601668 PCI: 00:15.1 subsystem <- 8086/02e9
1468 09:47:30.604413 PCI: 00:15.1 cmd <- 02
1469 09:47:30.607714 PCI: 00:16.0 subsystem <- 8086/02e0
1470 09:47:30.610919 PCI: 00:16.0 cmd <- 02
1471 09:47:30.614630 PCI: 00:17.0 subsystem <- 8086/02d3
1472 09:47:30.617935 PCI: 00:17.0 cmd <- 03
1473 09:47:30.621122 PCI: 00:19.0 subsystem <- 8086/02c5
1474 09:47:30.624187 PCI: 00:19.0 cmd <- 02
1475 09:47:30.627497 PCI: 00:1d.0 bridge ctrl <- 0013
1476 09:47:30.630784 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 09:47:30.634264 PCI: 00:1d.0 cmd <- 06
1478 09:47:30.637671 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 09:47:30.640544 PCI: 00:1e.0 cmd <- 06
1480 09:47:30.643834 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 09:47:30.647290 PCI: 00:1e.2 cmd <- 06
1482 09:47:30.650651 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 09:47:30.651134 PCI: 00:1e.3 cmd <- 02
1484 09:47:30.657515 PCI: 00:1f.0 subsystem <- 8086/0284
1485 09:47:30.658007 PCI: 00:1f.0 cmd <- 407
1486 09:47:30.663889 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 09:47:30.664377 PCI: 00:1f.3 cmd <- 02
1488 09:47:30.667795 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 09:47:30.670629 PCI: 00:1f.4 cmd <- 03
1490 09:47:30.674049 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 09:47:30.677371 PCI: 00:1f.5 cmd <- 406
1492 09:47:30.686331 PCI: 01:00.0 cmd <- 02
1493 09:47:30.691819 done.
1494 09:47:30.704531 ME: Version: 14.0.39.1367
1495 09:47:30.710941 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1496 09:47:30.714123 Initializing devices...
1497 09:47:30.714612 Root Device init ...
1498 09:47:30.720779 Chrome EC: Set SMI mask to 0x0000000000000000
1499 09:47:30.724348 Chrome EC: clear events_b mask to 0x0000000000000000
1500 09:47:30.731092 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 09:47:30.737796 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 09:47:30.744755 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 09:47:30.747098 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 09:47:30.750551 Root Device init finished in 35202 usecs
1505 09:47:30.754170 CPU_CLUSTER: 0 init ...
1506 09:47:30.760752 CPU_CLUSTER: 0 init finished in 2447 usecs
1507 09:47:30.764858 PCI: 00:00.0 init ...
1508 09:47:30.768131 CPU TDP: 15 Watts
1509 09:47:30.771984 CPU PL2 = 64 Watts
1510 09:47:30.775214 PCI: 00:00.0 init finished in 7070 usecs
1511 09:47:30.778238 PCI: 00:02.0 init ...
1512 09:47:30.782011 PCI: 00:02.0 init finished in 2243 usecs
1513 09:47:30.784871 PCI: 00:08.0 init ...
1514 09:47:30.788121 PCI: 00:08.0 init finished in 2252 usecs
1515 09:47:30.791456 PCI: 00:12.0 init ...
1516 09:47:30.794970 PCI: 00:12.0 init finished in 2251 usecs
1517 09:47:30.798337 PCI: 00:14.0 init ...
1518 09:47:30.801398 PCI: 00:14.0 init finished in 2250 usecs
1519 09:47:30.804759 PCI: 00:14.2 init ...
1520 09:47:30.808009 PCI: 00:14.2 init finished in 2251 usecs
1521 09:47:30.811089 PCI: 00:14.3 init ...
1522 09:47:30.814550 PCI: 00:14.3 init finished in 2261 usecs
1523 09:47:30.818124 PCI: 00:15.0 init ...
1524 09:47:30.821046 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 09:47:30.824675 PCI: 00:15.0 init finished in 5975 usecs
1526 09:47:30.827702 PCI: 00:15.1 init ...
1527 09:47:30.831522 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 09:47:30.837653 PCI: 00:15.1 init finished in 5975 usecs
1529 09:47:30.838183 PCI: 00:16.0 init ...
1530 09:47:30.844838 PCI: 00:16.0 init finished in 2252 usecs
1531 09:47:30.847570 PCI: 00:19.0 init ...
1532 09:47:30.850868 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 09:47:30.854317 PCI: 00:19.0 init finished in 5975 usecs
1534 09:47:30.857558 PCI: 00:1d.0 init ...
1535 09:47:30.860700 Initializing PCH PCIe bridge.
1536 09:47:30.864271 PCI: 00:1d.0 init finished in 5274 usecs
1537 09:47:30.867677 PCI: 00:1f.0 init ...
1538 09:47:30.870727 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 09:47:30.877206 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 09:47:30.877654 IOAPIC: ID = 0x02
1541 09:47:30.881042 IOAPIC: Dumping registers
1542 09:47:30.884302 reg 0x0000: 0x02000000
1543 09:47:30.887724 reg 0x0001: 0x00770020
1544 09:47:30.888217 reg 0x0002: 0x00000000
1545 09:47:30.894373 PCI: 00:1f.0 init finished in 23548 usecs
1546 09:47:30.897156 PCI: 00:1f.4 init ...
1547 09:47:30.900424 PCI: 00:1f.4 init finished in 2261 usecs
1548 09:47:30.911264 PCI: 01:00.0 init ...
1549 09:47:30.914291 PCI: 01:00.0 init finished in 2251 usecs
1550 09:47:30.918904 PNP: 0c09.0 init ...
1551 09:47:30.922757 Google Chrome EC uptime: 11.068 seconds
1552 09:47:30.928782 Google Chrome AP resets since EC boot: 0
1553 09:47:30.932223 Google Chrome most recent AP reset causes:
1554 09:47:30.938288 Google Chrome EC reset flags at last EC boot: reset-pin
1555 09:47:30.941935 PNP: 0c09.0 init finished in 20567 usecs
1556 09:47:30.945205 Devices initialized
1557 09:47:30.948741 Show all devs... After init.
1558 09:47:30.949253 Root Device: enabled 1
1559 09:47:30.951680 CPU_CLUSTER: 0: enabled 1
1560 09:47:30.954934 DOMAIN: 0000: enabled 1
1561 09:47:30.955427 APIC: 00: enabled 1
1562 09:47:30.958331 PCI: 00:00.0: enabled 1
1563 09:47:30.962031 PCI: 00:02.0: enabled 1
1564 09:47:30.965094 PCI: 00:04.0: enabled 0
1565 09:47:30.965533 PCI: 00:05.0: enabled 0
1566 09:47:30.968232 PCI: 00:12.0: enabled 1
1567 09:47:30.971450 PCI: 00:12.5: enabled 0
1568 09:47:30.974618 PCI: 00:12.6: enabled 0
1569 09:47:30.975055 PCI: 00:14.0: enabled 1
1570 09:47:30.977916 PCI: 00:14.1: enabled 0
1571 09:47:30.981469 PCI: 00:14.3: enabled 1
1572 09:47:30.981906 PCI: 00:14.5: enabled 0
1573 09:47:30.985149 PCI: 00:15.0: enabled 1
1574 09:47:30.988202 PCI: 00:15.1: enabled 1
1575 09:47:30.991586 PCI: 00:15.2: enabled 0
1576 09:47:30.992064 PCI: 00:15.3: enabled 0
1577 09:47:30.994773 PCI: 00:16.0: enabled 1
1578 09:47:30.998051 PCI: 00:16.1: enabled 0
1579 09:47:31.001531 PCI: 00:16.2: enabled 0
1580 09:47:31.001992 PCI: 00:16.3: enabled 0
1581 09:47:31.004455 PCI: 00:16.4: enabled 0
1582 09:47:31.007701 PCI: 00:16.5: enabled 0
1583 09:47:31.011165 PCI: 00:17.0: enabled 1
1584 09:47:31.011646 PCI: 00:19.0: enabled 1
1585 09:47:31.014388 PCI: 00:19.1: enabled 0
1586 09:47:31.017982 PCI: 00:19.2: enabled 0
1587 09:47:31.021200 PCI: 00:1a.0: enabled 0
1588 09:47:31.021760 PCI: 00:1c.0: enabled 0
1589 09:47:31.024366 PCI: 00:1c.1: enabled 0
1590 09:47:31.027869 PCI: 00:1c.2: enabled 0
1591 09:47:31.028347 PCI: 00:1c.3: enabled 0
1592 09:47:31.030909 PCI: 00:1c.4: enabled 0
1593 09:47:31.034483 PCI: 00:1c.5: enabled 0
1594 09:47:31.037636 PCI: 00:1c.6: enabled 0
1595 09:47:31.038111 PCI: 00:1c.7: enabled 0
1596 09:47:31.041137 PCI: 00:1d.0: enabled 1
1597 09:47:31.044269 PCI: 00:1d.1: enabled 0
1598 09:47:31.047923 PCI: 00:1d.2: enabled 0
1599 09:47:31.048404 PCI: 00:1d.3: enabled 0
1600 09:47:31.050690 PCI: 00:1d.4: enabled 0
1601 09:47:31.054028 PCI: 00:1d.5: enabled 0
1602 09:47:31.057425 PCI: 00:1e.0: enabled 1
1603 09:47:31.057901 PCI: 00:1e.1: enabled 0
1604 09:47:31.060840 PCI: 00:1e.2: enabled 1
1605 09:47:31.063977 PCI: 00:1e.3: enabled 1
1606 09:47:31.064414 PCI: 00:1f.0: enabled 1
1607 09:47:31.067385 PCI: 00:1f.1: enabled 0
1608 09:47:31.070738 PCI: 00:1f.2: enabled 0
1609 09:47:31.074086 PCI: 00:1f.3: enabled 1
1610 09:47:31.074569 PCI: 00:1f.4: enabled 1
1611 09:47:31.077151 PCI: 00:1f.5: enabled 1
1612 09:47:31.080744 PCI: 00:1f.6: enabled 0
1613 09:47:31.083894 USB0 port 0: enabled 1
1614 09:47:31.084368 I2C: 01:15: enabled 1
1615 09:47:31.087331 I2C: 02:5d: enabled 1
1616 09:47:31.090616 GENERIC: 0.0: enabled 1
1617 09:47:31.091094 I2C: 03:1a: enabled 1
1618 09:47:31.093758 I2C: 03:38: enabled 1
1619 09:47:31.097192 I2C: 03:39: enabled 1
1620 09:47:31.097767 I2C: 03:3a: enabled 1
1621 09:47:31.100417 I2C: 03:3b: enabled 1
1622 09:47:31.104108 PCI: 00:00.0: enabled 1
1623 09:47:31.104709 SPI: 00: enabled 1
1624 09:47:31.107177 SPI: 01: enabled 1
1625 09:47:31.110353 PNP: 0c09.0: enabled 1
1626 09:47:31.110854 USB2 port 0: enabled 1
1627 09:47:31.114130 USB2 port 1: enabled 1
1628 09:47:31.117156 USB2 port 2: enabled 0
1629 09:47:31.120618 USB2 port 3: enabled 0
1630 09:47:31.121236 USB2 port 5: enabled 0
1631 09:47:31.123701 USB2 port 6: enabled 1
1632 09:47:31.127086 USB2 port 9: enabled 1
1633 09:47:31.127670 USB3 port 0: enabled 1
1634 09:47:31.130703 USB3 port 1: enabled 1
1635 09:47:31.133459 USB3 port 2: enabled 1
1636 09:47:31.133907 USB3 port 3: enabled 1
1637 09:47:31.137124 USB3 port 4: enabled 0
1638 09:47:31.140141 APIC: 02: enabled 1
1639 09:47:31.140639 APIC: 01: enabled 1
1640 09:47:31.143179 APIC: 03: enabled 1
1641 09:47:31.146668 APIC: 05: enabled 1
1642 09:47:31.147149 APIC: 04: enabled 1
1643 09:47:31.149825 APIC: 06: enabled 1
1644 09:47:31.150273 APIC: 07: enabled 1
1645 09:47:31.153283 PCI: 00:08.0: enabled 1
1646 09:47:31.156183 PCI: 00:14.2: enabled 1
1647 09:47:31.159736 PCI: 01:00.0: enabled 1
1648 09:47:31.163644 Disabling ACPI via APMC:
1649 09:47:31.166766 done.
1650 09:47:31.170107 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 09:47:31.173382 ELOG: NV offset 0xaf0000 size 0x4000
1652 09:47:31.180005 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 09:47:31.186550 ELOG: Event(17) added with size 13 at 2022-08-12 09:47:21 UTC
1654 09:47:31.193751 ELOG: Event(92) added with size 9 at 2022-08-12 09:47:21 UTC
1655 09:47:31.200164 ELOG: Event(93) added with size 9 at 2022-08-12 09:47:21 UTC
1656 09:47:31.207150 ELOG: Event(9A) added with size 9 at 2022-08-12 09:47:21 UTC
1657 09:47:31.213190 ELOG: Event(9E) added with size 10 at 2022-08-12 09:47:21 UTC
1658 09:47:31.220067 ELOG: Event(9F) added with size 14 at 2022-08-12 09:47:21 UTC
1659 09:47:31.223053 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1660 09:47:31.230507 ELOG: Event(A1) added with size 10 at 2022-08-12 09:47:21 UTC
1661 09:47:31.240761 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1662 09:47:31.246897 ELOG: Event(A0) added with size 9 at 2022-08-12 09:47:21 UTC
1663 09:47:31.250059 elog_add_boot_reason: Logged dev mode boot
1664 09:47:31.253796 Finalize devices...
1665 09:47:31.254289 PCI: 00:17.0 final
1666 09:47:31.256569 Devices finalized
1667 09:47:31.260073 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1668 09:47:31.266873 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1669 09:47:31.269822 ME: HFSTS1 : 0x90000245
1670 09:47:31.273051 ME: HFSTS2 : 0x3B850126
1671 09:47:31.279923 ME: HFSTS3 : 0x00000020
1672 09:47:31.283200 ME: HFSTS4 : 0x00004800
1673 09:47:31.286554 ME: HFSTS5 : 0x00000000
1674 09:47:31.289960 ME: HFSTS6 : 0x40400006
1675 09:47:31.293525 ME: Manufacturing Mode : NO
1676 09:47:31.296683 ME: FW Partition Table : OK
1677 09:47:31.299728 ME: Bringup Loader Failure : NO
1678 09:47:31.302852 ME: Firmware Init Complete : YES
1679 09:47:31.306205 ME: Boot Options Present : NO
1680 09:47:31.309580 ME: Update In Progress : NO
1681 09:47:31.313031 ME: D0i3 Support : YES
1682 09:47:31.316273 ME: Low Power State Enabled : NO
1683 09:47:31.319828 ME: CPU Replaced : NO
1684 09:47:31.323095 ME: CPU Replacement Valid : YES
1685 09:47:31.326268 ME: Current Working State : 5
1686 09:47:31.329602 ME: Current Operation State : 1
1687 09:47:31.332711 ME: Current Operation Mode : 0
1688 09:47:31.336133 ME: Error Code : 0
1689 09:47:31.339451 ME: CPU Debug Disabled : YES
1690 09:47:31.342725 ME: TXT Support : NO
1691 09:47:31.349056 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1692 09:47:31.355743 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 09:47:31.356286 CBFS @ c08000 size 3f8000
1694 09:47:31.362176 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 09:47:31.365867 CBFS: Locating 'fallback/dsdt.aml'
1696 09:47:31.369017 CBFS: Found @ offset 10bb80 size 3fa5
1697 09:47:31.375514 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1698 09:47:31.378775 CBFS @ c08000 size 3f8000
1699 09:47:31.385318 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1700 09:47:31.385768 CBFS: Locating 'fallback/slic'
1701 09:47:31.391094 CBFS: 'fallback/slic' not found.
1702 09:47:31.397624 ACPI: Writing ACPI tables at 99b3e000.
1703 09:47:31.398071 ACPI: * FACS
1704 09:47:31.400642 ACPI: * DSDT
1705 09:47:31.404220 Ramoops buffer: 0x100000@0x99a3d000.
1706 09:47:31.407712 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1707 09:47:31.414245 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1708 09:47:31.417418 Google Chrome EC: version:
1709 09:47:31.420981 ro: helios_v2.0.2659-56403530b
1710 09:47:31.424171 rw: helios_v2.0.2849-c41de27e7d
1711 09:47:31.424618 running image: 1
1712 09:47:31.428346 ACPI: * FADT
1713 09:47:31.428796 SCI is IRQ9
1714 09:47:31.434783 ACPI: added table 1/32, length now 40
1715 09:47:31.435231 ACPI: * SSDT
1716 09:47:31.438096 Found 1 CPU(s) with 8 core(s) each.
1717 09:47:31.441914 Error: Could not locate 'wifi_sar' in VPD.
1718 09:47:31.448002 Checking CBFS for default SAR values
1719 09:47:31.451321 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1720 09:47:31.454683 CBFS @ c08000 size 3f8000
1721 09:47:31.461503 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1722 09:47:31.464429 CBFS: Locating 'wifi_sar_defaults.hex'
1723 09:47:31.468356 CBFS: Found @ offset 5fac0 size 77
1724 09:47:31.471285 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1725 09:47:31.477726 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1726 09:47:31.481145 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1727 09:47:31.487913 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1728 09:47:31.490949 failed to find key in VPD: dsm_calib_r0_0
1729 09:47:31.501134 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1730 09:47:31.504528 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1731 09:47:31.510931 failed to find key in VPD: dsm_calib_r0_1
1732 09:47:31.517219 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1733 09:47:31.524346 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1734 09:47:31.527347 failed to find key in VPD: dsm_calib_r0_2
1735 09:47:31.537263 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1736 09:47:31.540628 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1737 09:47:31.547103 failed to find key in VPD: dsm_calib_r0_3
1738 09:47:31.553586 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1739 09:47:31.560513 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1740 09:47:31.563923 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1741 09:47:31.570461 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1742 09:47:31.573560 EC returned error result code 1
1743 09:47:31.577847 EC returned error result code 1
1744 09:47:31.580674 EC returned error result code 1
1745 09:47:31.583800 PS2K: Bad resp from EC. Vivaldi disabled!
1746 09:47:31.590675 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1747 09:47:31.597185 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1748 09:47:31.601003 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1749 09:47:31.607276 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1750 09:47:31.610960 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1751 09:47:31.616754 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1752 09:47:31.623753 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1753 09:47:31.630361 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1754 09:47:31.633687 ACPI: added table 2/32, length now 44
1755 09:47:31.634132 ACPI: * MCFG
1756 09:47:31.640273 ACPI: added table 3/32, length now 48
1757 09:47:31.640717 ACPI: * TPM2
1758 09:47:31.643592 TPM2 log created at 99a2d000
1759 09:47:31.646644 ACPI: added table 4/32, length now 52
1760 09:47:31.650138 ACPI: * MADT
1761 09:47:31.650580 SCI is IRQ9
1762 09:47:31.653330 ACPI: added table 5/32, length now 56
1763 09:47:31.656796 current = 99b43ac0
1764 09:47:31.657261 ACPI: * DMAR
1765 09:47:31.660047 ACPI: added table 6/32, length now 60
1766 09:47:31.663421 ACPI: * IGD OpRegion
1767 09:47:31.666638 GMA: Found VBT in CBFS
1768 09:47:31.669749 GMA: Found valid VBT in CBFS
1769 09:47:31.673642 ACPI: added table 7/32, length now 64
1770 09:47:31.674100 ACPI: * HPET
1771 09:47:31.676746 ACPI: added table 8/32, length now 68
1772 09:47:31.679595 ACPI: done.
1773 09:47:31.683303 ACPI tables: 31744 bytes.
1774 09:47:31.686344 smbios_write_tables: 99a2c000
1775 09:47:31.689813 EC returned error result code 3
1776 09:47:31.693109 Couldn't obtain OEM name from CBI
1777 09:47:31.696432 Create SMBIOS type 17
1778 09:47:31.699819 PCI: 00:00.0 (Intel Cannonlake)
1779 09:47:31.700367 PCI: 00:14.3 (Intel WiFi)
1780 09:47:31.702944 SMBIOS tables: 939 bytes.
1781 09:47:31.706094 Writing table forward entry at 0x00000500
1782 09:47:31.712866 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1783 09:47:31.716346 Writing coreboot table at 0x99b62000
1784 09:47:31.723605 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1785 09:47:31.726179 1. 0000000000001000-000000000009ffff: RAM
1786 09:47:31.732646 2. 00000000000a0000-00000000000fffff: RESERVED
1787 09:47:31.736323 3. 0000000000100000-0000000099a2bfff: RAM
1788 09:47:31.742420 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1789 09:47:31.745750 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1790 09:47:31.752684 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1791 09:47:31.759524 7. 000000009a000000-000000009f7fffff: RESERVED
1792 09:47:31.762469 8. 00000000e0000000-00000000efffffff: RESERVED
1793 09:47:31.769299 9. 00000000fc000000-00000000fc000fff: RESERVED
1794 09:47:31.772040 10. 00000000fe000000-00000000fe00ffff: RESERVED
1795 09:47:31.775433 11. 00000000fed10000-00000000fed17fff: RESERVED
1796 09:47:31.782317 12. 00000000fed80000-00000000fed83fff: RESERVED
1797 09:47:31.785823 13. 00000000fed90000-00000000fed91fff: RESERVED
1798 09:47:31.792310 14. 00000000feda0000-00000000feda1fff: RESERVED
1799 09:47:31.795884 15. 0000000100000000-000000045e7fffff: RAM
1800 09:47:31.798870 Graphics framebuffer located at 0xc0000000
1801 09:47:31.802241 Passing 5 GPIOs to payload:
1802 09:47:31.808588 NAME | PORT | POLARITY | VALUE
1803 09:47:31.811905 write protect | undefined | high | low
1804 09:47:31.818423 lid | undefined | high | high
1805 09:47:31.825046 power | undefined | high | low
1806 09:47:31.828645 oprom | undefined | high | low
1807 09:47:31.834902 EC in RW | 0x000000cb | high | low
1808 09:47:31.835368 Board ID: 4
1809 09:47:31.842180 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1810 09:47:31.842756 CBFS @ c08000 size 3f8000
1811 09:47:31.848346 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1812 09:47:31.854982 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6244
1813 09:47:31.858097 coreboot table: 1492 bytes.
1814 09:47:31.861635 IMD ROOT 0. 99fff000 00001000
1815 09:47:31.864667 IMD SMALL 1. 99ffe000 00001000
1816 09:47:31.867976 FSP MEMORY 2. 99c4e000 003b0000
1817 09:47:31.871533 CONSOLE 3. 99c2e000 00020000
1818 09:47:31.874859 FMAP 4. 99c2d000 0000054e
1819 09:47:31.877894 TIME STAMP 5. 99c2c000 00000910
1820 09:47:31.881195 VBOOT WORK 6. 99c18000 00014000
1821 09:47:31.884485 MRC DATA 7. 99c16000 00001958
1822 09:47:31.887794 ROMSTG STCK 8. 99c15000 00001000
1823 09:47:31.890965 AFTER CAR 9. 99c0b000 0000a000
1824 09:47:31.894252 RAMSTAGE 10. 99baf000 0005c000
1825 09:47:31.897741 REFCODE 11. 99b7a000 00035000
1826 09:47:31.901167 SMM BACKUP 12. 99b6a000 00010000
1827 09:47:31.904233 COREBOOT 13. 99b62000 00008000
1828 09:47:31.907811 ACPI 14. 99b3e000 00024000
1829 09:47:31.911451 ACPI GNVS 15. 99b3d000 00001000
1830 09:47:31.914239 RAMOOPS 16. 99a3d000 00100000
1831 09:47:31.917696 TPM2 TCGLOG17. 99a2d000 00010000
1832 09:47:31.920968 SMBIOS 18. 99a2c000 00000800
1833 09:47:31.924471 IMD small region:
1834 09:47:31.927717 IMD ROOT 0. 99ffec00 00000400
1835 09:47:31.931314 FSP RUNTIME 1. 99ffebe0 00000004
1836 09:47:31.934447 EC HOSTEVENT 2. 99ffebc0 00000008
1837 09:47:31.937958 POWER STATE 3. 99ffeb80 00000040
1838 09:47:31.940879 ROMSTAGE 4. 99ffeb60 00000004
1839 09:47:31.944337 MEM INFO 5. 99ffe9a0 000001b9
1840 09:47:31.947917 VPD 6. 99ffe940 0000004c
1841 09:47:31.950941 MTRR: Physical address space:
1842 09:47:31.957647 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1843 09:47:31.964356 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1844 09:47:31.970837 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1845 09:47:31.973855 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1846 09:47:31.980549 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1847 09:47:31.987123 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1848 09:47:31.993627 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1849 09:47:31.997402 MTRR: Fixed MSR 0x250 0x0606060606060606
1850 09:47:32.003357 MTRR: Fixed MSR 0x258 0x0606060606060606
1851 09:47:32.007378 MTRR: Fixed MSR 0x259 0x0000000000000000
1852 09:47:32.010109 MTRR: Fixed MSR 0x268 0x0606060606060606
1853 09:47:32.013658 MTRR: Fixed MSR 0x269 0x0606060606060606
1854 09:47:32.020443 MTRR: Fixed MSR 0x26a 0x0606060606060606
1855 09:47:32.023766 MTRR: Fixed MSR 0x26b 0x0606060606060606
1856 09:47:32.027100 MTRR: Fixed MSR 0x26c 0x0606060606060606
1857 09:47:32.030108 MTRR: Fixed MSR 0x26d 0x0606060606060606
1858 09:47:32.036699 MTRR: Fixed MSR 0x26e 0x0606060606060606
1859 09:47:32.039942 MTRR: Fixed MSR 0x26f 0x0606060606060606
1860 09:47:32.043314 call enable_fixed_mtrr()
1861 09:47:32.046535 CPU physical address size: 39 bits
1862 09:47:32.049835 MTRR: default type WB/UC MTRR counts: 6/8.
1863 09:47:32.052929 MTRR: WB selected as default type.
1864 09:47:32.060069 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1865 09:47:32.066501 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1866 09:47:32.073015 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1867 09:47:32.079671 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1868 09:47:32.086479 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1869 09:47:32.092703 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1870 09:47:32.096133 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 09:47:32.099091 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 09:47:32.105933 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 09:47:32.109219 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 09:47:32.112545 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 09:47:32.115893 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 09:47:32.119797 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 09:47:32.125824 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 09:47:32.129521 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 09:47:32.132653 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 09:47:32.135738 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 09:47:32.136185
1882 09:47:32.139325 MTRR check
1883 09:47:32.142211 Fixed MTRRs : Enabled
1884 09:47:32.142660 Variable MTRRs: Enabled
1885 09:47:32.143031
1886 09:47:32.146319 call enable_fixed_mtrr()
1887 09:47:32.148712 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 09:47:32.155873 MTRR: Fixed MSR 0x258 0x0606060606060606
1889 09:47:32.158691 MTRR: Fixed MSR 0x259 0x0000000000000000
1890 09:47:32.162202 MTRR: Fixed MSR 0x268 0x0606060606060606
1891 09:47:32.165506 MTRR: Fixed MSR 0x269 0x0606060606060606
1892 09:47:32.172156 MTRR: Fixed MSR 0x26a 0x0606060606060606
1893 09:47:32.175180 MTRR: Fixed MSR 0x26b 0x0606060606060606
1894 09:47:32.178923 MTRR: Fixed MSR 0x26c 0x0606060606060606
1895 09:47:32.182291 MTRR: Fixed MSR 0x26d 0x0606060606060606
1896 09:47:32.188640 MTRR: Fixed MSR 0x26e 0x0606060606060606
1897 09:47:32.191819 MTRR: Fixed MSR 0x26f 0x0606060606060606
1898 09:47:32.195511 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 09:47:32.198532 call enable_fixed_mtrr()
1900 09:47:32.201845 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 09:47:32.204978 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 09:47:32.211418 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 09:47:32.214858 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 09:47:32.218944 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 09:47:32.222291 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 09:47:32.228408 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 09:47:32.231861 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 09:47:32.235061 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 09:47:32.238545 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 09:47:32.241366 CPU physical address size: 39 bits
1911 09:47:32.244877 call enable_fixed_mtrr()
1912 09:47:32.251174 MTRR: Fixed MSR 0x250 0x0606060606060606
1913 09:47:32.254561 MTRR: Fixed MSR 0x250 0x0606060606060606
1914 09:47:32.258110 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 09:47:32.261099 MTRR: Fixed MSR 0x259 0x0000000000000000
1916 09:47:32.267728 MTRR: Fixed MSR 0x268 0x0606060606060606
1917 09:47:32.271054 MTRR: Fixed MSR 0x269 0x0606060606060606
1918 09:47:32.274664 MTRR: Fixed MSR 0x26a 0x0606060606060606
1919 09:47:32.277616 MTRR: Fixed MSR 0x26b 0x0606060606060606
1920 09:47:32.284203 MTRR: Fixed MSR 0x26c 0x0606060606060606
1921 09:47:32.287731 MTRR: Fixed MSR 0x26d 0x0606060606060606
1922 09:47:32.290802 MTRR: Fixed MSR 0x26e 0x0606060606060606
1923 09:47:32.293940 MTRR: Fixed MSR 0x26f 0x0606060606060606
1924 09:47:32.300535 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 09:47:32.304038 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 09:47:32.307233 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 09:47:32.310828 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 09:47:32.314498 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 09:47:32.320495 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 09:47:32.324057 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 09:47:32.327483 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 09:47:32.330502 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 09:47:32.337115 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 09:47:32.340474 call enable_fixed_mtrr()
1935 09:47:32.340913 call enable_fixed_mtrr()
1936 09:47:32.343820 CPU physical address size: 39 bits
1937 09:47:32.350443 CPU physical address size: 39 bits
1938 09:47:32.353793 MTRR: Fixed MSR 0x250 0x0606060606060606
1939 09:47:32.357331 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 09:47:32.360410 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 09:47:32.363313 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 09:47:32.370178 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 09:47:32.373566 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 09:47:32.377030 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 09:47:32.380159 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 09:47:32.386958 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 09:47:32.390043 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 09:47:32.393536 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 09:47:32.396880 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 09:47:32.403345 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 09:47:32.406301 MTRR: Fixed MSR 0x259 0x0000000000000000
1952 09:47:32.409580 MTRR: Fixed MSR 0x268 0x0606060606060606
1953 09:47:32.413192 MTRR: Fixed MSR 0x269 0x0606060606060606
1954 09:47:32.419620 MTRR: Fixed MSR 0x26a 0x0606060606060606
1955 09:47:32.423282 MTRR: Fixed MSR 0x26b 0x0606060606060606
1956 09:47:32.426652 MTRR: Fixed MSR 0x26c 0x0606060606060606
1957 09:47:32.430154 MTRR: Fixed MSR 0x26d 0x0606060606060606
1958 09:47:32.436394 MTRR: Fixed MSR 0x26e 0x0606060606060606
1959 09:47:32.439240 MTRR: Fixed MSR 0x26f 0x0606060606060606
1960 09:47:32.442761 call enable_fixed_mtrr()
1961 09:47:32.445832 call enable_fixed_mtrr()
1962 09:47:32.449193 CPU physical address size: 39 bits
1963 09:47:32.452343 CPU physical address size: 39 bits
1964 09:47:32.455960 CPU physical address size: 39 bits
1965 09:47:32.458957 CPU physical address size: 39 bits
1966 09:47:32.465680 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1967 09:47:32.469139 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1968 09:47:32.472063 CBFS @ c08000 size 3f8000
1969 09:47:32.478545 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1970 09:47:32.482044 CBFS: Locating 'fallback/payload'
1971 09:47:32.485405 CBFS: Found @ offset 1c96c0 size 3f798
1972 09:47:32.492040 Checking segment from ROM address 0xffdd16f8
1973 09:47:32.495369 Checking segment from ROM address 0xffdd1714
1974 09:47:32.498668 Loading segment from ROM address 0xffdd16f8
1975 09:47:32.502374 code (compression=0)
1976 09:47:32.511716 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1977 09:47:32.518227 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1978 09:47:32.521926 it's not compressed!
1979 09:47:32.613434 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1980 09:47:32.620111 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1981 09:47:32.623738 Loading segment from ROM address 0xffdd1714
1982 09:47:32.627038 Entry Point 0x30000000
1983 09:47:32.630180 Loaded segments
1984 09:47:32.635752 Finalizing chipset.
1985 09:47:32.638789 Finalizing SMM.
1986 09:47:32.642057 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1987 09:47:32.645381 mp_park_aps done after 0 msecs.
1988 09:47:32.652057 Jumping to boot code at 30000000(99b62000)
1989 09:47:32.658543 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1990 09:47:32.658993
1991 09:47:32.662221 Starting depthcharge on Helios...
1992 09:47:32.663311 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1993 09:47:32.663847 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1994 09:47:32.664276 Setting prompt string to ['hatch:']
1995 09:47:32.664683 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1996 09:47:32.672180 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1997 09:47:32.678723 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1998 09:47:32.685007 board_setup: Info: eMMC controller not present; skipping
1999 09:47:32.688111 New NVMe Controller 0x30053ac0 @ 00:1d:00
2000 09:47:32.695401 board_setup: Info: SDHCI controller not present; skipping
2001 09:47:32.701490 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2002 09:47:32.701933 Wipe memory regions:
2003 09:47:32.705013 [0x00000000001000, 0x000000000a0000)
2004 09:47:32.708230 [0x00000000100000, 0x00000030000000)
2005 09:47:32.777909 [0x00000030657430, 0x00000099a2c000)
2006 09:47:32.927737 [0x00000100000000, 0x0000045e800000)
2007 09:47:34.383848 R8152: Initializing
2008 09:47:34.387210 Version 9 (ocp_data = 6010)
2009 09:47:34.391463 R8152: Done initializing
2010 09:47:34.394298 Adding net device
2011 09:47:34.769332 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2012 09:47:34.769880
2013 09:47:34.770655 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2015 09:47:34.872427 hatch: tftpboot 192.168.201.1 7022961/tftp-deploy-ml9iueij/kernel/bzImage 7022961/tftp-deploy-ml9iueij/kernel/cmdline 7022961/tftp-deploy-ml9iueij/ramdisk/ramdisk.cpio.gz
2016 09:47:34.873049 Setting prompt string to 'Starting kernel'
2017 09:47:34.873460 Setting prompt string to ['Starting kernel']
2018 09:47:34.873807 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2019 09:47:34.874162 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:38)
2020 09:47:34.877919 tftpboot 192.168.201.1 7022961/tftp-deploy-ml9iueij/kernel/bzImoy-ml9iueij/kernel/cmdline 7022961/tftp-deploy-ml9iueij/ramdisk/ramdisk.cpio.gz
2021 09:47:34.878370 Waiting for link
2022 09:47:35.078766 done.
2023 09:47:35.079406 MAC: f4:f5:e8:50:e3:ec
2024 09:47:35.082207 Sending DHCP discover... done.
2025 09:47:35.085040 Waiting for reply... done.
2026 09:47:35.089131 Sending DHCP request... done.
2027 09:47:35.091599 Waiting for reply... done.
2028 09:47:35.095046 My ip is 192.168.201.10
2029 09:47:35.097997 The DHCP server ip is 192.168.201.1
2030 09:47:35.101978 TFTP server IP predefined by user: 192.168.201.1
2031 09:47:35.108220 Bootfile predefined by user: 7022961/tftp-deploy-ml9iueij/kernel/bzImage
2032 09:47:35.111349 Sending tftp read request... done.
2033 09:47:35.118827 Waiting for the transfer...
2034 09:47:35.383651 00000000 ################################################################
2035 09:47:35.621187 00080000 ################################################################
2036 09:47:35.865186 00100000 ################################################################
2037 09:47:36.119445 00180000 ################################################################
2038 09:47:36.394573 00200000 ################################################################
2039 09:47:36.631224 00280000 ################################################################
2040 09:47:36.884412 00300000 ################################################################
2041 09:47:37.131803 00380000 ################################################################
2042 09:47:37.409946 00400000 ################################################################
2043 09:47:37.688607 00480000 ################################################################
2044 09:47:37.932108 00500000 ################################################################
2045 09:47:38.195670 00580000 ################################################################
2046 09:47:38.441011 00600000 ################################################################ done.
2047 09:47:38.444166 The bootfile was 6815632 bytes long.
2048 09:47:38.447429 Sending tftp read request... done.
2049 09:47:38.450727 Waiting for the transfer...
2050 09:47:38.729858 00000000 ################################################################
2051 09:47:38.978125 00080000 ################################################################
2052 09:47:39.239942 00100000 ################################################################
2053 09:47:39.490813 00180000 ################################################################
2054 09:47:39.730190 00200000 ################################################################
2055 09:47:39.984355 00280000 ################################################################
2056 09:47:40.269225 00300000 ################################################################
2057 09:47:40.555897 00380000 ################################################################
2058 09:47:40.839290 00400000 ################################################################
2059 09:47:41.119795 00480000 ################################################################
2060 09:47:41.247593 00500000 ############################# done.
2061 09:47:41.250674 Sending tftp read request... done.
2062 09:47:41.254179 Waiting for the transfer...
2063 09:47:41.254276 00000000 # done.
2064 09:47:41.263846 Command line loaded dynamically from TFTP file: 7022961/tftp-deploy-ml9iueij/kernel/cmdline
2065 09:47:41.287046 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7022961/extract-nfsrootfs-i0mjvgvr,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2066 09:47:41.293756 ec_init(0): CrosEC protocol v3 supported (256, 256)
2067 09:47:41.297395 Shutting down all USB controllers.
2068 09:47:41.300315 Removing current net device
2069 09:47:41.304061 Finalizing coreboot
2070 09:47:41.310638 Exiting depthcharge with code 4 at timestamp: 15932089
2071 09:47:41.311093
2072 09:47:41.311541 Starting kernel ...
2073 09:47:41.311968
2074 09:47:41.312894 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2075 09:47:41.313485 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2076 09:47:41.313917 Setting prompt string to ['Linux version [0-9]']
2077 09:47:41.314367 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2078 09:47:41.314809 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2079 09:47:41.315820
2081 09:52:13.313711 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2083 09:52:13.314073 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2085 09:52:13.314359 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2088 09:52:13.314786 end: 2 depthcharge-action (duration 00:05:00) [common]
2090 09:52:13.315014 Cleaning after the job
2091 09:52:13.315115 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022961/tftp-deploy-ml9iueij/ramdisk
2092 09:52:13.315649 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022961/tftp-deploy-ml9iueij/kernel
2093 09:52:13.316208 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022961/tftp-deploy-ml9iueij/nfsrootfs
2094 09:52:13.372169 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022961/tftp-deploy-ml9iueij/modules
2095 09:52:13.372500 start: 4.1 power-off (timeout 00:00:30) [common]
2096 09:52:13.372702 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2097 09:52:13.393930 >> Command sent successfully.
2098 09:52:13.396014 Returned 0 in 0 seconds
2099 09:52:13.496825 end: 4.1 power-off (duration 00:00:00) [common]
2101 09:52:13.497242 start: 4.2 read-feedback (timeout 00:10:00) [common]
2102 09:52:13.497543 Listened to connection for namespace 'common' for up to 1s
2103 09:52:14.351031 Listened to connection for namespace 'common' for up to 1s
2104 09:52:14.354440 Listened to connection for namespace 'common' for up to 1s
2105 09:52:14.358278 Listened to connection for namespace 'common' for up to 1s
2106 09:52:14.360959 Listened to connection for namespace 'common' for up to 1s
2107 09:52:14.364314 Listened to connection for namespace 'common' for up to 1s
2108 09:52:14.367364 Listened to connection for namespace 'common' for up to 1s
2109 09:52:14.370881 Listened to connection for namespace 'common' for up to 1s
2110 09:52:14.374284 Listened to connection for namespace 'common' for up to 1s
2111 09:52:14.377571 Listened to connection for namespace 'common' for up to 1s
2112 09:52:14.381270 Listened to connection for namespace 'common' for up to 1s
2113 09:52:14.384520 Listened to connection for namespace 'common' for up to 1s
2114 09:52:14.387732 Listened to connection for namespace 'common' for up to 1s
2115 09:52:14.391068 Listened to connection for namespace 'common' for up to 1s
2116 09:52:14.394556 Listened to connection for namespace 'common' for up to 1s
2117 09:52:14.397520 Listened to connection for namespace 'common' for up to 1s
2118 09:52:14.404336 Listened to connection for namespace 'common' for up to 1s
2119 09:52:14.407391 Listened to connection for namespace 'common' for up to 1s
2120 09:52:14.498139 Finalising connection for namespace 'common'
2121 09:52:14.498826 Disconnecting from shell: Finalise
2122 09:52:14.499237
2123 09:52:14.600672 end: 4.2 read-feedback (duration 00:00:01) [common]
2124 09:52:14.601317 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7022961
2125 09:52:14.769383 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7022961
2126 09:52:14.769590 JobError: Your job cannot terminate cleanly.