Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:05:44.808180 lava-dispatcher, installed at version: 2023.01
2 12:05:44.808395 start: 0 validate
3 12:05:44.808535 Start time: 2023-04-03 12:05:44.808527+00:00 (UTC)
4 12:05:44.808665 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:05:44.808797 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230324.0%2Fx86%2Frootfs.cpio.gz exists
6 12:05:45.103338 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:05:45.104148 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1097-g52d843097a439%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:05:47.614977 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:05:47.615737 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1097-g52d843097a439%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:05:48.619900 validate duration: 3.81
12 12:05:48.620185 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:05:48.620298 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:05:48.620385 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:05:48.620527 Not decompressing ramdisk as can be used compressed.
16 12:05:48.620653 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230324.0/x86/rootfs.cpio.gz
17 12:05:48.620725 saving as /var/lib/lava/dispatcher/tmp/9849948/tftp-deploy-ejbb8oel/ramdisk/rootfs.cpio.gz
18 12:05:48.620785 total size: 8429597 (8MB)
19 12:05:48.621937 progress 0% (0MB)
20 12:05:48.624211 progress 5% (0MB)
21 12:05:48.626581 progress 10% (0MB)
22 12:05:48.628831 progress 15% (1MB)
23 12:05:48.631110 progress 20% (1MB)
24 12:05:48.633355 progress 25% (2MB)
25 12:05:48.635577 progress 30% (2MB)
26 12:05:48.637929 progress 35% (2MB)
27 12:05:48.639996 progress 40% (3MB)
28 12:05:48.642324 progress 45% (3MB)
29 12:05:48.644549 progress 50% (4MB)
30 12:05:48.646823 progress 55% (4MB)
31 12:05:48.648987 progress 60% (4MB)
32 12:05:48.651191 progress 65% (5MB)
33 12:05:48.653368 progress 70% (5MB)
34 12:05:48.655503 progress 75% (6MB)
35 12:05:48.658061 progress 80% (6MB)
36 12:05:48.660254 progress 85% (6MB)
37 12:05:48.662525 progress 90% (7MB)
38 12:05:48.664794 progress 95% (7MB)
39 12:05:48.667124 progress 100% (8MB)
40 12:05:48.667263 8MB downloaded in 0.05s (172.98MB/s)
41 12:05:48.667410 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:05:48.667648 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:05:48.667733 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:05:48.667815 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:05:48.667923 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1097-g52d843097a439/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:05:48.667992 saving as /var/lib/lava/dispatcher/tmp/9849948/tftp-deploy-ejbb8oel/kernel/bzImage
48 12:05:48.668052 total size: 7880592 (7MB)
49 12:05:48.668111 No compression specified
50 12:05:48.669291 progress 0% (0MB)
51 12:05:48.671453 progress 5% (0MB)
52 12:05:48.673608 progress 10% (0MB)
53 12:05:48.675662 progress 15% (1MB)
54 12:05:48.677680 progress 20% (1MB)
55 12:05:48.679646 progress 25% (1MB)
56 12:05:48.681651 progress 30% (2MB)
57 12:05:48.683636 progress 35% (2MB)
58 12:05:48.685679 progress 40% (3MB)
59 12:05:48.687741 progress 45% (3MB)
60 12:05:48.689707 progress 50% (3MB)
61 12:05:48.691656 progress 55% (4MB)
62 12:05:48.693648 progress 60% (4MB)
63 12:05:48.695576 progress 65% (4MB)
64 12:05:48.697584 progress 70% (5MB)
65 12:05:48.699480 progress 75% (5MB)
66 12:05:48.701374 progress 80% (6MB)
67 12:05:48.703292 progress 85% (6MB)
68 12:05:48.705259 progress 90% (6MB)
69 12:05:48.707242 progress 95% (7MB)
70 12:05:48.709213 progress 100% (7MB)
71 12:05:48.709377 7MB downloaded in 0.04s (181.89MB/s)
72 12:05:48.709555 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:05:48.709819 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:05:48.709905 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:05:48.709987 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:05:48.710138 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1097-g52d843097a439/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:05:48.710235 saving as /var/lib/lava/dispatcher/tmp/9849948/tftp-deploy-ejbb8oel/modules/modules.tar
79 12:05:48.710296 total size: 250852 (0MB)
80 12:05:48.710369 Using unxz to decompress xz
81 12:05:48.714174 progress 13% (0MB)
82 12:05:48.714596 progress 26% (0MB)
83 12:05:48.714890 progress 39% (0MB)
84 12:05:48.716221 progress 52% (0MB)
85 12:05:48.718260 progress 65% (0MB)
86 12:05:48.720218 progress 78% (0MB)
87 12:05:48.722069 progress 91% (0MB)
88 12:05:48.723884 progress 100% (0MB)
89 12:05:48.729343 0MB downloaded in 0.02s (12.56MB/s)
90 12:05:48.729636 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:05:48.729928 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:05:48.730021 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 12:05:48.730120 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 12:05:48.730248 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:05:48.730362 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 12:05:48.730555 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv
98 12:05:48.730671 makedir: /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin
99 12:05:48.730773 makedir: /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/tests
100 12:05:48.730853 makedir: /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/results
101 12:05:48.730964 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-add-keys
102 12:05:48.731105 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-add-sources
103 12:05:48.731232 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-background-process-start
104 12:05:48.731341 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-background-process-stop
105 12:05:48.731450 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-common-functions
106 12:05:48.731585 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-echo-ipv4
107 12:05:48.731695 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-install-packages
108 12:05:48.731804 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-installed-packages
109 12:05:48.731909 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-os-build
110 12:05:48.732030 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-probe-channel
111 12:05:48.732153 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-probe-ip
112 12:05:48.732259 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-target-ip
113 12:05:48.732378 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-target-mac
114 12:05:48.732498 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-target-storage
115 12:05:48.732608 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-test-case
116 12:05:48.732714 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-test-event
117 12:05:48.732845 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-test-feedback
118 12:05:48.732950 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-test-raise
119 12:05:48.733056 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-test-reference
120 12:05:48.733171 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-test-runner
121 12:05:48.733305 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-test-set
122 12:05:48.733411 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-test-shell
123 12:05:48.733555 Updating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-install-packages (oe)
124 12:05:48.733666 Updating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/bin/lava-installed-packages (oe)
125 12:05:48.733845 Creating /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/environment
126 12:05:48.733978 LAVA metadata
127 12:05:48.734049 - LAVA_JOB_ID=9849948
128 12:05:48.734112 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:05:48.734243 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 12:05:48.734310 skipped lava-vland-overlay
131 12:05:48.734385 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:05:48.734464 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 12:05:48.734527 skipped lava-multinode-overlay
134 12:05:48.734602 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:05:48.734708 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 12:05:48.734780 Loading test definitions
137 12:05:48.734875 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 12:05:48.734945 Using /lava-9849948 at stage 0
139 12:05:48.735219 uuid=9849948_1.4.2.3.1 testdef=None
140 12:05:48.735305 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:05:48.735389 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 12:05:48.735896 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:05:48.736144 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 12:05:48.736710 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:05:48.736939 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 12:05:48.737528 runner path: /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/0/tests/0_dmesg test_uuid 9849948_1.4.2.3.1
149 12:05:48.737711 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:05:48.737931 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 12:05:48.738030 Using /lava-9849948 at stage 1
153 12:05:48.738256 uuid=9849948_1.4.2.3.5 testdef=None
154 12:05:48.738339 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:05:48.738421 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 12:05:48.738868 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:05:48.739110 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 12:05:48.739646 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:05:48.739869 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 12:05:48.740418 runner path: /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/1/tests/1_bootrr test_uuid 9849948_1.4.2.3.5
163 12:05:48.740551 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:05:48.740751 Creating lava-test-runner.conf files
166 12:05:48.740849 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/0 for stage 0
167 12:05:48.740928 - 0_dmesg
168 12:05:48.741004 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849948/lava-overlay-s3hbhyjv/lava-9849948/1 for stage 1
169 12:05:48.741084 - 1_bootrr
170 12:05:48.741169 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:05:48.741267 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 12:05:48.749278 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:05:48.749391 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 12:05:48.749496 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:05:48.749597 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:05:48.749681 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 12:05:48.959737 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:05:48.960122 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 12:05:48.960244 extracting modules file /var/lib/lava/dispatcher/tmp/9849948/tftp-deploy-ejbb8oel/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849948/extract-overlay-ramdisk-tg9p8i6v/ramdisk
180 12:05:48.968224 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:05:48.968350 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 12:05:48.968445 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849948/compress-overlay-qmu0_1x5/overlay-1.4.2.4.tar.gz to ramdisk
183 12:05:48.968519 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849948/compress-overlay-qmu0_1x5/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9849948/extract-overlay-ramdisk-tg9p8i6v/ramdisk
184 12:05:48.974663 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:05:48.974784 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 12:05:48.974886 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:05:48.974978 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 12:05:48.975060 Building ramdisk /var/lib/lava/dispatcher/tmp/9849948/extract-overlay-ramdisk-tg9p8i6v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9849948/extract-overlay-ramdisk-tg9p8i6v/ramdisk
189 12:05:49.063743 >> 49788 blocks
190 12:05:49.905965 rename /var/lib/lava/dispatcher/tmp/9849948/extract-overlay-ramdisk-tg9p8i6v/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9849948/tftp-deploy-ejbb8oel/ramdisk/ramdisk.cpio.gz
191 12:05:49.906434 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:05:49.906569 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 12:05:49.906671 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 12:05:49.906767 No mkimage arch provided, not using FIT.
195 12:05:49.906857 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:05:49.906943 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:05:49.907045 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:05:49.907136 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 12:05:49.907214 No LXC device requested
200 12:05:49.907292 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:05:49.907376 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 12:05:49.907453 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:05:49.907527 Checking files for TFTP limit of 4294967296 bytes.
204 12:05:49.907958 end: 1 tftp-deploy (duration 00:00:01) [common]
205 12:05:49.908063 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:05:49.908151 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:05:49.908266 substitutions:
208 12:05:49.908334 - {DTB}: None
209 12:05:49.908394 - {INITRD}: 9849948/tftp-deploy-ejbb8oel/ramdisk/ramdisk.cpio.gz
210 12:05:49.908451 - {KERNEL}: 9849948/tftp-deploy-ejbb8oel/kernel/bzImage
211 12:05:49.908507 - {LAVA_MAC}: None
212 12:05:49.908562 - {PRESEED_CONFIG}: None
213 12:05:49.908616 - {PRESEED_LOCAL}: None
214 12:05:49.908669 - {RAMDISK}: 9849948/tftp-deploy-ejbb8oel/ramdisk/ramdisk.cpio.gz
215 12:05:49.908723 - {ROOT_PART}: None
216 12:05:49.908775 - {ROOT}: None
217 12:05:49.908828 - {SERVER_IP}: 192.168.201.1
218 12:05:49.908880 - {TEE}: None
219 12:05:49.908932 Parsed boot commands:
220 12:05:49.908984 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:05:49.909136 Parsed boot commands: tftpboot 192.168.201.1 9849948/tftp-deploy-ejbb8oel/kernel/bzImage 9849948/tftp-deploy-ejbb8oel/kernel/cmdline 9849948/tftp-deploy-ejbb8oel/ramdisk/ramdisk.cpio.gz
222 12:05:49.909221 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:05:49.909299 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:05:49.909386 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:05:49.909481 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:05:49.909585 Not connected, no need to disconnect.
227 12:05:49.909661 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:05:49.909740 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:05:49.909813 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
230 12:05:49.913172 Setting prompt string to ['lava-test: # ']
231 12:05:49.913552 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:05:49.913658 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:05:49.913752 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:05:49.913845 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:05:49.914220 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
236 12:05:55.043967 >> Command sent successfully.
237 12:05:55.046442 Returned 0 in 5 seconds
238 12:05:55.147254 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 12:05:55.147619 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 12:05:55.147735 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 12:05:55.147835 Setting prompt string to 'Starting depthcharge on Voema...'
243 12:05:55.147912 Changing prompt to 'Starting depthcharge on Voema...'
244 12:05:55.148001 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 12:05:55.148363 [Enter `^Ec?' for help]
246 12:05:56.750374
247 12:05:56.750536
248 12:05:56.760749 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 12:05:56.763520 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 12:05:56.770344 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 12:05:56.773667 CPU: AES supported, TXT NOT supported, VT supported
252 12:05:56.780226 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 12:05:56.786710 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 12:05:56.790444 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 12:05:56.793401 VBOOT: Loading verstage.
256 12:05:56.796821 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 12:05:56.803599 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 12:05:56.806873 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 12:05:56.817368 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 12:05:56.824172 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 12:05:56.824260
262 12:05:56.824347
263 12:05:56.837208 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 12:05:56.851263 Probing TPM: . done!
265 12:05:56.854303 TPM ready after 0 ms
266 12:05:56.857803 Connected to device vid:did:rid of 1ae0:0028:00
267 12:05:56.869377 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
268 12:05:56.875500 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 12:05:56.878953 Initialized TPM device CR50 revision 0
270 12:05:56.950625 tlcl_send_startup: Startup return code is 0
271 12:05:56.950766 TPM: setup succeeded
272 12:05:56.965840 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 12:05:56.980354 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 12:05:56.993345 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 12:05:57.002838 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 12:05:57.006670 Chrome EC: UHEPI supported
277 12:05:57.009873 Phase 1
278 12:05:57.013453 FMAP: area GBB found @ 1805000 (458752 bytes)
279 12:05:57.023267 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 12:05:57.030039 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 12:05:57.036268 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 12:05:57.043098 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 12:05:57.046382 Recovery requested (1009000e)
284 12:05:57.049841 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 12:05:57.061218 tlcl_extend: response is 0
286 12:05:57.067948 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 12:05:57.077877 tlcl_extend: response is 0
288 12:05:57.084218 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 12:05:57.091133 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 12:05:57.097460 BS: verstage times (exec / console): total (unknown) / 142 ms
291 12:05:57.097582
292 12:05:57.097649
293 12:05:57.110682 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 12:05:57.117477 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 12:05:57.121037 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 12:05:57.123984 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 12:05:57.130578 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 12:05:57.134065 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 12:05:57.137379 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
300 12:05:57.140611 TCO_STS: 0000 0000
301 12:05:57.144014 GEN_PMCON: d0015038 00002200
302 12:05:57.147478 GBLRST_CAUSE: 00000000 00000000
303 12:05:57.147562 HPR_CAUSE0: 00000000
304 12:05:57.150772 prev_sleep_state 5
305 12:05:57.153998 Boot Count incremented to 18026
306 12:05:57.160873 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 12:05:57.167276 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 12:05:57.174048 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 12:05:57.180754 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 12:05:57.185161 Chrome EC: UHEPI supported
311 12:05:57.191779 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 12:05:57.204863 Probing TPM: done!
313 12:05:57.211693 Connected to device vid:did:rid of 1ae0:0028:00
314 12:05:57.221691 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
315 12:05:57.225309 Initialized TPM device CR50 revision 0
316 12:05:57.239931 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 12:05:57.246478 MRC: Hash idx 0x100b comparison successful.
318 12:05:57.249650 MRC cache found, size faa8
319 12:05:57.249734 bootmode is set to: 2
320 12:05:57.253148 SPD index = 0
321 12:05:57.259774 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 12:05:57.262843 SPD: module type is LPDDR4X
323 12:05:57.266197 SPD: module part number is MT53E512M64D4NW-046
324 12:05:57.272901 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 12:05:57.276294 SPD: device width 16 bits, bus width 16 bits
326 12:05:57.282780 SPD: module size is 1024 MB (per channel)
327 12:05:57.713504 CBMEM:
328 12:05:57.716779 IMD: root @ 0x76fff000 254 entries.
329 12:05:57.720224 IMD: root @ 0x76ffec00 62 entries.
330 12:05:57.723642 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 12:05:57.729848 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 12:05:57.733140 External stage cache:
333 12:05:57.736456 IMD: root @ 0x7b3ff000 254 entries.
334 12:05:57.739614 IMD: root @ 0x7b3fec00 62 entries.
335 12:05:57.755172 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 12:05:57.761936 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 12:05:57.768595 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 12:05:57.782896 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 12:05:57.786831 cse_lite: Skip switching to RW in the recovery path
340 12:05:57.790326 8 DIMMs found
341 12:05:57.790416 SMM Memory Map
342 12:05:57.793597 SMRAM : 0x7b000000 0x800000
343 12:05:57.796939 Subregion 0: 0x7b000000 0x200000
344 12:05:57.800133 Subregion 1: 0x7b200000 0x200000
345 12:05:57.804087 Subregion 2: 0x7b400000 0x400000
346 12:05:57.807213 top_of_ram = 0x77000000
347 12:05:57.813580 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 12:05:57.817239 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 12:05:57.823318 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 12:05:57.826904 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 12:05:57.833323 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 12:05:57.840094 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 12:05:57.852075 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 12:05:57.858432 Processing 211 relocs. Offset value of 0x74c0b000
355 12:05:57.865092 BS: romstage times (exec / console): total (unknown) / 277 ms
356 12:05:57.871091
357 12:05:57.871188
358 12:05:57.881237 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 12:05:57.884543 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 12:05:57.894804 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 12:05:57.901158 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 12:05:57.907511 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 12:05:57.914807 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 12:05:57.961346 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 12:05:57.967965 Processing 5008 relocs. Offset value of 0x75d98000
366 12:05:57.971358 BS: postcar times (exec / console): total (unknown) / 59 ms
367 12:05:57.971447
368 12:05:57.974625
369 12:05:57.985187 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 12:05:57.985279 Normal boot
371 12:05:57.988580 FW_CONFIG value is 0x804c02
372 12:05:57.991657 PCI: 00:07.0 disabled by fw_config
373 12:05:57.995344 PCI: 00:07.1 disabled by fw_config
374 12:05:57.998683 PCI: 00:0d.2 disabled by fw_config
375 12:05:58.001548 PCI: 00:1c.7 disabled by fw_config
376 12:05:58.008340 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 12:05:58.015041 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 12:05:58.018238 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 12:05:58.021907 GENERIC: 0.0 disabled by fw_config
380 12:05:58.024781 GENERIC: 1.0 disabled by fw_config
381 12:05:58.031488 fw_config match found: DB_USB=USB3_ACTIVE
382 12:05:58.034799 fw_config match found: DB_USB=USB3_ACTIVE
383 12:05:58.038284 fw_config match found: DB_USB=USB3_ACTIVE
384 12:05:58.041635 fw_config match found: DB_USB=USB3_ACTIVE
385 12:05:58.048160 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 12:05:58.054568 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 12:05:58.061342 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 12:05:58.071255 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 12:05:58.074564 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 12:05:58.081032 microcode: Update skipped, already up-to-date
391 12:05:58.087705 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 12:05:58.114711 Detected 4 core, 8 thread CPU.
393 12:05:58.117943 Setting up SMI for CPU
394 12:05:58.121363 IED base = 0x7b400000
395 12:05:58.121450 IED size = 0x00400000
396 12:05:58.124686 Will perform SMM setup.
397 12:05:58.131323 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 12:05:58.137986 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 12:05:58.144604 Processing 16 relocs. Offset value of 0x00030000
400 12:05:58.148547 Attempting to start 7 APs
401 12:05:58.151323 Waiting for 10ms after sending INIT.
402 12:05:58.166678 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 12:05:58.170041 AP: slot 6 apic_id 4.
404 12:05:58.173314 AP: slot 2 apic_id 5.
405 12:05:58.173400 AP: slot 4 apic_id 3.
406 12:05:58.176930 AP: slot 5 apic_id 2.
407 12:05:58.177023 done.
408 12:05:58.180272 AP: slot 7 apic_id 7.
409 12:05:58.180356 AP: slot 3 apic_id 6.
410 12:05:58.186919 Waiting for 2nd SIPI to complete...done.
411 12:05:58.193380 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 12:05:58.200451 Processing 13 relocs. Offset value of 0x00038000
413 12:05:58.200548 Unable to locate Global NVS
414 12:05:58.210328 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 12:05:58.213449 Installing permanent SMM handler to 0x7b000000
416 12:05:58.223577 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 12:05:58.226666 Processing 794 relocs. Offset value of 0x7b010000
418 12:05:58.236728 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 12:05:58.239920 Processing 13 relocs. Offset value of 0x7b008000
420 12:05:58.247023 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 12:05:58.253315 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 12:05:58.256637 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 12:05:58.263417 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 12:05:58.269947 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 12:05:58.276744 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 12:05:58.283137 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 12:05:58.283269 Unable to locate Global NVS
428 12:05:58.292945 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 12:05:58.296435 Clearing SMI status registers
430 12:05:58.296544 SMI_STS: PM1
431 12:05:58.299847 PM1_STS: PWRBTN
432 12:05:58.306195 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 12:05:58.309757 In relocation handler: CPU 0
434 12:05:58.312974 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 12:05:58.319911 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 12:05:58.320047 Relocation complete.
437 12:05:58.329660 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 12:05:58.329875 In relocation handler: CPU 1
439 12:05:58.336119 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 12:05:58.336304 Relocation complete.
441 12:05:58.342706 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
442 12:05:58.346120 In relocation handler: CPU 2
443 12:05:58.353029 New SMBASE=0x7afff800 IEDBASE=0x7b400000
444 12:05:58.353218 Relocation complete.
445 12:05:58.359236 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
446 12:05:58.362580 In relocation handler: CPU 6
447 12:05:58.369196 New SMBASE=0x7affe800 IEDBASE=0x7b400000
448 12:05:58.372877 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 12:05:58.376332 Relocation complete.
450 12:05:58.382717 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
451 12:05:58.386159 In relocation handler: CPU 5
452 12:05:58.389591 New SMBASE=0x7affec00 IEDBASE=0x7b400000
453 12:05:58.392558 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 12:05:58.395744 Relocation complete.
455 12:05:58.402628 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
456 12:05:58.405605 In relocation handler: CPU 4
457 12:05:58.409022 New SMBASE=0x7afff000 IEDBASE=0x7b400000
458 12:05:58.412415 Relocation complete.
459 12:05:58.419158 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
460 12:05:58.422521 In relocation handler: CPU 3
461 12:05:58.425814 New SMBASE=0x7afff400 IEDBASE=0x7b400000
462 12:05:58.432250 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 12:05:58.435764 Relocation complete.
464 12:05:58.442401 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
465 12:05:58.445997 In relocation handler: CPU 7
466 12:05:58.449823 New SMBASE=0x7affe400 IEDBASE=0x7b400000
467 12:05:58.449930 Relocation complete.
468 12:05:58.453223 Initializing CPU #0
469 12:05:58.457040 CPU: vendor Intel device 806c1
470 12:05:58.460241 CPU: family 06, model 8c, stepping 01
471 12:05:58.463709 Clearing out pending MCEs
472 12:05:58.463803 Setting up local APIC...
473 12:05:58.467111 apic_id: 0x00 done.
474 12:05:58.470289 Turbo is available but hidden
475 12:05:58.473685 Turbo is available and visible
476 12:05:58.477040 microcode: Update skipped, already up-to-date
477 12:05:58.480347 CPU #0 initialized
478 12:05:58.483828 Initializing CPU #1
479 12:05:58.483923 Initializing CPU #6
480 12:05:58.486870 Initializing CPU #2
481 12:05:58.490323 CPU: vendor Intel device 806c1
482 12:05:58.493731 CPU: family 06, model 8c, stepping 01
483 12:05:58.496767 CPU: vendor Intel device 806c1
484 12:05:58.500517 CPU: family 06, model 8c, stepping 01
485 12:05:58.503633 Clearing out pending MCEs
486 12:05:58.507269 Clearing out pending MCEs
487 12:05:58.507391 Setting up local APIC...
488 12:05:58.510147 Initializing CPU #5
489 12:05:58.513638 Initializing CPU #4
490 12:05:58.516930 CPU: vendor Intel device 806c1
491 12:05:58.520262 CPU: family 06, model 8c, stepping 01
492 12:05:58.523329 Setting up local APIC...
493 12:05:58.523443 Clearing out pending MCEs
494 12:05:58.526858 CPU: vendor Intel device 806c1
495 12:05:58.529957 CPU: family 06, model 8c, stepping 01
496 12:05:58.533456 Setting up local APIC...
497 12:05:58.536598 apic_id: 0x04 done.
498 12:05:58.536703 apic_id: 0x05 done.
499 12:05:58.543618 microcode: Update skipped, already up-to-date
500 12:05:58.543743 Initializing CPU #7
501 12:05:58.546572 Initializing CPU #3
502 12:05:58.549949 apic_id: 0x02 done.
503 12:05:58.553635 Clearing out pending MCEs
504 12:05:58.556668 microcode: Update skipped, already up-to-date
505 12:05:58.560225 Setting up local APIC...
506 12:05:58.560335 CPU #5 initialized
507 12:05:58.563508 apic_id: 0x03 done.
508 12:05:58.566421 CPU: vendor Intel device 806c1
509 12:05:58.569680 CPU: family 06, model 8c, stepping 01
510 12:05:58.573048 CPU: vendor Intel device 806c1
511 12:05:58.576614 CPU: family 06, model 8c, stepping 01
512 12:05:58.579854 Clearing out pending MCEs
513 12:05:58.583161 Clearing out pending MCEs
514 12:05:58.583245 Setting up local APIC...
515 12:05:58.589833 microcode: Update skipped, already up-to-date
516 12:05:58.589918 CPU #6 initialized
517 12:05:58.596834 microcode: Update skipped, already up-to-date
518 12:05:58.599951 CPU: vendor Intel device 806c1
519 12:05:58.603122 CPU: family 06, model 8c, stepping 01
520 12:05:58.606266 Setting up local APIC...
521 12:05:58.606350 CPU #2 initialized
522 12:05:58.609869 CPU #4 initialized
523 12:05:58.609967 apic_id: 0x07 done.
524 12:05:58.613304 apic_id: 0x06 done.
525 12:05:58.616504 microcode: Update skipped, already up-to-date
526 12:05:58.622942 microcode: Update skipped, already up-to-date
527 12:05:58.623118 CPU #7 initialized
528 12:05:58.626213 CPU #3 initialized
529 12:05:58.629625 Clearing out pending MCEs
530 12:05:58.633301 Setting up local APIC...
531 12:05:58.633425 apic_id: 0x01 done.
532 12:05:58.639744 microcode: Update skipped, already up-to-date
533 12:05:58.639870 CPU #1 initialized
534 12:05:58.646434 bsp_do_flight_plan done after 455 msecs.
535 12:05:58.649612 CPU: frequency set to 4000 MHz
536 12:05:58.649707 Enabling SMIs.
537 12:05:58.656498 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 12:05:58.671870 SATAXPCIE1 indicates PCIe NVMe is present
539 12:05:58.675913 Probing TPM: done!
540 12:05:58.678794 Connected to device vid:did:rid of 1ae0:0028:00
541 12:05:58.689283 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
542 12:05:58.692605 Initialized TPM device CR50 revision 0
543 12:05:58.695790 Enabling S0i3.4
544 12:05:58.702340 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 12:05:58.705744 Found a VBT of 8704 bytes after decompression
546 12:05:58.713165 cse_lite: CSE RO boot. HybridStorageMode disabled
547 12:05:58.719054 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 12:05:58.795413 FSPS returned 0
549 12:05:58.798496 Executing Phase 1 of FspMultiPhaseSiInit
550 12:05:58.809251 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 12:05:58.812010 port C0 DISC req: usage 1 usb3 1 usb2 5
552 12:05:58.815134 Raw Buffer output 0 00000511
553 12:05:58.818411 Raw Buffer output 1 00000000
554 12:05:58.822290 pmc_send_ipc_cmd succeeded
555 12:05:58.829012 port C1 DISC req: usage 1 usb3 2 usb2 3
556 12:05:58.829602 Raw Buffer output 0 00000321
557 12:05:58.832052 Raw Buffer output 1 00000000
558 12:05:58.836298 pmc_send_ipc_cmd succeeded
559 12:05:58.841670 Detected 4 core, 8 thread CPU.
560 12:05:58.844449 Detected 4 core, 8 thread CPU.
561 12:05:59.078599 Display FSP Version Info HOB
562 12:05:59.082134 Reference Code - CPU = a.0.4c.31
563 12:05:59.085318 uCode Version = 0.0.0.86
564 12:05:59.088746 TXT ACM version = ff.ff.ff.ffff
565 12:05:59.091733 Reference Code - ME = a.0.4c.31
566 12:05:59.095058 MEBx version = 0.0.0.0
567 12:05:59.098314 ME Firmware Version = Consumer SKU
568 12:05:59.102101 Reference Code - PCH = a.0.4c.31
569 12:05:59.105144 PCH-CRID Status = Disabled
570 12:05:59.108682 PCH-CRID Original Value = ff.ff.ff.ffff
571 12:05:59.112078 PCH-CRID New Value = ff.ff.ff.ffff
572 12:05:59.114808 OPROM - RST - RAID = ff.ff.ff.ffff
573 12:05:59.118460 PCH Hsio Version = 4.0.0.0
574 12:05:59.121600 Reference Code - SA - System Agent = a.0.4c.31
575 12:05:59.124899 Reference Code - MRC = 2.0.0.1
576 12:05:59.128670 SA - PCIe Version = a.0.4c.31
577 12:05:59.131528 SA-CRID Status = Disabled
578 12:05:59.135411 SA-CRID Original Value = 0.0.0.1
579 12:05:59.138633 SA-CRID New Value = 0.0.0.1
580 12:05:59.141917 OPROM - VBIOS = ff.ff.ff.ffff
581 12:05:59.145178 IO Manageability Engine FW Version = 11.1.4.0
582 12:05:59.148281 PHY Build Version = 0.0.0.e0
583 12:05:59.151698 Thunderbolt(TM) FW Version = 0.0.0.0
584 12:05:59.158070 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 12:05:59.161629 ITSS IRQ Polarities Before:
586 12:05:59.162236 IPC0: 0xffffffff
587 12:05:59.164788 IPC1: 0xffffffff
588 12:05:59.165179 IPC2: 0xffffffff
589 12:05:59.168709 IPC3: 0xffffffff
590 12:05:59.171583 ITSS IRQ Polarities After:
591 12:05:59.172036 IPC0: 0xffffffff
592 12:05:59.175305 IPC1: 0xffffffff
593 12:05:59.175879 IPC2: 0xffffffff
594 12:05:59.178220 IPC3: 0xffffffff
595 12:05:59.181866 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 12:05:59.194986 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 12:05:59.204831 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 12:05:59.218263 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 12:05:59.224973 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
600 12:05:59.225525 Enumerating buses...
601 12:05:59.231400 Show all devs... Before device enumeration.
602 12:05:59.231853 Root Device: enabled 1
603 12:05:59.234943 DOMAIN: 0000: enabled 1
604 12:05:59.237968 CPU_CLUSTER: 0: enabled 1
605 12:05:59.241767 PCI: 00:00.0: enabled 1
606 12:05:59.242249 PCI: 00:02.0: enabled 1
607 12:05:59.244625 PCI: 00:04.0: enabled 1
608 12:05:59.248153 PCI: 00:05.0: enabled 1
609 12:05:59.251180 PCI: 00:06.0: enabled 0
610 12:05:59.251598 PCI: 00:07.0: enabled 0
611 12:05:59.254889 PCI: 00:07.1: enabled 0
612 12:05:59.258001 PCI: 00:07.2: enabled 0
613 12:05:59.261373 PCI: 00:07.3: enabled 0
614 12:05:59.261837 PCI: 00:08.0: enabled 1
615 12:05:59.264493 PCI: 00:09.0: enabled 0
616 12:05:59.268100 PCI: 00:0a.0: enabled 0
617 12:05:59.271212 PCI: 00:0d.0: enabled 1
618 12:05:59.271722 PCI: 00:0d.1: enabled 0
619 12:05:59.274327 PCI: 00:0d.2: enabled 0
620 12:05:59.278158 PCI: 00:0d.3: enabled 0
621 12:05:59.278574 PCI: 00:0e.0: enabled 0
622 12:05:59.281276 PCI: 00:10.2: enabled 1
623 12:05:59.284596 PCI: 00:10.6: enabled 0
624 12:05:59.287906 PCI: 00:10.7: enabled 0
625 12:05:59.288384 PCI: 00:12.0: enabled 0
626 12:05:59.290959 PCI: 00:12.6: enabled 0
627 12:05:59.294583 PCI: 00:13.0: enabled 0
628 12:05:59.297887 PCI: 00:14.0: enabled 1
629 12:05:59.298323 PCI: 00:14.1: enabled 0
630 12:05:59.301236 PCI: 00:14.2: enabled 1
631 12:05:59.304652 PCI: 00:14.3: enabled 1
632 12:05:59.307833 PCI: 00:15.0: enabled 1
633 12:05:59.308413 PCI: 00:15.1: enabled 1
634 12:05:59.311377 PCI: 00:15.2: enabled 1
635 12:05:59.314433 PCI: 00:15.3: enabled 1
636 12:05:59.317636 PCI: 00:16.0: enabled 1
637 12:05:59.318054 PCI: 00:16.1: enabled 0
638 12:05:59.321174 PCI: 00:16.2: enabled 0
639 12:05:59.324520 PCI: 00:16.3: enabled 0
640 12:05:59.325030 PCI: 00:16.4: enabled 0
641 12:05:59.327706 PCI: 00:16.5: enabled 0
642 12:05:59.330868 PCI: 00:17.0: enabled 1
643 12:05:59.334525 PCI: 00:19.0: enabled 0
644 12:05:59.334976 PCI: 00:19.1: enabled 1
645 12:05:59.337846 PCI: 00:19.2: enabled 0
646 12:05:59.340872 PCI: 00:1c.0: enabled 1
647 12:05:59.344165 PCI: 00:1c.1: enabled 0
648 12:05:59.344630 PCI: 00:1c.2: enabled 0
649 12:05:59.347513 PCI: 00:1c.3: enabled 0
650 12:05:59.350824 PCI: 00:1c.4: enabled 0
651 12:05:59.354284 PCI: 00:1c.5: enabled 0
652 12:05:59.354716 PCI: 00:1c.6: enabled 1
653 12:05:59.357814 PCI: 00:1c.7: enabled 0
654 12:05:59.360833 PCI: 00:1d.0: enabled 1
655 12:05:59.361269 PCI: 00:1d.1: enabled 0
656 12:05:59.364370 PCI: 00:1d.2: enabled 1
657 12:05:59.367653 PCI: 00:1d.3: enabled 0
658 12:05:59.371020 PCI: 00:1e.0: enabled 1
659 12:05:59.371670 PCI: 00:1e.1: enabled 0
660 12:05:59.374197 PCI: 00:1e.2: enabled 1
661 12:05:59.377393 PCI: 00:1e.3: enabled 1
662 12:05:59.380969 PCI: 00:1f.0: enabled 1
663 12:05:59.381568 PCI: 00:1f.1: enabled 0
664 12:05:59.383744 PCI: 00:1f.2: enabled 1
665 12:05:59.387064 PCI: 00:1f.3: enabled 1
666 12:05:59.390714 PCI: 00:1f.4: enabled 0
667 12:05:59.390867 PCI: 00:1f.5: enabled 1
668 12:05:59.393726 PCI: 00:1f.6: enabled 0
669 12:05:59.397174 PCI: 00:1f.7: enabled 0
670 12:05:59.397293 APIC: 00: enabled 1
671 12:05:59.400448 GENERIC: 0.0: enabled 1
672 12:05:59.403686 GENERIC: 0.0: enabled 1
673 12:05:59.407344 GENERIC: 1.0: enabled 1
674 12:05:59.407429 GENERIC: 0.0: enabled 1
675 12:05:59.410782 GENERIC: 1.0: enabled 1
676 12:05:59.413856 USB0 port 0: enabled 1
677 12:05:59.417333 GENERIC: 0.0: enabled 1
678 12:05:59.417533 USB0 port 0: enabled 1
679 12:05:59.420355 GENERIC: 0.0: enabled 1
680 12:05:59.423972 I2C: 00:1a: enabled 1
681 12:05:59.424052 I2C: 00:31: enabled 1
682 12:05:59.427026 I2C: 00:32: enabled 1
683 12:05:59.430739 I2C: 00:10: enabled 1
684 12:05:59.430908 I2C: 00:15: enabled 1
685 12:05:59.433496 GENERIC: 0.0: enabled 0
686 12:05:59.436869 GENERIC: 1.0: enabled 0
687 12:05:59.440376 GENERIC: 0.0: enabled 1
688 12:05:59.440460 SPI: 00: enabled 1
689 12:05:59.443465 SPI: 00: enabled 1
690 12:05:59.443565 PNP: 0c09.0: enabled 1
691 12:05:59.447517 GENERIC: 0.0: enabled 1
692 12:05:59.450487 USB3 port 0: enabled 1
693 12:05:59.453455 USB3 port 1: enabled 1
694 12:05:59.453588 USB3 port 2: enabled 0
695 12:05:59.457300 USB3 port 3: enabled 0
696 12:05:59.460532 USB2 port 0: enabled 0
697 12:05:59.460611 USB2 port 1: enabled 1
698 12:05:59.463456 USB2 port 2: enabled 1
699 12:05:59.466957 USB2 port 3: enabled 0
700 12:05:59.470302 USB2 port 4: enabled 1
701 12:05:59.470400 USB2 port 5: enabled 0
702 12:05:59.473312 USB2 port 6: enabled 0
703 12:05:59.476738 USB2 port 7: enabled 0
704 12:05:59.476876 USB2 port 8: enabled 0
705 12:05:59.480108 USB2 port 9: enabled 0
706 12:05:59.483822 USB3 port 0: enabled 0
707 12:05:59.483947 USB3 port 1: enabled 1
708 12:05:59.487110 USB3 port 2: enabled 0
709 12:05:59.490093 USB3 port 3: enabled 0
710 12:05:59.493795 GENERIC: 0.0: enabled 1
711 12:05:59.494226 GENERIC: 1.0: enabled 1
712 12:05:59.497261 APIC: 01: enabled 1
713 12:05:59.500435 APIC: 05: enabled 1
714 12:05:59.500968 APIC: 06: enabled 1
715 12:05:59.503888 APIC: 03: enabled 1
716 12:05:59.504339 APIC: 02: enabled 1
717 12:05:59.506854 APIC: 04: enabled 1
718 12:05:59.510232 APIC: 07: enabled 1
719 12:05:59.510666 Compare with tree...
720 12:05:59.513860 Root Device: enabled 1
721 12:05:59.517007 DOMAIN: 0000: enabled 1
722 12:05:59.520218 PCI: 00:00.0: enabled 1
723 12:05:59.520679 PCI: 00:02.0: enabled 1
724 12:05:59.523732 PCI: 00:04.0: enabled 1
725 12:05:59.527520 GENERIC: 0.0: enabled 1
726 12:05:59.530523 PCI: 00:05.0: enabled 1
727 12:05:59.533898 PCI: 00:06.0: enabled 0
728 12:05:59.534325 PCI: 00:07.0: enabled 0
729 12:05:59.537035 GENERIC: 0.0: enabled 1
730 12:05:59.540290 PCI: 00:07.1: enabled 0
731 12:05:59.543805 GENERIC: 1.0: enabled 1
732 12:05:59.546912 PCI: 00:07.2: enabled 0
733 12:05:59.547346 GENERIC: 0.0: enabled 1
734 12:05:59.550397 PCI: 00:07.3: enabled 0
735 12:05:59.553456 GENERIC: 1.0: enabled 1
736 12:05:59.557069 PCI: 00:08.0: enabled 1
737 12:05:59.560344 PCI: 00:09.0: enabled 0
738 12:05:59.560650 PCI: 00:0a.0: enabled 0
739 12:05:59.563571 PCI: 00:0d.0: enabled 1
740 12:05:59.567139 USB0 port 0: enabled 1
741 12:05:59.570024 USB3 port 0: enabled 1
742 12:05:59.573934 USB3 port 1: enabled 1
743 12:05:59.574383 USB3 port 2: enabled 0
744 12:05:59.577061 USB3 port 3: enabled 0
745 12:05:59.580515 PCI: 00:0d.1: enabled 0
746 12:05:59.583767 PCI: 00:0d.2: enabled 0
747 12:05:59.587178 GENERIC: 0.0: enabled 1
748 12:05:59.587542 PCI: 00:0d.3: enabled 0
749 12:05:59.590845 PCI: 00:0e.0: enabled 0
750 12:05:59.593570 PCI: 00:10.2: enabled 1
751 12:05:59.596733 PCI: 00:10.6: enabled 0
752 12:05:59.600370 PCI: 00:10.7: enabled 0
753 12:05:59.600683 PCI: 00:12.0: enabled 0
754 12:05:59.603934 PCI: 00:12.6: enabled 0
755 12:05:59.606628 PCI: 00:13.0: enabled 0
756 12:05:59.609794 PCI: 00:14.0: enabled 1
757 12:05:59.613321 USB0 port 0: enabled 1
758 12:05:59.613405 USB2 port 0: enabled 0
759 12:05:59.617201 USB2 port 1: enabled 1
760 12:05:59.619946 USB2 port 2: enabled 1
761 12:05:59.623064 USB2 port 3: enabled 0
762 12:05:59.626323 USB2 port 4: enabled 1
763 12:05:59.629809 USB2 port 5: enabled 0
764 12:05:59.629896 USB2 port 6: enabled 0
765 12:05:59.633101 USB2 port 7: enabled 0
766 12:05:59.636540 USB2 port 8: enabled 0
767 12:05:59.639642 USB2 port 9: enabled 0
768 12:05:59.643266 USB3 port 0: enabled 0
769 12:05:59.643405 USB3 port 1: enabled 1
770 12:05:59.646469 USB3 port 2: enabled 0
771 12:05:59.649638 USB3 port 3: enabled 0
772 12:05:59.653300 PCI: 00:14.1: enabled 0
773 12:05:59.656316 PCI: 00:14.2: enabled 1
774 12:05:59.659803 PCI: 00:14.3: enabled 1
775 12:05:59.659934 GENERIC: 0.0: enabled 1
776 12:05:59.663030 PCI: 00:15.0: enabled 1
777 12:05:59.666499 I2C: 00:1a: enabled 1
778 12:05:59.670104 I2C: 00:31: enabled 1
779 12:05:59.670645 I2C: 00:32: enabled 1
780 12:05:59.673326 PCI: 00:15.1: enabled 1
781 12:05:59.677146 I2C: 00:10: enabled 1
782 12:05:59.680105 PCI: 00:15.2: enabled 1
783 12:05:59.683410 PCI: 00:15.3: enabled 1
784 12:05:59.683853 PCI: 00:16.0: enabled 1
785 12:05:59.686823 PCI: 00:16.1: enabled 0
786 12:05:59.689978 PCI: 00:16.2: enabled 0
787 12:05:59.693094 PCI: 00:16.3: enabled 0
788 12:05:59.696610 PCI: 00:16.4: enabled 0
789 12:05:59.697174 PCI: 00:16.5: enabled 0
790 12:05:59.700104 PCI: 00:17.0: enabled 1
791 12:05:59.703657 PCI: 00:19.0: enabled 0
792 12:05:59.707321 PCI: 00:19.1: enabled 1
793 12:05:59.707937 I2C: 00:15: enabled 1
794 12:05:59.711056 PCI: 00:19.2: enabled 0
795 12:05:59.714435 PCI: 00:1d.0: enabled 1
796 12:05:59.717683 GENERIC: 0.0: enabled 1
797 12:05:59.718134 PCI: 00:1e.0: enabled 1
798 12:05:59.767640 PCI: 00:1e.1: enabled 0
799 12:05:59.768113 PCI: 00:1e.2: enabled 1
800 12:05:59.768889 SPI: 00: enabled 1
801 12:05:59.769306 PCI: 00:1e.3: enabled 1
802 12:05:59.769816 SPI: 00: enabled 1
803 12:05:59.770252 PCI: 00:1f.0: enabled 1
804 12:05:59.770673 PNP: 0c09.0: enabled 1
805 12:05:59.771089 PCI: 00:1f.1: enabled 0
806 12:05:59.771584 PCI: 00:1f.2: enabled 1
807 12:05:59.772116 GENERIC: 0.0: enabled 1
808 12:05:59.772662 GENERIC: 0.0: enabled 1
809 12:05:59.773070 GENERIC: 1.0: enabled 1
810 12:05:59.773498 PCI: 00:1f.3: enabled 1
811 12:05:59.773863 PCI: 00:1f.4: enabled 0
812 12:05:59.774203 PCI: 00:1f.5: enabled 1
813 12:05:59.774437 PCI: 00:1f.6: enabled 0
814 12:05:59.774657 PCI: 00:1f.7: enabled 0
815 12:05:59.774873 CPU_CLUSTER: 0: enabled 1
816 12:05:59.775087 APIC: 00: enabled 1
817 12:05:59.815546 APIC: 01: enabled 1
818 12:05:59.816051 APIC: 05: enabled 1
819 12:05:59.816403 APIC: 06: enabled 1
820 12:05:59.816746 APIC: 03: enabled 1
821 12:05:59.817174 APIC: 02: enabled 1
822 12:05:59.817691 APIC: 04: enabled 1
823 12:05:59.818435 APIC: 07: enabled 1
824 12:05:59.818873 Root Device scanning...
825 12:05:59.819385 scan_static_bus for Root Device
826 12:05:59.819883 DOMAIN: 0000 enabled
827 12:05:59.820377 CPU_CLUSTER: 0 enabled
828 12:05:59.820866 DOMAIN: 0000 scanning...
829 12:05:59.821339 PCI: pci_scan_bus for bus 00
830 12:05:59.821710 PCI: 00:00.0 [8086/0000] ops
831 12:05:59.822025 PCI: 00:00.0 [8086/9a12] enabled
832 12:05:59.822334 PCI: 00:02.0 [8086/0000] bus ops
833 12:05:59.822633 PCI: 00:02.0 [8086/9a40] enabled
834 12:05:59.822961 PCI: 00:04.0 [8086/0000] bus ops
835 12:05:59.823183 PCI: 00:04.0 [8086/9a03] enabled
836 12:05:59.825880 PCI: 00:05.0 [8086/9a19] enabled
837 12:05:59.826217 PCI: 00:07.0 [0000/0000] hidden
838 12:05:59.829354 PCI: 00:08.0 [8086/9a11] enabled
839 12:05:59.836360 PCI: 00:0a.0 [8086/9a0d] disabled
840 12:05:59.839598 PCI: 00:0d.0 [8086/0000] bus ops
841 12:05:59.843003 PCI: 00:0d.0 [8086/9a13] enabled
842 12:05:59.846447 PCI: 00:14.0 [8086/0000] bus ops
843 12:05:59.849128 PCI: 00:14.0 [8086/a0ed] enabled
844 12:05:59.852544 PCI: 00:14.2 [8086/a0ef] enabled
845 12:05:59.856156 PCI: 00:14.3 [8086/0000] bus ops
846 12:05:59.859318 PCI: 00:14.3 [8086/a0f0] enabled
847 12:05:59.862540 PCI: 00:15.0 [8086/0000] bus ops
848 12:05:59.865609 PCI: 00:15.0 [8086/a0e8] enabled
849 12:05:59.869516 PCI: 00:15.1 [8086/0000] bus ops
850 12:05:59.872379 PCI: 00:15.1 [8086/a0e9] enabled
851 12:05:59.875982 PCI: 00:15.2 [8086/0000] bus ops
852 12:05:59.879284 PCI: 00:15.2 [8086/a0ea] enabled
853 12:05:59.882935 PCI: 00:15.3 [8086/0000] bus ops
854 12:05:59.885750 PCI: 00:15.3 [8086/a0eb] enabled
855 12:05:59.889428 PCI: 00:16.0 [8086/0000] ops
856 12:05:59.892494 PCI: 00:16.0 [8086/a0e0] enabled
857 12:05:59.895610 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 12:05:59.899310 PCI: 00:19.0 [8086/0000] bus ops
859 12:05:59.902398 PCI: 00:19.0 [8086/a0c5] disabled
860 12:05:59.905932 PCI: 00:19.1 [8086/0000] bus ops
861 12:05:59.909311 PCI: 00:19.1 [8086/a0c6] enabled
862 12:05:59.912224 PCI: 00:1d.0 [8086/0000] bus ops
863 12:05:59.915960 PCI: 00:1d.0 [8086/a0b0] enabled
864 12:05:59.919117 PCI: 00:1e.0 [8086/0000] ops
865 12:05:59.922149 PCI: 00:1e.0 [8086/a0a8] enabled
866 12:05:59.925543 PCI: 00:1e.2 [8086/0000] bus ops
867 12:05:59.929188 PCI: 00:1e.2 [8086/a0aa] enabled
868 12:05:59.932346 PCI: 00:1e.3 [8086/0000] bus ops
869 12:05:59.935386 PCI: 00:1e.3 [8086/a0ab] enabled
870 12:05:59.938837 PCI: 00:1f.0 [8086/0000] bus ops
871 12:05:59.942760 PCI: 00:1f.0 [8086/a087] enabled
872 12:05:59.945737 RTC Init
873 12:05:59.948573 Set power on after power failure.
874 12:05:59.948944 Disabling Deep S3
875 12:05:59.952467 Disabling Deep S3
876 12:05:59.952834 Disabling Deep S4
877 12:05:59.955208 Disabling Deep S4
878 12:05:59.958716 Disabling Deep S5
879 12:05:59.959083 Disabling Deep S5
880 12:05:59.962061 PCI: 00:1f.2 [0000/0000] hidden
881 12:05:59.965129 PCI: 00:1f.3 [8086/0000] bus ops
882 12:05:59.969074 PCI: 00:1f.3 [8086/a0c8] enabled
883 12:05:59.972163 PCI: 00:1f.5 [8086/0000] bus ops
884 12:05:59.975112 PCI: 00:1f.5 [8086/a0a4] enabled
885 12:05:59.978616 PCI: Leftover static devices:
886 12:05:59.978981 PCI: 00:10.2
887 12:05:59.981972 PCI: 00:10.6
888 12:05:59.982353 PCI: 00:10.7
889 12:05:59.985549 PCI: 00:06.0
890 12:05:59.985908 PCI: 00:07.1
891 12:05:59.986197 PCI: 00:07.2
892 12:05:59.988879 PCI: 00:07.3
893 12:05:59.989417 PCI: 00:09.0
894 12:05:59.991912 PCI: 00:0d.1
895 12:05:59.992375 PCI: 00:0d.2
896 12:05:59.995695 PCI: 00:0d.3
897 12:05:59.996057 PCI: 00:0e.0
898 12:05:59.996347 PCI: 00:12.0
899 12:05:59.998482 PCI: 00:12.6
900 12:05:59.998988 PCI: 00:13.0
901 12:06:00.001867 PCI: 00:14.1
902 12:06:00.002232 PCI: 00:16.1
903 12:06:00.002525 PCI: 00:16.2
904 12:06:00.005217 PCI: 00:16.3
905 12:06:00.005771 PCI: 00:16.4
906 12:06:00.008459 PCI: 00:16.5
907 12:06:00.008825 PCI: 00:17.0
908 12:06:00.009118 PCI: 00:19.2
909 12:06:00.012144 PCI: 00:1e.1
910 12:06:00.012506 PCI: 00:1f.1
911 12:06:00.015026 PCI: 00:1f.4
912 12:06:00.015397 PCI: 00:1f.6
913 12:06:00.018286 PCI: 00:1f.7
914 12:06:00.021772 PCI: Check your devicetree.cb.
915 12:06:00.022137 PCI: 00:02.0 scanning...
916 12:06:00.024946 scan_generic_bus for PCI: 00:02.0
917 12:06:00.031865 scan_generic_bus for PCI: 00:02.0 done
918 12:06:00.034934 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 12:06:00.039107 PCI: 00:04.0 scanning...
920 12:06:00.041856 scan_generic_bus for PCI: 00:04.0
921 12:06:00.042273 GENERIC: 0.0 enabled
922 12:06:00.048311 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 12:06:00.054879 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 12:06:00.058261 PCI: 00:0d.0 scanning...
925 12:06:00.061815 scan_static_bus for PCI: 00:0d.0
926 12:06:00.062170 USB0 port 0 enabled
927 12:06:00.064887 USB0 port 0 scanning...
928 12:06:00.068298 scan_static_bus for USB0 port 0
929 12:06:00.071535 USB3 port 0 enabled
930 12:06:00.071791 USB3 port 1 enabled
931 12:06:00.074989 USB3 port 2 disabled
932 12:06:00.077923 USB3 port 3 disabled
933 12:06:00.078124 USB3 port 0 scanning...
934 12:06:00.081161 scan_static_bus for USB3 port 0
935 12:06:00.084266 scan_static_bus for USB3 port 0 done
936 12:06:00.091098 scan_bus: bus USB3 port 0 finished in 6 msecs
937 12:06:00.094165 USB3 port 1 scanning...
938 12:06:00.097623 scan_static_bus for USB3 port 1
939 12:06:00.100798 scan_static_bus for USB3 port 1 done
940 12:06:00.104226 scan_bus: bus USB3 port 1 finished in 6 msecs
941 12:06:00.107614 scan_static_bus for USB0 port 0 done
942 12:06:00.114237 scan_bus: bus USB0 port 0 finished in 43 msecs
943 12:06:00.117414 scan_static_bus for PCI: 00:0d.0 done
944 12:06:00.120895 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 12:06:00.124137 PCI: 00:14.0 scanning...
946 12:06:00.127351 scan_static_bus for PCI: 00:14.0
947 12:06:00.130697 USB0 port 0 enabled
948 12:06:00.130807 USB0 port 0 scanning...
949 12:06:00.134228 scan_static_bus for USB0 port 0
950 12:06:00.137741 USB2 port 0 disabled
951 12:06:00.141005 USB2 port 1 enabled
952 12:06:00.141181 USB2 port 2 enabled
953 12:06:00.144484 USB2 port 3 disabled
954 12:06:00.147349 USB2 port 4 enabled
955 12:06:00.147499 USB2 port 5 disabled
956 12:06:00.150690 USB2 port 6 disabled
957 12:06:00.154299 USB2 port 7 disabled
958 12:06:00.154470 USB2 port 8 disabled
959 12:06:00.157795 USB2 port 9 disabled
960 12:06:00.160875 USB3 port 0 disabled
961 12:06:00.161073 USB3 port 1 enabled
962 12:06:00.163947 USB3 port 2 disabled
963 12:06:00.164186 USB3 port 3 disabled
964 12:06:00.167216 USB2 port 1 scanning...
965 12:06:00.170699 scan_static_bus for USB2 port 1
966 12:06:00.174566 scan_static_bus for USB2 port 1 done
967 12:06:00.180752 scan_bus: bus USB2 port 1 finished in 6 msecs
968 12:06:00.181174 USB2 port 2 scanning...
969 12:06:00.184245 scan_static_bus for USB2 port 2
970 12:06:00.191117 scan_static_bus for USB2 port 2 done
971 12:06:00.194276 scan_bus: bus USB2 port 2 finished in 6 msecs
972 12:06:00.197831 USB2 port 4 scanning...
973 12:06:00.200733 scan_static_bus for USB2 port 4
974 12:06:00.204266 scan_static_bus for USB2 port 4 done
975 12:06:00.207688 scan_bus: bus USB2 port 4 finished in 6 msecs
976 12:06:00.210835 USB3 port 1 scanning...
977 12:06:00.214116 scan_static_bus for USB3 port 1
978 12:06:00.217431 scan_static_bus for USB3 port 1 done
979 12:06:00.223764 scan_bus: bus USB3 port 1 finished in 6 msecs
980 12:06:00.227296 scan_static_bus for USB0 port 0 done
981 12:06:00.230719 scan_bus: bus USB0 port 0 finished in 93 msecs
982 12:06:00.234197 scan_static_bus for PCI: 00:14.0 done
983 12:06:00.240924 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
984 12:06:00.241529 PCI: 00:14.3 scanning...
985 12:06:00.244201 scan_static_bus for PCI: 00:14.3
986 12:06:00.247225 GENERIC: 0.0 enabled
987 12:06:00.250861 scan_static_bus for PCI: 00:14.3 done
988 12:06:00.257201 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 12:06:00.257703 PCI: 00:15.0 scanning...
990 12:06:00.260946 scan_static_bus for PCI: 00:15.0
991 12:06:00.264405 I2C: 00:1a enabled
992 12:06:00.267414 I2C: 00:31 enabled
993 12:06:00.267860 I2C: 00:32 enabled
994 12:06:00.271315 scan_static_bus for PCI: 00:15.0 done
995 12:06:00.277729 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
996 12:06:00.280629 PCI: 00:15.1 scanning...
997 12:06:00.285187 scan_static_bus for PCI: 00:15.1
998 12:06:00.285667 I2C: 00:10 enabled
999 12:06:00.288085 scan_static_bus for PCI: 00:15.1 done
1000 12:06:00.294790 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 12:06:00.295101 PCI: 00:15.2 scanning...
1002 12:06:00.298211 scan_static_bus for PCI: 00:15.2
1003 12:06:00.304477 scan_static_bus for PCI: 00:15.2 done
1004 12:06:00.308161 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 12:06:00.311328 PCI: 00:15.3 scanning...
1006 12:06:00.314666 scan_static_bus for PCI: 00:15.3
1007 12:06:00.318112 scan_static_bus for PCI: 00:15.3 done
1008 12:06:00.321263 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 12:06:00.324841 PCI: 00:19.1 scanning...
1010 12:06:00.328070 scan_static_bus for PCI: 00:19.1
1011 12:06:00.331153 I2C: 00:15 enabled
1012 12:06:00.334662 scan_static_bus for PCI: 00:19.1 done
1013 12:06:00.337859 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 12:06:00.341237 PCI: 00:1d.0 scanning...
1015 12:06:00.344923 do_pci_scan_bridge for PCI: 00:1d.0
1016 12:06:00.348085 PCI: pci_scan_bus for bus 01
1017 12:06:00.351278 PCI: 01:00.0 [1c5c/174a] enabled
1018 12:06:00.354428 GENERIC: 0.0 enabled
1019 12:06:00.357865 Enabling Common Clock Configuration
1020 12:06:00.361009 L1 Sub-State supported from root port 29
1021 12:06:00.364401 L1 Sub-State Support = 0xf
1022 12:06:00.368053 CommonModeRestoreTime = 0x28
1023 12:06:00.371249 Power On Value = 0x16, Power On Scale = 0x0
1024 12:06:00.374711 ASPM: Enabled L1
1025 12:06:00.377968 PCIe: Max_Payload_Size adjusted to 128
1026 12:06:00.381239 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 12:06:00.384568 PCI: 00:1e.2 scanning...
1028 12:06:00.387765 scan_generic_bus for PCI: 00:1e.2
1029 12:06:00.391057 SPI: 00 enabled
1030 12:06:00.398274 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 12:06:00.401285 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 12:06:00.404801 PCI: 00:1e.3 scanning...
1033 12:06:00.408230 scan_generic_bus for PCI: 00:1e.3
1034 12:06:00.408633 SPI: 00 enabled
1035 12:06:00.414418 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 12:06:00.421154 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 12:06:00.421643 PCI: 00:1f.0 scanning...
1038 12:06:00.424857 scan_static_bus for PCI: 00:1f.0
1039 12:06:00.427747 PNP: 0c09.0 enabled
1040 12:06:00.431028 PNP: 0c09.0 scanning...
1041 12:06:00.434541 scan_static_bus for PNP: 0c09.0
1042 12:06:00.437870 scan_static_bus for PNP: 0c09.0 done
1043 12:06:00.440975 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 12:06:00.447793 scan_static_bus for PCI: 00:1f.0 done
1045 12:06:00.451142 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 12:06:00.454440 PCI: 00:1f.2 scanning...
1047 12:06:00.457447 scan_static_bus for PCI: 00:1f.2
1048 12:06:00.457574 GENERIC: 0.0 enabled
1049 12:06:00.460878 GENERIC: 0.0 scanning...
1050 12:06:00.464294 scan_static_bus for GENERIC: 0.0
1051 12:06:00.468006 GENERIC: 0.0 enabled
1052 12:06:00.471254 GENERIC: 1.0 enabled
1053 12:06:00.474463 scan_static_bus for GENERIC: 0.0 done
1054 12:06:00.477936 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 12:06:00.481301 scan_static_bus for PCI: 00:1f.2 done
1056 12:06:00.488017 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 12:06:00.491204 PCI: 00:1f.3 scanning...
1058 12:06:00.494333 scan_static_bus for PCI: 00:1f.3
1059 12:06:00.497853 scan_static_bus for PCI: 00:1f.3 done
1060 12:06:00.501292 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 12:06:00.504053 PCI: 00:1f.5 scanning...
1062 12:06:00.507822 scan_generic_bus for PCI: 00:1f.5
1063 12:06:00.510924 scan_generic_bus for PCI: 00:1f.5 done
1064 12:06:00.517146 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 12:06:00.521003 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 12:06:00.523858 scan_static_bus for Root Device done
1067 12:06:00.530716 scan_bus: bus Root Device finished in 736 msecs
1068 12:06:00.530979 done
1069 12:06:00.537372 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 12:06:00.540773 Chrome EC: UHEPI supported
1071 12:06:00.547226 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 12:06:00.553849 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 12:06:00.557171 SPI flash protection: WPSW=0 SRP0=0
1074 12:06:00.560626 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 12:06:00.567015 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 12:06:00.570460 found VGA at PCI: 00:02.0
1077 12:06:00.573915 Setting up VGA for PCI: 00:02.0
1078 12:06:00.577119 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 12:06:00.583633 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 12:06:00.583962 Allocating resources...
1081 12:06:00.586984 Reading resources...
1082 12:06:00.589954 Root Device read_resources bus 0 link: 0
1083 12:06:00.596858 DOMAIN: 0000 read_resources bus 0 link: 0
1084 12:06:00.600013 PCI: 00:04.0 read_resources bus 1 link: 0
1085 12:06:00.607060 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 12:06:00.610001 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 12:06:00.616483 USB0 port 0 read_resources bus 0 link: 0
1088 12:06:00.619793 USB0 port 0 read_resources bus 0 link: 0 done
1089 12:06:00.626348 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 12:06:00.629918 PCI: 00:14.0 read_resources bus 0 link: 0
1091 12:06:00.633215 USB0 port 0 read_resources bus 0 link: 0
1092 12:06:00.640803 USB0 port 0 read_resources bus 0 link: 0 done
1093 12:06:00.644007 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 12:06:00.651249 PCI: 00:14.3 read_resources bus 0 link: 0
1095 12:06:00.654430 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 12:06:00.660707 PCI: 00:15.0 read_resources bus 0 link: 0
1097 12:06:00.664094 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 12:06:00.670826 PCI: 00:15.1 read_resources bus 0 link: 0
1099 12:06:00.674334 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 12:06:00.681095 PCI: 00:19.1 read_resources bus 0 link: 0
1101 12:06:00.684692 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 12:06:00.691078 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 12:06:00.694705 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 12:06:00.701661 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 12:06:00.704689 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 12:06:00.711287 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 12:06:00.714615 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 12:06:00.721258 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 12:06:00.724585 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 12:06:00.727746 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 12:06:00.734940 GENERIC: 0.0 read_resources bus 0 link: 0
1112 12:06:00.737796 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 12:06:00.744743 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 12:06:00.751112 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 12:06:00.754873 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 12:06:00.761379 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 12:06:00.764554 Root Device read_resources bus 0 link: 0 done
1118 12:06:00.767824 Done reading resources.
1119 12:06:00.771342 Show resources in subtree (Root Device)...After reading.
1120 12:06:00.777835 Root Device child on link 0 DOMAIN: 0000
1121 12:06:00.781550 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 12:06:00.791266 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 12:06:00.801233 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 12:06:00.801905 PCI: 00:00.0
1125 12:06:00.811186 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 12:06:00.821246 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 12:06:00.831219 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 12:06:00.841262 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 12:06:00.851331 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 12:06:00.857639 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 12:06:00.867553 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 12:06:00.877278 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 12:06:00.887517 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 12:06:00.897220 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 12:06:00.904473 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 12:06:00.914166 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 12:06:00.924256 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 12:06:00.933730 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 12:06:00.943868 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 12:06:00.950928 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 12:06:00.963911 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 12:06:00.970462 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 12:06:00.980077 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 12:06:00.990321 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 12:06:00.993694 PCI: 00:02.0
1146 12:06:01.003652 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 12:06:01.013825 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 12:06:01.019841 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 12:06:01.026737 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 12:06:01.036690 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 12:06:01.036800 GENERIC: 0.0
1152 12:06:01.040191 PCI: 00:05.0
1153 12:06:01.049943 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 12:06:01.053752 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 12:06:01.056522 GENERIC: 0.0
1156 12:06:01.056611 PCI: 00:08.0
1157 12:06:01.066607 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 12:06:01.070112 PCI: 00:0a.0
1159 12:06:01.073040 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 12:06:01.083340 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 12:06:01.087019 USB0 port 0 child on link 0 USB3 port 0
1162 12:06:01.089927 USB3 port 0
1163 12:06:01.090351 USB3 port 1
1164 12:06:01.093768 USB3 port 2
1165 12:06:01.094350 USB3 port 3
1166 12:06:01.100067 PCI: 00:14.0 child on link 0 USB0 port 0
1167 12:06:01.110154 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 12:06:01.113231 USB0 port 0 child on link 0 USB2 port 0
1169 12:06:01.116502 USB2 port 0
1170 12:06:01.117086 USB2 port 1
1171 12:06:01.120094 USB2 port 2
1172 12:06:01.120554 USB2 port 3
1173 12:06:01.123321 USB2 port 4
1174 12:06:01.123748 USB2 port 5
1175 12:06:01.126951 USB2 port 6
1176 12:06:01.127533 USB2 port 7
1177 12:06:01.129824 USB2 port 8
1178 12:06:01.130387 USB2 port 9
1179 12:06:01.133515 USB3 port 0
1180 12:06:01.134086 USB3 port 1
1181 12:06:01.136872 USB3 port 2
1182 12:06:01.140087 USB3 port 3
1183 12:06:01.140539 PCI: 00:14.2
1184 12:06:01.149952 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 12:06:01.159742 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 12:06:01.163352 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 12:06:01.172921 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 12:06:01.176596 GENERIC: 0.0
1189 12:06:01.179871 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 12:06:01.189579 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 12:06:01.192969 I2C: 00:1a
1192 12:06:01.193399 I2C: 00:31
1193 12:06:01.196883 I2C: 00:32
1194 12:06:01.199826 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 12:06:01.209708 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 12:06:01.210160 I2C: 00:10
1197 12:06:01.212932 PCI: 00:15.2
1198 12:06:01.222902 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 12:06:01.223379 PCI: 00:15.3
1200 12:06:01.233128 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 12:06:01.236364 PCI: 00:16.0
1202 12:06:01.246533 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 12:06:01.247127 PCI: 00:19.0
1204 12:06:01.252882 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 12:06:01.263077 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 12:06:01.263388 I2C: 00:15
1207 12:06:01.269863 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 12:06:01.276121 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 12:06:01.286383 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 12:06:01.295933 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 12:06:01.296658 GENERIC: 0.0
1212 12:06:01.299505 PCI: 01:00.0
1213 12:06:01.309135 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 12:06:01.319084 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 12:06:01.325846 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 12:06:01.329151 PCI: 00:1e.0
1217 12:06:01.339046 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 12:06:01.345679 PCI: 00:1e.2 child on link 0 SPI: 00
1219 12:06:01.355519 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 12:06:01.355678 SPI: 00
1221 12:06:01.358935 PCI: 00:1e.3 child on link 0 SPI: 00
1222 12:06:01.368907 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 12:06:01.372253 SPI: 00
1224 12:06:01.375906 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 12:06:01.382276 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 12:06:01.385564 PNP: 0c09.0
1227 12:06:01.395939 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 12:06:01.399293 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 12:06:01.408991 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 12:06:01.418927 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 12:06:01.422597 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 12:06:01.425744 GENERIC: 0.0
1233 12:06:01.426175 GENERIC: 1.0
1234 12:06:01.429155 PCI: 00:1f.3
1235 12:06:01.438970 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 12:06:01.448880 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 12:06:01.449188 PCI: 00:1f.5
1238 12:06:01.458651 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 12:06:01.461830 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 12:06:01.465350 APIC: 00
1241 12:06:01.465432 APIC: 01
1242 12:06:01.465542 APIC: 05
1243 12:06:01.468451 APIC: 06
1244 12:06:01.468532 APIC: 03
1245 12:06:01.468597 APIC: 02
1246 12:06:01.471982 APIC: 04
1247 12:06:01.472064 APIC: 07
1248 12:06:01.481737 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 12:06:01.485176 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 12:06:01.491612 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 12:06:01.498110 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 12:06:01.501840 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 12:06:01.505143 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 12:06:01.511665 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 12:06:01.518188 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 12:06:01.525122 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 12:06:01.531970 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 12:06:01.541323 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 12:06:01.548363 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 12:06:01.554533 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 12:06:01.561194 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 12:06:01.568093 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 12:06:01.570959 DOMAIN: 0000: Resource ranges:
1264 12:06:01.574446 * Base: 1000, Size: 800, Tag: 100
1265 12:06:01.577723 * Base: 1900, Size: e700, Tag: 100
1266 12:06:01.584372 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 12:06:01.591299 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 12:06:01.597825 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 12:06:01.604588 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 12:06:01.614600 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 12:06:01.621233 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 12:06:01.627773 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 12:06:01.638191 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 12:06:01.644410 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 12:06:01.651122 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 12:06:01.661056 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 12:06:01.668155 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 12:06:01.674371 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 12:06:01.684667 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 12:06:01.691225 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 12:06:01.697558 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 12:06:01.707750 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 12:06:01.714314 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 12:06:01.721349 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 12:06:01.730810 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 12:06:01.737496 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 12:06:01.743975 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 12:06:01.753933 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 12:06:01.760767 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 12:06:01.767808 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 12:06:01.770845 DOMAIN: 0000: Resource ranges:
1292 12:06:01.777289 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 12:06:01.780576 * Base: d0000000, Size: 28000000, Tag: 200
1294 12:06:01.783914 * Base: fa000000, Size: 1000000, Tag: 200
1295 12:06:01.787133 * Base: fb001000, Size: 2fff000, Tag: 200
1296 12:06:01.794069 * Base: fe010000, Size: 2e000, Tag: 200
1297 12:06:01.797509 * Base: fe03f000, Size: d41000, Tag: 200
1298 12:06:01.800412 * Base: fed88000, Size: 8000, Tag: 200
1299 12:06:01.803932 * Base: fed93000, Size: d000, Tag: 200
1300 12:06:01.810356 * Base: feda2000, Size: 1e000, Tag: 200
1301 12:06:01.813737 * Base: fede0000, Size: 1220000, Tag: 200
1302 12:06:01.817418 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 12:06:01.827073 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 12:06:01.834075 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 12:06:01.840509 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 12:06:01.846821 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 12:06:01.853703 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 12:06:01.860064 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 12:06:01.866970 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 12:06:01.873509 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 12:06:01.879934 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 12:06:01.887338 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 12:06:01.893578 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 12:06:01.896915 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 12:06:01.903576 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 12:06:01.910123 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 12:06:01.917036 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 12:06:01.923492 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 12:06:01.930129 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 12:06:01.936686 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 12:06:01.943755 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 12:06:01.950465 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 12:06:01.956618 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 12:06:01.963381 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 12:06:01.973575 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 12:06:01.980062 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 12:06:01.983049 PCI: 00:1d.0: Resource ranges:
1328 12:06:01.986626 * Base: 7fc00000, Size: 100000, Tag: 200
1329 12:06:01.993377 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 12:06:01.999732 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 12:06:02.006283 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 12:06:02.016420 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 12:06:02.023153 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 12:06:02.026446 Root Device assign_resources, bus 0 link: 0
1335 12:06:02.033134 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 12:06:02.039725 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 12:06:02.049454 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 12:06:02.056093 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 12:06:02.066117 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 12:06:02.069543 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 12:06:02.072969 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 12:06:02.082928 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 12:06:02.089446 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 12:06:02.099837 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 12:06:02.103111 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 12:06:02.109526 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 12:06:02.115899 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 12:06:02.122678 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 12:06:02.126109 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 12:06:02.132526 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 12:06:02.142437 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 12:06:02.149212 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 12:06:02.155779 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 12:06:02.159168 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 12:06:02.168955 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 12:06:02.172612 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 12:06:02.175671 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 12:06:02.185936 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 12:06:02.188954 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 12:06:02.195554 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 12:06:02.202079 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 12:06:02.212167 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 12:06:02.218637 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 12:06:02.228879 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 12:06:02.231956 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 12:06:02.235558 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 12:06:02.245154 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 12:06:02.255110 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 12:06:02.265211 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 12:06:02.268640 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 12:06:02.275464 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 12:06:02.285111 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 12:06:02.291753 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 12:06:02.298845 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 12:06:02.305281 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 12:06:02.308326 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 12:06:02.315204 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 12:06:02.321969 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 12:06:02.328803 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 12:06:02.331680 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 12:06:02.335189 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 12:06:02.342147 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 12:06:02.345340 LPC: Trying to open IO window from 800 size 1ff
1384 12:06:02.355439 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 12:06:02.362011 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 12:06:02.371776 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 12:06:02.375247 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 12:06:02.382161 Root Device assign_resources, bus 0 link: 0
1389 12:06:02.382590 Done setting resources.
1390 12:06:02.388692 Show resources in subtree (Root Device)...After assigning values.
1391 12:06:02.394926 Root Device child on link 0 DOMAIN: 0000
1392 12:06:02.398499 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 12:06:02.408365 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 12:06:02.418275 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 12:06:02.418846 PCI: 00:00.0
1396 12:06:02.428438 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 12:06:02.438664 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 12:06:02.448918 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 12:06:02.458321 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 12:06:02.464949 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 12:06:02.474900 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 12:06:02.484533 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 12:06:02.494839 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 12:06:02.504850 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 12:06:02.511407 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 12:06:02.521404 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 12:06:02.530933 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 12:06:02.540510 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 12:06:02.550425 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 12:06:02.557465 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 12:06:02.567029 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 12:06:02.577281 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 12:06:02.587422 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 12:06:02.597360 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 12:06:02.607432 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 12:06:02.607523 PCI: 00:02.0
1417 12:06:02.620142 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 12:06:02.630214 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 12:06:02.640223 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 12:06:02.643640 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 12:06:02.653622 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 12:06:02.656795 GENERIC: 0.0
1423 12:06:02.656871 PCI: 00:05.0
1424 12:06:02.666886 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 12:06:02.673388 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 12:06:02.673491 GENERIC: 0.0
1427 12:06:02.676902 PCI: 00:08.0
1428 12:06:02.686598 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 12:06:02.686683 PCI: 00:0a.0
1430 12:06:02.693454 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 12:06:02.703354 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 12:06:02.706539 USB0 port 0 child on link 0 USB3 port 0
1433 12:06:02.710293 USB3 port 0
1434 12:06:02.710371 USB3 port 1
1435 12:06:02.713288 USB3 port 2
1436 12:06:02.713389 USB3 port 3
1437 12:06:02.720074 PCI: 00:14.0 child on link 0 USB0 port 0
1438 12:06:02.730547 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 12:06:02.733449 USB0 port 0 child on link 0 USB2 port 0
1440 12:06:02.736501 USB2 port 0
1441 12:06:02.736574 USB2 port 1
1442 12:06:02.739997 USB2 port 2
1443 12:06:02.740069 USB2 port 3
1444 12:06:02.743060 USB2 port 4
1445 12:06:02.743133 USB2 port 5
1446 12:06:02.746541 USB2 port 6
1447 12:06:02.746652 USB2 port 7
1448 12:06:02.749965 USB2 port 8
1449 12:06:02.750047 USB2 port 9
1450 12:06:02.753014 USB3 port 0
1451 12:06:02.753097 USB3 port 1
1452 12:06:02.756439 USB3 port 2
1453 12:06:02.756514 USB3 port 3
1454 12:06:02.760026 PCI: 00:14.2
1455 12:06:02.770098 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 12:06:02.779611 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 12:06:02.786439 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 12:06:02.796337 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 12:06:02.796417 GENERIC: 0.0
1460 12:06:02.802874 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 12:06:02.813129 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 12:06:02.813207 I2C: 00:1a
1463 12:06:02.816129 I2C: 00:31
1464 12:06:02.816200 I2C: 00:32
1465 12:06:02.819738 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 12:06:02.829396 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 12:06:02.832812 I2C: 00:10
1468 12:06:02.832885 PCI: 00:15.2
1469 12:06:02.845996 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 12:06:02.846077 PCI: 00:15.3
1471 12:06:02.856307 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 12:06:02.859576 PCI: 00:16.0
1473 12:06:02.869329 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 12:06:02.869426 PCI: 00:19.0
1475 12:06:02.876130 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 12:06:02.885984 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 12:06:02.886066 I2C: 00:15
1478 12:06:02.892921 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 12:06:02.899338 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 12:06:02.912261 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 12:06:02.922275 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 12:06:02.925795 GENERIC: 0.0
1483 12:06:02.925871 PCI: 01:00.0
1484 12:06:02.935614 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 12:06:02.945355 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 12:06:02.955688 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 12:06:02.959041 PCI: 00:1e.0
1488 12:06:02.968647 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 12:06:02.975314 PCI: 00:1e.2 child on link 0 SPI: 00
1490 12:06:02.985564 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 12:06:02.985650 SPI: 00
1492 12:06:02.988708 PCI: 00:1e.3 child on link 0 SPI: 00
1493 12:06:02.998823 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 12:06:03.002364 SPI: 00
1495 12:06:03.005620 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 12:06:03.015796 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 12:06:03.015887 PNP: 0c09.0
1498 12:06:03.025423 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 12:06:03.028734 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 12:06:03.038860 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 12:06:03.048578 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 12:06:03.051869 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 12:06:03.055279 GENERIC: 0.0
1504 12:06:03.055353 GENERIC: 1.0
1505 12:06:03.059009 PCI: 00:1f.3
1506 12:06:03.068516 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 12:06:03.078356 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 12:06:03.081868 PCI: 00:1f.5
1509 12:06:03.091770 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 12:06:03.095179 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 12:06:03.095265 APIC: 00
1512 12:06:03.098390 APIC: 01
1513 12:06:03.098475 APIC: 05
1514 12:06:03.098559 APIC: 06
1515 12:06:03.101731 APIC: 03
1516 12:06:03.101815 APIC: 02
1517 12:06:03.105234 APIC: 04
1518 12:06:03.105318 APIC: 07
1519 12:06:03.108467 Done allocating resources.
1520 12:06:03.115279 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 12:06:03.118789 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 12:06:03.124979 Configure GPIOs for I2S audio on UP4.
1523 12:06:03.131692 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 12:06:03.131777 Enabling resources...
1525 12:06:03.138683 PCI: 00:00.0 subsystem <- 8086/9a12
1526 12:06:03.138768 PCI: 00:00.0 cmd <- 06
1527 12:06:03.141930 PCI: 00:02.0 subsystem <- 8086/9a40
1528 12:06:03.145135 PCI: 00:02.0 cmd <- 03
1529 12:06:03.148461 PCI: 00:04.0 subsystem <- 8086/9a03
1530 12:06:03.151770 PCI: 00:04.0 cmd <- 02
1531 12:06:03.155163 PCI: 00:05.0 subsystem <- 8086/9a19
1532 12:06:03.158233 PCI: 00:05.0 cmd <- 02
1533 12:06:03.161733 PCI: 00:08.0 subsystem <- 8086/9a11
1534 12:06:03.165081 PCI: 00:08.0 cmd <- 06
1535 12:06:03.168303 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 12:06:03.171890 PCI: 00:0d.0 cmd <- 02
1537 12:06:03.175227 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 12:06:03.175320 PCI: 00:14.0 cmd <- 02
1539 12:06:03.181819 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 12:06:03.181905 PCI: 00:14.2 cmd <- 02
1541 12:06:03.185208 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 12:06:03.188544 PCI: 00:14.3 cmd <- 02
1543 12:06:03.192122 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 12:06:03.195238 PCI: 00:15.0 cmd <- 02
1545 12:06:03.198604 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 12:06:03.201815 PCI: 00:15.1 cmd <- 02
1547 12:06:03.205320 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 12:06:03.208462 PCI: 00:15.2 cmd <- 02
1549 12:06:03.211436 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 12:06:03.214974 PCI: 00:15.3 cmd <- 02
1551 12:06:03.218279 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 12:06:03.221790 PCI: 00:16.0 cmd <- 02
1553 12:06:03.225041 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 12:06:03.225126 PCI: 00:19.1 cmd <- 02
1555 12:06:03.228192 PCI: 00:1d.0 bridge ctrl <- 0013
1556 12:06:03.235030 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 12:06:03.235120 PCI: 00:1d.0 cmd <- 06
1558 12:06:03.238111 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 12:06:03.241746 PCI: 00:1e.0 cmd <- 06
1560 12:06:03.244716 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 12:06:03.248314 PCI: 00:1e.2 cmd <- 06
1562 12:06:03.251628 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 12:06:03.255007 PCI: 00:1e.3 cmd <- 02
1564 12:06:03.257994 PCI: 00:1f.0 subsystem <- 8086/a087
1565 12:06:03.261637 PCI: 00:1f.0 cmd <- 407
1566 12:06:03.264945 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 12:06:03.267652 PCI: 00:1f.3 cmd <- 02
1568 12:06:03.271004 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 12:06:03.274505 PCI: 00:1f.5 cmd <- 406
1570 12:06:03.278006 PCI: 01:00.0 cmd <- 02
1571 12:06:03.282212 done.
1572 12:06:03.285563 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 12:06:03.288941 Initializing devices...
1574 12:06:03.292016 Root Device init
1575 12:06:03.295545 Chrome EC: Set SMI mask to 0x0000000000000000
1576 12:06:03.302041 Chrome EC: clear events_b mask to 0x0000000000000000
1577 12:06:03.308541 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 12:06:03.311874 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 12:06:03.318784 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 12:06:03.325346 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 12:06:03.328855 fw_config match found: DB_USB=USB3_ACTIVE
1582 12:06:03.335168 Configure Right Type-C port orientation for retimer
1583 12:06:03.338722 Root Device init finished in 43 msecs
1584 12:06:03.342193 PCI: 00:00.0 init
1585 12:06:03.345310 CPU TDP = 9 Watts
1586 12:06:03.345418 CPU PL1 = 9 Watts
1587 12:06:03.348667 CPU PL2 = 40 Watts
1588 12:06:03.348749 CPU PL4 = 83 Watts
1589 12:06:03.351670 PCI: 00:00.0 init finished in 8 msecs
1590 12:06:03.355274 PCI: 00:02.0 init
1591 12:06:03.358732 GMA: Found VBT in CBFS
1592 12:06:03.362146 GMA: Found valid VBT in CBFS
1593 12:06:03.365361 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 12:06:03.375367 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 12:06:03.378817 PCI: 00:02.0 init finished in 18 msecs
1596 12:06:03.381925 PCI: 00:05.0 init
1597 12:06:03.385344 PCI: 00:05.0 init finished in 0 msecs
1598 12:06:03.385486 PCI: 00:08.0 init
1599 12:06:03.392055 PCI: 00:08.0 init finished in 0 msecs
1600 12:06:03.392156 PCI: 00:14.0 init
1601 12:06:03.398693 PCI: 00:14.0 init finished in 0 msecs
1602 12:06:03.398776 PCI: 00:14.2 init
1603 12:06:03.401902 PCI: 00:14.2 init finished in 0 msecs
1604 12:06:03.405316 PCI: 00:15.0 init
1605 12:06:03.408765 I2C bus 0 version 0x3230302a
1606 12:06:03.412498 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 12:06:03.415428 PCI: 00:15.0 init finished in 6 msecs
1608 12:06:03.419364 PCI: 00:15.1 init
1609 12:06:03.422141 I2C bus 1 version 0x3230302a
1610 12:06:03.425370 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 12:06:03.429111 PCI: 00:15.1 init finished in 6 msecs
1612 12:06:03.432358 PCI: 00:15.2 init
1613 12:06:03.435585 I2C bus 2 version 0x3230302a
1614 12:06:03.438778 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 12:06:03.442467 PCI: 00:15.2 init finished in 6 msecs
1616 12:06:03.442550 PCI: 00:15.3 init
1617 12:06:03.445497 I2C bus 3 version 0x3230302a
1618 12:06:03.448788 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 12:06:03.455710 PCI: 00:15.3 init finished in 6 msecs
1620 12:06:03.455818 PCI: 00:16.0 init
1621 12:06:03.458643 PCI: 00:16.0 init finished in 0 msecs
1622 12:06:03.462320 PCI: 00:19.1 init
1623 12:06:03.465679 I2C bus 5 version 0x3230302a
1624 12:06:03.468978 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 12:06:03.472368 PCI: 00:19.1 init finished in 6 msecs
1626 12:06:03.475610 PCI: 00:1d.0 init
1627 12:06:03.478830 Initializing PCH PCIe bridge.
1628 12:06:03.482087 PCI: 00:1d.0 init finished in 3 msecs
1629 12:06:03.485672 PCI: 00:1f.0 init
1630 12:06:03.488752 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 12:06:03.495359 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 12:06:03.495442 IOAPIC: ID = 0x02
1633 12:06:03.498698 IOAPIC: Dumping registers
1634 12:06:03.502052 reg 0x0000: 0x02000000
1635 12:06:03.502163 reg 0x0001: 0x00770020
1636 12:06:03.505877 reg 0x0002: 0x00000000
1637 12:06:03.508891 PCI: 00:1f.0 init finished in 21 msecs
1638 12:06:03.512249 PCI: 00:1f.2 init
1639 12:06:03.515884 Disabling ACPI via APMC.
1640 12:06:03.518918 APMC done.
1641 12:06:03.522546 PCI: 00:1f.2 init finished in 5 msecs
1642 12:06:03.533737 PCI: 01:00.0 init
1643 12:06:03.536838 PCI: 01:00.0 init finished in 0 msecs
1644 12:06:03.540703 PNP: 0c09.0 init
1645 12:06:03.543992 Google Chrome EC uptime: 8.382 seconds
1646 12:06:03.550490 Google Chrome AP resets since EC boot: 1
1647 12:06:03.553645 Google Chrome most recent AP reset causes:
1648 12:06:03.556922 0.347: 32775 shutdown: entering G3
1649 12:06:03.563753 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 12:06:03.567031 PNP: 0c09.0 init finished in 22 msecs
1651 12:06:03.572637 Devices initialized
1652 12:06:03.576092 Show all devs... After init.
1653 12:06:03.579332 Root Device: enabled 1
1654 12:06:03.579448 DOMAIN: 0000: enabled 1
1655 12:06:03.583098 CPU_CLUSTER: 0: enabled 1
1656 12:06:03.585759 PCI: 00:00.0: enabled 1
1657 12:06:03.589622 PCI: 00:02.0: enabled 1
1658 12:06:03.589700 PCI: 00:04.0: enabled 1
1659 12:06:03.593022 PCI: 00:05.0: enabled 1
1660 12:06:03.596097 PCI: 00:06.0: enabled 0
1661 12:06:03.599309 PCI: 00:07.0: enabled 0
1662 12:06:03.599381 PCI: 00:07.1: enabled 0
1663 12:06:03.602825 PCI: 00:07.2: enabled 0
1664 12:06:03.606230 PCI: 00:07.3: enabled 0
1665 12:06:03.609414 PCI: 00:08.0: enabled 1
1666 12:06:03.609525 PCI: 00:09.0: enabled 0
1667 12:06:03.612778 PCI: 00:0a.0: enabled 0
1668 12:06:03.616164 PCI: 00:0d.0: enabled 1
1669 12:06:03.616246 PCI: 00:0d.1: enabled 0
1670 12:06:03.619299 PCI: 00:0d.2: enabled 0
1671 12:06:03.622568 PCI: 00:0d.3: enabled 0
1672 12:06:03.625986 PCI: 00:0e.0: enabled 0
1673 12:06:03.626069 PCI: 00:10.2: enabled 1
1674 12:06:03.629584 PCI: 00:10.6: enabled 0
1675 12:06:03.632602 PCI: 00:10.7: enabled 0
1676 12:06:03.636180 PCI: 00:12.0: enabled 0
1677 12:06:03.636262 PCI: 00:12.6: enabled 0
1678 12:06:03.639011 PCI: 00:13.0: enabled 0
1679 12:06:03.642733 PCI: 00:14.0: enabled 1
1680 12:06:03.646208 PCI: 00:14.1: enabled 0
1681 12:06:03.646290 PCI: 00:14.2: enabled 1
1682 12:06:03.649168 PCI: 00:14.3: enabled 1
1683 12:06:03.652414 PCI: 00:15.0: enabled 1
1684 12:06:03.655695 PCI: 00:15.1: enabled 1
1685 12:06:03.655802 PCI: 00:15.2: enabled 1
1686 12:06:03.659056 PCI: 00:15.3: enabled 1
1687 12:06:03.662759 PCI: 00:16.0: enabled 1
1688 12:06:03.662840 PCI: 00:16.1: enabled 0
1689 12:06:03.666024 PCI: 00:16.2: enabled 0
1690 12:06:03.669250 PCI: 00:16.3: enabled 0
1691 12:06:03.672438 PCI: 00:16.4: enabled 0
1692 12:06:03.672550 PCI: 00:16.5: enabled 0
1693 12:06:03.675633 PCI: 00:17.0: enabled 0
1694 12:06:03.679412 PCI: 00:19.0: enabled 0
1695 12:06:03.682471 PCI: 00:19.1: enabled 1
1696 12:06:03.682553 PCI: 00:19.2: enabled 0
1697 12:06:03.685888 PCI: 00:1c.0: enabled 1
1698 12:06:03.688963 PCI: 00:1c.1: enabled 0
1699 12:06:03.692178 PCI: 00:1c.2: enabled 0
1700 12:06:03.692256 PCI: 00:1c.3: enabled 0
1701 12:06:03.695683 PCI: 00:1c.4: enabled 0
1702 12:06:03.698960 PCI: 00:1c.5: enabled 0
1703 12:06:03.699042 PCI: 00:1c.6: enabled 1
1704 12:06:03.702303 PCI: 00:1c.7: enabled 0
1705 12:06:03.705665 PCI: 00:1d.0: enabled 1
1706 12:06:03.709021 PCI: 00:1d.1: enabled 0
1707 12:06:03.709097 PCI: 00:1d.2: enabled 1
1708 12:06:03.712313 PCI: 00:1d.3: enabled 0
1709 12:06:03.715605 PCI: 00:1e.0: enabled 1
1710 12:06:03.718981 PCI: 00:1e.1: enabled 0
1711 12:06:03.719059 PCI: 00:1e.2: enabled 1
1712 12:06:03.722456 PCI: 00:1e.3: enabled 1
1713 12:06:03.725831 PCI: 00:1f.0: enabled 1
1714 12:06:03.728730 PCI: 00:1f.1: enabled 0
1715 12:06:03.728809 PCI: 00:1f.2: enabled 1
1716 12:06:03.732356 PCI: 00:1f.3: enabled 1
1717 12:06:03.735708 PCI: 00:1f.4: enabled 0
1718 12:06:03.738748 PCI: 00:1f.5: enabled 1
1719 12:06:03.738823 PCI: 00:1f.6: enabled 0
1720 12:06:03.742135 PCI: 00:1f.7: enabled 0
1721 12:06:03.745678 APIC: 00: enabled 1
1722 12:06:03.745752 GENERIC: 0.0: enabled 1
1723 12:06:03.749081 GENERIC: 0.0: enabled 1
1724 12:06:03.752256 GENERIC: 1.0: enabled 1
1725 12:06:03.755385 GENERIC: 0.0: enabled 1
1726 12:06:03.755463 GENERIC: 1.0: enabled 1
1727 12:06:03.758517 USB0 port 0: enabled 1
1728 12:06:03.762041 GENERIC: 0.0: enabled 1
1729 12:06:03.762113 USB0 port 0: enabled 1
1730 12:06:03.765233 GENERIC: 0.0: enabled 1
1731 12:06:03.768768 I2C: 00:1a: enabled 1
1732 12:06:03.772020 I2C: 00:31: enabled 1
1733 12:06:03.772095 I2C: 00:32: enabled 1
1734 12:06:03.775481 I2C: 00:10: enabled 1
1735 12:06:03.778764 I2C: 00:15: enabled 1
1736 12:06:03.778866 GENERIC: 0.0: enabled 0
1737 12:06:03.782152 GENERIC: 1.0: enabled 0
1738 12:06:03.785436 GENERIC: 0.0: enabled 1
1739 12:06:03.785526 SPI: 00: enabled 1
1740 12:06:03.788625 SPI: 00: enabled 1
1741 12:06:03.791745 PNP: 0c09.0: enabled 1
1742 12:06:03.791846 GENERIC: 0.0: enabled 1
1743 12:06:03.795333 USB3 port 0: enabled 1
1744 12:06:03.798408 USB3 port 1: enabled 1
1745 12:06:03.798494 USB3 port 2: enabled 0
1746 12:06:03.801675 USB3 port 3: enabled 0
1747 12:06:03.805068 USB2 port 0: enabled 0
1748 12:06:03.808673 USB2 port 1: enabled 1
1749 12:06:03.808757 USB2 port 2: enabled 1
1750 12:06:03.811969 USB2 port 3: enabled 0
1751 12:06:03.814941 USB2 port 4: enabled 1
1752 12:06:03.815049 USB2 port 5: enabled 0
1753 12:06:03.818663 USB2 port 6: enabled 0
1754 12:06:03.821748 USB2 port 7: enabled 0
1755 12:06:03.825348 USB2 port 8: enabled 0
1756 12:06:03.825430 USB2 port 9: enabled 0
1757 12:06:03.828463 USB3 port 0: enabled 0
1758 12:06:03.831742 USB3 port 1: enabled 1
1759 12:06:03.831823 USB3 port 2: enabled 0
1760 12:06:03.834967 USB3 port 3: enabled 0
1761 12:06:03.838421 GENERIC: 0.0: enabled 1
1762 12:06:03.841910 GENERIC: 1.0: enabled 1
1763 12:06:03.841991 APIC: 01: enabled 1
1764 12:06:03.845352 APIC: 05: enabled 1
1765 12:06:03.845459 APIC: 06: enabled 1
1766 12:06:03.848347 APIC: 03: enabled 1
1767 12:06:03.851718 APIC: 02: enabled 1
1768 12:06:03.851801 APIC: 04: enabled 1
1769 12:06:03.854780 APIC: 07: enabled 1
1770 12:06:03.858050 PCI: 01:00.0: enabled 1
1771 12:06:03.861799 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1772 12:06:03.868083 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 12:06:03.871651 ELOG: NV offset 0xf30000 size 0x1000
1774 12:06:03.878048 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 12:06:03.884929 ELOG: Event(17) added with size 13 at 2023-04-03 12:06:02 UTC
1776 12:06:03.891935 ELOG: Event(92) added with size 9 at 2023-04-03 12:06:02 UTC
1777 12:06:03.898793 ELOG: Event(93) added with size 9 at 2023-04-03 12:06:02 UTC
1778 12:06:03.904865 ELOG: Event(9E) added with size 10 at 2023-04-03 12:06:02 UTC
1779 12:06:03.911737 ELOG: Event(9F) added with size 14 at 2023-04-03 12:06:02 UTC
1780 12:06:03.915016 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 12:06:03.921432 ELOG: Event(A1) added with size 10 at 2023-04-03 12:06:02 UTC
1782 12:06:03.931637 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1783 12:06:03.935156 ELOG: Event(A0) added with size 9 at 2023-04-03 12:06:02 UTC
1784 12:06:03.941804 elog_add_boot_reason: Logged dev mode boot
1785 12:06:03.948159 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1786 12:06:03.948240 Finalize devices...
1787 12:06:03.951695 Devices finalized
1788 12:06:03.954853 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1789 12:06:03.961249 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1790 12:06:03.968205 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1791 12:06:03.971470 ME: HFSTS1 : 0x80030055
1792 12:06:03.974610 ME: HFSTS2 : 0x30280116
1793 12:06:03.981298 ME: HFSTS3 : 0x00000050
1794 12:06:03.984607 ME: HFSTS4 : 0x00004000
1795 12:06:03.988396 ME: HFSTS5 : 0x00000000
1796 12:06:03.994415 ME: HFSTS6 : 0x00400006
1797 12:06:03.998021 ME: Manufacturing Mode : YES
1798 12:06:04.001307 ME: SPI Protection Mode Enabled : NO
1799 12:06:04.004524 ME: FW Partition Table : OK
1800 12:06:04.007771 ME: Bringup Loader Failure : NO
1801 12:06:04.011114 ME: Firmware Init Complete : NO
1802 12:06:04.017879 ME: Boot Options Present : NO
1803 12:06:04.021315 ME: Update In Progress : NO
1804 12:06:04.024524 ME: D0i3 Support : YES
1805 12:06:04.027920 ME: Low Power State Enabled : NO
1806 12:06:04.030935 ME: CPU Replaced : YES
1807 12:06:04.034331 ME: CPU Replacement Valid : YES
1808 12:06:04.037710 ME: Current Working State : 5
1809 12:06:04.040664 ME: Current Operation State : 1
1810 12:06:04.047852 ME: Current Operation Mode : 3
1811 12:06:04.050968 ME: Error Code : 0
1812 12:06:04.054197 ME: Enhanced Debug Mode : NO
1813 12:06:04.057793 ME: CPU Debug Disabled : YES
1814 12:06:04.060685 ME: TXT Support : NO
1815 12:06:04.067489 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1816 12:06:04.073963 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1817 12:06:04.077197 CBFS: 'fallback/slic' not found.
1818 12:06:04.080476 ACPI: Writing ACPI tables at 76b01000.
1819 12:06:04.083837 ACPI: * FACS
1820 12:06:04.083915 ACPI: * DSDT
1821 12:06:04.090692 Ramoops buffer: 0x100000@0x76a00000.
1822 12:06:04.093856 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1823 12:06:04.097150 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1824 12:06:04.100905 Google Chrome EC: version:
1825 12:06:04.104129 ro: voema_v2.0.7540-147f8d37d1
1826 12:06:04.108076 rw: voema_v2.0.7540-147f8d37d1
1827 12:06:04.110880 running image: 2
1828 12:06:04.117522 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1829 12:06:04.120705 ACPI: * FADT
1830 12:06:04.120782 SCI is IRQ9
1831 12:06:04.124135 ACPI: added table 1/32, length now 40
1832 12:06:04.127970 ACPI: * SSDT
1833 12:06:04.130887 Found 1 CPU(s) with 8 core(s) each.
1834 12:06:04.137399 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1835 12:06:04.140453 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1836 12:06:04.144154 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1837 12:06:04.147482 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1838 12:06:04.154095 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1839 12:06:04.160777 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1840 12:06:04.163868 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1841 12:06:04.170465 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1842 12:06:04.176961 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1843 12:06:04.180605 \_SB.PCI0.RP09: Added StorageD3Enable property
1844 12:06:04.183558 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1845 12:06:04.190295 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1846 12:06:04.197228 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1847 12:06:04.200784 PS2K: Passing 80 keymaps to kernel
1848 12:06:04.206948 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1849 12:06:04.213435 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1850 12:06:04.220324 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1851 12:06:04.226831 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1852 12:06:04.233590 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1853 12:06:04.240329 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1854 12:06:04.243600 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1855 12:06:04.250119 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1856 12:06:04.256887 ACPI: added table 2/32, length now 44
1857 12:06:04.256971 ACPI: * MCFG
1858 12:06:04.259807 ACPI: added table 3/32, length now 48
1859 12:06:04.263192 ACPI: * TPM2
1860 12:06:04.267104 TPM2 log created at 0x769f0000
1861 12:06:04.270111 ACPI: added table 4/32, length now 52
1862 12:06:04.270194 ACPI: * MADT
1863 12:06:04.273289 SCI is IRQ9
1864 12:06:04.276489 ACPI: added table 5/32, length now 56
1865 12:06:04.276572 current = 76b09850
1866 12:06:04.279961 ACPI: * DMAR
1867 12:06:04.283390 ACPI: added table 6/32, length now 60
1868 12:06:04.286425 ACPI: added table 7/32, length now 64
1869 12:06:04.289896 ACPI: * HPET
1870 12:06:04.293104 ACPI: added table 8/32, length now 68
1871 12:06:04.293189 ACPI: done.
1872 12:06:04.296678 ACPI tables: 35216 bytes.
1873 12:06:04.300139 smbios_write_tables: 769ef000
1874 12:06:04.303191 EC returned error result code 3
1875 12:06:04.306516 Couldn't obtain OEM name from CBI
1876 12:06:04.309942 Create SMBIOS type 16
1877 12:06:04.313122 Create SMBIOS type 17
1878 12:06:04.313198 GENERIC: 0.0 (WIFI Device)
1879 12:06:04.316432 SMBIOS tables: 1750 bytes.
1880 12:06:04.322725 Writing table forward entry at 0x00000500
1881 12:06:04.326392 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1882 12:06:04.332706 Writing coreboot table at 0x76b25000
1883 12:06:04.336204 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1884 12:06:04.343062 1. 0000000000001000-000000000009ffff: RAM
1885 12:06:04.346219 2. 00000000000a0000-00000000000fffff: RESERVED
1886 12:06:04.349382 3. 0000000000100000-00000000769eefff: RAM
1887 12:06:04.356077 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1888 12:06:04.362663 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1889 12:06:04.366132 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1890 12:06:04.372721 7. 0000000077000000-000000007fbfffff: RESERVED
1891 12:06:04.375820 8. 00000000c0000000-00000000cfffffff: RESERVED
1892 12:06:04.382395 9. 00000000f8000000-00000000f9ffffff: RESERVED
1893 12:06:04.385910 10. 00000000fb000000-00000000fb000fff: RESERVED
1894 12:06:04.392651 11. 00000000fe000000-00000000fe00ffff: RESERVED
1895 12:06:04.395784 12. 00000000fed80000-00000000fed87fff: RESERVED
1896 12:06:04.402502 13. 00000000fed90000-00000000fed92fff: RESERVED
1897 12:06:04.405713 14. 00000000feda0000-00000000feda1fff: RESERVED
1898 12:06:04.409192 15. 00000000fedc0000-00000000feddffff: RESERVED
1899 12:06:04.415673 16. 0000000100000000-00000002803fffff: RAM
1900 12:06:04.418906 Passing 4 GPIOs to payload:
1901 12:06:04.422354 NAME | PORT | POLARITY | VALUE
1902 12:06:04.428917 lid | undefined | high | high
1903 12:06:04.432041 power | undefined | high | low
1904 12:06:04.439189 oprom | undefined | high | low
1905 12:06:04.445801 EC in RW | 0x000000e5 | high | high
1906 12:06:04.448985 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8358
1907 12:06:04.452332 coreboot table: 1576 bytes.
1908 12:06:04.455862 IMD ROOT 0. 0x76fff000 0x00001000
1909 12:06:04.462371 IMD SMALL 1. 0x76ffe000 0x00001000
1910 12:06:04.465821 FSP MEMORY 2. 0x76c4e000 0x003b0000
1911 12:06:04.469163 VPD 3. 0x76c4d000 0x00000367
1912 12:06:04.472145 RO MCACHE 4. 0x76c4c000 0x00000fdc
1913 12:06:04.475643 CONSOLE 5. 0x76c2c000 0x00020000
1914 12:06:04.479024 FMAP 6. 0x76c2b000 0x00000578
1915 12:06:04.482354 TIME STAMP 7. 0x76c2a000 0x00000910
1916 12:06:04.486049 VBOOT WORK 8. 0x76c16000 0x00014000
1917 12:06:04.488751 ROMSTG STCK 9. 0x76c15000 0x00001000
1918 12:06:04.495565 AFTER CAR 10. 0x76c0a000 0x0000b000
1919 12:06:04.498730 RAMSTAGE 11. 0x76b97000 0x00073000
1920 12:06:04.502454 REFCODE 12. 0x76b42000 0x00055000
1921 12:06:04.505408 SMM BACKUP 13. 0x76b32000 0x00010000
1922 12:06:04.508892 4f444749 14. 0x76b30000 0x00002000
1923 12:06:04.512441 EXT VBT15. 0x76b2d000 0x0000219f
1924 12:06:04.515730 COREBOOT 16. 0x76b25000 0x00008000
1925 12:06:04.518867 ACPI 17. 0x76b01000 0x00024000
1926 12:06:04.522538 ACPI GNVS 18. 0x76b00000 0x00001000
1927 12:06:04.528761 RAMOOPS 19. 0x76a00000 0x00100000
1928 12:06:04.532226 TPM2 TCGLOG20. 0x769f0000 0x00010000
1929 12:06:04.535627 SMBIOS 21. 0x769ef000 0x00000800
1930 12:06:04.535708 IMD small region:
1931 12:06:04.541994 IMD ROOT 0. 0x76ffec00 0x00000400
1932 12:06:04.545645 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1933 12:06:04.548616 POWER STATE 2. 0x76ffeb80 0x00000044
1934 12:06:04.552035 ROMSTAGE 3. 0x76ffeb60 0x00000004
1935 12:06:04.555367 MEM INFO 4. 0x76ffe980 0x000001e0
1936 12:06:04.562030 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1937 12:06:04.565395 MTRR: Physical address space:
1938 12:06:04.572154 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1939 12:06:04.578585 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1940 12:06:04.585091 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1941 12:06:04.588736 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1942 12:06:04.595136 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1943 12:06:04.601968 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1944 12:06:04.608552 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1945 12:06:04.611654 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 12:06:04.618515 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 12:06:04.621797 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 12:06:04.625352 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 12:06:04.628598 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 12:06:04.635342 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 12:06:04.638440 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 12:06:04.641667 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 12:06:04.644851 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 12:06:04.648242 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 12:06:04.654916 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 12:06:04.658449 call enable_fixed_mtrr()
1957 12:06:04.661671 CPU physical address size: 39 bits
1958 12:06:04.664859 MTRR: default type WB/UC MTRR counts: 6/6.
1959 12:06:04.668284 MTRR: UC selected as default type.
1960 12:06:04.674958 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1961 12:06:04.681508 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1962 12:06:04.688415 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1963 12:06:04.694801 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1964 12:06:04.701613 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1965 12:06:04.707993 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1966 12:06:04.708074
1967 12:06:04.708136 MTRR check
1968 12:06:04.711491 Fixed MTRRs : Enabled
1969 12:06:04.714871 Variable MTRRs: Enabled
1970 12:06:04.714950
1971 12:06:04.717992 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 12:06:04.721266 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 12:06:04.727982 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 12:06:04.731265 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 12:06:04.734676 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 12:06:04.737828 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 12:06:04.744577 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 12:06:04.748153 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 12:06:04.751443 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 12:06:04.754495 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 12:06:04.757942 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 12:06:04.767881 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1983 12:06:04.767981 call enable_fixed_mtrr()
1984 12:06:04.772339 Checking cr50 for pending updates
1985 12:06:04.776240 CPU physical address size: 39 bits
1986 12:06:04.779898 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 12:06:04.783272 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 12:06:04.789793 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 12:06:04.792829 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 12:06:04.796238 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 12:06:04.799446 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 12:06:04.806306 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 12:06:04.809635 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 12:06:04.812790 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 12:06:04.816287 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 12:06:04.819526 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 12:06:04.826344 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 12:06:04.829397 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 12:06:04.832680 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 12:06:04.839480 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 12:06:04.842848 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 12:06:04.845947 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 12:06:04.849298 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 12:06:04.856202 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 12:06:04.859175 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 12:06:04.862712 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 12:06:04.866016 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 12:06:04.869941 call enable_fixed_mtrr()
2009 12:06:04.873376 call enable_fixed_mtrr()
2010 12:06:04.876968 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 12:06:04.879867 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 12:06:04.886915 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 12:06:04.889842 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 12:06:04.893303 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 12:06:04.896409 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 12:06:04.903100 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 12:06:04.906801 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 12:06:04.909815 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 12:06:04.913028 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 12:06:04.919787 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 12:06:04.922923 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 12:06:04.926537 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 12:06:04.929804 call enable_fixed_mtrr()
2024 12:06:04.933127 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 12:06:04.939572 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 12:06:04.942884 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 12:06:04.946607 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 12:06:04.949594 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 12:06:04.956484 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 12:06:04.959634 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 12:06:04.962916 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 12:06:04.966260 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 12:06:04.969900 CPU physical address size: 39 bits
2034 12:06:04.977676 call enable_fixed_mtrr()
2035 12:06:04.977760 Reading cr50 TPM mode
2036 12:06:04.981412 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 12:06:04.984372 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 12:06:04.991199 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 12:06:04.994504 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 12:06:04.997706 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 12:06:05.001428 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 12:06:05.004458 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 12:06:05.011185 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 12:06:05.014548 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 12:06:05.017802 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 12:06:05.021249 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 12:06:05.027938 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 12:06:05.031333 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 12:06:05.034583 call enable_fixed_mtrr()
2050 12:06:05.038101 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 12:06:05.041182 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 12:06:05.047826 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 12:06:05.051004 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 12:06:05.054606 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 12:06:05.057722 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 12:06:05.064434 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 12:06:05.067893 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 12:06:05.071095 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 12:06:05.074231 CPU physical address size: 39 bits
2060 12:06:05.078579 call enable_fixed_mtrr()
2061 12:06:05.081711 CPU physical address size: 39 bits
2062 12:06:05.085700 CPU physical address size: 39 bits
2063 12:06:05.092460 CPU physical address size: 39 bits
2064 12:06:05.095874 BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 6 ms
2065 12:06:05.099026 CPU physical address size: 39 bits
2066 12:06:05.109020 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2067 12:06:05.112266 Checking segment from ROM address 0xffc02b38
2068 12:06:05.115886 Checking segment from ROM address 0xffc02b54
2069 12:06:05.122561 Loading segment from ROM address 0xffc02b38
2070 12:06:05.122643 code (compression=0)
2071 12:06:05.132476 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2072 12:06:05.142133 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2073 12:06:05.142215 it's not compressed!
2074 12:06:05.282465 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2075 12:06:05.288952 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2076 12:06:05.295358 Loading segment from ROM address 0xffc02b54
2077 12:06:05.295441 Entry Point 0x30000000
2078 12:06:05.298560 Loaded segments
2079 12:06:05.305443 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2080 12:06:05.348296 Finalizing chipset.
2081 12:06:05.351475 Finalizing SMM.
2082 12:06:05.351568 APMC done.
2083 12:06:05.358038 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2084 12:06:05.361313 mp_park_aps done after 0 msecs.
2085 12:06:05.364853 Jumping to boot code at 0x30000000(0x76b25000)
2086 12:06:05.375067 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2087 12:06:05.375154
2088 12:06:05.375242
2089 12:06:05.377913
2090 12:06:05.377995 Starting depthcharge on Voema...
2091 12:06:05.378340 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2092 12:06:05.378444 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2093 12:06:05.378531 Setting prompt string to ['volteer:']
2094 12:06:05.378614 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2095 12:06:05.381410
2096 12:06:05.387698 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2097 12:06:05.387784
2098 12:06:05.394522 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2099 12:06:05.394637
2100 12:06:05.401417 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2101 12:06:05.401534
2102 12:06:05.404738 Failed to find eMMC card reader
2103 12:06:05.404822
2104 12:06:05.404888 Wipe memory regions:
2105 12:06:05.407601
2106 12:06:05.411263 [0x00000000001000, 0x000000000a0000)
2107 12:06:05.411347
2108 12:06:05.414325 [0x00000000100000, 0x00000030000000)
2109 12:06:05.439565
2110 12:06:05.442455 [0x00000032662db0, 0x000000769ef000)
2111 12:06:05.478610
2112 12:06:05.481816 [0x00000100000000, 0x00000280400000)
2113 12:06:05.683080
2114 12:06:05.686687 ec_init: CrosEC protocol v3 supported (256, 256)
2115 12:06:05.686785
2116 12:06:05.692771 update_port_state: port C0 state: usb enable 1 mux conn 0
2117 12:06:05.692863
2118 12:06:05.702522 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2119 12:06:05.702616
2120 12:06:05.705971 pmc_check_ipc_sts: STS_BUSY done after 1529 us
2121 12:06:05.706054
2122 12:06:05.712591 send_conn_disc_msg: pmc_send_cmd succeeded
2123 12:06:06.143587
2124 12:06:06.143723 R8152: Initializing
2125 12:06:06.143793
2126 12:06:06.146586 Version 9 (ocp_data = 6010)
2127 12:06:06.146670
2128 12:06:06.150085 R8152: Done initializing
2129 12:06:06.150167
2130 12:06:06.153102 Adding net device
2131 12:06:06.454761
2132 12:06:06.458326 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2133 12:06:06.458416
2134 12:06:06.458481
2135 12:06:06.458542
2136 12:06:06.461635 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 12:06:06.562412 volteer: tftpboot 192.168.201.1 9849948/tftp-deploy-ejbb8oel/kernel/bzImage 9849948/tftp-deploy-ejbb8oel/kernel/cmdline 9849948/tftp-deploy-ejbb8oel/ramdisk/ramdisk.cpio.gz
2139 12:06:06.562555 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2140 12:06:06.562643 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2141 12:06:06.566618 tftpboot 192.168.201.1 9849948/tftp-deploy-ejbb8oel/kernel/bzImaoy-ejbb8oel/kernel/cmdline 9849948/tftp-deploy-ejbb8oel/ramdisk/ramdisk.cpio.gz
2142 12:06:06.566706
2143 12:06:06.566782 Waiting for link
2144 12:06:06.771384
2145 12:06:06.771522 done.
2146 12:06:06.771589
2147 12:06:06.771649 MAC: 00:e0:4c:71:a6:42
2148 12:06:06.771707
2149 12:06:06.774891 Sending DHCP discover... done.
2150 12:06:06.774974
2151 12:06:06.778046 Waiting for reply... done.
2152 12:06:06.778128
2153 12:06:06.781463 Sending DHCP request... done.
2154 12:06:06.781616
2155 12:06:06.784610 Waiting for reply... done.
2156 12:06:06.784692
2157 12:06:06.787780 My ip is 192.168.201.18
2158 12:06:06.787863
2159 12:06:06.791079 The DHCP server ip is 192.168.201.1
2160 12:06:06.791161
2161 12:06:06.794563 TFTP server IP predefined by user: 192.168.201.1
2162 12:06:06.797797
2163 12:06:06.804481 Bootfile predefined by user: 9849948/tftp-deploy-ejbb8oel/kernel/bzImage
2164 12:06:06.804568
2165 12:06:06.807762 Sending tftp read request... done.
2166 12:06:06.807877
2167 12:06:06.810896 Waiting for the transfer...
2168 12:06:06.810980
2169 12:06:07.086602 00000000 ################################################################
2170 12:06:07.086733
2171 12:06:07.342458 00080000 ################################################################
2172 12:06:07.342609
2173 12:06:07.585058 00100000 ################################################################
2174 12:06:07.585221
2175 12:06:07.842095 00180000 ################################################################
2176 12:06:07.842229
2177 12:06:08.092285 00200000 ################################################################
2178 12:06:08.092471
2179 12:06:08.354016 00280000 ################################################################
2180 12:06:08.354153
2181 12:06:08.609916 00300000 ################################################################
2182 12:06:08.610051
2183 12:06:08.865255 00380000 ################################################################
2184 12:06:08.865396
2185 12:06:09.115118 00400000 ################################################################
2186 12:06:09.115256
2187 12:06:09.376299 00480000 ################################################################
2188 12:06:09.376444
2189 12:06:09.640090 00500000 ################################################################
2190 12:06:09.640234
2191 12:06:09.897574 00580000 ################################################################
2192 12:06:09.897723
2193 12:06:10.153852 00600000 ################################################################
2194 12:06:10.153990
2195 12:06:10.398770 00680000 ################################################################
2196 12:06:10.398913
2197 12:06:10.639250 00700000 ################################################################
2198 12:06:10.639392
2199 12:06:10.647822 00780000 ## done.
2200 12:06:10.647899
2201 12:06:10.650893 The bootfile was 7880592 bytes long.
2202 12:06:10.650966
2203 12:06:10.654370 Sending tftp read request... done.
2204 12:06:10.654449
2205 12:06:10.657617 Waiting for the transfer...
2206 12:06:10.657698
2207 12:06:10.913404 00000000 ################################################################
2208 12:06:10.913574
2209 12:06:11.170640 00080000 ################################################################
2210 12:06:11.170775
2211 12:06:11.422782 00100000 ################################################################
2212 12:06:11.422964
2213 12:06:11.679504 00180000 ################################################################
2214 12:06:11.679645
2215 12:06:11.928538 00200000 ################################################################
2216 12:06:11.928695
2217 12:06:12.180203 00280000 ################################################################
2218 12:06:12.180340
2219 12:06:12.427686 00300000 ################################################################
2220 12:06:12.427834
2221 12:06:12.685688 00380000 ################################################################
2222 12:06:12.685823
2223 12:06:12.940909 00400000 ################################################################
2224 12:06:12.941051
2225 12:06:13.184800 00480000 ################################################################
2226 12:06:13.184935
2227 12:06:13.427175 00500000 ################################################################
2228 12:06:13.427319
2229 12:06:13.672850 00580000 ################################################################
2230 12:06:13.672988
2231 12:06:13.927666 00600000 ################################################################
2232 12:06:13.927810
2233 12:06:14.183797 00680000 ################################################################
2234 12:06:14.183945
2235 12:06:14.439055 00700000 ################################################################
2236 12:06:14.439235
2237 12:06:14.692530 00780000 ################################################################
2238 12:06:14.692691
2239 12:06:14.904291 00800000 ##################################################### done.
2240 12:06:14.904429
2241 12:06:14.907742 Sending tftp read request... done.
2242 12:06:14.907819
2243 12:06:14.911010 Waiting for the transfer...
2244 12:06:14.911094
2245 12:06:14.911160 00000000 # done.
2246 12:06:14.911242
2247 12:06:14.920849 Command line loaded dynamically from TFTP file: 9849948/tftp-deploy-ejbb8oel/kernel/cmdline
2248 12:06:14.920935
2249 12:06:14.934105 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2250 12:06:14.938723
2251 12:06:14.941816 Shutting down all USB controllers.
2252 12:06:14.941899
2253 12:06:14.941965 Removing current net device
2254 12:06:14.942031
2255 12:06:14.945392 Finalizing coreboot
2256 12:06:14.945519
2257 12:06:14.951803 Exiting depthcharge with code 4 at timestamp: 18236113
2258 12:06:14.951887
2259 12:06:14.951956
2260 12:06:14.952019 Starting kernel ...
2261 12:06:14.952079
2262 12:06:14.952168
2263 12:06:14.952530 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2264 12:06:14.952627 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
2265 12:06:14.952706 Setting prompt string to ['Linux version [0-9]']
2266 12:06:14.952774 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2267 12:06:14.952844 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2269 12:10:49.953055 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
2271 12:10:49.953407 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
2273 12:10:49.953710 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2276 12:10:49.954120 end: 2 depthcharge-action (duration 00:05:00) [common]
2278 12:10:49.954468 Cleaning after the job
2279 12:10:49.954606 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849948/tftp-deploy-ejbb8oel/ramdisk
2280 12:10:49.955846 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849948/tftp-deploy-ejbb8oel/kernel
2281 12:10:49.956976 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849948/tftp-deploy-ejbb8oel/modules
2282 12:10:49.957401 start: 5.1 power-off (timeout 00:00:30) [common]
2283 12:10:49.957689 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2284 12:10:50.036823 >> Command sent successfully.
2285 12:10:50.041960 Returned 0 in 0 seconds
2286 12:10:50.143373 end: 5.1 power-off (duration 00:00:00) [common]
2288 12:10:50.144982 start: 5.2 read-feedback (timeout 00:10:00) [common]
2289 12:10:50.146288 Listened to connection for namespace 'common' for up to 1s
2290 12:10:51.149800 Finalising connection for namespace 'common'
2291 12:10:51.150487 Disconnecting from shell: Finalise
2292 12:10:51.150928
2293 12:10:51.252328 end: 5.2 read-feedback (duration 00:00:01) [common]
2294 12:10:51.252872 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9849948
2295 12:10:51.262584 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9849948
2296 12:10:51.262709 JobError: Your job cannot terminate cleanly.