Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 12:05:48.471334 lava-dispatcher, installed at version: 2023.01
2 12:05:48.471535 start: 0 validate
3 12:05:48.471658 Start time: 2023-04-03 12:05:48.471648+00:00 (UTC)
4 12:05:48.471781 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:05:48.471911 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230324.0%2Famd64%2Finitrd.cpio.gz exists
6 12:05:48.762179 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:05:48.762359 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1097-g52d843097a439%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:05:52.759855 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:05:52.760030 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230324.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:05:53.048545 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:05:53.048719 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1097-g52d843097a439%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:05:54.052174 validate duration: 5.58
14 12:05:54.052586 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:05:54.052811 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:05:54.052980 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:05:54.053148 Not decompressing ramdisk as can be used compressed.
18 12:05:54.053273 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230324.0/amd64/initrd.cpio.gz
19 12:05:54.053375 saving as /var/lib/lava/dispatcher/tmp/9849907/tftp-deploy-clv4vtzd/ramdisk/initrd.cpio.gz
20 12:05:54.053468 total size: 5432104 (5MB)
21 12:05:54.054619 progress 0% (0MB)
22 12:05:54.056976 progress 5% (0MB)
23 12:05:54.059140 progress 10% (0MB)
24 12:05:54.061266 progress 15% (0MB)
25 12:05:54.063670 progress 20% (1MB)
26 12:05:54.065764 progress 25% (1MB)
27 12:05:54.067916 progress 30% (1MB)
28 12:05:54.070252 progress 35% (1MB)
29 12:05:54.072374 progress 40% (2MB)
30 12:05:54.074436 progress 45% (2MB)
31 12:05:54.076576 progress 50% (2MB)
32 12:05:54.078920 progress 55% (2MB)
33 12:05:54.081020 progress 60% (3MB)
34 12:05:54.083121 progress 65% (3MB)
35 12:05:54.085473 progress 70% (3MB)
36 12:05:54.087575 progress 75% (3MB)
37 12:05:54.089664 progress 80% (4MB)
38 12:05:54.091760 progress 85% (4MB)
39 12:05:54.094091 progress 90% (4MB)
40 12:05:54.096184 progress 95% (4MB)
41 12:05:54.098293 progress 100% (5MB)
42 12:05:54.098608 5MB downloaded in 0.05s (114.78MB/s)
43 12:05:54.098831 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:05:54.099144 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:05:54.099237 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:05:54.099326 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:05:54.099439 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1097-g52d843097a439/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:05:54.099512 saving as /var/lib/lava/dispatcher/tmp/9849907/tftp-deploy-clv4vtzd/kernel/bzImage
50 12:05:54.099576 total size: 7880592 (7MB)
51 12:05:54.099637 No compression specified
52 12:05:54.100568 progress 0% (0MB)
53 12:05:54.102552 progress 5% (0MB)
54 12:05:54.104492 progress 10% (0MB)
55 12:05:54.106413 progress 15% (1MB)
56 12:05:54.108416 progress 20% (1MB)
57 12:05:54.110335 progress 25% (1MB)
58 12:05:54.112262 progress 30% (2MB)
59 12:05:54.114174 progress 35% (2MB)
60 12:05:54.116094 progress 40% (3MB)
61 12:05:54.117994 progress 45% (3MB)
62 12:05:54.119888 progress 50% (3MB)
63 12:05:54.121773 progress 55% (4MB)
64 12:05:54.123697 progress 60% (4MB)
65 12:05:54.125586 progress 65% (4MB)
66 12:05:54.127520 progress 70% (5MB)
67 12:05:54.129404 progress 75% (5MB)
68 12:05:54.131329 progress 80% (6MB)
69 12:05:54.133254 progress 85% (6MB)
70 12:05:54.135183 progress 90% (6MB)
71 12:05:54.137071 progress 95% (7MB)
72 12:05:54.138997 progress 100% (7MB)
73 12:05:54.139180 7MB downloaded in 0.04s (189.79MB/s)
74 12:05:54.139332 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:05:54.139580 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:05:54.139672 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:05:54.139766 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:05:54.139879 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230324.0/amd64/full.rootfs.tar.xz
80 12:05:54.139953 saving as /var/lib/lava/dispatcher/tmp/9849907/tftp-deploy-clv4vtzd/nfsrootfs/full.rootfs.tar
81 12:05:54.140020 total size: 133328976 (127MB)
82 12:05:54.140084 Using unxz to decompress xz
83 12:05:54.143266 progress 0% (0MB)
84 12:05:54.482187 progress 5% (6MB)
85 12:05:54.845383 progress 10% (12MB)
86 12:05:55.125024 progress 15% (19MB)
87 12:05:55.315775 progress 20% (25MB)
88 12:05:55.574873 progress 25% (31MB)
89 12:05:55.932432 progress 30% (38MB)
90 12:05:56.305787 progress 35% (44MB)
91 12:05:56.722012 progress 40% (50MB)
92 12:05:57.126687 progress 45% (57MB)
93 12:05:57.494358 progress 50% (63MB)
94 12:05:57.867871 progress 55% (69MB)
95 12:05:58.238936 progress 60% (76MB)
96 12:05:58.604302 progress 65% (82MB)
97 12:05:58.975577 progress 70% (89MB)
98 12:05:59.344603 progress 75% (95MB)
99 12:05:59.788411 progress 80% (101MB)
100 12:06:00.234738 progress 85% (108MB)
101 12:06:00.509029 progress 90% (114MB)
102 12:06:00.864049 progress 95% (120MB)
103 12:06:01.264519 progress 100% (127MB)
104 12:06:01.270913 127MB downloaded in 7.13s (17.83MB/s)
105 12:06:01.271363 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:06:01.271786 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:06:01.271931 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:06:01.272069 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:06:01.272238 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1097-g52d843097a439/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:06:01.272352 saving as /var/lib/lava/dispatcher/tmp/9849907/tftp-deploy-clv4vtzd/modules/modules.tar
112 12:06:01.272454 total size: 250852 (0MB)
113 12:06:01.272555 Using unxz to decompress xz
114 12:06:01.276402 progress 13% (0MB)
115 12:06:01.276917 progress 26% (0MB)
116 12:06:01.277274 progress 39% (0MB)
117 12:06:01.278473 progress 52% (0MB)
118 12:06:01.280439 progress 65% (0MB)
119 12:06:01.282303 progress 78% (0MB)
120 12:06:01.284125 progress 91% (0MB)
121 12:06:01.285917 progress 100% (0MB)
122 12:06:01.291461 0MB downloaded in 0.02s (12.59MB/s)
123 12:06:01.291813 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:06:01.292231 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:06:01.292379 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 12:06:01.292530 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 12:06:02.570908 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9849907/extract-nfsrootfs-dm86by5h
129 12:06:02.571203 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
130 12:06:02.571327 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 12:06:02.571498 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z
132 12:06:02.571623 makedir: /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin
133 12:06:02.571727 makedir: /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/tests
134 12:06:02.571830 makedir: /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/results
135 12:06:02.571954 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-add-keys
136 12:06:02.572114 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-add-sources
137 12:06:02.572251 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-background-process-start
138 12:06:02.572387 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-background-process-stop
139 12:06:02.572520 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-common-functions
140 12:06:02.572654 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-echo-ipv4
141 12:06:02.572787 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-install-packages
142 12:06:02.572919 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-installed-packages
143 12:06:02.573050 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-os-build
144 12:06:02.573185 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-probe-channel
145 12:06:02.573315 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-probe-ip
146 12:06:02.573446 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-target-ip
147 12:06:02.573576 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-target-mac
148 12:06:02.573705 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-target-storage
149 12:06:02.573840 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-test-case
150 12:06:02.573970 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-test-event
151 12:06:02.574099 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-test-feedback
152 12:06:02.574228 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-test-raise
153 12:06:02.574358 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-test-reference
154 12:06:02.574488 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-test-runner
155 12:06:02.574619 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-test-set
156 12:06:02.574749 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-test-shell
157 12:06:02.574882 Updating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-install-packages (oe)
158 12:06:02.575060 Updating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/bin/lava-installed-packages (oe)
159 12:06:02.575178 Creating /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/environment
160 12:06:02.575281 LAVA metadata
161 12:06:02.575365 - LAVA_JOB_ID=9849907
162 12:06:02.575448 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:06:02.575584 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 12:06:02.575660 skipped lava-vland-overlay
165 12:06:02.575768 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:06:02.575872 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 12:06:02.575945 skipped lava-multinode-overlay
168 12:06:02.576048 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:06:02.576152 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 12:06:02.576245 Loading test definitions
171 12:06:02.576358 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 12:06:02.576443 Using /lava-9849907 at stage 0
173 12:06:02.576725 uuid=9849907_1.5.2.3.1 testdef=None
174 12:06:02.576829 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 12:06:02.576936 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 12:06:02.577478 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 12:06:02.577744 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 12:06:02.578338 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 12:06:02.578611 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 12:06:02.579220 runner path: /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/0/tests/0_dmesg test_uuid 9849907_1.5.2.3.1
183 12:06:02.579384 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 12:06:02.579700 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 12:06:02.579789 Using /lava-9849907 at stage 1
187 12:06:02.580072 uuid=9849907_1.5.2.3.5 testdef=None
188 12:06:02.580176 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 12:06:02.580285 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 12:06:02.580753 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 12:06:02.581012 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 12:06:02.581610 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 12:06:02.581882 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 12:06:02.582454 runner path: /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/1/tests/1_bootrr test_uuid 9849907_1.5.2.3.5
197 12:06:02.582617 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 12:06:02.582857 Creating lava-test-runner.conf files
200 12:06:02.582943 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/0 for stage 0
201 12:06:02.583299 - 0_dmesg
202 12:06:02.583390 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9849907/lava-overlay-2z3p8p0z/lava-9849907/1 for stage 1
203 12:06:02.583497 - 1_bootrr
204 12:06:02.583609 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 12:06:02.583720 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 12:06:02.589344 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 12:06:02.589516 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 12:06:02.589646 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:06:02.589760 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 12:06:02.589867 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 12:06:02.693172 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:06:02.693537 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
213 12:06:02.693820 extracting modules file /var/lib/lava/dispatcher/tmp/9849907/tftp-deploy-clv4vtzd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849907/extract-nfsrootfs-dm86by5h
214 12:06:02.701313 extracting modules file /var/lib/lava/dispatcher/tmp/9849907/tftp-deploy-clv4vtzd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9849907/extract-overlay-ramdisk-lsepangj/ramdisk
215 12:06:02.708560 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:06:02.708718 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
217 12:06:02.708831 [common] Applying overlay to NFS
218 12:06:02.708916 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9849907/compress-overlay-voxqboj7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9849907/extract-nfsrootfs-dm86by5h
219 12:06:02.712969 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 12:06:02.713104 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
221 12:06:02.713221 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:06:02.713334 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
223 12:06:02.713433 Building ramdisk /var/lib/lava/dispatcher/tmp/9849907/extract-overlay-ramdisk-lsepangj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9849907/extract-overlay-ramdisk-lsepangj/ramdisk
224 12:06:02.749397 >> 26158 blocks
225 12:06:03.236301 rename /var/lib/lava/dispatcher/tmp/9849907/extract-overlay-ramdisk-lsepangj/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9849907/tftp-deploy-clv4vtzd/ramdisk/ramdisk.cpio.gz
226 12:06:03.236721 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:06:03.236873 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
228 12:06:03.236991 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
229 12:06:03.237101 No mkimage arch provided, not using FIT.
230 12:06:03.237210 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:06:03.237311 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:06:03.237428 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
233 12:06:03.237536 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
234 12:06:03.237624 No LXC device requested
235 12:06:03.237729 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:06:03.237837 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
237 12:06:03.237940 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:06:03.238021 Checking files for TFTP limit of 4294967296 bytes.
239 12:06:03.238423 end: 1 tftp-deploy (duration 00:00:09) [common]
240 12:06:03.238546 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:06:03.238659 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:06:03.238835 substitutions:
243 12:06:03.238911 - {DTB}: None
244 12:06:03.239047 - {INITRD}: 9849907/tftp-deploy-clv4vtzd/ramdisk/ramdisk.cpio.gz
245 12:06:03.239128 - {KERNEL}: 9849907/tftp-deploy-clv4vtzd/kernel/bzImage
246 12:06:03.239208 - {LAVA_MAC}: None
247 12:06:03.239285 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9849907/extract-nfsrootfs-dm86by5h
248 12:06:03.239365 - {NFS_SERVER_IP}: 192.168.201.1
249 12:06:03.239441 - {PRESEED_CONFIG}: None
250 12:06:03.239516 - {PRESEED_LOCAL}: None
251 12:06:03.239591 - {RAMDISK}: 9849907/tftp-deploy-clv4vtzd/ramdisk/ramdisk.cpio.gz
252 12:06:03.239666 - {ROOT_PART}: None
253 12:06:03.239740 - {ROOT}: None
254 12:06:03.239814 - {SERVER_IP}: 192.168.201.1
255 12:06:03.239888 - {TEE}: None
256 12:06:03.239962 Parsed boot commands:
257 12:06:03.240035 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:06:03.240215 Parsed boot commands: tftpboot 192.168.201.1 9849907/tftp-deploy-clv4vtzd/kernel/bzImage 9849907/tftp-deploy-clv4vtzd/kernel/cmdline 9849907/tftp-deploy-clv4vtzd/ramdisk/ramdisk.cpio.gz
259 12:06:03.240328 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:06:03.240438 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:06:03.240554 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:06:03.240675 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:06:03.240770 Not connected, no need to disconnect.
264 12:06:03.240870 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:06:03.240973 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:06:03.241055 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
267 12:06:03.244058 Setting prompt string to ['lava-test: # ']
268 12:06:03.244398 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:06:03.244532 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:06:03.244649 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:06:03.244810 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:06:03.245013 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
273 12:06:08.380656 >> Command sent successfully.
274 12:06:08.382833 Returned 0 in 5 seconds
275 12:06:08.483146 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 12:06:08.483461 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 12:06:08.483561 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 12:06:08.483656 Setting prompt string to 'Starting depthcharge on Voema...'
280 12:06:08.483724 Changing prompt to 'Starting depthcharge on Voema...'
281 12:06:08.483792 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 12:06:08.484065 [Enter `^Ec?' for help]
283 12:06:10.086753
284 12:06:10.086946
285 12:06:10.097241 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 12:06:10.100315 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 12:06:10.107175 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 12:06:10.110098 CPU: AES supported, TXT NOT supported, VT supported
289 12:06:10.117137 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 12:06:10.119989 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 12:06:10.126789 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 12:06:10.130266 VBOOT: Loading verstage.
293 12:06:10.133474 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 12:06:10.140150 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 12:06:10.143358 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 12:06:10.153810 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 12:06:10.160409 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 12:06:10.160499
299 12:06:10.160568
300 12:06:10.173457 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 12:06:10.188303 Probing TPM: . done!
302 12:06:10.191023 TPM ready after 0 ms
303 12:06:10.194012 Connected to device vid:did:rid of 1ae0:0028:00
304 12:06:10.206197 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
305 12:06:10.212087 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 12:06:10.215231 Initialized TPM device CR50 revision 0
307 12:06:10.268490 tlcl_send_startup: Startup return code is 0
308 12:06:10.268584 TPM: setup succeeded
309 12:06:10.283562 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 12:06:10.297661 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 12:06:10.310321 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 12:06:10.320836 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 12:06:10.323913 Chrome EC: UHEPI supported
314 12:06:10.327159 Phase 1
315 12:06:10.330850 FMAP: area GBB found @ 1805000 (458752 bytes)
316 12:06:10.341005 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 12:06:10.347383 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 12:06:10.354081 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 12:06:10.360970 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 12:06:10.363662 Recovery requested (1009000e)
321 12:06:10.366996 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 12:06:10.378673 tlcl_extend: response is 0
323 12:06:10.385604 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 12:06:10.395554 tlcl_extend: response is 0
325 12:06:10.401933 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 12:06:10.408741 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 12:06:10.415473 BS: verstage times (exec / console): total (unknown) / 142 ms
328 12:06:10.415561
329 12:06:10.415630
330 12:06:10.428344 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 12:06:10.434925 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 12:06:10.438177 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 12:06:10.441547 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 12:06:10.448198 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 12:06:10.451626 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 12:06:10.455309 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
337 12:06:10.458366 TCO_STS: 0000 0000
338 12:06:10.461733 GEN_PMCON: d0015038 00002200
339 12:06:10.465426 GBLRST_CAUSE: 00000000 00000000
340 12:06:10.465542 HPR_CAUSE0: 00000000
341 12:06:10.468377 prev_sleep_state 5
342 12:06:10.471589 Boot Count incremented to 20792
343 12:06:10.478033 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 12:06:10.485240 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 12:06:10.491555 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 12:06:10.498062 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 12:06:10.502823 Chrome EC: UHEPI supported
348 12:06:10.509295 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 12:06:10.523272 Probing TPM: done!
350 12:06:10.527666 Connected to device vid:did:rid of 1ae0:0028:00
351 12:06:10.538702 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
352 12:06:10.542039 Initialized TPM device CR50 revision 0
353 12:06:10.558004 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 12:06:10.564154 MRC: Hash idx 0x100b comparison successful.
355 12:06:10.568042 MRC cache found, size faa8
356 12:06:10.568128 bootmode is set to: 2
357 12:06:10.570838 SPD index = 0
358 12:06:10.577191 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 12:06:10.580705 SPD: module type is LPDDR4X
360 12:06:10.584205 SPD: module part number is MT53E512M64D4NW-046
361 12:06:10.591071 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 12:06:10.593867 SPD: device width 16 bits, bus width 16 bits
363 12:06:10.600688 SPD: module size is 1024 MB (per channel)
364 12:06:11.033654 CBMEM:
365 12:06:11.036871 IMD: root @ 0x76fff000 254 entries.
366 12:06:11.040544 IMD: root @ 0x76ffec00 62 entries.
367 12:06:11.043693 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 12:06:11.049962 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 12:06:11.053757 External stage cache:
370 12:06:11.056877 IMD: root @ 0x7b3ff000 254 entries.
371 12:06:11.059900 IMD: root @ 0x7b3fec00 62 entries.
372 12:06:11.075259 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 12:06:11.082070 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 12:06:11.088783 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 12:06:11.103462 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 12:06:11.107455 cse_lite: Skip switching to RW in the recovery path
377 12:06:11.110725 8 DIMMs found
378 12:06:11.110814 SMM Memory Map
379 12:06:11.114104 SMRAM : 0x7b000000 0x800000
380 12:06:11.117132 Subregion 0: 0x7b000000 0x200000
381 12:06:11.120569 Subregion 1: 0x7b200000 0x200000
382 12:06:11.124096 Subregion 2: 0x7b400000 0x400000
383 12:06:11.127303 top_of_ram = 0x77000000
384 12:06:11.133700 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 12:06:11.137529 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 12:06:11.143937 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 12:06:11.147596 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 12:06:11.156996 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 12:06:11.160320 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 12:06:11.172986 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 12:06:11.178847 Processing 211 relocs. Offset value of 0x74c0b000
392 12:06:11.185459 BS: romstage times (exec / console): total (unknown) / 277 ms
393 12:06:11.191587
394 12:06:11.191728
395 12:06:11.201996 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 12:06:11.204666 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 12:06:11.214781 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 12:06:11.221396 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 12:06:11.228169 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 12:06:11.234508 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 12:06:11.281383 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 12:06:11.288276 Processing 5008 relocs. Offset value of 0x75d98000
403 12:06:11.291301 BS: postcar times (exec / console): total (unknown) / 59 ms
404 12:06:11.295522
405 12:06:11.295608
406 12:06:11.305280 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 12:06:11.305368 Normal boot
408 12:06:11.308233 FW_CONFIG value is 0x804c02
409 12:06:11.311690 PCI: 00:07.0 disabled by fw_config
410 12:06:11.315226 PCI: 00:07.1 disabled by fw_config
411 12:06:11.321808 PCI: 00:0d.2 disabled by fw_config
412 12:06:11.325014 PCI: 00:1c.7 disabled by fw_config
413 12:06:11.328413 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 12:06:11.335194 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 12:06:11.341803 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 12:06:11.344781 GENERIC: 0.0 disabled by fw_config
417 12:06:11.348156 GENERIC: 1.0 disabled by fw_config
418 12:06:11.351382 fw_config match found: DB_USB=USB3_ACTIVE
419 12:06:11.354657 fw_config match found: DB_USB=USB3_ACTIVE
420 12:06:11.358060 fw_config match found: DB_USB=USB3_ACTIVE
421 12:06:11.365170 fw_config match found: DB_USB=USB3_ACTIVE
422 12:06:11.368045 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 12:06:11.378344 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 12:06:11.384952 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 12:06:11.391367 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 12:06:11.394674 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 12:06:11.401158 microcode: Update skipped, already up-to-date
428 12:06:11.407946 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 12:06:11.435757 Detected 4 core, 8 thread CPU.
430 12:06:11.438961 Setting up SMI for CPU
431 12:06:11.442312 IED base = 0x7b400000
432 12:06:11.442399 IED size = 0x00400000
433 12:06:11.445604 Will perform SMM setup.
434 12:06:11.452473 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 12:06:11.459178 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 12:06:11.465631 Processing 16 relocs. Offset value of 0x00030000
437 12:06:11.468887 Attempting to start 7 APs
438 12:06:11.472185 Waiting for 10ms after sending INIT.
439 12:06:11.487623 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 12:06:11.491232 AP: slot 7 apic_id 7.
441 12:06:11.494256 AP: slot 3 apic_id 6.
442 12:06:11.494344 AP: slot 4 apic_id 4.
443 12:06:11.497994 AP: slot 5 apic_id 5.
444 12:06:11.501296 AP: slot 2 apic_id 3.
445 12:06:11.501384 AP: slot 6 apic_id 2.
446 12:06:11.501453 done.
447 12:06:11.507617 Waiting for 2nd SIPI to complete...done.
448 12:06:11.514426 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 12:06:11.521089 Processing 13 relocs. Offset value of 0x00038000
450 12:06:11.521177 Unable to locate Global NVS
451 12:06:11.531749 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 12:06:11.534177 Installing permanent SMM handler to 0x7b000000
453 12:06:11.544284 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 12:06:11.547828 Processing 794 relocs. Offset value of 0x7b010000
455 12:06:11.557614 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 12:06:11.560807 Processing 13 relocs. Offset value of 0x7b008000
457 12:06:11.567455 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 12:06:11.574242 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 12:06:11.577398 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 12:06:11.584562 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 12:06:11.590671 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 12:06:11.597590 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 12:06:11.604014 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 12:06:11.604104 Unable to locate Global NVS
465 12:06:11.614002 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 12:06:11.617564 Clearing SMI status registers
467 12:06:11.617653 SMI_STS: PM1
468 12:06:11.621003 PM1_STS: PWRBTN
469 12:06:11.627661 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 12:06:11.631469 In relocation handler: CPU 0
471 12:06:11.633998 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 12:06:11.640585 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 12:06:11.640674 Relocation complete.
474 12:06:11.647258 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 12:06:11.650673 In relocation handler: CPU 1
476 12:06:11.657269 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 12:06:11.657359 Relocation complete.
478 12:06:11.664374 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
479 12:06:11.668288 In relocation handler: CPU 7
480 12:06:11.673947 New SMBASE=0x7affe400 IEDBASE=0x7b400000
481 12:06:11.674037 Relocation complete.
482 12:06:11.680580 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
483 12:06:11.684197 In relocation handler: CPU 3
484 12:06:11.690544 New SMBASE=0x7afff400 IEDBASE=0x7b400000
485 12:06:11.693885 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 12:06:11.697808 Relocation complete.
487 12:06:11.704070 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
488 12:06:11.707666 In relocation handler: CPU 2
489 12:06:11.710933 New SMBASE=0x7afff800 IEDBASE=0x7b400000
490 12:06:11.714082 Relocation complete.
491 12:06:11.720653 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
492 12:06:11.723934 In relocation handler: CPU 4
493 12:06:11.727013 New SMBASE=0x7afff000 IEDBASE=0x7b400000
494 12:06:11.730383 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 12:06:11.733854 Relocation complete.
496 12:06:11.740348 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
497 12:06:11.743973 In relocation handler: CPU 5
498 12:06:11.747210 New SMBASE=0x7affec00 IEDBASE=0x7b400000
499 12:06:11.750353 Relocation complete.
500 12:06:11.757173 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
501 12:06:11.760643 In relocation handler: CPU 6
502 12:06:11.764105 New SMBASE=0x7affe800 IEDBASE=0x7b400000
503 12:06:11.768521 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 12:06:11.771702 Relocation complete.
505 12:06:11.774869 Initializing CPU #0
506 12:06:11.778294 CPU: vendor Intel device 806c1
507 12:06:11.781573 CPU: family 06, model 8c, stepping 01
508 12:06:11.785076 Clearing out pending MCEs
509 12:06:11.785163 Setting up local APIC...
510 12:06:11.788321 apic_id: 0x00 done.
511 12:06:11.791675 Turbo is available but hidden
512 12:06:11.794824 Turbo is available and visible
513 12:06:11.798067 microcode: Update skipped, already up-to-date
514 12:06:11.801579 CPU #0 initialized
515 12:06:11.805030 Initializing CPU #2
516 12:06:11.805118 Initializing CPU #6
517 12:06:11.808599 CPU: vendor Intel device 806c1
518 12:06:11.812161 CPU: family 06, model 8c, stepping 01
519 12:06:11.814814 CPU: vendor Intel device 806c1
520 12:06:11.818354 CPU: family 06, model 8c, stepping 01
521 12:06:11.821734 Clearing out pending MCEs
522 12:06:11.825014 Clearing out pending MCEs
523 12:06:11.828412 Setting up local APIC...
524 12:06:11.828499 Initializing CPU #5
525 12:06:11.831791 Initializing CPU #4
526 12:06:11.834672 CPU: vendor Intel device 806c1
527 12:06:11.838358 CPU: family 06, model 8c, stepping 01
528 12:06:11.841385 CPU: vendor Intel device 806c1
529 12:06:11.844939 CPU: family 06, model 8c, stepping 01
530 12:06:11.848260 Clearing out pending MCEs
531 12:06:11.851238 Clearing out pending MCEs
532 12:06:11.851324 Setting up local APIC...
533 12:06:11.855383 Initializing CPU #3
534 12:06:11.858326 Initializing CPU #7
535 12:06:11.861198 CPU: vendor Intel device 806c1
536 12:06:11.865032 CPU: family 06, model 8c, stepping 01
537 12:06:11.865119 apic_id: 0x05 done.
538 12:06:11.867883 Setting up local APIC...
539 12:06:11.871416 CPU: vendor Intel device 806c1
540 12:06:11.874771 CPU: family 06, model 8c, stepping 01
541 12:06:11.877937 Clearing out pending MCEs
542 12:06:11.881081 Clearing out pending MCEs
543 12:06:11.885189 Setting up local APIC...
544 12:06:11.885275 Setting up local APIC...
545 12:06:11.887906 Setting up local APIC...
546 12:06:11.894941 microcode: Update skipped, already up-to-date
547 12:06:11.895075 apic_id: 0x04 done.
548 12:06:11.898166 CPU #5 initialized
549 12:06:11.901602 microcode: Update skipped, already up-to-date
550 12:06:11.905065 apic_id: 0x06 done.
551 12:06:11.905151 apic_id: 0x07 done.
552 12:06:11.911349 microcode: Update skipped, already up-to-date
553 12:06:11.914456 microcode: Update skipped, already up-to-date
554 12:06:11.917638 CPU #3 initialized
555 12:06:11.917724 CPU #7 initialized
556 12:06:11.921000 CPU #4 initialized
557 12:06:11.924310 Initializing CPU #1
558 12:06:11.924396 apic_id: 0x03 done.
559 12:06:11.928029 apic_id: 0x02 done.
560 12:06:11.931342 microcode: Update skipped, already up-to-date
561 12:06:11.938166 microcode: Update skipped, already up-to-date
562 12:06:11.938252 CPU #2 initialized
563 12:06:11.941846 CPU #6 initialized
564 12:06:11.944724 CPU: vendor Intel device 806c1
565 12:06:11.948120 CPU: family 06, model 8c, stepping 01
566 12:06:11.951166 Clearing out pending MCEs
567 12:06:11.954369 Setting up local APIC...
568 12:06:11.954454 apic_id: 0x01 done.
569 12:06:11.960580 microcode: Update skipped, already up-to-date
570 12:06:11.960666 CPU #1 initialized
571 12:06:11.967767 bsp_do_flight_plan done after 455 msecs.
572 12:06:11.967854 CPU: frequency set to 4000 MHz
573 12:06:11.970827 Enabling SMIs.
574 12:06:11.977519 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
575 12:06:11.993067 SATAXPCIE1 indicates PCIe NVMe is present
576 12:06:11.996558 Probing TPM: done!
577 12:06:11.999860 Connected to device vid:did:rid of 1ae0:0028:00
578 12:06:12.010224 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
579 12:06:12.013753 Initialized TPM device CR50 revision 0
580 12:06:12.017197 Enabling S0i3.4
581 12:06:12.023905 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 12:06:12.027199 Found a VBT of 8704 bytes after decompression
583 12:06:12.033580 cse_lite: CSE RO boot. HybridStorageMode disabled
584 12:06:12.040243 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 12:06:12.114781 FSPS returned 0
586 12:06:12.118525 Executing Phase 1 of FspMultiPhaseSiInit
587 12:06:12.128003 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 12:06:12.131380 port C0 DISC req: usage 1 usb3 1 usb2 5
589 12:06:12.134823 Raw Buffer output 0 00000511
590 12:06:12.138075 Raw Buffer output 1 00000000
591 12:06:12.141655 pmc_send_ipc_cmd succeeded
592 12:06:12.148357 port C1 DISC req: usage 1 usb3 2 usb2 3
593 12:06:12.148443 Raw Buffer output 0 00000321
594 12:06:12.151484 Raw Buffer output 1 00000000
595 12:06:12.155809 pmc_send_ipc_cmd succeeded
596 12:06:12.161585 Detected 4 core, 8 thread CPU.
597 12:06:12.164214 Detected 4 core, 8 thread CPU.
598 12:06:12.398868 Display FSP Version Info HOB
599 12:06:12.401796 Reference Code - CPU = a.0.4c.31
600 12:06:12.405012 uCode Version = 0.0.0.86
601 12:06:12.408207 TXT ACM version = ff.ff.ff.ffff
602 12:06:12.411661 Reference Code - ME = a.0.4c.31
603 12:06:12.415551 MEBx version = 0.0.0.0
604 12:06:12.418203 ME Firmware Version = Consumer SKU
605 12:06:12.421830 Reference Code - PCH = a.0.4c.31
606 12:06:12.425118 PCH-CRID Status = Disabled
607 12:06:12.428320 PCH-CRID Original Value = ff.ff.ff.ffff
608 12:06:12.431733 PCH-CRID New Value = ff.ff.ff.ffff
609 12:06:12.434880 OPROM - RST - RAID = ff.ff.ff.ffff
610 12:06:12.438389 PCH Hsio Version = 4.0.0.0
611 12:06:12.442353 Reference Code - SA - System Agent = a.0.4c.31
612 12:06:12.444820 Reference Code - MRC = 2.0.0.1
613 12:06:12.448237 SA - PCIe Version = a.0.4c.31
614 12:06:12.451740 SA-CRID Status = Disabled
615 12:06:12.454900 SA-CRID Original Value = 0.0.0.1
616 12:06:12.458921 SA-CRID New Value = 0.0.0.1
617 12:06:12.461704 OPROM - VBIOS = ff.ff.ff.ffff
618 12:06:12.465084 IO Manageability Engine FW Version = 11.1.4.0
619 12:06:12.468106 PHY Build Version = 0.0.0.e0
620 12:06:12.472179 Thunderbolt(TM) FW Version = 0.0.0.0
621 12:06:12.478065 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 12:06:12.481610 ITSS IRQ Polarities Before:
623 12:06:12.481695 IPC0: 0xffffffff
624 12:06:12.485308 IPC1: 0xffffffff
625 12:06:12.485394 IPC2: 0xffffffff
626 12:06:12.488222 IPC3: 0xffffffff
627 12:06:12.491732 ITSS IRQ Polarities After:
628 12:06:12.491818 IPC0: 0xffffffff
629 12:06:12.494823 IPC1: 0xffffffff
630 12:06:12.494924 IPC2: 0xffffffff
631 12:06:12.498157 IPC3: 0xffffffff
632 12:06:12.502317 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 12:06:12.514830 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 12:06:12.525033 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 12:06:12.538030 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 12:06:12.544804 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
637 12:06:12.544892 Enumerating buses...
638 12:06:12.552046 Show all devs... Before device enumeration.
639 12:06:12.552134 Root Device: enabled 1
640 12:06:12.555207 DOMAIN: 0000: enabled 1
641 12:06:12.558189 CPU_CLUSTER: 0: enabled 1
642 12:06:12.561788 PCI: 00:00.0: enabled 1
643 12:06:12.561922 PCI: 00:02.0: enabled 1
644 12:06:12.565192 PCI: 00:04.0: enabled 1
645 12:06:12.568226 PCI: 00:05.0: enabled 1
646 12:06:12.571322 PCI: 00:06.0: enabled 0
647 12:06:12.571409 PCI: 00:07.0: enabled 0
648 12:06:12.574715 PCI: 00:07.1: enabled 0
649 12:06:12.578344 PCI: 00:07.2: enabled 0
650 12:06:12.581462 PCI: 00:07.3: enabled 0
651 12:06:12.581549 PCI: 00:08.0: enabled 1
652 12:06:12.585089 PCI: 00:09.0: enabled 0
653 12:06:12.588054 PCI: 00:0a.0: enabled 0
654 12:06:12.591687 PCI: 00:0d.0: enabled 1
655 12:06:12.591775 PCI: 00:0d.1: enabled 0
656 12:06:12.594535 PCI: 00:0d.2: enabled 0
657 12:06:12.598411 PCI: 00:0d.3: enabled 0
658 12:06:12.598501 PCI: 00:0e.0: enabled 0
659 12:06:12.601320 PCI: 00:10.2: enabled 1
660 12:06:12.604481 PCI: 00:10.6: enabled 0
661 12:06:12.607933 PCI: 00:10.7: enabled 0
662 12:06:12.608021 PCI: 00:12.0: enabled 0
663 12:06:12.611317 PCI: 00:12.6: enabled 0
664 12:06:12.615989 PCI: 00:13.0: enabled 0
665 12:06:12.618475 PCI: 00:14.0: enabled 1
666 12:06:12.618564 PCI: 00:14.1: enabled 0
667 12:06:12.621195 PCI: 00:14.2: enabled 1
668 12:06:12.624493 PCI: 00:14.3: enabled 1
669 12:06:12.627805 PCI: 00:15.0: enabled 1
670 12:06:12.627893 PCI: 00:15.1: enabled 1
671 12:06:12.631221 PCI: 00:15.2: enabled 1
672 12:06:12.634557 PCI: 00:15.3: enabled 1
673 12:06:12.634646 PCI: 00:16.0: enabled 1
674 12:06:12.637812 PCI: 00:16.1: enabled 0
675 12:06:12.641038 PCI: 00:16.2: enabled 0
676 12:06:12.644466 PCI: 00:16.3: enabled 0
677 12:06:12.644555 PCI: 00:16.4: enabled 0
678 12:06:12.648356 PCI: 00:16.5: enabled 0
679 12:06:12.651354 PCI: 00:17.0: enabled 1
680 12:06:12.654241 PCI: 00:19.0: enabled 0
681 12:06:12.654331 PCI: 00:19.1: enabled 1
682 12:06:12.657701 PCI: 00:19.2: enabled 0
683 12:06:12.661373 PCI: 00:1c.0: enabled 1
684 12:06:12.664768 PCI: 00:1c.1: enabled 0
685 12:06:12.664857 PCI: 00:1c.2: enabled 0
686 12:06:12.667821 PCI: 00:1c.3: enabled 0
687 12:06:12.671076 PCI: 00:1c.4: enabled 0
688 12:06:12.674492 PCI: 00:1c.5: enabled 0
689 12:06:12.674581 PCI: 00:1c.6: enabled 1
690 12:06:12.677740 PCI: 00:1c.7: enabled 0
691 12:06:12.680890 PCI: 00:1d.0: enabled 1
692 12:06:12.680979 PCI: 00:1d.1: enabled 0
693 12:06:12.684293 PCI: 00:1d.2: enabled 1
694 12:06:12.687719 PCI: 00:1d.3: enabled 0
695 12:06:12.690880 PCI: 00:1e.0: enabled 1
696 12:06:12.691005 PCI: 00:1e.1: enabled 0
697 12:06:12.694225 PCI: 00:1e.2: enabled 1
698 12:06:12.697623 PCI: 00:1e.3: enabled 1
699 12:06:12.701247 PCI: 00:1f.0: enabled 1
700 12:06:12.701336 PCI: 00:1f.1: enabled 0
701 12:06:12.704500 PCI: 00:1f.2: enabled 1
702 12:06:12.708116 PCI: 00:1f.3: enabled 1
703 12:06:12.711148 PCI: 00:1f.4: enabled 0
704 12:06:12.711238 PCI: 00:1f.5: enabled 1
705 12:06:12.714344 PCI: 00:1f.6: enabled 0
706 12:06:12.717798 PCI: 00:1f.7: enabled 0
707 12:06:12.717887 APIC: 00: enabled 1
708 12:06:12.721040 GENERIC: 0.0: enabled 1
709 12:06:12.724220 GENERIC: 0.0: enabled 1
710 12:06:12.727724 GENERIC: 1.0: enabled 1
711 12:06:12.727813 GENERIC: 0.0: enabled 1
712 12:06:12.731251 GENERIC: 1.0: enabled 1
713 12:06:12.734504 USB0 port 0: enabled 1
714 12:06:12.734593 GENERIC: 0.0: enabled 1
715 12:06:12.737719 USB0 port 0: enabled 1
716 12:06:12.741106 GENERIC: 0.0: enabled 1
717 12:06:12.744622 I2C: 00:1a: enabled 1
718 12:06:12.744711 I2C: 00:31: enabled 1
719 12:06:12.747873 I2C: 00:32: enabled 1
720 12:06:12.750935 I2C: 00:10: enabled 1
721 12:06:12.751063 I2C: 00:15: enabled 1
722 12:06:12.754516 GENERIC: 0.0: enabled 0
723 12:06:12.757571 GENERIC: 1.0: enabled 0
724 12:06:12.757660 GENERIC: 0.0: enabled 1
725 12:06:12.761530 SPI: 00: enabled 1
726 12:06:12.764291 SPI: 00: enabled 1
727 12:06:12.764380 PNP: 0c09.0: enabled 1
728 12:06:12.767464 GENERIC: 0.0: enabled 1
729 12:06:12.771100 USB3 port 0: enabled 1
730 12:06:12.771189 USB3 port 1: enabled 1
731 12:06:12.774919 USB3 port 2: enabled 0
732 12:06:12.778062 USB3 port 3: enabled 0
733 12:06:12.780935 USB2 port 0: enabled 0
734 12:06:12.781024 USB2 port 1: enabled 1
735 12:06:12.784456 USB2 port 2: enabled 1
736 12:06:12.787855 USB2 port 3: enabled 0
737 12:06:12.787944 USB2 port 4: enabled 1
738 12:06:12.790844 USB2 port 5: enabled 0
739 12:06:12.794361 USB2 port 6: enabled 0
740 12:06:12.797654 USB2 port 7: enabled 0
741 12:06:12.797743 USB2 port 8: enabled 0
742 12:06:12.801230 USB2 port 9: enabled 0
743 12:06:12.804369 USB3 port 0: enabled 0
744 12:06:12.804458 USB3 port 1: enabled 1
745 12:06:12.807852 USB3 port 2: enabled 0
746 12:06:12.811113 USB3 port 3: enabled 0
747 12:06:12.811202 GENERIC: 0.0: enabled 1
748 12:06:12.814018 GENERIC: 1.0: enabled 1
749 12:06:12.817482 APIC: 01: enabled 1
750 12:06:12.817571 APIC: 03: enabled 1
751 12:06:12.820711 APIC: 06: enabled 1
752 12:06:12.824199 APIC: 04: enabled 1
753 12:06:12.824288 APIC: 05: enabled 1
754 12:06:12.827639 APIC: 02: enabled 1
755 12:06:12.830903 APIC: 07: enabled 1
756 12:06:12.831001 Compare with tree...
757 12:06:12.834335 Root Device: enabled 1
758 12:06:12.837585 DOMAIN: 0000: enabled 1
759 12:06:12.837674 PCI: 00:00.0: enabled 1
760 12:06:12.841127 PCI: 00:02.0: enabled 1
761 12:06:12.844239 PCI: 00:04.0: enabled 1
762 12:06:12.847399 GENERIC: 0.0: enabled 1
763 12:06:12.850615 PCI: 00:05.0: enabled 1
764 12:06:12.850704 PCI: 00:06.0: enabled 0
765 12:06:12.854066 PCI: 00:07.0: enabled 0
766 12:06:12.857816 GENERIC: 0.0: enabled 1
767 12:06:12.860981 PCI: 00:07.1: enabled 0
768 12:06:12.863994 GENERIC: 1.0: enabled 1
769 12:06:12.864083 PCI: 00:07.2: enabled 0
770 12:06:12.867763 GENERIC: 0.0: enabled 1
771 12:06:12.871131 PCI: 00:07.3: enabled 0
772 12:06:12.874086 GENERIC: 1.0: enabled 1
773 12:06:12.877584 PCI: 00:08.0: enabled 1
774 12:06:12.880957 PCI: 00:09.0: enabled 0
775 12:06:12.881046 PCI: 00:0a.0: enabled 0
776 12:06:12.884630 PCI: 00:0d.0: enabled 1
777 12:06:12.887162 USB0 port 0: enabled 1
778 12:06:12.890913 USB3 port 0: enabled 1
779 12:06:12.894242 USB3 port 1: enabled 1
780 12:06:12.894331 USB3 port 2: enabled 0
781 12:06:12.897097 USB3 port 3: enabled 0
782 12:06:12.900524 PCI: 00:0d.1: enabled 0
783 12:06:12.903918 PCI: 00:0d.2: enabled 0
784 12:06:12.907190 GENERIC: 0.0: enabled 1
785 12:06:12.907279 PCI: 00:0d.3: enabled 0
786 12:06:12.910759 PCI: 00:0e.0: enabled 0
787 12:06:12.913689 PCI: 00:10.2: enabled 1
788 12:06:12.917350 PCI: 00:10.6: enabled 0
789 12:06:12.920482 PCI: 00:10.7: enabled 0
790 12:06:12.920571 PCI: 00:12.0: enabled 0
791 12:06:12.923615 PCI: 00:12.6: enabled 0
792 12:06:12.927055 PCI: 00:13.0: enabled 0
793 12:06:12.930697 PCI: 00:14.0: enabled 1
794 12:06:12.933949 USB0 port 0: enabled 1
795 12:06:12.934059 USB2 port 0: enabled 0
796 12:06:12.937059 USB2 port 1: enabled 1
797 12:06:12.940476 USB2 port 2: enabled 1
798 12:06:12.944583 USB2 port 3: enabled 0
799 12:06:12.947271 USB2 port 4: enabled 1
800 12:06:12.947360 USB2 port 5: enabled 0
801 12:06:12.950430 USB2 port 6: enabled 0
802 12:06:12.954069 USB2 port 7: enabled 0
803 12:06:12.957118 USB2 port 8: enabled 0
804 12:06:12.961225 USB2 port 9: enabled 0
805 12:06:12.963788 USB3 port 0: enabled 0
806 12:06:12.963895 USB3 port 1: enabled 1
807 12:06:12.967448 USB3 port 2: enabled 0
808 12:06:12.970424 USB3 port 3: enabled 0
809 12:06:12.974080 PCI: 00:14.1: enabled 0
810 12:06:12.977238 PCI: 00:14.2: enabled 1
811 12:06:12.977327 PCI: 00:14.3: enabled 1
812 12:06:12.980207 GENERIC: 0.0: enabled 1
813 12:06:12.983676 PCI: 00:15.0: enabled 1
814 12:06:12.987163 I2C: 00:1a: enabled 1
815 12:06:12.990147 I2C: 00:31: enabled 1
816 12:06:12.990236 I2C: 00:32: enabled 1
817 12:06:12.993493 PCI: 00:15.1: enabled 1
818 12:06:12.996847 I2C: 00:10: enabled 1
819 12:06:13.000133 PCI: 00:15.2: enabled 1
820 12:06:13.004096 PCI: 00:15.3: enabled 1
821 12:06:13.004185 PCI: 00:16.0: enabled 1
822 12:06:13.007704 PCI: 00:16.1: enabled 0
823 12:06:13.010901 PCI: 00:16.2: enabled 0
824 12:06:13.010996 PCI: 00:16.3: enabled 0
825 12:06:13.014177 PCI: 00:16.4: enabled 0
826 12:06:13.017906 PCI: 00:16.5: enabled 0
827 12:06:13.020885 PCI: 00:17.0: enabled 1
828 12:06:13.024027 PCI: 00:19.0: enabled 0
829 12:06:13.024116 PCI: 00:19.1: enabled 1
830 12:06:13.027490 I2C: 00:15: enabled 1
831 12:06:13.030596 PCI: 00:19.2: enabled 0
832 12:06:13.034212 PCI: 00:1d.0: enabled 1
833 12:06:13.037407 GENERIC: 0.0: enabled 1
834 12:06:13.037497 PCI: 00:1e.0: enabled 1
835 12:06:13.040567 PCI: 00:1e.1: enabled 0
836 12:06:13.044233 PCI: 00:1e.2: enabled 1
837 12:06:13.047438 SPI: 00: enabled 1
838 12:06:13.047527 PCI: 00:1e.3: enabled 1
839 12:06:13.050707 SPI: 00: enabled 1
840 12:06:13.054518 PCI: 00:1f.0: enabled 1
841 12:06:13.104539 PNP: 0c09.0: enabled 1
842 12:06:13.104646 PCI: 00:1f.1: enabled 0
843 12:06:13.104717 PCI: 00:1f.2: enabled 1
844 12:06:13.104784 GENERIC: 0.0: enabled 1
845 12:06:13.104846 GENERIC: 0.0: enabled 1
846 12:06:13.104908 GENERIC: 1.0: enabled 1
847 12:06:13.104968 PCI: 00:1f.3: enabled 1
848 12:06:13.105028 PCI: 00:1f.4: enabled 0
849 12:06:13.105086 PCI: 00:1f.5: enabled 1
850 12:06:13.105144 PCI: 00:1f.6: enabled 0
851 12:06:13.105202 PCI: 00:1f.7: enabled 0
852 12:06:13.105260 CPU_CLUSTER: 0: enabled 1
853 12:06:13.105318 APIC: 00: enabled 1
854 12:06:13.105375 APIC: 01: enabled 1
855 12:06:13.105433 APIC: 03: enabled 1
856 12:06:13.105490 APIC: 06: enabled 1
857 12:06:13.105548 APIC: 04: enabled 1
858 12:06:13.106071 APIC: 05: enabled 1
859 12:06:13.106160 APIC: 02: enabled 1
860 12:06:13.106231 APIC: 07: enabled 1
861 12:06:13.109318 Root Device scanning...
862 12:06:13.113383 scan_static_bus for Root Device
863 12:06:13.113472 DOMAIN: 0000 enabled
864 12:06:13.115925 CPU_CLUSTER: 0 enabled
865 12:06:13.119167 DOMAIN: 0000 scanning...
866 12:06:13.122876 PCI: pci_scan_bus for bus 00
867 12:06:13.126100 PCI: 00:00.0 [8086/0000] ops
868 12:06:13.129180 PCI: 00:00.0 [8086/9a12] enabled
869 12:06:13.132538 PCI: 00:02.0 [8086/0000] bus ops
870 12:06:13.135935 PCI: 00:02.0 [8086/9a40] enabled
871 12:06:13.139208 PCI: 00:04.0 [8086/0000] bus ops
872 12:06:13.142554 PCI: 00:04.0 [8086/9a03] enabled
873 12:06:13.146088 PCI: 00:05.0 [8086/9a19] enabled
874 12:06:13.149782 PCI: 00:07.0 [0000/0000] hidden
875 12:06:13.152641 PCI: 00:08.0 [8086/9a11] enabled
876 12:06:13.155984 PCI: 00:0a.0 [8086/9a0d] disabled
877 12:06:13.158998 PCI: 00:0d.0 [8086/0000] bus ops
878 12:06:13.162471 PCI: 00:0d.0 [8086/9a13] enabled
879 12:06:13.166129 PCI: 00:14.0 [8086/0000] bus ops
880 12:06:13.169142 PCI: 00:14.0 [8086/a0ed] enabled
881 12:06:13.172729 PCI: 00:14.2 [8086/a0ef] enabled
882 12:06:13.175811 PCI: 00:14.3 [8086/0000] bus ops
883 12:06:13.179255 PCI: 00:14.3 [8086/a0f0] enabled
884 12:06:13.182516 PCI: 00:15.0 [8086/0000] bus ops
885 12:06:13.185628 PCI: 00:15.0 [8086/a0e8] enabled
886 12:06:13.188952 PCI: 00:15.1 [8086/0000] bus ops
887 12:06:13.192667 PCI: 00:15.1 [8086/a0e9] enabled
888 12:06:13.195643 PCI: 00:15.2 [8086/0000] bus ops
889 12:06:13.198971 PCI: 00:15.2 [8086/a0ea] enabled
890 12:06:13.202215 PCI: 00:15.3 [8086/0000] bus ops
891 12:06:13.205534 PCI: 00:15.3 [8086/a0eb] enabled
892 12:06:13.208737 PCI: 00:16.0 [8086/0000] ops
893 12:06:13.212405 PCI: 00:16.0 [8086/a0e0] enabled
894 12:06:13.215416 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 12:06:13.219260 PCI: 00:19.0 [8086/0000] bus ops
896 12:06:13.222442 PCI: 00:19.0 [8086/a0c5] disabled
897 12:06:13.225590 PCI: 00:19.1 [8086/0000] bus ops
898 12:06:13.228612 PCI: 00:19.1 [8086/a0c6] enabled
899 12:06:13.231938 PCI: 00:1d.0 [8086/0000] bus ops
900 12:06:13.235151 PCI: 00:1d.0 [8086/a0b0] enabled
901 12:06:13.238630 PCI: 00:1e.0 [8086/0000] ops
902 12:06:13.242262 PCI: 00:1e.0 [8086/a0a8] enabled
903 12:06:13.245087 PCI: 00:1e.2 [8086/0000] bus ops
904 12:06:13.248882 PCI: 00:1e.2 [8086/a0aa] enabled
905 12:06:13.252152 PCI: 00:1e.3 [8086/0000] bus ops
906 12:06:13.255268 PCI: 00:1e.3 [8086/a0ab] enabled
907 12:06:13.258508 PCI: 00:1f.0 [8086/0000] bus ops
908 12:06:13.261827 PCI: 00:1f.0 [8086/a087] enabled
909 12:06:13.265215 RTC Init
910 12:06:13.268432 Set power on after power failure.
911 12:06:13.268522 Disabling Deep S3
912 12:06:13.271560 Disabling Deep S3
913 12:06:13.275247 Disabling Deep S4
914 12:06:13.275334 Disabling Deep S4
915 12:06:13.278301 Disabling Deep S5
916 12:06:13.278387 Disabling Deep S5
917 12:06:13.281854 PCI: 00:1f.2 [0000/0000] hidden
918 12:06:13.284897 PCI: 00:1f.3 [8086/0000] bus ops
919 12:06:13.288808 PCI: 00:1f.3 [8086/a0c8] enabled
920 12:06:13.291490 PCI: 00:1f.5 [8086/0000] bus ops
921 12:06:13.294910 PCI: 00:1f.5 [8086/a0a4] enabled
922 12:06:13.298348 PCI: Leftover static devices:
923 12:06:13.301725 PCI: 00:10.2
924 12:06:13.301810 PCI: 00:10.6
925 12:06:13.301877 PCI: 00:10.7
926 12:06:13.305068 PCI: 00:06.0
927 12:06:13.305154 PCI: 00:07.1
928 12:06:13.308193 PCI: 00:07.2
929 12:06:13.308278 PCI: 00:07.3
930 12:06:13.308347 PCI: 00:09.0
931 12:06:13.311378 PCI: 00:0d.1
932 12:06:13.311464 PCI: 00:0d.2
933 12:06:13.315269 PCI: 00:0d.3
934 12:06:13.315354 PCI: 00:0e.0
935 12:06:13.315421 PCI: 00:12.0
936 12:06:13.318331 PCI: 00:12.6
937 12:06:13.318416 PCI: 00:13.0
938 12:06:13.322666 PCI: 00:14.1
939 12:06:13.322751 PCI: 00:16.1
940 12:06:13.325005 PCI: 00:16.2
941 12:06:13.325089 PCI: 00:16.3
942 12:06:13.325155 PCI: 00:16.4
943 12:06:13.328075 PCI: 00:16.5
944 12:06:13.328160 PCI: 00:17.0
945 12:06:13.331815 PCI: 00:19.2
946 12:06:13.331900 PCI: 00:1e.1
947 12:06:13.331968 PCI: 00:1f.1
948 12:06:13.334871 PCI: 00:1f.4
949 12:06:13.334964 PCI: 00:1f.6
950 12:06:13.338251 PCI: 00:1f.7
951 12:06:13.341750 PCI: Check your devicetree.cb.
952 12:06:13.341836 PCI: 00:02.0 scanning...
953 12:06:13.345034 scan_generic_bus for PCI: 00:02.0
954 12:06:13.351787 scan_generic_bus for PCI: 00:02.0 done
955 12:06:13.354822 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 12:06:13.358098 PCI: 00:04.0 scanning...
957 12:06:13.361546 scan_generic_bus for PCI: 00:04.0
958 12:06:13.364603 GENERIC: 0.0 enabled
959 12:06:13.368202 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 12:06:13.374613 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 12:06:13.378149 PCI: 00:0d.0 scanning...
962 12:06:13.381227 scan_static_bus for PCI: 00:0d.0
963 12:06:13.381313 USB0 port 0 enabled
964 12:06:13.384571 USB0 port 0 scanning...
965 12:06:13.387742 scan_static_bus for USB0 port 0
966 12:06:13.392249 USB3 port 0 enabled
967 12:06:13.392370 USB3 port 1 enabled
968 12:06:13.394560 USB3 port 2 disabled
969 12:06:13.397972 USB3 port 3 disabled
970 12:06:13.398062 USB3 port 0 scanning...
971 12:06:13.401150 scan_static_bus for USB3 port 0
972 12:06:13.408012 scan_static_bus for USB3 port 0 done
973 12:06:13.411130 scan_bus: bus USB3 port 0 finished in 6 msecs
974 12:06:13.414537 USB3 port 1 scanning...
975 12:06:13.417867 scan_static_bus for USB3 port 1
976 12:06:13.421097 scan_static_bus for USB3 port 1 done
977 12:06:13.424307 scan_bus: bus USB3 port 1 finished in 6 msecs
978 12:06:13.428134 scan_static_bus for USB0 port 0 done
979 12:06:13.434984 scan_bus: bus USB0 port 0 finished in 43 msecs
980 12:06:13.437845 scan_static_bus for PCI: 00:0d.0 done
981 12:06:13.441142 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 12:06:13.444622 PCI: 00:14.0 scanning...
983 12:06:13.447826 scan_static_bus for PCI: 00:14.0
984 12:06:13.451170 USB0 port 0 enabled
985 12:06:13.451259 USB0 port 0 scanning...
986 12:06:13.454569 scan_static_bus for USB0 port 0
987 12:06:13.457935 USB2 port 0 disabled
988 12:06:13.461145 USB2 port 1 enabled
989 12:06:13.461235 USB2 port 2 enabled
990 12:06:13.464700 USB2 port 3 disabled
991 12:06:13.467618 USB2 port 4 enabled
992 12:06:13.467707 USB2 port 5 disabled
993 12:06:13.470993 USB2 port 6 disabled
994 12:06:13.474312 USB2 port 7 disabled
995 12:06:13.474401 USB2 port 8 disabled
996 12:06:13.478079 USB2 port 9 disabled
997 12:06:13.480871 USB3 port 0 disabled
998 12:06:13.480960 USB3 port 1 enabled
999 12:06:13.484232 USB3 port 2 disabled
1000 12:06:13.484321 USB3 port 3 disabled
1001 12:06:13.487699 USB2 port 1 scanning...
1002 12:06:13.490815 scan_static_bus for USB2 port 1
1003 12:06:13.494506 scan_static_bus for USB2 port 1 done
1004 12:06:13.501196 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 12:06:13.501285 USB2 port 2 scanning...
1006 12:06:13.504627 scan_static_bus for USB2 port 2
1007 12:06:13.511303 scan_static_bus for USB2 port 2 done
1008 12:06:13.515105 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 12:06:13.517904 USB2 port 4 scanning...
1010 12:06:13.521204 scan_static_bus for USB2 port 4
1011 12:06:13.524714 scan_static_bus for USB2 port 4 done
1012 12:06:13.528133 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 12:06:13.530959 USB3 port 1 scanning...
1014 12:06:13.534201 scan_static_bus for USB3 port 1
1015 12:06:13.537591 scan_static_bus for USB3 port 1 done
1016 12:06:13.544248 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 12:06:13.547759 scan_static_bus for USB0 port 0 done
1018 12:06:13.550700 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 12:06:13.554256 scan_static_bus for PCI: 00:14.0 done
1020 12:06:13.560757 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 12:06:13.560844 PCI: 00:14.3 scanning...
1022 12:06:13.564330 scan_static_bus for PCI: 00:14.3
1023 12:06:13.568012 GENERIC: 0.0 enabled
1024 12:06:13.571224 scan_static_bus for PCI: 00:14.3 done
1025 12:06:13.578299 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 12:06:13.578390 PCI: 00:15.0 scanning...
1027 12:06:13.581515 scan_static_bus for PCI: 00:15.0
1028 12:06:13.585720 I2C: 00:1a enabled
1029 12:06:13.585810 I2C: 00:31 enabled
1030 12:06:13.588684 I2C: 00:32 enabled
1031 12:06:13.591881 scan_static_bus for PCI: 00:15.0 done
1032 12:06:13.598971 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 12:06:13.599066 PCI: 00:15.1 scanning...
1034 12:06:13.601796 scan_static_bus for PCI: 00:15.1
1035 12:06:13.605402 I2C: 00:10 enabled
1036 12:06:13.608650 scan_static_bus for PCI: 00:15.1 done
1037 12:06:13.615426 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 12:06:13.615516 PCI: 00:15.2 scanning...
1039 12:06:13.618968 scan_static_bus for PCI: 00:15.2
1040 12:06:13.625351 scan_static_bus for PCI: 00:15.2 done
1041 12:06:13.628645 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 12:06:13.631553 PCI: 00:15.3 scanning...
1043 12:06:13.635075 scan_static_bus for PCI: 00:15.3
1044 12:06:13.638317 scan_static_bus for PCI: 00:15.3 done
1045 12:06:13.641830 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 12:06:13.645009 PCI: 00:19.1 scanning...
1047 12:06:13.648273 scan_static_bus for PCI: 00:19.1
1048 12:06:13.651805 I2C: 00:15 enabled
1049 12:06:13.655535 scan_static_bus for PCI: 00:19.1 done
1050 12:06:13.658463 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 12:06:13.661336 PCI: 00:1d.0 scanning...
1052 12:06:13.665113 do_pci_scan_bridge for PCI: 00:1d.0
1053 12:06:13.668278 PCI: pci_scan_bus for bus 01
1054 12:06:13.671533 PCI: 01:00.0 [1c5c/174a] enabled
1055 12:06:13.674859 GENERIC: 0.0 enabled
1056 12:06:13.678210 Enabling Common Clock Configuration
1057 12:06:13.681625 L1 Sub-State supported from root port 29
1058 12:06:13.684797 L1 Sub-State Support = 0xf
1059 12:06:13.688205 CommonModeRestoreTime = 0x28
1060 12:06:13.691924 Power On Value = 0x16, Power On Scale = 0x0
1061 12:06:13.694793 ASPM: Enabled L1
1062 12:06:13.698075 PCIe: Max_Payload_Size adjusted to 128
1063 12:06:13.701839 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 12:06:13.704975 PCI: 00:1e.2 scanning...
1065 12:06:13.708402 scan_generic_bus for PCI: 00:1e.2
1066 12:06:13.711458 SPI: 00 enabled
1067 12:06:13.718251 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 12:06:13.721829 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 12:06:13.724693 PCI: 00:1e.3 scanning...
1070 12:06:13.728481 scan_generic_bus for PCI: 00:1e.3
1071 12:06:13.728573 SPI: 00 enabled
1072 12:06:13.734628 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 12:06:13.741418 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 12:06:13.741512 PCI: 00:1f.0 scanning...
1075 12:06:13.744620 scan_static_bus for PCI: 00:1f.0
1076 12:06:13.748001 PNP: 0c09.0 enabled
1077 12:06:13.751305 PNP: 0c09.0 scanning...
1078 12:06:13.754727 scan_static_bus for PNP: 0c09.0
1079 12:06:13.757908 scan_static_bus for PNP: 0c09.0 done
1080 12:06:13.761362 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 12:06:13.768005 scan_static_bus for PCI: 00:1f.0 done
1082 12:06:13.771176 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 12:06:13.774658 PCI: 00:1f.2 scanning...
1084 12:06:13.778054 scan_static_bus for PCI: 00:1f.2
1085 12:06:13.778144 GENERIC: 0.0 enabled
1086 12:06:13.781285 GENERIC: 0.0 scanning...
1087 12:06:13.784960 scan_static_bus for GENERIC: 0.0
1088 12:06:13.787699 GENERIC: 0.0 enabled
1089 12:06:13.791358 GENERIC: 1.0 enabled
1090 12:06:13.794420 scan_static_bus for GENERIC: 0.0 done
1091 12:06:13.797952 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 12:06:13.801140 scan_static_bus for PCI: 00:1f.2 done
1093 12:06:13.807690 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 12:06:13.811250 PCI: 00:1f.3 scanning...
1095 12:06:13.814373 scan_static_bus for PCI: 00:1f.3
1096 12:06:13.817808 scan_static_bus for PCI: 00:1f.3 done
1097 12:06:13.820919 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 12:06:13.824706 PCI: 00:1f.5 scanning...
1099 12:06:13.827936 scan_generic_bus for PCI: 00:1f.5
1100 12:06:13.830851 scan_generic_bus for PCI: 00:1f.5 done
1101 12:06:13.838000 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 12:06:13.841008 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1103 12:06:13.844418 scan_static_bus for Root Device done
1104 12:06:13.850931 scan_bus: bus Root Device finished in 737 msecs
1105 12:06:13.851061 done
1106 12:06:13.857451 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 12:06:13.860625 Chrome EC: UHEPI supported
1108 12:06:13.867648 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 12:06:13.874101 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 12:06:13.877641 SPI flash protection: WPSW=0 SRP0=0
1111 12:06:13.880920 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 12:06:13.887549 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1113 12:06:13.890632 found VGA at PCI: 00:02.0
1114 12:06:13.893997 Setting up VGA for PCI: 00:02.0
1115 12:06:13.900692 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 12:06:13.903798 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 12:06:13.907924 Allocating resources...
1118 12:06:13.908013 Reading resources...
1119 12:06:13.913914 Root Device read_resources bus 0 link: 0
1120 12:06:13.917199 DOMAIN: 0000 read_resources bus 0 link: 0
1121 12:06:13.920670 PCI: 00:04.0 read_resources bus 1 link: 0
1122 12:06:13.927653 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 12:06:13.930984 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 12:06:13.938096 USB0 port 0 read_resources bus 0 link: 0
1125 12:06:13.940913 USB0 port 0 read_resources bus 0 link: 0 done
1126 12:06:13.947588 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 12:06:13.951053 PCI: 00:14.0 read_resources bus 0 link: 0
1128 12:06:13.954223 USB0 port 0 read_resources bus 0 link: 0
1129 12:06:13.961892 USB0 port 0 read_resources bus 0 link: 0 done
1130 12:06:13.965104 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 12:06:13.972285 PCI: 00:14.3 read_resources bus 0 link: 0
1132 12:06:13.975415 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 12:06:13.982102 PCI: 00:15.0 read_resources bus 0 link: 0
1134 12:06:13.985735 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 12:06:13.992204 PCI: 00:15.1 read_resources bus 0 link: 0
1136 12:06:13.995347 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 12:06:14.002451 PCI: 00:19.1 read_resources bus 0 link: 0
1138 12:06:14.005796 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 12:06:14.012515 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 12:06:14.015748 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 12:06:14.022591 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 12:06:14.025796 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 12:06:14.032663 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 12:06:14.035676 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 12:06:14.042243 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 12:06:14.045829 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 12:06:14.049059 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 12:06:14.055830 GENERIC: 0.0 read_resources bus 0 link: 0
1149 12:06:14.059405 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 12:06:14.066223 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 12:06:14.072537 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 12:06:14.075900 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 12:06:14.082396 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 12:06:14.085523 Root Device read_resources bus 0 link: 0 done
1155 12:06:14.088935 Done reading resources.
1156 12:06:14.092714 Show resources in subtree (Root Device)...After reading.
1157 12:06:14.098820 Root Device child on link 0 DOMAIN: 0000
1158 12:06:14.102184 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 12:06:14.112559 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 12:06:14.122223 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 12:06:14.122314 PCI: 00:00.0
1162 12:06:14.131932 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 12:06:14.142778 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 12:06:14.152607 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 12:06:14.161951 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 12:06:14.172133 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 12:06:14.178694 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 12:06:14.188837 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 12:06:14.198561 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 12:06:14.208430 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 12:06:14.218107 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 12:06:14.225185 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 12:06:14.235130 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 12:06:14.245313 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 12:06:14.254687 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 12:06:14.264906 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 12:06:14.274925 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 12:06:14.284789 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 12:06:14.291315 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 12:06:14.301261 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 12:06:14.311752 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 12:06:14.314814 PCI: 00:02.0
1183 12:06:14.324376 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 12:06:14.334519 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 12:06:14.341042 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 12:06:14.347579 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 12:06:14.357898 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 12:06:14.357993 GENERIC: 0.0
1189 12:06:14.361240 PCI: 00:05.0
1190 12:06:14.371238 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 12:06:14.374259 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 12:06:14.377969 GENERIC: 0.0
1193 12:06:14.378058 PCI: 00:08.0
1194 12:06:14.387648 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 12:06:14.390809 PCI: 00:0a.0
1196 12:06:14.394767 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 12:06:14.404441 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 12:06:14.407650 USB0 port 0 child on link 0 USB3 port 0
1199 12:06:14.411062 USB3 port 0
1200 12:06:14.411151 USB3 port 1
1201 12:06:14.415082 USB3 port 2
1202 12:06:14.415171 USB3 port 3
1203 12:06:14.420930 PCI: 00:14.0 child on link 0 USB0 port 0
1204 12:06:14.430974 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 12:06:14.434074 USB0 port 0 child on link 0 USB2 port 0
1206 12:06:14.437848 USB2 port 0
1207 12:06:14.437937 USB2 port 1
1208 12:06:14.440631 USB2 port 2
1209 12:06:14.440720 USB2 port 3
1210 12:06:14.443897 USB2 port 4
1211 12:06:14.443987 USB2 port 5
1212 12:06:14.447228 USB2 port 6
1213 12:06:14.447318 USB2 port 7
1214 12:06:14.450793 USB2 port 8
1215 12:06:14.450890 USB2 port 9
1216 12:06:14.453975 USB3 port 0
1217 12:06:14.457663 USB3 port 1
1218 12:06:14.457753 USB3 port 2
1219 12:06:14.460914 USB3 port 3
1220 12:06:14.461002 PCI: 00:14.2
1221 12:06:14.471160 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 12:06:14.480813 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 12:06:14.484130 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 12:06:14.494312 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 12:06:14.497334 GENERIC: 0.0
1226 12:06:14.500552 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 12:06:14.510425 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 12:06:14.513800 I2C: 00:1a
1229 12:06:14.513889 I2C: 00:31
1230 12:06:14.517004 I2C: 00:32
1231 12:06:14.520728 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 12:06:14.530412 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 12:06:14.530503 I2C: 00:10
1234 12:06:14.533561 PCI: 00:15.2
1235 12:06:14.544038 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 12:06:14.544130 PCI: 00:15.3
1237 12:06:14.553764 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 12:06:14.556963 PCI: 00:16.0
1239 12:06:14.566923 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 12:06:14.567074 PCI: 00:19.0
1241 12:06:14.573805 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 12:06:14.583977 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:06:14.584088 I2C: 00:15
1244 12:06:14.590668 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 12:06:14.596719 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 12:06:14.607022 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 12:06:14.616655 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 12:06:14.616778 GENERIC: 0.0
1249 12:06:14.620453 PCI: 01:00.0
1250 12:06:14.630517 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 12:06:14.640201 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 12:06:14.650017 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 12:06:14.650127 PCI: 00:1e.0
1254 12:06:14.660141 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 12:06:14.667081 PCI: 00:1e.2 child on link 0 SPI: 00
1256 12:06:14.676805 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 12:06:14.677110 SPI: 00
1258 12:06:14.679915 PCI: 00:1e.3 child on link 0 SPI: 00
1259 12:06:14.690557 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 12:06:14.693476 SPI: 00
1261 12:06:14.697034 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 12:06:14.706943 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 12:06:14.707509 PNP: 0c09.0
1264 12:06:14.717023 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 12:06:14.720257 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 12:06:14.729961 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 12:06:14.740302 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 12:06:14.743407 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 12:06:14.746724 GENERIC: 0.0
1270 12:06:14.747184 GENERIC: 1.0
1271 12:06:14.750449 PCI: 00:1f.3
1272 12:06:14.759916 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 12:06:14.769916 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 12:06:14.770346 PCI: 00:1f.5
1275 12:06:14.779882 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 12:06:14.783528 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 12:06:14.787052 APIC: 00
1278 12:06:14.787566 APIC: 01
1279 12:06:14.787907 APIC: 03
1280 12:06:14.790123 APIC: 06
1281 12:06:14.790650 APIC: 04
1282 12:06:14.791031 APIC: 05
1283 12:06:14.793179 APIC: 02
1284 12:06:14.793605 APIC: 07
1285 12:06:14.803337 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 12:06:14.806727 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 12:06:14.813318 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 12:06:14.819851 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 12:06:14.823458 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 12:06:14.830088 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 12:06:14.833155 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 12:06:14.839715 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 12:06:14.846789 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 12:06:14.856738 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 12:06:14.863113 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 12:06:14.869405 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 12:06:14.876043 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 12:06:14.882726 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 12:06:14.889562 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 12:06:14.892593 DOMAIN: 0000: Resource ranges:
1301 12:06:14.895857 * Base: 1000, Size: 800, Tag: 100
1302 12:06:14.902948 * Base: 1900, Size: e700, Tag: 100
1303 12:06:14.906453 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 12:06:14.913290 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 12:06:14.919449 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 12:06:14.926483 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 12:06:14.935903 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 12:06:14.942408 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 12:06:14.949094 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 12:06:14.959519 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 12:06:14.965591 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 12:06:14.972560 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 12:06:14.982710 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 12:06:14.988878 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 12:06:14.995824 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 12:06:15.005729 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 12:06:15.011932 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 12:06:15.018900 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 12:06:15.029374 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 12:06:15.035838 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 12:06:15.042095 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 12:06:15.052335 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 12:06:15.059387 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 12:06:15.065421 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 12:06:15.075248 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 12:06:15.082312 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 12:06:15.088817 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 12:06:15.091930 DOMAIN: 0000: Resource ranges:
1329 12:06:15.098325 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 12:06:15.101643 * Base: d0000000, Size: 28000000, Tag: 200
1331 12:06:15.105283 * Base: fa000000, Size: 1000000, Tag: 200
1332 12:06:15.108396 * Base: fb001000, Size: 2fff000, Tag: 200
1333 12:06:15.114908 * Base: fe010000, Size: 2e000, Tag: 200
1334 12:06:15.118924 * Base: fe03f000, Size: d41000, Tag: 200
1335 12:06:15.122015 * Base: fed88000, Size: 8000, Tag: 200
1336 12:06:15.125199 * Base: fed93000, Size: d000, Tag: 200
1337 12:06:15.132190 * Base: feda2000, Size: 1e000, Tag: 200
1338 12:06:15.134950 * Base: fede0000, Size: 1220000, Tag: 200
1339 12:06:15.138675 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 12:06:15.148423 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 12:06:15.155084 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 12:06:15.161592 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 12:06:15.168525 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 12:06:15.175232 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 12:06:15.181346 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 12:06:15.188041 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 12:06:15.194731 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 12:06:15.201857 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 12:06:15.208128 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 12:06:15.214585 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 12:06:15.221405 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 12:06:15.228366 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 12:06:15.234648 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 12:06:15.241199 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 12:06:15.248303 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 12:06:15.254765 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 12:06:15.261071 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 12:06:15.267878 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 12:06:15.274373 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 12:06:15.280934 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 12:06:15.287582 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 12:06:15.294480 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 12:06:15.300821 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 12:06:15.304331 PCI: 00:1d.0: Resource ranges:
1365 12:06:15.307457 * Base: 7fc00000, Size: 100000, Tag: 200
1366 12:06:15.314309 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 12:06:15.320595 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 12:06:15.327822 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 12:06:15.337308 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 12:06:15.344126 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 12:06:15.347788 Root Device assign_resources, bus 0 link: 0
1372 12:06:15.354057 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 12:06:15.360379 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 12:06:15.370903 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 12:06:15.377265 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 12:06:15.387343 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 12:06:15.390613 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 12:06:15.393953 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 12:06:15.403880 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 12:06:15.410484 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 12:06:15.420340 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 12:06:15.423958 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 12:06:15.430384 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 12:06:15.437301 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 12:06:15.440741 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 12:06:15.447491 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 12:06:15.453987 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 12:06:15.464500 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 12:06:15.470910 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 12:06:15.477603 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 12:06:15.480647 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 12:06:15.487380 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 12:06:15.494006 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 12:06:15.497001 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 12:06:15.507340 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 12:06:15.510323 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 12:06:15.517044 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 12:06:15.523684 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 12:06:15.533571 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 12:06:15.540043 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 12:06:15.550302 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 12:06:15.553500 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 12:06:15.557097 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 12:06:15.566718 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 12:06:15.577098 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 12:06:15.583334 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 12:06:15.590313 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 12:06:15.597078 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 12:06:15.606816 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 12:06:15.613919 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 12:06:15.617438 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 12:06:15.626906 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 12:06:15.630794 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 12:06:15.636999 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 12:06:15.643751 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 12:06:15.650150 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 12:06:15.653874 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 12:06:15.656599 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 12:06:15.663475 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 12:06:15.666996 LPC: Trying to open IO window from 800 size 1ff
1421 12:06:15.676907 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 12:06:15.683589 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 12:06:15.693684 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 12:06:15.696536 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 12:06:15.699816 Root Device assign_resources, bus 0 link: 0
1426 12:06:15.703052 Done setting resources.
1427 12:06:15.710231 Show resources in subtree (Root Device)...After assigning values.
1428 12:06:15.713944 Root Device child on link 0 DOMAIN: 0000
1429 12:06:15.719966 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 12:06:15.730111 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 12:06:15.740173 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 12:06:15.740704 PCI: 00:00.0
1433 12:06:15.749907 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 12:06:15.759909 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 12:06:15.769589 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 12:06:15.776776 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 12:06:15.786252 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 12:06:15.796126 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 12:06:15.806083 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 12:06:15.816435 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 12:06:15.826172 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 12:06:15.833209 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 12:06:15.842615 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 12:06:15.852891 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 12:06:15.863025 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 12:06:15.869503 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 12:06:15.879346 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 12:06:15.889669 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 12:06:15.899155 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 12:06:15.909530 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 12:06:15.919291 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 12:06:15.928993 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 12:06:15.929520 PCI: 00:02.0
1454 12:06:15.939302 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 12:06:15.952490 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 12:06:15.959083 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 12:06:15.965561 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 12:06:15.975525 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 12:06:15.976190 GENERIC: 0.0
1460 12:06:15.978682 PCI: 00:05.0
1461 12:06:15.988831 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 12:06:15.995238 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 12:06:15.995721 GENERIC: 0.0
1464 12:06:15.998911 PCI: 00:08.0
1465 12:06:16.009036 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 12:06:16.009615 PCI: 00:0a.0
1467 12:06:16.015607 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 12:06:16.025520 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 12:06:16.028859 USB0 port 0 child on link 0 USB3 port 0
1470 12:06:16.032378 USB3 port 0
1471 12:06:16.032981 USB3 port 1
1472 12:06:16.035573 USB3 port 2
1473 12:06:16.036034 USB3 port 3
1474 12:06:16.038916 PCI: 00:14.0 child on link 0 USB0 port 0
1475 12:06:16.051996 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 12:06:16.056193 USB0 port 0 child on link 0 USB2 port 0
1477 12:06:16.056754 USB2 port 0
1478 12:06:16.058736 USB2 port 1
1479 12:06:16.059224 USB2 port 2
1480 12:06:16.062009 USB2 port 3
1481 12:06:16.065852 USB2 port 4
1482 12:06:16.066428 USB2 port 5
1483 12:06:16.068838 USB2 port 6
1484 12:06:16.069300 USB2 port 7
1485 12:06:16.071967 USB2 port 8
1486 12:06:16.072454 USB2 port 9
1487 12:06:16.075266 USB3 port 0
1488 12:06:16.075722 USB3 port 1
1489 12:06:16.079003 USB3 port 2
1490 12:06:16.079531 USB3 port 3
1491 12:06:16.081915 PCI: 00:14.2
1492 12:06:16.092346 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 12:06:16.101980 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 12:06:16.105685 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 12:06:16.118700 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 12:06:16.119303 GENERIC: 0.0
1497 12:06:16.122413 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 12:06:16.132165 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 12:06:16.135388 I2C: 00:1a
1500 12:06:16.135852 I2C: 00:31
1501 12:06:16.138724 I2C: 00:32
1502 12:06:16.141991 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 12:06:16.152013 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 12:06:16.155404 I2C: 00:10
1505 12:06:16.155944 PCI: 00:15.2
1506 12:06:16.165480 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 12:06:16.168335 PCI: 00:15.3
1508 12:06:16.178030 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 12:06:16.178493 PCI: 00:16.0
1510 12:06:16.191432 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 12:06:16.191959 PCI: 00:19.0
1512 12:06:16.194738 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 12:06:16.208389 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 12:06:16.208971 I2C: 00:15
1515 12:06:16.211474 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 12:06:16.221246 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 12:06:16.234495 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 12:06:16.244679 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 12:06:16.245218 GENERIC: 0.0
1520 12:06:16.248358 PCI: 01:00.0
1521 12:06:16.257881 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 12:06:16.267950 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 12:06:16.277686 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 12:06:16.280942 PCI: 00:1e.0
1525 12:06:16.291499 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 12:06:16.294336 PCI: 00:1e.2 child on link 0 SPI: 00
1527 12:06:16.304218 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 12:06:16.307437 SPI: 00
1529 12:06:16.311170 PCI: 00:1e.3 child on link 0 SPI: 00
1530 12:06:16.321207 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 12:06:16.324547 SPI: 00
1532 12:06:16.327717 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 12:06:16.334477 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 12:06:16.337416 PNP: 0c09.0
1535 12:06:16.347951 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 12:06:16.351307 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 12:06:16.360735 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 12:06:16.371082 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 12:06:16.374421 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 12:06:16.377484 GENERIC: 0.0
1541 12:06:16.377945 GENERIC: 1.0
1542 12:06:16.380760 PCI: 00:1f.3
1543 12:06:16.391123 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 12:06:16.400744 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 12:06:16.401314 PCI: 00:1f.5
1546 12:06:16.410746 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 12:06:16.417329 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 12:06:16.417787 APIC: 00
1549 12:06:16.421236 APIC: 01
1550 12:06:16.421725 APIC: 03
1551 12:06:16.422089 APIC: 06
1552 12:06:16.423810 APIC: 04
1553 12:06:16.424258 APIC: 05
1554 12:06:16.424613 APIC: 02
1555 12:06:16.427697 APIC: 07
1556 12:06:16.430799 Done allocating resources.
1557 12:06:16.434991 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 12:06:16.441488 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 12:06:16.444340 Configure GPIOs for I2S audio on UP4.
1560 12:06:16.451776 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 12:06:16.455848 Enabling resources...
1562 12:06:16.458985 PCI: 00:00.0 subsystem <- 8086/9a12
1563 12:06:16.462041 PCI: 00:00.0 cmd <- 06
1564 12:06:16.465255 PCI: 00:02.0 subsystem <- 8086/9a40
1565 12:06:16.468373 PCI: 00:02.0 cmd <- 03
1566 12:06:16.472121 PCI: 00:04.0 subsystem <- 8086/9a03
1567 12:06:16.472691 PCI: 00:04.0 cmd <- 02
1568 12:06:16.478619 PCI: 00:05.0 subsystem <- 8086/9a19
1569 12:06:16.479110 PCI: 00:05.0 cmd <- 02
1570 12:06:16.482094 PCI: 00:08.0 subsystem <- 8086/9a11
1571 12:06:16.485381 PCI: 00:08.0 cmd <- 06
1572 12:06:16.488998 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 12:06:16.492183 PCI: 00:0d.0 cmd <- 02
1574 12:06:16.495366 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 12:06:16.498579 PCI: 00:14.0 cmd <- 02
1576 12:06:16.502311 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 12:06:16.505598 PCI: 00:14.2 cmd <- 02
1578 12:06:16.509460 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 12:06:16.512249 PCI: 00:14.3 cmd <- 02
1580 12:06:16.515452 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 12:06:16.515996 PCI: 00:15.0 cmd <- 02
1582 12:06:16.522154 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 12:06:16.522675 PCI: 00:15.1 cmd <- 02
1584 12:06:16.525724 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 12:06:16.529223 PCI: 00:15.2 cmd <- 02
1586 12:06:16.532182 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 12:06:16.535332 PCI: 00:15.3 cmd <- 02
1588 12:06:16.538701 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 12:06:16.542251 PCI: 00:16.0 cmd <- 02
1590 12:06:16.545564 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 12:06:16.548703 PCI: 00:19.1 cmd <- 02
1592 12:06:16.551922 PCI: 00:1d.0 bridge ctrl <- 0013
1593 12:06:16.555804 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 12:06:16.558820 PCI: 00:1d.0 cmd <- 06
1595 12:06:16.562860 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 12:06:16.565478 PCI: 00:1e.0 cmd <- 06
1597 12:06:16.568777 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 12:06:16.569307 PCI: 00:1e.2 cmd <- 06
1599 12:06:16.575717 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 12:06:16.576311 PCI: 00:1e.3 cmd <- 02
1601 12:06:16.578861 PCI: 00:1f.0 subsystem <- 8086/a087
1602 12:06:16.581815 PCI: 00:1f.0 cmd <- 407
1603 12:06:16.585664 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 12:06:16.588615 PCI: 00:1f.3 cmd <- 02
1605 12:06:16.592245 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 12:06:16.595504 PCI: 00:1f.5 cmd <- 406
1607 12:06:16.599647 PCI: 01:00.0 cmd <- 02
1608 12:06:16.603922 done.
1609 12:06:16.607450 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 12:06:16.610519 Initializing devices...
1611 12:06:16.614041 Root Device init
1612 12:06:16.617170 Chrome EC: Set SMI mask to 0x0000000000000000
1613 12:06:16.623756 Chrome EC: clear events_b mask to 0x0000000000000000
1614 12:06:16.630521 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 12:06:16.638418 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 12:06:16.643649 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 12:06:16.647222 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 12:06:16.654881 fw_config match found: DB_USB=USB3_ACTIVE
1619 12:06:16.658487 Configure Right Type-C port orientation for retimer
1620 12:06:16.661276 Root Device init finished in 46 msecs
1621 12:06:16.665854 PCI: 00:00.0 init
1622 12:06:16.668797 CPU TDP = 9 Watts
1623 12:06:16.669288 CPU PL1 = 9 Watts
1624 12:06:16.672222 CPU PL2 = 40 Watts
1625 12:06:16.675805 CPU PL4 = 83 Watts
1626 12:06:16.678910 PCI: 00:00.0 init finished in 8 msecs
1627 12:06:16.679384 PCI: 00:02.0 init
1628 12:06:16.682689 GMA: Found VBT in CBFS
1629 12:06:16.685977 GMA: Found valid VBT in CBFS
1630 12:06:16.692179 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 12:06:16.698896 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 12:06:16.702101 PCI: 00:02.0 init finished in 18 msecs
1633 12:06:16.705880 PCI: 00:05.0 init
1634 12:06:16.709404 PCI: 00:05.0 init finished in 0 msecs
1635 12:06:16.712511 PCI: 00:08.0 init
1636 12:06:16.715754 PCI: 00:08.0 init finished in 0 msecs
1637 12:06:16.719018 PCI: 00:14.0 init
1638 12:06:16.722412 PCI: 00:14.0 init finished in 0 msecs
1639 12:06:16.725464 PCI: 00:14.2 init
1640 12:06:16.728772 PCI: 00:14.2 init finished in 0 msecs
1641 12:06:16.732344 PCI: 00:15.0 init
1642 12:06:16.732902 I2C bus 0 version 0x3230302a
1643 12:06:16.738776 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 12:06:16.742343 PCI: 00:15.0 init finished in 6 msecs
1645 12:06:16.742897 PCI: 00:15.1 init
1646 12:06:16.746031 I2C bus 1 version 0x3230302a
1647 12:06:16.748900 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 12:06:16.752135 PCI: 00:15.1 init finished in 6 msecs
1649 12:06:16.755480 PCI: 00:15.2 init
1650 12:06:16.758817 I2C bus 2 version 0x3230302a
1651 12:06:16.762587 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 12:06:16.765665 PCI: 00:15.2 init finished in 6 msecs
1653 12:06:16.769351 PCI: 00:15.3 init
1654 12:06:16.772491 I2C bus 3 version 0x3230302a
1655 12:06:16.775608 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 12:06:16.779243 PCI: 00:15.3 init finished in 6 msecs
1657 12:06:16.782592 PCI: 00:16.0 init
1658 12:06:16.785521 PCI: 00:16.0 init finished in 0 msecs
1659 12:06:16.788752 PCI: 00:19.1 init
1660 12:06:16.789205 I2C bus 5 version 0x3230302a
1661 12:06:16.795584 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 12:06:16.799013 PCI: 00:19.1 init finished in 6 msecs
1663 12:06:16.799465 PCI: 00:1d.0 init
1664 12:06:16.802385 Initializing PCH PCIe bridge.
1665 12:06:16.805449 PCI: 00:1d.0 init finished in 3 msecs
1666 12:06:16.810085 PCI: 00:1f.0 init
1667 12:06:16.812958 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 12:06:16.819671 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 12:06:16.820193 IOAPIC: ID = 0x02
1670 12:06:16.822824 IOAPIC: Dumping registers
1671 12:06:16.826563 reg 0x0000: 0x02000000
1672 12:06:16.829989 reg 0x0001: 0x00770020
1673 12:06:16.830443 reg 0x0002: 0x00000000
1674 12:06:16.836372 PCI: 00:1f.0 init finished in 21 msecs
1675 12:06:16.836825 PCI: 00:1f.2 init
1676 12:06:16.839842 Disabling ACPI via APMC.
1677 12:06:16.843123 APMC done.
1678 12:06:16.846857 PCI: 00:1f.2 init finished in 5 msecs
1679 12:06:16.857868 PCI: 01:00.0 init
1680 12:06:16.861794 PCI: 01:00.0 init finished in 0 msecs
1681 12:06:16.864718 PNP: 0c09.0 init
1682 12:06:16.868048 Google Chrome EC uptime: 8.433 seconds
1683 12:06:16.874667 Google Chrome AP resets since EC boot: 1
1684 12:06:16.877726 Google Chrome most recent AP reset causes:
1685 12:06:16.881330 0.349: 32775 shutdown: entering G3
1686 12:06:16.887888 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 12:06:16.891204 PNP: 0c09.0 init finished in 22 msecs
1688 12:06:16.897316 Devices initialized
1689 12:06:16.900284 Show all devs... After init.
1690 12:06:16.903609 Root Device: enabled 1
1691 12:06:16.904073 DOMAIN: 0000: enabled 1
1692 12:06:16.907002 CPU_CLUSTER: 0: enabled 1
1693 12:06:16.910108 PCI: 00:00.0: enabled 1
1694 12:06:16.913602 PCI: 00:02.0: enabled 1
1695 12:06:16.914147 PCI: 00:04.0: enabled 1
1696 12:06:16.917030 PCI: 00:05.0: enabled 1
1697 12:06:16.920530 PCI: 00:06.0: enabled 0
1698 12:06:16.923765 PCI: 00:07.0: enabled 0
1699 12:06:16.924302 PCI: 00:07.1: enabled 0
1700 12:06:16.927034 PCI: 00:07.2: enabled 0
1701 12:06:16.930650 PCI: 00:07.3: enabled 0
1702 12:06:16.933515 PCI: 00:08.0: enabled 1
1703 12:06:16.933973 PCI: 00:09.0: enabled 0
1704 12:06:16.937074 PCI: 00:0a.0: enabled 0
1705 12:06:16.940246 PCI: 00:0d.0: enabled 1
1706 12:06:16.943475 PCI: 00:0d.1: enabled 0
1707 12:06:16.943954 PCI: 00:0d.2: enabled 0
1708 12:06:16.946937 PCI: 00:0d.3: enabled 0
1709 12:06:16.950434 PCI: 00:0e.0: enabled 0
1710 12:06:16.950997 PCI: 00:10.2: enabled 1
1711 12:06:16.953430 PCI: 00:10.6: enabled 0
1712 12:06:16.956725 PCI: 00:10.7: enabled 0
1713 12:06:16.960248 PCI: 00:12.0: enabled 0
1714 12:06:16.960776 PCI: 00:12.6: enabled 0
1715 12:06:16.963067 PCI: 00:13.0: enabled 0
1716 12:06:16.966640 PCI: 00:14.0: enabled 1
1717 12:06:16.970018 PCI: 00:14.1: enabled 0
1718 12:06:16.970555 PCI: 00:14.2: enabled 1
1719 12:06:16.973511 PCI: 00:14.3: enabled 1
1720 12:06:16.976774 PCI: 00:15.0: enabled 1
1721 12:06:16.980324 PCI: 00:15.1: enabled 1
1722 12:06:16.980783 PCI: 00:15.2: enabled 1
1723 12:06:16.983426 PCI: 00:15.3: enabled 1
1724 12:06:16.986515 PCI: 00:16.0: enabled 1
1725 12:06:16.986997 PCI: 00:16.1: enabled 0
1726 12:06:16.989860 PCI: 00:16.2: enabled 0
1727 12:06:16.993503 PCI: 00:16.3: enabled 0
1728 12:06:16.996587 PCI: 00:16.4: enabled 0
1729 12:06:16.997073 PCI: 00:16.5: enabled 0
1730 12:06:16.999876 PCI: 00:17.0: enabled 0
1731 12:06:17.003037 PCI: 00:19.0: enabled 0
1732 12:06:17.006694 PCI: 00:19.1: enabled 1
1733 12:06:17.007296 PCI: 00:19.2: enabled 0
1734 12:06:17.010034 PCI: 00:1c.0: enabled 1
1735 12:06:17.013221 PCI: 00:1c.1: enabled 0
1736 12:06:17.016702 PCI: 00:1c.2: enabled 0
1737 12:06:17.017249 PCI: 00:1c.3: enabled 0
1738 12:06:17.019807 PCI: 00:1c.4: enabled 0
1739 12:06:17.023205 PCI: 00:1c.5: enabled 0
1740 12:06:17.026502 PCI: 00:1c.6: enabled 1
1741 12:06:17.027090 PCI: 00:1c.7: enabled 0
1742 12:06:17.030104 PCI: 00:1d.0: enabled 1
1743 12:06:17.033227 PCI: 00:1d.1: enabled 0
1744 12:06:17.033761 PCI: 00:1d.2: enabled 1
1745 12:06:17.036396 PCI: 00:1d.3: enabled 0
1746 12:06:17.039572 PCI: 00:1e.0: enabled 1
1747 12:06:17.043153 PCI: 00:1e.1: enabled 0
1748 12:06:17.043701 PCI: 00:1e.2: enabled 1
1749 12:06:17.046649 PCI: 00:1e.3: enabled 1
1750 12:06:17.049992 PCI: 00:1f.0: enabled 1
1751 12:06:17.052981 PCI: 00:1f.1: enabled 0
1752 12:06:17.053439 PCI: 00:1f.2: enabled 1
1753 12:06:17.056728 PCI: 00:1f.3: enabled 1
1754 12:06:17.059881 PCI: 00:1f.4: enabled 0
1755 12:06:17.063032 PCI: 00:1f.5: enabled 1
1756 12:06:17.063491 PCI: 00:1f.6: enabled 0
1757 12:06:17.066406 PCI: 00:1f.7: enabled 0
1758 12:06:17.069448 APIC: 00: enabled 1
1759 12:06:17.069910 GENERIC: 0.0: enabled 1
1760 12:06:17.073474 GENERIC: 0.0: enabled 1
1761 12:06:17.076093 GENERIC: 1.0: enabled 1
1762 12:06:17.079789 GENERIC: 0.0: enabled 1
1763 12:06:17.080250 GENERIC: 1.0: enabled 1
1764 12:06:17.083248 USB0 port 0: enabled 1
1765 12:06:17.086302 GENERIC: 0.0: enabled 1
1766 12:06:17.086869 USB0 port 0: enabled 1
1767 12:06:17.089803 GENERIC: 0.0: enabled 1
1768 12:06:17.092816 I2C: 00:1a: enabled 1
1769 12:06:17.096058 I2C: 00:31: enabled 1
1770 12:06:17.096539 I2C: 00:32: enabled 1
1771 12:06:17.099524 I2C: 00:10: enabled 1
1772 12:06:17.103175 I2C: 00:15: enabled 1
1773 12:06:17.103758 GENERIC: 0.0: enabled 0
1774 12:06:17.106217 GENERIC: 1.0: enabled 0
1775 12:06:17.109757 GENERIC: 0.0: enabled 1
1776 12:06:17.110219 SPI: 00: enabled 1
1777 12:06:17.112659 SPI: 00: enabled 1
1778 12:06:17.116204 PNP: 0c09.0: enabled 1
1779 12:06:17.116751 GENERIC: 0.0: enabled 1
1780 12:06:17.119493 USB3 port 0: enabled 1
1781 12:06:17.123088 USB3 port 1: enabled 1
1782 12:06:17.123618 USB3 port 2: enabled 0
1783 12:06:17.126348 USB3 port 3: enabled 0
1784 12:06:17.129307 USB2 port 0: enabled 0
1785 12:06:17.132949 USB2 port 1: enabled 1
1786 12:06:17.133476 USB2 port 2: enabled 1
1787 12:06:17.135987 USB2 port 3: enabled 0
1788 12:06:17.139431 USB2 port 4: enabled 1
1789 12:06:17.139896 USB2 port 5: enabled 0
1790 12:06:17.143056 USB2 port 6: enabled 0
1791 12:06:17.145862 USB2 port 7: enabled 0
1792 12:06:17.149117 USB2 port 8: enabled 0
1793 12:06:17.149668 USB2 port 9: enabled 0
1794 12:06:17.152430 USB3 port 0: enabled 0
1795 12:06:17.156095 USB3 port 1: enabled 1
1796 12:06:17.156550 USB3 port 2: enabled 0
1797 12:06:17.159088 USB3 port 3: enabled 0
1798 12:06:17.162557 GENERIC: 0.0: enabled 1
1799 12:06:17.165944 GENERIC: 1.0: enabled 1
1800 12:06:17.166393 APIC: 01: enabled 1
1801 12:06:17.169112 APIC: 03: enabled 1
1802 12:06:17.169720 APIC: 06: enabled 1
1803 12:06:17.172438 APIC: 04: enabled 1
1804 12:06:17.176413 APIC: 05: enabled 1
1805 12:06:17.176911 APIC: 02: enabled 1
1806 12:06:17.179204 APIC: 07: enabled 1
1807 12:06:17.182576 PCI: 01:00.0: enabled 1
1808 12:06:17.185863 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1809 12:06:17.192753 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1810 12:06:17.195863 ELOG: NV offset 0xf30000 size 0x1000
1811 12:06:17.202639 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1812 12:06:17.209133 ELOG: Event(17) added with size 13 at 2023-04-03 12:06:17 UTC
1813 12:06:17.216129 ELOG: Event(92) added with size 9 at 2023-04-03 12:06:17 UTC
1814 12:06:17.222713 ELOG: Event(93) added with size 9 at 2023-04-03 12:06:17 UTC
1815 12:06:17.229068 ELOG: Event(9E) added with size 10 at 2023-04-03 12:06:17 UTC
1816 12:06:17.235681 ELOG: Event(16) added with size 11 at 2023-04-03 12:06:17 UTC
1817 12:06:17.239047 Erasing flash addr f30000 + 4 KiB
1818 12:06:17.297017 ELOG: Event(9F) added with size 14 at 2023-04-03 12:06:17 UTC
1819 12:06:17.303709 BS: BS_DEV_INIT exit times (exec / console): 32 / 55 ms
1820 12:06:17.310496 ELOG: Event(A1) added with size 10 at 2023-04-03 12:06:17 UTC
1821 12:06:17.316847 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1822 12:06:17.323725 ELOG: Event(A0) added with size 9 at 2023-04-03 12:06:17 UTC
1823 12:06:17.327393 elog_add_boot_reason: Logged dev mode boot
1824 12:06:17.333535 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1825 12:06:17.337358 Finalize devices...
1826 12:06:17.337934 Devices finalized
1827 12:06:17.343978 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1828 12:06:17.350412 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1829 12:06:17.353467 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1830 12:06:17.360155 ME: HFSTS1 : 0x80030055
1831 12:06:17.363613 ME: HFSTS2 : 0x30280116
1832 12:06:17.367027 ME: HFSTS3 : 0x00000050
1833 12:06:17.373571 ME: HFSTS4 : 0x00004000
1834 12:06:17.377276 ME: HFSTS5 : 0x00000000
1835 12:06:17.380265 ME: HFSTS6 : 0x00400006
1836 12:06:17.387053 ME: Manufacturing Mode : YES
1837 12:06:17.390492 ME: SPI Protection Mode Enabled : NO
1838 12:06:17.393670 ME: FW Partition Table : OK
1839 12:06:17.397197 ME: Bringup Loader Failure : NO
1840 12:06:17.399982 ME: Firmware Init Complete : NO
1841 12:06:17.403535 ME: Boot Options Present : NO
1842 12:06:17.406800 ME: Update In Progress : NO
1843 12:06:17.410110 ME: D0i3 Support : YES
1844 12:06:17.417050 ME: Low Power State Enabled : NO
1845 12:06:17.420749 ME: CPU Replaced : YES
1846 12:06:17.423606 ME: CPU Replacement Valid : YES
1847 12:06:17.427024 ME: Current Working State : 5
1848 12:06:17.430534 ME: Current Operation State : 1
1849 12:06:17.433413 ME: Current Operation Mode : 3
1850 12:06:17.436826 ME: Error Code : 0
1851 12:06:17.440236 ME: Enhanced Debug Mode : NO
1852 12:06:17.443845 ME: CPU Debug Disabled : YES
1853 12:06:17.450387 ME: TXT Support : NO
1854 12:06:17.453464 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1855 12:06:17.463653 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1856 12:06:17.466879 CBFS: 'fallback/slic' not found.
1857 12:06:17.470279 ACPI: Writing ACPI tables at 76b01000.
1858 12:06:17.470781 ACPI: * FACS
1859 12:06:17.473084 ACPI: * DSDT
1860 12:06:17.476708 Ramoops buffer: 0x100000@0x76a00000.
1861 12:06:17.483134 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1862 12:06:17.486293 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1863 12:06:17.489573 Google Chrome EC: version:
1864 12:06:17.492985 ro: voema_v2.0.7540-147f8d37d1
1865 12:06:17.496442 rw: voema_v2.0.7540-147f8d37d1
1866 12:06:17.499758 running image: 2
1867 12:06:17.502932 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1868 12:06:17.508235 ACPI: * FADT
1869 12:06:17.508713 SCI is IRQ9
1870 12:06:17.515287 ACPI: added table 1/32, length now 40
1871 12:06:17.515885 ACPI: * SSDT
1872 12:06:17.517836 Found 1 CPU(s) with 8 core(s) each.
1873 12:06:17.524538 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1874 12:06:17.527894 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1875 12:06:17.531472 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1876 12:06:17.534604 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1877 12:06:17.541640 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1878 12:06:17.548199 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1879 12:06:17.551351 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1880 12:06:17.558712 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1881 12:06:17.564509 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1882 12:06:17.568083 \_SB.PCI0.RP09: Added StorageD3Enable property
1883 12:06:17.575011 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1884 12:06:17.578247 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1885 12:06:17.584373 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1886 12:06:17.588257 PS2K: Passing 80 keymaps to kernel
1887 12:06:17.594438 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1888 12:06:17.600859 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1889 12:06:17.607553 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1890 12:06:17.614559 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1891 12:06:17.621141 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1892 12:06:17.627986 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1893 12:06:17.634307 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1894 12:06:17.641012 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1895 12:06:17.644592 ACPI: added table 2/32, length now 44
1896 12:06:17.645165 ACPI: * MCFG
1897 12:06:17.647886 ACPI: added table 3/32, length now 48
1898 12:06:17.651142 ACPI: * TPM2
1899 12:06:17.654151 TPM2 log created at 0x769f0000
1900 12:06:17.657746 ACPI: added table 4/32, length now 52
1901 12:06:17.658322 ACPI: * MADT
1902 12:06:17.661052 SCI is IRQ9
1903 12:06:17.664303 ACPI: added table 5/32, length now 56
1904 12:06:17.667482 current = 76b09850
1905 12:06:17.667990 ACPI: * DMAR
1906 12:06:17.671085 ACPI: added table 6/32, length now 60
1907 12:06:17.674225 ACPI: added table 7/32, length now 64
1908 12:06:17.677410 ACPI: * HPET
1909 12:06:17.680721 ACPI: added table 8/32, length now 68
1910 12:06:17.681183 ACPI: done.
1911 12:06:17.684909 ACPI tables: 35216 bytes.
1912 12:06:17.687383 smbios_write_tables: 769ef000
1913 12:06:17.690441 EC returned error result code 3
1914 12:06:17.694102 Couldn't obtain OEM name from CBI
1915 12:06:17.697508 Create SMBIOS type 16
1916 12:06:17.700735 Create SMBIOS type 17
1917 12:06:17.701185 GENERIC: 0.0 (WIFI Device)
1918 12:06:17.703680 SMBIOS tables: 1750 bytes.
1919 12:06:17.710531 Writing table forward entry at 0x00000500
1920 12:06:17.713780 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1921 12:06:17.720501 Writing coreboot table at 0x76b25000
1922 12:06:17.723525 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1923 12:06:17.730742 1. 0000000000001000-000000000009ffff: RAM
1924 12:06:17.734342 2. 00000000000a0000-00000000000fffff: RESERVED
1925 12:06:17.737132 3. 0000000000100000-00000000769eefff: RAM
1926 12:06:17.743651 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1927 12:06:17.750168 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1928 12:06:17.753778 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1929 12:06:17.760284 7. 0000000077000000-000000007fbfffff: RESERVED
1930 12:06:17.763749 8. 00000000c0000000-00000000cfffffff: RESERVED
1931 12:06:17.770691 9. 00000000f8000000-00000000f9ffffff: RESERVED
1932 12:06:17.773598 10. 00000000fb000000-00000000fb000fff: RESERVED
1933 12:06:17.780128 11. 00000000fe000000-00000000fe00ffff: RESERVED
1934 12:06:17.783284 12. 00000000fed80000-00000000fed87fff: RESERVED
1935 12:06:17.790350 13. 00000000fed90000-00000000fed92fff: RESERVED
1936 12:06:17.793244 14. 00000000feda0000-00000000feda1fff: RESERVED
1937 12:06:17.796879 15. 00000000fedc0000-00000000feddffff: RESERVED
1938 12:06:17.803393 16. 0000000100000000-00000002803fffff: RAM
1939 12:06:17.806784 Passing 4 GPIOs to payload:
1940 12:06:17.810652 NAME | PORT | POLARITY | VALUE
1941 12:06:17.816976 lid | undefined | high | high
1942 12:06:17.820575 power | undefined | high | low
1943 12:06:17.827264 oprom | undefined | high | low
1944 12:06:17.829693 EC in RW | 0x000000e5 | high | high
1945 12:06:17.836790 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 22de
1946 12:06:17.839952 coreboot table: 1576 bytes.
1947 12:06:17.843953 IMD ROOT 0. 0x76fff000 0x00001000
1948 12:06:17.846789 IMD SMALL 1. 0x76ffe000 0x00001000
1949 12:06:17.853745 FSP MEMORY 2. 0x76c4e000 0x003b0000
1950 12:06:17.856717 VPD 3. 0x76c4d000 0x00000367
1951 12:06:17.859804 RO MCACHE 4. 0x76c4c000 0x00000fdc
1952 12:06:17.863186 CONSOLE 5. 0x76c2c000 0x00020000
1953 12:06:17.866866 FMAP 6. 0x76c2b000 0x00000578
1954 12:06:17.869900 TIME STAMP 7. 0x76c2a000 0x00000910
1955 12:06:17.873141 VBOOT WORK 8. 0x76c16000 0x00014000
1956 12:06:17.877136 ROMSTG STCK 9. 0x76c15000 0x00001000
1957 12:06:17.883562 AFTER CAR 10. 0x76c0a000 0x0000b000
1958 12:06:17.886827 RAMSTAGE 11. 0x76b97000 0x00073000
1959 12:06:17.889726 REFCODE 12. 0x76b42000 0x00055000
1960 12:06:17.893291 SMM BACKUP 13. 0x76b32000 0x00010000
1961 12:06:17.896522 4f444749 14. 0x76b30000 0x00002000
1962 12:06:17.899606 EXT VBT15. 0x76b2d000 0x0000219f
1963 12:06:17.903332 COREBOOT 16. 0x76b25000 0x00008000
1964 12:06:17.906347 ACPI 17. 0x76b01000 0x00024000
1965 12:06:17.909837 ACPI GNVS 18. 0x76b00000 0x00001000
1966 12:06:17.916519 RAMOOPS 19. 0x76a00000 0x00100000
1967 12:06:17.920099 TPM2 TCGLOG20. 0x769f0000 0x00010000
1968 12:06:17.923107 SMBIOS 21. 0x769ef000 0x00000800
1969 12:06:17.923636 IMD small region:
1970 12:06:17.929861 IMD ROOT 0. 0x76ffec00 0x00000400
1971 12:06:17.932833 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1972 12:06:17.936182 POWER STATE 2. 0x76ffeb80 0x00000044
1973 12:06:17.939919 ROMSTAGE 3. 0x76ffeb60 0x00000004
1974 12:06:17.943586 MEM INFO 4. 0x76ffe980 0x000001e0
1975 12:06:17.949702 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1976 12:06:17.953201 MTRR: Physical address space:
1977 12:06:17.959919 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1978 12:06:17.966450 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1979 12:06:17.972840 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1980 12:06:17.976168 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1981 12:06:17.983044 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1982 12:06:17.989908 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1983 12:06:17.996442 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1984 12:06:17.999511 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 12:06:18.006106 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 12:06:18.009743 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 12:06:18.012991 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 12:06:18.016108 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 12:06:18.022600 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 12:06:18.026217 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 12:06:18.029453 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 12:06:18.033344 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 12:06:18.036148 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 12:06:18.042750 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 12:06:18.046178 call enable_fixed_mtrr()
1996 12:06:18.049402 CPU physical address size: 39 bits
1997 12:06:18.052583 MTRR: default type WB/UC MTRR counts: 6/6.
1998 12:06:18.056068 MTRR: UC selected as default type.
1999 12:06:18.062906 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2000 12:06:18.069994 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2001 12:06:18.076053 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2002 12:06:18.082457 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2003 12:06:18.089334 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2004 12:06:18.095591 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2005 12:06:18.096121
2006 12:06:18.096485 MTRR check
2007 12:06:18.098822 Fixed MTRRs : Enabled
2008 12:06:18.102531 Variable MTRRs: Enabled
2009 12:06:18.103112
2010 12:06:18.106469 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 12:06:18.109525 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 12:06:18.115833 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 12:06:18.119420 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 12:06:18.122651 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 12:06:18.125904 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 12:06:18.132343 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 12:06:18.136004 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 12:06:18.138930 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 12:06:18.142346 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 12:06:18.145409 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 12:06:18.155389 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2022 12:06:18.155941 call enable_fixed_mtrr()
2023 12:06:18.159561 Checking cr50 for pending updates
2024 12:06:18.163932 CPU physical address size: 39 bits
2025 12:06:18.167437 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 12:06:18.170949 MTRR: Fixed MSR 0x250 0x0606060606060606
2027 12:06:18.177004 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 12:06:18.180561 MTRR: Fixed MSR 0x259 0x0000000000000000
2029 12:06:18.183998 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 12:06:18.187213 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 12:06:18.193852 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 12:06:18.197096 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 12:06:18.200718 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 12:06:18.203682 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 12:06:18.210531 MTRR: Fixed MSR 0x26e 0x0606060606060606
2036 12:06:18.213867 MTRR: Fixed MSR 0x26f 0x0606060606060606
2037 12:06:18.216818 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 12:06:18.220292 call enable_fixed_mtrr()
2039 12:06:18.223343 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 12:06:18.230271 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 12:06:18.233760 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 12:06:18.236942 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 12:06:18.240000 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 12:06:18.243548 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 12:06:18.250344 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 12:06:18.254064 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 12:06:18.257230 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 12:06:18.260152 CPU physical address size: 39 bits
2049 12:06:18.267065 call enable_fixed_mtrr()
2050 12:06:18.270257 MTRR: Fixed MSR 0x250 0x0606060606060606
2051 12:06:18.273444 MTRR: Fixed MSR 0x250 0x0606060606060606
2052 12:06:18.276958 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 12:06:18.283741 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 12:06:18.286989 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 12:06:18.290017 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 12:06:18.293630 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 12:06:18.296802 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 12:06:18.303315 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 12:06:18.306525 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 12:06:18.310209 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 12:06:18.313584 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 12:06:18.320967 MTRR: Fixed MSR 0x258 0x0606060606060606
2063 12:06:18.321605 call enable_fixed_mtrr()
2064 12:06:18.327646 MTRR: Fixed MSR 0x259 0x0000000000000000
2065 12:06:18.331345 MTRR: Fixed MSR 0x268 0x0606060606060606
2066 12:06:18.334556 MTRR: Fixed MSR 0x269 0x0606060606060606
2067 12:06:18.337381 MTRR: Fixed MSR 0x26a 0x0606060606060606
2068 12:06:18.344085 MTRR: Fixed MSR 0x26b 0x0606060606060606
2069 12:06:18.347139 MTRR: Fixed MSR 0x26c 0x0606060606060606
2070 12:06:18.350801 MTRR: Fixed MSR 0x26d 0x0606060606060606
2071 12:06:18.354019 MTRR: Fixed MSR 0x26e 0x0606060606060606
2072 12:06:18.360390 MTRR: Fixed MSR 0x26f 0x0606060606060606
2073 12:06:18.363707 CPU physical address size: 39 bits
2074 12:06:18.367263 call enable_fixed_mtrr()
2075 12:06:18.371371 Reading cr50 TPM mode
2076 12:06:18.374829 CPU physical address size: 39 bits
2077 12:06:18.378124 MTRR: Fixed MSR 0x250 0x0606060606060606
2078 12:06:18.381062 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 12:06:18.384742 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 12:06:18.388114 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 12:06:18.394498 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 12:06:18.397786 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 12:06:18.400886 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 12:06:18.404813 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 12:06:18.411069 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 12:06:18.414614 MTRR: Fixed MSR 0x26d 0x0606060606060606
2087 12:06:18.417436 MTRR: Fixed MSR 0x26e 0x0606060606060606
2088 12:06:18.421283 MTRR: Fixed MSR 0x26f 0x0606060606060606
2089 12:06:18.428989 MTRR: Fixed MSR 0x258 0x0606060606060606
2090 12:06:18.429570 call enable_fixed_mtrr()
2091 12:06:18.434917 MTRR: Fixed MSR 0x259 0x0000000000000000
2092 12:06:18.438471 MTRR: Fixed MSR 0x268 0x0606060606060606
2093 12:06:18.441704 MTRR: Fixed MSR 0x269 0x0606060606060606
2094 12:06:18.445341 MTRR: Fixed MSR 0x26a 0x0606060606060606
2095 12:06:18.451517 MTRR: Fixed MSR 0x26b 0x0606060606060606
2096 12:06:18.455191 MTRR: Fixed MSR 0x26c 0x0606060606060606
2097 12:06:18.458421 MTRR: Fixed MSR 0x26d 0x0606060606060606
2098 12:06:18.461359 MTRR: Fixed MSR 0x26e 0x0606060606060606
2099 12:06:18.468204 MTRR: Fixed MSR 0x26f 0x0606060606060606
2100 12:06:18.471959 CPU physical address size: 39 bits
2101 12:06:18.475126 call enable_fixed_mtrr()
2102 12:06:18.481567 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2103 12:06:18.484715 CPU physical address size: 39 bits
2104 12:06:18.491103 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2105 12:06:18.494569 CPU physical address size: 39 bits
2106 12:06:18.501298 Checking segment from ROM address 0xffc02b38
2107 12:06:18.504609 Checking segment from ROM address 0xffc02b54
2108 12:06:18.507855 Loading segment from ROM address 0xffc02b38
2109 12:06:18.511438 code (compression=0)
2110 12:06:18.521699 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2111 12:06:18.527762 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2112 12:06:18.531007 it's not compressed!
2113 12:06:18.670053 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2114 12:06:18.676774 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2115 12:06:18.682978 Loading segment from ROM address 0xffc02b54
2116 12:06:18.685967 Entry Point 0x30000000
2117 12:06:18.686506 Loaded segments
2118 12:06:18.692770 BS: BS_PAYLOAD_LOAD run times (exec / console): 142 / 63 ms
2119 12:06:18.735979 Finalizing chipset.
2120 12:06:18.739210 Finalizing SMM.
2121 12:06:18.739836 APMC done.
2122 12:06:18.746238 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2123 12:06:18.749141 mp_park_aps done after 0 msecs.
2124 12:06:18.752445 Jumping to boot code at 0x30000000(0x76b25000)
2125 12:06:18.762853 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2126 12:06:18.763525
2127 12:06:18.763947
2128 12:06:18.764322
2129 12:06:18.765760 Starting depthcharge on Voema...
2130 12:06:18.766289
2131 12:06:18.767483 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2132 12:06:18.768103 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2133 12:06:18.768579 Setting prompt string to ['volteer:']
2134 12:06:18.769031 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2135 12:06:18.775524 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2136 12:06:18.776040
2137 12:06:18.782695 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2138 12:06:18.783361
2139 12:06:18.785385 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2140 12:06:18.788792
2141 12:06:18.792194 Failed to find eMMC card reader
2142 12:06:18.792703
2143 12:06:18.793144 Wipe memory regions:
2144 12:06:18.793581
2145 12:06:18.798769 [0x00000000001000, 0x000000000a0000)
2146 12:06:18.799322
2147 12:06:18.801950 [0x00000000100000, 0x00000030000000)
2148 12:06:18.827701
2149 12:06:18.830398 [0x00000032662db0, 0x000000769ef000)
2150 12:06:18.866313
2151 12:06:18.869908 [0x00000100000000, 0x00000280400000)
2152 12:06:19.069903
2153 12:06:19.073264 ec_init: CrosEC protocol v3 supported (256, 256)
2154 12:06:19.073843
2155 12:06:19.079808 update_port_state: port C0 state: usb enable 1 mux conn 0
2156 12:06:19.080388
2157 12:06:19.086785 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2158 12:06:19.089656
2159 12:06:19.093817 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2160 12:06:19.094401
2161 12:06:19.099435 send_conn_disc_msg: pmc_send_cmd succeeded
2162 12:06:19.531487
2163 12:06:19.532061 R8152: Initializing
2164 12:06:19.532462
2165 12:06:19.535039 Version 6 (ocp_data = 5c30)
2166 12:06:19.535602
2167 12:06:19.538243 R8152: Done initializing
2168 12:06:19.538816
2169 12:06:19.541367 Adding net device
2170 12:06:19.843195
2171 12:06:19.846433 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2172 12:06:19.846992
2173 12:06:19.847414
2174 12:06:19.847815
2175 12:06:19.850298 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2177 12:06:19.952264 volteer: tftpboot 192.168.201.1 9849907/tftp-deploy-clv4vtzd/kernel/bzImage 9849907/tftp-deploy-clv4vtzd/kernel/cmdline 9849907/tftp-deploy-clv4vtzd/ramdisk/ramdisk.cpio.gz
2178 12:06:19.952960 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2179 12:06:19.953537 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2180 12:06:19.957671 tftpboot 192.168.201.1 9849907/tftp-deploy-clv4vtzd/kernel/bzImoy-clv4vtzd/kernel/cmdline 9849907/tftp-deploy-clv4vtzd/ramdisk/ramdisk.cpio.gz
2181 12:06:19.958238
2182 12:06:19.958633 Waiting for link
2183 12:06:20.161256
2184 12:06:20.161824 done.
2185 12:06:20.162339
2186 12:06:20.162724 MAC: 00:24:32:30:78:74
2187 12:06:20.163192
2188 12:06:20.164076 Sending DHCP discover... done.
2189 12:06:20.164489
2190 12:06:20.167301 Waiting for reply... done.
2191 12:06:20.167853
2192 12:06:20.170652 Sending DHCP request... done.
2193 12:06:20.171188
2194 12:06:20.174231 Waiting for reply... done.
2195 12:06:20.174842
2196 12:06:20.177557 My ip is 192.168.201.14
2197 12:06:20.178057
2198 12:06:20.180846 The DHCP server ip is 192.168.201.1
2199 12:06:20.181357
2200 12:06:20.184346 TFTP server IP predefined by user: 192.168.201.1
2201 12:06:20.184850
2202 12:06:20.190741 Bootfile predefined by user: 9849907/tftp-deploy-clv4vtzd/kernel/bzImage
2203 12:06:20.191292
2204 12:06:20.194376 Sending tftp read request... done.
2205 12:06:20.194885
2206 12:06:20.201857 Waiting for the transfer...
2207 12:06:20.202376
2208 12:06:20.885313 00000000 ################################################################
2209 12:06:20.885859
2210 12:06:21.572771 00080000 ################################################################
2211 12:06:21.573371
2212 12:06:22.253709 00100000 ################################################################
2213 12:06:22.254249
2214 12:06:22.937047 00180000 ################################################################
2215 12:06:22.937575
2216 12:06:23.640208 00200000 ################################################################
2217 12:06:23.640745
2218 12:06:24.327037 00280000 ################################################################
2219 12:06:24.327577
2220 12:06:25.008713 00300000 ################################################################
2221 12:06:25.009308
2222 12:06:25.685033 00380000 ################################################################
2223 12:06:25.685545
2224 12:06:26.375841 00400000 ################################################################
2225 12:06:26.376378
2226 12:06:27.054843 00480000 ################################################################
2227 12:06:27.055526
2228 12:06:27.750571 00500000 ################################################################
2229 12:06:27.751280
2230 12:06:28.447869 00580000 ################################################################
2231 12:06:28.448408
2232 12:06:29.114911 00600000 ################################################################
2233 12:06:29.115468
2234 12:06:29.806912 00680000 ################################################################
2235 12:06:29.807474
2236 12:06:30.505230 00700000 ################################################################
2237 12:06:30.505762
2238 12:06:30.527320 00780000 ## done.
2239 12:06:30.527790
2240 12:06:30.530908 The bootfile was 7880592 bytes long.
2241 12:06:30.531404
2242 12:06:30.534401 Sending tftp read request... done.
2243 12:06:30.534856
2244 12:06:30.537426 Waiting for the transfer...
2245 12:06:30.537906
2246 12:06:31.175833 00000000 ################################################################
2247 12:06:31.176373
2248 12:06:31.860620 00080000 ################################################################
2249 12:06:31.861286
2250 12:06:32.547572 00100000 ################################################################
2251 12:06:32.548270
2252 12:06:33.141680 00180000 ################################################################
2253 12:06:33.141854
2254 12:06:33.696225 00200000 ################################################################
2255 12:06:33.696365
2256 12:06:34.235255 00280000 ################################################################
2257 12:06:34.235400
2258 12:06:34.748839 00300000 ################################################################
2259 12:06:34.749011
2260 12:06:35.262665 00380000 ################################################################
2261 12:06:35.262812
2262 12:06:35.804075 00400000 ################################################################
2263 12:06:35.804215
2264 12:06:36.329022 00480000 ################################################################
2265 12:06:36.329161
2266 12:06:36.847722 00500000 ############################################################### done.
2267 12:06:36.847858
2268 12:06:36.851200 Sending tftp read request... done.
2269 12:06:36.851281
2270 12:06:36.854075 Waiting for the transfer...
2271 12:06:36.854153
2272 12:06:36.854235 00000000 # done.
2273 12:06:36.854302
2274 12:06:36.863765 Command line loaded dynamically from TFTP file: 9849907/tftp-deploy-clv4vtzd/kernel/cmdline
2275 12:06:36.863857
2276 12:06:36.883691 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9849907/extract-nfsrootfs-dm86by5h,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2277 12:06:36.883790
2278 12:06:36.887356 Shutting down all USB controllers.
2279 12:06:36.887435
2280 12:06:36.890436 Removing current net device
2281 12:06:36.890521
2282 12:06:36.893660 Finalizing coreboot
2283 12:06:36.893740
2284 12:06:36.900448 Exiting depthcharge with code 4 at timestamp: 26851811
2285 12:06:36.900531
2286 12:06:36.900599
2287 12:06:36.900681 Starting kernel ...
2288 12:06:36.900785
2289 12:06:36.900863
2290 12:06:36.901234 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2291 12:06:36.901338 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2292 12:06:36.901416 Setting prompt string to ['Linux version [0-9]']
2293 12:06:36.901488 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2294 12:06:36.901564 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2296 12:11:02.902402 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2298 12:11:02.903637 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2300 12:11:02.904552 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2303 12:11:02.906105 end: 2 depthcharge-action (duration 00:05:00) [common]
2305 12:11:02.906860 Cleaning after the job
2306 12:11:02.906948 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849907/tftp-deploy-clv4vtzd/ramdisk
2307 12:11:02.907496 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849907/tftp-deploy-clv4vtzd/kernel
2308 12:11:02.908046 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849907/tftp-deploy-clv4vtzd/nfsrootfs
2309 12:11:02.939606 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9849907/tftp-deploy-clv4vtzd/modules
2310 12:11:02.940000 start: 5.1 power-off (timeout 00:00:30) [common]
2311 12:11:02.940155 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2312 12:11:03.010590 >> Command sent successfully.
2313 12:11:03.014398 Returned 0 in 0 seconds
2314 12:11:03.115526 end: 5.1 power-off (duration 00:00:00) [common]
2316 12:11:03.117128 start: 5.2 read-feedback (timeout 00:10:00) [common]
2317 12:11:03.118320 Listened to connection for namespace 'common' for up to 1s
2318 12:11:04.123168 Finalising connection for namespace 'common'
2319 12:11:04.123883 Disconnecting from shell: Finalise
2320 12:11:04.124334
2321 12:11:04.225883 end: 5.2 read-feedback (duration 00:00:01) [common]
2322 12:11:04.226546 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9849907
2323 12:11:04.322776 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9849907
2324 12:11:04.323021 JobError: Your job cannot terminate cleanly.