Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 08:59:13.855687 lava-dispatcher, installed at version: 2023.03
2 08:59:13.855890 start: 0 validate
3 08:59:13.856019 Start time: 2023-05-03 08:59:13.856010+00:00 (UTC)
4 08:59:13.856197 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:59:13.856325 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230421.0%2Fx86%2Frootfs.cpio.gz exists
6 08:59:14.156203 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:59:14.157023 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1186-gb629b961cbe6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:59:17.162365 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:59:17.163199 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1186-gb629b961cbe6%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 08:59:18.166068 validate duration: 4.31
12 08:59:18.166387 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 08:59:18.166485 start: 1.1 download-retry (timeout 00:10:00) [common]
14 08:59:18.166571 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 08:59:18.166688 Not decompressing ramdisk as can be used compressed.
16 08:59:18.166774 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230421.0/x86/rootfs.cpio.gz
17 08:59:18.166840 saving as /var/lib/lava/dispatcher/tmp/10183679/tftp-deploy-0l72ilq_/ramdisk/rootfs.cpio.gz
18 08:59:18.166925 total size: 8429989 (8MB)
19 08:59:18.168010 progress 0% (0MB)
20 08:59:18.170313 progress 5% (0MB)
21 08:59:18.172661 progress 10% (0MB)
22 08:59:18.174912 progress 15% (1MB)
23 08:59:18.177220 progress 20% (1MB)
24 08:59:18.179447 progress 25% (2MB)
25 08:59:18.181596 progress 30% (2MB)
26 08:59:18.183800 progress 35% (2MB)
27 08:59:18.185783 progress 40% (3MB)
28 08:59:18.188072 progress 45% (3MB)
29 08:59:18.190331 progress 50% (4MB)
30 08:59:18.192657 progress 55% (4MB)
31 08:59:18.194799 progress 60% (4MB)
32 08:59:18.197033 progress 65% (5MB)
33 08:59:18.199167 progress 70% (5MB)
34 08:59:18.201274 progress 75% (6MB)
35 08:59:18.203436 progress 80% (6MB)
36 08:59:18.205614 progress 85% (6MB)
37 08:59:18.207798 progress 90% (7MB)
38 08:59:18.209929 progress 95% (7MB)
39 08:59:18.212136 progress 100% (8MB)
40 08:59:18.212269 8MB downloaded in 0.05s (177.31MB/s)
41 08:59:18.212460 end: 1.1.1 http-download (duration 00:00:00) [common]
43 08:59:18.212736 end: 1.1 download-retry (duration 00:00:00) [common]
44 08:59:18.212841 start: 1.2 download-retry (timeout 00:10:00) [common]
45 08:59:18.212954 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 08:59:18.213069 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1186-gb629b961cbe6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 08:59:18.213158 saving as /var/lib/lava/dispatcher/tmp/10183679/tftp-deploy-0l72ilq_/kernel/bzImage
48 08:59:18.213233 total size: 7880592 (7MB)
49 08:59:18.213309 No compression specified
50 08:59:18.214480 progress 0% (0MB)
51 08:59:18.216626 progress 5% (0MB)
52 08:59:18.218616 progress 10% (0MB)
53 08:59:18.220652 progress 15% (1MB)
54 08:59:18.222641 progress 20% (1MB)
55 08:59:18.224706 progress 25% (1MB)
56 08:59:18.226691 progress 30% (2MB)
57 08:59:18.228747 progress 35% (2MB)
58 08:59:18.230734 progress 40% (3MB)
59 08:59:18.232785 progress 45% (3MB)
60 08:59:18.235006 progress 50% (3MB)
61 08:59:18.237110 progress 55% (4MB)
62 08:59:18.239165 progress 60% (4MB)
63 08:59:18.241290 progress 65% (4MB)
64 08:59:18.243393 progress 70% (5MB)
65 08:59:18.245500 progress 75% (5MB)
66 08:59:18.247738 progress 80% (6MB)
67 08:59:18.249820 progress 85% (6MB)
68 08:59:18.251940 progress 90% (6MB)
69 08:59:18.253976 progress 95% (7MB)
70 08:59:18.256022 progress 100% (7MB)
71 08:59:18.256197 7MB downloaded in 0.04s (174.94MB/s)
72 08:59:18.256340 end: 1.2.1 http-download (duration 00:00:00) [common]
74 08:59:18.256574 end: 1.2 download-retry (duration 00:00:00) [common]
75 08:59:18.256662 start: 1.3 download-retry (timeout 00:10:00) [common]
76 08:59:18.256753 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 08:59:18.256888 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1186-gb629b961cbe6/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 08:59:18.256960 saving as /var/lib/lava/dispatcher/tmp/10183679/tftp-deploy-0l72ilq_/modules/modules.tar
79 08:59:18.257022 total size: 250372 (0MB)
80 08:59:18.257082 Using unxz to decompress xz
81 08:59:18.260878 progress 13% (0MB)
82 08:59:18.261271 progress 26% (0MB)
83 08:59:18.261511 progress 39% (0MB)
84 08:59:18.262843 progress 52% (0MB)
85 08:59:18.264717 progress 65% (0MB)
86 08:59:18.266569 progress 78% (0MB)
87 08:59:18.268611 progress 91% (0MB)
88 08:59:18.270613 progress 100% (0MB)
89 08:59:18.276118 0MB downloaded in 0.02s (12.51MB/s)
90 08:59:18.276533 end: 1.3.1 http-download (duration 00:00:00) [common]
92 08:59:18.276941 end: 1.3 download-retry (duration 00:00:00) [common]
93 08:59:18.277083 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 08:59:18.277225 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 08:59:18.277358 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 08:59:18.277482 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 08:59:18.277751 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_
98 08:59:18.277941 makedir: /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin
99 08:59:18.278084 makedir: /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/tests
100 08:59:18.278226 makedir: /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/results
101 08:59:18.278380 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-add-keys
102 08:59:18.278573 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-add-sources
103 08:59:18.278757 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-background-process-start
104 08:59:18.278937 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-background-process-stop
105 08:59:18.279102 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-common-functions
106 08:59:18.279326 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-echo-ipv4
107 08:59:18.279504 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-install-packages
108 08:59:18.279669 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-installed-packages
109 08:59:18.279845 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-os-build
110 08:59:18.280015 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-probe-channel
111 08:59:18.280179 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-probe-ip
112 08:59:18.280364 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-target-ip
113 08:59:18.280537 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-target-mac
114 08:59:18.280711 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-target-storage
115 08:59:18.280885 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-test-case
116 08:59:18.281063 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-test-event
117 08:59:18.281241 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-test-feedback
118 08:59:18.281409 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-test-raise
119 08:59:18.281585 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-test-reference
120 08:59:18.281771 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-test-runner
121 08:59:18.281939 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-test-set
122 08:59:18.282109 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-test-shell
123 08:59:18.282294 Updating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-install-packages (oe)
124 08:59:18.282501 Updating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/bin/lava-installed-packages (oe)
125 08:59:18.282664 Creating /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/environment
126 08:59:18.282823 LAVA metadata
127 08:59:18.282924 - LAVA_JOB_ID=10183679
128 08:59:18.283041 - LAVA_DISPATCHER_IP=192.168.201.1
129 08:59:18.283184 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 08:59:18.283336 skipped lava-vland-overlay
131 08:59:18.283448 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 08:59:18.283577 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 08:59:18.283676 skipped lava-multinode-overlay
134 08:59:18.283784 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 08:59:18.283923 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 08:59:18.284043 Loading test definitions
137 08:59:18.284177 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 08:59:18.284292 Using /lava-10183679 at stage 0
139 08:59:18.284733 uuid=10183679_1.4.2.3.1 testdef=None
140 08:59:18.284859 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 08:59:18.284979 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 08:59:18.285746 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 08:59:18.286103 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 08:59:18.287041 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 08:59:18.287445 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 08:59:18.288378 runner path: /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/0/tests/0_dmesg test_uuid 10183679_1.4.2.3.1
149 08:59:18.288580 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 08:59:18.288942 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 08:59:18.289045 Using /lava-10183679 at stage 1
153 08:59:18.289487 uuid=10183679_1.4.2.3.5 testdef=None
154 08:59:18.289608 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 08:59:18.289743 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 08:59:18.290442 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 08:59:18.290788 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 08:59:18.291798 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 08:59:18.292153 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 08:59:18.293089 runner path: /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/1/tests/1_bootrr test_uuid 10183679_1.4.2.3.5
163 08:59:18.293290 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 08:59:18.293630 Creating lava-test-runner.conf files
166 08:59:18.293722 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/0 for stage 0
167 08:59:18.293857 - 0_dmesg
168 08:59:18.293970 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10183679/lava-overlay-h25s50v_/lava-10183679/1 for stage 1
169 08:59:18.294097 - 1_bootrr
170 08:59:18.294237 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 08:59:18.294359 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 08:59:18.306167 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 08:59:18.306322 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 08:59:18.306451 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 08:59:18.306574 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 08:59:18.306699 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 08:59:18.545197 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 08:59:18.545567 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 08:59:18.545694 extracting modules file /var/lib/lava/dispatcher/tmp/10183679/tftp-deploy-0l72ilq_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10183679/extract-overlay-ramdisk-3hd_wbc9/ramdisk
180 08:59:18.558221 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 08:59:18.558369 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 08:59:18.558466 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10183679/compress-overlay-32ybxav5/overlay-1.4.2.4.tar.gz to ramdisk
183 08:59:18.558542 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10183679/compress-overlay-32ybxav5/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10183679/extract-overlay-ramdisk-3hd_wbc9/ramdisk
184 08:59:18.566430 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 08:59:18.566562 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 08:59:18.566662 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 08:59:18.566815 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 08:59:18.566901 Building ramdisk /var/lib/lava/dispatcher/tmp/10183679/extract-overlay-ramdisk-3hd_wbc9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10183679/extract-overlay-ramdisk-3hd_wbc9/ramdisk
189 08:59:18.695613 >> 49788 blocks
190 08:59:19.536288 rename /var/lib/lava/dispatcher/tmp/10183679/extract-overlay-ramdisk-3hd_wbc9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10183679/tftp-deploy-0l72ilq_/ramdisk/ramdisk.cpio.gz
191 08:59:19.536719 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 08:59:19.536852 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 08:59:19.536951 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 08:59:19.537050 No mkimage arch provided, not using FIT.
195 08:59:19.537140 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 08:59:19.537227 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 08:59:19.537332 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 08:59:19.537424 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 08:59:19.537503 No LXC device requested
200 08:59:19.537585 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 08:59:19.537677 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 08:59:19.537757 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 08:59:19.537831 Checking files for TFTP limit of 4294967296 bytes.
204 08:59:19.538289 end: 1 tftp-deploy (duration 00:00:01) [common]
205 08:59:19.538435 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 08:59:19.538556 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 08:59:19.538720 substitutions:
208 08:59:19.538824 - {DTB}: None
209 08:59:19.538922 - {INITRD}: 10183679/tftp-deploy-0l72ilq_/ramdisk/ramdisk.cpio.gz
210 08:59:19.538983 - {KERNEL}: 10183679/tftp-deploy-0l72ilq_/kernel/bzImage
211 08:59:19.539040 - {LAVA_MAC}: None
212 08:59:19.539097 - {PRESEED_CONFIG}: None
213 08:59:19.539152 - {PRESEED_LOCAL}: None
214 08:59:19.539207 - {RAMDISK}: 10183679/tftp-deploy-0l72ilq_/ramdisk/ramdisk.cpio.gz
215 08:59:19.539288 - {ROOT_PART}: None
216 08:59:19.539359 - {ROOT}: None
217 08:59:19.539414 - {SERVER_IP}: 192.168.201.1
218 08:59:19.539468 - {TEE}: None
219 08:59:19.539522 Parsed boot commands:
220 08:59:19.539576 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 08:59:19.539747 Parsed boot commands: tftpboot 192.168.201.1 10183679/tftp-deploy-0l72ilq_/kernel/bzImage 10183679/tftp-deploy-0l72ilq_/kernel/cmdline 10183679/tftp-deploy-0l72ilq_/ramdisk/ramdisk.cpio.gz
222 08:59:19.539836 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 08:59:19.539922 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 08:59:19.540014 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 08:59:19.540102 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 08:59:19.540238 Not connected, no need to disconnect.
227 08:59:19.540316 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 08:59:19.540399 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 08:59:19.540469 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
230 08:59:19.543989 Setting prompt string to ['lava-test: # ']
231 08:59:19.544395 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 08:59:19.544510 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 08:59:19.544604 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 08:59:19.544693 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 08:59:19.544886 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
236 08:59:24.677997 >> Command sent successfully.
237 08:59:24.680397 Returned 0 in 5 seconds
238 08:59:24.780809 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 08:59:24.781164 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 08:59:24.781302 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 08:59:24.781393 Setting prompt string to 'Starting depthcharge on Voema...'
243 08:59:24.781461 Changing prompt to 'Starting depthcharge on Voema...'
244 08:59:24.781528 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 08:59:24.781781 [Enter `^Ec?' for help]
246 08:59:26.376227
247 08:59:26.376399
248 08:59:26.386661 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 08:59:26.390350 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
250 08:59:26.394143 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 08:59:26.401904 CPU: AES supported, TXT NOT supported, VT supported
252 08:59:26.405618 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 08:59:26.409517 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 08:59:26.416810 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 08:59:26.420774 VBOOT: Loading verstage.
256 08:59:26.424404 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 08:59:26.428360 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 08:59:26.435647 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 08:59:26.442326 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 08:59:26.449789 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 08:59:26.449896
262 08:59:26.449979
263 08:59:26.460941 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 08:59:26.477180 Probing TPM: . done!
265 08:59:26.480297 TPM ready after 0 ms
266 08:59:26.484461 Connected to device vid:did:rid of 1ae0:0028:00
267 08:59:26.495717 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
268 08:59:26.502929 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 08:59:26.587866 Initialized TPM device CR50 revision 0
270 08:59:26.598863 tlcl_send_startup: Startup return code is 0
271 08:59:26.598985 TPM: setup succeeded
272 08:59:26.625012 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 08:59:26.638018 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 08:59:26.648013 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 08:59:26.657955 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 08:59:26.661174 Chrome EC: UHEPI supported
277 08:59:26.664443 Phase 1
278 08:59:26.668042 FMAP: area GBB found @ 1805000 (458752 bytes)
279 08:59:26.677736 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 08:59:26.684203 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 08:59:26.691068 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 08:59:26.697564 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 08:59:26.700717 Recovery requested (1009000e)
284 08:59:26.704379 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 08:59:26.716163 tlcl_extend: response is 0
286 08:59:26.722689 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 08:59:26.732517 tlcl_extend: response is 0
288 08:59:26.739037 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 08:59:26.745604 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 08:59:26.752076 BS: verstage times (exec / console): total (unknown) / 142 ms
291 08:59:26.752260
292 08:59:26.752332
293 08:59:26.765690 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 08:59:26.771957 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 08:59:26.775194 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 08:59:26.778447 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 08:59:26.785339 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 08:59:26.788987 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 08:59:26.792032 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 08:59:26.795260 TCO_STS: 0000 0000
301 08:59:26.798430 GEN_PMCON: d0015038 00002200
302 08:59:26.801696 GBLRST_CAUSE: 00000000 00000000
303 08:59:26.805166 HPR_CAUSE0: 00000000
304 08:59:26.805265 prev_sleep_state 5
305 08:59:26.808200 Boot Count incremented to 17275
306 08:59:26.814865 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 08:59:26.821569 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 08:59:26.831914 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 08:59:26.837878 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 08:59:26.841323 Chrome EC: UHEPI supported
311 08:59:26.848019 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 08:59:26.859726 Probing TPM: done!
313 08:59:26.866344 Connected to device vid:did:rid of 1ae0:0028:00
314 08:59:26.876145 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
315 08:59:26.879797 Initialized TPM device CR50 revision 0
316 08:59:26.894930 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 08:59:26.902028 MRC: Hash idx 0x100b comparison successful.
318 08:59:26.902173 MRC cache found, size faa8
319 08:59:26.905405 bootmode is set to: 2
320 08:59:26.908815 SPD index = 2
321 08:59:26.915135 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 08:59:26.915293 SPD: module type is LPDDR4X
323 08:59:26.922359 SPD: module part number is MT53D1G64D4NW-046
324 08:59:26.929286 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
325 08:59:26.932265 SPD: device width 16 bits, bus width 16 bits
326 08:59:26.935679 SPD: module size is 2048 MB (per channel)
327 08:59:27.366935 CBMEM:
328 08:59:27.370208 IMD: root @ 0x76fff000 254 entries.
329 08:59:27.373893 IMD: root @ 0x76ffec00 62 entries.
330 08:59:27.376940 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 08:59:27.383465 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 08:59:27.387185 External stage cache:
333 08:59:27.390173 IMD: root @ 0x7b3ff000 254 entries.
334 08:59:27.393407 IMD: root @ 0x7b3fec00 62 entries.
335 08:59:27.408274 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 08:59:27.414917 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 08:59:27.421519 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 08:59:27.435183 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 08:59:27.442101 cse_lite: Skip switching to RW in the recovery path
340 08:59:27.442200 8 DIMMs found
341 08:59:27.442269 SMM Memory Map
342 08:59:27.448556 SMRAM : 0x7b000000 0x800000
343 08:59:27.451986 Subregion 0: 0x7b000000 0x200000
344 08:59:27.455392 Subregion 1: 0x7b200000 0x200000
345 08:59:27.458548 Subregion 2: 0x7b400000 0x400000
346 08:59:27.458635 top_of_ram = 0x77000000
347 08:59:27.464959 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 08:59:27.471550 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 08:59:27.475543 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 08:59:27.479577 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 08:59:27.489308 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 08:59:27.495818 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 08:59:27.505766 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 08:59:27.508914 Processing 211 relocs. Offset value of 0x74c0b000
355 08:59:27.517945 BS: romstage times (exec / console): total (unknown) / 277 ms
356 08:59:27.523721
357 08:59:27.523812
358 08:59:27.534134 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 08:59:27.537347 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 08:59:27.547292 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 08:59:27.554046 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 08:59:27.560060 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 08:59:27.566817 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 08:59:27.610526 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 08:59:27.617200 Processing 5008 relocs. Offset value of 0x75d98000
366 08:59:27.620634 BS: postcar times (exec / console): total (unknown) / 59 ms
367 08:59:27.624052
368 08:59:27.624136
369 08:59:27.633792 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 08:59:27.633879 Normal boot
371 08:59:27.637091 FW_CONFIG value is 0x804c02
372 08:59:27.640256 PCI: 00:07.0 disabled by fw_config
373 08:59:27.643483 PCI: 00:07.1 disabled by fw_config
374 08:59:27.646848 PCI: 00:0d.2 disabled by fw_config
375 08:59:27.653595 PCI: 00:1c.7 disabled by fw_config
376 08:59:27.656883 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 08:59:27.663517 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 08:59:27.666641 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 08:59:27.673359 GENERIC: 0.0 disabled by fw_config
380 08:59:27.676743 GENERIC: 1.0 disabled by fw_config
381 08:59:27.679942 fw_config match found: DB_USB=USB3_ACTIVE
382 08:59:27.683544 fw_config match found: DB_USB=USB3_ACTIVE
383 08:59:27.686656 fw_config match found: DB_USB=USB3_ACTIVE
384 08:59:27.693262 fw_config match found: DB_USB=USB3_ACTIVE
385 08:59:27.697161 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 08:59:27.703580 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 08:59:27.713896 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 08:59:27.720161 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 08:59:27.723745 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 08:59:27.730061 microcode: Update skipped, already up-to-date
391 08:59:27.736899 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 08:59:27.764241 Detected 4 core, 8 thread CPU.
393 08:59:27.767544 Setting up SMI for CPU
394 08:59:27.770679 IED base = 0x7b400000
395 08:59:27.774035 IED size = 0x00400000
396 08:59:27.774139 Will perform SMM setup.
397 08:59:27.780593 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
398 08:59:27.787194 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 08:59:27.793807 Processing 16 relocs. Offset value of 0x00030000
400 08:59:27.797252 Attempting to start 7 APs
401 08:59:27.800481 Waiting for 10ms after sending INIT.
402 08:59:27.815935 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 08:59:27.816029 done.
404 08:59:27.819534 AP: slot 4 apic_id 7.
405 08:59:27.822540 AP: slot 5 apic_id 6.
406 08:59:27.822626 AP: slot 6 apic_id 2.
407 08:59:27.825717 AP: slot 2 apic_id 3.
408 08:59:27.829055 AP: slot 3 apic_id 5.
409 08:59:27.832559 Waiting for 2nd SIPI to complete...done.
410 08:59:27.835757 AP: slot 7 apic_id 4.
411 08:59:27.842445 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 08:59:27.848927 Processing 13 relocs. Offset value of 0x00038000
413 08:59:27.852461 Unable to locate Global NVS
414 08:59:27.858827 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 08:59:27.862249 Installing permanent SMM handler to 0x7b000000
416 08:59:27.872364 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 08:59:27.875393 Processing 794 relocs. Offset value of 0x7b010000
418 08:59:27.885228 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 08:59:27.888849 Processing 13 relocs. Offset value of 0x7b008000
420 08:59:27.895471 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 08:59:27.902085 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 08:59:27.908455 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 08:59:27.911746 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 08:59:27.918450 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 08:59:27.924894 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 08:59:27.931827 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 08:59:27.934753 Unable to locate Global NVS
428 08:59:27.941668 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 08:59:27.945079 Clearing SMI status registers
430 08:59:27.948463 SMI_STS: PM1
431 08:59:27.948632 PM1_STS: PWRBTN
432 08:59:27.955060 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 08:59:27.958171 In relocation handler: CPU 0
434 08:59:27.961305 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 08:59:27.967645 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 08:59:27.971307 Relocation complete.
437 08:59:27.978240 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 08:59:27.981212 In relocation handler: CPU 1
439 08:59:27.984416 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 08:59:27.987513 Relocation complete.
441 08:59:27.994311 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
442 08:59:27.997868 In relocation handler: CPU 5
443 08:59:28.000671 New SMBASE=0x7affec00 IEDBASE=0x7b400000
444 08:59:28.004100 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 08:59:28.007537 Relocation complete.
446 08:59:28.014103 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
447 08:59:28.017486 In relocation handler: CPU 4
448 08:59:28.020813 New SMBASE=0x7afff000 IEDBASE=0x7b400000
449 08:59:28.024196 Relocation complete.
450 08:59:28.030887 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
451 08:59:28.034274 In relocation handler: CPU 7
452 08:59:28.037787 New SMBASE=0x7affe400 IEDBASE=0x7b400000
453 08:59:28.043923 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 08:59:28.047406 Relocation complete.
455 08:59:28.054366 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
456 08:59:28.057519 In relocation handler: CPU 3
457 08:59:28.060804 New SMBASE=0x7afff400 IEDBASE=0x7b400000
458 08:59:28.063861 Relocation complete.
459 08:59:28.070718 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
460 08:59:28.073768 In relocation handler: CPU 2
461 08:59:28.077379 New SMBASE=0x7afff800 IEDBASE=0x7b400000
462 08:59:28.080422 Relocation complete.
463 08:59:28.087041 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
464 08:59:28.090426 In relocation handler: CPU 6
465 08:59:28.093600 New SMBASE=0x7affe800 IEDBASE=0x7b400000
466 08:59:28.097015 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 08:59:28.100041 Relocation complete.
468 08:59:28.103316 Initializing CPU #0
469 08:59:28.106646 CPU: vendor Intel device 806c1
470 08:59:28.110189 CPU: family 06, model 8c, stepping 01
471 08:59:28.113123 Clearing out pending MCEs
472 08:59:28.113569 Setting up local APIC...
473 08:59:28.116886 apic_id: 0x00 done.
474 08:59:28.120388 Turbo is available but hidden
475 08:59:28.123316 Turbo is available and visible
476 08:59:28.126921 microcode: Update skipped, already up-to-date
477 08:59:28.129934 CPU #0 initialized
478 08:59:28.133314 Initializing CPU #2
479 08:59:28.133870 Initializing CPU #6
480 08:59:28.136430 CPU: vendor Intel device 806c1
481 08:59:28.140087 CPU: family 06, model 8c, stepping 01
482 08:59:28.143413 CPU: vendor Intel device 806c1
483 08:59:28.147011 CPU: family 06, model 8c, stepping 01
484 08:59:28.150722 Clearing out pending MCEs
485 08:59:28.154029 Clearing out pending MCEs
486 08:59:28.154581 Initializing CPU #7
487 08:59:28.157246 Initializing CPU #5
488 08:59:28.160320 Initializing CPU #4
489 08:59:28.163460 CPU: vendor Intel device 806c1
490 08:59:28.167245 CPU: family 06, model 8c, stepping 01
491 08:59:28.170550 CPU: vendor Intel device 806c1
492 08:59:28.173818 CPU: family 06, model 8c, stepping 01
493 08:59:28.177302 Clearing out pending MCEs
494 08:59:28.177858 Clearing out pending MCEs
495 08:59:28.180332 Setting up local APIC...
496 08:59:28.183203 Setting up local APIC...
497 08:59:28.186714 CPU: vendor Intel device 806c1
498 08:59:28.189998 CPU: family 06, model 8c, stepping 01
499 08:59:28.193689 Initializing CPU #3
500 08:59:28.196634 Clearing out pending MCEs
501 08:59:28.197174 CPU: vendor Intel device 806c1
502 08:59:28.203415 CPU: family 06, model 8c, stepping 01
503 08:59:28.203970 Setting up local APIC...
504 08:59:28.206638 Setting up local APIC...
505 08:59:28.209702 apic_id: 0x04 done.
506 08:59:28.213006 Clearing out pending MCEs
507 08:59:28.216703 microcode: Update skipped, already up-to-date
508 08:59:28.219745 Setting up local APIC...
509 08:59:28.220195 apic_id: 0x06 done.
510 08:59:28.223013 Setting up local APIC...
511 08:59:28.226563 Initializing CPU #1
512 08:59:28.227180 apic_id: 0x05 done.
513 08:59:28.229782 CPU #7 initialized
514 08:59:28.233103 microcode: Update skipped, already up-to-date
515 08:59:28.236731 CPU: vendor Intel device 806c1
516 08:59:28.239579 CPU: family 06, model 8c, stepping 01
517 08:59:28.245998 microcode: Update skipped, already up-to-date
518 08:59:28.249647 apic_id: 0x07 done.
519 08:59:28.250195 CPU #5 initialized
520 08:59:28.256435 microcode: Update skipped, already up-to-date
521 08:59:28.256988 CPU #3 initialized
522 08:59:28.259541 Clearing out pending MCEs
523 08:59:28.262928 apic_id: 0x03 done.
524 08:59:28.263513 apic_id: 0x02 done.
525 08:59:28.269446 microcode: Update skipped, already up-to-date
526 08:59:28.270013 CPU #4 initialized
527 08:59:28.276008 microcode: Update skipped, already up-to-date
528 08:59:28.276570 CPU #2 initialized
529 08:59:28.279348 CPU #6 initialized
530 08:59:28.282347 Setting up local APIC...
531 08:59:28.282788 apic_id: 0x01 done.
532 08:59:28.289270 microcode: Update skipped, already up-to-date
533 08:59:28.289822 CPU #1 initialized
534 08:59:28.296045 bsp_do_flight_plan done after 456 msecs.
535 08:59:28.296600 CPU: frequency set to 4400 MHz
536 08:59:28.299141 Enabling SMIs.
537 08:59:28.305768 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 08:59:28.321464 SATAXPCIE1 indicates PCIe NVMe is present
539 08:59:28.324535 Probing TPM: done!
540 08:59:28.328233 Connected to device vid:did:rid of 1ae0:0028:00
541 08:59:28.338719 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
542 08:59:28.341919 Initialized TPM device CR50 revision 0
543 08:59:28.345023 Enabling S0i3.4
544 08:59:28.351776 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 08:59:28.355213 Found a VBT of 8704 bytes after decompression
546 08:59:28.362037 cse_lite: CSE RO boot. HybridStorageMode disabled
547 08:59:28.368245 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 08:59:28.443982 FSPS returned 0
549 08:59:28.447588 Executing Phase 1 of FspMultiPhaseSiInit
550 08:59:28.457427 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 08:59:28.460709 port C0 DISC req: usage 1 usb3 1 usb2 5
552 08:59:28.464017 Raw Buffer output 0 00000511
553 08:59:28.467486 Raw Buffer output 1 00000000
554 08:59:28.471078 pmc_send_ipc_cmd succeeded
555 08:59:28.477545 port C1 DISC req: usage 1 usb3 2 usb2 3
556 08:59:28.478090 Raw Buffer output 0 00000321
557 08:59:28.481303 Raw Buffer output 1 00000000
558 08:59:28.485186 pmc_send_ipc_cmd succeeded
559 08:59:28.490334 Detected 4 core, 8 thread CPU.
560 08:59:28.493457 Detected 4 core, 8 thread CPU.
561 08:59:28.693439 Display FSP Version Info HOB
562 08:59:28.696444 Reference Code - CPU = a.0.4c.31
563 08:59:28.699776 uCode Version = 0.0.0.86
564 08:59:28.702945 TXT ACM version = ff.ff.ff.ffff
565 08:59:28.706681 Reference Code - ME = a.0.4c.31
566 08:59:28.709992 MEBx version = 0.0.0.0
567 08:59:28.713107 ME Firmware Version = Consumer SKU
568 08:59:28.716518 Reference Code - PCH = a.0.4c.31
569 08:59:28.719347 PCH-CRID Status = Disabled
570 08:59:28.722728 PCH-CRID Original Value = ff.ff.ff.ffff
571 08:59:28.726901 PCH-CRID New Value = ff.ff.ff.ffff
572 08:59:28.730534 OPROM - RST - RAID = ff.ff.ff.ffff
573 08:59:28.733812 PCH Hsio Version = 4.0.0.0
574 08:59:28.737499 Reference Code - SA - System Agent = a.0.4c.31
575 08:59:28.740530 Reference Code - MRC = 2.0.0.1
576 08:59:28.744334 SA - PCIe Version = a.0.4c.31
577 08:59:28.747912 SA-CRID Status = Disabled
578 08:59:28.751118 SA-CRID Original Value = 0.0.0.1
579 08:59:28.751678 SA-CRID New Value = 0.0.0.1
580 08:59:28.754227 OPROM - VBIOS = ff.ff.ff.ffff
581 08:59:28.760693 IO Manageability Engine FW Version = 11.1.4.0
582 08:59:28.763828 PHY Build Version = 0.0.0.e0
583 08:59:28.767342 Thunderbolt(TM) FW Version = 0.0.0.0
584 08:59:28.773883 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 08:59:28.774324 ITSS IRQ Polarities Before:
586 08:59:28.777361 IPC0: 0xffffffff
587 08:59:28.780424 IPC1: 0xffffffff
588 08:59:28.780862 IPC2: 0xffffffff
589 08:59:28.783858 IPC3: 0xffffffff
590 08:59:28.784166 ITSS IRQ Polarities After:
591 08:59:28.787212 IPC0: 0xffffffff
592 08:59:28.787659 IPC1: 0xffffffff
593 08:59:28.790606 IPC2: 0xffffffff
594 08:59:28.794045 IPC3: 0xffffffff
595 08:59:28.797142 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 08:59:28.807380 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 08:59:28.820436 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 08:59:28.833990 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 08:59:28.840143 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
600 08:59:28.840666 Enumerating buses...
601 08:59:28.847323 Show all devs... Before device enumeration.
602 08:59:28.847873 Root Device: enabled 1
603 08:59:28.850635 DOMAIN: 0000: enabled 1
604 08:59:28.853606 CPU_CLUSTER: 0: enabled 1
605 08:59:28.856672 PCI: 00:00.0: enabled 1
606 08:59:28.857117 PCI: 00:02.0: enabled 1
607 08:59:28.860465 PCI: 00:04.0: enabled 1
608 08:59:28.863548 PCI: 00:05.0: enabled 1
609 08:59:28.866887 PCI: 00:06.0: enabled 0
610 08:59:28.867473 PCI: 00:07.0: enabled 0
611 08:59:28.870027 PCI: 00:07.1: enabled 0
612 08:59:28.873348 PCI: 00:07.2: enabled 0
613 08:59:28.873790 PCI: 00:07.3: enabled 0
614 08:59:28.876574 PCI: 00:08.0: enabled 1
615 08:59:28.879912 PCI: 00:09.0: enabled 0
616 08:59:28.883021 PCI: 00:0a.0: enabled 0
617 08:59:28.883515 PCI: 00:0d.0: enabled 1
618 08:59:28.887008 PCI: 00:0d.1: enabled 0
619 08:59:28.889924 PCI: 00:0d.2: enabled 0
620 08:59:28.893360 PCI: 00:0d.3: enabled 0
621 08:59:28.893800 PCI: 00:0e.0: enabled 0
622 08:59:28.896813 PCI: 00:10.2: enabled 1
623 08:59:28.900083 PCI: 00:10.6: enabled 0
624 08:59:28.903180 PCI: 00:10.7: enabled 0
625 08:59:28.903761 PCI: 00:12.0: enabled 0
626 08:59:28.907018 PCI: 00:12.6: enabled 0
627 08:59:28.909637 PCI: 00:13.0: enabled 0
628 08:59:28.913099 PCI: 00:14.0: enabled 1
629 08:59:28.913542 PCI: 00:14.1: enabled 0
630 08:59:28.916618 PCI: 00:14.2: enabled 1
631 08:59:28.920173 PCI: 00:14.3: enabled 1
632 08:59:28.920718 PCI: 00:15.0: enabled 1
633 08:59:28.923214 PCI: 00:15.1: enabled 1
634 08:59:28.926258 PCI: 00:15.2: enabled 1
635 08:59:28.929772 PCI: 00:15.3: enabled 1
636 08:59:28.930207 PCI: 00:16.0: enabled 1
637 08:59:28.932789 PCI: 00:16.1: enabled 0
638 08:59:28.936429 PCI: 00:16.2: enabled 0
639 08:59:28.940060 PCI: 00:16.3: enabled 0
640 08:59:28.940596 PCI: 00:16.4: enabled 0
641 08:59:28.943320 PCI: 00:16.5: enabled 0
642 08:59:28.946280 PCI: 00:17.0: enabled 1
643 08:59:28.949562 PCI: 00:19.0: enabled 0
644 08:59:28.950007 PCI: 00:19.1: enabled 1
645 08:59:28.952810 PCI: 00:19.2: enabled 0
646 08:59:28.956102 PCI: 00:1c.0: enabled 1
647 08:59:28.956541 PCI: 00:1c.1: enabled 0
648 08:59:28.960146 PCI: 00:1c.2: enabled 0
649 08:59:28.962878 PCI: 00:1c.3: enabled 0
650 08:59:28.966116 PCI: 00:1c.4: enabled 0
651 08:59:28.966572 PCI: 00:1c.5: enabled 0
652 08:59:28.969445 PCI: 00:1c.6: enabled 1
653 08:59:28.972683 PCI: 00:1c.7: enabled 0
654 08:59:28.976231 PCI: 00:1d.0: enabled 1
655 08:59:28.976669 PCI: 00:1d.1: enabled 0
656 08:59:28.979784 PCI: 00:1d.2: enabled 1
657 08:59:28.982661 PCI: 00:1d.3: enabled 0
658 08:59:28.985915 PCI: 00:1e.0: enabled 1
659 08:59:28.986352 PCI: 00:1e.1: enabled 0
660 08:59:28.989386 PCI: 00:1e.2: enabled 1
661 08:59:28.992991 PCI: 00:1e.3: enabled 1
662 08:59:28.996764 PCI: 00:1f.0: enabled 1
663 08:59:28.997208 PCI: 00:1f.1: enabled 0
664 08:59:28.999475 PCI: 00:1f.2: enabled 1
665 08:59:29.002676 PCI: 00:1f.3: enabled 1
666 08:59:29.003227 PCI: 00:1f.4: enabled 0
667 08:59:29.006146 PCI: 00:1f.5: enabled 1
668 08:59:29.009127 PCI: 00:1f.6: enabled 0
669 08:59:29.012494 PCI: 00:1f.7: enabled 0
670 08:59:29.012942 APIC: 00: enabled 1
671 08:59:29.016066 GENERIC: 0.0: enabled 1
672 08:59:29.019053 GENERIC: 0.0: enabled 1
673 08:59:29.021958 GENERIC: 1.0: enabled 1
674 08:59:29.022051 GENERIC: 0.0: enabled 1
675 08:59:29.025663 GENERIC: 1.0: enabled 1
676 08:59:29.028978 USB0 port 0: enabled 1
677 08:59:29.029147 GENERIC: 0.0: enabled 1
678 08:59:29.032710 USB0 port 0: enabled 1
679 08:59:29.035619 GENERIC: 0.0: enabled 1
680 08:59:29.038637 I2C: 00:1a: enabled 1
681 08:59:29.038750 I2C: 00:31: enabled 1
682 08:59:29.042292 I2C: 00:32: enabled 1
683 08:59:29.045427 I2C: 00:10: enabled 1
684 08:59:29.045518 I2C: 00:15: enabled 1
685 08:59:29.049214 GENERIC: 0.0: enabled 0
686 08:59:29.052252 GENERIC: 1.0: enabled 0
687 08:59:29.052381 GENERIC: 0.0: enabled 1
688 08:59:29.055437 SPI: 00: enabled 1
689 08:59:29.059211 SPI: 00: enabled 1
690 08:59:29.059823 PNP: 0c09.0: enabled 1
691 08:59:29.062442 GENERIC: 0.0: enabled 1
692 08:59:29.065669 USB3 port 0: enabled 1
693 08:59:29.066118 USB3 port 1: enabled 1
694 08:59:29.069017 USB3 port 2: enabled 0
695 08:59:29.071842 USB3 port 3: enabled 0
696 08:59:29.075191 USB2 port 0: enabled 0
697 08:59:29.075285 USB2 port 1: enabled 1
698 08:59:29.078707 USB2 port 2: enabled 1
699 08:59:29.081835 USB2 port 3: enabled 0
700 08:59:29.081915 USB2 port 4: enabled 1
701 08:59:29.085189 USB2 port 5: enabled 0
702 08:59:29.088810 USB2 port 6: enabled 0
703 08:59:29.091927 USB2 port 7: enabled 0
704 08:59:29.092005 USB2 port 8: enabled 0
705 08:59:29.095116 USB2 port 9: enabled 0
706 08:59:29.098338 USB3 port 0: enabled 0
707 08:59:29.098414 USB3 port 1: enabled 1
708 08:59:29.102063 USB3 port 2: enabled 0
709 08:59:29.104783 USB3 port 3: enabled 0
710 08:59:29.108359 GENERIC: 0.0: enabled 1
711 08:59:29.108449 GENERIC: 1.0: enabled 1
712 08:59:29.111685 APIC: 01: enabled 1
713 08:59:29.115109 APIC: 03: enabled 1
714 08:59:29.115201 APIC: 05: enabled 1
715 08:59:29.118243 APIC: 07: enabled 1
716 08:59:29.118326 APIC: 06: enabled 1
717 08:59:29.121543 APIC: 02: enabled 1
718 08:59:29.124790 APIC: 04: enabled 1
719 08:59:29.124878 Compare with tree...
720 08:59:29.128030 Root Device: enabled 1
721 08:59:29.131588 DOMAIN: 0000: enabled 1
722 08:59:29.134819 PCI: 00:00.0: enabled 1
723 08:59:29.134895 PCI: 00:02.0: enabled 1
724 08:59:29.138282 PCI: 00:04.0: enabled 1
725 08:59:29.141373 GENERIC: 0.0: enabled 1
726 08:59:29.144726 PCI: 00:05.0: enabled 1
727 08:59:29.148010 PCI: 00:06.0: enabled 0
728 08:59:29.148085 PCI: 00:07.0: enabled 0
729 08:59:29.151243 GENERIC: 0.0: enabled 1
730 08:59:29.154710 PCI: 00:07.1: enabled 0
731 08:59:29.158179 GENERIC: 1.0: enabled 1
732 08:59:29.161174 PCI: 00:07.2: enabled 0
733 08:59:29.161251 GENERIC: 0.0: enabled 1
734 08:59:29.164707 PCI: 00:07.3: enabled 0
735 08:59:29.167943 GENERIC: 1.0: enabled 1
736 08:59:29.171201 PCI: 00:08.0: enabled 1
737 08:59:29.174437 PCI: 00:09.0: enabled 0
738 08:59:29.174523 PCI: 00:0a.0: enabled 0
739 08:59:29.177792 PCI: 00:0d.0: enabled 1
740 08:59:29.181158 USB0 port 0: enabled 1
741 08:59:29.184377 USB3 port 0: enabled 1
742 08:59:29.188106 USB3 port 1: enabled 1
743 08:59:29.191167 USB3 port 2: enabled 0
744 08:59:29.191277 USB3 port 3: enabled 0
745 08:59:29.194410 PCI: 00:0d.1: enabled 0
746 08:59:29.198001 PCI: 00:0d.2: enabled 0
747 08:59:29.201172 GENERIC: 0.0: enabled 1
748 08:59:29.204378 PCI: 00:0d.3: enabled 0
749 08:59:29.204516 PCI: 00:0e.0: enabled 0
750 08:59:29.207676 PCI: 00:10.2: enabled 1
751 08:59:29.210920 PCI: 00:10.6: enabled 0
752 08:59:29.214138 PCI: 00:10.7: enabled 0
753 08:59:29.217591 PCI: 00:12.0: enabled 0
754 08:59:29.217798 PCI: 00:12.6: enabled 0
755 08:59:29.220848 PCI: 00:13.0: enabled 0
756 08:59:29.224313 PCI: 00:14.0: enabled 1
757 08:59:29.227532 USB0 port 0: enabled 1
758 08:59:29.231140 USB2 port 0: enabled 0
759 08:59:29.231408 USB2 port 1: enabled 1
760 08:59:29.234201 USB2 port 2: enabled 1
761 08:59:29.237594 USB2 port 3: enabled 0
762 08:59:29.240841 USB2 port 4: enabled 1
763 08:59:29.244656 USB2 port 5: enabled 0
764 08:59:29.247697 USB2 port 6: enabled 0
765 08:59:29.247782 USB2 port 7: enabled 0
766 08:59:29.250351 USB2 port 8: enabled 0
767 08:59:29.253787 USB2 port 9: enabled 0
768 08:59:29.257471 USB3 port 0: enabled 0
769 08:59:29.260657 USB3 port 1: enabled 1
770 08:59:29.260743 USB3 port 2: enabled 0
771 08:59:29.263973 USB3 port 3: enabled 0
772 08:59:29.267250 PCI: 00:14.1: enabled 0
773 08:59:29.270531 PCI: 00:14.2: enabled 1
774 08:59:29.274245 PCI: 00:14.3: enabled 1
775 08:59:29.277002 GENERIC: 0.0: enabled 1
776 08:59:29.277074 PCI: 00:15.0: enabled 1
777 08:59:29.280379 I2C: 00:1a: enabled 1
778 08:59:29.283616 I2C: 00:31: enabled 1
779 08:59:29.287229 I2C: 00:32: enabled 1
780 08:59:29.287325 PCI: 00:15.1: enabled 1
781 08:59:29.290385 I2C: 00:10: enabled 1
782 08:59:29.293977 PCI: 00:15.2: enabled 1
783 08:59:29.296865 PCI: 00:15.3: enabled 1
784 08:59:29.299985 PCI: 00:16.0: enabled 1
785 08:59:29.300096 PCI: 00:16.1: enabled 0
786 08:59:29.303754 PCI: 00:16.2: enabled 0
787 08:59:29.306670 PCI: 00:16.3: enabled 0
788 08:59:29.310170 PCI: 00:16.4: enabled 0
789 08:59:29.313454 PCI: 00:16.5: enabled 0
790 08:59:29.313528 PCI: 00:17.0: enabled 1
791 08:59:29.316880 PCI: 00:19.0: enabled 0
792 08:59:29.320000 PCI: 00:19.1: enabled 1
793 08:59:29.323273 I2C: 00:15: enabled 1
794 08:59:29.326965 PCI: 00:19.2: enabled 0
795 08:59:29.327040 PCI: 00:1d.0: enabled 1
796 08:59:29.330109 GENERIC: 0.0: enabled 1
797 08:59:29.333221 PCI: 00:1e.0: enabled 1
798 08:59:29.383105 PCI: 00:1e.1: enabled 0
799 08:59:29.383225 PCI: 00:1e.2: enabled 1
800 08:59:29.383321 SPI: 00: enabled 1
801 08:59:29.383589 PCI: 00:1e.3: enabled 1
802 08:59:29.383674 SPI: 00: enabled 1
803 08:59:29.383958 PCI: 00:1f.0: enabled 1
804 08:59:29.384042 PNP: 0c09.0: enabled 1
805 08:59:29.384127 PCI: 00:1f.1: enabled 0
806 08:59:29.384202 PCI: 00:1f.2: enabled 1
807 08:59:29.384274 GENERIC: 0.0: enabled 1
808 08:59:29.384375 GENERIC: 0.0: enabled 1
809 08:59:29.384451 GENERIC: 1.0: enabled 1
810 08:59:29.384525 PCI: 00:1f.3: enabled 1
811 08:59:29.384595 PCI: 00:1f.4: enabled 0
812 08:59:29.384664 PCI: 00:1f.5: enabled 1
813 08:59:29.384926 PCI: 00:1f.6: enabled 0
814 08:59:29.385003 PCI: 00:1f.7: enabled 0
815 08:59:29.385086 CPU_CLUSTER: 0: enabled 1
816 08:59:29.385160 APIC: 00: enabled 1
817 08:59:29.385229 APIC: 01: enabled 1
818 08:59:29.435235 APIC: 03: enabled 1
819 08:59:29.435738 APIC: 05: enabled 1
820 08:59:29.436489 APIC: 07: enabled 1
821 08:59:29.437274 APIC: 06: enabled 1
822 08:59:29.438014 APIC: 02: enabled 1
823 08:59:29.438503 APIC: 04: enabled 1
824 08:59:29.438966 Root Device scanning...
825 08:59:29.439666 scan_static_bus for Root Device
826 08:59:29.440212 DOMAIN: 0000 enabled
827 08:59:29.440960 CPU_CLUSTER: 0 enabled
828 08:59:29.441720 DOMAIN: 0000 scanning...
829 08:59:29.442243 PCI: pci_scan_bus for bus 00
830 08:59:29.442701 PCI: 00:00.0 [8086/0000] ops
831 08:59:29.443152 PCI: 00:00.0 [8086/9a12] enabled
832 08:59:29.443752 PCI: 00:02.0 [8086/0000] bus ops
833 08:59:29.444477 PCI: 00:02.0 [8086/9a40] enabled
834 08:59:29.445066 PCI: 00:04.0 [8086/0000] bus ops
835 08:59:29.445731 PCI: 00:04.0 [8086/9a03] enabled
836 08:59:29.485475 PCI: 00:05.0 [8086/9a19] enabled
837 08:59:29.485966 PCI: 00:07.0 [0000/0000] hidden
838 08:59:29.486533 PCI: 00:08.0 [8086/9a11] enabled
839 08:59:29.486812 PCI: 00:0a.0 [8086/9a0d] disabled
840 08:59:29.487059 PCI: 00:0d.0 [8086/0000] bus ops
841 08:59:29.487330 PCI: 00:0d.0 [8086/9a13] enabled
842 08:59:29.487574 PCI: 00:14.0 [8086/0000] bus ops
843 08:59:29.487747 PCI: 00:14.0 [8086/a0ed] enabled
844 08:59:29.487915 PCI: 00:14.2 [8086/a0ef] enabled
845 08:59:29.488137 PCI: 00:14.3 [8086/0000] bus ops
846 08:59:29.488347 PCI: 00:14.3 [8086/a0f0] enabled
847 08:59:29.488542 PCI: 00:15.0 [8086/0000] bus ops
848 08:59:29.488731 PCI: 00:15.0 [8086/a0e8] enabled
849 08:59:29.488903 PCI: 00:15.1 [8086/0000] bus ops
850 08:59:29.489084 PCI: 00:15.1 [8086/a0e9] enabled
851 08:59:29.494535 PCI: 00:15.2 [8086/0000] bus ops
852 08:59:29.494783 PCI: 00:15.2 [8086/a0ea] enabled
853 08:59:29.498343 PCI: 00:15.3 [8086/0000] bus ops
854 08:59:29.498642 PCI: 00:15.3 [8086/a0eb] enabled
855 08:59:29.501463 PCI: 00:16.0 [8086/0000] ops
856 08:59:29.504449 PCI: 00:16.0 [8086/a0e0] enabled
857 08:59:29.510877 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 08:59:29.514272 PCI: 00:19.0 [8086/0000] bus ops
859 08:59:29.517710 PCI: 00:19.0 [8086/a0c5] disabled
860 08:59:29.521188 PCI: 00:19.1 [8086/0000] bus ops
861 08:59:29.524241 PCI: 00:19.1 [8086/a0c6] enabled
862 08:59:29.527855 PCI: 00:1d.0 [8086/0000] bus ops
863 08:59:29.530924 PCI: 00:1d.0 [8086/a0b0] enabled
864 08:59:29.534432 PCI: 00:1e.0 [8086/0000] ops
865 08:59:29.537510 PCI: 00:1e.0 [8086/a0a8] enabled
866 08:59:29.540946 PCI: 00:1e.2 [8086/0000] bus ops
867 08:59:29.544459 PCI: 00:1e.2 [8086/a0aa] enabled
868 08:59:29.547340 PCI: 00:1e.3 [8086/0000] bus ops
869 08:59:29.550608 PCI: 00:1e.3 [8086/a0ab] enabled
870 08:59:29.554010 PCI: 00:1f.0 [8086/0000] bus ops
871 08:59:29.557246 PCI: 00:1f.0 [8086/a087] enabled
872 08:59:29.557323 RTC Init
873 08:59:29.560954 Set power on after power failure.
874 08:59:29.563673 Disabling Deep S3
875 08:59:29.567036 Disabling Deep S3
876 08:59:29.567121 Disabling Deep S4
877 08:59:29.570750 Disabling Deep S4
878 08:59:29.570865 Disabling Deep S5
879 08:59:29.573734 Disabling Deep S5
880 08:59:29.577166 PCI: 00:1f.2 [0000/0000] hidden
881 08:59:29.580558 PCI: 00:1f.3 [8086/0000] bus ops
882 08:59:29.583541 PCI: 00:1f.3 [8086/a0c8] enabled
883 08:59:29.586970 PCI: 00:1f.5 [8086/0000] bus ops
884 08:59:29.590602 PCI: 00:1f.5 [8086/a0a4] enabled
885 08:59:29.593579 PCI: Leftover static devices:
886 08:59:29.593660 PCI: 00:10.2
887 08:59:29.597296 PCI: 00:10.6
888 08:59:29.597376 PCI: 00:10.7
889 08:59:29.597443 PCI: 00:06.0
890 08:59:29.600255 PCI: 00:07.1
891 08:59:29.600357 PCI: 00:07.2
892 08:59:29.603906 PCI: 00:07.3
893 08:59:29.604002 PCI: 00:09.0
894 08:59:29.604082 PCI: 00:0d.1
895 08:59:29.606833 PCI: 00:0d.2
896 08:59:29.606937 PCI: 00:0d.3
897 08:59:29.610428 PCI: 00:0e.0
898 08:59:29.610530 PCI: 00:12.0
899 08:59:29.610616 PCI: 00:12.6
900 08:59:29.613581 PCI: 00:13.0
901 08:59:29.613687 PCI: 00:14.1
902 08:59:29.616819 PCI: 00:16.1
903 08:59:29.616943 PCI: 00:16.2
904 08:59:29.620242 PCI: 00:16.3
905 08:59:29.620368 PCI: 00:16.4
906 08:59:29.620471 PCI: 00:16.5
907 08:59:29.623511 PCI: 00:17.0
908 08:59:29.623662 PCI: 00:19.2
909 08:59:29.626723 PCI: 00:1e.1
910 08:59:29.626863 PCI: 00:1f.1
911 08:59:29.626977 PCI: 00:1f.4
912 08:59:29.629910 PCI: 00:1f.6
913 08:59:29.630044 PCI: 00:1f.7
914 08:59:29.633524 PCI: Check your devicetree.cb.
915 08:59:29.636626 PCI: 00:02.0 scanning...
916 08:59:29.639798 scan_generic_bus for PCI: 00:02.0
917 08:59:29.643197 scan_generic_bus for PCI: 00:02.0 done
918 08:59:29.649947 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 08:59:29.650115 PCI: 00:04.0 scanning...
920 08:59:29.656637 scan_generic_bus for PCI: 00:04.0
921 08:59:29.656727 GENERIC: 0.0 enabled
922 08:59:29.663066 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 08:59:29.666557 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 08:59:29.669909 PCI: 00:0d.0 scanning...
925 08:59:29.673432 scan_static_bus for PCI: 00:0d.0
926 08:59:29.676406 USB0 port 0 enabled
927 08:59:29.680069 USB0 port 0 scanning...
928 08:59:29.683059 scan_static_bus for USB0 port 0
929 08:59:29.683146 USB3 port 0 enabled
930 08:59:29.686037 USB3 port 1 enabled
931 08:59:29.689912 USB3 port 2 disabled
932 08:59:29.690024 USB3 port 3 disabled
933 08:59:29.693087 USB3 port 0 scanning...
934 08:59:29.696235 scan_static_bus for USB3 port 0
935 08:59:29.699874 scan_static_bus for USB3 port 0 done
936 08:59:29.706213 scan_bus: bus USB3 port 0 finished in 6 msecs
937 08:59:29.706413 USB3 port 1 scanning...
938 08:59:29.709527 scan_static_bus for USB3 port 1
939 08:59:29.713014 scan_static_bus for USB3 port 1 done
940 08:59:29.719642 scan_bus: bus USB3 port 1 finished in 6 msecs
941 08:59:29.722770 scan_static_bus for USB0 port 0 done
942 08:59:29.726243 scan_bus: bus USB0 port 0 finished in 43 msecs
943 08:59:29.732695 scan_static_bus for PCI: 00:0d.0 done
944 08:59:29.736303 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 08:59:29.739196 PCI: 00:14.0 scanning...
946 08:59:29.742870 scan_static_bus for PCI: 00:14.0
947 08:59:29.743172 USB0 port 0 enabled
948 08:59:29.745927 USB0 port 0 scanning...
949 08:59:29.749276 scan_static_bus for USB0 port 0
950 08:59:29.752669 USB2 port 0 disabled
951 08:59:29.752955 USB2 port 1 enabled
952 08:59:29.755989 USB2 port 2 enabled
953 08:59:29.759153 USB2 port 3 disabled
954 08:59:29.759466 USB2 port 4 enabled
955 08:59:29.762692 USB2 port 5 disabled
956 08:59:29.765770 USB2 port 6 disabled
957 08:59:29.765956 USB2 port 7 disabled
958 08:59:29.769064 USB2 port 8 disabled
959 08:59:29.772737 USB2 port 9 disabled
960 08:59:29.772917 USB3 port 0 disabled
961 08:59:29.776087 USB3 port 1 enabled
962 08:59:29.779004 USB3 port 2 disabled
963 08:59:29.779289 USB3 port 3 disabled
964 08:59:29.782295 USB2 port 1 scanning...
965 08:59:29.785878 scan_static_bus for USB2 port 1
966 08:59:29.789038 scan_static_bus for USB2 port 1 done
967 08:59:29.792214 scan_bus: bus USB2 port 1 finished in 6 msecs
968 08:59:29.795414 USB2 port 2 scanning...
969 08:59:29.798919 scan_static_bus for USB2 port 2
970 08:59:29.802580 scan_static_bus for USB2 port 2 done
971 08:59:29.808668 scan_bus: bus USB2 port 2 finished in 6 msecs
972 08:59:29.812333 USB2 port 4 scanning...
973 08:59:29.815392 scan_static_bus for USB2 port 4
974 08:59:29.818859 scan_static_bus for USB2 port 4 done
975 08:59:29.821983 scan_bus: bus USB2 port 4 finished in 6 msecs
976 08:59:29.825664 USB3 port 1 scanning...
977 08:59:29.828928 scan_static_bus for USB3 port 1
978 08:59:29.832129 scan_static_bus for USB3 port 1 done
979 08:59:29.835312 scan_bus: bus USB3 port 1 finished in 6 msecs
980 08:59:29.838813 scan_static_bus for USB0 port 0 done
981 08:59:29.845309 scan_bus: bus USB0 port 0 finished in 93 msecs
982 08:59:29.848759 scan_static_bus for PCI: 00:14.0 done
983 08:59:29.851904 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
984 08:59:29.855482 PCI: 00:14.3 scanning...
985 08:59:29.858598 scan_static_bus for PCI: 00:14.3
986 08:59:29.862113 GENERIC: 0.0 enabled
987 08:59:29.865515 scan_static_bus for PCI: 00:14.3 done
988 08:59:29.871831 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 08:59:29.872235 PCI: 00:15.0 scanning...
990 08:59:29.875701 scan_static_bus for PCI: 00:15.0
991 08:59:29.878551 I2C: 00:1a enabled
992 08:59:29.881382 I2C: 00:31 enabled
993 08:59:29.881620 I2C: 00:32 enabled
994 08:59:29.884937 scan_static_bus for PCI: 00:15.0 done
995 08:59:29.891652 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 08:59:29.894798 PCI: 00:15.1 scanning...
997 08:59:29.898215 scan_static_bus for PCI: 00:15.1
998 08:59:29.898301 I2C: 00:10 enabled
999 08:59:29.901306 scan_static_bus for PCI: 00:15.1 done
1000 08:59:29.907873 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 08:59:29.911332 PCI: 00:15.2 scanning...
1002 08:59:29.915083 scan_static_bus for PCI: 00:15.2
1003 08:59:29.917987 scan_static_bus for PCI: 00:15.2 done
1004 08:59:29.921334 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 08:59:29.924541 PCI: 00:15.3 scanning...
1006 08:59:29.927552 scan_static_bus for PCI: 00:15.3
1007 08:59:29.931137 scan_static_bus for PCI: 00:15.3 done
1008 08:59:29.937428 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 08:59:29.937528 PCI: 00:19.1 scanning...
1010 08:59:29.940859 scan_static_bus for PCI: 00:19.1
1011 08:59:29.944334 I2C: 00:15 enabled
1012 08:59:29.947222 scan_static_bus for PCI: 00:19.1 done
1013 08:59:29.954183 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 08:59:29.954314 PCI: 00:1d.0 scanning...
1015 08:59:29.960572 do_pci_scan_bridge for PCI: 00:1d.0
1016 08:59:29.960734 PCI: pci_scan_bus for bus 01
1017 08:59:29.964110 PCI: 01:00.0 [15b7/5009] enabled
1018 08:59:29.967707 GENERIC: 0.0 enabled
1019 08:59:29.970610 Enabling Common Clock Configuration
1020 08:59:29.974323 L1 Sub-State supported from root port 29
1021 08:59:29.978728 L1 Sub-State Support = 0x5
1022 08:59:29.982067 CommonModeRestoreTime = 0x28
1023 08:59:29.985170 Power On Value = 0x16, Power On Scale = 0x0
1024 08:59:29.988716 ASPM: Enabled L1
1025 08:59:29.991764 PCIe: Max_Payload_Size adjusted to 128
1026 08:59:29.998353 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 08:59:29.998887 PCI: 00:1e.2 scanning...
1028 08:59:30.001614 scan_generic_bus for PCI: 00:1e.2
1029 08:59:30.004854 SPI: 00 enabled
1030 08:59:30.011409 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 08:59:30.014608 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 08:59:30.018023 PCI: 00:1e.3 scanning...
1033 08:59:30.021274 scan_generic_bus for PCI: 00:1e.3
1034 08:59:30.024510 SPI: 00 enabled
1035 08:59:30.027566 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 08:59:30.034576 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 08:59:30.037773 PCI: 00:1f.0 scanning...
1038 08:59:30.040881 scan_static_bus for PCI: 00:1f.0
1039 08:59:30.041454 PNP: 0c09.0 enabled
1040 08:59:30.044088 PNP: 0c09.0 scanning...
1041 08:59:30.047494 scan_static_bus for PNP: 0c09.0
1042 08:59:30.050647 scan_static_bus for PNP: 0c09.0 done
1043 08:59:30.057262 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 08:59:30.060306 scan_static_bus for PCI: 00:1f.0 done
1045 08:59:30.064027 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 08:59:30.067006 PCI: 00:1f.2 scanning...
1047 08:59:30.070922 scan_static_bus for PCI: 00:1f.2
1048 08:59:30.074274 GENERIC: 0.0 enabled
1049 08:59:30.077159 GENERIC: 0.0 scanning...
1050 08:59:30.080220 scan_static_bus for GENERIC: 0.0
1051 08:59:30.080413 GENERIC: 0.0 enabled
1052 08:59:30.083595 GENERIC: 1.0 enabled
1053 08:59:30.087030 scan_static_bus for GENERIC: 0.0 done
1054 08:59:30.093514 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 08:59:30.096673 scan_static_bus for PCI: 00:1f.2 done
1056 08:59:30.099813 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 08:59:30.103518 PCI: 00:1f.3 scanning...
1058 08:59:30.106602 scan_static_bus for PCI: 00:1f.3
1059 08:59:30.110071 scan_static_bus for PCI: 00:1f.3 done
1060 08:59:30.116287 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 08:59:30.116584 PCI: 00:1f.5 scanning...
1062 08:59:30.119880 scan_generic_bus for PCI: 00:1f.5
1063 08:59:30.126501 scan_generic_bus for PCI: 00:1f.5 done
1064 08:59:30.129785 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 08:59:30.136099 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1066 08:59:30.139650 scan_static_bus for Root Device done
1067 08:59:30.143058 scan_bus: bus Root Device finished in 735 msecs
1068 08:59:30.143142 done
1069 08:59:30.149662 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1070 08:59:30.152832 Chrome EC: UHEPI supported
1071 08:59:30.159519 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 08:59:30.165999 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 08:59:30.169160 SPI flash protection: WPSW=0 SRP0=1
1074 08:59:30.172598 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 08:59:30.179012 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 08:59:30.182413 found VGA at PCI: 00:02.0
1077 08:59:30.185693 Setting up VGA for PCI: 00:02.0
1078 08:59:30.192473 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 08:59:30.195688 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 08:59:30.198956 Allocating resources...
1081 08:59:30.199039 Reading resources...
1082 08:59:30.205499 Root Device read_resources bus 0 link: 0
1083 08:59:30.208867 DOMAIN: 0000 read_resources bus 0 link: 0
1084 08:59:30.215668 PCI: 00:04.0 read_resources bus 1 link: 0
1085 08:59:30.218881 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 08:59:30.225564 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 08:59:30.228694 USB0 port 0 read_resources bus 0 link: 0
1088 08:59:30.235791 USB0 port 0 read_resources bus 0 link: 0 done
1089 08:59:30.238671 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 08:59:30.242178 PCI: 00:14.0 read_resources bus 0 link: 0
1091 08:59:30.248711 USB0 port 0 read_resources bus 0 link: 0
1092 08:59:30.252053 USB0 port 0 read_resources bus 0 link: 0 done
1093 08:59:30.258547 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 08:59:30.262048 PCI: 00:14.3 read_resources bus 0 link: 0
1095 08:59:30.268608 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 08:59:30.272007 PCI: 00:15.0 read_resources bus 0 link: 0
1097 08:59:30.278606 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 08:59:30.281713 PCI: 00:15.1 read_resources bus 0 link: 0
1099 08:59:30.288193 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 08:59:30.294760 PCI: 00:19.1 read_resources bus 0 link: 0
1101 08:59:30.298164 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 08:59:30.301731 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 08:59:30.308560 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 08:59:30.312094 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 08:59:30.318677 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 08:59:30.321751 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 08:59:30.328793 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 08:59:30.332079 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 08:59:30.338227 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 08:59:30.341991 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 08:59:30.345140 GENERIC: 0.0 read_resources bus 0 link: 0
1112 08:59:30.352648 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 08:59:30.355293 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 08:59:30.362820 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 08:59:30.366429 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 08:59:30.373281 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 08:59:30.376016 Root Device read_resources bus 0 link: 0 done
1118 08:59:30.379314 Done reading resources.
1119 08:59:30.386010 Show resources in subtree (Root Device)...After reading.
1120 08:59:30.389496 Root Device child on link 0 DOMAIN: 0000
1121 08:59:30.392613 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 08:59:30.402513 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 08:59:30.412403 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 08:59:30.415872 PCI: 00:00.0
1125 08:59:30.425612 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 08:59:30.432546 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 08:59:30.442564 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 08:59:30.452099 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 08:59:30.462282 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 08:59:30.472611 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 08:59:30.482087 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 08:59:30.489150 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 08:59:30.498871 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 08:59:30.508441 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 08:59:30.518443 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 08:59:30.528155 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 08:59:30.538482 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 08:59:30.544798 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 08:59:30.554868 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 08:59:30.564756 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 08:59:30.574865 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 08:59:30.584706 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 08:59:30.594776 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 08:59:30.604676 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 08:59:30.605176 PCI: 00:02.0
1146 08:59:30.614370 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 08:59:30.624566 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 08:59:30.634125 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 08:59:30.637339 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 08:59:30.647093 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 08:59:30.650501 GENERIC: 0.0
1152 08:59:30.650579 PCI: 00:05.0
1153 08:59:30.660503 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 08:59:30.666893 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 08:59:30.666974 GENERIC: 0.0
1156 08:59:30.670586 PCI: 00:08.0
1157 08:59:30.680281 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 08:59:30.680367 PCI: 00:0a.0
1159 08:59:30.686755 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 08:59:30.696660 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 08:59:30.700155 USB0 port 0 child on link 0 USB3 port 0
1162 08:59:30.700265 USB3 port 0
1163 08:59:30.703251 USB3 port 1
1164 08:59:30.706995 USB3 port 2
1165 08:59:30.707080 USB3 port 3
1166 08:59:30.710273 PCI: 00:14.0 child on link 0 USB0 port 0
1167 08:59:30.719815 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 08:59:30.726613 USB0 port 0 child on link 0 USB2 port 0
1169 08:59:30.726701 USB2 port 0
1170 08:59:30.729619 USB2 port 1
1171 08:59:30.729716 USB2 port 2
1172 08:59:30.733238 USB2 port 3
1173 08:59:30.733318 USB2 port 4
1174 08:59:30.736748 USB2 port 5
1175 08:59:30.739616 USB2 port 6
1176 08:59:30.739724 USB2 port 7
1177 08:59:30.743310 USB2 port 8
1178 08:59:30.743387 USB2 port 9
1179 08:59:30.746244 USB3 port 0
1180 08:59:30.746344 USB3 port 1
1181 08:59:30.749874 USB3 port 2
1182 08:59:30.749977 USB3 port 3
1183 08:59:30.753065 PCI: 00:14.2
1184 08:59:30.762734 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 08:59:30.772773 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 08:59:30.776545 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 08:59:30.786196 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 08:59:30.789186 GENERIC: 0.0
1189 08:59:30.792766 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 08:59:30.802529 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 08:59:30.802611 I2C: 00:1a
1192 08:59:30.805838 I2C: 00:31
1193 08:59:30.805925 I2C: 00:32
1194 08:59:30.812710 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 08:59:30.822295 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 08:59:30.822434 I2C: 00:10
1197 08:59:30.825613 PCI: 00:15.2
1198 08:59:30.835459 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 08:59:30.835545 PCI: 00:15.3
1200 08:59:30.845449 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 08:59:30.848610 PCI: 00:16.0
1202 08:59:30.858834 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 08:59:30.859396 PCI: 00:19.0
1204 08:59:30.865610 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 08:59:30.875467 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 08:59:30.875932 I2C: 00:15
1207 08:59:30.878837 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 08:59:30.888741 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 08:59:30.898243 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 08:59:30.908439 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 08:59:30.908523 GENERIC: 0.0
1212 08:59:30.911735 PCI: 01:00.0
1213 08:59:30.921848 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 08:59:30.931425 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1215 08:59:30.931508 PCI: 00:1e.0
1216 08:59:30.944575 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1217 08:59:30.947926 PCI: 00:1e.2 child on link 0 SPI: 00
1218 08:59:30.957888 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 08:59:30.957974 SPI: 00
1220 08:59:30.964659 PCI: 00:1e.3 child on link 0 SPI: 00
1221 08:59:30.974351 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 08:59:30.974437 SPI: 00
1223 08:59:30.977831 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1224 08:59:30.987812 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1225 08:59:30.987894 PNP: 0c09.0
1226 08:59:30.997675 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1227 08:59:31.000862 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1228 08:59:31.010741 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1229 08:59:31.020846 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1230 08:59:31.023955 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1231 08:59:31.027443 GENERIC: 0.0
1232 08:59:31.030690 GENERIC: 1.0
1233 08:59:31.030828 PCI: 00:1f.3
1234 08:59:31.040565 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1235 08:59:31.050990 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1236 08:59:31.054279 PCI: 00:1f.5
1237 08:59:31.060964 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1238 08:59:31.067345 CPU_CLUSTER: 0 child on link 0 APIC: 00
1239 08:59:31.067798 APIC: 00
1240 08:59:31.068250 APIC: 01
1241 08:59:31.070746 APIC: 03
1242 08:59:31.071195 APIC: 05
1243 08:59:31.074413 APIC: 07
1244 08:59:31.074890 APIC: 06
1245 08:59:31.075368 APIC: 02
1246 08:59:31.077175 APIC: 04
1247 08:59:31.083839 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1248 08:59:31.090439 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1249 08:59:31.096866 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1250 08:59:31.103668 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1251 08:59:31.107064 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1252 08:59:31.110273 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1253 08:59:31.116962 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1254 08:59:31.123435 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1255 08:59:31.133588 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1256 08:59:31.140366 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1257 08:59:31.146281 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1258 08:59:31.153097 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1259 08:59:31.159395 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1260 08:59:31.169887 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1261 08:59:31.172840 DOMAIN: 0000: Resource ranges:
1262 08:59:31.176208 * Base: 1000, Size: 800, Tag: 100
1263 08:59:31.179388 * Base: 1900, Size: e700, Tag: 100
1264 08:59:31.182850 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1265 08:59:31.189714 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1266 08:59:31.199560 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1267 08:59:31.205901 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1268 08:59:31.212597 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1269 08:59:31.222948 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1270 08:59:31.229165 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1271 08:59:31.235885 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1272 08:59:31.245661 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1273 08:59:31.252859 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1274 08:59:31.258948 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1275 08:59:31.268879 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1276 08:59:31.275019 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1277 08:59:31.281994 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1278 08:59:31.291721 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1279 08:59:31.298394 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1280 08:59:31.305358 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1281 08:59:31.314771 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1282 08:59:31.321659 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1283 08:59:31.327879 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1284 08:59:31.338065 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1285 08:59:31.345142 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1286 08:59:31.351051 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1287 08:59:31.361315 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1288 08:59:31.367771 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1289 08:59:31.371378 DOMAIN: 0000: Resource ranges:
1290 08:59:31.374290 * Base: 7fc00000, Size: 40400000, Tag: 200
1291 08:59:31.380815 * Base: d0000000, Size: 28000000, Tag: 200
1292 08:59:31.384479 * Base: fa000000, Size: 1000000, Tag: 200
1293 08:59:31.387887 * Base: fb001000, Size: 2fff000, Tag: 200
1294 08:59:31.390844 * Base: fe010000, Size: 2e000, Tag: 200
1295 08:59:31.397365 * Base: fe03f000, Size: d41000, Tag: 200
1296 08:59:31.400897 * Base: fed88000, Size: 8000, Tag: 200
1297 08:59:31.404101 * Base: fed93000, Size: d000, Tag: 200
1298 08:59:31.407506 * Base: feda2000, Size: 1e000, Tag: 200
1299 08:59:31.414145 * Base: fede0000, Size: 1220000, Tag: 200
1300 08:59:31.417220 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1301 08:59:31.424188 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1302 08:59:31.430929 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1303 08:59:31.437462 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1304 08:59:31.443557 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1305 08:59:31.450144 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1306 08:59:31.456844 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1307 08:59:31.463380 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1308 08:59:31.470181 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1309 08:59:31.476287 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1310 08:59:31.483318 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1311 08:59:31.489803 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1312 08:59:31.496466 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1313 08:59:31.503080 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1314 08:59:31.509656 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1315 08:59:31.516289 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1316 08:59:31.522914 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1317 08:59:31.529175 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1318 08:59:31.535998 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1319 08:59:31.542578 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1320 08:59:31.549119 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1321 08:59:31.555813 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1322 08:59:31.562290 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1323 08:59:31.572515 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1324 08:59:31.578967 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1325 08:59:31.582755 PCI: 00:1d.0: Resource ranges:
1326 08:59:31.585758 * Base: 7fc00000, Size: 100000, Tag: 200
1327 08:59:31.592081 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1328 08:59:31.598818 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1329 08:59:31.608821 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1330 08:59:31.615479 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1331 08:59:31.618376 Root Device assign_resources, bus 0 link: 0
1332 08:59:31.625566 DOMAIN: 0000 assign_resources, bus 0 link: 0
1333 08:59:31.632169 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1334 08:59:31.641854 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1335 08:59:31.648742 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1336 08:59:31.658371 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1337 08:59:31.661972 PCI: 00:04.0 assign_resources, bus 1 link: 0
1338 08:59:31.668368 PCI: 00:04.0 assign_resources, bus 1 link: 0
1339 08:59:31.674957 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1340 08:59:31.684761 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1341 08:59:31.691465 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1342 08:59:31.694307 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1343 08:59:31.700928 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1344 08:59:31.707913 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1345 08:59:31.714591 PCI: 00:14.0 assign_resources, bus 0 link: 0
1346 08:59:31.717831 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 08:59:31.727694 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1348 08:59:31.734380 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1349 08:59:31.744027 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1350 08:59:31.747728 PCI: 00:14.3 assign_resources, bus 0 link: 0
1351 08:59:31.751068 PCI: 00:14.3 assign_resources, bus 0 link: 0
1352 08:59:31.760621 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1353 08:59:31.764033 PCI: 00:15.0 assign_resources, bus 0 link: 0
1354 08:59:31.770509 PCI: 00:15.0 assign_resources, bus 0 link: 0
1355 08:59:31.776975 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1356 08:59:31.780410 PCI: 00:15.1 assign_resources, bus 0 link: 0
1357 08:59:31.787341 PCI: 00:15.1 assign_resources, bus 0 link: 0
1358 08:59:31.794042 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1359 08:59:31.803454 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1360 08:59:31.810003 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1361 08:59:31.820263 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1362 08:59:31.823450 PCI: 00:19.1 assign_resources, bus 0 link: 0
1363 08:59:31.829932 PCI: 00:19.1 assign_resources, bus 0 link: 0
1364 08:59:31.836464 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1365 08:59:31.846474 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1366 08:59:31.856512 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1367 08:59:31.859812 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 08:59:31.869592 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1369 08:59:31.876269 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1370 08:59:31.882881 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 08:59:31.889272 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1372 08:59:31.892711 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1373 08:59:31.899612 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1374 08:59:31.905838 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1375 08:59:31.912483 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1376 08:59:31.915922 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1377 08:59:31.922376 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 08:59:31.925528 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1379 08:59:31.932479 LPC: Trying to open IO window from 800 size 1ff
1380 08:59:31.938973 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1381 08:59:31.945897 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1382 08:59:31.955908 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1383 08:59:31.959224 DOMAIN: 0000 assign_resources, bus 0 link: 0
1384 08:59:31.965619 Root Device assign_resources, bus 0 link: 0
1385 08:59:31.966048 Done setting resources.
1386 08:59:31.972204 Show resources in subtree (Root Device)...After assigning values.
1387 08:59:31.978812 Root Device child on link 0 DOMAIN: 0000
1388 08:59:31.982178 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1389 08:59:31.992206 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1390 08:59:32.002042 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1391 08:59:32.002628 PCI: 00:00.0
1392 08:59:32.012088 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1393 08:59:32.021808 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1394 08:59:32.031867 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1395 08:59:32.041768 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1396 08:59:32.051744 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1397 08:59:32.058064 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1398 08:59:32.068006 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1399 08:59:32.077947 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1400 08:59:32.087893 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1401 08:59:32.098083 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1402 08:59:32.107248 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1403 08:59:32.114106 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1404 08:59:32.124268 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1405 08:59:32.133864 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1406 08:59:32.144062 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1407 08:59:32.153997 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1408 08:59:32.163711 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1409 08:59:32.173394 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1410 08:59:32.180542 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1411 08:59:32.190455 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1412 08:59:32.193352 PCI: 00:02.0
1413 08:59:32.204162 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1414 08:59:32.213514 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1415 08:59:32.223375 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1416 08:59:32.226557 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1417 08:59:32.239519 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1418 08:59:32.240085 GENERIC: 0.0
1419 08:59:32.242976 PCI: 00:05.0
1420 08:59:32.252786 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1421 08:59:32.256050 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1422 08:59:32.259407 GENERIC: 0.0
1423 08:59:32.260001 PCI: 00:08.0
1424 08:59:32.269065 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1425 08:59:32.272532 PCI: 00:0a.0
1426 08:59:32.275929 PCI: 00:0d.0 child on link 0 USB0 port 0
1427 08:59:32.285792 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1428 08:59:32.292955 USB0 port 0 child on link 0 USB3 port 0
1429 08:59:32.293389 USB3 port 0
1430 08:59:32.295894 USB3 port 1
1431 08:59:32.296327 USB3 port 2
1432 08:59:32.298929 USB3 port 3
1433 08:59:32.302065 PCI: 00:14.0 child on link 0 USB0 port 0
1434 08:59:32.312160 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1435 08:59:32.318831 USB0 port 0 child on link 0 USB2 port 0
1436 08:59:32.319391 USB2 port 0
1437 08:59:32.322121 USB2 port 1
1438 08:59:32.322666 USB2 port 2
1439 08:59:32.325488 USB2 port 3
1440 08:59:32.325963 USB2 port 4
1441 08:59:32.328471 USB2 port 5
1442 08:59:32.331711 USB2 port 6
1443 08:59:32.332242 USB2 port 7
1444 08:59:32.335181 USB2 port 8
1445 08:59:32.335664 USB2 port 9
1446 08:59:32.338585 USB3 port 0
1447 08:59:32.339025 USB3 port 1
1448 08:59:32.341660 USB3 port 2
1449 08:59:32.342127 USB3 port 3
1450 08:59:32.345366 PCI: 00:14.2
1451 08:59:32.354826 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1452 08:59:32.364862 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1453 08:59:32.368163 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1454 08:59:32.377853 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1455 08:59:32.381551 GENERIC: 0.0
1456 08:59:32.384912 PCI: 00:15.0 child on link 0 I2C: 00:1a
1457 08:59:32.394609 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1458 08:59:32.398241 I2C: 00:1a
1459 08:59:32.398666 I2C: 00:31
1460 08:59:32.401534 I2C: 00:32
1461 08:59:32.404725 PCI: 00:15.1 child on link 0 I2C: 00:10
1462 08:59:32.414426 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1463 08:59:32.417781 I2C: 00:10
1464 08:59:32.418206 PCI: 00:15.2
1465 08:59:32.428028 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1466 08:59:32.431312 PCI: 00:15.3
1467 08:59:32.441025 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1468 08:59:32.441459 PCI: 00:16.0
1469 08:59:32.454598 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1470 08:59:32.455029 PCI: 00:19.0
1471 08:59:32.457816 PCI: 00:19.1 child on link 0 I2C: 00:15
1472 08:59:32.471014 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1473 08:59:32.471565 I2C: 00:15
1474 08:59:32.474227 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1475 08:59:32.483885 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1476 08:59:32.497269 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1477 08:59:32.507352 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1478 08:59:32.507785 GENERIC: 0.0
1479 08:59:32.510741 PCI: 01:00.0
1480 08:59:32.520533 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1481 08:59:32.530352 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1482 08:59:32.533412 PCI: 00:1e.0
1483 08:59:32.543708 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1484 08:59:32.547228 PCI: 00:1e.2 child on link 0 SPI: 00
1485 08:59:32.556649 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1486 08:59:32.560245 SPI: 00
1487 08:59:32.563535 PCI: 00:1e.3 child on link 0 SPI: 00
1488 08:59:32.573242 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1489 08:59:32.573795 SPI: 00
1490 08:59:32.580118 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1491 08:59:32.586745 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1492 08:59:32.590022 PNP: 0c09.0
1493 08:59:32.599705 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 08:59:32.603115 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1495 08:59:32.613359 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1496 08:59:32.623300 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1497 08:59:32.626412 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1498 08:59:32.627011 GENERIC: 0.0
1499 08:59:32.629686 GENERIC: 1.0
1500 08:59:32.633193 PCI: 00:1f.3
1501 08:59:32.643109 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1502 08:59:32.653247 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1503 08:59:32.653686 PCI: 00:1f.5
1504 08:59:32.663133 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1505 08:59:32.669595 CPU_CLUSTER: 0 child on link 0 APIC: 00
1506 08:59:32.670031 APIC: 00
1507 08:59:32.670391 APIC: 01
1508 08:59:32.672799 APIC: 03
1509 08:59:32.673230 APIC: 05
1510 08:59:32.676229 APIC: 07
1511 08:59:32.676726 APIC: 06
1512 08:59:32.677073 APIC: 02
1513 08:59:32.679808 APIC: 04
1514 08:59:32.683144 Done allocating resources.
1515 08:59:32.686214 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1516 08:59:32.692990 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1517 08:59:32.696154 Configure GPIOs for I2S audio on UP4.
1518 08:59:32.703735 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1519 08:59:32.706957 Enabling resources...
1520 08:59:32.710521 PCI: 00:00.0 subsystem <- 8086/9a12
1521 08:59:32.713595 PCI: 00:00.0 cmd <- 06
1522 08:59:32.716928 PCI: 00:02.0 subsystem <- 8086/9a40
1523 08:59:32.720364 PCI: 00:02.0 cmd <- 03
1524 08:59:32.723445 PCI: 00:04.0 subsystem <- 8086/9a03
1525 08:59:32.726623 PCI: 00:04.0 cmd <- 02
1526 08:59:32.730433 PCI: 00:05.0 subsystem <- 8086/9a19
1527 08:59:32.730864 PCI: 00:05.0 cmd <- 02
1528 08:59:32.736971 PCI: 00:08.0 subsystem <- 8086/9a11
1529 08:59:32.737400 PCI: 00:08.0 cmd <- 06
1530 08:59:32.740072 PCI: 00:0d.0 subsystem <- 8086/9a13
1531 08:59:32.743165 PCI: 00:0d.0 cmd <- 02
1532 08:59:32.746821 PCI: 00:14.0 subsystem <- 8086/a0ed
1533 08:59:32.750119 PCI: 00:14.0 cmd <- 02
1534 08:59:32.753483 PCI: 00:14.2 subsystem <- 8086/a0ef
1535 08:59:32.756348 PCI: 00:14.2 cmd <- 02
1536 08:59:32.759973 PCI: 00:14.3 subsystem <- 8086/a0f0
1537 08:59:32.763165 PCI: 00:14.3 cmd <- 02
1538 08:59:32.766730 PCI: 00:15.0 subsystem <- 8086/a0e8
1539 08:59:32.769907 PCI: 00:15.0 cmd <- 02
1540 08:59:32.773097 PCI: 00:15.1 subsystem <- 8086/a0e9
1541 08:59:32.776298 PCI: 00:15.1 cmd <- 02
1542 08:59:32.779830 PCI: 00:15.2 subsystem <- 8086/a0ea
1543 08:59:32.780260 PCI: 00:15.2 cmd <- 02
1544 08:59:32.786560 PCI: 00:15.3 subsystem <- 8086/a0eb
1545 08:59:32.786990 PCI: 00:15.3 cmd <- 02
1546 08:59:32.789846 PCI: 00:16.0 subsystem <- 8086/a0e0
1547 08:59:32.792849 PCI: 00:16.0 cmd <- 02
1548 08:59:32.796612 PCI: 00:19.1 subsystem <- 8086/a0c6
1549 08:59:32.799325 PCI: 00:19.1 cmd <- 02
1550 08:59:32.802687 PCI: 00:1d.0 bridge ctrl <- 0013
1551 08:59:32.805988 PCI: 00:1d.0 subsystem <- 8086/a0b0
1552 08:59:32.809307 PCI: 00:1d.0 cmd <- 06
1553 08:59:32.812452 PCI: 00:1e.0 subsystem <- 8086/a0a8
1554 08:59:32.816095 PCI: 00:1e.0 cmd <- 06
1555 08:59:32.819404 PCI: 00:1e.2 subsystem <- 8086/a0aa
1556 08:59:32.822554 PCI: 00:1e.2 cmd <- 06
1557 08:59:32.825922 PCI: 00:1e.3 subsystem <- 8086/a0ab
1558 08:59:32.829241 PCI: 00:1e.3 cmd <- 02
1559 08:59:32.832502 PCI: 00:1f.0 subsystem <- 8086/a087
1560 08:59:32.835577 PCI: 00:1f.0 cmd <- 407
1561 08:59:32.838857 PCI: 00:1f.3 subsystem <- 8086/a0c8
1562 08:59:32.839323 PCI: 00:1f.3 cmd <- 02
1563 08:59:32.845668 PCI: 00:1f.5 subsystem <- 8086/a0a4
1564 08:59:32.846199 PCI: 00:1f.5 cmd <- 406
1565 08:59:32.850864 PCI: 01:00.0 cmd <- 02
1566 08:59:32.855694 done.
1567 08:59:32.858607 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1568 08:59:32.861740 Initializing devices...
1569 08:59:32.865038 Root Device init
1570 08:59:32.869016 Chrome EC: Set SMI mask to 0x0000000000000000
1571 08:59:32.875122 Chrome EC: clear events_b mask to 0x0000000000000000
1572 08:59:32.881857 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1573 08:59:32.888337 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1574 08:59:32.894966 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1575 08:59:32.898270 Chrome EC: Set WAKE mask to 0x0000000000000000
1576 08:59:32.905808 fw_config match found: DB_USB=USB3_ACTIVE
1577 08:59:32.909174 Configure Right Type-C port orientation for retimer
1578 08:59:32.915841 Root Device init finished in 46 msecs
1579 08:59:32.916324 PCI: 00:00.0 init
1580 08:59:32.919535 CPU TDP = 9 Watts
1581 08:59:32.922989 CPU PL1 = 9 Watts
1582 08:59:32.923353 CPU PL2 = 40 Watts
1583 08:59:32.925976 CPU PL4 = 83 Watts
1584 08:59:32.929499 PCI: 00:00.0 init finished in 8 msecs
1585 08:59:32.932835 PCI: 00:02.0 init
1586 08:59:32.933174 GMA: Found VBT in CBFS
1587 08:59:32.935935 GMA: Found valid VBT in CBFS
1588 08:59:32.942886 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1589 08:59:32.949551 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1590 08:59:32.952652 PCI: 00:02.0 init finished in 18 msecs
1591 08:59:32.956354 PCI: 00:05.0 init
1592 08:59:32.959688 PCI: 00:05.0 init finished in 0 msecs
1593 08:59:32.962962 PCI: 00:08.0 init
1594 08:59:32.966569 PCI: 00:08.0 init finished in 0 msecs
1595 08:59:32.969518 PCI: 00:14.0 init
1596 08:59:32.972829 PCI: 00:14.0 init finished in 0 msecs
1597 08:59:32.976150 PCI: 00:14.2 init
1598 08:59:32.979519 PCI: 00:14.2 init finished in 0 msecs
1599 08:59:32.982659 PCI: 00:15.0 init
1600 08:59:32.986094 I2C bus 0 version 0x3230302a
1601 08:59:32.989793 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1602 08:59:32.992610 PCI: 00:15.0 init finished in 6 msecs
1603 08:59:32.993076 PCI: 00:15.1 init
1604 08:59:32.996528 I2C bus 1 version 0x3230302a
1605 08:59:32.999391 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1606 08:59:33.006000 PCI: 00:15.1 init finished in 6 msecs
1607 08:59:33.006552 PCI: 00:15.2 init
1608 08:59:33.009023 I2C bus 2 version 0x3230302a
1609 08:59:33.012903 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1610 08:59:33.015711 PCI: 00:15.2 init finished in 6 msecs
1611 08:59:33.019180 PCI: 00:15.3 init
1612 08:59:33.022385 I2C bus 3 version 0x3230302a
1613 08:59:33.025955 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1614 08:59:33.029224 PCI: 00:15.3 init finished in 6 msecs
1615 08:59:33.032626 PCI: 00:16.0 init
1616 08:59:33.035949 PCI: 00:16.0 init finished in 0 msecs
1617 08:59:33.039299 PCI: 00:19.1 init
1618 08:59:33.042387 I2C bus 5 version 0x3230302a
1619 08:59:33.046017 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1620 08:59:33.049615 PCI: 00:19.1 init finished in 6 msecs
1621 08:59:33.052848 PCI: 00:1d.0 init
1622 08:59:33.055654 Initializing PCH PCIe bridge.
1623 08:59:33.058912 PCI: 00:1d.0 init finished in 3 msecs
1624 08:59:33.062141 PCI: 00:1f.0 init
1625 08:59:33.065677 IOAPIC: Initializing IOAPIC at 0xfec00000
1626 08:59:33.068708 IOAPIC: Bootstrap Processor Local APIC = 0x00
1627 08:59:33.072136 IOAPIC: ID = 0x02
1628 08:59:33.075307 IOAPIC: Dumping registers
1629 08:59:33.075896 reg 0x0000: 0x02000000
1630 08:59:33.078761 reg 0x0001: 0x00770020
1631 08:59:33.082106 reg 0x0002: 0x00000000
1632 08:59:33.085507 PCI: 00:1f.0 init finished in 21 msecs
1633 08:59:33.088852 PCI: 00:1f.2 init
1634 08:59:33.092238 Disabling ACPI via APMC.
1635 08:59:33.092857 APMC done.
1636 08:59:33.098999 PCI: 00:1f.2 init finished in 5 msecs
1637 08:59:33.108951 PCI: 01:00.0 init
1638 08:59:33.112063 PCI: 01:00.0 init finished in 0 msecs
1639 08:59:33.115747 PNP: 0c09.0 init
1640 08:59:33.119335 Google Chrome EC uptime: 8.328 seconds
1641 08:59:33.125327 Google Chrome AP resets since EC boot: 1
1642 08:59:33.128563 Google Chrome most recent AP reset causes:
1643 08:59:33.131931 0.483: 32775 shutdown: entering G3
1644 08:59:33.138673 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1645 08:59:33.141984 PNP: 0c09.0 init finished in 22 msecs
1646 08:59:33.147503 Devices initialized
1647 08:59:33.151316 Show all devs... After init.
1648 08:59:33.154531 Root Device: enabled 1
1649 08:59:33.155005 DOMAIN: 0000: enabled 1
1650 08:59:33.157499 CPU_CLUSTER: 0: enabled 1
1651 08:59:33.160847 PCI: 00:00.0: enabled 1
1652 08:59:33.164379 PCI: 00:02.0: enabled 1
1653 08:59:33.164971 PCI: 00:04.0: enabled 1
1654 08:59:33.167531 PCI: 00:05.0: enabled 1
1655 08:59:33.171294 PCI: 00:06.0: enabled 0
1656 08:59:33.174507 PCI: 00:07.0: enabled 0
1657 08:59:33.174938 PCI: 00:07.1: enabled 0
1658 08:59:33.177618 PCI: 00:07.2: enabled 0
1659 08:59:33.180825 PCI: 00:07.3: enabled 0
1660 08:59:33.184025 PCI: 00:08.0: enabled 1
1661 08:59:33.184456 PCI: 00:09.0: enabled 0
1662 08:59:33.187706 PCI: 00:0a.0: enabled 0
1663 08:59:33.190589 PCI: 00:0d.0: enabled 1
1664 08:59:33.194395 PCI: 00:0d.1: enabled 0
1665 08:59:33.194871 PCI: 00:0d.2: enabled 0
1666 08:59:33.197851 PCI: 00:0d.3: enabled 0
1667 08:59:33.200642 PCI: 00:0e.0: enabled 0
1668 08:59:33.204050 PCI: 00:10.2: enabled 1
1669 08:59:33.204528 PCI: 00:10.6: enabled 0
1670 08:59:33.207507 PCI: 00:10.7: enabled 0
1671 08:59:33.210792 PCI: 00:12.0: enabled 0
1672 08:59:33.211296 PCI: 00:12.6: enabled 0
1673 08:59:33.213776 PCI: 00:13.0: enabled 0
1674 08:59:33.217295 PCI: 00:14.0: enabled 1
1675 08:59:33.220507 PCI: 00:14.1: enabled 0
1676 08:59:33.221090 PCI: 00:14.2: enabled 1
1677 08:59:33.223867 PCI: 00:14.3: enabled 1
1678 08:59:33.227310 PCI: 00:15.0: enabled 1
1679 08:59:33.230741 PCI: 00:15.1: enabled 1
1680 08:59:33.231213 PCI: 00:15.2: enabled 1
1681 08:59:33.234146 PCI: 00:15.3: enabled 1
1682 08:59:33.237183 PCI: 00:16.0: enabled 1
1683 08:59:33.240670 PCI: 00:16.1: enabled 0
1684 08:59:33.241142 PCI: 00:16.2: enabled 0
1685 08:59:33.243782 PCI: 00:16.3: enabled 0
1686 08:59:33.246965 PCI: 00:16.4: enabled 0
1687 08:59:33.247479 PCI: 00:16.5: enabled 0
1688 08:59:33.250364 PCI: 00:17.0: enabled 0
1689 08:59:33.253405 PCI: 00:19.0: enabled 0
1690 08:59:33.256981 PCI: 00:19.1: enabled 1
1691 08:59:33.257411 PCI: 00:19.2: enabled 0
1692 08:59:33.260163 PCI: 00:1c.0: enabled 1
1693 08:59:33.263220 PCI: 00:1c.1: enabled 0
1694 08:59:33.266703 PCI: 00:1c.2: enabled 0
1695 08:59:33.266934 PCI: 00:1c.3: enabled 0
1696 08:59:33.269830 PCI: 00:1c.4: enabled 0
1697 08:59:33.273497 PCI: 00:1c.5: enabled 0
1698 08:59:33.276874 PCI: 00:1c.6: enabled 1
1699 08:59:33.277457 PCI: 00:1c.7: enabled 0
1700 08:59:33.279931 PCI: 00:1d.0: enabled 1
1701 08:59:33.283617 PCI: 00:1d.1: enabled 0
1702 08:59:33.286607 PCI: 00:1d.2: enabled 1
1703 08:59:33.287082 PCI: 00:1d.3: enabled 0
1704 08:59:33.289896 PCI: 00:1e.0: enabled 1
1705 08:59:33.293108 PCI: 00:1e.1: enabled 0
1706 08:59:33.296874 PCI: 00:1e.2: enabled 1
1707 08:59:33.297345 PCI: 00:1e.3: enabled 1
1708 08:59:33.299669 PCI: 00:1f.0: enabled 1
1709 08:59:33.303186 PCI: 00:1f.1: enabled 0
1710 08:59:33.306804 PCI: 00:1f.2: enabled 1
1711 08:59:33.307238 PCI: 00:1f.3: enabled 1
1712 08:59:33.309651 PCI: 00:1f.4: enabled 0
1713 08:59:33.313220 PCI: 00:1f.5: enabled 1
1714 08:59:33.313654 PCI: 00:1f.6: enabled 0
1715 08:59:33.316297 PCI: 00:1f.7: enabled 0
1716 08:59:33.319702 APIC: 00: enabled 1
1717 08:59:33.323042 GENERIC: 0.0: enabled 1
1718 08:59:33.323585 GENERIC: 0.0: enabled 1
1719 08:59:33.326307 GENERIC: 1.0: enabled 1
1720 08:59:33.329649 GENERIC: 0.0: enabled 1
1721 08:59:33.332825 GENERIC: 1.0: enabled 1
1722 08:59:33.333259 USB0 port 0: enabled 1
1723 08:59:33.336504 GENERIC: 0.0: enabled 1
1724 08:59:33.339642 USB0 port 0: enabled 1
1725 08:59:33.340077 GENERIC: 0.0: enabled 1
1726 08:59:33.342597 I2C: 00:1a: enabled 1
1727 08:59:33.346451 I2C: 00:31: enabled 1
1728 08:59:33.346887 I2C: 00:32: enabled 1
1729 08:59:33.349565 I2C: 00:10: enabled 1
1730 08:59:33.352734 I2C: 00:15: enabled 1
1731 08:59:33.356166 GENERIC: 0.0: enabled 0
1732 08:59:33.356603 GENERIC: 1.0: enabled 0
1733 08:59:33.359153 GENERIC: 0.0: enabled 1
1734 08:59:33.362641 SPI: 00: enabled 1
1735 08:59:33.363073 SPI: 00: enabled 1
1736 08:59:33.365875 PNP: 0c09.0: enabled 1
1737 08:59:33.369622 GENERIC: 0.0: enabled 1
1738 08:59:33.370267 USB3 port 0: enabled 1
1739 08:59:33.372724 USB3 port 1: enabled 1
1740 08:59:33.375766 USB3 port 2: enabled 0
1741 08:59:33.379147 USB3 port 3: enabled 0
1742 08:59:33.379619 USB2 port 0: enabled 0
1743 08:59:33.382718 USB2 port 1: enabled 1
1744 08:59:33.386004 USB2 port 2: enabled 1
1745 08:59:33.386599 USB2 port 3: enabled 0
1746 08:59:33.389157 USB2 port 4: enabled 1
1747 08:59:33.392793 USB2 port 5: enabled 0
1748 08:59:33.393566 USB2 port 6: enabled 0
1749 08:59:33.395626 USB2 port 7: enabled 0
1750 08:59:33.398921 USB2 port 8: enabled 0
1751 08:59:33.402277 USB2 port 9: enabled 0
1752 08:59:33.402873 USB3 port 0: enabled 0
1753 08:59:33.405662 USB3 port 1: enabled 1
1754 08:59:33.408789 USB3 port 2: enabled 0
1755 08:59:33.409221 USB3 port 3: enabled 0
1756 08:59:33.412174 GENERIC: 0.0: enabled 1
1757 08:59:33.415307 GENERIC: 1.0: enabled 1
1758 08:59:33.418421 APIC: 01: enabled 1
1759 08:59:33.418848 APIC: 03: enabled 1
1760 08:59:33.422281 APIC: 05: enabled 1
1761 08:59:33.422714 APIC: 07: enabled 1
1762 08:59:33.425420 APIC: 06: enabled 1
1763 08:59:33.428693 APIC: 02: enabled 1
1764 08:59:33.429116 APIC: 04: enabled 1
1765 08:59:33.431763 PCI: 01:00.0: enabled 1
1766 08:59:33.438521 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1767 08:59:33.441773 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1768 08:59:33.445539 ELOG: NV offset 0xf30000 size 0x1000
1769 08:59:33.453077 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1770 08:59:33.459444 ELOG: Event(17) added with size 13 at 2023-05-03 08:59:33 UTC
1771 08:59:33.465889 ELOG: Event(92) added with size 9 at 2023-05-03 08:59:33 UTC
1772 08:59:33.472759 ELOG: Event(93) added with size 9 at 2023-05-03 08:59:33 UTC
1773 08:59:33.479323 ELOG: Event(9E) added with size 10 at 2023-05-03 08:59:33 UTC
1774 08:59:33.486083 ELOG: Event(9F) added with size 14 at 2023-05-03 08:59:33 UTC
1775 08:59:33.492840 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1776 08:59:33.498981 ELOG: Event(A1) added with size 10 at 2023-05-03 08:59:33 UTC
1777 08:59:33.505661 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1778 08:59:33.512274 ELOG: Event(A0) added with size 9 at 2023-05-03 08:59:33 UTC
1779 08:59:33.515537 elog_add_boot_reason: Logged dev mode boot
1780 08:59:33.522442 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1781 08:59:33.522886 Finalize devices...
1782 08:59:33.525541 Devices finalized
1783 08:59:33.532263 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1784 08:59:33.535317 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1785 08:59:33.542385 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1786 08:59:33.545697 ME: HFSTS1 : 0x80030055
1787 08:59:33.552069 ME: HFSTS2 : 0x30280116
1788 08:59:33.555105 ME: HFSTS3 : 0x00000050
1789 08:59:33.558537 ME: HFSTS4 : 0x00004000
1790 08:59:33.565016 ME: HFSTS5 : 0x00000000
1791 08:59:33.568392 ME: HFSTS6 : 0x40400006
1792 08:59:33.572122 ME: Manufacturing Mode : YES
1793 08:59:33.575058 ME: SPI Protection Mode Enabled : NO
1794 08:59:33.581901 ME: FW Partition Table : OK
1795 08:59:33.585315 ME: Bringup Loader Failure : NO
1796 08:59:33.588507 ME: Firmware Init Complete : NO
1797 08:59:33.591789 ME: Boot Options Present : NO
1798 08:59:33.594980 ME: Update In Progress : NO
1799 08:59:33.598575 ME: D0i3 Support : YES
1800 08:59:33.601806 ME: Low Power State Enabled : NO
1801 08:59:33.604836 ME: CPU Replaced : YES
1802 08:59:33.611877 ME: CPU Replacement Valid : YES
1803 08:59:33.614689 ME: Current Working State : 5
1804 08:59:33.618229 ME: Current Operation State : 1
1805 08:59:33.621439 ME: Current Operation Mode : 3
1806 08:59:33.624680 ME: Error Code : 0
1807 08:59:33.628049 ME: Enhanced Debug Mode : NO
1808 08:59:33.631274 ME: CPU Debug Disabled : YES
1809 08:59:33.634514 ME: TXT Support : NO
1810 08:59:33.641422 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1811 08:59:33.647943 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1812 08:59:33.651174 CBFS: 'fallback/slic' not found.
1813 08:59:33.658144 ACPI: Writing ACPI tables at 76b01000.
1814 08:59:33.658576 ACPI: * FACS
1815 08:59:33.661068 ACPI: * DSDT
1816 08:59:33.664696 Ramoops buffer: 0x100000@0x76a00000.
1817 08:59:33.667911 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1818 08:59:33.674883 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1819 08:59:33.677843 Google Chrome EC: version:
1820 08:59:33.681451 ro: voema_v2.0.10114-a447f03e46
1821 08:59:33.684323 rw: voema_v2.0.10114-a447f03e46
1822 08:59:33.684642 running image: 2
1823 08:59:33.690389 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1824 08:59:33.695401 ACPI: * FADT
1825 08:59:33.695631 SCI is IRQ9
1826 08:59:33.701895 ACPI: added table 1/32, length now 40
1827 08:59:33.702121 ACPI: * SSDT
1828 08:59:33.705397 Found 1 CPU(s) with 8 core(s) each.
1829 08:59:33.712034 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1830 08:59:33.715070 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1831 08:59:33.718072 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1832 08:59:33.721690 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1833 08:59:33.728102 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1834 08:59:33.735159 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1835 08:59:33.738178 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1836 08:59:33.744934 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1837 08:59:33.751189 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1838 08:59:33.754673 \_SB.PCI0.RP09: Added StorageD3Enable property
1839 08:59:33.761344 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1840 08:59:33.764635 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1841 08:59:33.771547 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1842 08:59:33.775056 PS2K: Passing 80 keymaps to kernel
1843 08:59:33.781470 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1844 08:59:33.788124 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1845 08:59:33.794610 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1846 08:59:33.801170 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1847 08:59:33.808018 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1848 08:59:33.814276 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1849 08:59:33.820814 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1850 08:59:33.827509 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1851 08:59:33.830910 ACPI: added table 2/32, length now 44
1852 08:59:33.834148 ACPI: * MCFG
1853 08:59:33.837220 ACPI: added table 3/32, length now 48
1854 08:59:33.837320 ACPI: * TPM2
1855 08:59:33.840663 TPM2 log created at 0x769f0000
1856 08:59:33.843965 ACPI: added table 4/32, length now 52
1857 08:59:33.847383 ACPI: * MADT
1858 08:59:33.847468 SCI is IRQ9
1859 08:59:33.850961 ACPI: added table 5/32, length now 56
1860 08:59:33.854106 current = 76b09850
1861 08:59:33.854191 ACPI: * DMAR
1862 08:59:33.860795 ACPI: added table 6/32, length now 60
1863 08:59:33.863516 ACPI: added table 7/32, length now 64
1864 08:59:33.863601 ACPI: * HPET
1865 08:59:33.867380 ACPI: added table 8/32, length now 68
1866 08:59:33.870540 ACPI: done.
1867 08:59:33.873918 ACPI tables: 35216 bytes.
1868 08:59:33.874010 smbios_write_tables: 769ef000
1869 08:59:33.877481 EC returned error result code 3
1870 08:59:33.883760 Couldn't obtain OEM name from CBI
1871 08:59:33.886914 Create SMBIOS type 16
1872 08:59:33.886999 Create SMBIOS type 17
1873 08:59:33.890220 GENERIC: 0.0 (WIFI Device)
1874 08:59:33.893423 SMBIOS tables: 1734 bytes.
1875 08:59:33.896753 Writing table forward entry at 0x00000500
1876 08:59:33.903455 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1877 08:59:33.906663 Writing coreboot table at 0x76b25000
1878 08:59:33.913702 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1879 08:59:33.916803 1. 0000000000001000-000000000009ffff: RAM
1880 08:59:33.923417 2. 00000000000a0000-00000000000fffff: RESERVED
1881 08:59:33.927085 3. 0000000000100000-00000000769eefff: RAM
1882 08:59:33.933292 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1883 08:59:33.936779 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1884 08:59:33.943286 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1885 08:59:33.949684 7. 0000000077000000-000000007fbfffff: RESERVED
1886 08:59:33.953112 8. 00000000c0000000-00000000cfffffff: RESERVED
1887 08:59:33.959648 9. 00000000f8000000-00000000f9ffffff: RESERVED
1888 08:59:33.963163 10. 00000000fb000000-00000000fb000fff: RESERVED
1889 08:59:33.966284 11. 00000000fe000000-00000000fe00ffff: RESERVED
1890 08:59:33.972885 12. 00000000fed80000-00000000fed87fff: RESERVED
1891 08:59:33.976316 13. 00000000fed90000-00000000fed92fff: RESERVED
1892 08:59:33.982742 14. 00000000feda0000-00000000feda1fff: RESERVED
1893 08:59:33.986241 15. 00000000fedc0000-00000000feddffff: RESERVED
1894 08:59:33.992766 16. 0000000100000000-00000004803fffff: RAM
1895 08:59:33.992900 Passing 4 GPIOs to payload:
1896 08:59:33.999455 NAME | PORT | POLARITY | VALUE
1897 08:59:34.005926 lid | undefined | high | high
1898 08:59:34.009338 power | undefined | high | low
1899 08:59:34.016149 oprom | undefined | high | low
1900 08:59:34.019201 EC in RW | 0x000000e5 | high | high
1901 08:59:34.025558 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1902 08:59:34.029038 coreboot table: 1576 bytes.
1903 08:59:34.032373 IMD ROOT 0. 0x76fff000 0x00001000
1904 08:59:34.038657 IMD SMALL 1. 0x76ffe000 0x00001000
1905 08:59:34.042210 FSP MEMORY 2. 0x76c4e000 0x003b0000
1906 08:59:34.045294 VPD 3. 0x76c4d000 0x00000367
1907 08:59:34.048869 RO MCACHE 4. 0x76c4c000 0x00000fdc
1908 08:59:34.052384 CONSOLE 5. 0x76c2c000 0x00020000
1909 08:59:34.055169 FMAP 6. 0x76c2b000 0x00000578
1910 08:59:34.058671 TIME STAMP 7. 0x76c2a000 0x00000910
1911 08:59:34.062072 VBOOT WORK 8. 0x76c16000 0x00014000
1912 08:59:34.068822 ROMSTG STCK 9. 0x76c15000 0x00001000
1913 08:59:34.072102 AFTER CAR 10. 0x76c0a000 0x0000b000
1914 08:59:34.075085 RAMSTAGE 11. 0x76b97000 0x00073000
1915 08:59:34.078731 REFCODE 12. 0x76b42000 0x00055000
1916 08:59:34.081596 SMM BACKUP 13. 0x76b32000 0x00010000
1917 08:59:34.084933 4f444749 14. 0x76b30000 0x00002000
1918 08:59:34.088542 EXT VBT15. 0x76b2d000 0x0000219f
1919 08:59:34.091709 COREBOOT 16. 0x76b25000 0x00008000
1920 08:59:34.094833 ACPI 17. 0x76b01000 0x00024000
1921 08:59:34.101454 ACPI GNVS 18. 0x76b00000 0x00001000
1922 08:59:34.104717 RAMOOPS 19. 0x76a00000 0x00100000
1923 08:59:34.108103 TPM2 TCGLOG20. 0x769f0000 0x00010000
1924 08:59:34.111480 SMBIOS 21. 0x769ef000 0x00000800
1925 08:59:34.114830 IMD small region:
1926 08:59:34.117861 IMD ROOT 0. 0x76ffec00 0x00000400
1927 08:59:34.121276 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1928 08:59:34.124475 POWER STATE 2. 0x76ffeb80 0x00000044
1929 08:59:34.127754 ROMSTAGE 3. 0x76ffeb60 0x00000004
1930 08:59:34.134349 MEM INFO 4. 0x76ffe980 0x000001e0
1931 08:59:34.137816 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1932 08:59:34.140954 MTRR: Physical address space:
1933 08:59:34.147629 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1934 08:59:34.154645 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1935 08:59:34.161208 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1936 08:59:34.167533 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1937 08:59:34.174229 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1938 08:59:34.180753 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1939 08:59:34.184007 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1940 08:59:34.190661 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 08:59:34.194134 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 08:59:34.197201 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 08:59:34.200630 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 08:59:34.207210 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 08:59:34.210506 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 08:59:34.214046 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 08:59:34.217173 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 08:59:34.223598 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 08:59:34.227172 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 08:59:34.230375 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 08:59:34.234220 call enable_fixed_mtrr()
1952 08:59:34.237684 CPU physical address size: 39 bits
1953 08:59:34.244357 MTRR: default type WB/UC MTRR counts: 6/7.
1954 08:59:34.247186 MTRR: WB selected as default type.
1955 08:59:34.254043 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 08:59:34.260536 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 08:59:34.264052 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 08:59:34.270635 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1959 08:59:34.276832 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1960 08:59:34.283519 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1961 08:59:34.287558
1962 08:59:34.287639 MTRR check
1963 08:59:34.290906 Fixed MTRRs : Enabled
1964 08:59:34.290988 Variable MTRRs: Enabled
1965 08:59:34.291053
1966 08:59:34.297439 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 08:59:34.300868 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 08:59:34.304259 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 08:59:34.307437 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 08:59:34.314119 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 08:59:34.317467 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 08:59:34.320544 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 08:59:34.323843 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 08:59:34.330529 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 08:59:34.334125 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 08:59:34.337049 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 08:59:34.344737 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1978 08:59:34.347584 call enable_fixed_mtrr()
1979 08:59:34.351137 Checking cr50 for pending updates
1980 08:59:34.354901 CPU physical address size: 39 bits
1981 08:59:34.358452 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 08:59:34.361760 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 08:59:34.368362 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 08:59:34.371839 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 08:59:34.375189 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 08:59:34.378426 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 08:59:34.381767 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 08:59:34.388723 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 08:59:34.391568 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 08:59:34.395057 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 08:59:34.398393 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 08:59:34.404808 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 08:59:34.408266 MTRR: Fixed MSR 0x258 0x0606060606060606
1994 08:59:34.414755 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 08:59:34.418195 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 08:59:34.421580 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 08:59:34.425004 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 08:59:34.431679 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 08:59:34.434967 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 08:59:34.438037 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 08:59:34.441142 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 08:59:34.447668 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 08:59:34.450981 call enable_fixed_mtrr()
2004 08:59:34.454354 call enable_fixed_mtrr()
2005 08:59:34.457625 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 08:59:34.460904 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 08:59:34.464504 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 08:59:34.471034 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 08:59:34.474753 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 08:59:34.477655 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 08:59:34.480826 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 08:59:34.487911 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 08:59:34.490745 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 08:59:34.494102 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 08:59:34.497704 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 08:59:34.500960 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 08:59:34.507313 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 08:59:34.510563 call enable_fixed_mtrr()
2019 08:59:34.514115 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 08:59:34.517242 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 08:59:34.524443 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 08:59:34.527180 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 08:59:34.530833 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 08:59:34.533979 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 08:59:34.540409 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 08:59:34.543884 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 08:59:34.546764 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 08:59:34.551435 CPU physical address size: 39 bits
2029 08:59:34.558173 call enable_fixed_mtrr()
2030 08:59:34.560959 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 08:59:34.564291 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 08:59:34.567989 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 08:59:34.574570 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 08:59:34.578017 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 08:59:34.580896 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 08:59:34.584245 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 08:59:34.590949 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 08:59:34.594478 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 08:59:34.597455 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 08:59:34.600764 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 08:59:34.607771 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 08:59:34.610763 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 08:59:34.617429 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 08:59:34.620718 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 08:59:34.624039 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 08:59:34.627419 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 08:59:34.633979 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 08:59:34.637171 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 08:59:34.640567 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 08:59:34.643741 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 08:59:34.647446 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 08:59:34.653984 call enable_fixed_mtrr()
2053 08:59:34.657123 call enable_fixed_mtrr()
2054 08:59:34.660365 CPU physical address size: 39 bits
2055 08:59:34.663968 CPU physical address size: 39 bits
2056 08:59:34.666937 Reading cr50 TPM mode
2057 08:59:34.670731 CPU physical address size: 39 bits
2058 08:59:34.673692 CPU physical address size: 39 bits
2059 08:59:34.680485 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2060 08:59:34.683953 CPU physical address size: 39 bits
2061 08:59:34.693710 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2062 08:59:34.697328 Checking segment from ROM address 0xffc02b38
2063 08:59:34.700696 Checking segment from ROM address 0xffc02b54
2064 08:59:34.707186 Loading segment from ROM address 0xffc02b38
2065 08:59:34.707274 code (compression=0)
2066 08:59:34.716696 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2067 08:59:34.726807 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2068 08:59:34.726893 it's not compressed!
2069 08:59:34.866845 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2070 08:59:34.872825 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2071 08:59:34.879549 Loading segment from ROM address 0xffc02b54
2072 08:59:34.883192 Entry Point 0x30000000
2073 08:59:34.883317 Loaded segments
2074 08:59:34.889805 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2075 08:59:34.934709 Finalizing chipset.
2076 08:59:34.937890 Finalizing SMM.
2077 08:59:34.937974 APMC done.
2078 08:59:34.944442 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2079 08:59:34.947963 mp_park_aps done after 0 msecs.
2080 08:59:34.951408 Jumping to boot code at 0x30000000(0x76b25000)
2081 08:59:34.961184 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2082 08:59:34.961283
2083 08:59:34.964222
2084 08:59:34.964304
2085 08:59:34.964644 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2086 08:59:34.964743 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2087 08:59:34.964829 Setting prompt string to ['volteer:']
2088 08:59:34.964938 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2089 08:59:34.967542 Starting depthcharge on Voema...
2090 08:59:34.967625
2091 08:59:34.974379 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2092 08:59:34.974463
2093 08:59:34.980890 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2094 08:59:34.980973
2095 08:59:34.987502 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2096 08:59:34.987585
2097 08:59:34.990857 Failed to find eMMC card reader
2098 08:59:34.990941
2099 08:59:34.993986 Wipe memory regions:
2100 08:59:34.994069
2101 08:59:34.997364 [0x00000000001000, 0x000000000a0000)
2102 08:59:34.997448
2103 08:59:35.000580 [0x00000000100000, 0x00000030000000)
2104 08:59:35.035315
2105 08:59:35.038296 [0x00000032662db0, 0x000000769ef000)
2106 08:59:35.085869
2107 08:59:35.089234 [0x00000100000000, 0x00000480400000)
2108 08:59:35.699853
2109 08:59:35.703197 ec_init: CrosEC protocol v3 supported (256, 256)
2110 08:59:36.134022
2111 08:59:36.134172 R8152: Initializing
2112 08:59:36.134241
2113 08:59:36.137281 Version 6 (ocp_data = 5c30)
2114 08:59:36.137365
2115 08:59:36.140716 R8152: Done initializing
2116 08:59:36.140799
2117 08:59:36.143733 Adding net device
2118 08:59:36.445406
2119 08:59:36.448367 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2120 08:59:36.448459
2121 08:59:36.448525
2122 08:59:36.448604
2123 08:59:36.451906 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2125 08:59:36.552302 volteer: tftpboot 192.168.201.1 10183679/tftp-deploy-0l72ilq_/kernel/bzImage 10183679/tftp-deploy-0l72ilq_/kernel/cmdline 10183679/tftp-deploy-0l72ilq_/ramdisk/ramdisk.cpio.gz
2126 08:59:36.552427 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2127 08:59:36.552511 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2128 08:59:36.556867 tftpboot 192.168.201.1 10183679/tftp-deploy-0l72ilq_/kernel/bzIploy-0l72ilq_/kernel/cmdline 10183679/tftp-deploy-0l72ilq_/ramdisk/ramdisk.cpio.gz
2129 08:59:36.556954
2130 08:59:36.557020 Waiting for link
2131 08:59:36.760393
2132 08:59:36.760536 done.
2133 08:59:36.760606
2134 08:59:36.760669 MAC: 00:24:32:30:78:e4
2135 08:59:36.760730
2136 08:59:36.763658 Sending DHCP discover... done.
2137 08:59:36.763765
2138 08:59:36.767274 Waiting for reply... done.
2139 08:59:36.767400
2140 08:59:36.771343 Sending DHCP request... done.
2141 08:59:36.771429
2142 08:59:36.777244 Waiting for reply... done.
2143 08:59:36.777329
2144 08:59:36.777397 My ip is 192.168.201.13
2145 08:59:36.777460
2146 08:59:36.780436 The DHCP server ip is 192.168.201.1
2147 08:59:36.783531
2148 08:59:36.786900 TFTP server IP predefined by user: 192.168.201.1
2149 08:59:36.786985
2150 08:59:36.793450 Bootfile predefined by user: 10183679/tftp-deploy-0l72ilq_/kernel/bzImage
2151 08:59:36.793535
2152 08:59:36.796858 Sending tftp read request... done.
2153 08:59:36.796942
2154 08:59:36.799768 Waiting for the transfer...
2155 08:59:36.803428
2156 08:59:37.364945 00000000 ################################################################
2157 08:59:37.365087
2158 08:59:37.937073 00080000 ################################################################
2159 08:59:37.937213
2160 08:59:38.500036 00100000 ################################################################
2161 08:59:38.500178
2162 08:59:39.069423 00180000 ################################################################
2163 08:59:39.069559
2164 08:59:39.623556 00200000 ################################################################
2165 08:59:39.623697
2166 08:59:40.181310 00280000 ################################################################
2167 08:59:40.181450
2168 08:59:40.731532 00300000 ################################################################
2169 08:59:40.731767
2170 08:59:41.290683 00380000 ################################################################
2171 08:59:41.290831
2172 08:59:41.854211 00400000 ################################################################
2173 08:59:41.854352
2174 08:59:42.416032 00480000 ################################################################
2175 08:59:42.416204
2176 08:59:42.970223 00500000 ################################################################
2177 08:59:42.970367
2178 08:59:43.567124 00580000 ################################################################
2179 08:59:43.567649
2180 08:59:44.274685 00600000 ################################################################
2181 08:59:44.275245
2182 08:59:44.993780 00680000 ################################################################
2183 08:59:44.994321
2184 08:59:45.558616 00700000 ################################################################
2185 08:59:45.558767
2186 08:59:45.575063 00780000 ## done.
2187 08:59:45.575152
2188 08:59:45.578864 The bootfile was 7880592 bytes long.
2189 08:59:45.578951
2190 08:59:45.581790 Sending tftp read request... done.
2191 08:59:45.581877
2192 08:59:45.585167 Waiting for the transfer...
2193 08:59:45.585254
2194 08:59:46.112547 00000000 ################################################################
2195 08:59:46.112698
2196 08:59:46.623830 00080000 ################################################################
2197 08:59:46.623980
2198 08:59:47.134988 00100000 ################################################################
2199 08:59:47.135138
2200 08:59:47.647457 00180000 ################################################################
2201 08:59:47.647605
2202 08:59:48.159267 00200000 ################################################################
2203 08:59:48.159420
2204 08:59:48.672801 00280000 ################################################################
2205 08:59:48.672949
2206 08:59:49.193599 00300000 ################################################################
2207 08:59:49.193768
2208 08:59:49.722104 00380000 ################################################################
2209 08:59:49.722242
2210 08:59:50.240359 00400000 ################################################################
2211 08:59:50.240491
2212 08:59:50.759454 00480000 ################################################################
2213 08:59:50.759593
2214 08:59:51.278513 00500000 ################################################################
2215 08:59:51.278653
2216 08:59:51.802405 00580000 ################################################################
2217 08:59:51.802545
2218 08:59:52.320558 00600000 ################################################################
2219 08:59:52.320699
2220 08:59:52.882284 00680000 ################################################################
2221 08:59:52.882433
2222 08:59:53.421606 00700000 ################################################################
2223 08:59:53.421763
2224 08:59:53.944606 00780000 ################################################################
2225 08:59:53.944752
2226 08:59:54.380044 00800000 ##################################################### done.
2227 08:59:54.380182
2228 08:59:54.383499 Sending tftp read request... done.
2229 08:59:54.383586
2230 08:59:54.386552 Waiting for the transfer...
2231 08:59:54.386637
2232 08:59:54.389841 00000000 # done.
2233 08:59:54.389928
2234 08:59:54.396813 Command line loaded dynamically from TFTP file: 10183679/tftp-deploy-0l72ilq_/kernel/cmdline
2235 08:59:54.396899
2236 08:59:54.409809 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2237 08:59:54.416765
2238 08:59:54.420051 Shutting down all USB controllers.
2239 08:59:54.420136
2240 08:59:54.420222 Removing current net device
2241 08:59:54.420290
2242 08:59:54.423171 Finalizing coreboot
2243 08:59:54.423315
2244 08:59:54.429517 Exiting depthcharge with code 4 at timestamp: 28080872
2245 08:59:54.429601
2246 08:59:54.429668
2247 08:59:54.429730 Starting kernel ...
2248 08:59:54.429798
2249 08:59:54.430370 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2250 08:59:54.430496 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2251 08:59:54.430602 Setting prompt string to ['Linux version [0-9]']
2252 08:59:54.430700 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2253 08:59:54.430797 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2254 08:59:54.432857
2256 09:04:19.431494 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2258 09:04:19.433275 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2260 09:04:19.434635 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2263 09:04:19.435865 end: 2 depthcharge-action (duration 00:05:00) [common]
2265 09:04:19.436083 Cleaning after the job
2266 09:04:19.436172 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10183679/tftp-deploy-0l72ilq_/ramdisk
2267 09:04:19.437239 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10183679/tftp-deploy-0l72ilq_/kernel
2268 09:04:19.438171 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10183679/tftp-deploy-0l72ilq_/modules
2269 09:04:19.438471 start: 5.1 power-off (timeout 00:00:30) [common]
2270 09:04:19.438626 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2271 09:04:19.516642 >> Command sent successfully.
2272 09:04:19.522477 Returned 0 in 0 seconds
2273 09:04:19.623579 end: 5.1 power-off (duration 00:00:00) [common]
2275 09:04:19.625282 start: 5.2 read-feedback (timeout 00:10:00) [common]
2276 09:04:19.626551 Listened to connection for namespace 'common' for up to 1s
2277 09:04:20.627449 Finalising connection for namespace 'common'
2278 09:04:20.628155 Disconnecting from shell: Finalise
2279 09:04:20.628680
2280 09:04:20.729879 end: 5.2 read-feedback (duration 00:00:01) [common]
2281 09:04:20.730544 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10183679
2282 09:04:20.746446 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10183679
2283 09:04:20.746583 JobError: Your job cannot terminate cleanly.