Boot log: asus-C436FA-Flip-hatch

    1 05:30:24.098394  lava-dispatcher, installed at version: 2023.08
    2 05:30:24.098619  start: 0 validate
    3 05:30:24.098755  Start time: 2023-11-05 05:30:24.098747+00:00 (UTC)
    4 05:30:24.098877  Using caching service: 'http://localhost/cache/?uri=%s'
    5 05:30:24.099017  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 05:30:24.367603  Using caching service: 'http://localhost/cache/?uri=%s'
    7 05:30:24.368393  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1872-g0dd3085de20bc%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 05:30:26.370081  Using caching service: 'http://localhost/cache/?uri=%s'
    9 05:30:26.370874  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 05:30:26.631203  Using caching service: 'http://localhost/cache/?uri=%s'
   11 05:30:26.631948  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-1872-g0dd3085de20bc%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 05:30:27.136686  validate duration: 3.04
   14 05:30:27.136977  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 05:30:27.137075  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 05:30:27.137161  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 05:30:27.137289  Not decompressing ramdisk as can be used compressed.
   18 05:30:27.137374  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
   19 05:30:27.137441  saving as /var/lib/lava/dispatcher/tmp/11947810/tftp-deploy-2rx956uf/ramdisk/initrd.cpio.gz
   20 05:30:27.137506  total size: 5432480 (5 MB)
   21 05:30:27.138535  progress   0 % (0 MB)
   22 05:30:27.140181  progress   5 % (0 MB)
   23 05:30:27.141603  progress  10 % (0 MB)
   24 05:30:27.143014  progress  15 % (0 MB)
   25 05:30:27.144663  progress  20 % (1 MB)
   26 05:30:27.146113  progress  25 % (1 MB)
   27 05:30:27.147523  progress  30 % (1 MB)
   28 05:30:27.149121  progress  35 % (1 MB)
   29 05:30:27.150479  progress  40 % (2 MB)
   30 05:30:27.151899  progress  45 % (2 MB)
   31 05:30:27.153260  progress  50 % (2 MB)
   32 05:30:27.154913  progress  55 % (2 MB)
   33 05:30:27.156358  progress  60 % (3 MB)
   34 05:30:27.157819  progress  65 % (3 MB)
   35 05:30:27.159352  progress  70 % (3 MB)
   36 05:30:27.160800  progress  75 % (3 MB)
   37 05:30:27.162323  progress  80 % (4 MB)
   38 05:30:27.163751  progress  85 % (4 MB)
   39 05:30:27.165275  progress  90 % (4 MB)
   40 05:30:27.166825  progress  95 % (4 MB)
   41 05:30:27.168325  progress 100 % (5 MB)
   42 05:30:27.168566  5 MB downloaded in 0.03 s (166.80 MB/s)
   43 05:30:27.168753  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 05:30:27.169040  end: 1.1 download-retry (duration 00:00:00) [common]
   46 05:30:27.169156  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 05:30:27.169244  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 05:30:27.169428  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1872-g0dd3085de20bc/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 05:30:27.169516  saving as /var/lib/lava/dispatcher/tmp/11947810/tftp-deploy-2rx956uf/kernel/bzImage
   50 05:30:27.169591  total size: 8576912 (8 MB)
   51 05:30:27.169681  No compression specified
   52 05:30:27.170802  progress   0 % (0 MB)
   53 05:30:27.173811  progress   5 % (0 MB)
   54 05:30:27.177465  progress  10 % (0 MB)
   55 05:30:27.181340  progress  15 % (1 MB)
   56 05:30:27.185114  progress  20 % (1 MB)
   57 05:30:27.188866  progress  25 % (2 MB)
   58 05:30:27.192578  progress  30 % (2 MB)
   59 05:30:27.196312  progress  35 % (2 MB)
   60 05:30:27.200061  progress  40 % (3 MB)
   61 05:30:27.203855  progress  45 % (3 MB)
   62 05:30:27.207440  progress  50 % (4 MB)
   63 05:30:27.211039  progress  55 % (4 MB)
   64 05:30:27.213838  progress  60 % (4 MB)
   65 05:30:27.216113  progress  65 % (5 MB)
   66 05:30:27.218332  progress  70 % (5 MB)
   67 05:30:27.220720  progress  75 % (6 MB)
   68 05:30:27.223002  progress  80 % (6 MB)
   69 05:30:27.225455  progress  85 % (6 MB)
   70 05:30:27.227830  progress  90 % (7 MB)
   71 05:30:27.230142  progress  95 % (7 MB)
   72 05:30:27.232479  progress 100 % (8 MB)
   73 05:30:27.232729  8 MB downloaded in 0.06 s (129.56 MB/s)
   74 05:30:27.232903  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 05:30:27.233180  end: 1.2 download-retry (duration 00:00:00) [common]
   77 05:30:27.233295  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 05:30:27.233404  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 05:30:27.233569  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
   80 05:30:27.233667  saving as /var/lib/lava/dispatcher/tmp/11947810/tftp-deploy-2rx956uf/nfsrootfs/full.rootfs.tar
   81 05:30:27.233749  total size: 207157356 (197 MB)
   82 05:30:27.233830  Using unxz to decompress xz
   83 05:30:27.238163  progress   0 % (0 MB)
   84 05:30:27.807757  progress   5 % (9 MB)
   85 05:30:28.348128  progress  10 % (19 MB)
   86 05:30:28.984060  progress  15 % (29 MB)
   87 05:30:29.357265  progress  20 % (39 MB)
   88 05:30:29.734384  progress  25 % (49 MB)
   89 05:30:30.355278  progress  30 % (59 MB)
   90 05:30:30.920448  progress  35 % (69 MB)
   91 05:30:31.541414  progress  40 % (79 MB)
   92 05:30:32.115759  progress  45 % (88 MB)
   93 05:30:32.718118  progress  50 % (98 MB)
   94 05:30:33.376292  progress  55 % (108 MB)
   95 05:30:34.092567  progress  60 % (118 MB)
   96 05:30:34.232866  progress  65 % (128 MB)
   97 05:30:34.374896  progress  70 % (138 MB)
   98 05:30:34.472578  progress  75 % (148 MB)
   99 05:30:34.545002  progress  80 % (158 MB)
  100 05:30:34.615985  progress  85 % (167 MB)
  101 05:30:34.718564  progress  90 % (177 MB)
  102 05:30:35.004123  progress  95 % (187 MB)
  103 05:30:35.599158  progress 100 % (197 MB)
  104 05:30:35.605598  197 MB downloaded in 8.37 s (23.60 MB/s)
  105 05:30:35.605889  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 05:30:35.606169  end: 1.3 download-retry (duration 00:00:08) [common]
  108 05:30:35.606262  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 05:30:35.606353  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 05:30:35.606505  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-1872-g0dd3085de20bc/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 05:30:35.606576  saving as /var/lib/lava/dispatcher/tmp/11947810/tftp-deploy-2rx956uf/modules/modules.tar
  112 05:30:35.606638  total size: 250932 (0 MB)
  113 05:30:35.606702  Using unxz to decompress xz
  114 05:30:35.610934  progress  13 % (0 MB)
  115 05:30:35.611336  progress  26 % (0 MB)
  116 05:30:35.611572  progress  39 % (0 MB)
  117 05:30:35.613236  progress  52 % (0 MB)
  118 05:30:35.615123  progress  65 % (0 MB)
  119 05:30:35.617014  progress  78 % (0 MB)
  120 05:30:35.618771  progress  91 % (0 MB)
  121 05:30:35.620724  progress 100 % (0 MB)
  122 05:30:35.626073  0 MB downloaded in 0.02 s (12.32 MB/s)
  123 05:30:35.626318  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 05:30:35.626586  end: 1.4 download-retry (duration 00:00:00) [common]
  126 05:30:35.626685  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  127 05:30:35.626785  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  128 05:30:39.290890  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11947810/extract-nfsrootfs-3gicx51i
  129 05:30:39.291084  end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
  130 05:30:39.291186  start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
  131 05:30:39.291360  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav
  132 05:30:39.291493  makedir: /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin
  133 05:30:39.291597  makedir: /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/tests
  134 05:30:39.291744  makedir: /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/results
  135 05:30:39.291848  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-add-keys
  136 05:30:39.291994  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-add-sources
  137 05:30:39.292129  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-background-process-start
  138 05:30:39.292260  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-background-process-stop
  139 05:30:39.292387  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-common-functions
  140 05:30:39.292514  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-echo-ipv4
  141 05:30:39.292643  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-install-packages
  142 05:30:39.292769  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-installed-packages
  143 05:30:39.292894  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-os-build
  144 05:30:39.293021  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-probe-channel
  145 05:30:39.293147  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-probe-ip
  146 05:30:39.293274  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-target-ip
  147 05:30:39.293400  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-target-mac
  148 05:30:39.293526  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-target-storage
  149 05:30:39.293657  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-test-case
  150 05:30:39.293784  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-test-event
  151 05:30:39.293915  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-test-feedback
  152 05:30:39.294041  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-test-raise
  153 05:30:39.294166  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-test-reference
  154 05:30:39.294326  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-test-runner
  155 05:30:39.294453  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-test-set
  156 05:30:39.294580  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-test-shell
  157 05:30:39.294707  Updating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-add-keys (debian)
  158 05:30:39.294862  Updating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-add-sources (debian)
  159 05:30:39.295007  Updating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-install-packages (debian)
  160 05:30:39.295148  Updating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-installed-packages (debian)
  161 05:30:39.295287  Updating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/bin/lava-os-build (debian)
  162 05:30:39.295409  Creating /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/environment
  163 05:30:39.295506  LAVA metadata
  164 05:30:39.295578  - LAVA_JOB_ID=11947810
  165 05:30:39.295650  - LAVA_DISPATCHER_IP=192.168.201.1
  166 05:30:39.295864  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  167 05:30:39.295965  skipped lava-vland-overlay
  168 05:30:39.296045  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  169 05:30:39.296127  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  170 05:30:39.296191  skipped lava-multinode-overlay
  171 05:30:39.296265  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  172 05:30:39.296344  start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
  173 05:30:39.296418  Loading test definitions
  174 05:30:39.296510  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
  175 05:30:39.296582  Using /lava-11947810 at stage 0
  176 05:30:39.296864  uuid=11947810_1.5.2.3.1 testdef=None
  177 05:30:39.296953  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  178 05:30:39.297040  start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
  179 05:30:39.297489  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  181 05:30:39.297712  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  182 05:30:39.298276  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  184 05:30:39.298509  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  185 05:30:39.299052  runner path: /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/0/tests/0_timesync-off test_uuid 11947810_1.5.2.3.1
  186 05:30:39.299214  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  188 05:30:39.299440  start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
  189 05:30:39.299511  Using /lava-11947810 at stage 0
  190 05:30:39.299608  Fetching tests from https://github.com/kernelci/test-definitions.git
  191 05:30:39.299732  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/0/tests/1_kselftest-filesystems'
  192 05:30:49.309877  Running '/usr/bin/git checkout kernelci.org
  193 05:30:49.461920  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
  194 05:30:49.463016  uuid=11947810_1.5.2.3.5 testdef=None
  195 05:30:49.463232  end: 1.5.2.3.5 git-repo-action (duration 00:00:10) [common]
  197 05:30:49.463716  start: 1.5.2.3.6 test-overlay (timeout 00:09:38) [common]
  198 05:30:49.464965  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  200 05:30:49.465341  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:38) [common]
  201 05:30:49.466989  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  203 05:30:49.467376  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:38) [common]
  204 05:30:49.468995  runner path: /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/0/tests/1_kselftest-filesystems test_uuid 11947810_1.5.2.3.5
  205 05:30:49.469140  BOARD='asus-C436FA-Flip-hatch'
  206 05:30:49.469243  BRANCH='cip'
  207 05:30:49.469344  SKIPFILE='/dev/null'
  208 05:30:49.469434  SKIP_INSTALL='True'
  209 05:30:49.469526  TESTPROG_URL='None'
  210 05:30:49.469626  TST_CASENAME=''
  211 05:30:49.469722  TST_CMDFILES='filesystems'
  212 05:30:49.469940  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  214 05:30:49.470300  Creating lava-test-runner.conf files
  215 05:30:49.470409  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11947810/lava-overlay-83wo_aav/lava-11947810/0 for stage 0
  216 05:30:49.470547  - 0_timesync-off
  217 05:30:49.470657  - 1_kselftest-filesystems
  218 05:30:49.470805  end: 1.5.2.3 test-definition (duration 00:00:10) [common]
  219 05:30:49.470939  start: 1.5.2.4 compress-overlay (timeout 00:09:38) [common]
  220 05:30:57.344979  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  221 05:30:57.345172  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:30) [common]
  222 05:30:57.345263  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  223 05:30:57.345364  end: 1.5.2 lava-overlay (duration 00:00:18) [common]
  224 05:30:57.345457  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
  225 05:30:57.492215  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  226 05:30:57.492601  start: 1.5.4 extract-modules (timeout 00:09:30) [common]
  227 05:30:57.492724  extracting modules file /var/lib/lava/dispatcher/tmp/11947810/tftp-deploy-2rx956uf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11947810/extract-nfsrootfs-3gicx51i
  228 05:30:57.506458  extracting modules file /var/lib/lava/dispatcher/tmp/11947810/tftp-deploy-2rx956uf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11947810/extract-overlay-ramdisk-6y1x9lbv/ramdisk
  229 05:30:57.520338  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  230 05:30:57.520543  start: 1.5.5 apply-overlay-tftp (timeout 00:09:30) [common]
  231 05:30:57.520641  [common] Applying overlay to NFS
  232 05:30:57.520713  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11947810/compress-overlay-0trsm0a5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11947810/extract-nfsrootfs-3gicx51i
  233 05:30:58.512907  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  234 05:30:58.513134  start: 1.5.6 configure-preseed-file (timeout 00:09:29) [common]
  235 05:30:58.513237  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  236 05:30:58.513328  start: 1.5.7 compress-ramdisk (timeout 00:09:29) [common]
  237 05:30:58.513415  Building ramdisk /var/lib/lava/dispatcher/tmp/11947810/extract-overlay-ramdisk-6y1x9lbv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11947810/extract-overlay-ramdisk-6y1x9lbv/ramdisk
  238 05:30:58.668846  >> 26160 blocks

  239 05:30:59.209184  rename /var/lib/lava/dispatcher/tmp/11947810/extract-overlay-ramdisk-6y1x9lbv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11947810/tftp-deploy-2rx956uf/ramdisk/ramdisk.cpio.gz
  240 05:30:59.209673  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  241 05:30:59.209823  start: 1.5.8 prepare-kernel (timeout 00:09:28) [common]
  242 05:30:59.209957  start: 1.5.8.1 prepare-fit (timeout 00:09:28) [common]
  243 05:30:59.210081  No mkimage arch provided, not using FIT.
  244 05:30:59.210173  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  245 05:30:59.210262  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  246 05:30:59.210369  end: 1.5 prepare-tftp-overlay (duration 00:00:24) [common]
  247 05:30:59.210485  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:28) [common]
  248 05:30:59.210592  No LXC device requested
  249 05:30:59.210706  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  250 05:30:59.210827  start: 1.7 deploy-device-env (timeout 00:09:28) [common]
  251 05:30:59.210938  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  252 05:30:59.211045  Checking files for TFTP limit of 4294967296 bytes.
  253 05:30:59.211576  end: 1 tftp-deploy (duration 00:00:32) [common]
  254 05:30:59.211738  start: 2 depthcharge-action (timeout 00:05:00) [common]
  255 05:30:59.211836  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  256 05:30:59.211962  substitutions:
  257 05:30:59.212036  - {DTB}: None
  258 05:30:59.212103  - {INITRD}: 11947810/tftp-deploy-2rx956uf/ramdisk/ramdisk.cpio.gz
  259 05:30:59.212163  - {KERNEL}: 11947810/tftp-deploy-2rx956uf/kernel/bzImage
  260 05:30:59.212220  - {LAVA_MAC}: None
  261 05:30:59.212280  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11947810/extract-nfsrootfs-3gicx51i
  262 05:30:59.212339  - {NFS_SERVER_IP}: 192.168.201.1
  263 05:30:59.212394  - {PRESEED_CONFIG}: None
  264 05:30:59.212448  - {PRESEED_LOCAL}: None
  265 05:30:59.212505  - {RAMDISK}: 11947810/tftp-deploy-2rx956uf/ramdisk/ramdisk.cpio.gz
  266 05:30:59.212562  - {ROOT_PART}: None
  267 05:30:59.212617  - {ROOT}: None
  268 05:30:59.212670  - {SERVER_IP}: 192.168.201.1
  269 05:30:59.212725  - {TEE}: None
  270 05:30:59.212781  Parsed boot commands:
  271 05:30:59.212835  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  272 05:30:59.213017  Parsed boot commands: tftpboot 192.168.201.1 11947810/tftp-deploy-2rx956uf/kernel/bzImage 11947810/tftp-deploy-2rx956uf/kernel/cmdline 11947810/tftp-deploy-2rx956uf/ramdisk/ramdisk.cpio.gz
  273 05:30:59.213106  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  274 05:30:59.213190  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  275 05:30:59.213285  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  276 05:30:59.213373  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  277 05:30:59.213449  Not connected, no need to disconnect.
  278 05:30:59.213527  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  279 05:30:59.213607  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  280 05:30:59.213678  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
  281 05:30:59.217888  Setting prompt string to ['lava-test: # ']
  282 05:30:59.218282  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  283 05:30:59.218396  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  284 05:30:59.218498  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  285 05:30:59.218591  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  286 05:30:59.218819  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
  287 05:31:04.352775  >> Command sent successfully.

  288 05:31:04.355298  Returned 0 in 5 seconds
  289 05:31:04.455770  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  291 05:31:04.456126  end: 2.2.2 reset-device (duration 00:00:05) [common]
  292 05:31:04.456264  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  293 05:31:04.456355  Setting prompt string to 'Starting depthcharge on Helios...'
  294 05:31:04.456430  Changing prompt to 'Starting depthcharge on Helios...'
  295 05:31:04.456501  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  296 05:31:04.456766  [Enter `^Ec?' for help]

  297 05:31:05.077060  

  298 05:31:05.077228  

  299 05:31:05.087922  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  300 05:31:05.091115  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  301 05:31:05.097679  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  302 05:31:05.101101  CPU: AES supported, TXT NOT supported, VT supported

  303 05:31:05.107339  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  304 05:31:05.110913  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  305 05:31:05.117635  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  306 05:31:05.121162  VBOOT: Loading verstage.

  307 05:31:05.124888  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  308 05:31:05.131357  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  309 05:31:05.134430  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  310 05:31:05.137798  CBFS @ c08000 size 3f8000

  311 05:31:05.144147  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  312 05:31:05.147450  CBFS: Locating 'fallback/verstage'

  313 05:31:05.150941  CBFS: Found @ offset 10fb80 size 1072c

  314 05:31:05.151018  

  315 05:31:05.151081  

  316 05:31:05.164475  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  317 05:31:05.178256  Probing TPM: . done!

  318 05:31:05.181691  TPM ready after 0 ms

  319 05:31:05.184842  Connected to device vid:did:rid of 1ae0:0028:00

  320 05:31:05.195330  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  321 05:31:05.198511  Initialized TPM device CR50 revision 0

  322 05:31:05.244248  tlcl_send_startup: Startup return code is 0

  323 05:31:05.244362  TPM: setup succeeded

  324 05:31:05.257120  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  325 05:31:05.261032  Chrome EC: UHEPI supported

  326 05:31:05.264138  Phase 1

  327 05:31:05.267428  FMAP: area GBB found @ c05000 (12288 bytes)

  328 05:31:05.273895  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  329 05:31:05.273984  Phase 2

  330 05:31:05.277348  Phase 3

  331 05:31:05.280989  FMAP: area GBB found @ c05000 (12288 bytes)

  332 05:31:05.287542  VB2:vb2_report_dev_firmware() This is developer signed firmware

  333 05:31:05.293805  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  334 05:31:05.297062  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  335 05:31:05.304084  VB2:vb2_verify_keyblock() Checking keyblock signature...

  336 05:31:05.319468  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  337 05:31:05.322809  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  338 05:31:05.329452  VB2:vb2_verify_fw_preamble() Verifying preamble.

  339 05:31:05.333422  Phase 4

  340 05:31:05.336903  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  341 05:31:05.343654  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  342 05:31:05.523238  VB2:vb2_rsa_verify_digest() Digest check failed!

  343 05:31:05.529613  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  344 05:31:05.529708  Saving nvdata

  345 05:31:05.533015  Reboot requested (10020007)

  346 05:31:05.536243  board_reset() called!

  347 05:31:05.536330  full_reset() called!

  348 05:31:10.044717  

  349 05:31:10.044876  

  350 05:31:10.054581  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  351 05:31:10.057854  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  352 05:31:10.064325  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  353 05:31:10.067457  CPU: AES supported, TXT NOT supported, VT supported

  354 05:31:10.074022  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  355 05:31:10.077364  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  356 05:31:10.084637  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  357 05:31:10.087796  VBOOT: Loading verstage.

  358 05:31:10.091174  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  359 05:31:10.097836  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  360 05:31:10.101074  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  361 05:31:10.104150  CBFS @ c08000 size 3f8000

  362 05:31:10.110425  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  363 05:31:10.113937  CBFS: Locating 'fallback/verstage'

  364 05:31:10.117252  CBFS: Found @ offset 10fb80 size 1072c

  365 05:31:10.120936  

  366 05:31:10.121030  

  367 05:31:10.130973  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  368 05:31:10.145476  Probing TPM: . done!

  369 05:31:10.148649  TPM ready after 0 ms

  370 05:31:10.151802  Connected to device vid:did:rid of 1ae0:0028:00

  371 05:31:10.162119  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  372 05:31:10.165971  Initialized TPM device CR50 revision 0

  373 05:31:10.210153  tlcl_send_startup: Startup return code is 0

  374 05:31:10.210277  TPM: setup succeeded

  375 05:31:10.222764  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  376 05:31:10.227001  Chrome EC: UHEPI supported

  377 05:31:10.229886  Phase 1

  378 05:31:10.233355  FMAP: area GBB found @ c05000 (12288 bytes)

  379 05:31:10.239956  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  380 05:31:10.246502  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  381 05:31:10.249760  Recovery requested (1009000e)

  382 05:31:10.255465  Saving nvdata

  383 05:31:10.261745  tlcl_extend: response is 0

  384 05:31:10.270366  tlcl_extend: response is 0

  385 05:31:10.277698  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  386 05:31:10.280852  CBFS @ c08000 size 3f8000

  387 05:31:10.287772  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  388 05:31:10.291071  CBFS: Locating 'fallback/romstage'

  389 05:31:10.293841  CBFS: Found @ offset 80 size 145fc

  390 05:31:10.297289  Accumulated console time in verstage 98 ms

  391 05:31:10.297376  

  392 05:31:10.297441  

  393 05:31:10.310424  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  394 05:31:10.317280  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  395 05:31:10.320515  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  396 05:31:10.323792  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  397 05:31:10.330398  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  398 05:31:10.333694  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  399 05:31:10.336881  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  400 05:31:10.340446  TCO_STS:   0000 0000

  401 05:31:10.343425  GEN_PMCON: e0015238 00000200

  402 05:31:10.346801  GBLRST_CAUSE: 00000000 00000000

  403 05:31:10.346888  prev_sleep_state 5

  404 05:31:10.350533  Boot Count incremented to 234

  405 05:31:10.357134  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  406 05:31:10.360572  CBFS @ c08000 size 3f8000

  407 05:31:10.367087  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  408 05:31:10.367173  CBFS: Locating 'fspm.bin'

  409 05:31:10.373678  CBFS: Found @ offset 5ffc0 size 71000

  410 05:31:10.376672  Chrome EC: UHEPI supported

  411 05:31:10.383421  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  412 05:31:10.386983  Probing TPM:  done!

  413 05:31:10.393815  Connected to device vid:did:rid of 1ae0:0028:00

  414 05:31:10.403509  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  415 05:31:10.409638  Initialized TPM device CR50 revision 0

  416 05:31:10.418137  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  417 05:31:10.424732  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  418 05:31:10.428066  MRC cache found, size 1948

  419 05:31:10.431526  bootmode is set to: 2

  420 05:31:10.434737  PRMRR disabled by config.

  421 05:31:10.434851  SPD INDEX = 1

  422 05:31:10.441929  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  423 05:31:10.445170  CBFS @ c08000 size 3f8000

  424 05:31:10.451807  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  425 05:31:10.451894  CBFS: Locating 'spd.bin'

  426 05:31:10.455174  CBFS: Found @ offset 5fb80 size 400

  427 05:31:10.458114  SPD: module type is LPDDR3

  428 05:31:10.461552  SPD: module part is 

  429 05:31:10.468080  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  430 05:31:10.471112  SPD: device width 4 bits, bus width 8 bits

  431 05:31:10.474745  SPD: module size is 4096 MB (per channel)

  432 05:31:10.477865  memory slot: 0 configuration done.

  433 05:31:10.481041  memory slot: 2 configuration done.

  434 05:31:10.533197  CBMEM:

  435 05:31:10.536518  IMD: root @ 99fff000 254 entries.

  436 05:31:10.539737  IMD: root @ 99ffec00 62 entries.

  437 05:31:10.543110  External stage cache:

  438 05:31:10.546194  IMD: root @ 9abff000 254 entries.

  439 05:31:10.549464  IMD: root @ 9abfec00 62 entries.

  440 05:31:10.552923  Chrome EC: clear events_b mask to 0x0000000020004000

  441 05:31:10.569255  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  442 05:31:10.582044  tlcl_write: response is 0

  443 05:31:10.591536  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  444 05:31:10.597617  MRC: TPM MRC hash updated successfully.

  445 05:31:10.597712  2 DIMMs found

  446 05:31:10.601050  SMM Memory Map

  447 05:31:10.604786  SMRAM       : 0x9a000000 0x1000000

  448 05:31:10.608087   Subregion 0: 0x9a000000 0xa00000

  449 05:31:10.611451   Subregion 1: 0x9aa00000 0x200000

  450 05:31:10.614563   Subregion 2: 0x9ac00000 0x400000

  451 05:31:10.617769  top_of_ram = 0x9a000000

  452 05:31:10.620983  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  453 05:31:10.627725  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  454 05:31:10.630647  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  455 05:31:10.637480  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  456 05:31:10.640958  CBFS @ c08000 size 3f8000

  457 05:31:10.644153  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  458 05:31:10.647368  CBFS: Locating 'fallback/postcar'

  459 05:31:10.653773  CBFS: Found @ offset 107000 size 4b44

  460 05:31:10.657262  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  461 05:31:10.670163  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  462 05:31:10.673652  Processing 180 relocs. Offset value of 0x97c0c000

  463 05:31:10.681560  Accumulated console time in romstage 285 ms

  464 05:31:10.681669  

  465 05:31:10.681762  

  466 05:31:10.691555  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  467 05:31:10.698121  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  468 05:31:10.701308  CBFS @ c08000 size 3f8000

  469 05:31:10.704599  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  470 05:31:10.711315  CBFS: Locating 'fallback/ramstage'

  471 05:31:10.714800  CBFS: Found @ offset 43380 size 1b9e8

  472 05:31:10.721154  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  473 05:31:10.753327  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  474 05:31:10.756440  Processing 3976 relocs. Offset value of 0x98db0000

  475 05:31:10.763388  Accumulated console time in postcar 52 ms

  476 05:31:10.763482  

  477 05:31:10.763584  

  478 05:31:10.773186  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  479 05:31:10.780067  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  480 05:31:10.783082  WARNING: RO_VPD is uninitialized or empty.

  481 05:31:10.786825  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  482 05:31:10.793117  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  483 05:31:10.793245  Normal boot.

  484 05:31:10.799782  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  485 05:31:10.803105  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  486 05:31:10.806257  CBFS @ c08000 size 3f8000

  487 05:31:10.813340  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  488 05:31:10.816539  CBFS: Locating 'cpu_microcode_blob.bin'

  489 05:31:10.819611  CBFS: Found @ offset 14700 size 2ec00

  490 05:31:10.823320  microcode: sig=0x806ec pf=0x4 revision=0xc9

  491 05:31:10.826556  Skip microcode update

  492 05:31:10.832676  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  493 05:31:10.832769  CBFS @ c08000 size 3f8000

  494 05:31:10.839823  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  495 05:31:10.842778  CBFS: Locating 'fsps.bin'

  496 05:31:10.846101  CBFS: Found @ offset d1fc0 size 35000

  497 05:31:10.871629  Detected 4 core, 8 thread CPU.

  498 05:31:10.874603  Setting up SMI for CPU

  499 05:31:10.878312  IED base = 0x9ac00000

  500 05:31:10.878398  IED size = 0x00400000

  501 05:31:10.881352  Will perform SMM setup.

  502 05:31:10.888194  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  503 05:31:10.895082  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  504 05:31:10.898246  Processing 16 relocs. Offset value of 0x00030000

  505 05:31:10.902053  Attempting to start 7 APs

  506 05:31:10.904899  Waiting for 10ms after sending INIT.

  507 05:31:10.921374  Waiting for 1st SIPI to complete...done.

  508 05:31:10.921467  AP: slot 3 apic_id 1.

  509 05:31:10.927684  Waiting for 2nd SIPI to complete...done.

  510 05:31:10.927771  AP: slot 1 apic_id 3.

  511 05:31:10.930965  AP: slot 4 apic_id 2.

  512 05:31:10.934757  AP: slot 2 apic_id 7.

  513 05:31:10.934849  AP: slot 5 apic_id 6.

  514 05:31:10.937963  AP: slot 6 apic_id 5.

  515 05:31:10.941046  AP: slot 7 apic_id 4.

  516 05:31:10.947589  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  517 05:31:10.954378  Processing 13 relocs. Offset value of 0x00038000

  518 05:31:10.957909  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  519 05:31:10.964782  Installing SMM handler to 0x9a000000

  520 05:31:10.971202  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  521 05:31:10.974176  Processing 658 relocs. Offset value of 0x9a010000

  522 05:31:10.984005  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  523 05:31:10.987444  Processing 13 relocs. Offset value of 0x9a008000

  524 05:31:10.993591  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  525 05:31:11.000491  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  526 05:31:11.007018  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  527 05:31:11.010558  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  528 05:31:11.016923  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  529 05:31:11.023830  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  530 05:31:11.030205  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  531 05:31:11.033329  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  532 05:31:11.037133  Clearing SMI status registers

  533 05:31:11.040421  SMI_STS: PM1 

  534 05:31:11.040506  PM1_STS: PWRBTN 

  535 05:31:11.044091  TCO_STS: SECOND_TO 

  536 05:31:11.047472  New SMBASE 0x9a000000

  537 05:31:11.050479  In relocation handler: CPU 0

  538 05:31:11.054006  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  539 05:31:11.057009  Writing SMRR. base = 0x9a000006, mask=0xff000800

  540 05:31:11.060659  Relocation complete.

  541 05:31:11.063772  New SMBASE 0x99fff400

  542 05:31:11.063857  In relocation handler: CPU 3

  543 05:31:11.070310  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  544 05:31:11.073492  Writing SMRR. base = 0x9a000006, mask=0xff000800

  545 05:31:11.077133  Relocation complete.

  546 05:31:11.080681  New SMBASE 0x99fff800

  547 05:31:11.080767  In relocation handler: CPU 2

  548 05:31:11.086991  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  549 05:31:11.090100  Writing SMRR. base = 0x9a000006, mask=0xff000800

  550 05:31:11.093792  Relocation complete.

  551 05:31:11.093876  New SMBASE 0x99ffec00

  552 05:31:11.097309  In relocation handler: CPU 5

  553 05:31:11.103665  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  554 05:31:11.106963  Writing SMRR. base = 0x9a000006, mask=0xff000800

  555 05:31:11.110134  Relocation complete.

  556 05:31:11.110217  New SMBASE 0x99ffe400

  557 05:31:11.113589  In relocation handler: CPU 7

  558 05:31:11.120190  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  559 05:31:11.123823  Writing SMRR. base = 0x9a000006, mask=0xff000800

  560 05:31:11.127013  Relocation complete.

  561 05:31:11.127098  New SMBASE 0x99ffe800

  562 05:31:11.130287  In relocation handler: CPU 6

  563 05:31:11.133290  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  564 05:31:11.140276  Writing SMRR. base = 0x9a000006, mask=0xff000800

  565 05:31:11.143426  Relocation complete.

  566 05:31:11.143509  New SMBASE 0x99fffc00

  567 05:31:11.147094  In relocation handler: CPU 1

  568 05:31:11.150286  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  569 05:31:11.156780  Writing SMRR. base = 0x9a000006, mask=0xff000800

  570 05:31:11.159866  Relocation complete.

  571 05:31:11.159951  New SMBASE 0x99fff000

  572 05:31:11.163393  In relocation handler: CPU 4

  573 05:31:11.166923  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  574 05:31:11.173093  Writing SMRR. base = 0x9a000006, mask=0xff000800

  575 05:31:11.173179  Relocation complete.

  576 05:31:11.176645  Initializing CPU #0

  577 05:31:11.179782  CPU: vendor Intel device 806ec

  578 05:31:11.183494  CPU: family 06, model 8e, stepping 0c

  579 05:31:11.186443  Clearing out pending MCEs

  580 05:31:11.189831  Setting up local APIC...

  581 05:31:11.189919   apic_id: 0x00 done.

  582 05:31:11.193615  Turbo is available but hidden

  583 05:31:11.196621  Turbo is available and visible

  584 05:31:11.199853  VMX status: enabled

  585 05:31:11.203017  IA32_FEATURE_CONTROL status: locked

  586 05:31:11.206354  Skip microcode update

  587 05:31:11.206438  CPU #0 initialized

  588 05:31:11.209494  Initializing CPU #3

  589 05:31:11.213155  Initializing CPU #4

  590 05:31:11.213239  Initializing CPU #1

  591 05:31:11.216233  CPU: vendor Intel device 806ec

  592 05:31:11.219588  CPU: family 06, model 8e, stepping 0c

  593 05:31:11.223025  CPU: vendor Intel device 806ec

  594 05:31:11.226396  CPU: family 06, model 8e, stepping 0c

  595 05:31:11.229655  Clearing out pending MCEs

  596 05:31:11.233154  Clearing out pending MCEs

  597 05:31:11.235978  Setting up local APIC...

  598 05:31:11.236082  Initializing CPU #7

  599 05:31:11.239855  CPU: vendor Intel device 806ec

  600 05:31:11.242810  CPU: family 06, model 8e, stepping 0c

  601 05:31:11.246010  Clearing out pending MCEs

  602 05:31:11.249709  Initializing CPU #6

  603 05:31:11.253012  CPU: vendor Intel device 806ec

  604 05:31:11.256176  CPU: family 06, model 8e, stepping 0c

  605 05:31:11.259416  CPU: vendor Intel device 806ec

  606 05:31:11.262538  CPU: family 06, model 8e, stepping 0c

  607 05:31:11.266308  Clearing out pending MCEs

  608 05:31:11.269338  Clearing out pending MCEs

  609 05:31:11.269424  Setting up local APIC...

  610 05:31:11.272671  Setting up local APIC...

  611 05:31:11.275597   apic_id: 0x03 done.

  612 05:31:11.275722  Setting up local APIC...

  613 05:31:11.279178   apic_id: 0x01 done.

  614 05:31:11.282799   apic_id: 0x02 done.

  615 05:31:11.282884  VMX status: enabled

  616 05:31:11.285935  VMX status: enabled

  617 05:31:11.289200  IA32_FEATURE_CONTROL status: locked

  618 05:31:11.292226  IA32_FEATURE_CONTROL status: locked

  619 05:31:11.295947  Skip microcode update

  620 05:31:11.298975   apic_id: 0x04 done.

  621 05:31:11.299061  Setting up local APIC...

  622 05:31:11.302575  Initializing CPU #5

  623 05:31:11.305817  Initializing CPU #2

  624 05:31:11.305901  CPU: vendor Intel device 806ec

  625 05:31:11.312436  CPU: family 06, model 8e, stepping 0c

  626 05:31:11.312522  VMX status: enabled

  627 05:31:11.315497   apic_id: 0x05 done.

  628 05:31:11.318756  CPU: vendor Intel device 806ec

  629 05:31:11.322442  CPU: family 06, model 8e, stepping 0c

  630 05:31:11.325467  Clearing out pending MCEs

  631 05:31:11.329182  Clearing out pending MCEs

  632 05:31:11.329266  Setting up local APIC...

  633 05:31:11.332163  CPU #1 initialized

  634 05:31:11.335714  Skip microcode update

  635 05:31:11.338449  IA32_FEATURE_CONTROL status: locked

  636 05:31:11.338533  VMX status: enabled

  637 05:31:11.341916  Skip microcode update

  638 05:31:11.345567  IA32_FEATURE_CONTROL status: locked

  639 05:31:11.348809  CPU #7 initialized

  640 05:31:11.348928  Skip microcode update

  641 05:31:11.352251  Setting up local APIC...

  642 05:31:11.355530  CPU #4 initialized

  643 05:31:11.355661   apic_id: 0x06 done.

  644 05:31:11.358909   apic_id: 0x07 done.

  645 05:31:11.361812  VMX status: enabled

  646 05:31:11.361896  VMX status: enabled

  647 05:31:11.365504  IA32_FEATURE_CONTROL status: locked

  648 05:31:11.368724  IA32_FEATURE_CONTROL status: locked

  649 05:31:11.372548  Skip microcode update

  650 05:31:11.375537  Skip microcode update

  651 05:31:11.375706  CPU #5 initialized

  652 05:31:11.379148  CPU #2 initialized

  653 05:31:11.379283  CPU #6 initialized

  654 05:31:11.382151  VMX status: enabled

  655 05:31:11.385741  IA32_FEATURE_CONTROL status: locked

  656 05:31:11.388707  Skip microcode update

  657 05:31:11.388831  CPU #3 initialized

  658 05:31:11.395694  bsp_do_flight_plan done after 465 msecs.

  659 05:31:11.398927  CPU: frequency set to 4200 MHz

  660 05:31:11.399037  Enabling SMIs.

  661 05:31:11.399107  Locking SMM.

  662 05:31:11.415054  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  663 05:31:11.418340  CBFS @ c08000 size 3f8000

  664 05:31:11.425415  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  665 05:31:11.425504  CBFS: Locating 'vbt.bin'

  666 05:31:11.428478  CBFS: Found @ offset 5f5c0 size 499

  667 05:31:11.435212  Found a VBT of 4608 bytes after decompression

  668 05:31:11.616526  Display FSP Version Info HOB

  669 05:31:11.620221  Reference Code - CPU = 9.0.1e.30

  670 05:31:11.623470  uCode Version = 0.0.0.ca

  671 05:31:11.626693  TXT ACM version = ff.ff.ff.ffff

  672 05:31:11.630149  Display FSP Version Info HOB

  673 05:31:11.633135  Reference Code - ME = 9.0.1e.30

  674 05:31:11.636952  MEBx version = 0.0.0.0

  675 05:31:11.640129  ME Firmware Version = Consumer SKU

  676 05:31:11.643263  Display FSP Version Info HOB

  677 05:31:11.646459  Reference Code - CML PCH = 9.0.1e.30

  678 05:31:11.650170  PCH-CRID Status = Disabled

  679 05:31:11.653259  PCH-CRID Original Value = ff.ff.ff.ffff

  680 05:31:11.656342  PCH-CRID New Value = ff.ff.ff.ffff

  681 05:31:11.659758  OPROM - RST - RAID = ff.ff.ff.ffff

  682 05:31:11.662961  ChipsetInit Base Version = ff.ff.ff.ffff

  683 05:31:11.666408  ChipsetInit Oem Version = ff.ff.ff.ffff

  684 05:31:11.669555  Display FSP Version Info HOB

  685 05:31:11.676609  Reference Code - SA - System Agent = 9.0.1e.30

  686 05:31:11.679525  Reference Code - MRC = 0.7.1.6c

  687 05:31:11.679612  SA - PCIe Version = 9.0.1e.30

  688 05:31:11.682868  SA-CRID Status = Disabled

  689 05:31:11.686529  SA-CRID Original Value = 0.0.0.c

  690 05:31:11.689653  SA-CRID New Value = 0.0.0.c

  691 05:31:11.692639  OPROM - VBIOS = ff.ff.ff.ffff

  692 05:31:11.696407  RTC Init

  693 05:31:11.699526  Set power on after power failure.

  694 05:31:11.699615  Disabling Deep S3

  695 05:31:11.702587  Disabling Deep S3

  696 05:31:11.702687  Disabling Deep S4

  697 05:31:11.706588  Disabling Deep S4

  698 05:31:11.706664  Disabling Deep S5

  699 05:31:11.709833  Disabling Deep S5

  700 05:31:11.716027  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1

  701 05:31:11.716113  Enumerating buses...

  702 05:31:11.722712  Show all devs... Before device enumeration.

  703 05:31:11.722799  Root Device: enabled 1

  704 05:31:11.725848  CPU_CLUSTER: 0: enabled 1

  705 05:31:11.729176  DOMAIN: 0000: enabled 1

  706 05:31:11.732743  APIC: 00: enabled 1

  707 05:31:11.732832  PCI: 00:00.0: enabled 1

  708 05:31:11.736046  PCI: 00:02.0: enabled 1

  709 05:31:11.739115  PCI: 00:04.0: enabled 0

  710 05:31:11.742950  PCI: 00:05.0: enabled 0

  711 05:31:11.743063  PCI: 00:12.0: enabled 1

  712 05:31:11.745940  PCI: 00:12.5: enabled 0

  713 05:31:11.749493  PCI: 00:12.6: enabled 0

  714 05:31:11.749593  PCI: 00:14.0: enabled 1

  715 05:31:11.752639  PCI: 00:14.1: enabled 0

  716 05:31:11.756008  PCI: 00:14.3: enabled 1

  717 05:31:11.759277  PCI: 00:14.5: enabled 0

  718 05:31:11.759368  PCI: 00:15.0: enabled 1

  719 05:31:11.762708  PCI: 00:15.1: enabled 1

  720 05:31:11.766079  PCI: 00:15.2: enabled 0

  721 05:31:11.769250  PCI: 00:15.3: enabled 0

  722 05:31:11.769340  PCI: 00:16.0: enabled 1

  723 05:31:11.772520  PCI: 00:16.1: enabled 0

  724 05:31:11.776172  PCI: 00:16.2: enabled 0

  725 05:31:11.776264  PCI: 00:16.3: enabled 0

  726 05:31:11.779382  PCI: 00:16.4: enabled 0

  727 05:31:11.782536  PCI: 00:16.5: enabled 0

  728 05:31:11.785751  PCI: 00:17.0: enabled 1

  729 05:31:11.785837  PCI: 00:19.0: enabled 1

  730 05:31:11.789433  PCI: 00:19.1: enabled 0

  731 05:31:11.792316  PCI: 00:19.2: enabled 0

  732 05:31:11.795566  PCI: 00:1a.0: enabled 0

  733 05:31:11.795675  PCI: 00:1c.0: enabled 0

  734 05:31:11.798844  PCI: 00:1c.1: enabled 0

  735 05:31:11.802333  PCI: 00:1c.2: enabled 0

  736 05:31:11.805939  PCI: 00:1c.3: enabled 0

  737 05:31:11.806025  PCI: 00:1c.4: enabled 0

  738 05:31:11.808946  PCI: 00:1c.5: enabled 0

  739 05:31:11.812047  PCI: 00:1c.6: enabled 0

  740 05:31:11.815982  PCI: 00:1c.7: enabled 0

  741 05:31:11.816087  PCI: 00:1d.0: enabled 1

  742 05:31:11.819053  PCI: 00:1d.1: enabled 0

  743 05:31:11.822365  PCI: 00:1d.2: enabled 0

  744 05:31:11.822456  PCI: 00:1d.3: enabled 0

  745 05:31:11.825351  PCI: 00:1d.4: enabled 0

  746 05:31:11.829161  PCI: 00:1d.5: enabled 1

  747 05:31:11.832369  PCI: 00:1e.0: enabled 1

  748 05:31:11.832459  PCI: 00:1e.1: enabled 0

  749 05:31:11.835504  PCI: 00:1e.2: enabled 1

  750 05:31:11.838698  PCI: 00:1e.3: enabled 1

  751 05:31:11.842588  PCI: 00:1f.0: enabled 1

  752 05:31:11.842691  PCI: 00:1f.1: enabled 1

  753 05:31:11.845653  PCI: 00:1f.2: enabled 1

  754 05:31:11.848816  PCI: 00:1f.3: enabled 1

  755 05:31:11.852124  PCI: 00:1f.4: enabled 1

  756 05:31:11.852212  PCI: 00:1f.5: enabled 1

  757 05:31:11.855317  PCI: 00:1f.6: enabled 0

  758 05:31:11.858454  USB0 port 0: enabled 1

  759 05:31:11.858563  I2C: 00:15: enabled 1

  760 05:31:11.862084  I2C: 00:5d: enabled 1

  761 05:31:11.865077  GENERIC: 0.0: enabled 1

  762 05:31:11.865179  I2C: 00:1a: enabled 1

  763 05:31:11.868506  I2C: 00:38: enabled 1

  764 05:31:11.872142  I2C: 00:39: enabled 1

  765 05:31:11.875349  I2C: 00:3a: enabled 1

  766 05:31:11.875454  I2C: 00:3b: enabled 1

  767 05:31:11.878389  PCI: 00:00.0: enabled 1

  768 05:31:11.881824  SPI: 00: enabled 1

  769 05:31:11.881941  SPI: 01: enabled 1

  770 05:31:11.885200  PNP: 0c09.0: enabled 1

  771 05:31:11.888473  USB2 port 0: enabled 1

  772 05:31:11.888560  USB2 port 1: enabled 1

  773 05:31:11.892172  USB2 port 2: enabled 0

  774 05:31:11.895277  USB2 port 3: enabled 0

  775 05:31:11.895362  USB2 port 5: enabled 0

  776 05:31:11.898425  USB2 port 6: enabled 1

  777 05:31:11.901594  USB2 port 9: enabled 1

  778 05:31:11.901680  USB3 port 0: enabled 1

  779 05:31:11.905244  USB3 port 1: enabled 1

  780 05:31:11.908148  USB3 port 2: enabled 1

  781 05:31:11.911406  USB3 port 3: enabled 1

  782 05:31:11.911494  USB3 port 4: enabled 0

  783 05:31:11.915119  APIC: 03: enabled 1

  784 05:31:11.918207  APIC: 07: enabled 1

  785 05:31:11.918293  APIC: 01: enabled 1

  786 05:31:11.921497  APIC: 02: enabled 1

  787 05:31:11.921585  APIC: 06: enabled 1

  788 05:31:11.924988  APIC: 05: enabled 1

  789 05:31:11.928404  APIC: 04: enabled 1

  790 05:31:11.928490  Compare with tree...

  791 05:31:11.931449  Root Device: enabled 1

  792 05:31:11.934605   CPU_CLUSTER: 0: enabled 1

  793 05:31:11.934691    APIC: 00: enabled 1

  794 05:31:11.938422    APIC: 03: enabled 1

  795 05:31:11.941760    APIC: 07: enabled 1

  796 05:31:11.941845    APIC: 01: enabled 1

  797 05:31:11.944829    APIC: 02: enabled 1

  798 05:31:11.948081    APIC: 06: enabled 1

  799 05:31:11.948167    APIC: 05: enabled 1

  800 05:31:11.951822    APIC: 04: enabled 1

  801 05:31:11.955017   DOMAIN: 0000: enabled 1

  802 05:31:11.958174    PCI: 00:00.0: enabled 1

  803 05:31:11.961288    PCI: 00:02.0: enabled 1

  804 05:31:11.961379    PCI: 00:04.0: enabled 0

  805 05:31:11.964409    PCI: 00:05.0: enabled 0

  806 05:31:11.968208    PCI: 00:12.0: enabled 1

  807 05:31:11.971335    PCI: 00:12.5: enabled 0

  808 05:31:11.971449    PCI: 00:12.6: enabled 0

  809 05:31:11.974904    PCI: 00:14.0: enabled 1

  810 05:31:11.977986     USB0 port 0: enabled 1

  811 05:31:11.981185      USB2 port 0: enabled 1

  812 05:31:11.984397      USB2 port 1: enabled 1

  813 05:31:11.987712      USB2 port 2: enabled 0

  814 05:31:11.987828      USB2 port 3: enabled 0

  815 05:31:11.991420      USB2 port 5: enabled 0

  816 05:31:11.994328      USB2 port 6: enabled 1

  817 05:31:11.997935      USB2 port 9: enabled 1

  818 05:31:12.001335      USB3 port 0: enabled 1

  819 05:31:12.001435      USB3 port 1: enabled 1

  820 05:31:12.004336      USB3 port 2: enabled 1

  821 05:31:12.007457      USB3 port 3: enabled 1

  822 05:31:12.011327      USB3 port 4: enabled 0

  823 05:31:12.014542    PCI: 00:14.1: enabled 0

  824 05:31:12.017803    PCI: 00:14.3: enabled 1

  825 05:31:12.017890    PCI: 00:14.5: enabled 0

  826 05:31:12.020942    PCI: 00:15.0: enabled 1

  827 05:31:12.024241     I2C: 00:15: enabled 1

  828 05:31:12.027689    PCI: 00:15.1: enabled 1

  829 05:31:12.027776     I2C: 00:5d: enabled 1

  830 05:31:12.031375     GENERIC: 0.0: enabled 1

  831 05:31:12.034558    PCI: 00:15.2: enabled 0

  832 05:31:12.037282    PCI: 00:15.3: enabled 0

  833 05:31:12.041040    PCI: 00:16.0: enabled 1

  834 05:31:12.041128    PCI: 00:16.1: enabled 0

  835 05:31:12.044005    PCI: 00:16.2: enabled 0

  836 05:31:12.047332    PCI: 00:16.3: enabled 0

  837 05:31:12.050657    PCI: 00:16.4: enabled 0

  838 05:31:12.053864    PCI: 00:16.5: enabled 0

  839 05:31:12.053949    PCI: 00:17.0: enabled 1

  840 05:31:12.057444    PCI: 00:19.0: enabled 1

  841 05:31:12.060611     I2C: 00:1a: enabled 1

  842 05:31:12.063799     I2C: 00:38: enabled 1

  843 05:31:12.063885     I2C: 00:39: enabled 1

  844 05:31:12.067768     I2C: 00:3a: enabled 1

  845 05:31:12.070629     I2C: 00:3b: enabled 1

  846 05:31:12.073921    PCI: 00:19.1: enabled 0

  847 05:31:12.077079    PCI: 00:19.2: enabled 0

  848 05:31:12.077189    PCI: 00:1a.0: enabled 0

  849 05:31:12.080596    PCI: 00:1c.0: enabled 0

  850 05:31:12.083632    PCI: 00:1c.1: enabled 0

  851 05:31:12.087300    PCI: 00:1c.2: enabled 0

  852 05:31:12.090458    PCI: 00:1c.3: enabled 0

  853 05:31:12.090543    PCI: 00:1c.4: enabled 0

  854 05:31:12.093709    PCI: 00:1c.5: enabled 0

  855 05:31:12.097322    PCI: 00:1c.6: enabled 0

  856 05:31:12.100450    PCI: 00:1c.7: enabled 0

  857 05:31:12.103578    PCI: 00:1d.0: enabled 1

  858 05:31:12.103717    PCI: 00:1d.1: enabled 0

  859 05:31:12.107198    PCI: 00:1d.2: enabled 0

  860 05:31:12.110092    PCI: 00:1d.3: enabled 0

  861 05:31:12.113495    PCI: 00:1d.4: enabled 0

  862 05:31:12.116747    PCI: 00:1d.5: enabled 1

  863 05:31:12.116832     PCI: 00:00.0: enabled 1

  864 05:31:12.120491    PCI: 00:1e.0: enabled 1

  865 05:31:12.123675    PCI: 00:1e.1: enabled 0

  866 05:31:12.127064    PCI: 00:1e.2: enabled 1

  867 05:31:12.127148     SPI: 00: enabled 1

  868 05:31:12.130046    PCI: 00:1e.3: enabled 1

  869 05:31:12.133249     SPI: 01: enabled 1

  870 05:31:12.137089    PCI: 00:1f.0: enabled 1

  871 05:31:12.137173     PNP: 0c09.0: enabled 1

  872 05:31:12.140276    PCI: 00:1f.1: enabled 1

  873 05:31:12.143476    PCI: 00:1f.2: enabled 1

  874 05:31:12.146617    PCI: 00:1f.3: enabled 1

  875 05:31:12.150330    PCI: 00:1f.4: enabled 1

  876 05:31:12.150415    PCI: 00:1f.5: enabled 1

  877 05:31:12.153496    PCI: 00:1f.6: enabled 0

  878 05:31:12.156510  Root Device scanning...

  879 05:31:12.160078  scan_static_bus for Root Device

  880 05:31:12.163148  CPU_CLUSTER: 0 enabled

  881 05:31:12.163233  DOMAIN: 0000 enabled

  882 05:31:12.166634  DOMAIN: 0000 scanning...

  883 05:31:12.170277  PCI: pci_scan_bus for bus 00

  884 05:31:12.173275  PCI: 00:00.0 [8086/0000] ops

  885 05:31:12.177107  PCI: 00:00.0 [8086/9b61] enabled

  886 05:31:12.180036  PCI: 00:02.0 [8086/0000] bus ops

  887 05:31:12.183590  PCI: 00:02.0 [8086/9b41] enabled

  888 05:31:12.186663  PCI: 00:04.0 [8086/1903] disabled

  889 05:31:12.189659  PCI: 00:08.0 [8086/1911] enabled

  890 05:31:12.193037  PCI: 00:12.0 [8086/02f9] enabled

  891 05:31:12.200511  PCI: 00:14.0 [8086/0000] bus ops

  892 05:31:12.200657  PCI: 00:14.0 [8086/02ed] enabled

  893 05:31:12.203378  PCI: 00:14.2 [8086/02ef] enabled

  894 05:31:12.206529  PCI: 00:14.3 [8086/02f0] enabled

  895 05:31:12.209702  PCI: 00:15.0 [8086/0000] bus ops

  896 05:31:12.212936  PCI: 00:15.0 [8086/02e8] enabled

  897 05:31:12.216681  PCI: 00:15.1 [8086/0000] bus ops

  898 05:31:12.219425  PCI: 00:15.1 [8086/02e9] enabled

  899 05:31:12.222888  PCI: 00:16.0 [8086/0000] ops

  900 05:31:12.226624  PCI: 00:16.0 [8086/02e0] enabled

  901 05:31:12.229525  PCI: 00:17.0 [8086/0000] ops

  902 05:31:12.233181  PCI: 00:17.0 [8086/02d3] enabled

  903 05:31:12.236362  PCI: 00:19.0 [8086/0000] bus ops

  904 05:31:12.239983  PCI: 00:19.0 [8086/02c5] enabled

  905 05:31:12.242901  PCI: 00:1d.0 [8086/0000] bus ops

  906 05:31:12.246626  PCI: 00:1d.0 [8086/02b0] enabled

  907 05:31:12.252718  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  908 05:31:12.252810  PCI: 00:1e.0 [8086/0000] ops

  909 05:31:12.256547  PCI: 00:1e.0 [8086/02a8] enabled

  910 05:31:12.259526  PCI: 00:1e.2 [8086/0000] bus ops

  911 05:31:12.262611  PCI: 00:1e.2 [8086/02aa] enabled

  912 05:31:12.266306  PCI: 00:1e.3 [8086/0000] bus ops

  913 05:31:12.269477  PCI: 00:1e.3 [8086/02ab] enabled

  914 05:31:12.272812  PCI: 00:1f.0 [8086/0000] bus ops

  915 05:31:12.276171  PCI: 00:1f.0 [8086/0284] enabled

  916 05:31:12.282969  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  917 05:31:12.289392  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  918 05:31:12.292902  PCI: 00:1f.3 [8086/0000] bus ops

  919 05:31:12.296156  PCI: 00:1f.3 [8086/02c8] enabled

  920 05:31:12.299949  PCI: 00:1f.4 [8086/0000] bus ops

  921 05:31:12.302775  PCI: 00:1f.4 [8086/02a3] enabled

  922 05:31:12.306096  PCI: 00:1f.5 [8086/0000] bus ops

  923 05:31:12.309113  PCI: 00:1f.5 [8086/02a4] enabled

  924 05:31:12.312611  PCI: Leftover static devices:

  925 05:31:12.312698  PCI: 00:05.0

  926 05:31:12.316054  PCI: 00:12.5

  927 05:31:12.316140  PCI: 00:12.6

  928 05:31:12.316223  PCI: 00:14.1

  929 05:31:12.319205  PCI: 00:14.5

  930 05:31:12.319290  PCI: 00:15.2

  931 05:31:12.322476  PCI: 00:15.3

  932 05:31:12.322576  PCI: 00:16.1

  933 05:31:12.322643  PCI: 00:16.2

  934 05:31:12.326204  PCI: 00:16.3

  935 05:31:12.326292  PCI: 00:16.4

  936 05:31:12.329215  PCI: 00:16.5

  937 05:31:12.329299  PCI: 00:19.1

  938 05:31:12.332581  PCI: 00:19.2

  939 05:31:12.332667  PCI: 00:1a.0

  940 05:31:12.332734  PCI: 00:1c.0

  941 05:31:12.335879  PCI: 00:1c.1

  942 05:31:12.335983  PCI: 00:1c.2

  943 05:31:12.339376  PCI: 00:1c.3

  944 05:31:12.339462  PCI: 00:1c.4

  945 05:31:12.339558  PCI: 00:1c.5

  946 05:31:12.342697  PCI: 00:1c.6

  947 05:31:12.342782  PCI: 00:1c.7

  948 05:31:12.345724  PCI: 00:1d.1

  949 05:31:12.345810  PCI: 00:1d.2

  950 05:31:12.345877  PCI: 00:1d.3

  951 05:31:12.349403  PCI: 00:1d.4

  952 05:31:12.349488  PCI: 00:1d.5

  953 05:31:12.352712  PCI: 00:1e.1

  954 05:31:12.352797  PCI: 00:1f.1

  955 05:31:12.355823  PCI: 00:1f.2

  956 05:31:12.355908  PCI: 00:1f.6

  957 05:31:12.359576  PCI: Check your devicetree.cb.

  958 05:31:12.362665  PCI: 00:02.0 scanning...

  959 05:31:12.365909  scan_generic_bus for PCI: 00:02.0

  960 05:31:12.368967  scan_generic_bus for PCI: 00:02.0 done

  961 05:31:12.375928  scan_bus: scanning of bus PCI: 00:02.0 took 10200 usecs

  962 05:31:12.376017  PCI: 00:14.0 scanning...

  963 05:31:12.379197  scan_static_bus for PCI: 00:14.0

  964 05:31:12.382180  USB0 port 0 enabled

  965 05:31:12.386227  USB0 port 0 scanning...

  966 05:31:12.389254  scan_static_bus for USB0 port 0

  967 05:31:12.389339  USB2 port 0 enabled

  968 05:31:12.392324  USB2 port 1 enabled

  969 05:31:12.395553  USB2 port 2 disabled

  970 05:31:12.395649  USB2 port 3 disabled

  971 05:31:12.398807  USB2 port 5 disabled

  972 05:31:12.402667  USB2 port 6 enabled

  973 05:31:12.402753  USB2 port 9 enabled

  974 05:31:12.405709  USB3 port 0 enabled

  975 05:31:12.405796  USB3 port 1 enabled

  976 05:31:12.408884  USB3 port 2 enabled

  977 05:31:12.412561  USB3 port 3 enabled

  978 05:31:12.412647  USB3 port 4 disabled

  979 05:31:12.415739  USB2 port 0 scanning...

  980 05:31:12.418953  scan_static_bus for USB2 port 0

  981 05:31:12.422341  scan_static_bus for USB2 port 0 done

  982 05:31:12.428932  scan_bus: scanning of bus USB2 port 0 took 9693 usecs

  983 05:31:12.432098  USB2 port 1 scanning...

  984 05:31:12.435549  scan_static_bus for USB2 port 1

  985 05:31:12.439034  scan_static_bus for USB2 port 1 done

  986 05:31:12.441988  scan_bus: scanning of bus USB2 port 1 took 9699 usecs

  987 05:31:12.445333  USB2 port 6 scanning...

  988 05:31:12.449338  scan_static_bus for USB2 port 6

  989 05:31:12.452201  scan_static_bus for USB2 port 6 done

  990 05:31:12.459214  scan_bus: scanning of bus USB2 port 6 took 9709 usecs

  991 05:31:12.462055  USB2 port 9 scanning...

  992 05:31:12.465289  scan_static_bus for USB2 port 9

  993 05:31:12.469073  scan_static_bus for USB2 port 9 done

  994 05:31:12.471904  scan_bus: scanning of bus USB2 port 9 took 9707 usecs

  995 05:31:12.475790  USB3 port 0 scanning...

  996 05:31:12.479166  scan_static_bus for USB3 port 0

  997 05:31:12.482376  scan_static_bus for USB3 port 0 done

  998 05:31:12.488555  scan_bus: scanning of bus USB3 port 0 took 9710 usecs

  999 05:31:12.491632  USB3 port 1 scanning...

 1000 05:31:12.495412  scan_static_bus for USB3 port 1

 1001 05:31:12.498653  scan_static_bus for USB3 port 1 done

 1002 05:31:12.501830  scan_bus: scanning of bus USB3 port 1 took 9700 usecs

 1003 05:31:12.505458  USB3 port 2 scanning...

 1004 05:31:12.508576  scan_static_bus for USB3 port 2

 1005 05:31:12.511668  scan_static_bus for USB3 port 2 done

 1006 05:31:12.518660  scan_bus: scanning of bus USB3 port 2 took 9707 usecs

 1007 05:31:12.521721  USB3 port 3 scanning...

 1008 05:31:12.524975  scan_static_bus for USB3 port 3

 1009 05:31:12.529098  scan_static_bus for USB3 port 3 done

 1010 05:31:12.534994  scan_bus: scanning of bus USB3 port 3 took 9710 usecs

 1011 05:31:12.538698  scan_static_bus for USB0 port 0 done

 1012 05:31:12.541700  scan_bus: scanning of bus USB0 port 0 took 155427 usecs

 1013 05:31:12.544827  scan_static_bus for PCI: 00:14.0 done

 1014 05:31:12.551487  scan_bus: scanning of bus PCI: 00:14.0 took 173051 usecs

 1015 05:31:12.555276  PCI: 00:15.0 scanning...

 1016 05:31:12.558494  scan_generic_bus for PCI: 00:15.0

 1017 05:31:12.561486  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1018 05:31:12.565269  scan_generic_bus for PCI: 00:15.0 done

 1019 05:31:12.571783  scan_bus: scanning of bus PCI: 00:15.0 took 14302 usecs

 1020 05:31:12.575281  PCI: 00:15.1 scanning...

 1021 05:31:12.578409  scan_generic_bus for PCI: 00:15.1

 1022 05:31:12.581804  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1023 05:31:12.588152  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1024 05:31:12.591293  scan_generic_bus for PCI: 00:15.1 done

 1025 05:31:12.595252  scan_bus: scanning of bus PCI: 00:15.1 took 18678 usecs

 1026 05:31:12.598220  PCI: 00:19.0 scanning...

 1027 05:31:12.601379  scan_generic_bus for PCI: 00:19.0

 1028 05:31:12.605143  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1029 05:31:12.611554  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1030 05:31:12.614974  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1031 05:31:12.617869  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1032 05:31:12.621244  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1033 05:31:12.628346  scan_generic_bus for PCI: 00:19.0 done

 1034 05:31:12.631446  scan_bus: scanning of bus PCI: 00:19.0 took 30739 usecs

 1035 05:31:12.634617  PCI: 00:1d.0 scanning...

 1036 05:31:12.637786  do_pci_scan_bridge for PCI: 00:1d.0

 1037 05:31:12.641482  PCI: pci_scan_bus for bus 01

 1038 05:31:12.644512  PCI: 01:00.0 [1c5c/1327] enabled

 1039 05:31:12.648146  Enabling Common Clock Configuration

 1040 05:31:12.654343  L1 Sub-State supported from root port 29

 1041 05:31:12.654429  L1 Sub-State Support = 0xf

 1042 05:31:12.658220  CommonModeRestoreTime = 0x28

 1043 05:31:12.664576  Power On Value = 0x16, Power On Scale = 0x0

 1044 05:31:12.664665  ASPM: Enabled L1

 1045 05:31:12.671122  scan_bus: scanning of bus PCI: 00:1d.0 took 32801 usecs

 1046 05:31:12.674747  PCI: 00:1e.2 scanning...

 1047 05:31:12.678001  scan_generic_bus for PCI: 00:1e.2

 1048 05:31:12.681048  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1049 05:31:12.684229  scan_generic_bus for PCI: 00:1e.2 done

 1050 05:31:12.690807  scan_bus: scanning of bus PCI: 00:1e.2 took 14015 usecs

 1051 05:31:12.690894  PCI: 00:1e.3 scanning...

 1052 05:31:12.697564  scan_generic_bus for PCI: 00:1e.3

 1053 05:31:12.701397  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1054 05:31:12.704457  scan_generic_bus for PCI: 00:1e.3 done

 1055 05:31:12.708077  scan_bus: scanning of bus PCI: 00:1e.3 took 14016 usecs

 1056 05:31:12.711329  PCI: 00:1f.0 scanning...

 1057 05:31:12.714326  scan_static_bus for PCI: 00:1f.0

 1058 05:31:12.717583  PNP: 0c09.0 enabled

 1059 05:31:12.720855  scan_static_bus for PCI: 00:1f.0 done

 1060 05:31:12.727863  scan_bus: scanning of bus PCI: 00:1f.0 took 12048 usecs

 1061 05:31:12.731145  PCI: 00:1f.3 scanning...

 1062 05:31:12.734246  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1063 05:31:12.737455  PCI: 00:1f.4 scanning...

 1064 05:31:12.741196  scan_generic_bus for PCI: 00:1f.4

 1065 05:31:12.744318  scan_generic_bus for PCI: 00:1f.4 done

 1066 05:31:12.750615  scan_bus: scanning of bus PCI: 00:1f.4 took 10189 usecs

 1067 05:31:12.754441  PCI: 00:1f.5 scanning...

 1068 05:31:12.757495  scan_generic_bus for PCI: 00:1f.5

 1069 05:31:12.760776  scan_generic_bus for PCI: 00:1f.5 done

 1070 05:31:12.767568  scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs

 1071 05:31:12.770578  scan_bus: scanning of bus DOMAIN: 0000 took 605310 usecs

 1072 05:31:12.777457  scan_static_bus for Root Device done

 1073 05:31:12.780545  scan_bus: scanning of bus Root Device took 625182 usecs

 1074 05:31:12.783680  done

 1075 05:31:12.783777  Chrome EC: UHEPI supported

 1076 05:31:12.791057  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1077 05:31:12.797132  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1078 05:31:12.804189  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1079 05:31:12.810505  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1080 05:31:12.813999  SPI flash protection: WPSW=0 SRP0=0

 1081 05:31:12.820731  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1082 05:31:12.824105  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1083 05:31:12.827021  found VGA at PCI: 00:02.0

 1084 05:31:12.830480  Setting up VGA for PCI: 00:02.0

 1085 05:31:12.837016  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1086 05:31:12.840201  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1087 05:31:12.843564  Allocating resources...

 1088 05:31:12.843691  Reading resources...

 1089 05:31:12.850274  Root Device read_resources bus 0 link: 0

 1090 05:31:12.853462  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1091 05:31:12.860414  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1092 05:31:12.863445  DOMAIN: 0000 read_resources bus 0 link: 0

 1093 05:31:12.870388  PCI: 00:14.0 read_resources bus 0 link: 0

 1094 05:31:12.873565  USB0 port 0 read_resources bus 0 link: 0

 1095 05:31:12.881881  USB0 port 0 read_resources bus 0 link: 0 done

 1096 05:31:12.884856  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1097 05:31:12.892434  PCI: 00:15.0 read_resources bus 1 link: 0

 1098 05:31:12.895537  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1099 05:31:12.902476  PCI: 00:15.1 read_resources bus 2 link: 0

 1100 05:31:12.905788  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1101 05:31:12.912687  PCI: 00:19.0 read_resources bus 3 link: 0

 1102 05:31:12.919691  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1103 05:31:12.922827  PCI: 00:1d.0 read_resources bus 1 link: 0

 1104 05:31:12.929665  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1105 05:31:12.932732  PCI: 00:1e.2 read_resources bus 4 link: 0

 1106 05:31:12.939846  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1107 05:31:12.942858  PCI: 00:1e.3 read_resources bus 5 link: 0

 1108 05:31:12.949376  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1109 05:31:12.952733  PCI: 00:1f.0 read_resources bus 0 link: 0

 1110 05:31:12.959251  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1111 05:31:12.966361  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1112 05:31:12.969401  Root Device read_resources bus 0 link: 0 done

 1113 05:31:12.972546  Done reading resources.

 1114 05:31:12.975787  Show resources in subtree (Root Device)...After reading.

 1115 05:31:12.982595   Root Device child on link 0 CPU_CLUSTER: 0

 1116 05:31:12.985777    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1117 05:31:12.985861     APIC: 00

 1118 05:31:12.989595     APIC: 03

 1119 05:31:12.989704     APIC: 07

 1120 05:31:12.992669     APIC: 01

 1121 05:31:12.992778     APIC: 02

 1122 05:31:12.992872     APIC: 06

 1123 05:31:12.995991     APIC: 05

 1124 05:31:12.996074     APIC: 04

 1125 05:31:12.999457    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1126 05:31:13.009519    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1127 05:31:13.059317    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1128 05:31:13.059455     PCI: 00:00.0

 1129 05:31:13.059748     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1130 05:31:13.059835     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1131 05:31:13.060103     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1132 05:31:13.060223     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1133 05:31:13.079387     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1134 05:31:13.079707     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1135 05:31:13.085800     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1136 05:31:13.095623     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1137 05:31:13.105432     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1138 05:31:13.115112     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1139 05:31:13.125382     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1140 05:31:13.131790     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1141 05:31:13.141880     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1142 05:31:13.151808     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1143 05:31:13.161833     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1144 05:31:13.171590     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1145 05:31:13.171730     PCI: 00:02.0

 1146 05:31:13.181691     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1147 05:31:13.194960     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1148 05:31:13.201411     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1149 05:31:13.205016     PCI: 00:04.0

 1150 05:31:13.205159     PCI: 00:08.0

 1151 05:31:13.214529     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1152 05:31:13.217892     PCI: 00:12.0

 1153 05:31:13.227889     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1154 05:31:13.230950     PCI: 00:14.0 child on link 0 USB0 port 0

 1155 05:31:13.241323     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1156 05:31:13.244175      USB0 port 0 child on link 0 USB2 port 0

 1157 05:31:13.247996       USB2 port 0

 1158 05:31:13.248081       USB2 port 1

 1159 05:31:13.251122       USB2 port 2

 1160 05:31:13.251205       USB2 port 3

 1161 05:31:13.254295       USB2 port 5

 1162 05:31:13.254378       USB2 port 6

 1163 05:31:13.257506       USB2 port 9

 1164 05:31:13.261274       USB3 port 0

 1165 05:31:13.261358       USB3 port 1

 1166 05:31:13.264425       USB3 port 2

 1167 05:31:13.264509       USB3 port 3

 1168 05:31:13.267796       USB3 port 4

 1169 05:31:13.267879     PCI: 00:14.2

 1170 05:31:13.277615     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1171 05:31:13.287621     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1172 05:31:13.290807     PCI: 00:14.3

 1173 05:31:13.300809     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1174 05:31:13.303854     PCI: 00:15.0 child on link 0 I2C: 01:15

 1175 05:31:13.314018     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1176 05:31:13.314102      I2C: 01:15

 1177 05:31:13.320310     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1178 05:31:13.330375     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1179 05:31:13.330459      I2C: 02:5d

 1180 05:31:13.334019      GENERIC: 0.0

 1181 05:31:13.334102     PCI: 00:16.0

 1182 05:31:13.343534     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 05:31:13.346951     PCI: 00:17.0

 1184 05:31:13.353445     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1185 05:31:13.363664     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1186 05:31:13.373601     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1187 05:31:13.380586     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1188 05:31:13.390274     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1189 05:31:13.396995     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1190 05:31:13.403159     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1191 05:31:13.413308     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 05:31:13.413397      I2C: 03:1a

 1193 05:31:13.416626      I2C: 03:38

 1194 05:31:13.416709      I2C: 03:39

 1195 05:31:13.419768      I2C: 03:3a

 1196 05:31:13.419851      I2C: 03:3b

 1197 05:31:13.423480     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1198 05:31:13.433218     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1199 05:31:13.442891     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1200 05:31:13.453030     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1201 05:31:13.453116      PCI: 01:00.0

 1202 05:31:13.463317      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1203 05:31:13.466175     PCI: 00:1e.0

 1204 05:31:13.476086     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1205 05:31:13.486080     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1206 05:31:13.489108     PCI: 00:1e.2 child on link 0 SPI: 00

 1207 05:31:13.499325     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1208 05:31:13.502602      SPI: 00

 1209 05:31:13.505631     PCI: 00:1e.3 child on link 0 SPI: 01

 1210 05:31:13.515928     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1211 05:31:13.516024      SPI: 01

 1212 05:31:13.522385     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1213 05:31:13.529485     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1214 05:31:13.538860     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1215 05:31:13.538945      PNP: 0c09.0

 1216 05:31:13.549085      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1217 05:31:13.552468     PCI: 00:1f.3

 1218 05:31:13.562052     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1219 05:31:13.571884     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1220 05:31:13.571967     PCI: 00:1f.4

 1221 05:31:13.581891     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1222 05:31:13.591919     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1223 05:31:13.592010     PCI: 00:1f.5

 1224 05:31:13.601612     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1225 05:31:13.608335  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1226 05:31:13.614905  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1227 05:31:13.621599  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1228 05:31:13.625196  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1229 05:31:13.628581  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1230 05:31:13.631550  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1231 05:31:13.634713  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1232 05:31:13.641607  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1233 05:31:13.647857  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1234 05:31:13.658222  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1235 05:31:13.664485  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1236 05:31:13.671188  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1237 05:31:13.677997  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1238 05:31:13.684378  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1239 05:31:13.688281  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1240 05:31:13.694441  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1241 05:31:13.697831  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1242 05:31:13.704073  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1243 05:31:13.707630  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1244 05:31:13.714377  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1245 05:31:13.717401  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1246 05:31:13.723874  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1247 05:31:13.727367  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1248 05:31:13.733863  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1249 05:31:13.737302  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1250 05:31:13.744139  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1251 05:31:13.747512  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1252 05:31:13.750775  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1253 05:31:13.757340  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1254 05:31:13.760470  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1255 05:31:13.767025  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1256 05:31:13.770771  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1257 05:31:13.777146  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1258 05:31:13.780422  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1259 05:31:13.787363  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1260 05:31:13.790395  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1261 05:31:13.797281  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1262 05:31:13.803607  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1263 05:31:13.806798  avoid_fixed_resources: DOMAIN: 0000

 1264 05:31:13.813820  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1265 05:31:13.820077  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1266 05:31:13.826732  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1267 05:31:13.837063  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1268 05:31:13.843433  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1269 05:31:13.850075  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1270 05:31:13.860159  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1271 05:31:13.866477  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1272 05:31:13.873558  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1273 05:31:13.880106  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1274 05:31:13.890184  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1275 05:31:13.896298  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1276 05:31:13.896405  Setting resources...

 1277 05:31:13.903448  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1278 05:31:13.909789  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1279 05:31:13.912932  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1280 05:31:13.916141  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1281 05:31:13.919981  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1282 05:31:13.926138  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1283 05:31:13.932829  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1284 05:31:13.939235  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1285 05:31:13.946027  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1286 05:31:13.952920  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1287 05:31:13.956198  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1288 05:31:13.962678  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1289 05:31:13.965685  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1290 05:31:13.972735  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1291 05:31:13.975937  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1292 05:31:13.982532  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1293 05:31:13.985637  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1294 05:31:13.989153  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1295 05:31:13.995785  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1296 05:31:13.999073  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1297 05:31:14.005727  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1298 05:31:14.008812  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1299 05:31:14.015604  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1300 05:31:14.018809  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1301 05:31:14.025849  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1302 05:31:14.028853  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1303 05:31:14.035661  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1304 05:31:14.038821  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1305 05:31:14.045212  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1306 05:31:14.048952  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1307 05:31:14.055422  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1308 05:31:14.058554  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1309 05:31:14.065109  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1310 05:31:14.074948  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1311 05:31:14.082042  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1312 05:31:14.088055  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1313 05:31:14.091633  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1314 05:31:14.101323  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1315 05:31:14.104974  Root Device assign_resources, bus 0 link: 0

 1316 05:31:14.107905  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1317 05:31:14.118792  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1318 05:31:14.125384  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1319 05:31:14.135387  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1320 05:31:14.142214  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1321 05:31:14.152298  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1322 05:31:14.158762  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1323 05:31:14.165133  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1324 05:31:14.168746  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1325 05:31:14.178463  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1326 05:31:14.185449  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1327 05:31:14.191442  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1328 05:31:14.201671  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1329 05:31:14.204863  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1330 05:31:14.211705  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1331 05:31:14.218417  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1332 05:31:14.224928  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1333 05:31:14.228586  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1334 05:31:14.234717  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1335 05:31:14.245017  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1336 05:31:14.251905  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1337 05:31:14.262162  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1338 05:31:14.268530  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1339 05:31:14.274781  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1340 05:31:14.281714  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1341 05:31:14.291951  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1342 05:31:14.295232  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1343 05:31:14.302101  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1344 05:31:14.308284  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1345 05:31:14.318547  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1346 05:31:14.328091  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1347 05:31:14.331462  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1348 05:31:14.338091  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1349 05:31:14.345252  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1350 05:31:14.351670  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1351 05:31:14.361075  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1352 05:31:14.364959  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1353 05:31:14.371324  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1354 05:31:14.377728  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1355 05:31:14.381574  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1356 05:31:14.388318  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1357 05:31:14.391365  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1358 05:31:14.398017  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1359 05:31:14.401561  LPC: Trying to open IO window from 800 size 1ff

 1360 05:31:14.411630  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1361 05:31:14.417957  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1362 05:31:14.428096  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1363 05:31:14.434340  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1364 05:31:14.441066  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1365 05:31:14.444954  Root Device assign_resources, bus 0 link: 0

 1366 05:31:14.447828  Done setting resources.

 1367 05:31:14.454500  Show resources in subtree (Root Device)...After assigning values.

 1368 05:31:14.457725   Root Device child on link 0 CPU_CLUSTER: 0

 1369 05:31:14.461318    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1370 05:31:14.464418     APIC: 00

 1371 05:31:14.464499     APIC: 03

 1372 05:31:14.464563     APIC: 07

 1373 05:31:14.467983     APIC: 01

 1374 05:31:14.468065     APIC: 02

 1375 05:31:14.470828     APIC: 06

 1376 05:31:14.470909     APIC: 05

 1377 05:31:14.470972     APIC: 04

 1378 05:31:14.477901    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1379 05:31:14.487260    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1380 05:31:14.497479    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1381 05:31:14.497563     PCI: 00:00.0

 1382 05:31:14.507485     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1383 05:31:14.517110     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1384 05:31:14.527598     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1385 05:31:14.537277     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1386 05:31:14.546955     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1387 05:31:14.553811     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1388 05:31:14.563302     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1389 05:31:14.573603     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1390 05:31:14.583206     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1391 05:31:14.593093     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1392 05:31:14.599957     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1393 05:31:14.610049     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1394 05:31:14.619778     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1395 05:31:14.629861     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1396 05:31:14.639900     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1397 05:31:14.649732     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1398 05:31:14.649818     PCI: 00:02.0

 1399 05:31:14.662721     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1400 05:31:14.672465     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1401 05:31:14.682543     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1402 05:31:14.682629     PCI: 00:04.0

 1403 05:31:14.685629     PCI: 00:08.0

 1404 05:31:14.695499     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1405 05:31:14.695584     PCI: 00:12.0

 1406 05:31:14.705597     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1407 05:31:14.712291     PCI: 00:14.0 child on link 0 USB0 port 0

 1408 05:31:14.722275     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1409 05:31:14.725773      USB0 port 0 child on link 0 USB2 port 0

 1410 05:31:14.728859       USB2 port 0

 1411 05:31:14.728942       USB2 port 1

 1412 05:31:14.732402       USB2 port 2

 1413 05:31:14.732485       USB2 port 3

 1414 05:31:14.735280       USB2 port 5

 1415 05:31:14.735361       USB2 port 6

 1416 05:31:14.738813       USB2 port 9

 1417 05:31:14.738895       USB3 port 0

 1418 05:31:14.741785       USB3 port 1

 1419 05:31:14.741866       USB3 port 2

 1420 05:31:14.745534       USB3 port 3

 1421 05:31:14.745615       USB3 port 4

 1422 05:31:14.748688     PCI: 00:14.2

 1423 05:31:14.758616     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1424 05:31:14.768672     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1425 05:31:14.771814     PCI: 00:14.3

 1426 05:31:14.781673     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1427 05:31:14.784866     PCI: 00:15.0 child on link 0 I2C: 01:15

 1428 05:31:14.794750     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1429 05:31:14.797860      I2C: 01:15

 1430 05:31:14.801113     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1431 05:31:14.811229     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1432 05:31:14.814426      I2C: 02:5d

 1433 05:31:14.814508      GENERIC: 0.0

 1434 05:31:14.818058     PCI: 00:16.0

 1435 05:31:14.827770     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1436 05:31:14.827865     PCI: 00:17.0

 1437 05:31:14.837348     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1438 05:31:14.847551     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1439 05:31:14.857260     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1440 05:31:14.867180     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1441 05:31:14.877235     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1442 05:31:14.887258     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1443 05:31:14.890283     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1444 05:31:14.900476     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1445 05:31:14.903554      I2C: 03:1a

 1446 05:31:14.903698      I2C: 03:38

 1447 05:31:14.906683      I2C: 03:39

 1448 05:31:14.906779      I2C: 03:3a

 1449 05:31:14.910479      I2C: 03:3b

 1450 05:31:14.913632     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1451 05:31:14.923774     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1452 05:31:14.933313     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1453 05:31:14.943538     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1454 05:31:14.943689      PCI: 01:00.0

 1455 05:31:14.956625      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1456 05:31:14.956718     PCI: 00:1e.0

 1457 05:31:14.969747     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1458 05:31:14.979369     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1459 05:31:14.982752     PCI: 00:1e.2 child on link 0 SPI: 00

 1460 05:31:14.992540     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1461 05:31:14.992643      SPI: 00

 1462 05:31:14.999417     PCI: 00:1e.3 child on link 0 SPI: 01

 1463 05:31:15.009472     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1464 05:31:15.009560      SPI: 01

 1465 05:31:15.012486     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1466 05:31:15.022740     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1467 05:31:15.032381     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1468 05:31:15.032470      PNP: 0c09.0

 1469 05:31:15.042195      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1470 05:31:15.042292     PCI: 00:1f.3

 1471 05:31:15.052382     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1472 05:31:15.065318     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1473 05:31:15.065532     PCI: 00:1f.4

 1474 05:31:15.075220     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1475 05:31:15.085273     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1476 05:31:15.085370     PCI: 00:1f.5

 1477 05:31:15.098516     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1478 05:31:15.098608  Done allocating resources.

 1479 05:31:15.105175  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1480 05:31:15.108488  Enabling resources...

 1481 05:31:15.111403  PCI: 00:00.0 subsystem <- 8086/9b61

 1482 05:31:15.115218  PCI: 00:00.0 cmd <- 06

 1483 05:31:15.118172  PCI: 00:02.0 subsystem <- 8086/9b41

 1484 05:31:15.121823  PCI: 00:02.0 cmd <- 03

 1485 05:31:15.125068  PCI: 00:08.0 cmd <- 06

 1486 05:31:15.128103  PCI: 00:12.0 subsystem <- 8086/02f9

 1487 05:31:15.131130  PCI: 00:12.0 cmd <- 02

 1488 05:31:15.134938  PCI: 00:14.0 subsystem <- 8086/02ed

 1489 05:31:15.135060  PCI: 00:14.0 cmd <- 02

 1490 05:31:15.138126  PCI: 00:14.2 cmd <- 02

 1491 05:31:15.141366  PCI: 00:14.3 subsystem <- 8086/02f0

 1492 05:31:15.145107  PCI: 00:14.3 cmd <- 02

 1493 05:31:15.148230  PCI: 00:15.0 subsystem <- 8086/02e8

 1494 05:31:15.151938  PCI: 00:15.0 cmd <- 02

 1495 05:31:15.154919  PCI: 00:15.1 subsystem <- 8086/02e9

 1496 05:31:15.157874  PCI: 00:15.1 cmd <- 02

 1497 05:31:15.160991  PCI: 00:16.0 subsystem <- 8086/02e0

 1498 05:31:15.164822  PCI: 00:16.0 cmd <- 02

 1499 05:31:15.167832  PCI: 00:17.0 subsystem <- 8086/02d3

 1500 05:31:15.171506  PCI: 00:17.0 cmd <- 03

 1501 05:31:15.174570  PCI: 00:19.0 subsystem <- 8086/02c5

 1502 05:31:15.177712  PCI: 00:19.0 cmd <- 02

 1503 05:31:15.180845  PCI: 00:1d.0 bridge ctrl <- 0013

 1504 05:31:15.184755  PCI: 00:1d.0 subsystem <- 8086/02b0

 1505 05:31:15.184889  PCI: 00:1d.0 cmd <- 06

 1506 05:31:15.191045  PCI: 00:1e.0 subsystem <- 8086/02a8

 1507 05:31:15.191153  PCI: 00:1e.0 cmd <- 06

 1508 05:31:15.194850  PCI: 00:1e.2 subsystem <- 8086/02aa

 1509 05:31:15.198048  PCI: 00:1e.2 cmd <- 06

 1510 05:31:15.201199  PCI: 00:1e.3 subsystem <- 8086/02ab

 1511 05:31:15.204369  PCI: 00:1e.3 cmd <- 02

 1512 05:31:15.207866  PCI: 00:1f.0 subsystem <- 8086/0284

 1513 05:31:15.210995  PCI: 00:1f.0 cmd <- 407

 1514 05:31:15.214524  PCI: 00:1f.3 subsystem <- 8086/02c8

 1515 05:31:15.218073  PCI: 00:1f.3 cmd <- 02

 1516 05:31:15.221050  PCI: 00:1f.4 subsystem <- 8086/02a3

 1517 05:31:15.224257  PCI: 00:1f.4 cmd <- 03

 1518 05:31:15.227465  PCI: 00:1f.5 subsystem <- 8086/02a4

 1519 05:31:15.230859  PCI: 00:1f.5 cmd <- 406

 1520 05:31:15.238764  PCI: 01:00.0 cmd <- 02

 1521 05:31:15.244218  done.

 1522 05:31:15.256742  ME: Version: 14.0.39.1367

 1523 05:31:15.264096  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12

 1524 05:31:15.266843  Initializing devices...

 1525 05:31:15.266929  Root Device init ...

 1526 05:31:15.273705  Chrome EC: Set SMI mask to 0x0000000000000000

 1527 05:31:15.276792  Chrome EC: clear events_b mask to 0x0000000000000000

 1528 05:31:15.283776  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1529 05:31:15.289831  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1530 05:31:15.296526  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1531 05:31:15.300068  Chrome EC: Set WAKE mask to 0x0000000000000000

 1532 05:31:15.303294  Root Device init finished in 35263 usecs

 1533 05:31:15.307228  CPU_CLUSTER: 0 init ...

 1534 05:31:15.313423  CPU_CLUSTER: 0 init finished in 2447 usecs

 1535 05:31:15.317687  PCI: 00:00.0 init ...

 1536 05:31:15.320912  CPU TDP: 15 Watts

 1537 05:31:15.324560  CPU PL2 = 64 Watts

 1538 05:31:15.327715  PCI: 00:00.0 init finished in 7077 usecs

 1539 05:31:15.330830  PCI: 00:02.0 init ...

 1540 05:31:15.334388  PCI: 00:02.0 init finished in 2243 usecs

 1541 05:31:15.337248  PCI: 00:08.0 init ...

 1542 05:31:15.340628  PCI: 00:08.0 init finished in 2251 usecs

 1543 05:31:15.344296  PCI: 00:12.0 init ...

 1544 05:31:15.347145  PCI: 00:12.0 init finished in 2252 usecs

 1545 05:31:15.350601  PCI: 00:14.0 init ...

 1546 05:31:15.354115  PCI: 00:14.0 init finished in 2250 usecs

 1547 05:31:15.357253  PCI: 00:14.2 init ...

 1548 05:31:15.361024  PCI: 00:14.2 init finished in 2251 usecs

 1549 05:31:15.364119  PCI: 00:14.3 init ...

 1550 05:31:15.367121  PCI: 00:14.3 init finished in 2269 usecs

 1551 05:31:15.370652  PCI: 00:15.0 init ...

 1552 05:31:15.373958  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1553 05:31:15.377199  PCI: 00:15.0 init finished in 5974 usecs

 1554 05:31:15.380632  PCI: 00:15.1 init ...

 1555 05:31:15.383761  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1556 05:31:15.387511  PCI: 00:15.1 init finished in 5974 usecs

 1557 05:31:15.391225  PCI: 00:16.0 init ...

 1558 05:31:15.394164  PCI: 00:16.0 init finished in 2252 usecs

 1559 05:31:15.398061  PCI: 00:19.0 init ...

 1560 05:31:15.401380  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1561 05:31:15.407905  PCI: 00:19.0 init finished in 5975 usecs

 1562 05:31:15.407989  PCI: 00:1d.0 init ...

 1563 05:31:15.411590  Initializing PCH PCIe bridge.

 1564 05:31:15.414685  PCI: 00:1d.0 init finished in 5283 usecs

 1565 05:31:15.419544  PCI: 00:1f.0 init ...

 1566 05:31:15.422713  IOAPIC: Initializing IOAPIC at 0xfec00000

 1567 05:31:15.429562  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1568 05:31:15.429648  IOAPIC: ID = 0x02

 1569 05:31:15.432811  IOAPIC: Dumping registers

 1570 05:31:15.435889    reg 0x0000: 0x02000000

 1571 05:31:15.439545    reg 0x0001: 0x00770020

 1572 05:31:15.439647    reg 0x0002: 0x00000000

 1573 05:31:15.446200  PCI: 00:1f.0 init finished in 23514 usecs

 1574 05:31:15.449865  PCI: 00:1f.4 init ...

 1575 05:31:15.453247  PCI: 00:1f.4 init finished in 2262 usecs

 1576 05:31:15.463798  PCI: 01:00.0 init ...

 1577 05:31:15.467079  PCI: 01:00.0 init finished in 2252 usecs

 1578 05:31:15.471496  PNP: 0c09.0 init ...

 1579 05:31:15.474456  Google Chrome EC uptime: 11.091 seconds

 1580 05:31:15.481236  Google Chrome AP resets since EC boot: 0

 1581 05:31:15.484304  Google Chrome most recent AP reset causes:

 1582 05:31:15.491260  Google Chrome EC reset flags at last EC boot: reset-pin

 1583 05:31:15.494283  PNP: 0c09.0 init finished in 20615 usecs

 1584 05:31:15.497888  Devices initialized

 1585 05:31:15.501027  Show all devs... After init.

 1586 05:31:15.501102  Root Device: enabled 1

 1587 05:31:15.504106  CPU_CLUSTER: 0: enabled 1

 1588 05:31:15.508196  DOMAIN: 0000: enabled 1

 1589 05:31:15.508285  APIC: 00: enabled 1

 1590 05:31:15.511012  PCI: 00:00.0: enabled 1

 1591 05:31:15.514150  PCI: 00:02.0: enabled 1

 1592 05:31:15.517881  PCI: 00:04.0: enabled 0

 1593 05:31:15.517987  PCI: 00:05.0: enabled 0

 1594 05:31:15.520764  PCI: 00:12.0: enabled 1

 1595 05:31:15.523968  PCI: 00:12.5: enabled 0

 1596 05:31:15.527033  PCI: 00:12.6: enabled 0

 1597 05:31:15.527147  PCI: 00:14.0: enabled 1

 1598 05:31:15.530822  PCI: 00:14.1: enabled 0

 1599 05:31:15.533867  PCI: 00:14.3: enabled 1

 1600 05:31:15.533944  PCI: 00:14.5: enabled 0

 1601 05:31:15.537005  PCI: 00:15.0: enabled 1

 1602 05:31:15.540862  PCI: 00:15.1: enabled 1

 1603 05:31:15.544013  PCI: 00:15.2: enabled 0

 1604 05:31:15.544128  PCI: 00:15.3: enabled 0

 1605 05:31:15.547083  PCI: 00:16.0: enabled 1

 1606 05:31:15.550765  PCI: 00:16.1: enabled 0

 1607 05:31:15.553922  PCI: 00:16.2: enabled 0

 1608 05:31:15.554028  PCI: 00:16.3: enabled 0

 1609 05:31:15.557379  PCI: 00:16.4: enabled 0

 1610 05:31:15.560593  PCI: 00:16.5: enabled 0

 1611 05:31:15.563629  PCI: 00:17.0: enabled 1

 1612 05:31:15.563760  PCI: 00:19.0: enabled 1

 1613 05:31:15.566924  PCI: 00:19.1: enabled 0

 1614 05:31:15.570553  PCI: 00:19.2: enabled 0

 1615 05:31:15.573673  PCI: 00:1a.0: enabled 0

 1616 05:31:15.573776  PCI: 00:1c.0: enabled 0

 1617 05:31:15.577343  PCI: 00:1c.1: enabled 0

 1618 05:31:15.580381  PCI: 00:1c.2: enabled 0

 1619 05:31:15.580483  PCI: 00:1c.3: enabled 0

 1620 05:31:15.583741  PCI: 00:1c.4: enabled 0

 1621 05:31:15.586856  PCI: 00:1c.5: enabled 0

 1622 05:31:15.589775  PCI: 00:1c.6: enabled 0

 1623 05:31:15.589871  PCI: 00:1c.7: enabled 0

 1624 05:31:15.593125  PCI: 00:1d.0: enabled 1

 1625 05:31:15.596590  PCI: 00:1d.1: enabled 0

 1626 05:31:15.599999  PCI: 00:1d.2: enabled 0

 1627 05:31:15.600099  PCI: 00:1d.3: enabled 0

 1628 05:31:15.603264  PCI: 00:1d.4: enabled 0

 1629 05:31:15.606501  PCI: 00:1d.5: enabled 0

 1630 05:31:15.609813  PCI: 00:1e.0: enabled 1

 1631 05:31:15.609921  PCI: 00:1e.1: enabled 0

 1632 05:31:15.613070  PCI: 00:1e.2: enabled 1

 1633 05:31:15.616358  PCI: 00:1e.3: enabled 1

 1634 05:31:15.619398  PCI: 00:1f.0: enabled 1

 1635 05:31:15.619498  PCI: 00:1f.1: enabled 0

 1636 05:31:15.623209  PCI: 00:1f.2: enabled 0

 1637 05:31:15.626230  PCI: 00:1f.3: enabled 1

 1638 05:31:15.629452  PCI: 00:1f.4: enabled 1

 1639 05:31:15.629545  PCI: 00:1f.5: enabled 1

 1640 05:31:15.633416  PCI: 00:1f.6: enabled 0

 1641 05:31:15.636253  USB0 port 0: enabled 1

 1642 05:31:15.636325  I2C: 01:15: enabled 1

 1643 05:31:15.639327  I2C: 02:5d: enabled 1

 1644 05:31:15.642664  GENERIC: 0.0: enabled 1

 1645 05:31:15.642736  I2C: 03:1a: enabled 1

 1646 05:31:15.646293  I2C: 03:38: enabled 1

 1647 05:31:15.649385  I2C: 03:39: enabled 1

 1648 05:31:15.649457  I2C: 03:3a: enabled 1

 1649 05:31:15.652391  I2C: 03:3b: enabled 1

 1650 05:31:15.656084  PCI: 00:00.0: enabled 1

 1651 05:31:15.659345  SPI: 00: enabled 1

 1652 05:31:15.659424  SPI: 01: enabled 1

 1653 05:31:15.663202  PNP: 0c09.0: enabled 1

 1654 05:31:15.666049  USB2 port 0: enabled 1

 1655 05:31:15.666130  USB2 port 1: enabled 1

 1656 05:31:15.669082  USB2 port 2: enabled 0

 1657 05:31:15.672305  USB2 port 3: enabled 0

 1658 05:31:15.672387  USB2 port 5: enabled 0

 1659 05:31:15.675551  USB2 port 6: enabled 1

 1660 05:31:15.679369  USB2 port 9: enabled 1

 1661 05:31:15.679441  USB3 port 0: enabled 1

 1662 05:31:15.682662  USB3 port 1: enabled 1

 1663 05:31:15.685652  USB3 port 2: enabled 1

 1664 05:31:15.688915  USB3 port 3: enabled 1

 1665 05:31:15.688991  USB3 port 4: enabled 0

 1666 05:31:15.692509  APIC: 03: enabled 1

 1667 05:31:15.695613  APIC: 07: enabled 1

 1668 05:31:15.695696  APIC: 01: enabled 1

 1669 05:31:15.699113  APIC: 02: enabled 1

 1670 05:31:15.699187  APIC: 06: enabled 1

 1671 05:31:15.702498  APIC: 05: enabled 1

 1672 05:31:15.705424  APIC: 04: enabled 1

 1673 05:31:15.705508  PCI: 00:08.0: enabled 1

 1674 05:31:15.709166  PCI: 00:14.2: enabled 1

 1675 05:31:15.712364  PCI: 01:00.0: enabled 1

 1676 05:31:15.716049  Disabling ACPI via APMC:

 1677 05:31:15.719003  done.

 1678 05:31:15.722516  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1679 05:31:15.725394  ELOG: NV offset 0xaf0000 size 0x4000

 1680 05:31:15.732502  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1681 05:31:15.739360  ELOG: Event(17) added with size 13 at 2023-11-05 05:29:38 UTC

 1682 05:31:15.745818  ELOG: Event(92) added with size 9 at 2023-11-05 05:29:38 UTC

 1683 05:31:15.752577  ELOG: Event(93) added with size 9 at 2023-11-05 05:29:38 UTC

 1684 05:31:15.759315  ELOG: Event(9A) added with size 9 at 2023-11-05 05:29:38 UTC

 1685 05:31:15.765698  ELOG: Event(9E) added with size 10 at 2023-11-05 05:29:38 UTC

 1686 05:31:15.772501  ELOG: Event(9F) added with size 14 at 2023-11-05 05:29:38 UTC

 1687 05:31:15.775611  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6

 1688 05:31:15.783218  ELOG: Event(A1) added with size 10 at 2023-11-05 05:29:38 UTC

 1689 05:31:15.792840  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1690 05:31:15.799737  ELOG: Event(A0) added with size 9 at 2023-11-05 05:29:38 UTC

 1691 05:31:15.803043  elog_add_boot_reason: Logged dev mode boot

 1692 05:31:15.806101  Finalize devices...

 1693 05:31:15.806185  PCI: 00:17.0 final

 1694 05:31:15.809574  Devices finalized

 1695 05:31:15.812566  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1696 05:31:15.819398  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1697 05:31:15.822415  ME: HFSTS1                  : 0x90000245

 1698 05:31:15.826170  ME: HFSTS2                  : 0x3B850126

 1699 05:31:15.832587  ME: HFSTS3                  : 0x00000020

 1700 05:31:15.835710  ME: HFSTS4                  : 0x00004800

 1701 05:31:15.839313  ME: HFSTS5                  : 0x00000000

 1702 05:31:15.842776  ME: HFSTS6                  : 0x40400006

 1703 05:31:15.845737  ME: Manufacturing Mode      : NO

 1704 05:31:15.849343  ME: FW Partition Table      : OK

 1705 05:31:15.852189  ME: Bringup Loader Failure  : NO

 1706 05:31:15.855872  ME: Firmware Init Complete  : YES

 1707 05:31:15.859079  ME: Boot Options Present    : NO

 1708 05:31:15.862614  ME: Update In Progress      : NO

 1709 05:31:15.865458  ME: D0i3 Support            : YES

 1710 05:31:15.868915  ME: Low Power State Enabled : NO

 1711 05:31:15.872048  ME: CPU Replaced            : NO

 1712 05:31:15.875707  ME: CPU Replacement Valid   : YES

 1713 05:31:15.878792  ME: Current Working State   : 5

 1714 05:31:15.882647  ME: Current Operation State : 1

 1715 05:31:15.885774  ME: Current Operation Mode  : 0

 1716 05:31:15.888904  ME: Error Code              : 0

 1717 05:31:15.892079  ME: CPU Debug Disabled      : YES

 1718 05:31:15.895818  ME: TXT Support             : NO

 1719 05:31:15.902120  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1720 05:31:15.908400  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1721 05:31:15.908505  CBFS @ c08000 size 3f8000

 1722 05:31:15.915524  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1723 05:31:15.918702  CBFS: Locating 'fallback/dsdt.aml'

 1724 05:31:15.921952  CBFS: Found @ offset 10bb80 size 3fa5

 1725 05:31:15.928279  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1726 05:31:15.932085  CBFS @ c08000 size 3f8000

 1727 05:31:15.935210  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1728 05:31:15.938634  CBFS: Locating 'fallback/slic'

 1729 05:31:15.943756  CBFS: 'fallback/slic' not found.

 1730 05:31:15.950245  ACPI: Writing ACPI tables at 99b3e000.

 1731 05:31:15.950335  ACPI:    * FACS

 1732 05:31:15.953511  ACPI:    * DSDT

 1733 05:31:15.956510  Ramoops buffer: 0x100000@0x99a3d000.

 1734 05:31:15.960401  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1735 05:31:15.966462  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1736 05:31:15.969974  Google Chrome EC: version:

 1737 05:31:15.973237  	ro: helios_v2.0.2659-56403530b

 1738 05:31:15.976646  	rw: helios_v2.0.2849-c41de27e7d

 1739 05:31:15.976725    running image: 1

 1740 05:31:15.980696  ACPI:    * FADT

 1741 05:31:15.980772  SCI is IRQ9

 1742 05:31:15.987195  ACPI: added table 1/32, length now 40

 1743 05:31:15.987282  ACPI:     * SSDT

 1744 05:31:15.990691  Found 1 CPU(s) with 8 core(s) each.

 1745 05:31:15.993731  Error: Could not locate 'wifi_sar' in VPD.

 1746 05:31:16.000367  Checking CBFS for default SAR values

 1747 05:31:16.004174  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1748 05:31:16.007255  CBFS @ c08000 size 3f8000

 1749 05:31:16.013653  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1750 05:31:16.017437  CBFS: Locating 'wifi_sar_defaults.hex'

 1751 05:31:16.020522  CBFS: Found @ offset 5fac0 size 77

 1752 05:31:16.023596  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1753 05:31:16.030483  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1754 05:31:16.033503  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1755 05:31:16.040622  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1756 05:31:16.043481  failed to find key in VPD: dsm_calib_r0_0

 1757 05:31:16.053867  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1758 05:31:16.057166  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1759 05:31:16.060095  failed to find key in VPD: dsm_calib_r0_1

 1760 05:31:16.070219  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1761 05:31:16.076578  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1762 05:31:16.080284  failed to find key in VPD: dsm_calib_r0_2

 1763 05:31:16.089652  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1764 05:31:16.093542  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1765 05:31:16.100068  failed to find key in VPD: dsm_calib_r0_3

 1766 05:31:16.106306  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1767 05:31:16.112989  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1768 05:31:16.116668  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1769 05:31:16.119824  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1770 05:31:16.123528  EC returned error result code 1

 1771 05:31:16.127360  EC returned error result code 1

 1772 05:31:16.130997  EC returned error result code 1

 1773 05:31:16.137529  PS2K: Bad resp from EC. Vivaldi disabled!

 1774 05:31:16.141233  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1775 05:31:16.147422  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1776 05:31:16.154127  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1777 05:31:16.157399  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1778 05:31:16.164050  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1779 05:31:16.170850  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1780 05:31:16.177280  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1781 05:31:16.180854  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1782 05:31:16.187188  ACPI: added table 2/32, length now 44

 1783 05:31:16.187329  ACPI:    * MCFG

 1784 05:31:16.190191  ACPI: added table 3/32, length now 48

 1785 05:31:16.194083  ACPI:    * TPM2

 1786 05:31:16.197073  TPM2 log created at 99a2d000

 1787 05:31:16.200465  ACPI: added table 4/32, length now 52

 1788 05:31:16.200571  ACPI:    * MADT

 1789 05:31:16.203533  SCI is IRQ9

 1790 05:31:16.207269  ACPI: added table 5/32, length now 56

 1791 05:31:16.207361  current = 99b43ac0

 1792 05:31:16.210245  ACPI:    * DMAR

 1793 05:31:16.213311  ACPI: added table 6/32, length now 60

 1794 05:31:16.216830  ACPI:    * IGD OpRegion

 1795 05:31:16.216924  GMA: Found VBT in CBFS

 1796 05:31:16.220051  GMA: Found valid VBT in CBFS

 1797 05:31:16.223189  ACPI: added table 7/32, length now 64

 1798 05:31:16.227030  ACPI:    * HPET

 1799 05:31:16.229981  ACPI: added table 8/32, length now 68

 1800 05:31:16.233202  ACPI: done.

 1801 05:31:16.233321  ACPI tables: 31744 bytes.

 1802 05:31:16.236912  smbios_write_tables: 99a2c000

 1803 05:31:16.240072  EC returned error result code 3

 1804 05:31:16.243836  Couldn't obtain OEM name from CBI

 1805 05:31:16.246956  Create SMBIOS type 17

 1806 05:31:16.250248  PCI: 00:00.0 (Intel Cannonlake)

 1807 05:31:16.253949  PCI: 00:14.3 (Intel WiFi)

 1808 05:31:16.257151  SMBIOS tables: 939 bytes.

 1809 05:31:16.260160  Writing table forward entry at 0x00000500

 1810 05:31:16.267044  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1811 05:31:16.270333  Writing coreboot table at 0x99b62000

 1812 05:31:16.276708   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1813 05:31:16.279995   1. 0000000000001000-000000000009ffff: RAM

 1814 05:31:16.283627   2. 00000000000a0000-00000000000fffff: RESERVED

 1815 05:31:16.289931   3. 0000000000100000-0000000099a2bfff: RAM

 1816 05:31:16.296742   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1817 05:31:16.300320   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1818 05:31:16.306709   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1819 05:31:16.309745   7. 000000009a000000-000000009f7fffff: RESERVED

 1820 05:31:16.316770   8. 00000000e0000000-00000000efffffff: RESERVED

 1821 05:31:16.319771   9. 00000000fc000000-00000000fc000fff: RESERVED

 1822 05:31:16.326630  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1823 05:31:16.329724  11. 00000000fed10000-00000000fed17fff: RESERVED

 1824 05:31:16.333301  12. 00000000fed80000-00000000fed83fff: RESERVED

 1825 05:31:16.339464  13. 00000000fed90000-00000000fed91fff: RESERVED

 1826 05:31:16.343186  14. 00000000feda0000-00000000feda1fff: RESERVED

 1827 05:31:16.349801  15. 0000000100000000-000000045e7fffff: RAM

 1828 05:31:16.352739  Graphics framebuffer located at 0xc0000000

 1829 05:31:16.356597  Passing 5 GPIOs to payload:

 1830 05:31:16.359738              NAME |       PORT | POLARITY |     VALUE

 1831 05:31:16.365887     write protect |  undefined |     high |       low

 1832 05:31:16.372633               lid |  undefined |     high |      high

 1833 05:31:16.376078             power |  undefined |     high |       low

 1834 05:31:16.382735             oprom |  undefined |     high |       low

 1835 05:31:16.386018          EC in RW | 0x000000cb |     high |       low

 1836 05:31:16.389487  Board ID: 4

 1837 05:31:16.392594  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1838 05:31:16.396079  CBFS @ c08000 size 3f8000

 1839 05:31:16.402434  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1840 05:31:16.409388  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87

 1841 05:31:16.409502  coreboot table: 1492 bytes.

 1842 05:31:16.412492  IMD ROOT    0. 99fff000 00001000

 1843 05:31:16.415729  IMD SMALL   1. 99ffe000 00001000

 1844 05:31:16.418948  FSP MEMORY  2. 99c4e000 003b0000

 1845 05:31:16.422745  CONSOLE     3. 99c2e000 00020000

 1846 05:31:16.425716  FMAP        4. 99c2d000 0000054e

 1847 05:31:16.428919  TIME STAMP  5. 99c2c000 00000910

 1848 05:31:16.432705  VBOOT WORK  6. 99c18000 00014000

 1849 05:31:16.435856  MRC DATA    7. 99c16000 00001958

 1850 05:31:16.439136  ROMSTG STCK 8. 99c15000 00001000

 1851 05:31:16.442204  AFTER CAR   9. 99c0b000 0000a000

 1852 05:31:16.445712  RAMSTAGE   10. 99baf000 0005c000

 1853 05:31:16.449313  REFCODE    11. 99b7a000 00035000

 1854 05:31:16.452153  SMM BACKUP 12. 99b6a000 00010000

 1855 05:31:16.455750  COREBOOT   13. 99b62000 00008000

 1856 05:31:16.459163  ACPI       14. 99b3e000 00024000

 1857 05:31:16.462353  ACPI GNVS  15. 99b3d000 00001000

 1858 05:31:16.465526  RAMOOPS    16. 99a3d000 00100000

 1859 05:31:16.469170  TPM2 TCGLOG17. 99a2d000 00010000

 1860 05:31:16.472341  SMBIOS     18. 99a2c000 00000800

 1861 05:31:16.475397  IMD small region:

 1862 05:31:16.479191    IMD ROOT    0. 99ffec00 00000400

 1863 05:31:16.482200    FSP RUNTIME 1. 99ffebe0 00000004

 1864 05:31:16.485976    EC HOSTEVENT 2. 99ffebc0 00000008

 1865 05:31:16.488888    POWER STATE 3. 99ffeb80 00000040

 1866 05:31:16.492147    ROMSTAGE    4. 99ffeb60 00000004

 1867 05:31:16.495656    MEM INFO    5. 99ffe9a0 000001b9

 1868 05:31:16.498711    VPD         6. 99ffe920 0000006c

 1869 05:31:16.501954  MTRR: Physical address space:

 1870 05:31:16.508917  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1871 05:31:16.515510  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1872 05:31:16.521702  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1873 05:31:16.528504  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1874 05:31:16.535430  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1875 05:31:16.541689  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1876 05:31:16.548515  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1877 05:31:16.551581  MTRR: Fixed MSR 0x250 0x0606060606060606

 1878 05:31:16.555134  MTRR: Fixed MSR 0x258 0x0606060606060606

 1879 05:31:16.558231  MTRR: Fixed MSR 0x259 0x0000000000000000

 1880 05:31:16.564838  MTRR: Fixed MSR 0x268 0x0606060606060606

 1881 05:31:16.568412  MTRR: Fixed MSR 0x269 0x0606060606060606

 1882 05:31:16.571436  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1883 05:31:16.574949  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1884 05:31:16.578140  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1885 05:31:16.584914  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1886 05:31:16.588137  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1887 05:31:16.591120  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1888 05:31:16.595036  call enable_fixed_mtrr()

 1889 05:31:16.598037  CPU physical address size: 39 bits

 1890 05:31:16.604325  MTRR: default type WB/UC MTRR counts: 6/8.

 1891 05:31:16.608085  MTRR: WB selected as default type.

 1892 05:31:16.614747  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1893 05:31:16.617576  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1894 05:31:16.624048  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1895 05:31:16.630810  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1896 05:31:16.637934  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1897 05:31:16.644229  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1898 05:31:16.647261  MTRR: Fixed MSR 0x250 0x0606060606060606

 1899 05:31:16.654259  MTRR: Fixed MSR 0x258 0x0606060606060606

 1900 05:31:16.657465  MTRR: Fixed MSR 0x259 0x0000000000000000

 1901 05:31:16.660484  MTRR: Fixed MSR 0x268 0x0606060606060606

 1902 05:31:16.664031  MTRR: Fixed MSR 0x269 0x0606060606060606

 1903 05:31:16.670343  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1904 05:31:16.674107  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1905 05:31:16.677040  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1906 05:31:16.680417  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1907 05:31:16.686767  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1908 05:31:16.690517  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1909 05:31:16.693764  MTRR: Fixed MSR 0x250 0x0606060606060606

 1910 05:31:16.696910  MTRR: Fixed MSR 0x258 0x0606060606060606

 1911 05:31:16.703837  MTRR: Fixed MSR 0x259 0x0000000000000000

 1912 05:31:16.707220  MTRR: Fixed MSR 0x268 0x0606060606060606

 1913 05:31:16.710318  MTRR: Fixed MSR 0x269 0x0606060606060606

 1914 05:31:16.713511  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1915 05:31:16.720460  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1916 05:31:16.723191  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1917 05:31:16.726795  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1918 05:31:16.729842  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1919 05:31:16.736662  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1920 05:31:16.736750  call enable_fixed_mtrr()

 1921 05:31:16.740169  call enable_fixed_mtrr()

 1922 05:31:16.743133  CPU physical address size: 39 bits

 1923 05:31:16.746819  CPU physical address size: 39 bits

 1924 05:31:16.753610  MTRR: Fixed MSR 0x250 0x0606060606060606

 1925 05:31:16.756842  MTRR: Fixed MSR 0x258 0x0606060606060606

 1926 05:31:16.759953  MTRR: Fixed MSR 0x259 0x0000000000000000

 1927 05:31:16.763035  MTRR: Fixed MSR 0x268 0x0606060606060606

 1928 05:31:16.769713  MTRR: Fixed MSR 0x269 0x0606060606060606

 1929 05:31:16.772800  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1930 05:31:16.776621  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1931 05:31:16.779481  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1932 05:31:16.783136  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1933 05:31:16.789739  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1934 05:31:16.792731  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1935 05:31:16.796608  MTRR: Fixed MSR 0x250 0x0606060606060606

 1936 05:31:16.802839  MTRR: Fixed MSR 0x258 0x0606060606060606

 1937 05:31:16.806087  MTRR: Fixed MSR 0x259 0x0000000000000000

 1938 05:31:16.809215  MTRR: Fixed MSR 0x268 0x0606060606060606

 1939 05:31:16.813033  MTRR: Fixed MSR 0x269 0x0606060606060606

 1940 05:31:16.816060  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1941 05:31:16.823020  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1942 05:31:16.826132  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1943 05:31:16.829197  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1944 05:31:16.832745  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1945 05:31:16.839201  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1946 05:31:16.842788  call enable_fixed_mtrr()

 1947 05:31:16.842877  call enable_fixed_mtrr()

 1948 05:31:16.845764  CPU physical address size: 39 bits

 1949 05:31:16.852762  CPU physical address size: 39 bits

 1950 05:31:16.855628  MTRR: Fixed MSR 0x250 0x0606060606060606

 1951 05:31:16.859027  MTRR: Fixed MSR 0x250 0x0606060606060606

 1952 05:31:16.862700  MTRR: Fixed MSR 0x258 0x0606060606060606

 1953 05:31:16.865537  MTRR: Fixed MSR 0x259 0x0000000000000000

 1954 05:31:16.872557  MTRR: Fixed MSR 0x268 0x0606060606060606

 1955 05:31:16.875377  MTRR: Fixed MSR 0x269 0x0606060606060606

 1956 05:31:16.879274  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1957 05:31:16.882208  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1958 05:31:16.889160  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1959 05:31:16.892125  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1960 05:31:16.895737  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1961 05:31:16.899042  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1962 05:31:16.905099  MTRR: Fixed MSR 0x258 0x0606060606060606

 1963 05:31:16.905180  call enable_fixed_mtrr()

 1964 05:31:16.912163  MTRR: Fixed MSR 0x259 0x0000000000000000

 1965 05:31:16.915400  MTRR: Fixed MSR 0x268 0x0606060606060606

 1966 05:31:16.918502  MTRR: Fixed MSR 0x269 0x0606060606060606

 1967 05:31:16.921810  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1968 05:31:16.928146  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1969 05:31:16.931994  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1970 05:31:16.934965  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1971 05:31:16.937996  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1972 05:31:16.944677  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1973 05:31:16.948359  CPU physical address size: 39 bits

 1974 05:31:16.951436  call enable_fixed_mtrr()

 1975 05:31:16.955129  MTRR: Fixed MSR 0x250 0x0606060606060606

 1976 05:31:16.955207  

 1977 05:31:16.955278  MTRR check

 1978 05:31:16.958277  Fixed MTRRs   : Enabled

 1979 05:31:16.961366  Variable MTRRs: Enabled

 1980 05:31:16.961444  

 1981 05:31:16.965112  MTRR: Fixed MSR 0x258 0x0606060606060606

 1982 05:31:16.967976  MTRR: Fixed MSR 0x259 0x0000000000000000

 1983 05:31:16.971488  MTRR: Fixed MSR 0x268 0x0606060606060606

 1984 05:31:16.978205  MTRR: Fixed MSR 0x269 0x0606060606060606

 1985 05:31:16.981247  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1986 05:31:16.984922  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1987 05:31:16.988165  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1988 05:31:16.994275  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1989 05:31:16.998149  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1990 05:31:17.001401  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1991 05:31:17.007874  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1992 05:31:17.011165  call enable_fixed_mtrr()

 1993 05:31:17.014663  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1994 05:31:17.017823  CPU physical address size: 39 bits

 1995 05:31:17.021013  CBFS @ c08000 size 3f8000

 1996 05:31:17.027283  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1997 05:31:17.031210  CPU physical address size: 39 bits

 1998 05:31:17.034323  CBFS: Locating 'fallback/payload'

 1999 05:31:17.037582  CBFS: Found @ offset 1c96c0 size 3f798

 2000 05:31:17.043908  Checking segment from ROM address 0xffdd16f8

 2001 05:31:17.047706  Checking segment from ROM address 0xffdd1714

 2002 05:31:17.050684  Loading segment from ROM address 0xffdd16f8

 2003 05:31:17.054269    code (compression=0)

 2004 05:31:17.064032    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2005 05:31:17.070757  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2006 05:31:17.073786  it's not compressed!

 2007 05:31:17.165834  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2008 05:31:17.172724  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2009 05:31:17.175885  Loading segment from ROM address 0xffdd1714

 2010 05:31:17.179109    Entry Point 0x30000000

 2011 05:31:17.182170  Loaded segments

 2012 05:31:17.187943  Finalizing chipset.

 2013 05:31:17.191758  Finalizing SMM.

 2014 05:31:17.194711  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5

 2015 05:31:17.197802  mp_park_aps done after 0 msecs.

 2016 05:31:17.204553  Jumping to boot code at 30000000(99b62000)

 2017 05:31:17.211330  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2018 05:31:17.211420  

 2019 05:31:17.211521  

 2020 05:31:17.211621  

 2021 05:31:17.214310  Starting depthcharge on Helios...

 2022 05:31:17.214396  

 2023 05:31:17.214775  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2024 05:31:17.214888  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2025 05:31:17.214984  Setting prompt string to ['hatch:']
 2026 05:31:17.215083  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2027 05:31:17.224698  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2028 05:31:17.224786  

 2029 05:31:17.231041  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2030 05:31:17.231127  

 2031 05:31:17.237551  board_setup: Info: eMMC controller not present; skipping

 2032 05:31:17.237682  

 2033 05:31:17.241253  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2034 05:31:17.241343  

 2035 05:31:17.247771  board_setup: Info: SDHCI controller not present; skipping

 2036 05:31:17.247857  

 2037 05:31:17.254098  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2038 05:31:17.254187  

 2039 05:31:17.254273  Wipe memory regions:

 2040 05:31:17.254355  

 2041 05:31:17.257327  	[0x00000000001000, 0x000000000a0000)

 2042 05:31:17.257434  

 2043 05:31:17.261065  	[0x00000000100000, 0x00000030000000)

 2044 05:31:17.327115  

 2045 05:31:17.330186  	[0x00000030657430, 0x00000099a2c000)

 2046 05:31:17.467751  

 2047 05:31:17.471383  	[0x00000100000000, 0x0000045e800000)

 2048 05:31:18.853634  

 2049 05:31:18.853787  R8152: Initializing

 2050 05:31:18.853858  

 2051 05:31:18.857075  Version 9 (ocp_data = 6010)

 2052 05:31:18.861287  

 2053 05:31:18.861368  R8152: Done initializing

 2054 05:31:18.861442  

 2055 05:31:18.864274  Adding net device

 2056 05:31:19.347476  

 2057 05:31:19.347634  R8152: Initializing

 2058 05:31:19.347762  

 2059 05:31:19.350459  Version 6 (ocp_data = 5c30)

 2060 05:31:19.350601  

 2061 05:31:19.353618  R8152: Done initializing

 2062 05:31:19.353708  

 2063 05:31:19.357576  net_add_device: Attemp to include the same device

 2064 05:31:19.360607  

 2065 05:31:19.368042  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2066 05:31:19.368150  

 2067 05:31:19.368216  

 2068 05:31:19.368277  

 2069 05:31:19.368559  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2071 05:31:19.468945  hatch: tftpboot 192.168.201.1 11947810/tftp-deploy-2rx956uf/kernel/bzImage 11947810/tftp-deploy-2rx956uf/kernel/cmdline 11947810/tftp-deploy-2rx956uf/ramdisk/ramdisk.cpio.gz

 2072 05:31:19.469122  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2073 05:31:19.469207  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2074 05:31:19.473206  tftpboot 192.168.201.1 11947810/tftp-deploy-2rx956uf/kernel/bzIploy-2rx956uf/kernel/cmdline 11947810/tftp-deploy-2rx956uf/ramdisk/ramdisk.cpio.gz

 2075 05:31:19.473313  

 2076 05:31:19.473378  Waiting for link

 2077 05:31:19.674438  

 2078 05:31:19.674602  done.

 2079 05:31:19.674684  

 2080 05:31:19.674759  MAC: 00:24:32:50:19:be

 2081 05:31:19.674845  

 2082 05:31:19.677681  Sending DHCP discover... done.

 2083 05:31:19.677780  

 2084 05:31:19.680910  Waiting for reply... done.

 2085 05:31:19.681006  

 2086 05:31:19.684170  Sending DHCP request... done.

 2087 05:31:19.684255  

 2088 05:31:19.687133  Waiting for reply... done.

 2089 05:31:19.687262  

 2090 05:31:19.690752  My ip is 192.168.201.15

 2091 05:31:19.690850  

 2092 05:31:19.694135  The DHCP server ip is 192.168.201.1

 2093 05:31:19.694233  

 2094 05:31:19.697285  TFTP server IP predefined by user: 192.168.201.1

 2095 05:31:19.697385  

 2096 05:31:19.703779  Bootfile predefined by user: 11947810/tftp-deploy-2rx956uf/kernel/bzImage

 2097 05:31:19.703880  

 2098 05:31:19.707070  Sending tftp read request... done.

 2099 05:31:19.710101  

 2100 05:31:19.714255  Waiting for the transfer... 

 2101 05:31:19.714331  

 2102 05:31:20.231743  00000000 ################################################################

 2103 05:31:20.231914  

 2104 05:31:20.743066  00080000 ################################################################

 2105 05:31:20.743251  

 2106 05:31:21.261460  00100000 ################################################################

 2107 05:31:21.261633  

 2108 05:31:21.779612  00180000 ################################################################

 2109 05:31:21.779818  

 2110 05:31:22.296368  00200000 ################################################################

 2111 05:31:22.296507  

 2112 05:31:22.810722  00280000 ################################################################

 2113 05:31:22.810894  

 2114 05:31:23.329192  00300000 ################################################################

 2115 05:31:23.329342  

 2116 05:31:23.851920  00380000 ################################################################

 2117 05:31:23.852066  

 2118 05:31:24.377397  00400000 ################################################################

 2119 05:31:24.377559  

 2120 05:31:24.895560  00480000 ################################################################

 2121 05:31:24.895754  

 2122 05:31:25.421447  00500000 ################################################################

 2123 05:31:25.421614  

 2124 05:31:25.943080  00580000 ################################################################

 2125 05:31:25.943227  

 2126 05:31:26.459013  00600000 ################################################################

 2127 05:31:26.459160  

 2128 05:31:26.972421  00680000 ################################################################

 2129 05:31:26.972613  

 2130 05:31:27.498731  00700000 ################################################################

 2131 05:31:27.498884  

 2132 05:31:28.013872  00780000 ################################################################

 2133 05:31:28.014026  

 2134 05:31:28.199996  00800000 ####################### done.

 2135 05:31:28.200191  

 2136 05:31:28.203127  The bootfile was 8576912 bytes long.

 2137 05:31:28.203203  

 2138 05:31:28.206687  Sending tftp read request... done.

 2139 05:31:28.206790  

 2140 05:31:28.209930  Waiting for the transfer... 

 2141 05:31:28.210010  

 2142 05:31:28.735426  00000000 ################################################################

 2143 05:31:28.735575  

 2144 05:31:29.263125  00080000 ################################################################

 2145 05:31:29.263277  

 2146 05:31:29.781056  00100000 ################################################################

 2147 05:31:29.781201  

 2148 05:31:30.298728  00180000 ################################################################

 2149 05:31:30.298877  

 2150 05:31:30.829074  00200000 ################################################################

 2151 05:31:30.829226  

 2152 05:31:31.355448  00280000 ################################################################

 2153 05:31:31.355597  

 2154 05:31:31.889237  00300000 ################################################################

 2155 05:31:31.889385  

 2156 05:31:32.418066  00380000 ################################################################

 2157 05:31:32.418217  

 2158 05:31:32.952451  00400000 ################################################################

 2159 05:31:32.952601  

 2160 05:31:33.466449  00480000 ################################################################

 2161 05:31:33.466590  

 2162 05:31:33.994087  00500000 ############################################################### done.

 2163 05:31:33.994239  

 2164 05:31:33.997726  Sending tftp read request... done.

 2165 05:31:33.997824  

 2166 05:31:34.000773  Waiting for the transfer... 

 2167 05:31:34.000860  

 2168 05:31:34.000948  00000000 # done.

 2169 05:31:34.001033  

 2170 05:31:34.010613  Command line loaded dynamically from TFTP file: 11947810/tftp-deploy-2rx956uf/kernel/cmdline

 2171 05:31:34.010701  

 2172 05:31:34.040711  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11947810/extract-nfsrootfs-3gicx51i,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2173 05:31:34.040799  

 2174 05:31:34.043841  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2175 05:31:34.049716  

 2176 05:31:34.053001  Shutting down all USB controllers.

 2177 05:31:34.053084  

 2178 05:31:34.053148  Removing current net device

 2179 05:31:34.057291  

 2180 05:31:34.057374  Finalizing coreboot

 2181 05:31:34.057439  

 2182 05:31:34.063736  Exiting depthcharge with code 4 at timestamp: 24170026

 2183 05:31:34.063819  

 2184 05:31:34.063884  

 2185 05:31:34.063944  Starting kernel ...

 2186 05:31:34.064001  

 2187 05:31:34.064057  

 2188 05:31:34.064415  end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
 2189 05:31:34.064508  start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
 2190 05:31:34.064585  Setting prompt string to ['Linux version [0-9]']
 2191 05:31:34.064652  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2192 05:31:34.064719  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2194 05:35:59.065373  end: 2.2.5 auto-login-action (duration 00:04:25) [common]
 2196 05:35:59.066376  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
 2198 05:35:59.067177  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2201 05:35:59.068525  end: 2 depthcharge-action (duration 00:05:00) [common]
 2203 05:35:59.069614  Cleaning after the job
 2204 05:35:59.069917  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11947810/tftp-deploy-2rx956uf/ramdisk
 2205 05:35:59.070820  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11947810/tftp-deploy-2rx956uf/kernel
 2206 05:35:59.072229  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11947810/tftp-deploy-2rx956uf/nfsrootfs
 2207 05:35:59.163628  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11947810/tftp-deploy-2rx956uf/modules
 2208 05:35:59.164148  start: 4.1 power-off (timeout 00:00:30) [common]
 2209 05:35:59.164311  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
 2210 05:35:59.242802  >> Command sent successfully.

 2211 05:35:59.248147  Returned 0 in 0 seconds
 2212 05:35:59.349244  end: 4.1 power-off (duration 00:00:00) [common]
 2214 05:35:59.350662  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2215 05:35:59.351974  Listened to connection for namespace 'common' for up to 1s
 2217 05:35:59.353444  Listened to connection for namespace 'common' for up to 1s
 2218 05:36:00.352559  Finalising connection for namespace 'common'
 2219 05:36:00.353161  Disconnecting from shell: Finalise
 2220 05:36:00.353536  
 2221 05:36:00.454564  end: 4.2 read-feedback (duration 00:00:01) [common]
 2222 05:36:00.455130  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11947810
 2223 05:36:01.021478  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11947810
 2224 05:36:01.021676  JobError: Your job cannot terminate cleanly.