Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Kernel Errors: 0
- Warnings: 0
1 20:06:23.098288 lava-dispatcher, installed at version: 2022.11
2 20:06:23.098478 start: 0 validate
3 20:06:23.098627 Start time: 2022-12-19 20:06:23.098619+00:00 (UTC)
4 20:06:23.098766 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:06:23.098915 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221216.0%2Famd64%2Finitrd.cpio.gz exists
6 20:06:23.113999 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:06:23.114196 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-234-g4e6ec7162c8e%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:06:23.126141 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:06:23.126323 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221216.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 20:06:23.139508 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:06:23.139690 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-234-g4e6ec7162c8e%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 20:06:23.446735 validate duration: 0.35
14 20:06:23.448181 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:06:23.448881 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:06:23.449500 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:06:23.450053 Not decompressing ramdisk as can be used compressed.
18 20:06:23.450526 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221216.0/amd64/initrd.cpio.gz
19 20:06:23.450923 saving as /var/lib/lava/dispatcher/tmp/8411797/tftp-deploy-7w6_tfze/ramdisk/initrd.cpio.gz
20 20:06:23.451281 total size: 5431796 (5MB)
21 20:06:23.477947 progress 0% (0MB)
22 20:06:23.516700 progress 5% (0MB)
23 20:06:23.548922 progress 10% (0MB)
24 20:06:23.575463 progress 15% (0MB)
25 20:06:23.599813 progress 20% (1MB)
26 20:06:23.622713 progress 25% (1MB)
27 20:06:23.638047 progress 30% (1MB)
28 20:06:23.658163 progress 35% (1MB)
29 20:06:23.677577 progress 40% (2MB)
30 20:06:23.695335 progress 45% (2MB)
31 20:06:23.713568 progress 50% (2MB)
32 20:06:23.741578 progress 55% (2MB)
33 20:06:23.762546 progress 60% (3MB)
34 20:06:23.786768 progress 65% (3MB)
35 20:06:23.808986 progress 70% (3MB)
36 20:06:23.828319 progress 75% (3MB)
37 20:06:23.843958 progress 80% (4MB)
38 20:06:23.863944 progress 85% (4MB)
39 20:06:23.886378 progress 90% (4MB)
40 20:06:23.900931 progress 95% (4MB)
41 20:06:23.921151 progress 100% (5MB)
42 20:06:23.921484 5MB downloaded in 0.47s (11.02MB/s)
43 20:06:23.921678 end: 1.1.1 http-download (duration 00:00:00) [common]
45 20:06:23.921982 end: 1.1 download-retry (duration 00:00:00) [common]
46 20:06:23.922093 start: 1.2 download-retry (timeout 00:10:00) [common]
47 20:06:23.922202 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 20:06:23.922328 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-234-g4e6ec7162c8e/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 20:06:23.922412 saving as /var/lib/lava/dispatcher/tmp/8411797/tftp-deploy-7w6_tfze/kernel/bzImage
50 20:06:23.922489 total size: 7573392 (7MB)
51 20:06:23.922564 No compression specified
52 20:06:23.955038 progress 0% (0MB)
53 20:06:24.047105 progress 5% (0MB)
54 20:06:24.163550 progress 10% (0MB)
55 20:06:24.266087 progress 15% (1MB)
56 20:06:24.387406 progress 20% (1MB)
57 20:06:24.491628 progress 25% (1MB)
58 20:06:24.605880 progress 30% (2MB)
59 20:06:24.712326 progress 35% (2MB)
60 20:06:24.825949 progress 40% (2MB)
61 20:06:24.938982 progress 45% (3MB)
62 20:06:25.037389 progress 50% (3MB)
63 20:06:25.163901 progress 55% (4MB)
64 20:06:25.275046 progress 60% (4MB)
65 20:06:25.381786 progress 65% (4MB)
66 20:06:25.487258 progress 70% (5MB)
67 20:06:25.607268 progress 75% (5MB)
68 20:06:25.653591 progress 80% (5MB)
69 20:06:25.704255 progress 85% (6MB)
70 20:06:25.769200 progress 90% (6MB)
71 20:06:25.820521 progress 95% (6MB)
72 20:06:25.861559 progress 100% (7MB)
73 20:06:25.862193 7MB downloaded in 1.94s (3.72MB/s)
74 20:06:25.862714 end: 1.2.1 http-download (duration 00:00:02) [common]
76 20:06:25.863644 end: 1.2 download-retry (duration 00:00:02) [common]
77 20:06:25.863980 start: 1.3 download-retry (timeout 00:09:58) [common]
78 20:06:25.864304 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 20:06:25.864668 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221216.0/amd64/full.rootfs.tar.xz
80 20:06:25.864920 saving as /var/lib/lava/dispatcher/tmp/8411797/tftp-deploy-7w6_tfze/nfsrootfs/full.rootfs.tar
81 20:06:25.865172 total size: 133314708 (127MB)
82 20:06:25.865413 Using unxz to decompress xz
83 20:06:25.876473 progress 0% (0MB)
84 20:06:26.235877 progress 5% (6MB)
85 20:06:26.605976 progress 10% (12MB)
86 20:06:26.905056 progress 15% (19MB)
87 20:06:27.112443 progress 20% (25MB)
88 20:06:27.364365 progress 25% (31MB)
89 20:06:27.709205 progress 30% (38MB)
90 20:06:28.058586 progress 35% (44MB)
91 20:06:28.457316 progress 40% (50MB)
92 20:06:29.025947 progress 45% (57MB)
93 20:06:29.388206 progress 50% (63MB)
94 20:06:29.766435 progress 55% (69MB)
95 20:06:30.141312 progress 60% (76MB)
96 20:06:30.514646 progress 65% (82MB)
97 20:06:30.887992 progress 70% (89MB)
98 20:06:31.255775 progress 75% (95MB)
99 20:06:31.698802 progress 80% (101MB)
100 20:06:32.146970 progress 85% (108MB)
101 20:06:32.428353 progress 90% (114MB)
102 20:06:32.770399 progress 95% (120MB)
103 20:06:33.161930 progress 100% (127MB)
104 20:06:33.167533 127MB downloaded in 7.30s (17.41MB/s)
105 20:06:33.167793 end: 1.3.1 http-download (duration 00:00:07) [common]
107 20:06:33.168050 end: 1.3 download-retry (duration 00:00:07) [common]
108 20:06:33.168142 start: 1.4 download-retry (timeout 00:09:50) [common]
109 20:06:33.168229 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 20:06:33.168342 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-234-g4e6ec7162c8e/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 20:06:33.168412 saving as /var/lib/lava/dispatcher/tmp/8411797/tftp-deploy-7w6_tfze/modules/modules.tar
112 20:06:33.168473 total size: 51664 (0MB)
113 20:06:33.168535 Using unxz to decompress xz
114 20:06:33.173506 progress 63% (0MB)
115 20:06:33.173913 progress 100% (0MB)
116 20:06:33.177114 0MB downloaded in 0.01s (5.71MB/s)
117 20:06:33.177329 end: 1.4.1 http-download (duration 00:00:00) [common]
119 20:06:33.177582 end: 1.4 download-retry (duration 00:00:00) [common]
120 20:06:33.177678 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
121 20:06:33.177773 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
122 20:06:34.429708 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8411797/extract-nfsrootfs-_4_znp71
123 20:06:34.429909 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 20:06:34.430013 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 20:06:34.430150 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai
126 20:06:34.430250 makedir: /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin
127 20:06:34.430333 makedir: /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/tests
128 20:06:34.430414 makedir: /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/results
129 20:06:34.430511 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-add-keys
130 20:06:34.430644 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-add-sources
131 20:06:34.430770 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-background-process-start
132 20:06:34.430891 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-background-process-stop
133 20:06:34.431056 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-common-functions
134 20:06:34.431168 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-echo-ipv4
135 20:06:34.431280 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-install-packages
136 20:06:34.431390 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-installed-packages
137 20:06:34.431500 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-os-build
138 20:06:34.431613 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-probe-channel
139 20:06:34.431724 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-probe-ip
140 20:06:34.431833 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-target-ip
141 20:06:34.431942 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-target-mac
142 20:06:34.432051 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-target-storage
143 20:06:34.432163 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-test-case
144 20:06:34.432274 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-test-event
145 20:06:34.432384 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-test-feedback
146 20:06:34.432509 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-test-raise
147 20:06:34.432678 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-test-reference
148 20:06:34.432791 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-test-runner
149 20:06:34.432915 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-test-set
150 20:06:34.433024 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-test-shell
151 20:06:34.433135 Updating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-install-packages (oe)
152 20:06:34.433262 Updating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/bin/lava-installed-packages (oe)
153 20:06:34.433374 Creating /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/environment
154 20:06:34.433461 LAVA metadata
155 20:06:34.433526 - LAVA_JOB_ID=8411797
156 20:06:34.433590 - LAVA_DISPATCHER_IP=192.168.201.1
157 20:06:34.433686 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 20:06:34.433751 skipped lava-vland-overlay
159 20:06:34.433842 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 20:06:34.433935 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 20:06:34.433998 skipped lava-multinode-overlay
162 20:06:34.434071 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 20:06:34.434151 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 20:06:34.434221 Loading test definitions
165 20:06:34.434309 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
166 20:06:34.434378 Using /lava-8411797 at stage 0
167 20:06:34.434696 uuid=8411797_1.5.2.3.1 testdef=None
168 20:06:34.434786 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 20:06:34.434872 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
170 20:06:34.435375 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 20:06:34.435602 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
173 20:06:34.436192 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 20:06:34.436426 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
176 20:06:34.436993 runner path: /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/0/tests/0_dmesg test_uuid 8411797_1.5.2.3.1
177 20:06:34.437138 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 20:06:34.437367 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
180 20:06:34.437440 Using /lava-8411797 at stage 1
181 20:06:34.437676 uuid=8411797_1.5.2.3.5 testdef=None
182 20:06:34.437765 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 20:06:34.437852 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
184 20:06:34.438286 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 20:06:34.438508 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
187 20:06:34.439118 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 20:06:34.439357 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
190 20:06:34.439900 runner path: /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/1/tests/1_bootrr test_uuid 8411797_1.5.2.3.5
191 20:06:34.440075 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 20:06:34.440286 Creating lava-test-runner.conf files
194 20:06:34.440350 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/0 for stage 0
195 20:06:34.440432 - 0_dmesg
196 20:06:34.440507 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8411797/lava-overlay-cud78uai/lava-8411797/1 for stage 1
197 20:06:34.440609 - 1_bootrr
198 20:06:34.440713 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 20:06:34.440800 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
200 20:06:34.446457 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 20:06:34.446563 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
202 20:06:34.446651 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 20:06:34.446739 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 20:06:34.446850 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
205 20:06:34.548768 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 20:06:34.549127 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
207 20:06:34.549242 extracting modules file /var/lib/lava/dispatcher/tmp/8411797/tftp-deploy-7w6_tfze/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8411797/extract-nfsrootfs-_4_znp71
208 20:06:34.553370 extracting modules file /var/lib/lava/dispatcher/tmp/8411797/tftp-deploy-7w6_tfze/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8411797/extract-overlay-ramdisk-0gu6q946/ramdisk
209 20:06:34.557251 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 20:06:34.557365 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
211 20:06:34.557446 [common] Applying overlay to NFS
212 20:06:34.557518 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8411797/compress-overlay-33d30ozb/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8411797/extract-nfsrootfs-_4_znp71
213 20:06:34.561364 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 20:06:34.561475 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
215 20:06:34.561566 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 20:06:34.561655 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
217 20:06:34.561736 Building ramdisk /var/lib/lava/dispatcher/tmp/8411797/extract-overlay-ramdisk-0gu6q946/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8411797/extract-overlay-ramdisk-0gu6q946/ramdisk
218 20:06:34.594741 >> 24546 blocks
219 20:06:35.051958 rename /var/lib/lava/dispatcher/tmp/8411797/extract-overlay-ramdisk-0gu6q946/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8411797/tftp-deploy-7w6_tfze/ramdisk/ramdisk.cpio.gz
220 20:06:35.052370 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
221 20:06:35.052492 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
222 20:06:35.052596 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
223 20:06:35.052696 No mkimage arch provided, not using FIT.
224 20:06:35.052786 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 20:06:35.052873 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 20:06:35.052971 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 20:06:35.053065 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
228 20:06:35.053144 No LXC device requested
229 20:06:35.053225 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 20:06:35.053318 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
231 20:06:35.053400 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 20:06:35.053471 Checking files for TFTP limit of 4294967296 bytes.
233 20:06:35.053854 end: 1 tftp-deploy (duration 00:00:12) [common]
234 20:06:35.053961 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 20:06:35.054057 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 20:06:35.054188 substitutions:
237 20:06:35.054256 - {DTB}: None
238 20:06:35.054323 - {INITRD}: 8411797/tftp-deploy-7w6_tfze/ramdisk/ramdisk.cpio.gz
239 20:06:35.054385 - {KERNEL}: 8411797/tftp-deploy-7w6_tfze/kernel/bzImage
240 20:06:35.054446 - {LAVA_MAC}: None
241 20:06:35.054505 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8411797/extract-nfsrootfs-_4_znp71
242 20:06:35.054564 - {NFS_SERVER_IP}: 192.168.201.1
243 20:06:35.054623 - {PRESEED_CONFIG}: None
244 20:06:35.054681 - {PRESEED_LOCAL}: None
245 20:06:35.054737 - {RAMDISK}: 8411797/tftp-deploy-7w6_tfze/ramdisk/ramdisk.cpio.gz
246 20:06:35.054794 - {ROOT_PART}: None
247 20:06:35.054850 - {ROOT}: None
248 20:06:35.054936 - {SERVER_IP}: 192.168.201.1
249 20:06:35.055010 - {TEE}: None
250 20:06:35.055066 Parsed boot commands:
251 20:06:35.055122 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 20:06:35.055275 Parsed boot commands: tftpboot 192.168.201.1 8411797/tftp-deploy-7w6_tfze/kernel/bzImage 8411797/tftp-deploy-7w6_tfze/kernel/cmdline 8411797/tftp-deploy-7w6_tfze/ramdisk/ramdisk.cpio.gz
253 20:06:35.055371 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 20:06:35.055463 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 20:06:35.055565 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 20:06:35.055655 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 20:06:35.055727 Not connected, no need to disconnect.
258 20:06:35.055807 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 20:06:35.055893 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 20:06:35.055964 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
261 20:06:35.058636 Setting prompt string to ['lava-test: # ']
262 20:06:35.058959 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 20:06:35.059066 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 20:06:35.059168 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 20:06:35.059262 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 20:06:35.059434 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
267 20:06:35.078299 >> Command sent successfully.
268 20:06:35.080203 Returned 0 in 0 seconds
269 20:06:35.181437 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 20:06:35.182744 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 20:06:35.183263 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 20:06:35.183677 Setting prompt string to 'Starting depthcharge on Voema...'
274 20:06:35.183991 Changing prompt to 'Starting depthcharge on Voema...'
275 20:06:35.184315 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 20:06:35.185442 [Enter `^Ec?' for help]
277 20:06:43.619467
278 20:06:43.620135
279 20:06:43.629812 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 20:06:43.633188 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 20:06:43.639617 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 20:06:43.643096 CPU: AES supported, TXT NOT supported, VT supported
283 20:06:43.650009 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 20:06:43.653210 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 20:06:43.656559
286 20:06:43.659332 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
287 20:06:43.662669 VBOOT: Loading verstage.
288 20:06:43.666291 FMAP: Found "FLASH" version 1.1 at 0x1804000.
289 20:06:43.672806 FMAP: base = 0x0 size = 0x2000000 #areas = 32
290 20:06:43.676044 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 20:06:43.687381 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
292 20:06:43.693514 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
293 20:06:43.694166
294 20:06:43.694659
295 20:06:43.706822 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
296 20:06:43.720254 Probing TPM: . done!
297 20:06:43.723605 TPM ready after 0 ms
298 20:06:43.727320 Connected to device vid:did:rid of 1ae0:0028:00
299 20:06:43.738027 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
300 20:06:43.744839 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
301 20:06:43.748569 Initialized TPM device CR50 revision 0
302 20:06:43.800092 tlcl_send_startup: Startup return code is 0
303 20:06:43.800665 TPM: setup succeeded
304 20:06:43.815511 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
305 20:06:43.829695 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
306 20:06:43.842028 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
307 20:06:43.851845 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 20:06:43.855442 Chrome EC: UHEPI supported
309 20:06:43.859251 Phase 1
310 20:06:43.862140 FMAP: area GBB found @ 1805000 (458752 bytes)
311 20:06:43.869061 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
312 20:06:43.871809
313 20:06:43.878641 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
314 20:06:43.885495 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
315 20:06:43.891902 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
316 20:06:43.895277 Recovery requested (1009000e)
317 20:06:43.898476 TPM: Extending digest for VBOOT: boot mode into PCR 0
318 20:06:43.910334 tlcl_extend: response is 0
319 20:06:43.917442 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
320 20:06:43.926499 tlcl_extend: response is 0
321 20:06:43.933444 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
322 20:06:43.939637 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
323 20:06:43.946674 BS: verstage times (exec / console): total (unknown) / 142 ms
324 20:06:43.947160
325 20:06:43.947508
326 20:06:43.959887 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
327 20:06:43.966233 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
328 20:06:43.969487 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
329 20:06:43.973118 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
330 20:06:43.979677 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
331 20:06:43.982822 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
332 20:06:43.986208 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
333 20:06:43.989423 TCO_STS: 0000 0000
334 20:06:43.992963 GEN_PMCON: d0015038 00002200
335 20:06:43.995875 GBLRST_CAUSE: 00000000 00000000
336 20:06:43.996319 HPR_CAUSE0: 00000000
337 20:06:43.999690 prev_sleep_state 5
338 20:06:44.002979 Boot Count incremented to 13490
339 20:06:44.009925 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 20:06:44.016444 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
341 20:06:44.022874 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
342 20:06:44.029839 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
343 20:06:44.034388 Chrome EC: UHEPI supported
344 20:06:44.040763 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
345 20:06:44.053893 Probing TPM: done!
346 20:06:44.060451 Connected to device vid:did:rid of 1ae0:0028:00
347 20:06:44.071375 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
348 20:06:44.078937 Initialized TPM device CR50 revision 0
349 20:06:44.088303 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
350 20:06:44.095390 MRC: Hash idx 0x100b comparison successful.
351 20:06:44.098692 MRC cache found, size faa8
352 20:06:44.099208 bootmode is set to: 2
353 20:06:44.101814 SPD index = 0
354 20:06:44.108686 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
355 20:06:44.111574 SPD: module type is LPDDR4X
356 20:06:44.115163 SPD: module part number is MT53E512M64D4NW-046
357 20:06:44.121867 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
358 20:06:44.124797 SPD: device width 16 bits, bus width 16 bits
359 20:06:44.132499 SPD: module size is 1024 MB (per channel)
360 20:06:44.563157 CBMEM:
361 20:06:44.565888 IMD: root @ 0x76fff000 254 entries.
362 20:06:44.569067 IMD: root @ 0x76ffec00 62 entries.
363 20:06:44.572659 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
364 20:06:44.579283 FMAP: area RW_VPD found @ f35000 (8192 bytes)
365 20:06:44.582544 External stage cache:
366 20:06:44.586488 IMD: root @ 0x7b3ff000 254 entries.
367 20:06:44.588994 IMD: root @ 0x7b3fec00 62 entries.
368 20:06:44.604587 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
369 20:06:44.611312 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 20:06:44.617474 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
371 20:06:44.631470 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 20:06:44.634946 cse_lite: Skip switching to RW in the recovery path
373 20:06:44.638283
374 20:06:44.638837 8 DIMMs found
375 20:06:44.639282 SMM Memory Map
376 20:06:44.642111 SMRAM : 0x7b000000 0x800000
377 20:06:44.646147 Subregion 0: 0x7b000000 0x200000
378 20:06:44.649907 Subregion 1: 0x7b200000 0x200000
379 20:06:44.652825 Subregion 2: 0x7b400000 0x400000
380 20:06:44.657148 top_of_ram = 0x77000000
381 20:06:44.663608 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
382 20:06:44.666287 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
383 20:06:44.673434 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
384 20:06:44.676519 MTRR Range: Start=ff000000 End=0 (Size 1000000)
385 20:06:44.683312 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
386 20:06:44.689486 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
387 20:06:44.701795 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
388 20:06:44.704523 Processing 211 relocs. Offset value of 0x74c0b000
389 20:06:44.707664
390 20:06:44.714745 BS: romstage times (exec / console): total (unknown) / 277 ms
391 20:06:44.720540
392 20:06:44.720978
393 20:06:44.730741 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
394 20:06:44.733915 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
395 20:06:44.743607 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
396 20:06:44.750114 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
397 20:06:44.756746 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
398 20:06:44.763975 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
399 20:06:44.810559 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
400 20:06:44.817478 Processing 5008 relocs. Offset value of 0x75d98000
401 20:06:44.821082 BS: postcar times (exec / console): total (unknown) / 59 ms
402 20:06:44.821579
403 20:06:44.823730
404 20:06:44.824179
405 20:06:44.834095 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 20:06:44.834547 Normal boot
407 20:06:44.837980 FW_CONFIG value is 0x804c02
408 20:06:44.841321 PCI: 00:07.0 disabled by fw_config
409 20:06:44.844858 PCI: 00:07.1 disabled by fw_config
410 20:06:44.847649 PCI: 00:0d.2 disabled by fw_config
411 20:06:44.851328 PCI: 00:1c.7 disabled by fw_config
412 20:06:44.857749 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 20:06:44.864871 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 20:06:44.867572 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 20:06:44.870989 GENERIC: 0.0 disabled by fw_config
416 20:06:44.874070 GENERIC: 1.0 disabled by fw_config
417 20:06:44.881346 fw_config match found: DB_USB=USB3_ACTIVE
418 20:06:44.884340 fw_config match found: DB_USB=USB3_ACTIVE
419 20:06:44.887453 fw_config match found: DB_USB=USB3_ACTIVE
420 20:06:44.890640 fw_config match found: DB_USB=USB3_ACTIVE
421 20:06:44.897431 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 20:06:44.903836 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 20:06:44.910828 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 20:06:44.920811 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 20:06:44.924078 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 20:06:44.930489 microcode: Update skipped, already up-to-date
427 20:06:44.937659 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 20:06:44.964668 Detected 4 core, 8 thread CPU.
429 20:06:44.968047 Setting up SMI for CPU
430 20:06:44.971260 IED base = 0x7b400000
431 20:06:44.971858 IED size = 0x00400000
432 20:06:44.974710 Will perform SMM setup.
433 20:06:44.981185 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
434 20:06:44.987544 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 20:06:44.994826 Processing 16 relocs. Offset value of 0x00030000
436 20:06:44.997971 Attempting to start 7 APs
437 20:06:45.000873 Waiting for 10ms after sending INIT.
438 20:06:45.016609 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
439 20:06:45.020091 AP: slot 6 apic_id 2.
440 20:06:45.022796 AP: slot 2 apic_id 3.
441 20:06:45.023439 AP: slot 5 apic_id 6.
442 20:06:45.026510 AP: slot 4 apic_id 7.
443 20:06:45.029406 AP: slot 3 apic_id 5.
444 20:06:45.029964 AP: slot 7 apic_id 4.
445 20:06:45.030373 done.
446 20:06:45.036043 Waiting for 2nd SIPI to complete...done.
447 20:06:45.042869 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 20:06:45.049639 Processing 13 relocs. Offset value of 0x00038000
449 20:06:45.050294 Unable to locate Global NVS
450 20:06:45.053128
451 20:06:45.059517 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 20:06:45.062952 Installing permanent SMM handler to 0x7b000000
453 20:06:45.072802 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 20:06:45.075969 Processing 794 relocs. Offset value of 0x7b010000
455 20:06:45.086114 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 20:06:45.089564 Processing 13 relocs. Offset value of 0x7b008000
457 20:06:45.095853 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 20:06:45.102637 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 20:06:45.106264 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 20:06:45.113048 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 20:06:45.119690 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 20:06:45.126108 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 20:06:45.133099 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 20:06:45.133551 Unable to locate Global NVS
465 20:06:45.142535 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 20:06:45.145860 Clearing SMI status registers
467 20:06:45.146305 SMI_STS: PM1
468 20:06:45.148956 PM1_STS: PWRBTN
469 20:06:45.156003 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 20:06:45.159237 In relocation handler: CPU 0
471 20:06:45.162718 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 20:06:45.168984 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 20:06:45.169425 Relocation complete.
474 20:06:45.175895 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 20:06:45.179104
476 20:06:45.179670 In relocation handler: CPU 1
477 20:06:45.185519 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
478 20:06:45.186135 Relocation complete.
479 20:06:45.192625 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
480 20:06:45.195520 In relocation handler: CPU 7
481 20:06:45.202487 New SMBASE=0x7affe400 IEDBASE=0x7b400000
482 20:06:45.205775 Writing SMRR. base = 0x7b000006, mask=0xff800c00
483 20:06:45.209068 Relocation complete.
484 20:06:45.215501 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
485 20:06:45.219010 In relocation handler: CPU 3
486 20:06:45.222431 New SMBASE=0x7afff400 IEDBASE=0x7b400000
487 20:06:45.226714 Relocation complete.
488 20:06:45.232272 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
489 20:06:45.235608 In relocation handler: CPU 4
490 20:06:45.239204 New SMBASE=0x7afff000 IEDBASE=0x7b400000
491 20:06:45.242626 Relocation complete.
492 20:06:45.249440 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
493 20:06:45.252690 In relocation handler: CPU 5
494 20:06:45.256070 New SMBASE=0x7affec00 IEDBASE=0x7b400000
495 20:06:45.259421 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 20:06:45.262587 Relocation complete.
497 20:06:45.269217 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
498 20:06:45.272228 In relocation handler: CPU 2
499 20:06:45.275458 New SMBASE=0x7afff800 IEDBASE=0x7b400000
500 20:06:45.278685 Relocation complete.
501 20:06:45.286149 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
502 20:06:45.289174 In relocation handler: CPU 6
503 20:06:45.292114 New SMBASE=0x7affe800 IEDBASE=0x7b400000
504 20:06:45.298709 Writing SMRR. base = 0x7b000006, mask=0xff800c00
505 20:06:45.299171 Relocation complete.
506 20:06:45.302329 Initializing CPU #0
507 20:06:45.306587 CPU: vendor Intel device 806c1
508 20:06:45.310299 CPU: family 06, model 8c, stepping 01
509 20:06:45.313089 Clearing out pending MCEs
510 20:06:45.313533 Setting up local APIC...
511 20:06:45.316256 apic_id: 0x00 done.
512 20:06:45.319902 Turbo is available but hidden
513 20:06:45.323351 Turbo is available and visible
514 20:06:45.326876 microcode: Update skipped, already up-to-date
515 20:06:45.329739 CPU #0 initialized
516 20:06:45.333333 Initializing CPU #5
517 20:06:45.333761 Initializing CPU #4
518 20:06:45.337010 CPU: vendor Intel device 806c1
519 20:06:45.340329 CPU: family 06, model 8c, stepping 01
520 20:06:45.343534 CPU: vendor Intel device 806c1
521 20:06:45.347116 CPU: family 06, model 8c, stepping 01
522 20:06:45.349824 Clearing out pending MCEs
523 20:06:45.353464 Clearing out pending MCEs
524 20:06:45.356559 Initializing CPU #2
525 20:06:45.357037 Initializing CPU #6
526 20:06:45.359619 CPU: vendor Intel device 806c1
527 20:06:45.363792 CPU: family 06, model 8c, stepping 01
528 20:06:45.366553 CPU: vendor Intel device 806c1
529 20:06:45.370307 CPU: family 06, model 8c, stepping 01
530 20:06:45.373912 Clearing out pending MCEs
531 20:06:45.377209 Clearing out pending MCEs
532 20:06:45.379640 Setting up local APIC...
533 20:06:45.380118 Initializing CPU #1
534 20:06:45.383121 Setting up local APIC...
535 20:06:45.386241 CPU: vendor Intel device 806c1
536 20:06:45.389498 CPU: family 06, model 8c, stepping 01
537 20:06:45.393022 Setting up local APIC...
538 20:06:45.396035 Setting up local APIC...
539 20:06:45.396474 Initializing CPU #7
540 20:06:45.399780 Initializing CPU #3
541 20:06:45.402742 CPU: vendor Intel device 806c1
542 20:06:45.406463 CPU: family 06, model 8c, stepping 01
543 20:06:45.410006 apic_id: 0x03 done.
544 20:06:45.410541 apic_id: 0x02 done.
545 20:06:45.412985 Clearing out pending MCEs
546 20:06:45.416688 apic_id: 0x06 done.
547 20:06:45.417124 apic_id: 0x07 done.
548 20:06:45.422753 microcode: Update skipped, already up-to-date
549 20:06:45.426187 microcode: Update skipped, already up-to-date
550 20:06:45.429591 CPU #5 initialized
551 20:06:45.430029 CPU #4 initialized
552 20:06:45.436813 microcode: Update skipped, already up-to-date
553 20:06:45.440127 microcode: Update skipped, already up-to-date
554 20:06:45.443465 CPU #6 initialized
555 20:06:45.444065 CPU #2 initialized
556 20:06:45.446474 CPU: vendor Intel device 806c1
557 20:06:45.449847 CPU: family 06, model 8c, stepping 01
558 20:06:45.452606 Clearing out pending MCEs
559 20:06:45.456205 Clearing out pending MCEs
560 20:06:45.459822 Setting up local APIC...
561 20:06:45.463104 Setting up local APIC...
562 20:06:45.463683 apic_id: 0x04 done.
563 20:06:45.466575 Setting up local APIC...
564 20:06:45.469451 apic_id: 0x01 done.
565 20:06:45.472977 microcode: Update skipped, already up-to-date
566 20:06:45.476318 apic_id: 0x05 done.
567 20:06:45.479380 microcode: Update skipped, already up-to-date
568 20:06:45.482826 microcode: Update skipped, already up-to-date
569 20:06:45.485959 CPU #1 initialized
570 20:06:45.489661 CPU #7 initialized
571 20:06:45.490198 CPU #3 initialized
572 20:06:45.492715 bsp_do_flight_plan done after 454 msecs.
573 20:06:45.495895 CPU: frequency set to 4000 MHz
574 20:06:45.499520 Enabling SMIs.
575 20:06:45.505655 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
576 20:06:45.521286 SATAXPCIE1 indicates PCIe NVMe is present
577 20:06:45.525124 Probing TPM: done!
578 20:06:45.528254 Connected to device vid:did:rid of 1ae0:0028:00
579 20:06:45.538702 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
580 20:06:45.541994 Initialized TPM device CR50 revision 0
581 20:06:45.545158 Enabling S0i3.4
582 20:06:45.551982 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
583 20:06:45.555872 Found a VBT of 8704 bytes after decompression
584 20:06:45.561939 cse_lite: CSE RO boot. HybridStorageMode disabled
585 20:06:45.568194 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
586 20:06:45.643353 FSPS returned 0
587 20:06:45.646678 Executing Phase 1 of FspMultiPhaseSiInit
588 20:06:45.656939 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
589 20:06:45.660140 port C0 DISC req: usage 1 usb3 1 usb2 5
590 20:06:45.663906 Raw Buffer output 0 00000511
591 20:06:45.666800 Raw Buffer output 1 00000000
592 20:06:45.670613 pmc_send_ipc_cmd succeeded
593 20:06:45.674224 port C1 DISC req: usage 1 usb3 2 usb2 3
594 20:06:45.677304
595 20:06:45.677751 Raw Buffer output 0 00000321
596 20:06:45.680586 Raw Buffer output 1 00000000
597 20:06:45.685081 pmc_send_ipc_cmd succeeded
598 20:06:45.689576 Detected 4 core, 8 thread CPU.
599 20:06:45.692952 Detected 4 core, 8 thread CPU.
600 20:06:45.927540 Display FSP Version Info HOB
601 20:06:45.930619 Reference Code - CPU = a.0.4c.31
602 20:06:45.934483 uCode Version = 0.0.0.86
603 20:06:45.937743 TXT ACM version = ff.ff.ff.ffff
604 20:06:45.940567 Reference Code - ME = a.0.4c.31
605 20:06:45.944493 MEBx version = 0.0.0.0
606 20:06:45.947096 ME Firmware Version = Consumer SKU
607 20:06:45.950697 Reference Code - PCH = a.0.4c.31
608 20:06:45.954228 PCH-CRID Status = Disabled
609 20:06:45.957017 PCH-CRID Original Value = ff.ff.ff.ffff
610 20:06:45.960765 PCH-CRID New Value = ff.ff.ff.ffff
611 20:06:45.963585 OPROM - RST - RAID = ff.ff.ff.ffff
612 20:06:45.967376 PCH Hsio Version = 4.0.0.0
613 20:06:45.970557 Reference Code - SA - System Agent = a.0.4c.31
614 20:06:45.973834 Reference Code - MRC = 2.0.0.1
615 20:06:45.977213 SA - PCIe Version = a.0.4c.31
616 20:06:45.980764 SA-CRID Status = Disabled
617 20:06:45.983604 SA-CRID Original Value = 0.0.0.1
618 20:06:45.986768 SA-CRID New Value = 0.0.0.1
619 20:06:45.990472 OPROM - VBIOS = ff.ff.ff.ffff
620 20:06:45.993896 IO Manageability Engine FW Version = 11.1.4.0
621 20:06:45.997695 PHY Build Version = 0.0.0.e0
622 20:06:46.000551 Thunderbolt(TM) FW Version = 0.0.0.0
623 20:06:46.007196 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
624 20:06:46.010540 ITSS IRQ Polarities Before:
625 20:06:46.011107 IPC0: 0xffffffff
626 20:06:46.013543 IPC1: 0xffffffff
627 20:06:46.013979 IPC2: 0xffffffff
628 20:06:46.017509 IPC3: 0xffffffff
629 20:06:46.020130 ITSS IRQ Polarities After:
630 20:06:46.020619 IPC0: 0xffffffff
631 20:06:46.023288 IPC1: 0xffffffff
632 20:06:46.023721 IPC2: 0xffffffff
633 20:06:46.027069 IPC3: 0xffffffff
634 20:06:46.030520 Found PCIe Root Port #9 at PCI: 00:1d.0.
635 20:06:46.043216 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
636 20:06:46.053618 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
637 20:06:46.066616 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
638 20:06:46.073623 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
639 20:06:46.076157 Enumerating buses...
640 20:06:46.079814 Show all devs... Before device enumeration.
641 20:06:46.083059 Root Device: enabled 1
642 20:06:46.083663 DOMAIN: 0000: enabled 1
643 20:06:46.086346 CPU_CLUSTER: 0: enabled 1
644 20:06:46.089532 PCI: 00:00.0: enabled 1
645 20:06:46.093399 PCI: 00:02.0: enabled 1
646 20:06:46.093905 PCI: 00:04.0: enabled 1
647 20:06:46.096389 PCI: 00:05.0: enabled 1
648 20:06:46.100578 PCI: 00:06.0: enabled 0
649 20:06:46.103025 PCI: 00:07.0: enabled 0
650 20:06:46.103510 PCI: 00:07.1: enabled 0
651 20:06:46.106418 PCI: 00:07.2: enabled 0
652 20:06:46.109853 PCI: 00:07.3: enabled 0
653 20:06:46.110431 PCI: 00:08.0: enabled 1
654 20:06:46.112945
655 20:06:46.113536 PCI: 00:09.0: enabled 0
656 20:06:46.116306 PCI: 00:0a.0: enabled 0
657 20:06:46.119997 PCI: 00:0d.0: enabled 1
658 20:06:46.120505 PCI: 00:0d.1: enabled 0
659 20:06:46.123103 PCI: 00:0d.2: enabled 0
660 20:06:46.126931 PCI: 00:0d.3: enabled 0
661 20:06:46.129993 PCI: 00:0e.0: enabled 0
662 20:06:46.130479 PCI: 00:10.2: enabled 1
663 20:06:46.133257 PCI: 00:10.6: enabled 0
664 20:06:46.136595 PCI: 00:10.7: enabled 0
665 20:06:46.139753 PCI: 00:12.0: enabled 0
666 20:06:46.140199 PCI: 00:12.6: enabled 0
667 20:06:46.142986 PCI: 00:13.0: enabled 0
668 20:06:46.146533 PCI: 00:14.0: enabled 1
669 20:06:46.149674 PCI: 00:14.1: enabled 0
670 20:06:46.150117 PCI: 00:14.2: enabled 1
671 20:06:46.153056 PCI: 00:14.3: enabled 1
672 20:06:46.156345 PCI: 00:15.0: enabled 1
673 20:06:46.156815 PCI: 00:15.1: enabled 1
674 20:06:46.159906 PCI: 00:15.2: enabled 1
675 20:06:46.162985 PCI: 00:15.3: enabled 1
676 20:06:46.167038 PCI: 00:16.0: enabled 1
677 20:06:46.167557 PCI: 00:16.1: enabled 0
678 20:06:46.169897 PCI: 00:16.2: enabled 0
679 20:06:46.172907 PCI: 00:16.3: enabled 0
680 20:06:46.176324 PCI: 00:16.4: enabled 0
681 20:06:46.176865 PCI: 00:16.5: enabled 0
682 20:06:46.179323 PCI: 00:17.0: enabled 1
683 20:06:46.182759 PCI: 00:19.0: enabled 0
684 20:06:46.186252 PCI: 00:19.1: enabled 1
685 20:06:46.186773 PCI: 00:19.2: enabled 0
686 20:06:46.189537 PCI: 00:1c.0: enabled 1
687 20:06:46.192951 PCI: 00:1c.1: enabled 0
688 20:06:46.193403 PCI: 00:1c.2: enabled 0
689 20:06:46.195986
690 20:06:46.196475 PCI: 00:1c.3: enabled 0
691 20:06:46.199136 PCI: 00:1c.4: enabled 0
692 20:06:46.202634 PCI: 00:1c.5: enabled 0
693 20:06:46.203127 PCI: 00:1c.6: enabled 1
694 20:06:46.206110 PCI: 00:1c.7: enabled 0
695 20:06:46.209521 PCI: 00:1d.0: enabled 1
696 20:06:46.212960 PCI: 00:1d.1: enabled 0
697 20:06:46.213505 PCI: 00:1d.2: enabled 1
698 20:06:46.216270 PCI: 00:1d.3: enabled 0
699 20:06:46.219484 PCI: 00:1e.0: enabled 1
700 20:06:46.223324 PCI: 00:1e.1: enabled 0
701 20:06:46.223757 PCI: 00:1e.2: enabled 1
702 20:06:46.225736 PCI: 00:1e.3: enabled 1
703 20:06:46.229192 PCI: 00:1f.0: enabled 1
704 20:06:46.232398 PCI: 00:1f.1: enabled 0
705 20:06:46.232837 PCI: 00:1f.2: enabled 1
706 20:06:46.236218 PCI: 00:1f.3: enabled 1
707 20:06:46.239325 PCI: 00:1f.4: enabled 0
708 20:06:46.239760 PCI: 00:1f.5: enabled 1
709 20:06:46.242446 PCI: 00:1f.6: enabled 0
710 20:06:46.245695 PCI: 00:1f.7: enabled 0
711 20:06:46.249496 APIC: 00: enabled 1
712 20:06:46.249932 GENERIC: 0.0: enabled 1
713 20:06:46.252881 GENERIC: 0.0: enabled 1
714 20:06:46.255679 GENERIC: 1.0: enabled 1
715 20:06:46.256112 GENERIC: 0.0: enabled 1
716 20:06:46.259433 GENERIC: 1.0: enabled 1
717 20:06:46.262814 USB0 port 0: enabled 1
718 20:06:46.265910 GENERIC: 0.0: enabled 1
719 20:06:46.266419 USB0 port 0: enabled 1
720 20:06:46.269224 GENERIC: 0.0: enabled 1
721 20:06:46.272944 I2C: 00:1a: enabled 1
722 20:06:46.273379 I2C: 00:31: enabled 1
723 20:06:46.276189 I2C: 00:32: enabled 1
724 20:06:46.279194 I2C: 00:10: enabled 1
725 20:06:46.279720 I2C: 00:15: enabled 1
726 20:06:46.282558 GENERIC: 0.0: enabled 0
727 20:06:46.285862 GENERIC: 1.0: enabled 0
728 20:06:46.289294 GENERIC: 0.0: enabled 1
729 20:06:46.289729 SPI: 00: enabled 1
730 20:06:46.292394 SPI: 00: enabled 1
731 20:06:46.295697 PNP: 0c09.0: enabled 1
732 20:06:46.296216 GENERIC: 0.0: enabled 1
733 20:06:46.299253 USB3 port 0: enabled 1
734 20:06:46.302410 USB3 port 1: enabled 1
735 20:06:46.302844 USB3 port 2: enabled 0
736 20:06:46.306027 USB3 port 3: enabled 0
737 20:06:46.309110 USB2 port 0: enabled 0
738 20:06:46.312413 USB2 port 1: enabled 1
739 20:06:46.312850 USB2 port 2: enabled 1
740 20:06:46.315749 USB2 port 3: enabled 0
741 20:06:46.318994 USB2 port 4: enabled 1
742 20:06:46.319521 USB2 port 5: enabled 0
743 20:06:46.322585 USB2 port 6: enabled 0
744 20:06:46.325952 USB2 port 7: enabled 0
745 20:06:46.326386 USB2 port 8: enabled 0
746 20:06:46.328947 USB2 port 9: enabled 0
747 20:06:46.332861 USB3 port 0: enabled 0
748 20:06:46.336227 USB3 port 1: enabled 1
749 20:06:46.336662 USB3 port 2: enabled 0
750 20:06:46.339772 USB3 port 3: enabled 0
751 20:06:46.342632 GENERIC: 0.0: enabled 1
752 20:06:46.343102 GENERIC: 1.0: enabled 1
753 20:06:46.345731 APIC: 01: enabled 1
754 20:06:46.349321 APIC: 03: enabled 1
755 20:06:46.349753 APIC: 05: enabled 1
756 20:06:46.352744 APIC: 07: enabled 1
757 20:06:46.355484 APIC: 06: enabled 1
758 20:06:46.355921 APIC: 02: enabled 1
759 20:06:46.359002 APIC: 04: enabled 1
760 20:06:46.359546 Compare with tree...
761 20:06:46.362754 Root Device: enabled 1
762 20:06:46.366591 DOMAIN: 0000: enabled 1
763 20:06:46.369042 PCI: 00:00.0: enabled 1
764 20:06:46.369594 PCI: 00:02.0: enabled 1
765 20:06:46.372454 PCI: 00:04.0: enabled 1
766 20:06:46.375467 GENERIC: 0.0: enabled 1
767 20:06:46.379294 PCI: 00:05.0: enabled 1
768 20:06:46.382052 PCI: 00:06.0: enabled 0
769 20:06:46.382496 PCI: 00:07.0: enabled 0
770 20:06:46.386018 GENERIC: 0.0: enabled 1
771 20:06:46.389144 PCI: 00:07.1: enabled 0
772 20:06:46.392634 GENERIC: 1.0: enabled 1
773 20:06:46.395304 PCI: 00:07.2: enabled 0
774 20:06:46.399211 GENERIC: 0.0: enabled 1
775 20:06:46.399709 PCI: 00:07.3: enabled 0
776 20:06:46.402253 GENERIC: 1.0: enabled 1
777 20:06:46.405798 PCI: 00:08.0: enabled 1
778 20:06:46.408759 PCI: 00:09.0: enabled 0
779 20:06:46.412714 PCI: 00:0a.0: enabled 0
780 20:06:46.413254 PCI: 00:0d.0: enabled 1
781 20:06:46.415806 USB0 port 0: enabled 1
782 20:06:46.418720 USB3 port 0: enabled 1
783 20:06:46.422336 USB3 port 1: enabled 1
784 20:06:46.425866 USB3 port 2: enabled 0
785 20:06:46.426408 USB3 port 3: enabled 0
786 20:06:46.429024 PCI: 00:0d.1: enabled 0
787 20:06:46.432359 PCI: 00:0d.2: enabled 0
788 20:06:46.435528 GENERIC: 0.0: enabled 1
789 20:06:46.438477 PCI: 00:0d.3: enabled 0
790 20:06:46.438939 PCI: 00:0e.0: enabled 0
791 20:06:46.442532 PCI: 00:10.2: enabled 1
792 20:06:46.445352 PCI: 00:10.6: enabled 0
793 20:06:46.448733 PCI: 00:10.7: enabled 0
794 20:06:46.452577 PCI: 00:12.0: enabled 0
795 20:06:46.453133 PCI: 00:12.6: enabled 0
796 20:06:46.455734 PCI: 00:13.0: enabled 0
797 20:06:46.459019 PCI: 00:14.0: enabled 1
798 20:06:46.462282 USB0 port 0: enabled 1
799 20:06:46.465404 USB2 port 0: enabled 0
800 20:06:46.465848 USB2 port 1: enabled 1
801 20:06:46.468636 USB2 port 2: enabled 1
802 20:06:46.471944 USB2 port 3: enabled 0
803 20:06:46.475434 USB2 port 4: enabled 1
804 20:06:46.478809 USB2 port 5: enabled 0
805 20:06:46.482415 USB2 port 6: enabled 0
806 20:06:46.482991 USB2 port 7: enabled 0
807 20:06:46.485637 USB2 port 8: enabled 0
808 20:06:46.489244 USB2 port 9: enabled 0
809 20:06:46.491836 USB3 port 0: enabled 0
810 20:06:46.495758 USB3 port 1: enabled 1
811 20:06:46.496361 USB3 port 2: enabled 0
812 20:06:46.498669 USB3 port 3: enabled 0
813 20:06:46.502148 PCI: 00:14.1: enabled 0
814 20:06:46.505281 PCI: 00:14.2: enabled 1
815 20:06:46.508885 PCI: 00:14.3: enabled 1
816 20:06:46.509374 GENERIC: 0.0: enabled 1
817 20:06:46.511897
818 20:06:46.512385 PCI: 00:15.0: enabled 1
819 20:06:46.515379 I2C: 00:1a: enabled 1
820 20:06:46.518836 I2C: 00:31: enabled 1
821 20:06:46.521918 I2C: 00:32: enabled 1
822 20:06:46.522404 PCI: 00:15.1: enabled 1
823 20:06:46.526374 I2C: 00:10: enabled 1
824 20:06:46.528317 PCI: 00:15.2: enabled 1
825 20:06:46.532492 PCI: 00:15.3: enabled 1
826 20:06:46.533082 PCI: 00:16.0: enabled 1
827 20:06:46.535178
828 20:06:46.535669 PCI: 00:16.1: enabled 0
829 20:06:46.538529 PCI: 00:16.2: enabled 0
830 20:06:46.541732 PCI: 00:16.3: enabled 0
831 20:06:46.545504 PCI: 00:16.4: enabled 0
832 20:06:46.545948 PCI: 00:16.5: enabled 0
833 20:06:46.548692 PCI: 00:17.0: enabled 1
834 20:06:46.551715 PCI: 00:19.0: enabled 0
835 20:06:46.555841 PCI: 00:19.1: enabled 1
836 20:06:46.556447 I2C: 00:15: enabled 1
837 20:06:46.559681 PCI: 00:19.2: enabled 0
838 20:06:46.562931 PCI: 00:1d.0: enabled 1
839 20:06:46.566589 GENERIC: 0.0: enabled 1
840 20:06:46.567168 PCI: 00:1e.0: enabled 1
841 20:06:46.569906 PCI: 00:1e.1: enabled 0
842 20:06:46.572860 PCI: 00:1e.2: enabled 1
843 20:06:46.576434 SPI: 00: enabled 1
844 20:06:46.576967 PCI: 00:1e.3: enabled 1
845 20:06:46.579712
846 20:06:46.580148 SPI: 00: enabled 1
847 20:06:46.583074 PCI: 00:1f.0: enabled 1
848 20:06:46.586790 PNP: 0c09.0: enabled 1
849 20:06:46.589461 PCI: 00:1f.1: enabled 0
850 20:06:46.589981 PCI: 00:1f.2: enabled 1
851 20:06:46.593222 GENERIC: 0.0: enabled 1
852 20:06:46.644387 GENERIC: 0.0: enabled 1
853 20:06:46.644957 GENERIC: 1.0: enabled 1
854 20:06:46.645809 PCI: 00:1f.3: enabled 1
855 20:06:46.646219 PCI: 00:1f.4: enabled 0
856 20:06:46.646572 PCI: 00:1f.5: enabled 1
857 20:06:46.646942 PCI: 00:1f.6: enabled 0
858 20:06:46.647282 PCI: 00:1f.7: enabled 0
859 20:06:46.647650 CPU_CLUSTER: 0: enabled 1
860 20:06:46.648171 APIC: 00: enabled 1
861 20:06:46.648520 APIC: 01: enabled 1
862 20:06:46.648841 APIC: 03: enabled 1
863 20:06:46.649157 APIC: 05: enabled 1
864 20:06:46.649471 APIC: 07: enabled 1
865 20:06:46.649814 APIC: 06: enabled 1
866 20:06:46.650125 APIC: 02: enabled 1
867 20:06:46.650802 APIC: 04: enabled 1
868 20:06:46.651201 Root Device scanning...
869 20:06:46.651594 scan_static_bus for Root Device
870 20:06:46.651923 DOMAIN: 0000 enabled
871 20:06:46.652236 CPU_CLUSTER: 0 enabled
872 20:06:46.695358 DOMAIN: 0000 scanning...
873 20:06:46.695940 PCI: pci_scan_bus for bus 00
874 20:06:46.696924 PCI: 00:00.0 [8086/0000] ops
875 20:06:46.697459 PCI: 00:00.0 [8086/9a12] enabled
876 20:06:46.697874 PCI: 00:02.0 [8086/0000] bus ops
877 20:06:46.698238 PCI: 00:02.0 [8086/9a40] enabled
878 20:06:46.698579 PCI: 00:04.0 [8086/0000] bus ops
879 20:06:46.698989 PCI: 00:04.0 [8086/9a03] enabled
880 20:06:46.699327 PCI: 00:05.0 [8086/9a19] enabled
881 20:06:46.699646 PCI: 00:07.0 [0000/0000] hidden
882 20:06:46.700325 PCI: 00:08.0 [8086/9a11] enabled
883 20:06:46.700684 PCI: 00:0a.0 [8086/9a0d] disabled
884 20:06:46.701211 PCI: 00:0d.0 [8086/0000] bus ops
885 20:06:46.701608 PCI: 00:0d.0 [8086/9a13] enabled
886 20:06:46.701963 PCI: 00:14.0 [8086/0000] bus ops
887 20:06:46.706851 PCI: 00:14.0 [8086/a0ed] enabled
888 20:06:46.707386 PCI: 00:14.2 [8086/a0ef] enabled
889 20:06:46.710410 PCI: 00:14.3 [8086/0000] bus ops
890 20:06:46.710949 PCI: 00:14.3 [8086/a0f0] enabled
891 20:06:46.713108 PCI: 00:15.0 [8086/0000] bus ops
892 20:06:46.713835 PCI: 00:15.0 [8086/a0e8] enabled
893 20:06:46.715969 PCI: 00:15.1 [8086/0000] bus ops
894 20:06:46.719718 PCI: 00:15.1 [8086/a0e9] enabled
895 20:06:46.723318 PCI: 00:15.2 [8086/0000] bus ops
896 20:06:46.726059 PCI: 00:15.2 [8086/a0ea] enabled
897 20:06:46.729782 PCI: 00:15.3 [8086/0000] bus ops
898 20:06:46.732749 PCI: 00:15.3 [8086/a0eb] enabled
899 20:06:46.736581 PCI: 00:16.0 [8086/0000] ops
900 20:06:46.739389 PCI: 00:16.0 [8086/a0e0] enabled
901 20:06:46.746762 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 20:06:46.750076 PCI: 00:19.0 [8086/0000] bus ops
903 20:06:46.753133 PCI: 00:19.0 [8086/a0c5] disabled
904 20:06:46.756235 PCI: 00:19.1 [8086/0000] bus ops
905 20:06:46.759479 PCI: 00:19.1 [8086/a0c6] enabled
906 20:06:46.763119 PCI: 00:1d.0 [8086/0000] bus ops
907 20:06:46.766259 PCI: 00:1d.0 [8086/a0b0] enabled
908 20:06:46.769780 PCI: 00:1e.0 [8086/0000] ops
909 20:06:46.773405 PCI: 00:1e.0 [8086/a0a8] enabled
910 20:06:46.776730 PCI: 00:1e.2 [8086/0000] bus ops
911 20:06:46.779613 PCI: 00:1e.2 [8086/a0aa] enabled
912 20:06:46.782774 PCI: 00:1e.3 [8086/0000] bus ops
913 20:06:46.786314 PCI: 00:1e.3 [8086/a0ab] enabled
914 20:06:46.790105 PCI: 00:1f.0 [8086/0000] bus ops
915 20:06:46.792931 PCI: 00:1f.0 [8086/a087] enabled
916 20:06:46.793446 RTC Init
917 20:06:46.796049 Set power on after power failure.
918 20:06:46.799649 Disabling Deep S3
919 20:06:46.800094 Disabling Deep S3
920 20:06:46.803052 Disabling Deep S4
921 20:06:46.803500 Disabling Deep S4
922 20:06:46.806095 Disabling Deep S5
923 20:06:46.809414 Disabling Deep S5
924 20:06:46.813139 PCI: 00:1f.2 [0000/0000] hidden
925 20:06:46.816148 PCI: 00:1f.3 [8086/0000] bus ops
926 20:06:46.819742 PCI: 00:1f.3 [8086/a0c8] enabled
927 20:06:46.822467 PCI: 00:1f.5 [8086/0000] bus ops
928 20:06:46.825917 PCI: 00:1f.5 [8086/a0a4] enabled
929 20:06:46.826365 PCI: Leftover static devices:
930 20:06:46.829523
931 20:06:46.829973 PCI: 00:10.2
932 20:06:46.830517 PCI: 00:10.6
933 20:06:46.832873 PCI: 00:10.7
934 20:06:46.833432 PCI: 00:06.0
935 20:06:46.836279 PCI: 00:07.1
936 20:06:46.836726 PCI: 00:07.2
937 20:06:46.837076 PCI: 00:07.3
938 20:06:46.840051 PCI: 00:09.0
939 20:06:46.840612 PCI: 00:0d.1
940 20:06:46.843220 PCI: 00:0d.2
941 20:06:46.843778 PCI: 00:0d.3
942 20:06:46.844131 PCI: 00:0e.0
943 20:06:46.846327 PCI: 00:12.0
944 20:06:46.846773 PCI: 00:12.6
945 20:06:46.849652 PCI: 00:13.0
946 20:06:46.850201 PCI: 00:14.1
947 20:06:46.850548 PCI: 00:16.1
948 20:06:46.853058
949 20:06:46.853632 PCI: 00:16.2
950 20:06:46.853986 PCI: 00:16.3
951 20:06:46.856360 PCI: 00:16.4
952 20:06:46.856857 PCI: 00:16.5
953 20:06:46.859267 PCI: 00:17.0
954 20:06:46.859714 PCI: 00:19.2
955 20:06:46.860060 PCI: 00:1e.1
956 20:06:46.862981 PCI: 00:1f.1
957 20:06:46.863555 PCI: 00:1f.4
958 20:06:46.866013 PCI: 00:1f.6
959 20:06:46.866458 PCI: 00:1f.7
960 20:06:46.869151 PCI: Check your devicetree.cb.
961 20:06:46.873167 PCI: 00:02.0 scanning...
962 20:06:46.876278 scan_generic_bus for PCI: 00:02.0
963 20:06:46.880138 scan_generic_bus for PCI: 00:02.0 done
964 20:06:46.882492 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
965 20:06:46.885701 PCI: 00:04.0 scanning...
966 20:06:46.889323 scan_generic_bus for PCI: 00:04.0
967 20:06:46.892722 GENERIC: 0.0 enabled
968 20:06:46.899534 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
969 20:06:46.902820 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
970 20:06:46.905873 PCI: 00:0d.0 scanning...
971 20:06:46.908999 scan_static_bus for PCI: 00:0d.0
972 20:06:46.912584 USB0 port 0 enabled
973 20:06:46.913156 USB0 port 0 scanning...
974 20:06:46.915648 scan_static_bus for USB0 port 0
975 20:06:46.919090 USB3 port 0 enabled
976 20:06:46.922457 USB3 port 1 enabled
977 20:06:46.922935 USB3 port 2 disabled
978 20:06:46.925766 USB3 port 3 disabled
979 20:06:46.929033 USB3 port 0 scanning...
980 20:06:46.932753 scan_static_bus for USB3 port 0
981 20:06:46.936075 scan_static_bus for USB3 port 0 done
982 20:06:46.939219 scan_bus: bus USB3 port 0 finished in 6 msecs
983 20:06:46.942524 USB3 port 1 scanning...
984 20:06:46.945997 scan_static_bus for USB3 port 1
985 20:06:46.948981 scan_static_bus for USB3 port 1 done
986 20:06:46.955876 scan_bus: bus USB3 port 1 finished in 6 msecs
987 20:06:46.959645 scan_static_bus for USB0 port 0 done
988 20:06:46.962467 scan_bus: bus USB0 port 0 finished in 43 msecs
989 20:06:46.965599 scan_static_bus for PCI: 00:0d.0 done
990 20:06:46.972199 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
991 20:06:46.972759 PCI: 00:14.0 scanning...
992 20:06:46.975684 scan_static_bus for PCI: 00:14.0
993 20:06:46.979380 USB0 port 0 enabled
994 20:06:46.982584 USB0 port 0 scanning...
995 20:06:46.985984 scan_static_bus for USB0 port 0
996 20:06:46.989053 USB2 port 0 disabled
997 20:06:46.989624 USB2 port 1 enabled
998 20:06:46.992665 USB2 port 2 enabled
999 20:06:46.993226 USB2 port 3 disabled
1000 20:06:46.995996 USB2 port 4 enabled
1001 20:06:46.998811 USB2 port 5 disabled
1002 20:06:46.999322 USB2 port 6 disabled
1003 20:06:47.001807 USB2 port 7 disabled
1004 20:06:47.006005 USB2 port 8 disabled
1005 20:06:47.006563 USB2 port 9 disabled
1006 20:06:47.008938 USB3 port 0 disabled
1007 20:06:47.012691 USB3 port 1 enabled
1008 20:06:47.013144 USB3 port 2 disabled
1009 20:06:47.015591 USB3 port 3 disabled
1010 20:06:47.018762 USB2 port 1 scanning...
1011 20:06:47.021979 scan_static_bus for USB2 port 1
1012 20:06:47.025225 scan_static_bus for USB2 port 1 done
1013 20:06:47.028504 scan_bus: bus USB2 port 1 finished in 6 msecs
1014 20:06:47.032034 USB2 port 2 scanning...
1015 20:06:47.035279 scan_static_bus for USB2 port 2
1016 20:06:47.039159 scan_static_bus for USB2 port 2 done
1017 20:06:47.042564 scan_bus: bus USB2 port 2 finished in 6 msecs
1018 20:06:47.045677 USB2 port 4 scanning...
1019 20:06:47.048561 scan_static_bus for USB2 port 4
1020 20:06:47.052512 scan_static_bus for USB2 port 4 done
1021 20:06:47.058579 scan_bus: bus USB2 port 4 finished in 6 msecs
1022 20:06:47.059170 USB3 port 1 scanning...
1023 20:06:47.062141 scan_static_bus for USB3 port 1
1024 20:06:47.068576 scan_static_bus for USB3 port 1 done
1025 20:06:47.072347 scan_bus: bus USB3 port 1 finished in 6 msecs
1026 20:06:47.075003 scan_static_bus for USB0 port 0 done
1027 20:06:47.078794 scan_bus: bus USB0 port 0 finished in 93 msecs
1028 20:06:47.085338 scan_static_bus for PCI: 00:14.0 done
1029 20:06:47.088856 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1030 20:06:47.092070 PCI: 00:14.3 scanning...
1031 20:06:47.095106 scan_static_bus for PCI: 00:14.3
1032 20:06:47.098917 GENERIC: 0.0 enabled
1033 20:06:47.102411 scan_static_bus for PCI: 00:14.3 done
1034 20:06:47.105494 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1035 20:06:47.108446 PCI: 00:15.0 scanning...
1036 20:06:47.112363 scan_static_bus for PCI: 00:15.0
1037 20:06:47.112852 I2C: 00:1a enabled
1038 20:06:47.114977
1039 20:06:47.115486 I2C: 00:31 enabled
1040 20:06:47.118366 I2C: 00:32 enabled
1041 20:06:47.121869 scan_static_bus for PCI: 00:15.0 done
1042 20:06:47.125271 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1043 20:06:47.128773 PCI: 00:15.1 scanning...
1044 20:06:47.132911 scan_static_bus for PCI: 00:15.1
1045 20:06:47.137283 I2C: 00:10 enabled
1046 20:06:47.140227 scan_static_bus for PCI: 00:15.1 done
1047 20:06:47.143210 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1048 20:06:47.145969 PCI: 00:15.2 scanning...
1049 20:06:47.149226 scan_static_bus for PCI: 00:15.2
1050 20:06:47.153000 scan_static_bus for PCI: 00:15.2 done
1051 20:06:47.156295 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1052 20:06:47.159292 PCI: 00:15.3 scanning...
1053 20:06:47.162845 scan_static_bus for PCI: 00:15.3
1054 20:06:47.165954 scan_static_bus for PCI: 00:15.3 done
1055 20:06:47.172634 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1056 20:06:47.173081 PCI: 00:19.1 scanning...
1057 20:06:47.176031
1058 20:06:47.179391 scan_static_bus for PCI: 00:19.1
1059 20:06:47.179898 I2C: 00:15 enabled
1060 20:06:47.183400 scan_static_bus for PCI: 00:19.1 done
1061 20:06:47.189304 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1062 20:06:47.189821 PCI: 00:1d.0 scanning...
1063 20:06:47.195984 do_pci_scan_bridge for PCI: 00:1d.0
1064 20:06:47.196461 PCI: pci_scan_bus for bus 01
1065 20:06:47.199391 PCI: 01:00.0 [1c5c/174a] enabled
1066 20:06:47.202798 GENERIC: 0.0 enabled
1067 20:06:47.206372 Enabling Common Clock Configuration
1068 20:06:47.212892 L1 Sub-State supported from root port 29
1069 20:06:47.213331 L1 Sub-State Support = 0xf
1070 20:06:47.216396 CommonModeRestoreTime = 0x28
1071 20:06:47.222984 Power On Value = 0x16, Power On Scale = 0x0
1072 20:06:47.223573 ASPM: Enabled L1
1073 20:06:47.226094 PCIe: Max_Payload_Size adjusted to 128
1074 20:06:47.233016 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1075 20:06:47.233617 PCI: 00:1e.2 scanning...
1076 20:06:47.236681 scan_generic_bus for PCI: 00:1e.2
1077 20:06:47.240001
1078 20:06:47.240492 SPI: 00 enabled
1079 20:06:47.246191 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1080 20:06:47.249909 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1081 20:06:47.253284 PCI: 00:1e.3 scanning...
1082 20:06:47.256634 scan_generic_bus for PCI: 00:1e.3
1083 20:06:47.259718 SPI: 00 enabled
1084 20:06:47.263115 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1085 20:06:47.269620 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1086 20:06:47.272743 PCI: 00:1f.0 scanning...
1087 20:06:47.276343 scan_static_bus for PCI: 00:1f.0
1088 20:06:47.276924 PNP: 0c09.0 enabled
1089 20:06:47.279507 PNP: 0c09.0 scanning...
1090 20:06:47.283318 scan_static_bus for PNP: 0c09.0
1091 20:06:47.286122 scan_static_bus for PNP: 0c09.0 done
1092 20:06:47.293046 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1093 20:06:47.296439 scan_static_bus for PCI: 00:1f.0 done
1094 20:06:47.299518 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1095 20:06:47.303296 PCI: 00:1f.2 scanning...
1096 20:06:47.306238 scan_static_bus for PCI: 00:1f.2
1097 20:06:47.309642 GENERIC: 0.0 enabled
1098 20:06:47.310129 GENERIC: 0.0 scanning...
1099 20:06:47.312264
1100 20:06:47.316265 scan_static_bus for GENERIC: 0.0
1101 20:06:47.316751 GENERIC: 0.0 enabled
1102 20:06:47.320689 GENERIC: 1.0 enabled
1103 20:06:47.322649 scan_static_bus for GENERIC: 0.0 done
1104 20:06:47.326939 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1105 20:06:47.332742 scan_static_bus for PCI: 00:1f.2 done
1106 20:06:47.336110 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1107 20:06:47.339120 PCI: 00:1f.3 scanning...
1108 20:06:47.342762 scan_static_bus for PCI: 00:1f.3
1109 20:06:47.346078 scan_static_bus for PCI: 00:1f.3 done
1110 20:06:47.349418 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1111 20:06:47.352515 PCI: 00:1f.5 scanning...
1112 20:06:47.356545 scan_generic_bus for PCI: 00:1f.5
1113 20:06:47.359256 scan_generic_bus for PCI: 00:1f.5 done
1114 20:06:47.365848 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1115 20:06:47.368954 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1116 20:06:47.373079 scan_static_bus for Root Device done
1117 20:06:47.376013
1118 20:06:47.379384 scan_bus: bus Root Device finished in 737 msecs
1119 20:06:47.379890 done
1120 20:06:47.385633 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1121 20:06:47.390186 Chrome EC: UHEPI supported
1122 20:06:47.395699 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1123 20:06:47.402682 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1124 20:06:47.405591 SPI flash protection: WPSW=0 SRP0=0
1125 20:06:47.409399 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1126 20:06:47.415893 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1127 20:06:47.418826 found VGA at PCI: 00:02.0
1128 20:06:47.422120 Setting up VGA for PCI: 00:02.0
1129 20:06:47.425810 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1130 20:06:47.432107 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1131 20:06:47.435544 Allocating resources...
1132 20:06:47.435990 Reading resources...
1133 20:06:47.438987 Root Device read_resources bus 0 link: 0
1134 20:06:47.445907 DOMAIN: 0000 read_resources bus 0 link: 0
1135 20:06:47.449192 PCI: 00:04.0 read_resources bus 1 link: 0
1136 20:06:47.455961 PCI: 00:04.0 read_resources bus 1 link: 0 done
1137 20:06:47.459298 PCI: 00:0d.0 read_resources bus 0 link: 0
1138 20:06:47.466153 USB0 port 0 read_resources bus 0 link: 0
1139 20:06:47.469222 USB0 port 0 read_resources bus 0 link: 0 done
1140 20:06:47.475515 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1141 20:06:47.479148 PCI: 00:14.0 read_resources bus 0 link: 0
1142 20:06:47.482653 USB0 port 0 read_resources bus 0 link: 0
1143 20:06:47.489445 USB0 port 0 read_resources bus 0 link: 0 done
1144 20:06:47.493111 PCI: 00:14.0 read_resources bus 0 link: 0 done
1145 20:06:47.500234 PCI: 00:14.3 read_resources bus 0 link: 0
1146 20:06:47.503294 PCI: 00:14.3 read_resources bus 0 link: 0 done
1147 20:06:47.509915 PCI: 00:15.0 read_resources bus 0 link: 0
1148 20:06:47.513405 PCI: 00:15.0 read_resources bus 0 link: 0 done
1149 20:06:47.520137 PCI: 00:15.1 read_resources bus 0 link: 0
1150 20:06:47.522815 PCI: 00:15.1 read_resources bus 0 link: 0 done
1151 20:06:47.530625 PCI: 00:19.1 read_resources bus 0 link: 0
1152 20:06:47.533677 PCI: 00:19.1 read_resources bus 0 link: 0 done
1153 20:06:47.540353 PCI: 00:1d.0 read_resources bus 1 link: 0
1154 20:06:47.544006 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1155 20:06:47.550331 PCI: 00:1e.2 read_resources bus 2 link: 0
1156 20:06:47.553885 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1157 20:06:47.560106 PCI: 00:1e.3 read_resources bus 3 link: 0
1158 20:06:47.563661 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1159 20:06:47.570288 PCI: 00:1f.0 read_resources bus 0 link: 0
1160 20:06:47.573705 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1161 20:06:47.576995 PCI: 00:1f.2 read_resources bus 0 link: 0
1162 20:06:47.583889 GENERIC: 0.0 read_resources bus 0 link: 0
1163 20:06:47.587276 GENERIC: 0.0 read_resources bus 0 link: 0 done
1164 20:06:47.594100 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1165 20:06:47.600224 DOMAIN: 0000 read_resources bus 0 link: 0 done
1166 20:06:47.604194 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1167 20:06:47.606810 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1168 20:06:47.613598 Root Device read_resources bus 0 link: 0 done
1169 20:06:47.617228 Done reading resources.
1170 20:06:47.620565 Show resources in subtree (Root Device)...After reading.
1171 20:06:47.627066 Root Device child on link 0 DOMAIN: 0000
1172 20:06:47.630168 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1173 20:06:47.640314 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1174 20:06:47.650858 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1175 20:06:47.651484 PCI: 00:00.0
1176 20:06:47.660887 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1177 20:06:47.670496 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1178 20:06:47.680602 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1179 20:06:47.687186 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1180 20:06:47.690599
1181 20:06:47.696756 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1182 20:06:47.707413 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1183 20:06:47.717127 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1184 20:06:47.726962 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1185 20:06:47.737066 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1186 20:06:47.743883 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1187 20:06:47.753667 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1188 20:06:47.764200 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1189 20:06:47.773199 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1190 20:06:47.783456 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1191 20:06:47.789930 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1192 20:06:47.800167 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1193 20:06:47.809714 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1194 20:06:47.820191 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1195 20:06:47.829695 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1196 20:06:47.839885 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1197 20:06:47.840490 PCI: 00:02.0
1198 20:06:47.850031 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1199 20:06:47.862770 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1200 20:06:47.869741 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1201 20:06:47.872763 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1202 20:06:47.876158
1203 20:06:47.886162 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1204 20:06:47.886659 GENERIC: 0.0
1205 20:06:47.889375 PCI: 00:05.0
1206 20:06:47.899220 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1207 20:06:47.902812 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1208 20:06:47.905920 GENERIC: 0.0
1209 20:06:47.906405 PCI: 00:08.0
1210 20:06:47.916294 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 20:06:47.919373 PCI: 00:0a.0
1212 20:06:47.922946 PCI: 00:0d.0 child on link 0 USB0 port 0
1213 20:06:47.932647 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1214 20:06:47.935613 USB0 port 0 child on link 0 USB3 port 0
1215 20:06:47.939719 USB3 port 0
1216 20:06:47.940306 USB3 port 1
1217 20:06:47.942760 USB3 port 2
1218 20:06:47.943271 USB3 port 3
1219 20:06:47.949776 PCI: 00:14.0 child on link 0 USB0 port 0
1220 20:06:47.959863 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1221 20:06:47.962810 USB0 port 0 child on link 0 USB2 port 0
1222 20:06:47.965897 USB2 port 0
1223 20:06:47.966501 USB2 port 1
1224 20:06:47.969190 USB2 port 2
1225 20:06:47.969776 USB2 port 3
1226 20:06:47.972831 USB2 port 4
1227 20:06:47.973414 USB2 port 5
1228 20:06:47.975630 USB2 port 6
1229 20:06:47.976110 USB2 port 7
1230 20:06:47.978859 USB2 port 8
1231 20:06:47.979383 USB2 port 9
1232 20:06:47.982807 USB3 port 0
1233 20:06:47.983430 USB3 port 1
1234 20:06:47.986050 USB3 port 2
1235 20:06:47.986533 USB3 port 3
1236 20:06:47.989128 PCI: 00:14.2
1237 20:06:47.999351 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1238 20:06:48.009273 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1239 20:06:48.012549 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1240 20:06:48.022125 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1241 20:06:48.025747 GENERIC: 0.0
1242 20:06:48.028960 PCI: 00:15.0 child on link 0 I2C: 00:1a
1243 20:06:48.039273 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1244 20:06:48.042576 I2C: 00:1a
1245 20:06:48.043244 I2C: 00:31
1246 20:06:48.043747 I2C: 00:32
1247 20:06:48.045369
1248 20:06:48.048825 PCI: 00:15.1 child on link 0 I2C: 00:10
1249 20:06:48.058963 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 20:06:48.059599 I2C: 00:10
1251 20:06:48.061988 PCI: 00:15.2
1252 20:06:48.072539 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1253 20:06:48.073137 PCI: 00:15.3
1254 20:06:48.082498 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 20:06:48.085469 PCI: 00:16.0
1256 20:06:48.095460 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 20:06:48.095956 PCI: 00:19.0
1258 20:06:48.102096 PCI: 00:19.1 child on link 0 I2C: 00:15
1259 20:06:48.112076 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 20:06:48.112567 I2C: 00:15
1261 20:06:48.115549 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1262 20:06:48.125713 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1263 20:06:48.135722 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1264 20:06:48.146086 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1265 20:06:48.146682 GENERIC: 0.0
1266 20:06:48.148894 PCI: 01:00.0
1267 20:06:48.158724 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1268 20:06:48.168655 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1269 20:06:48.175719 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1270 20:06:48.178650 PCI: 00:1e.0
1271 20:06:48.188939 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1272 20:06:48.191757 PCI: 00:1e.2 child on link 0 SPI: 00
1273 20:06:48.201531 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1274 20:06:48.204811 SPI: 00
1275 20:06:48.208117 PCI: 00:1e.3 child on link 0 SPI: 00
1276 20:06:48.218819 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1277 20:06:48.219456 SPI: 00
1278 20:06:48.225297 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1279 20:06:48.231740 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1280 20:06:48.235582 PNP: 0c09.0
1281 20:06:48.241851 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1282 20:06:48.248357 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1283 20:06:48.258388 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1284 20:06:48.265336 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1285 20:06:48.271415 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1286 20:06:48.272004 GENERIC: 0.0
1287 20:06:48.274944 GENERIC: 1.0
1288 20:06:48.275434 PCI: 00:1f.3
1289 20:06:48.284931 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1290 20:06:48.295000 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1291 20:06:48.298843 PCI: 00:1f.5
1292 20:06:48.307828 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1293 20:06:48.311355 CPU_CLUSTER: 0 child on link 0 APIC: 00
1294 20:06:48.311837 APIC: 00
1295 20:06:48.314910 APIC: 01
1296 20:06:48.315390 APIC: 03
1297 20:06:48.318111 APIC: 05
1298 20:06:48.318593 APIC: 07
1299 20:06:48.318999 APIC: 06
1300 20:06:48.321260 APIC: 02
1301 20:06:48.321739 APIC: 04
1302 20:06:48.327729 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1303 20:06:48.335291 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1304 20:06:48.341810 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1305 20:06:48.348043 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1306 20:06:48.351322 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1307 20:06:48.355132 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1308 20:06:48.361386 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1309 20:06:48.367747 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1310 20:06:48.374120 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1311 20:06:48.381544 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1312 20:06:48.387764 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1313 20:06:48.394928 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1314 20:06:48.404055 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1315 20:06:48.410990 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1316 20:06:48.417967 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1317 20:06:48.420679 DOMAIN: 0000: Resource ranges:
1318 20:06:48.424735 * Base: 1000, Size: 800, Tag: 100
1319 20:06:48.427791 * Base: 1900, Size: e700, Tag: 100
1320 20:06:48.433993 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1321 20:06:48.441049 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1322 20:06:48.447216 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1323 20:06:48.454495 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1324 20:06:48.463832 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1325 20:06:48.470986 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1326 20:06:48.477921 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1327 20:06:48.487251 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1328 20:06:48.494846 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1329 20:06:48.500993 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1330 20:06:48.510193 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1331 20:06:48.517072 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1332 20:06:48.523697 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1333 20:06:48.530351 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1334 20:06:48.533590
1335 20:06:48.540597 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1336 20:06:48.547488 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1337 20:06:48.553856 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1338 20:06:48.563456 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1339 20:06:48.569993 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1340 20:06:48.576655 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1341 20:06:48.579905
1342 20:06:48.586564 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1343 20:06:48.593258 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1344 20:06:48.599914 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1345 20:06:48.609667 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1346 20:06:48.616761 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1347 20:06:48.620032 DOMAIN: 0000: Resource ranges:
1348 20:06:48.623597 * Base: 7fc00000, Size: 40400000, Tag: 200
1349 20:06:48.629902 * Base: d0000000, Size: 28000000, Tag: 200
1350 20:06:48.633104 * Base: fa000000, Size: 1000000, Tag: 200
1351 20:06:48.636249 * Base: fb001000, Size: 2fff000, Tag: 200
1352 20:06:48.643151 * Base: fe010000, Size: 2e000, Tag: 200
1353 20:06:48.646799 * Base: fe03f000, Size: d41000, Tag: 200
1354 20:06:48.649536 * Base: fed88000, Size: 8000, Tag: 200
1355 20:06:48.652766 * Base: fed93000, Size: d000, Tag: 200
1356 20:06:48.655978 * Base: feda2000, Size: 1e000, Tag: 200
1357 20:06:48.662467 * Base: fede0000, Size: 1220000, Tag: 200
1358 20:06:48.666263 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1359 20:06:48.672531 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1360 20:06:48.679224 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1361 20:06:48.686210 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1362 20:06:48.692302 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1363 20:06:48.699047 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1364 20:06:48.706219 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1365 20:06:48.712423 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1366 20:06:48.719192 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1367 20:06:48.725602 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1368 20:06:48.732336 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1369 20:06:48.739038 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1370 20:06:48.745622 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1371 20:06:48.752414 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1372 20:06:48.758827 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1373 20:06:48.765707 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1374 20:06:48.771908 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1375 20:06:48.778711 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1376 20:06:48.785408 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1377 20:06:48.791774 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1378 20:06:48.798570 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1379 20:06:48.804984 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1380 20:06:48.812023 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1381 20:06:48.821758 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1382 20:06:48.828551 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1383 20:06:48.831722 PCI: 00:1d.0: Resource ranges:
1384 20:06:48.834976 * Base: 7fc00000, Size: 100000, Tag: 200
1385 20:06:48.841564 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1386 20:06:48.848340 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1387 20:06:48.855322 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1388 20:06:48.865321 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1389 20:06:48.871565 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1390 20:06:48.874992 Root Device assign_resources, bus 0 link: 0
1391 20:06:48.881807 DOMAIN: 0000 assign_resources, bus 0 link: 0
1392 20:06:48.888053 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1393 20:06:48.898197 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1394 20:06:48.904541 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1395 20:06:48.914789 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1396 20:06:48.918319 PCI: 00:04.0 assign_resources, bus 1 link: 0
1397 20:06:48.921582 PCI: 00:04.0 assign_resources, bus 1 link: 0
1398 20:06:48.931331 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1399 20:06:48.937904 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1400 20:06:48.948314 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1401 20:06:48.951886 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1402 20:06:48.957809 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1403 20:06:48.964497 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1404 20:06:48.967425 PCI: 00:14.0 assign_resources, bus 0 link: 0
1405 20:06:48.974522 PCI: 00:14.0 assign_resources, bus 0 link: 0
1406 20:06:48.981227 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1407 20:06:48.991293 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1408 20:06:48.997649 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1409 20:06:49.004573 PCI: 00:14.3 assign_resources, bus 0 link: 0
1410 20:06:49.007424 PCI: 00:14.3 assign_resources, bus 0 link: 0
1411 20:06:49.014459 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1412 20:06:49.021525 PCI: 00:15.0 assign_resources, bus 0 link: 0
1413 20:06:49.024237 PCI: 00:15.0 assign_resources, bus 0 link: 0
1414 20:06:49.034147 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1415 20:06:49.038128 PCI: 00:15.1 assign_resources, bus 0 link: 0
1416 20:06:49.040885 PCI: 00:15.1 assign_resources, bus 0 link: 0
1417 20:06:49.051002 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1418 20:06:49.057933 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1419 20:06:49.067626 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1420 20:06:49.074608 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1421 20:06:49.081377 PCI: 00:19.1 assign_resources, bus 0 link: 0
1422 20:06:49.084481 PCI: 00:19.1 assign_resources, bus 0 link: 0
1423 20:06:49.094676 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1424 20:06:49.104229 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1425 20:06:49.111120 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1426 20:06:49.117563 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1427 20:06:49.124728 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1428 20:06:49.130758 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1429 20:06:49.134375
1430 20:06:49.140645 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1431 20:06:49.144521 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1432 20:06:49.153737 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1433 20:06:49.157551 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1434 20:06:49.163970 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1435 20:06:49.171057 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1436 20:06:49.174198 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1437 20:06:49.180921 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1438 20:06:49.184202 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1439 20:06:49.191007 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1440 20:06:49.194116 LPC: Trying to open IO window from 800 size 1ff
1441 20:06:49.203830 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1442 20:06:49.210558 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1443 20:06:49.220634 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1444 20:06:49.224189 DOMAIN: 0000 assign_resources, bus 0 link: 0
1445 20:06:49.227447 Root Device assign_resources, bus 0 link: 0
1446 20:06:49.230729 Done setting resources.
1447 20:06:49.237186 Show resources in subtree (Root Device)...After assigning values.
1448 20:06:49.240254 Root Device child on link 0 DOMAIN: 0000
1449 20:06:49.246941 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1450 20:06:49.253714 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1451 20:06:49.256891
1452 20:06:49.263471 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1453 20:06:49.267836 PCI: 00:00.0
1454 20:06:49.276999 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1455 20:06:49.286842 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1456 20:06:49.297026 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1457 20:06:49.303509 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1458 20:06:49.313791 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1459 20:06:49.323707 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1460 20:06:49.333257 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1461 20:06:49.343274 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1462 20:06:49.353730 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1463 20:06:49.359854 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1464 20:06:49.369928 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1465 20:06:49.379921 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1466 20:06:49.390974 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1467 20:06:49.396527 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1468 20:06:49.406092 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1469 20:06:49.416620 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1470 20:06:49.426460 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1471 20:06:49.436273 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1472 20:06:49.446344 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1473 20:06:49.456100 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1474 20:06:49.456180 PCI: 00:02.0
1475 20:06:49.466357 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1476 20:06:49.479353 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1477 20:06:49.486013 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1478 20:06:49.492720 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1479 20:06:49.502310 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1480 20:06:49.502391 GENERIC: 0.0
1481 20:06:49.506247
1482 20:06:49.506326 PCI: 00:05.0
1483 20:06:49.515739 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1484 20:06:49.522340 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1485 20:06:49.522416 GENERIC: 0.0
1486 20:06:49.525468 PCI: 00:08.0
1487 20:06:49.535591 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1488 20:06:49.535675 PCI: 00:0a.0
1489 20:06:49.542673 PCI: 00:0d.0 child on link 0 USB0 port 0
1490 20:06:49.552474 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1491 20:06:49.555448 USB0 port 0 child on link 0 USB3 port 0
1492 20:06:49.558681 USB3 port 0
1493 20:06:49.558752 USB3 port 1
1494 20:06:49.562171 USB3 port 2
1495 20:06:49.562246 USB3 port 3
1496 20:06:49.565846 PCI: 00:14.0 child on link 0 USB0 port 0
1497 20:06:49.578778 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1498 20:06:49.582624 USB0 port 0 child on link 0 USB2 port 0
1499 20:06:49.582701 USB2 port 0
1500 20:06:49.585933 USB2 port 1
1501 20:06:49.586007 USB2 port 2
1502 20:06:49.588724
1503 20:06:49.588799 USB2 port 3
1504 20:06:49.592442 USB2 port 4
1505 20:06:49.592517 USB2 port 5
1506 20:06:49.596052 USB2 port 6
1507 20:06:49.596128 USB2 port 7
1508 20:06:49.599131 USB2 port 8
1509 20:06:49.599200 USB2 port 9
1510 20:06:49.602201 USB3 port 0
1511 20:06:49.602302 USB3 port 1
1512 20:06:49.605435 USB3 port 2
1513 20:06:49.605512 USB3 port 3
1514 20:06:49.608948 PCI: 00:14.2
1515 20:06:49.619810 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1516 20:06:49.628992 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1517 20:06:49.632337 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1518 20:06:49.645365 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1519 20:06:49.645446 GENERIC: 0.0
1520 20:06:49.648581 PCI: 00:15.0 child on link 0 I2C: 00:1a
1521 20:06:49.658838 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1522 20:06:49.662082 I2C: 00:1a
1523 20:06:49.662155 I2C: 00:31
1524 20:06:49.665479 I2C: 00:32
1525 20:06:49.668520 PCI: 00:15.1 child on link 0 I2C: 00:10
1526 20:06:49.678385 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1527 20:06:49.682326 I2C: 00:10
1528 20:06:49.682400 PCI: 00:15.2
1529 20:06:49.691874 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1530 20:06:49.696886 PCI: 00:15.3
1531 20:06:49.705583 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1532 20:06:49.705667 PCI: 00:16.0
1533 20:06:49.709019
1534 20:06:49.718554 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1535 20:06:49.718631 PCI: 00:19.0
1536 20:06:49.721700 PCI: 00:19.1 child on link 0 I2C: 00:15
1537 20:06:49.732156 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1538 20:06:49.734878
1539 20:06:49.734990 I2C: 00:15
1540 20:06:49.738471 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1541 20:06:49.748265 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1542 20:06:49.761493 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1543 20:06:49.771699 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1544 20:06:49.771777 GENERIC: 0.0
1545 20:06:49.775330 PCI: 01:00.0
1546 20:06:49.785018 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1547 20:06:49.795247 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1548 20:06:49.805281 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1549 20:06:49.807936 PCI: 00:1e.0
1550 20:06:49.817942 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1551 20:06:49.821235 PCI: 00:1e.2 child on link 0 SPI: 00
1552 20:06:49.831333 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1553 20:06:49.834413 SPI: 00
1554 20:06:49.838469 PCI: 00:1e.3 child on link 0 SPI: 00
1555 20:06:49.848416 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1556 20:06:49.851407 SPI: 00
1557 20:06:49.854311 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1558 20:06:49.861638 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1559 20:06:49.864484
1560 20:06:49.864557 PNP: 0c09.0
1561 20:06:49.874408 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1562 20:06:49.878477 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1563 20:06:49.887681 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1564 20:06:49.897721 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1565 20:06:49.901050 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1566 20:06:49.904430 GENERIC: 0.0
1567 20:06:49.904508 GENERIC: 1.0
1568 20:06:49.907660 PCI: 00:1f.3
1569 20:06:49.917707 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1570 20:06:49.927445 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1571 20:06:49.927525 PCI: 00:1f.5
1572 20:06:49.941303 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1573 20:06:49.944481 CPU_CLUSTER: 0 child on link 0 APIC: 00
1574 20:06:49.944557 APIC: 00
1575 20:06:49.947372 APIC: 01
1576 20:06:49.947445 APIC: 03
1577 20:06:49.947508 APIC: 05
1578 20:06:49.951415 APIC: 07
1579 20:06:49.951488 APIC: 06
1580 20:06:49.951550 APIC: 02
1581 20:06:49.953970 APIC: 04
1582 20:06:49.957397 Done allocating resources.
1583 20:06:49.964266 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1584 20:06:49.967788 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1585 20:06:49.970913 Configure GPIOs for I2S audio on UP4.
1586 20:06:49.979051 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1587 20:06:49.982094 Enabling resources...
1588 20:06:49.985519 PCI: 00:00.0 subsystem <- 8086/9a12
1589 20:06:49.988734 PCI: 00:00.0 cmd <- 06
1590 20:06:49.992648 PCI: 00:02.0 subsystem <- 8086/9a40
1591 20:06:49.995511 PCI: 00:02.0 cmd <- 03
1592 20:06:49.998980 PCI: 00:04.0 subsystem <- 8086/9a03
1593 20:06:49.999055 PCI: 00:04.0 cmd <- 02
1594 20:06:50.005545 PCI: 00:05.0 subsystem <- 8086/9a19
1595 20:06:50.005626 PCI: 00:05.0 cmd <- 02
1596 20:06:50.009131 PCI: 00:08.0 subsystem <- 8086/9a11
1597 20:06:50.012376 PCI: 00:08.0 cmd <- 06
1598 20:06:50.015669 PCI: 00:0d.0 subsystem <- 8086/9a13
1599 20:06:50.018876 PCI: 00:0d.0 cmd <- 02
1600 20:06:50.022644 PCI: 00:14.0 subsystem <- 8086/a0ed
1601 20:06:50.025590 PCI: 00:14.0 cmd <- 02
1602 20:06:50.029209 PCI: 00:14.2 subsystem <- 8086/a0ef
1603 20:06:50.032706 PCI: 00:14.2 cmd <- 02
1604 20:06:50.035622 PCI: 00:14.3 subsystem <- 8086/a0f0
1605 20:06:50.038917 PCI: 00:14.3 cmd <- 02
1606 20:06:50.042088 PCI: 00:15.0 subsystem <- 8086/a0e8
1607 20:06:50.042162 PCI: 00:15.0 cmd <- 02
1608 20:06:50.045329
1609 20:06:50.049186 PCI: 00:15.1 subsystem <- 8086/a0e9
1610 20:06:50.049258 PCI: 00:15.1 cmd <- 02
1611 20:06:50.055690 PCI: 00:15.2 subsystem <- 8086/a0ea
1612 20:06:50.055764 PCI: 00:15.2 cmd <- 02
1613 20:06:50.059124 PCI: 00:15.3 subsystem <- 8086/a0eb
1614 20:06:50.062092 PCI: 00:15.3 cmd <- 02
1615 20:06:50.065326 PCI: 00:16.0 subsystem <- 8086/a0e0
1616 20:06:50.068780 PCI: 00:16.0 cmd <- 02
1617 20:06:50.071801 PCI: 00:19.1 subsystem <- 8086/a0c6
1618 20:06:50.075653 PCI: 00:19.1 cmd <- 02
1619 20:06:50.079311 PCI: 00:1d.0 bridge ctrl <- 0013
1620 20:06:50.081807 PCI: 00:1d.0 subsystem <- 8086/a0b0
1621 20:06:50.085371 PCI: 00:1d.0 cmd <- 06
1622 20:06:50.088603 PCI: 00:1e.0 subsystem <- 8086/a0a8
1623 20:06:50.092012 PCI: 00:1e.0 cmd <- 06
1624 20:06:50.095268 PCI: 00:1e.2 subsystem <- 8086/a0aa
1625 20:06:50.095343 PCI: 00:1e.2 cmd <- 06
1626 20:06:50.098607
1627 20:06:50.101671 PCI: 00:1e.3 subsystem <- 8086/a0ab
1628 20:06:50.101745 PCI: 00:1e.3 cmd <- 02
1629 20:06:50.108640 PCI: 00:1f.0 subsystem <- 8086/a087
1630 20:06:50.108719 PCI: 00:1f.0 cmd <- 407
1631 20:06:50.112188 PCI: 00:1f.3 subsystem <- 8086/a0c8
1632 20:06:50.115051 PCI: 00:1f.3 cmd <- 02
1633 20:06:50.118672 PCI: 00:1f.5 subsystem <- 8086/a0a4
1634 20:06:50.121828 PCI: 00:1f.5 cmd <- 406
1635 20:06:50.126480 PCI: 01:00.0 cmd <- 02
1636 20:06:50.131245 done.
1637 20:06:50.134194 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1638 20:06:50.137228 Initializing devices...
1639 20:06:50.140660 Root Device init
1640 20:06:50.144517 Chrome EC: Set SMI mask to 0x0000000000000000
1641 20:06:50.150791 Chrome EC: clear events_b mask to 0x0000000000000000
1642 20:06:50.157271 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1643 20:06:50.160715 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1644 20:06:50.167896 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1645 20:06:50.174786 Chrome EC: Set WAKE mask to 0x0000000000000000
1646 20:06:50.177995 fw_config match found: DB_USB=USB3_ACTIVE
1647 20:06:50.184191 Configure Right Type-C port orientation for retimer
1648 20:06:50.187728 Root Device init finished in 44 msecs
1649 20:06:50.191374 PCI: 00:00.0 init
1650 20:06:50.194867 CPU TDP = 9 Watts
1651 20:06:50.194948 CPU PL1 = 9 Watts
1652 20:06:50.198170 CPU PL2 = 40 Watts
1653 20:06:50.200992 CPU PL4 = 83 Watts
1654 20:06:50.204714 PCI: 00:00.0 init finished in 8 msecs
1655 20:06:50.204810 PCI: 00:02.0 init
1656 20:06:50.207769 GMA: Found VBT in CBFS
1657 20:06:50.210822 GMA: Found valid VBT in CBFS
1658 20:06:50.217801 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1659 20:06:50.224077 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1660 20:06:50.227449 PCI: 00:02.0 init finished in 18 msecs
1661 20:06:50.231211 PCI: 00:05.0 init
1662 20:06:50.233983 PCI: 00:05.0 init finished in 0 msecs
1663 20:06:50.237796 PCI: 00:08.0 init
1664 20:06:50.240901 PCI: 00:08.0 init finished in 0 msecs
1665 20:06:50.244251 PCI: 00:14.0 init
1666 20:06:50.247586 PCI: 00:14.0 init finished in 0 msecs
1667 20:06:50.250783 PCI: 00:14.2 init
1668 20:06:50.254033 PCI: 00:14.2 init finished in 0 msecs
1669 20:06:50.257613 PCI: 00:15.0 init
1670 20:06:50.257686 I2C bus 0 version 0x3230302a
1671 20:06:50.264192 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1672 20:06:50.267722 PCI: 00:15.0 init finished in 6 msecs
1673 20:06:50.267802 PCI: 00:15.1 init
1674 20:06:50.271221 I2C bus 1 version 0x3230302a
1675 20:06:50.274060 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1676 20:06:50.277698 PCI: 00:15.1 init finished in 6 msecs
1677 20:06:50.280815 PCI: 00:15.2 init
1678 20:06:50.284370 I2C bus 2 version 0x3230302a
1679 20:06:50.287480 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1680 20:06:50.290841 PCI: 00:15.2 init finished in 6 msecs
1681 20:06:50.294963 PCI: 00:15.3 init
1682 20:06:50.297894 I2C bus 3 version 0x3230302a
1683 20:06:50.301155 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1684 20:06:50.304262 PCI: 00:15.3 init finished in 6 msecs
1685 20:06:50.307835 PCI: 00:16.0 init
1686 20:06:50.310687 PCI: 00:16.0 init finished in 0 msecs
1687 20:06:50.314418 PCI: 00:19.1 init
1688 20:06:50.314492 I2C bus 5 version 0x3230302a
1689 20:06:50.320711 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1690 20:06:50.324207 PCI: 00:19.1 init finished in 6 msecs
1691 20:06:50.324280 PCI: 00:1d.0 init
1692 20:06:50.327788 Initializing PCH PCIe bridge.
1693 20:06:50.330884 PCI: 00:1d.0 init finished in 3 msecs
1694 20:06:50.335350 PCI: 00:1f.0 init
1695 20:06:50.338278 IOAPIC: Initializing IOAPIC at 0xfec00000
1696 20:06:50.345146 IOAPIC: Bootstrap Processor Local APIC = 0x00
1697 20:06:50.345227 IOAPIC: ID = 0x02
1698 20:06:50.348505 IOAPIC: Dumping registers
1699 20:06:50.352076 reg 0x0000: 0x02000000
1700 20:06:50.355092 reg 0x0001: 0x00770020
1701 20:06:50.355162 reg 0x0002: 0x00000000
1702 20:06:50.361443 PCI: 00:1f.0 init finished in 21 msecs
1703 20:06:50.361516 PCI: 00:1f.2 init
1704 20:06:50.364831 Disabling ACPI via APMC.
1705 20:06:50.368734 APMC done.
1706 20:06:50.371640 PCI: 00:1f.2 init finished in 5 msecs
1707 20:06:50.383582 PCI: 01:00.0 init
1708 20:06:50.386489 PCI: 01:00.0 init finished in 0 msecs
1709 20:06:50.389995 PNP: 0c09.0 init
1710 20:06:50.393107 Google Chrome EC uptime: 8.402 seconds
1711 20:06:50.400138 Google Chrome AP resets since EC boot: 1
1712 20:06:50.403053 Google Chrome most recent AP reset causes:
1713 20:06:50.406649 0.349: 32775 shutdown: entering G3
1714 20:06:50.413114 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1715 20:06:50.416899 PNP: 0c09.0 init finished in 22 msecs
1716 20:06:50.422150 Devices initialized
1717 20:06:50.425357 Show all devs... After init.
1718 20:06:50.428699 Root Device: enabled 1
1719 20:06:50.428772 DOMAIN: 0000: enabled 1
1720 20:06:50.432183 CPU_CLUSTER: 0: enabled 1
1721 20:06:50.435648 PCI: 00:00.0: enabled 1
1722 20:06:50.439044 PCI: 00:02.0: enabled 1
1723 20:06:50.439119 PCI: 00:04.0: enabled 1
1724 20:06:50.441816 PCI: 00:05.0: enabled 1
1725 20:06:50.445457 PCI: 00:06.0: enabled 0
1726 20:06:50.448580 PCI: 00:07.0: enabled 0
1727 20:06:50.448656 PCI: 00:07.1: enabled 0
1728 20:06:50.452201 PCI: 00:07.2: enabled 0
1729 20:06:50.455434 PCI: 00:07.3: enabled 0
1730 20:06:50.458972 PCI: 00:08.0: enabled 1
1731 20:06:50.459045 PCI: 00:09.0: enabled 0
1732 20:06:50.462283 PCI: 00:0a.0: enabled 0
1733 20:06:50.465473 PCI: 00:0d.0: enabled 1
1734 20:06:50.465555 PCI: 00:0d.1: enabled 0
1735 20:06:50.469610
1736 20:06:50.469690 PCI: 00:0d.2: enabled 0
1737 20:06:50.472810 PCI: 00:0d.3: enabled 0
1738 20:06:50.475265 PCI: 00:0e.0: enabled 0
1739 20:06:50.475340 PCI: 00:10.2: enabled 1
1740 20:06:50.478820 PCI: 00:10.6: enabled 0
1741 20:06:50.481581 PCI: 00:10.7: enabled 0
1742 20:06:50.485409 PCI: 00:12.0: enabled 0
1743 20:06:50.485484 PCI: 00:12.6: enabled 0
1744 20:06:50.488896 PCI: 00:13.0: enabled 0
1745 20:06:50.492606 PCI: 00:14.0: enabled 1
1746 20:06:50.495052 PCI: 00:14.1: enabled 0
1747 20:06:50.495124 PCI: 00:14.2: enabled 1
1748 20:06:50.498752 PCI: 00:14.3: enabled 1
1749 20:06:50.502525 PCI: 00:15.0: enabled 1
1750 20:06:50.504854 PCI: 00:15.1: enabled 1
1751 20:06:50.504938 PCI: 00:15.2: enabled 1
1752 20:06:50.508190 PCI: 00:15.3: enabled 1
1753 20:06:50.511754 PCI: 00:16.0: enabled 1
1754 20:06:50.511830 PCI: 00:16.1: enabled 0
1755 20:06:50.515510 PCI: 00:16.2: enabled 0
1756 20:06:50.518518 PCI: 00:16.3: enabled 0
1757 20:06:50.521527 PCI: 00:16.4: enabled 0
1758 20:06:50.521599 PCI: 00:16.5: enabled 0
1759 20:06:50.525108 PCI: 00:17.0: enabled 0
1760 20:06:50.528110 PCI: 00:19.0: enabled 0
1761 20:06:50.531842 PCI: 00:19.1: enabled 1
1762 20:06:50.531916 PCI: 00:19.2: enabled 0
1763 20:06:50.535294 PCI: 00:1c.0: enabled 1
1764 20:06:50.538241 PCI: 00:1c.1: enabled 0
1765 20:06:50.541499 PCI: 00:1c.2: enabled 0
1766 20:06:50.541585 PCI: 00:1c.3: enabled 0
1767 20:06:50.545399 PCI: 00:1c.4: enabled 0
1768 20:06:50.548243 PCI: 00:1c.5: enabled 0
1769 20:06:50.548330 PCI: 00:1c.6: enabled 1
1770 20:06:50.551770
1771 20:06:50.551857 PCI: 00:1c.7: enabled 0
1772 20:06:50.555210 PCI: 00:1d.0: enabled 1
1773 20:06:50.558693 PCI: 00:1d.1: enabled 0
1774 20:06:50.558779 PCI: 00:1d.2: enabled 1
1775 20:06:50.561512 PCI: 00:1d.3: enabled 0
1776 20:06:50.564724 PCI: 00:1e.0: enabled 1
1777 20:06:50.568506 PCI: 00:1e.1: enabled 0
1778 20:06:50.568592 PCI: 00:1e.2: enabled 1
1779 20:06:50.571743 PCI: 00:1e.3: enabled 1
1780 20:06:50.574710 PCI: 00:1f.0: enabled 1
1781 20:06:50.577953 PCI: 00:1f.1: enabled 0
1782 20:06:50.578039 PCI: 00:1f.2: enabled 1
1783 20:06:50.581469 PCI: 00:1f.3: enabled 1
1784 20:06:50.584783 PCI: 00:1f.4: enabled 0
1785 20:06:50.588268 PCI: 00:1f.5: enabled 1
1786 20:06:50.588354 PCI: 00:1f.6: enabled 0
1787 20:06:50.591552 PCI: 00:1f.7: enabled 0
1788 20:06:50.594783 APIC: 00: enabled 1
1789 20:06:50.594869 GENERIC: 0.0: enabled 1
1790 20:06:50.598505 GENERIC: 0.0: enabled 1
1791 20:06:50.601231 GENERIC: 1.0: enabled 1
1792 20:06:50.604934 GENERIC: 0.0: enabled 1
1793 20:06:50.605025 GENERIC: 1.0: enabled 1
1794 20:06:50.608444 USB0 port 0: enabled 1
1795 20:06:50.611159 GENERIC: 0.0: enabled 1
1796 20:06:50.611245 USB0 port 0: enabled 1
1797 20:06:50.614805 GENERIC: 0.0: enabled 1
1798 20:06:50.618707 I2C: 00:1a: enabled 1
1799 20:06:50.621690 I2C: 00:31: enabled 1
1800 20:06:50.621776 I2C: 00:32: enabled 1
1801 20:06:50.624750 I2C: 00:10: enabled 1
1802 20:06:50.627816 I2C: 00:15: enabled 1
1803 20:06:50.627901 GENERIC: 0.0: enabled 0
1804 20:06:50.631218 GENERIC: 1.0: enabled 0
1805 20:06:50.634976 GENERIC: 0.0: enabled 1
1806 20:06:50.635062 SPI: 00: enabled 1
1807 20:06:50.637749 SPI: 00: enabled 1
1808 20:06:50.641209 PNP: 0c09.0: enabled 1
1809 20:06:50.641295 GENERIC: 0.0: enabled 1
1810 20:06:50.644316 USB3 port 0: enabled 1
1811 20:06:50.647971 USB3 port 1: enabled 1
1812 20:06:50.648059 USB3 port 2: enabled 0
1813 20:06:50.651111
1814 20:06:50.651187 USB3 port 3: enabled 0
1815 20:06:50.654224 USB2 port 0: enabled 0
1816 20:06:50.657845 USB2 port 1: enabled 1
1817 20:06:50.657919 USB2 port 2: enabled 1
1818 20:06:50.661043 USB2 port 3: enabled 0
1819 20:06:50.664607 USB2 port 4: enabled 1
1820 20:06:50.664680 USB2 port 5: enabled 0
1821 20:06:50.668355 USB2 port 6: enabled 0
1822 20:06:50.671634 USB2 port 7: enabled 0
1823 20:06:50.675079 USB2 port 8: enabled 0
1824 20:06:50.675155 USB2 port 9: enabled 0
1825 20:06:50.677783 USB3 port 0: enabled 0
1826 20:06:50.680960 USB3 port 1: enabled 1
1827 20:06:50.681028 USB3 port 2: enabled 0
1828 20:06:50.684181 USB3 port 3: enabled 0
1829 20:06:50.688126 GENERIC: 0.0: enabled 1
1830 20:06:50.691278 GENERIC: 1.0: enabled 1
1831 20:06:50.691348 APIC: 01: enabled 1
1832 20:06:50.694430 APIC: 03: enabled 1
1833 20:06:50.694499 APIC: 05: enabled 1
1834 20:06:50.697744 APIC: 07: enabled 1
1835 20:06:50.701005 APIC: 06: enabled 1
1836 20:06:50.701073 APIC: 02: enabled 1
1837 20:06:50.704309 APIC: 04: enabled 1
1838 20:06:50.707373 PCI: 01:00.0: enabled 1
1839 20:06:50.711115 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1840 20:06:50.717993 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1841 20:06:50.721006 ELOG: NV offset 0xf30000 size 0x1000
1842 20:06:50.727565 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1843 20:06:50.734351 ELOG: Event(17) added with size 13 at 2022-12-19 20:06:50 UTC
1844 20:06:50.740676 ELOG: Event(92) added with size 9 at 2022-12-19 20:06:50 UTC
1845 20:06:50.747280 ELOG: Event(93) added with size 9 at 2022-12-19 20:06:50 UTC
1846 20:06:50.754262 ELOG: Event(9E) added with size 10 at 2022-12-19 20:06:50 UTC
1847 20:06:50.761546 ELOG: Event(9F) added with size 14 at 2022-12-19 20:06:50 UTC
1848 20:06:50.764256 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1849 20:06:50.767133
1850 20:06:50.771001 ELOG: Event(A1) added with size 10 at 2022-12-19 20:06:50 UTC
1851 20:06:50.777302 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1852 20:06:50.783741 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1853 20:06:50.787197 Finalize devices...
1854 20:06:50.787284 Devices finalized
1855 20:06:50.794101 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1856 20:06:50.797307 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1857 20:06:50.804294 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1858 20:06:50.810341 ME: HFSTS1 : 0x80030055
1859 20:06:50.813749 ME: HFSTS2 : 0x30280116
1860 20:06:50.816931 ME: HFSTS3 : 0x00000050
1861 20:06:50.823835 ME: HFSTS4 : 0x00004000
1862 20:06:50.827327 ME: HFSTS5 : 0x00000000
1863 20:06:50.830406 ME: HFSTS6 : 0x00400006
1864 20:06:50.834006 ME: Manufacturing Mode : YES
1865 20:06:50.840535 ME: SPI Protection Mode Enabled : NO
1866 20:06:50.843611 ME: FW Partition Table : OK
1867 20:06:50.847227 ME: Bringup Loader Failure : NO
1868 20:06:50.850254 ME: Firmware Init Complete : NO
1869 20:06:50.853567 ME: Boot Options Present : NO
1870 20:06:50.856867 ME: Update In Progress : NO
1871 20:06:50.860538 ME: D0i3 Support : YES
1872 20:06:50.863933 ME: Low Power State Enabled : NO
1873 20:06:50.870340 ME: CPU Replaced : YES
1874 20:06:50.873595 ME: CPU Replacement Valid : YES
1875 20:06:50.877111 ME: Current Working State : 5
1876 20:06:50.880144 ME: Current Operation State : 1
1877 20:06:50.883536 ME: Current Operation Mode : 3
1878 20:06:50.887258 ME: Error Code : 0
1879 20:06:50.890387 ME: Enhanced Debug Mode : NO
1880 20:06:50.893461 ME: CPU Debug Disabled : YES
1881 20:06:50.897075 ME: TXT Support : NO
1882 20:06:50.903480 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1883 20:06:50.913531 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1884 20:06:50.917006 CBFS: 'fallback/slic' not found.
1885 20:06:50.920455 ACPI: Writing ACPI tables at 76b01000.
1886 20:06:50.920541 ACPI: * FACS
1887 20:06:50.923778 ACPI: * DSDT
1888 20:06:50.926572 Ramoops buffer: 0x100000@0x76a00000.
1889 20:06:50.929926 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1890 20:06:50.936534 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1891 20:06:50.939657 Google Chrome EC: version:
1892 20:06:50.943061 ro: voema_v2.0.7540-147f8d37d1
1893 20:06:50.946728 rw: voema_v2.0.7540-147f8d37d1
1894 20:06:50.949693 running image: 2
1895 20:06:50.956512 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1896 20:06:50.959950 ACPI: * FADT
1897 20:06:50.960038 SCI is IRQ9
1898 20:06:50.963713 ACPI: added table 1/32, length now 40
1899 20:06:50.966501 ACPI: * SSDT
1900 20:06:50.969659 Found 1 CPU(s) with 8 core(s) each.
1901 20:06:50.972992 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1902 20:06:50.976234 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1903 20:06:50.983491 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1904 20:06:50.986433 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1905 20:06:50.993332 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1906 20:06:50.996555 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1907 20:06:51.004190 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1908 20:06:51.006996 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1909 20:06:51.010313
1910 20:06:51.016899 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1911 20:06:51.019750 \_SB.PCI0.RP09: Added StorageD3Enable property
1912 20:06:51.022742 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1913 20:06:51.029724 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1914 20:06:51.033031 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1915 20:06:51.035915 PS2K: Passing 80 keymaps to kernel
1916 20:06:51.042672 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1917 20:06:51.049306 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1918 20:06:51.056163 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1919 20:06:51.062770 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1920 20:06:51.069380 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1921 20:06:51.075882 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1922 20:06:51.082556 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1923 20:06:51.089356 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1924 20:06:51.092435 ACPI: added table 2/32, length now 44
1925 20:06:51.095884 ACPI: * MCFG
1926 20:06:51.099136 ACPI: added table 3/32, length now 48
1927 20:06:51.102567 ACPI: * TPM2
1928 20:06:51.102653 TPM2 log created at 0x769f0000
1929 20:06:51.109360 ACPI: added table 4/32, length now 52
1930 20:06:51.109448 ACPI: * MADT
1931 20:06:51.109515 SCI is IRQ9
1932 20:06:51.112759
1933 20:06:51.116132 ACPI: added table 5/32, length now 56
1934 20:06:51.116217 current = 76b09850
1935 20:06:51.119084 ACPI: * DMAR
1936 20:06:51.123036 ACPI: added table 6/32, length now 60
1937 20:06:51.126094 ACPI: added table 7/32, length now 64
1938 20:06:51.129937 ACPI: * HPET
1939 20:06:51.132724 ACPI: added table 8/32, length now 68
1940 20:06:51.132809 ACPI: done.
1941 20:06:51.135896 ACPI tables: 35216 bytes.
1942 20:06:51.139071 smbios_write_tables: 769ef000
1943 20:06:51.142822 EC returned error result code 3
1944 20:06:51.145722 Couldn't obtain OEM name from CBI
1945 20:06:51.149241 Create SMBIOS type 16
1946 20:06:51.149327 Create SMBIOS type 17
1947 20:06:51.152495 GENERIC: 0.0 (WIFI Device)
1948 20:06:51.155750 SMBIOS tables: 1750 bytes.
1949 20:06:51.159170 Writing table forward entry at 0x00000500
1950 20:06:51.165679 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1951 20:06:51.169237 Writing coreboot table at 0x76b25000
1952 20:06:51.175751 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1953 20:06:51.179092 1. 0000000000001000-000000000009ffff: RAM
1954 20:06:51.185718 2. 00000000000a0000-00000000000fffff: RESERVED
1955 20:06:51.189565 3. 0000000000100000-00000000769eefff: RAM
1956 20:06:51.195413 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1957 20:06:51.199043 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1958 20:06:51.205938 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1959 20:06:51.212737 7. 0000000077000000-000000007fbfffff: RESERVED
1960 20:06:51.215395 8. 00000000c0000000-00000000cfffffff: RESERVED
1961 20:06:51.218837 9. 00000000f8000000-00000000f9ffffff: RESERVED
1962 20:06:51.222320
1963 20:06:51.225430 10. 00000000fb000000-00000000fb000fff: RESERVED
1964 20:06:51.228882 11. 00000000fe000000-00000000fe00ffff: RESERVED
1965 20:06:51.235278 12. 00000000fed80000-00000000fed87fff: RESERVED
1966 20:06:51.238823 13. 00000000fed90000-00000000fed92fff: RESERVED
1967 20:06:51.245389 14. 00000000feda0000-00000000feda1fff: RESERVED
1968 20:06:51.248861 15. 00000000fedc0000-00000000feddffff: RESERVED
1969 20:06:51.251824 16. 0000000100000000-00000002803fffff: RAM
1970 20:06:51.255283 Passing 4 GPIOs to payload:
1971 20:06:51.261873 NAME | PORT | POLARITY | VALUE
1972 20:06:51.265399 lid | undefined | high | high
1973 20:06:51.268667
1974 20:06:51.272159 power | undefined | high | low
1975 20:06:51.278493 oprom | undefined | high | low
1976 20:06:51.281733 EC in RW | 0x000000e5 | high | high
1977 20:06:51.288437 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 6414
1978 20:06:51.292132 coreboot table: 1576 bytes.
1979 20:06:51.295103 IMD ROOT 0. 0x76fff000 0x00001000
1980 20:06:51.298562 IMD SMALL 1. 0x76ffe000 0x00001000
1981 20:06:51.302270 FSP MEMORY 2. 0x76c4e000 0x003b0000
1982 20:06:51.304828 VPD 3. 0x76c4d000 0x00000367
1983 20:06:51.308488
1984 20:06:51.312022 RO MCACHE 4. 0x76c4c000 0x00000fdc
1985 20:06:51.315279 CONSOLE 5. 0x76c2c000 0x00020000
1986 20:06:51.318690 FMAP 6. 0x76c2b000 0x00000578
1987 20:06:51.321673 TIME STAMP 7. 0x76c2a000 0x00000910
1988 20:06:51.325175 VBOOT WORK 8. 0x76c16000 0x00014000
1989 20:06:51.328431 ROMSTG STCK 9. 0x76c15000 0x00001000
1990 20:06:51.331983 AFTER CAR 10. 0x76c0a000 0x0000b000
1991 20:06:51.335428 RAMSTAGE 11. 0x76b97000 0x00073000
1992 20:06:51.341972 REFCODE 12. 0x76b42000 0x00055000
1993 20:06:51.345511 SMM BACKUP 13. 0x76b32000 0x00010000
1994 20:06:51.348336 4f444749 14. 0x76b30000 0x00002000
1995 20:06:51.351988 EXT VBT15. 0x76b2d000 0x0000219f
1996 20:06:51.355171 COREBOOT 16. 0x76b25000 0x00008000
1997 20:06:51.359108 ACPI 17. 0x76b01000 0x00024000
1998 20:06:51.361834 ACPI GNVS 18. 0x76b00000 0x00001000
1999 20:06:51.364795 RAMOOPS 19. 0x76a00000 0x00100000
2000 20:06:51.368453 TPM2 TCGLOG20. 0x769f0000 0x00010000
2001 20:06:51.374849 SMBIOS 21. 0x769ef000 0x00000800
2002 20:06:51.374935 IMD small region:
2003 20:06:51.378650 IMD ROOT 0. 0x76ffec00 0x00000400
2004 20:06:51.381742 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2005 20:06:51.389512 POWER STATE 2. 0x76ffeb80 0x00000044
2006 20:06:51.391767 ROMSTAGE 3. 0x76ffeb60 0x00000004
2007 20:06:51.395377 MEM INFO 4. 0x76ffe980 0x000001e0
2008 20:06:51.401800 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
2009 20:06:51.405065 MTRR: Physical address space:
2010 20:06:51.408479 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2011 20:06:51.411985
2012 20:06:51.415029 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2013 20:06:51.422037 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2014 20:06:51.428293 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2015 20:06:51.435210 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2016 20:06:51.441846 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2017 20:06:51.448311 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2018 20:06:51.451691 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 20:06:51.455163 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 20:06:51.461446 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 20:06:51.464985 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 20:06:51.468062 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 20:06:51.471558 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 20:06:51.474718 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 20:06:51.481356 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 20:06:51.484687 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 20:06:51.488088 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 20:06:51.492281 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 20:06:51.496087 call enable_fixed_mtrr()
2030 20:06:51.499234 CPU physical address size: 39 bits
2031 20:06:51.506147 MTRR: default type WB/UC MTRR counts: 6/6.
2032 20:06:51.509290 MTRR: UC selected as default type.
2033 20:06:51.516058 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2034 20:06:51.519407 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2035 20:06:51.525718 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2036 20:06:51.532228 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2037 20:06:51.539209 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2038 20:06:51.545357 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2039 20:06:51.545458
2040 20:06:51.548869 MTRR check
2041 20:06:51.548986 Fixed MTRRs : Enabled
2042 20:06:51.552163
2043 20:06:51.552248 Variable MTRRs: Enabled
2044 20:06:51.552316
2045 20:06:51.558652 MTRR: Fixed MSR 0x250 0x0606060606060606
2046 20:06:51.562727 MTRR: Fixed MSR 0x258 0x0606060606060606
2047 20:06:51.565195 MTRR: Fixed MSR 0x259 0x0000000000000000
2048 20:06:51.568684 MTRR: Fixed MSR 0x268 0x0606060606060606
2049 20:06:51.575226 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 20:06:51.578377 MTRR: Fixed MSR 0x26a 0x0606060606060606
2051 20:06:51.581778 MTRR: Fixed MSR 0x26b 0x0606060606060606
2052 20:06:51.585062 MTRR: Fixed MSR 0x26c 0x0606060606060606
2053 20:06:51.588604 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 20:06:51.592007
2055 20:06:51.595115 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 20:06:51.598149 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 20:06:51.604657 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2058 20:06:51.608202 call enable_fixed_mtrr()
2059 20:06:51.611536 Checking cr50 for pending updates
2060 20:06:51.615749 CPU physical address size: 39 bits
2061 20:06:51.619273 MTRR: Fixed MSR 0x250 0x0606060606060606
2062 20:06:51.622341 MTRR: Fixed MSR 0x250 0x0606060606060606
2063 20:06:51.626199 MTRR: Fixed MSR 0x258 0x0606060606060606
2064 20:06:51.632702 MTRR: Fixed MSR 0x259 0x0000000000000000
2065 20:06:51.636034 MTRR: Fixed MSR 0x268 0x0606060606060606
2066 20:06:51.639348 MTRR: Fixed MSR 0x269 0x0606060606060606
2067 20:06:51.642409 MTRR: Fixed MSR 0x26a 0x0606060606060606
2068 20:06:51.646016 MTRR: Fixed MSR 0x26b 0x0606060606060606
2069 20:06:51.649379
2070 20:06:51.652946 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 20:06:51.655967 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 20:06:51.659223 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 20:06:51.664721 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 20:06:51.669631 MTRR: Fixed MSR 0x258 0x0606060606060606
2075 20:06:51.672330 call enable_fixed_mtrr()
2076 20:06:51.675531 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 20:06:51.679462 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 20:06:51.682337 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 20:06:51.688862 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 20:06:51.692218 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 20:06:51.695498 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 20:06:51.698980 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 20:06:51.705934 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 20:06:51.709119 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 20:06:51.712225 CPU physical address size: 39 bits
2086 20:06:51.716064 call enable_fixed_mtrr()
2087 20:06:51.719269 MTRR: Fixed MSR 0x250 0x0606060606060606
2088 20:06:51.726275 MTRR: Fixed MSR 0x250 0x0606060606060606
2089 20:06:51.729383 MTRR: Fixed MSR 0x258 0x0606060606060606
2090 20:06:51.733023 MTRR: Fixed MSR 0x259 0x0000000000000000
2091 20:06:51.736113 MTRR: Fixed MSR 0x268 0x0606060606060606
2092 20:06:51.742786 MTRR: Fixed MSR 0x269 0x0606060606060606
2093 20:06:51.746706 MTRR: Fixed MSR 0x26a 0x0606060606060606
2094 20:06:51.749172 MTRR: Fixed MSR 0x26b 0x0606060606060606
2095 20:06:51.752594 MTRR: Fixed MSR 0x26c 0x0606060606060606
2096 20:06:51.756040 MTRR: Fixed MSR 0x26d 0x0606060606060606
2097 20:06:51.762424 MTRR: Fixed MSR 0x26e 0x0606060606060606
2098 20:06:51.766049 MTRR: Fixed MSR 0x26f 0x0606060606060606
2099 20:06:51.769602 MTRR: Fixed MSR 0x258 0x0606060606060606
2100 20:06:51.772726
2101 20:06:51.772811 call enable_fixed_mtrr()
2102 20:06:51.776395 MTRR: Fixed MSR 0x259 0x0000000000000000
2103 20:06:51.779090
2104 20:06:51.782424 MTRR: Fixed MSR 0x268 0x0606060606060606
2105 20:06:51.785810 MTRR: Fixed MSR 0x269 0x0606060606060606
2106 20:06:51.788910 MTRR: Fixed MSR 0x26a 0x0606060606060606
2107 20:06:51.792483 MTRR: Fixed MSR 0x26b 0x0606060606060606
2108 20:06:51.799097 MTRR: Fixed MSR 0x26c 0x0606060606060606
2109 20:06:51.802831 MTRR: Fixed MSR 0x26d 0x0606060606060606
2110 20:06:51.805995 MTRR: Fixed MSR 0x26e 0x0606060606060606
2111 20:06:51.809202 MTRR: Fixed MSR 0x26f 0x0606060606060606
2112 20:06:51.813567 CPU physical address size: 39 bits
2113 20:06:51.820094 call enable_fixed_mtrr()
2114 20:06:51.823941 MTRR: Fixed MSR 0x250 0x0606060606060606
2115 20:06:51.826444 MTRR: Fixed MSR 0x250 0x0606060606060606
2116 20:06:51.829747 MTRR: Fixed MSR 0x258 0x0606060606060606
2117 20:06:51.836677 MTRR: Fixed MSR 0x259 0x0000000000000000
2118 20:06:51.839815 MTRR: Fixed MSR 0x268 0x0606060606060606
2119 20:06:51.842846 MTRR: Fixed MSR 0x269 0x0606060606060606
2120 20:06:51.846261 MTRR: Fixed MSR 0x26a 0x0606060606060606
2121 20:06:51.849903 MTRR: Fixed MSR 0x26b 0x0606060606060606
2122 20:06:51.856606 MTRR: Fixed MSR 0x26c 0x0606060606060606
2123 20:06:51.859569 MTRR: Fixed MSR 0x26d 0x0606060606060606
2124 20:06:51.863439 MTRR: Fixed MSR 0x26e 0x0606060606060606
2125 20:06:51.866860 MTRR: Fixed MSR 0x26f 0x0606060606060606
2126 20:06:51.873885 MTRR: Fixed MSR 0x258 0x0606060606060606
2127 20:06:51.873988 call enable_fixed_mtrr()
2128 20:06:51.880759 MTRR: Fixed MSR 0x259 0x0000000000000000
2129 20:06:51.884029 MTRR: Fixed MSR 0x268 0x0606060606060606
2130 20:06:51.887423 MTRR: Fixed MSR 0x269 0x0606060606060606
2131 20:06:51.890833 MTRR: Fixed MSR 0x26a 0x0606060606060606
2132 20:06:51.897109 MTRR: Fixed MSR 0x26b 0x0606060606060606
2133 20:06:51.900248 MTRR: Fixed MSR 0x26c 0x0606060606060606
2134 20:06:51.904045 MTRR: Fixed MSR 0x26d 0x0606060606060606
2135 20:06:51.906857 MTRR: Fixed MSR 0x26e 0x0606060606060606
2136 20:06:51.913800 MTRR: Fixed MSR 0x26f 0x0606060606060606
2137 20:06:51.917354 CPU physical address size: 39 bits
2138 20:06:51.920634 call enable_fixed_mtrr()
2139 20:06:51.923832 CPU physical address size: 39 bits
2140 20:06:51.926985 CPU physical address size: 39 bits
2141 20:06:51.930502 Reading cr50 TPM mode
2142 20:06:51.933546 CPU physical address size: 39 bits
2143 20:06:51.940360 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2144 20:06:51.946941 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2145 20:06:51.953756 Checking segment from ROM address 0xffc02b38
2146 20:06:51.956841 Checking segment from ROM address 0xffc02b54
2147 20:06:51.960304 Loading segment from ROM address 0xffc02b38
2148 20:06:51.963584 code (compression=0)
2149 20:06:51.973676 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2150 20:06:51.980386 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2151 20:06:51.983419 it's not compressed!
2152 20:06:52.122269 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2153 20:06:52.129460 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2154 20:06:52.135978 Loading segment from ROM address 0xffc02b54
2155 20:06:52.136065 Entry Point 0x30000000
2156 20:06:52.138743 Loaded segments
2157 20:06:52.145361 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2158 20:06:52.188786 Finalizing chipset.
2159 20:06:52.191763 Finalizing SMM.
2160 20:06:52.191849 APMC done.
2161 20:06:52.198213 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2162 20:06:52.201574 mp_park_aps done after 0 msecs.
2163 20:06:52.205232 Jumping to boot code at 0x30000000(0x76b25000)
2164 20:06:52.215357 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2165 20:06:52.215446
2166 20:06:52.215513
2167 20:06:52.215576
2168 20:06:52.218321 Starting depthcharge on Voema...
2169 20:06:52.218406
2170 20:06:52.218742 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2171 20:06:52.218842 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2172 20:06:52.218971 Setting prompt string to ['volteer:']
2173 20:06:52.219050 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2174 20:06:52.228690 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2175 20:06:52.228780
2176 20:06:52.235230 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2177 20:06:52.235316
2178 20:06:52.238347 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2179 20:06:52.241782
2180 20:06:52.245613 Failed to find eMMC card reader
2181 20:06:52.245700
2182 20:06:52.245767 Wipe memory regions:
2183 20:06:52.245832
2184 20:06:52.252023 [0x00000000001000, 0x000000000a0000)
2185 20:06:52.252109
2186 20:06:52.255195 [0x00000000100000, 0x00000030000000)
2187 20:06:52.255281
2188 20:06:52.283337 [0x00000032662db0, 0x000000769ef000)
2189 20:06:52.283424
2190 20:06:52.321252 [0x00000100000000, 0x00000280400000)
2191 20:06:52.321343
2192 20:06:52.525896 ec_init: CrosEC protocol v3 supported (256, 256)
2193 20:06:52.526051
2194 20:06:52.532097 update_port_state: port C0 state: usb enable 1 mux conn 0
2195 20:06:52.532185
2196 20:06:52.539295 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2197 20:06:52.539382
2198 20:06:52.547003 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2199 20:06:52.547090
2200 20:06:52.550302 send_conn_disc_msg: pmc_send_cmd succeeded
2201 20:06:52.550388
2202 20:06:52.983606 R8152: Initializing
2203 20:06:52.983746
2204 20:06:52.986523 Version 6 (ocp_data = 5c30)
2205 20:06:52.986609
2206 20:06:52.990094 R8152: Done initializing
2207 20:06:52.990179
2208 20:06:52.993136 Adding net device
2209 20:06:52.993221
2210 20:06:53.299032 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2211 20:06:53.299171
2212 20:06:53.299240
2213 20:06:53.299303
2214 20:06:53.301560 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2216 20:06:53.402335 volteer: tftpboot 192.168.201.1 8411797/tftp-deploy-7w6_tfze/kernel/bzImage 8411797/tftp-deploy-7w6_tfze/kernel/cmdline 8411797/tftp-deploy-7w6_tfze/ramdisk/ramdisk.cpio.gz
2217 20:06:53.402466 Setting prompt string to 'Starting kernel'
2218 20:06:53.402540 Setting prompt string to ['Starting kernel']
2219 20:06:53.402608 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2220 20:06:53.402683 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2221 20:06:53.406707 tftpboot 192.168.201.1 8411797/tftp-deploy-7w6_tfze/kernel/bzImoy-7w6_tfze/kernel/cmdline 8411797/tftp-deploy-7w6_tfze/ramdisk/ramdisk.cpio.gz
2222 20:06:53.406798
2223 20:06:53.406867 Waiting for link
2224 20:06:53.406970
2225 20:06:53.609728 done.
2226 20:06:53.609878
2227 20:06:53.609946 MAC: 00:24:32:30:7d:bc
2228 20:06:53.610055
2229 20:06:53.613316 Sending DHCP discover... done.
2230 20:06:53.613402
2231 20:06:53.617160 Waiting for reply... done.
2232 20:06:53.617247
2233 20:06:53.619832 Sending DHCP request... done.
2234 20:06:53.619918
2235 20:06:53.623180 Waiting for reply... done.
2236 20:06:53.623269
2237 20:06:53.626136 My ip is 192.168.201.22
2238 20:06:53.626222
2239 20:06:53.629370 The DHCP server ip is 192.168.201.1
2240 20:06:53.629456
2241 20:06:53.632918 TFTP server IP predefined by user: 192.168.201.1
2242 20:06:53.633003
2243 20:06:53.639520 Bootfile predefined by user: 8411797/tftp-deploy-7w6_tfze/kernel/bzImage
2244 20:06:53.639606
2245 20:06:53.646052 Sending tftp read request... done.
2246 20:06:53.646138
2247 20:06:53.649252 Waiting for the transfer...
2248 20:06:53.649338
2249 20:06:54.192173 00000000 ################################################################
2250 20:06:54.192321
2251 20:06:54.737896 00080000 ################################################################
2252 20:06:54.738049
2253 20:06:55.279577 00100000 ################################################################
2254 20:06:55.279725
2255 20:06:55.818975 00180000 ################################################################
2256 20:06:55.819127
2257 20:06:56.362890 00200000 ################################################################
2258 20:06:56.363034
2259 20:06:56.876635 00280000 ################################################################
2260 20:06:56.876779
2261 20:06:57.402385 00300000 ################################################################
2262 20:06:57.402529
2263 20:06:57.957605 00380000 ################################################################
2264 20:06:57.957755
2265 20:06:58.503978 00400000 ################################################################
2266 20:06:58.504132
2267 20:06:59.049846 00480000 ################################################################
2268 20:06:59.050000
2269 20:06:59.603174 00500000 ################################################################
2270 20:06:59.603323
2271 20:07:00.146576 00580000 ################################################################
2272 20:07:00.146728
2273 20:07:00.692017 00600000 ################################################################
2274 20:07:00.692161
2275 20:07:01.234591 00680000 ################################################################
2276 20:07:01.234727
2277 20:07:01.476617 00700000 ############################# done.
2278 20:07:01.476765
2279 20:07:01.480112 The bootfile was 7573392 bytes long.
2280 20:07:01.480197
2281 20:07:01.483515 Sending tftp read request... done.
2282 20:07:01.483595
2283 20:07:01.486748 Waiting for the transfer...
2284 20:07:01.486822
2285 20:07:02.022328 00000000 ################################################################
2286 20:07:02.022476
2287 20:07:02.539502 00080000 ################################################################
2288 20:07:02.539637
2289 20:07:03.071176 00100000 ################################################################
2290 20:07:03.071317
2291 20:07:03.621069 00180000 ################################################################
2292 20:07:03.621218
2293 20:07:04.161870 00200000 ################################################################
2294 20:07:04.162010
2295 20:07:04.726837 00280000 ################################################################
2296 20:07:04.727022
2297 20:07:05.306490 00300000 ################################################################
2298 20:07:05.306639
2299 20:07:05.850693 00380000 ################################################################
2300 20:07:05.850841
2301 20:07:06.428042 00400000 ################################################################
2302 20:07:06.428187
2303 20:07:06.990579 00480000 ################################################################
2304 20:07:06.990734
2305 20:07:07.252545 00500000 ############################### done.
2306 20:07:07.252702
2307 20:07:07.256009 Sending tftp read request... done.
2308 20:07:07.256096
2309 20:07:07.258863 Waiting for the transfer...
2310 20:07:07.258950
2311 20:07:07.259015 00000000 # done.
2312 20:07:07.259091
2313 20:07:07.268919 Command line loaded dynamically from TFTP file: 8411797/tftp-deploy-7w6_tfze/kernel/cmdline
2314 20:07:07.269004
2315 20:07:07.292122 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8411797/extract-nfsrootfs-_4_znp71,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2316 20:07:07.292207
2317 20:07:07.299136 Shutting down all USB controllers.
2318 20:07:07.299219
2319 20:07:07.299285 Removing current net device
2320 20:07:07.299346
2321 20:07:07.302150 Finalizing coreboot
2322 20:07:07.302237
2323 20:07:07.308654 Exiting depthcharge with code 4 at timestamp: 23726897
2324 20:07:07.308735
2325 20:07:07.308800
2326 20:07:07.308871 Starting kernel ...
2327 20:07:07.308930
2328 20:07:07.308987
2329 20:07:07.309043
2330 20:07:07.309418 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2331 20:07:07.309515 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2332 20:07:07.309602 Setting prompt string to ['Linux version [0-9]']
2333 20:07:07.309673 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2334 20:07:07.309742 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2336 20:11:35.310509 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2338 20:11:35.311726 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2340 20:11:35.312589 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2343 20:11:35.314096 end: 2 depthcharge-action (duration 00:05:00) [common]
2345 20:11:35.315362 Cleaning after the job
2346 20:11:35.315485 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411797/tftp-deploy-7w6_tfze/ramdisk
2347 20:11:35.315955 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411797/tftp-deploy-7w6_tfze/kernel
2348 20:11:35.316502 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411797/tftp-deploy-7w6_tfze/nfsrootfs
2349 20:11:35.348012 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411797/tftp-deploy-7w6_tfze/modules
2350 20:11:35.348435 start: 5.1 power-off (timeout 00:00:30) [common]
2351 20:11:35.348600 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2352 20:11:35.367661 >> Command sent successfully.
2353 20:11:35.369511 Returned 0 in 0 seconds
2354 20:11:35.470413 end: 5.1 power-off (duration 00:00:00) [common]
2356 20:11:35.471956 start: 5.2 read-feedback (timeout 00:10:00) [common]
2357 20:11:35.473279 Listened to connection for namespace 'common' for up to 1s
2358 20:11:36.477504 Finalising connection for namespace 'common'
2359 20:11:36.477703 Disconnecting from shell: Finalise
2360 20:11:36.578561 end: 5.2 read-feedback (duration 00:00:01) [common]
2361 20:11:36.578729 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8411797
2362 20:11:36.672781 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8411797
2363 20:11:36.672983 JobError: Your job cannot terminate cleanly.