Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Kernel Errors: 0
- Warnings: 0
1 20:06:19.351115 lava-dispatcher, installed at version: 2022.11
2 20:06:19.351295 start: 0 validate
3 20:06:19.351427 Start time: 2022-12-19 20:06:19.351419+00:00 (UTC)
4 20:06:19.351542 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:06:19.351666 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221216.0%2Famd64%2Finitrd.cpio.gz exists
6 20:06:19.355161 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:06:19.355282 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-234-g4e6ec7162c8e%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:06:19.645860 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:06:19.646025 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221216.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 20:06:19.937286 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:06:19.937452 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-234-g4e6ec7162c8e%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 20:06:19.952002 validate duration: 0.60
14 20:06:19.952249 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:06:19.952358 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:06:19.952448 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:06:19.952548 Not decompressing ramdisk as can be used compressed.
18 20:06:19.952632 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221216.0/amd64/initrd.cpio.gz
19 20:06:19.952697 saving as /var/lib/lava/dispatcher/tmp/8411808/tftp-deploy-d28yd_v5/ramdisk/initrd.cpio.gz
20 20:06:19.952757 total size: 5431802 (5MB)
21 20:06:19.970826 progress 0% (0MB)
22 20:06:19.986984 progress 5% (0MB)
23 20:06:19.995804 progress 10% (0MB)
24 20:06:20.002718 progress 15% (0MB)
25 20:06:20.014601 progress 20% (1MB)
26 20:06:20.023772 progress 25% (1MB)
27 20:06:20.032391 progress 30% (1MB)
28 20:06:20.041672 progress 35% (1MB)
29 20:06:20.051341 progress 40% (2MB)
30 20:06:20.058146 progress 45% (2MB)
31 20:06:20.068069 progress 50% (2MB)
32 20:06:20.080986 progress 55% (2MB)
33 20:06:20.091912 progress 60% (3MB)
34 20:06:20.100677 progress 65% (3MB)
35 20:06:20.115196 progress 70% (3MB)
36 20:06:20.125773 progress 75% (3MB)
37 20:06:20.132719 progress 80% (4MB)
38 20:06:20.142946 progress 85% (4MB)
39 20:06:20.157763 progress 90% (4MB)
40 20:06:20.165567 progress 95% (4MB)
41 20:06:20.178501 progress 100% (5MB)
42 20:06:20.178824 5MB downloaded in 0.23s (22.92MB/s)
43 20:06:20.178995 end: 1.1.1 http-download (duration 00:00:00) [common]
45 20:06:20.179240 end: 1.1 download-retry (duration 00:00:00) [common]
46 20:06:20.179327 start: 1.2 download-retry (timeout 00:10:00) [common]
47 20:06:20.179412 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 20:06:20.179515 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-234-g4e6ec7162c8e/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 20:06:20.179580 saving as /var/lib/lava/dispatcher/tmp/8411808/tftp-deploy-d28yd_v5/kernel/bzImage
50 20:06:20.179641 total size: 7573392 (7MB)
51 20:06:20.179700 No compression specified
52 20:06:20.182096 progress 0% (0MB)
53 20:06:20.194541 progress 5% (0MB)
54 20:06:20.211800 progress 10% (0MB)
55 20:06:20.227485 progress 15% (1MB)
56 20:06:20.242887 progress 20% (1MB)
57 20:06:20.257486 progress 25% (1MB)
58 20:06:20.269350 progress 30% (2MB)
59 20:06:20.297521 progress 35% (2MB)
60 20:06:20.347637 progress 40% (2MB)
61 20:06:20.392080 progress 45% (3MB)
62 20:06:20.438050 progress 50% (3MB)
63 20:06:20.496223 progress 55% (4MB)
64 20:06:20.546288 progress 60% (4MB)
65 20:06:20.579739 progress 65% (4MB)
66 20:06:20.619747 progress 70% (5MB)
67 20:06:20.679967 progress 75% (5MB)
68 20:06:20.716167 progress 80% (5MB)
69 20:06:20.748059 progress 85% (6MB)
70 20:06:20.790166 progress 90% (6MB)
71 20:06:20.822085 progress 95% (6MB)
72 20:06:20.858329 progress 100% (7MB)
73 20:06:20.858578 7MB downloaded in 0.68s (10.64MB/s)
74 20:06:20.858780 end: 1.2.1 http-download (duration 00:00:01) [common]
76 20:06:20.859024 end: 1.2 download-retry (duration 00:00:01) [common]
77 20:06:20.859113 start: 1.3 download-retry (timeout 00:09:59) [common]
78 20:06:20.859197 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 20:06:20.859301 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221216.0/amd64/full.rootfs.tar.xz
80 20:06:20.859366 saving as /var/lib/lava/dispatcher/tmp/8411808/tftp-deploy-d28yd_v5/nfsrootfs/full.rootfs.tar
81 20:06:20.859426 total size: 123918980 (118MB)
82 20:06:20.859485 Using unxz to decompress xz
83 20:06:20.864117 progress 0% (0MB)
84 20:06:21.327115 progress 5% (5MB)
85 20:06:21.789003 progress 10% (11MB)
86 20:06:22.249640 progress 15% (17MB)
87 20:06:22.724101 progress 20% (23MB)
88 20:06:23.070522 progress 25% (29MB)
89 20:06:23.414492 progress 30% (35MB)
90 20:06:23.688866 progress 35% (41MB)
91 20:06:23.850558 progress 40% (47MB)
92 20:06:24.223765 progress 45% (53MB)
93 20:06:24.588596 progress 50% (59MB)
94 20:06:24.943337 progress 55% (65MB)
95 20:06:25.302530 progress 60% (70MB)
96 20:06:25.639802 progress 65% (76MB)
97 20:06:26.009216 progress 70% (82MB)
98 20:06:26.413686 progress 75% (88MB)
99 20:06:26.823701 progress 80% (94MB)
100 20:06:26.947075 progress 85% (100MB)
101 20:06:27.104301 progress 90% (106MB)
102 20:06:27.428383 progress 95% (112MB)
103 20:06:27.794219 progress 100% (118MB)
104 20:06:27.800209 118MB downloaded in 6.94s (17.03MB/s)
105 20:06:27.800475 end: 1.3.1 http-download (duration 00:00:07) [common]
107 20:06:27.800774 end: 1.3 download-retry (duration 00:00:07) [common]
108 20:06:27.800880 start: 1.4 download-retry (timeout 00:09:52) [common]
109 20:06:27.800984 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 20:06:27.801112 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-234-g4e6ec7162c8e/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 20:06:27.801188 saving as /var/lib/lava/dispatcher/tmp/8411808/tftp-deploy-d28yd_v5/modules/modules.tar
112 20:06:27.801273 total size: 51664 (0MB)
113 20:06:27.801355 Using unxz to decompress xz
114 20:06:27.862838 progress 63% (0MB)
115 20:06:27.863272 progress 100% (0MB)
116 20:06:27.866620 0MB downloaded in 0.07s (0.75MB/s)
117 20:06:27.866872 end: 1.4.1 http-download (duration 00:00:00) [common]
119 20:06:27.867164 end: 1.4 download-retry (duration 00:00:00) [common]
120 20:06:27.867275 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 20:06:27.867393 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 20:06:29.575120 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8411808/extract-nfsrootfs-d_fj58qh
123 20:06:29.575312 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 20:06:29.575415 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 20:06:29.575552 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk
126 20:06:29.575655 makedir: /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin
127 20:06:29.575752 makedir: /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/tests
128 20:06:29.575837 makedir: /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/results
129 20:06:29.575937 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-add-keys
130 20:06:29.576071 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-add-sources
131 20:06:29.576224 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-background-process-start
132 20:06:29.576345 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-background-process-stop
133 20:06:29.576461 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-common-functions
134 20:06:29.576575 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-echo-ipv4
135 20:06:29.576687 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-install-packages
136 20:06:29.576798 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-installed-packages
137 20:06:29.576908 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-os-build
138 20:06:29.577019 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-probe-channel
139 20:06:29.577133 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-probe-ip
140 20:06:29.577243 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-target-ip
141 20:06:29.577353 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-target-mac
142 20:06:29.577508 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-target-storage
143 20:06:29.577621 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-test-case
144 20:06:29.577742 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-test-event
145 20:06:29.577892 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-test-feedback
146 20:06:29.578007 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-test-raise
147 20:06:29.578120 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-test-reference
148 20:06:29.578232 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-test-runner
149 20:06:29.578342 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-test-set
150 20:06:29.578452 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-test-shell
151 20:06:29.578564 Updating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-install-packages (oe)
152 20:06:29.578680 Updating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/bin/lava-installed-packages (oe)
153 20:06:29.578779 Creating /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/environment
154 20:06:29.578865 LAVA metadata
155 20:06:29.578932 - LAVA_JOB_ID=8411808
156 20:06:29.578997 - LAVA_DISPATCHER_IP=192.168.201.1
157 20:06:29.579096 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 20:06:29.579163 skipped lava-vland-overlay
159 20:06:29.579240 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 20:06:29.579321 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 20:06:29.579384 skipped lava-multinode-overlay
162 20:06:29.579457 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 20:06:29.579539 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 20:06:29.579614 Loading test definitions
165 20:06:29.579706 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
166 20:06:29.579777 Using /lava-8411808 at stage 0
167 20:06:29.579872 Fetching tests from https://github.com/kernelci/test-definitions
168 20:06:29.579955 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/0/tests/0_ltp-ipc'
169 20:06:33.700042 Running '/usr/bin/git checkout kernelci.org
170 20:06:33.837216 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 20:06:33.838004 uuid=8411808_1.5.2.3.1 testdef=None
172 20:06:33.838174 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 20:06:33.838423 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
175 20:06:33.839210 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 20:06:33.839455 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
178 20:06:33.840445 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 20:06:33.840695 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
181 20:06:33.841699 runner path: /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/0/tests/0_ltp-ipc test_uuid 8411808_1.5.2.3.1
182 20:06:33.841795 SKIPFILE='skipfile-lkft.yaml'
183 20:06:33.841865 SKIP_INSTALL='true'
184 20:06:33.841927 TST_CMDFILES='ipc'
185 20:06:33.842064 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 20:06:33.842282 Creating lava-test-runner.conf files
188 20:06:33.842349 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8411808/lava-overlay-30neztyk/lava-8411808/0 for stage 0
189 20:06:33.842434 - 0_ltp-ipc
190 20:06:33.842534 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
191 20:06:33.842627 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
192 20:06:41.248161 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 20:06:41.248327 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
194 20:06:41.248425 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 20:06:41.248530 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
196 20:06:41.248624 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
197 20:06:41.351729 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 20:06:41.352076 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
199 20:06:41.352192 extracting modules file /var/lib/lava/dispatcher/tmp/8411808/tftp-deploy-d28yd_v5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8411808/extract-nfsrootfs-d_fj58qh
200 20:06:41.356345 extracting modules file /var/lib/lava/dispatcher/tmp/8411808/tftp-deploy-d28yd_v5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8411808/extract-overlay-ramdisk-0htj9gpo/ramdisk
201 20:06:41.360141 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 20:06:41.360254 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
203 20:06:41.360336 [common] Applying overlay to NFS
204 20:06:41.360409 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8411808/compress-overlay-135zckh3/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8411808/extract-nfsrootfs-d_fj58qh
205 20:06:41.818302 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 20:06:41.818478 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
207 20:06:41.818576 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 20:06:41.818667 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
209 20:06:41.818755 Building ramdisk /var/lib/lava/dispatcher/tmp/8411808/extract-overlay-ramdisk-0htj9gpo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8411808/extract-overlay-ramdisk-0htj9gpo/ramdisk
210 20:06:41.852374 >> 24546 blocks
211 20:06:42.325046 rename /var/lib/lava/dispatcher/tmp/8411808/extract-overlay-ramdisk-0htj9gpo/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8411808/tftp-deploy-d28yd_v5/ramdisk/ramdisk.cpio.gz
212 20:06:42.325487 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 20:06:42.325613 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
214 20:06:42.325721 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
215 20:06:42.325819 No mkimage arch provided, not using FIT.
216 20:06:42.325914 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 20:06:42.326001 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 20:06:42.326114 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
219 20:06:42.326219 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
220 20:06:42.326299 No LXC device requested
221 20:06:42.326385 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 20:06:42.326478 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
223 20:06:42.326563 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 20:06:42.326635 Checking files for TFTP limit of 4294967296 bytes.
225 20:06:42.327025 end: 1 tftp-deploy (duration 00:00:22) [common]
226 20:06:42.327131 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 20:06:42.327224 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 20:06:42.327355 substitutions:
229 20:06:42.327425 - {DTB}: None
230 20:06:42.327490 - {INITRD}: 8411808/tftp-deploy-d28yd_v5/ramdisk/ramdisk.cpio.gz
231 20:06:42.327552 - {KERNEL}: 8411808/tftp-deploy-d28yd_v5/kernel/bzImage
232 20:06:42.327612 - {LAVA_MAC}: None
233 20:06:42.327671 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8411808/extract-nfsrootfs-d_fj58qh
234 20:06:42.327732 - {NFS_SERVER_IP}: 192.168.201.1
235 20:06:42.327789 - {PRESEED_CONFIG}: None
236 20:06:42.327849 - {PRESEED_LOCAL}: None
237 20:06:42.327906 - {RAMDISK}: 8411808/tftp-deploy-d28yd_v5/ramdisk/ramdisk.cpio.gz
238 20:06:42.327963 - {ROOT_PART}: None
239 20:06:42.328019 - {ROOT}: None
240 20:06:42.328076 - {SERVER_IP}: 192.168.201.1
241 20:06:42.328132 - {TEE}: None
242 20:06:42.328188 Parsed boot commands:
243 20:06:42.328245 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 20:06:42.328406 Parsed boot commands: tftpboot 192.168.201.1 8411808/tftp-deploy-d28yd_v5/kernel/bzImage 8411808/tftp-deploy-d28yd_v5/kernel/cmdline 8411808/tftp-deploy-d28yd_v5/ramdisk/ramdisk.cpio.gz
245 20:06:42.328501 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 20:06:42.328592 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 20:06:42.328689 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 20:06:42.328778 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 20:06:42.328850 Not connected, no need to disconnect.
250 20:06:42.328929 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 20:06:42.329014 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 20:06:42.329084 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
253 20:06:42.331845 Setting prompt string to ['lava-test: # ']
254 20:06:42.332143 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 20:06:42.332251 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 20:06:42.332350 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 20:06:42.332439 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 20:06:42.332618 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
259 20:06:42.351541 >> Command sent successfully.
260 20:06:42.353518 Returned 0 in 0 seconds
261 20:06:42.453794 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 20:06:42.454128 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 20:06:42.454262 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 20:06:42.454349 Setting prompt string to 'Starting depthcharge on Voema...'
266 20:06:42.454417 Changing prompt to 'Starting depthcharge on Voema...'
267 20:06:42.454487 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
268 20:06:42.454754 [Enter `^Ec?' for help]
269 20:06:50.557664
270 20:06:50.558292
271 20:06:50.564953 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
272 20:06:50.572255 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
273 20:06:50.575779 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
274 20:06:50.583045 CPU: AES supported, TXT NOT supported, VT supported
275 20:06:50.586908 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
276 20:06:50.590369 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
277 20:06:50.597532 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
278 20:06:50.601461 VBOOT: Loading verstage.
279 20:06:50.605383 FMAP: Found "FLASH" version 1.1 at 0x1804000.
280 20:06:50.609756 FMAP: base = 0x0 size = 0x2000000 #areas = 32
281 20:06:50.612613 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
282 20:06:50.620686 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
283 20:06:50.628196 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
284 20:06:50.633300
285 20:06:50.633819
286 20:06:50.640831 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
287 20:06:50.657102 Probing TPM: . done!
288 20:06:50.660425 TPM ready after 0 ms
289 20:06:50.664083 Connected to device vid:did:rid of 1ae0:0028:00
290 20:06:50.674952 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
291 20:06:50.681506 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
292 20:06:50.685107 Initialized TPM device CR50 revision 0
293 20:06:50.737881 tlcl_send_startup: Startup return code is 0
294 20:06:50.738526 TPM: setup succeeded
295 20:06:50.752982 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
296 20:06:50.767322 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
297 20:06:50.780142 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
298 20:06:50.789740 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
299 20:06:50.793453 Chrome EC: UHEPI supported
300 20:06:50.796915 Phase 1
301 20:06:50.800029 FMAP: area GBB found @ 1805000 (458752 bytes)
302 20:06:50.810509 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 20:06:50.816870 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 20:06:50.823472 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
305 20:06:50.829855 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
306 20:06:50.833356 Recovery requested (1009000e)
307 20:06:50.836591 TPM: Extending digest for VBOOT: boot mode into PCR 0
308 20:06:50.848264 tlcl_extend: response is 0
309 20:06:50.855095 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
310 20:06:50.865253 tlcl_extend: response is 0
311 20:06:50.871452 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
312 20:06:50.877974 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
313 20:06:50.884506 BS: verstage times (exec / console): total (unknown) / 142 ms
314 20:06:50.884585
315 20:06:50.884650
316 20:06:50.897673 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
317 20:06:50.904444 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
318 20:06:50.907590 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
319 20:06:50.910906 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
320 20:06:50.917560 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
321 20:06:50.920891 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
322 20:06:50.924134 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
323 20:06:50.927422 TCO_STS: 0000 0000
324 20:06:50.930754 GEN_PMCON: d0015038 00002200
325 20:06:50.934126 GBLRST_CAUSE: 00000000 00000000
326 20:06:50.934204 HPR_CAUSE0: 00000000
327 20:06:50.937608 prev_sleep_state 5
328 20:06:50.940608 Boot Count incremented to 13259
329 20:06:50.948015 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
330 20:06:50.954093 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 20:06:50.960565 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 20:06:50.967441 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
333 20:06:50.972352 Chrome EC: UHEPI supported
334 20:06:50.979176 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
335 20:06:50.991650 Probing TPM: done!
336 20:06:50.999570 Connected to device vid:did:rid of 1ae0:0028:00
337 20:06:51.007093 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
338 20:06:51.016891 Initialized TPM device CR50 revision 0
339 20:06:51.026792 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
340 20:06:51.033371 MRC: Hash idx 0x100b comparison successful.
341 20:06:51.036686 MRC cache found, size faa8
342 20:06:51.036776 bootmode is set to: 2
343 20:06:51.040312 SPD index = 0
344 20:06:51.047044 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
345 20:06:51.049925 SPD: module type is LPDDR4X
346 20:06:51.053326 SPD: module part number is MT53E512M64D4NW-046
347 20:06:51.060136 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
348 20:06:51.063333 SPD: device width 16 bits, bus width 16 bits
349 20:06:51.069966 SPD: module size is 1024 MB (per channel)
350 20:06:51.500363 CBMEM:
351 20:06:51.504003 IMD: root @ 0x76fff000 254 entries.
352 20:06:51.506997 IMD: root @ 0x76ffec00 62 entries.
353 20:06:51.509995 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
354 20:06:51.516851 FMAP: area RW_VPD found @ f35000 (8192 bytes)
355 20:06:51.520014 External stage cache:
356 20:06:51.523720 IMD: root @ 0x7b3ff000 254 entries.
357 20:06:51.526667 IMD: root @ 0x7b3fec00 62 entries.
358 20:06:51.541867 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
359 20:06:51.548533 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
360 20:06:51.555614 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
361 20:06:51.569146 MRC: 'RECOVERY_MRC_CACHE' does not need update.
362 20:06:51.572299 cse_lite: Skip switching to RW in the recovery path
363 20:06:51.576510
364 20:06:51.576597 8 DIMMs found
365 20:06:51.576667 SMM Memory Map
366 20:06:51.580066 SMRAM : 0x7b000000 0x800000
367 20:06:51.583906 Subregion 0: 0x7b000000 0x200000
368 20:06:51.587219 Subregion 1: 0x7b200000 0x200000
369 20:06:51.590764 Subregion 2: 0x7b400000 0x400000
370 20:06:51.594049 top_of_ram = 0x77000000
371 20:06:51.600352 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
372 20:06:51.604054 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
373 20:06:51.610620 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
374 20:06:51.614117 MTRR Range: Start=ff000000 End=0 (Size 1000000)
375 20:06:51.620718 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
376 20:06:51.626913 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
377 20:06:51.638706 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
378 20:06:51.642163 Processing 211 relocs. Offset value of 0x74c0b000
379 20:06:51.645391
380 20:06:51.652456 BS: romstage times (exec / console): total (unknown) / 277 ms
381 20:06:51.658007
382 20:06:51.658092
383 20:06:51.668236 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
384 20:06:51.671389 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
385 20:06:51.681686 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
386 20:06:51.687946 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
387 20:06:51.694994 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
388 20:06:51.700975 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
389 20:06:51.747934 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
390 20:06:51.754524 Processing 5008 relocs. Offset value of 0x75d98000
391 20:06:51.758094 BS: postcar times (exec / console): total (unknown) / 59 ms
392 20:06:51.761113
393 20:06:51.761191
394 20:06:51.771165 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
395 20:06:51.771249 Normal boot
396 20:06:51.775009 FW_CONFIG value is 0x804c02
397 20:06:51.778260 PCI: 00:07.0 disabled by fw_config
398 20:06:51.781710 PCI: 00:07.1 disabled by fw_config
399 20:06:51.785118 PCI: 00:0d.2 disabled by fw_config
400 20:06:51.788039 PCI: 00:1c.7 disabled by fw_config
401 20:06:51.795014 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
402 20:06:51.801683 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
403 20:06:51.804497 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
404 20:06:51.807895 GENERIC: 0.0 disabled by fw_config
405 20:06:51.811225 GENERIC: 1.0 disabled by fw_config
406 20:06:51.818241 fw_config match found: DB_USB=USB3_ACTIVE
407 20:06:51.821336 fw_config match found: DB_USB=USB3_ACTIVE
408 20:06:51.824727 fw_config match found: DB_USB=USB3_ACTIVE
409 20:06:51.831371 fw_config match found: DB_USB=USB3_ACTIVE
410 20:06:51.834696 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
411 20:06:51.841354 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
412 20:06:51.851484 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
413 20:06:51.857568 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
414 20:06:51.861291 microcode: sig=0x806c1 pf=0x80 revision=0x86
415 20:06:51.867910 microcode: Update skipped, already up-to-date
416 20:06:51.874548 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
417 20:06:51.901378 Detected 4 core, 8 thread CPU.
418 20:06:51.905192 Setting up SMI for CPU
419 20:06:51.908138 IED base = 0x7b400000
420 20:06:51.908224 IED size = 0x00400000
421 20:06:51.911667 Will perform SMM setup.
422 20:06:51.918504 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
423 20:06:51.924763 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
424 20:06:51.931370 Processing 16 relocs. Offset value of 0x00030000
425 20:06:51.934891 Attempting to start 7 APs
426 20:06:51.938214 Waiting for 10ms after sending INIT.
427 20:06:51.953901 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
428 20:06:51.957358 AP: slot 3 apic_id 6.
429 20:06:51.961021 AP: slot 2 apic_id 3.
430 20:06:51.961106 AP: slot 6 apic_id 2.
431 20:06:51.963996 AP: slot 4 apic_id 5.
432 20:06:51.966984 AP: slot 5 apic_id 4.
433 20:06:51.967072 done.
434 20:06:51.967138 AP: slot 7 apic_id 7.
435 20:06:51.973958 Waiting for 2nd SIPI to complete...done.
436 20:06:51.980489 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
437 20:06:51.986886 Processing 13 relocs. Offset value of 0x00038000
438 20:06:51.986972 Unable to locate Global NVS
439 20:06:51.997046 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
440 20:06:52.000225 Installing permanent SMM handler to 0x7b000000
441 20:06:52.010344 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
442 20:06:52.013677 Processing 794 relocs. Offset value of 0x7b010000
443 20:06:52.020336 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
444 20:06:52.023718
445 20:06:52.026919 Processing 13 relocs. Offset value of 0x7b008000
446 20:06:52.033511 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
447 20:06:52.040184 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
448 20:06:52.043837 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
449 20:06:52.049975 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
450 20:06:52.056944 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
451 20:06:52.063245 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
452 20:06:52.066791 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
453 20:06:52.070048 Unable to locate Global NVS
454 20:06:52.076863 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
455 20:06:52.081522 Clearing SMI status registers
456 20:06:52.085224 SMI_STS: PM1
457 20:06:52.085308 PM1_STS: PWRBTN
458 20:06:52.095189 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
459 20:06:52.095274 In relocation handler: CPU 0
460 20:06:52.101737 New SMBASE=0x7b000000 IEDBASE=0x7b400000
461 20:06:52.105357 Writing SMRR. base = 0x7b000006, mask=0xff800c00
462 20:06:52.108328 Relocation complete.
463 20:06:52.114955 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
464 20:06:52.118051 In relocation handler: CPU 1
465 20:06:52.121394 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
466 20:06:52.125091 Relocation complete.
467 20:06:52.131518 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
468 20:06:52.134720 In relocation handler: CPU 4
469 20:06:52.138426 New SMBASE=0x7afff000 IEDBASE=0x7b400000
470 20:06:52.141502 Relocation complete.
471 20:06:52.148568 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
472 20:06:52.151480 In relocation handler: CPU 5
473 20:06:52.154914 New SMBASE=0x7affec00 IEDBASE=0x7b400000
474 20:06:52.158135 Writing SMRR. base = 0x7b000006, mask=0xff800c00
475 20:06:52.161279 Relocation complete.
476 20:06:52.168201 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
477 20:06:52.171728 In relocation handler: CPU 6
478 20:06:52.174796 New SMBASE=0x7affe800 IEDBASE=0x7b400000
479 20:06:52.181367 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 20:06:52.184702 Relocation complete.
481 20:06:52.191618 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
482 20:06:52.194603 In relocation handler: CPU 3
483 20:06:52.198385 New SMBASE=0x7afff400 IEDBASE=0x7b400000
484 20:06:52.201356 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 20:06:52.205443 Relocation complete.
486 20:06:52.211720 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
487 20:06:52.214770 In relocation handler: CPU 7
488 20:06:52.218221 New SMBASE=0x7affe400 IEDBASE=0x7b400000
489 20:06:52.221228 Relocation complete.
490 20:06:52.228029 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
491 20:06:52.231793 In relocation handler: CPU 2
492 20:06:52.234654 New SMBASE=0x7afff800 IEDBASE=0x7b400000
493 20:06:52.237797 Relocation complete.
494 20:06:52.237881 Initializing CPU #0
495 20:06:52.242110 CPU: vendor Intel device 806c1
496 20:06:52.245387 CPU: family 06, model 8c, stepping 01
497 20:06:52.249232 Clearing out pending MCEs
498 20:06:52.252542 Setting up local APIC...
499 20:06:52.252627 apic_id: 0x00 done.
500 20:06:52.256027
501 20:06:52.256112 Turbo is available but hidden
502 20:06:52.259361 Turbo is available and visible
503 20:06:52.265778 microcode: Update skipped, already up-to-date
504 20:06:52.265863 CPU #0 initialized
505 20:06:52.269270 Initializing CPU #3
506 20:06:52.272602 Initializing CPU #7
507 20:06:52.275770 CPU: vendor Intel device 806c1
508 20:06:52.279266 CPU: family 06, model 8c, stepping 01
509 20:06:52.282642 CPU: vendor Intel device 806c1
510 20:06:52.285759 CPU: family 06, model 8c, stepping 01
511 20:06:52.289234 Clearing out pending MCEs
512 20:06:52.289319 Clearing out pending MCEs
513 20:06:52.292504 Setting up local APIC...
514 20:06:52.295711 Initializing CPU #4
515 20:06:52.295796 Initializing CPU #5
516 20:06:52.299126 CPU: vendor Intel device 806c1
517 20:06:52.302727 CPU: family 06, model 8c, stepping 01
518 20:06:52.305609 CPU: vendor Intel device 806c1
519 20:06:52.312245 CPU: family 06, model 8c, stepping 01
520 20:06:52.312330 Clearing out pending MCEs
521 20:06:52.315961 Clearing out pending MCEs
522 20:06:52.319011 Setting up local APIC...
523 20:06:52.322287 Initializing CPU #6
524 20:06:52.322372 Initializing CPU #2
525 20:06:52.326031 CPU: vendor Intel device 806c1
526 20:06:52.328975 CPU: family 06, model 8c, stepping 01
527 20:06:52.332341 CPU: vendor Intel device 806c1
528 20:06:52.335623 CPU: family 06, model 8c, stepping 01
529 20:06:52.338882 Clearing out pending MCEs
530 20:06:52.342154 Clearing out pending MCEs
531 20:06:52.345533 Setting up local APIC...
532 20:06:52.345618 Setting up local APIC...
533 20:06:52.348963 apic_id: 0x02 done.
534 20:06:52.352376 Setting up local APIC...
535 20:06:52.352461 Initializing CPU #1
536 20:06:52.355634 apic_id: 0x04 done.
537 20:06:52.358923 apic_id: 0x05 done.
538 20:06:52.362241 microcode: Update skipped, already up-to-date
539 20:06:52.369239 microcode: Update skipped, already up-to-date
540 20:06:52.369323 CPU #5 initialized
541 20:06:52.372220 CPU #4 initialized
542 20:06:52.372305 apic_id: 0x03 done.
543 20:06:52.378669 microcode: Update skipped, already up-to-date
544 20:06:52.382201 microcode: Update skipped, already up-to-date
545 20:06:52.385439 CPU #6 initialized
546 20:06:52.385537 CPU #2 initialized
547 20:06:52.389094 Setting up local APIC...
548 20:06:52.392410 CPU: vendor Intel device 806c1
549 20:06:52.395213 CPU: family 06, model 8c, stepping 01
550 20:06:52.398610 Clearing out pending MCEs
551 20:06:52.402044 apic_id: 0x06 done.
552 20:06:52.402129 apic_id: 0x07 done.
553 20:06:52.408989 microcode: Update skipped, already up-to-date
554 20:06:52.412230 microcode: Update skipped, already up-to-date
555 20:06:52.415323 CPU #3 initialized
556 20:06:52.415408 CPU #7 initialized
557 20:06:52.418932 Setting up local APIC...
558 20:06:52.421972 apic_id: 0x01 done.
559 20:06:52.425242 microcode: Update skipped, already up-to-date
560 20:06:52.428457 CPU #1 initialized
561 20:06:52.431871 bsp_do_flight_plan done after 455 msecs.
562 20:06:52.435347 CPU: frequency set to 4000 MHz
563 20:06:52.435433 Enabling SMIs.
564 20:06:52.441897 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
565 20:06:52.458727 SATAXPCIE1 indicates PCIe NVMe is present
566 20:06:52.462212 Probing TPM: done!
567 20:06:52.465688 Connected to device vid:did:rid of 1ae0:0028:00
568 20:06:52.476333 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
569 20:06:52.479436 Initialized TPM device CR50 revision 0
570 20:06:52.483081 Enabling S0i3.4
571 20:06:52.489134 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
572 20:06:52.492696 Found a VBT of 8704 bytes after decompression
573 20:06:52.499277 cse_lite: CSE RO boot. HybridStorageMode disabled
574 20:06:52.506053 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
575 20:06:52.581795 FSPS returned 0
576 20:06:52.584967 Executing Phase 1 of FspMultiPhaseSiInit
577 20:06:52.594709 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
578 20:06:52.598455 port C0 DISC req: usage 1 usb3 1 usb2 5
579 20:06:52.601961 Raw Buffer output 0 00000511
580 20:06:52.604532 Raw Buffer output 1 00000000
581 20:06:52.608443 pmc_send_ipc_cmd succeeded
582 20:06:52.612004 port C1 DISC req: usage 1 usb3 2 usb2 3
583 20:06:52.615237
584 20:06:52.615321 Raw Buffer output 0 00000321
585 20:06:52.618937 Raw Buffer output 1 00000000
586 20:06:52.622607 pmc_send_ipc_cmd succeeded
587 20:06:52.627903 Detected 4 core, 8 thread CPU.
588 20:06:52.631194 Detected 4 core, 8 thread CPU.
589 20:06:52.864759 Display FSP Version Info HOB
590 20:06:52.868229 Reference Code - CPU = a.0.4c.31
591 20:06:52.871935 uCode Version = 0.0.0.86
592 20:06:52.875484 TXT ACM version = ff.ff.ff.ffff
593 20:06:52.878290 Reference Code - ME = a.0.4c.31
594 20:06:52.881290 MEBx version = 0.0.0.0
595 20:06:52.884881 ME Firmware Version = Consumer SKU
596 20:06:52.888362 Reference Code - PCH = a.0.4c.31
597 20:06:52.891594 PCH-CRID Status = Disabled
598 20:06:52.894862 PCH-CRID Original Value = ff.ff.ff.ffff
599 20:06:52.898283 PCH-CRID New Value = ff.ff.ff.ffff
600 20:06:52.901392 OPROM - RST - RAID = ff.ff.ff.ffff
601 20:06:52.904820 PCH Hsio Version = 4.0.0.0
602 20:06:52.908105 Reference Code - SA - System Agent = a.0.4c.31
603 20:06:52.911676 Reference Code - MRC = 2.0.0.1
604 20:06:52.914701 SA - PCIe Version = a.0.4c.31
605 20:06:52.917987 SA-CRID Status = Disabled
606 20:06:52.921407 SA-CRID Original Value = 0.0.0.1
607 20:06:52.924539 SA-CRID New Value = 0.0.0.1
608 20:06:52.928059 OPROM - VBIOS = ff.ff.ff.ffff
609 20:06:52.931512 IO Manageability Engine FW Version = 11.1.4.0
610 20:06:52.934509 PHY Build Version = 0.0.0.e0
611 20:06:52.938271 Thunderbolt(TM) FW Version = 0.0.0.0
612 20:06:52.944448 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
613 20:06:52.948058 ITSS IRQ Polarities Before:
614 20:06:52.948143 IPC0: 0xffffffff
615 20:06:52.951374 IPC1: 0xffffffff
616 20:06:52.951459 IPC2: 0xffffffff
617 20:06:52.954742 IPC3: 0xffffffff
618 20:06:52.957875 ITSS IRQ Polarities After:
619 20:06:52.957960 IPC0: 0xffffffff
620 20:06:52.961274 IPC1: 0xffffffff
621 20:06:52.961360 IPC2: 0xffffffff
622 20:06:52.964896 IPC3: 0xffffffff
623 20:06:52.968046 Found PCIe Root Port #9 at PCI: 00:1d.0.
624 20:06:52.980982 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
625 20:06:52.991229 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
626 20:06:53.004556 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
627 20:06:53.010976 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
628 20:06:53.011063 Enumerating buses...
629 20:06:53.017845 Show all devs... Before device enumeration.
630 20:06:53.017945 Root Device: enabled 1
631 20:06:53.021208 DOMAIN: 0000: enabled 1
632 20:06:53.024568 CPU_CLUSTER: 0: enabled 1
633 20:06:53.027725 PCI: 00:00.0: enabled 1
634 20:06:53.027812 PCI: 00:02.0: enabled 1
635 20:06:53.030903 PCI: 00:04.0: enabled 1
636 20:06:53.034430 PCI: 00:05.0: enabled 1
637 20:06:53.037715 PCI: 00:06.0: enabled 0
638 20:06:53.037801 PCI: 00:07.0: enabled 0
639 20:06:53.041063 PCI: 00:07.1: enabled 0
640 20:06:53.044817 PCI: 00:07.2: enabled 0
641 20:06:53.047955 PCI: 00:07.3: enabled 0
642 20:06:53.048040 PCI: 00:08.0: enabled 1
643 20:06:53.050927 PCI: 00:09.0: enabled 0
644 20:06:53.054533 PCI: 00:0a.0: enabled 0
645 20:06:53.057676 PCI: 00:0d.0: enabled 1
646 20:06:53.057753 PCI: 00:0d.1: enabled 0
647 20:06:53.061223 PCI: 00:0d.2: enabled 0
648 20:06:53.064601 PCI: 00:0d.3: enabled 0
649 20:06:53.064681 PCI: 00:0e.0: enabled 0
650 20:06:53.067728
651 20:06:53.067820 PCI: 00:10.2: enabled 1
652 20:06:53.070850 PCI: 00:10.6: enabled 0
653 20:06:53.074194 PCI: 00:10.7: enabled 0
654 20:06:53.074278 PCI: 00:12.0: enabled 0
655 20:06:53.077751 PCI: 00:12.6: enabled 0
656 20:06:53.081303 PCI: 00:13.0: enabled 0
657 20:06:53.084549 PCI: 00:14.0: enabled 1
658 20:06:53.084633 PCI: 00:14.1: enabled 0
659 20:06:53.087402 PCI: 00:14.2: enabled 1
660 20:06:53.090776 PCI: 00:14.3: enabled 1
661 20:06:53.094188 PCI: 00:15.0: enabled 1
662 20:06:53.094272 PCI: 00:15.1: enabled 1
663 20:06:53.097353 PCI: 00:15.2: enabled 1
664 20:06:53.101348 PCI: 00:15.3: enabled 1
665 20:06:53.103956 PCI: 00:16.0: enabled 1
666 20:06:53.104043 PCI: 00:16.1: enabled 0
667 20:06:53.107640 PCI: 00:16.2: enabled 0
668 20:06:53.110861 PCI: 00:16.3: enabled 0
669 20:06:53.110955 PCI: 00:16.4: enabled 0
670 20:06:53.114359 PCI: 00:16.5: enabled 0
671 20:06:53.117449 PCI: 00:17.0: enabled 1
672 20:06:53.120635 PCI: 00:19.0: enabled 0
673 20:06:53.120720 PCI: 00:19.1: enabled 1
674 20:06:53.123951 PCI: 00:19.2: enabled 0
675 20:06:53.127483 PCI: 00:1c.0: enabled 1
676 20:06:53.130734 PCI: 00:1c.1: enabled 0
677 20:06:53.130819 PCI: 00:1c.2: enabled 0
678 20:06:53.133964 PCI: 00:1c.3: enabled 0
679 20:06:53.137252 PCI: 00:1c.4: enabled 0
680 20:06:53.140472 PCI: 00:1c.5: enabled 0
681 20:06:53.140557 PCI: 00:1c.6: enabled 1
682 20:06:53.144399 PCI: 00:1c.7: enabled 0
683 20:06:53.147564 PCI: 00:1d.0: enabled 1
684 20:06:53.147649 PCI: 00:1d.1: enabled 0
685 20:06:53.150638
686 20:06:53.150724 PCI: 00:1d.2: enabled 1
687 20:06:53.154171 PCI: 00:1d.3: enabled 0
688 20:06:53.157280 PCI: 00:1e.0: enabled 1
689 20:06:53.157365 PCI: 00:1e.1: enabled 0
690 20:06:53.160518 PCI: 00:1e.2: enabled 1
691 20:06:53.164303 PCI: 00:1e.3: enabled 1
692 20:06:53.167325 PCI: 00:1f.0: enabled 1
693 20:06:53.167410 PCI: 00:1f.1: enabled 0
694 20:06:53.170446 PCI: 00:1f.2: enabled 1
695 20:06:53.173728 PCI: 00:1f.3: enabled 1
696 20:06:53.177206 PCI: 00:1f.4: enabled 0
697 20:06:53.177291 PCI: 00:1f.5: enabled 1
698 20:06:53.180670 PCI: 00:1f.6: enabled 0
699 20:06:53.184008 PCI: 00:1f.7: enabled 0
700 20:06:53.184094 APIC: 00: enabled 1
701 20:06:53.187115 GENERIC: 0.0: enabled 1
702 20:06:53.190749 GENERIC: 0.0: enabled 1
703 20:06:53.193749 GENERIC: 1.0: enabled 1
704 20:06:53.193835 GENERIC: 0.0: enabled 1
705 20:06:53.197199 GENERIC: 1.0: enabled 1
706 20:06:53.200650 USB0 port 0: enabled 1
707 20:06:53.203699 GENERIC: 0.0: enabled 1
708 20:06:53.203784 USB0 port 0: enabled 1
709 20:06:53.207166 GENERIC: 0.0: enabled 1
710 20:06:53.210284 I2C: 00:1a: enabled 1
711 20:06:53.210369 I2C: 00:31: enabled 1
712 20:06:53.213913 I2C: 00:32: enabled 1
713 20:06:53.216898 I2C: 00:10: enabled 1
714 20:06:53.216983 I2C: 00:15: enabled 1
715 20:06:53.220485 GENERIC: 0.0: enabled 0
716 20:06:53.223671 GENERIC: 1.0: enabled 0
717 20:06:53.226889 GENERIC: 0.0: enabled 1
718 20:06:53.226966 SPI: 00: enabled 1
719 20:06:53.230244 SPI: 00: enabled 1
720 20:06:53.230317 PNP: 0c09.0: enabled 1
721 20:06:53.233601 GENERIC: 0.0: enabled 1
722 20:06:53.237048 USB3 port 0: enabled 1
723 20:06:53.240412 USB3 port 1: enabled 1
724 20:06:53.240498 USB3 port 2: enabled 0
725 20:06:53.243689 USB3 port 3: enabled 0
726 20:06:53.247194 USB2 port 0: enabled 0
727 20:06:53.247273 USB2 port 1: enabled 1
728 20:06:53.250041 USB2 port 2: enabled 1
729 20:06:53.253971 USB2 port 3: enabled 0
730 20:06:53.257250 USB2 port 4: enabled 1
731 20:06:53.257334 USB2 port 5: enabled 0
732 20:06:53.260628 USB2 port 6: enabled 0
733 20:06:53.264135 USB2 port 7: enabled 0
734 20:06:53.264220 USB2 port 8: enabled 0
735 20:06:53.267909 USB2 port 9: enabled 0
736 20:06:53.270547 USB3 port 0: enabled 0
737 20:06:53.270632 USB3 port 1: enabled 1
738 20:06:53.273521 USB3 port 2: enabled 0
739 20:06:53.276835 USB3 port 3: enabled 0
740 20:06:53.280052 GENERIC: 0.0: enabled 1
741 20:06:53.280140 GENERIC: 1.0: enabled 1
742 20:06:53.283617 APIC: 01: enabled 1
743 20:06:53.286789 APIC: 03: enabled 1
744 20:06:53.286874 APIC: 06: enabled 1
745 20:06:53.290233 APIC: 05: enabled 1
746 20:06:53.290318 APIC: 04: enabled 1
747 20:06:53.293516 APIC: 02: enabled 1
748 20:06:53.297255 APIC: 07: enabled 1
749 20:06:53.297340 Compare with tree...
750 20:06:53.300483 Root Device: enabled 1
751 20:06:53.303389 DOMAIN: 0000: enabled 1
752 20:06:53.307080 PCI: 00:00.0: enabled 1
753 20:06:53.307166 PCI: 00:02.0: enabled 1
754 20:06:53.310559 PCI: 00:04.0: enabled 1
755 20:06:53.313719 GENERIC: 0.0: enabled 1
756 20:06:53.316716 PCI: 00:05.0: enabled 1
757 20:06:53.320218 PCI: 00:06.0: enabled 0
758 20:06:53.320303 PCI: 00:07.0: enabled 0
759 20:06:53.323648 GENERIC: 0.0: enabled 1
760 20:06:53.326978 PCI: 00:07.1: enabled 0
761 20:06:53.330086 GENERIC: 1.0: enabled 1
762 20:06:53.333432 PCI: 00:07.2: enabled 0
763 20:06:53.333516 GENERIC: 0.0: enabled 1
764 20:06:53.336944 PCI: 00:07.3: enabled 0
765 20:06:53.340090 GENERIC: 1.0: enabled 1
766 20:06:53.343331 PCI: 00:08.0: enabled 1
767 20:06:53.346773 PCI: 00:09.0: enabled 0
768 20:06:53.346857 PCI: 00:0a.0: enabled 0
769 20:06:53.350087 PCI: 00:0d.0: enabled 1
770 20:06:53.353310 USB0 port 0: enabled 1
771 20:06:53.356661 USB3 port 0: enabled 1
772 20:06:53.359782 USB3 port 1: enabled 1
773 20:06:53.359867 USB3 port 2: enabled 0
774 20:06:53.363208
775 20:06:53.363292 USB3 port 3: enabled 0
776 20:06:53.366472 PCI: 00:0d.1: enabled 0
777 20:06:53.370060 PCI: 00:0d.2: enabled 0
778 20:06:53.373236 GENERIC: 0.0: enabled 1
779 20:06:53.376916 PCI: 00:0d.3: enabled 0
780 20:06:53.377001 PCI: 00:0e.0: enabled 0
781 20:06:53.379956 PCI: 00:10.2: enabled 1
782 20:06:53.383042 PCI: 00:10.6: enabled 0
783 20:06:53.386682 PCI: 00:10.7: enabled 0
784 20:06:53.386766 PCI: 00:12.0: enabled 0
785 20:06:53.390338
786 20:06:53.390436 PCI: 00:12.6: enabled 0
787 20:06:53.392880 PCI: 00:13.0: enabled 0
788 20:06:53.396498 PCI: 00:14.0: enabled 1
789 20:06:53.399919 USB0 port 0: enabled 1
790 20:06:53.400004 USB2 port 0: enabled 0
791 20:06:53.402818
792 20:06:53.402903 USB2 port 1: enabled 1
793 20:06:53.406204 USB2 port 2: enabled 1
794 20:06:53.409570 USB2 port 3: enabled 0
795 20:06:53.413038 USB2 port 4: enabled 1
796 20:06:53.416107 USB2 port 5: enabled 0
797 20:06:53.416192 USB2 port 6: enabled 0
798 20:06:53.419629 USB2 port 7: enabled 0
799 20:06:53.422821 USB2 port 8: enabled 0
800 20:06:53.426195 USB2 port 9: enabled 0
801 20:06:53.429607 USB3 port 0: enabled 0
802 20:06:53.433046 USB3 port 1: enabled 1
803 20:06:53.433130 USB3 port 2: enabled 0
804 20:06:53.436233 USB3 port 3: enabled 0
805 20:06:53.439522 PCI: 00:14.1: enabled 0
806 20:06:53.442946 PCI: 00:14.2: enabled 1
807 20:06:53.446112 PCI: 00:14.3: enabled 1
808 20:06:53.446199 GENERIC: 0.0: enabled 1
809 20:06:53.449560 PCI: 00:15.0: enabled 1
810 20:06:53.453073 I2C: 00:1a: enabled 1
811 20:06:53.456433 I2C: 00:31: enabled 1
812 20:06:53.456517 I2C: 00:32: enabled 1
813 20:06:53.459290
814 20:06:53.459375 PCI: 00:15.1: enabled 1
815 20:06:53.462777 I2C: 00:10: enabled 1
816 20:06:53.466297 PCI: 00:15.2: enabled 1
817 20:06:53.469920 PCI: 00:15.3: enabled 1
818 20:06:53.470004 PCI: 00:16.0: enabled 1
819 20:06:53.472867 PCI: 00:16.1: enabled 0
820 20:06:53.476657 PCI: 00:16.2: enabled 0
821 20:06:53.479563 PCI: 00:16.3: enabled 0
822 20:06:53.482953 PCI: 00:16.4: enabled 0
823 20:06:53.483037 PCI: 00:16.5: enabled 0
824 20:06:53.486625 PCI: 00:17.0: enabled 1
825 20:06:53.490640 PCI: 00:19.0: enabled 0
826 20:06:53.490725 PCI: 00:19.1: enabled 1
827 20:06:53.494718 I2C: 00:15: enabled 1
828 20:06:53.497999 PCI: 00:19.2: enabled 0
829 20:06:53.501103 PCI: 00:1d.0: enabled 1
830 20:06:53.501187 GENERIC: 0.0: enabled 1
831 20:06:53.504439
832 20:06:53.504526 PCI: 00:1e.0: enabled 1
833 20:06:53.507579 PCI: 00:1e.1: enabled 0
834 20:06:53.511070 PCI: 00:1e.2: enabled 1
835 20:06:53.514399 SPI: 00: enabled 1
836 20:06:53.514484 PCI: 00:1e.3: enabled 1
837 20:06:53.517456 SPI: 00: enabled 1
838 20:06:53.520913 PCI: 00:1f.0: enabled 1
839 20:06:53.524398 PNP: 0c09.0: enabled 1
840 20:06:53.524483 PCI: 00:1f.1: enabled 0
841 20:06:53.527489 PCI: 00:1f.2: enabled 1
842 20:06:53.531058 GENERIC: 0.0: enabled 1
843 20:06:53.534153 GENERIC: 0.0: enabled 1
844 20:06:53.585792 GENERIC: 1.0: enabled 1
845 20:06:53.585881 PCI: 00:1f.3: enabled 1
846 20:06:53.585947 PCI: 00:1f.4: enabled 0
847 20:06:53.586008 PCI: 00:1f.5: enabled 1
848 20:06:53.586068 PCI: 00:1f.6: enabled 0
849 20:06:53.586316 PCI: 00:1f.7: enabled 0
850 20:06:53.586380 CPU_CLUSTER: 0: enabled 1
851 20:06:53.586773 APIC: 00: enabled 1
852 20:06:53.586858 APIC: 01: enabled 1
853 20:06:53.586923 APIC: 03: enabled 1
854 20:06:53.587172 APIC: 06: enabled 1
855 20:06:53.587237 APIC: 05: enabled 1
856 20:06:53.587297 APIC: 04: enabled 1
857 20:06:53.587539 APIC: 02: enabled 1
858 20:06:53.587601 APIC: 07: enabled 1
859 20:06:53.587659 Root Device scanning...
860 20:06:53.587898 scan_static_bus for Root Device
861 20:06:53.587960 DOMAIN: 0000 enabled
862 20:06:53.588018 CPU_CLUSTER: 0 enabled
863 20:06:53.588074 DOMAIN: 0000 scanning...
864 20:06:53.592921 PCI: pci_scan_bus for bus 00
865 20:06:53.593006 PCI: 00:00.0 [8086/0000] ops
866 20:06:53.596432 PCI: 00:00.0 [8086/9a12] enabled
867 20:06:53.596516 PCI: 00:02.0 [8086/0000] bus ops
868 20:06:53.599702 PCI: 00:02.0 [8086/9a40] enabled
869 20:06:53.603192 PCI: 00:04.0 [8086/0000] bus ops
870 20:06:53.605912 PCI: 00:04.0 [8086/9a03] enabled
871 20:06:53.609550 PCI: 00:05.0 [8086/9a19] enabled
872 20:06:53.613134 PCI: 00:07.0 [0000/0000] hidden
873 20:06:53.616019 PCI: 00:08.0 [8086/9a11] enabled
874 20:06:53.619417 PCI: 00:0a.0 [8086/9a0d] disabled
875 20:06:53.623092
876 20:06:53.623177 PCI: 00:0d.0 [8086/0000] bus ops
877 20:06:53.626155
878 20:06:53.626239 PCI: 00:0d.0 [8086/9a13] enabled
879 20:06:53.629674
880 20:06:53.633255 PCI: 00:14.0 [8086/0000] bus ops
881 20:06:53.635892 PCI: 00:14.0 [8086/a0ed] enabled
882 20:06:53.639293 PCI: 00:14.2 [8086/a0ef] enabled
883 20:06:53.642638 PCI: 00:14.3 [8086/0000] bus ops
884 20:06:53.645944 PCI: 00:14.3 [8086/a0f0] enabled
885 20:06:53.649324 PCI: 00:15.0 [8086/0000] bus ops
886 20:06:53.652821 PCI: 00:15.0 [8086/a0e8] enabled
887 20:06:53.656236 PCI: 00:15.1 [8086/0000] bus ops
888 20:06:53.659618 PCI: 00:15.1 [8086/a0e9] enabled
889 20:06:53.662644 PCI: 00:15.2 [8086/0000] bus ops
890 20:06:53.666111 PCI: 00:15.2 [8086/a0ea] enabled
891 20:06:53.669367 PCI: 00:15.3 [8086/0000] bus ops
892 20:06:53.672495 PCI: 00:15.3 [8086/a0eb] enabled
893 20:06:53.672582 PCI: 00:16.0 [8086/0000] ops
894 20:06:53.675993 PCI: 00:16.0 [8086/a0e0] enabled
895 20:06:53.682816 PCI: Static device PCI: 00:17.0 not found, disabling it.
896 20:06:53.686244 PCI: 00:19.0 [8086/0000] bus ops
897 20:06:53.689351 PCI: 00:19.0 [8086/a0c5] disabled
898 20:06:53.692593 PCI: 00:19.1 [8086/0000] bus ops
899 20:06:53.695706 PCI: 00:19.1 [8086/a0c6] enabled
900 20:06:53.699102 PCI: 00:1d.0 [8086/0000] bus ops
901 20:06:53.702669 PCI: 00:1d.0 [8086/a0b0] enabled
902 20:06:53.705888 PCI: 00:1e.0 [8086/0000] ops
903 20:06:53.709256 PCI: 00:1e.0 [8086/a0a8] enabled
904 20:06:53.712556 PCI: 00:1e.2 [8086/0000] bus ops
905 20:06:53.715941 PCI: 00:1e.2 [8086/a0aa] enabled
906 20:06:53.719306 PCI: 00:1e.3 [8086/0000] bus ops
907 20:06:53.722729 PCI: 00:1e.3 [8086/a0ab] enabled
908 20:06:53.725847 PCI: 00:1f.0 [8086/0000] bus ops
909 20:06:53.728946 PCI: 00:1f.0 [8086/a087] enabled
910 20:06:53.729030 RTC Init
911 20:06:53.732588 Set power on after power failure.
912 20:06:53.735748
913 20:06:53.735861 Disabling Deep S3
914 20:06:53.739003 Disabling Deep S3
915 20:06:53.739087 Disabling Deep S4
916 20:06:53.742384 Disabling Deep S4
917 20:06:53.742472 Disabling Deep S5
918 20:06:53.746113 Disabling Deep S5
919 20:06:53.749545 PCI: 00:1f.2 [0000/0000] hidden
920 20:06:53.752311 PCI: 00:1f.3 [8086/0000] bus ops
921 20:06:53.756084 PCI: 00:1f.3 [8086/a0c8] enabled
922 20:06:53.758922 PCI: 00:1f.5 [8086/0000] bus ops
923 20:06:53.762273 PCI: 00:1f.5 [8086/a0a4] enabled
924 20:06:53.765864 PCI: Leftover static devices:
925 20:06:53.765952 PCI: 00:10.2
926 20:06:53.769332 PCI: 00:10.6
927 20:06:53.769446 PCI: 00:10.7
928 20:06:53.769545 PCI: 00:06.0
929 20:06:53.772172 PCI: 00:07.1
930 20:06:53.772256 PCI: 00:07.2
931 20:06:53.775719 PCI: 00:07.3
932 20:06:53.775803 PCI: 00:09.0
933 20:06:53.778905 PCI: 00:0d.1
934 20:06:53.778996 PCI: 00:0d.2
935 20:06:53.779063 PCI: 00:0d.3
936 20:06:53.782368 PCI: 00:0e.0
937 20:06:53.782452 PCI: 00:12.0
938 20:06:53.785627 PCI: 00:12.6
939 20:06:53.785711 PCI: 00:13.0
940 20:06:53.785776 PCI: 00:14.1
941 20:06:53.789081 PCI: 00:16.1
942 20:06:53.789165 PCI: 00:16.2
943 20:06:53.792388 PCI: 00:16.3
944 20:06:53.792472 PCI: 00:16.4
945 20:06:53.792539 PCI: 00:16.5
946 20:06:53.795686 PCI: 00:17.0
947 20:06:53.795770 PCI: 00:19.2
948 20:06:53.798976 PCI: 00:1e.1
949 20:06:53.799069 PCI: 00:1f.1
950 20:06:53.802274 PCI: 00:1f.4
951 20:06:53.802359 PCI: 00:1f.6
952 20:06:53.802425 PCI: 00:1f.7
953 20:06:53.805896 PCI: Check your devicetree.cb.
954 20:06:53.809139 PCI: 00:02.0 scanning...
955 20:06:53.812596 scan_generic_bus for PCI: 00:02.0
956 20:06:53.815564 scan_generic_bus for PCI: 00:02.0 done
957 20:06:53.822200 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
958 20:06:53.825399 PCI: 00:04.0 scanning...
959 20:06:53.829055 scan_generic_bus for PCI: 00:04.0
960 20:06:53.829139 GENERIC: 0.0 enabled
961 20:06:53.835505 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
962 20:06:53.842601 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
963 20:06:53.842687 PCI: 00:0d.0 scanning...
964 20:06:53.845629 scan_static_bus for PCI: 00:0d.0
965 20:06:53.849104 USB0 port 0 enabled
966 20:06:53.852131 USB0 port 0 scanning...
967 20:06:53.855624 scan_static_bus for USB0 port 0
968 20:06:53.855708 USB3 port 0 enabled
969 20:06:53.858934 USB3 port 1 enabled
970 20:06:53.862262 USB3 port 2 disabled
971 20:06:53.862346 USB3 port 3 disabled
972 20:06:53.865211 USB3 port 0 scanning...
973 20:06:53.868508 scan_static_bus for USB3 port 0
974 20:06:53.872055 scan_static_bus for USB3 port 0 done
975 20:06:53.878865 scan_bus: bus USB3 port 0 finished in 6 msecs
976 20:06:53.878950 USB3 port 1 scanning...
977 20:06:53.882115 scan_static_bus for USB3 port 1
978 20:06:53.885281 scan_static_bus for USB3 port 1 done
979 20:06:53.888878
980 20:06:53.891930 scan_bus: bus USB3 port 1 finished in 6 msecs
981 20:06:53.895169 scan_static_bus for USB0 port 0 done
982 20:06:53.898287 scan_bus: bus USB0 port 0 finished in 43 msecs
983 20:06:53.905106 scan_static_bus for PCI: 00:0d.0 done
984 20:06:53.908572 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
985 20:06:53.912050 PCI: 00:14.0 scanning...
986 20:06:53.914791 scan_static_bus for PCI: 00:14.0
987 20:06:53.914877 USB0 port 0 enabled
988 20:06:53.918233 USB0 port 0 scanning...
989 20:06:53.921601 scan_static_bus for USB0 port 0
990 20:06:53.925019 USB2 port 0 disabled
991 20:06:53.925104 USB2 port 1 enabled
992 20:06:53.928508
993 20:06:53.928594 USB2 port 2 enabled
994 20:06:53.932128 USB2 port 3 disabled
995 20:06:53.932214 USB2 port 4 enabled
996 20:06:53.935189 USB2 port 5 disabled
997 20:06:53.938575 USB2 port 6 disabled
998 20:06:53.938661 USB2 port 7 disabled
999 20:06:53.941560 USB2 port 8 disabled
1000 20:06:53.945363 USB2 port 9 disabled
1001 20:06:53.945492 USB3 port 0 disabled
1002 20:06:53.948496 USB3 port 1 enabled
1003 20:06:53.951893 USB3 port 2 disabled
1004 20:06:53.951978 USB3 port 3 disabled
1005 20:06:53.955180 USB2 port 1 scanning...
1006 20:06:53.958582 scan_static_bus for USB2 port 1
1007 20:06:53.961885 scan_static_bus for USB2 port 1 done
1008 20:06:53.964922 scan_bus: bus USB2 port 1 finished in 6 msecs
1009 20:06:53.968389 USB2 port 2 scanning...
1010 20:06:53.971584 scan_static_bus for USB2 port 2
1011 20:06:53.975212 scan_static_bus for USB2 port 2 done
1012 20:06:53.981549 scan_bus: bus USB2 port 2 finished in 6 msecs
1013 20:06:53.981634 USB2 port 4 scanning...
1014 20:06:53.984868 scan_static_bus for USB2 port 4
1015 20:06:53.991802 scan_static_bus for USB2 port 4 done
1016 20:06:53.994866 scan_bus: bus USB2 port 4 finished in 6 msecs
1017 20:06:53.998762 USB3 port 1 scanning...
1018 20:06:54.001578 scan_static_bus for USB3 port 1
1019 20:06:54.004919 scan_static_bus for USB3 port 1 done
1020 20:06:54.008335 scan_bus: bus USB3 port 1 finished in 6 msecs
1021 20:06:54.011877 scan_static_bus for USB0 port 0 done
1022 20:06:54.018112 scan_bus: bus USB0 port 0 finished in 93 msecs
1023 20:06:54.021378 scan_static_bus for PCI: 00:14.0 done
1024 20:06:54.024896 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1025 20:06:54.028262 PCI: 00:14.3 scanning...
1026 20:06:54.031727 scan_static_bus for PCI: 00:14.3
1027 20:06:54.034459 GENERIC: 0.0 enabled
1028 20:06:54.038197 scan_static_bus for PCI: 00:14.3 done
1029 20:06:54.041358 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1030 20:06:54.044585
1031 20:06:54.044671 PCI: 00:15.0 scanning...
1032 20:06:54.047837 scan_static_bus for PCI: 00:15.0
1033 20:06:54.051305 I2C: 00:1a enabled
1034 20:06:54.051391 I2C: 00:31 enabled
1035 20:06:54.054681
1036 20:06:54.054767 I2C: 00:32 enabled
1037 20:06:54.058075 scan_static_bus for PCI: 00:15.0 done
1038 20:06:54.064944 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1039 20:06:54.065038 PCI: 00:15.1 scanning...
1040 20:06:54.068827 scan_static_bus for PCI: 00:15.1
1041 20:06:54.072124 I2C: 00:10 enabled
1042 20:06:54.075327 scan_static_bus for PCI: 00:15.1 done
1043 20:06:54.078483 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1044 20:06:54.082164 PCI: 00:15.2 scanning...
1045 20:06:54.085660 scan_static_bus for PCI: 00:15.2
1046 20:06:54.088510 scan_static_bus for PCI: 00:15.2 done
1047 20:06:54.095322 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1048 20:06:54.098528 PCI: 00:15.3 scanning...
1049 20:06:54.101622 scan_static_bus for PCI: 00:15.3
1050 20:06:54.105916 scan_static_bus for PCI: 00:15.3 done
1051 20:06:54.108545 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1052 20:06:54.111668 PCI: 00:19.1 scanning...
1053 20:06:54.114929 scan_static_bus for PCI: 00:19.1
1054 20:06:54.118548 I2C: 00:15 enabled
1055 20:06:54.121956 scan_static_bus for PCI: 00:19.1 done
1056 20:06:54.124936 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1057 20:06:54.128598 PCI: 00:1d.0 scanning...
1058 20:06:54.131948 do_pci_scan_bridge for PCI: 00:1d.0
1059 20:06:54.135052 PCI: pci_scan_bus for bus 01
1060 20:06:54.138643 PCI: 01:00.0 [1c5c/174a] enabled
1061 20:06:54.141868 GENERIC: 0.0 enabled
1062 20:06:54.145123 Enabling Common Clock Configuration
1063 20:06:54.148405 L1 Sub-State supported from root port 29
1064 20:06:54.151697 L1 Sub-State Support = 0xf
1065 20:06:54.155045 CommonModeRestoreTime = 0x28
1066 20:06:54.158169 Power On Value = 0x16, Power On Scale = 0x0
1067 20:06:54.161635 ASPM: Enabled L1
1068 20:06:54.165132 PCIe: Max_Payload_Size adjusted to 128
1069 20:06:54.168426 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1070 20:06:54.171470 PCI: 00:1e.2 scanning...
1071 20:06:54.174878 scan_generic_bus for PCI: 00:1e.2
1072 20:06:54.178054 SPI: 00 enabled
1073 20:06:54.181395 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1074 20:06:54.187980 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1075 20:06:54.191555 PCI: 00:1e.3 scanning...
1076 20:06:54.194821 scan_generic_bus for PCI: 00:1e.3
1077 20:06:54.194907 SPI: 00 enabled
1078 20:06:54.201489 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1079 20:06:54.208188 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1080 20:06:54.208268 PCI: 00:1f.0 scanning...
1081 20:06:54.211342 scan_static_bus for PCI: 00:1f.0
1082 20:06:54.214701 PNP: 0c09.0 enabled
1083 20:06:54.218243 PNP: 0c09.0 scanning...
1084 20:06:54.221774 scan_static_bus for PNP: 0c09.0
1085 20:06:54.225037 scan_static_bus for PNP: 0c09.0 done
1086 20:06:54.227930 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1087 20:06:54.231209 scan_static_bus for PCI: 00:1f.0 done
1088 20:06:54.238103 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1089 20:06:54.241125 PCI: 00:1f.2 scanning...
1090 20:06:54.244799 scan_static_bus for PCI: 00:1f.2
1091 20:06:54.244885 GENERIC: 0.0 enabled
1092 20:06:54.247688 GENERIC: 0.0 scanning...
1093 20:06:54.251303 scan_static_bus for GENERIC: 0.0
1094 20:06:54.254553 GENERIC: 0.0 enabled
1095 20:06:54.257944 GENERIC: 1.0 enabled
1096 20:06:54.261292 scan_static_bus for GENERIC: 0.0 done
1097 20:06:54.264477 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1098 20:06:54.268047 scan_static_bus for PCI: 00:1f.2 done
1099 20:06:54.274439 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1100 20:06:54.274524 PCI: 00:1f.3 scanning...
1101 20:06:54.277807 scan_static_bus for PCI: 00:1f.3
1102 20:06:54.284675 scan_static_bus for PCI: 00:1f.3 done
1103 20:06:54.287756 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1104 20:06:54.291420 PCI: 00:1f.5 scanning...
1105 20:06:54.294865 scan_generic_bus for PCI: 00:1f.5
1106 20:06:54.298109 scan_generic_bus for PCI: 00:1f.5 done
1107 20:06:54.301322 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1108 20:06:54.307930 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1109 20:06:54.311503 scan_static_bus for Root Device done
1110 20:06:54.314464 scan_bus: bus Root Device finished in 736 msecs
1111 20:06:54.318051
1112 20:06:54.318137 done
1113 20:06:54.324398 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1114 20:06:54.327816 Chrome EC: UHEPI supported
1115 20:06:54.334460 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 20:06:54.341107 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 20:06:54.344473 SPI flash protection: WPSW=0 SRP0=0
1118 20:06:54.347781 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 20:06:54.354405 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1120 20:06:54.357759 found VGA at PCI: 00:02.0
1121 20:06:54.361307 Setting up VGA for PCI: 00:02.0
1122 20:06:54.364093 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 20:06:54.370938 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 20:06:54.371024 Allocating resources...
1125 20:06:54.374344 Reading resources...
1126 20:06:54.377575 Root Device read_resources bus 0 link: 0
1127 20:06:54.384149 DOMAIN: 0000 read_resources bus 0 link: 0
1128 20:06:54.387516 PCI: 00:04.0 read_resources bus 1 link: 0
1129 20:06:54.394437 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 20:06:54.397600 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 20:06:54.404127 USB0 port 0 read_resources bus 0 link: 0
1132 20:06:54.407524 USB0 port 0 read_resources bus 0 link: 0 done
1133 20:06:54.414346 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 20:06:54.417751 PCI: 00:14.0 read_resources bus 0 link: 0
1135 20:06:54.420796 USB0 port 0 read_resources bus 0 link: 0
1136 20:06:54.427966 USB0 port 0 read_resources bus 0 link: 0 done
1137 20:06:54.431198 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 20:06:54.438211 PCI: 00:14.3 read_resources bus 0 link: 0
1139 20:06:54.441469 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 20:06:54.448412 PCI: 00:15.0 read_resources bus 0 link: 0
1141 20:06:54.451755 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 20:06:54.458269 PCI: 00:15.1 read_resources bus 0 link: 0
1143 20:06:54.461686 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 20:06:54.468708 PCI: 00:19.1 read_resources bus 0 link: 0
1145 20:06:54.471993 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 20:06:54.478736 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 20:06:54.482256 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 20:06:54.488650 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 20:06:54.492947 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 20:06:54.498656 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 20:06:54.501961 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 20:06:54.508701 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 20:06:54.511738 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 20:06:54.515100 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 20:06:54.522078 GENERIC: 0.0 read_resources bus 0 link: 0
1156 20:06:54.525297 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 20:06:54.531768 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 20:06:54.538860 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 20:06:54.541820 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 20:06:54.548287 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 20:06:54.551889 Root Device read_resources bus 0 link: 0 done
1162 20:06:54.554785 Done reading resources.
1163 20:06:54.558166 Show resources in subtree (Root Device)...After reading.
1164 20:06:54.564878 Root Device child on link 0 DOMAIN: 0000
1165 20:06:54.568013 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 20:06:54.578454 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 20:06:54.588404 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 20:06:54.588492 PCI: 00:00.0
1169 20:06:54.598322 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 20:06:54.608005 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 20:06:54.618236 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 20:06:54.627894 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 20:06:54.638206 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 20:06:54.644688 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 20:06:54.654490 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 20:06:54.664423 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 20:06:54.674318 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 20:06:54.684471 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 20:06:54.691358 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 20:06:54.701238 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 20:06:54.711113 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 20:06:54.721000 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 20:06:54.730699 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 20:06:54.741089 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 20:06:54.750517 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 20:06:54.757332 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 20:06:54.767220 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 20:06:54.777288 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 20:06:54.780977 PCI: 00:02.0
1190 20:06:54.790335 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 20:06:54.800737 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 20:06:54.807206 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 20:06:54.813744 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 20:06:54.823603 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 20:06:54.823689 GENERIC: 0.0
1196 20:06:54.827120 PCI: 00:05.0
1197 20:06:54.837238 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 20:06:54.840596 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 20:06:54.844287 GENERIC: 0.0
1200 20:06:54.844373 PCI: 00:08.0
1201 20:06:54.853821 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 20:06:54.857113 PCI: 00:0a.0
1203 20:06:54.860184 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 20:06:54.870884 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 20:06:54.873558 USB0 port 0 child on link 0 USB3 port 0
1206 20:06:54.877037 USB3 port 0
1207 20:06:54.877122 USB3 port 1
1208 20:06:54.880475 USB3 port 2
1209 20:06:54.880559 USB3 port 3
1210 20:06:54.886897 PCI: 00:14.0 child on link 0 USB0 port 0
1211 20:06:54.896951 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 20:06:54.900236 USB0 port 0 child on link 0 USB2 port 0
1213 20:06:54.903427 USB2 port 0
1214 20:06:54.903513 USB2 port 1
1215 20:06:54.906914 USB2 port 2
1216 20:06:54.906999 USB2 port 3
1217 20:06:54.910242 USB2 port 4
1218 20:06:54.910328 USB2 port 5
1219 20:06:54.913620 USB2 port 6
1220 20:06:54.913705 USB2 port 7
1221 20:06:54.917037 USB2 port 8
1222 20:06:54.917122 USB2 port 9
1223 20:06:54.920032 USB3 port 0
1224 20:06:54.923691 USB3 port 1
1225 20:06:54.923780 USB3 port 2
1226 20:06:54.926929 USB3 port 3
1227 20:06:54.927014 PCI: 00:14.2
1228 20:06:54.936511 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 20:06:54.946601 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 20:06:54.949984 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 20:06:54.960243 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 20:06:54.963363 GENERIC: 0.0
1233 20:06:54.966941 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 20:06:54.976514 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 20:06:54.979828 I2C: 00:1a
1236 20:06:54.979914 I2C: 00:31
1237 20:06:54.983114 I2C: 00:32
1238 20:06:54.986523 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 20:06:54.996355 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 20:06:54.996442 I2C: 00:10
1241 20:06:55.000343 PCI: 00:15.2
1242 20:06:55.009767 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 20:06:55.009853 PCI: 00:15.3
1244 20:06:55.019999 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 20:06:55.023056 PCI: 00:16.0
1246 20:06:55.032880 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 20:06:55.032967 PCI: 00:19.0
1248 20:06:55.040018 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 20:06:55.049616 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 20:06:55.049702 I2C: 00:15
1251 20:06:55.056386 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 20:06:55.062819 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 20:06:55.072656 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 20:06:55.082937 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 20:06:55.083027 GENERIC: 0.0
1256 20:06:55.085881 PCI: 01:00.0
1257 20:06:55.095918 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 20:06:55.105836 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1259 20:06:55.115918 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1260 20:06:55.116005 PCI: 00:1e.0
1261 20:06:55.125847 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1262 20:06:55.132970 PCI: 00:1e.2 child on link 0 SPI: 00
1263 20:06:55.142422 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 20:06:55.142508 SPI: 00
1265 20:06:55.145860 PCI: 00:1e.3 child on link 0 SPI: 00
1266 20:06:55.156044 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 20:06:55.158965 SPI: 00
1268 20:06:55.162726 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1269 20:06:55.172481 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1270 20:06:55.172568 PNP: 0c09.0
1271 20:06:55.182713 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1272 20:06:55.185724 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1273 20:06:55.195911 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1274 20:06:55.205651 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1275 20:06:55.209083 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1276 20:06:55.212189 GENERIC: 0.0
1277 20:06:55.212276 GENERIC: 1.0
1278 20:06:55.215413 PCI: 00:1f.3
1279 20:06:55.225713 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1280 20:06:55.235902 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1281 20:06:55.235991 PCI: 00:1f.5
1282 20:06:55.245707 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1283 20:06:55.248721 CPU_CLUSTER: 0 child on link 0 APIC: 00
1284 20:06:55.252393 APIC: 00
1285 20:06:55.252479 APIC: 01
1286 20:06:55.252580 APIC: 03
1287 20:06:55.255257 APIC: 06
1288 20:06:55.255344 APIC: 05
1289 20:06:55.258960 APIC: 04
1290 20:06:55.259046 APIC: 02
1291 20:06:55.259114 APIC: 07
1292 20:06:55.268523 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1293 20:06:55.271983 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1294 20:06:55.278997 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1295 20:06:55.285337 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1296 20:06:55.288434 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1297 20:06:55.295476 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1298 20:06:55.298548 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1299 20:06:55.305146 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1300 20:06:55.312194 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1301 20:06:55.321940 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1302 20:06:55.328468 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1303 20:06:55.335311 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1304 20:06:55.341780 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1305 20:06:55.348172 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1306 20:06:55.355099 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1307 20:06:55.358452 DOMAIN: 0000: Resource ranges:
1308 20:06:55.361647 * Base: 1000, Size: 800, Tag: 100
1309 20:06:55.368387 * Base: 1900, Size: e700, Tag: 100
1310 20:06:55.371517 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1311 20:06:55.378381 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1312 20:06:55.385051 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1313 20:06:55.395075 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1314 20:06:55.401370 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1315 20:06:55.408163 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1316 20:06:55.415070 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1317 20:06:55.424802 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1318 20:06:55.431550 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1319 20:06:55.438597 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1320 20:06:55.447859 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1321 20:06:55.454642 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1322 20:06:55.461350 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1323 20:06:55.471433 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1324 20:06:55.477909 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1325 20:06:55.484502 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1326 20:06:55.494304 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1327 20:06:55.500939 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1328 20:06:55.507732 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1329 20:06:55.517837 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1330 20:06:55.524170 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1331 20:06:55.530646 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1332 20:06:55.540769 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1333 20:06:55.547373 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1334 20:06:55.554084 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1335 20:06:55.557588 DOMAIN: 0000: Resource ranges:
1336 20:06:55.563955 * Base: 7fc00000, Size: 40400000, Tag: 200
1337 20:06:55.567506 * Base: d0000000, Size: 28000000, Tag: 200
1338 20:06:55.570854 * Base: fa000000, Size: 1000000, Tag: 200
1339 20:06:55.577696 * Base: fb001000, Size: 2fff000, Tag: 200
1340 20:06:55.580642 * Base: fe010000, Size: 2e000, Tag: 200
1341 20:06:55.584020 * Base: fe03f000, Size: d41000, Tag: 200
1342 20:06:55.587779 * Base: fed88000, Size: 8000, Tag: 200
1343 20:06:55.590875 * Base: fed93000, Size: d000, Tag: 200
1344 20:06:55.597142 * Base: feda2000, Size: 1e000, Tag: 200
1345 20:06:55.600669 * Base: fede0000, Size: 1220000, Tag: 200
1346 20:06:55.603658 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1347 20:06:55.607340
1348 20:06:55.614062 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1349 20:06:55.620495 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1350 20:06:55.626918 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1351 20:06:55.633523 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1352 20:06:55.640499 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1353 20:06:55.647116 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1354 20:06:55.653384 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1355 20:06:55.660227 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1356 20:06:55.666746 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1357 20:06:55.673316 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1358 20:06:55.680325 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1359 20:06:55.686934 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1360 20:06:55.693838 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1361 20:06:55.700168 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1362 20:06:55.706743 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1363 20:06:55.713323 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1364 20:06:55.720107 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1365 20:06:55.726530 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1366 20:06:55.733302 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1367 20:06:55.739806 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1368 20:06:55.746748 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1369 20:06:55.753252 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1370 20:06:55.759804 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1371 20:06:55.766643 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1372 20:06:55.769665 PCI: 00:1d.0: Resource ranges:
1373 20:06:55.773035 * Base: 7fc00000, Size: 100000, Tag: 200
1374 20:06:55.779849 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1375 20:06:55.786088 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1376 20:06:55.792882 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1377 20:06:55.802973 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1378 20:06:55.809777 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1379 20:06:55.813128 Root Device assign_resources, bus 0 link: 0
1380 20:06:55.815943
1381 20:06:55.819460 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 20:06:55.826088 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1383 20:06:55.836094 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1384 20:06:55.842712 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1385 20:06:55.852490 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1386 20:06:55.856075 PCI: 00:04.0 assign_resources, bus 1 link: 0
1387 20:06:55.862403 PCI: 00:04.0 assign_resources, bus 1 link: 0
1388 20:06:55.869323 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1389 20:06:55.879321 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1390 20:06:55.885869 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1391 20:06:55.889239 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1392 20:06:55.895828 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1393 20:06:55.902547 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1394 20:06:55.908955 PCI: 00:14.0 assign_resources, bus 0 link: 0
1395 20:06:55.912145 PCI: 00:14.0 assign_resources, bus 0 link: 0
1396 20:06:55.922343 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1397 20:06:55.928814 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1398 20:06:55.935790 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1399 20:06:55.938710
1400 20:06:55.942130 PCI: 00:14.3 assign_resources, bus 0 link: 0
1401 20:06:55.945201 PCI: 00:14.3 assign_resources, bus 0 link: 0
1402 20:06:55.955541 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1403 20:06:55.958492 PCI: 00:15.0 assign_resources, bus 0 link: 0
1404 20:06:55.965205 PCI: 00:15.0 assign_resources, bus 0 link: 0
1405 20:06:55.971936 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1406 20:06:55.975253 PCI: 00:15.1 assign_resources, bus 0 link: 0
1407 20:06:55.982445 PCI: 00:15.1 assign_resources, bus 0 link: 0
1408 20:06:55.988818 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1409 20:06:55.998395 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1410 20:06:56.005283 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1411 20:06:56.014884 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1412 20:06:56.018334 PCI: 00:19.1 assign_resources, bus 0 link: 0
1413 20:06:56.025177 PCI: 00:19.1 assign_resources, bus 0 link: 0
1414 20:06:56.031413 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1415 20:06:56.041515 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1416 20:06:56.051759 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1417 20:06:56.055053 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1418 20:06:56.064793 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1419 20:06:56.071540 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1420 20:06:56.078530 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1421 20:06:56.084881 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1422 20:06:56.091830 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1423 20:06:56.098388 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1424 20:06:56.101205 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1425 20:06:56.108072 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1426 20:06:56.111366
1427 20:06:56.114880 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1428 20:06:56.118073 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1429 20:06:56.124831 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1430 20:06:56.128031 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1431 20:06:56.134556 LPC: Trying to open IO window from 800 size 1ff
1432 20:06:56.141296 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1433 20:06:56.151082 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1434 20:06:56.157731 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1435 20:06:56.161684 DOMAIN: 0000 assign_resources, bus 0 link: 0
1436 20:06:56.168461 Root Device assign_resources, bus 0 link: 0
1437 20:06:56.171260 Done setting resources.
1438 20:06:56.174711 Show resources in subtree (Root Device)...After assigning values.
1439 20:06:56.178046
1440 20:06:56.181383 Root Device child on link 0 DOMAIN: 0000
1441 20:06:56.184604 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1442 20:06:56.195028 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1443 20:06:56.204431 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1444 20:06:56.204516 PCI: 00:00.0
1445 20:06:56.214377 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1446 20:06:56.224334 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1447 20:06:56.234154 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1448 20:06:56.244512 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1449 20:06:56.254091 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1450 20:06:56.260705 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1451 20:06:56.270681 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1452 20:06:56.280957 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1453 20:06:56.290529 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1454 20:06:56.300376 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1455 20:06:56.310548 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1456 20:06:56.317449 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1457 20:06:56.327257 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1458 20:06:56.337191 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1459 20:06:56.347091 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1460 20:06:56.356884 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1461 20:06:56.367075 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1462 20:06:56.373700 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1463 20:06:56.383567 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1464 20:06:56.393545 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1465 20:06:56.396596 PCI: 00:02.0
1466 20:06:56.406824 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1467 20:06:56.416632 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1468 20:06:56.426784 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1469 20:06:56.430280 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1470 20:06:56.440072 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1471 20:06:56.443270 GENERIC: 0.0
1472 20:06:56.443355 PCI: 00:05.0
1473 20:06:56.457072 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1474 20:06:56.460650 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1475 20:06:56.460736 GENERIC: 0.0
1476 20:06:56.463097
1477 20:06:56.463181 PCI: 00:08.0
1478 20:06:56.473019 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1479 20:06:56.476482 PCI: 00:0a.0
1480 20:06:56.479726 PCI: 00:0d.0 child on link 0 USB0 port 0
1481 20:06:56.489962 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1482 20:06:56.493600 USB0 port 0 child on link 0 USB3 port 0
1483 20:06:56.496752 USB3 port 0
1484 20:06:56.496837 USB3 port 1
1485 20:06:56.499579 USB3 port 2
1486 20:06:56.503325 USB3 port 3
1487 20:06:56.506517 PCI: 00:14.0 child on link 0 USB0 port 0
1488 20:06:56.516269 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1489 20:06:56.519495 USB0 port 0 child on link 0 USB2 port 0
1490 20:06:56.523030 USB2 port 0
1491 20:06:56.523115 USB2 port 1
1492 20:06:56.526610 USB2 port 2
1493 20:06:56.526698 USB2 port 3
1494 20:06:56.529752 USB2 port 4
1495 20:06:56.529837 USB2 port 5
1496 20:06:56.533083
1497 20:06:56.533167 USB2 port 6
1498 20:06:56.536311 USB2 port 7
1499 20:06:56.536395 USB2 port 8
1500 20:06:56.539492 USB2 port 9
1501 20:06:56.539576 USB3 port 0
1502 20:06:56.543081 USB3 port 1
1503 20:06:56.543165 USB3 port 2
1504 20:06:56.546008 USB3 port 3
1505 20:06:56.546092 PCI: 00:14.2
1506 20:06:56.556095 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1507 20:06:56.566060 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1508 20:06:56.569220
1509 20:06:56.573115 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1510 20:06:56.582704 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1511 20:06:56.582790 GENERIC: 0.0
1512 20:06:56.585978
1513 20:06:56.589102 PCI: 00:15.0 child on link 0 I2C: 00:1a
1514 20:06:56.599621 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1515 20:06:56.599707 I2C: 00:1a
1516 20:06:56.602673 I2C: 00:31
1517 20:06:56.602757 I2C: 00:32
1518 20:06:56.609192 PCI: 00:15.1 child on link 0 I2C: 00:10
1519 20:06:56.619439 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1520 20:06:56.619532 I2C: 00:10
1521 20:06:56.622582 PCI: 00:15.2
1522 20:06:56.632842 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1523 20:06:56.632927 PCI: 00:15.3
1524 20:06:56.642678 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1525 20:06:56.645890 PCI: 00:16.0
1526 20:06:56.655655 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1527 20:06:56.659203 PCI: 00:19.0
1528 20:06:56.662461 PCI: 00:19.1 child on link 0 I2C: 00:15
1529 20:06:56.672795 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1530 20:06:56.672880 I2C: 00:15
1531 20:06:56.679208 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1532 20:06:56.688951 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1533 20:06:56.698747 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1534 20:06:56.708988 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1535 20:06:56.712290 GENERIC: 0.0
1536 20:06:56.712375 PCI: 01:00.0
1537 20:06:56.722100 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1538 20:06:56.735299 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1539 20:06:56.745241 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1540 20:06:56.745327 PCI: 00:1e.0
1541 20:06:56.758683 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1542 20:06:56.761941 PCI: 00:1e.2 child on link 0 SPI: 00
1543 20:06:56.771923 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1544 20:06:56.772010 SPI: 00
1545 20:06:56.778941 PCI: 00:1e.3 child on link 0 SPI: 00
1546 20:06:56.788467 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1547 20:06:56.788554 SPI: 00
1548 20:06:56.791657 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1549 20:06:56.801842 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1550 20:06:56.801928 PNP: 0c09.0
1551 20:06:56.811633 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1552 20:06:56.815078 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1553 20:06:56.825703 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1554 20:06:56.834881 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1555 20:06:56.838398 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1556 20:06:56.841697 GENERIC: 0.0
1557 20:06:56.845153 GENERIC: 1.0
1558 20:06:56.845237 PCI: 00:1f.3
1559 20:06:56.855544 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1560 20:06:56.865082 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1561 20:06:56.868132 PCI: 00:1f.5
1562 20:06:56.878318 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1563 20:06:56.881618 CPU_CLUSTER: 0 child on link 0 APIC: 00
1564 20:06:56.884960 APIC: 00
1565 20:06:56.885046 APIC: 01
1566 20:06:56.885112 APIC: 03
1567 20:06:56.888069 APIC: 06
1568 20:06:56.888154 APIC: 05
1569 20:06:56.888221 APIC: 04
1570 20:06:56.891832
1571 20:06:56.891916 APIC: 02
1572 20:06:56.891981 APIC: 07
1573 20:06:56.894975 Done allocating resources.
1574 20:06:56.901890 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1575 20:06:56.908297 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1576 20:06:56.911541 Configure GPIOs for I2S audio on UP4.
1577 20:06:56.917973 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1578 20:06:56.921373 Enabling resources...
1579 20:06:56.924717 PCI: 00:00.0 subsystem <- 8086/9a12
1580 20:06:56.927942 PCI: 00:00.0 cmd <- 06
1581 20:06:56.931318 PCI: 00:02.0 subsystem <- 8086/9a40
1582 20:06:56.931401 PCI: 00:02.0 cmd <- 03
1583 20:06:56.938158 PCI: 00:04.0 subsystem <- 8086/9a03
1584 20:06:56.938241 PCI: 00:04.0 cmd <- 02
1585 20:06:56.941714 PCI: 00:05.0 subsystem <- 8086/9a19
1586 20:06:56.944697 PCI: 00:05.0 cmd <- 02
1587 20:06:56.947923 PCI: 00:08.0 subsystem <- 8086/9a11
1588 20:06:56.951465 PCI: 00:08.0 cmd <- 06
1589 20:06:56.955023 PCI: 00:0d.0 subsystem <- 8086/9a13
1590 20:06:56.958115 PCI: 00:0d.0 cmd <- 02
1591 20:06:56.961380 PCI: 00:14.0 subsystem <- 8086/a0ed
1592 20:06:56.964855 PCI: 00:14.0 cmd <- 02
1593 20:06:56.967720 PCI: 00:14.2 subsystem <- 8086/a0ef
1594 20:06:56.971187 PCI: 00:14.2 cmd <- 02
1595 20:06:56.974526 PCI: 00:14.3 subsystem <- 8086/a0f0
1596 20:06:56.977563 PCI: 00:14.3 cmd <- 02
1597 20:06:56.980954 PCI: 00:15.0 subsystem <- 8086/a0e8
1598 20:06:56.981036 PCI: 00:15.0 cmd <- 02
1599 20:06:56.987945 PCI: 00:15.1 subsystem <- 8086/a0e9
1600 20:06:56.988028 PCI: 00:15.1 cmd <- 02
1601 20:06:56.991114 PCI: 00:15.2 subsystem <- 8086/a0ea
1602 20:06:56.994707 PCI: 00:15.2 cmd <- 02
1603 20:06:56.998143 PCI: 00:15.3 subsystem <- 8086/a0eb
1604 20:06:57.001385 PCI: 00:15.3 cmd <- 02
1605 20:06:57.004585 PCI: 00:16.0 subsystem <- 8086/a0e0
1606 20:06:57.007546 PCI: 00:16.0 cmd <- 02
1607 20:06:57.010964 PCI: 00:19.1 subsystem <- 8086/a0c6
1608 20:06:57.014264 PCI: 00:19.1 cmd <- 02
1609 20:06:57.017656 PCI: 00:1d.0 bridge ctrl <- 0013
1610 20:06:57.021203 PCI: 00:1d.0 subsystem <- 8086/a0b0
1611 20:06:57.024493 PCI: 00:1d.0 cmd <- 06
1612 20:06:57.027411 PCI: 00:1e.0 subsystem <- 8086/a0a8
1613 20:06:57.031055 PCI: 00:1e.0 cmd <- 06
1614 20:06:57.034136 PCI: 00:1e.2 subsystem <- 8086/a0aa
1615 20:06:57.034218 PCI: 00:1e.2 cmd <- 06
1616 20:06:57.040853 PCI: 00:1e.3 subsystem <- 8086/a0ab
1617 20:06:57.040940 PCI: 00:1e.3 cmd <- 02
1618 20:06:57.044433 PCI: 00:1f.0 subsystem <- 8086/a087
1619 20:06:57.047449 PCI: 00:1f.0 cmd <- 407
1620 20:06:57.051027 PCI: 00:1f.3 subsystem <- 8086/a0c8
1621 20:06:57.054566 PCI: 00:1f.3 cmd <- 02
1622 20:06:57.057788 PCI: 00:1f.5 subsystem <- 8086/a0a4
1623 20:06:57.060638 PCI: 00:1f.5 cmd <- 406
1624 20:06:57.065451 PCI: 01:00.0 cmd <- 02
1625 20:06:57.069535 done.
1626 20:06:57.072678 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1627 20:06:57.076211 Initializing devices...
1628 20:06:57.079714 Root Device init
1629 20:06:57.082913 Chrome EC: Set SMI mask to 0x0000000000000000
1630 20:06:57.089903 Chrome EC: clear events_b mask to 0x0000000000000000
1631 20:06:57.096483 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1632 20:06:57.102533 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1633 20:06:57.109311 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1634 20:06:57.112887 Chrome EC: Set WAKE mask to 0x0000000000000000
1635 20:06:57.120681 fw_config match found: DB_USB=USB3_ACTIVE
1636 20:06:57.124398 Configure Right Type-C port orientation for retimer
1637 20:06:57.127378 Root Device init finished in 46 msecs
1638 20:06:57.131506 PCI: 00:00.0 init
1639 20:06:57.134767 CPU TDP = 9 Watts
1640 20:06:57.134851 CPU PL1 = 9 Watts
1641 20:06:57.138013 CPU PL2 = 40 Watts
1642 20:06:57.141036 CPU PL4 = 83 Watts
1643 20:06:57.144375 PCI: 00:00.0 init finished in 8 msecs
1644 20:06:57.144460 PCI: 00:02.0 init
1645 20:06:57.147800 GMA: Found VBT in CBFS
1646 20:06:57.151137 GMA: Found valid VBT in CBFS
1647 20:06:57.157984 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1648 20:06:57.164552 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1649 20:06:57.167954 PCI: 00:02.0 init finished in 18 msecs
1650 20:06:57.171422 PCI: 00:05.0 init
1651 20:06:57.174334 PCI: 00:05.0 init finished in 0 msecs
1652 20:06:57.177943 PCI: 00:08.0 init
1653 20:06:57.180888 PCI: 00:08.0 init finished in 0 msecs
1654 20:06:57.184592 PCI: 00:14.0 init
1655 20:06:57.187520 PCI: 00:14.0 init finished in 0 msecs
1656 20:06:57.191326 PCI: 00:14.2 init
1657 20:06:57.194383 PCI: 00:14.2 init finished in 0 msecs
1658 20:06:57.197684 PCI: 00:15.0 init
1659 20:06:57.197769 I2C bus 0 version 0x3230302a
1660 20:06:57.200844
1661 20:06:57.204392 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1662 20:06:57.207542 PCI: 00:15.0 init finished in 6 msecs
1663 20:06:57.207627 PCI: 00:15.1 init
1664 20:06:57.210868 I2C bus 1 version 0x3230302a
1665 20:06:57.214410 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1666 20:06:57.220579 PCI: 00:15.1 init finished in 6 msecs
1667 20:06:57.220664 PCI: 00:15.2 init
1668 20:06:57.224084 I2C bus 2 version 0x3230302a
1669 20:06:57.227147 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1670 20:06:57.230935 PCI: 00:15.2 init finished in 6 msecs
1671 20:06:57.234013 PCI: 00:15.3 init
1672 20:06:57.237134 I2C bus 3 version 0x3230302a
1673 20:06:57.240613 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1674 20:06:57.244126 PCI: 00:15.3 init finished in 6 msecs
1675 20:06:57.247199 PCI: 00:16.0 init
1676 20:06:57.250437 PCI: 00:16.0 init finished in 0 msecs
1677 20:06:57.254104 PCI: 00:19.1 init
1678 20:06:57.257055 I2C bus 5 version 0x3230302a
1679 20:06:57.260697 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1680 20:06:57.263925 PCI: 00:19.1 init finished in 6 msecs
1681 20:06:57.264011 PCI: 00:1d.0 init
1682 20:06:57.267300
1683 20:06:57.267385 Initializing PCH PCIe bridge.
1684 20:06:57.273726 PCI: 00:1d.0 init finished in 3 msecs
1685 20:06:57.273815 PCI: 00:1f.0 init
1686 20:06:57.277238
1687 20:06:57.280407 IOAPIC: Initializing IOAPIC at 0xfec00000
1688 20:06:57.283921 IOAPIC: Bootstrap Processor Local APIC = 0x00
1689 20:06:57.287057 IOAPIC: ID = 0x02
1690 20:06:57.290241 IOAPIC: Dumping registers
1691 20:06:57.290326 reg 0x0000: 0x02000000
1692 20:06:57.293815 reg 0x0001: 0x00770020
1693 20:06:57.297408 reg 0x0002: 0x00000000
1694 20:06:57.300715 PCI: 00:1f.0 init finished in 21 msecs
1695 20:06:57.303802 PCI: 00:1f.2 init
1696 20:06:57.303887 Disabling ACPI via APMC.
1697 20:06:57.307236
1698 20:06:57.307321 APMC done.
1699 20:06:57.310699 PCI: 00:1f.2 init finished in 5 msecs
1700 20:06:57.324145 PCI: 01:00.0 init
1701 20:06:57.327546 PCI: 01:00.0 init finished in 0 msecs
1702 20:06:57.331098 PNP: 0c09.0 init
1703 20:06:57.333874 Google Chrome EC uptime: 8.404 seconds
1704 20:06:57.340640 Google Chrome AP resets since EC boot: 1
1705 20:06:57.343738 Google Chrome most recent AP reset causes:
1706 20:06:57.347266 0.348: 32775 shutdown: entering G3
1707 20:06:57.353927 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1708 20:06:57.357238 PNP: 0c09.0 init finished in 22 msecs
1709 20:06:57.362708 Devices initialized
1710 20:06:57.366163 Show all devs... After init.
1711 20:06:57.369243 Root Device: enabled 1
1712 20:06:57.369327 DOMAIN: 0000: enabled 1
1713 20:06:57.372651 CPU_CLUSTER: 0: enabled 1
1714 20:06:57.376077 PCI: 00:00.0: enabled 1
1715 20:06:57.379134 PCI: 00:02.0: enabled 1
1716 20:06:57.379219 PCI: 00:04.0: enabled 1
1717 20:06:57.382804 PCI: 00:05.0: enabled 1
1718 20:06:57.386007 PCI: 00:06.0: enabled 0
1719 20:06:57.389526 PCI: 00:07.0: enabled 0
1720 20:06:57.389611 PCI: 00:07.1: enabled 0
1721 20:06:57.392721 PCI: 00:07.2: enabled 0
1722 20:06:57.396173 PCI: 00:07.3: enabled 0
1723 20:06:57.399131 PCI: 00:08.0: enabled 1
1724 20:06:57.399216 PCI: 00:09.0: enabled 0
1725 20:06:57.403301 PCI: 00:0a.0: enabled 0
1726 20:06:57.406037 PCI: 00:0d.0: enabled 1
1727 20:06:57.409291 PCI: 00:0d.1: enabled 0
1728 20:06:57.409431 PCI: 00:0d.2: enabled 0
1729 20:06:57.412329 PCI: 00:0d.3: enabled 0
1730 20:06:57.415814 PCI: 00:0e.0: enabled 0
1731 20:06:57.415900 PCI: 00:10.2: enabled 1
1732 20:06:57.419099
1733 20:06:57.419185 PCI: 00:10.6: enabled 0
1734 20:06:57.422294 PCI: 00:10.7: enabled 0
1735 20:06:57.425908 PCI: 00:12.0: enabled 0
1736 20:06:57.425993 PCI: 00:12.6: enabled 0
1737 20:06:57.429160 PCI: 00:13.0: enabled 0
1738 20:06:57.432277 PCI: 00:14.0: enabled 1
1739 20:06:57.435722 PCI: 00:14.1: enabled 0
1740 20:06:57.435807 PCI: 00:14.2: enabled 1
1741 20:06:57.438931 PCI: 00:14.3: enabled 1
1742 20:06:57.442506 PCI: 00:15.0: enabled 1
1743 20:06:57.445866 PCI: 00:15.1: enabled 1
1744 20:06:57.445951 PCI: 00:15.2: enabled 1
1745 20:06:57.449010 PCI: 00:15.3: enabled 1
1746 20:06:57.452458 PCI: 00:16.0: enabled 1
1747 20:06:57.456130 PCI: 00:16.1: enabled 0
1748 20:06:57.456215 PCI: 00:16.2: enabled 0
1749 20:06:57.459221 PCI: 00:16.3: enabled 0
1750 20:06:57.462263 PCI: 00:16.4: enabled 0
1751 20:06:57.462348 PCI: 00:16.5: enabled 0
1752 20:06:57.465684 PCI: 00:17.0: enabled 0
1753 20:06:57.469164 PCI: 00:19.0: enabled 0
1754 20:06:57.472224 PCI: 00:19.1: enabled 1
1755 20:06:57.472309 PCI: 00:19.2: enabled 0
1756 20:06:57.475485 PCI: 00:1c.0: enabled 1
1757 20:06:57.478724 PCI: 00:1c.1: enabled 0
1758 20:06:57.481889 PCI: 00:1c.2: enabled 0
1759 20:06:57.481974 PCI: 00:1c.3: enabled 0
1760 20:06:57.486225 PCI: 00:1c.4: enabled 0
1761 20:06:57.489095 PCI: 00:1c.5: enabled 0
1762 20:06:57.492336 PCI: 00:1c.6: enabled 1
1763 20:06:57.492421 PCI: 00:1c.7: enabled 0
1764 20:06:57.495399 PCI: 00:1d.0: enabled 1
1765 20:06:57.499069 PCI: 00:1d.1: enabled 0
1766 20:06:57.499154 PCI: 00:1d.2: enabled 1
1767 20:06:57.502272
1768 20:06:57.502358 PCI: 00:1d.3: enabled 0
1769 20:06:57.505233 PCI: 00:1e.0: enabled 1
1770 20:06:57.508896 PCI: 00:1e.1: enabled 0
1771 20:06:57.508982 PCI: 00:1e.2: enabled 1
1772 20:06:57.511867 PCI: 00:1e.3: enabled 1
1773 20:06:57.515427 PCI: 00:1f.0: enabled 1
1774 20:06:57.518963 PCI: 00:1f.1: enabled 0
1775 20:06:57.519048 PCI: 00:1f.2: enabled 1
1776 20:06:57.521950 PCI: 00:1f.3: enabled 1
1777 20:06:57.525322 PCI: 00:1f.4: enabled 0
1778 20:06:57.528564 PCI: 00:1f.5: enabled 1
1779 20:06:57.528649 PCI: 00:1f.6: enabled 0
1780 20:06:57.532137 PCI: 00:1f.7: enabled 0
1781 20:06:57.535154 APIC: 00: enabled 1
1782 20:06:57.535239 GENERIC: 0.0: enabled 1
1783 20:06:57.538816 GENERIC: 0.0: enabled 1
1784 20:06:57.542080 GENERIC: 1.0: enabled 1
1785 20:06:57.544982 GENERIC: 0.0: enabled 1
1786 20:06:57.545067 GENERIC: 1.0: enabled 1
1787 20:06:57.548640 USB0 port 0: enabled 1
1788 20:06:57.551469 GENERIC: 0.0: enabled 1
1789 20:06:57.554788 USB0 port 0: enabled 1
1790 20:06:57.554873 GENERIC: 0.0: enabled 1
1791 20:06:57.558258 I2C: 00:1a: enabled 1
1792 20:06:57.561974 I2C: 00:31: enabled 1
1793 20:06:57.562060 I2C: 00:32: enabled 1
1794 20:06:57.565085 I2C: 00:10: enabled 1
1795 20:06:57.568632 I2C: 00:15: enabled 1
1796 20:06:57.568718 GENERIC: 0.0: enabled 0
1797 20:06:57.571566 GENERIC: 1.0: enabled 0
1798 20:06:57.574947 GENERIC: 0.0: enabled 1
1799 20:06:57.575033 SPI: 00: enabled 1
1800 20:06:57.578231 SPI: 00: enabled 1
1801 20:06:57.581346 PNP: 0c09.0: enabled 1
1802 20:06:57.581472 GENERIC: 0.0: enabled 1
1803 20:06:57.585561
1804 20:06:57.585651 USB3 port 0: enabled 1
1805 20:06:57.588249 USB3 port 1: enabled 1
1806 20:06:57.591258 USB3 port 2: enabled 0
1807 20:06:57.591344 USB3 port 3: enabled 0
1808 20:06:57.594891 USB2 port 0: enabled 0
1809 20:06:57.598289 USB2 port 1: enabled 1
1810 20:06:57.598375 USB2 port 2: enabled 1
1811 20:06:57.601726 USB2 port 3: enabled 0
1812 20:06:57.604895 USB2 port 4: enabled 1
1813 20:06:57.608326 USB2 port 5: enabled 0
1814 20:06:57.608438 USB2 port 6: enabled 0
1815 20:06:57.611552 USB2 port 7: enabled 0
1816 20:06:57.614782 USB2 port 8: enabled 0
1817 20:06:57.614868 USB2 port 9: enabled 0
1818 20:06:57.618327 USB3 port 0: enabled 0
1819 20:06:57.621797 USB3 port 1: enabled 1
1820 20:06:57.621882 USB3 port 2: enabled 0
1821 20:06:57.624599
1822 20:06:57.624684 USB3 port 3: enabled 0
1823 20:06:57.627824 GENERIC: 0.0: enabled 1
1824 20:06:57.631304 GENERIC: 1.0: enabled 1
1825 20:06:57.631389 APIC: 01: enabled 1
1826 20:06:57.634782 APIC: 03: enabled 1
1827 20:06:57.637893 APIC: 06: enabled 1
1828 20:06:57.637979 APIC: 05: enabled 1
1829 20:06:57.641265 APIC: 04: enabled 1
1830 20:06:57.641350 APIC: 02: enabled 1
1831 20:06:57.644574 APIC: 07: enabled 1
1832 20:06:57.647899 PCI: 01:00.0: enabled 1
1833 20:06:57.651058 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1834 20:06:57.658052 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1835 20:06:57.660994 ELOG: NV offset 0xf30000 size 0x1000
1836 20:06:57.667974 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1837 20:06:57.674965 ELOG: Event(17) added with size 13 at 2022-12-19 20:06:56 UTC
1838 20:06:57.681488 ELOG: Event(92) added with size 9 at 2022-12-19 20:06:56 UTC
1839 20:06:57.688112 ELOG: Event(93) added with size 9 at 2022-12-19 20:06:56 UTC
1840 20:06:57.694616 ELOG: Event(9E) added with size 10 at 2022-12-19 20:06:56 UTC
1841 20:06:57.701269 ELOG: Event(9F) added with size 14 at 2022-12-19 20:06:56 UTC
1842 20:06:57.707708 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1843 20:06:57.710924 ELOG: Event(A1) added with size 10 at 2022-12-19 20:06:56 UTC
1844 20:06:57.717609 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1845 20:06:57.724452 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1846 20:06:57.727590 Finalize devices...
1847 20:06:57.727676 Devices finalized
1848 20:06:57.734225 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1849 20:06:57.738142 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1850 20:06:57.740573
1851 20:06:57.744182 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1852 20:06:57.751018 ME: HFSTS1 : 0x80030055
1853 20:06:57.753976 ME: HFSTS2 : 0x30280116
1854 20:06:57.757717 ME: HFSTS3 : 0x00000050
1855 20:06:57.764251 ME: HFSTS4 : 0x00004000
1856 20:06:57.767551 ME: HFSTS5 : 0x00000000
1857 20:06:57.770782 ME: HFSTS6 : 0x00400006
1858 20:06:57.777456 ME: Manufacturing Mode : YES
1859 20:06:57.780812 ME: SPI Protection Mode Enabled : NO
1860 20:06:57.783851 ME: FW Partition Table : OK
1861 20:06:57.787101 ME: Bringup Loader Failure : NO
1862 20:06:57.790470 ME: Firmware Init Complete : NO
1863 20:06:57.793768 ME: Boot Options Present : NO
1864 20:06:57.797032 ME: Update In Progress : NO
1865 20:06:57.800734 ME: D0i3 Support : YES
1866 20:06:57.807120 ME: Low Power State Enabled : NO
1867 20:06:57.810533 ME: CPU Replaced : YES
1868 20:06:57.813960 ME: CPU Replacement Valid : YES
1869 20:06:57.817400 ME: Current Working State : 5
1870 20:06:57.820358 ME: Current Operation State : 1
1871 20:06:57.823724 ME: Current Operation Mode : 3
1872 20:06:57.827178 ME: Error Code : 0
1873 20:06:57.830300 ME: Enhanced Debug Mode : NO
1874 20:06:57.833581 ME: CPU Debug Disabled : YES
1875 20:06:57.841027 ME: TXT Support : NO
1876 20:06:57.843544 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1877 20:06:57.853535 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1878 20:06:57.857176 CBFS: 'fallback/slic' not found.
1879 20:06:57.860538 ACPI: Writing ACPI tables at 76b01000.
1880 20:06:57.860616 ACPI: * FACS
1881 20:06:57.863629 ACPI: * DSDT
1882 20:06:57.867162 Ramoops buffer: 0x100000@0x76a00000.
1883 20:06:57.870307 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1884 20:06:57.877683 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1885 20:06:57.880129 Google Chrome EC: version:
1886 20:06:57.883737 ro: voema_v2.0.7540-147f8d37d1
1887 20:06:57.887037 rw: voema_v2.0.7540-147f8d37d1
1888 20:06:57.887112 running image: 2
1889 20:06:57.893552 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1890 20:06:57.898411 ACPI: * FADT
1891 20:06:57.898489 SCI is IRQ9
1892 20:06:57.901754 ACPI: added table 1/32, length now 40
1893 20:06:57.905534
1894 20:06:57.905607 ACPI: * SSDT
1895 20:06:57.908828 Found 1 CPU(s) with 8 core(s) each.
1896 20:06:57.915045 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1897 20:06:57.918536 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1898 20:06:57.921925 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1899 20:06:57.924975 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1900 20:06:57.932112 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1901 20:06:57.938689 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1902 20:06:57.941822 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1903 20:06:57.948320 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1904 20:06:57.954990 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1905 20:06:57.958471 \_SB.PCI0.RP09: Added StorageD3Enable property
1906 20:06:57.962125 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1907 20:06:57.968381 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1908 20:06:57.974908 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1909 20:06:57.978140 PS2K: Passing 80 keymaps to kernel
1910 20:06:57.984791 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1911 20:06:57.991457 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1912 20:06:57.998015 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1913 20:06:58.004609 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1914 20:06:58.012031 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1915 20:06:58.018221 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1916 20:06:58.024955 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1917 20:06:58.031548 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1918 20:06:58.034797 ACPI: added table 2/32, length now 44
1919 20:06:58.034882 ACPI: * MCFG
1920 20:06:58.038172
1921 20:06:58.041323 ACPI: added table 3/32, length now 48
1922 20:06:58.041407 ACPI: * TPM2
1923 20:06:58.044534 TPM2 log created at 0x769f0000
1924 20:06:58.048020 ACPI: added table 4/32, length now 52
1925 20:06:58.051407 ACPI: * MADT
1926 20:06:58.051492 SCI is IRQ9
1927 20:06:58.054596 ACPI: added table 5/32, length now 56
1928 20:06:58.057913 current = 76b09850
1929 20:06:58.057997 ACPI: * DMAR
1930 20:06:58.061553 ACPI: added table 6/32, length now 60
1931 20:06:58.064488
1932 20:06:58.067944 ACPI: added table 7/32, length now 64
1933 20:06:58.068029 ACPI: * HPET
1934 20:06:58.071259 ACPI: added table 8/32, length now 68
1935 20:06:58.074513 ACPI: done.
1936 20:06:58.074597 ACPI tables: 35216 bytes.
1937 20:06:58.077934 smbios_write_tables: 769ef000
1938 20:06:58.081312 EC returned error result code 3
1939 20:06:58.084375 Couldn't obtain OEM name from CBI
1940 20:06:58.088563 Create SMBIOS type 16
1941 20:06:58.091636 Create SMBIOS type 17
1942 20:06:58.095060 GENERIC: 0.0 (WIFI Device)
1943 20:06:58.095147 SMBIOS tables: 1750 bytes.
1944 20:06:58.101731 Writing table forward entry at 0x00000500
1945 20:06:58.108206 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1946 20:06:58.111853 Writing coreboot table at 0x76b25000
1947 20:06:58.114839 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1948 20:06:58.118424
1949 20:06:58.121947 1. 0000000000001000-000000000009ffff: RAM
1950 20:06:58.124891 2. 00000000000a0000-00000000000fffff: RESERVED
1951 20:06:58.131436 3. 0000000000100000-00000000769eefff: RAM
1952 20:06:58.134975 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1953 20:06:58.141574 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1954 20:06:58.147975 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1955 20:06:58.151203 7. 0000000077000000-000000007fbfffff: RESERVED
1956 20:06:58.154711 8. 00000000c0000000-00000000cfffffff: RESERVED
1957 20:06:58.161153 9. 00000000f8000000-00000000f9ffffff: RESERVED
1958 20:06:58.164996 10. 00000000fb000000-00000000fb000fff: RESERVED
1959 20:06:58.171161 11. 00000000fe000000-00000000fe00ffff: RESERVED
1960 20:06:58.174471 12. 00000000fed80000-00000000fed87fff: RESERVED
1961 20:06:58.180952 13. 00000000fed90000-00000000fed92fff: RESERVED
1962 20:06:58.184739 14. 00000000feda0000-00000000feda1fff: RESERVED
1963 20:06:58.191237 15. 00000000fedc0000-00000000feddffff: RESERVED
1964 20:06:58.194423 16. 0000000100000000-00000002803fffff: RAM
1965 20:06:58.197593 Passing 4 GPIOs to payload:
1966 20:06:58.201587 NAME | PORT | POLARITY | VALUE
1967 20:06:58.207602 lid | undefined | high | high
1968 20:06:58.211047 power | undefined | high | low
1969 20:06:58.214232
1970 20:06:58.217836 oprom | undefined | high | low
1971 20:06:58.224230 EC in RW | 0x000000e5 | high | high
1972 20:06:58.231218 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 382a
1973 20:06:58.231292 coreboot table: 1576 bytes.
1974 20:06:58.237808 IMD ROOT 0. 0x76fff000 0x00001000
1975 20:06:58.240981 IMD SMALL 1. 0x76ffe000 0x00001000
1976 20:06:58.244278 FSP MEMORY 2. 0x76c4e000 0x003b0000
1977 20:06:58.247723 VPD 3. 0x76c4d000 0x00000367
1978 20:06:58.250765 RO MCACHE 4. 0x76c4c000 0x00000fdc
1979 20:06:58.254123 CONSOLE 5. 0x76c2c000 0x00020000
1980 20:06:58.257700 FMAP 6. 0x76c2b000 0x00000578
1981 20:06:58.261015 TIME STAMP 7. 0x76c2a000 0x00000910
1982 20:06:58.264107 VBOOT WORK 8. 0x76c16000 0x00014000
1983 20:06:58.267860
1984 20:06:58.270816 ROMSTG STCK 9. 0x76c15000 0x00001000
1985 20:06:58.274188 AFTER CAR 10. 0x76c0a000 0x0000b000
1986 20:06:58.277387 RAMSTAGE 11. 0x76b97000 0x00073000
1987 20:06:58.280867 REFCODE 12. 0x76b42000 0x00055000
1988 20:06:58.284492 SMM BACKUP 13. 0x76b32000 0x00010000
1989 20:06:58.287585 4f444749 14. 0x76b30000 0x00002000
1990 20:06:58.290925 EXT VBT15. 0x76b2d000 0x0000219f
1991 20:06:58.294237 COREBOOT 16. 0x76b25000 0x00008000
1992 20:06:58.297663 ACPI 17. 0x76b01000 0x00024000
1993 20:06:58.304246 ACPI GNVS 18. 0x76b00000 0x00001000
1994 20:06:58.307392 RAMOOPS 19. 0x76a00000 0x00100000
1995 20:06:58.310991 TPM2 TCGLOG20. 0x769f0000 0x00010000
1996 20:06:58.314011 SMBIOS 21. 0x769ef000 0x00000800
1997 20:06:58.317567 IMD small region:
1998 20:06:58.320793 IMD ROOT 0. 0x76ffec00 0x00000400
1999 20:06:58.324082 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2000 20:06:58.327288 POWER STATE 2. 0x76ffeb80 0x00000044
2001 20:06:58.330746 ROMSTAGE 3. 0x76ffeb60 0x00000004
2002 20:06:58.333957 MEM INFO 4. 0x76ffe980 0x000001e0
2003 20:06:58.340812 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
2004 20:06:58.344194 MTRR: Physical address space:
2005 20:06:58.350589 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2006 20:06:58.357004 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2007 20:06:58.363536 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2008 20:06:58.370059 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2009 20:06:58.376949 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2010 20:06:58.380214 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2011 20:06:58.383589
2012 20:06:58.386807 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2013 20:06:58.393741 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 20:06:58.396819 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 20:06:58.400391 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 20:06:58.403346 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 20:06:58.410141 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 20:06:58.413304 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 20:06:58.416447 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 20:06:58.419999 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 20:06:58.426406 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 20:06:58.429957 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 20:06:58.433111 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 20:06:58.436727 call enable_fixed_mtrr()
2025 20:06:58.439877 CPU physical address size: 39 bits
2026 20:06:58.446187 MTRR: default type WB/UC MTRR counts: 6/6.
2027 20:06:58.450006 MTRR: UC selected as default type.
2028 20:06:58.452986 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2029 20:06:58.456488
2030 20:06:58.459686 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2031 20:06:58.466735 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2032 20:06:58.472844 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2033 20:06:58.479807 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2034 20:06:58.486343 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2035 20:06:58.492710 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 20:06:58.496325 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 20:06:58.499667 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 20:06:58.503087 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 20:06:58.506077 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 20:06:58.512721 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 20:06:58.516290 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 20:06:58.519171 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 20:06:58.522453 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 20:06:58.529097 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 20:06:58.532386 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 20:06:58.536021 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 20:06:58.539288 call enable_fixed_mtrr()
2048 20:06:58.542474 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 20:06:58.549749 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 20:06:58.552420 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 20:06:58.556184 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 20:06:58.559151 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 20:06:58.565623 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 20:06:58.569269 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 20:06:58.572641 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 20:06:58.575869 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 20:06:58.582593 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 20:06:58.585427 CPU physical address size: 39 bits
2059 20:06:58.589049 call enable_fixed_mtrr()
2060 20:06:58.592165 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 20:06:58.595629 MTRR: Fixed MSR 0x250 0x0606060606060606
2062 20:06:58.598855
2063 20:06:58.602004 MTRR: Fixed MSR 0x258 0x0606060606060606
2064 20:06:58.605202 MTRR: Fixed MSR 0x259 0x0000000000000000
2065 20:06:58.608796 MTRR: Fixed MSR 0x268 0x0606060606060606
2066 20:06:58.611890 MTRR: Fixed MSR 0x269 0x0606060606060606
2067 20:06:58.615231
2068 20:06:58.618651 MTRR: Fixed MSR 0x26a 0x0606060606060606
2069 20:06:58.621908 MTRR: Fixed MSR 0x26b 0x0606060606060606
2070 20:06:58.625369 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 20:06:58.628766 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 20:06:58.635111 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 20:06:58.638350 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 20:06:58.641978 MTRR: Fixed MSR 0x258 0x0606060606060606
2075 20:06:58.645061 call enable_fixed_mtrr()
2076 20:06:58.648379 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 20:06:58.655082 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 20:06:58.658630 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 20:06:58.661560 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 20:06:58.665134 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 20:06:58.671801 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 20:06:58.674921 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 20:06:58.678615 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 20:06:58.681449 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 20:06:58.685749 CPU physical address size: 39 bits
2086 20:06:58.692495 call enable_fixed_mtrr()
2087 20:06:58.695780 CPU physical address size: 39 bits
2088 20:06:58.699258 MTRR: Fixed MSR 0x250 0x0606060606060606
2089 20:06:58.702380 MTRR: Fixed MSR 0x250 0x0606060606060606
2090 20:06:58.705678 MTRR: Fixed MSR 0x258 0x0606060606060606
2091 20:06:58.712210 MTRR: Fixed MSR 0x259 0x0000000000000000
2092 20:06:58.715827 MTRR: Fixed MSR 0x268 0x0606060606060606
2093 20:06:58.719035 MTRR: Fixed MSR 0x269 0x0606060606060606
2094 20:06:58.722078 MTRR: Fixed MSR 0x26a 0x0606060606060606
2095 20:06:58.725461 MTRR: Fixed MSR 0x26b 0x0606060606060606
2096 20:06:58.728771
2097 20:06:58.732358 MTRR: Fixed MSR 0x26c 0x0606060606060606
2098 20:06:58.735160 MTRR: Fixed MSR 0x26d 0x0606060606060606
2099 20:06:58.738884 MTRR: Fixed MSR 0x26e 0x0606060606060606
2100 20:06:58.742201 MTRR: Fixed MSR 0x26f 0x0606060606060606
2101 20:06:58.748386 MTRR: Fixed MSR 0x258 0x0606060606060606
2102 20:06:58.752298 MTRR: Fixed MSR 0x259 0x0000000000000000
2103 20:06:58.758494 MTRR: Fixed MSR 0x268 0x0606060606060606
2104 20:06:58.761849 MTRR: Fixed MSR 0x269 0x0606060606060606
2105 20:06:58.765443 MTRR: Fixed MSR 0x26a 0x0606060606060606
2106 20:06:58.768816 MTRR: Fixed MSR 0x26b 0x0606060606060606
2107 20:06:58.771848 MTRR: Fixed MSR 0x26c 0x0606060606060606
2108 20:06:58.778548 MTRR: Fixed MSR 0x26d 0x0606060606060606
2109 20:06:58.781619 MTRR: Fixed MSR 0x26e 0x0606060606060606
2110 20:06:58.785005 MTRR: Fixed MSR 0x26f 0x0606060606060606
2111 20:06:58.788510 call enable_fixed_mtrr()
2112 20:06:58.792158 call enable_fixed_mtrr()
2113 20:06:58.795206 MTRR: Fixed MSR 0x250 0x0606060606060606
2114 20:06:58.795291
2115 20:06:58.798550 MTRR check
2116 20:06:58.802211 MTRR: Fixed MSR 0x258 0x0606060606060606
2117 20:06:58.805187 MTRR: Fixed MSR 0x259 0x0000000000000000
2118 20:06:58.808519 MTRR: Fixed MSR 0x268 0x0606060606060606
2119 20:06:58.815095 MTRR: Fixed MSR 0x269 0x0606060606060606
2120 20:06:58.818215 MTRR: Fixed MSR 0x26a 0x0606060606060606
2121 20:06:58.821553 MTRR: Fixed MSR 0x26b 0x0606060606060606
2122 20:06:58.824844 MTRR: Fixed MSR 0x26c 0x0606060606060606
2123 20:06:58.831618 MTRR: Fixed MSR 0x26d 0x0606060606060606
2124 20:06:58.834966 MTRR: Fixed MSR 0x26e 0x0606060606060606
2125 20:06:58.838148 MTRR: Fixed MSR 0x26f 0x0606060606060606
2126 20:06:58.844826 Fixed MTRRs : call enable_fixed_mtrr()
2127 20:06:58.844911 Enabled
2128 20:06:58.848154 Variable MTRRs: Enabled
2129 20:06:58.848238
2130 20:06:58.851489 CPU physical address size: 39 bits
2131 20:06:58.857914 BS: BS_WRITE_TABLES exit times (exec / console): 355 / 151 ms
2132 20:06:58.861411 CPU physical address size: 39 bits
2133 20:06:58.864746 CPU physical address size: 39 bits
2134 20:06:58.869620 Checking cr50 for pending updates
2135 20:06:58.872937 CPU physical address size: 39 bits
2136 20:06:58.876188 Reading cr50 TPM mode
2137 20:06:58.887094 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2138 20:06:58.896754 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2139 20:06:58.900477 Checking segment from ROM address 0xffc02b38
2140 20:06:58.903521 Checking segment from ROM address 0xffc02b54
2141 20:06:58.909946 Loading segment from ROM address 0xffc02b38
2142 20:06:58.910034 code (compression=0)
2143 20:06:58.920319 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2144 20:06:58.926534 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2145 20:06:58.929966 it's not compressed!
2146 20:06:59.069274 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2147 20:06:59.075855 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2148 20:06:59.082702 Loading segment from ROM address 0xffc02b54
2149 20:06:59.082788 Entry Point 0x30000000
2150 20:06:59.085785
2151 20:06:59.085870 Loaded segments
2152 20:06:59.092448 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2153 20:06:59.135525 Finalizing chipset.
2154 20:06:59.139068 Finalizing SMM.
2155 20:06:59.139153 APMC done.
2156 20:06:59.145555 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2157 20:06:59.148771 mp_park_aps done after 0 msecs.
2158 20:06:59.152553 Jumping to boot code at 0x30000000(0x76b25000)
2159 20:06:59.162094 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2160 20:06:59.162180
2161 20:06:59.162248
2162 20:06:59.162311
2163 20:06:59.165584 Starting depthcharge on Voema...
2164 20:06:59.165668
2165 20:06:59.166022 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2166 20:06:59.166122 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2167 20:06:59.166207 Setting prompt string to ['volteer:']
2168 20:06:59.166288 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2169 20:06:59.175194 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2170 20:06:59.175281
2171 20:06:59.181787 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2172 20:06:59.181874
2173 20:06:59.188326 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2174 20:06:59.188412
2175 20:06:59.191825 Failed to find eMMC card reader
2176 20:06:59.191911
2177 20:06:59.191979 Wipe memory regions:
2178 20:06:59.192042
2179 20:06:59.198582 [0x00000000001000, 0x000000000a0000)
2180 20:06:59.198668
2181 20:06:59.202050 [0x00000000100000, 0x00000030000000)
2182 20:06:59.202137
2183 20:06:59.230476 [0x00000032662db0, 0x000000769ef000)
2184 20:06:59.230570
2185 20:06:59.269346 [0x00000100000000, 0x00000280400000)
2186 20:06:59.269522
2187 20:06:59.476458 ec_init: CrosEC protocol v3 supported (256, 256)
2188 20:06:59.476609
2189 20:06:59.482845 update_port_state: port C0 state: usb enable 1 mux conn 0
2190 20:06:59.482932
2191 20:06:59.492403 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2192 20:06:59.492493
2193 20:06:59.500217 pmc_check_ipc_sts: STS_BUSY done after 2316 us
2194 20:06:59.500301
2195 20:06:59.503893 send_conn_disc_msg: pmc_send_cmd succeeded
2196 20:06:59.504013
2197 20:06:59.935094 R8152: Initializing
2198 20:06:59.935239
2199 20:06:59.938514 Version 6 (ocp_data = 5c30)
2200 20:06:59.938593
2201 20:06:59.941417 R8152: Done initializing
2202 20:06:59.941494
2203 20:06:59.944813 Adding net device
2204 20:06:59.944883
2205 20:07:00.249976 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2206 20:07:00.250128
2207 20:07:00.250197
2208 20:07:00.250258
2209 20:07:00.253998 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2211 20:07:00.354835 volteer: tftpboot 192.168.201.1 8411808/tftp-deploy-d28yd_v5/kernel/bzImage 8411808/tftp-deploy-d28yd_v5/kernel/cmdline 8411808/tftp-deploy-d28yd_v5/ramdisk/ramdisk.cpio.gz
2212 20:07:00.354997 Setting prompt string to 'Starting kernel'
2213 20:07:00.355072 Setting prompt string to ['Starting kernel']
2214 20:07:00.355140 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2215 20:07:00.355212 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2216 20:07:00.359976 tftpboot 192.168.201.1 8411808/tftp-deploy-d28yd_v5/kernel/bzImoy-d28yd_v5/kernel/cmdline 8411808/tftp-deploy-d28yd_v5/ramdisk/ramdisk.cpio.gz
2217 20:07:00.360066
2218 20:07:00.360132 Waiting for link
2219 20:07:00.360194
2220 20:07:00.561926 done.
2221 20:07:00.562075
2222 20:07:00.562144 MAC: 00:24:32:30:7e:47
2223 20:07:00.562206
2224 20:07:00.565078 Sending DHCP discover... done.
2225 20:07:00.565164
2226 20:07:00.568722 Waiting for reply... done.
2227 20:07:00.568807
2228 20:07:00.571901 Sending DHCP request... done.
2229 20:07:00.572009
2230 20:07:00.575234 Waiting for reply... done.
2231 20:07:00.575318
2232 20:07:00.578445 My ip is 192.168.201.19
2233 20:07:00.578529
2234 20:07:00.581924 The DHCP server ip is 192.168.201.1
2235 20:07:00.582009
2236 20:07:00.585594 TFTP server IP predefined by user: 192.168.201.1
2237 20:07:00.585679
2238 20:07:00.591935 Bootfile predefined by user: 8411808/tftp-deploy-d28yd_v5/kernel/bzImage
2239 20:07:00.592020
2240 20:07:00.594986 Sending tftp read request... done.
2241 20:07:00.595069
2242 20:07:00.598179 Waiting for the transfer...
2243 20:07:00.601715
2244 20:07:01.152357 00000000 ################################################################
2245 20:07:01.152505
2246 20:07:01.698807 00080000 ################################################################
2247 20:07:01.698964
2248 20:07:02.254880 00100000 ################################################################
2249 20:07:02.255020
2250 20:07:02.811035 00180000 ################################################################
2251 20:07:02.811178
2252 20:07:03.361800 00200000 ################################################################
2253 20:07:03.361951
2254 20:07:03.905473 00280000 ################################################################
2255 20:07:03.905616
2256 20:07:04.458860 00300000 ################################################################
2257 20:07:04.459009
2258 20:07:05.005684 00380000 ################################################################
2259 20:07:05.005836
2260 20:07:05.559527 00400000 ################################################################
2261 20:07:05.559678
2262 20:07:06.128529 00480000 ################################################################
2263 20:07:06.128679
2264 20:07:06.694129 00500000 ################################################################
2265 20:07:06.694282
2266 20:07:07.253933 00580000 ################################################################
2267 20:07:07.254084
2268 20:07:07.819729 00600000 ################################################################
2269 20:07:07.819872
2270 20:07:08.386676 00680000 ################################################################
2271 20:07:08.386827
2272 20:07:08.644103 00700000 ############################# done.
2273 20:07:08.644252
2274 20:07:08.647382 The bootfile was 7573392 bytes long.
2275 20:07:08.647468
2276 20:07:08.651393 Sending tftp read request... done.
2277 20:07:08.651478
2278 20:07:08.654193 Waiting for the transfer...
2279 20:07:08.654277
2280 20:07:09.185112 00000000 ################################################################
2281 20:07:09.185263
2282 20:07:09.728564 00080000 ################################################################
2283 20:07:09.728719
2284 20:07:10.266165 00100000 ################################################################
2285 20:07:10.266312
2286 20:07:10.820635 00180000 ################################################################
2287 20:07:10.820779
2288 20:07:11.359314 00200000 ################################################################
2289 20:07:11.359461
2290 20:07:11.921495 00280000 ################################################################
2291 20:07:11.921647
2292 20:07:12.471822 00300000 ################################################################
2293 20:07:12.471969
2294 20:07:13.019642 00380000 ################################################################
2295 20:07:13.019787
2296 20:07:13.551827 00400000 ################################################################
2297 20:07:13.551980
2298 20:07:14.077266 00480000 ################################################################
2299 20:07:14.077420
2300 20:07:14.340559 00500000 ############################### done.
2301 20:07:14.340696
2302 20:07:14.343359 Sending tftp read request... done.
2303 20:07:14.343445
2304 20:07:14.346832 Waiting for the transfer...
2305 20:07:14.346918
2306 20:07:14.346985 00000000 # done.
2307 20:07:14.347047
2308 20:07:14.356668 Command line loaded dynamically from TFTP file: 8411808/tftp-deploy-d28yd_v5/kernel/cmdline
2309 20:07:14.356754
2310 20:07:14.379801 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8411808/extract-nfsrootfs-d_fj58qh,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2311 20:07:14.379891
2312 20:07:14.383271 Shutting down all USB controllers.
2313 20:07:14.383357
2314 20:07:14.386294 Removing current net device
2315 20:07:14.386378
2316 20:07:14.390015 Finalizing coreboot
2317 20:07:14.390101
2318 20:07:14.396271 Exiting depthcharge with code 4 at timestamp: 23876990
2319 20:07:14.396356
2320 20:07:14.396423
2321 20:07:14.396484 Starting kernel ...
2322 20:07:14.396543
2323 20:07:14.396599
2324 20:07:14.396656
2325 20:07:14.397009 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2326 20:07:14.397117 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2327 20:07:14.397195 Setting prompt string to ['Linux version [0-9]']
2328 20:07:14.397273 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2329 20:07:14.397354 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2331 20:11:42.398369 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2333 20:11:42.399530 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2335 20:11:42.400419 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2338 20:11:42.402012 end: 2 depthcharge-action (duration 00:05:00) [common]
2340 20:11:42.403259 Cleaning after the job
2341 20:11:42.403735 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411808/tftp-deploy-d28yd_v5/ramdisk
2342 20:11:42.406025 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411808/tftp-deploy-d28yd_v5/kernel
2343 20:11:42.408825 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411808/tftp-deploy-d28yd_v5/nfsrootfs
2344 20:11:42.462710 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411808/tftp-deploy-d28yd_v5/modules
2345 20:11:42.463029 start: 4.1 power-off (timeout 00:00:30) [common]
2346 20:11:42.463189 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2347 20:11:42.482434 >> Command sent successfully.
2348 20:11:42.484451 Returned 0 in 0 seconds
2349 20:11:42.585808 end: 4.1 power-off (duration 00:00:00) [common]
2351 20:11:42.587387 start: 4.2 read-feedback (timeout 00:10:00) [common]
2352 20:11:42.588627 Listened to connection for namespace 'common' for up to 1s
2353 20:11:43.589784 Finalising connection for namespace 'common'
2354 20:11:43.590383 Disconnecting from shell: Finalise
2355 20:11:43.691815 end: 4.2 read-feedback (duration 00:00:01) [common]
2356 20:11:43.692436 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8411808
2357 20:11:43.887327 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8411808
2358 20:11:43.887534 JobError: Your job cannot terminate cleanly.