Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Kernel Errors: 0
- Warnings: 0
1 19:37:05.685653 lava-dispatcher, installed at version: 2022.11
2 19:37:05.685826 start: 0 validate
3 19:37:05.685955 Start time: 2022-12-19 19:37:05.685948+00:00 (UTC)
4 19:37:05.686078 Using caching service: 'http://localhost/cache/?uri=%s'
5 19:37:05.686208 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221216.0%2Fx86%2Frootfs.cpio.gz exists
6 19:37:05.697307 Using caching service: 'http://localhost/cache/?uri=%s'
7 19:37:05.697532 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt-rebase%2Fv4.4-st5-395-gaed3deab96cc%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 19:37:05.719138 Using caching service: 'http://localhost/cache/?uri=%s'
9 19:37:05.719304 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt-rebase%2Fv4.4-st5-395-gaed3deab96cc%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 19:37:05.729276 validate duration: 0.04
12 19:37:05.729549 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 19:37:05.729655 start: 1.1 download-retry (timeout 00:10:00) [common]
14 19:37:05.729790 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 19:37:05.729907 Not decompressing ramdisk as can be used compressed.
16 19:37:05.729993 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221216.0/x86/rootfs.cpio.gz
17 19:37:05.730059 saving as /var/lib/lava/dispatcher/tmp/8411623/tftp-deploy-2z_jyl5_/ramdisk/rootfs.cpio.gz
18 19:37:05.730120 total size: 8415773 (8MB)
19 19:37:05.744857 progress 0% (0MB)
20 19:37:05.786529 progress 5% (0MB)
21 19:37:05.814037 progress 10% (0MB)
22 19:37:05.844870 progress 15% (1MB)
23 19:37:05.874378 progress 20% (1MB)
24 19:37:05.900604 progress 25% (2MB)
25 19:37:05.934326 progress 30% (2MB)
26 19:37:05.966358 progress 35% (2MB)
27 19:37:05.996277 progress 40% (3MB)
28 19:37:06.018035 progress 45% (3MB)
29 19:37:06.052895 progress 50% (4MB)
30 19:37:06.086204 progress 55% (4MB)
31 19:37:06.104170 progress 60% (4MB)
32 19:37:06.130863 progress 65% (5MB)
33 19:37:06.152597 progress 70% (5MB)
34 19:37:06.179041 progress 75% (6MB)
35 19:37:06.202132 progress 80% (6MB)
36 19:37:06.221496 progress 85% (6MB)
37 19:37:06.250861 progress 90% (7MB)
38 19:37:06.268950 progress 95% (7MB)
39 19:37:06.297247 progress 100% (8MB)
40 19:37:06.298629 8MB downloaded in 0.57s (14.12MB/s)
41 19:37:06.299350 end: 1.1.1 http-download (duration 00:00:01) [common]
43 19:37:06.300585 end: 1.1 download-retry (duration 00:00:01) [common]
44 19:37:06.301033 start: 1.2 download-retry (timeout 00:09:59) [common]
45 19:37:06.301470 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 19:37:06.301979 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt-rebase/v4.4-st5-395-gaed3deab96cc/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 19:37:06.302329 saving as /var/lib/lava/dispatcher/tmp/8411623/tftp-deploy-2z_jyl5_/kernel/bzImage
48 19:37:06.302644 total size: 7577488 (7MB)
49 19:37:06.302952 No compression specified
50 19:37:06.349695 progress 0% (0MB)
51 19:37:06.426050 progress 5% (0MB)
52 19:37:06.485615 progress 10% (0MB)
53 19:37:06.528405 progress 15% (1MB)
54 19:37:06.559433 progress 20% (1MB)
55 19:37:06.577576 progress 25% (1MB)
56 19:37:06.601861 progress 30% (2MB)
57 19:37:06.625662 progress 35% (2MB)
58 19:37:06.648498 progress 40% (2MB)
59 19:37:06.671715 progress 45% (3MB)
60 19:37:06.701879 progress 50% (3MB)
61 19:37:06.749718 progress 55% (4MB)
62 19:37:06.800183 progress 60% (4MB)
63 19:37:06.860233 progress 65% (4MB)
64 19:37:06.894393 progress 70% (5MB)
65 19:37:06.937628 progress 75% (5MB)
66 19:37:06.971439 progress 80% (5MB)
67 19:37:07.011153 progress 85% (6MB)
68 19:37:07.057410 progress 90% (6MB)
69 19:37:07.091046 progress 95% (6MB)
70 19:37:07.130904 progress 100% (7MB)
71 19:37:07.131127 7MB downloaded in 0.83s (8.72MB/s)
72 19:37:07.131282 end: 1.2.1 http-download (duration 00:00:01) [common]
74 19:37:07.131529 end: 1.2 download-retry (duration 00:00:01) [common]
75 19:37:07.131620 start: 1.3 download-retry (timeout 00:09:59) [common]
76 19:37:07.131707 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 19:37:07.131815 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt-rebase/v4.4-st5-395-gaed3deab96cc/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 19:37:07.131884 saving as /var/lib/lava/dispatcher/tmp/8411623/tftp-deploy-2z_jyl5_/modules/modules.tar
79 19:37:07.131946 total size: 54512 (0MB)
80 19:37:07.132007 Using unxz to decompress xz
81 19:37:07.136469 progress 60% (0MB)
82 19:37:07.136920 progress 100% (0MB)
83 19:37:07.140269 0MB downloaded in 0.01s (6.25MB/s)
84 19:37:07.140493 end: 1.3.1 http-download (duration 00:00:00) [common]
86 19:37:07.140755 end: 1.3 download-retry (duration 00:00:00) [common]
87 19:37:07.140853 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 19:37:07.140951 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 19:37:07.141039 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 19:37:07.141127 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 19:37:07.141303 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x
92 19:37:07.141413 makedir: /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin
93 19:37:07.141525 makedir: /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/tests
94 19:37:07.141626 makedir: /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/results
95 19:37:07.141732 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-add-keys
96 19:37:07.141862 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-add-sources
97 19:37:07.141978 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-background-process-start
98 19:37:07.142091 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-background-process-stop
99 19:37:07.142202 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-common-functions
100 19:37:07.142312 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-echo-ipv4
101 19:37:07.142423 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-install-packages
102 19:37:07.142534 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-installed-packages
103 19:37:07.142645 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-os-build
104 19:37:07.142755 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-probe-channel
105 19:37:07.142868 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-probe-ip
106 19:37:07.142977 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-target-ip
107 19:37:07.143085 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-target-mac
108 19:37:07.143192 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-target-storage
109 19:37:07.143305 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-test-case
110 19:37:07.143413 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-test-event
111 19:37:07.143522 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-test-feedback
112 19:37:07.143633 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-test-raise
113 19:37:07.143747 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-test-reference
114 19:37:07.143855 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-test-runner
115 19:37:07.143962 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-test-set
116 19:37:07.144070 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-test-shell
117 19:37:07.144180 Updating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-install-packages (oe)
118 19:37:07.144291 Updating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/bin/lava-installed-packages (oe)
119 19:37:07.144389 Creating /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/environment
120 19:37:07.144477 LAVA metadata
121 19:37:07.144547 - LAVA_JOB_ID=8411623
122 19:37:07.144618 - LAVA_DISPATCHER_IP=192.168.201.1
123 19:37:07.144731 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 19:37:07.144802 skipped lava-vland-overlay
125 19:37:07.144882 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 19:37:07.144969 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 19:37:07.145036 skipped lava-multinode-overlay
128 19:37:07.145112 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 19:37:07.145197 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 19:37:07.145273 Loading test definitions
131 19:37:07.145373 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 19:37:07.145480 Using /lava-8411623 at stage 0
133 19:37:07.145764 uuid=8411623_1.4.2.3.1 testdef=None
134 19:37:07.145858 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 19:37:07.145949 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 19:37:07.146446 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 19:37:07.146675 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 19:37:07.147328 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 19:37:07.147572 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 19:37:07.148119 runner path: /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/0/tests/0_dmesg test_uuid 8411623_1.4.2.3.1
143 19:37:07.148270 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 19:37:07.148503 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
146 19:37:07.148578 Using /lava-8411623 at stage 1
147 19:37:07.148823 uuid=8411623_1.4.2.3.5 testdef=None
148 19:37:07.148941 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 19:37:07.149045 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
150 19:37:07.149526 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 19:37:07.149763 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
153 19:37:07.150348 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 19:37:07.150591 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
156 19:37:07.151141 runner path: /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/1/tests/1_bootrr test_uuid 8411623_1.4.2.3.5
157 19:37:07.151284 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 19:37:07.151499 Creating lava-test-runner.conf files
160 19:37:07.151571 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/0 for stage 0
161 19:37:07.151690 - 0_dmesg
162 19:37:07.151769 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8411623/lava-overlay-web5ux0x/lava-8411623/1 for stage 1
163 19:37:07.151854 - 1_bootrr
164 19:37:07.151947 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 19:37:07.152036 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
166 19:37:07.158175 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 19:37:07.158287 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 19:37:07.158378 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 19:37:07.158465 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 19:37:07.158553 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 19:37:07.340477 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 19:37:07.340822 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 19:37:07.340937 extracting modules file /var/lib/lava/dispatcher/tmp/8411623/tftp-deploy-2z_jyl5_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8411623/extract-overlay-ramdisk-5iettuzw/ramdisk
174 19:37:07.345148 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 19:37:07.345266 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 19:37:07.345353 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8411623/compress-overlay-4fuq13jx/overlay-1.4.2.4.tar.gz to ramdisk
177 19:37:07.345431 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8411623/compress-overlay-4fuq13jx/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8411623/extract-overlay-ramdisk-5iettuzw/ramdisk
178 19:37:07.349373 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 19:37:07.349510 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 19:37:07.349619 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 19:37:07.349769 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 19:37:07.349853 Building ramdisk /var/lib/lava/dispatcher/tmp/8411623/extract-overlay-ramdisk-5iettuzw/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8411623/extract-overlay-ramdisk-5iettuzw/ramdisk
183 19:37:07.412499 >> 48042 blocks
184 19:37:08.184099 rename /var/lib/lava/dispatcher/tmp/8411623/extract-overlay-ramdisk-5iettuzw/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8411623/tftp-deploy-2z_jyl5_/ramdisk/ramdisk.cpio.gz
185 19:37:08.184522 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 19:37:08.184650 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 19:37:08.184762 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 19:37:08.184868 No mkimage arch provided, not using FIT.
189 19:37:08.184967 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 19:37:08.185057 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 19:37:08.185163 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 19:37:08.185258 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 19:37:08.185345 No LXC device requested
194 19:37:08.185439 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 19:37:08.185548 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 19:37:08.185637 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 19:37:08.185713 Checking files for TFTP limit of 4294967296 bytes.
198 19:37:08.186122 end: 1 tftp-deploy (duration 00:00:02) [common]
199 19:37:08.186236 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 19:37:08.186345 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 19:37:08.186487 substitutions:
202 19:37:08.186560 - {DTB}: None
203 19:37:08.186629 - {INITRD}: 8411623/tftp-deploy-2z_jyl5_/ramdisk/ramdisk.cpio.gz
204 19:37:08.186693 - {KERNEL}: 8411623/tftp-deploy-2z_jyl5_/kernel/bzImage
205 19:37:08.186753 - {LAVA_MAC}: None
206 19:37:08.186832 - {PRESEED_CONFIG}: None
207 19:37:08.186899 - {PRESEED_LOCAL}: None
208 19:37:08.186961 - {RAMDISK}: 8411623/tftp-deploy-2z_jyl5_/ramdisk/ramdisk.cpio.gz
209 19:37:08.187023 - {ROOT_PART}: None
210 19:37:08.187081 - {ROOT}: None
211 19:37:08.187139 - {SERVER_IP}: 192.168.201.1
212 19:37:08.187196 - {TEE}: None
213 19:37:08.187262 Parsed boot commands:
214 19:37:08.187322 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 19:37:08.187481 Parsed boot commands: tftpboot 192.168.201.1 8411623/tftp-deploy-2z_jyl5_/kernel/bzImage 8411623/tftp-deploy-2z_jyl5_/kernel/cmdline 8411623/tftp-deploy-2z_jyl5_/ramdisk/ramdisk.cpio.gz
216 19:37:08.187576 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 19:37:08.187677 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 19:37:08.187784 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 19:37:08.187876 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 19:37:08.187951 Not connected, no need to disconnect.
221 19:37:08.188038 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 19:37:08.188132 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 19:37:08.188228 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
224 19:37:08.190856 Setting prompt string to ['lava-test: # ']
225 19:37:08.191156 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 19:37:08.191267 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 19:37:08.191371 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 19:37:08.191475 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 19:37:08.191664 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
230 19:37:08.211996 >> Command sent successfully.
231 19:37:08.214141 Returned 0 in 0 seconds
232 19:37:08.314907 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 19:37:08.315493 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 19:37:08.315637 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 19:37:08.315726 Setting prompt string to 'Starting depthcharge on Voema...'
237 19:37:08.315824 Changing prompt to 'Starting depthcharge on Voema...'
238 19:37:08.315892 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 19:37:08.316204 [Enter `^Ec?' for help]
240 19:37:16.435395
241 19:37:16.435567
242 19:37:16.445348 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 19:37:16.448515 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 19:37:16.455370 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 19:37:16.458901 CPU: AES supported, TXT NOT supported, VT supported
246 19:37:16.464996 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 19:37:16.471497 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 19:37:16.475156 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 19:37:16.478197 VBOOT: Loading verstage.
250 19:37:16.485020 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 19:37:16.488083 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 19:37:16.491439 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 19:37:16.502284 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 19:37:16.508993 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 19:37:16.509078
256 19:37:16.509143
257 19:37:16.522085 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 19:37:16.536043 Probing TPM: . done!
259 19:37:16.539438 TPM ready after 0 ms
260 19:37:16.542846 Connected to device vid:did:rid of 1ae0:0028:00
261 19:37:16.554121 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
262 19:37:16.560671 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 19:37:16.563983 Initialized TPM device CR50 revision 0
264 19:37:16.614209 tlcl_send_startup: Startup return code is 0
265 19:37:16.614356 TPM: setup succeeded
266 19:37:16.629632 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 19:37:16.645048 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 19:37:16.658797 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 19:37:16.669012 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 19:37:16.672655 Chrome EC: UHEPI supported
271 19:37:16.676097 Phase 1
272 19:37:16.679725 FMAP: area GBB found @ 1805000 (458752 bytes)
273 19:37:16.689781 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 19:37:16.695915 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 19:37:16.702934 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 19:37:16.709104 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 19:37:16.712665 Recovery requested (1009000e)
278 19:37:16.715693 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 19:37:16.727645 tlcl_extend: response is 0
280 19:37:16.734410 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 19:37:16.743983 tlcl_extend: response is 0
282 19:37:16.750124 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 19:37:16.756970 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 19:37:16.763443 BS: verstage times (exec / console): total (unknown) / 142 ms
285 19:37:16.763541
286 19:37:16.763610
287 19:37:16.776718 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 19:37:16.783619 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 19:37:16.786793 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 19:37:16.790292 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 19:37:16.796745 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 19:37:16.800165 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 19:37:16.803619 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 19:37:16.806622 TCO_STS: 0000 0000
295 19:37:16.810566 GEN_PMCON: d0015038 00002200
296 19:37:16.813278 GBLRST_CAUSE: 00000000 00000000
297 19:37:16.813523 HPR_CAUSE0: 00000000
298 19:37:16.816671
299 19:37:16.816960 prev_sleep_state 5
300 19:37:16.820478 Boot Count incremented to 13985
301 19:37:16.827111 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 19:37:16.833908 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 19:37:16.843668 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 19:37:16.850268 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
305 19:37:16.852938 Chrome EC: UHEPI supported
306 19:37:16.859999 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
307 19:37:16.871384 Probing TPM: done!
308 19:37:16.878933 Connected to device vid:did:rid of 1ae0:0028:00
309 19:37:16.885970 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
310 19:37:16.889200
311 19:37:16.896448 Initialized TPM device CR50 revision 0
312 19:37:16.906582 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 19:37:16.912923 MRC: Hash idx 0x100b comparison successful.
314 19:37:16.916029 MRC cache found, size faa8
315 19:37:16.916532 bootmode is set to: 2
316 19:37:16.920117 SPD index = 0
317 19:37:16.926698 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
318 19:37:16.929669 SPD: module type is LPDDR4X
319 19:37:16.933275 SPD: module part number is MT53E512M64D4NW-046
320 19:37:16.939605 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
321 19:37:16.942598 SPD: device width 16 bits, bus width 16 bits
322 19:37:16.949356 SPD: module size is 1024 MB (per channel)
323 19:37:17.382732 CBMEM:
324 19:37:17.385714 IMD: root @ 0x76fff000 254 entries.
325 19:37:17.389262 IMD: root @ 0x76ffec00 62 entries.
326 19:37:17.392725 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
327 19:37:17.399264 FMAP: area RW_VPD found @ f35000 (8192 bytes)
328 19:37:17.402211 External stage cache:
329 19:37:17.405957 IMD: root @ 0x7b3ff000 254 entries.
330 19:37:17.409248 IMD: root @ 0x7b3fec00 62 entries.
331 19:37:17.424585 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
332 19:37:17.430926 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 19:37:17.437973 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
334 19:37:17.452002 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 19:37:17.454930 cse_lite: Skip switching to RW in the recovery path
336 19:37:17.459061 8 DIMMs found
337 19:37:17.459609 SMM Memory Map
338 19:37:17.462238 SMRAM : 0x7b000000 0x800000
339 19:37:17.465850 Subregion 0: 0x7b000000 0x200000
340 19:37:17.468867 Subregion 1: 0x7b200000 0x200000
341 19:37:17.472369 Subregion 2: 0x7b400000 0x400000
342 19:37:17.475743 top_of_ram = 0x77000000
343 19:37:17.482156 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 19:37:17.485690 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 19:37:17.492161 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
346 19:37:17.495539 MTRR Range: Start=ff000000 End=0 (Size 1000000)
347 19:37:17.505503 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
348 19:37:17.512017 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
349 19:37:17.522088 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
350 19:37:17.526065 Processing 211 relocs. Offset value of 0x74c0b000
351 19:37:17.534818 BS: romstage times (exec / console): total (unknown) / 277 ms
352 19:37:17.540775
353 19:37:17.541315
354 19:37:17.550604 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
355 19:37:17.553921 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
356 19:37:17.563513 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
357 19:37:17.570216 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
358 19:37:17.577125 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
359 19:37:17.583206 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
360 19:37:17.630819 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
361 19:37:17.637342 Processing 5008 relocs. Offset value of 0x75d98000
362 19:37:17.640686 BS: postcar times (exec / console): total (unknown) / 59 ms
363 19:37:17.644215
364 19:37:17.644750
365 19:37:17.654029 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
366 19:37:17.654570 Normal boot
367 19:37:17.657162 FW_CONFIG value is 0x804c02
368 19:37:17.660845 PCI: 00:07.0 disabled by fw_config
369 19:37:17.663798 PCI: 00:07.1 disabled by fw_config
370 19:37:17.667208 PCI: 00:0d.2 disabled by fw_config
371 19:37:17.670754 PCI: 00:1c.7 disabled by fw_config
372 19:37:17.677367 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 19:37:17.683718 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
374 19:37:17.687396 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
375 19:37:17.690406 GENERIC: 0.0 disabled by fw_config
376 19:37:17.693572 GENERIC: 1.0 disabled by fw_config
377 19:37:17.700181 fw_config match found: DB_USB=USB3_ACTIVE
378 19:37:17.703480 fw_config match found: DB_USB=USB3_ACTIVE
379 19:37:17.707446 fw_config match found: DB_USB=USB3_ACTIVE
380 19:37:17.710479 fw_config match found: DB_USB=USB3_ACTIVE
381 19:37:17.713837
382 19:37:17.717080 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 19:37:17.723864 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
384 19:37:17.733823 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
385 19:37:17.740558 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
386 19:37:17.743832 microcode: sig=0x806c1 pf=0x80 revision=0x86
387 19:37:17.750405 microcode: Update skipped, already up-to-date
388 19:37:17.756635 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
389 19:37:17.783945 Detected 4 core, 8 thread CPU.
390 19:37:17.787244 Setting up SMI for CPU
391 19:37:17.790512 IED base = 0x7b400000
392 19:37:17.790944 IED size = 0x00400000
393 19:37:17.794101 Will perform SMM setup.
394 19:37:17.800859 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
395 19:37:17.807115 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
396 19:37:17.813813 Processing 16 relocs. Offset value of 0x00030000
397 19:37:17.817690 Attempting to start 7 APs
398 19:37:17.820864 Waiting for 10ms after sending INIT.
399 19:37:17.836621 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
400 19:37:17.839790 AP: slot 5 apic_id 6.
401 19:37:17.842993 AP: slot 4 apic_id 7.
402 19:37:17.843538 done.
403 19:37:17.843885 AP: slot 3 apic_id 5.
404 19:37:17.846448 AP: slot 7 apic_id 4.
405 19:37:17.849837 AP: slot 6 apic_id 2.
406 19:37:17.850377 AP: slot 2 apic_id 3.
407 19:37:17.856175 Waiting for 2nd SIPI to complete...done.
408 19:37:17.862387 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 19:37:17.868941 Processing 13 relocs. Offset value of 0x00038000
410 19:37:17.869432 Unable to locate Global NVS
411 19:37:17.872519
412 19:37:17.879698 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
413 19:37:17.882857 Installing permanent SMM handler to 0x7b000000
414 19:37:17.892691 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
415 19:37:17.895552 Processing 794 relocs. Offset value of 0x7b010000
416 19:37:17.905633 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
417 19:37:17.908840 Processing 13 relocs. Offset value of 0x7b008000
418 19:37:17.915579 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
419 19:37:17.922079 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
420 19:37:17.925117 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
421 19:37:17.932089 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
422 19:37:17.938441 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
423 19:37:17.945305 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
424 19:37:17.952290 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
425 19:37:17.955159 Unable to locate Global NVS
426 19:37:17.961579 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
427 19:37:17.964940 Clearing SMI status registers
428 19:37:17.968334 SMI_STS: PM1
429 19:37:17.968769 PM1_STS: PWRBTN
430 19:37:17.975517 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
431 19:37:17.978461 In relocation handler: CPU 0
432 19:37:17.981310 New SMBASE=0x7b000000 IEDBASE=0x7b400000
433 19:37:17.988183 Writing SMRR. base = 0x7b000006, mask=0xff800c00
434 19:37:17.991395 Relocation complete.
435 19:37:17.997961 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
436 19:37:18.001214 In relocation handler: CPU 1
437 19:37:18.004587 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
438 19:37:18.007804 Relocation complete.
439 19:37:18.014615 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
440 19:37:18.018150 In relocation handler: CPU 7
441 19:37:18.021395 New SMBASE=0x7affe400 IEDBASE=0x7b400000
442 19:37:18.024337 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 19:37:18.027877 Relocation complete.
444 19:37:18.034419 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
445 19:37:18.037982 In relocation handler: CPU 2
446 19:37:18.041359 New SMBASE=0x7afff800 IEDBASE=0x7b400000
447 19:37:18.044136 Relocation complete.
448 19:37:18.050540 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
449 19:37:18.053869 In relocation handler: CPU 6
450 19:37:18.057690 New SMBASE=0x7affe800 IEDBASE=0x7b400000
451 19:37:18.064303 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 19:37:18.067162 Relocation complete.
453 19:37:18.073819 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
454 19:37:18.077268 In relocation handler: CPU 4
455 19:37:18.080526 New SMBASE=0x7afff000 IEDBASE=0x7b400000
456 19:37:18.081074 Relocation complete.
457 19:37:18.090673 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
458 19:37:18.091247 In relocation handler: CPU 5
459 19:37:18.093945
460 19:37:18.097017 New SMBASE=0x7affec00 IEDBASE=0x7b400000
461 19:37:18.100879 Writing SMRR. base = 0x7b000006, mask=0xff800c00
462 19:37:18.103728 Relocation complete.
463 19:37:18.110952 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
464 19:37:18.114212 In relocation handler: CPU 3
465 19:37:18.117188 New SMBASE=0x7afff400 IEDBASE=0x7b400000
466 19:37:18.121271 Relocation complete.
467 19:37:18.121863 Initializing CPU #0
468 19:37:18.124845 CPU: vendor Intel device 806c1
469 19:37:18.128356 CPU: family 06, model 8c, stepping 01
470 19:37:18.131398 Clearing out pending MCEs
471 19:37:18.134739 Setting up local APIC...
472 19:37:18.137871 apic_id: 0x00 done.
473 19:37:18.141235 Turbo is available but hidden
474 19:37:18.141640 Turbo is available and visible
475 19:37:18.147901 microcode: Update skipped, already up-to-date
476 19:37:18.151455 CPU #0 initialized
477 19:37:18.151993 Initializing CPU #1
478 19:37:18.154757 Initializing CPU #7
479 19:37:18.155297 Initializing CPU #3
480 19:37:18.158062 CPU: vendor Intel device 806c1
481 19:37:18.161187 CPU: family 06, model 8c, stepping 01
482 19:37:18.164998 CPU: vendor Intel device 806c1
483 19:37:18.171539 CPU: family 06, model 8c, stepping 01
484 19:37:18.172086 Clearing out pending MCEs
485 19:37:18.174731 Clearing out pending MCEs
486 19:37:18.177716 Setting up local APIC...
487 19:37:18.181085 Initializing CPU #5
488 19:37:18.181656 Initializing CPU #4
489 19:37:18.184067 CPU: vendor Intel device 806c1
490 19:37:18.187836 CPU: family 06, model 8c, stepping 01
491 19:37:18.191249 CPU: vendor Intel device 806c1
492 19:37:18.194196 CPU: family 06, model 8c, stepping 01
493 19:37:18.197426 Setting up local APIC...
494 19:37:18.201375 Clearing out pending MCEs
495 19:37:18.204226 Clearing out pending MCEs
496 19:37:18.204673 Setting up local APIC...
497 19:37:18.207826 apic_id: 0x05 done.
498 19:37:18.211328 apic_id: 0x04 done.
499 19:37:18.214320 microcode: Update skipped, already up-to-date
500 19:37:18.218181 microcode: Update skipped, already up-to-date
501 19:37:18.221055 CPU #3 initialized
502 19:37:18.224284 CPU #7 initialized
503 19:37:18.227852 CPU: vendor Intel device 806c1
504 19:37:18.230595 CPU: family 06, model 8c, stepping 01
505 19:37:18.231037 Initializing CPU #2
506 19:37:18.234286 Initializing CPU #6
507 19:37:18.237763 CPU: vendor Intel device 806c1
508 19:37:18.240993 CPU: family 06, model 8c, stepping 01
509 19:37:18.244315 CPU: vendor Intel device 806c1
510 19:37:18.247722 CPU: family 06, model 8c, stepping 01
511 19:37:18.250832 Clearing out pending MCEs
512 19:37:18.254373 Clearing out pending MCEs
513 19:37:18.254899 Setting up local APIC...
514 19:37:18.257450
515 19:37:18.257922 apic_id: 0x07 done.
516 19:37:18.261020 Setting up local APIC...
517 19:37:18.264090 apic_id: 0x03 done.
518 19:37:18.264528 Setting up local APIC...
519 19:37:18.270747 microcode: Update skipped, already up-to-date
520 19:37:18.271190 apic_id: 0x06 done.
521 19:37:18.274160 CPU #4 initialized
522 19:37:18.277474 microcode: Update skipped, already up-to-date
523 19:37:18.280886 apic_id: 0x02 done.
524 19:37:18.284135 microcode: Update skipped, already up-to-date
525 19:37:18.290661 microcode: Update skipped, already up-to-date
526 19:37:18.291191 CPU #2 initialized
527 19:37:18.294058 CPU #6 initialized
528 19:37:18.297215 Clearing out pending MCEs
529 19:37:18.297681 CPU #5 initialized
530 19:37:18.300722 Setting up local APIC...
531 19:37:18.303985 apic_id: 0x01 done.
532 19:37:18.307362 microcode: Update skipped, already up-to-date
533 19:37:18.310779 CPU #1 initialized
534 19:37:18.313920 bsp_do_flight_plan done after 455 msecs.
535 19:37:18.317167 CPU: frequency set to 4000 MHz
536 19:37:18.317653 Enabling SMIs.
537 19:37:18.324043 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 19:37:18.341417 SATAXPCIE1 indicates PCIe NVMe is present
539 19:37:18.344459 Probing TPM: done!
540 19:37:18.347446 Connected to device vid:did:rid of 1ae0:0028:00
541 19:37:18.358803 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
542 19:37:18.362297 Initialized TPM device CR50 revision 0
543 19:37:18.365076 Enabling S0i3.4
544 19:37:18.371647 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 19:37:18.375216 Found a VBT of 8704 bytes after decompression
546 19:37:18.382046 cse_lite: CSE RO boot. HybridStorageMode disabled
547 19:37:18.388439 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 19:37:18.464648 FSPS returned 0
549 19:37:18.468072 Executing Phase 1 of FspMultiPhaseSiInit
550 19:37:18.478516 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 19:37:18.481472 port C0 DISC req: usage 1 usb3 1 usb2 5
552 19:37:18.484849 Raw Buffer output 0 00000511
553 19:37:18.487846 Raw Buffer output 1 00000000
554 19:37:18.491494 pmc_send_ipc_cmd succeeded
555 19:37:18.494836 port C1 DISC req: usage 1 usb3 2 usb2 3
556 19:37:18.498182
557 19:37:18.498613 Raw Buffer output 0 00000321
558 19:37:18.501406 Raw Buffer output 1 00000000
559 19:37:18.505584 pmc_send_ipc_cmd succeeded
560 19:37:18.511431 Detected 4 core, 8 thread CPU.
561 19:37:18.514419 Detected 4 core, 8 thread CPU.
562 19:37:18.748423 Display FSP Version Info HOB
563 19:37:18.751661 Reference Code - CPU = a.0.4c.31
564 19:37:18.754825 uCode Version = 0.0.0.86
565 19:37:18.758240 TXT ACM version = ff.ff.ff.ffff
566 19:37:18.761301 Reference Code - ME = a.0.4c.31
567 19:37:18.764904 MEBx version = 0.0.0.0
568 19:37:18.768002 ME Firmware Version = Consumer SKU
569 19:37:18.771336 Reference Code - PCH = a.0.4c.31
570 19:37:18.774655 PCH-CRID Status = Disabled
571 19:37:18.778094 PCH-CRID Original Value = ff.ff.ff.ffff
572 19:37:18.781663 PCH-CRID New Value = ff.ff.ff.ffff
573 19:37:18.784968 OPROM - RST - RAID = ff.ff.ff.ffff
574 19:37:18.788301 PCH Hsio Version = 4.0.0.0
575 19:37:18.791226 Reference Code - SA - System Agent = a.0.4c.31
576 19:37:18.794492 Reference Code - MRC = 2.0.0.1
577 19:37:18.798039 SA - PCIe Version = a.0.4c.31
578 19:37:18.801457 SA-CRID Status = Disabled
579 19:37:18.804717 SA-CRID Original Value = 0.0.0.1
580 19:37:18.808114 SA-CRID New Value = 0.0.0.1
581 19:37:18.811444 OPROM - VBIOS = ff.ff.ff.ffff
582 19:37:18.814742 IO Manageability Engine FW Version = 11.1.4.0
583 19:37:18.818094 PHY Build Version = 0.0.0.e0
584 19:37:18.821415 Thunderbolt(TM) FW Version = 0.0.0.0
585 19:37:18.827925 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
586 19:37:18.831351 ITSS IRQ Polarities Before:
587 19:37:18.831890 IPC0: 0xffffffff
588 19:37:18.834523 IPC1: 0xffffffff
589 19:37:18.834994 IPC2: 0xffffffff
590 19:37:18.837889 IPC3: 0xffffffff
591 19:37:18.841445 ITSS IRQ Polarities After:
592 19:37:18.842014 IPC0: 0xffffffff
593 19:37:18.845066 IPC1: 0xffffffff
594 19:37:18.845636 IPC2: 0xffffffff
595 19:37:18.847854 IPC3: 0xffffffff
596 19:37:18.851056 Found PCIe Root Port #9 at PCI: 00:1d.0.
597 19:37:18.864256 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
598 19:37:18.874095 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
599 19:37:18.887662 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
600 19:37:18.894584 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 237 ms
601 19:37:18.895124 Enumerating buses...
602 19:37:18.897384
603 19:37:18.900881 Show all devs... Before device enumeration.
604 19:37:18.904128 Root Device: enabled 1
605 19:37:18.904565 DOMAIN: 0000: enabled 1
606 19:37:18.907330 CPU_CLUSTER: 0: enabled 1
607 19:37:18.911262 PCI: 00:00.0: enabled 1
608 19:37:18.913896 PCI: 00:02.0: enabled 1
609 19:37:18.914335 PCI: 00:04.0: enabled 1
610 19:37:18.917385 PCI: 00:05.0: enabled 1
611 19:37:18.920704 PCI: 00:06.0: enabled 0
612 19:37:18.921230 PCI: 00:07.0: enabled 0
613 19:37:18.924106 PCI: 00:07.1: enabled 0
614 19:37:18.927416 PCI: 00:07.2: enabled 0
615 19:37:18.930776 PCI: 00:07.3: enabled 0
616 19:37:18.931309 PCI: 00:08.0: enabled 1
617 19:37:18.933999 PCI: 00:09.0: enabled 0
618 19:37:18.937382 PCI: 00:0a.0: enabled 0
619 19:37:18.940894 PCI: 00:0d.0: enabled 1
620 19:37:18.941422 PCI: 00:0d.1: enabled 0
621 19:37:18.943639 PCI: 00:0d.2: enabled 0
622 19:37:18.947689 PCI: 00:0d.3: enabled 0
623 19:37:18.951038 PCI: 00:0e.0: enabled 0
624 19:37:18.951567 PCI: 00:10.2: enabled 1
625 19:37:18.954123 PCI: 00:10.6: enabled 0
626 19:37:18.957385 PCI: 00:10.7: enabled 0
627 19:37:18.958069 PCI: 00:12.0: enabled 0
628 19:37:18.960722
629 19:37:18.961172 PCI: 00:12.6: enabled 0
630 19:37:18.964002 PCI: 00:13.0: enabled 0
631 19:37:18.967485 PCI: 00:14.0: enabled 1
632 19:37:18.967917 PCI: 00:14.1: enabled 0
633 19:37:18.970662 PCI: 00:14.2: enabled 1
634 19:37:18.973899 PCI: 00:14.3: enabled 1
635 19:37:18.977450 PCI: 00:15.0: enabled 1
636 19:37:18.977912 PCI: 00:15.1: enabled 1
637 19:37:18.980590 PCI: 00:15.2: enabled 1
638 19:37:18.983928 PCI: 00:15.3: enabled 1
639 19:37:18.986755 PCI: 00:16.0: enabled 1
640 19:37:18.987191 PCI: 00:16.1: enabled 0
641 19:37:18.990158 PCI: 00:16.2: enabled 0
642 19:37:18.994213 PCI: 00:16.3: enabled 0
643 19:37:18.996970 PCI: 00:16.4: enabled 0
644 19:37:18.997408 PCI: 00:16.5: enabled 0
645 19:37:19.000497 PCI: 00:17.0: enabled 1
646 19:37:19.003252 PCI: 00:19.0: enabled 0
647 19:37:19.006722 PCI: 00:19.1: enabled 1
648 19:37:19.007160 PCI: 00:19.2: enabled 0
649 19:37:19.010180 PCI: 00:1c.0: enabled 1
650 19:37:19.013837 PCI: 00:1c.1: enabled 0
651 19:37:19.014395 PCI: 00:1c.2: enabled 0
652 19:37:19.017260 PCI: 00:1c.3: enabled 0
653 19:37:19.020365 PCI: 00:1c.4: enabled 0
654 19:37:19.023567 PCI: 00:1c.5: enabled 0
655 19:37:19.024235 PCI: 00:1c.6: enabled 1
656 19:37:19.026462 PCI: 00:1c.7: enabled 0
657 19:37:19.029788 PCI: 00:1d.0: enabled 1
658 19:37:19.033248 PCI: 00:1d.1: enabled 0
659 19:37:19.033717 PCI: 00:1d.2: enabled 1
660 19:37:19.036597 PCI: 00:1d.3: enabled 0
661 19:37:19.039795 PCI: 00:1e.0: enabled 1
662 19:37:19.043592 PCI: 00:1e.1: enabled 0
663 19:37:19.044136 PCI: 00:1e.2: enabled 1
664 19:37:19.046899 PCI: 00:1e.3: enabled 1
665 19:37:19.050029 PCI: 00:1f.0: enabled 1
666 19:37:19.053044 PCI: 00:1f.1: enabled 0
667 19:37:19.053500 PCI: 00:1f.2: enabled 1
668 19:37:19.056654 PCI: 00:1f.3: enabled 1
669 19:37:19.060218 PCI: 00:1f.4: enabled 0
670 19:37:19.060759 PCI: 00:1f.5: enabled 1
671 19:37:19.063233
672 19:37:19.063783 PCI: 00:1f.6: enabled 0
673 19:37:19.066623 PCI: 00:1f.7: enabled 0
674 19:37:19.070230 APIC: 00: enabled 1
675 19:37:19.070772 GENERIC: 0.0: enabled 1
676 19:37:19.073160 GENERIC: 0.0: enabled 1
677 19:37:19.076585 GENERIC: 1.0: enabled 1
678 19:37:19.079800 GENERIC: 0.0: enabled 1
679 19:37:19.080239 GENERIC: 1.0: enabled 1
680 19:37:19.083072 USB0 port 0: enabled 1
681 19:37:19.086248 GENERIC: 0.0: enabled 1
682 19:37:19.086688 USB0 port 0: enabled 1
683 19:37:19.089798 GENERIC: 0.0: enabled 1
684 19:37:19.093381 I2C: 00:1a: enabled 1
685 19:37:19.096764 I2C: 00:31: enabled 1
686 19:37:19.097379 I2C: 00:32: enabled 1
687 19:37:19.099702 I2C: 00:10: enabled 1
688 19:37:19.102762 I2C: 00:15: enabled 1
689 19:37:19.103221 GENERIC: 0.0: enabled 0
690 19:37:19.106518 GENERIC: 1.0: enabled 0
691 19:37:19.109461 GENERIC: 0.0: enabled 1
692 19:37:19.109944 SPI: 00: enabled 1
693 19:37:19.112859 SPI: 00: enabled 1
694 19:37:19.116530 PNP: 0c09.0: enabled 1
695 19:37:19.116963 GENERIC: 0.0: enabled 1
696 19:37:19.119361 USB3 port 0: enabled 1
697 19:37:19.122706 USB3 port 1: enabled 1
698 19:37:19.125980 USB3 port 2: enabled 0
699 19:37:19.126418 USB3 port 3: enabled 0
700 19:37:19.129440 USB2 port 0: enabled 0
701 19:37:19.132714 USB2 port 1: enabled 1
702 19:37:19.133243 USB2 port 2: enabled 1
703 19:37:19.136267 USB2 port 3: enabled 0
704 19:37:19.139773 USB2 port 4: enabled 1
705 19:37:19.140313 USB2 port 5: enabled 0
706 19:37:19.142608 USB2 port 6: enabled 0
707 19:37:19.145953 USB2 port 7: enabled 0
708 19:37:19.149634 USB2 port 8: enabled 0
709 19:37:19.150072 USB2 port 9: enabled 0
710 19:37:19.152612 USB3 port 0: enabled 0
711 19:37:19.156384 USB3 port 1: enabled 1
712 19:37:19.156919 USB3 port 2: enabled 0
713 19:37:19.159351 USB3 port 3: enabled 0
714 19:37:19.162367 GENERIC: 0.0: enabled 1
715 19:37:19.165655 GENERIC: 1.0: enabled 1
716 19:37:19.166093 APIC: 01: enabled 1
717 19:37:19.169311 APIC: 03: enabled 1
718 19:37:19.169897 APIC: 05: enabled 1
719 19:37:19.172592
720 19:37:19.173069 APIC: 07: enabled 1
721 19:37:19.175671 APIC: 06: enabled 1
722 19:37:19.176146 APIC: 02: enabled 1
723 19:37:19.179223 APIC: 04: enabled 1
724 19:37:19.182677 Compare with tree...
725 19:37:19.183208 Root Device: enabled 1
726 19:37:19.185524 DOMAIN: 0000: enabled 1
727 19:37:19.188964 PCI: 00:00.0: enabled 1
728 19:37:19.192600 PCI: 00:02.0: enabled 1
729 19:37:19.193136 PCI: 00:04.0: enabled 1
730 19:37:19.195760 GENERIC: 0.0: enabled 1
731 19:37:19.198852 PCI: 00:05.0: enabled 1
732 19:37:19.202443 PCI: 00:06.0: enabled 0
733 19:37:19.205642 PCI: 00:07.0: enabled 0
734 19:37:19.206199 GENERIC: 0.0: enabled 1
735 19:37:19.208877
736 19:37:19.209316 PCI: 00:07.1: enabled 0
737 19:37:19.212535 GENERIC: 1.0: enabled 1
738 19:37:19.215586 PCI: 00:07.2: enabled 0
739 19:37:19.218648 GENERIC: 0.0: enabled 1
740 19:37:19.222092 PCI: 00:07.3: enabled 0
741 19:37:19.222526 GENERIC: 1.0: enabled 1
742 19:37:19.225363 PCI: 00:08.0: enabled 1
743 19:37:19.228857 PCI: 00:09.0: enabled 0
744 19:37:19.232350 PCI: 00:0a.0: enabled 0
745 19:37:19.235467 PCI: 00:0d.0: enabled 1
746 19:37:19.235909 USB0 port 0: enabled 1
747 19:37:19.238776 USB3 port 0: enabled 1
748 19:37:19.242274 USB3 port 1: enabled 1
749 19:37:19.245651 USB3 port 2: enabled 0
750 19:37:19.248771 USB3 port 3: enabled 0
751 19:37:19.249303 PCI: 00:0d.1: enabled 0
752 19:37:19.252287 PCI: 00:0d.2: enabled 0
753 19:37:19.255575 GENERIC: 0.0: enabled 1
754 19:37:19.258806 PCI: 00:0d.3: enabled 0
755 19:37:19.262408 PCI: 00:0e.0: enabled 0
756 19:37:19.262945 PCI: 00:10.2: enabled 1
757 19:37:19.265114 PCI: 00:10.6: enabled 0
758 19:37:19.268781 PCI: 00:10.7: enabled 0
759 19:37:19.272005 PCI: 00:12.0: enabled 0
760 19:37:19.275373 PCI: 00:12.6: enabled 0
761 19:37:19.275832 PCI: 00:13.0: enabled 0
762 19:37:19.278942 PCI: 00:14.0: enabled 1
763 19:37:19.281890 USB0 port 0: enabled 1
764 19:37:19.284943 USB2 port 0: enabled 0
765 19:37:19.288486 USB2 port 1: enabled 1
766 19:37:19.291531 USB2 port 2: enabled 1
767 19:37:19.291974 USB2 port 3: enabled 0
768 19:37:19.294876 USB2 port 4: enabled 1
769 19:37:19.298557 USB2 port 5: enabled 0
770 19:37:19.301588 USB2 port 6: enabled 0
771 19:37:19.304837 USB2 port 7: enabled 0
772 19:37:19.305291 USB2 port 8: enabled 0
773 19:37:19.308367 USB2 port 9: enabled 0
774 19:37:19.311449 USB3 port 0: enabled 0
775 19:37:19.314553 USB3 port 1: enabled 1
776 19:37:19.318101 USB3 port 2: enabled 0
777 19:37:19.321797 USB3 port 3: enabled 0
778 19:37:19.322231 PCI: 00:14.1: enabled 0
779 19:37:19.325197 PCI: 00:14.2: enabled 1
780 19:37:19.328049 PCI: 00:14.3: enabled 1
781 19:37:19.331626 GENERIC: 0.0: enabled 1
782 19:37:19.335193 PCI: 00:15.0: enabled 1
783 19:37:19.335736 I2C: 00:1a: enabled 1
784 19:37:19.338402 I2C: 00:31: enabled 1
785 19:37:19.341392 I2C: 00:32: enabled 1
786 19:37:19.345361 PCI: 00:15.1: enabled 1
787 19:37:19.346071 I2C: 00:10: enabled 1
788 19:37:19.347925 PCI: 00:15.2: enabled 1
789 19:37:19.351625 PCI: 00:15.3: enabled 1
790 19:37:19.355439 PCI: 00:16.0: enabled 1
791 19:37:19.358383 PCI: 00:16.1: enabled 0
792 19:37:19.358913 PCI: 00:16.2: enabled 0
793 19:37:19.361838 PCI: 00:16.3: enabled 0
794 19:37:19.365244 PCI: 00:16.4: enabled 0
795 19:37:19.369233 PCI: 00:16.5: enabled 0
796 19:37:19.369802 PCI: 00:17.0: enabled 1
797 19:37:19.372493 PCI: 00:19.0: enabled 0
798 19:37:19.375977 PCI: 00:19.1: enabled 1
799 19:37:19.379352 I2C: 00:15: enabled 1
800 19:37:19.379788 PCI: 00:19.2: enabled 0
801 19:37:19.382571 PCI: 00:1d.0: enabled 1
802 19:37:19.385694 GENERIC: 0.0: enabled 1
803 19:37:19.389280 PCI: 00:1e.0: enabled 1
804 19:37:19.439339 PCI: 00:1e.1: enabled 0
805 19:37:19.439912 PCI: 00:1e.2: enabled 1
806 19:37:19.440297 SPI: 00: enabled 1
807 19:37:19.441026 PCI: 00:1e.3: enabled 1
808 19:37:19.441404 SPI: 00: enabled 1
809 19:37:19.441781 PCI: 00:1f.0: enabled 1
810 19:37:19.442118 PNP: 0c09.0: enabled 1
811 19:37:19.442444 PCI: 00:1f.1: enabled 0
812 19:37:19.442767 PCI: 00:1f.2: enabled 1
813 19:37:19.443089 GENERIC: 0.0: enabled 1
814 19:37:19.443407 GENERIC: 0.0: enabled 1
815 19:37:19.443723 GENERIC: 1.0: enabled 1
816 19:37:19.444037 PCI: 00:1f.3: enabled 1
817 19:37:19.444323 PCI: 00:1f.4: enabled 0
818 19:37:19.444603 PCI: 00:1f.5: enabled 1
819 19:37:19.444901 PCI: 00:1f.6: enabled 0
820 19:37:19.445210 PCI: 00:1f.7: enabled 0
821 19:37:19.445538 CPU_CLUSTER: 0: enabled 1
822 19:37:19.445892 APIC: 00: enabled 1
823 19:37:19.446205 APIC: 01: enabled 1
824 19:37:19.491150 APIC: 03: enabled 1
825 19:37:19.491759 APIC: 05: enabled 1
826 19:37:19.492156 APIC: 07: enabled 1
827 19:37:19.492907 APIC: 06: enabled 1
828 19:37:19.493299 APIC: 02: enabled 1
829 19:37:19.493670 APIC: 04: enabled 1
830 19:37:19.493985 Root Device scanning...
831 19:37:19.494290 scan_static_bus for Root Device
832 19:37:19.494587 DOMAIN: 0000 enabled
833 19:37:19.494878 CPU_CLUSTER: 0 enabled
834 19:37:19.495166 DOMAIN: 0000 scanning...
835 19:37:19.495454 PCI: pci_scan_bus for bus 00
836 19:37:19.495736 PCI: 00:00.0 [8086/0000] ops
837 19:37:19.496016 PCI: 00:00.0 [8086/9a12] enabled
838 19:37:19.496620 PCI: 00:02.0 [8086/0000] bus ops
839 19:37:19.496932 PCI: 00:02.0 [8086/9a40] enabled
840 19:37:19.497221 PCI: 00:04.0 [8086/0000] bus ops
841 19:37:19.497570 PCI: 00:04.0 [8086/9a03] enabled
842 19:37:19.525638 PCI: 00:05.0 [8086/9a19] enabled
843 19:37:19.526241 PCI: 00:07.0 [0000/0000] hidden
844 19:37:19.526991 PCI: 00:08.0 [8086/9a11] enabled
845 19:37:19.527389 PCI: 00:0a.0 [8086/9a0d] disabled
846 19:37:19.527737 PCI: 00:0d.0 [8086/0000] bus ops
847 19:37:19.528070 PCI: 00:0d.0 [8086/9a13] enabled
848 19:37:19.528397 PCI: 00:14.0 [8086/0000] bus ops
849 19:37:19.528790 PCI: 00:14.0 [8086/a0ed] enabled
850 19:37:19.529146 PCI: 00:14.2 [8086/a0ef] enabled
851 19:37:19.529464 PCI: 00:14.3 [8086/0000] bus ops
852 19:37:19.530183
853 19:37:19.530567 PCI: 00:14.3 [8086/a0f0] enabled
854 19:37:19.532980 PCI: 00:15.0 [8086/0000] bus ops
855 19:37:19.533601 PCI: 00:15.0 [8086/a0e8] enabled
856 19:37:19.536271 PCI: 00:15.1 [8086/0000] bus ops
857 19:37:19.539985 PCI: 00:15.1 [8086/a0e9] enabled
858 19:37:19.542703 PCI: 00:15.2 [8086/0000] bus ops
859 19:37:19.546384 PCI: 00:15.2 [8086/a0ea] enabled
860 19:37:19.549696 PCI: 00:15.3 [8086/0000] bus ops
861 19:37:19.553060 PCI: 00:15.3 [8086/a0eb] enabled
862 19:37:19.556770 PCI: 00:16.0 [8086/0000] ops
863 19:37:19.559677 PCI: 00:16.0 [8086/a0e0] enabled
864 19:37:19.565931 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 19:37:19.569634 PCI: 00:19.0 [8086/0000] bus ops
866 19:37:19.573128 PCI: 00:19.0 [8086/a0c5] disabled
867 19:37:19.576071 PCI: 00:19.1 [8086/0000] bus ops
868 19:37:19.578979 PCI: 00:19.1 [8086/a0c6] enabled
869 19:37:19.582698 PCI: 00:1d.0 [8086/0000] bus ops
870 19:37:19.585760 PCI: 00:1d.0 [8086/a0b0] enabled
871 19:37:19.589350 PCI: 00:1e.0 [8086/0000] ops
872 19:37:19.592846 PCI: 00:1e.0 [8086/a0a8] enabled
873 19:37:19.596029 PCI: 00:1e.2 [8086/0000] bus ops
874 19:37:19.599347 PCI: 00:1e.2 [8086/a0aa] enabled
875 19:37:19.602694 PCI: 00:1e.3 [8086/0000] bus ops
876 19:37:19.605770 PCI: 00:1e.3 [8086/a0ab] enabled
877 19:37:19.609235 PCI: 00:1f.0 [8086/0000] bus ops
878 19:37:19.612783 PCI: 00:1f.0 [8086/a087] enabled
879 19:37:19.613368 RTC Init
880 19:37:19.615646
881 19:37:19.619418 Set power on after power failure.
882 19:37:19.620005 Disabling Deep S3
883 19:37:19.622620 Disabling Deep S3
884 19:37:19.623211 Disabling Deep S4
885 19:37:19.625570 Disabling Deep S4
886 19:37:19.626047 Disabling Deep S5
887 19:37:19.628888 Disabling Deep S5
888 19:37:19.632030 PCI: 00:1f.2 [0000/0000] hidden
889 19:37:19.635581 PCI: 00:1f.3 [8086/0000] bus ops
890 19:37:19.638737 PCI: 00:1f.3 [8086/a0c8] enabled
891 19:37:19.642505 PCI: 00:1f.5 [8086/0000] bus ops
892 19:37:19.645430 PCI: 00:1f.5 [8086/a0a4] enabled
893 19:37:19.648448 PCI: Leftover static devices:
894 19:37:19.649107 PCI: 00:10.2
895 19:37:19.651889 PCI: 00:10.6
896 19:37:19.652330 PCI: 00:10.7
897 19:37:19.655300 PCI: 00:06.0
898 19:37:19.655737 PCI: 00:07.1
899 19:37:19.656085 PCI: 00:07.2
900 19:37:19.659037 PCI: 00:07.3
901 19:37:19.659474 PCI: 00:09.0
902 19:37:19.662703 PCI: 00:0d.1
903 19:37:19.663260 PCI: 00:0d.2
904 19:37:19.663611 PCI: 00:0d.3
905 19:37:19.665267 PCI: 00:0e.0
906 19:37:19.665737 PCI: 00:12.0
907 19:37:19.668740 PCI: 00:12.6
908 19:37:19.669172 PCI: 00:13.0
909 19:37:19.669553 PCI: 00:14.1
910 19:37:19.671982
911 19:37:19.672417 PCI: 00:16.1
912 19:37:19.672757 PCI: 00:16.2
913 19:37:19.675070 PCI: 00:16.3
914 19:37:19.675579 PCI: 00:16.4
915 19:37:19.678667 PCI: 00:16.5
916 19:37:19.679100 PCI: 00:17.0
917 19:37:19.679445 PCI: 00:19.2
918 19:37:19.681926 PCI: 00:1e.1
919 19:37:19.682359 PCI: 00:1f.1
920 19:37:19.685373 PCI: 00:1f.4
921 19:37:19.685833 PCI: 00:1f.6
922 19:37:19.686176 PCI: 00:1f.7
923 19:37:19.688785 PCI: Check your devicetree.cb.
924 19:37:19.692239 PCI: 00:02.0 scanning...
925 19:37:19.695620 scan_generic_bus for PCI: 00:02.0
926 19:37:19.698585 scan_generic_bus for PCI: 00:02.0 done
927 19:37:19.705587 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
928 19:37:19.708910 PCI: 00:04.0 scanning...
929 19:37:19.711845 scan_generic_bus for PCI: 00:04.0
930 19:37:19.712380 GENERIC: 0.0 enabled
931 19:37:19.718637 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
932 19:37:19.725401 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
933 19:37:19.726018 PCI: 00:0d.0 scanning...
934 19:37:19.728709 scan_static_bus for PCI: 00:0d.0
935 19:37:19.732067 USB0 port 0 enabled
936 19:37:19.735256 USB0 port 0 scanning...
937 19:37:19.738242 scan_static_bus for USB0 port 0
938 19:37:19.738818 USB3 port 0 enabled
939 19:37:19.741409
940 19:37:19.741986 USB3 port 1 enabled
941 19:37:19.745045 USB3 port 2 disabled
942 19:37:19.745554 USB3 port 3 disabled
943 19:37:19.748513 USB3 port 0 scanning...
944 19:37:19.751422 scan_static_bus for USB3 port 0
945 19:37:19.755620 scan_static_bus for USB3 port 0 done
946 19:37:19.761142 scan_bus: bus USB3 port 0 finished in 6 msecs
947 19:37:19.761676 USB3 port 1 scanning...
948 19:37:19.765259 scan_static_bus for USB3 port 1
949 19:37:19.772053 scan_static_bus for USB3 port 1 done
950 19:37:19.774762 scan_bus: bus USB3 port 1 finished in 6 msecs
951 19:37:19.778613 scan_static_bus for USB0 port 0 done
952 19:37:19.781504 scan_bus: bus USB0 port 0 finished in 43 msecs
953 19:37:19.788929 scan_static_bus for PCI: 00:0d.0 done
954 19:37:19.791326 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
955 19:37:19.794921 PCI: 00:14.0 scanning...
956 19:37:19.797923 scan_static_bus for PCI: 00:14.0
957 19:37:19.801741 USB0 port 0 enabled
958 19:37:19.802317 USB0 port 0 scanning...
959 19:37:19.805128 scan_static_bus for USB0 port 0
960 19:37:19.807686 USB2 port 0 disabled
961 19:37:19.811358 USB2 port 1 enabled
962 19:37:19.811931 USB2 port 2 enabled
963 19:37:19.814733 USB2 port 3 disabled
964 19:37:19.818250 USB2 port 4 enabled
965 19:37:19.818817 USB2 port 5 disabled
966 19:37:19.821119 USB2 port 6 disabled
967 19:37:19.821761 USB2 port 7 disabled
968 19:37:19.824398 USB2 port 8 disabled
969 19:37:19.827681 USB2 port 9 disabled
970 19:37:19.828235 USB3 port 0 disabled
971 19:37:19.830869 USB3 port 1 enabled
972 19:37:19.834313 USB3 port 2 disabled
973 19:37:19.834791 USB3 port 3 disabled
974 19:37:19.837644 USB2 port 1 scanning...
975 19:37:19.840992 scan_static_bus for USB2 port 1
976 19:37:19.844633 scan_static_bus for USB2 port 1 done
977 19:37:19.850858 scan_bus: bus USB2 port 1 finished in 6 msecs
978 19:37:19.851305 USB2 port 2 scanning...
979 19:37:19.854266 scan_static_bus for USB2 port 2
980 19:37:19.860926 scan_static_bus for USB2 port 2 done
981 19:37:19.864563 scan_bus: bus USB2 port 2 finished in 6 msecs
982 19:37:19.868002 USB2 port 4 scanning...
983 19:37:19.870715 scan_static_bus for USB2 port 4
984 19:37:19.874115 scan_static_bus for USB2 port 4 done
985 19:37:19.877363 scan_bus: bus USB2 port 4 finished in 6 msecs
986 19:37:19.880950 USB3 port 1 scanning...
987 19:37:19.884123 scan_static_bus for USB3 port 1
988 19:37:19.887346 scan_static_bus for USB3 port 1 done
989 19:37:19.890574 scan_bus: bus USB3 port 1 finished in 6 msecs
990 19:37:19.894232
991 19:37:19.897678 scan_static_bus for USB0 port 0 done
992 19:37:19.901063 scan_bus: bus USB0 port 0 finished in 93 msecs
993 19:37:19.904159 scan_static_bus for PCI: 00:14.0 done
994 19:37:19.911059 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
995 19:37:19.911710 PCI: 00:14.3 scanning...
996 19:37:19.913778 scan_static_bus for PCI: 00:14.3
997 19:37:19.917217 GENERIC: 0.0 enabled
998 19:37:19.920447 scan_static_bus for PCI: 00:14.3 done
999 19:37:19.926944 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1000 19:37:19.927377 PCI: 00:15.0 scanning...
1001 19:37:19.930407
1002 19:37:19.933307 scan_static_bus for PCI: 00:15.0
1003 19:37:19.933778 I2C: 00:1a enabled
1004 19:37:19.936785 I2C: 00:31 enabled
1005 19:37:19.937302 I2C: 00:32 enabled
1006 19:37:19.940934 scan_static_bus for PCI: 00:15.0 done
1007 19:37:19.947733 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1008 19:37:19.948179 PCI: 00:15.1 scanning...
1009 19:37:19.950853
1010 19:37:19.954143 scan_static_bus for PCI: 00:15.1
1011 19:37:19.954574 I2C: 00:10 enabled
1012 19:37:19.957230 scan_static_bus for PCI: 00:15.1 done
1013 19:37:19.964534 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1014 19:37:19.965069 PCI: 00:15.2 scanning...
1015 19:37:19.967209
1016 19:37:19.970978 scan_static_bus for PCI: 00:15.2
1017 19:37:19.974274 scan_static_bus for PCI: 00:15.2 done
1018 19:37:19.977574 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1019 19:37:19.980637 PCI: 00:15.3 scanning...
1020 19:37:19.983946 scan_static_bus for PCI: 00:15.3
1021 19:37:19.987167 scan_static_bus for PCI: 00:15.3 done
1022 19:37:19.993905 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1023 19:37:19.994338 PCI: 00:19.1 scanning...
1024 19:37:19.997169 scan_static_bus for PCI: 00:19.1
1025 19:37:20.000663 I2C: 00:15 enabled
1026 19:37:20.003381 scan_static_bus for PCI: 00:19.1 done
1027 19:37:20.010088 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1028 19:37:20.010535 PCI: 00:1d.0 scanning...
1029 19:37:20.016956 do_pci_scan_bridge for PCI: 00:1d.0
1030 19:37:20.017519 PCI: pci_scan_bus for bus 01
1031 19:37:20.020466 PCI: 01:00.0 [1c5c/174a] enabled
1032 19:37:20.023349 GENERIC: 0.0 enabled
1033 19:37:20.027140 Enabling Common Clock Configuration
1034 19:37:20.033403 L1 Sub-State supported from root port 29
1035 19:37:20.033873 L1 Sub-State Support = 0xf
1036 19:37:20.036757 CommonModeRestoreTime = 0x28
1037 19:37:20.043300 Power On Value = 0x16, Power On Scale = 0x0
1038 19:37:20.043736 ASPM: Enabled L1
1039 19:37:20.046849 PCIe: Max_Payload_Size adjusted to 128
1040 19:37:20.053322 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1041 19:37:20.053899 PCI: 00:1e.2 scanning...
1042 19:37:20.056924
1043 19:37:20.060059 scan_generic_bus for PCI: 00:1e.2
1044 19:37:20.060592 SPI: 00 enabled
1045 19:37:20.066747 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1046 19:37:20.069678 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1047 19:37:20.073494 PCI: 00:1e.3 scanning...
1048 19:37:20.076556 scan_generic_bus for PCI: 00:1e.3
1049 19:37:20.079637 SPI: 00 enabled
1050 19:37:20.086298 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1051 19:37:20.089833 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1052 19:37:20.092993 PCI: 00:1f.0 scanning...
1053 19:37:20.096161 scan_static_bus for PCI: 00:1f.0
1054 19:37:20.099437 PNP: 0c09.0 enabled
1055 19:37:20.099865 PNP: 0c09.0 scanning...
1056 19:37:20.103052 scan_static_bus for PNP: 0c09.0
1057 19:37:20.106141 scan_static_bus for PNP: 0c09.0 done
1058 19:37:20.112937 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1059 19:37:20.116420 scan_static_bus for PCI: 00:1f.0 done
1060 19:37:20.119631 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1061 19:37:20.122666 PCI: 00:1f.2 scanning...
1062 19:37:20.125994 scan_static_bus for PCI: 00:1f.2
1063 19:37:20.129187 GENERIC: 0.0 enabled
1064 19:37:20.132995 GENERIC: 0.0 scanning...
1065 19:37:20.136238 scan_static_bus for GENERIC: 0.0
1066 19:37:20.136768 GENERIC: 0.0 enabled
1067 19:37:20.139293 GENERIC: 1.0 enabled
1068 19:37:20.142672 scan_static_bus for GENERIC: 0.0 done
1069 19:37:20.149566 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1070 19:37:20.152534 scan_static_bus for PCI: 00:1f.2 done
1071 19:37:20.155825 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1072 19:37:20.159139 PCI: 00:1f.3 scanning...
1073 19:37:20.162653 scan_static_bus for PCI: 00:1f.3
1074 19:37:20.165909 scan_static_bus for PCI: 00:1f.3 done
1075 19:37:20.172626 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1076 19:37:20.173234 PCI: 00:1f.5 scanning...
1077 19:37:20.175897 scan_generic_bus for PCI: 00:1f.5
1078 19:37:20.179236
1079 19:37:20.182393 scan_generic_bus for PCI: 00:1f.5 done
1080 19:37:20.185856 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1081 19:37:20.192378 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1082 19:37:20.196026 scan_static_bus for Root Device done
1083 19:37:20.198913 scan_bus: bus Root Device finished in 737 msecs
1084 19:37:20.199406 done
1085 19:37:20.205797 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1086 19:37:20.208732 Chrome EC: UHEPI supported
1087 19:37:20.216134 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1088 19:37:20.223113 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1089 19:37:20.226290 SPI flash protection: WPSW=0 SRP0=0
1090 19:37:20.232712 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1091 19:37:20.236348 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1092 19:37:20.239642 found VGA at PCI: 00:02.0
1093 19:37:20.242633 Setting up VGA for PCI: 00:02.0
1094 19:37:20.249508 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1095 19:37:20.252788 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1096 19:37:20.256006 Allocating resources...
1097 19:37:20.259129 Reading resources...
1098 19:37:20.262248 Root Device read_resources bus 0 link: 0
1099 19:37:20.266043 DOMAIN: 0000 read_resources bus 0 link: 0
1100 19:37:20.272317 PCI: 00:04.0 read_resources bus 1 link: 0
1101 19:37:20.275909 PCI: 00:04.0 read_resources bus 1 link: 0 done
1102 19:37:20.282751 PCI: 00:0d.0 read_resources bus 0 link: 0
1103 19:37:20.285963 USB0 port 0 read_resources bus 0 link: 0
1104 19:37:20.292440 USB0 port 0 read_resources bus 0 link: 0 done
1105 19:37:20.296191 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1106 19:37:20.299180 PCI: 00:14.0 read_resources bus 0 link: 0
1107 19:37:20.302097
1108 19:37:20.305839 USB0 port 0 read_resources bus 0 link: 0
1109 19:37:20.312119 USB0 port 0 read_resources bus 0 link: 0 done
1110 19:37:20.315890 PCI: 00:14.0 read_resources bus 0 link: 0 done
1111 19:37:20.322361 PCI: 00:14.3 read_resources bus 0 link: 0
1112 19:37:20.325385 PCI: 00:14.3 read_resources bus 0 link: 0 done
1113 19:37:20.328882 PCI: 00:15.0 read_resources bus 0 link: 0
1114 19:37:20.336384 PCI: 00:15.0 read_resources bus 0 link: 0 done
1115 19:37:20.340188 PCI: 00:15.1 read_resources bus 0 link: 0
1116 19:37:20.346346 PCI: 00:15.1 read_resources bus 0 link: 0 done
1117 19:37:20.349258 PCI: 00:19.1 read_resources bus 0 link: 0
1118 19:37:20.356500 PCI: 00:19.1 read_resources bus 0 link: 0 done
1119 19:37:20.359538 PCI: 00:1d.0 read_resources bus 1 link: 0
1120 19:37:20.366649 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1121 19:37:20.369785 PCI: 00:1e.2 read_resources bus 2 link: 0
1122 19:37:20.376561 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1123 19:37:20.379547 PCI: 00:1e.3 read_resources bus 3 link: 0
1124 19:37:20.386509 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1125 19:37:20.389460 PCI: 00:1f.0 read_resources bus 0 link: 0
1126 19:37:20.396218 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1127 19:37:20.399624 PCI: 00:1f.2 read_resources bus 0 link: 0
1128 19:37:20.403052 GENERIC: 0.0 read_resources bus 0 link: 0
1129 19:37:20.410266 GENERIC: 0.0 read_resources bus 0 link: 0 done
1130 19:37:20.413196 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1131 19:37:20.420732 DOMAIN: 0000 read_resources bus 0 link: 0 done
1132 19:37:20.423934 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1133 19:37:20.430891 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1134 19:37:20.433568 Root Device read_resources bus 0 link: 0 done
1135 19:37:20.436972 Done reading resources.
1136 19:37:20.443940 Show resources in subtree (Root Device)...After reading.
1137 19:37:20.446993 Root Device child on link 0 DOMAIN: 0000
1138 19:37:20.450316 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1139 19:37:20.460464 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1140 19:37:20.470094 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1141 19:37:20.473649 PCI: 00:00.0
1142 19:37:20.483523 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1143 19:37:20.489990 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1144 19:37:20.500099 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1145 19:37:20.510511 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1146 19:37:20.520453 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1147 19:37:20.530275 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1148 19:37:20.539778 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1149 19:37:20.546558 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1150 19:37:20.556390 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1151 19:37:20.566667 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1152 19:37:20.576670 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1153 19:37:20.586537 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1154 19:37:20.592847 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1155 19:37:20.602913 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1156 19:37:20.613060 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1157 19:37:20.623005 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1158 19:37:20.632913 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1159 19:37:20.642853 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1160 19:37:20.649076 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1161 19:37:20.652661
1162 19:37:20.658982 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1163 19:37:20.662740 PCI: 00:02.0
1164 19:37:20.671930 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1165 19:37:20.682113 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1166 19:37:20.692324 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1167 19:37:20.695405 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1168 19:37:20.705463 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1169 19:37:20.709209 GENERIC: 0.0
1170 19:37:20.710020 PCI: 00:05.0
1171 19:37:20.719073 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1172 19:37:20.726045 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1173 19:37:20.726596 GENERIC: 0.0
1174 19:37:20.728806 PCI: 00:08.0
1175 19:37:20.738801 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 19:37:20.739245 PCI: 00:0a.0
1177 19:37:20.741932 PCI: 00:0d.0 child on link 0 USB0 port 0
1178 19:37:20.751879 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1179 19:37:20.758686 USB0 port 0 child on link 0 USB3 port 0
1180 19:37:20.759128 USB3 port 0
1181 19:37:20.761921 USB3 port 1
1182 19:37:20.762362 USB3 port 2
1183 19:37:20.765509 USB3 port 3
1184 19:37:20.768605 PCI: 00:14.0 child on link 0 USB0 port 0
1185 19:37:20.778830 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1186 19:37:20.785823 USB0 port 0 child on link 0 USB2 port 0
1187 19:37:20.786362 USB2 port 0
1188 19:37:20.788908 USB2 port 1
1189 19:37:20.789437 USB2 port 2
1190 19:37:20.792471 USB2 port 3
1191 19:37:20.793004 USB2 port 4
1192 19:37:20.795274 USB2 port 5
1193 19:37:20.795703 USB2 port 6
1194 19:37:20.798790 USB2 port 7
1195 19:37:20.799337 USB2 port 8
1196 19:37:20.801910 USB2 port 9
1197 19:37:20.802344 USB3 port 0
1198 19:37:20.804913 USB3 port 1
1199 19:37:20.808765 USB3 port 2
1200 19:37:20.809197 USB3 port 3
1201 19:37:20.811675 PCI: 00:14.2
1202 19:37:20.821671 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 19:37:20.831902 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1204 19:37:20.835199 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1205 19:37:20.844759 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1206 19:37:20.845151 GENERIC: 0.0
1207 19:37:20.851649 PCI: 00:15.0 child on link 0 I2C: 00:1a
1208 19:37:20.861384 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 19:37:20.861805 I2C: 00:1a
1210 19:37:20.864584 I2C: 00:31
1211 19:37:20.864896 I2C: 00:32
1212 19:37:20.868170 PCI: 00:15.1 child on link 0 I2C: 00:10
1213 19:37:20.877978 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 19:37:20.881541 I2C: 00:10
1215 19:37:20.882021 PCI: 00:15.2
1216 19:37:20.891103 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 19:37:20.894676 PCI: 00:15.3
1218 19:37:20.904778 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 19:37:20.905332 PCI: 00:16.0
1220 19:37:20.914294 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1221 19:37:20.917757 PCI: 00:19.0
1222 19:37:20.921613 PCI: 00:19.1 child on link 0 I2C: 00:15
1223 19:37:20.931291 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 19:37:20.934263 I2C: 00:15
1225 19:37:20.937892 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1226 19:37:20.947609 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1227 19:37:20.957919 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1228 19:37:20.964025 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1229 19:37:20.967711 GENERIC: 0.0
1230 19:37:20.968248 PCI: 01:00.0
1231 19:37:20.970707
1232 19:37:20.980642 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1233 19:37:20.987341 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1234 19:37:20.997449 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1235 19:37:21.000724 PCI: 00:1e.0
1236 19:37:21.010469 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1237 19:37:21.013846 PCI: 00:1e.2 child on link 0 SPI: 00
1238 19:37:21.023855 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 19:37:21.027181 SPI: 00
1240 19:37:21.030779 PCI: 00:1e.3 child on link 0 SPI: 00
1241 19:37:21.040305 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 19:37:21.040699 SPI: 00
1243 19:37:21.043819 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1244 19:37:21.053663 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1245 19:37:21.057790 PNP: 0c09.0
1246 19:37:21.063676 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1247 19:37:21.070242 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1248 19:37:21.077059 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1249 19:37:21.086811 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1250 19:37:21.093466 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1251 19:37:21.093913 GENERIC: 0.0
1252 19:37:21.096726 GENERIC: 1.0
1253 19:37:21.097109 PCI: 00:1f.3
1254 19:37:21.106562 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1255 19:37:21.116613 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1256 19:37:21.120056 PCI: 00:1f.5
1257 19:37:21.129841 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1258 19:37:21.133315 CPU_CLUSTER: 0 child on link 0 APIC: 00
1259 19:37:21.133740 APIC: 00
1260 19:37:21.136872 APIC: 01
1261 19:37:21.137370 APIC: 03
1262 19:37:21.137715 APIC: 05
1263 19:37:21.140355 APIC: 07
1264 19:37:21.140852 APIC: 06
1265 19:37:21.143559 APIC: 02
1266 19:37:21.144132 APIC: 04
1267 19:37:21.149950 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1268 19:37:21.156262 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1269 19:37:21.163234 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1270 19:37:21.169937 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1271 19:37:21.172946 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1272 19:37:21.176372 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1273 19:37:21.180091 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1274 19:37:21.183045
1275 19:37:21.189606 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1276 19:37:21.196165 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1277 19:37:21.203036 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1278 19:37:21.209642 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1279 19:37:21.215924 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1280 19:37:21.226201 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1281 19:37:21.233024 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1282 19:37:21.239479 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1283 19:37:21.242891 DOMAIN: 0000: Resource ranges:
1284 19:37:21.245871 * Base: 1000, Size: 800, Tag: 100
1285 19:37:21.249261 * Base: 1900, Size: e700, Tag: 100
1286 19:37:21.255909 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1287 19:37:21.262707 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1288 19:37:21.268933 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1289 19:37:21.276126 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1290 19:37:21.285719 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1291 19:37:21.291993 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1292 19:37:21.298701 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1293 19:37:21.308603 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1294 19:37:21.315397 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1295 19:37:21.322069 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1296 19:37:21.332064 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1297 19:37:21.338740 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1298 19:37:21.345643 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1299 19:37:21.351959 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1300 19:37:21.355470
1301 19:37:21.362009 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1302 19:37:21.368804 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1303 19:37:21.374996 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1304 19:37:21.385112 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1305 19:37:21.392091 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1306 19:37:21.398296 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1307 19:37:21.401700
1308 19:37:21.408643 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1309 19:37:21.414875 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1310 19:37:21.421246 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1311 19:37:21.424539
1312 19:37:21.431347 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1313 19:37:21.438418 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1314 19:37:21.441452 DOMAIN: 0000: Resource ranges:
1315 19:37:21.444820 * Base: 7fc00000, Size: 40400000, Tag: 200
1316 19:37:21.451109 * Base: d0000000, Size: 28000000, Tag: 200
1317 19:37:21.454476 * Base: fa000000, Size: 1000000, Tag: 200
1318 19:37:21.457886 * Base: fb001000, Size: 2fff000, Tag: 200
1319 19:37:21.464656 * Base: fe010000, Size: 2e000, Tag: 200
1320 19:37:21.467720 * Base: fe03f000, Size: d41000, Tag: 200
1321 19:37:21.471317 * Base: fed88000, Size: 8000, Tag: 200
1322 19:37:21.474324 * Base: fed93000, Size: d000, Tag: 200
1323 19:37:21.481043 * Base: feda2000, Size: 1e000, Tag: 200
1324 19:37:21.484212 * Base: fede0000, Size: 1220000, Tag: 200
1325 19:37:21.488081 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1326 19:37:21.494089 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1327 19:37:21.500801 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1328 19:37:21.507642 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1329 19:37:21.514127 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1330 19:37:21.520730 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1331 19:37:21.527389 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1332 19:37:21.534467 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1333 19:37:21.540651 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1334 19:37:21.546901 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1335 19:37:21.550428
1336 19:37:21.553779 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1337 19:37:21.556882
1338 19:37:21.560584 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1339 19:37:21.563547
1340 19:37:21.567083 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1341 19:37:21.570521
1342 19:37:21.573819 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1343 19:37:21.576724
1344 19:37:21.583494 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1345 19:37:21.590024 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1346 19:37:21.596725 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1347 19:37:21.603223 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1348 19:37:21.609771 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1349 19:37:21.616932 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1350 19:37:21.623234 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1351 19:37:21.629712 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1352 19:37:21.636896 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1353 19:37:21.642980 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1354 19:37:21.649739 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1355 19:37:21.652808 PCI: 00:1d.0: Resource ranges:
1356 19:37:21.656496 * Base: 7fc00000, Size: 100000, Tag: 200
1357 19:37:21.662734 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1358 19:37:21.669746 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1359 19:37:21.676210 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1360 19:37:21.685836 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1361 19:37:21.692753 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1362 19:37:21.695663 Root Device assign_resources, bus 0 link: 0
1363 19:37:21.702838 DOMAIN: 0000 assign_resources, bus 0 link: 0
1364 19:37:21.709434 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1365 19:37:21.719296 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1366 19:37:21.725980 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1367 19:37:21.735724 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1368 19:37:21.739207 PCI: 00:04.0 assign_resources, bus 1 link: 0
1369 19:37:21.745577 PCI: 00:04.0 assign_resources, bus 1 link: 0
1370 19:37:21.752123 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1371 19:37:21.762260 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1372 19:37:21.768831 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1373 19:37:21.771982 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1374 19:37:21.778683 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1375 19:37:21.785313 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1376 19:37:21.792138 PCI: 00:14.0 assign_resources, bus 0 link: 0
1377 19:37:21.795203 PCI: 00:14.0 assign_resources, bus 0 link: 0
1378 19:37:21.805023 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1379 19:37:21.811845 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1380 19:37:21.821987 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1381 19:37:21.824807 PCI: 00:14.3 assign_resources, bus 0 link: 0
1382 19:37:21.828033 PCI: 00:14.3 assign_resources, bus 0 link: 0
1383 19:37:21.838197 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1384 19:37:21.841436 PCI: 00:15.0 assign_resources, bus 0 link: 0
1385 19:37:21.847789 PCI: 00:15.0 assign_resources, bus 0 link: 0
1386 19:37:21.854441 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1387 19:37:21.861370 PCI: 00:15.1 assign_resources, bus 0 link: 0
1388 19:37:21.864791 PCI: 00:15.1 assign_resources, bus 0 link: 0
1389 19:37:21.870980 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1390 19:37:21.881072 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1391 19:37:21.887592 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1392 19:37:21.897802 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1393 19:37:21.901248 PCI: 00:19.1 assign_resources, bus 0 link: 0
1394 19:37:21.907459 PCI: 00:19.1 assign_resources, bus 0 link: 0
1395 19:37:21.914193 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1396 19:37:21.924186 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1397 19:37:21.934176 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1398 19:37:21.937580 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1399 19:37:21.947294 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1400 19:37:21.953827 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1401 19:37:21.960348 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1402 19:37:21.967847 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1403 19:37:21.974277 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1404 19:37:21.981189 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1405 19:37:21.984200 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1406 19:37:21.993708 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1407 19:37:21.997801 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1408 19:37:22.000627 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1409 19:37:22.007491 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1410 19:37:22.010656 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1411 19:37:22.017091 LPC: Trying to open IO window from 800 size 1ff
1412 19:37:22.024018 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1413 19:37:22.033930 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1414 19:37:22.040400 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1415 19:37:22.047333 DOMAIN: 0000 assign_resources, bus 0 link: 0
1416 19:37:22.050266 Root Device assign_resources, bus 0 link: 0
1417 19:37:22.053525 Done setting resources.
1418 19:37:22.060034 Show resources in subtree (Root Device)...After assigning values.
1419 19:37:22.063668 Root Device child on link 0 DOMAIN: 0000
1420 19:37:22.066826 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1421 19:37:22.076765 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1422 19:37:22.086714 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1423 19:37:22.090549 PCI: 00:00.0
1424 19:37:22.099738 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1425 19:37:22.106748 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1426 19:37:22.116354 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1427 19:37:22.126354 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1428 19:37:22.136556 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1429 19:37:22.146738 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1430 19:37:22.153330 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1431 19:37:22.163149 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1432 19:37:22.173359 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1433 19:37:22.183286 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1434 19:37:22.192960 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1435 19:37:22.203070 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1436 19:37:22.209606 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1437 19:37:22.219619 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1438 19:37:22.229547 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1439 19:37:22.239677 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1440 19:37:22.249608 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1441 19:37:22.259184 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1442 19:37:22.265930 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1443 19:37:22.275829 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1444 19:37:22.278875 PCI: 00:02.0
1445 19:37:22.288869 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1446 19:37:22.298865 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1447 19:37:22.309054 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1448 19:37:22.312046 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1449 19:37:22.326088 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1450 19:37:22.326531 GENERIC: 0.0
1451 19:37:22.328857 PCI: 00:05.0
1452 19:37:22.338935 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1453 19:37:22.342210 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1454 19:37:22.345675 GENERIC: 0.0
1455 19:37:22.346111 PCI: 00:08.0
1456 19:37:22.355278 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1457 19:37:22.359085 PCI: 00:0a.0
1458 19:37:22.362086 PCI: 00:0d.0 child on link 0 USB0 port 0
1459 19:37:22.371893 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1460 19:37:22.378721 USB0 port 0 child on link 0 USB3 port 0
1461 19:37:22.378909 USB3 port 0
1462 19:37:22.381649 USB3 port 1
1463 19:37:22.381836 USB3 port 2
1464 19:37:22.385101 USB3 port 3
1465 19:37:22.388448 PCI: 00:14.0 child on link 0 USB0 port 0
1466 19:37:22.398841 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1467 19:37:22.405202 USB0 port 0 child on link 0 USB2 port 0
1468 19:37:22.405402 USB2 port 0
1469 19:37:22.409010 USB2 port 1
1470 19:37:22.409449 USB2 port 2
1471 19:37:22.411983 USB2 port 3
1472 19:37:22.412421 USB2 port 4
1473 19:37:22.415713 USB2 port 5
1474 19:37:22.416151 USB2 port 6
1475 19:37:22.418371 USB2 port 7
1476 19:37:22.418807 USB2 port 8
1477 19:37:22.422101 USB2 port 9
1478 19:37:22.422538 USB3 port 0
1479 19:37:22.425400 USB3 port 1
1480 19:37:22.425871 USB3 port 2
1481 19:37:22.428722 USB3 port 3
1482 19:37:22.429159 PCI: 00:14.2
1483 19:37:22.441782 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1484 19:37:22.451993 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1485 19:37:22.455318 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1486 19:37:22.465105 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1487 19:37:22.468140 GENERIC: 0.0
1488 19:37:22.471481 PCI: 00:15.0 child on link 0 I2C: 00:1a
1489 19:37:22.481356 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1490 19:37:22.484526 I2C: 00:1a
1491 19:37:22.484683 I2C: 00:31
1492 19:37:22.488026 I2C: 00:32
1493 19:37:22.491415 PCI: 00:15.1 child on link 0 I2C: 00:10
1494 19:37:22.501458 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1495 19:37:22.501945 I2C: 00:10
1496 19:37:22.504567 PCI: 00:15.2
1497 19:37:22.514970 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1498 19:37:22.517974 PCI: 00:15.3
1499 19:37:22.527940 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1500 19:37:22.528180 PCI: 00:16.0
1501 19:37:22.537718 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1502 19:37:22.541121 PCI: 00:19.0
1503 19:37:22.544186 PCI: 00:19.1 child on link 0 I2C: 00:15
1504 19:37:22.554215 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1505 19:37:22.557622 I2C: 00:15
1506 19:37:22.560994 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1507 19:37:22.570582 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1508 19:37:22.580574 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1509 19:37:22.593807 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1510 19:37:22.593970 GENERIC: 0.0
1511 19:37:22.597154 PCI: 01:00.0
1512 19:37:22.607175 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1513 19:37:22.616968 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1514 19:37:22.627181 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1515 19:37:22.630344 PCI: 00:1e.0
1516 19:37:22.640627 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1517 19:37:22.643701 PCI: 00:1e.2 child on link 0 SPI: 00
1518 19:37:22.653906 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1519 19:37:22.657338 SPI: 00
1520 19:37:22.660520 PCI: 00:1e.3 child on link 0 SPI: 00
1521 19:37:22.670634 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1522 19:37:22.671071 SPI: 00
1523 19:37:22.677256 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1524 19:37:22.683653 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1525 19:37:22.687290 PNP: 0c09.0
1526 19:37:22.693437 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1527 19:37:22.700370 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1528 19:37:22.710195 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1529 19:37:22.716700 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1530 19:37:22.723356 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1531 19:37:22.723667 GENERIC: 0.0
1532 19:37:22.726552 GENERIC: 1.0
1533 19:37:22.726860 PCI: 00:1f.3
1534 19:37:22.740077 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1535 19:37:22.749965 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1536 19:37:22.750492 PCI: 00:1f.5
1537 19:37:22.760026 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1538 19:37:22.766407 CPU_CLUSTER: 0 child on link 0 APIC: 00
1539 19:37:22.766648 APIC: 00
1540 19:37:22.766829 APIC: 01
1541 19:37:22.769803 APIC: 03
1542 19:37:22.769985 APIC: 05
1543 19:37:22.772922 APIC: 07
1544 19:37:22.773074 APIC: 06
1545 19:37:22.773193 APIC: 02
1546 19:37:22.776241 APIC: 04
1547 19:37:22.780045 Done allocating resources.
1548 19:37:22.783206 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1549 19:37:22.789550 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1550 19:37:22.793033 Configure GPIOs for I2S audio on UP4.
1551 19:37:22.800395 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1552 19:37:22.803716 Enabling resources...
1553 19:37:22.806947 PCI: 00:00.0 subsystem <- 8086/9a12
1554 19:37:22.810380 PCI: 00:00.0 cmd <- 06
1555 19:37:22.813833 PCI: 00:02.0 subsystem <- 8086/9a40
1556 19:37:22.817120 PCI: 00:02.0 cmd <- 03
1557 19:37:22.820246 PCI: 00:04.0 subsystem <- 8086/9a03
1558 19:37:22.823317 PCI: 00:04.0 cmd <- 02
1559 19:37:22.826809 PCI: 00:05.0 subsystem <- 8086/9a19
1560 19:37:22.826962 PCI: 00:05.0 cmd <- 02
1561 19:37:22.833498 PCI: 00:08.0 subsystem <- 8086/9a11
1562 19:37:22.833653 PCI: 00:08.0 cmd <- 06
1563 19:37:22.836916 PCI: 00:0d.0 subsystem <- 8086/9a13
1564 19:37:22.840207 PCI: 00:0d.0 cmd <- 02
1565 19:37:22.843291 PCI: 00:14.0 subsystem <- 8086/a0ed
1566 19:37:22.846698 PCI: 00:14.0 cmd <- 02
1567 19:37:22.849842 PCI: 00:14.2 subsystem <- 8086/a0ef
1568 19:37:22.853362 PCI: 00:14.2 cmd <- 02
1569 19:37:22.856776 PCI: 00:14.3 subsystem <- 8086/a0f0
1570 19:37:22.860042 PCI: 00:14.3 cmd <- 02
1571 19:37:22.863013 PCI: 00:15.0 subsystem <- 8086/a0e8
1572 19:37:22.866585 PCI: 00:15.0 cmd <- 02
1573 19:37:22.869774 PCI: 00:15.1 subsystem <- 8086/a0e9
1574 19:37:22.873288 PCI: 00:15.1 cmd <- 02
1575 19:37:22.876651 PCI: 00:15.2 subsystem <- 8086/a0ea
1576 19:37:22.876805 PCI: 00:15.2 cmd <- 02
1577 19:37:22.883120 PCI: 00:15.3 subsystem <- 8086/a0eb
1578 19:37:22.883346 PCI: 00:15.3 cmd <- 02
1579 19:37:22.886521 PCI: 00:16.0 subsystem <- 8086/a0e0
1580 19:37:22.890178 PCI: 00:16.0 cmd <- 02
1581 19:37:22.893178 PCI: 00:19.1 subsystem <- 8086/a0c6
1582 19:37:22.896175 PCI: 00:19.1 cmd <- 02
1583 19:37:22.899652 PCI: 00:1d.0 bridge ctrl <- 0013
1584 19:37:22.902870 PCI: 00:1d.0 subsystem <- 8086/a0b0
1585 19:37:22.906422 PCI: 00:1d.0 cmd <- 06
1586 19:37:22.909687 PCI: 00:1e.0 subsystem <- 8086/a0a8
1587 19:37:22.913317 PCI: 00:1e.0 cmd <- 06
1588 19:37:22.916287 PCI: 00:1e.2 subsystem <- 8086/a0aa
1589 19:37:22.919360 PCI: 00:1e.2 cmd <- 06
1590 19:37:22.922857 PCI: 00:1e.3 subsystem <- 8086/a0ab
1591 19:37:22.926303 PCI: 00:1e.3 cmd <- 02
1592 19:37:22.929763 PCI: 00:1f.0 subsystem <- 8086/a087
1593 19:37:22.930066 PCI: 00:1f.0 cmd <- 407
1594 19:37:22.936823 PCI: 00:1f.3 subsystem <- 8086/a0c8
1595 19:37:22.937145 PCI: 00:1f.3 cmd <- 02
1596 19:37:22.939634 PCI: 00:1f.5 subsystem <- 8086/a0a4
1597 19:37:22.943136 PCI: 00:1f.5 cmd <- 406
1598 19:37:22.947874 PCI: 01:00.0 cmd <- 02
1599 19:37:22.952480 done.
1600 19:37:22.956130 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1601 19:37:22.959273 Initializing devices...
1602 19:37:22.962269 Root Device init
1603 19:37:22.965718 Chrome EC: Set SMI mask to 0x0000000000000000
1604 19:37:22.972585 Chrome EC: clear events_b mask to 0x0000000000000000
1605 19:37:22.979102 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1606 19:37:22.982433 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1607 19:37:22.989015 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1608 19:37:22.995970 Chrome EC: Set WAKE mask to 0x0000000000000000
1609 19:37:22.999008 fw_config match found: DB_USB=USB3_ACTIVE
1610 19:37:23.005944 Configure Right Type-C port orientation for retimer
1611 19:37:23.008820 Root Device init finished in 44 msecs
1612 19:37:23.012451 PCI: 00:00.0 init
1613 19:37:23.015580 CPU TDP = 9 Watts
1614 19:37:23.015893 CPU PL1 = 9 Watts
1615 19:37:23.018862 CPU PL2 = 40 Watts
1616 19:37:23.022037 CPU PL4 = 83 Watts
1617 19:37:23.025508 PCI: 00:00.0 init finished in 8 msecs
1618 19:37:23.025824 PCI: 00:02.0 init
1619 19:37:23.028865 GMA: Found VBT in CBFS
1620 19:37:23.032487 GMA: Found valid VBT in CBFS
1621 19:37:23.038732 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1622 19:37:23.045530 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1623 19:37:23.048684 PCI: 00:02.0 init finished in 18 msecs
1624 19:37:23.052461 PCI: 00:05.0 init
1625 19:37:23.055184 PCI: 00:05.0 init finished in 0 msecs
1626 19:37:23.058760 PCI: 00:08.0 init
1627 19:37:23.062176 PCI: 00:08.0 init finished in 0 msecs
1628 19:37:23.065283 PCI: 00:14.0 init
1629 19:37:23.068593 PCI: 00:14.0 init finished in 0 msecs
1630 19:37:23.071846 PCI: 00:14.2 init
1631 19:37:23.074953 PCI: 00:14.2 init finished in 0 msecs
1632 19:37:23.078717 PCI: 00:15.0 init
1633 19:37:23.078947 I2C bus 0 version 0x3230302a
1634 19:37:23.085176 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1635 19:37:23.088927 PCI: 00:15.0 init finished in 6 msecs
1636 19:37:23.089161 PCI: 00:15.1 init
1637 19:37:23.092034 I2C bus 1 version 0x3230302a
1638 19:37:23.095536 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1639 19:37:23.101679 PCI: 00:15.1 init finished in 6 msecs
1640 19:37:23.101909 PCI: 00:15.2 init
1641 19:37:23.104976 I2C bus 2 version 0x3230302a
1642 19:37:23.108356 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1643 19:37:23.111656 PCI: 00:15.2 init finished in 6 msecs
1644 19:37:23.114986 PCI: 00:15.3 init
1645 19:37:23.118277 I2C bus 3 version 0x3230302a
1646 19:37:23.121894 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1647 19:37:23.124852 PCI: 00:15.3 init finished in 6 msecs
1648 19:37:23.128578 PCI: 00:16.0 init
1649 19:37:23.131667 PCI: 00:16.0 init finished in 0 msecs
1650 19:37:23.135113 PCI: 00:19.1 init
1651 19:37:23.138630 I2C bus 5 version 0x3230302a
1652 19:37:23.141539 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1653 19:37:23.145078 PCI: 00:19.1 init finished in 6 msecs
1654 19:37:23.148634 PCI: 00:1d.0 init
1655 19:37:23.149141 Initializing PCH PCIe bridge.
1656 19:37:23.155293 PCI: 00:1d.0 init finished in 3 msecs
1657 19:37:23.158399 PCI: 00:1f.0 init
1658 19:37:23.161615 IOAPIC: Initializing IOAPIC at 0xfec00000
1659 19:37:23.164764 IOAPIC: Bootstrap Processor Local APIC = 0x00
1660 19:37:23.168095 IOAPIC: ID = 0x02
1661 19:37:23.171242 IOAPIC: Dumping registers
1662 19:37:23.171556 reg 0x0000: 0x02000000
1663 19:37:23.174555 reg 0x0001: 0x00770020
1664 19:37:23.178175 reg 0x0002: 0x00000000
1665 19:37:23.181367 PCI: 00:1f.0 init finished in 21 msecs
1666 19:37:23.184574 PCI: 00:1f.2 init
1667 19:37:23.188016 Disabling ACPI via APMC.
1668 19:37:23.191592 APMC done.
1669 19:37:23.194762 PCI: 00:1f.2 init finished in 6 msecs
1670 19:37:23.205616 PCI: 01:00.0 init
1671 19:37:23.209159 PCI: 01:00.0 init finished in 0 msecs
1672 19:37:23.212824 PNP: 0c09.0 init
1673 19:37:23.219293 Google Chrome EC uptime: 8.419 seconds
1674 19:37:23.223125 Google Chrome AP resets since EC boot: 0
1675 19:37:23.225908 Google Chrome most recent AP reset causes:
1676 19:37:23.232738 Google Chrome EC reset flags at last EC boot: reset-pin
1677 19:37:23.235855 PNP: 0c09.0 init finished in 19 msecs
1678 19:37:23.241256 Devices initialized
1679 19:37:23.244526 Show all devs... After init.
1680 19:37:23.248057 Root Device: enabled 1
1681 19:37:23.248501 DOMAIN: 0000: enabled 1
1682 19:37:23.251219 CPU_CLUSTER: 0: enabled 1
1683 19:37:23.254490 PCI: 00:00.0: enabled 1
1684 19:37:23.257986 PCI: 00:02.0: enabled 1
1685 19:37:23.258473 PCI: 00:04.0: enabled 1
1686 19:37:23.261192 PCI: 00:05.0: enabled 1
1687 19:37:23.264383 PCI: 00:06.0: enabled 0
1688 19:37:23.267911 PCI: 00:07.0: enabled 0
1689 19:37:23.267997 PCI: 00:07.1: enabled 0
1690 19:37:23.270985 PCI: 00:07.2: enabled 0
1691 19:37:23.274358 PCI: 00:07.3: enabled 0
1692 19:37:23.277473 PCI: 00:08.0: enabled 1
1693 19:37:23.277582 PCI: 00:09.0: enabled 0
1694 19:37:23.280917 PCI: 00:0a.0: enabled 0
1695 19:37:23.284473 PCI: 00:0d.0: enabled 1
1696 19:37:23.284543 PCI: 00:0d.1: enabled 0
1697 19:37:23.287481
1698 19:37:23.287555 PCI: 00:0d.2: enabled 0
1699 19:37:23.291209 PCI: 00:0d.3: enabled 0
1700 19:37:23.294331 PCI: 00:0e.0: enabled 0
1701 19:37:23.294404 PCI: 00:10.2: enabled 1
1702 19:37:23.297682 PCI: 00:10.6: enabled 0
1703 19:37:23.300863 PCI: 00:10.7: enabled 0
1704 19:37:23.304616 PCI: 00:12.0: enabled 0
1705 19:37:23.304725 PCI: 00:12.6: enabled 0
1706 19:37:23.307608 PCI: 00:13.0: enabled 0
1707 19:37:23.310644 PCI: 00:14.0: enabled 1
1708 19:37:23.314298 PCI: 00:14.1: enabled 0
1709 19:37:23.314426 PCI: 00:14.2: enabled 1
1710 19:37:23.317707 PCI: 00:14.3: enabled 1
1711 19:37:23.321275 PCI: 00:15.0: enabled 1
1712 19:37:23.324525 PCI: 00:15.1: enabled 1
1713 19:37:23.324958 PCI: 00:15.2: enabled 1
1714 19:37:23.327451 PCI: 00:15.3: enabled 1
1715 19:37:23.330882 PCI: 00:16.0: enabled 1
1716 19:37:23.331319 PCI: 00:16.1: enabled 0
1717 19:37:23.334296
1718 19:37:23.334851 PCI: 00:16.2: enabled 0
1719 19:37:23.337872 PCI: 00:16.3: enabled 0
1720 19:37:23.340935 PCI: 00:16.4: enabled 0
1721 19:37:23.341467 PCI: 00:16.5: enabled 0
1722 19:37:23.344160 PCI: 00:17.0: enabled 0
1723 19:37:23.347514 PCI: 00:19.0: enabled 0
1724 19:37:23.351302 PCI: 00:19.1: enabled 1
1725 19:37:23.351868 PCI: 00:19.2: enabled 0
1726 19:37:23.354350 PCI: 00:1c.0: enabled 1
1727 19:37:23.357440 PCI: 00:1c.1: enabled 0
1728 19:37:23.360980 PCI: 00:1c.2: enabled 0
1729 19:37:23.361542 PCI: 00:1c.3: enabled 0
1730 19:37:23.364087 PCI: 00:1c.4: enabled 0
1731 19:37:23.367568 PCI: 00:1c.5: enabled 0
1732 19:37:23.370618 PCI: 00:1c.6: enabled 1
1733 19:37:23.371277 PCI: 00:1c.7: enabled 0
1734 19:37:23.374202 PCI: 00:1d.0: enabled 1
1735 19:37:23.377255 PCI: 00:1d.1: enabled 0
1736 19:37:23.377780 PCI: 00:1d.2: enabled 1
1737 19:37:23.380681
1738 19:37:23.381160 PCI: 00:1d.3: enabled 0
1739 19:37:23.384124 PCI: 00:1e.0: enabled 1
1740 19:37:23.387461 PCI: 00:1e.1: enabled 0
1741 19:37:23.387902 PCI: 00:1e.2: enabled 1
1742 19:37:23.390730 PCI: 00:1e.3: enabled 1
1743 19:37:23.393827 PCI: 00:1f.0: enabled 1
1744 19:37:23.397671 PCI: 00:1f.1: enabled 0
1745 19:37:23.398186 PCI: 00:1f.2: enabled 1
1746 19:37:23.400827 PCI: 00:1f.3: enabled 1
1747 19:37:23.403744 PCI: 00:1f.4: enabled 0
1748 19:37:23.407143 PCI: 00:1f.5: enabled 1
1749 19:37:23.407606 PCI: 00:1f.6: enabled 0
1750 19:37:23.410269 PCI: 00:1f.7: enabled 0
1751 19:37:23.413675 APIC: 00: enabled 1
1752 19:37:23.413985 GENERIC: 0.0: enabled 1
1753 19:37:23.417065 GENERIC: 0.0: enabled 1
1754 19:37:23.420350 GENERIC: 1.0: enabled 1
1755 19:37:23.423330 GENERIC: 0.0: enabled 1
1756 19:37:23.423564 GENERIC: 1.0: enabled 1
1757 19:37:23.427216 USB0 port 0: enabled 1
1758 19:37:23.430199 GENERIC: 0.0: enabled 1
1759 19:37:23.433401 USB0 port 0: enabled 1
1760 19:37:23.433627 GENERIC: 0.0: enabled 1
1761 19:37:23.436735 I2C: 00:1a: enabled 1
1762 19:37:23.439934 I2C: 00:31: enabled 1
1763 19:37:23.440106 I2C: 00:32: enabled 1
1764 19:37:23.443551 I2C: 00:10: enabled 1
1765 19:37:23.446915 I2C: 00:15: enabled 1
1766 19:37:23.447082 GENERIC: 0.0: enabled 0
1767 19:37:23.450308 GENERIC: 1.0: enabled 0
1768 19:37:23.453424 GENERIC: 0.0: enabled 1
1769 19:37:23.453621 SPI: 00: enabled 1
1770 19:37:23.456593 SPI: 00: enabled 1
1771 19:37:23.460030 PNP: 0c09.0: enabled 1
1772 19:37:23.460192 GENERIC: 0.0: enabled 1
1773 19:37:23.463227
1774 19:37:23.463387 USB3 port 0: enabled 1
1775 19:37:23.466456 USB3 port 1: enabled 1
1776 19:37:23.469940 USB3 port 2: enabled 0
1777 19:37:23.470129 USB3 port 3: enabled 0
1778 19:37:23.473758 USB2 port 0: enabled 0
1779 19:37:23.476603 USB2 port 1: enabled 1
1780 19:37:23.476982 USB2 port 2: enabled 1
1781 19:37:23.480076 USB2 port 3: enabled 0
1782 19:37:23.483177 USB2 port 4: enabled 1
1783 19:37:23.486797 USB2 port 5: enabled 0
1784 19:37:23.487168 USB2 port 6: enabled 0
1785 19:37:23.489962 USB2 port 7: enabled 0
1786 19:37:23.493238 USB2 port 8: enabled 0
1787 19:37:23.493567 USB2 port 9: enabled 0
1788 19:37:23.496803 USB3 port 0: enabled 0
1789 19:37:23.499627 USB3 port 1: enabled 1
1790 19:37:23.502840 USB3 port 2: enabled 0
1791 19:37:23.503046 USB3 port 3: enabled 0
1792 19:37:23.506298 GENERIC: 0.0: enabled 1
1793 19:37:23.509774 GENERIC: 1.0: enabled 1
1794 19:37:23.510027 APIC: 01: enabled 1
1795 19:37:23.512938 APIC: 03: enabled 1
1796 19:37:23.516129 APIC: 05: enabled 1
1797 19:37:23.516365 APIC: 07: enabled 1
1798 19:37:23.519507 APIC: 06: enabled 1
1799 19:37:23.519711 APIC: 02: enabled 1
1800 19:37:23.522953 APIC: 04: enabled 1
1801 19:37:23.526168 PCI: 01:00.0: enabled 1
1802 19:37:23.529667 BS: BS_DEV_INIT run times (exec / console): 32 / 536 ms
1803 19:37:23.536026 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 19:37:23.539554 ELOG: NV offset 0xf30000 size 0x1000
1805 19:37:23.546505 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 19:37:23.552802 ELOG: Event(17) added with size 13 at 2022-12-19 19:37:22 UTC
1807 19:37:23.559816 ELOG: Event(92) added with size 9 at 2022-12-19 19:37:22 UTC
1808 19:37:23.566143 ELOG: Event(93) added with size 9 at 2022-12-19 19:37:22 UTC
1809 19:37:23.572800 ELOG: Event(9E) added with size 10 at 2022-12-19 19:37:22 UTC
1810 19:37:23.579575 ELOG: Event(9F) added with size 14 at 2022-12-19 19:37:22 UTC
1811 19:37:23.585896 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 19:37:23.592887 ELOG: Event(A1) added with size 10 at 2022-12-19 19:37:22 UTC
1813 19:37:23.599496 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1814 19:37:23.606168 ELOG: Event(A0) added with size 9 at 2022-12-19 19:37:22 UTC
1815 19:37:23.609532 elog_add_boot_reason: Logged dev mode boot
1816 19:37:23.616235 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1817 19:37:23.616732 Finalize devices...
1818 19:37:23.619832 Devices finalized
1819 19:37:23.625828 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1820 19:37:23.629040 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1821 19:37:23.635900 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1822 19:37:23.639105 ME: HFSTS1 : 0x80030055
1823 19:37:23.645520 ME: HFSTS2 : 0x30280116
1824 19:37:23.648785 ME: HFSTS3 : 0x00000050
1825 19:37:23.652091 ME: HFSTS4 : 0x00004000
1826 19:37:23.658730 ME: HFSTS5 : 0x00000000
1827 19:37:23.662385 ME: HFSTS6 : 0x00400006
1828 19:37:23.665407 ME: Manufacturing Mode : YES
1829 19:37:23.668614 ME: SPI Protection Mode Enabled : NO
1830 19:37:23.675132 ME: FW Partition Table : OK
1831 19:37:23.678523 ME: Bringup Loader Failure : NO
1832 19:37:23.681938 ME: Firmware Init Complete : NO
1833 19:37:23.685369 ME: Boot Options Present : NO
1834 19:37:23.688664 ME: Update In Progress : NO
1835 19:37:23.691808 ME: D0i3 Support : YES
1836 19:37:23.695114 ME: Low Power State Enabled : NO
1837 19:37:23.698600 ME: CPU Replaced : YES
1838 19:37:23.701645
1839 19:37:23.704807 ME: CPU Replacement Valid : YES
1840 19:37:23.708435 ME: Current Working State : 5
1841 19:37:23.711609 ME: Current Operation State : 1
1842 19:37:23.715061 ME: Current Operation Mode : 3
1843 19:37:23.718462 ME: Error Code : 0
1844 19:37:23.721801 ME: Enhanced Debug Mode : NO
1845 19:37:23.724801 ME: CPU Debug Disabled : YES
1846 19:37:23.728239 ME: TXT Support : NO
1847 19:37:23.734718 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1848 19:37:23.744622 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1849 19:37:23.747918 CBFS: 'fallback/slic' not found.
1850 19:37:23.751299 ACPI: Writing ACPI tables at 76b01000.
1851 19:37:23.751539 ACPI: * FACS
1852 19:37:23.754469 ACPI: * DSDT
1853 19:37:23.757923 Ramoops buffer: 0x100000@0x76a00000.
1854 19:37:23.761007 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1855 19:37:23.767419 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1856 19:37:23.770943 Google Chrome EC: version:
1857 19:37:23.774336 ro: voema_v2.0.10114-a447f03e46
1858 19:37:23.778007 rw: voema_v2.0.10114-a447f03e46
1859 19:37:23.778475 running image: 1
1860 19:37:23.784517 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1861 19:37:23.789700 ACPI: * FADT
1862 19:37:23.790269 SCI is IRQ9
1863 19:37:23.792818 ACPI: added table 1/32, length now 40
1864 19:37:23.795889
1865 19:37:23.796329 ACPI: * SSDT
1866 19:37:23.799458 Found 1 CPU(s) with 8 core(s) each.
1867 19:37:23.806223 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1868 19:37:23.809115 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1869 19:37:23.812511 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1870 19:37:23.815842 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1871 19:37:23.822514 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1872 19:37:23.829107 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1873 19:37:23.832460 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1874 19:37:23.839247 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1875 19:37:23.845958 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1876 19:37:23.849247 \_SB.PCI0.RP09: Added StorageD3Enable property
1877 19:37:23.852407 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1878 19:37:23.855508
1879 19:37:23.859055 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1880 19:37:23.865334 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1881 19:37:23.868659 PS2K: Passing 80 keymaps to kernel
1882 19:37:23.875468 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1883 19:37:23.881839 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1884 19:37:23.888592 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1885 19:37:23.895258 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1886 19:37:23.901983 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1887 19:37:23.909102 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1888 19:37:23.915292 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1889 19:37:23.921663 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1890 19:37:23.925553 ACPI: added table 2/32, length now 44
1891 19:37:23.925670 ACPI: * MCFG
1892 19:37:23.928351
1893 19:37:23.931601 ACPI: added table 3/32, length now 48
1894 19:37:23.931726 ACPI: * TPM2
1895 19:37:23.935322 TPM2 log created at 0x769f0000
1896 19:37:23.938538 ACPI: added table 4/32, length now 52
1897 19:37:23.941729 ACPI: * MADT
1898 19:37:23.941827 SCI is IRQ9
1899 19:37:23.944946 ACPI: added table 5/32, length now 56
1900 19:37:23.948635 current = 76b09850
1901 19:37:23.948728 ACPI: * DMAR
1902 19:37:23.955019 ACPI: added table 6/32, length now 60
1903 19:37:23.958056 ACPI: added table 7/32, length now 64
1904 19:37:23.958146 ACPI: * HPET
1905 19:37:23.961457 ACPI: added table 8/32, length now 68
1906 19:37:23.964977 ACPI: done.
1907 19:37:23.965051 ACPI tables: 35216 bytes.
1908 19:37:23.967934
1909 19:37:23.968013 smbios_write_tables: 769ef000
1910 19:37:23.971632 EC returned error result code 3
1911 19:37:23.974981 Couldn't obtain OEM name from CBI
1912 19:37:23.979534 Create SMBIOS type 16
1913 19:37:23.982683 Create SMBIOS type 17
1914 19:37:23.986302 GENERIC: 0.0 (WIFI Device)
1915 19:37:23.986394 SMBIOS tables: 1750 bytes.
1916 19:37:23.992971 Writing table forward entry at 0x00000500
1917 19:37:23.999628 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1918 19:37:24.003163 Writing coreboot table at 0x76b25000
1919 19:37:24.009632 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1920 19:37:24.012922 1. 0000000000001000-000000000009ffff: RAM
1921 19:37:24.016282 2. 00000000000a0000-00000000000fffff: RESERVED
1922 19:37:24.022780 3. 0000000000100000-00000000769eefff: RAM
1923 19:37:24.026337 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1924 19:37:24.032654 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1925 19:37:24.039566 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1926 19:37:24.043131 7. 0000000077000000-000000007fbfffff: RESERVED
1927 19:37:24.046069 8. 00000000c0000000-00000000cfffffff: RESERVED
1928 19:37:24.052919 9. 00000000f8000000-00000000f9ffffff: RESERVED
1929 19:37:24.056274 10. 00000000fb000000-00000000fb000fff: RESERVED
1930 19:37:24.062792 11. 00000000fe000000-00000000fe00ffff: RESERVED
1931 19:37:24.065585 12. 00000000fed80000-00000000fed87fff: RESERVED
1932 19:37:24.072172 13. 00000000fed90000-00000000fed92fff: RESERVED
1933 19:37:24.075795 14. 00000000feda0000-00000000feda1fff: RESERVED
1934 19:37:24.082248 15. 00000000fedc0000-00000000feddffff: RESERVED
1935 19:37:24.085485 16. 0000000100000000-00000002803fffff: RAM
1936 19:37:24.089241 Passing 4 GPIOs to payload:
1937 19:37:24.092393 NAME | PORT | POLARITY | VALUE
1938 19:37:24.098842 lid | undefined | high | high
1939 19:37:24.102303 power | undefined | high | low
1940 19:37:24.109162 oprom | undefined | high | low
1941 19:37:24.115406 EC in RW | 0x000000e5 | high | low
1942 19:37:24.122281 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 48cc
1943 19:37:24.122381 coreboot table: 1576 bytes.
1944 19:37:24.128749 IMD ROOT 0. 0x76fff000 0x00001000
1945 19:37:24.132318 IMD SMALL 1. 0x76ffe000 0x00001000
1946 19:37:24.135981 FSP MEMORY 2. 0x76c4e000 0x003b0000
1947 19:37:24.139106 VPD 3. 0x76c4d000 0x00000367
1948 19:37:24.142666 RO MCACHE 4. 0x76c4c000 0x00000fdc
1949 19:37:24.145734 CONSOLE 5. 0x76c2c000 0x00020000
1950 19:37:24.149300 FMAP 6. 0x76c2b000 0x00000578
1951 19:37:24.152720 TIME STAMP 7. 0x76c2a000 0x00000910
1952 19:37:24.155753 VBOOT WORK 8. 0x76c16000 0x00014000
1953 19:37:24.159218
1954 19:37:24.162399 ROMSTG STCK 9. 0x76c15000 0x00001000
1955 19:37:24.165642 AFTER CAR 10. 0x76c0a000 0x0000b000
1956 19:37:24.168988 RAMSTAGE 11. 0x76b97000 0x00073000
1957 19:37:24.172051 REFCODE 12. 0x76b42000 0x00055000
1958 19:37:24.175509 SMM BACKUP 13. 0x76b32000 0x00010000
1959 19:37:24.179010 4f444749 14. 0x76b30000 0x00002000
1960 19:37:24.182152 EXT VBT15. 0x76b2d000 0x0000219f
1961 19:37:24.185428 COREBOOT 16. 0x76b25000 0x00008000
1962 19:37:24.188814 ACPI 17. 0x76b01000 0x00024000
1963 19:37:24.195250 ACPI GNVS 18. 0x76b00000 0x00001000
1964 19:37:24.198545 RAMOOPS 19. 0x76a00000 0x00100000
1965 19:37:24.202068 TPM2 TCGLOG20. 0x769f0000 0x00010000
1966 19:37:24.205215 SMBIOS 21. 0x769ef000 0x00000800
1967 19:37:24.205424 IMD small region:
1968 19:37:24.208774
1969 19:37:24.212005 IMD ROOT 0. 0x76ffec00 0x00000400
1970 19:37:24.215397 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1971 19:37:24.218495 POWER STATE 2. 0x76ffeb80 0x00000044
1972 19:37:24.222098 ROMSTAGE 3. 0x76ffeb60 0x00000004
1973 19:37:24.225400 MEM INFO 4. 0x76ffe980 0x000001e0
1974 19:37:24.231945 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1975 19:37:24.235152 MTRR: Physical address space:
1976 19:37:24.241832 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1977 19:37:24.248616 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1978 19:37:24.255108 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1979 19:37:24.262153 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1980 19:37:24.265164 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1981 19:37:24.271955 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1982 19:37:24.278279 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1983 19:37:24.282617 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 19:37:24.285110
1985 19:37:24.288190 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 19:37:24.291443 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 19:37:24.294895 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 19:37:24.298238 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 19:37:24.304967 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 19:37:24.308049 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 19:37:24.311554 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 19:37:24.314786 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 19:37:24.321396 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 19:37:24.324925 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 19:37:24.328160 call enable_fixed_mtrr()
1996 19:37:24.331413 CPU physical address size: 39 bits
1997 19:37:24.335019 MTRR: default type WB/UC MTRR counts: 6/6.
1998 19:37:24.338213 MTRR: UC selected as default type.
1999 19:37:24.344565 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2000 19:37:24.351286 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2001 19:37:24.358195 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2002 19:37:24.364489 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2003 19:37:24.371438 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2004 19:37:24.378112 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2005 19:37:24.378203
2006 19:37:24.381442 MTRR check
2007 19:37:24.381534 Fixed MTRRs : Enabled
2008 19:37:24.384588 Variable MTRRs: Enabled
2009 19:37:24.384672
2010 19:37:24.387663 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 19:37:24.394241 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 19:37:24.397662 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 19:37:24.401459 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 19:37:24.404317 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 19:37:24.407770 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 19:37:24.410877
2017 19:37:24.414480 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 19:37:24.417602 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 19:37:24.421138 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 19:37:24.424352 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 19:37:24.431290 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 19:37:24.437487 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2023 19:37:24.440876 call enable_fixed_mtrr()
2024 19:37:24.445581 Checking cr50 for pending updates
2025 19:37:24.445667 CPU physical address size: 39 bits
2026 19:37:24.449040 MTRR: Fixed MSR 0x250 0x0606060606060606
2027 19:37:24.455349 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 19:37:24.458824 MTRR: Fixed MSR 0x258 0x0606060606060606
2029 19:37:24.462156 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 19:37:24.465431 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 19:37:24.472175 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 19:37:24.475896 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 19:37:24.478639 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 19:37:24.482116 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 19:37:24.488591 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 19:37:24.492076 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 19:37:24.495352 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 19:37:24.501730 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 19:37:24.501845 call enable_fixed_mtrr()
2040 19:37:24.508419 MTRR: Fixed MSR 0x259 0x0000000000000000
2041 19:37:24.511767 MTRR: Fixed MSR 0x268 0x0606060606060606
2042 19:37:24.515349 MTRR: Fixed MSR 0x269 0x0606060606060606
2043 19:37:24.518751 MTRR: Fixed MSR 0x26a 0x0606060606060606
2044 19:37:24.525260 MTRR: Fixed MSR 0x26b 0x0606060606060606
2045 19:37:24.528366 MTRR: Fixed MSR 0x26c 0x0606060606060606
2046 19:37:24.531590 MTRR: Fixed MSR 0x26d 0x0606060606060606
2047 19:37:24.535249 MTRR: Fixed MSR 0x26e 0x0606060606060606
2048 19:37:24.538559 MTRR: Fixed MSR 0x26f 0x0606060606060606
2049 19:37:24.542160
2050 19:37:24.544779 CPU physical address size: 39 bits
2051 19:37:24.548568 call enable_fixed_mtrr()
2052 19:37:24.551693 MTRR: Fixed MSR 0x250 0x0606060606060606
2053 19:37:24.555244 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 19:37:24.561618 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 19:37:24.564682 MTRR: Fixed MSR 0x259 0x0000000000000000
2056 19:37:24.568181 MTRR: Fixed MSR 0x268 0x0606060606060606
2057 19:37:24.571695 MTRR: Fixed MSR 0x269 0x0606060606060606
2058 19:37:24.578047 MTRR: Fixed MSR 0x26a 0x0606060606060606
2059 19:37:24.581194 MTRR: Fixed MSR 0x26b 0x0606060606060606
2060 19:37:24.585031 MTRR: Fixed MSR 0x26c 0x0606060606060606
2061 19:37:24.587950 MTRR: Fixed MSR 0x26d 0x0606060606060606
2062 19:37:24.594666 MTRR: Fixed MSR 0x26e 0x0606060606060606
2063 19:37:24.597710 MTRR: Fixed MSR 0x26f 0x0606060606060606
2064 19:37:24.601236 MTRR: Fixed MSR 0x258 0x0606060606060606
2065 19:37:24.604774 call enable_fixed_mtrr()
2066 19:37:24.607808 MTRR: Fixed MSR 0x259 0x0000000000000000
2067 19:37:24.614819 MTRR: Fixed MSR 0x268 0x0606060606060606
2068 19:37:24.617860 MTRR: Fixed MSR 0x269 0x0606060606060606
2069 19:37:24.621667 MTRR: Fixed MSR 0x26a 0x0606060606060606
2070 19:37:24.624471 MTRR: Fixed MSR 0x26b 0x0606060606060606
2071 19:37:24.631474 MTRR: Fixed MSR 0x26c 0x0606060606060606
2072 19:37:24.634532 MTRR: Fixed MSR 0x26d 0x0606060606060606
2073 19:37:24.638015 MTRR: Fixed MSR 0x26e 0x0606060606060606
2074 19:37:24.641278 MTRR: Fixed MSR 0x26f 0x0606060606060606
2075 19:37:24.644828 CPU physical address size: 39 bits
2076 19:37:24.651465 call enable_fixed_mtrr()
2077 19:37:24.655043 MTRR: Fixed MSR 0x250 0x0606060606060606
2078 19:37:24.657992 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 19:37:24.661210 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 19:37:24.664987 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 19:37:24.668020
2082 19:37:24.671348 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 19:37:24.674690 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 19:37:24.677876 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 19:37:24.681347 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 19:37:24.688135 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 19:37:24.691287 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 19:37:24.694725 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 19:37:24.697744 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 19:37:24.705351 MTRR: Fixed MSR 0x258 0x0606060606060606
2091 19:37:24.708693 MTRR: Fixed MSR 0x259 0x0000000000000000
2092 19:37:24.712131 MTRR: Fixed MSR 0x268 0x0606060606060606
2093 19:37:24.715399 MTRR: Fixed MSR 0x269 0x0606060606060606
2094 19:37:24.722035 MTRR: Fixed MSR 0x26a 0x0606060606060606
2095 19:37:24.725255 MTRR: Fixed MSR 0x26b 0x0606060606060606
2096 19:37:24.728959 MTRR: Fixed MSR 0x26c 0x0606060606060606
2097 19:37:24.731991 MTRR: Fixed MSR 0x26d 0x0606060606060606
2098 19:37:24.738840 MTRR: Fixed MSR 0x26e 0x0606060606060606
2099 19:37:24.741888 MTRR: Fixed MSR 0x26f 0x0606060606060606
2100 19:37:24.745335 call enable_fixed_mtrr()
2101 19:37:24.748468 call enable_fixed_mtrr()
2102 19:37:24.751776 CPU physical address size: 39 bits
2103 19:37:24.755150 CPU physical address size: 39 bits
2104 19:37:24.758444 CPU physical address size: 39 bits
2105 19:37:24.761893 CPU physical address size: 39 bits
2106 19:37:24.765055 Reading cr50 TPM mode
2107 19:37:24.774724 BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms
2108 19:37:24.785042 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2109 19:37:24.788034 Checking segment from ROM address 0xffc02b38
2110 19:37:24.791721 Checking segment from ROM address 0xffc02b54
2111 19:37:24.798043 Loading segment from ROM address 0xffc02b38
2112 19:37:24.798128 code (compression=0)
2113 19:37:24.808062 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2114 19:37:24.814559 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2115 19:37:24.817963 it's not compressed!
2116 19:37:24.957993 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2117 19:37:24.964291 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2118 19:37:24.970881 Loading segment from ROM address 0xffc02b54
2119 19:37:24.970965 Entry Point 0x30000000
2120 19:37:24.974229 Loaded segments
2121 19:37:24.980731 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2122 19:37:25.023820 Finalizing chipset.
2123 19:37:25.027116 Finalizing SMM.
2124 19:37:25.027201 APMC done.
2125 19:37:25.033639 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2126 19:37:25.036733 mp_park_aps done after 0 msecs.
2127 19:37:25.039983 Jumping to boot code at 0x30000000(0x76b25000)
2128 19:37:25.049969 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2129 19:37:25.050054
2130 19:37:25.050122
2131 19:37:25.050183
2132 19:37:25.053661 Starting depthcharge on Voema...
2133 19:37:25.053749
2134 19:37:25.054146 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2135 19:37:25.054247 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2136 19:37:25.054330 Setting prompt string to ['volteer:']
2137 19:37:25.054408 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2138 19:37:25.063545 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2139 19:37:25.063655
2140 19:37:25.070031 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2141 19:37:25.070114
2142 19:37:25.073386 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2143 19:37:25.076806
2144 19:37:25.079975 Failed to find eMMC card reader
2145 19:37:25.080057
2146 19:37:25.080122 Wipe memory regions:
2147 19:37:25.080183
2148 19:37:25.086691 [0x00000000001000, 0x000000000a0000)
2149 19:37:25.086774
2150 19:37:25.089678 [0x00000000100000, 0x00000030000000)
2151 19:37:25.089761
2152 19:37:25.118132 [0x00000032662db0, 0x000000769ef000)
2153 19:37:25.118218
2154 19:37:25.156583 [0x00000100000000, 0x00000280400000)
2155 19:37:25.156672
2156 19:37:25.359117 ec_init: CrosEC protocol v3 supported (256, 256)
2157 19:37:25.359264
2158 19:37:25.790362 R8152: Initializing
2159 19:37:25.790514
2160 19:37:25.792914 Version 6 (ocp_data = 5c30)
2161 19:37:25.793021
2162 19:37:25.796421 R8152: Done initializing
2163 19:37:25.796504
2164 19:37:25.799428 Adding net device
2165 19:37:25.799510
2166 19:37:26.104089 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2167 19:37:26.104232
2168 19:37:26.104301
2169 19:37:26.104363
2170 19:37:26.107707 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 19:37:26.208342 volteer: tftpboot 192.168.201.1 8411623/tftp-deploy-2z_jyl5_/kernel/bzImage 8411623/tftp-deploy-2z_jyl5_/kernel/cmdline 8411623/tftp-deploy-2z_jyl5_/ramdisk/ramdisk.cpio.gz
2173 19:37:26.208480 Setting prompt string to 'Starting kernel'
2174 19:37:26.208569 Setting prompt string to ['Starting kernel']
2175 19:37:26.208636 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2176 19:37:26.208711 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2177 19:37:26.212756 tftpboot 192.168.201.1 8411623/tftp-deploy-2z_jyl5_/kernel/bzImoy-2z_jyl5_/kernel/cmdline 8411623/tftp-deploy-2z_jyl5_/ramdisk/ramdisk.cpio.gz
2178 19:37:26.212843
2179 19:37:26.212909 Waiting for link
2180 19:37:26.212970
2181 19:37:26.415947 done.
2182 19:37:26.416071
2183 19:37:26.416140 MAC: 00:24:32:30:77:76
2184 19:37:26.416202
2185 19:37:26.418748 Sending DHCP discover... done.
2186 19:37:26.418832
2187 19:37:26.422308 Waiting for reply... done.
2188 19:37:26.422391
2189 19:37:26.425461 Sending DHCP request... done.
2190 19:37:26.425563
2191 19:37:26.428868 Waiting for reply... done.
2192 19:37:26.428950
2193 19:37:26.432370 My ip is 192.168.201.16
2194 19:37:26.432453
2195 19:37:26.435570 The DHCP server ip is 192.168.201.1
2196 19:37:26.435653
2197 19:37:26.441986 TFTP server IP predefined by user: 192.168.201.1
2198 19:37:26.442069
2199 19:37:26.448471 Bootfile predefined by user: 8411623/tftp-deploy-2z_jyl5_/kernel/bzImage
2200 19:37:26.448554
2201 19:37:26.452018 Sending tftp read request... done.
2202 19:37:26.452101
2203 19:37:26.455221 Waiting for the transfer...
2204 19:37:26.455303
2205 19:37:27.014255 00000000 ################################################################
2206 19:37:27.014406
2207 19:37:27.571519 00080000 ################################################################
2208 19:37:27.571671
2209 19:37:28.128862 00100000 ################################################################
2210 19:37:28.129010
2211 19:37:28.688115 00180000 ################################################################
2212 19:37:28.688261
2213 19:37:29.282330 00200000 ################################################################
2214 19:37:29.282479
2215 19:37:29.868010 00280000 ################################################################
2216 19:37:29.868168
2217 19:37:30.421083 00300000 ################################################################
2218 19:37:30.421233
2219 19:37:31.023003 00380000 ################################################################
2220 19:37:31.023153
2221 19:37:31.626276 00400000 ################################################################
2222 19:37:31.626440
2223 19:37:32.227275 00480000 ################################################################
2224 19:37:32.227423
2225 19:37:32.826003 00500000 ################################################################
2226 19:37:32.826154
2227 19:37:33.426619 00580000 ################################################################
2228 19:37:33.426770
2229 19:37:34.012795 00600000 ################################################################
2230 19:37:34.013330
2231 19:37:34.700873 00680000 ################################################################
2232 19:37:34.701024
2233 19:37:34.990635 00700000 ############################# done.
2234 19:37:34.991181
2235 19:37:34.994086 The bootfile was 7577488 bytes long.
2236 19:37:34.994629
2237 19:37:34.997515 Sending tftp read request... done.
2238 19:37:34.998067
2239 19:37:35.000220 Waiting for the transfer...
2240 19:37:35.000654
2241 19:37:35.723670 00000000 ################################################################
2242 19:37:35.724208
2243 19:37:36.436709 00080000 ################################################################
2244 19:37:36.437232
2245 19:37:37.144252 00100000 ################################################################
2246 19:37:37.144798
2247 19:37:37.872574 00180000 ################################################################
2248 19:37:37.873173
2249 19:37:38.597216 00200000 ################################################################
2250 19:37:38.597852
2251 19:37:39.340126 00280000 ################################################################
2252 19:37:39.340659
2253 19:37:40.042101 00300000 ################################################################
2254 19:37:40.042638
2255 19:37:40.756966 00380000 ################################################################
2256 19:37:40.757505
2257 19:37:41.470633 00400000 ################################################################
2258 19:37:41.471178
2259 19:37:42.168120 00480000 ################################################################
2260 19:37:42.168670
2261 19:37:42.900101 00500000 ################################################################
2262 19:37:42.900683
2263 19:37:43.620848 00580000 ################################################################
2264 19:37:43.621380
2265 19:37:44.340862 00600000 ################################################################
2266 19:37:44.341458
2267 19:37:45.056258 00680000 ################################################################
2268 19:37:45.056848
2269 19:37:45.759328 00700000 ################################################################
2270 19:37:45.759889
2271 19:37:46.452968 00780000 ################################################################
2272 19:37:46.453588
2273 19:37:46.669370 00800000 #################### done.
2274 19:37:46.669996
2275 19:37:46.672696 Sending tftp read request... done.
2276 19:37:46.673196
2277 19:37:46.676081 Waiting for the transfer...
2278 19:37:46.676603
2279 19:37:46.676989 00000000 # done.
2280 19:37:46.677357
2281 19:37:46.686522 Command line loaded dynamically from TFTP file: 8411623/tftp-deploy-2z_jyl5_/kernel/cmdline
2282 19:37:46.687075
2283 19:37:46.699691 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2284 19:37:46.700273
2285 19:37:46.706236 Shutting down all USB controllers.
2286 19:37:46.706839
2287 19:37:46.707237 Removing current net device
2288 19:37:46.707593
2289 19:37:46.709472 Finalizing coreboot
2290 19:37:46.710014
2291 19:37:46.716557 Exiting depthcharge with code 4 at timestamp: 30320594
2292 19:37:46.717136
2293 19:37:46.717662
2294 19:37:46.718066 Starting kernel ...
2295 19:37:46.718417
2296 19:37:46.718759
2297 19:37:46.719092
2298 19:37:46.720625 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2299 19:37:46.721213 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2300 19:37:46.721703 Setting prompt string to ['Linux version [0-9]']
2301 19:37:46.722111 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2302 19:37:46.722532 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2304 19:42:07.721486 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2306 19:42:07.721869 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2308 19:42:07.722132 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2311 19:42:07.722516 end: 2 depthcharge-action (duration 00:05:00) [common]
2313 19:42:07.722819 Cleaning after the job
2314 19:42:07.722939 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411623/tftp-deploy-2z_jyl5_/ramdisk
2315 19:42:07.723804 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411623/tftp-deploy-2z_jyl5_/kernel
2316 19:42:07.724511 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411623/tftp-deploy-2z_jyl5_/modules
2317 19:42:07.724761 start: 5.1 power-off (timeout 00:00:30) [common]
2318 19:42:07.724967 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2319 19:42:07.745586 >> Command sent successfully.
2320 19:42:07.747476 Returned 0 in 0 seconds
2321 19:42:07.848599 end: 5.1 power-off (duration 00:00:00) [common]
2323 19:42:07.850275 start: 5.2 read-feedback (timeout 00:10:00) [common]
2324 19:42:07.851528 Listened to connection for namespace 'common' for up to 1s
2325 19:42:08.853733 Finalising connection for namespace 'common'
2326 19:42:08.854499 Disconnecting from shell: Finalise
2327 19:42:08.955978 end: 5.2 read-feedback (duration 00:00:01) [common]
2328 19:42:08.956583 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8411623
2329 19:42:08.982041 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8411623
2330 19:42:08.982714 JobError: Your job cannot terminate cleanly.