Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Kernel Errors: 0
- Warnings: 0
1 19:37:05.808213 lava-dispatcher, installed at version: 2022.11
2 19:37:05.808412 start: 0 validate
3 19:37:05.808548 Start time: 2022-12-19 19:37:05.808539+00:00 (UTC)
4 19:37:05.808669 Using caching service: 'http://localhost/cache/?uri=%s'
5 19:37:05.808796 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221216.0%2Famd64%2Finitrd.cpio.gz exists
6 19:37:06.092505 Using caching service: 'http://localhost/cache/?uri=%s'
7 19:37:06.092668 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt-rebase%2Fv4.4-st5-395-gaed3deab96cc%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 19:37:10.094466 Using caching service: 'http://localhost/cache/?uri=%s'
9 19:37:10.094620 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221216.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 19:37:10.386628 Using caching service: 'http://localhost/cache/?uri=%s'
11 19:37:10.386791 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt-rebase%2Fv4.4-st5-395-gaed3deab96cc%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 19:37:10.389163 validate duration: 4.58
14 19:37:10.389420 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 19:37:10.389522 start: 1.1 download-retry (timeout 00:10:00) [common]
16 19:37:10.389613 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 19:37:10.389716 Not decompressing ramdisk as can be used compressed.
18 19:37:10.389799 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221216.0/amd64/initrd.cpio.gz
19 19:37:10.389863 saving as /var/lib/lava/dispatcher/tmp/8411663/tftp-deploy-it1nb9ra/ramdisk/initrd.cpio.gz
20 19:37:10.389925 total size: 5431796 (5MB)
21 19:37:10.390942 progress 0% (0MB)
22 19:37:10.392508 progress 5% (0MB)
23 19:37:10.393872 progress 10% (0MB)
24 19:37:10.395236 progress 15% (0MB)
25 19:37:10.396729 progress 20% (1MB)
26 19:37:10.398018 progress 25% (1MB)
27 19:37:10.399351 progress 30% (1MB)
28 19:37:10.400830 progress 35% (1MB)
29 19:37:10.402119 progress 40% (2MB)
30 19:37:10.403403 progress 45% (2MB)
31 19:37:10.404789 progress 50% (2MB)
32 19:37:10.406230 progress 55% (2MB)
33 19:37:10.407519 progress 60% (3MB)
34 19:37:10.408844 progress 65% (3MB)
35 19:37:10.410284 progress 70% (3MB)
36 19:37:10.411567 progress 75% (3MB)
37 19:37:10.412902 progress 80% (4MB)
38 19:37:10.414426 progress 85% (4MB)
39 19:37:10.415890 progress 90% (4MB)
40 19:37:10.417222 progress 95% (4MB)
41 19:37:10.418660 progress 100% (5MB)
42 19:37:10.418958 5MB downloaded in 0.03s (178.54MB/s)
43 19:37:10.419119 end: 1.1.1 http-download (duration 00:00:00) [common]
45 19:37:10.419372 end: 1.1 download-retry (duration 00:00:00) [common]
46 19:37:10.419463 start: 1.2 download-retry (timeout 00:10:00) [common]
47 19:37:10.419551 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 19:37:10.419658 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt-rebase/v4.4-st5-395-gaed3deab96cc/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 19:37:10.419726 saving as /var/lib/lava/dispatcher/tmp/8411663/tftp-deploy-it1nb9ra/kernel/bzImage
50 19:37:10.419788 total size: 7577488 (7MB)
51 19:37:10.419850 No compression specified
52 19:37:10.420985 progress 0% (0MB)
53 19:37:10.422921 progress 5% (0MB)
54 19:37:10.425038 progress 10% (0MB)
55 19:37:10.426884 progress 15% (1MB)
56 19:37:10.428948 progress 20% (1MB)
57 19:37:10.430860 progress 25% (1MB)
58 19:37:10.432936 progress 30% (2MB)
59 19:37:10.434719 progress 35% (2MB)
60 19:37:10.436695 progress 40% (2MB)
61 19:37:10.438759 progress 45% (3MB)
62 19:37:10.440554 progress 50% (3MB)
63 19:37:10.442589 progress 55% (4MB)
64 19:37:10.444536 progress 60% (4MB)
65 19:37:10.446770 progress 65% (4MB)
66 19:37:10.448892 progress 70% (5MB)
67 19:37:10.450836 progress 75% (5MB)
68 19:37:10.452677 progress 80% (5MB)
69 19:37:10.454574 progress 85% (6MB)
70 19:37:10.456571 progress 90% (6MB)
71 19:37:10.458364 progress 95% (6MB)
72 19:37:10.460397 progress 100% (7MB)
73 19:37:10.460652 7MB downloaded in 0.04s (176.93MB/s)
74 19:37:10.460803 end: 1.2.1 http-download (duration 00:00:00) [common]
76 19:37:10.461046 end: 1.2 download-retry (duration 00:00:00) [common]
77 19:37:10.461135 start: 1.3 download-retry (timeout 00:10:00) [common]
78 19:37:10.461224 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 19:37:10.461329 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221216.0/amd64/full.rootfs.tar.xz
80 19:37:10.461395 saving as /var/lib/lava/dispatcher/tmp/8411663/tftp-deploy-it1nb9ra/nfsrootfs/full.rootfs.tar
81 19:37:10.461467 total size: 133314708 (127MB)
82 19:37:10.461529 Using unxz to decompress xz
83 19:37:10.464838 progress 0% (0MB)
84 19:37:10.806715 progress 5% (6MB)
85 19:37:11.173691 progress 10% (12MB)
86 19:37:11.462789 progress 15% (19MB)
87 19:37:11.664485 progress 20% (25MB)
88 19:37:11.913831 progress 25% (31MB)
89 19:37:12.259425 progress 30% (38MB)
90 19:37:12.601909 progress 35% (44MB)
91 19:37:12.995090 progress 40% (50MB)
92 19:37:13.374084 progress 45% (57MB)
93 19:37:13.723518 progress 50% (63MB)
94 19:37:14.088762 progress 55% (69MB)
95 19:37:14.446360 progress 60% (76MB)
96 19:37:14.806230 progress 65% (82MB)
97 19:37:15.166264 progress 70% (89MB)
98 19:37:15.529358 progress 75% (95MB)
99 19:37:15.963278 progress 80% (101MB)
100 19:37:16.400937 progress 85% (108MB)
101 19:37:16.687119 progress 90% (114MB)
102 19:37:17.031495 progress 95% (120MB)
103 19:37:17.430446 progress 100% (127MB)
104 19:37:17.435966 127MB downloaded in 6.97s (18.23MB/s)
105 19:37:17.436265 end: 1.3.1 http-download (duration 00:00:07) [common]
107 19:37:17.436525 end: 1.3 download-retry (duration 00:00:07) [common]
108 19:37:17.436617 start: 1.4 download-retry (timeout 00:09:53) [common]
109 19:37:17.436707 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 19:37:17.436825 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt-rebase/v4.4-st5-395-gaed3deab96cc/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 19:37:17.436894 saving as /var/lib/lava/dispatcher/tmp/8411663/tftp-deploy-it1nb9ra/modules/modules.tar
112 19:37:17.436956 total size: 54512 (0MB)
113 19:37:17.437020 Using unxz to decompress xz
114 19:37:17.729566 progress 60% (0MB)
115 19:37:17.731363 progress 100% (0MB)
116 19:37:17.747380 0MB downloaded in 0.31s (0.17MB/s)
117 19:37:17.748458 end: 1.4.1 http-download (duration 00:00:00) [common]
119 19:37:17.749668 end: 1.4 download-retry (duration 00:00:00) [common]
120 19:37:17.750119 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 19:37:17.750586 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 19:37:19.035783 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8411663/extract-nfsrootfs-ppqxgg55
123 19:37:19.035980 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 19:37:19.036137 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 19:37:19.036272 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz
126 19:37:19.036371 makedir: /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin
127 19:37:19.036453 makedir: /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/tests
128 19:37:19.036536 makedir: /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/results
129 19:37:19.036636 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-add-keys
130 19:37:19.036766 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-add-sources
131 19:37:19.036889 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-background-process-start
132 19:37:19.037005 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-background-process-stop
133 19:37:19.037119 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-common-functions
134 19:37:19.037229 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-echo-ipv4
135 19:37:19.037338 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-install-packages
136 19:37:19.037448 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-installed-packages
137 19:37:19.037554 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-os-build
138 19:37:19.037696 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-probe-channel
139 19:37:19.037804 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-probe-ip
140 19:37:19.037911 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-target-ip
141 19:37:19.038018 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-target-mac
142 19:37:19.038124 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-target-storage
143 19:37:19.038234 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-test-case
144 19:37:19.038343 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-test-event
145 19:37:19.038450 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-test-feedback
146 19:37:19.038560 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-test-raise
147 19:37:19.038667 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-test-reference
148 19:37:19.038775 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-test-runner
149 19:37:19.038893 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-test-set
150 19:37:19.039000 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-test-shell
151 19:37:19.039109 Updating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-install-packages (oe)
152 19:37:19.039220 Updating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/bin/lava-installed-packages (oe)
153 19:37:19.039316 Creating /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/environment
154 19:37:19.039399 LAVA metadata
155 19:37:19.039464 - LAVA_JOB_ID=8411663
156 19:37:19.039526 - LAVA_DISPATCHER_IP=192.168.201.1
157 19:37:19.039624 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 19:37:19.039687 skipped lava-vland-overlay
159 19:37:19.039763 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 19:37:19.039842 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 19:37:19.039903 skipped lava-multinode-overlay
162 19:37:19.039983 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 19:37:19.040116 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 19:37:19.040186 Loading test definitions
165 19:37:19.040275 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 19:37:19.040343 Using /lava-8411663 at stage 0
167 19:37:19.040601 uuid=8411663_1.5.2.3.1 testdef=None
168 19:37:19.040690 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 19:37:19.040777 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 19:37:19.041348 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 19:37:19.041581 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 19:37:19.042133 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 19:37:19.042370 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 19:37:19.042899 runner path: /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/0/tests/0_dmesg test_uuid 8411663_1.5.2.3.1
177 19:37:19.043046 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 19:37:19.043276 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 19:37:19.043374 Using /lava-8411663 at stage 1
181 19:37:19.043668 uuid=8411663_1.5.2.3.5 testdef=None
182 19:37:19.043766 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 19:37:19.043855 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 19:37:19.044368 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 19:37:19.044598 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 19:37:19.045255 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 19:37:19.045504 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 19:37:19.046038 runner path: /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/1/tests/1_bootrr test_uuid 8411663_1.5.2.3.5
191 19:37:19.046179 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 19:37:19.046388 Creating lava-test-runner.conf files
194 19:37:19.046451 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/0 for stage 0
195 19:37:19.046532 - 0_dmesg
196 19:37:19.046620 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8411663/lava-overlay-u96ep0kz/lava-8411663/1 for stage 1
197 19:37:19.046715 - 1_bootrr
198 19:37:19.046808 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 19:37:19.046911 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 19:37:19.052759 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 19:37:19.052908 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 19:37:19.053006 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 19:37:19.053137 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 19:37:19.053261 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 19:37:19.155148 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 19:37:19.155485 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 19:37:19.155600 extracting modules file /var/lib/lava/dispatcher/tmp/8411663/tftp-deploy-it1nb9ra/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8411663/extract-nfsrootfs-ppqxgg55
208 19:37:19.159819 extracting modules file /var/lib/lava/dispatcher/tmp/8411663/tftp-deploy-it1nb9ra/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8411663/extract-overlay-ramdisk-e_a7u9r1/ramdisk
209 19:37:19.163739 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 19:37:19.163853 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 19:37:19.163935 [common] Applying overlay to NFS
212 19:37:19.164052 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8411663/compress-overlay-l1kbz7fv/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8411663/extract-nfsrootfs-ppqxgg55
213 19:37:19.167758 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 19:37:19.167867 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 19:37:19.167959 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 19:37:19.168088 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 19:37:19.168166 Building ramdisk /var/lib/lava/dispatcher/tmp/8411663/extract-overlay-ramdisk-e_a7u9r1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8411663/extract-overlay-ramdisk-e_a7u9r1/ramdisk
218 19:37:19.201756 >> 24582 blocks
219 19:37:19.660286 rename /var/lib/lava/dispatcher/tmp/8411663/extract-overlay-ramdisk-e_a7u9r1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8411663/tftp-deploy-it1nb9ra/ramdisk/ramdisk.cpio.gz
220 19:37:19.660682 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
221 19:37:19.660805 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 19:37:19.660907 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 19:37:19.661002 No mkimage arch provided, not using FIT.
224 19:37:19.661091 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 19:37:19.661172 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 19:37:19.661264 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 19:37:19.661355 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 19:37:19.661429 No LXC device requested
229 19:37:19.661507 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 19:37:19.661593 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 19:37:19.661673 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 19:37:19.661744 Checking files for TFTP limit of 4294967296 bytes.
233 19:37:19.662118 end: 1 tftp-deploy (duration 00:00:09) [common]
234 19:37:19.662222 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 19:37:19.662319 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 19:37:19.662441 substitutions:
237 19:37:19.662509 - {DTB}: None
238 19:37:19.662573 - {INITRD}: 8411663/tftp-deploy-it1nb9ra/ramdisk/ramdisk.cpio.gz
239 19:37:19.662635 - {KERNEL}: 8411663/tftp-deploy-it1nb9ra/kernel/bzImage
240 19:37:19.662721 - {LAVA_MAC}: None
241 19:37:19.662800 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8411663/extract-nfsrootfs-ppqxgg55
242 19:37:19.662859 - {NFS_SERVER_IP}: 192.168.201.1
243 19:37:19.662916 - {PRESEED_CONFIG}: None
244 19:37:19.662973 - {PRESEED_LOCAL}: None
245 19:37:19.663029 - {RAMDISK}: 8411663/tftp-deploy-it1nb9ra/ramdisk/ramdisk.cpio.gz
246 19:37:19.663085 - {ROOT_PART}: None
247 19:37:19.663141 - {ROOT}: None
248 19:37:19.663196 - {SERVER_IP}: 192.168.201.1
249 19:37:19.663251 - {TEE}: None
250 19:37:19.663306 Parsed boot commands:
251 19:37:19.663360 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 19:37:19.663512 Parsed boot commands: tftpboot 192.168.201.1 8411663/tftp-deploy-it1nb9ra/kernel/bzImage 8411663/tftp-deploy-it1nb9ra/kernel/cmdline 8411663/tftp-deploy-it1nb9ra/ramdisk/ramdisk.cpio.gz
253 19:37:19.663606 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 19:37:19.663696 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 19:37:19.663786 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 19:37:19.663873 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 19:37:19.663942 Not connected, no need to disconnect.
258 19:37:19.664074 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 19:37:19.664160 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 19:37:19.664228 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
261 19:37:19.667012 Setting prompt string to ['lava-test: # ']
262 19:37:19.667290 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 19:37:19.667395 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 19:37:19.667491 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 19:37:19.667583 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 19:37:19.667764 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
267 19:37:19.686363 >> Command sent successfully.
268 19:37:19.688304 Returned 0 in 0 seconds
269 19:37:19.789474 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 19:37:19.790916 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 19:37:19.791410 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 19:37:19.791814 Setting prompt string to 'Starting depthcharge on Voema...'
274 19:37:19.792168 Changing prompt to 'Starting depthcharge on Voema...'
275 19:37:19.792492 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 19:37:19.793640 [Enter `^Ec?' for help]
277 19:37:26.990241
278 19:37:26.990402
279 19:37:26.999702 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 19:37:27.003348 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 19:37:27.009596 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 19:37:27.013052 CPU: AES supported, TXT NOT supported, VT supported
283 19:37:27.019597 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 19:37:27.026215 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 19:37:27.029883 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 19:37:27.032968 VBOOT: Loading verstage.
287 19:37:27.036322 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 19:37:27.039482
289 19:37:27.042779 FMAP: base = 0x0 size = 0x2000000 #areas = 32
290 19:37:27.046088 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 19:37:27.056834 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
292 19:37:27.063364 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
293 19:37:27.063464
294 19:37:27.063560
295 19:37:27.076894 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
296 19:37:27.090658 Probing TPM: . done!
297 19:37:27.093983 TPM ready after 0 ms
298 19:37:27.097321 Connected to device vid:did:rid of 1ae0:0028:00
299 19:37:27.108510 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
300 19:37:27.115175 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
301 19:37:27.118634 Initialized TPM device CR50 revision 0
302 19:37:27.170030 tlcl_send_startup: Startup return code is 0
303 19:37:27.170164 TPM: setup succeeded
304 19:37:27.185321 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
305 19:37:27.200079 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
306 19:37:27.212741 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
307 19:37:27.222246 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 19:37:27.226073 Chrome EC: UHEPI supported
309 19:37:27.229921 Phase 1
310 19:37:27.233195 FMAP: area GBB found @ 1805000 (458752 bytes)
311 19:37:27.243052 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
312 19:37:27.249838 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
313 19:37:27.256188 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
314 19:37:27.262985 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
315 19:37:27.266138 Recovery requested (1009000e)
316 19:37:27.269684 TPM: Extending digest for VBOOT: boot mode into PCR 0
317 19:37:27.281194 tlcl_extend: response is 0
318 19:37:27.287911 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
319 19:37:27.297756 tlcl_extend: response is 0
320 19:37:27.304457 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
321 19:37:27.311139 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
322 19:37:27.317921 BS: verstage times (exec / console): total (unknown) / 142 ms
323 19:37:27.318013
324 19:37:27.318082
325 19:37:27.331053 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
326 19:37:27.334294 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
327 19:37:27.337733
328 19:37:27.340907 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
329 19:37:27.344354 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
330 19:37:27.351036 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
331 19:37:27.354358 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
332 19:37:27.357565 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
333 19:37:27.361391 TCO_STS: 0000 0000
334 19:37:27.364267 GEN_PMCON: d0015038 00002200
335 19:37:27.367824 GBLRST_CAUSE: 00000000 00000000
336 19:37:27.367911 HPR_CAUSE0: 00000000
337 19:37:27.370622 prev_sleep_state 5
338 19:37:27.374005 Boot Count incremented to 15628
339 19:37:27.380875 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 19:37:27.387764 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
341 19:37:27.394025 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
342 19:37:27.400770 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
343 19:37:27.405172 Chrome EC: UHEPI supported
344 19:37:27.411875 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
345 19:37:27.425702 Probing TPM: done!
346 19:37:27.431085 Connected to device vid:did:rid of 1ae0:0028:00
347 19:37:27.441377 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
348 19:37:27.444366 Initialized TPM device CR50 revision 0
349 19:37:27.459662 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
350 19:37:27.466365 MRC: Hash idx 0x100b comparison successful.
351 19:37:27.469408 MRC cache found, size faa8
352 19:37:27.469501 bootmode is set to: 2
353 19:37:27.473200 SPD index = 0
354 19:37:27.479921 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
355 19:37:27.482652 SPD: module type is LPDDR4X
356 19:37:27.486076 SPD: module part number is MT53E512M64D4NW-046
357 19:37:27.492829 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
358 19:37:27.496102 SPD: device width 16 bits, bus width 16 bits
359 19:37:27.502536 SPD: module size is 1024 MB (per channel)
360 19:37:27.933799 CBMEM:
361 19:37:27.937027 IMD: root @ 0x76fff000 254 entries.
362 19:37:27.940443 IMD: root @ 0x76ffec00 62 entries.
363 19:37:27.943724 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
364 19:37:27.950102 FMAP: area RW_VPD found @ f35000 (8192 bytes)
365 19:37:27.953332 External stage cache:
366 19:37:27.957156 IMD: root @ 0x7b3ff000 254 entries.
367 19:37:27.960427 IMD: root @ 0x7b3fec00 62 entries.
368 19:37:27.975492 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
369 19:37:27.981824 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 19:37:27.988439 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
371 19:37:28.002966 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 19:37:28.006821 cse_lite: Skip switching to RW in the recovery path
373 19:37:28.010195 8 DIMMs found
374 19:37:28.010281 SMM Memory Map
375 19:37:28.013725 SMRAM : 0x7b000000 0x800000
376 19:37:28.016942 Subregion 0: 0x7b000000 0x200000
377 19:37:28.020217 Subregion 1: 0x7b200000 0x200000
378 19:37:28.023689 Subregion 2: 0x7b400000 0x400000
379 19:37:28.026765 top_of_ram = 0x77000000
380 19:37:28.033440 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 19:37:28.037121 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 19:37:28.043315 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
383 19:37:28.046813 MTRR Range: Start=ff000000 End=0 (Size 1000000)
384 19:37:28.056704 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
385 19:37:28.063103 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
386 19:37:28.073106 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
387 19:37:28.076447 Processing 211 relocs. Offset value of 0x74c0b000
388 19:37:28.085612 BS: romstage times (exec / console): total (unknown) / 277 ms
389 19:37:28.091609
390 19:37:28.091695
391 19:37:28.101687 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
392 19:37:28.104949 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 19:37:28.114597 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 19:37:28.121224 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 19:37:28.127987 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
396 19:37:28.134595 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
397 19:37:28.181661 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
398 19:37:28.187784 Processing 5008 relocs. Offset value of 0x75d98000
399 19:37:28.191185 BS: postcar times (exec / console): total (unknown) / 59 ms
400 19:37:28.194342
401 19:37:28.194426
402 19:37:28.204904 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
403 19:37:28.204991 Normal boot
404 19:37:28.208642 FW_CONFIG value is 0x804c02
405 19:37:28.211823 PCI: 00:07.0 disabled by fw_config
406 19:37:28.214993 PCI: 00:07.1 disabled by fw_config
407 19:37:28.218778 PCI: 00:0d.2 disabled by fw_config
408 19:37:28.221740
409 19:37:28.225115 PCI: 00:1c.7 disabled by fw_config
410 19:37:28.228236 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
411 19:37:28.235122 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 19:37:28.238391 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 19:37:28.241667
414 19:37:28.245345 GENERIC: 0.0 disabled by fw_config
415 19:37:28.248220 GENERIC: 1.0 disabled by fw_config
416 19:37:28.251681 fw_config match found: DB_USB=USB3_ACTIVE
417 19:37:28.255202 fw_config match found: DB_USB=USB3_ACTIVE
418 19:37:28.258419 fw_config match found: DB_USB=USB3_ACTIVE
419 19:37:28.264856 fw_config match found: DB_USB=USB3_ACTIVE
420 19:37:28.268375 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
421 19:37:28.274783 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
422 19:37:28.278325
423 19:37:28.285286 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 19:37:28.291253 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 19:37:28.295135 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 19:37:28.301516 microcode: Update skipped, already up-to-date
427 19:37:28.308008 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 19:37:28.336232 Detected 4 core, 8 thread CPU.
429 19:37:28.339132 Setting up SMI for CPU
430 19:37:28.342425 IED base = 0x7b400000
431 19:37:28.342510 IED size = 0x00400000
432 19:37:28.345683 Will perform SMM setup.
433 19:37:28.352252 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
434 19:37:28.358942 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 19:37:28.365495 Processing 16 relocs. Offset value of 0x00030000
436 19:37:28.369042 Attempting to start 7 APs
437 19:37:28.372262 Waiting for 10ms after sending INIT.
438 19:37:28.387890 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
439 19:37:28.391496 AP: slot 7 apic_id 6.
440 19:37:28.394647 AP: slot 3 apic_id 7.
441 19:37:28.394732 AP: slot 4 apic_id 5.
442 19:37:28.397697 AP: slot 5 apic_id 4.
443 19:37:28.401237 AP: slot 6 apic_id 2.
444 19:37:28.401322 AP: slot 2 apic_id 3.
445 19:37:28.401390 done.
446 19:37:28.407938 Waiting for 2nd SIPI to complete...done.
447 19:37:28.414895 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 19:37:28.420867 Processing 13 relocs. Offset value of 0x00038000
449 19:37:28.424142 Unable to locate Global NVS
450 19:37:28.430851 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 19:37:28.433944 Installing permanent SMM handler to 0x7b000000
452 19:37:28.444482 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 19:37:28.447660 Processing 794 relocs. Offset value of 0x7b010000
454 19:37:28.457272 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 19:37:28.460750 Processing 13 relocs. Offset value of 0x7b008000
456 19:37:28.467430 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 19:37:28.473944 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 19:37:28.477937 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 19:37:28.483886 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 19:37:28.490458 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 19:37:28.497316 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 19:37:28.503621 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 19:37:28.503708 Unable to locate Global NVS
464 19:37:28.513595 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 19:37:28.517191 Clearing SMI status registers
466 19:37:28.517278 SMI_STS: PM1
467 19:37:28.520471 PM1_STS: PWRBTN
468 19:37:28.527129 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 19:37:28.530316 In relocation handler: CPU 0
470 19:37:28.533863 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 19:37:28.540686 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 19:37:28.540772 Relocation complete.
473 19:37:28.550537 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 19:37:28.550625 In relocation handler: CPU 1
475 19:37:28.557353 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 19:37:28.557438 Relocation complete.
477 19:37:28.567293 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
478 19:37:28.567378 In relocation handler: CPU 2
479 19:37:28.573793 New SMBASE=0x7afff800 IEDBASE=0x7b400000
480 19:37:28.573879 Relocation complete.
481 19:37:28.580541 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
482 19:37:28.583483 In relocation handler: CPU 6
483 19:37:28.590240 New SMBASE=0x7affe800 IEDBASE=0x7b400000
484 19:37:28.593725 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 19:37:28.596951 Relocation complete.
486 19:37:28.603920 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
487 19:37:28.607620 In relocation handler: CPU 3
488 19:37:28.610456 New SMBASE=0x7afff400 IEDBASE=0x7b400000
489 19:37:28.613520 Relocation complete.
490 19:37:28.620141 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
491 19:37:28.623448 In relocation handler: CPU 7
492 19:37:28.626771 New SMBASE=0x7affe400 IEDBASE=0x7b400000
493 19:37:28.630193 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 19:37:28.633473 Relocation complete.
495 19:37:28.639998 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
496 19:37:28.643326 In relocation handler: CPU 5
497 19:37:28.646812 New SMBASE=0x7affec00 IEDBASE=0x7b400000
498 19:37:28.653823 Writing SMRR. base = 0x7b000006, mask=0xff800c00
499 19:37:28.653916 Relocation complete.
500 19:37:28.656773
501 19:37:28.663700 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
502 19:37:28.667868 In relocation handler: CPU 4
503 19:37:28.671386 New SMBASE=0x7afff000 IEDBASE=0x7b400000
504 19:37:28.671472 Relocation complete.
505 19:37:28.675023 Initializing CPU #0
506 19:37:28.678026 CPU: vendor Intel device 806c1
507 19:37:28.681713 CPU: family 06, model 8c, stepping 01
508 19:37:28.685161 Clearing out pending MCEs
509 19:37:28.685245 Setting up local APIC...
510 19:37:28.688198 apic_id: 0x00 done.
511 19:37:28.691282 Turbo is available but hidden
512 19:37:28.694734 Turbo is available and visible
513 19:37:28.698122 microcode: Update skipped, already up-to-date
514 19:37:28.701315 CPU #0 initialized
515 19:37:28.704636 Initializing CPU #7
516 19:37:28.704720 Initializing CPU #3
517 19:37:28.708395 CPU: vendor Intel device 806c1
518 19:37:28.711143 CPU: family 06, model 8c, stepping 01
519 19:37:28.714783 CPU: vendor Intel device 806c1
520 19:37:28.717936 CPU: family 06, model 8c, stepping 01
521 19:37:28.721280 Clearing out pending MCEs
522 19:37:28.724668 Clearing out pending MCEs
523 19:37:28.727675 Setting up local APIC...
524 19:37:28.727760 Initializing CPU #5
525 19:37:28.731362 Initializing CPU #4
526 19:37:28.734511 CPU: vendor Intel device 806c1
527 19:37:28.737985 CPU: family 06, model 8c, stepping 01
528 19:37:28.741155 CPU: vendor Intel device 806c1
529 19:37:28.744834 CPU: family 06, model 8c, stepping 01
530 19:37:28.747632 Clearing out pending MCEs
531 19:37:28.751318 Initializing CPU #6
532 19:37:28.751402 Clearing out pending MCEs
533 19:37:28.754242 Setting up local APIC...
534 19:37:28.757680 Initializing CPU #2
535 19:37:28.757765 apic_id: 0x04 done.
536 19:37:28.761030 Setting up local APIC...
537 19:37:28.767879 microcode: Update skipped, already up-to-date
538 19:37:28.767965 apic_id: 0x05 done.
539 19:37:28.771218 CPU #5 initialized
540 19:37:28.774757 microcode: Update skipped, already up-to-date
541 19:37:28.777781 CPU: vendor Intel device 806c1
542 19:37:28.781032 CPU: family 06, model 8c, stepping 01
543 19:37:28.784505 CPU: vendor Intel device 806c1
544 19:37:28.787609 CPU: family 06, model 8c, stepping 01
545 19:37:28.790747 Clearing out pending MCEs
546 19:37:28.794376 Clearing out pending MCEs
547 19:37:28.797853 Setting up local APIC...
548 19:37:28.797937 apic_id: 0x06 done.
549 19:37:28.801116 Setting up local APIC...
550 19:37:28.804486 CPU #4 initialized
551 19:37:28.804570 apic_id: 0x02 done.
552 19:37:28.807809 Setting up local APIC...
553 19:37:28.811365 microcode: Update skipped, already up-to-date
554 19:37:28.814293 apic_id: 0x07 done.
555 19:37:28.817598 CPU #7 initialized
556 19:37:28.817681 apic_id: 0x03 done.
557 19:37:28.824713 microcode: Update skipped, already up-to-date
558 19:37:28.827771 microcode: Update skipped, already up-to-date
559 19:37:28.831139 Initializing CPU #1
560 19:37:28.834483 microcode: Update skipped, already up-to-date
561 19:37:28.837839 CPU #6 initialized
562 19:37:28.837924 CPU #2 initialized
563 19:37:28.841039 CPU: vendor Intel device 806c1
564 19:37:28.844799 CPU: family 06, model 8c, stepping 01
565 19:37:28.847511 Clearing out pending MCEs
566 19:37:28.851132 CPU #3 initialized
567 19:37:28.851218 Setting up local APIC...
568 19:37:28.854830 apic_id: 0x01 done.
569 19:37:28.857817 microcode: Update skipped, already up-to-date
570 19:37:28.861078
571 19:37:28.861163 CPU #1 initialized
572 19:37:28.864424 bsp_do_flight_plan done after 455 msecs.
573 19:37:28.867958 CPU: frequency set to 4000 MHz
574 19:37:28.871052 Enabling SMIs.
575 19:37:28.877465 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
576 19:37:28.892768 SATAXPCIE1 indicates PCIe NVMe is present
577 19:37:28.896555 Probing TPM: done!
578 19:37:28.900154 Connected to device vid:did:rid of 1ae0:0028:00
579 19:37:28.910471 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
580 19:37:28.913778 Initialized TPM device CR50 revision 0
581 19:37:28.917004 Enabling S0i3.4
582 19:37:28.923584 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
583 19:37:28.927165 Found a VBT of 8704 bytes after decompression
584 19:37:28.933743 cse_lite: CSE RO boot. HybridStorageMode disabled
585 19:37:28.940332 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
586 19:37:29.015770 FSPS returned 0
587 19:37:29.019363 Executing Phase 1 of FspMultiPhaseSiInit
588 19:37:29.028904 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
589 19:37:29.032498 port C0 DISC req: usage 1 usb3 1 usb2 5
590 19:37:29.036071 Raw Buffer output 0 00000511
591 19:37:29.038902 Raw Buffer output 1 00000000
592 19:37:29.043203 pmc_send_ipc_cmd succeeded
593 19:37:29.046264 port C1 DISC req: usage 1 usb3 2 usb2 3
594 19:37:29.049630
595 19:37:29.049716 Raw Buffer output 0 00000321
596 19:37:29.052643 Raw Buffer output 1 00000000
597 19:37:29.056679 pmc_send_ipc_cmd succeeded
598 19:37:29.062531 Detected 4 core, 8 thread CPU.
599 19:37:29.065494 Detected 4 core, 8 thread CPU.
600 19:37:29.299078 Display FSP Version Info HOB
601 19:37:29.302172 Reference Code - CPU = a.0.4c.31
602 19:37:29.305655 uCode Version = 0.0.0.86
603 19:37:29.309576 TXT ACM version = ff.ff.ff.ffff
604 19:37:29.312590 Reference Code - ME = a.0.4c.31
605 19:37:29.315584 MEBx version = 0.0.0.0
606 19:37:29.319290 ME Firmware Version = Consumer SKU
607 19:37:29.322527 Reference Code - PCH = a.0.4c.31
608 19:37:29.325887 PCH-CRID Status = Disabled
609 19:37:29.329017 PCH-CRID Original Value = ff.ff.ff.ffff
610 19:37:29.332100 PCH-CRID New Value = ff.ff.ff.ffff
611 19:37:29.335559 OPROM - RST - RAID = ff.ff.ff.ffff
612 19:37:29.339014 PCH Hsio Version = 4.0.0.0
613 19:37:29.342071 Reference Code - SA - System Agent = a.0.4c.31
614 19:37:29.345689 Reference Code - MRC = 2.0.0.1
615 19:37:29.348883 SA - PCIe Version = a.0.4c.31
616 19:37:29.352242 SA-CRID Status = Disabled
617 19:37:29.355373 SA-CRID Original Value = 0.0.0.1
618 19:37:29.358922 SA-CRID New Value = 0.0.0.1
619 19:37:29.362112 OPROM - VBIOS = ff.ff.ff.ffff
620 19:37:29.365513 IO Manageability Engine FW Version = 11.1.4.0
621 19:37:29.369136 PHY Build Version = 0.0.0.e0
622 19:37:29.372641 Thunderbolt(TM) FW Version = 0.0.0.0
623 19:37:29.378673 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
624 19:37:29.382279 ITSS IRQ Polarities Before:
625 19:37:29.382365 IPC0: 0xffffffff
626 19:37:29.385353 IPC1: 0xffffffff
627 19:37:29.385438 IPC2: 0xffffffff
628 19:37:29.389039 IPC3: 0xffffffff
629 19:37:29.392347 ITSS IRQ Polarities After:
630 19:37:29.392432 IPC0: 0xffffffff
631 19:37:29.395609 IPC1: 0xffffffff
632 19:37:29.395694 IPC2: 0xffffffff
633 19:37:29.398875 IPC3: 0xffffffff
634 19:37:29.402265 Found PCIe Root Port #9 at PCI: 00:1d.0.
635 19:37:29.415251 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
636 19:37:29.425339 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
637 19:37:29.438892 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
638 19:37:29.445286 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
639 19:37:29.445372 Enumerating buses...
640 19:37:29.452348 Show all devs... Before device enumeration.
641 19:37:29.452435 Root Device: enabled 1
642 19:37:29.455355 DOMAIN: 0000: enabled 1
643 19:37:29.458554 CPU_CLUSTER: 0: enabled 1
644 19:37:29.461782 PCI: 00:00.0: enabled 1
645 19:37:29.461868 PCI: 00:02.0: enabled 1
646 19:37:29.465651 PCI: 00:04.0: enabled 1
647 19:37:29.468531 PCI: 00:05.0: enabled 1
648 19:37:29.471884 PCI: 00:06.0: enabled 0
649 19:37:29.471969 PCI: 00:07.0: enabled 0
650 19:37:29.475373 PCI: 00:07.1: enabled 0
651 19:37:29.478562 PCI: 00:07.2: enabled 0
652 19:37:29.482389 PCI: 00:07.3: enabled 0
653 19:37:29.482474 PCI: 00:08.0: enabled 1
654 19:37:29.485550 PCI: 00:09.0: enabled 0
655 19:37:29.488775 PCI: 00:0a.0: enabled 0
656 19:37:29.492154 PCI: 00:0d.0: enabled 1
657 19:37:29.492239 PCI: 00:0d.1: enabled 0
658 19:37:29.495308 PCI: 00:0d.2: enabled 0
659 19:37:29.498718 PCI: 00:0d.3: enabled 0
660 19:37:29.498803 PCI: 00:0e.0: enabled 0
661 19:37:29.502029 PCI: 00:10.2: enabled 1
662 19:37:29.505660 PCI: 00:10.6: enabled 0
663 19:37:29.508675 PCI: 00:10.7: enabled 0
664 19:37:29.508759 PCI: 00:12.0: enabled 0
665 19:37:29.511908 PCI: 00:12.6: enabled 0
666 19:37:29.515001 PCI: 00:13.0: enabled 0
667 19:37:29.518385 PCI: 00:14.0: enabled 1
668 19:37:29.518470 PCI: 00:14.1: enabled 0
669 19:37:29.521604 PCI: 00:14.2: enabled 1
670 19:37:29.525202 PCI: 00:14.3: enabled 1
671 19:37:29.528395 PCI: 00:15.0: enabled 1
672 19:37:29.528480 PCI: 00:15.1: enabled 1
673 19:37:29.531638 PCI: 00:15.2: enabled 1
674 19:37:29.535344 PCI: 00:15.3: enabled 1
675 19:37:29.535429 PCI: 00:16.0: enabled 1
676 19:37:29.538341
677 19:37:29.538426 PCI: 00:16.1: enabled 0
678 19:37:29.542103 PCI: 00:16.2: enabled 0
679 19:37:29.544994 PCI: 00:16.3: enabled 0
680 19:37:29.545079 PCI: 00:16.4: enabled 0
681 19:37:29.548232 PCI: 00:16.5: enabled 0
682 19:37:29.551725 PCI: 00:17.0: enabled 1
683 19:37:29.554919 PCI: 00:19.0: enabled 0
684 19:37:29.555004 PCI: 00:19.1: enabled 1
685 19:37:29.558470 PCI: 00:19.2: enabled 0
686 19:37:29.562146 PCI: 00:1c.0: enabled 1
687 19:37:29.565288 PCI: 00:1c.1: enabled 0
688 19:37:29.565372 PCI: 00:1c.2: enabled 0
689 19:37:29.568605 PCI: 00:1c.3: enabled 0
690 19:37:29.571413 PCI: 00:1c.4: enabled 0
691 19:37:29.575005 PCI: 00:1c.5: enabled 0
692 19:37:29.575089 PCI: 00:1c.6: enabled 1
693 19:37:29.578116 PCI: 00:1c.7: enabled 0
694 19:37:29.581420 PCI: 00:1d.0: enabled 1
695 19:37:29.581505 PCI: 00:1d.1: enabled 0
696 19:37:29.585094 PCI: 00:1d.2: enabled 1
697 19:37:29.588449 PCI: 00:1d.3: enabled 0
698 19:37:29.591768 PCI: 00:1e.0: enabled 1
699 19:37:29.591852 PCI: 00:1e.1: enabled 0
700 19:37:29.594758 PCI: 00:1e.2: enabled 1
701 19:37:29.597986 PCI: 00:1e.3: enabled 1
702 19:37:29.601425 PCI: 00:1f.0: enabled 1
703 19:37:29.601509 PCI: 00:1f.1: enabled 0
704 19:37:29.605089 PCI: 00:1f.2: enabled 1
705 19:37:29.608117 PCI: 00:1f.3: enabled 1
706 19:37:29.611205 PCI: 00:1f.4: enabled 0
707 19:37:29.611290 PCI: 00:1f.5: enabled 1
708 19:37:29.614841 PCI: 00:1f.6: enabled 0
709 19:37:29.618201 PCI: 00:1f.7: enabled 0
710 19:37:29.618285 APIC: 00: enabled 1
711 19:37:29.621529 GENERIC: 0.0: enabled 1
712 19:37:29.625241 GENERIC: 0.0: enabled 1
713 19:37:29.627917 GENERIC: 1.0: enabled 1
714 19:37:29.628024 GENERIC: 0.0: enabled 1
715 19:37:29.631328 GENERIC: 1.0: enabled 1
716 19:37:29.634818 USB0 port 0: enabled 1
717 19:37:29.634903 GENERIC: 0.0: enabled 1
718 19:37:29.638253 USB0 port 0: enabled 1
719 19:37:29.641729 GENERIC: 0.0: enabled 1
720 19:37:29.644845 I2C: 00:1a: enabled 1
721 19:37:29.644929 I2C: 00:31: enabled 1
722 19:37:29.647959 I2C: 00:32: enabled 1
723 19:37:29.651416 I2C: 00:10: enabled 1
724 19:37:29.651500 I2C: 00:15: enabled 1
725 19:37:29.654856 GENERIC: 0.0: enabled 0
726 19:37:29.657934 GENERIC: 1.0: enabled 0
727 19:37:29.658021 GENERIC: 0.0: enabled 1
728 19:37:29.661353
729 19:37:29.661437 SPI: 00: enabled 1
730 19:37:29.664693 SPI: 00: enabled 1
731 19:37:29.664777 PNP: 0c09.0: enabled 1
732 19:37:29.667965 GENERIC: 0.0: enabled 1
733 19:37:29.671463 USB3 port 0: enabled 1
734 19:37:29.674647 USB3 port 1: enabled 1
735 19:37:29.674732 USB3 port 2: enabled 0
736 19:37:29.677926 USB3 port 3: enabled 0
737 19:37:29.681632 USB2 port 0: enabled 0
738 19:37:29.681718 USB2 port 1: enabled 1
739 19:37:29.684623 USB2 port 2: enabled 1
740 19:37:29.687922 USB2 port 3: enabled 0
741 19:37:29.688044 USB2 port 4: enabled 1
742 19:37:29.691668
743 19:37:29.691753 USB2 port 5: enabled 0
744 19:37:29.694508 USB2 port 6: enabled 0
745 19:37:29.698483 USB2 port 7: enabled 0
746 19:37:29.698568 USB2 port 8: enabled 0
747 19:37:29.701403 USB2 port 9: enabled 0
748 19:37:29.704725 USB3 port 0: enabled 0
749 19:37:29.704810 USB3 port 1: enabled 1
750 19:37:29.707893 USB3 port 2: enabled 0
751 19:37:29.711087 USB3 port 3: enabled 0
752 19:37:29.714645 GENERIC: 0.0: enabled 1
753 19:37:29.714730 GENERIC: 1.0: enabled 1
754 19:37:29.717793 APIC: 01: enabled 1
755 19:37:29.721535 APIC: 03: enabled 1
756 19:37:29.721620 APIC: 07: enabled 1
757 19:37:29.724501 APIC: 05: enabled 1
758 19:37:29.724585 APIC: 04: enabled 1
759 19:37:29.728153 APIC: 02: enabled 1
760 19:37:29.730962 APIC: 06: enabled 1
761 19:37:29.731046 Compare with tree...
762 19:37:29.734618 Root Device: enabled 1
763 19:37:29.737832 DOMAIN: 0000: enabled 1
764 19:37:29.741299 PCI: 00:00.0: enabled 1
765 19:37:29.741384 PCI: 00:02.0: enabled 1
766 19:37:29.744448 PCI: 00:04.0: enabled 1
767 19:37:29.747567 GENERIC: 0.0: enabled 1
768 19:37:29.751012 PCI: 00:05.0: enabled 1
769 19:37:29.754485 PCI: 00:06.0: enabled 0
770 19:37:29.754570 PCI: 00:07.0: enabled 0
771 19:37:29.757569 GENERIC: 0.0: enabled 1
772 19:37:29.761712 PCI: 00:07.1: enabled 0
773 19:37:29.764671 GENERIC: 1.0: enabled 1
774 19:37:29.767725 PCI: 00:07.2: enabled 0
775 19:37:29.767809 GENERIC: 0.0: enabled 1
776 19:37:29.771381 PCI: 00:07.3: enabled 0
777 19:37:29.774621 GENERIC: 1.0: enabled 1
778 19:37:29.778076 PCI: 00:08.0: enabled 1
779 19:37:29.780960 PCI: 00:09.0: enabled 0
780 19:37:29.781047 PCI: 00:0a.0: enabled 0
781 19:37:29.784586 PCI: 00:0d.0: enabled 1
782 19:37:29.787934 USB0 port 0: enabled 1
783 19:37:29.790903 USB3 port 0: enabled 1
784 19:37:29.794592 USB3 port 1: enabled 1
785 19:37:29.794667 USB3 port 2: enabled 0
786 19:37:29.797938 USB3 port 3: enabled 0
787 19:37:29.801097 PCI: 00:0d.1: enabled 0
788 19:37:29.804172 PCI: 00:0d.2: enabled 0
789 19:37:29.807741 GENERIC: 0.0: enabled 1
790 19:37:29.807824 PCI: 00:0d.3: enabled 0
791 19:37:29.811309 PCI: 00:0e.0: enabled 0
792 19:37:29.814606 PCI: 00:10.2: enabled 1
793 19:37:29.817787 PCI: 00:10.6: enabled 0
794 19:37:29.821005 PCI: 00:10.7: enabled 0
795 19:37:29.821088 PCI: 00:12.0: enabled 0
796 19:37:29.824490 PCI: 00:12.6: enabled 0
797 19:37:29.827717 PCI: 00:13.0: enabled 0
798 19:37:29.831006 PCI: 00:14.0: enabled 1
799 19:37:29.834510 USB0 port 0: enabled 1
800 19:37:29.834582 USB2 port 0: enabled 0
801 19:37:29.837778 USB2 port 1: enabled 1
802 19:37:29.840875 USB2 port 2: enabled 1
803 19:37:29.844231 USB2 port 3: enabled 0
804 19:37:29.847442 USB2 port 4: enabled 1
805 19:37:29.850974 USB2 port 5: enabled 0
806 19:37:29.851048 USB2 port 6: enabled 0
807 19:37:29.854178 USB2 port 7: enabled 0
808 19:37:29.857471 USB2 port 8: enabled 0
809 19:37:29.860773 USB2 port 9: enabled 0
810 19:37:29.863840 USB3 port 0: enabled 0
811 19:37:29.863917 USB3 port 1: enabled 1
812 19:37:29.867621
813 19:37:29.867705 USB3 port 2: enabled 0
814 19:37:29.870688 USB3 port 3: enabled 0
815 19:37:29.873991 PCI: 00:14.1: enabled 0
816 19:37:29.877457 PCI: 00:14.2: enabled 1
817 19:37:29.880987 PCI: 00:14.3: enabled 1
818 19:37:29.881065 GENERIC: 0.0: enabled 1
819 19:37:29.883883 PCI: 00:15.0: enabled 1
820 19:37:29.887233 I2C: 00:1a: enabled 1
821 19:37:29.890958 I2C: 00:31: enabled 1
822 19:37:29.891039 I2C: 00:32: enabled 1
823 19:37:29.893934 PCI: 00:15.1: enabled 1
824 19:37:29.897554 I2C: 00:10: enabled 1
825 19:37:29.900638 PCI: 00:15.2: enabled 1
826 19:37:29.904094 PCI: 00:15.3: enabled 1
827 19:37:29.904178 PCI: 00:16.0: enabled 1
828 19:37:29.908186 PCI: 00:16.1: enabled 0
829 19:37:29.912099 PCI: 00:16.2: enabled 0
830 19:37:29.912183 PCI: 00:16.3: enabled 0
831 19:37:29.915382 PCI: 00:16.4: enabled 0
832 19:37:29.918900 PCI: 00:16.5: enabled 0
833 19:37:29.922253 PCI: 00:17.0: enabled 1
834 19:37:29.922328 PCI: 00:19.0: enabled 0
835 19:37:29.925497 PCI: 00:19.1: enabled 1
836 19:37:29.928783 I2C: 00:15: enabled 1
837 19:37:29.932126 PCI: 00:19.2: enabled 0
838 19:37:29.935524 PCI: 00:1d.0: enabled 1
839 19:37:29.935609 GENERIC: 0.0: enabled 1
840 19:37:29.938698 PCI: 00:1e.0: enabled 1
841 19:37:29.942263 PCI: 00:1e.1: enabled 0
842 19:37:29.945581 PCI: 00:1e.2: enabled 1
843 19:37:29.945653 SPI: 00: enabled 1
844 19:37:29.948622 PCI: 00:1e.3: enabled 1
845 19:37:29.952229 SPI: 00: enabled 1
846 19:37:29.955250 PCI: 00:1f.0: enabled 1
847 19:37:29.958545 PNP: 0c09.0: enabled 1
848 19:37:29.958617 PCI: 00:1f.1: enabled 0
849 19:37:30.010382 PCI: 00:1f.2: enabled 1
850 19:37:30.010491 GENERIC: 0.0: enabled 1
851 19:37:30.010755 GENERIC: 0.0: enabled 1
852 19:37:30.010839 GENERIC: 1.0: enabled 1
853 19:37:30.011125 PCI: 00:1f.3: enabled 1
854 19:37:30.011237 PCI: 00:1f.4: enabled 0
855 19:37:30.011308 PCI: 00:1f.5: enabled 1
856 19:37:30.011554 PCI: 00:1f.6: enabled 0
857 19:37:30.011621 PCI: 00:1f.7: enabled 0
858 19:37:30.012198 CPU_CLUSTER: 0: enabled 1
859 19:37:30.012269 APIC: 00: enabled 1
860 19:37:30.012328 APIC: 01: enabled 1
861 19:37:30.012741 APIC: 03: enabled 1
862 19:37:30.012811 APIC: 07: enabled 1
863 19:37:30.013054 APIC: 05: enabled 1
864 19:37:30.013117 APIC: 04: enabled 1
865 19:37:30.013175 APIC: 02: enabled 1
866 19:37:30.013231 APIC: 06: enabled 1
867 19:37:30.013287 Root Device scanning...
868 19:37:30.016193 scan_static_bus for Root Device
869 19:37:30.016262 DOMAIN: 0000 enabled
870 19:37:30.016322 CPU_CLUSTER: 0 enabled
871 19:37:30.019481 DOMAIN: 0000 scanning...
872 19:37:30.023258 PCI: pci_scan_bus for bus 00
873 19:37:30.026234 PCI: 00:00.0 [8086/0000] ops
874 19:37:30.029679 PCI: 00:00.0 [8086/9a12] enabled
875 19:37:30.033113 PCI: 00:02.0 [8086/0000] bus ops
876 19:37:30.036358 PCI: 00:02.0 [8086/9a40] enabled
877 19:37:30.039536 PCI: 00:04.0 [8086/0000] bus ops
878 19:37:30.042692 PCI: 00:04.0 [8086/9a03] enabled
879 19:37:30.046096 PCI: 00:05.0 [8086/9a19] enabled
880 19:37:30.049485 PCI: 00:07.0 [0000/0000] hidden
881 19:37:30.052970 PCI: 00:08.0 [8086/9a11] enabled
882 19:37:30.056091 PCI: 00:0a.0 [8086/9a0d] disabled
883 19:37:30.059172 PCI: 00:0d.0 [8086/0000] bus ops
884 19:37:30.062901 PCI: 00:0d.0 [8086/9a13] enabled
885 19:37:30.066159 PCI: 00:14.0 [8086/0000] bus ops
886 19:37:30.069241 PCI: 00:14.0 [8086/a0ed] enabled
887 19:37:30.072589 PCI: 00:14.2 [8086/a0ef] enabled
888 19:37:30.076252 PCI: 00:14.3 [8086/0000] bus ops
889 19:37:30.078960 PCI: 00:14.3 [8086/a0f0] enabled
890 19:37:30.082408 PCI: 00:15.0 [8086/0000] bus ops
891 19:37:30.085848 PCI: 00:15.0 [8086/a0e8] enabled
892 19:37:30.088926 PCI: 00:15.1 [8086/0000] bus ops
893 19:37:30.092586 PCI: 00:15.1 [8086/a0e9] enabled
894 19:37:30.095961 PCI: 00:15.2 [8086/0000] bus ops
895 19:37:30.099200 PCI: 00:15.2 [8086/a0ea] enabled
896 19:37:30.102428 PCI: 00:15.3 [8086/0000] bus ops
897 19:37:30.105819 PCI: 00:15.3 [8086/a0eb] enabled
898 19:37:30.109598 PCI: 00:16.0 [8086/0000] ops
899 19:37:30.112436 PCI: 00:16.0 [8086/a0e0] enabled
900 19:37:30.115718 PCI: Static device PCI: 00:17.0 not found, disabling it.
901 19:37:30.119019 PCI: 00:19.0 [8086/0000] bus ops
902 19:37:30.122875 PCI: 00:19.0 [8086/a0c5] disabled
903 19:37:30.125971
904 19:37:30.126057 PCI: 00:19.1 [8086/0000] bus ops
905 19:37:30.129033
906 19:37:30.129148 PCI: 00:19.1 [8086/a0c6] enabled
907 19:37:30.132304
908 19:37:30.132388 PCI: 00:1d.0 [8086/0000] bus ops
909 19:37:30.135529
910 19:37:30.135613 PCI: 00:1d.0 [8086/a0b0] enabled
911 19:37:30.139007
912 19:37:30.139092 PCI: 00:1e.0 [8086/0000] ops
913 19:37:30.142677 PCI: 00:1e.0 [8086/a0a8] enabled
914 19:37:30.145784 PCI: 00:1e.2 [8086/0000] bus ops
915 19:37:30.149136 PCI: 00:1e.2 [8086/a0aa] enabled
916 19:37:30.151960 PCI: 00:1e.3 [8086/0000] bus ops
917 19:37:30.155691 PCI: 00:1e.3 [8086/a0ab] enabled
918 19:37:30.158788 PCI: 00:1f.0 [8086/0000] bus ops
919 19:37:30.162298 PCI: 00:1f.0 [8086/a087] enabled
920 19:37:30.165889 RTC Init
921 19:37:30.168777 Set power on after power failure.
922 19:37:30.168860 Disabling Deep S3
923 19:37:30.172006 Disabling Deep S3
924 19:37:30.176105 Disabling Deep S4
925 19:37:30.176188 Disabling Deep S4
926 19:37:30.179059 Disabling Deep S5
927 19:37:30.179151 Disabling Deep S5
928 19:37:30.182092 PCI: 00:1f.2 [0000/0000] hidden
929 19:37:30.185637 PCI: 00:1f.3 [8086/0000] bus ops
930 19:37:30.188870 PCI: 00:1f.3 [8086/a0c8] enabled
931 19:37:30.192013 PCI: 00:1f.5 [8086/0000] bus ops
932 19:37:30.195224 PCI: 00:1f.5 [8086/a0a4] enabled
933 19:37:30.198921 PCI: Leftover static devices:
934 19:37:30.202156 PCI: 00:10.2
935 19:37:30.202239 PCI: 00:10.6
936 19:37:30.202325 PCI: 00:10.7
937 19:37:30.205548 PCI: 00:06.0
938 19:37:30.205631 PCI: 00:07.1
939 19:37:30.208677 PCI: 00:07.2
940 19:37:30.208761 PCI: 00:07.3
941 19:37:30.208826 PCI: 00:09.0
942 19:37:30.212408 PCI: 00:0d.1
943 19:37:30.212518 PCI: 00:0d.2
944 19:37:30.215299 PCI: 00:0d.3
945 19:37:30.215383 PCI: 00:0e.0
946 19:37:30.218664 PCI: 00:12.0
947 19:37:30.218748 PCI: 00:12.6
948 19:37:30.218814 PCI: 00:13.0
949 19:37:30.221867 PCI: 00:14.1
950 19:37:30.221951 PCI: 00:16.1
951 19:37:30.225423 PCI: 00:16.2
952 19:37:30.225507 PCI: 00:16.3
953 19:37:30.225573 PCI: 00:16.4
954 19:37:30.228719 PCI: 00:16.5
955 19:37:30.228802 PCI: 00:17.0
956 19:37:30.232254 PCI: 00:19.2
957 19:37:30.232338 PCI: 00:1e.1
958 19:37:30.232413 PCI: 00:1f.1
959 19:37:30.235537
960 19:37:30.235620 PCI: 00:1f.4
961 19:37:30.235687 PCI: 00:1f.6
962 19:37:30.238619 PCI: 00:1f.7
963 19:37:30.241693 PCI: Check your devicetree.cb.
964 19:37:30.241777 PCI: 00:02.0 scanning...
965 19:37:30.245395 scan_generic_bus for PCI: 00:02.0
966 19:37:30.252146 scan_generic_bus for PCI: 00:02.0 done
967 19:37:30.255558 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
968 19:37:30.258587 PCI: 00:04.0 scanning...
969 19:37:30.262184 scan_generic_bus for PCI: 00:04.0
970 19:37:30.265309 GENERIC: 0.0 enabled
971 19:37:30.268998 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
972 19:37:30.275364 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
973 19:37:30.279232 PCI: 00:0d.0 scanning...
974 19:37:30.282125 scan_static_bus for PCI: 00:0d.0
975 19:37:30.282210 USB0 port 0 enabled
976 19:37:30.285306 USB0 port 0 scanning...
977 19:37:30.288586 scan_static_bus for USB0 port 0
978 19:37:30.292119 USB3 port 0 enabled
979 19:37:30.292202 USB3 port 1 enabled
980 19:37:30.295318 USB3 port 2 disabled
981 19:37:30.298586 USB3 port 3 disabled
982 19:37:30.298670 USB3 port 0 scanning...
983 19:37:30.302116 scan_static_bus for USB3 port 0
984 19:37:30.305147 scan_static_bus for USB3 port 0 done
985 19:37:30.311866 scan_bus: bus USB3 port 0 finished in 6 msecs
986 19:37:30.315455 USB3 port 1 scanning...
987 19:37:30.318582 scan_static_bus for USB3 port 1
988 19:37:30.321763 scan_static_bus for USB3 port 1 done
989 19:37:30.325297 scan_bus: bus USB3 port 1 finished in 6 msecs
990 19:37:30.328520 scan_static_bus for USB0 port 0 done
991 19:37:30.335009 scan_bus: bus USB0 port 0 finished in 43 msecs
992 19:37:30.338640 scan_static_bus for PCI: 00:0d.0 done
993 19:37:30.341762 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
994 19:37:30.345466 PCI: 00:14.0 scanning...
995 19:37:30.348392 scan_static_bus for PCI: 00:14.0
996 19:37:30.352003 USB0 port 0 enabled
997 19:37:30.352101 USB0 port 0 scanning...
998 19:37:30.355552 scan_static_bus for USB0 port 0
999 19:37:30.358444 USB2 port 0 disabled
1000 19:37:30.362032 USB2 port 1 enabled
1001 19:37:30.362116 USB2 port 2 enabled
1002 19:37:30.365438 USB2 port 3 disabled
1003 19:37:30.368818 USB2 port 4 enabled
1004 19:37:30.368902 USB2 port 5 disabled
1005 19:37:30.371775 USB2 port 6 disabled
1006 19:37:30.375545 USB2 port 7 disabled
1007 19:37:30.375628 USB2 port 8 disabled
1008 19:37:30.378430 USB2 port 9 disabled
1009 19:37:30.378513 USB3 port 0 disabled
1010 19:37:30.381923 USB3 port 1 enabled
1011 19:37:30.384890 USB3 port 2 disabled
1012 19:37:30.384974 USB3 port 3 disabled
1013 19:37:30.388589 USB2 port 1 scanning...
1014 19:37:30.391887 scan_static_bus for USB2 port 1
1015 19:37:30.395178 scan_static_bus for USB2 port 1 done
1016 19:37:30.401582 scan_bus: bus USB2 port 1 finished in 6 msecs
1017 19:37:30.401690 USB2 port 2 scanning...
1018 19:37:30.405138 scan_static_bus for USB2 port 2
1019 19:37:30.411543 scan_static_bus for USB2 port 2 done
1020 19:37:30.415251 scan_bus: bus USB2 port 2 finished in 6 msecs
1021 19:37:30.418618 USB2 port 4 scanning...
1022 19:37:30.421926 scan_static_bus for USB2 port 4
1023 19:37:30.424928 scan_static_bus for USB2 port 4 done
1024 19:37:30.428538 scan_bus: bus USB2 port 4 finished in 6 msecs
1025 19:37:30.431922 USB3 port 1 scanning...
1026 19:37:30.434943 scan_static_bus for USB3 port 1
1027 19:37:30.438231 scan_static_bus for USB3 port 1 done
1028 19:37:30.441933 scan_bus: bus USB3 port 1 finished in 6 msecs
1029 19:37:30.448304 scan_static_bus for USB0 port 0 done
1030 19:37:30.451919 scan_bus: bus USB0 port 0 finished in 93 msecs
1031 19:37:30.455331 scan_static_bus for PCI: 00:14.0 done
1032 19:37:30.461695 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1033 19:37:30.461780 PCI: 00:14.3 scanning...
1034 19:37:30.464856 scan_static_bus for PCI: 00:14.3
1035 19:37:30.468175 GENERIC: 0.0 enabled
1036 19:37:30.471610 scan_static_bus for PCI: 00:14.3 done
1037 19:37:30.478302 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1038 19:37:30.478387 PCI: 00:15.0 scanning...
1039 19:37:30.481476 scan_static_bus for PCI: 00:15.0
1040 19:37:30.485245 I2C: 00:1a enabled
1041 19:37:30.485330 I2C: 00:31 enabled
1042 19:37:30.488960
1043 19:37:30.489046 I2C: 00:32 enabled
1044 19:37:30.492137 scan_static_bus for PCI: 00:15.0 done
1045 19:37:30.498547 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1046 19:37:30.498634 PCI: 00:15.1 scanning...
1047 19:37:30.502229 scan_static_bus for PCI: 00:15.1
1048 19:37:30.505391 I2C: 00:10 enabled
1049 19:37:30.508799 scan_static_bus for PCI: 00:15.1 done
1050 19:37:30.515748 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1051 19:37:30.515835 PCI: 00:15.2 scanning...
1052 19:37:30.518675 scan_static_bus for PCI: 00:15.2
1053 19:37:30.525665 scan_static_bus for PCI: 00:15.2 done
1054 19:37:30.528812 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1055 19:37:30.532081 PCI: 00:15.3 scanning...
1056 19:37:30.535327 scan_static_bus for PCI: 00:15.3
1057 19:37:30.538906 scan_static_bus for PCI: 00:15.3 done
1058 19:37:30.541692 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1059 19:37:30.545765 PCI: 00:19.1 scanning...
1060 19:37:30.548679 scan_static_bus for PCI: 00:19.1
1061 19:37:30.551854 I2C: 00:15 enabled
1062 19:37:30.555257 scan_static_bus for PCI: 00:19.1 done
1063 19:37:30.558579 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1064 19:37:30.561775 PCI: 00:1d.0 scanning...
1065 19:37:30.565099 do_pci_scan_bridge for PCI: 00:1d.0
1066 19:37:30.568382 PCI: pci_scan_bus for bus 01
1067 19:37:30.572091 PCI: 01:00.0 [1c5c/174a] enabled
1068 19:37:30.575266 GENERIC: 0.0 enabled
1069 19:37:30.578414 Enabling Common Clock Configuration
1070 19:37:30.581906 L1 Sub-State supported from root port 29
1071 19:37:30.585099 L1 Sub-State Support = 0xf
1072 19:37:30.588339 CommonModeRestoreTime = 0x28
1073 19:37:30.592037 Power On Value = 0x16, Power On Scale = 0x0
1074 19:37:30.594995 ASPM: Enabled L1
1075 19:37:30.598457 PCIe: Max_Payload_Size adjusted to 128
1076 19:37:30.601670 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1077 19:37:30.605220
1078 19:37:30.605321 PCI: 00:1e.2 scanning...
1079 19:37:30.608632 scan_generic_bus for PCI: 00:1e.2
1080 19:37:30.611823 SPI: 00 enabled
1081 19:37:30.618249 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1082 19:37:30.621725 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1083 19:37:30.624900 PCI: 00:1e.3 scanning...
1084 19:37:30.628702 scan_generic_bus for PCI: 00:1e.3
1085 19:37:30.628804 SPI: 00 enabled
1086 19:37:30.631716
1087 19:37:30.634877 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1088 19:37:30.641592 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1089 19:37:30.644925 PCI: 00:1f.0 scanning...
1090 19:37:30.648584 scan_static_bus for PCI: 00:1f.0
1091 19:37:30.648670 PNP: 0c09.0 enabled
1092 19:37:30.651967 PNP: 0c09.0 scanning...
1093 19:37:30.655317 scan_static_bus for PNP: 0c09.0
1094 19:37:30.658698 scan_static_bus for PNP: 0c09.0 done
1095 19:37:30.661690 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1096 19:37:30.668235 scan_static_bus for PCI: 00:1f.0 done
1097 19:37:30.671560 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1098 19:37:30.674958 PCI: 00:1f.2 scanning...
1099 19:37:30.678191 scan_static_bus for PCI: 00:1f.2
1100 19:37:30.681807 GENERIC: 0.0 enabled
1101 19:37:30.681911 GENERIC: 0.0 scanning...
1102 19:37:30.685049 scan_static_bus for GENERIC: 0.0
1103 19:37:30.687968 GENERIC: 0.0 enabled
1104 19:37:30.691433 GENERIC: 1.0 enabled
1105 19:37:30.694683 scan_static_bus for GENERIC: 0.0 done
1106 19:37:30.698218 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1107 19:37:30.701352 scan_static_bus for PCI: 00:1f.2 done
1108 19:37:30.708158 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1109 19:37:30.711636 PCI: 00:1f.3 scanning...
1110 19:37:30.714905 scan_static_bus for PCI: 00:1f.3
1111 19:37:30.718015 scan_static_bus for PCI: 00:1f.3 done
1112 19:37:30.721588 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1113 19:37:30.724938 PCI: 00:1f.5 scanning...
1114 19:37:30.728200 scan_generic_bus for PCI: 00:1f.5
1115 19:37:30.731898 scan_generic_bus for PCI: 00:1f.5 done
1116 19:37:30.738342 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1117 19:37:30.741405 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1118 19:37:30.744472 scan_static_bus for Root Device done
1119 19:37:30.751312 scan_bus: bus Root Device finished in 737 msecs
1120 19:37:30.751458 done
1121 19:37:30.757843 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1122 19:37:30.761421 Chrome EC: UHEPI supported
1123 19:37:30.767951 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1124 19:37:30.771225 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1125 19:37:30.777821 SPI flash protection: WPSW=0 SRP0=0
1126 19:37:30.781165 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1127 19:37:30.788020 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1128 19:37:30.791064 found VGA at PCI: 00:02.0
1129 19:37:30.794425 Setting up VGA for PCI: 00:02.0
1130 19:37:30.797872 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1131 19:37:30.804338 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1132 19:37:30.804423 Allocating resources...
1133 19:37:30.807530 Reading resources...
1134 19:37:30.811249 Root Device read_resources bus 0 link: 0
1135 19:37:30.814536 DOMAIN: 0000 read_resources bus 0 link: 0
1136 19:37:30.817658
1137 19:37:30.820996 PCI: 00:04.0 read_resources bus 1 link: 0
1138 19:37:30.827833 PCI: 00:04.0 read_resources bus 1 link: 0 done
1139 19:37:30.830932 PCI: 00:0d.0 read_resources bus 0 link: 0
1140 19:37:30.834200 USB0 port 0 read_resources bus 0 link: 0
1141 19:37:30.841462 USB0 port 0 read_resources bus 0 link: 0 done
1142 19:37:30.844427 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1143 19:37:30.851183 PCI: 00:14.0 read_resources bus 0 link: 0
1144 19:37:30.854868 USB0 port 0 read_resources bus 0 link: 0
1145 19:37:30.861423 USB0 port 0 read_resources bus 0 link: 0 done
1146 19:37:30.864505 PCI: 00:14.0 read_resources bus 0 link: 0 done
1147 19:37:30.871315 PCI: 00:14.3 read_resources bus 0 link: 0
1148 19:37:30.874580 PCI: 00:14.3 read_resources bus 0 link: 0 done
1149 19:37:30.881195 PCI: 00:15.0 read_resources bus 0 link: 0
1150 19:37:30.884203 PCI: 00:15.0 read_resources bus 0 link: 0 done
1151 19:37:30.890966 PCI: 00:15.1 read_resources bus 0 link: 0
1152 19:37:30.894264 PCI: 00:15.1 read_resources bus 0 link: 0 done
1153 19:37:30.901563 PCI: 00:19.1 read_resources bus 0 link: 0
1154 19:37:30.904768 PCI: 00:19.1 read_resources bus 0 link: 0 done
1155 19:37:30.911658 PCI: 00:1d.0 read_resources bus 1 link: 0
1156 19:37:30.914802 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1157 19:37:30.921502 PCI: 00:1e.2 read_resources bus 2 link: 0
1158 19:37:30.924899 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1159 19:37:30.932125 PCI: 00:1e.3 read_resources bus 3 link: 0
1160 19:37:30.935168 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1161 19:37:30.941528 PCI: 00:1f.0 read_resources bus 0 link: 0
1162 19:37:30.944942 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1163 19:37:30.948405 PCI: 00:1f.2 read_resources bus 0 link: 0
1164 19:37:30.955127 GENERIC: 0.0 read_resources bus 0 link: 0
1165 19:37:30.958396 GENERIC: 0.0 read_resources bus 0 link: 0 done
1166 19:37:30.965316 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1167 19:37:30.968319 DOMAIN: 0000 read_resources bus 0 link: 0 done
1168 19:37:30.971595
1169 19:37:30.975098 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1170 19:37:30.978770 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1171 19:37:30.985400 Root Device read_resources bus 0 link: 0 done
1172 19:37:30.988450 Done reading resources.
1173 19:37:30.992083 Show resources in subtree (Root Device)...After reading.
1174 19:37:30.998507 Root Device child on link 0 DOMAIN: 0000
1175 19:37:31.001897 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1176 19:37:31.011968 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1177 19:37:31.022106 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1178 19:37:31.022199 PCI: 00:00.0
1179 19:37:31.031639 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1180 19:37:31.041669 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1181 19:37:31.051519 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1182 19:37:31.061355 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1183 19:37:31.067956 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1184 19:37:31.078372 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1185 19:37:31.087905 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1186 19:37:31.098419 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1187 19:37:31.108007 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1188 19:37:31.114838 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1189 19:37:31.124890 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1190 19:37:31.134852 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1191 19:37:31.144562 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1192 19:37:31.155049 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1193 19:37:31.161456 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1194 19:37:31.171574 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1195 19:37:31.181558 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1196 19:37:31.191378 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1197 19:37:31.201089 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1198 19:37:31.211268 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1199 19:37:31.211775 PCI: 00:02.0
1200 19:37:31.221278 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1201 19:37:31.224427
1202 19:37:31.234615 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1203 19:37:31.240895 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1204 19:37:31.247751 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1205 19:37:31.257150 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1206 19:37:31.257239 GENERIC: 0.0
1207 19:37:31.260700 PCI: 00:05.0
1208 19:37:31.270726 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1209 19:37:31.273830 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1210 19:37:31.277259 GENERIC: 0.0
1211 19:37:31.277341 PCI: 00:08.0
1212 19:37:31.287190 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 19:37:31.290326 PCI: 00:0a.0
1214 19:37:31.294026 PCI: 00:0d.0 child on link 0 USB0 port 0
1215 19:37:31.303702 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1216 19:37:31.306937 USB0 port 0 child on link 0 USB3 port 0
1217 19:37:31.310343 USB3 port 0
1218 19:37:31.310428 USB3 port 1
1219 19:37:31.313910 USB3 port 2
1220 19:37:31.313986 USB3 port 3
1221 19:37:31.320344 PCI: 00:14.0 child on link 0 USB0 port 0
1222 19:37:31.330247 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1223 19:37:31.334002 USB0 port 0 child on link 0 USB2 port 0
1224 19:37:31.336860 USB2 port 0
1225 19:37:31.336933 USB2 port 1
1226 19:37:31.340189 USB2 port 2
1227 19:37:31.340263 USB2 port 3
1228 19:37:31.343799 USB2 port 4
1229 19:37:31.343876 USB2 port 5
1230 19:37:31.347042 USB2 port 6
1231 19:37:31.347120 USB2 port 7
1232 19:37:31.350504 USB2 port 8
1233 19:37:31.350578 USB2 port 9
1234 19:37:31.353503 USB3 port 0
1235 19:37:31.353577 USB3 port 1
1236 19:37:31.357221 USB3 port 2
1237 19:37:31.357305 USB3 port 3
1238 19:37:31.360305 PCI: 00:14.2
1239 19:37:31.370337 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1240 19:37:31.380214 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1241 19:37:31.383742 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1242 19:37:31.393644 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 19:37:31.396620 GENERIC: 0.0
1244 19:37:31.400123 PCI: 00:15.0 child on link 0 I2C: 00:1a
1245 19:37:31.409910 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 19:37:31.413846 I2C: 00:1a
1247 19:37:31.413922 I2C: 00:31
1248 19:37:31.417012 I2C: 00:32
1249 19:37:31.420037 PCI: 00:15.1 child on link 0 I2C: 00:10
1250 19:37:31.430379 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 19:37:31.430460 I2C: 00:10
1252 19:37:31.433557 PCI: 00:15.2
1253 19:37:31.443347 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 19:37:31.443431 PCI: 00:15.3
1255 19:37:31.453579 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 19:37:31.456679 PCI: 00:16.0
1257 19:37:31.466723 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 19:37:31.466806 PCI: 00:19.0
1259 19:37:31.473360 PCI: 00:19.1 child on link 0 I2C: 00:15
1260 19:37:31.483127 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 19:37:31.483205 I2C: 00:15
1262 19:37:31.486874 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1263 19:37:31.496516 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1264 19:37:31.506446 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1265 19:37:31.516446 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1266 19:37:31.516524 GENERIC: 0.0
1267 19:37:31.519715 PCI: 01:00.0
1268 19:37:31.529653 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1269 19:37:31.539590 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1270 19:37:31.546042 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1271 19:37:31.549506 PCI: 00:1e.0
1272 19:37:31.559611 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1273 19:37:31.562783 PCI: 00:1e.2 child on link 0 SPI: 00
1274 19:37:31.573007 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1275 19:37:31.576076 SPI: 00
1276 19:37:31.579460 PCI: 00:1e.3 child on link 0 SPI: 00
1277 19:37:31.589541 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1278 19:37:31.589624 SPI: 00
1279 19:37:31.596174 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1280 19:37:31.602803 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1281 19:37:31.605914 PNP: 0c09.0
1282 19:37:31.612629 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1283 19:37:31.615941
1284 19:37:31.619365 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1285 19:37:31.629236 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1286 19:37:31.635968 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1287 19:37:31.642397 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1288 19:37:31.642480 GENERIC: 0.0
1289 19:37:31.645971 GENERIC: 1.0
1290 19:37:31.646048 PCI: 00:1f.3
1291 19:37:31.655840 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1292 19:37:31.669473 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1293 19:37:31.669565 PCI: 00:1f.5
1294 19:37:31.679252 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1295 19:37:31.682435 CPU_CLUSTER: 0 child on link 0 APIC: 00
1296 19:37:31.682538 APIC: 00
1297 19:37:31.685610 APIC: 01
1298 19:37:31.685696 APIC: 03
1299 19:37:31.689176 APIC: 07
1300 19:37:31.689262 APIC: 05
1301 19:37:31.689329 APIC: 04
1302 19:37:31.692653 APIC: 02
1303 19:37:31.692739 APIC: 06
1304 19:37:31.699190 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1305 19:37:31.705892 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1306 19:37:31.712325 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1307 19:37:31.719033 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1308 19:37:31.722476 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1309 19:37:31.725329 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1310 19:37:31.732378 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1311 19:37:31.738986 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1312 19:37:31.745308 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1313 19:37:31.751898 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1314 19:37:31.762133 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1315 19:37:31.765286 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1316 19:37:31.775669 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1317 19:37:31.782156 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1318 19:37:31.788703 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1319 19:37:31.791738 DOMAIN: 0000: Resource ranges:
1320 19:37:31.795443 * Base: 1000, Size: 800, Tag: 100
1321 19:37:31.798359 * Base: 1900, Size: e700, Tag: 100
1322 19:37:31.805219 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1323 19:37:31.812102 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1324 19:37:31.818450 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1325 19:37:31.824901 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1326 19:37:31.835134 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1327 19:37:31.841898 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1328 19:37:31.848706 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1329 19:37:31.858247 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1330 19:37:31.865164 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1331 19:37:31.871901 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1332 19:37:31.881519 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1333 19:37:31.888075 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1334 19:37:31.894796 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1335 19:37:31.904831 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1336 19:37:31.911608 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1337 19:37:31.918071 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1338 19:37:31.927745 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1339 19:37:31.934853 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1340 19:37:31.941561 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1341 19:37:31.951141 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1342 19:37:31.958143 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1343 19:37:31.964320 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1344 19:37:31.974559 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1345 19:37:31.980951 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1346 19:37:31.987596 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1347 19:37:31.991100 DOMAIN: 0000: Resource ranges:
1348 19:37:31.994251 * Base: 7fc00000, Size: 40400000, Tag: 200
1349 19:37:32.001334 * Base: d0000000, Size: 28000000, Tag: 200
1350 19:37:32.004137 * Base: fa000000, Size: 1000000, Tag: 200
1351 19:37:32.007771 * Base: fb001000, Size: 2fff000, Tag: 200
1352 19:37:32.014303 * Base: fe010000, Size: 2e000, Tag: 200
1353 19:37:32.017426 * Base: fe03f000, Size: d41000, Tag: 200
1354 19:37:32.021017 * Base: fed88000, Size: 8000, Tag: 200
1355 19:37:32.024089 * Base: fed93000, Size: d000, Tag: 200
1356 19:37:32.030750 * Base: feda2000, Size: 1e000, Tag: 200
1357 19:37:32.033958 * Base: fede0000, Size: 1220000, Tag: 200
1358 19:37:32.037615 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1359 19:37:32.043854 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1360 19:37:32.050818 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1361 19:37:32.057322 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1362 19:37:32.064071 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1363 19:37:32.070558 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1364 19:37:32.077346 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1365 19:37:32.083696 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1366 19:37:32.090503 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1367 19:37:32.097140 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1368 19:37:32.103938 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1369 19:37:32.110385 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1370 19:37:32.117150 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1371 19:37:32.123595 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1372 19:37:32.130195 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1373 19:37:32.137083 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1374 19:37:32.143458 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1375 19:37:32.150018 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1376 19:37:32.156872 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1377 19:37:32.163215 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1378 19:37:32.169979 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1379 19:37:32.176632 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1380 19:37:32.183273 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1381 19:37:32.193271 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1382 19:37:32.199816 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1383 19:37:32.203158 PCI: 00:1d.0: Resource ranges:
1384 19:37:32.206425 * Base: 7fc00000, Size: 100000, Tag: 200
1385 19:37:32.213096 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1386 19:37:32.220037 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1387 19:37:32.226398 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1388 19:37:32.236735 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1389 19:37:32.242788 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1390 19:37:32.246107 Root Device assign_resources, bus 0 link: 0
1391 19:37:32.252979 DOMAIN: 0000 assign_resources, bus 0 link: 0
1392 19:37:32.259857 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1393 19:37:32.269766 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1394 19:37:32.276409 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1395 19:37:32.286146 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1396 19:37:32.289440 PCI: 00:04.0 assign_resources, bus 1 link: 0
1397 19:37:32.292921 PCI: 00:04.0 assign_resources, bus 1 link: 0
1398 19:37:32.302897 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1399 19:37:32.309434 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1400 19:37:32.319511 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1401 19:37:32.322908 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1402 19:37:32.330219 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1403 19:37:32.335862 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1404 19:37:32.339530 PCI: 00:14.0 assign_resources, bus 0 link: 0
1405 19:37:32.346353 PCI: 00:14.0 assign_resources, bus 0 link: 0
1406 19:37:32.352713 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1407 19:37:32.362587 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1408 19:37:32.369230 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1409 19:37:32.375842 PCI: 00:14.3 assign_resources, bus 0 link: 0
1410 19:37:32.379140 PCI: 00:14.3 assign_resources, bus 0 link: 0
1411 19:37:32.385837 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1412 19:37:32.392532 PCI: 00:15.0 assign_resources, bus 0 link: 0
1413 19:37:32.396089 PCI: 00:15.0 assign_resources, bus 0 link: 0
1414 19:37:32.405709 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1415 19:37:32.409409 PCI: 00:15.1 assign_resources, bus 0 link: 0
1416 19:37:32.415864 PCI: 00:15.1 assign_resources, bus 0 link: 0
1417 19:37:32.422265 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1418 19:37:32.432340 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1419 19:37:32.439120 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1420 19:37:32.449074 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1421 19:37:32.452292 PCI: 00:19.1 assign_resources, bus 0 link: 0
1422 19:37:32.455415 PCI: 00:19.1 assign_resources, bus 0 link: 0
1423 19:37:32.465130 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1424 19:37:32.475110 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1425 19:37:32.485247 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1426 19:37:32.488409 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1427 19:37:32.495265 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1428 19:37:32.505202 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1429 19:37:32.512070 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1430 19:37:32.515191 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1431 19:37:32.518186
1432 19:37:32.525220 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1433 19:37:32.528214 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1434 19:37:32.535024 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1435 19:37:32.541634 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1436 19:37:32.548310 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1437 19:37:32.551740 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1438 19:37:32.558415 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1439 19:37:32.561742 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1440 19:37:32.564827 LPC: Trying to open IO window from 800 size 1ff
1441 19:37:32.575177 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1442 19:37:32.581794 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1443 19:37:32.591748 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1444 19:37:32.595195 DOMAIN: 0000 assign_resources, bus 0 link: 0
1445 19:37:32.602109 Root Device assign_resources, bus 0 link: 0
1446 19:37:32.602188 Done setting resources.
1447 19:37:32.608150 Show resources in subtree (Root Device)...After assigning values.
1448 19:37:32.615017 Root Device child on link 0 DOMAIN: 0000
1449 19:37:32.618373 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1450 19:37:32.628250 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1451 19:37:32.638052 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1452 19:37:32.638133 PCI: 00:00.0
1453 19:37:32.648177 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1454 19:37:32.658225 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1455 19:37:32.667925 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1456 19:37:32.677941 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1457 19:37:32.684603 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1458 19:37:32.694962 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1459 19:37:32.704455 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1460 19:37:32.714752 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1461 19:37:32.724656 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1462 19:37:32.730954 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1463 19:37:32.734468
1464 19:37:32.741143 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1465 19:37:32.751401 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1466 19:37:32.760795 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1467 19:37:32.771380 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1468 19:37:32.777410 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1469 19:37:32.787443 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1470 19:37:32.797504 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1471 19:37:32.807166 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1472 19:37:32.817330 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1473 19:37:32.827249 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1474 19:37:32.827334 PCI: 00:02.0
1475 19:37:32.830333
1476 19:37:32.840304 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1477 19:37:32.850215 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1478 19:37:32.860200 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1479 19:37:32.863580 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1480 19:37:32.873264 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1481 19:37:32.876806 GENERIC: 0.0
1482 19:37:32.876891 PCI: 00:05.0
1483 19:37:32.887135 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1484 19:37:32.893618 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1485 19:37:32.893703 GENERIC: 0.0
1486 19:37:32.896750 PCI: 00:08.0
1487 19:37:32.906518 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1488 19:37:32.906604 PCI: 00:0a.0
1489 19:37:32.913391 PCI: 00:0d.0 child on link 0 USB0 port 0
1490 19:37:32.923342 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1491 19:37:32.926667 USB0 port 0 child on link 0 USB3 port 0
1492 19:37:32.930388 USB3 port 0
1493 19:37:32.930462 USB3 port 1
1494 19:37:32.933715 USB3 port 2
1495 19:37:32.933788 USB3 port 3
1496 19:37:32.939920 PCI: 00:14.0 child on link 0 USB0 port 0
1497 19:37:32.950066 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1498 19:37:32.953432 USB0 port 0 child on link 0 USB2 port 0
1499 19:37:32.956631 USB2 port 0
1500 19:37:32.956730 USB2 port 1
1501 19:37:32.959982 USB2 port 2
1502 19:37:32.960080 USB2 port 3
1503 19:37:32.963728 USB2 port 4
1504 19:37:32.963856 USB2 port 5
1505 19:37:32.966569 USB2 port 6
1506 19:37:32.966653 USB2 port 7
1507 19:37:32.970294 USB2 port 8
1508 19:37:32.970377 USB2 port 9
1509 19:37:32.973582 USB3 port 0
1510 19:37:32.973666 USB3 port 1
1511 19:37:32.976449 USB3 port 2
1512 19:37:32.980121 USB3 port 3
1513 19:37:32.980233 PCI: 00:14.2
1514 19:37:32.989982 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1515 19:37:33.000210 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1516 19:37:33.006785 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1517 19:37:33.016463 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1518 19:37:33.016548 GENERIC: 0.0
1519 19:37:33.023238 PCI: 00:15.0 child on link 0 I2C: 00:1a
1520 19:37:33.033003 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1521 19:37:33.033089 I2C: 00:1a
1522 19:37:33.036377 I2C: 00:31
1523 19:37:33.036472 I2C: 00:32
1524 19:37:33.040145 PCI: 00:15.1 child on link 0 I2C: 00:10
1525 19:37:33.049474 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1526 19:37:33.052742
1527 19:37:33.052826 I2C: 00:10
1528 19:37:33.052891 PCI: 00:15.2
1529 19:37:33.066437 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1530 19:37:33.066523 PCI: 00:15.3
1531 19:37:33.076209 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1532 19:37:33.079649 PCI: 00:16.0
1533 19:37:33.089303 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1534 19:37:33.089389 PCI: 00:19.0
1535 19:37:33.096249 PCI: 00:19.1 child on link 0 I2C: 00:15
1536 19:37:33.106221 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1537 19:37:33.106308 I2C: 00:15
1538 19:37:33.112754 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1539 19:37:33.119555 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1540 19:37:33.133014 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1541 19:37:33.142778 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1542 19:37:33.146113 GENERIC: 0.0
1543 19:37:33.146231 PCI: 01:00.0
1544 19:37:33.155964 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1545 19:37:33.166015 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1546 19:37:33.176033 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1547 19:37:33.179566 PCI: 00:1e.0
1548 19:37:33.189060 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1549 19:37:33.195702 PCI: 00:1e.2 child on link 0 SPI: 00
1550 19:37:33.205837 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1551 19:37:33.205922 SPI: 00
1552 19:37:33.208987 PCI: 00:1e.3 child on link 0 SPI: 00
1553 19:37:33.219043 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1554 19:37:33.222331 SPI: 00
1555 19:37:33.225749 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1556 19:37:33.235625 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1557 19:37:33.235709 PNP: 0c09.0
1558 19:37:33.245880 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1559 19:37:33.249002 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1560 19:37:33.258923 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1561 19:37:33.268657 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1562 19:37:33.272316 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1563 19:37:33.275486 GENERIC: 0.0
1564 19:37:33.275570 GENERIC: 1.0
1565 19:37:33.278732 PCI: 00:1f.3
1566 19:37:33.288733 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1567 19:37:33.298838 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1568 19:37:33.301871 PCI: 00:1f.5
1569 19:37:33.311915 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1570 19:37:33.315186 CPU_CLUSTER: 0 child on link 0 APIC: 00
1571 19:37:33.315271 APIC: 00
1572 19:37:33.318720 APIC: 01
1573 19:37:33.318817 APIC: 03
1574 19:37:33.321916 APIC: 07
1575 19:37:33.321999 APIC: 05
1576 19:37:33.322064 APIC: 04
1577 19:37:33.324966 APIC: 02
1578 19:37:33.325049 APIC: 06
1579 19:37:33.328311 Done allocating resources.
1580 19:37:33.335067 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1581 19:37:33.341865 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1582 19:37:33.345341 Configure GPIOs for I2S audio on UP4.
1583 19:37:33.351792 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1584 19:37:33.354947 Enabling resources...
1585 19:37:33.358243 PCI: 00:00.0 subsystem <- 8086/9a12
1586 19:37:33.358327 PCI: 00:00.0 cmd <- 06
1587 19:37:33.365029 PCI: 00:02.0 subsystem <- 8086/9a40
1588 19:37:33.365125 PCI: 00:02.0 cmd <- 03
1589 19:37:33.368452 PCI: 00:04.0 subsystem <- 8086/9a03
1590 19:37:33.371671 PCI: 00:04.0 cmd <- 02
1591 19:37:33.375146 PCI: 00:05.0 subsystem <- 8086/9a19
1592 19:37:33.378382 PCI: 00:05.0 cmd <- 02
1593 19:37:33.381748 PCI: 00:08.0 subsystem <- 8086/9a11
1594 19:37:33.385132 PCI: 00:08.0 cmd <- 06
1595 19:37:33.388265 PCI: 00:0d.0 subsystem <- 8086/9a13
1596 19:37:33.391526 PCI: 00:0d.0 cmd <- 02
1597 19:37:33.395250 PCI: 00:14.0 subsystem <- 8086/a0ed
1598 19:37:33.398343 PCI: 00:14.0 cmd <- 02
1599 19:37:33.401797 PCI: 00:14.2 subsystem <- 8086/a0ef
1600 19:37:33.401882 PCI: 00:14.2 cmd <- 02
1601 19:37:33.408625 PCI: 00:14.3 subsystem <- 8086/a0f0
1602 19:37:33.408710 PCI: 00:14.3 cmd <- 02
1603 19:37:33.411761 PCI: 00:15.0 subsystem <- 8086/a0e8
1604 19:37:33.415199 PCI: 00:15.0 cmd <- 02
1605 19:37:33.418625 PCI: 00:15.1 subsystem <- 8086/a0e9
1606 19:37:33.421603 PCI: 00:15.1 cmd <- 02
1607 19:37:33.425120 PCI: 00:15.2 subsystem <- 8086/a0ea
1608 19:37:33.428378 PCI: 00:15.2 cmd <- 02
1609 19:37:33.431569 PCI: 00:15.3 subsystem <- 8086/a0eb
1610 19:37:33.434708 PCI: 00:15.3 cmd <- 02
1611 19:37:33.438310 PCI: 00:16.0 subsystem <- 8086/a0e0
1612 19:37:33.441485 PCI: 00:16.0 cmd <- 02
1613 19:37:33.444942 PCI: 00:19.1 subsystem <- 8086/a0c6
1614 19:37:33.447907 PCI: 00:19.1 cmd <- 02
1615 19:37:33.451266 PCI: 00:1d.0 bridge ctrl <- 0013
1616 19:37:33.454615 PCI: 00:1d.0 subsystem <- 8086/a0b0
1617 19:37:33.454700 PCI: 00:1d.0 cmd <- 06
1618 19:37:33.461552 PCI: 00:1e.0 subsystem <- 8086/a0a8
1619 19:37:33.461637 PCI: 00:1e.0 cmd <- 06
1620 19:37:33.464978 PCI: 00:1e.2 subsystem <- 8086/a0aa
1621 19:37:33.468399 PCI: 00:1e.2 cmd <- 06
1622 19:37:33.471631 PCI: 00:1e.3 subsystem <- 8086/a0ab
1623 19:37:33.474906 PCI: 00:1e.3 cmd <- 02
1624 19:37:33.477925 PCI: 00:1f.0 subsystem <- 8086/a087
1625 19:37:33.481436 PCI: 00:1f.0 cmd <- 407
1626 19:37:33.484711 PCI: 00:1f.3 subsystem <- 8086/a0c8
1627 19:37:33.487966 PCI: 00:1f.3 cmd <- 02
1628 19:37:33.491736 PCI: 00:1f.5 subsystem <- 8086/a0a4
1629 19:37:33.494674 PCI: 00:1f.5 cmd <- 406
1630 19:37:33.498092 PCI: 01:00.0 cmd <- 02
1631 19:37:33.502684 done.
1632 19:37:33.506042 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1633 19:37:33.509202 Initializing devices...
1634 19:37:33.512321 Root Device init
1635 19:37:33.515943 Chrome EC: Set SMI mask to 0x0000000000000000
1636 19:37:33.522710 Chrome EC: clear events_b mask to 0x0000000000000000
1637 19:37:33.529192 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1638 19:37:33.535886 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1639 19:37:33.539264 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1640 19:37:33.542407
1641 19:37:33.545449 Chrome EC: Set WAKE mask to 0x0000000000000000
1642 19:37:33.552530 fw_config match found: DB_USB=USB3_ACTIVE
1643 19:37:33.555706 Configure Right Type-C port orientation for retimer
1644 19:37:33.558937 Root Device init finished in 45 msecs
1645 19:37:33.563249 PCI: 00:00.0 init
1646 19:37:33.566475 CPU TDP = 9 Watts
1647 19:37:33.566586 CPU PL1 = 9 Watts
1648 19:37:33.570077 CPU PL2 = 40 Watts
1649 19:37:33.573186 CPU PL4 = 83 Watts
1650 19:37:33.576538 PCI: 00:00.0 init finished in 8 msecs
1651 19:37:33.576623 PCI: 00:02.0 init
1652 19:37:33.579901 GMA: Found VBT in CBFS
1653 19:37:33.583342 GMA: Found valid VBT in CBFS
1654 19:37:33.590768 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1655 19:37:33.596279 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1656 19:37:33.599620 PCI: 00:02.0 init finished in 18 msecs
1657 19:37:33.603264 PCI: 00:05.0 init
1658 19:37:33.606297 PCI: 00:05.0 init finished in 0 msecs
1659 19:37:33.609794 PCI: 00:08.0 init
1660 19:37:33.612998 PCI: 00:08.0 init finished in 0 msecs
1661 19:37:33.616562 PCI: 00:14.0 init
1662 19:37:33.619981 PCI: 00:14.0 init finished in 0 msecs
1663 19:37:33.623123 PCI: 00:14.2 init
1664 19:37:33.626601 PCI: 00:14.2 init finished in 0 msecs
1665 19:37:33.629778 PCI: 00:15.0 init
1666 19:37:33.629862 I2C bus 0 version 0x3230302a
1667 19:37:33.636327 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1668 19:37:33.639471 PCI: 00:15.0 init finished in 6 msecs
1669 19:37:33.639556 PCI: 00:15.1 init
1670 19:37:33.643017 I2C bus 1 version 0x3230302a
1671 19:37:33.646244 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1672 19:37:33.652891 PCI: 00:15.1 init finished in 6 msecs
1673 19:37:33.652976 PCI: 00:15.2 init
1674 19:37:33.656113 I2C bus 2 version 0x3230302a
1675 19:37:33.659397 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1676 19:37:33.662439 PCI: 00:15.2 init finished in 6 msecs
1677 19:37:33.666065 PCI: 00:15.3 init
1678 19:37:33.669154 I2C bus 3 version 0x3230302a
1679 19:37:33.672781 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1680 19:37:33.675902 PCI: 00:15.3 init finished in 6 msecs
1681 19:37:33.679258 PCI: 00:16.0 init
1682 19:37:33.682389 PCI: 00:16.0 init finished in 0 msecs
1683 19:37:33.686043 PCI: 00:19.1 init
1684 19:37:33.689268 I2C bus 5 version 0x3230302a
1685 19:37:33.692370 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1686 19:37:33.696240 PCI: 00:19.1 init finished in 6 msecs
1687 19:37:33.696325 PCI: 00:1d.0 init
1688 19:37:33.699498
1689 19:37:33.699582 Initializing PCH PCIe bridge.
1690 19:37:33.705794 PCI: 00:1d.0 init finished in 3 msecs
1691 19:37:33.705879 PCI: 00:1f.0 init
1692 19:37:33.712882 IOAPIC: Initializing IOAPIC at 0xfec00000
1693 19:37:33.715953 IOAPIC: Bootstrap Processor Local APIC = 0x00
1694 19:37:33.719231 IOAPIC: ID = 0x02
1695 19:37:33.719315 IOAPIC: Dumping registers
1696 19:37:33.722764 reg 0x0000: 0x02000000
1697 19:37:33.725901 reg 0x0001: 0x00770020
1698 19:37:33.729491 reg 0x0002: 0x00000000
1699 19:37:33.732761 PCI: 00:1f.0 init finished in 21 msecs
1700 19:37:33.735778 PCI: 00:1f.2 init
1701 19:37:33.735862 Disabling ACPI via APMC.
1702 19:37:33.740821 APMC done.
1703 19:37:33.743863 PCI: 00:1f.2 init finished in 5 msecs
1704 19:37:33.755895 PCI: 01:00.0 init
1705 19:37:33.759138 PCI: 01:00.0 init finished in 0 msecs
1706 19:37:33.762655 PNP: 0c09.0 init
1707 19:37:33.765962 Google Chrome EC uptime: 8.431 seconds
1708 19:37:33.772500 Google Chrome AP resets since EC boot: 1
1709 19:37:33.775706 Google Chrome most recent AP reset causes:
1710 19:37:33.779176 0.349: 32775 shutdown: entering G3
1711 19:37:33.785682 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1712 19:37:33.789198 PNP: 0c09.0 init finished in 22 msecs
1713 19:37:33.794967 Devices initialized
1714 19:37:33.798144 Show all devs... After init.
1715 19:37:33.801304 Root Device: enabled 1
1716 19:37:33.801388 DOMAIN: 0000: enabled 1
1717 19:37:33.804811 CPU_CLUSTER: 0: enabled 1
1718 19:37:33.807760 PCI: 00:00.0: enabled 1
1719 19:37:33.811566 PCI: 00:02.0: enabled 1
1720 19:37:33.811651 PCI: 00:04.0: enabled 1
1721 19:37:33.814438 PCI: 00:05.0: enabled 1
1722 19:37:33.818006 PCI: 00:06.0: enabled 0
1723 19:37:33.821066 PCI: 00:07.0: enabled 0
1724 19:37:33.821151 PCI: 00:07.1: enabled 0
1725 19:37:33.824435 PCI: 00:07.2: enabled 0
1726 19:37:33.828002 PCI: 00:07.3: enabled 0
1727 19:37:33.831170 PCI: 00:08.0: enabled 1
1728 19:37:33.831254 PCI: 00:09.0: enabled 0
1729 19:37:33.834759 PCI: 00:0a.0: enabled 0
1730 19:37:33.837646 PCI: 00:0d.0: enabled 1
1731 19:37:33.837730 PCI: 00:0d.1: enabled 0
1732 19:37:33.841271
1733 19:37:33.841356 PCI: 00:0d.2: enabled 0
1734 19:37:33.844291 PCI: 00:0d.3: enabled 0
1735 19:37:33.848006 PCI: 00:0e.0: enabled 0
1736 19:37:33.848104 PCI: 00:10.2: enabled 1
1737 19:37:33.851138 PCI: 00:10.6: enabled 0
1738 19:37:33.854384 PCI: 00:10.7: enabled 0
1739 19:37:33.857914 PCI: 00:12.0: enabled 0
1740 19:37:33.857999 PCI: 00:12.6: enabled 0
1741 19:37:33.860982 PCI: 00:13.0: enabled 0
1742 19:37:33.864793 PCI: 00:14.0: enabled 1
1743 19:37:33.867835 PCI: 00:14.1: enabled 0
1744 19:37:33.867919 PCI: 00:14.2: enabled 1
1745 19:37:33.870887 PCI: 00:14.3: enabled 1
1746 19:37:33.874234 PCI: 00:15.0: enabled 1
1747 19:37:33.877777 PCI: 00:15.1: enabled 1
1748 19:37:33.877855 PCI: 00:15.2: enabled 1
1749 19:37:33.880998 PCI: 00:15.3: enabled 1
1750 19:37:33.884122 PCI: 00:16.0: enabled 1
1751 19:37:33.884199 PCI: 00:16.1: enabled 0
1752 19:37:33.887717 PCI: 00:16.2: enabled 0
1753 19:37:33.890766 PCI: 00:16.3: enabled 0
1754 19:37:33.894424 PCI: 00:16.4: enabled 0
1755 19:37:33.894512 PCI: 00:16.5: enabled 0
1756 19:37:33.897707 PCI: 00:17.0: enabled 0
1757 19:37:33.900722 PCI: 00:19.0: enabled 0
1758 19:37:33.904319 PCI: 00:19.1: enabled 1
1759 19:37:33.904402 PCI: 00:19.2: enabled 0
1760 19:37:33.907458 PCI: 00:1c.0: enabled 1
1761 19:37:33.910774 PCI: 00:1c.1: enabled 0
1762 19:37:33.914189 PCI: 00:1c.2: enabled 0
1763 19:37:33.914274 PCI: 00:1c.3: enabled 0
1764 19:37:33.917442 PCI: 00:1c.4: enabled 0
1765 19:37:33.921119 PCI: 00:1c.5: enabled 0
1766 19:37:33.921196 PCI: 00:1c.6: enabled 1
1767 19:37:33.924226
1768 19:37:33.924311 PCI: 00:1c.7: enabled 0
1769 19:37:33.927295 PCI: 00:1d.0: enabled 1
1770 19:37:33.930568 PCI: 00:1d.1: enabled 0
1771 19:37:33.930644 PCI: 00:1d.2: enabled 1
1772 19:37:33.934121 PCI: 00:1d.3: enabled 0
1773 19:37:33.937381 PCI: 00:1e.0: enabled 1
1774 19:37:33.940582 PCI: 00:1e.1: enabled 0
1775 19:37:33.940659 PCI: 00:1e.2: enabled 1
1776 19:37:33.944335 PCI: 00:1e.3: enabled 1
1777 19:37:33.947286 PCI: 00:1f.0: enabled 1
1778 19:37:33.950652 PCI: 00:1f.1: enabled 0
1779 19:37:33.950724 PCI: 00:1f.2: enabled 1
1780 19:37:33.954040 PCI: 00:1f.3: enabled 1
1781 19:37:33.957040 PCI: 00:1f.4: enabled 0
1782 19:37:33.960742 PCI: 00:1f.5: enabled 1
1783 19:37:33.960814 PCI: 00:1f.6: enabled 0
1784 19:37:33.963853 PCI: 00:1f.7: enabled 0
1785 19:37:33.967235 APIC: 00: enabled 1
1786 19:37:33.967302 GENERIC: 0.0: enabled 1
1787 19:37:33.970947 GENERIC: 0.0: enabled 1
1788 19:37:33.973821 GENERIC: 1.0: enabled 1
1789 19:37:33.977257 GENERIC: 0.0: enabled 1
1790 19:37:33.977328 GENERIC: 1.0: enabled 1
1791 19:37:33.980897 USB0 port 0: enabled 1
1792 19:37:33.983894 GENERIC: 0.0: enabled 1
1793 19:37:33.983961 USB0 port 0: enabled 1
1794 19:37:33.987156 GENERIC: 0.0: enabled 1
1795 19:37:33.990959 I2C: 00:1a: enabled 1
1796 19:37:33.994099 I2C: 00:31: enabled 1
1797 19:37:33.994172 I2C: 00:32: enabled 1
1798 19:37:33.997679 I2C: 00:10: enabled 1
1799 19:37:34.000436 I2C: 00:15: enabled 1
1800 19:37:34.000506 GENERIC: 0.0: enabled 0
1801 19:37:34.003691 GENERIC: 1.0: enabled 0
1802 19:37:34.007225 GENERIC: 0.0: enabled 1
1803 19:37:34.007296 SPI: 00: enabled 1
1804 19:37:34.010440 SPI: 00: enabled 1
1805 19:37:34.014220 PNP: 0c09.0: enabled 1
1806 19:37:34.014292 GENERIC: 0.0: enabled 1
1807 19:37:34.017374 USB3 port 0: enabled 1
1808 19:37:34.020497 USB3 port 1: enabled 1
1809 19:37:34.020567 USB3 port 2: enabled 0
1810 19:37:34.023625
1811 19:37:34.023695 USB3 port 3: enabled 0
1812 19:37:34.027083 USB2 port 0: enabled 0
1813 19:37:34.030500 USB2 port 1: enabled 1
1814 19:37:34.030570 USB2 port 2: enabled 1
1815 19:37:34.033929 USB2 port 3: enabled 0
1816 19:37:34.037238 USB2 port 4: enabled 1
1817 19:37:34.037308 USB2 port 5: enabled 0
1818 19:37:34.040267 USB2 port 6: enabled 0
1819 19:37:34.043779 USB2 port 7: enabled 0
1820 19:37:34.047080 USB2 port 8: enabled 0
1821 19:37:34.047151 USB2 port 9: enabled 0
1822 19:37:34.050124 USB3 port 0: enabled 0
1823 19:37:34.053949 USB3 port 1: enabled 1
1824 19:37:34.054021 USB3 port 2: enabled 0
1825 19:37:34.056786 USB3 port 3: enabled 0
1826 19:37:34.060121 GENERIC: 0.0: enabled 1
1827 19:37:34.063373 GENERIC: 1.0: enabled 1
1828 19:37:34.063444 APIC: 01: enabled 1
1829 19:37:34.066769 APIC: 03: enabled 1
1830 19:37:34.066840 APIC: 07: enabled 1
1831 19:37:34.070133 APIC: 05: enabled 1
1832 19:37:34.073383 APIC: 04: enabled 1
1833 19:37:34.073454 APIC: 02: enabled 1
1834 19:37:34.076739 APIC: 06: enabled 1
1835 19:37:34.080050 PCI: 01:00.0: enabled 1
1836 19:37:34.083442 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1837 19:37:34.089957 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1838 19:37:34.093330 ELOG: NV offset 0xf30000 size 0x1000
1839 19:37:34.100157 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1840 19:37:34.106925 ELOG: Event(17) added with size 13 at 2022-12-19 19:37:34 UTC
1841 19:37:34.113265 ELOG: Event(92) added with size 9 at 2022-12-19 19:37:34 UTC
1842 19:37:34.119890 ELOG: Event(93) added with size 9 at 2022-12-19 19:37:34 UTC
1843 19:37:34.126398 ELOG: Event(9E) added with size 10 at 2022-12-19 19:37:34 UTC
1844 19:37:34.133132 ELOG: Event(9F) added with size 14 at 2022-12-19 19:37:34 UTC
1845 19:37:34.139710 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1846 19:37:34.143349 ELOG: Event(A1) added with size 10 at 2022-12-19 19:37:34 UTC
1847 19:37:34.153172 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1848 19:37:34.159985 ELOG: Event(A0) added with size 9 at 2022-12-19 19:37:34 UTC
1849 19:37:34.162908 elog_add_boot_reason: Logged dev mode boot
1850 19:37:34.169562 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1851 19:37:34.169643 Finalize devices...
1852 19:37:34.173109 Devices finalized
1853 19:37:34.179859 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1854 19:37:34.182794 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1855 19:37:34.189591 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1856 19:37:34.192688 ME: HFSTS1 : 0x80030055
1857 19:37:34.199547 ME: HFSTS2 : 0x30280116
1858 19:37:34.202964 ME: HFSTS3 : 0x00000050
1859 19:37:34.206020 ME: HFSTS4 : 0x00004000
1860 19:37:34.212928 ME: HFSTS5 : 0x00000000
1861 19:37:34.216086 ME: HFSTS6 : 0x00400006
1862 19:37:34.219383 ME: Manufacturing Mode : YES
1863 19:37:34.222735 ME: SPI Protection Mode Enabled : NO
1864 19:37:34.226239 ME: FW Partition Table : OK
1865 19:37:34.229342 ME: Bringup Loader Failure : NO
1866 19:37:34.235939 ME: Firmware Init Complete : NO
1867 19:37:34.239217 ME: Boot Options Present : NO
1868 19:37:34.242840 ME: Update In Progress : NO
1869 19:37:34.246008 ME: D0i3 Support : YES
1870 19:37:34.249419 ME: Low Power State Enabled : NO
1871 19:37:34.252847 ME: CPU Replaced : YES
1872 19:37:34.255923 ME: CPU Replacement Valid : YES
1873 19:37:34.259569 ME: Current Working State : 5
1874 19:37:34.266227 ME: Current Operation State : 1
1875 19:37:34.269077 ME: Current Operation Mode : 3
1876 19:37:34.272734 ME: Error Code : 0
1877 19:37:34.276132 ME: Enhanced Debug Mode : NO
1878 19:37:34.278904 ME: CPU Debug Disabled : YES
1879 19:37:34.282378 ME: TXT Support : NO
1880 19:37:34.289154 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1881 19:37:34.295549 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1882 19:37:34.298775 CBFS: 'fallback/slic' not found.
1883 19:37:34.302226 ACPI: Writing ACPI tables at 76b01000.
1884 19:37:34.305537 ACPI: * FACS
1885 19:37:34.305615 ACPI: * DSDT
1886 19:37:34.312078 Ramoops buffer: 0x100000@0x76a00000.
1887 19:37:34.315873 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1888 19:37:34.318892 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1889 19:37:34.323255 Google Chrome EC: version:
1890 19:37:34.326235 ro: voema_v2.0.7540-147f8d37d1
1891 19:37:34.329941 rw: voema_v2.0.7540-147f8d37d1
1892 19:37:34.333083 running image: 2
1893 19:37:34.339691 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1894 19:37:34.342910 ACPI: * FADT
1895 19:37:34.342983 SCI is IRQ9
1896 19:37:34.346190 ACPI: added table 1/32, length now 40
1897 19:37:34.349613 ACPI: * SSDT
1898 19:37:34.352962 Found 1 CPU(s) with 8 core(s) each.
1899 19:37:34.356192 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1900 19:37:34.362923 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1901 19:37:34.366226 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1902 19:37:34.369695 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1903 19:37:34.376259 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1904 19:37:34.382835 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1905 19:37:34.386482 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1906 19:37:34.393093 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1907 19:37:34.400131 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1908 19:37:34.402942 \_SB.PCI0.RP09: Added StorageD3Enable property
1909 19:37:34.406273 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1910 19:37:34.413071 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1911 19:37:34.416221 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1912 19:37:34.419772 PS2K: Passing 80 keymaps to kernel
1913 19:37:34.422775
1914 19:37:34.425964 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1915 19:37:34.429541
1916 19:37:34.432766 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1917 19:37:34.439511 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1918 19:37:34.445927 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1919 19:37:34.452743 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1920 19:37:34.459237 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1921 19:37:34.465933 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1922 19:37:34.472513 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1923 19:37:34.475950 ACPI: added table 2/32, length now 44
1924 19:37:34.479392 ACPI: * MCFG
1925 19:37:34.482479 ACPI: added table 3/32, length now 48
1926 19:37:34.485860 ACPI: * TPM2
1927 19:37:34.489297 TPM2 log created at 0x769f0000
1928 19:37:34.492965 ACPI: added table 4/32, length now 52
1929 19:37:34.493043 ACPI: * MADT
1930 19:37:34.495825 SCI is IRQ9
1931 19:37:34.499193 ACPI: added table 5/32, length now 56
1932 19:37:34.499274 current = 76b09850
1933 19:37:34.502460 ACPI: * DMAR
1934 19:37:34.505557 ACPI: added table 6/32, length now 60
1935 19:37:34.509167 ACPI: added table 7/32, length now 64
1936 19:37:34.512351 ACPI: * HPET
1937 19:37:34.515772 ACPI: added table 8/32, length now 68
1938 19:37:34.515847 ACPI: done.
1939 19:37:34.519202 ACPI tables: 35216 bytes.
1940 19:37:34.522297 smbios_write_tables: 769ef000
1941 19:37:34.525515 EC returned error result code 3
1942 19:37:34.528726 Couldn't obtain OEM name from CBI
1943 19:37:34.532405 Create SMBIOS type 16
1944 19:37:34.532485 Create SMBIOS type 17
1945 19:37:34.535501 GENERIC: 0.0 (WIFI Device)
1946 19:37:34.539077 SMBIOS tables: 1750 bytes.
1947 19:37:34.541975 Writing table forward entry at 0x00000500
1948 19:37:34.549099 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1949 19:37:34.551969 Writing coreboot table at 0x76b25000
1950 19:37:34.558671 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1951 19:37:34.562124 1. 0000000000001000-000000000009ffff: RAM
1952 19:37:34.568913 2. 00000000000a0000-00000000000fffff: RESERVED
1953 19:37:34.572226 3. 0000000000100000-00000000769eefff: RAM
1954 19:37:34.579150 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1955 19:37:34.581833 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1956 19:37:34.588635 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1957 19:37:34.595645 7. 0000000077000000-000000007fbfffff: RESERVED
1958 19:37:34.598737 8. 00000000c0000000-00000000cfffffff: RESERVED
1959 19:37:34.605165 9. 00000000f8000000-00000000f9ffffff: RESERVED
1960 19:37:34.608606 10. 00000000fb000000-00000000fb000fff: RESERVED
1961 19:37:34.611738 11. 00000000fe000000-00000000fe00ffff: RESERVED
1962 19:37:34.618707 12. 00000000fed80000-00000000fed87fff: RESERVED
1963 19:37:34.621791 13. 00000000fed90000-00000000fed92fff: RESERVED
1964 19:37:34.628502 14. 00000000feda0000-00000000feda1fff: RESERVED
1965 19:37:34.631622 15. 00000000fedc0000-00000000feddffff: RESERVED
1966 19:37:34.635216 16. 0000000100000000-00000002803fffff: RAM
1967 19:37:34.638236
1968 19:37:34.638314 Passing 4 GPIOs to payload:
1969 19:37:34.645066 NAME | PORT | POLARITY | VALUE
1970 19:37:34.651809 lid | undefined | high | high
1971 19:37:34.655055 power | undefined | high | low
1972 19:37:34.661570 oprom | undefined | high | low
1973 19:37:34.664977 EC in RW | 0x000000e5 | high | high
1974 19:37:34.671793 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum abbb
1975 19:37:34.675235 coreboot table: 1576 bytes.
1976 19:37:34.678533 IMD ROOT 0. 0x76fff000 0x00001000
1977 19:37:34.681576 IMD SMALL 1. 0x76ffe000 0x00001000
1978 19:37:34.685108 FSP MEMORY 2. 0x76c4e000 0x003b0000
1979 19:37:34.691477 VPD 3. 0x76c4d000 0x00000367
1980 19:37:34.695082 RO MCACHE 4. 0x76c4c000 0x00000fdc
1981 19:37:34.698626 CONSOLE 5. 0x76c2c000 0x00020000
1982 19:37:34.701507 FMAP 6. 0x76c2b000 0x00000578
1983 19:37:34.705005 TIME STAMP 7. 0x76c2a000 0x00000910
1984 19:37:34.708252 VBOOT WORK 8. 0x76c16000 0x00014000
1985 19:37:34.711468 ROMSTG STCK 9. 0x76c15000 0x00001000
1986 19:37:34.715008 AFTER CAR 10. 0x76c0a000 0x0000b000
1987 19:37:34.718201 RAMSTAGE 11. 0x76b97000 0x00073000
1988 19:37:34.724808 REFCODE 12. 0x76b42000 0x00055000
1989 19:37:34.728356 SMM BACKUP 13. 0x76b32000 0x00010000
1990 19:37:34.731376 4f444749 14. 0x76b30000 0x00002000
1991 19:37:34.735043 EXT VBT15. 0x76b2d000 0x0000219f
1992 19:37:34.738162 COREBOOT 16. 0x76b25000 0x00008000
1993 19:37:34.741483 ACPI 17. 0x76b01000 0x00024000
1994 19:37:34.744782 ACPI GNVS 18. 0x76b00000 0x00001000
1995 19:37:34.748545 RAMOOPS 19. 0x76a00000 0x00100000
1996 19:37:34.751717 TPM2 TCGLOG20. 0x769f0000 0x00010000
1997 19:37:34.758201 SMBIOS 21. 0x769ef000 0x00000800
1998 19:37:34.758279 IMD small region:
1999 19:37:34.761270 IMD ROOT 0. 0x76ffec00 0x00000400
2000 19:37:34.764973 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2001 19:37:34.768109
2002 19:37:34.771526 POWER STATE 2. 0x76ffeb80 0x00000044
2003 19:37:34.774672 ROMSTAGE 3. 0x76ffeb60 0x00000004
2004 19:37:34.778106 MEM INFO 4. 0x76ffe980 0x000001e0
2005 19:37:34.784856 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
2006 19:37:34.787862 MTRR: Physical address space:
2007 19:37:34.794492 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2008 19:37:34.797876 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2009 19:37:34.804489 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2010 19:37:34.811091 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2011 19:37:34.817816 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2012 19:37:34.824686 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2013 19:37:34.831151 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2014 19:37:34.834637 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 19:37:34.838182 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 19:37:34.844691 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 19:37:34.847802 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 19:37:34.850931 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 19:37:34.854577 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 19:37:34.861075 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 19:37:34.864336 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 19:37:34.867519 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 19:37:34.870855 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 19:37:34.874166 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 19:37:34.878925 call enable_fixed_mtrr()
2026 19:37:34.882295 CPU physical address size: 39 bits
2027 19:37:34.888945 MTRR: default type WB/UC MTRR counts: 6/6.
2028 19:37:34.892180 MTRR: UC selected as default type.
2029 19:37:34.898768 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2030 19:37:34.902290 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2031 19:37:34.908854 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2032 19:37:34.915397 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2033 19:37:34.922256 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2034 19:37:34.929015 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2035 19:37:34.929102
2036 19:37:34.932099 MTRR check
2037 19:37:34.932192 Fixed MTRRs : Enabled
2038 19:37:34.935660
2039 19:37:34.935739 Variable MTRRs: Enabled
2040 19:37:34.935814
2041 19:37:34.941898 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 19:37:34.945211 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 19:37:34.948829 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 19:37:34.951903 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 19:37:34.955134 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 19:37:34.961861 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 19:37:34.965400 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 19:37:34.968618 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 19:37:34.971836 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 19:37:34.978804 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 19:37:34.981940 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 19:37:34.988472 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2053 19:37:34.991962 call enable_fixed_mtrr()
2054 19:37:34.994982 Checking cr50 for pending updates
2055 19:37:34.999024 MTRR: Fixed MSR 0x250 0x0606060606060606
2056 19:37:35.002644 MTRR: Fixed MSR 0x250 0x0606060606060606
2057 19:37:35.005916 MTRR: Fixed MSR 0x258 0x0606060606060606
2058 19:37:35.012881 MTRR: Fixed MSR 0x259 0x0000000000000000
2059 19:37:35.015896 MTRR: Fixed MSR 0x268 0x0606060606060606
2060 19:37:35.019090 MTRR: Fixed MSR 0x269 0x0606060606060606
2061 19:37:35.022312 MTRR: Fixed MSR 0x26a 0x0606060606060606
2062 19:37:35.025619 MTRR: Fixed MSR 0x26b 0x0606060606060606
2063 19:37:35.032177 MTRR: Fixed MSR 0x26c 0x0606060606060606
2064 19:37:35.035678 MTRR: Fixed MSR 0x26d 0x0606060606060606
2065 19:37:35.038852 MTRR: Fixed MSR 0x26e 0x0606060606060606
2066 19:37:35.042127 MTRR: Fixed MSR 0x26f 0x0606060606060606
2067 19:37:35.050199 MTRR: Fixed MSR 0x258 0x0606060606060606
2068 19:37:35.053606 MTRR: Fixed MSR 0x259 0x0000000000000000
2069 19:37:35.056631 MTRR: Fixed MSR 0x268 0x0606060606060606
2070 19:37:35.059699 MTRR: Fixed MSR 0x269 0x0606060606060606
2071 19:37:35.066545 MTRR: Fixed MSR 0x26a 0x0606060606060606
2072 19:37:35.069647 MTRR: Fixed MSR 0x26b 0x0606060606060606
2073 19:37:35.073121 MTRR: Fixed MSR 0x26c 0x0606060606060606
2074 19:37:35.076277 MTRR: Fixed MSR 0x26d 0x0606060606060606
2075 19:37:35.083303 MTRR: Fixed MSR 0x26e 0x0606060606060606
2076 19:37:35.086565 MTRR: Fixed MSR 0x26f 0x0606060606060606
2077 19:37:35.089672 call enable_fixed_mtrr()
2078 19:37:35.093105 call enable_fixed_mtrr()
2079 19:37:35.096074 MTRR: Fixed MSR 0x250 0x0606060606060606
2080 19:37:35.099693 MTRR: Fixed MSR 0x250 0x0606060606060606
2081 19:37:35.102765 MTRR: Fixed MSR 0x258 0x0606060606060606
2082 19:37:35.109480 MTRR: Fixed MSR 0x259 0x0000000000000000
2083 19:37:35.112903 MTRR: Fixed MSR 0x268 0x0606060606060606
2084 19:37:35.116162 MTRR: Fixed MSR 0x269 0x0606060606060606
2085 19:37:35.119307 MTRR: Fixed MSR 0x26a 0x0606060606060606
2086 19:37:35.122696 MTRR: Fixed MSR 0x26b 0x0606060606060606
2087 19:37:35.126035
2088 19:37:35.129697 MTRR: Fixed MSR 0x26c 0x0606060606060606
2089 19:37:35.132903 MTRR: Fixed MSR 0x26d 0x0606060606060606
2090 19:37:35.136155 MTRR: Fixed MSR 0x26e 0x0606060606060606
2091 19:37:35.139307 MTRR: Fixed MSR 0x26f 0x0606060606060606
2092 19:37:35.147392 MTRR: Fixed MSR 0x258 0x0606060606060606
2093 19:37:35.147471 call enable_fixed_mtrr()
2094 19:37:35.153906 MTRR: Fixed MSR 0x259 0x0000000000000000
2095 19:37:35.157082 MTRR: Fixed MSR 0x268 0x0606060606060606
2096 19:37:35.160350 MTRR: Fixed MSR 0x269 0x0606060606060606
2097 19:37:35.163703 MTRR: Fixed MSR 0x26a 0x0606060606060606
2098 19:37:35.170487 MTRR: Fixed MSR 0x26b 0x0606060606060606
2099 19:37:35.173994 MTRR: Fixed MSR 0x26c 0x0606060606060606
2100 19:37:35.177030 MTRR: Fixed MSR 0x26d 0x0606060606060606
2101 19:37:35.180291 MTRR: Fixed MSR 0x26e 0x0606060606060606
2102 19:37:35.183686 MTRR: Fixed MSR 0x26f 0x0606060606060606
2103 19:37:35.186914
2104 19:37:35.190577 CPU physical address size: 39 bits
2105 19:37:35.193800 call enable_fixed_mtrr()
2106 19:37:35.197092 CPU physical address size: 39 bits
2107 19:37:35.200497 CPU physical address size: 39 bits
2108 19:37:35.206945 MTRR: Fixed MSR 0x250 0x0606060606060606
2109 19:37:35.210600 MTRR: Fixed MSR 0x250 0x0606060606060606
2110 19:37:35.213939 MTRR: Fixed MSR 0x258 0x0606060606060606
2111 19:37:35.216779 MTRR: Fixed MSR 0x259 0x0000000000000000
2112 19:37:35.223728 MTRR: Fixed MSR 0x268 0x0606060606060606
2113 19:37:35.227004 MTRR: Fixed MSR 0x269 0x0606060606060606
2114 19:37:35.230076 MTRR: Fixed MSR 0x26a 0x0606060606060606
2115 19:37:35.233407 MTRR: Fixed MSR 0x26b 0x0606060606060606
2116 19:37:35.239939 MTRR: Fixed MSR 0x26c 0x0606060606060606
2117 19:37:35.243527 MTRR: Fixed MSR 0x26d 0x0606060606060606
2118 19:37:35.247106 MTRR: Fixed MSR 0x26e 0x0606060606060606
2119 19:37:35.250253 MTRR: Fixed MSR 0x26f 0x0606060606060606
2120 19:37:35.257188 MTRR: Fixed MSR 0x258 0x0606060606060606
2121 19:37:35.257267 call enable_fixed_mtrr()
2122 19:37:35.263985 MTRR: Fixed MSR 0x259 0x0000000000000000
2123 19:37:35.267033 MTRR: Fixed MSR 0x268 0x0606060606060606
2124 19:37:35.270737 MTRR: Fixed MSR 0x269 0x0606060606060606
2125 19:37:35.273853 MTRR: Fixed MSR 0x26a 0x0606060606060606
2126 19:37:35.280466 MTRR: Fixed MSR 0x26b 0x0606060606060606
2127 19:37:35.283538 MTRR: Fixed MSR 0x26c 0x0606060606060606
2128 19:37:35.286973 MTRR: Fixed MSR 0x26d 0x0606060606060606
2129 19:37:35.290415 MTRR: Fixed MSR 0x26e 0x0606060606060606
2130 19:37:35.296735 MTRR: Fixed MSR 0x26f 0x0606060606060606
2131 19:37:35.300305 CPU physical address size: 39 bits
2132 19:37:35.303742 call enable_fixed_mtrr()
2133 19:37:35.306809 CPU physical address size: 39 bits
2134 19:37:35.310885 Reading cr50 TPM mode
2135 19:37:35.314153 CPU physical address size: 39 bits
2136 19:37:35.317659 CPU physical address size: 39 bits
2137 19:37:35.324668 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 7 ms
2138 19:37:35.331102 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2139 19:37:35.333985 Checking segment from ROM address 0xffc02b38
2140 19:37:35.341214 Checking segment from ROM address 0xffc02b54
2141 19:37:35.344115 Loading segment from ROM address 0xffc02b38
2142 19:37:35.347607 code (compression=0)
2143 19:37:35.354013 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2144 19:37:35.364004 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2145 19:37:35.367198 it's not compressed!
2146 19:37:35.505004 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2147 19:37:35.511935 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2148 19:37:35.518451 Loading segment from ROM address 0xffc02b54
2149 19:37:35.518546 Entry Point 0x30000000
2150 19:37:35.521705 Loaded segments
2151 19:37:35.528370 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2152 19:37:35.571484 Finalizing chipset.
2153 19:37:35.574673 Finalizing SMM.
2154 19:37:35.574757 APMC done.
2155 19:37:35.581194 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2156 19:37:35.584339 mp_park_aps done after 0 msecs.
2157 19:37:35.587951 Jumping to boot code at 0x30000000(0x76b25000)
2158 19:37:35.597869 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2159 19:37:35.597954
2160 19:37:35.598023
2161 19:37:35.598088
2162 19:37:35.600947 Starting depthcharge on Voema...
2163 19:37:35.601052
2164 19:37:35.601425 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2165 19:37:35.601549 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2166 19:37:35.601642 Setting prompt string to ['volteer:']
2167 19:37:35.601736 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2168 19:37:35.611201 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2169 19:37:35.611284
2170 19:37:35.617462 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2171 19:37:35.617542
2172 19:37:35.624430 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2173 19:37:35.624508
2174 19:37:35.627862 Failed to find eMMC card reader
2175 19:37:35.627952
2176 19:37:35.628052 Wipe memory regions:
2177 19:37:35.628137
2178 19:37:35.634131 [0x00000000001000, 0x000000000a0000)
2179 19:37:35.634226
2180 19:37:35.637399 [0x00000000100000, 0x00000030000000)
2181 19:37:35.637492
2182 19:37:35.666016 [0x00000032662db0, 0x000000769ef000)
2183 19:37:35.666109
2184 19:37:35.705613 [0x00000100000000, 0x00000280400000)
2185 19:37:35.705723
2186 19:37:35.911366 ec_init: CrosEC protocol v3 supported (256, 256)
2187 19:37:35.911500
2188 19:37:35.917617 update_port_state: port C0 state: usb enable 1 mux conn 0
2189 19:37:35.917712
2190 19:37:35.927525 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2191 19:37:35.927621
2192 19:37:35.930966 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2193 19:37:35.931063
2194 19:37:35.937451 send_conn_disc_msg: pmc_send_cmd succeeded
2195 19:37:35.937549
2196 19:37:36.369536 R8152: Initializing
2197 19:37:36.369674
2198 19:37:36.372692 Version 6 (ocp_data = 5c30)
2199 19:37:36.372778
2200 19:37:36.376158 R8152: Done initializing
2201 19:37:36.376242
2202 19:37:36.379540 Adding net device
2203 19:37:36.379619
2204 19:37:36.684374 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2205 19:37:36.684507
2206 19:37:36.684580
2207 19:37:36.684649
2208 19:37:36.688210 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2210 19:37:36.788972 volteer: tftpboot 192.168.201.1 8411663/tftp-deploy-it1nb9ra/kernel/bzImage 8411663/tftp-deploy-it1nb9ra/kernel/cmdline 8411663/tftp-deploy-it1nb9ra/ramdisk/ramdisk.cpio.gz
2211 19:37:36.789093 Setting prompt string to 'Starting kernel'
2212 19:37:36.789168 Setting prompt string to ['Starting kernel']
2213 19:37:36.789241 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2214 19:37:36.789313 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2215 19:37:36.793651 tftpboot 192.168.201.1 8411663/tftp-deploy-it1nb9ra/kernel/bzImaoy-it1nb9ra/kernel/cmdline 8411663/tftp-deploy-it1nb9ra/ramdisk/ramdisk.cpio.gz
2216 19:37:36.793740
2217 19:37:36.793807 Waiting for link
2218 19:37:36.793869
2219 19:37:36.998657 done.
2220 19:37:36.998779
2221 19:37:36.998851 MAC: 00:24:32:30:78:74
2222 19:37:36.998914
2223 19:37:37.002138 Sending DHCP discover... done.
2224 19:37:37.002213
2225 19:37:37.005405 Waiting for reply... done.
2226 19:37:37.005476
2227 19:37:37.008651 Sending DHCP request... done.
2228 19:37:37.008726
2229 19:37:37.012223 Waiting for reply... done.
2230 19:37:37.012307
2231 19:37:37.015334 My ip is 192.168.201.14
2232 19:37:37.015405
2233 19:37:37.018407 The DHCP server ip is 192.168.201.1
2234 19:37:37.018493
2235 19:37:37.021729 TFTP server IP predefined by user: 192.168.201.1
2236 19:37:37.021814
2237 19:37:37.028492 Bootfile predefined by user: 8411663/tftp-deploy-it1nb9ra/kernel/bzImage
2238 19:37:37.028577
2239 19:37:37.031693 Sending tftp read request... done.
2240 19:37:37.031777
2241 19:37:37.038315 Waiting for the transfer...
2242 19:37:37.038400
2243 19:37:37.574976 00000000 ################################################################
2244 19:37:37.575118
2245 19:37:38.157011 00080000 ################################################################
2246 19:37:38.157151
2247 19:37:38.744411 00100000 ################################################################
2248 19:37:38.744559
2249 19:37:39.298743 00180000 ################################################################
2250 19:37:39.298885
2251 19:37:39.878676 00200000 ################################################################
2252 19:37:39.878810
2253 19:37:40.485549 00280000 ################################################################
2254 19:37:40.485685
2255 19:37:41.075408 00300000 ################################################################
2256 19:37:41.075547
2257 19:37:41.690192 00380000 ################################################################
2258 19:37:41.690333
2259 19:37:42.303024 00400000 ################################################################
2260 19:37:42.303162
2261 19:37:42.933207 00480000 ################################################################
2262 19:37:42.933353
2263 19:37:43.541078 00500000 ################################################################
2264 19:37:43.541246
2265 19:37:44.111539 00580000 ################################################################
2266 19:37:44.111677
2267 19:37:44.696975 00600000 ################################################################
2268 19:37:44.697115
2269 19:37:45.312424 00680000 ################################################################
2270 19:37:45.312565
2271 19:37:45.570586 00700000 ############################# done.
2272 19:37:45.570730
2273 19:37:45.573857 The bootfile was 7577488 bytes long.
2274 19:37:45.573946
2275 19:37:45.577305 Sending tftp read request... done.
2276 19:37:45.577397
2277 19:37:45.580500 Waiting for the transfer...
2278 19:37:45.580590
2279 19:37:46.264110 00000000 ################################################################
2280 19:37:46.264730
2281 19:37:46.962265 00080000 ################################################################
2282 19:37:46.962408
2283 19:37:47.544286 00100000 ################################################################
2284 19:37:47.544439
2285 19:37:48.093099 00180000 ################################################################
2286 19:37:48.093267
2287 19:37:48.641132 00200000 ################################################################
2288 19:37:48.641292
2289 19:37:49.185486 00280000 ################################################################
2290 19:37:49.185626
2291 19:37:49.725816 00300000 ################################################################
2292 19:37:49.725967
2293 19:37:50.268709 00380000 ################################################################
2294 19:37:50.268857
2295 19:37:50.784185 00400000 ################################################################
2296 19:37:50.784339
2297 19:37:51.326583 00480000 ################################################################
2298 19:37:51.326756
2299 19:37:51.596219 00500000 ################################ done.
2300 19:37:51.596377
2301 19:37:51.599891 Sending tftp read request... done.
2302 19:37:51.600010
2303 19:37:51.603142 Waiting for the transfer...
2304 19:37:51.603228
2305 19:37:51.603295 00000000 # done.
2306 19:37:51.603360
2307 19:37:51.613189 Command line loaded dynamically from TFTP file: 8411663/tftp-deploy-it1nb9ra/kernel/cmdline
2308 19:37:51.613276
2309 19:37:51.635932 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8411663/extract-nfsrootfs-ppqxgg55,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2310 19:37:51.636096
2311 19:37:51.642494 Shutting down all USB controllers.
2312 19:37:51.642623
2313 19:37:51.642706 Removing current net device
2314 19:37:51.642770
2315 19:37:51.645970 Finalizing coreboot
2316 19:37:51.646057
2317 19:37:51.652603 Exiting depthcharge with code 4 at timestamp: 24700406
2318 19:37:51.652690
2319 19:37:51.652795
2320 19:37:51.652857 Starting kernel ...
2321 19:37:51.652918
2322 19:37:51.652976
2323 19:37:51.653033
2324 19:37:51.653406 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2325 19:37:51.653503 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2326 19:37:51.653579 Setting prompt string to ['Linux version [0-9]']
2327 19:37:51.653649 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2328 19:37:51.653746 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2330 19:42:19.654598 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2332 19:42:19.655742 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2334 19:42:19.656649 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2337 19:42:19.658099 end: 2 depthcharge-action (duration 00:05:00) [common]
2339 19:42:19.659310 Cleaning after the job
2340 19:42:19.659508 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411663/tftp-deploy-it1nb9ra/ramdisk
2341 19:42:19.659995 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411663/tftp-deploy-it1nb9ra/kernel
2342 19:42:19.660546 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411663/tftp-deploy-it1nb9ra/nfsrootfs
2343 19:42:19.693129 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411663/tftp-deploy-it1nb9ra/modules
2344 19:42:19.693428 start: 5.1 power-off (timeout 00:00:30) [common]
2345 19:42:19.693623 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2346 19:42:19.712476 >> Command sent successfully.
2347 19:42:19.714278 Returned 0 in 0 seconds
2348 19:42:19.815477 end: 5.1 power-off (duration 00:00:00) [common]
2350 19:42:19.817107 start: 5.2 read-feedback (timeout 00:10:00) [common]
2351 19:42:19.818266 Listened to connection for namespace 'common' for up to 1s
2352 19:42:20.822831 Finalising connection for namespace 'common'
2353 19:42:20.823076 Disconnecting from shell: Finalise
2354 19:42:20.923984 end: 5.2 read-feedback (duration 00:00:01) [common]
2355 19:42:20.924234 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8411663
2356 19:42:21.020781 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8411663
2357 19:42:21.020984 JobError: Your job cannot terminate cleanly.