Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 15:04:04.130229 lava-dispatcher, installed at version: 2022.11
2 15:04:04.130419 start: 0 validate
3 15:04:04.130547 Start time: 2023-02-06 15:04:04.130540+00:00 (UTC)
4 15:04:04.130670 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:04:04.130799 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230127.0%2Fx86%2Frootfs.cpio.gz exists
6 15:04:04.135086 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:04:04.135271 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-1684-gd04aea87b5a3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:04:04.137784 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:04:04.137958 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-1684-gd04aea87b5a3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:04:04.141848 validate duration: 0.01
12 15:04:04.142096 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:04:04.142207 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:04:04.142303 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:04:04.142406 Not decompressing ramdisk as can be used compressed.
16 15:04:04.142588 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230127.0/x86/rootfs.cpio.gz
17 15:04:04.142657 saving as /var/lib/lava/dispatcher/tmp/9036933/tftp-deploy-li5uz04n/ramdisk/rootfs.cpio.gz
18 15:04:04.142721 total size: 8423634 (8MB)
19 15:04:04.145598 progress 0% (0MB)
20 15:04:04.148841 progress 5% (0MB)
21 15:04:04.152579 progress 10% (0MB)
22 15:04:04.156132 progress 15% (1MB)
23 15:04:04.159766 progress 20% (1MB)
24 15:04:04.163404 progress 25% (2MB)
25 15:04:04.167047 progress 30% (2MB)
26 15:04:04.170293 progress 35% (2MB)
27 15:04:04.173937 progress 40% (3MB)
28 15:04:04.177586 progress 45% (3MB)
29 15:04:04.181233 progress 50% (4MB)
30 15:04:04.184900 progress 55% (4MB)
31 15:04:04.188570 progress 60% (4MB)
32 15:04:04.192219 progress 65% (5MB)
33 15:04:04.195447 progress 70% (5MB)
34 15:04:04.199092 progress 75% (6MB)
35 15:04:04.202741 progress 80% (6MB)
36 15:04:04.206387 progress 85% (6MB)
37 15:04:04.210035 progress 90% (7MB)
38 15:04:04.213680 progress 95% (7MB)
39 15:04:04.217134 progress 100% (8MB)
40 15:04:04.217308 8MB downloaded in 0.07s (107.71MB/s)
41 15:04:04.217468 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:04:04.217720 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:04:04.217811 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:04:04.217900 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:04:04.218008 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-1684-gd04aea87b5a3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:04:04.218082 saving as /var/lib/lava/dispatcher/tmp/9036933/tftp-deploy-li5uz04n/kernel/bzImage
48 15:04:04.218146 total size: 7577488 (7MB)
49 15:04:04.218207 No compression specified
50 15:04:04.220526 progress 0% (0MB)
51 15:04:04.224014 progress 5% (0MB)
52 15:04:04.226825 progress 10% (0MB)
53 15:04:04.229904 progress 15% (1MB)
54 15:04:04.233351 progress 20% (1MB)
55 15:04:04.236425 progress 25% (1MB)
56 15:04:04.239696 progress 30% (2MB)
57 15:04:04.242766 progress 35% (2MB)
58 15:04:04.246214 progress 40% (2MB)
59 15:04:04.249489 progress 45% (3MB)
60 15:04:04.252559 progress 50% (3MB)
61 15:04:04.256053 progress 55% (4MB)
62 15:04:04.259125 progress 60% (4MB)
63 15:04:04.262448 progress 65% (4MB)
64 15:04:04.265420 progress 70% (5MB)
65 15:04:04.268682 progress 75% (5MB)
66 15:04:04.271761 progress 80% (5MB)
67 15:04:04.275397 progress 85% (6MB)
68 15:04:04.278479 progress 90% (6MB)
69 15:04:04.281548 progress 95% (6MB)
70 15:04:04.284841 progress 100% (7MB)
71 15:04:04.285032 7MB downloaded in 0.07s (108.05MB/s)
72 15:04:04.285185 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:04:04.285422 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:04:04.285512 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:04:04.285599 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:04:04.285707 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-1684-gd04aea87b5a3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:04:04.285776 saving as /var/lib/lava/dispatcher/tmp/9036933/tftp-deploy-li5uz04n/modules/modules.tar
79 15:04:04.285838 total size: 54728 (0MB)
80 15:04:04.285901 Using unxz to decompress xz
81 15:04:04.290239 progress 59% (0MB)
82 15:04:04.290605 progress 100% (0MB)
83 15:04:04.294078 0MB downloaded in 0.01s (6.34MB/s)
84 15:04:04.294303 end: 1.3.1 http-download (duration 00:00:00) [common]
86 15:04:04.294569 end: 1.3 download-retry (duration 00:00:00) [common]
87 15:04:04.294666 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 15:04:04.294764 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 15:04:04.294853 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 15:04:04.294943 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 15:04:04.295108 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca
92 15:04:04.295217 makedir: /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin
93 15:04:04.295302 makedir: /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/tests
94 15:04:04.295384 makedir: /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/results
95 15:04:04.295487 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-add-keys
96 15:04:04.295618 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-add-sources
97 15:04:04.295777 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-background-process-start
98 15:04:04.295894 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-background-process-stop
99 15:04:04.296007 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-common-functions
100 15:04:04.296117 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-echo-ipv4
101 15:04:04.296231 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-install-packages
102 15:04:04.296343 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-installed-packages
103 15:04:04.296453 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-os-build
104 15:04:04.296563 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-probe-channel
105 15:04:04.296677 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-probe-ip
106 15:04:04.296786 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-target-ip
107 15:04:04.296896 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-target-mac
108 15:04:04.297004 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-target-storage
109 15:04:04.297116 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-test-case
110 15:04:04.297227 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-test-event
111 15:04:04.297337 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-test-feedback
112 15:04:04.297446 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-test-raise
113 15:04:04.297563 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-test-reference
114 15:04:04.297674 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-test-runner
115 15:04:04.297783 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-test-set
116 15:04:04.297892 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-test-shell
117 15:04:04.298006 Updating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-install-packages (oe)
118 15:04:04.298120 Updating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/bin/lava-installed-packages (oe)
119 15:04:04.298220 Creating /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/environment
120 15:04:04.298313 LAVA metadata
121 15:04:04.298386 - LAVA_JOB_ID=9036933
122 15:04:04.298453 - LAVA_DISPATCHER_IP=192.168.201.1
123 15:04:04.298555 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 15:04:04.298621 skipped lava-vland-overlay
125 15:04:04.298699 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 15:04:04.298784 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 15:04:04.298848 skipped lava-multinode-overlay
128 15:04:04.298923 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 15:04:04.299008 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 15:04:04.299086 Loading test definitions
131 15:04:04.299185 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 15:04:04.299262 Using /lava-9036933 at stage 0
133 15:04:04.299527 uuid=9036933_1.4.2.3.1 testdef=None
134 15:04:04.299617 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 15:04:04.299742 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 15:04:04.300249 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 15:04:04.300482 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 15:04:04.301063 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 15:04:04.301301 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 15:04:04.301843 runner path: /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/0/tests/0_dmesg test_uuid 9036933_1.4.2.3.1
143 15:04:04.301987 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 15:04:04.302220 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 15:04:04.302294 Using /lava-9036933 at stage 1
147 15:04:04.302540 uuid=9036933_1.4.2.3.5 testdef=None
148 15:04:04.302630 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 15:04:04.302720 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 15:04:04.303162 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 15:04:04.303385 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 15:04:04.304006 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 15:04:04.304246 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 15:04:04.304798 runner path: /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/1/tests/1_bootrr test_uuid 9036933_1.4.2.3.5
157 15:04:04.304941 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 15:04:04.305152 Creating lava-test-runner.conf files
160 15:04:04.305216 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/0 for stage 0
161 15:04:04.305298 - 0_dmesg
162 15:04:04.305373 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9036933/lava-overlay-glx_iwca/lava-9036933/1 for stage 1
163 15:04:04.305457 - 1_bootrr
164 15:04:04.305548 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 15:04:04.305634 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 15:04:04.311706 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 15:04:04.311851 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 15:04:04.311942 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 15:04:04.312031 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 15:04:04.312120 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 15:04:04.494483 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 15:04:04.494856 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 15:04:04.494967 extracting modules file /var/lib/lava/dispatcher/tmp/9036933/tftp-deploy-li5uz04n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9036933/extract-overlay-ramdisk-h9p56c0q/ramdisk
174 15:04:04.499301 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 15:04:04.499411 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 15:04:04.499497 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9036933/compress-overlay-d71_9cxz/overlay-1.4.2.4.tar.gz to ramdisk
177 15:04:04.499571 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9036933/compress-overlay-d71_9cxz/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9036933/extract-overlay-ramdisk-h9p56c0q/ramdisk
178 15:04:04.503398 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 15:04:04.503510 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 15:04:04.503600 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 15:04:04.503700 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 15:04:04.503833 Building ramdisk /var/lib/lava/dispatcher/tmp/9036933/extract-overlay-ramdisk-h9p56c0q/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9036933/extract-overlay-ramdisk-h9p56c0q/ramdisk
183 15:04:04.567358 >> 48156 blocks
184 15:04:05.309664 rename /var/lib/lava/dispatcher/tmp/9036933/extract-overlay-ramdisk-h9p56c0q/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9036933/tftp-deploy-li5uz04n/ramdisk/ramdisk.cpio.gz
185 15:04:05.310076 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 15:04:05.310198 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 15:04:05.310295 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 15:04:05.310391 No mkimage arch provided, not using FIT.
189 15:04:05.310538 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 15:04:05.310639 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 15:04:05.310740 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 15:04:05.310862 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 15:04:05.310942 No LXC device requested
194 15:04:05.311023 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 15:04:05.311114 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 15:04:05.311200 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 15:04:05.311275 Checking files for TFTP limit of 4294967296 bytes.
198 15:04:05.311653 end: 1 tftp-deploy (duration 00:00:01) [common]
199 15:04:05.311810 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 15:04:05.311912 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 15:04:05.312042 substitutions:
202 15:04:05.312112 - {DTB}: None
203 15:04:05.312177 - {INITRD}: 9036933/tftp-deploy-li5uz04n/ramdisk/ramdisk.cpio.gz
204 15:04:05.312238 - {KERNEL}: 9036933/tftp-deploy-li5uz04n/kernel/bzImage
205 15:04:05.312298 - {LAVA_MAC}: None
206 15:04:05.312355 - {PRESEED_CONFIG}: None
207 15:04:05.312413 - {PRESEED_LOCAL}: None
208 15:04:05.312469 - {RAMDISK}: 9036933/tftp-deploy-li5uz04n/ramdisk/ramdisk.cpio.gz
209 15:04:05.312526 - {ROOT_PART}: None
210 15:04:05.312582 - {ROOT}: None
211 15:04:05.312637 - {SERVER_IP}: 192.168.201.1
212 15:04:05.312693 - {TEE}: None
213 15:04:05.312749 Parsed boot commands:
214 15:04:05.312804 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 15:04:05.312949 Parsed boot commands: tftpboot 192.168.201.1 9036933/tftp-deploy-li5uz04n/kernel/bzImage 9036933/tftp-deploy-li5uz04n/kernel/cmdline 9036933/tftp-deploy-li5uz04n/ramdisk/ramdisk.cpio.gz
216 15:04:05.313042 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 15:04:05.313132 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 15:04:05.313226 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 15:04:05.313314 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 15:04:05.313383 Not connected, no need to disconnect.
221 15:04:05.313462 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 15:04:05.313545 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 15:04:05.313611 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
224 15:04:05.316519 Setting prompt string to ['lava-test: # ']
225 15:04:05.316800 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 15:04:05.316904 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 15:04:05.317004 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 15:04:05.317093 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 15:04:05.317482 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
230 15:04:14.656318 >> Command sent successfully.
231 15:04:14.666097 Returned 0 in 9 seconds
232 15:04:14.767860 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 15:04:14.769396 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 15:04:14.769990 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 15:04:14.770479 Setting prompt string to 'Starting depthcharge on Voema...'
237 15:04:14.770865 Changing prompt to 'Starting depthcharge on Voema...'
238 15:04:14.771251 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 15:04:14.772701 [Enter `^Ec?' for help]
240 15:04:14.773206
241 15:04:14.773658
242 15:04:14.774026 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 15:04:14.774406 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 15:04:14.774766 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 15:04:14.775119 CPU: AES supported, TXT NOT supported, VT supported
246 15:04:14.775456 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 15:04:14.775837 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 15:04:14.776184 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 15:04:14.776514 VBOOT: Loading verstage.
250 15:04:14.776851 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 15:04:14.777185 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 15:04:14.777539 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 15:04:14.777978 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 15:04:14.778321 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 15:04:14.778651
256 15:04:14.778975
257 15:04:14.779300 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 15:04:14.779633 Probing TPM: . done!
259 15:04:14.780017 TPM ready after 0 ms
260 15:04:14.780349 Connected to device vid:did:rid of 1ae0:0028:00
261 15:04:14.780679 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
262 15:04:14.781031 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 15:04:14.781479 Initialized TPM device CR50 revision 0
264 15:04:14.781815 tlcl_send_startup: Startup return code is 0
265 15:04:14.782145 TPM: setup succeeded
266 15:04:14.782497 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 15:04:14.782828 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 15:04:14.783155 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 15:04:14.783483 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 15:04:14.783843 Chrome EC: UHEPI supported
271 15:04:14.784172 Phase 1
272 15:04:14.784529 FMAP: area GBB found @ 1805000 (458752 bytes)
273 15:04:14.784951 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 15:04:14.785295 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 15:04:14.785594 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 15:04:14.785895 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 15:04:14.786191 Recovery requested (1009000e)
278 15:04:14.786487 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 15:04:14.786785 tlcl_extend: response is 0
280 15:04:14.787080 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 15:04:14.787415 tlcl_extend: response is 0
282 15:04:14.787871 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 15:04:14.788225 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 15:04:14.788637 BS: verstage times (exec / console): total (unknown) / 142 ms
285 15:04:14.788973
286 15:04:14.789305
287 15:04:14.789600 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 15:04:14.789905 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 15:04:14.790204 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 15:04:14.790505 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 15:04:14.790804 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 15:04:14.791201 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 15:04:14.791516 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
294 15:04:14.791850 TCO_STS: 0000 0000
295 15:04:14.792155 GEN_PMCON: d0015038 00002200
296 15:04:14.792454 GBLRST_CAUSE: 00000000 00000000
297 15:04:14.792751 HPR_CAUSE0: 00000000
298 15:04:14.793046 prev_sleep_state 5
299 15:04:14.793341 Boot Count incremented to 13731
300 15:04:14.793637 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 15:04:14.793935 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 15:04:14.794234 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 15:04:14.794569 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 15:04:14.794936 Chrome EC: UHEPI supported
305 15:04:14.795246 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 15:04:14.795460 Probing TPM: done!
307 15:04:14.795671 Connected to device vid:did:rid of 1ae0:0028:00
308 15:04:14.795910 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
309 15:04:14.796128 Initialized TPM device CR50 revision 0
310 15:04:14.796625 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 15:04:14.796870 MRC: Hash idx 0x100b comparison successful.
312 15:04:14.797085 MRC cache found, size faa8
313 15:04:14.797299 bootmode is set to: 2
314 15:04:14.797510 SPD index = 2
315 15:04:14.801847 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 15:04:14.804746 SPD: module type is LPDDR4X
317 15:04:14.807728 SPD: module part number is MT53D1G64D4NW-046
318 15:04:14.814676 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
319 15:04:14.817965 SPD: device width 16 bits, bus width 16 bits
320 15:04:14.824964 SPD: module size is 2048 MB (per channel)
321 15:04:15.254160 CBMEM:
322 15:04:15.257037 IMD: root @ 0x76fff000 254 entries.
323 15:04:15.260361 IMD: root @ 0x76ffec00 62 entries.
324 15:04:15.264185 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 15:04:15.271036 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 15:04:15.273726 External stage cache:
327 15:04:15.277233 IMD: root @ 0x7b3ff000 254 entries.
328 15:04:15.280555 IMD: root @ 0x7b3fec00 62 entries.
329 15:04:15.295533 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 15:04:15.302200 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 15:04:15.308751 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 15:04:15.322512 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 15:04:15.328767 cse_lite: Skip switching to RW in the recovery path
334 15:04:15.329362 8 DIMMs found
335 15:04:15.329764 SMM Memory Map
336 15:04:15.335259 SMRAM : 0x7b000000 0x800000
337 15:04:15.339004 Subregion 0: 0x7b000000 0x200000
338 15:04:15.342379 Subregion 1: 0x7b200000 0x200000
339 15:04:15.345118 Subregion 2: 0x7b400000 0x400000
340 15:04:15.345685 top_of_ram = 0x77000000
341 15:04:15.351937 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 15:04:15.358823 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 15:04:15.361506 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 15:04:15.368431 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 15:04:15.375075 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 15:04:15.381832 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 15:04:15.392157 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 15:04:15.398249 Processing 211 relocs. Offset value of 0x74c0b000
349 15:04:15.405273 BS: romstage times (exec / console): total (unknown) / 277 ms
350 15:04:15.411276
351 15:04:15.411797
352 15:04:15.421103 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 15:04:15.424158 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 15:04:15.434346 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 15:04:15.440940 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 15:04:15.447352 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 15:04:15.453927 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 15:04:15.497544 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 15:04:15.504726 Processing 5008 relocs. Offset value of 0x75d98000
360 15:04:15.507588 BS: postcar times (exec / console): total (unknown) / 59 ms
361 15:04:15.510710
362 15:04:15.511201
363 15:04:15.520939 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 15:04:15.521444 Normal boot
365 15:04:15.523870 FW_CONFIG value is 0x804c02
366 15:04:15.527499 PCI: 00:07.0 disabled by fw_config
367 15:04:15.530570 PCI: 00:07.1 disabled by fw_config
368 15:04:15.534016 PCI: 00:0d.2 disabled by fw_config
369 15:04:15.540605 PCI: 00:1c.7 disabled by fw_config
370 15:04:15.543792 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 15:04:15.550448 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 15:04:15.553735 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 15:04:15.560277 GENERIC: 0.0 disabled by fw_config
374 15:04:15.563665 GENERIC: 1.0 disabled by fw_config
375 15:04:15.567183 fw_config match found: DB_USB=USB3_ACTIVE
376 15:04:15.570742 fw_config match found: DB_USB=USB3_ACTIVE
377 15:04:15.573822 fw_config match found: DB_USB=USB3_ACTIVE
378 15:04:15.580478 fw_config match found: DB_USB=USB3_ACTIVE
379 15:04:15.583769 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 15:04:15.593821 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 15:04:15.600314 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 15:04:15.606517 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 15:04:15.610134 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 15:04:15.616873 microcode: Update skipped, already up-to-date
385 15:04:15.623425 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 15:04:15.651136 Detected 4 core, 8 thread CPU.
387 15:04:15.654720 Setting up SMI for CPU
388 15:04:15.658404 IED base = 0x7b400000
389 15:04:15.659000 IED size = 0x00400000
390 15:04:15.661159 Will perform SMM setup.
391 15:04:15.667840 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
392 15:04:15.674289 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 15:04:15.681485 Processing 16 relocs. Offset value of 0x00030000
394 15:04:15.684028 Attempting to start 7 APs
395 15:04:15.687687 Waiting for 10ms after sending INIT.
396 15:04:15.703519 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 15:04:15.704166 done.
398 15:04:15.706416 AP: slot 4 apic_id 7.
399 15:04:15.709957 AP: slot 5 apic_id 6.
400 15:04:15.710447 AP: slot 3 apic_id 5.
401 15:04:15.713578 AP: slot 7 apic_id 4.
402 15:04:15.716284 AP: slot 6 apic_id 2.
403 15:04:15.716773 AP: slot 2 apic_id 3.
404 15:04:15.722837 Waiting for 2nd SIPI to complete...done.
405 15:04:15.729126 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 15:04:15.736191 Processing 13 relocs. Offset value of 0x00038000
407 15:04:15.739768 Unable to locate Global NVS
408 15:04:15.746100 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 15:04:15.749309 Installing permanent SMM handler to 0x7b000000
410 15:04:15.758829 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 15:04:15.762146 Processing 794 relocs. Offset value of 0x7b010000
412 15:04:15.772220 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 15:04:15.775589 Processing 13 relocs. Offset value of 0x7b008000
414 15:04:15.782185 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 15:04:15.789553 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 15:04:15.795602 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 15:04:15.798958 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 15:04:15.805559 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 15:04:15.812133 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 15:04:15.818670 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 15:04:15.822338 Unable to locate Global NVS
422 15:04:15.828650 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 15:04:15.832000 Clearing SMI status registers
424 15:04:15.835466 SMI_STS: PM1
425 15:04:15.836108 PM1_STS: PWRBTN
426 15:04:15.842294 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 15:04:15.845404 In relocation handler: CPU 0
428 15:04:15.848528 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 15:04:15.855008 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 15:04:15.858182 Relocation complete.
431 15:04:15.865083 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 15:04:15.868137 In relocation handler: CPU 1
433 15:04:15.871737 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 15:04:15.874913 Relocation complete.
435 15:04:15.881999 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
436 15:04:15.884452 In relocation handler: CPU 7
437 15:04:15.888327 New SMBASE=0x7affe400 IEDBASE=0x7b400000
438 15:04:15.891853 Writing SMRR. base = 0x7b000006, mask=0xff800c00
439 15:04:15.894737 Relocation complete.
440 15:04:15.901538 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
441 15:04:15.904445 In relocation handler: CPU 3
442 15:04:15.908010 New SMBASE=0x7afff400 IEDBASE=0x7b400000
443 15:04:15.910834 Relocation complete.
444 15:04:15.917483 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
445 15:04:15.921490 In relocation handler: CPU 2
446 15:04:15.924414 New SMBASE=0x7afff800 IEDBASE=0x7b400000
447 15:04:15.927718 Relocation complete.
448 15:04:15.934193 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
449 15:04:15.937137 In relocation handler: CPU 6
450 15:04:15.940868 New SMBASE=0x7affe800 IEDBASE=0x7b400000
451 15:04:15.947251 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 15:04:15.947861 Relocation complete.
453 15:04:15.957370 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
454 15:04:15.960584 In relocation handler: CPU 4
455 15:04:15.963798 New SMBASE=0x7afff000 IEDBASE=0x7b400000
456 15:04:15.964301 Relocation complete.
457 15:04:15.973862 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
458 15:04:15.976928 In relocation handler: CPU 5
459 15:04:15.980043 New SMBASE=0x7affec00 IEDBASE=0x7b400000
460 15:04:15.983470 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 15:04:15.986956 Relocation complete.
462 15:04:15.990524 Initializing CPU #0
463 15:04:15.994070 CPU: vendor Intel device 806c1
464 15:04:15.996476 CPU: family 06, model 8c, stepping 01
465 15:04:16.000029 Clearing out pending MCEs
466 15:04:16.000581 Setting up local APIC...
467 15:04:16.003549 apic_id: 0x00 done.
468 15:04:16.006403 Turbo is available but hidden
469 15:04:16.010080 Turbo is available and visible
470 15:04:16.013303 microcode: Update skipped, already up-to-date
471 15:04:16.016775 CPU #0 initialized
472 15:04:16.020383 Initializing CPU #1
473 15:04:16.020942 Initializing CPU #5
474 15:04:16.023263 Initializing CPU #4
475 15:04:16.026787 CPU: vendor Intel device 806c1
476 15:04:16.029547 CPU: family 06, model 8c, stepping 01
477 15:04:16.032969 CPU: vendor Intel device 806c1
478 15:04:16.036520 CPU: family 06, model 8c, stepping 01
479 15:04:16.039535 Clearing out pending MCEs
480 15:04:16.043004 Clearing out pending MCEs
481 15:04:16.043552 Setting up local APIC...
482 15:04:16.045966 CPU: vendor Intel device 806c1
483 15:04:16.049880 CPU: family 06, model 8c, stepping 01
484 15:04:16.052946 apic_id: 0x06 done.
485 15:04:16.055919 Setting up local APIC...
486 15:04:16.059491 Clearing out pending MCEs
487 15:04:16.060080 apic_id: 0x07 done.
488 15:04:16.066327 microcode: Update skipped, already up-to-date
489 15:04:16.069357 microcode: Update skipped, already up-to-date
490 15:04:16.072324 CPU #5 initialized
491 15:04:16.072771 CPU #4 initialized
492 15:04:16.076243 Initializing CPU #6
493 15:04:16.076690 Initializing CPU #2
494 15:04:16.079782 CPU: vendor Intel device 806c1
495 15:04:16.084074 CPU: family 06, model 8c, stepping 01
496 15:04:16.087020 Setting up local APIC...
497 15:04:16.090538 Initializing CPU #3
498 15:04:16.091088 Initializing CPU #7
499 15:04:16.093745 CPU: vendor Intel device 806c1
500 15:04:16.096745 CPU: family 06, model 8c, stepping 01
501 15:04:16.100424 CPU: vendor Intel device 806c1
502 15:04:16.106839 CPU: family 06, model 8c, stepping 01
503 15:04:16.107460 apic_id: 0x01 done.
504 15:04:16.110079 Clearing out pending MCEs
505 15:04:16.113353 microcode: Update skipped, already up-to-date
506 15:04:16.116786 Clearing out pending MCEs
507 15:04:16.119877 Clearing out pending MCEs
508 15:04:16.123344 CPU: vendor Intel device 806c1
509 15:04:16.126904 CPU: family 06, model 8c, stepping 01
510 15:04:16.130023 Setting up local APIC...
511 15:04:16.133655 Setting up local APIC...
512 15:04:16.134209 CPU #1 initialized
513 15:04:16.136268 apic_id: 0x04 done.
514 15:04:16.139448 Setting up local APIC...
515 15:04:16.143018 microcode: Update skipped, already up-to-date
516 15:04:16.146184 apic_id: 0x05 done.
517 15:04:16.146634 CPU #7 initialized
518 15:04:16.153274 microcode: Update skipped, already up-to-date
519 15:04:16.153728 Clearing out pending MCEs
520 15:04:16.156465 apic_id: 0x02 done.
521 15:04:16.159711 Setting up local APIC...
522 15:04:16.160172 CPU #3 initialized
523 15:04:16.162595 apic_id: 0x03 done.
524 15:04:16.169386 microcode: Update skipped, already up-to-date
525 15:04:16.172741 microcode: Update skipped, already up-to-date
526 15:04:16.173192 CPU #6 initialized
527 15:04:16.176027 CPU #2 initialized
528 15:04:16.179761 bsp_do_flight_plan done after 454 msecs.
529 15:04:16.183318 CPU: frequency set to 4400 MHz
530 15:04:16.186274 Enabling SMIs.
531 15:04:16.192795 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
532 15:04:16.207962 SATAXPCIE1 indicates PCIe NVMe is present
533 15:04:16.211236 Probing TPM: done!
534 15:04:16.213912 Connected to device vid:did:rid of 1ae0:0028:00
535 15:04:16.225172 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
536 15:04:16.228005 Initialized TPM device CR50 revision 0
537 15:04:16.231577 Enabling S0i3.4
538 15:04:16.237597 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 15:04:16.241105 Found a VBT of 8704 bytes after decompression
540 15:04:16.248120 cse_lite: CSE RO boot. HybridStorageMode disabled
541 15:04:16.254359 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 15:04:16.330839 FSPS returned 0
543 15:04:16.333663 Executing Phase 1 of FspMultiPhaseSiInit
544 15:04:16.343403 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 15:04:16.346973 port C0 DISC req: usage 1 usb3 1 usb2 5
546 15:04:16.349723 Raw Buffer output 0 00000511
547 15:04:16.353442 Raw Buffer output 1 00000000
548 15:04:16.356764 pmc_send_ipc_cmd succeeded
549 15:04:16.363505 port C1 DISC req: usage 1 usb3 2 usb2 3
550 15:04:16.364005 Raw Buffer output 0 00000321
551 15:04:16.366832 Raw Buffer output 1 00000000
552 15:04:16.371350 pmc_send_ipc_cmd succeeded
553 15:04:16.376374 Detected 4 core, 8 thread CPU.
554 15:04:16.379154 Detected 4 core, 8 thread CPU.
555 15:04:16.580081 Display FSP Version Info HOB
556 15:04:16.583276 Reference Code - CPU = a.0.4c.31
557 15:04:16.586255 uCode Version = 0.0.0.86
558 15:04:16.590003 TXT ACM version = ff.ff.ff.ffff
559 15:04:16.593009 Reference Code - ME = a.0.4c.31
560 15:04:16.596257 MEBx version = 0.0.0.0
561 15:04:16.599462 ME Firmware Version = Consumer SKU
562 15:04:16.603384 Reference Code - PCH = a.0.4c.31
563 15:04:16.606789 PCH-CRID Status = Disabled
564 15:04:16.609318 PCH-CRID Original Value = ff.ff.ff.ffff
565 15:04:16.612818 PCH-CRID New Value = ff.ff.ff.ffff
566 15:04:16.616137 OPROM - RST - RAID = ff.ff.ff.ffff
567 15:04:16.619327 PCH Hsio Version = 4.0.0.0
568 15:04:16.623173 Reference Code - SA - System Agent = a.0.4c.31
569 15:04:16.625696 Reference Code - MRC = 2.0.0.1
570 15:04:16.629021 SA - PCIe Version = a.0.4c.31
571 15:04:16.633036 SA-CRID Status = Disabled
572 15:04:16.636088 SA-CRID Original Value = 0.0.0.1
573 15:04:16.639083 SA-CRID New Value = 0.0.0.1
574 15:04:16.642438 OPROM - VBIOS = ff.ff.ff.ffff
575 15:04:16.645606 IO Manageability Engine FW Version = 11.1.4.0
576 15:04:16.648778 PHY Build Version = 0.0.0.e0
577 15:04:16.652029 Thunderbolt(TM) FW Version = 0.0.0.0
578 15:04:16.659020 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 15:04:16.663164 ITSS IRQ Polarities Before:
580 15:04:16.663764 IPC0: 0xffffffff
581 15:04:16.666385 IPC1: 0xffffffff
582 15:04:16.666905 IPC2: 0xffffffff
583 15:04:16.669756 IPC3: 0xffffffff
584 15:04:16.673236 ITSS IRQ Polarities After:
585 15:04:16.673838 IPC0: 0xffffffff
586 15:04:16.676590 IPC1: 0xffffffff
587 15:04:16.677036 IPC2: 0xffffffff
588 15:04:16.680043 IPC3: 0xffffffff
589 15:04:16.683186 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 15:04:16.696350 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 15:04:16.706251 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 15:04:16.719733 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 15:04:16.726242 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
594 15:04:16.729193 Enumerating buses...
595 15:04:16.732738 Show all devs... Before device enumeration.
596 15:04:16.735877 Root Device: enabled 1
597 15:04:16.736462 DOMAIN: 0000: enabled 1
598 15:04:16.739304 CPU_CLUSTER: 0: enabled 1
599 15:04:16.742581 PCI: 00:00.0: enabled 1
600 15:04:16.745736 PCI: 00:02.0: enabled 1
601 15:04:16.746229 PCI: 00:04.0: enabled 1
602 15:04:16.748933 PCI: 00:05.0: enabled 1
603 15:04:16.751842 PCI: 00:06.0: enabled 0
604 15:04:16.755238 PCI: 00:07.0: enabled 0
605 15:04:16.755760 PCI: 00:07.1: enabled 0
606 15:04:16.758863 PCI: 00:07.2: enabled 0
607 15:04:16.762121 PCI: 00:07.3: enabled 0
608 15:04:16.762665 PCI: 00:08.0: enabled 1
609 15:04:16.765499 PCI: 00:09.0: enabled 0
610 15:04:16.768926 PCI: 00:0a.0: enabled 0
611 15:04:16.772130 PCI: 00:0d.0: enabled 1
612 15:04:16.772578 PCI: 00:0d.1: enabled 0
613 15:04:16.775862 PCI: 00:0d.2: enabled 0
614 15:04:16.778772 PCI: 00:0d.3: enabled 0
615 15:04:16.782181 PCI: 00:0e.0: enabled 0
616 15:04:16.782633 PCI: 00:10.2: enabled 1
617 15:04:16.785783 PCI: 00:10.6: enabled 0
618 15:04:16.788104 PCI: 00:10.7: enabled 0
619 15:04:16.791515 PCI: 00:12.0: enabled 0
620 15:04:16.791990 PCI: 00:12.6: enabled 0
621 15:04:16.794979 PCI: 00:13.0: enabled 0
622 15:04:16.798756 PCI: 00:14.0: enabled 1
623 15:04:16.802151 PCI: 00:14.1: enabled 0
624 15:04:16.802701 PCI: 00:14.2: enabled 1
625 15:04:16.804842 PCI: 00:14.3: enabled 1
626 15:04:16.808571 PCI: 00:15.0: enabled 1
627 15:04:16.811654 PCI: 00:15.1: enabled 1
628 15:04:16.812150 PCI: 00:15.2: enabled 1
629 15:04:16.815472 PCI: 00:15.3: enabled 1
630 15:04:16.818428 PCI: 00:16.0: enabled 1
631 15:04:16.818969 PCI: 00:16.1: enabled 0
632 15:04:16.821563 PCI: 00:16.2: enabled 0
633 15:04:16.825290 PCI: 00:16.3: enabled 0
634 15:04:16.828680 PCI: 00:16.4: enabled 0
635 15:04:16.829225 PCI: 00:16.5: enabled 0
636 15:04:16.831674 PCI: 00:17.0: enabled 1
637 15:04:16.835355 PCI: 00:19.0: enabled 0
638 15:04:16.838003 PCI: 00:19.1: enabled 1
639 15:04:16.838449 PCI: 00:19.2: enabled 0
640 15:04:16.841137 PCI: 00:1c.0: enabled 1
641 15:04:16.844676 PCI: 00:1c.1: enabled 0
642 15:04:16.848148 PCI: 00:1c.2: enabled 0
643 15:04:16.848690 PCI: 00:1c.3: enabled 0
644 15:04:16.851205 PCI: 00:1c.4: enabled 0
645 15:04:16.854610 PCI: 00:1c.5: enabled 0
646 15:04:16.858187 PCI: 00:1c.6: enabled 1
647 15:04:16.858722 PCI: 00:1c.7: enabled 0
648 15:04:16.861383 PCI: 00:1d.0: enabled 1
649 15:04:16.864600 PCI: 00:1d.1: enabled 0
650 15:04:16.867872 PCI: 00:1d.2: enabled 1
651 15:04:16.868362 PCI: 00:1d.3: enabled 0
652 15:04:16.871236 PCI: 00:1e.0: enabled 1
653 15:04:16.874321 PCI: 00:1e.1: enabled 0
654 15:04:16.874943 PCI: 00:1e.2: enabled 1
655 15:04:16.878431 PCI: 00:1e.3: enabled 1
656 15:04:16.881323 PCI: 00:1f.0: enabled 1
657 15:04:16.884251 PCI: 00:1f.1: enabled 0
658 15:04:16.884762 PCI: 00:1f.2: enabled 1
659 15:04:16.888084 PCI: 00:1f.3: enabled 1
660 15:04:16.891158 PCI: 00:1f.4: enabled 0
661 15:04:16.894569 PCI: 00:1f.5: enabled 1
662 15:04:16.895169 PCI: 00:1f.6: enabled 0
663 15:04:16.897608 PCI: 00:1f.7: enabled 0
664 15:04:16.901364 APIC: 00: enabled 1
665 15:04:16.904334 GENERIC: 0.0: enabled 1
666 15:04:16.904913 GENERIC: 0.0: enabled 1
667 15:04:16.907259 GENERIC: 1.0: enabled 1
668 15:04:16.910479 GENERIC: 0.0: enabled 1
669 15:04:16.911080 GENERIC: 1.0: enabled 1
670 15:04:16.913865 USB0 port 0: enabled 1
671 15:04:16.917562 GENERIC: 0.0: enabled 1
672 15:04:16.921000 USB0 port 0: enabled 1
673 15:04:16.921585 GENERIC: 0.0: enabled 1
674 15:04:16.924142 I2C: 00:1a: enabled 1
675 15:04:16.927665 I2C: 00:31: enabled 1
676 15:04:16.928306 I2C: 00:32: enabled 1
677 15:04:16.930249 I2C: 00:10: enabled 1
678 15:04:16.933672 I2C: 00:15: enabled 1
679 15:04:16.934219 GENERIC: 0.0: enabled 0
680 15:04:16.937318 GENERIC: 1.0: enabled 0
681 15:04:16.940764 GENERIC: 0.0: enabled 1
682 15:04:16.943805 SPI: 00: enabled 1
683 15:04:16.944298 SPI: 00: enabled 1
684 15:04:16.947176 PNP: 0c09.0: enabled 1
685 15:04:16.950432 GENERIC: 0.0: enabled 1
686 15:04:16.950926 USB3 port 0: enabled 1
687 15:04:16.953518 USB3 port 1: enabled 1
688 15:04:16.957048 USB3 port 2: enabled 0
689 15:04:16.957491 USB3 port 3: enabled 0
690 15:04:16.960256 USB2 port 0: enabled 0
691 15:04:16.963752 USB2 port 1: enabled 1
692 15:04:16.967064 USB2 port 2: enabled 1
693 15:04:16.967530 USB2 port 3: enabled 0
694 15:04:16.969955 USB2 port 4: enabled 1
695 15:04:16.973610 USB2 port 5: enabled 0
696 15:04:16.974053 USB2 port 6: enabled 0
697 15:04:16.977334 USB2 port 7: enabled 0
698 15:04:16.979995 USB2 port 8: enabled 0
699 15:04:16.983173 USB2 port 9: enabled 0
700 15:04:16.983764 USB3 port 0: enabled 0
701 15:04:16.986938 USB3 port 1: enabled 1
702 15:04:16.990244 USB3 port 2: enabled 0
703 15:04:16.990839 USB3 port 3: enabled 0
704 15:04:16.993121 GENERIC: 0.0: enabled 1
705 15:04:16.996502 GENERIC: 1.0: enabled 1
706 15:04:16.997070 APIC: 01: enabled 1
707 15:04:17.000069 APIC: 03: enabled 1
708 15:04:17.003248 APIC: 05: enabled 1
709 15:04:17.003945 APIC: 07: enabled 1
710 15:04:17.006417 APIC: 06: enabled 1
711 15:04:17.010035 APIC: 02: enabled 1
712 15:04:17.010481 APIC: 04: enabled 1
713 15:04:17.013536 Compare with tree...
714 15:04:17.016120 Root Device: enabled 1
715 15:04:17.016580 DOMAIN: 0000: enabled 1
716 15:04:17.019839 PCI: 00:00.0: enabled 1
717 15:04:17.023265 PCI: 00:02.0: enabled 1
718 15:04:17.026701 PCI: 00:04.0: enabled 1
719 15:04:17.029668 GENERIC: 0.0: enabled 1
720 15:04:17.030210 PCI: 00:05.0: enabled 1
721 15:04:17.032817 PCI: 00:06.0: enabled 0
722 15:04:17.036136 PCI: 00:07.0: enabled 0
723 15:04:17.039747 GENERIC: 0.0: enabled 1
724 15:04:17.043051 PCI: 00:07.1: enabled 0
725 15:04:17.043614 GENERIC: 1.0: enabled 1
726 15:04:17.046038 PCI: 00:07.2: enabled 0
727 15:04:17.049554 GENERIC: 0.0: enabled 1
728 15:04:17.052948 PCI: 00:07.3: enabled 0
729 15:04:17.056025 GENERIC: 1.0: enabled 1
730 15:04:17.059399 PCI: 00:08.0: enabled 1
731 15:04:17.059932 PCI: 00:09.0: enabled 0
732 15:04:17.062682 PCI: 00:0a.0: enabled 0
733 15:04:17.065652 PCI: 00:0d.0: enabled 1
734 15:04:17.069313 USB0 port 0: enabled 1
735 15:04:17.072142 USB3 port 0: enabled 1
736 15:04:17.072596 USB3 port 1: enabled 1
737 15:04:17.075375 USB3 port 2: enabled 0
738 15:04:17.078944 USB3 port 3: enabled 0
739 15:04:17.082533 PCI: 00:0d.1: enabled 0
740 15:04:17.086088 PCI: 00:0d.2: enabled 0
741 15:04:17.086651 GENERIC: 0.0: enabled 1
742 15:04:17.088560 PCI: 00:0d.3: enabled 0
743 15:04:17.092062 PCI: 00:0e.0: enabled 0
744 15:04:17.095783 PCI: 00:10.2: enabled 1
745 15:04:17.099399 PCI: 00:10.6: enabled 0
746 15:04:17.099997 PCI: 00:10.7: enabled 0
747 15:04:17.102138 PCI: 00:12.0: enabled 0
748 15:04:17.105468 PCI: 00:12.6: enabled 0
749 15:04:17.109068 PCI: 00:13.0: enabled 0
750 15:04:17.112197 PCI: 00:14.0: enabled 1
751 15:04:17.112694 USB0 port 0: enabled 1
752 15:04:17.114967 USB2 port 0: enabled 0
753 15:04:17.118240 USB2 port 1: enabled 1
754 15:04:17.121979 USB2 port 2: enabled 1
755 15:04:17.125365 USB2 port 3: enabled 0
756 15:04:17.128880 USB2 port 4: enabled 1
757 15:04:17.129434 USB2 port 5: enabled 0
758 15:04:17.131633 USB2 port 6: enabled 0
759 15:04:17.135139 USB2 port 7: enabled 0
760 15:04:17.138677 USB2 port 8: enabled 0
761 15:04:17.141453 USB2 port 9: enabled 0
762 15:04:17.144852 USB3 port 0: enabled 0
763 15:04:17.145304 USB3 port 1: enabled 1
764 15:04:17.148469 USB3 port 2: enabled 0
765 15:04:17.151404 USB3 port 3: enabled 0
766 15:04:17.155021 PCI: 00:14.1: enabled 0
767 15:04:17.157764 PCI: 00:14.2: enabled 1
768 15:04:17.158218 PCI: 00:14.3: enabled 1
769 15:04:17.161594 GENERIC: 0.0: enabled 1
770 15:04:17.164732 PCI: 00:15.0: enabled 1
771 15:04:17.167816 I2C: 00:1a: enabled 1
772 15:04:17.171178 I2C: 00:31: enabled 1
773 15:04:17.171638 I2C: 00:32: enabled 1
774 15:04:17.174792 PCI: 00:15.1: enabled 1
775 15:04:17.178163 I2C: 00:10: enabled 1
776 15:04:17.181428 PCI: 00:15.2: enabled 1
777 15:04:17.184862 PCI: 00:15.3: enabled 1
778 15:04:17.185337 PCI: 00:16.0: enabled 1
779 15:04:17.187822 PCI: 00:16.1: enabled 0
780 15:04:17.191431 PCI: 00:16.2: enabled 0
781 15:04:17.194779 PCI: 00:16.3: enabled 0
782 15:04:17.197895 PCI: 00:16.4: enabled 0
783 15:04:17.198506 PCI: 00:16.5: enabled 0
784 15:04:17.201044 PCI: 00:17.0: enabled 1
785 15:04:17.204184 PCI: 00:19.0: enabled 0
786 15:04:17.207548 PCI: 00:19.1: enabled 1
787 15:04:17.208220 I2C: 00:15: enabled 1
788 15:04:17.210911 PCI: 00:19.2: enabled 0
789 15:04:17.214447 PCI: 00:1d.0: enabled 1
790 15:04:17.217647 GENERIC: 0.0: enabled 1
791 15:04:17.220695 PCI: 00:1e.0: enabled 1
792 15:04:17.224212 PCI: 00:1e.1: enabled 0
793 15:04:17.224799 PCI: 00:1e.2: enabled 1
794 15:04:17.227646 SPI: 00: enabled 1
795 15:04:17.230577 PCI: 00:1e.3: enabled 1
796 15:04:17.231189 SPI: 00: enabled 1
797 15:04:17.234142 PCI: 00:1f.0: enabled 1
798 15:04:17.237369 PNP: 0c09.0: enabled 1
799 15:04:17.240746 PCI: 00:1f.1: enabled 0
800 15:04:17.244096 PCI: 00:1f.2: enabled 1
801 15:04:17.244685 GENERIC: 0.0: enabled 1
802 15:04:17.247299 GENERIC: 0.0: enabled 1
803 15:04:17.250381 GENERIC: 1.0: enabled 1
804 15:04:17.253831 PCI: 00:1f.3: enabled 1
805 15:04:17.256680 PCI: 00:1f.4: enabled 0
806 15:04:17.308803 PCI: 00:1f.5: enabled 1
807 15:04:17.309388 PCI: 00:1f.6: enabled 0
808 15:04:17.309781 PCI: 00:1f.7: enabled 0
809 15:04:17.310142 CPU_CLUSTER: 0: enabled 1
810 15:04:17.310491 APIC: 00: enabled 1
811 15:04:17.311351 APIC: 01: enabled 1
812 15:04:17.311803 APIC: 03: enabled 1
813 15:04:17.312222 APIC: 05: enabled 1
814 15:04:17.312576 APIC: 07: enabled 1
815 15:04:17.312926 APIC: 06: enabled 1
816 15:04:17.313259 APIC: 02: enabled 1
817 15:04:17.313583 APIC: 04: enabled 1
818 15:04:17.313904 Root Device scanning...
819 15:04:17.314227 scan_static_bus for Root Device
820 15:04:17.314547 DOMAIN: 0000 enabled
821 15:04:17.314864 CPU_CLUSTER: 0 enabled
822 15:04:17.315230 DOMAIN: 0000 scanning...
823 15:04:17.315555 PCI: pci_scan_bus for bus 00
824 15:04:17.315913 PCI: 00:00.0 [8086/0000] ops
825 15:04:17.316255 PCI: 00:00.0 [8086/9a12] enabled
826 15:04:17.359363 PCI: 00:02.0 [8086/0000] bus ops
827 15:04:17.360085 PCI: 00:02.0 [8086/9a40] enabled
828 15:04:17.360510 PCI: 00:04.0 [8086/0000] bus ops
829 15:04:17.360918 PCI: 00:04.0 [8086/9a03] enabled
830 15:04:17.361649 PCI: 00:05.0 [8086/9a19] enabled
831 15:04:17.362029 PCI: 00:07.0 [0000/0000] hidden
832 15:04:17.362379 PCI: 00:08.0 [8086/9a11] enabled
833 15:04:17.362718 PCI: 00:0a.0 [8086/9a0d] disabled
834 15:04:17.363047 PCI: 00:0d.0 [8086/0000] bus ops
835 15:04:17.363375 PCI: 00:0d.0 [8086/9a13] enabled
836 15:04:17.363728 PCI: 00:14.0 [8086/0000] bus ops
837 15:04:17.364067 PCI: 00:14.0 [8086/a0ed] enabled
838 15:04:17.364389 PCI: 00:14.2 [8086/a0ef] enabled
839 15:04:17.364708 PCI: 00:14.3 [8086/0000] bus ops
840 15:04:17.365030 PCI: 00:14.3 [8086/a0f0] enabled
841 15:04:17.367977 PCI: 00:15.0 [8086/0000] bus ops
842 15:04:17.368478 PCI: 00:15.0 [8086/a0e8] enabled
843 15:04:17.371422 PCI: 00:15.1 [8086/0000] bus ops
844 15:04:17.371949 PCI: 00:15.1 [8086/a0e9] enabled
845 15:04:17.374909 PCI: 00:15.2 [8086/0000] bus ops
846 15:04:17.378649 PCI: 00:15.2 [8086/a0ea] enabled
847 15:04:17.381685 PCI: 00:15.3 [8086/0000] bus ops
848 15:04:17.385101 PCI: 00:15.3 [8086/a0eb] enabled
849 15:04:17.387963 PCI: 00:16.0 [8086/0000] ops
850 15:04:17.391400 PCI: 00:16.0 [8086/a0e0] enabled
851 15:04:17.397964 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 15:04:17.401316 PCI: 00:19.0 [8086/0000] bus ops
853 15:04:17.405020 PCI: 00:19.0 [8086/a0c5] disabled
854 15:04:17.407930 PCI: 00:19.1 [8086/0000] bus ops
855 15:04:17.411405 PCI: 00:19.1 [8086/a0c6] enabled
856 15:04:17.414731 PCI: 00:1d.0 [8086/0000] bus ops
857 15:04:17.417708 PCI: 00:1d.0 [8086/a0b0] enabled
858 15:04:17.421073 PCI: 00:1e.0 [8086/0000] ops
859 15:04:17.424395 PCI: 00:1e.0 [8086/a0a8] enabled
860 15:04:17.428051 PCI: 00:1e.2 [8086/0000] bus ops
861 15:04:17.430996 PCI: 00:1e.2 [8086/a0aa] enabled
862 15:04:17.434267 PCI: 00:1e.3 [8086/0000] bus ops
863 15:04:17.437477 PCI: 00:1e.3 [8086/a0ab] enabled
864 15:04:17.441162 PCI: 00:1f.0 [8086/0000] bus ops
865 15:04:17.444580 PCI: 00:1f.0 [8086/a087] enabled
866 15:04:17.445176 RTC Init
867 15:04:17.448604 Set power on after power failure.
868 15:04:17.450290 Disabling Deep S3
869 15:04:17.454045 Disabling Deep S3
870 15:04:17.454532 Disabling Deep S4
871 15:04:17.457534 Disabling Deep S4
872 15:04:17.458022 Disabling Deep S5
873 15:04:17.460458 Disabling Deep S5
874 15:04:17.464187 PCI: 00:1f.2 [0000/0000] hidden
875 15:04:17.467542 PCI: 00:1f.3 [8086/0000] bus ops
876 15:04:17.470427 PCI: 00:1f.3 [8086/a0c8] enabled
877 15:04:17.473458 PCI: 00:1f.5 [8086/0000] bus ops
878 15:04:17.477309 PCI: 00:1f.5 [8086/a0a4] enabled
879 15:04:17.480586 PCI: Leftover static devices:
880 15:04:17.481183 PCI: 00:10.2
881 15:04:17.483903 PCI: 00:10.6
882 15:04:17.484391 PCI: 00:10.7
883 15:04:17.484775 PCI: 00:06.0
884 15:04:17.487114 PCI: 00:07.1
885 15:04:17.487600 PCI: 00:07.2
886 15:04:17.490321 PCI: 00:07.3
887 15:04:17.490909 PCI: 00:09.0
888 15:04:17.491303 PCI: 00:0d.1
889 15:04:17.493814 PCI: 00:0d.2
890 15:04:17.494408 PCI: 00:0d.3
891 15:04:17.496667 PCI: 00:0e.0
892 15:04:17.497151 PCI: 00:12.0
893 15:04:17.500365 PCI: 00:12.6
894 15:04:17.500959 PCI: 00:13.0
895 15:04:17.501377 PCI: 00:14.1
896 15:04:17.504036 PCI: 00:16.1
897 15:04:17.504646 PCI: 00:16.2
898 15:04:17.506728 PCI: 00:16.3
899 15:04:17.507298 PCI: 00:16.4
900 15:04:17.507684 PCI: 00:16.5
901 15:04:17.510295 PCI: 00:17.0
902 15:04:17.510889 PCI: 00:19.2
903 15:04:17.513649 PCI: 00:1e.1
904 15:04:17.514142 PCI: 00:1f.1
905 15:04:17.514530 PCI: 00:1f.4
906 15:04:17.516740 PCI: 00:1f.6
907 15:04:17.517227 PCI: 00:1f.7
908 15:04:17.519993 PCI: Check your devicetree.cb.
909 15:04:17.523366 PCI: 00:02.0 scanning...
910 15:04:17.527068 scan_generic_bus for PCI: 00:02.0
911 15:04:17.529876 scan_generic_bus for PCI: 00:02.0 done
912 15:04:17.536558 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 15:04:17.540070 PCI: 00:04.0 scanning...
914 15:04:17.543313 scan_generic_bus for PCI: 00:04.0
915 15:04:17.543934 GENERIC: 0.0 enabled
916 15:04:17.549328 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 15:04:17.556171 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 15:04:17.556696 PCI: 00:0d.0 scanning...
919 15:04:17.559642 scan_static_bus for PCI: 00:0d.0
920 15:04:17.562559 USB0 port 0 enabled
921 15:04:17.566260 USB0 port 0 scanning...
922 15:04:17.569425 scan_static_bus for USB0 port 0
923 15:04:17.569922 USB3 port 0 enabled
924 15:04:17.572833 USB3 port 1 enabled
925 15:04:17.575966 USB3 port 2 disabled
926 15:04:17.576601 USB3 port 3 disabled
927 15:04:17.579556 USB3 port 0 scanning...
928 15:04:17.582765 scan_static_bus for USB3 port 0
929 15:04:17.585877 scan_static_bus for USB3 port 0 done
930 15:04:17.592876 scan_bus: bus USB3 port 0 finished in 6 msecs
931 15:04:17.593565 USB3 port 1 scanning...
932 15:04:17.595929 scan_static_bus for USB3 port 1
933 15:04:17.602740 scan_static_bus for USB3 port 1 done
934 15:04:17.606360 scan_bus: bus USB3 port 1 finished in 6 msecs
935 15:04:17.609554 scan_static_bus for USB0 port 0 done
936 15:04:17.615680 scan_bus: bus USB0 port 0 finished in 43 msecs
937 15:04:17.619016 scan_static_bus for PCI: 00:0d.0 done
938 15:04:17.622139 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 15:04:17.625760 PCI: 00:14.0 scanning...
940 15:04:17.629360 scan_static_bus for PCI: 00:14.0
941 15:04:17.632163 USB0 port 0 enabled
942 15:04:17.632766 USB0 port 0 scanning...
943 15:04:17.635676 scan_static_bus for USB0 port 0
944 15:04:17.638945 USB2 port 0 disabled
945 15:04:17.642403 USB2 port 1 enabled
946 15:04:17.642901 USB2 port 2 enabled
947 15:04:17.645114 USB2 port 3 disabled
948 15:04:17.648838 USB2 port 4 enabled
949 15:04:17.649333 USB2 port 5 disabled
950 15:04:17.652118 USB2 port 6 disabled
951 15:04:17.652780 USB2 port 7 disabled
952 15:04:17.655492 USB2 port 8 disabled
953 15:04:17.658815 USB2 port 9 disabled
954 15:04:17.659310 USB3 port 0 disabled
955 15:04:17.661516 USB3 port 1 enabled
956 15:04:17.665075 USB3 port 2 disabled
957 15:04:17.665631 USB3 port 3 disabled
958 15:04:17.668359 USB2 port 1 scanning...
959 15:04:17.672578 scan_static_bus for USB2 port 1
960 15:04:17.675086 scan_static_bus for USB2 port 1 done
961 15:04:17.681441 scan_bus: bus USB2 port 1 finished in 6 msecs
962 15:04:17.681978 USB2 port 2 scanning...
963 15:04:17.685060 scan_static_bus for USB2 port 2
964 15:04:17.691818 scan_static_bus for USB2 port 2 done
965 15:04:17.694908 scan_bus: bus USB2 port 2 finished in 6 msecs
966 15:04:17.698009 USB2 port 4 scanning...
967 15:04:17.701447 scan_static_bus for USB2 port 4
968 15:04:17.704862 scan_static_bus for USB2 port 4 done
969 15:04:17.708320 scan_bus: bus USB2 port 4 finished in 6 msecs
970 15:04:17.711257 USB3 port 1 scanning...
971 15:04:17.714558 scan_static_bus for USB3 port 1
972 15:04:17.717917 scan_static_bus for USB3 port 1 done
973 15:04:17.724178 scan_bus: bus USB3 port 1 finished in 6 msecs
974 15:04:17.728294 scan_static_bus for USB0 port 0 done
975 15:04:17.731111 scan_bus: bus USB0 port 0 finished in 93 msecs
976 15:04:17.734864 scan_static_bus for PCI: 00:14.0 done
977 15:04:17.741222 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
978 15:04:17.744605 PCI: 00:14.3 scanning...
979 15:04:17.748025 scan_static_bus for PCI: 00:14.3
980 15:04:17.748477 GENERIC: 0.0 enabled
981 15:04:17.751105 scan_static_bus for PCI: 00:14.3 done
982 15:04:17.757425 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 15:04:17.760964 PCI: 00:15.0 scanning...
984 15:04:17.763797 scan_static_bus for PCI: 00:15.0
985 15:04:17.764249 I2C: 00:1a enabled
986 15:04:17.767379 I2C: 00:31 enabled
987 15:04:17.767985 I2C: 00:32 enabled
988 15:04:17.773747 scan_static_bus for PCI: 00:15.0 done
989 15:04:17.777101 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 15:04:17.780530 PCI: 00:15.1 scanning...
991 15:04:17.783872 scan_static_bus for PCI: 00:15.1
992 15:04:17.784329 I2C: 00:10 enabled
993 15:04:17.790669 scan_static_bus for PCI: 00:15.1 done
994 15:04:17.794140 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 15:04:17.797354 PCI: 00:15.2 scanning...
996 15:04:17.800238 scan_static_bus for PCI: 00:15.2
997 15:04:17.803948 scan_static_bus for PCI: 00:15.2 done
998 15:04:17.807583 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 15:04:17.810626 PCI: 00:15.3 scanning...
1000 15:04:17.813401 scan_static_bus for PCI: 00:15.3
1001 15:04:17.816941 scan_static_bus for PCI: 00:15.3 done
1002 15:04:17.823740 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 15:04:17.826900 PCI: 00:19.1 scanning...
1004 15:04:17.830485 scan_static_bus for PCI: 00:19.1
1005 15:04:17.831106 I2C: 00:15 enabled
1006 15:04:17.833135 scan_static_bus for PCI: 00:19.1 done
1007 15:04:17.840270 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 15:04:17.843296 PCI: 00:1d.0 scanning...
1009 15:04:17.847276 do_pci_scan_bridge for PCI: 00:1d.0
1010 15:04:17.850020 PCI: pci_scan_bus for bus 01
1011 15:04:17.853509 PCI: 01:00.0 [15b7/5009] enabled
1012 15:04:17.854124 GENERIC: 0.0 enabled
1013 15:04:17.859362 Enabling Common Clock Configuration
1014 15:04:17.863420 L1 Sub-State supported from root port 29
1015 15:04:17.866427 L1 Sub-State Support = 0x5
1016 15:04:17.869701 CommonModeRestoreTime = 0x28
1017 15:04:17.873432 Power On Value = 0x16, Power On Scale = 0x0
1018 15:04:17.874067 ASPM: Enabled L1
1019 15:04:17.879537 PCIe: Max_Payload_Size adjusted to 128
1020 15:04:17.882901 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 15:04:17.886071 PCI: 00:1e.2 scanning...
1022 15:04:17.889301 scan_generic_bus for PCI: 00:1e.2
1023 15:04:17.889788 SPI: 00 enabled
1024 15:04:17.896017 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 15:04:17.902412 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 15:04:17.906462 PCI: 00:1e.3 scanning...
1027 15:04:17.910154 scan_generic_bus for PCI: 00:1e.3
1028 15:04:17.910743 SPI: 00 enabled
1029 15:04:17.916795 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 15:04:17.920154 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 15:04:17.923932 PCI: 00:1f.0 scanning...
1032 15:04:17.927242 scan_static_bus for PCI: 00:1f.0
1033 15:04:17.930386 PNP: 0c09.0 enabled
1034 15:04:17.930983 PNP: 0c09.0 scanning...
1035 15:04:17.933074 scan_static_bus for PNP: 0c09.0
1036 15:04:17.936404 scan_static_bus for PNP: 0c09.0 done
1037 15:04:17.943554 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 15:04:17.946546 scan_static_bus for PCI: 00:1f.0 done
1039 15:04:17.950197 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 15:04:17.953130 PCI: 00:1f.2 scanning...
1041 15:04:17.956375 scan_static_bus for PCI: 00:1f.2
1042 15:04:17.960203 GENERIC: 0.0 enabled
1043 15:04:17.963363 GENERIC: 0.0 scanning...
1044 15:04:17.966481 scan_static_bus for GENERIC: 0.0
1045 15:04:17.966982 GENERIC: 0.0 enabled
1046 15:04:17.969919 GENERIC: 1.0 enabled
1047 15:04:17.973010 scan_static_bus for GENERIC: 0.0 done
1048 15:04:17.979870 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 15:04:17.982662 scan_static_bus for PCI: 00:1f.2 done
1050 15:04:17.985955 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 15:04:17.989498 PCI: 00:1f.3 scanning...
1052 15:04:17.992677 scan_static_bus for PCI: 00:1f.3
1053 15:04:17.996039 scan_static_bus for PCI: 00:1f.3 done
1054 15:04:18.002802 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 15:04:18.003403 PCI: 00:1f.5 scanning...
1056 15:04:18.009678 scan_generic_bus for PCI: 00:1f.5
1057 15:04:18.013168 scan_generic_bus for PCI: 00:1f.5 done
1058 15:04:18.016432 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 15:04:18.023371 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1060 15:04:18.025911 scan_static_bus for Root Device done
1061 15:04:18.029561 scan_bus: bus Root Device finished in 735 msecs
1062 15:04:18.030148 done
1063 15:04:18.036349 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1064 15:04:18.039353 Chrome EC: UHEPI supported
1065 15:04:18.046462 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 15:04:18.052629 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 15:04:18.055969 SPI flash protection: WPSW=0 SRP0=1
1068 15:04:18.062405 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 15:04:18.065803 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 15:04:18.068842 found VGA at PCI: 00:02.0
1071 15:04:18.072352 Setting up VGA for PCI: 00:02.0
1072 15:04:18.079460 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 15:04:18.082756 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 15:04:18.085662 Allocating resources...
1075 15:04:18.088889 Reading resources...
1076 15:04:18.092400 Root Device read_resources bus 0 link: 0
1077 15:04:18.095761 DOMAIN: 0000 read_resources bus 0 link: 0
1078 15:04:18.102148 PCI: 00:04.0 read_resources bus 1 link: 0
1079 15:04:18.105701 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 15:04:18.112180 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 15:04:18.115355 USB0 port 0 read_resources bus 0 link: 0
1082 15:04:18.122108 USB0 port 0 read_resources bus 0 link: 0 done
1083 15:04:18.126010 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 15:04:18.131944 PCI: 00:14.0 read_resources bus 0 link: 0
1085 15:04:18.135487 USB0 port 0 read_resources bus 0 link: 0
1086 15:04:18.141418 USB0 port 0 read_resources bus 0 link: 0 done
1087 15:04:18.145051 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 15:04:18.151966 PCI: 00:14.3 read_resources bus 0 link: 0
1089 15:04:18.155178 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 15:04:18.161529 PCI: 00:15.0 read_resources bus 0 link: 0
1091 15:04:18.164713 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 15:04:18.171634 PCI: 00:15.1 read_resources bus 0 link: 0
1093 15:04:18.174920 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 15:04:18.182098 PCI: 00:19.1 read_resources bus 0 link: 0
1095 15:04:18.184764 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 15:04:18.191724 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 15:04:18.194346 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 15:04:18.200919 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 15:04:18.204568 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 15:04:18.211273 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 15:04:18.214782 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 15:04:18.220869 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 15:04:18.224407 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 15:04:18.231107 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 15:04:18.234271 GENERIC: 0.0 read_resources bus 0 link: 0
1106 15:04:18.241185 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 15:04:18.244071 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 15:04:18.251136 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 15:04:18.254226 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 15:04:18.260146 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 15:04:18.264055 Root Device read_resources bus 0 link: 0 done
1112 15:04:18.266999 Done reading resources.
1113 15:04:18.273465 Show resources in subtree (Root Device)...After reading.
1114 15:04:18.276736 Root Device child on link 0 DOMAIN: 0000
1115 15:04:18.280343 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 15:04:18.290093 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 15:04:18.300602 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 15:04:18.303618 PCI: 00:00.0
1119 15:04:18.310417 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 15:04:18.320123 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 15:04:18.330252 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 15:04:18.339860 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 15:04:18.349569 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 15:04:18.359285 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 15:04:18.366283 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 15:04:18.376030 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 15:04:18.386376 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 15:04:18.395875 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 15:04:18.406216 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 15:04:18.415632 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 15:04:18.421996 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 15:04:18.432078 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 15:04:18.442134 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 15:04:18.452155 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 15:04:18.462017 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 15:04:18.472274 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 15:04:18.481628 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 15:04:18.491612 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 15:04:18.492221 PCI: 00:02.0
1140 15:04:18.501668 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 15:04:18.511942 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 15:04:18.521186 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 15:04:18.524394 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 15:04:18.534397 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 15:04:18.537814 GENERIC: 0.0
1146 15:04:18.538311 PCI: 00:05.0
1147 15:04:18.548123 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 15:04:18.554574 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 15:04:18.555163 GENERIC: 0.0
1150 15:04:18.557750 PCI: 00:08.0
1151 15:04:18.568205 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 15:04:18.568801 PCI: 00:0a.0
1153 15:04:18.574294 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 15:04:18.584345 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 15:04:18.586872 USB0 port 0 child on link 0 USB3 port 0
1156 15:04:18.590270 USB3 port 0
1157 15:04:18.590754 USB3 port 1
1158 15:04:18.593822 USB3 port 2
1159 15:04:18.594419 USB3 port 3
1160 15:04:18.600477 PCI: 00:14.0 child on link 0 USB0 port 0
1161 15:04:18.610361 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 15:04:18.613510 USB0 port 0 child on link 0 USB2 port 0
1163 15:04:18.614002 USB2 port 0
1164 15:04:18.616747 USB2 port 1
1165 15:04:18.620236 USB2 port 2
1166 15:04:18.620725 USB2 port 3
1167 15:04:18.623411 USB2 port 4
1168 15:04:18.623927 USB2 port 5
1169 15:04:18.626822 USB2 port 6
1170 15:04:18.627412 USB2 port 7
1171 15:04:18.629751 USB2 port 8
1172 15:04:18.630239 USB2 port 9
1173 15:04:18.632854 USB3 port 0
1174 15:04:18.633342 USB3 port 1
1175 15:04:18.636786 USB3 port 2
1176 15:04:18.637226 USB3 port 3
1177 15:04:18.639983 PCI: 00:14.2
1178 15:04:18.649701 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 15:04:18.659578 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 15:04:18.662827 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 15:04:18.672933 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 15:04:18.676222 GENERIC: 0.0
1183 15:04:18.679666 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 15:04:18.689311 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 15:04:18.692727 I2C: 00:1a
1186 15:04:18.693315 I2C: 00:31
1187 15:04:18.695595 I2C: 00:32
1188 15:04:18.699186 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 15:04:18.709223 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 15:04:18.709819 I2C: 00:10
1191 15:04:18.712569 PCI: 00:15.2
1192 15:04:18.722292 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 15:04:18.722875 PCI: 00:15.3
1194 15:04:18.732255 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 15:04:18.735438 PCI: 00:16.0
1196 15:04:18.745542 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 15:04:18.746151 PCI: 00:19.0
1198 15:04:18.752148 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 15:04:18.761783 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 15:04:18.762362 I2C: 00:15
1201 15:04:18.768578 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 15:04:18.775126 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 15:04:18.785310 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 15:04:18.795355 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 15:04:18.798469 GENERIC: 0.0
1206 15:04:18.799051 PCI: 01:00.0
1207 15:04:18.807883 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 15:04:18.817936 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1209 15:04:18.821176 PCI: 00:1e.0
1210 15:04:18.831205 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1211 15:04:18.834667 PCI: 00:1e.2 child on link 0 SPI: 00
1212 15:04:18.844289 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 15:04:18.847620 SPI: 00
1214 15:04:18.851718 PCI: 00:1e.3 child on link 0 SPI: 00
1215 15:04:18.860548 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 15:04:18.861135 SPI: 00
1217 15:04:18.867390 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1218 15:04:18.874378 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1219 15:04:18.877286 PNP: 0c09.0
1220 15:04:18.884047 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1221 15:04:18.890899 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1222 15:04:18.900462 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1223 15:04:18.907073 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1224 15:04:18.913688 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1225 15:04:18.914380 GENERIC: 0.0
1226 15:04:18.916828 GENERIC: 1.0
1227 15:04:18.917326 PCI: 00:1f.3
1228 15:04:18.926897 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 15:04:18.936678 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1230 15:04:18.940235 PCI: 00:1f.5
1231 15:04:18.950148 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 15:04:18.953597 CPU_CLUSTER: 0 child on link 0 APIC: 00
1233 15:04:18.954094 APIC: 00
1234 15:04:18.956398 APIC: 01
1235 15:04:18.956996 APIC: 03
1236 15:04:18.959641 APIC: 05
1237 15:04:18.960164 APIC: 07
1238 15:04:18.960578 APIC: 06
1239 15:04:18.963019 APIC: 02
1240 15:04:18.963512 APIC: 04
1241 15:04:18.969509 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1242 15:04:18.976288 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1243 15:04:18.983130 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1244 15:04:18.989446 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1245 15:04:18.993152 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1246 15:04:18.996260 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1247 15:04:19.006019 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1248 15:04:19.012594 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1249 15:04:19.019005 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1250 15:04:19.025521 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1251 15:04:19.032237 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1252 15:04:19.042305 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1253 15:04:19.048729 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1254 15:04:19.055869 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1255 15:04:19.058734 DOMAIN: 0000: Resource ranges:
1256 15:04:19.062204 * Base: 1000, Size: 800, Tag: 100
1257 15:04:19.064980 * Base: 1900, Size: e700, Tag: 100
1258 15:04:19.072267 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1259 15:04:19.078777 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1260 15:04:19.085252 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1261 15:04:19.091762 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1262 15:04:19.102140 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1263 15:04:19.108462 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1264 15:04:19.114698 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1265 15:04:19.124647 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1266 15:04:19.131220 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1267 15:04:19.137779 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1268 15:04:19.147967 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1269 15:04:19.154342 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1270 15:04:19.160649 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1271 15:04:19.171221 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1272 15:04:19.177535 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1273 15:04:19.184008 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1274 15:04:19.194095 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1275 15:04:19.200357 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1276 15:04:19.207208 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1277 15:04:19.217110 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1278 15:04:19.223671 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1279 15:04:19.230675 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1280 15:04:19.239876 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1281 15:04:19.246760 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1282 15:04:19.253345 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1283 15:04:19.256938 DOMAIN: 0000: Resource ranges:
1284 15:04:19.263285 * Base: 7fc00000, Size: 40400000, Tag: 200
1285 15:04:19.266776 * Base: d0000000, Size: 28000000, Tag: 200
1286 15:04:19.269948 * Base: fa000000, Size: 1000000, Tag: 200
1287 15:04:19.276398 * Base: fb001000, Size: 2fff000, Tag: 200
1288 15:04:19.279674 * Base: fe010000, Size: 2e000, Tag: 200
1289 15:04:19.283394 * Base: fe03f000, Size: d41000, Tag: 200
1290 15:04:19.286894 * Base: fed88000, Size: 8000, Tag: 200
1291 15:04:19.293036 * Base: fed93000, Size: d000, Tag: 200
1292 15:04:19.296496 * Base: feda2000, Size: 1e000, Tag: 200
1293 15:04:19.300060 * Base: fede0000, Size: 1220000, Tag: 200
1294 15:04:19.306349 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1295 15:04:19.313296 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1296 15:04:19.319820 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1297 15:04:19.326092 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1298 15:04:19.332620 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1299 15:04:19.338911 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1300 15:04:19.346352 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1301 15:04:19.352265 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1302 15:04:19.358882 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1303 15:04:19.365375 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1304 15:04:19.372019 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1305 15:04:19.378783 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1306 15:04:19.385603 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1307 15:04:19.392212 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1308 15:04:19.398762 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1309 15:04:19.405375 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1310 15:04:19.412122 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1311 15:04:19.418585 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1312 15:04:19.425135 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1313 15:04:19.431639 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1314 15:04:19.438797 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1315 15:04:19.444585 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1316 15:04:19.451348 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1317 15:04:19.458161 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1318 15:04:19.467866 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1319 15:04:19.468373 PCI: 00:1d.0: Resource ranges:
1320 15:04:19.474678 * Base: 7fc00000, Size: 100000, Tag: 200
1321 15:04:19.481574 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1322 15:04:19.487829 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1323 15:04:19.494383 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 15:04:19.504421 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 15:04:19.508170 Root Device assign_resources, bus 0 link: 0
1326 15:04:19.511398 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 15:04:19.520725 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 15:04:19.527474 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 15:04:19.537847 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 15:04:19.543813 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 15:04:19.551047 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 15:04:19.553633 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 15:04:19.560371 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 15:04:19.570369 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 15:04:19.576970 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 15:04:19.583424 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 15:04:19.586948 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 15:04:19.597089 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 15:04:19.600169 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 15:04:19.606291 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 15:04:19.613376 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 15:04:19.620028 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 15:04:19.629609 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 15:04:19.632933 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 15:04:19.640101 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 15:04:19.646311 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 15:04:19.652747 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 15:04:19.655891 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 15:04:19.665874 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 15:04:19.669122 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 15:04:19.672364 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 15:04:19.682875 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 15:04:19.688948 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 15:04:19.698898 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 15:04:19.705395 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 15:04:19.712129 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 15:04:19.715952 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 15:04:19.724897 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 15:04:19.734837 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 15:04:19.741748 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 15:04:19.748470 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 15:04:19.755141 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 15:04:19.765039 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1364 15:04:19.768133 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 15:04:19.777827 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1366 15:04:19.781565 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1367 15:04:19.785029 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 15:04:19.794411 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1369 15:04:19.798148 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1370 15:04:19.804328 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 15:04:19.807565 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1372 15:04:19.814395 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 15:04:19.817139 LPC: Trying to open IO window from 800 size 1ff
1374 15:04:19.827249 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1375 15:04:19.833793 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1376 15:04:19.843997 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1377 15:04:19.847373 DOMAIN: 0000 assign_resources, bus 0 link: 0
1378 15:04:19.850293 Root Device assign_resources, bus 0 link: 0
1379 15:04:19.853453 Done setting resources.
1380 15:04:19.860658 Show resources in subtree (Root Device)...After assigning values.
1381 15:04:19.863880 Root Device child on link 0 DOMAIN: 0000
1382 15:04:19.870179 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1383 15:04:19.877082 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1384 15:04:19.886949 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1385 15:04:19.889673 PCI: 00:00.0
1386 15:04:19.899825 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1387 15:04:19.909793 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1388 15:04:19.919533 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1389 15:04:19.926207 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1390 15:04:19.936295 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1391 15:04:19.946057 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1392 15:04:19.956290 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1393 15:04:19.965580 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1394 15:04:19.976231 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1395 15:04:19.982852 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1396 15:04:19.992680 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1397 15:04:20.002637 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1398 15:04:20.012219 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1399 15:04:20.022126 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1400 15:04:20.028608 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1401 15:04:20.038447 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1402 15:04:20.048251 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1403 15:04:20.058357 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1404 15:04:20.068189 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1405 15:04:20.078309 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1406 15:04:20.081218 PCI: 00:02.0
1407 15:04:20.091334 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1408 15:04:20.101466 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1409 15:04:20.110889 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1410 15:04:20.114653 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1411 15:04:20.124965 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1412 15:04:20.127518 GENERIC: 0.0
1413 15:04:20.128066 PCI: 00:05.0
1414 15:04:20.141111 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1415 15:04:20.144431 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1416 15:04:20.144929 GENERIC: 0.0
1417 15:04:20.147443 PCI: 00:08.0
1418 15:04:20.157283 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1419 15:04:20.160940 PCI: 00:0a.0
1420 15:04:20.163723 PCI: 00:0d.0 child on link 0 USB0 port 0
1421 15:04:20.174095 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1422 15:04:20.176962 USB0 port 0 child on link 0 USB3 port 0
1423 15:04:20.180627 USB3 port 0
1424 15:04:20.183833 USB3 port 1
1425 15:04:20.184432 USB3 port 2
1426 15:04:20.187095 USB3 port 3
1427 15:04:20.190443 PCI: 00:14.0 child on link 0 USB0 port 0
1428 15:04:20.200317 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1429 15:04:20.203855 USB0 port 0 child on link 0 USB2 port 0
1430 15:04:20.206580 USB2 port 0
1431 15:04:20.209930 USB2 port 1
1432 15:04:20.210528 USB2 port 2
1433 15:04:20.213193 USB2 port 3
1434 15:04:20.213689 USB2 port 4
1435 15:04:20.216810 USB2 port 5
1436 15:04:20.217307 USB2 port 6
1437 15:04:20.219969 USB2 port 7
1438 15:04:20.220465 USB2 port 8
1439 15:04:20.223587 USB2 port 9
1440 15:04:20.224219 USB3 port 0
1441 15:04:20.226806 USB3 port 1
1442 15:04:20.227418 USB3 port 2
1443 15:04:20.229393 USB3 port 3
1444 15:04:20.229887 PCI: 00:14.2
1445 15:04:20.243279 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1446 15:04:20.253206 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1447 15:04:20.256133 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1448 15:04:20.266057 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1449 15:04:20.269479 GENERIC: 0.0
1450 15:04:20.272576 PCI: 00:15.0 child on link 0 I2C: 00:1a
1451 15:04:20.282469 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1452 15:04:20.285782 I2C: 00:1a
1453 15:04:20.286367 I2C: 00:31
1454 15:04:20.289117 I2C: 00:32
1455 15:04:20.292480 PCI: 00:15.1 child on link 0 I2C: 00:10
1456 15:04:20.302426 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1457 15:04:20.305324 I2C: 00:10
1458 15:04:20.305915 PCI: 00:15.2
1459 15:04:20.315352 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1460 15:04:20.318419 PCI: 00:15.3
1461 15:04:20.328435 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1462 15:04:20.329031 PCI: 00:16.0
1463 15:04:20.338824 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1464 15:04:20.341842 PCI: 00:19.0
1465 15:04:20.345216 PCI: 00:19.1 child on link 0 I2C: 00:15
1466 15:04:20.355160 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1467 15:04:20.358560 I2C: 00:15
1468 15:04:20.361885 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1469 15:04:20.371442 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1470 15:04:20.384664 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1471 15:04:20.395152 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1472 15:04:20.395789 GENERIC: 0.0
1473 15:04:20.398136 PCI: 01:00.0
1474 15:04:20.407862 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1475 15:04:20.417627 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1476 15:04:20.421181 PCI: 00:1e.0
1477 15:04:20.430820 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1478 15:04:20.434378 PCI: 00:1e.2 child on link 0 SPI: 00
1479 15:04:20.444342 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1480 15:04:20.447294 SPI: 00
1481 15:04:20.451206 PCI: 00:1e.3 child on link 0 SPI: 00
1482 15:04:20.461070 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1483 15:04:20.461678 SPI: 00
1484 15:04:20.467297 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1485 15:04:20.473817 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1486 15:04:20.477411 PNP: 0c09.0
1487 15:04:20.486719 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1488 15:04:20.490480 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1489 15:04:20.500152 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1490 15:04:20.510580 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1491 15:04:20.513121 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1492 15:04:20.517010 GENERIC: 0.0
1493 15:04:20.517601 GENERIC: 1.0
1494 15:04:20.519752 PCI: 00:1f.3
1495 15:04:20.529972 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1496 15:04:20.540149 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1497 15:04:20.540758 PCI: 00:1f.5
1498 15:04:20.553127 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1499 15:04:20.556169 CPU_CLUSTER: 0 child on link 0 APIC: 00
1500 15:04:20.556767 APIC: 00
1501 15:04:20.559635 APIC: 01
1502 15:04:20.560256 APIC: 03
1503 15:04:20.560691 APIC: 05
1504 15:04:20.562809 APIC: 07
1505 15:04:20.563304 APIC: 06
1506 15:04:20.566169 APIC: 02
1507 15:04:20.566807 APIC: 04
1508 15:04:20.569290 Done allocating resources.
1509 15:04:20.576068 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1510 15:04:20.579237 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1511 15:04:20.585673 Configure GPIOs for I2S audio on UP4.
1512 15:04:20.592115 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1513 15:04:20.592598 Enabling resources...
1514 15:04:20.598892 PCI: 00:00.0 subsystem <- 8086/9a12
1515 15:04:20.599473 PCI: 00:00.0 cmd <- 06
1516 15:04:20.602748 PCI: 00:02.0 subsystem <- 8086/9a40
1517 15:04:20.605732 PCI: 00:02.0 cmd <- 03
1518 15:04:20.609201 PCI: 00:04.0 subsystem <- 8086/9a03
1519 15:04:20.611815 PCI: 00:04.0 cmd <- 02
1520 15:04:20.615626 PCI: 00:05.0 subsystem <- 8086/9a19
1521 15:04:20.618663 PCI: 00:05.0 cmd <- 02
1522 15:04:20.622428 PCI: 00:08.0 subsystem <- 8086/9a11
1523 15:04:20.624916 PCI: 00:08.0 cmd <- 06
1524 15:04:20.628532 PCI: 00:0d.0 subsystem <- 8086/9a13
1525 15:04:20.631825 PCI: 00:0d.0 cmd <- 02
1526 15:04:20.635088 PCI: 00:14.0 subsystem <- 8086/a0ed
1527 15:04:20.638055 PCI: 00:14.0 cmd <- 02
1528 15:04:20.641536 PCI: 00:14.2 subsystem <- 8086/a0ef
1529 15:04:20.642026 PCI: 00:14.2 cmd <- 02
1530 15:04:20.648474 PCI: 00:14.3 subsystem <- 8086/a0f0
1531 15:04:20.648967 PCI: 00:14.3 cmd <- 02
1532 15:04:20.651551 PCI: 00:15.0 subsystem <- 8086/a0e8
1533 15:04:20.655059 PCI: 00:15.0 cmd <- 02
1534 15:04:20.658253 PCI: 00:15.1 subsystem <- 8086/a0e9
1535 15:04:20.661616 PCI: 00:15.1 cmd <- 02
1536 15:04:20.664880 PCI: 00:15.2 subsystem <- 8086/a0ea
1537 15:04:20.668268 PCI: 00:15.2 cmd <- 02
1538 15:04:20.671658 PCI: 00:15.3 subsystem <- 8086/a0eb
1539 15:04:20.674466 PCI: 00:15.3 cmd <- 02
1540 15:04:20.677744 PCI: 00:16.0 subsystem <- 8086/a0e0
1541 15:04:20.681419 PCI: 00:16.0 cmd <- 02
1542 15:04:20.684480 PCI: 00:19.1 subsystem <- 8086/a0c6
1543 15:04:20.687555 PCI: 00:19.1 cmd <- 02
1544 15:04:20.691334 PCI: 00:1d.0 bridge ctrl <- 0013
1545 15:04:20.694422 PCI: 00:1d.0 subsystem <- 8086/a0b0
1546 15:04:20.697593 PCI: 00:1d.0 cmd <- 06
1547 15:04:20.701044 PCI: 00:1e.0 subsystem <- 8086/a0a8
1548 15:04:20.701484 PCI: 00:1e.0 cmd <- 06
1549 15:04:20.707578 PCI: 00:1e.2 subsystem <- 8086/a0aa
1550 15:04:20.708164 PCI: 00:1e.2 cmd <- 06
1551 15:04:20.711056 PCI: 00:1e.3 subsystem <- 8086/a0ab
1552 15:04:20.714366 PCI: 00:1e.3 cmd <- 02
1553 15:04:20.717233 PCI: 00:1f.0 subsystem <- 8086/a087
1554 15:04:20.720960 PCI: 00:1f.0 cmd <- 407
1555 15:04:20.724099 PCI: 00:1f.3 subsystem <- 8086/a0c8
1556 15:04:20.727521 PCI: 00:1f.3 cmd <- 02
1557 15:04:20.730677 PCI: 00:1f.5 subsystem <- 8086/a0a4
1558 15:04:20.733787 PCI: 00:1f.5 cmd <- 406
1559 15:04:20.737287 PCI: 01:00.0 cmd <- 02
1560 15:04:20.742812 done.
1561 15:04:20.745468 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1562 15:04:20.748768 Initializing devices...
1563 15:04:20.752059 Root Device init
1564 15:04:20.755767 Chrome EC: Set SMI mask to 0x0000000000000000
1565 15:04:20.761902 Chrome EC: clear events_b mask to 0x0000000000000000
1566 15:04:20.768387 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1567 15:04:20.771486 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1568 15:04:20.778435 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1569 15:04:20.785367 Chrome EC: Set WAKE mask to 0x0000000000000000
1570 15:04:20.788652 fw_config match found: DB_USB=USB3_ACTIVE
1571 15:04:20.794997 Configure Right Type-C port orientation for retimer
1572 15:04:20.798562 Root Device init finished in 43 msecs
1573 15:04:20.802071 PCI: 00:00.0 init
1574 15:04:20.804769 CPU TDP = 9 Watts
1575 15:04:20.805298 CPU PL1 = 9 Watts
1576 15:04:20.808895 CPU PL2 = 40 Watts
1577 15:04:20.811683 CPU PL4 = 83 Watts
1578 15:04:20.815110 PCI: 00:00.0 init finished in 8 msecs
1579 15:04:20.818104 PCI: 00:02.0 init
1580 15:04:20.818701 GMA: Found VBT in CBFS
1581 15:04:20.821164 GMA: Found valid VBT in CBFS
1582 15:04:20.828641 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1583 15:04:20.835047 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1584 15:04:20.837549 PCI: 00:02.0 init finished in 18 msecs
1585 15:04:20.840845 PCI: 00:05.0 init
1586 15:04:20.844328 PCI: 00:05.0 init finished in 0 msecs
1587 15:04:20.847934 PCI: 00:08.0 init
1588 15:04:20.851669 PCI: 00:08.0 init finished in 0 msecs
1589 15:04:20.854737 PCI: 00:14.0 init
1590 15:04:20.857544 PCI: 00:14.0 init finished in 0 msecs
1591 15:04:20.861109 PCI: 00:14.2 init
1592 15:04:20.864402 PCI: 00:14.2 init finished in 0 msecs
1593 15:04:20.867471 PCI: 00:15.0 init
1594 15:04:20.871083 I2C bus 0 version 0x3230302a
1595 15:04:20.874589 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1596 15:04:20.876987 PCI: 00:15.0 init finished in 6 msecs
1597 15:04:20.880719 PCI: 00:15.1 init
1598 15:04:20.881214 I2C bus 1 version 0x3230302a
1599 15:04:20.887913 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1600 15:04:20.890287 PCI: 00:15.1 init finished in 6 msecs
1601 15:04:20.890781 PCI: 00:15.2 init
1602 15:04:20.894045 I2C bus 2 version 0x3230302a
1603 15:04:20.897078 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1604 15:04:20.903751 PCI: 00:15.2 init finished in 6 msecs
1605 15:04:20.904340 PCI: 00:15.3 init
1606 15:04:20.907602 I2C bus 3 version 0x3230302a
1607 15:04:20.910277 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1608 15:04:20.914403 PCI: 00:15.3 init finished in 6 msecs
1609 15:04:20.917248 PCI: 00:16.0 init
1610 15:04:20.920229 PCI: 00:16.0 init finished in 0 msecs
1611 15:04:20.923808 PCI: 00:19.1 init
1612 15:04:20.926719 I2C bus 5 version 0x3230302a
1613 15:04:20.929885 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1614 15:04:20.933466 PCI: 00:19.1 init finished in 6 msecs
1615 15:04:20.937127 PCI: 00:1d.0 init
1616 15:04:20.940154 Initializing PCH PCIe bridge.
1617 15:04:20.943180 PCI: 00:1d.0 init finished in 3 msecs
1618 15:04:20.947017 PCI: 00:1f.0 init
1619 15:04:20.950424 IOAPIC: Initializing IOAPIC at 0xfec00000
1620 15:04:20.953375 IOAPIC: Bootstrap Processor Local APIC = 0x00
1621 15:04:20.956563 IOAPIC: ID = 0x02
1622 15:04:20.959948 IOAPIC: Dumping registers
1623 15:04:20.963742 reg 0x0000: 0x02000000
1624 15:04:20.964370 reg 0x0001: 0x00770020
1625 15:04:20.966204 reg 0x0002: 0x00000000
1626 15:04:20.969431 PCI: 00:1f.0 init finished in 21 msecs
1627 15:04:20.972710 PCI: 00:1f.2 init
1628 15:04:20.976734 Disabling ACPI via APMC.
1629 15:04:20.979429 APMC done.
1630 15:04:20.982724 PCI: 00:1f.2 init finished in 5 msecs
1631 15:04:20.994048 PCI: 01:00.0 init
1632 15:04:20.997354 PCI: 01:00.0 init finished in 0 msecs
1633 15:04:21.000706 PNP: 0c09.0 init
1634 15:04:21.003975 Google Chrome EC uptime: 8.251 seconds
1635 15:04:21.010595 Google Chrome AP resets since EC boot: 1
1636 15:04:21.013966 Google Chrome most recent AP reset causes:
1637 15:04:21.017181 0.451: 32775 shutdown: entering G3
1638 15:04:21.023522 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1639 15:04:21.027028 PNP: 0c09.0 init finished in 22 msecs
1640 15:04:21.032838 Devices initialized
1641 15:04:21.036313 Show all devs... After init.
1642 15:04:21.039424 Root Device: enabled 1
1643 15:04:21.040008 DOMAIN: 0000: enabled 1
1644 15:04:21.042506 CPU_CLUSTER: 0: enabled 1
1645 15:04:21.046487 PCI: 00:00.0: enabled 1
1646 15:04:21.049212 PCI: 00:02.0: enabled 1
1647 15:04:21.049803 PCI: 00:04.0: enabled 1
1648 15:04:21.052420 PCI: 00:05.0: enabled 1
1649 15:04:21.056133 PCI: 00:06.0: enabled 0
1650 15:04:21.059023 PCI: 00:07.0: enabled 0
1651 15:04:21.059608 PCI: 00:07.1: enabled 0
1652 15:04:21.062245 PCI: 00:07.2: enabled 0
1653 15:04:21.066079 PCI: 00:07.3: enabled 0
1654 15:04:21.068770 PCI: 00:08.0: enabled 1
1655 15:04:21.069411 PCI: 00:09.0: enabled 0
1656 15:04:21.072282 PCI: 00:0a.0: enabled 0
1657 15:04:21.075677 PCI: 00:0d.0: enabled 1
1658 15:04:21.079203 PCI: 00:0d.1: enabled 0
1659 15:04:21.079830 PCI: 00:0d.2: enabled 0
1660 15:04:21.082195 PCI: 00:0d.3: enabled 0
1661 15:04:21.085203 PCI: 00:0e.0: enabled 0
1662 15:04:21.088803 PCI: 00:10.2: enabled 1
1663 15:04:21.089394 PCI: 00:10.6: enabled 0
1664 15:04:21.092492 PCI: 00:10.7: enabled 0
1665 15:04:21.095313 PCI: 00:12.0: enabled 0
1666 15:04:21.098747 PCI: 00:12.6: enabled 0
1667 15:04:21.099334 PCI: 00:13.0: enabled 0
1668 15:04:21.102116 PCI: 00:14.0: enabled 1
1669 15:04:21.105562 PCI: 00:14.1: enabled 0
1670 15:04:21.108670 PCI: 00:14.2: enabled 1
1671 15:04:21.109257 PCI: 00:14.3: enabled 1
1672 15:04:21.111941 PCI: 00:15.0: enabled 1
1673 15:04:21.115059 PCI: 00:15.1: enabled 1
1674 15:04:21.115660 PCI: 00:15.2: enabled 1
1675 15:04:21.118652 PCI: 00:15.3: enabled 1
1676 15:04:21.122211 PCI: 00:16.0: enabled 1
1677 15:04:21.124917 PCI: 00:16.1: enabled 0
1678 15:04:21.125425 PCI: 00:16.2: enabled 0
1679 15:04:21.128516 PCI: 00:16.3: enabled 0
1680 15:04:21.132034 PCI: 00:16.4: enabled 0
1681 15:04:21.135188 PCI: 00:16.5: enabled 0
1682 15:04:21.135844 PCI: 00:17.0: enabled 0
1683 15:04:21.138720 PCI: 00:19.0: enabled 0
1684 15:04:21.141719 PCI: 00:19.1: enabled 1
1685 15:04:21.144627 PCI: 00:19.2: enabled 0
1686 15:04:21.145120 PCI: 00:1c.0: enabled 1
1687 15:04:21.148178 PCI: 00:1c.1: enabled 0
1688 15:04:21.151063 PCI: 00:1c.2: enabled 0
1689 15:04:21.155185 PCI: 00:1c.3: enabled 0
1690 15:04:21.155815 PCI: 00:1c.4: enabled 0
1691 15:04:21.158432 PCI: 00:1c.5: enabled 0
1692 15:04:21.161486 PCI: 00:1c.6: enabled 1
1693 15:04:21.164865 PCI: 00:1c.7: enabled 0
1694 15:04:21.165355 PCI: 00:1d.0: enabled 1
1695 15:04:21.167995 PCI: 00:1d.1: enabled 0
1696 15:04:21.170992 PCI: 00:1d.2: enabled 1
1697 15:04:21.171484 PCI: 00:1d.3: enabled 0
1698 15:04:21.174256 PCI: 00:1e.0: enabled 1
1699 15:04:21.177815 PCI: 00:1e.1: enabled 0
1700 15:04:21.181015 PCI: 00:1e.2: enabled 1
1701 15:04:21.181507 PCI: 00:1e.3: enabled 1
1702 15:04:21.184425 PCI: 00:1f.0: enabled 1
1703 15:04:21.188685 PCI: 00:1f.1: enabled 0
1704 15:04:21.191223 PCI: 00:1f.2: enabled 1
1705 15:04:21.191860 PCI: 00:1f.3: enabled 1
1706 15:04:21.194361 PCI: 00:1f.4: enabled 0
1707 15:04:21.197347 PCI: 00:1f.5: enabled 1
1708 15:04:21.200735 PCI: 00:1f.6: enabled 0
1709 15:04:21.201242 PCI: 00:1f.7: enabled 0
1710 15:04:21.204163 APIC: 00: enabled 1
1711 15:04:21.207394 GENERIC: 0.0: enabled 1
1712 15:04:21.208024 GENERIC: 0.0: enabled 1
1713 15:04:21.210817 GENERIC: 1.0: enabled 1
1714 15:04:21.214638 GENERIC: 0.0: enabled 1
1715 15:04:21.217630 GENERIC: 1.0: enabled 1
1716 15:04:21.218226 USB0 port 0: enabled 1
1717 15:04:21.220641 GENERIC: 0.0: enabled 1
1718 15:04:21.224463 USB0 port 0: enabled 1
1719 15:04:21.227547 GENERIC: 0.0: enabled 1
1720 15:04:21.228186 I2C: 00:1a: enabled 1
1721 15:04:21.230895 I2C: 00:31: enabled 1
1722 15:04:21.234118 I2C: 00:32: enabled 1
1723 15:04:21.234607 I2C: 00:10: enabled 1
1724 15:04:21.237092 I2C: 00:15: enabled 1
1725 15:04:21.240433 GENERIC: 0.0: enabled 0
1726 15:04:21.240921 GENERIC: 1.0: enabled 0
1727 15:04:21.244083 GENERIC: 0.0: enabled 1
1728 15:04:21.247515 SPI: 00: enabled 1
1729 15:04:21.248149 SPI: 00: enabled 1
1730 15:04:21.250723 PNP: 0c09.0: enabled 1
1731 15:04:21.254230 GENERIC: 0.0: enabled 1
1732 15:04:21.257426 USB3 port 0: enabled 1
1733 15:04:21.258016 USB3 port 1: enabled 1
1734 15:04:21.259933 USB3 port 2: enabled 0
1735 15:04:21.263651 USB3 port 3: enabled 0
1736 15:04:21.264286 USB2 port 0: enabled 0
1737 15:04:21.266876 USB2 port 1: enabled 1
1738 15:04:21.269917 USB2 port 2: enabled 1
1739 15:04:21.273084 USB2 port 3: enabled 0
1740 15:04:21.273574 USB2 port 4: enabled 1
1741 15:04:21.276735 USB2 port 5: enabled 0
1742 15:04:21.280194 USB2 port 6: enabled 0
1743 15:04:21.280685 USB2 port 7: enabled 0
1744 15:04:21.283039 USB2 port 8: enabled 0
1745 15:04:21.286437 USB2 port 9: enabled 0
1746 15:04:21.287054 USB3 port 0: enabled 0
1747 15:04:21.289863 USB3 port 1: enabled 1
1748 15:04:21.292906 USB3 port 2: enabled 0
1749 15:04:21.296431 USB3 port 3: enabled 0
1750 15:04:21.297031 GENERIC: 0.0: enabled 1
1751 15:04:21.299834 GENERIC: 1.0: enabled 1
1752 15:04:21.303267 APIC: 01: enabled 1
1753 15:04:21.303801 APIC: 03: enabled 1
1754 15:04:21.306523 APIC: 05: enabled 1
1755 15:04:21.309977 APIC: 07: enabled 1
1756 15:04:21.310579 APIC: 06: enabled 1
1757 15:04:21.313407 APIC: 02: enabled 1
1758 15:04:21.313999 APIC: 04: enabled 1
1759 15:04:21.316690 PCI: 01:00.0: enabled 1
1760 15:04:21.323328 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1761 15:04:21.326532 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1762 15:04:21.329988 ELOG: NV offset 0xf30000 size 0x1000
1763 15:04:21.338162 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1764 15:04:21.344819 ELOG: Event(17) added with size 13 at 2023-02-06 15:04:21 UTC
1765 15:04:21.351188 ELOG: Event(92) added with size 9 at 2023-02-06 15:04:21 UTC
1766 15:04:21.357840 ELOG: Event(93) added with size 9 at 2023-02-06 15:04:21 UTC
1767 15:04:21.364514 ELOG: Event(9E) added with size 10 at 2023-02-06 15:04:21 UTC
1768 15:04:21.370623 ELOG: Event(9F) added with size 14 at 2023-02-06 15:04:21 UTC
1769 15:04:21.377356 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1770 15:04:21.384233 ELOG: Event(A1) added with size 10 at 2023-02-06 15:04:21 UTC
1771 15:04:21.391404 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1772 15:04:21.397260 ELOG: Event(A0) added with size 9 at 2023-02-06 15:04:21 UTC
1773 15:04:21.400553 elog_add_boot_reason: Logged dev mode boot
1774 15:04:21.407304 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1775 15:04:21.407960 Finalize devices...
1776 15:04:21.410480 Devices finalized
1777 15:04:21.417333 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1778 15:04:21.420317 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1779 15:04:21.427195 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1780 15:04:21.430578 ME: HFSTS1 : 0x80030055
1781 15:04:21.436973 ME: HFSTS2 : 0x30280116
1782 15:04:21.440362 ME: HFSTS3 : 0x00000050
1783 15:04:21.443632 ME: HFSTS4 : 0x00004000
1784 15:04:21.450198 ME: HFSTS5 : 0x00000000
1785 15:04:21.453117 ME: HFSTS6 : 0x40400006
1786 15:04:21.456956 ME: Manufacturing Mode : YES
1787 15:04:21.460527 ME: SPI Protection Mode Enabled : NO
1788 15:04:21.466461 ME: FW Partition Table : OK
1789 15:04:21.469850 ME: Bringup Loader Failure : NO
1790 15:04:21.473116 ME: Firmware Init Complete : NO
1791 15:04:21.476672 ME: Boot Options Present : NO
1792 15:04:21.479984 ME: Update In Progress : NO
1793 15:04:21.482917 ME: D0i3 Support : YES
1794 15:04:21.486125 ME: Low Power State Enabled : NO
1795 15:04:21.489993 ME: CPU Replaced : YES
1796 15:04:21.496447 ME: CPU Replacement Valid : YES
1797 15:04:21.499860 ME: Current Working State : 5
1798 15:04:21.503151 ME: Current Operation State : 1
1799 15:04:21.506593 ME: Current Operation Mode : 3
1800 15:04:21.509283 ME: Error Code : 0
1801 15:04:21.513153 ME: Enhanced Debug Mode : NO
1802 15:04:21.516347 ME: CPU Debug Disabled : YES
1803 15:04:21.519497 ME: TXT Support : NO
1804 15:04:21.526209 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1805 15:04:21.535783 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1806 15:04:21.539939 CBFS: 'fallback/slic' not found.
1807 15:04:21.542271 ACPI: Writing ACPI tables at 76b01000.
1808 15:04:21.542767 ACPI: * FACS
1809 15:04:21.545767 ACPI: * DSDT
1810 15:04:21.549292 Ramoops buffer: 0x100000@0x76a00000.
1811 15:04:21.552694 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1812 15:04:21.559601 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1813 15:04:21.562208 Google Chrome EC: version:
1814 15:04:21.565615 ro: voema_v2.0.10114-a447f03e46
1815 15:04:21.569622 rw: voema_v2.0.10114-a447f03e46
1816 15:04:21.570112 running image: 2
1817 15:04:21.575213 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1818 15:04:21.580643 ACPI: * FADT
1819 15:04:21.581105 SCI is IRQ9
1820 15:04:21.587063 ACPI: added table 1/32, length now 40
1821 15:04:21.587516 ACPI: * SSDT
1822 15:04:21.590402 Found 1 CPU(s) with 8 core(s) each.
1823 15:04:21.597397 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1824 15:04:21.600349 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1825 15:04:21.603426 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1826 15:04:21.610599 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1827 15:04:21.613436 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1828 15:04:21.620074 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1829 15:04:21.623512 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1830 15:04:21.629842 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1831 15:04:21.636367 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1832 15:04:21.639615 \_SB.PCI0.RP09: Added StorageD3Enable property
1833 15:04:21.646090 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1834 15:04:21.649799 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1835 15:04:21.656340 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1836 15:04:21.659783 PS2K: Passing 80 keymaps to kernel
1837 15:04:21.666512 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1838 15:04:21.672297 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1839 15:04:21.679178 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1840 15:04:21.685622 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1841 15:04:21.692367 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1842 15:04:21.699024 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1843 15:04:21.705853 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1844 15:04:21.712714 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1845 15:04:21.716229 ACPI: added table 2/32, length now 44
1846 15:04:21.718984 ACPI: * MCFG
1847 15:04:21.722487 ACPI: added table 3/32, length now 48
1848 15:04:21.723073 ACPI: * TPM2
1849 15:04:21.725894 TPM2 log created at 0x769f0000
1850 15:04:21.728713 ACPI: added table 4/32, length now 52
1851 15:04:21.732157 ACPI: * MADT
1852 15:04:21.732646 SCI is IRQ9
1853 15:04:21.735641 ACPI: added table 5/32, length now 56
1854 15:04:21.739314 current = 76b09850
1855 15:04:21.739943 ACPI: * DMAR
1856 15:04:21.745726 ACPI: added table 6/32, length now 60
1857 15:04:21.748977 ACPI: added table 7/32, length now 64
1858 15:04:21.749572 ACPI: * HPET
1859 15:04:21.751824 ACPI: added table 8/32, length now 68
1860 15:04:21.755071 ACPI: done.
1861 15:04:21.758626 ACPI tables: 35216 bytes.
1862 15:04:21.759218 smbios_write_tables: 769ef000
1863 15:04:21.762686 EC returned error result code 3
1864 15:04:21.768976 Couldn't obtain OEM name from CBI
1865 15:04:21.772011 Create SMBIOS type 16
1866 15:04:21.772541 Create SMBIOS type 17
1867 15:04:21.775174 GENERIC: 0.0 (WIFI Device)
1868 15:04:21.778432 SMBIOS tables: 1734 bytes.
1869 15:04:21.781621 Writing table forward entry at 0x00000500
1870 15:04:21.788405 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1871 15:04:21.791966 Writing coreboot table at 0x76b25000
1872 15:04:21.798887 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1873 15:04:21.801894 1. 0000000000001000-000000000009ffff: RAM
1874 15:04:21.808425 2. 00000000000a0000-00000000000fffff: RESERVED
1875 15:04:21.811757 3. 0000000000100000-00000000769eefff: RAM
1876 15:04:21.818614 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1877 15:04:21.821554 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1878 15:04:21.828593 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1879 15:04:21.835256 7. 0000000077000000-000000007fbfffff: RESERVED
1880 15:04:21.837847 8. 00000000c0000000-00000000cfffffff: RESERVED
1881 15:04:21.841410 9. 00000000f8000000-00000000f9ffffff: RESERVED
1882 15:04:21.848185 10. 00000000fb000000-00000000fb000fff: RESERVED
1883 15:04:21.852200 11. 00000000fe000000-00000000fe00ffff: RESERVED
1884 15:04:21.857956 12. 00000000fed80000-00000000fed87fff: RESERVED
1885 15:04:21.861440 13. 00000000fed90000-00000000fed92fff: RESERVED
1886 15:04:21.868124 14. 00000000feda0000-00000000feda1fff: RESERVED
1887 15:04:21.871637 15. 00000000fedc0000-00000000feddffff: RESERVED
1888 15:04:21.874530 16. 0000000100000000-00000004803fffff: RAM
1889 15:04:21.877860 Passing 4 GPIOs to payload:
1890 15:04:21.884596 NAME | PORT | POLARITY | VALUE
1891 15:04:21.887874 lid | undefined | high | high
1892 15:04:21.894407 power | undefined | high | low
1893 15:04:21.900980 oprom | undefined | high | low
1894 15:04:21.904100 EC in RW | 0x000000e5 | high | high
1895 15:04:21.910677 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1896 15:04:21.913925 coreboot table: 1576 bytes.
1897 15:04:21.917295 IMD ROOT 0. 0x76fff000 0x00001000
1898 15:04:21.920544 IMD SMALL 1. 0x76ffe000 0x00001000
1899 15:04:21.924295 FSP MEMORY 2. 0x76c4e000 0x003b0000
1900 15:04:21.930567 VPD 3. 0x76c4d000 0x00000367
1901 15:04:21.933707 RO MCACHE 4. 0x76c4c000 0x00000fdc
1902 15:04:21.936787 CONSOLE 5. 0x76c2c000 0x00020000
1903 15:04:21.940389 FMAP 6. 0x76c2b000 0x00000578
1904 15:04:21.943961 TIME STAMP 7. 0x76c2a000 0x00000910
1905 15:04:21.946705 VBOOT WORK 8. 0x76c16000 0x00014000
1906 15:04:21.950196 ROMSTG STCK 9. 0x76c15000 0x00001000
1907 15:04:21.956774 AFTER CAR 10. 0x76c0a000 0x0000b000
1908 15:04:21.960278 RAMSTAGE 11. 0x76b97000 0x00073000
1909 15:04:21.963801 REFCODE 12. 0x76b42000 0x00055000
1910 15:04:21.966991 SMM BACKUP 13. 0x76b32000 0x00010000
1911 15:04:21.970112 4f444749 14. 0x76b30000 0x00002000
1912 15:04:21.972977 EXT VBT15. 0x76b2d000 0x0000219f
1913 15:04:21.976378 COREBOOT 16. 0x76b25000 0x00008000
1914 15:04:21.979720 ACPI 17. 0x76b01000 0x00024000
1915 15:04:21.982783 ACPI GNVS 18. 0x76b00000 0x00001000
1916 15:04:21.989636 RAMOOPS 19. 0x76a00000 0x00100000
1917 15:04:21.992611 TPM2 TCGLOG20. 0x769f0000 0x00010000
1918 15:04:21.996109 SMBIOS 21. 0x769ef000 0x00000800
1919 15:04:21.996605 IMD small region:
1920 15:04:22.002935 IMD ROOT 0. 0x76ffec00 0x00000400
1921 15:04:22.006311 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1922 15:04:22.009223 POWER STATE 2. 0x76ffeb80 0x00000044
1923 15:04:22.012371 ROMSTAGE 3. 0x76ffeb60 0x00000004
1924 15:04:22.015890 MEM INFO 4. 0x76ffe980 0x000001e0
1925 15:04:22.022718 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1926 15:04:22.025954 MTRR: Physical address space:
1927 15:04:22.032906 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1928 15:04:22.038905 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1929 15:04:22.046081 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1930 15:04:22.052870 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1931 15:04:22.059445 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1932 15:04:22.062225 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1933 15:04:22.069059 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1934 15:04:22.075618 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 15:04:22.078887 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 15:04:22.082102 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 15:04:22.085069 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 15:04:22.092136 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 15:04:22.095255 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 15:04:22.098623 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 15:04:22.101916 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 15:04:22.105255 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 15:04:22.112353 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 15:04:22.115085 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 15:04:22.118833 call enable_fixed_mtrr()
1946 15:04:22.122011 CPU physical address size: 39 bits
1947 15:04:22.128813 MTRR: default type WB/UC MTRR counts: 6/7.
1948 15:04:22.131859 MTRR: WB selected as default type.
1949 15:04:22.138785 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1950 15:04:22.142178 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1951 15:04:22.148315 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1952 15:04:22.155313 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1953 15:04:22.161803 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1954 15:04:22.168460 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1955 15:04:22.175232 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 15:04:22.178791 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 15:04:22.181593 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 15:04:22.185411 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 15:04:22.191666 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 15:04:22.195682 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 15:04:22.198180 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 15:04:22.201893 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 15:04:22.208326 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 15:04:22.211680 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 15:04:22.214782 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 15:04:22.215371
1967 15:04:22.219421 MTRR check
1968 15:04:22.222116 Fixed MTRRs : Enabled
1969 15:04:22.222617 Variable MTRRs: Enabled
1970 15:04:22.223003
1971 15:04:22.225774 call enable_fixed_mtrr()
1972 15:04:22.232758 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1973 15:04:22.235558 CPU physical address size: 39 bits
1974 15:04:22.240367 Checking cr50 for pending updates
1975 15:04:22.243791 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 15:04:22.250663 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 15:04:22.254141 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 15:04:22.257655 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 15:04:22.260425 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 15:04:22.267126 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 15:04:22.269790 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 15:04:22.273708 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 15:04:22.276906 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 15:04:22.283487 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 15:04:22.287243 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 15:04:22.289993 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 15:04:22.297555 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 15:04:22.298153 call enable_fixed_mtrr()
1989 15:04:22.303834 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 15:04:22.307052 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 15:04:22.310768 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 15:04:22.313668 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 15:04:22.320588 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 15:04:22.323758 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 15:04:22.327047 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 15:04:22.330847 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 15:04:22.337154 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 15:04:22.339809 CPU physical address size: 39 bits
1999 15:04:22.344128 call enable_fixed_mtrr()
2000 15:04:22.347551 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 15:04:22.354557 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 15:04:22.357451 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 15:04:22.360760 MTRR: Fixed MSR 0x259 0x0000000000000000
2004 15:04:22.364115 MTRR: Fixed MSR 0x268 0x0606060606060606
2005 15:04:22.370471 MTRR: Fixed MSR 0x269 0x0606060606060606
2006 15:04:22.373754 MTRR: Fixed MSR 0x26a 0x0606060606060606
2007 15:04:22.377149 MTRR: Fixed MSR 0x26b 0x0606060606060606
2008 15:04:22.380374 MTRR: Fixed MSR 0x26c 0x0606060606060606
2009 15:04:22.387234 MTRR: Fixed MSR 0x26d 0x0606060606060606
2010 15:04:22.389950 MTRR: Fixed MSR 0x26e 0x0606060606060606
2011 15:04:22.393572 MTRR: Fixed MSR 0x26f 0x0606060606060606
2012 15:04:22.401798 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 15:04:22.404207 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 15:04:22.407919 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 15:04:22.411464 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 15:04:22.417328 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 15:04:22.420925 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 15:04:22.424501 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 15:04:22.427534 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 15:04:22.433888 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 15:04:22.437192 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 15:04:22.440507 call enable_fixed_mtrr()
2023 15:04:22.444233 call enable_fixed_mtrr()
2024 15:04:22.448034 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 15:04:22.450790 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 15:04:22.457953 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 15:04:22.460360 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 15:04:22.464312 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 15:04:22.467457 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 15:04:22.473520 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 15:04:22.477629 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 15:04:22.480683 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 15:04:22.483879 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 15:04:22.486932 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 15:04:22.494202 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 15:04:22.496679 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 15:04:22.500170 call enable_fixed_mtrr()
2038 15:04:22.503847 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 15:04:22.510773 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 15:04:22.513901 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 15:04:22.516696 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 15:04:22.520474 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 15:04:22.527062 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 15:04:22.530238 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 15:04:22.533042 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 15:04:22.536955 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 15:04:22.544613 CPU physical address size: 39 bits
2048 15:04:22.548673 call enable_fixed_mtrr()
2049 15:04:22.552363 Reading cr50 TPM mode
2050 15:04:22.552960 CPU physical address size: 39 bits
2051 15:04:22.557574 CPU physical address size: 39 bits
2052 15:04:22.564068 BS: BS_PAYLOAD_LOAD entry times (exec / console): 315 / 7 ms
2053 15:04:22.567212 CPU physical address size: 39 bits
2054 15:04:22.577038 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2055 15:04:22.580355 CPU physical address size: 39 bits
2056 15:04:22.583375 Checking segment from ROM address 0xffc02b38
2057 15:04:22.587422 Checking segment from ROM address 0xffc02b54
2058 15:04:22.593280 Loading segment from ROM address 0xffc02b38
2059 15:04:22.596899 code (compression=0)
2060 15:04:22.603245 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2061 15:04:22.613069 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2062 15:04:22.613665 it's not compressed!
2063 15:04:22.755067 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2064 15:04:22.761827 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2065 15:04:22.768279 Loading segment from ROM address 0xffc02b54
2066 15:04:22.771526 Entry Point 0x30000000
2067 15:04:22.772158 Loaded segments
2068 15:04:22.777937 BS: BS_PAYLOAD_LOAD run times (exec / console): 144 / 63 ms
2069 15:04:22.823743 Finalizing chipset.
2070 15:04:22.826738 Finalizing SMM.
2071 15:04:22.827341 APMC done.
2072 15:04:22.832939 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2073 15:04:22.835940 mp_park_aps done after 0 msecs.
2074 15:04:22.839425 Jumping to boot code at 0x30000000(0x76b25000)
2075 15:04:22.849666 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2076 15:04:22.850262
2077 15:04:22.850692
2078 15:04:22.852428
2079 15:04:22.852938 Starting depthcharge on Voema...
2080 15:04:22.854126 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2081 15:04:22.854713 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2082 15:04:22.855186 Setting prompt string to ['volteer:']
2083 15:04:22.855608 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2084 15:04:22.856503
2085 15:04:22.862653 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2086 15:04:22.863248
2087 15:04:22.869865 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2088 15:04:22.870463
2089 15:04:22.875866 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2090 15:04:22.876620
2091 15:04:22.879173 Failed to find eMMC card reader
2092 15:04:22.879737
2093 15:04:22.883064 Wipe memory regions:
2094 15:04:22.883660
2095 15:04:22.885820 [0x00000000001000, 0x000000000a0000)
2096 15:04:22.886342
2097 15:04:22.888938 [0x00000000100000, 0x00000030000000)
2098 15:04:22.923556
2099 15:04:22.926833 [0x00000032662db0, 0x000000769ef000)
2100 15:04:22.974372
2101 15:04:22.977281 [0x00000100000000, 0x00000480400000)
2102 15:04:23.622203
2103 15:04:23.624907 ec_init: CrosEC protocol v3 supported (256, 256)
2104 15:04:24.058098
2105 15:04:24.058701 R8152: Initializing
2106 15:04:24.059103
2107 15:04:24.061193 Version 6 (ocp_data = 5c30)
2108 15:04:24.061780
2109 15:04:24.064433 R8152: Done initializing
2110 15:04:24.065046
2111 15:04:24.067368 Adding net device
2112 15:04:24.369223
2113 15:04:24.372006 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2114 15:04:24.372621
2115 15:04:24.373034
2116 15:04:24.373397
2117 15:04:24.375842 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2119 15:04:24.477929 volteer: tftpboot 192.168.201.1 9036933/tftp-deploy-li5uz04n/kernel/bzImage 9036933/tftp-deploy-li5uz04n/kernel/cmdline 9036933/tftp-deploy-li5uz04n/ramdisk/ramdisk.cpio.gz
2120 15:04:24.478716 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2121 15:04:24.479293 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2122 15:04:24.483773 tftpboot 192.168.201.1 9036933/tftp-deploy-li5uz04n/kernel/bzImoy-li5uz04n/kernel/cmdline 9036933/tftp-deploy-li5uz04n/ramdisk/ramdisk.cpio.gz
2123 15:04:24.484287
2124 15:04:24.484676 Waiting for link
2125 15:04:24.686621
2126 15:04:24.687250 done.
2127 15:04:24.687920
2128 15:04:24.688507 MAC: 00:24:32:30:7d:ab
2129 15:04:24.688926
2130 15:04:24.689889 Sending DHCP discover... done.
2131 15:04:24.690387
2132 15:04:24.692762 Waiting for reply... done.
2133 15:04:24.692847
2134 15:04:24.696634 Sending DHCP request... done.
2135 15:04:24.696720
2136 15:04:24.702797 Waiting for reply... done.
2137 15:04:24.702974
2138 15:04:24.703055 My ip is 192.168.201.20
2139 15:04:24.703124
2140 15:04:24.706342 The DHCP server ip is 192.168.201.1
2141 15:04:24.709417
2142 15:04:24.712767 TFTP server IP predefined by user: 192.168.201.1
2143 15:04:24.712956
2144 15:04:24.719389 Bootfile predefined by user: 9036933/tftp-deploy-li5uz04n/kernel/bzImage
2145 15:04:24.719591
2146 15:04:24.722774 Sending tftp read request... done.
2147 15:04:24.722983
2148 15:04:24.725601 Waiting for the transfer...
2149 15:04:24.725776
2150 15:04:25.433407 00000000 ################################################################
2151 15:04:25.433944
2152 15:04:26.142654 00080000 ################################################################
2153 15:04:26.143210
2154 15:04:26.822541 00100000 ################################################################
2155 15:04:26.822698
2156 15:04:27.461097 00180000 ################################################################
2157 15:04:27.461665
2158 15:04:28.186724 00200000 ################################################################
2159 15:04:28.187299
2160 15:04:28.905148 00280000 ################################################################
2161 15:04:28.905750
2162 15:04:29.615454 00300000 ################################################################
2163 15:04:29.616086
2164 15:04:30.326539 00380000 ################################################################
2165 15:04:30.327108
2166 15:04:31.026904 00400000 ################################################################
2167 15:04:31.027466
2168 15:04:31.735664 00480000 ################################################################
2169 15:04:31.736257
2170 15:04:32.441901 00500000 ################################################################
2171 15:04:32.442462
2172 15:04:33.135155 00580000 ################################################################
2173 15:04:33.135812
2174 15:04:33.840156 00600000 ################################################################
2175 15:04:33.840717
2176 15:04:34.560155 00680000 ################################################################
2177 15:04:34.560708
2178 15:04:34.886355 00700000 ############################# done.
2179 15:04:34.886911
2180 15:04:34.889215 The bootfile was 7577488 bytes long.
2181 15:04:34.889659
2182 15:04:34.893126 Sending tftp read request... done.
2183 15:04:34.893613
2184 15:04:34.895457 Waiting for the transfer...
2185 15:04:34.895925
2186 15:04:35.620759 00000000 ################################################################
2187 15:04:35.621367
2188 15:04:36.338967 00080000 ################################################################
2189 15:04:36.339533
2190 15:04:37.054486 00100000 ################################################################
2191 15:04:37.055060
2192 15:04:37.779108 00180000 ################################################################
2193 15:04:37.779757
2194 15:04:38.501483 00200000 ################################################################
2195 15:04:38.502058
2196 15:04:39.217316 00280000 ################################################################
2197 15:04:39.217933
2198 15:04:39.938525 00300000 ################################################################
2199 15:04:39.939153
2200 15:04:40.651075 00380000 ################################################################
2201 15:04:40.651672
2202 15:04:41.374426 00400000 ################################################################
2203 15:04:41.375006
2204 15:04:42.085945 00480000 ################################################################
2205 15:04:42.086489
2206 15:04:42.804870 00500000 ################################################################
2207 15:04:42.805487
2208 15:04:43.520793 00580000 ################################################################
2209 15:04:43.521361
2210 15:04:44.184281 00600000 ################################################################
2211 15:04:44.184553
2212 15:04:44.892971 00680000 ################################################################
2213 15:04:44.893171
2214 15:04:45.495200 00700000 ################################################################
2215 15:04:45.495342
2216 15:04:46.026555 00780000 ################################################################
2217 15:04:46.026702
2218 15:04:46.192538 00800000 ##################### done.
2219 15:04:46.192714
2220 15:04:46.195919 Sending tftp read request... done.
2221 15:04:46.196007
2222 15:04:46.199519 Waiting for the transfer...
2223 15:04:46.199606
2224 15:04:46.199674 00000000 # done.
2225 15:04:46.199780
2226 15:04:46.208936 Command line loaded dynamically from TFTP file: 9036933/tftp-deploy-li5uz04n/kernel/cmdline
2227 15:04:46.209042
2228 15:04:46.221956 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2229 15:04:46.225766
2230 15:04:46.228902 Shutting down all USB controllers.
2231 15:04:46.228989
2232 15:04:46.229056 Removing current net device
2233 15:04:46.229120
2234 15:04:46.232548 Finalizing coreboot
2235 15:04:46.232635
2236 15:04:46.238678 Exiting depthcharge with code 4 at timestamp: 31957596
2237 15:04:46.238779
2238 15:04:46.238847
2239 15:04:46.238910 Starting kernel ...
2240 15:04:46.238971
2241 15:04:46.239342 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2242 15:04:46.239441 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2243 15:04:46.239515 Setting prompt string to ['Linux version [0-9]']
2244 15:04:46.239587 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2245 15:04:46.239655 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2246 15:04:46.242200
2248 15:09:05.239795 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2250 15:09:05.240074 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2252 15:09:05.240223 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2255 15:09:05.240491 end: 2 depthcharge-action (duration 00:05:00) [common]
2257 15:09:05.240779 Cleaning after the job
2258 15:09:05.240861 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9036933/tftp-deploy-li5uz04n/ramdisk
2259 15:09:05.241592 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9036933/tftp-deploy-li5uz04n/kernel
2260 15:09:05.242156 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9036933/tftp-deploy-li5uz04n/modules
2261 15:09:05.242342 start: 5.1 power-off (timeout 00:00:30) [common]
2262 15:09:05.242487 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2263 15:09:07.415135 >> Command sent successfully.
2264 15:09:07.421432 Returned 0 in 2 seconds
2265 15:09:07.522570 end: 5.1 power-off (duration 00:00:02) [common]
2267 15:09:07.524090 start: 5.2 read-feedback (timeout 00:09:58) [common]
2268 15:09:07.525193 Listened to connection for namespace 'common' for up to 1s
2269 15:09:08.527792 Finalising connection for namespace 'common'
2270 15:09:08.528080 Disconnecting from shell: Finalise
2271 15:09:08.528235
2272 15:09:08.628991 end: 5.2 read-feedback (duration 00:00:01) [common]
2273 15:09:08.629587 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9036933
2274 15:09:08.638174 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9036933
2275 15:09:08.638312 JobError: Your job cannot terminate cleanly.