Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:40:14.343980 lava-dispatcher, installed at version: 2023.10
2 12:40:14.344190 start: 0 validate
3 12:40:14.344323 Start time: 2024-01-03 12:40:14.344315+00:00 (UTC)
4 12:40:14.344438 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:14.344566 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:40:14.617985 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:14.618677 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:14.889102 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:14.889784 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:40:15.164472 validate duration: 0.82
12 12:40:15.164764 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:40:15.164878 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:40:15.164968 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:40:15.165101 Not decompressing ramdisk as can be used compressed.
16 12:40:15.165189 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:40:15.165257 saving as /var/lib/lava/dispatcher/tmp/12437388/tftp-deploy-qo1yro6n/ramdisk/rootfs.cpio.gz
18 12:40:15.165323 total size: 8418130 (8 MB)
19 12:40:15.166402 progress 0 % (0 MB)
20 12:40:15.168801 progress 5 % (0 MB)
21 12:40:15.171065 progress 10 % (0 MB)
22 12:40:15.173404 progress 15 % (1 MB)
23 12:40:15.175708 progress 20 % (1 MB)
24 12:40:15.177979 progress 25 % (2 MB)
25 12:40:15.180286 progress 30 % (2 MB)
26 12:40:15.182367 progress 35 % (2 MB)
27 12:40:15.184675 progress 40 % (3 MB)
28 12:40:15.186932 progress 45 % (3 MB)
29 12:40:15.189235 progress 50 % (4 MB)
30 12:40:15.191541 progress 55 % (4 MB)
31 12:40:15.193757 progress 60 % (4 MB)
32 12:40:15.195857 progress 65 % (5 MB)
33 12:40:15.198100 progress 70 % (5 MB)
34 12:40:15.200316 progress 75 % (6 MB)
35 12:40:15.202526 progress 80 % (6 MB)
36 12:40:15.204754 progress 85 % (6 MB)
37 12:40:15.206955 progress 90 % (7 MB)
38 12:40:15.209176 progress 95 % (7 MB)
39 12:40:15.211238 progress 100 % (8 MB)
40 12:40:15.211478 8 MB downloaded in 0.05 s (173.94 MB/s)
41 12:40:15.211635 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:40:15.211878 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:40:15.211965 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:40:15.212049 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:40:15.212188 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:40:15.212263 saving as /var/lib/lava/dispatcher/tmp/12437388/tftp-deploy-qo1yro6n/kernel/bzImage
48 12:40:15.212324 total size: 8585104 (8 MB)
49 12:40:15.212386 No compression specified
50 12:40:15.213492 progress 0 % (0 MB)
51 12:40:15.215830 progress 5 % (0 MB)
52 12:40:15.218120 progress 10 % (0 MB)
53 12:40:15.220389 progress 15 % (1 MB)
54 12:40:15.222647 progress 20 % (1 MB)
55 12:40:15.224950 progress 25 % (2 MB)
56 12:40:15.227214 progress 30 % (2 MB)
57 12:40:15.229512 progress 35 % (2 MB)
58 12:40:15.231841 progress 40 % (3 MB)
59 12:40:15.234112 progress 45 % (3 MB)
60 12:40:15.236416 progress 50 % (4 MB)
61 12:40:15.238838 progress 55 % (4 MB)
62 12:40:15.241114 progress 60 % (4 MB)
63 12:40:15.243354 progress 65 % (5 MB)
64 12:40:15.245664 progress 70 % (5 MB)
65 12:40:15.247929 progress 75 % (6 MB)
66 12:40:15.250148 progress 80 % (6 MB)
67 12:40:15.252414 progress 85 % (6 MB)
68 12:40:15.254620 progress 90 % (7 MB)
69 12:40:15.256843 progress 95 % (7 MB)
70 12:40:15.259074 progress 100 % (8 MB)
71 12:40:15.259339 8 MB downloaded in 0.05 s (174.16 MB/s)
72 12:40:15.259515 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:40:15.259753 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:40:15.259842 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:40:15.259932 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:40:15.260068 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:40:15.260145 saving as /var/lib/lava/dispatcher/tmp/12437388/tftp-deploy-qo1yro6n/modules/modules.tar
79 12:40:15.260206 total size: 253660 (0 MB)
80 12:40:15.260268 Using unxz to decompress xz
81 12:40:15.264611 progress 12 % (0 MB)
82 12:40:15.265022 progress 25 % (0 MB)
83 12:40:15.265257 progress 38 % (0 MB)
84 12:40:15.266932 progress 51 % (0 MB)
85 12:40:15.268861 progress 64 % (0 MB)
86 12:40:15.270748 progress 77 % (0 MB)
87 12:40:15.272552 progress 90 % (0 MB)
88 12:40:15.274482 progress 100 % (0 MB)
89 12:40:15.280016 0 MB downloaded in 0.02 s (12.22 MB/s)
90 12:40:15.280269 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:40:15.280578 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:40:15.280694 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 12:40:15.280813 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 12:40:15.280912 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:40:15.281021 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 12:40:15.281275 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv
98 12:40:15.281453 makedir: /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin
99 12:40:15.281598 makedir: /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/tests
100 12:40:15.281741 makedir: /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/results
101 12:40:15.281875 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-add-keys
102 12:40:15.282039 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-add-sources
103 12:40:15.282189 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-background-process-start
104 12:40:15.282339 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-background-process-stop
105 12:40:15.282488 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-common-functions
106 12:40:15.282661 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-echo-ipv4
107 12:40:15.282835 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-install-packages
108 12:40:15.283009 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-installed-packages
109 12:40:15.283177 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-os-build
110 12:40:15.283328 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-probe-channel
111 12:40:15.283537 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-probe-ip
112 12:40:15.283683 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-target-ip
113 12:40:15.283832 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-target-mac
114 12:40:15.283984 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-target-storage
115 12:40:15.284158 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-test-case
116 12:40:15.284308 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-test-event
117 12:40:15.284478 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-test-feedback
118 12:40:15.284627 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-test-raise
119 12:40:15.284803 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-test-reference
120 12:40:15.284974 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-test-runner
121 12:40:15.285119 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-test-set
122 12:40:15.285265 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-test-shell
123 12:40:15.285419 Updating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-install-packages (oe)
124 12:40:15.285614 Updating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/bin/lava-installed-packages (oe)
125 12:40:15.285756 Creating /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/environment
126 12:40:15.285871 LAVA metadata
127 12:40:15.285956 - LAVA_JOB_ID=12437388
128 12:40:15.286065 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:40:15.286215 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 12:40:15.286318 skipped lava-vland-overlay
131 12:40:15.286439 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:40:15.286564 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 12:40:15.286660 skipped lava-multinode-overlay
134 12:40:15.286778 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:40:15.286905 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 12:40:15.287027 Loading test definitions
137 12:40:15.287169 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 12:40:15.287283 Using /lava-12437388 at stage 0
139 12:40:15.287694 uuid=12437388_1.4.2.3.1 testdef=None
140 12:40:15.287797 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:40:15.287898 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 12:40:15.288451 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:40:15.288703 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 12:40:15.289365 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:40:15.289629 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 12:40:15.290534 runner path: /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/0/tests/0_dmesg test_uuid 12437388_1.4.2.3.1
149 12:40:15.290729 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:40:15.290986 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 12:40:15.291093 Using /lava-12437388 at stage 1
153 12:40:15.291586 uuid=12437388_1.4.2.3.5 testdef=None
154 12:40:15.291711 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:40:15.291811 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 12:40:15.292504 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:40:15.292778 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 12:40:15.293459 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:40:15.293723 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 12:40:15.294638 runner path: /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/1/tests/1_bootrr test_uuid 12437388_1.4.2.3.5
163 12:40:15.294837 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:40:15.295095 Creating lava-test-runner.conf files
166 12:40:15.295197 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/0 for stage 0
167 12:40:15.295335 - 0_dmesg
168 12:40:15.295498 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437388/lava-overlay-bvfjs0rv/lava-12437388/1 for stage 1
169 12:40:15.295635 - 1_bootrr
170 12:40:15.295771 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:40:15.295900 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 12:40:15.304435 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:40:15.304556 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 12:40:15.304660 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:40:15.304762 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:40:15.304867 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 12:40:15.559562 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:40:15.559974 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 12:40:15.560106 extracting modules file /var/lib/lava/dispatcher/tmp/12437388/tftp-deploy-qo1yro6n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437388/extract-overlay-ramdisk-2wh2bsc1/ramdisk
180 12:40:15.574463 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:40:15.574594 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 12:40:15.574702 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437388/compress-overlay-xovwisoa/overlay-1.4.2.4.tar.gz to ramdisk
183 12:40:15.574784 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437388/compress-overlay-xovwisoa/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12437388/extract-overlay-ramdisk-2wh2bsc1/ramdisk
184 12:40:15.583844 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:40:15.583977 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 12:40:15.584084 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:40:15.584194 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 12:40:15.584283 Building ramdisk /var/lib/lava/dispatcher/tmp/12437388/extract-overlay-ramdisk-2wh2bsc1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12437388/extract-overlay-ramdisk-2wh2bsc1/ramdisk
189 12:40:15.729712 >> 49826 blocks
190 12:40:16.560489 rename /var/lib/lava/dispatcher/tmp/12437388/extract-overlay-ramdisk-2wh2bsc1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12437388/tftp-deploy-qo1yro6n/ramdisk/ramdisk.cpio.gz
191 12:40:16.560953 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:40:16.561097 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 12:40:16.561216 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 12:40:16.561329 No mkimage arch provided, not using FIT.
195 12:40:16.561431 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:40:16.561530 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:40:16.561656 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:40:16.561791 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 12:40:16.561911 No LXC device requested
200 12:40:16.562035 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:40:16.562171 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 12:40:16.562273 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:40:16.562366 Checking files for TFTP limit of 4294967296 bytes.
204 12:40:16.562793 end: 1 tftp-deploy (duration 00:00:01) [common]
205 12:40:16.562914 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:40:16.563047 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:40:16.563209 substitutions:
208 12:40:16.563281 - {DTB}: None
209 12:40:16.563395 - {INITRD}: 12437388/tftp-deploy-qo1yro6n/ramdisk/ramdisk.cpio.gz
210 12:40:16.563477 - {KERNEL}: 12437388/tftp-deploy-qo1yro6n/kernel/bzImage
211 12:40:16.563559 - {LAVA_MAC}: None
212 12:40:16.563637 - {PRESEED_CONFIG}: None
213 12:40:16.563733 - {PRESEED_LOCAL}: None
214 12:40:16.563829 - {RAMDISK}: 12437388/tftp-deploy-qo1yro6n/ramdisk/ramdisk.cpio.gz
215 12:40:16.563924 - {ROOT_PART}: None
216 12:40:16.564019 - {ROOT}: None
217 12:40:16.564114 - {SERVER_IP}: 192.168.201.1
218 12:40:16.564208 - {TEE}: None
219 12:40:16.564303 Parsed boot commands:
220 12:40:16.564397 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:40:16.564640 Parsed boot commands: tftpboot 192.168.201.1 12437388/tftp-deploy-qo1yro6n/kernel/bzImage 12437388/tftp-deploy-qo1yro6n/kernel/cmdline 12437388/tftp-deploy-qo1yro6n/ramdisk/ramdisk.cpio.gz
222 12:40:16.564765 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:40:16.564894 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:40:16.565033 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:40:16.565163 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:40:16.565267 Not connected, no need to disconnect.
227 12:40:16.565385 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:40:16.565653 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:40:16.565755 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-5'
230 12:40:16.569820 Setting prompt string to ['lava-test: # ']
231 12:40:16.570187 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:40:16.570315 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:40:16.570431 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:40:16.570537 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:40:16.570757 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-5' '--port=1' '--command=reboot'
236 12:40:21.713735 >> Command sent successfully.
237 12:40:21.724376 Returned 0 in 5 seconds
238 12:40:21.825611 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 12:40:21.827181 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 12:40:21.827853 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 12:40:21.828337 Setting prompt string to 'Starting depthcharge on Magolor...'
243 12:40:21.828781 Changing prompt to 'Starting depthcharge on Magolor...'
244 12:40:21.829203 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 12:40:21.830544 [Enter `^Ec?' for help]
246 12:40:22.986828
247 12:40:22.987428
248 12:40:22.993858 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 12:40:23.000820 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 12:40:23.004323 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 12:40:23.010537 CPU: AES supported, TXT NOT supported, VT supported
252 12:40:23.014228 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 12:40:23.020955 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 12:40:23.023981 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 12:40:23.027507 VBOOT: Loading verstage.
256 12:40:23.030619 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 12:40:23.038054 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 12:40:23.041899 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 12:40:23.048157 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 12:40:23.048652
261 12:40:23.048989
262 12:40:23.058285 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 12:40:23.074572 Probing TPM: . done!
264 12:40:23.078315 TPM ready after 0 ms
265 12:40:23.081611 Connected to device vid:did:rid of 1ae0:0028:00
266 12:40:23.093048 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
267 12:40:23.100127 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 12:40:23.153902 Initialized TPM device CR50 revision 0
269 12:40:23.169133 tlcl_send_startup: Startup return code is 0
270 12:40:23.169569 TPM: setup succeeded
271 12:40:23.179064 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 12:40:23.195008 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 12:40:23.202370 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 12:40:23.221413 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 12:40:23.224439 Chrome EC: UHEPI supported
276 12:40:23.224524 Phase 1
277 12:40:23.231517 FMAP: area GBB found @ c05000 (12288 bytes)
278 12:40:23.238392 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 12:40:23.245237 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 12:40:23.248190 Recovery requested (1009000e)
281 12:40:23.251675 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 12:40:23.262747 tlcl_extend: response is 0
283 12:40:23.270441 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 12:40:23.278911 tlcl_extend: response is 0
285 12:40:23.285764 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 12:40:23.289557 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 12:40:23.296582 BS: verstage times (exec / console): total (unknown) / 124 ms
288 12:40:23.296666
289 12:40:23.298942
290 12:40:23.308631 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 12:40:23.315820 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 12:40:23.318876 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 12:40:23.322151 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 12:40:23.328865 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 12:40:23.332226 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 12:40:23.335653 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
297 12:40:23.339085 TCO_STS: 0000 0001
298 12:40:23.343238 GEN_PMCON: d0015038 00002200
299 12:40:23.346864 GBLRST_CAUSE: 00000000 00000000
300 12:40:23.346954 prev_sleep_state 5
301 12:40:23.350416 Boot Count incremented to 1974
302 12:40:23.356673 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 12:40:23.359715 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 12:40:23.363507 Chrome EC: UHEPI supported
305 12:40:23.370079 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 12:40:23.377020 Probing TPM: done!
307 12:40:23.383354 Connected to device vid:did:rid of 1ae0:0028:00
308 12:40:23.394073 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
309 12:40:23.397141 Initialized TPM device CR50 revision 0
310 12:40:23.411607 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 12:40:23.418212 MRC: Hash idx 0x100b comparison successful.
312 12:40:23.421219 MRC cache found, size 5458
313 12:40:23.421304 bootmode is set to: 2
314 12:40:23.424817 SPD INDEX = 0
315 12:40:23.428240 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 12:40:23.431319 SPD: module type is LPDDR4X
317 12:40:23.438596 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 12:40:23.444708 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 12:40:23.448274 SPD: device width 16 bits, bus width 32 bits
320 12:40:23.451481 SPD: module size is 4096 MB (per channel)
321 12:40:23.454882 meminit_channels: DRAM half-populated
322 12:40:23.538413 CBMEM:
323 12:40:23.541559 IMD: root @ 0x76fff000 254 entries.
324 12:40:23.544883 IMD: root @ 0x76ffec00 62 entries.
325 12:40:23.548316 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 12:40:23.555615 WARNING: RO_VPD is uninitialized or empty.
327 12:40:23.558371 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 12:40:23.562336 External stage cache:
329 12:40:23.565197 IMD: root @ 0x7b3ff000 254 entries.
330 12:40:23.569225 IMD: root @ 0x7b3fec00 62 entries.
331 12:40:23.578453 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 12:40:23.585151 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 12:40:23.592088 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 12:40:23.600050 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 12:40:23.603589 cse_lite: Skip switching to RW in the recovery path
336 12:40:23.606744 1 DIMMs found
337 12:40:23.607208 SMM Memory Map
338 12:40:23.610198 SMRAM : 0x7b000000 0x800000
339 12:40:23.613493 Subregion 0: 0x7b000000 0x200000
340 12:40:23.617362 Subregion 1: 0x7b200000 0x200000
341 12:40:23.623406 Subregion 2: 0x7b400000 0x400000
342 12:40:23.623832 top_of_ram = 0x77000000
343 12:40:23.630326 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 12:40:23.637165 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 12:40:23.640290 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 12:40:23.646943 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 12:40:23.649854 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 12:40:23.662329 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 12:40:23.668781 Processing 188 relocs. Offset value of 0x74c0e000
350 12:40:23.675590 BS: romstage times (exec / console): total (unknown) / 256 ms
351 12:40:23.679972
352 12:40:23.680386
353 12:40:23.689830 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 12:40:23.693618 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 12:40:23.700298 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 12:40:23.707251 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 12:40:23.763036 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 12:40:23.769685 Processing 4805 relocs. Offset value of 0x75da8000
359 12:40:23.773085 BS: postcar times (exec / console): total (unknown) / 42 ms
360 12:40:23.776077
361 12:40:23.776494
362 12:40:23.786555 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 12:40:23.786981 Normal boot
364 12:40:23.789899 EC returned error result code 3
365 12:40:23.793520 FW_CONFIG value is 0x204
366 12:40:23.796661 GENERIC: 0.0 disabled by fw_config
367 12:40:23.803061 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 12:40:23.806478 I2C: 00:10 disabled by fw_config
369 12:40:23.809817 I2C: 00:10 disabled by fw_config
370 12:40:23.814275 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 12:40:23.817673 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 12:40:23.824473 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 12:40:23.827915 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 12:40:23.834206 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 12:40:23.837554 I2C: 00:10 disabled by fw_config
376 12:40:23.844565 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 12:40:23.850936 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 12:40:23.854640 I2C: 00:1a disabled by fw_config
379 12:40:23.857622 I2C: 00:1a disabled by fw_config
380 12:40:23.860823 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 12:40:23.867341 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 12:40:23.871208 GENERIC: 0.0 disabled by fw_config
383 12:40:23.873990 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 12:40:23.881139 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 12:40:23.884413 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 12:40:23.891456 microcode: Update skipped, already up-to-date
387 12:40:23.894124 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 12:40:23.922641 Detected 2 core, 2 thread CPU.
389 12:40:23.925307 Setting up SMI for CPU
390 12:40:23.928786 IED base = 0x7b400000
391 12:40:23.929220 IED size = 0x00400000
392 12:40:23.931981 Will perform SMM setup.
393 12:40:23.935785 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 12:40:23.945417 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 12:40:23.948414 Processing 16 relocs. Offset value of 0x00030000
396 12:40:23.952331 Attempting to start 1 APs
397 12:40:23.955723 Waiting for 10ms after sending INIT.
398 12:40:23.972681 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 2.
399 12:40:23.973120 done.
400 12:40:23.978672 Waiting for 2nd SIPI to complete...done.
401 12:40:23.985207 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 12:40:23.992092 Processing 13 relocs. Offset value of 0x00038000
403 12:40:23.992544 Unable to locate Global NVS
404 12:40:24.002530 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 12:40:24.005244 Installing permanent SMM handler to 0x7b000000
406 12:40:24.015213 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 12:40:24.018181 Processing 704 relocs. Offset value of 0x7b010000
408 12:40:24.028581 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 12:40:24.031887 Processing 13 relocs. Offset value of 0x7b008000
410 12:40:24.038428 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 12:40:24.042134 Unable to locate Global NVS
412 12:40:24.047925 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 12:40:24.051463 Clearing SMI status registers
414 12:40:24.051895 SMI_STS: PM1
415 12:40:24.055017 PM1_STS: PWRBTN
416 12:40:24.055495 TCO_STS: INTRD_DET
417 12:40:24.057968 GPE0 STD STS:
418 12:40:24.065064 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
419 12:40:24.068105 In relocation handler: CPU 0
420 12:40:24.071733 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 12:40:24.078503 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 12:40:24.078934 Relocation complete.
423 12:40:24.085024 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 12:40:24.088618 In relocation handler: CPU 1
425 12:40:24.094672 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 12:40:24.097906 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 12:40:24.101689 Relocation complete.
428 12:40:24.102108 Initializing CPU #0
429 12:40:24.104611 CPU: vendor Intel device 906c0
430 12:40:24.108334 CPU: family 06, model 9c, stepping 00
431 12:40:24.111453 Clearing out pending MCEs
432 12:40:24.114473 Setting up local APIC...
433 12:40:24.118604 apic_id: 0x00 done.
434 12:40:24.121592 Turbo is available but hidden
435 12:40:24.124571 Turbo is available and visible
436 12:40:24.128047 microcode: Update skipped, already up-to-date
437 12:40:24.131303 CPU #0 initialized
438 12:40:24.131776 Initializing CPU #1
439 12:40:24.134539 CPU: vendor Intel device 906c0
440 12:40:24.138244 CPU: family 06, model 9c, stepping 00
441 12:40:24.141733 Clearing out pending MCEs
442 12:40:24.144635 Setting up local APIC...
443 12:40:24.148016 apic_id: 0x02 done.
444 12:40:24.151182 microcode: Update skipped, already up-to-date
445 12:40:24.154714 CPU #1 initialized
446 12:40:24.157939 bsp_do_flight_plan done after 175 msecs.
447 12:40:24.161076 CPU: frequency set to 2800 MHz
448 12:40:24.161496 Enabling SMIs.
449 12:40:24.168109 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
450 12:40:24.178310 Probing TPM: done!
451 12:40:24.184878 Connected to device vid:did:rid of 1ae0:0028:00
452 12:40:24.194774 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
453 12:40:24.197861 Initialized TPM device CR50 revision 0
454 12:40:24.201491 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 12:40:24.208454 Found a VBT of 7680 bytes after decompression
456 12:40:24.215736 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 12:40:24.250023 Detected 2 core, 2 thread CPU.
458 12:40:24.253752 Detected 2 core, 2 thread CPU.
459 12:40:24.615662 Display FSP Version Info HOB
460 12:40:24.619142 Reference Code - CPU = 8.7.22.30
461 12:40:24.622435 uCode Version = 24.0.0.1f
462 12:40:24.625957 TXT ACM version = ff.ff.ff.ffff
463 12:40:24.628921 Reference Code - ME = 8.7.22.30
464 12:40:24.632344 MEBx version = 0.0.0.0
465 12:40:24.635772 ME Firmware Version = Consumer SKU
466 12:40:24.639292 Reference Code - PCH = 8.7.22.30
467 12:40:24.642195 PCH-CRID Status = Disabled
468 12:40:24.645311 PCH-CRID Original Value = ff.ff.ff.ffff
469 12:40:24.649531 PCH-CRID New Value = ff.ff.ff.ffff
470 12:40:24.652652 OPROM - RST - RAID = ff.ff.ff.ffff
471 12:40:24.655493 PCH Hsio Version = 4.0.0.0
472 12:40:24.658686 Reference Code - SA - System Agent = 8.7.22.30
473 12:40:24.662306 Reference Code - MRC = 0.0.4.68
474 12:40:24.665511 SA - PCIe Version = 8.7.22.30
475 12:40:24.669005 SA-CRID Status = Disabled
476 12:40:24.672424 SA-CRID Original Value = 0.0.0.0
477 12:40:24.675461 SA-CRID New Value = 0.0.0.0
478 12:40:24.679136 OPROM - VBIOS = ff.ff.ff.ffff
479 12:40:24.682586 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 12:40:24.686084 PHY Build Version = ff.ff.ff.ffff
481 12:40:24.689247 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 12:40:24.695626 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 12:40:24.698677 ITSS IRQ Polarities Before:
484 12:40:24.702504 IPC0: 0xffffffff
485 12:40:24.702930 IPC1: 0xffffffff
486 12:40:24.705594 IPC2: 0xffffffff
487 12:40:24.706023 IPC3: 0xffffffff
488 12:40:24.708926 ITSS IRQ Polarities After:
489 12:40:24.712081 IPC0: 0xffffffff
490 12:40:24.712507 IPC1: 0xffffffff
491 12:40:24.715826 IPC2: 0xffffffff
492 12:40:24.716257 IPC3: 0xffffffff
493 12:40:24.728734 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
494 12:40:24.735396 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
495 12:40:24.735836 Enumerating buses...
496 12:40:24.742131 Show all devs... Before device enumeration.
497 12:40:24.742559 Root Device: enabled 1
498 12:40:24.745390 CPU_CLUSTER: 0: enabled 1
499 12:40:24.748577 DOMAIN: 0000: enabled 1
500 12:40:24.751643 PCI: 00:00.0: enabled 1
501 12:40:24.752074 PCI: 00:02.0: enabled 1
502 12:40:24.754957 PCI: 00:04.0: enabled 1
503 12:40:24.758409 PCI: 00:05.0: enabled 1
504 12:40:24.762345 PCI: 00:09.0: enabled 0
505 12:40:24.762772 PCI: 00:12.6: enabled 0
506 12:40:24.765075 PCI: 00:14.0: enabled 1
507 12:40:24.768843 PCI: 00:14.1: enabled 0
508 12:40:24.772395 PCI: 00:14.2: enabled 0
509 12:40:24.772823 PCI: 00:14.3: enabled 1
510 12:40:24.775957 PCI: 00:14.5: enabled 1
511 12:40:24.778476 PCI: 00:15.0: enabled 1
512 12:40:24.778903 PCI: 00:15.1: enabled 1
513 12:40:24.781882 PCI: 00:15.2: enabled 1
514 12:40:24.785348 PCI: 00:15.3: enabled 1
515 12:40:24.788541 PCI: 00:16.0: enabled 1
516 12:40:24.788969 PCI: 00:16.1: enabled 0
517 12:40:24.792078 PCI: 00:16.4: enabled 0
518 12:40:24.795288 PCI: 00:16.5: enabled 0
519 12:40:24.798418 PCI: 00:17.0: enabled 0
520 12:40:24.798845 PCI: 00:19.0: enabled 1
521 12:40:24.801659 PCI: 00:19.1: enabled 0
522 12:40:24.805255 PCI: 00:19.2: enabled 1
523 12:40:24.805683 PCI: 00:1a.0: enabled 1
524 12:40:24.808420 PCI: 00:1c.0: enabled 0
525 12:40:24.811690 PCI: 00:1c.1: enabled 0
526 12:40:24.815474 PCI: 00:1c.2: enabled 0
527 12:40:24.815905 PCI: 00:1c.3: enabled 0
528 12:40:24.818237 PCI: 00:1c.4: enabled 0
529 12:40:24.821597 PCI: 00:1c.5: enabled 0
530 12:40:24.825224 PCI: 00:1c.6: enabled 0
531 12:40:24.825653 PCI: 00:1c.7: enabled 1
532 12:40:24.828209 PCI: 00:1e.0: enabled 0
533 12:40:24.831854 PCI: 00:1e.1: enabled 0
534 12:40:24.835061 PCI: 00:1e.2: enabled 1
535 12:40:24.835535 PCI: 00:1e.3: enabled 0
536 12:40:24.838317 PCI: 00:1f.0: enabled 1
537 12:40:24.841511 PCI: 00:1f.1: enabled 1
538 12:40:24.845038 PCI: 00:1f.2: enabled 1
539 12:40:24.845467 PCI: 00:1f.3: enabled 1
540 12:40:24.848278 PCI: 00:1f.4: enabled 0
541 12:40:24.851426 PCI: 00:1f.5: enabled 1
542 12:40:24.851857 PCI: 00:1f.7: enabled 0
543 12:40:24.855133 GENERIC: 0.0: enabled 1
544 12:40:24.858091 GENERIC: 0.0: enabled 1
545 12:40:24.861904 USB0 port 0: enabled 1
546 12:40:24.862332 GENERIC: 0.0: enabled 1
547 12:40:24.865176 I2C: 00:2c: enabled 1
548 12:40:24.868725 I2C: 00:15: enabled 1
549 12:40:24.869149 GENERIC: 0.0: enabled 0
550 12:40:24.872149 I2C: 00:15: enabled 1
551 12:40:24.875063 I2C: 00:10: enabled 0
552 12:40:24.875518 I2C: 00:10: enabled 0
553 12:40:24.878558 I2C: 00:2c: enabled 1
554 12:40:24.882103 I2C: 00:40: enabled 1
555 12:40:24.884588 I2C: 00:10: enabled 1
556 12:40:24.885018 I2C: 00:39: enabled 1
557 12:40:24.888113 I2C: 00:36: enabled 1
558 12:40:24.891588 I2C: 00:10: enabled 0
559 12:40:24.892018 I2C: 00:0c: enabled 1
560 12:40:24.894459 I2C: 00:50: enabled 1
561 12:40:24.898036 I2C: 00:1a: enabled 1
562 12:40:24.898464 I2C: 00:1a: enabled 0
563 12:40:24.901113 I2C: 00:1a: enabled 0
564 12:40:24.904482 I2C: 00:28: enabled 1
565 12:40:24.904909 I2C: 00:29: enabled 1
566 12:40:24.907984 PCI: 00:00.0: enabled 1
567 12:40:24.911255 SPI: 00: enabled 1
568 12:40:24.911734 PNP: 0c09.0: enabled 1
569 12:40:24.914413 GENERIC: 0.0: enabled 0
570 12:40:24.917764 USB2 port 0: enabled 1
571 12:40:24.918193 USB2 port 1: enabled 1
572 12:40:24.921012 USB2 port 2: enabled 1
573 12:40:24.924782 USB2 port 3: enabled 1
574 12:40:24.927670 USB2 port 4: enabled 0
575 12:40:24.928097 USB2 port 5: enabled 1
576 12:40:24.930814 USB2 port 6: enabled 0
577 12:40:24.934372 USB2 port 7: enabled 1
578 12:40:24.934802 USB3 port 0: enabled 1
579 12:40:24.937421 USB3 port 1: enabled 1
580 12:40:24.940872 USB3 port 2: enabled 1
581 12:40:24.944477 USB3 port 3: enabled 1
582 12:40:24.944906 APIC: 00: enabled 1
583 12:40:24.948028 APIC: 02: enabled 1
584 12:40:24.948529 Compare with tree...
585 12:40:24.951256 Root Device: enabled 1
586 12:40:24.954774 CPU_CLUSTER: 0: enabled 1
587 12:40:24.957540 APIC: 00: enabled 1
588 12:40:24.957966 APIC: 02: enabled 1
589 12:40:24.960940 DOMAIN: 0000: enabled 1
590 12:40:24.964061 PCI: 00:00.0: enabled 1
591 12:40:24.967279 PCI: 00:02.0: enabled 1
592 12:40:24.967751 PCI: 00:04.0: enabled 1
593 12:40:24.971788 GENERIC: 0.0: enabled 1
594 12:40:24.974260 PCI: 00:05.0: enabled 1
595 12:40:24.977250 GENERIC: 0.0: enabled 1
596 12:40:24.980896 PCI: 00:09.0: enabled 0
597 12:40:24.981324 PCI: 00:12.6: enabled 0
598 12:40:24.984526 PCI: 00:14.0: enabled 1
599 12:40:24.987433 USB0 port 0: enabled 1
600 12:40:24.991066 USB2 port 0: enabled 1
601 12:40:24.994236 USB2 port 1: enabled 1
602 12:40:24.994685 USB2 port 2: enabled 1
603 12:40:24.997339 USB2 port 3: enabled 1
604 12:40:25.000885 USB2 port 4: enabled 0
605 12:40:25.004474 USB2 port 5: enabled 1
606 12:40:25.007455 USB2 port 6: enabled 0
607 12:40:25.010852 USB2 port 7: enabled 1
608 12:40:25.011297 USB3 port 0: enabled 1
609 12:40:25.014236 USB3 port 1: enabled 1
610 12:40:25.017578 USB3 port 2: enabled 1
611 12:40:25.020605 USB3 port 3: enabled 1
612 12:40:25.024647 PCI: 00:14.1: enabled 0
613 12:40:25.025078 PCI: 00:14.2: enabled 0
614 12:40:25.027658 PCI: 00:14.3: enabled 1
615 12:40:25.031185 GENERIC: 0.0: enabled 1
616 12:40:25.034492 PCI: 00:14.5: enabled 1
617 12:40:25.037436 PCI: 00:15.0: enabled 1
618 12:40:25.037866 I2C: 00:2c: enabled 1
619 12:40:25.040638 I2C: 00:15: enabled 1
620 12:40:25.044141 PCI: 00:15.1: enabled 1
621 12:40:25.047104 PCI: 00:15.2: enabled 1
622 12:40:25.050938 GENERIC: 0.0: enabled 0
623 12:40:25.051400 I2C: 00:15: enabled 1
624 12:40:25.054031 I2C: 00:10: enabled 0
625 12:40:25.057475 I2C: 00:10: enabled 0
626 12:40:25.060918 I2C: 00:2c: enabled 1
627 12:40:25.061346 I2C: 00:40: enabled 1
628 12:40:25.064012 I2C: 00:10: enabled 1
629 12:40:25.067988 I2C: 00:39: enabled 1
630 12:40:25.068415 PCI: 00:15.3: enabled 1
631 12:40:25.071978 I2C: 00:36: enabled 1
632 12:40:25.075298 I2C: 00:10: enabled 0
633 12:40:25.078912 I2C: 00:0c: enabled 1
634 12:40:25.079341 I2C: 00:50: enabled 1
635 12:40:25.081727 PCI: 00:16.0: enabled 1
636 12:40:25.085334 PCI: 00:16.1: enabled 0
637 12:40:25.088815 PCI: 00:16.4: enabled 0
638 12:40:25.089244 PCI: 00:16.5: enabled 0
639 12:40:25.092050 PCI: 00:17.0: enabled 0
640 12:40:25.095485 PCI: 00:19.0: enabled 1
641 12:40:25.098631 I2C: 00:1a: enabled 1
642 12:40:25.101810 I2C: 00:1a: enabled 0
643 12:40:25.102238 I2C: 00:1a: enabled 0
644 12:40:25.105088 I2C: 00:28: enabled 1
645 12:40:25.108349 I2C: 00:29: enabled 1
646 12:40:25.111735 PCI: 00:19.1: enabled 0
647 12:40:25.112156 PCI: 00:19.2: enabled 1
648 12:40:25.114982 PCI: 00:1a.0: enabled 1
649 12:40:25.118231 PCI: 00:1e.0: enabled 0
650 12:40:25.121985 PCI: 00:1e.1: enabled 0
651 12:40:25.125216 PCI: 00:1e.2: enabled 1
652 12:40:25.125644 SPI: 00: enabled 1
653 12:40:25.128436 PCI: 00:1e.3: enabled 0
654 12:40:25.131676 PCI: 00:1f.0: enabled 1
655 12:40:25.134781 PNP: 0c09.0: enabled 1
656 12:40:25.135202 PCI: 00:1f.1: enabled 1
657 12:40:25.138480 PCI: 00:1f.2: enabled 1
658 12:40:25.141588 PCI: 00:1f.3: enabled 1
659 12:40:25.145214 GENERIC: 0.0: enabled 0
660 12:40:25.148116 PCI: 00:1f.4: enabled 0
661 12:40:25.148535 PCI: 00:1f.5: enabled 1
662 12:40:25.151475 PCI: 00:1f.7: enabled 0
663 12:40:25.154832 Root Device scanning...
664 12:40:25.158343 scan_static_bus for Root Device
665 12:40:25.161470 CPU_CLUSTER: 0 enabled
666 12:40:25.161888 DOMAIN: 0000 enabled
667 12:40:25.165008 DOMAIN: 0000 scanning...
668 12:40:25.168003 PCI: pci_scan_bus for bus 00
669 12:40:25.171341 PCI: 00:00.0 [8086/0000] ops
670 12:40:25.175058 PCI: 00:00.0 [8086/4e22] enabled
671 12:40:25.178320 PCI: 00:02.0 [8086/0000] bus ops
672 12:40:25.181704 PCI: 00:02.0 [8086/4e55] enabled
673 12:40:25.185008 PCI: 00:04.0 [8086/0000] bus ops
674 12:40:25.188019 PCI: 00:04.0 [8086/4e03] enabled
675 12:40:25.191331 PCI: 00:05.0 [8086/0000] bus ops
676 12:40:25.195349 PCI: 00:05.0 [8086/4e19] enabled
677 12:40:25.198217 PCI: 00:08.0 [8086/4e11] enabled
678 12:40:25.201654 PCI: 00:14.0 [8086/0000] bus ops
679 12:40:25.204950 PCI: 00:14.0 [8086/4ded] enabled
680 12:40:25.207895 PCI: 00:14.2 [8086/4def] disabled
681 12:40:25.211345 PCI: 00:14.3 [8086/0000] bus ops
682 12:40:25.214769 PCI: 00:14.3 [8086/4df0] enabled
683 12:40:25.218183 PCI: 00:14.5 [8086/0000] ops
684 12:40:25.221390 PCI: 00:14.5 [8086/4df8] enabled
685 12:40:25.224715 PCI: 00:15.0 [8086/0000] bus ops
686 12:40:25.228234 PCI: 00:15.0 [8086/4de8] enabled
687 12:40:25.231531 PCI: 00:15.1 [8086/0000] bus ops
688 12:40:25.234965 PCI: 00:15.1 [8086/4de9] enabled
689 12:40:25.238304 PCI: 00:15.2 [8086/0000] bus ops
690 12:40:25.241477 PCI: 00:15.2 [8086/4dea] enabled
691 12:40:25.244704 PCI: 00:15.3 [8086/0000] bus ops
692 12:40:25.247988 PCI: 00:15.3 [8086/4deb] enabled
693 12:40:25.251526 PCI: 00:16.0 [8086/0000] ops
694 12:40:25.255175 PCI: 00:16.0 [8086/4de0] enabled
695 12:40:25.258134 PCI: 00:19.0 [8086/0000] bus ops
696 12:40:25.261448 PCI: 00:19.0 [8086/4dc5] enabled
697 12:40:25.264653 PCI: 00:19.2 [8086/0000] ops
698 12:40:25.268035 PCI: 00:19.2 [8086/4dc7] enabled
699 12:40:25.271101 PCI: 00:1a.0 [8086/0000] ops
700 12:40:25.274327 PCI: 00:1a.0 [8086/4dc4] enabled
701 12:40:25.274756 PCI: 00:1e.0 [8086/0000] ops
702 12:40:25.277722 PCI: 00:1e.0 [8086/4da8] disabled
703 12:40:25.281550 PCI: 00:1e.2 [8086/0000] bus ops
704 12:40:25.284550 PCI: 00:1e.2 [8086/4daa] enabled
705 12:40:25.288063 PCI: 00:1f.0 [8086/0000] bus ops
706 12:40:25.291163 PCI: 00:1f.0 [8086/4d87] enabled
707 12:40:25.297994 PCI: Static device PCI: 00:1f.1 not found, disabling it.
708 12:40:25.298418 RTC Init
709 12:40:25.304246 Set power on after power failure.
710 12:40:25.304816 Disabling Deep S3
711 12:40:25.307982 Disabling Deep S3
712 12:40:25.308401 Disabling Deep S4
713 12:40:25.311995 Disabling Deep S4
714 12:40:25.312414 Disabling Deep S5
715 12:40:25.314738 Disabling Deep S5
716 12:40:25.317574 PCI: 00:1f.2 [0000/0000] hidden
717 12:40:25.321477 PCI: 00:1f.3 [8086/0000] bus ops
718 12:40:25.324543 PCI: 00:1f.3 [8086/4dc8] enabled
719 12:40:25.327885 PCI: 00:1f.5 [8086/0000] bus ops
720 12:40:25.331196 PCI: 00:1f.5 [8086/4da4] enabled
721 12:40:25.334785 PCI: Leftover static devices:
722 12:40:25.335205 PCI: 00:12.6
723 12:40:25.337754 PCI: 00:09.0
724 12:40:25.338172 PCI: 00:14.1
725 12:40:25.338504 PCI: 00:16.1
726 12:40:25.341023 PCI: 00:16.4
727 12:40:25.341521 PCI: 00:16.5
728 12:40:25.344064 PCI: 00:17.0
729 12:40:25.344482 PCI: 00:19.1
730 12:40:25.344812 PCI: 00:1e.1
731 12:40:25.347494 PCI: 00:1e.3
732 12:40:25.347917 PCI: 00:1f.1
733 12:40:25.351231 PCI: 00:1f.4
734 12:40:25.351733 PCI: 00:1f.7
735 12:40:25.354580 PCI: Check your devicetree.cb.
736 12:40:25.357703 PCI: 00:02.0 scanning...
737 12:40:25.360963 scan_generic_bus for PCI: 00:02.0
738 12:40:25.364683 scan_generic_bus for PCI: 00:02.0 done
739 12:40:25.367557 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
740 12:40:25.371435 PCI: 00:04.0 scanning...
741 12:40:25.374351 scan_generic_bus for PCI: 00:04.0
742 12:40:25.377346 GENERIC: 0.0 enabled
743 12:40:25.384446 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
744 12:40:25.387175 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
745 12:40:25.390973 PCI: 00:05.0 scanning...
746 12:40:25.394253 scan_generic_bus for PCI: 00:05.0
747 12:40:25.397405 GENERIC: 0.0 enabled
748 12:40:25.403818 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
749 12:40:25.407149 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
750 12:40:25.410596 PCI: 00:14.0 scanning...
751 12:40:25.414149 scan_static_bus for PCI: 00:14.0
752 12:40:25.414646 USB0 port 0 enabled
753 12:40:25.417218 USB0 port 0 scanning...
754 12:40:25.420461 scan_static_bus for USB0 port 0
755 12:40:25.423707 USB2 port 0 enabled
756 12:40:25.424127 USB2 port 1 enabled
757 12:40:25.427446 USB2 port 2 enabled
758 12:40:25.430202 USB2 port 3 enabled
759 12:40:25.430696 USB2 port 4 disabled
760 12:40:25.433794 USB2 port 5 enabled
761 12:40:25.437170 USB2 port 6 disabled
762 12:40:25.437767 USB2 port 7 enabled
763 12:40:25.440141 USB3 port 0 enabled
764 12:40:25.440617 USB3 port 1 enabled
765 12:40:25.443915 USB3 port 2 enabled
766 12:40:25.446938 USB3 port 3 enabled
767 12:40:25.447357 USB2 port 0 scanning...
768 12:40:25.450288 scan_static_bus for USB2 port 0
769 12:40:25.457003 scan_static_bus for USB2 port 0 done
770 12:40:25.460546 scan_bus: bus USB2 port 0 finished in 6 msecs
771 12:40:25.463690 USB2 port 1 scanning...
772 12:40:25.467041 scan_static_bus for USB2 port 1
773 12:40:25.470122 scan_static_bus for USB2 port 1 done
774 12:40:25.473487 scan_bus: bus USB2 port 1 finished in 6 msecs
775 12:40:25.477052 USB2 port 2 scanning...
776 12:40:25.480400 scan_static_bus for USB2 port 2
777 12:40:25.483644 scan_static_bus for USB2 port 2 done
778 12:40:25.487053 scan_bus: bus USB2 port 2 finished in 6 msecs
779 12:40:25.490287 USB2 port 3 scanning...
780 12:40:25.494442 scan_static_bus for USB2 port 3
781 12:40:25.497428 scan_static_bus for USB2 port 3 done
782 12:40:25.503663 scan_bus: bus USB2 port 3 finished in 6 msecs
783 12:40:25.504283 USB2 port 5 scanning...
784 12:40:25.506596 scan_static_bus for USB2 port 5
785 12:40:25.513566 scan_static_bus for USB2 port 5 done
786 12:40:25.517002 scan_bus: bus USB2 port 5 finished in 6 msecs
787 12:40:25.520248 USB2 port 7 scanning...
788 12:40:25.523178 scan_static_bus for USB2 port 7
789 12:40:25.526619 scan_static_bus for USB2 port 7 done
790 12:40:25.530292 scan_bus: bus USB2 port 7 finished in 6 msecs
791 12:40:25.533235 USB3 port 0 scanning...
792 12:40:25.536578 scan_static_bus for USB3 port 0
793 12:40:25.540394 scan_static_bus for USB3 port 0 done
794 12:40:25.543231 scan_bus: bus USB3 port 0 finished in 6 msecs
795 12:40:25.546333 USB3 port 1 scanning...
796 12:40:25.549639 scan_static_bus for USB3 port 1
797 12:40:25.553337 scan_static_bus for USB3 port 1 done
798 12:40:25.560231 scan_bus: bus USB3 port 1 finished in 6 msecs
799 12:40:25.560664 USB3 port 2 scanning...
800 12:40:25.563301 scan_static_bus for USB3 port 2
801 12:40:25.569891 scan_static_bus for USB3 port 2 done
802 12:40:25.573197 scan_bus: bus USB3 port 2 finished in 6 msecs
803 12:40:25.576019 USB3 port 3 scanning...
804 12:40:25.579475 scan_static_bus for USB3 port 3
805 12:40:25.583054 scan_static_bus for USB3 port 3 done
806 12:40:25.586455 scan_bus: bus USB3 port 3 finished in 6 msecs
807 12:40:25.589458 scan_static_bus for USB0 port 0 done
808 12:40:25.596088 scan_bus: bus USB0 port 0 finished in 172 msecs
809 12:40:25.600006 scan_static_bus for PCI: 00:14.0 done
810 12:40:25.602899 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
811 12:40:25.606083 PCI: 00:14.3 scanning...
812 12:40:25.609345 scan_static_bus for PCI: 00:14.3
813 12:40:25.613069 GENERIC: 0.0 enabled
814 12:40:25.616367 scan_static_bus for PCI: 00:14.3 done
815 12:40:25.619146 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
816 12:40:25.623089 PCI: 00:15.0 scanning...
817 12:40:25.626236 scan_static_bus for PCI: 00:15.0
818 12:40:25.629315 I2C: 00:2c enabled
819 12:40:25.629764 I2C: 00:15 enabled
820 12:40:25.635578 scan_static_bus for PCI: 00:15.0 done
821 12:40:25.639507 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
822 12:40:25.643310 PCI: 00:15.1 scanning...
823 12:40:25.646749 scan_static_bus for PCI: 00:15.1
824 12:40:25.650367 scan_static_bus for PCI: 00:15.1 done
825 12:40:25.653712 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
826 12:40:25.656953 PCI: 00:15.2 scanning...
827 12:40:25.661512 scan_static_bus for PCI: 00:15.2
828 12:40:25.661938 GENERIC: 0.0 disabled
829 12:40:25.664541 I2C: 00:15 enabled
830 12:40:25.667464 I2C: 00:10 disabled
831 12:40:25.667892 I2C: 00:10 disabled
832 12:40:25.670791 I2C: 00:2c enabled
833 12:40:25.671221 I2C: 00:40 enabled
834 12:40:25.674438 I2C: 00:10 enabled
835 12:40:25.677789 I2C: 00:39 enabled
836 12:40:25.680638 scan_static_bus for PCI: 00:15.2 done
837 12:40:25.684267 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
838 12:40:25.687279 PCI: 00:15.3 scanning...
839 12:40:25.690920 scan_static_bus for PCI: 00:15.3
840 12:40:25.694246 I2C: 00:36 enabled
841 12:40:25.694679 I2C: 00:10 disabled
842 12:40:25.697235 I2C: 00:0c enabled
843 12:40:25.697664 I2C: 00:50 enabled
844 12:40:25.700477 scan_static_bus for PCI: 00:15.3 done
845 12:40:25.707501 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
846 12:40:25.711200 PCI: 00:19.0 scanning...
847 12:40:25.714043 scan_static_bus for PCI: 00:19.0
848 12:40:25.714469 I2C: 00:1a enabled
849 12:40:25.717229 I2C: 00:1a disabled
850 12:40:25.720611 I2C: 00:1a disabled
851 12:40:25.721043 I2C: 00:28 enabled
852 12:40:25.724084 I2C: 00:29 enabled
853 12:40:25.727487 scan_static_bus for PCI: 00:19.0 done
854 12:40:25.730795 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
855 12:40:25.733738 PCI: 00:1e.2 scanning...
856 12:40:25.737278 scan_generic_bus for PCI: 00:1e.2
857 12:40:25.740813 SPI: 00 enabled
858 12:40:25.743726 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
859 12:40:25.750373 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
860 12:40:25.754037 PCI: 00:1f.0 scanning...
861 12:40:25.757249 scan_static_bus for PCI: 00:1f.0
862 12:40:25.757747 PNP: 0c09.0 enabled
863 12:40:25.760323 PNP: 0c09.0 scanning...
864 12:40:25.763796 scan_static_bus for PNP: 0c09.0
865 12:40:25.766930 scan_static_bus for PNP: 0c09.0 done
866 12:40:25.774033 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
867 12:40:25.776948 scan_static_bus for PCI: 00:1f.0 done
868 12:40:25.780633 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
869 12:40:25.784110 PCI: 00:1f.3 scanning...
870 12:40:25.787340 scan_static_bus for PCI: 00:1f.3
871 12:40:25.790189 GENERIC: 0.0 disabled
872 12:40:25.793598 scan_static_bus for PCI: 00:1f.3 done
873 12:40:25.797137 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
874 12:40:25.800342 PCI: 00:1f.5 scanning...
875 12:40:25.803618 scan_generic_bus for PCI: 00:1f.5
876 12:40:25.807322 scan_generic_bus for PCI: 00:1f.5 done
877 12:40:25.813665 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
878 12:40:25.817488 scan_bus: bus DOMAIN: 0000 finished in 647 msecs
879 12:40:25.820384 scan_static_bus for Root Device done
880 12:40:25.827055 scan_bus: bus Root Device finished in 666 msecs
881 12:40:25.827665 done
882 12:40:25.833815 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1086 ms
883 12:40:25.837245 Chrome EC: UHEPI supported
884 12:40:25.840464 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
885 12:40:25.847145 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
886 12:40:25.850350 SPI flash protection: WPSW=0 SRP0=0
887 12:40:25.856890 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
888 12:40:25.864005 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
889 12:40:25.864439 found VGA at PCI: 00:02.0
890 12:40:25.867046 Setting up VGA for PCI: 00:02.0
891 12:40:25.873733 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
892 12:40:25.877651 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
893 12:40:25.880534 Allocating resources...
894 12:40:25.883829 Reading resources...
895 12:40:25.887398 Root Device read_resources bus 0 link: 0
896 12:40:25.890942 CPU_CLUSTER: 0 read_resources bus 0 link: 0
897 12:40:25.897112 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
898 12:40:25.900299 DOMAIN: 0000 read_resources bus 0 link: 0
899 12:40:25.907018 PCI: 00:04.0 read_resources bus 1 link: 0
900 12:40:25.910049 PCI: 00:04.0 read_resources bus 1 link: 0 done
901 12:40:25.917147 PCI: 00:05.0 read_resources bus 2 link: 0
902 12:40:25.919907 PCI: 00:05.0 read_resources bus 2 link: 0 done
903 12:40:25.926810 PCI: 00:14.0 read_resources bus 0 link: 0
904 12:40:25.929765 USB0 port 0 read_resources bus 0 link: 0
905 12:40:25.936552 USB0 port 0 read_resources bus 0 link: 0 done
906 12:40:25.940114 PCI: 00:14.0 read_resources bus 0 link: 0 done
907 12:40:25.946732 PCI: 00:14.3 read_resources bus 0 link: 0
908 12:40:26.003303 PCI: 00:14.3 read_resources bus 0 link: 0 done
909 12:40:26.003808 PCI: 00:15.0 read_resources bus 0 link: 0
910 12:40:26.004158 PCI: 00:15.0 read_resources bus 0 link: 0 done
911 12:40:26.004481 PCI: 00:15.2 read_resources bus 0 link: 0
912 12:40:26.005129 PCI: 00:15.2 read_resources bus 0 link: 0 done
913 12:40:26.005464 PCI: 00:15.3 read_resources bus 0 link: 0
914 12:40:26.005770 PCI: 00:15.3 read_resources bus 0 link: 0 done
915 12:40:26.006195 PCI: 00:19.0 read_resources bus 0 link: 0
916 12:40:26.006640 PCI: 00:19.0 read_resources bus 0 link: 0 done
917 12:40:26.006950 PCI: 00:1e.2 read_resources bus 3 link: 0
918 12:40:26.007245 PCI: 00:1e.2 read_resources bus 3 link: 0 done
919 12:40:26.022573 PCI: 00:1f.0 read_resources bus 0 link: 0
920 12:40:26.023020 PCI: 00:1f.0 read_resources bus 0 link: 0 done
921 12:40:26.023726 PCI: 00:1f.3 read_resources bus 0 link: 0
922 12:40:26.024077 PCI: 00:1f.3 read_resources bus 0 link: 0 done
923 12:40:26.026653 DOMAIN: 0000 read_resources bus 0 link: 0 done
924 12:40:26.029313 Root Device read_resources bus 0 link: 0 done
925 12:40:26.032667 Done reading resources.
926 12:40:26.035940 Show resources in subtree (Root Device)...After reading.
927 12:40:26.042786 Root Device child on link 0 CPU_CLUSTER: 0
928 12:40:26.045715 CPU_CLUSTER: 0 child on link 0 APIC: 00
929 12:40:26.046308 APIC: 00
930 12:40:26.049663 APIC: 02
931 12:40:26.052962 DOMAIN: 0000 child on link 0 PCI: 00:00.0
932 12:40:26.062712 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
933 12:40:26.072882 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
934 12:40:26.073319 PCI: 00:00.0
935 12:40:26.082928 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
936 12:40:26.092310 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
937 12:40:26.102575 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
938 12:40:26.112617 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
939 12:40:26.119127 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
940 12:40:26.129080 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
941 12:40:26.138964 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
942 12:40:26.148982 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
943 12:40:26.159115 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
944 12:40:26.169149 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
945 12:40:26.175260 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
946 12:40:26.185340 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
947 12:40:26.195165 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
948 12:40:26.205167 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
949 12:40:26.211669 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
950 12:40:26.221758 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
951 12:40:26.231930 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
952 12:40:26.241592 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
953 12:40:26.251839 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
954 12:40:26.252351 PCI: 00:02.0
955 12:40:26.264833 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
956 12:40:26.274581 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
957 12:40:26.281587 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
958 12:40:26.288523 PCI: 00:04.0 child on link 0 GENERIC: 0.0
959 12:40:26.298015 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
960 12:40:26.298527 GENERIC: 0.0
961 12:40:26.301151 PCI: 00:05.0 child on link 0 GENERIC: 0.0
962 12:40:26.314788 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 12:40:26.315233 GENERIC: 0.0
964 12:40:26.318504 PCI: 00:08.0
965 12:40:26.325512 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
966 12:40:26.332509 PCI: 00:14.0 child on link 0 USB0 port 0
967 12:40:26.342094 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
968 12:40:26.345577 USB0 port 0 child on link 0 USB2 port 0
969 12:40:26.346000 USB2 port 0
970 12:40:26.348861 USB2 port 1
971 12:40:26.352143 USB2 port 2
972 12:40:26.352566 USB2 port 3
973 12:40:26.355225 USB2 port 4
974 12:40:26.355678 USB2 port 5
975 12:40:26.358863 USB2 port 6
976 12:40:26.359310 USB2 port 7
977 12:40:26.362072 USB3 port 0
978 12:40:26.362507 USB3 port 1
979 12:40:26.365550 USB3 port 2
980 12:40:26.365952 USB3 port 3
981 12:40:26.368555 PCI: 00:14.2
982 12:40:26.372294 PCI: 00:14.3 child on link 0 GENERIC: 0.0
983 12:40:26.382067 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
984 12:40:26.385697 GENERIC: 0.0
985 12:40:26.386282 PCI: 00:14.5
986 12:40:26.395427 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 12:40:26.398589 PCI: 00:15.0 child on link 0 I2C: 00:2c
988 12:40:26.408461 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 12:40:26.411747 I2C: 00:2c
990 12:40:26.412229 I2C: 00:15
991 12:40:26.415948 PCI: 00:15.1
992 12:40:26.425187 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 12:40:26.428571 PCI: 00:15.2 child on link 0 GENERIC: 0.0
994 12:40:26.438924 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 12:40:26.441932 GENERIC: 0.0
996 12:40:26.442354 I2C: 00:15
997 12:40:26.445254 I2C: 00:10
998 12:40:26.445675 I2C: 00:10
999 12:40:26.448255 I2C: 00:2c
1000 12:40:26.448676 I2C: 00:40
1001 12:40:26.451588 I2C: 00:10
1002 12:40:26.452021 I2C: 00:39
1003 12:40:26.455156 PCI: 00:15.3 child on link 0 I2C: 00:36
1004 12:40:26.465305 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 12:40:26.468136 I2C: 00:36
1006 12:40:26.468577 I2C: 00:10
1007 12:40:26.472017 I2C: 00:0c
1008 12:40:26.472442 I2C: 00:50
1009 12:40:26.474998 PCI: 00:16.0
1010 12:40:26.484886 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 12:40:26.488452 PCI: 00:19.0 child on link 0 I2C: 00:1a
1012 12:40:26.498361 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 12:40:26.498841 I2C: 00:1a
1014 12:40:26.501208 I2C: 00:1a
1015 12:40:26.501691 I2C: 00:1a
1016 12:40:26.504756 I2C: 00:28
1017 12:40:26.505194 I2C: 00:29
1018 12:40:26.508424 PCI: 00:19.2
1019 12:40:26.518294 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1020 12:40:26.528054 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1021 12:40:26.531839 PCI: 00:1a.0
1022 12:40:26.541338 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 12:40:26.541768 PCI: 00:1e.0
1024 12:40:26.545044 PCI: 00:1e.2 child on link 0 SPI: 00
1025 12:40:26.554387 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 12:40:26.557645 SPI: 00
1027 12:40:26.561441 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1028 12:40:26.571252 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1029 12:40:26.571722 PNP: 0c09.0
1030 12:40:26.580882 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1031 12:40:26.581308 PCI: 00:1f.2
1032 12:40:26.590747 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1033 12:40:26.600949 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1034 12:40:26.604331 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1035 12:40:26.614053 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 12:40:26.624343 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1037 12:40:26.627488 GENERIC: 0.0
1038 12:40:26.627976 PCI: 00:1f.5
1039 12:40:26.637277 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1040 12:40:26.643883 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1041 12:40:26.653652 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1042 12:40:26.657247 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1043 12:40:26.667330 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1044 12:40:26.673817 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1045 12:40:26.680065 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1046 12:40:26.683521 DOMAIN: 0000: Resource ranges:
1047 12:40:26.687011 * Base: 1000, Size: 800, Tag: 100
1048 12:40:26.690814 * Base: 1900, Size: e700, Tag: 100
1049 12:40:26.696706 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1050 12:40:26.703471 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1051 12:40:26.709937 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1052 12:40:26.716954 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1053 12:40:26.726690 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1054 12:40:26.733183 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1055 12:40:26.739586 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1056 12:40:26.749439 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1057 12:40:26.756495 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1058 12:40:26.763316 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1059 12:40:26.773036 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1060 12:40:26.779305 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1061 12:40:26.785867 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1062 12:40:26.796224 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1063 12:40:26.802813 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1064 12:40:26.809410 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1065 12:40:26.819700 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1066 12:40:26.825739 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1067 12:40:26.832566 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1068 12:40:26.842753 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1069 12:40:26.848994 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1070 12:40:26.855449 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1071 12:40:26.865696 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1072 12:40:26.873056 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1073 12:40:26.875550 DOMAIN: 0000: Resource ranges:
1074 12:40:26.878678 * Base: 7fc00000, Size: 40400000, Tag: 200
1075 12:40:26.885575 * Base: d0000000, Size: 2b000000, Tag: 200
1076 12:40:26.889333 * Base: fb001000, Size: 2fff000, Tag: 200
1077 12:40:26.892521 * Base: fe010000, Size: 22000, Tag: 200
1078 12:40:26.896101 * Base: fe033000, Size: a4d000, Tag: 200
1079 12:40:26.899488 * Base: fea88000, Size: 2f8000, Tag: 200
1080 12:40:26.906007 * Base: fed88000, Size: 8000, Tag: 200
1081 12:40:26.909468 * Base: fed93000, Size: d000, Tag: 200
1082 12:40:26.912593 * Base: feda2000, Size: 125e000, Tag: 200
1083 12:40:26.919427 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1084 12:40:26.926308 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1085 12:40:26.932933 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1086 12:40:26.939703 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1087 12:40:26.945866 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1088 12:40:26.952488 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1089 12:40:26.959231 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1090 12:40:26.965709 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1091 12:40:26.973170 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1092 12:40:26.979412 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1093 12:40:26.986151 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1094 12:40:26.992315 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1095 12:40:26.998786 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1096 12:40:27.005508 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1097 12:40:27.012007 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1098 12:40:27.018704 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1099 12:40:27.025423 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1100 12:40:27.032207 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1101 12:40:27.038576 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1102 12:40:27.045337 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1103 12:40:27.052135 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1104 12:40:27.059156 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1105 12:40:27.066602 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1106 12:40:27.068794 Root Device assign_resources, bus 0 link: 0
1107 12:40:27.075590 DOMAIN: 0000 assign_resources, bus 0 link: 0
1108 12:40:27.082341 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1109 12:40:27.092355 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1110 12:40:27.098469 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1111 12:40:27.105029 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1112 12:40:27.111605 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 12:40:27.115441 PCI: 00:04.0 assign_resources, bus 1 link: 0
1114 12:40:27.125062 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1115 12:40:27.128557 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 12:40:27.131598 PCI: 00:05.0 assign_resources, bus 2 link: 0
1117 12:40:27.141734 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1118 12:40:27.148272 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1119 12:40:27.154632 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 12:40:27.158586 PCI: 00:14.0 assign_resources, bus 0 link: 0
1121 12:40:27.168177 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1122 12:40:27.171188 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 12:40:27.175152 PCI: 00:14.3 assign_resources, bus 0 link: 0
1124 12:40:27.184954 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1125 12:40:27.191280 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1126 12:40:27.198065 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 12:40:27.201802 PCI: 00:15.0 assign_resources, bus 0 link: 0
1128 12:40:27.208010 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1129 12:40:27.217803 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1130 12:40:27.221090 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 12:40:27.228943 PCI: 00:15.2 assign_resources, bus 0 link: 0
1132 12:40:27.234762 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1133 12:40:27.238433 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 12:40:27.244655 PCI: 00:15.3 assign_resources, bus 0 link: 0
1135 12:40:27.251105 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1136 12:40:27.261013 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1137 12:40:27.264698 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 12:40:27.270988 PCI: 00:19.0 assign_resources, bus 0 link: 0
1139 12:40:27.277671 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1140 12:40:27.284514 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1141 12:40:27.294552 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1142 12:40:27.297876 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 12:40:27.304661 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1144 12:40:27.307668 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 12:40:27.310875 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1146 12:40:27.318020 LPC: Trying to open IO window from 800 size 1ff
1147 12:40:27.324543 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1148 12:40:27.334200 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1149 12:40:27.337576 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 12:40:27.344142 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1151 12:40:27.351175 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1152 12:40:27.354531 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 12:40:27.360808 Root Device assign_resources, bus 0 link: 0
1154 12:40:27.364153 Done setting resources.
1155 12:40:27.370773 Show resources in subtree (Root Device)...After assigning values.
1156 12:40:27.374324 Root Device child on link 0 CPU_CLUSTER: 0
1157 12:40:27.377613 CPU_CLUSTER: 0 child on link 0 APIC: 00
1158 12:40:27.378009 APIC: 00
1159 12:40:27.380716 APIC: 02
1160 12:40:27.384076 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1161 12:40:27.394137 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1162 12:40:27.403864 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1163 12:40:27.404245 PCI: 00:00.0
1164 12:40:27.413862 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1165 12:40:27.423699 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1166 12:40:27.433477 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1167 12:40:27.443701 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1168 12:40:27.453491 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1169 12:40:27.460070 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1170 12:40:27.470186 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1171 12:40:27.480389 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1172 12:40:27.490319 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1173 12:40:27.500321 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1174 12:40:27.510318 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1175 12:40:27.516661 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1176 12:40:27.526591 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1177 12:40:27.536419 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1178 12:40:27.546987 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1179 12:40:27.553490 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1180 12:40:27.563458 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1181 12:40:27.573407 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1182 12:40:27.582845 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1183 12:40:27.586988 PCI: 00:02.0
1184 12:40:27.596110 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1185 12:40:27.606455 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1186 12:40:27.616176 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1187 12:40:27.619513 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 12:40:27.629760 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1189 12:40:27.633099 GENERIC: 0.0
1190 12:40:27.636101 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1191 12:40:27.645966 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1192 12:40:27.649357 GENERIC: 0.0
1193 12:40:27.649803 PCI: 00:08.0
1194 12:40:27.659455 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1195 12:40:27.666031 PCI: 00:14.0 child on link 0 USB0 port 0
1196 12:40:27.675560 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1197 12:40:27.678925 USB0 port 0 child on link 0 USB2 port 0
1198 12:40:27.682623 USB2 port 0
1199 12:40:27.683023 USB2 port 1
1200 12:40:27.685668 USB2 port 2
1201 12:40:27.686079 USB2 port 3
1202 12:40:27.688887 USB2 port 4
1203 12:40:27.689290 USB2 port 5
1204 12:40:27.692479 USB2 port 6
1205 12:40:27.695732 USB2 port 7
1206 12:40:27.696106 USB3 port 0
1207 12:40:27.699627 USB3 port 1
1208 12:40:27.700026 USB3 port 2
1209 12:40:27.702141 USB3 port 3
1210 12:40:27.702516 PCI: 00:14.2
1211 12:40:27.708833 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1212 12:40:27.719307 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1213 12:40:27.719810 GENERIC: 0.0
1214 12:40:27.721978 PCI: 00:14.5
1215 12:40:27.732259 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1216 12:40:27.735272 PCI: 00:15.0 child on link 0 I2C: 00:2c
1217 12:40:27.745889 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1218 12:40:27.748407 I2C: 00:2c
1219 12:40:27.748810 I2C: 00:15
1220 12:40:27.751842 PCI: 00:15.1
1221 12:40:27.762103 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1222 12:40:27.765333 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1223 12:40:27.775175 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1224 12:40:27.778432 GENERIC: 0.0
1225 12:40:27.778846 I2C: 00:15
1226 12:40:27.781472 I2C: 00:10
1227 12:40:27.781923 I2C: 00:10
1228 12:40:27.785167 I2C: 00:2c
1229 12:40:27.785587 I2C: 00:40
1230 12:40:27.788529 I2C: 00:10
1231 12:40:27.788948 I2C: 00:39
1232 12:40:27.791970 PCI: 00:15.3 child on link 0 I2C: 00:36
1233 12:40:27.801611 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1234 12:40:27.804954 I2C: 00:36
1235 12:40:27.805376 I2C: 00:10
1236 12:40:27.808113 I2C: 00:0c
1237 12:40:27.808534 I2C: 00:50
1238 12:40:27.811318 PCI: 00:16.0
1239 12:40:27.822096 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1240 12:40:27.824911 PCI: 00:19.0 child on link 0 I2C: 00:1a
1241 12:40:27.834979 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1242 12:40:27.837840 I2C: 00:1a
1243 12:40:27.838258 I2C: 00:1a
1244 12:40:27.841161 I2C: 00:1a
1245 12:40:27.841596 I2C: 00:28
1246 12:40:27.844538 I2C: 00:29
1247 12:40:27.844957 PCI: 00:19.2
1248 12:40:27.857826 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 12:40:27.868172 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1250 12:40:27.868798 PCI: 00:1a.0
1251 12:40:27.877887 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1252 12:40:27.881554 PCI: 00:1e.0
1253 12:40:27.884743 PCI: 00:1e.2 child on link 0 SPI: 00
1254 12:40:27.894122 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1255 12:40:27.897785 SPI: 00
1256 12:40:27.901007 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1257 12:40:27.907551 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1258 12:40:27.910826 PNP: 0c09.0
1259 12:40:27.920850 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1260 12:40:27.921308 PCI: 00:1f.2
1261 12:40:27.930693 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1262 12:40:27.940635 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1263 12:40:27.944392 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1264 12:40:27.954245 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1265 12:40:27.963814 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1266 12:40:27.966946 GENERIC: 0.0
1267 12:40:27.967499 PCI: 00:1f.5
1268 12:40:27.977410 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1269 12:40:27.980215 Done allocating resources.
1270 12:40:27.987564 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2099 ms
1271 12:40:27.990611 Enabling resources...
1272 12:40:27.993783 PCI: 00:00.0 subsystem <- 8086/4e22
1273 12:40:27.996935 PCI: 00:00.0 cmd <- 06
1274 12:40:28.000606 PCI: 00:02.0 subsystem <- 8086/4e55
1275 12:40:28.003451 PCI: 00:02.0 cmd <- 03
1276 12:40:28.007033 PCI: 00:04.0 subsystem <- 8086/4e03
1277 12:40:28.010690 PCI: 00:04.0 cmd <- 02
1278 12:40:28.013742 PCI: 00:05.0 bridge ctrl <- 0003
1279 12:40:28.017009 PCI: 00:05.0 subsystem <- 8086/4e19
1280 12:40:28.017648 PCI: 00:05.0 cmd <- 02
1281 12:40:28.020084 PCI: 00:08.0 cmd <- 06
1282 12:40:28.023731 PCI: 00:14.0 subsystem <- 8086/4ded
1283 12:40:28.026942 PCI: 00:14.0 cmd <- 02
1284 12:40:28.030415 PCI: 00:14.3 subsystem <- 8086/4df0
1285 12:40:28.033857 PCI: 00:14.3 cmd <- 02
1286 12:40:28.036904 PCI: 00:14.5 subsystem <- 8086/4df8
1287 12:40:28.040617 PCI: 00:14.5 cmd <- 06
1288 12:40:28.043484 PCI: 00:15.0 subsystem <- 8086/4de8
1289 12:40:28.046885 PCI: 00:15.0 cmd <- 02
1290 12:40:28.050397 PCI: 00:15.1 subsystem <- 8086/4de9
1291 12:40:28.050820 PCI: 00:15.1 cmd <- 02
1292 12:40:28.057028 PCI: 00:15.2 subsystem <- 8086/4dea
1293 12:40:28.057451 PCI: 00:15.2 cmd <- 02
1294 12:40:28.059979 PCI: 00:15.3 subsystem <- 8086/4deb
1295 12:40:28.063634 PCI: 00:15.3 cmd <- 02
1296 12:40:28.066481 PCI: 00:16.0 subsystem <- 8086/4de0
1297 12:40:28.069872 PCI: 00:16.0 cmd <- 02
1298 12:40:28.073454 PCI: 00:19.0 subsystem <- 8086/4dc5
1299 12:40:28.076309 PCI: 00:19.0 cmd <- 02
1300 12:40:28.080170 PCI: 00:19.2 subsystem <- 8086/4dc7
1301 12:40:28.083183 PCI: 00:19.2 cmd <- 06
1302 12:40:28.086575 PCI: 00:1a.0 subsystem <- 8086/4dc4
1303 12:40:28.089837 PCI: 00:1a.0 cmd <- 06
1304 12:40:28.093516 PCI: 00:1e.2 subsystem <- 8086/4daa
1305 12:40:28.093939 PCI: 00:1e.2 cmd <- 06
1306 12:40:28.099924 PCI: 00:1f.0 subsystem <- 8086/4d87
1307 12:40:28.100371 PCI: 00:1f.0 cmd <- 407
1308 12:40:28.103354 PCI: 00:1f.3 subsystem <- 8086/4dc8
1309 12:40:28.106267 PCI: 00:1f.3 cmd <- 02
1310 12:40:28.110212 PCI: 00:1f.5 subsystem <- 8086/4da4
1311 12:40:28.113189 PCI: 00:1f.5 cmd <- 406
1312 12:40:28.117372 done.
1313 12:40:28.121108 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1314 12:40:28.124230 Initializing devices...
1315 12:40:28.127423 Root Device init
1316 12:40:28.127888 mainboard: EC init
1317 12:40:28.134047 Chrome EC: Set SMI mask to 0x0000000000000000
1318 12:40:28.137153 Chrome EC: clear events_b mask to 0x0000000000000000
1319 12:40:28.144413 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1320 12:40:28.150723 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1321 12:40:28.157660 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1322 12:40:28.160527 Chrome EC: Set WAKE mask to 0x0000000000000000
1323 12:40:28.168656 Root Device init finished in 37 msecs
1324 12:40:28.171842 PCI: 00:00.0 init
1325 12:40:28.172342 CPU TDP = 6 Watts
1326 12:40:28.174807 CPU PL1 = 7 Watts
1327 12:40:28.178495 CPU PL2 = 12 Watts
1328 12:40:28.181863 PCI: 00:00.0 init finished in 6 msecs
1329 12:40:28.182368 PCI: 00:02.0 init
1330 12:40:28.184843 GMA: Found VBT in CBFS
1331 12:40:28.188405 GMA: Found valid VBT in CBFS
1332 12:40:28.194861 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1333 12:40:28.201498 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1334 12:40:28.204987 PCI: 00:02.0 init finished in 18 msecs
1335 12:40:28.208586 PCI: 00:08.0 init
1336 12:40:28.211808 PCI: 00:08.0 init finished in 0 msecs
1337 12:40:28.214876 PCI: 00:14.0 init
1338 12:40:28.218321 XHCI: Updated LFPS sampling OFF time to 9 ms
1339 12:40:28.221773 PCI: 00:14.0 init finished in 4 msecs
1340 12:40:28.224891 PCI: 00:15.0 init
1341 12:40:28.228496 I2C bus 0 version 0x3230302a
1342 12:40:28.231471 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1343 12:40:28.235190 PCI: 00:15.0 init finished in 6 msecs
1344 12:40:28.238173 PCI: 00:15.1 init
1345 12:40:28.241884 I2C bus 1 version 0x3230302a
1346 12:40:28.245065 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1347 12:40:28.248091 PCI: 00:15.1 init finished in 6 msecs
1348 12:40:28.251321 PCI: 00:15.2 init
1349 12:40:28.251861 I2C bus 2 version 0x3230302a
1350 12:40:28.258412 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1351 12:40:28.261360 PCI: 00:15.2 init finished in 6 msecs
1352 12:40:28.261839 PCI: 00:15.3 init
1353 12:40:28.264750 I2C bus 3 version 0x3230302a
1354 12:40:28.267992 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1355 12:40:28.271244 PCI: 00:15.3 init finished in 6 msecs
1356 12:40:28.275072 PCI: 00:16.0 init
1357 12:40:28.278526 PCI: 00:16.0 init finished in 0 msecs
1358 12:40:28.281518 PCI: 00:19.0 init
1359 12:40:28.285312 I2C bus 4 version 0x3230302a
1360 12:40:28.288423 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1361 12:40:28.291737 PCI: 00:19.0 init finished in 6 msecs
1362 12:40:28.295261 PCI: 00:1a.0 init
1363 12:40:28.297939 PCI: 00:1a.0 init finished in 0 msecs
1364 12:40:28.301161 PCI: 00:1f.0 init
1365 12:40:28.305258 IOAPIC: Initializing IOAPIC at 0xfec00000
1366 12:40:28.307852 IOAPIC: Bootstrap Processor Local APIC = 0x00
1367 12:40:28.311700 IOAPIC: ID = 0x02
1368 12:40:28.315032 IOAPIC: Dumping registers
1369 12:40:28.315489 reg 0x0000: 0x02000000
1370 12:40:28.318007 reg 0x0001: 0x00770020
1371 12:40:28.321376 reg 0x0002: 0x00000000
1372 12:40:28.325044 PCI: 00:1f.0 init finished in 21 msecs
1373 12:40:28.327795 PCI: 00:1f.2 init
1374 12:40:28.331473 Disabling ACPI via APMC.
1375 12:40:28.331913 APMC done.
1376 12:40:28.338049 PCI: 00:1f.2 init finished in 5 msecs
1377 12:40:28.347767 PNP: 0c09.0 init
1378 12:40:28.351099 Google Chrome EC uptime: 6.613 seconds
1379 12:40:28.357661 Google Chrome AP resets since EC boot: 0
1380 12:40:28.361134 Google Chrome most recent AP reset causes:
1381 12:40:28.368175 Google Chrome EC reset flags at last EC boot: reset-pin
1382 12:40:28.371107 PNP: 0c09.0 init finished in 18 msecs
1383 12:40:28.371667 Devices initialized
1384 12:40:28.375206 Show all devs... After init.
1385 12:40:28.377829 Root Device: enabled 1
1386 12:40:28.381456 CPU_CLUSTER: 0: enabled 1
1387 12:40:28.384521 DOMAIN: 0000: enabled 1
1388 12:40:28.385097 PCI: 00:00.0: enabled 1
1389 12:40:28.387571 PCI: 00:02.0: enabled 1
1390 12:40:28.391546 PCI: 00:04.0: enabled 1
1391 12:40:28.391988 PCI: 00:05.0: enabled 1
1392 12:40:28.394455 PCI: 00:09.0: enabled 0
1393 12:40:28.398078 PCI: 00:12.6: enabled 0
1394 12:40:28.400635 PCI: 00:14.0: enabled 1
1395 12:40:28.401052 PCI: 00:14.1: enabled 0
1396 12:40:28.403890 PCI: 00:14.2: enabled 0
1397 12:40:28.407826 PCI: 00:14.3: enabled 1
1398 12:40:28.411097 PCI: 00:14.5: enabled 1
1399 12:40:28.411537 PCI: 00:15.0: enabled 1
1400 12:40:28.414341 PCI: 00:15.1: enabled 1
1401 12:40:28.417572 PCI: 00:15.2: enabled 1
1402 12:40:28.421284 PCI: 00:15.3: enabled 1
1403 12:40:28.421786 PCI: 00:16.0: enabled 1
1404 12:40:28.424341 PCI: 00:16.1: enabled 0
1405 12:40:28.427670 PCI: 00:16.4: enabled 0
1406 12:40:28.431274 PCI: 00:16.5: enabled 0
1407 12:40:28.431736 PCI: 00:17.0: enabled 0
1408 12:40:28.434007 PCI: 00:19.0: enabled 1
1409 12:40:28.437502 PCI: 00:19.1: enabled 0
1410 12:40:28.437920 PCI: 00:19.2: enabled 1
1411 12:40:28.440710 PCI: 00:1a.0: enabled 1
1412 12:40:28.444162 PCI: 00:1c.0: enabled 0
1413 12:40:28.447473 PCI: 00:1c.1: enabled 0
1414 12:40:28.447891 PCI: 00:1c.2: enabled 0
1415 12:40:28.450968 PCI: 00:1c.3: enabled 0
1416 12:40:28.453942 PCI: 00:1c.4: enabled 0
1417 12:40:28.457396 PCI: 00:1c.5: enabled 0
1418 12:40:28.457812 PCI: 00:1c.6: enabled 0
1419 12:40:28.460563 PCI: 00:1c.7: enabled 1
1420 12:40:28.463432 PCI: 00:1e.0: enabled 0
1421 12:40:28.467029 PCI: 00:1e.1: enabled 0
1422 12:40:28.467541 PCI: 00:1e.2: enabled 1
1423 12:40:28.470452 PCI: 00:1e.3: enabled 0
1424 12:40:28.474171 PCI: 00:1f.0: enabled 1
1425 12:40:28.477251 PCI: 00:1f.1: enabled 0
1426 12:40:28.477682 PCI: 00:1f.2: enabled 1
1427 12:40:28.480164 PCI: 00:1f.3: enabled 1
1428 12:40:28.483837 PCI: 00:1f.4: enabled 0
1429 12:40:28.484336 PCI: 00:1f.5: enabled 1
1430 12:40:28.486947 PCI: 00:1f.7: enabled 0
1431 12:40:28.490496 GENERIC: 0.0: enabled 1
1432 12:40:28.493847 GENERIC: 0.0: enabled 1
1433 12:40:28.494347 USB0 port 0: enabled 1
1434 12:40:28.496916 GENERIC: 0.0: enabled 1
1435 12:40:28.499868 I2C: 00:2c: enabled 1
1436 12:40:28.500290 I2C: 00:15: enabled 1
1437 12:40:28.503690 GENERIC: 0.0: enabled 0
1438 12:40:28.506640 I2C: 00:15: enabled 1
1439 12:40:28.510310 I2C: 00:10: enabled 0
1440 12:40:28.510731 I2C: 00:10: enabled 0
1441 12:40:28.513240 I2C: 00:2c: enabled 1
1442 12:40:28.516931 I2C: 00:40: enabled 1
1443 12:40:28.517352 I2C: 00:10: enabled 1
1444 12:40:28.520169 I2C: 00:39: enabled 1
1445 12:40:28.523469 I2C: 00:36: enabled 1
1446 12:40:28.523891 I2C: 00:10: enabled 0
1447 12:40:28.526731 I2C: 00:0c: enabled 1
1448 12:40:28.530310 I2C: 00:50: enabled 1
1449 12:40:28.530736 I2C: 00:1a: enabled 1
1450 12:40:28.533368 I2C: 00:1a: enabled 0
1451 12:40:28.536938 I2C: 00:1a: enabled 0
1452 12:40:28.537358 I2C: 00:28: enabled 1
1453 12:40:28.539857 I2C: 00:29: enabled 1
1454 12:40:28.543523 PCI: 00:00.0: enabled 1
1455 12:40:28.543951 SPI: 00: enabled 1
1456 12:40:28.546384 PNP: 0c09.0: enabled 1
1457 12:40:28.549810 GENERIC: 0.0: enabled 0
1458 12:40:28.550230 USB2 port 0: enabled 1
1459 12:40:28.553238 USB2 port 1: enabled 1
1460 12:40:28.557037 USB2 port 2: enabled 1
1461 12:40:28.560381 USB2 port 3: enabled 1
1462 12:40:28.560841 USB2 port 4: enabled 0
1463 12:40:28.563163 USB2 port 5: enabled 1
1464 12:40:28.566408 USB2 port 6: enabled 0
1465 12:40:28.566895 USB2 port 7: enabled 1
1466 12:40:28.570083 USB3 port 0: enabled 1
1467 12:40:28.573026 USB3 port 1: enabled 1
1468 12:40:28.573501 USB3 port 2: enabled 1
1469 12:40:28.576428 USB3 port 3: enabled 1
1470 12:40:28.579985 APIC: 00: enabled 1
1471 12:40:28.580408 APIC: 02: enabled 1
1472 12:40:28.583283 PCI: 00:08.0: enabled 1
1473 12:40:28.590432 BS: BS_DEV_INIT run times (exec / console): 24 / 438 ms
1474 12:40:28.593167 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1475 12:40:28.596586 ELOG: NV offset 0xbfa000 size 0x1000
1476 12:40:28.604659 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1477 12:40:28.611292 ELOG: Event(17) added with size 13 at 2024-01-03 12:40:25 UTC
1478 12:40:28.618112 ELOG: Event(92) added with size 9 at 2024-01-03 12:40:25 UTC
1479 12:40:28.624830 ELOG: Event(93) added with size 9 at 2024-01-03 12:40:25 UTC
1480 12:40:28.631706 ELOG: Event(9E) added with size 10 at 2024-01-03 12:40:25 UTC
1481 12:40:28.638159 ELOG: Event(9F) added with size 14 at 2024-01-03 12:40:25 UTC
1482 12:40:28.641234 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1483 12:40:28.648020 ELOG: Event(A1) added with size 10 at 2024-01-03 12:40:25 UTC
1484 12:40:28.657982 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1485 12:40:28.661600 ELOG: Event(A0) added with size 9 at 2024-01-03 12:40:25 UTC
1486 12:40:28.668368 elog_add_boot_reason: Logged dev mode boot
1487 12:40:28.674846 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1488 12:40:28.675296 Finalize devices...
1489 12:40:28.677805 Devices finalized
1490 12:40:28.681375 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1491 12:40:28.688233 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1492 12:40:28.694332 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1493 12:40:28.697925 ME: HFSTS1 : 0x80030045
1494 12:40:28.701629 ME: HFSTS2 : 0x30280136
1495 12:40:28.704402 ME: HFSTS3 : 0x00000050
1496 12:40:28.711298 ME: HFSTS4 : 0x00004000
1497 12:40:28.714840 ME: HFSTS5 : 0x00000000
1498 12:40:28.717759 ME: HFSTS6 : 0x40400006
1499 12:40:28.721247 ME: Manufacturing Mode : NO
1500 12:40:28.724550 ME: FW Partition Table : OK
1501 12:40:28.727533 ME: Bringup Loader Failure : NO
1502 12:40:28.731577 ME: Firmware Init Complete : NO
1503 12:40:28.734580 ME: Boot Options Present : NO
1504 12:40:28.738307 ME: Update In Progress : NO
1505 12:40:28.741187 ME: D0i3 Support : YES
1506 12:40:28.744525 ME: Low Power State Enabled : NO
1507 12:40:28.747542 ME: CPU Replaced : YES
1508 12:40:28.750948 ME: CPU Replacement Valid : YES
1509 12:40:28.754087 ME: Current Working State : 5
1510 12:40:28.757593 ME: Current Operation State : 1
1511 12:40:28.761055 ME: Current Operation Mode : 3
1512 12:40:28.764577 ME: Error Code : 0
1513 12:40:28.767625 ME: CPU Debug Disabled : YES
1514 12:40:28.771150 ME: TXT Support : NO
1515 12:40:28.778100 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 78 ms
1516 12:40:28.780964 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1517 12:40:28.787982 ACPI: Writing ACPI tables at 76b27000.
1518 12:40:28.788405 ACPI: * FACS
1519 12:40:28.791528 ACPI: * DSDT
1520 12:40:28.794488 Ramoops buffer: 0x100000@0x76a26000.
1521 12:40:28.798260 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1522 12:40:28.804447 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1523 12:40:28.807998 Google Chrome EC: version:
1524 12:40:28.811144 ro: magolor_1.1.9999-103b6f9
1525 12:40:28.814887 rw: magolor_1.1.9999-103b6f9
1526 12:40:28.815304 running image: 1
1527 12:40:28.820983 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1528 12:40:28.825633 ACPI: * FADT
1529 12:40:28.826051 SCI is IRQ9
1530 12:40:28.831898 ACPI: added table 1/32, length now 40
1531 12:40:28.832375 ACPI: * SSDT
1532 12:40:28.835063 Found 1 CPU(s) with 2 core(s) each.
1533 12:40:28.838389 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1534 12:40:28.845103 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1535 12:40:28.847976 Could not locate 'wifi_sar' in VPD.
1536 12:40:28.851480 Checking CBFS for default SAR values
1537 12:40:28.858279 wifi_sar_defaults.hex has bad len in CBFS
1538 12:40:28.861764 failed from getting SAR limits!
1539 12:40:28.865034 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1540 12:40:28.872006 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1541 12:40:28.874658 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1542 12:40:28.881459 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1543 12:40:28.885051 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1544 12:40:28.891696 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1545 12:40:28.894575 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1546 12:40:28.901285 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1547 12:40:28.907883 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1548 12:40:28.914617 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1549 12:40:28.917919 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1550 12:40:28.925109 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1551 12:40:28.931314 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1552 12:40:28.934810 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1553 12:40:28.938674 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1554 12:40:28.946432 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1555 12:40:28.950612 PS2K: Passing 101 keymaps to kernel
1556 12:40:28.956401 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1557 12:40:28.963360 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1558 12:40:28.966922 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1559 12:40:28.973371 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1560 12:40:28.976844 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1561 12:40:28.983043 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1562 12:40:28.989721 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1563 12:40:28.996177 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1564 12:40:28.999809 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1565 12:40:29.005984 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1566 12:40:29.009378 ACPI: added table 2/32, length now 44
1567 12:40:29.012758 ACPI: * MCFG
1568 12:40:29.016201 ACPI: added table 3/32, length now 48
1569 12:40:29.016693 ACPI: * TPM2
1570 12:40:29.019351 TPM2 log created at 0x76a16000
1571 12:40:29.022756 ACPI: added table 4/32, length now 52
1572 12:40:29.025841 ACPI: * MADT
1573 12:40:29.026268 SCI is IRQ9
1574 12:40:29.029400 ACPI: added table 5/32, length now 56
1575 12:40:29.032561 current = 76b2d580
1576 12:40:29.036157 ACPI: * DMAR
1577 12:40:29.039616 ACPI: added table 6/32, length now 60
1578 12:40:29.042645 ACPI: added table 7/32, length now 64
1579 12:40:29.043122 ACPI: * HPET
1580 12:40:29.050423 ACPI: added table 8/32, length now 68
1581 12:40:29.050849 ACPI: done.
1582 12:40:29.052723 ACPI tables: 26304 bytes.
1583 12:40:29.056534 smbios_write_tables: 76a15000
1584 12:40:29.059231 EC returned error result code 3
1585 12:40:29.062535 Couldn't obtain OEM name from CBI
1586 12:40:29.066064 Create SMBIOS type 16
1587 12:40:29.066507 Create SMBIOS type 17
1588 12:40:29.068947 GENERIC: 0.0 (WIFI Device)
1589 12:40:29.072697 SMBIOS tables: 913 bytes.
1590 12:40:29.075710 Writing table forward entry at 0x00000500
1591 12:40:29.082283 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1592 12:40:29.086022 Writing coreboot table at 0x76b4b000
1593 12:40:29.092666 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1594 12:40:29.095907 1. 0000000000001000-000000000009ffff: RAM
1595 12:40:29.102604 2. 00000000000a0000-00000000000fffff: RESERVED
1596 12:40:29.105996 3. 0000000000100000-0000000076a14fff: RAM
1597 12:40:29.112789 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1598 12:40:29.116132 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1599 12:40:29.122791 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1600 12:40:29.125703 7. 0000000077000000-000000007fbfffff: RESERVED
1601 12:40:29.132752 8. 00000000c0000000-00000000cfffffff: RESERVED
1602 12:40:29.136144 9. 00000000fb000000-00000000fb000fff: RESERVED
1603 12:40:29.142705 10. 00000000fe000000-00000000fe00ffff: RESERVED
1604 12:40:29.145769 11. 00000000fea80000-00000000fea87fff: RESERVED
1605 12:40:29.152635 12. 00000000fed80000-00000000fed87fff: RESERVED
1606 12:40:29.156295 13. 00000000fed90000-00000000fed92fff: RESERVED
1607 12:40:29.159100 14. 00000000feda0000-00000000feda1fff: RESERVED
1608 12:40:29.165701 15. 0000000100000000-00000001803fffff: RAM
1609 12:40:29.169411 Passing 4 GPIOs to payload:
1610 12:40:29.172844 NAME | PORT | POLARITY | VALUE
1611 12:40:29.178677 lid | undefined | high | high
1612 12:40:29.182146 power | undefined | high | low
1613 12:40:29.189003 oprom | undefined | high | low
1614 12:40:29.195736 EC in RW | 0x000000b9 | high | low
1615 12:40:29.199352 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum f2e0
1616 12:40:29.202147 coreboot table: 1504 bytes.
1617 12:40:29.205336 IMD ROOT 0. 0x76fff000 0x00001000
1618 12:40:29.211923 IMD SMALL 1. 0x76ffe000 0x00001000
1619 12:40:29.215737 FSP MEMORY 2. 0x76c4e000 0x003b0000
1620 12:40:29.219047 CONSOLE 3. 0x76c2e000 0x00020000
1621 12:40:29.222105 FMAP 4. 0x76c2d000 0x00000578
1622 12:40:29.225768 TIME STAMP 5. 0x76c2c000 0x00000910
1623 12:40:29.228805 VBOOT WORK 6. 0x76c18000 0x00014000
1624 12:40:29.232104 ROMSTG STCK 7. 0x76c17000 0x00001000
1625 12:40:29.235695 AFTER CAR 8. 0x76c0d000 0x0000a000
1626 12:40:29.238572 RAMSTAGE 9. 0x76ba7000 0x00066000
1627 12:40:29.245512 REFCODE 10. 0x76b67000 0x00040000
1628 12:40:29.248731 SMM BACKUP 11. 0x76b57000 0x00010000
1629 12:40:29.251842 4f444749 12. 0x76b55000 0x00002000
1630 12:40:29.255850 EXT VBT13. 0x76b53000 0x00001c43
1631 12:40:29.258655 COREBOOT 14. 0x76b4b000 0x00008000
1632 12:40:29.261669 ACPI 15. 0x76b27000 0x00024000
1633 12:40:29.265129 ACPI GNVS 16. 0x76b26000 0x00001000
1634 12:40:29.268759 RAMOOPS 17. 0x76a26000 0x00100000
1635 12:40:29.271873 TPM2 TCGLOG18. 0x76a16000 0x00010000
1636 12:40:29.278863 SMBIOS 19. 0x76a15000 0x00000800
1637 12:40:29.279283 IMD small region:
1638 12:40:29.281900 IMD ROOT 0. 0x76ffec00 0x00000400
1639 12:40:29.284903 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1640 12:40:29.292148 VPD 2. 0x76ffeb60 0x0000006c
1641 12:40:29.295114 POWER STATE 3. 0x76ffeb20 0x00000040
1642 12:40:29.298652 ROMSTAGE 4. 0x76ffeb00 0x00000004
1643 12:40:29.302121 MEM INFO 5. 0x76ffe920 0x000001e0
1644 12:40:29.308547 BS: BS_WRITE_TABLES run times (exec / console): 8 / 517 ms
1645 12:40:29.311562 MTRR: Physical address space:
1646 12:40:29.318674 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1647 12:40:29.325254 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1648 12:40:29.328633 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1649 12:40:29.335308 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1650 12:40:29.342081 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1651 12:40:29.348115 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1652 12:40:29.354978 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1653 12:40:29.358057 MTRR: Fixed MSR 0x250 0x0606060606060606
1654 12:40:29.361350 MTRR: Fixed MSR 0x258 0x0606060606060606
1655 12:40:29.368265 MTRR: Fixed MSR 0x259 0x0000000000000000
1656 12:40:29.371880 MTRR: Fixed MSR 0x268 0x0606060606060606
1657 12:40:29.375521 MTRR: Fixed MSR 0x269 0x0606060606060606
1658 12:40:29.378481 MTRR: Fixed MSR 0x26a 0x0606060606060606
1659 12:40:29.384932 MTRR: Fixed MSR 0x26b 0x0606060606060606
1660 12:40:29.388556 MTRR: Fixed MSR 0x26c 0x0606060606060606
1661 12:40:29.391584 MTRR: Fixed MSR 0x26d 0x0606060606060606
1662 12:40:29.395465 MTRR: Fixed MSR 0x26e 0x0606060606060606
1663 12:40:29.398193 MTRR: Fixed MSR 0x26f 0x0606060606060606
1664 12:40:29.401947 call enable_fixed_mtrr()
1665 12:40:29.405258 CPU physical address size: 39 bits
1666 12:40:29.411779 MTRR: default type WB/UC MTRR counts: 6/5.
1667 12:40:29.415469 MTRR: UC selected as default type.
1668 12:40:29.421883 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1669 12:40:29.425325 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1670 12:40:29.431689 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1671 12:40:29.438317 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1672 12:40:29.445023 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1673 12:40:29.445444
1674 12:40:29.448748 MTRR check
1675 12:40:29.449167 Fixed MTRRs : Enabled
1676 12:40:29.451885 Variable MTRRs: Enabled
1677 12:40:29.452304
1678 12:40:29.455324 MTRR: Fixed MSR 0x250 0x0606060606060606
1679 12:40:29.461733 MTRR: Fixed MSR 0x258 0x0606060606060606
1680 12:40:29.465173 MTRR: Fixed MSR 0x259 0x0000000000000000
1681 12:40:29.468644 MTRR: Fixed MSR 0x268 0x0606060606060606
1682 12:40:29.471800 MTRR: Fixed MSR 0x269 0x0606060606060606
1683 12:40:29.475095 MTRR: Fixed MSR 0x26a 0x0606060606060606
1684 12:40:29.481988 MTRR: Fixed MSR 0x26b 0x0606060606060606
1685 12:40:29.485177 MTRR: Fixed MSR 0x26c 0x0606060606060606
1686 12:40:29.488300 MTRR: Fixed MSR 0x26d 0x0606060606060606
1687 12:40:29.491664 MTRR: Fixed MSR 0x26e 0x0606060606060606
1688 12:40:29.498670 MTRR: Fixed MSR 0x26f 0x0606060606060606
1689 12:40:29.501934 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1690 12:40:29.505063 call enable_fixed_mtrr()
1691 12:40:29.509581 Checking cr50 for pending updates
1692 12:40:29.512610 CPU physical address size: 39 bits
1693 12:40:29.516866 Reading cr50 TPM mode
1694 12:40:29.525715 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1695 12:40:29.533211 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1696 12:40:29.537024 Checking segment from ROM address 0xfff9d5b8
1697 12:40:29.543312 Checking segment from ROM address 0xfff9d5d4
1698 12:40:29.547135 Loading segment from ROM address 0xfff9d5b8
1699 12:40:29.549853 code (compression=0)
1700 12:40:29.556601 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1701 12:40:29.566442 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1702 12:40:29.570308 it's not compressed!
1703 12:40:29.694792 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1704 12:40:29.701148 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1705 12:40:29.709078 Loading segment from ROM address 0xfff9d5d4
1706 12:40:29.712544 Entry Point 0x30000000
1707 12:40:29.712962 Loaded segments
1708 12:40:29.718489 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1709 12:40:29.734421 Finalizing chipset.
1710 12:40:29.737665 Finalizing SMM.
1711 12:40:29.737748 APMC done.
1712 12:40:29.744707 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1713 12:40:29.747854 mp_park_aps done after 0 msecs.
1714 12:40:29.750996 Jumping to boot code at 0x30000000(0x76b4b000)
1715 12:40:29.761433 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1716 12:40:29.761516
1717 12:40:29.761580
1718 12:40:29.761639
1719 12:40:29.764535 Starting depthcharge on Magolor...
1720 12:40:29.764616
1721 12:40:29.764948 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1722 12:40:29.765047 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1723 12:40:29.765125 Setting prompt string to ['dedede:']
1724 12:40:29.765200 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1725 12:40:29.774664 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1726 12:40:29.774761
1727 12:40:29.782190 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1728 12:40:29.782272
1729 12:40:29.784379 fw_config match found: AUDIO_AMP=UNPROVISIONED
1730 12:40:29.784462
1731 12:40:29.787693 Wipe memory regions:
1732 12:40:29.787774
1733 12:40:29.791141 [0x00000000001000, 0x000000000a0000)
1734 12:40:29.791222
1735 12:40:29.793884 [0x00000000100000, 0x00000030000000)
1736 12:40:29.923854
1737 12:40:29.926558 [0x00000031062170, 0x00000076a15000)
1738 12:40:30.095838
1739 12:40:30.098960 [0x00000100000000, 0x00000180400000)
1740 12:40:31.162492
1741 12:40:31.163171 R8152: Initializing
1742 12:40:31.163615
1743 12:40:31.165379 Version 6 (ocp_data = 5c30)
1744 12:40:31.168843
1745 12:40:31.169260 R8152: Done initializing
1746 12:40:31.169652
1747 12:40:31.172224 Adding net device
1748 12:40:31.172641
1749 12:40:31.175567 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1750 12:40:31.178955
1751 12:40:31.179411
1752 12:40:31.179755
1753 12:40:31.180507 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1755 12:40:31.281620 dedede: tftpboot 192.168.201.1 12437388/tftp-deploy-qo1yro6n/kernel/bzImage 12437388/tftp-deploy-qo1yro6n/kernel/cmdline 12437388/tftp-deploy-qo1yro6n/ramdisk/ramdisk.cpio.gz
1756 12:40:31.282127 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 12:40:31.282637 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1758 12:40:31.287045 tftpboot 192.168.201.1 12437388/tftp-deploy-qo1yro6n/kernel/bzImloy-qo1yro6n/kernel/cmdline 12437388/tftp-deploy-qo1yro6n/ramdisk/ramdisk.cpio.gz
1759 12:40:31.287559
1760 12:40:31.287888 Waiting for link
1761 12:40:31.489302
1762 12:40:31.489479 done.
1763 12:40:31.489559
1764 12:40:31.489619 MAC: 00:24:32:30:7b:58
1765 12:40:31.489678
1766 12:40:31.492165 Sending DHCP discover... done.
1767 12:40:31.492246
1768 12:40:31.495139 Waiting for reply... done.
1769 12:40:31.495218
1770 12:40:31.500306 Sending DHCP request... done.
1771 12:40:31.500401
1772 12:40:31.505473 Waiting for reply... done.
1773 12:40:31.505554
1774 12:40:31.505618 My ip is 192.168.201.13
1775 12:40:31.505678
1776 12:40:31.508389 The DHCP server ip is 192.168.201.1
1777 12:40:31.512154
1778 12:40:31.515641 TFTP server IP predefined by user: 192.168.201.1
1779 12:40:31.515722
1780 12:40:31.522095 Bootfile predefined by user: 12437388/tftp-deploy-qo1yro6n/kernel/bzImage
1781 12:40:31.522175
1782 12:40:31.525013 Sending tftp read request... done.
1783 12:40:31.525094
1784 12:40:31.528205 Waiting for the transfer...
1785 12:40:31.531574
1786 12:40:32.118809 00000000 ################################################################
1787 12:40:32.118957
1788 12:40:32.736298 00080000 ################################################################
1789 12:40:32.736446
1790 12:40:33.342862 00100000 ################################################################
1791 12:40:33.343022
1792 12:40:33.911816 00180000 ################################################################
1793 12:40:33.911968
1794 12:40:34.503635 00200000 ################################################################
1795 12:40:34.503776
1796 12:40:35.093114 00280000 ################################################################
1797 12:40:35.093251
1798 12:40:35.669102 00300000 ################################################################
1799 12:40:35.669235
1800 12:40:36.233395 00380000 ################################################################
1801 12:40:36.233530
1802 12:40:36.827948 00400000 ################################################################
1803 12:40:36.828089
1804 12:40:37.430044 00480000 ################################################################
1805 12:40:37.430184
1806 12:40:38.069638 00500000 ################################################################
1807 12:40:38.070153
1808 12:40:38.755685 00580000 ################################################################
1809 12:40:38.756192
1810 12:40:39.448461 00600000 ################################################################
1811 12:40:39.448974
1812 12:40:40.032221 00680000 ################################################################
1813 12:40:40.032357
1814 12:40:40.665169 00700000 ################################################################
1815 12:40:40.665663
1816 12:40:41.348184 00780000 ################################################################
1817 12:40:41.348711
1818 12:40:41.606553 00800000 ######################## done.
1819 12:40:41.607047
1820 12:40:41.609986 The bootfile was 8585104 bytes long.
1821 12:40:41.610402
1822 12:40:41.612892 Sending tftp read request... done.
1823 12:40:41.613310
1824 12:40:41.617171 Waiting for the transfer...
1825 12:40:41.617773
1826 12:40:42.349953 00000000 ################################################################
1827 12:40:42.350320
1828 12:40:43.074355 00080000 ################################################################
1829 12:40:43.074907
1830 12:40:43.798543 00100000 ################################################################
1831 12:40:43.799045
1832 12:40:44.522510 00180000 ################################################################
1833 12:40:44.523035
1834 12:40:45.225759 00200000 ################################################################
1835 12:40:45.226414
1836 12:40:45.917057 00280000 ################################################################
1837 12:40:45.917571
1838 12:40:46.649001 00300000 ################################################################
1839 12:40:46.649583
1840 12:40:47.333223 00380000 ################################################################
1841 12:40:47.333508
1842 12:40:47.994189 00400000 ################################################################
1843 12:40:47.994416
1844 12:40:48.655873 00480000 ################################################################
1845 12:40:48.656392
1846 12:40:49.385137 00500000 ################################################################
1847 12:40:49.385723
1848 12:40:50.103272 00580000 ################################################################
1849 12:40:50.103823
1850 12:40:50.828083 00600000 ################################################################
1851 12:40:50.828743
1852 12:40:51.556042 00680000 ################################################################
1853 12:40:51.556580
1854 12:40:52.260263 00700000 ################################################################
1855 12:40:52.260826
1856 12:40:52.994447 00780000 ################################################################
1857 12:40:52.994961
1858 12:40:53.595439 00800000 ###################################################### done.
1859 12:40:53.595971
1860 12:40:53.598998 Sending tftp read request... done.
1861 12:40:53.599520
1862 12:40:53.602206 Waiting for the transfer...
1863 12:40:53.602634
1864 12:40:53.602964 00000000 # done.
1865 12:40:53.603287
1866 12:40:53.612561 Command line loaded dynamically from TFTP file: 12437388/tftp-deploy-qo1yro6n/kernel/cmdline
1867 12:40:53.612993
1868 12:40:53.628677 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1869 12:40:53.629213
1870 12:40:53.631964 ec_init: CrosEC protocol v3 supported (256, 256)
1871 12:40:53.639977
1872 12:40:53.643021 Shutting down all USB controllers.
1873 12:40:53.643599
1874 12:40:53.643945 Removing current net device
1875 12:40:53.644260
1876 12:40:53.646597 Finalizing coreboot
1877 12:40:53.647135
1878 12:40:53.653521 Exiting depthcharge with code 4 at timestamp: 30711394
1879 12:40:53.654050
1880 12:40:53.654391
1881 12:40:53.654705 Starting kernel ...
1882 12:40:53.655009
1883 12:40:53.655301
1884 12:40:53.656556 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
1885 12:40:53.657030 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
1886 12:40:53.657402 Setting prompt string to ['Linux version [0-9]']
1887 12:40:53.657741 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1888 12:40:53.658079 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1890 12:45:16.658125 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
1892 12:45:16.659242 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
1894 12:45:16.660144 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1897 12:45:16.662202 end: 2 depthcharge-action (duration 00:05:00) [common]
1899 12:45:16.662903 Cleaning after the job
1900 12:45:16.662991 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437388/tftp-deploy-qo1yro6n/ramdisk
1901 12:45:16.664271 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437388/tftp-deploy-qo1yro6n/kernel
1902 12:45:16.665825 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437388/tftp-deploy-qo1yro6n/modules
1903 12:45:16.666165 start: 5.1 power-off (timeout 00:00:30) [common]
1904 12:45:16.666363 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-5' '--port=1' '--command=off'
1905 12:45:16.748526 >> Command sent successfully.
1906 12:45:16.759299 Returned 0 in 0 seconds
1907 12:45:16.860640 end: 5.1 power-off (duration 00:00:00) [common]
1909 12:45:16.862224 start: 5.2 read-feedback (timeout 00:10:00) [common]
1910 12:45:16.863560 Listened to connection for namespace 'common' for up to 1s
1912 12:45:16.864900 Listened to connection for namespace 'common' for up to 1s
1913 12:45:17.864213 Finalising connection for namespace 'common'
1914 12:45:17.864947 Disconnecting from shell: Finalise
1915 12:45:17.865413
1916 12:45:17.966665 end: 5.2 read-feedback (duration 00:00:01) [common]
1917 12:45:17.967311 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12437388
1918 12:45:18.021316 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12437388
1919 12:45:18.021547 JobError: Your job cannot terminate cleanly.