Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:39:54.674274 lava-dispatcher, installed at version: 2023.10
2 12:39:54.674502 start: 0 validate
3 12:39:54.674627 Start time: 2024-01-03 12:39:54.674619+00:00 (UTC)
4 12:39:54.674740 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:39:54.674867 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:39:54.947689 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:39:54.948493 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:39:55.221037 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:39:55.221806 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:39:59.549900 validate duration: 4.88
12 12:39:59.550185 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:39:59.550297 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:39:59.550388 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:39:59.550514 Not decompressing ramdisk as can be used compressed.
16 12:39:59.550599 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:39:59.550661 saving as /var/lib/lava/dispatcher/tmp/12437309/tftp-deploy-r203kpa_/ramdisk/rootfs.cpio.gz
18 12:39:59.550727 total size: 8418130 (8 MB)
19 12:40:00.076537 progress 0 % (0 MB)
20 12:40:00.083643 progress 5 % (0 MB)
21 12:40:00.085910 progress 10 % (0 MB)
22 12:40:00.088178 progress 15 % (1 MB)
23 12:40:00.090455 progress 20 % (1 MB)
24 12:40:00.092708 progress 25 % (2 MB)
25 12:40:00.094927 progress 30 % (2 MB)
26 12:40:00.097195 progress 35 % (2 MB)
27 12:40:00.099599 progress 40 % (3 MB)
28 12:40:00.101938 progress 45 % (3 MB)
29 12:40:00.104207 progress 50 % (4 MB)
30 12:40:00.106446 progress 55 % (4 MB)
31 12:40:00.108703 progress 60 % (4 MB)
32 12:40:00.110900 progress 65 % (5 MB)
33 12:40:00.113187 progress 70 % (5 MB)
34 12:40:00.115369 progress 75 % (6 MB)
35 12:40:00.117586 progress 80 % (6 MB)
36 12:40:00.119750 progress 85 % (6 MB)
37 12:40:00.122050 progress 90 % (7 MB)
38 12:40:00.124405 progress 95 % (7 MB)
39 12:40:00.126534 progress 100 % (8 MB)
40 12:40:00.126785 8 MB downloaded in 0.58 s (13.94 MB/s)
41 12:40:00.127085 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:40:00.127464 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:40:00.127578 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:40:00.127690 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:40:00.127849 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:40:00.127948 saving as /var/lib/lava/dispatcher/tmp/12437309/tftp-deploy-r203kpa_/kernel/bzImage
48 12:40:00.128034 total size: 8585104 (8 MB)
49 12:40:00.128139 No compression specified
50 12:40:00.129296 progress 0 % (0 MB)
51 12:40:00.131565 progress 5 % (0 MB)
52 12:40:00.133901 progress 10 % (0 MB)
53 12:40:00.136158 progress 15 % (1 MB)
54 12:40:00.138369 progress 20 % (1 MB)
55 12:40:00.140630 progress 25 % (2 MB)
56 12:40:00.142835 progress 30 % (2 MB)
57 12:40:00.145083 progress 35 % (2 MB)
58 12:40:00.147334 progress 40 % (3 MB)
59 12:40:00.149622 progress 45 % (3 MB)
60 12:40:00.151978 progress 50 % (4 MB)
61 12:40:00.154400 progress 55 % (4 MB)
62 12:40:00.156691 progress 60 % (4 MB)
63 12:40:00.158901 progress 65 % (5 MB)
64 12:40:00.161279 progress 70 % (5 MB)
65 12:40:00.163489 progress 75 % (6 MB)
66 12:40:00.165906 progress 80 % (6 MB)
67 12:40:00.168329 progress 85 % (6 MB)
68 12:40:00.170585 progress 90 % (7 MB)
69 12:40:00.172850 progress 95 % (7 MB)
70 12:40:00.175263 progress 100 % (8 MB)
71 12:40:00.175534 8 MB downloaded in 0.05 s (172.38 MB/s)
72 12:40:00.175728 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:40:00.176098 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:40:00.176217 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:40:00.176334 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:40:00.176502 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:40:00.176601 saving as /var/lib/lava/dispatcher/tmp/12437309/tftp-deploy-r203kpa_/modules/modules.tar
79 12:40:00.176690 total size: 253660 (0 MB)
80 12:40:00.176779 Using unxz to decompress xz
81 12:40:00.181237 progress 12 % (0 MB)
82 12:40:00.181642 progress 25 % (0 MB)
83 12:40:00.181875 progress 38 % (0 MB)
84 12:40:00.183500 progress 51 % (0 MB)
85 12:40:00.185396 progress 64 % (0 MB)
86 12:40:00.187242 progress 77 % (0 MB)
87 12:40:00.189052 progress 90 % (0 MB)
88 12:40:00.190990 progress 100 % (0 MB)
89 12:40:00.196419 0 MB downloaded in 0.02 s (12.26 MB/s)
90 12:40:00.196655 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:40:00.196926 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:40:00.197057 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 12:40:00.197187 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 12:40:00.197321 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:40:00.197464 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 12:40:00.197773 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j
98 12:40:00.197936 makedir: /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin
99 12:40:00.198045 makedir: /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/tests
100 12:40:00.198146 makedir: /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/results
101 12:40:00.198263 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-add-keys
102 12:40:00.198410 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-add-sources
103 12:40:00.198545 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-background-process-start
104 12:40:00.198677 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-background-process-stop
105 12:40:00.198806 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-common-functions
106 12:40:00.198934 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-echo-ipv4
107 12:40:00.199061 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-install-packages
108 12:40:00.199336 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-installed-packages
109 12:40:00.199508 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-os-build
110 12:40:00.199641 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-probe-channel
111 12:40:00.199769 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-probe-ip
112 12:40:00.199896 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-target-ip
113 12:40:00.200024 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-target-mac
114 12:40:00.200165 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-target-storage
115 12:40:00.200295 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-test-case
116 12:40:00.200423 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-test-event
117 12:40:00.200549 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-test-feedback
118 12:40:00.200676 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-test-raise
119 12:40:00.200805 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-test-reference
120 12:40:00.200934 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-test-runner
121 12:40:00.201061 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-test-set
122 12:40:00.201190 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-test-shell
123 12:40:00.201320 Updating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-install-packages (oe)
124 12:40:00.201475 Updating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/bin/lava-installed-packages (oe)
125 12:40:00.201600 Creating /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/environment
126 12:40:00.201701 LAVA metadata
127 12:40:00.201781 - LAVA_JOB_ID=12437309
128 12:40:00.201847 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:40:00.201949 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 12:40:00.202020 skipped lava-vland-overlay
131 12:40:00.202093 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:40:00.202174 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 12:40:00.202236 skipped lava-multinode-overlay
134 12:40:00.202306 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:40:00.202388 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 12:40:00.202461 Loading test definitions
137 12:40:00.202554 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 12:40:00.202637 Using /lava-12437309 at stage 0
139 12:40:00.202946 uuid=12437309_1.4.2.3.1 testdef=None
140 12:40:00.203037 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:40:00.203122 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 12:40:00.203657 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:40:00.203871 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 12:40:00.204528 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:40:00.204758 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 12:40:00.205588 runner path: /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/0/tests/0_dmesg test_uuid 12437309_1.4.2.3.1
149 12:40:00.205757 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:40:00.205984 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 12:40:00.206055 Using /lava-12437309 at stage 1
153 12:40:00.206362 uuid=12437309_1.4.2.3.5 testdef=None
154 12:40:00.206449 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:40:00.206533 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 12:40:00.207012 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:40:00.207225 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 12:40:00.207878 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:40:00.208112 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 12:40:00.208746 runner path: /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/1/tests/1_bootrr test_uuid 12437309_1.4.2.3.5
163 12:40:00.208899 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:40:00.209105 Creating lava-test-runner.conf files
166 12:40:00.209166 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/0 for stage 0
167 12:40:00.209255 - 0_dmesg
168 12:40:00.209334 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437309/lava-overlay-5sjqnu8j/lava-12437309/1 for stage 1
169 12:40:00.209424 - 1_bootrr
170 12:40:00.209518 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:40:00.209603 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 12:40:00.218351 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:40:00.218452 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 12:40:00.218536 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:40:00.218618 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:40:00.218701 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 12:40:00.472126 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:40:00.472524 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 12:40:00.472634 extracting modules file /var/lib/lava/dispatcher/tmp/12437309/tftp-deploy-r203kpa_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437309/extract-overlay-ramdisk-7eq6a58s/ramdisk
180 12:40:00.486730 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:40:00.486844 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 12:40:00.486931 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437309/compress-overlay-c3kddfne/overlay-1.4.2.4.tar.gz to ramdisk
183 12:40:00.487006 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437309/compress-overlay-c3kddfne/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12437309/extract-overlay-ramdisk-7eq6a58s/ramdisk
184 12:40:00.496216 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:40:00.496328 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 12:40:00.496421 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:40:00.496514 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 12:40:00.496590 Building ramdisk /var/lib/lava/dispatcher/tmp/12437309/extract-overlay-ramdisk-7eq6a58s/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12437309/extract-overlay-ramdisk-7eq6a58s/ramdisk
189 12:40:00.640772 >> 49826 blocks
190 12:40:01.491931 rename /var/lib/lava/dispatcher/tmp/12437309/extract-overlay-ramdisk-7eq6a58s/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12437309/tftp-deploy-r203kpa_/ramdisk/ramdisk.cpio.gz
191 12:40:01.492391 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:40:01.492524 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 12:40:01.492628 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 12:40:01.492720 No mkimage arch provided, not using FIT.
195 12:40:01.492814 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:40:01.492897 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:40:01.493000 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:40:01.493097 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 12:40:01.493177 No LXC device requested
200 12:40:01.493258 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:40:01.493347 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 12:40:01.493432 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:40:01.493509 Checking files for TFTP limit of 4294967296 bytes.
204 12:40:01.493915 end: 1 tftp-deploy (duration 00:00:02) [common]
205 12:40:01.494018 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:40:01.494109 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:40:01.494227 substitutions:
208 12:40:01.494292 - {DTB}: None
209 12:40:01.494353 - {INITRD}: 12437309/tftp-deploy-r203kpa_/ramdisk/ramdisk.cpio.gz
210 12:40:01.494411 - {KERNEL}: 12437309/tftp-deploy-r203kpa_/kernel/bzImage
211 12:40:01.494468 - {LAVA_MAC}: None
212 12:40:01.494525 - {PRESEED_CONFIG}: None
213 12:40:01.494580 - {PRESEED_LOCAL}: None
214 12:40:01.494634 - {RAMDISK}: 12437309/tftp-deploy-r203kpa_/ramdisk/ramdisk.cpio.gz
215 12:40:01.494689 - {ROOT_PART}: None
216 12:40:01.494743 - {ROOT}: None
217 12:40:01.494796 - {SERVER_IP}: 192.168.201.1
218 12:40:01.494849 - {TEE}: None
219 12:40:01.494904 Parsed boot commands:
220 12:40:01.494958 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:40:01.495133 Parsed boot commands: tftpboot 192.168.201.1 12437309/tftp-deploy-r203kpa_/kernel/bzImage 12437309/tftp-deploy-r203kpa_/kernel/cmdline 12437309/tftp-deploy-r203kpa_/ramdisk/ramdisk.cpio.gz
222 12:40:01.495220 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:40:01.495306 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:40:01.495396 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:40:01.495479 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:40:01.495547 Not connected, no need to disconnect.
227 12:40:01.495621 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:40:01.495810 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:40:01.495876 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-9'
230 12:40:01.500097 Setting prompt string to ['lava-test: # ']
231 12:40:01.500476 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:40:01.500589 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:40:01.500690 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:40:01.500784 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:40:01.500978 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
236 12:40:06.659530 >> Command sent successfully.
237 12:40:06.665538 Returned 0 in 5 seconds
238 12:40:06.766371 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 12:40:06.767891 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 12:40:06.768502 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 12:40:06.768982 Setting prompt string to 'Starting depthcharge on Voema...'
243 12:40:06.769348 Changing prompt to 'Starting depthcharge on Voema...'
244 12:40:06.769716 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 12:40:06.771048 [Enter `^Ec?' for help]
246 12:40:08.327410
247 12:40:08.328020
248 12:40:08.337636 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 12:40:08.343975 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 12:40:08.347532 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 12:40:08.350773 CPU: AES supported, TXT NOT supported, VT supported
252 12:40:08.357279 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 12:40:08.363658 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 12:40:08.366825 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 12:40:08.370652 VBOOT: Loading verstage.
256 12:40:08.377064 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 12:40:08.380514 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 12:40:08.383860 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 12:40:08.394818 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 12:40:08.401852 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 12:40:08.402341
262 12:40:08.402707
263 12:40:08.414503 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 12:40:08.429052 Probing TPM: . done!
265 12:40:08.432085 TPM ready after 0 ms
266 12:40:08.434933 Connected to device vid:did:rid of 1ae0:0028:00
267 12:40:08.446214 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
268 12:40:08.452505 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 12:40:08.455985 Initialized TPM device CR50 revision 0
270 12:40:08.507935 tlcl_send_startup: Startup return code is 0
271 12:40:08.508510 TPM: setup succeeded
272 12:40:08.523307 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 12:40:08.538882 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 12:40:08.552353 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 12:40:08.562998 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 12:40:08.566905 Chrome EC: UHEPI supported
277 12:40:08.569598 Phase 1
278 12:40:08.573027 FMAP: area GBB found @ 1805000 (458752 bytes)
279 12:40:08.582787 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 12:40:08.589340 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 12:40:08.595820 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 12:40:08.602572 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 12:40:08.606133 Recovery requested (1009000e)
284 12:40:08.609700 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 12:40:08.621057 tlcl_extend: response is 0
286 12:40:08.627853 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 12:40:08.638095 tlcl_extend: response is 0
288 12:40:08.644465 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 12:40:08.651016 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 12:40:08.657573 BS: verstage times (exec / console): total (unknown) / 142 ms
291 12:40:08.658138
292 12:40:08.658508
293 12:40:08.671053 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 12:40:08.677531 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 12:40:08.680963 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 12:40:08.684260 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 12:40:08.690752 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 12:40:08.694344 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 12:40:08.697318 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
300 12:40:08.700815 TCO_STS: 0000 0000
301 12:40:08.703725 GEN_PMCON: d0015038 00002200
302 12:40:08.707408 GBLRST_CAUSE: 00000000 00000000
303 12:40:08.708037 HPR_CAUSE0: 00000000
304 12:40:08.710689 prev_sleep_state 5
305 12:40:08.713771 Boot Count incremented to 25538
306 12:40:08.720786 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 12:40:08.726948 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 12:40:08.733923 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 12:40:08.740845 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 12:40:08.745026 Chrome EC: UHEPI supported
311 12:40:08.751971 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 12:40:08.764753 Probing TPM: done!
313 12:40:08.771935 Connected to device vid:did:rid of 1ae0:0028:00
314 12:40:08.782617 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
315 12:40:08.789830 Initialized TPM device CR50 revision 0
316 12:40:08.799633 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 12:40:08.806022 MRC: Hash idx 0x100b comparison successful.
318 12:40:08.810050 MRC cache found, size faa8
319 12:40:08.810619 bootmode is set to: 2
320 12:40:08.812860 SPD index = 0
321 12:40:08.819748 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 12:40:08.823936 SPD: module type is LPDDR4X
323 12:40:08.826408 SPD: module part number is MT53E512M64D4NW-046
324 12:40:08.832662 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 12:40:08.836203 SPD: device width 16 bits, bus width 16 bits
326 12:40:08.843004 SPD: module size is 1024 MB (per channel)
327 12:40:09.274718 CBMEM:
328 12:40:09.278113 IMD: root @ 0x76fff000 254 entries.
329 12:40:09.280993 IMD: root @ 0x76ffec00 62 entries.
330 12:40:09.284776 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 12:40:09.291230 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 12:40:09.294636 External stage cache:
333 12:40:09.297840 IMD: root @ 0x7b3ff000 254 entries.
334 12:40:09.300812 IMD: root @ 0x7b3fec00 62 entries.
335 12:40:09.316718 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 12:40:09.322609 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 12:40:09.329684 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 12:40:09.343517 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 12:40:09.347447 cse_lite: Skip switching to RW in the recovery path
340 12:40:09.350753 8 DIMMs found
341 12:40:09.351223 SMM Memory Map
342 12:40:09.354715 SMRAM : 0x7b000000 0x800000
343 12:40:09.357646 Subregion 0: 0x7b000000 0x200000
344 12:40:09.360877 Subregion 1: 0x7b200000 0x200000
345 12:40:09.364573 Subregion 2: 0x7b400000 0x400000
346 12:40:09.367648 top_of_ram = 0x77000000
347 12:40:09.374621 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 12:40:09.378257 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 12:40:09.384335 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 12:40:09.387792 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 12:40:09.397676 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 12:40:09.400720 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 12:40:09.412751 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 12:40:09.419856 Processing 211 relocs. Offset value of 0x74c0b000
355 12:40:09.426209 BS: romstage times (exec / console): total (unknown) / 277 ms
356 12:40:09.432707
357 12:40:09.433192
358 12:40:09.442577 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 12:40:09.445407 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 12:40:09.455564 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 12:40:09.462133 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 12:40:09.468690 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 12:40:09.475508 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 12:40:09.522557 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 12:40:09.528658 Processing 5008 relocs. Offset value of 0x75d98000
366 12:40:09.532107 BS: postcar times (exec / console): total (unknown) / 59 ms
367 12:40:09.536014
368 12:40:09.536633
369 12:40:09.545966 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 12:40:09.546574 Normal boot
371 12:40:09.549637 FW_CONFIG value is 0x804c02
372 12:40:09.552049 PCI: 00:07.0 disabled by fw_config
373 12:40:09.555554 PCI: 00:07.1 disabled by fw_config
374 12:40:09.558714 PCI: 00:0d.2 disabled by fw_config
375 12:40:09.562568 PCI: 00:1c.7 disabled by fw_config
376 12:40:09.569652 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 12:40:09.575604 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 12:40:09.579197 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 12:40:09.582430 GENERIC: 0.0 disabled by fw_config
380 12:40:09.585761 GENERIC: 1.0 disabled by fw_config
381 12:40:09.592263 fw_config match found: DB_USB=USB3_ACTIVE
382 12:40:09.595376 fw_config match found: DB_USB=USB3_ACTIVE
383 12:40:09.598918 fw_config match found: DB_USB=USB3_ACTIVE
384 12:40:09.605774 fw_config match found: DB_USB=USB3_ACTIVE
385 12:40:09.608976 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 12:40:09.615749 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 12:40:09.625454 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 12:40:09.631919 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 12:40:09.635494 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 12:40:09.642730 microcode: Update skipped, already up-to-date
391 12:40:09.648645 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 12:40:09.676302 Detected 4 core, 8 thread CPU.
393 12:40:09.679340 Setting up SMI for CPU
394 12:40:09.682198 IED base = 0x7b400000
395 12:40:09.682663 IED size = 0x00400000
396 12:40:09.686002 Will perform SMM setup.
397 12:40:09.692751 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 12:40:09.699049 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 12:40:09.705869 Processing 16 relocs. Offset value of 0x00030000
400 12:40:09.709209 Attempting to start 7 APs
401 12:40:09.712257 Waiting for 10ms after sending INIT.
402 12:40:09.728337 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 12:40:09.731226 AP: slot 7 apic_id 3.
404 12:40:09.735234 AP: slot 4 apic_id 2.
405 12:40:09.735798 AP: slot 5 apic_id 4.
406 12:40:09.737868 AP: slot 2 apic_id 5.
407 12:40:09.740988 AP: slot 3 apic_id 7.
408 12:40:09.741549 AP: slot 6 apic_id 6.
409 12:40:09.741913 done.
410 12:40:09.748147 Waiting for 2nd SIPI to complete...done.
411 12:40:09.754473 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 12:40:09.760834 Processing 13 relocs. Offset value of 0x00038000
413 12:40:09.765096 Unable to locate Global NVS
414 12:40:09.771245 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 12:40:09.774609 Installing permanent SMM handler to 0x7b000000
416 12:40:09.784447 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 12:40:09.787576 Processing 794 relocs. Offset value of 0x7b010000
418 12:40:09.797759 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 12:40:09.800653 Processing 13 relocs. Offset value of 0x7b008000
420 12:40:09.807960 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 12:40:09.814384 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 12:40:09.817237 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 12:40:09.824094 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 12:40:09.830302 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 12:40:09.837619 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 12:40:09.844229 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 12:40:09.844785 Unable to locate Global NVS
428 12:40:09.854185 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 12:40:09.857396 Clearing SMI status registers
430 12:40:09.857962 SMI_STS: PM1
431 12:40:09.860491 PM1_STS: PWRBTN
432 12:40:09.867263 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 12:40:09.870088 In relocation handler: CPU 0
434 12:40:09.873770 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 12:40:09.880461 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 12:40:09.881035 Relocation complete.
437 12:40:09.890766 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 12:40:09.893516 In relocation handler: CPU 1
439 12:40:09.896911 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 12:40:09.897508 Relocation complete.
441 12:40:09.907272 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
442 12:40:09.907838 In relocation handler: CPU 3
443 12:40:09.913482 New SMBASE=0x7afff400 IEDBASE=0x7b400000
444 12:40:09.914058 Relocation complete.
445 12:40:09.923905 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
446 12:40:09.924544 In relocation handler: CPU 6
447 12:40:09.930345 New SMBASE=0x7affe800 IEDBASE=0x7b400000
448 12:40:09.933277 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 12:40:09.936751 Relocation complete.
450 12:40:09.943616 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
451 12:40:09.946606 In relocation handler: CPU 5
452 12:40:09.949893 New SMBASE=0x7affec00 IEDBASE=0x7b400000
453 12:40:09.956613 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 12:40:09.957188 Relocation complete.
455 12:40:09.962909 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
456 12:40:09.966707 In relocation handler: CPU 2
457 12:40:09.973376 New SMBASE=0x7afff800 IEDBASE=0x7b400000
458 12:40:09.973945 Relocation complete.
459 12:40:09.979834 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
460 12:40:09.983276 In relocation handler: CPU 4
461 12:40:09.989926 New SMBASE=0x7afff000 IEDBASE=0x7b400000
462 12:40:09.993136 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 12:40:09.996450 Relocation complete.
464 12:40:10.002829 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
465 12:40:10.006675 In relocation handler: CPU 7
466 12:40:10.010184 New SMBASE=0x7affe400 IEDBASE=0x7b400000
467 12:40:10.013132 Relocation complete.
468 12:40:10.013592 Initializing CPU #0
469 12:40:10.017192 CPU: vendor Intel device 806c1
470 12:40:10.020606 CPU: family 06, model 8c, stepping 01
471 12:40:10.023955 Clearing out pending MCEs
472 12:40:10.027285 Setting up local APIC...
473 12:40:10.027850 apic_id: 0x00 done.
474 12:40:10.031708 Turbo is available but hidden
475 12:40:10.034442 Turbo is available and visible
476 12:40:10.040768 microcode: Update skipped, already up-to-date
477 12:40:10.041342 CPU #0 initialized
478 12:40:10.044324 Initializing CPU #2
479 12:40:10.047257 Initializing CPU #5
480 12:40:10.050356 CPU: vendor Intel device 806c1
481 12:40:10.053746 CPU: family 06, model 8c, stepping 01
482 12:40:10.054211 Initializing CPU #6
483 12:40:10.056999 Initializing CPU #3
484 12:40:10.060541 CPU: vendor Intel device 806c1
485 12:40:10.064098 CPU: family 06, model 8c, stepping 01
486 12:40:10.066965 CPU: vendor Intel device 806c1
487 12:40:10.070141 CPU: family 06, model 8c, stepping 01
488 12:40:10.073678 Clearing out pending MCEs
489 12:40:10.077152 Clearing out pending MCEs
490 12:40:10.077719 Setting up local APIC...
491 12:40:10.080193 Initializing CPU #4
492 12:40:10.083753 Initializing CPU #7
493 12:40:10.087460 CPU: vendor Intel device 806c1
494 12:40:10.090163 CPU: family 06, model 8c, stepping 01
495 12:40:10.093851 CPU: vendor Intel device 806c1
496 12:40:10.096767 CPU: family 06, model 8c, stepping 01
497 12:40:10.100273 Clearing out pending MCEs
498 12:40:10.100832 Clearing out pending MCEs
499 12:40:10.103303 Setting up local APIC...
500 12:40:10.106894 Clearing out pending MCEs
501 12:40:10.110145 CPU: vendor Intel device 806c1
502 12:40:10.113393 CPU: family 06, model 8c, stepping 01
503 12:40:10.116867 Clearing out pending MCEs
504 12:40:10.119878 Setting up local APIC...
505 12:40:10.120378 apic_id: 0x06 done.
506 12:40:10.123467 Setting up local APIC...
507 12:40:10.127336 apic_id: 0x05 done.
508 12:40:10.127902 Setting up local APIC...
509 12:40:10.130092 Initializing CPU #1
510 12:40:10.133455 microcode: Update skipped, already up-to-date
511 12:40:10.136652 apic_id: 0x04 done.
512 12:40:10.140096 microcode: Update skipped, already up-to-date
513 12:40:10.147002 microcode: Update skipped, already up-to-date
514 12:40:10.147531 CPU #2 initialized
515 12:40:10.150050 CPU #5 initialized
516 12:40:10.153349 apic_id: 0x02 done.
517 12:40:10.153771 Setting up local APIC...
518 12:40:10.156540 CPU #6 initialized
519 12:40:10.160134 apic_id: 0x07 done.
520 12:40:10.163423 microcode: Update skipped, already up-to-date
521 12:40:10.166318 CPU: vendor Intel device 806c1
522 12:40:10.169972 CPU: family 06, model 8c, stepping 01
523 12:40:10.173344 Clearing out pending MCEs
524 12:40:10.176708 microcode: Update skipped, already up-to-date
525 12:40:10.181164 CPU #4 initialized
526 12:40:10.183558 apic_id: 0x03 done.
527 12:40:10.184131 Setting up local APIC...
528 12:40:10.186589 CPU #3 initialized
529 12:40:10.190035 microcode: Update skipped, already up-to-date
530 12:40:10.193300 apic_id: 0x01 done.
531 12:40:10.196547 CPU #7 initialized
532 12:40:10.199724 microcode: Update skipped, already up-to-date
533 12:40:10.203021 CPU #1 initialized
534 12:40:10.206435 bsp_do_flight_plan done after 455 msecs.
535 12:40:10.209536 CPU: frequency set to 4000 MHz
536 12:40:10.210060 Enabling SMIs.
537 12:40:10.216440 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 12:40:10.232802 SATAXPCIE1 indicates PCIe NVMe is present
539 12:40:10.236947 Probing TPM: done!
540 12:40:10.239844 Connected to device vid:did:rid of 1ae0:0028:00
541 12:40:10.250716 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
542 12:40:10.253608 Initialized TPM device CR50 revision 0
543 12:40:10.257160 Enabling S0i3.4
544 12:40:10.263412 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 12:40:10.266604 Found a VBT of 8704 bytes after decompression
546 12:40:10.273492 cse_lite: CSE RO boot. HybridStorageMode disabled
547 12:40:10.279946 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 12:40:10.356465 FSPS returned 0
549 12:40:10.359271 Executing Phase 1 of FspMultiPhaseSiInit
550 12:40:10.369025 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 12:40:10.372270 port C0 DISC req: usage 1 usb3 1 usb2 5
552 12:40:10.375663 Raw Buffer output 0 00000511
553 12:40:10.379165 Raw Buffer output 1 00000000
554 12:40:10.382944 pmc_send_ipc_cmd succeeded
555 12:40:10.389337 port C1 DISC req: usage 1 usb3 2 usb2 3
556 12:40:10.389902 Raw Buffer output 0 00000321
557 12:40:10.392707 Raw Buffer output 1 00000000
558 12:40:10.396826 pmc_send_ipc_cmd succeeded
559 12:40:10.402845 Detected 4 core, 8 thread CPU.
560 12:40:10.405242 Detected 4 core, 8 thread CPU.
561 12:40:10.639331 Display FSP Version Info HOB
562 12:40:10.642804 Reference Code - CPU = a.0.4c.31
563 12:40:10.645967 uCode Version = 0.0.0.86
564 12:40:10.649321 TXT ACM version = ff.ff.ff.ffff
565 12:40:10.653578 Reference Code - ME = a.0.4c.31
566 12:40:10.655960 MEBx version = 0.0.0.0
567 12:40:10.659298 ME Firmware Version = Consumer SKU
568 12:40:10.662399 Reference Code - PCH = a.0.4c.31
569 12:40:10.665963 PCH-CRID Status = Disabled
570 12:40:10.668876 PCH-CRID Original Value = ff.ff.ff.ffff
571 12:40:10.672579 PCH-CRID New Value = ff.ff.ff.ffff
572 12:40:10.675836 OPROM - RST - RAID = ff.ff.ff.ffff
573 12:40:10.679111 PCH Hsio Version = 4.0.0.0
574 12:40:10.682598 Reference Code - SA - System Agent = a.0.4c.31
575 12:40:10.685758 Reference Code - MRC = 2.0.0.1
576 12:40:10.689433 SA - PCIe Version = a.0.4c.31
577 12:40:10.692669 SA-CRID Status = Disabled
578 12:40:10.695827 SA-CRID Original Value = 0.0.0.1
579 12:40:10.699367 SA-CRID New Value = 0.0.0.1
580 12:40:10.702560 OPROM - VBIOS = ff.ff.ff.ffff
581 12:40:10.705659 IO Manageability Engine FW Version = 11.1.4.0
582 12:40:10.709029 PHY Build Version = 0.0.0.e0
583 12:40:10.712357 Thunderbolt(TM) FW Version = 0.0.0.0
584 12:40:10.719288 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 12:40:10.722386 ITSS IRQ Polarities Before:
586 12:40:10.722852 IPC0: 0xffffffff
587 12:40:10.725383 IPC1: 0xffffffff
588 12:40:10.725841 IPC2: 0xffffffff
589 12:40:10.729315 IPC3: 0xffffffff
590 12:40:10.732219 ITSS IRQ Polarities After:
591 12:40:10.732684 IPC0: 0xffffffff
592 12:40:10.735662 IPC1: 0xffffffff
593 12:40:10.736284 IPC2: 0xffffffff
594 12:40:10.739301 IPC3: 0xffffffff
595 12:40:10.742294 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 12:40:10.755622 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 12:40:10.765575 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 12:40:10.779295 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 12:40:10.785258 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 237 ms
600 12:40:10.785823 Enumerating buses...
601 12:40:10.792006 Show all devs... Before device enumeration.
602 12:40:10.795498 Root Device: enabled 1
603 12:40:10.796100 DOMAIN: 0000: enabled 1
604 12:40:10.798811 CPU_CLUSTER: 0: enabled 1
605 12:40:10.802067 PCI: 00:00.0: enabled 1
606 12:40:10.805715 PCI: 00:02.0: enabled 1
607 12:40:10.806284 PCI: 00:04.0: enabled 1
608 12:40:10.808753 PCI: 00:05.0: enabled 1
609 12:40:10.812111 PCI: 00:06.0: enabled 0
610 12:40:10.812683 PCI: 00:07.0: enabled 0
611 12:40:10.814975 PCI: 00:07.1: enabled 0
612 12:40:10.818649 PCI: 00:07.2: enabled 0
613 12:40:10.822016 PCI: 00:07.3: enabled 0
614 12:40:10.822491 PCI: 00:08.0: enabled 1
615 12:40:10.825699 PCI: 00:09.0: enabled 0
616 12:40:10.828434 PCI: 00:0a.0: enabled 0
617 12:40:10.831887 PCI: 00:0d.0: enabled 1
618 12:40:10.832386 PCI: 00:0d.1: enabled 0
619 12:40:10.835875 PCI: 00:0d.2: enabled 0
620 12:40:10.838450 PCI: 00:0d.3: enabled 0
621 12:40:10.842723 PCI: 00:0e.0: enabled 0
622 12:40:10.843289 PCI: 00:10.2: enabled 1
623 12:40:10.845917 PCI: 00:10.6: enabled 0
624 12:40:10.848649 PCI: 00:10.7: enabled 0
625 12:40:10.849217 PCI: 00:12.0: enabled 0
626 12:40:10.851970 PCI: 00:12.6: enabled 0
627 12:40:10.855264 PCI: 00:13.0: enabled 0
628 12:40:10.858897 PCI: 00:14.0: enabled 1
629 12:40:10.859462 PCI: 00:14.1: enabled 0
630 12:40:10.861615 PCI: 00:14.2: enabled 1
631 12:40:10.865203 PCI: 00:14.3: enabled 1
632 12:40:10.868096 PCI: 00:15.0: enabled 1
633 12:40:10.868564 PCI: 00:15.1: enabled 1
634 12:40:10.871493 PCI: 00:15.2: enabled 1
635 12:40:10.875179 PCI: 00:15.3: enabled 1
636 12:40:10.878236 PCI: 00:16.0: enabled 1
637 12:40:10.878703 PCI: 00:16.1: enabled 0
638 12:40:10.881539 PCI: 00:16.2: enabled 0
639 12:40:10.884845 PCI: 00:16.3: enabled 0
640 12:40:10.888333 PCI: 00:16.4: enabled 0
641 12:40:10.888896 PCI: 00:16.5: enabled 0
642 12:40:10.891964 PCI: 00:17.0: enabled 1
643 12:40:10.895551 PCI: 00:19.0: enabled 0
644 12:40:10.896166 PCI: 00:19.1: enabled 1
645 12:40:10.898090 PCI: 00:19.2: enabled 0
646 12:40:10.901336 PCI: 00:1c.0: enabled 1
647 12:40:10.904970 PCI: 00:1c.1: enabled 0
648 12:40:10.905433 PCI: 00:1c.2: enabled 0
649 12:40:10.908367 PCI: 00:1c.3: enabled 0
650 12:40:10.912451 PCI: 00:1c.4: enabled 0
651 12:40:10.915416 PCI: 00:1c.5: enabled 0
652 12:40:10.915987 PCI: 00:1c.6: enabled 1
653 12:40:10.918670 PCI: 00:1c.7: enabled 0
654 12:40:10.921623 PCI: 00:1d.0: enabled 1
655 12:40:10.924633 PCI: 00:1d.1: enabled 0
656 12:40:10.925099 PCI: 00:1d.2: enabled 1
657 12:40:10.928176 PCI: 00:1d.3: enabled 0
658 12:40:10.931924 PCI: 00:1e.0: enabled 1
659 12:40:10.932552 PCI: 00:1e.1: enabled 0
660 12:40:10.935037 PCI: 00:1e.2: enabled 1
661 12:40:10.938328 PCI: 00:1e.3: enabled 1
662 12:40:10.941617 PCI: 00:1f.0: enabled 1
663 12:40:10.942181 PCI: 00:1f.1: enabled 0
664 12:40:10.944776 PCI: 00:1f.2: enabled 1
665 12:40:10.948022 PCI: 00:1f.3: enabled 1
666 12:40:10.951659 PCI: 00:1f.4: enabled 0
667 12:40:10.952276 PCI: 00:1f.5: enabled 1
668 12:40:10.954912 PCI: 00:1f.6: enabled 0
669 12:40:10.958016 PCI: 00:1f.7: enabled 0
670 12:40:10.958577 APIC: 00: enabled 1
671 12:40:10.961575 GENERIC: 0.0: enabled 1
672 12:40:10.964535 GENERIC: 0.0: enabled 1
673 12:40:10.968139 GENERIC: 1.0: enabled 1
674 12:40:10.968709 GENERIC: 0.0: enabled 1
675 12:40:10.971540 GENERIC: 1.0: enabled 1
676 12:40:10.974758 USB0 port 0: enabled 1
677 12:40:10.978032 GENERIC: 0.0: enabled 1
678 12:40:10.978593 USB0 port 0: enabled 1
679 12:40:10.981355 GENERIC: 0.0: enabled 1
680 12:40:10.984822 I2C: 00:1a: enabled 1
681 12:40:10.985378 I2C: 00:31: enabled 1
682 12:40:10.988139 I2C: 00:32: enabled 1
683 12:40:10.991531 I2C: 00:10: enabled 1
684 12:40:10.992150 I2C: 00:15: enabled 1
685 12:40:10.994828 GENERIC: 0.0: enabled 0
686 12:40:10.997634 GENERIC: 1.0: enabled 0
687 12:40:11.001119 GENERIC: 0.0: enabled 1
688 12:40:11.001579 SPI: 00: enabled 1
689 12:40:11.004450 SPI: 00: enabled 1
690 12:40:11.004913 PNP: 0c09.0: enabled 1
691 12:40:11.007579 GENERIC: 0.0: enabled 1
692 12:40:11.011003 USB3 port 0: enabled 1
693 12:40:11.014559 USB3 port 1: enabled 1
694 12:40:11.015129 USB3 port 2: enabled 0
695 12:40:11.017935 USB3 port 3: enabled 0
696 12:40:11.021163 USB2 port 0: enabled 0
697 12:40:11.021770 USB2 port 1: enabled 1
698 12:40:11.024556 USB2 port 2: enabled 1
699 12:40:11.027550 USB2 port 3: enabled 0
700 12:40:11.031224 USB2 port 4: enabled 1
701 12:40:11.031782 USB2 port 5: enabled 0
702 12:40:11.034865 USB2 port 6: enabled 0
703 12:40:11.037767 USB2 port 7: enabled 0
704 12:40:11.038390 USB2 port 8: enabled 0
705 12:40:11.041271 USB2 port 9: enabled 0
706 12:40:11.044641 USB3 port 0: enabled 0
707 12:40:11.048262 USB3 port 1: enabled 1
708 12:40:11.048820 USB3 port 2: enabled 0
709 12:40:11.050911 USB3 port 3: enabled 0
710 12:40:11.054430 GENERIC: 0.0: enabled 1
711 12:40:11.055000 GENERIC: 1.0: enabled 1
712 12:40:11.058080 APIC: 01: enabled 1
713 12:40:11.061015 APIC: 05: enabled 1
714 12:40:11.061582 APIC: 07: enabled 1
715 12:40:11.064651 APIC: 02: enabled 1
716 12:40:11.065217 APIC: 04: enabled 1
717 12:40:11.067642 APIC: 06: enabled 1
718 12:40:11.072134 APIC: 03: enabled 1
719 12:40:11.072709 Compare with tree...
720 12:40:11.074115 Root Device: enabled 1
721 12:40:11.077828 DOMAIN: 0000: enabled 1
722 12:40:11.080943 PCI: 00:00.0: enabled 1
723 12:40:11.081509 PCI: 00:02.0: enabled 1
724 12:40:11.084331 PCI: 00:04.0: enabled 1
725 12:40:11.087635 GENERIC: 0.0: enabled 1
726 12:40:11.091773 PCI: 00:05.0: enabled 1
727 12:40:11.094122 PCI: 00:06.0: enabled 0
728 12:40:11.094736 PCI: 00:07.0: enabled 0
729 12:40:11.097366 GENERIC: 0.0: enabled 1
730 12:40:11.100762 PCI: 00:07.1: enabled 0
731 12:40:11.104207 GENERIC: 1.0: enabled 1
732 12:40:11.107854 PCI: 00:07.2: enabled 0
733 12:40:11.111290 GENERIC: 0.0: enabled 1
734 12:40:11.111750 PCI: 00:07.3: enabled 0
735 12:40:11.114007 GENERIC: 1.0: enabled 1
736 12:40:11.117037 PCI: 00:08.0: enabled 1
737 12:40:11.121325 PCI: 00:09.0: enabled 0
738 12:40:11.123877 PCI: 00:0a.0: enabled 0
739 12:40:11.124395 PCI: 00:0d.0: enabled 1
740 12:40:11.127386 USB0 port 0: enabled 1
741 12:40:11.130546 USB3 port 0: enabled 1
742 12:40:11.134068 USB3 port 1: enabled 1
743 12:40:11.137279 USB3 port 2: enabled 0
744 12:40:11.137734 USB3 port 3: enabled 0
745 12:40:11.140299 PCI: 00:0d.1: enabled 0
746 12:40:11.144150 PCI: 00:0d.2: enabled 0
747 12:40:11.147217 GENERIC: 0.0: enabled 1
748 12:40:11.151051 PCI: 00:0d.3: enabled 0
749 12:40:11.151618 PCI: 00:0e.0: enabled 0
750 12:40:11.154792 PCI: 00:10.2: enabled 1
751 12:40:11.157714 PCI: 00:10.6: enabled 0
752 12:40:11.161004 PCI: 00:10.7: enabled 0
753 12:40:11.164837 PCI: 00:12.0: enabled 0
754 12:40:11.165406 PCI: 00:12.6: enabled 0
755 12:40:11.167333 PCI: 00:13.0: enabled 0
756 12:40:11.170361 PCI: 00:14.0: enabled 1
757 12:40:11.174547 USB0 port 0: enabled 1
758 12:40:11.177160 USB2 port 0: enabled 0
759 12:40:11.177730 USB2 port 1: enabled 1
760 12:40:11.180665 USB2 port 2: enabled 1
761 12:40:11.183849 USB2 port 3: enabled 0
762 12:40:11.187234 USB2 port 4: enabled 1
763 12:40:11.190800 USB2 port 5: enabled 0
764 12:40:11.193922 USB2 port 6: enabled 0
765 12:40:11.194493 USB2 port 7: enabled 0
766 12:40:11.196785 USB2 port 8: enabled 0
767 12:40:11.200489 USB2 port 9: enabled 0
768 12:40:11.203638 USB3 port 0: enabled 0
769 12:40:11.207537 USB3 port 1: enabled 1
770 12:40:11.210137 USB3 port 2: enabled 0
771 12:40:11.210718 USB3 port 3: enabled 0
772 12:40:11.213714 PCI: 00:14.1: enabled 0
773 12:40:11.216775 PCI: 00:14.2: enabled 1
774 12:40:11.220248 PCI: 00:14.3: enabled 1
775 12:40:11.223811 GENERIC: 0.0: enabled 1
776 12:40:11.224328 PCI: 00:15.0: enabled 1
777 12:40:11.226774 I2C: 00:1a: enabled 1
778 12:40:11.230082 I2C: 00:31: enabled 1
779 12:40:11.233533 I2C: 00:32: enabled 1
780 12:40:11.234100 PCI: 00:15.1: enabled 1
781 12:40:11.236962 I2C: 00:10: enabled 1
782 12:40:11.240432 PCI: 00:15.2: enabled 1
783 12:40:11.243458 PCI: 00:15.3: enabled 1
784 12:40:11.246510 PCI: 00:16.0: enabled 1
785 12:40:11.247079 PCI: 00:16.1: enabled 0
786 12:40:11.250106 PCI: 00:16.2: enabled 0
787 12:40:11.253524 PCI: 00:16.3: enabled 0
788 12:40:11.256989 PCI: 00:16.4: enabled 0
789 12:40:11.257452 PCI: 00:16.5: enabled 0
790 12:40:11.261418 PCI: 00:17.0: enabled 1
791 12:40:11.264579 PCI: 00:19.0: enabled 0
792 12:40:11.267657 PCI: 00:19.1: enabled 1
793 12:40:11.268136 I2C: 00:15: enabled 1
794 12:40:11.271255 PCI: 00:19.2: enabled 0
795 12:40:11.274658 PCI: 00:1d.0: enabled 1
796 12:40:11.278224 GENERIC: 0.0: enabled 1
797 12:40:11.281670 PCI: 00:1e.0: enabled 1
798 12:40:11.282235 PCI: 00:1e.1: enabled 0
799 12:40:11.284599 PCI: 00:1e.2: enabled 1
800 12:40:11.334510 SPI: 00: enabled 1
801 12:40:11.335139 PCI: 00:1e.3: enabled 1
802 12:40:11.335572 SPI: 00: enabled 1
803 12:40:11.336018 PCI: 00:1f.0: enabled 1
804 12:40:11.336415 PNP: 0c09.0: enabled 1
805 12:40:11.336803 PCI: 00:1f.1: enabled 0
806 12:40:11.337149 PCI: 00:1f.2: enabled 1
807 12:40:11.337826 GENERIC: 0.0: enabled 1
808 12:40:11.338182 GENERIC: 0.0: enabled 1
809 12:40:11.338503 GENERIC: 1.0: enabled 1
810 12:40:11.338813 PCI: 00:1f.3: enabled 1
811 12:40:11.339117 PCI: 00:1f.4: enabled 0
812 12:40:11.339420 PCI: 00:1f.5: enabled 1
813 12:40:11.339718 PCI: 00:1f.6: enabled 0
814 12:40:11.340013 PCI: 00:1f.7: enabled 0
815 12:40:11.340368 CPU_CLUSTER: 0: enabled 1
816 12:40:11.340670 APIC: 00: enabled 1
817 12:40:11.340969 APIC: 01: enabled 1
818 12:40:11.341265 APIC: 05: enabled 1
819 12:40:11.341559 APIC: 07: enabled 1
820 12:40:11.381057 APIC: 02: enabled 1
821 12:40:11.381716 APIC: 04: enabled 1
822 12:40:11.382454 APIC: 06: enabled 1
823 12:40:11.382844 APIC: 03: enabled 1
824 12:40:11.383188 Root Device scanning...
825 12:40:11.383517 scan_static_bus for Root Device
826 12:40:11.383839 DOMAIN: 0000 enabled
827 12:40:11.384230 CPU_CLUSTER: 0 enabled
828 12:40:11.384564 DOMAIN: 0000 scanning...
829 12:40:11.384875 PCI: pci_scan_bus for bus 00
830 12:40:11.385181 PCI: 00:00.0 [8086/0000] ops
831 12:40:11.385489 PCI: 00:00.0 [8086/9a12] enabled
832 12:40:11.385796 PCI: 00:02.0 [8086/0000] bus ops
833 12:40:11.386102 PCI: 00:02.0 [8086/9a40] enabled
834 12:40:11.386473 PCI: 00:04.0 [8086/0000] bus ops
835 12:40:11.386792 PCI: 00:04.0 [8086/9a03] enabled
836 12:40:11.387099 PCI: 00:05.0 [8086/9a19] enabled
837 12:40:11.389033 PCI: 00:07.0 [0000/0000] hidden
838 12:40:11.392631 PCI: 00:08.0 [8086/9a11] enabled
839 12:40:11.395767 PCI: 00:0a.0 [8086/9a0d] disabled
840 12:40:11.399203 PCI: 00:0d.0 [8086/0000] bus ops
841 12:40:11.402864 PCI: 00:0d.0 [8086/9a13] enabled
842 12:40:11.405629 PCI: 00:14.0 [8086/0000] bus ops
843 12:40:11.408988 PCI: 00:14.0 [8086/a0ed] enabled
844 12:40:11.412820 PCI: 00:14.2 [8086/a0ef] enabled
845 12:40:11.415568 PCI: 00:14.3 [8086/0000] bus ops
846 12:40:11.418999 PCI: 00:14.3 [8086/a0f0] enabled
847 12:40:11.422166 PCI: 00:15.0 [8086/0000] bus ops
848 12:40:11.425462 PCI: 00:15.0 [8086/a0e8] enabled
849 12:40:11.428663 PCI: 00:15.1 [8086/0000] bus ops
850 12:40:11.432213 PCI: 00:15.1 [8086/a0e9] enabled
851 12:40:11.435596 PCI: 00:15.2 [8086/0000] bus ops
852 12:40:11.438762 PCI: 00:15.2 [8086/a0ea] enabled
853 12:40:11.442212 PCI: 00:15.3 [8086/0000] bus ops
854 12:40:11.445333 PCI: 00:15.3 [8086/a0eb] enabled
855 12:40:11.448753 PCI: 00:16.0 [8086/0000] ops
856 12:40:11.452724 PCI: 00:16.0 [8086/a0e0] enabled
857 12:40:11.458821 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 12:40:11.461981 PCI: 00:19.0 [8086/0000] bus ops
859 12:40:11.465893 PCI: 00:19.0 [8086/a0c5] disabled
860 12:40:11.468788 PCI: 00:19.1 [8086/0000] bus ops
861 12:40:11.472228 PCI: 00:19.1 [8086/a0c6] enabled
862 12:40:11.475222 PCI: 00:1d.0 [8086/0000] bus ops
863 12:40:11.478715 PCI: 00:1d.0 [8086/a0b0] enabled
864 12:40:11.481347 PCI: 00:1e.0 [8086/0000] ops
865 12:40:11.484888 PCI: 00:1e.0 [8086/a0a8] enabled
866 12:40:11.489036 PCI: 00:1e.2 [8086/0000] bus ops
867 12:40:11.491684 PCI: 00:1e.2 [8086/a0aa] enabled
868 12:40:11.494918 PCI: 00:1e.3 [8086/0000] bus ops
869 12:40:11.498244 PCI: 00:1e.3 [8086/a0ab] enabled
870 12:40:11.502072 PCI: 00:1f.0 [8086/0000] bus ops
871 12:40:11.504745 PCI: 00:1f.0 [8086/a087] enabled
872 12:40:11.505310 RTC Init
873 12:40:11.508467 Set power on after power failure.
874 12:40:11.511503 Disabling Deep S3
875 12:40:11.511960 Disabling Deep S3
876 12:40:11.514382 Disabling Deep S4
877 12:40:11.514840 Disabling Deep S4
878 12:40:11.518391 Disabling Deep S5
879 12:40:11.521260 Disabling Deep S5
880 12:40:11.524240 PCI: 00:1f.2 [0000/0000] hidden
881 12:40:11.529030 PCI: 00:1f.3 [8086/0000] bus ops
882 12:40:11.530954 PCI: 00:1f.3 [8086/a0c8] enabled
883 12:40:11.534384 PCI: 00:1f.5 [8086/0000] bus ops
884 12:40:11.537803 PCI: 00:1f.5 [8086/a0a4] enabled
885 12:40:11.538263 PCI: Leftover static devices:
886 12:40:11.541041 PCI: 00:10.2
887 12:40:11.541496 PCI: 00:10.6
888 12:40:11.544622 PCI: 00:10.7
889 12:40:11.545036 PCI: 00:06.0
890 12:40:11.547589 PCI: 00:07.1
891 12:40:11.548000 PCI: 00:07.2
892 12:40:11.548379 PCI: 00:07.3
893 12:40:11.550948 PCI: 00:09.0
894 12:40:11.551500 PCI: 00:0d.1
895 12:40:11.554061 PCI: 00:0d.2
896 12:40:11.554477 PCI: 00:0d.3
897 12:40:11.554800 PCI: 00:0e.0
898 12:40:11.557254 PCI: 00:12.0
899 12:40:11.557669 PCI: 00:12.6
900 12:40:11.560990 PCI: 00:13.0
901 12:40:11.561404 PCI: 00:14.1
902 12:40:11.564207 PCI: 00:16.1
903 12:40:11.564620 PCI: 00:16.2
904 12:40:11.564945 PCI: 00:16.3
905 12:40:11.567841 PCI: 00:16.4
906 12:40:11.568287 PCI: 00:16.5
907 12:40:11.570794 PCI: 00:17.0
908 12:40:11.571207 PCI: 00:19.2
909 12:40:11.571529 PCI: 00:1e.1
910 12:40:11.574789 PCI: 00:1f.1
911 12:40:11.575310 PCI: 00:1f.4
912 12:40:11.577474 PCI: 00:1f.6
913 12:40:11.577889 PCI: 00:1f.7
914 12:40:11.581083 PCI: Check your devicetree.cb.
915 12:40:11.584238 PCI: 00:02.0 scanning...
916 12:40:11.587579 scan_generic_bus for PCI: 00:02.0
917 12:40:11.590414 scan_generic_bus for PCI: 00:02.0 done
918 12:40:11.597710 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 12:40:11.598226 PCI: 00:04.0 scanning...
920 12:40:11.600688 scan_generic_bus for PCI: 00:04.0
921 12:40:11.604302 GENERIC: 0.0 enabled
922 12:40:11.610871 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 12:40:11.614349 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 12:40:11.617212 PCI: 00:0d.0 scanning...
925 12:40:11.620272 scan_static_bus for PCI: 00:0d.0
926 12:40:11.623602 USB0 port 0 enabled
927 12:40:11.627207 USB0 port 0 scanning...
928 12:40:11.630467 scan_static_bus for USB0 port 0
929 12:40:11.630987 USB3 port 0 enabled
930 12:40:11.633626 USB3 port 1 enabled
931 12:40:11.636962 USB3 port 2 disabled
932 12:40:11.637429 USB3 port 3 disabled
933 12:40:11.640686 USB3 port 0 scanning...
934 12:40:11.643823 scan_static_bus for USB3 port 0
935 12:40:11.646781 scan_static_bus for USB3 port 0 done
936 12:40:11.654032 scan_bus: bus USB3 port 0 finished in 6 msecs
937 12:40:11.654590 USB3 port 1 scanning...
938 12:40:11.656601 scan_static_bus for USB3 port 1
939 12:40:11.659897 scan_static_bus for USB3 port 1 done
940 12:40:11.666768 scan_bus: bus USB3 port 1 finished in 6 msecs
941 12:40:11.670122 scan_static_bus for USB0 port 0 done
942 12:40:11.673317 scan_bus: bus USB0 port 0 finished in 43 msecs
943 12:40:11.676299 scan_static_bus for PCI: 00:0d.0 done
944 12:40:11.683429 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 12:40:11.686553 PCI: 00:14.0 scanning...
946 12:40:11.689408 scan_static_bus for PCI: 00:14.0
947 12:40:11.689867 USB0 port 0 enabled
948 12:40:11.692840 USB0 port 0 scanning...
949 12:40:11.696215 scan_static_bus for USB0 port 0
950 12:40:11.699853 USB2 port 0 disabled
951 12:40:11.700462 USB2 port 1 enabled
952 12:40:11.703035 USB2 port 2 enabled
953 12:40:11.706147 USB2 port 3 disabled
954 12:40:11.706704 USB2 port 4 enabled
955 12:40:11.709246 USB2 port 5 disabled
956 12:40:11.712821 USB2 port 6 disabled
957 12:40:11.713431 USB2 port 7 disabled
958 12:40:11.715816 USB2 port 8 disabled
959 12:40:11.719428 USB2 port 9 disabled
960 12:40:11.719984 USB3 port 0 disabled
961 12:40:11.722308 USB3 port 1 enabled
962 12:40:11.725876 USB3 port 2 disabled
963 12:40:11.726403 USB3 port 3 disabled
964 12:40:11.728995 USB2 port 1 scanning...
965 12:40:11.732624 scan_static_bus for USB2 port 1
966 12:40:11.736188 scan_static_bus for USB2 port 1 done
967 12:40:11.742834 scan_bus: bus USB2 port 1 finished in 6 msecs
968 12:40:11.743402 USB2 port 2 scanning...
969 12:40:11.746775 scan_static_bus for USB2 port 2
970 12:40:11.748653 scan_static_bus for USB2 port 2 done
971 12:40:11.755624 scan_bus: bus USB2 port 2 finished in 6 msecs
972 12:40:11.759332 USB2 port 4 scanning...
973 12:40:11.762251 scan_static_bus for USB2 port 4
974 12:40:11.765694 scan_static_bus for USB2 port 4 done
975 12:40:11.768982 scan_bus: bus USB2 port 4 finished in 6 msecs
976 12:40:11.772419 USB3 port 1 scanning...
977 12:40:11.775479 scan_static_bus for USB3 port 1
978 12:40:11.778823 scan_static_bus for USB3 port 1 done
979 12:40:11.782230 scan_bus: bus USB3 port 1 finished in 6 msecs
980 12:40:11.789044 scan_static_bus for USB0 port 0 done
981 12:40:11.792157 scan_bus: bus USB0 port 0 finished in 93 msecs
982 12:40:11.795414 scan_static_bus for PCI: 00:14.0 done
983 12:40:11.801738 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 12:40:11.802291 PCI: 00:14.3 scanning...
985 12:40:11.805164 scan_static_bus for PCI: 00:14.3
986 12:40:11.808931 GENERIC: 0.0 enabled
987 12:40:11.812532 scan_static_bus for PCI: 00:14.3 done
988 12:40:11.818574 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 12:40:11.819146 PCI: 00:15.0 scanning...
990 12:40:11.821463 scan_static_bus for PCI: 00:15.0
991 12:40:11.824732 I2C: 00:1a enabled
992 12:40:11.828848 I2C: 00:31 enabled
993 12:40:11.829304 I2C: 00:32 enabled
994 12:40:11.832194 scan_static_bus for PCI: 00:15.0 done
995 12:40:11.838658 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 12:40:11.839354 PCI: 00:15.1 scanning...
997 12:40:11.843026 scan_static_bus for PCI: 00:15.1
998 12:40:11.845451 I2C: 00:10 enabled
999 12:40:11.849057 scan_static_bus for PCI: 00:15.1 done
1000 12:40:11.855961 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 12:40:11.856564 PCI: 00:15.2 scanning...
1002 12:40:11.859015 scan_static_bus for PCI: 00:15.2
1003 12:40:11.865438 scan_static_bus for PCI: 00:15.2 done
1004 12:40:11.868813 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 12:40:11.872310 PCI: 00:15.3 scanning...
1006 12:40:11.876443 scan_static_bus for PCI: 00:15.3
1007 12:40:11.878607 scan_static_bus for PCI: 00:15.3 done
1008 12:40:11.881936 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 12:40:11.885233 PCI: 00:19.1 scanning...
1010 12:40:11.888924 scan_static_bus for PCI: 00:19.1
1011 12:40:11.891902 I2C: 00:15 enabled
1012 12:40:11.896223 scan_static_bus for PCI: 00:19.1 done
1013 12:40:11.898479 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 12:40:11.901804 PCI: 00:1d.0 scanning...
1015 12:40:11.905020 do_pci_scan_bridge for PCI: 00:1d.0
1016 12:40:11.908465 PCI: pci_scan_bus for bus 01
1017 12:40:11.911911 PCI: 01:00.0 [1c5c/174a] enabled
1018 12:40:11.915162 GENERIC: 0.0 enabled
1019 12:40:11.919279 Enabling Common Clock Configuration
1020 12:40:11.921385 L1 Sub-State supported from root port 29
1021 12:40:11.924862 L1 Sub-State Support = 0xf
1022 12:40:11.928289 CommonModeRestoreTime = 0x28
1023 12:40:11.931932 Power On Value = 0x16, Power On Scale = 0x0
1024 12:40:11.934856 ASPM: Enabled L1
1025 12:40:11.938478 PCIe: Max_Payload_Size adjusted to 128
1026 12:40:11.944523 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 12:40:11.945116 PCI: 00:1e.2 scanning...
1028 12:40:11.951652 scan_generic_bus for PCI: 00:1e.2
1029 12:40:11.952254 SPI: 00 enabled
1030 12:40:11.958212 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 12:40:11.961507 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 12:40:11.964603 PCI: 00:1e.3 scanning...
1033 12:40:11.968206 scan_generic_bus for PCI: 00:1e.3
1034 12:40:11.971706 SPI: 00 enabled
1035 12:40:11.974727 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 12:40:11.981142 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 12:40:11.984701 PCI: 00:1f.0 scanning...
1038 12:40:11.988155 scan_static_bus for PCI: 00:1f.0
1039 12:40:11.988711 PNP: 0c09.0 enabled
1040 12:40:11.991272 PNP: 0c09.0 scanning...
1041 12:40:11.994433 scan_static_bus for PNP: 0c09.0
1042 12:40:11.997871 scan_static_bus for PNP: 0c09.0 done
1043 12:40:12.004855 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 12:40:12.007966 scan_static_bus for PCI: 00:1f.0 done
1045 12:40:12.011146 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 12:40:12.014639 PCI: 00:1f.2 scanning...
1047 12:40:12.017773 scan_static_bus for PCI: 00:1f.2
1048 12:40:12.020761 GENERIC: 0.0 enabled
1049 12:40:12.023741 GENERIC: 0.0 scanning...
1050 12:40:12.027394 scan_static_bus for GENERIC: 0.0
1051 12:40:12.027848 GENERIC: 0.0 enabled
1052 12:40:12.030787 GENERIC: 1.0 enabled
1053 12:40:12.034189 scan_static_bus for GENERIC: 0.0 done
1054 12:40:12.040777 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 12:40:12.044098 scan_static_bus for PCI: 00:1f.2 done
1056 12:40:12.048183 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 12:40:12.050875 PCI: 00:1f.3 scanning...
1058 12:40:12.054183 scan_static_bus for PCI: 00:1f.3
1059 12:40:12.057276 scan_static_bus for PCI: 00:1f.3 done
1060 12:40:12.063858 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 12:40:12.064463 PCI: 00:1f.5 scanning...
1062 12:40:12.067428 scan_generic_bus for PCI: 00:1f.5
1063 12:40:12.073981 scan_generic_bus for PCI: 00:1f.5 done
1064 12:40:12.076932 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 12:40:12.083878 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 12:40:12.087521 scan_static_bus for Root Device done
1067 12:40:12.090707 scan_bus: bus Root Device finished in 737 msecs
1068 12:40:12.091264 done
1069 12:40:12.097501 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 12:40:12.101040 Chrome EC: UHEPI supported
1071 12:40:12.107439 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 12:40:12.114255 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 12:40:12.116556 SPI flash protection: WPSW=0 SRP0=0
1074 12:40:12.120364 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 12:40:12.126692 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 12:40:12.130414 found VGA at PCI: 00:02.0
1077 12:40:12.133741 Setting up VGA for PCI: 00:02.0
1078 12:40:12.136998 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 12:40:12.143806 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 12:40:12.146688 Allocating resources...
1081 12:40:12.147239 Reading resources...
1082 12:40:12.153222 Root Device read_resources bus 0 link: 0
1083 12:40:12.156840 DOMAIN: 0000 read_resources bus 0 link: 0
1084 12:40:12.160479 PCI: 00:04.0 read_resources bus 1 link: 0
1085 12:40:12.167140 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 12:40:12.170411 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 12:40:12.177051 USB0 port 0 read_resources bus 0 link: 0
1088 12:40:12.179947 USB0 port 0 read_resources bus 0 link: 0 done
1089 12:40:12.186919 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 12:40:12.189988 PCI: 00:14.0 read_resources bus 0 link: 0
1091 12:40:12.193699 USB0 port 0 read_resources bus 0 link: 0
1092 12:40:12.201224 USB0 port 0 read_resources bus 0 link: 0 done
1093 12:40:12.204672 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 12:40:12.212137 PCI: 00:14.3 read_resources bus 0 link: 0
1095 12:40:12.214740 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 12:40:12.221161 PCI: 00:15.0 read_resources bus 0 link: 0
1097 12:40:12.224382 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 12:40:12.231092 PCI: 00:15.1 read_resources bus 0 link: 0
1099 12:40:12.235175 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 12:40:12.241740 PCI: 00:19.1 read_resources bus 0 link: 0
1101 12:40:12.245780 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 12:40:12.251975 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 12:40:12.255123 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 12:40:12.261876 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 12:40:12.264963 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 12:40:12.271459 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 12:40:12.275067 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 12:40:12.281885 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 12:40:12.285841 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 12:40:12.291250 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 12:40:12.294848 GENERIC: 0.0 read_resources bus 0 link: 0
1112 12:40:12.301210 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 12:40:12.304834 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 12:40:12.311304 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 12:40:12.314532 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 12:40:12.321421 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 12:40:12.324241 Root Device read_resources bus 0 link: 0 done
1118 12:40:12.327957 Done reading resources.
1119 12:40:12.334411 Show resources in subtree (Root Device)...After reading.
1120 12:40:12.337489 Root Device child on link 0 DOMAIN: 0000
1121 12:40:12.340859 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 12:40:12.351040 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 12:40:12.360704 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 12:40:12.361267 PCI: 00:00.0
1125 12:40:12.370856 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 12:40:12.380195 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 12:40:12.390905 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 12:40:12.400095 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 12:40:12.410002 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 12:40:12.419962 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 12:40:12.426502 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 12:40:12.436827 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 12:40:12.447247 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 12:40:12.456993 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 12:40:12.466668 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 12:40:12.477101 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 12:40:12.483294 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 12:40:12.492747 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 12:40:12.503235 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 12:40:12.512713 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 12:40:12.522472 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 12:40:12.532830 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 12:40:12.542334 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 12:40:12.548936 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 12:40:12.552562 PCI: 00:02.0
1146 12:40:12.562437 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 12:40:12.571883 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 12:40:12.581889 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 12:40:12.585706 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 12:40:12.595497 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 12:40:12.598364 GENERIC: 0.0
1152 12:40:12.598818 PCI: 00:05.0
1153 12:40:12.608564 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 12:40:12.615359 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 12:40:12.615928 GENERIC: 0.0
1156 12:40:12.618761 PCI: 00:08.0
1157 12:40:12.629594 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 12:40:12.630141 PCI: 00:0a.0
1159 12:40:12.635008 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 12:40:12.644898 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 12:40:12.648275 USB0 port 0 child on link 0 USB3 port 0
1162 12:40:12.648827 USB3 port 0
1163 12:40:12.651265 USB3 port 1
1164 12:40:12.655128 USB3 port 2
1165 12:40:12.655686 USB3 port 3
1166 12:40:12.658199 PCI: 00:14.0 child on link 0 USB0 port 0
1167 12:40:12.667914 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 12:40:12.674667 USB0 port 0 child on link 0 USB2 port 0
1169 12:40:12.675227 USB2 port 0
1170 12:40:12.677961 USB2 port 1
1171 12:40:12.678429 USB2 port 2
1172 12:40:12.681159 USB2 port 3
1173 12:40:12.681611 USB2 port 4
1174 12:40:12.685066 USB2 port 5
1175 12:40:12.687790 USB2 port 6
1176 12:40:12.688401 USB2 port 7
1177 12:40:12.691404 USB2 port 8
1178 12:40:12.691959 USB2 port 9
1179 12:40:12.694256 USB3 port 0
1180 12:40:12.694708 USB3 port 1
1181 12:40:12.697679 USB3 port 2
1182 12:40:12.698213 USB3 port 3
1183 12:40:12.700840 PCI: 00:14.2
1184 12:40:12.711009 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 12:40:12.721024 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 12:40:12.724298 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 12:40:12.734212 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 12:40:12.737526 GENERIC: 0.0
1189 12:40:12.741301 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 12:40:12.750811 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 12:40:12.751372 I2C: 00:1a
1192 12:40:12.754400 I2C: 00:31
1193 12:40:12.754854 I2C: 00:32
1194 12:40:12.761051 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 12:40:12.770482 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 12:40:12.771043 I2C: 00:10
1197 12:40:12.773477 PCI: 00:15.2
1198 12:40:12.783796 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 12:40:12.784527 PCI: 00:15.3
1200 12:40:12.793482 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 12:40:12.796984 PCI: 00:16.0
1202 12:40:12.806800 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 12:40:12.807355 PCI: 00:19.0
1204 12:40:12.813898 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 12:40:12.823303 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 12:40:12.823860 I2C: 00:15
1207 12:40:12.826708 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 12:40:12.836613 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 12:40:12.846949 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 12:40:12.856291 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 12:40:12.856843 GENERIC: 0.0
1212 12:40:12.859798 PCI: 01:00.0
1213 12:40:12.869725 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 12:40:12.879782 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 12:40:12.889620 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 12:40:12.890177 PCI: 00:1e.0
1217 12:40:12.899196 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 12:40:12.905923 PCI: 00:1e.2 child on link 0 SPI: 00
1219 12:40:12.915759 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 12:40:12.916367 SPI: 00
1221 12:40:12.919155 PCI: 00:1e.3 child on link 0 SPI: 00
1222 12:40:12.929152 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 12:40:12.932198 SPI: 00
1224 12:40:12.936046 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 12:40:12.945716 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 12:40:12.946272 PNP: 0c09.0
1227 12:40:12.955848 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 12:40:12.959207 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 12:40:12.968841 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 12:40:12.978992 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 12:40:12.982582 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 12:40:12.985554 GENERIC: 0.0
1233 12:40:12.986008 GENERIC: 1.0
1234 12:40:12.988830 PCI: 00:1f.3
1235 12:40:12.999293 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 12:40:13.008994 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 12:40:13.009551 PCI: 00:1f.5
1238 12:40:13.019017 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 12:40:13.021783 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 12:40:13.025366 APIC: 00
1241 12:40:13.025890 APIC: 01
1242 12:40:13.026253 APIC: 05
1243 12:40:13.028381 APIC: 07
1244 12:40:13.028845 APIC: 02
1245 12:40:13.031688 APIC: 04
1246 12:40:13.032183 APIC: 06
1247 12:40:13.032550 APIC: 03
1248 12:40:13.041829 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 12:40:13.044733 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 12:40:13.051530 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 12:40:13.058808 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 12:40:13.061349 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 12:40:13.068181 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 12:40:13.071523 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 12:40:13.078314 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 12:40:13.085128 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 12:40:13.094733 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 12:40:13.100952 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 12:40:13.107720 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 12:40:13.114626 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 12:40:13.121067 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 12:40:13.131072 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 12:40:13.134295 DOMAIN: 0000: Resource ranges:
1264 12:40:13.137521 * Base: 1000, Size: 800, Tag: 100
1265 12:40:13.140411 * Base: 1900, Size: e700, Tag: 100
1266 12:40:13.144001 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 12:40:13.150988 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 12:40:13.156881 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 12:40:13.167210 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 12:40:13.173472 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 12:40:13.180676 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 12:40:13.190487 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 12:40:13.196938 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 12:40:13.203715 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 12:40:13.213573 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 12:40:13.220080 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 12:40:13.226620 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 12:40:13.236431 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 12:40:13.243363 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 12:40:13.250104 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 12:40:13.260223 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 12:40:13.266196 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 12:40:13.272793 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 12:40:13.283083 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 12:40:13.289423 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 12:40:13.296587 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 12:40:13.306049 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 12:40:13.312989 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 12:40:13.320005 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 12:40:13.329186 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 12:40:13.332782 DOMAIN: 0000: Resource ranges:
1292 12:40:13.335866 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 12:40:13.338856 * Base: d0000000, Size: 28000000, Tag: 200
1294 12:40:13.345615 * Base: fa000000, Size: 1000000, Tag: 200
1295 12:40:13.348901 * Base: fb001000, Size: 2fff000, Tag: 200
1296 12:40:13.352101 * Base: fe010000, Size: 2e000, Tag: 200
1297 12:40:13.359222 * Base: fe03f000, Size: d41000, Tag: 200
1298 12:40:13.362515 * Base: fed88000, Size: 8000, Tag: 200
1299 12:40:13.365604 * Base: fed93000, Size: d000, Tag: 200
1300 12:40:13.369000 * Base: feda2000, Size: 1e000, Tag: 200
1301 12:40:13.372225 * Base: fede0000, Size: 1220000, Tag: 200
1302 12:40:13.379008 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 12:40:13.385549 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 12:40:13.392362 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 12:40:13.398613 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 12:40:13.406059 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 12:40:13.412089 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 12:40:13.418594 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 12:40:13.425035 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 12:40:13.431590 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 12:40:13.438063 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 12:40:13.445224 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 12:40:13.451505 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 12:40:13.458272 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 12:40:13.465063 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 12:40:13.471494 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 12:40:13.478220 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 12:40:13.484766 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 12:40:13.491544 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 12:40:13.497879 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 12:40:13.504240 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 12:40:13.511568 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 12:40:13.517663 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 12:40:13.523959 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 12:40:13.531144 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 12:40:13.541090 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 12:40:13.543853 PCI: 00:1d.0: Resource ranges:
1328 12:40:13.547819 * Base: 7fc00000, Size: 100000, Tag: 200
1329 12:40:13.553981 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 12:40:13.560637 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 12:40:13.567275 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 12:40:13.577445 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 12:40:13.584033 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 12:40:13.587084 Root Device assign_resources, bus 0 link: 0
1335 12:40:13.593940 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 12:40:13.600211 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 12:40:13.610796 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 12:40:13.616887 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 12:40:13.626633 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 12:40:13.629828 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 12:40:13.633153 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 12:40:13.643086 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 12:40:13.649974 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 12:40:13.659407 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 12:40:13.662628 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 12:40:13.670481 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 12:40:13.675913 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 12:40:13.679517 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 12:40:13.687230 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 12:40:13.692787 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 12:40:13.703111 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 12:40:13.709614 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 12:40:13.716287 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 12:40:13.719620 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 12:40:13.729182 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 12:40:13.733507 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 12:40:13.735799 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 12:40:13.746294 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 12:40:13.749804 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 12:40:13.755896 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 12:40:13.762518 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 12:40:13.772538 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 12:40:13.778963 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 12:40:13.789071 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 12:40:13.792136 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 12:40:13.795710 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 12:40:13.805529 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 12:40:13.815346 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 12:40:13.825026 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 12:40:13.828286 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 12:40:13.835636 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 12:40:13.845731 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 12:40:13.852312 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 12:40:13.858707 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 12:40:13.864713 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 12:40:13.872146 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 12:40:13.874817 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 12:40:13.881103 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 12:40:13.888125 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 12:40:13.891289 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 12:40:13.898478 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 12:40:13.901007 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 12:40:13.907923 LPC: Trying to open IO window from 800 size 1ff
1384 12:40:13.914354 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 12:40:13.924206 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 12:40:13.931171 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 12:40:13.938215 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 12:40:13.940697 Root Device assign_resources, bus 0 link: 0
1389 12:40:13.944581 Done setting resources.
1390 12:40:13.951343 Show resources in subtree (Root Device)...After assigning values.
1391 12:40:13.954869 Root Device child on link 0 DOMAIN: 0000
1392 12:40:13.957836 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 12:40:13.967480 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 12:40:13.977457 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 12:40:13.980726 PCI: 00:00.0
1396 12:40:13.987358 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 12:40:13.997198 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 12:40:14.007778 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 12:40:14.017166 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 12:40:14.026563 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 12:40:14.036800 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 12:40:14.043811 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 12:40:14.053148 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 12:40:14.062883 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 12:40:14.072831 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 12:40:14.082967 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 12:40:14.092957 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 12:40:14.099440 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 12:40:14.109245 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 12:40:14.119372 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 12:40:14.129525 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 12:40:14.139165 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 12:40:14.149395 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 12:40:14.155666 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 12:40:14.165783 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 12:40:14.169369 PCI: 00:02.0
1417 12:40:14.179154 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 12:40:14.188881 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 12:40:14.198776 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 12:40:14.202380 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 12:40:14.215470 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 12:40:14.215612 GENERIC: 0.0
1423 12:40:14.218877 PCI: 00:05.0
1424 12:40:14.228839 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 12:40:14.232378 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 12:40:14.235929 GENERIC: 0.0
1427 12:40:14.236042 PCI: 00:08.0
1428 12:40:14.245321 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 12:40:14.248825 PCI: 00:0a.0
1430 12:40:14.252029 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 12:40:14.261845 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 12:40:14.268699 USB0 port 0 child on link 0 USB3 port 0
1433 12:40:14.268782 USB3 port 0
1434 12:40:14.272582 USB3 port 1
1435 12:40:14.272742 USB3 port 2
1436 12:40:14.275981 USB3 port 3
1437 12:40:14.278836 PCI: 00:14.0 child on link 0 USB0 port 0
1438 12:40:14.289665 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 12:40:14.295066 USB0 port 0 child on link 0 USB2 port 0
1440 12:40:14.295224 USB2 port 0
1441 12:40:14.298894 USB2 port 1
1442 12:40:14.299081 USB2 port 2
1443 12:40:14.302147 USB2 port 3
1444 12:40:14.302608 USB2 port 4
1445 12:40:14.305578 USB2 port 5
1446 12:40:14.306130 USB2 port 6
1447 12:40:14.309003 USB2 port 7
1448 12:40:14.309550 USB2 port 8
1449 12:40:14.312323 USB2 port 9
1450 12:40:14.312874 USB3 port 0
1451 12:40:14.315655 USB3 port 1
1452 12:40:14.316254 USB3 port 2
1453 12:40:14.319219 USB3 port 3
1454 12:40:14.319768 PCI: 00:14.2
1455 12:40:14.332559 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 12:40:14.341958 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 12:40:14.345734 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 12:40:14.355320 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 12:40:14.358988 GENERIC: 0.0
1460 12:40:14.361868 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 12:40:14.371934 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 12:40:14.375254 I2C: 00:1a
1463 12:40:14.375827 I2C: 00:31
1464 12:40:14.378773 I2C: 00:32
1465 12:40:14.381958 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 12:40:14.392420 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 12:40:14.392981 I2C: 00:10
1468 12:40:14.395574 PCI: 00:15.2
1469 12:40:14.405223 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 12:40:14.408441 PCI: 00:15.3
1471 12:40:14.418655 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 12:40:14.419207 PCI: 00:16.0
1473 12:40:14.428119 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 12:40:14.431671 PCI: 00:19.0
1475 12:40:14.435013 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 12:40:14.445246 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 12:40:14.447939 I2C: 00:15
1478 12:40:14.451973 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 12:40:14.461331 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 12:40:14.471566 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 12:40:14.481325 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 12:40:14.484625 GENERIC: 0.0
1483 12:40:14.488096 PCI: 01:00.0
1484 12:40:14.498899 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 12:40:14.508336 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 12:40:14.517888 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 12:40:14.518452 PCI: 00:1e.0
1488 12:40:14.531377 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 12:40:14.534366 PCI: 00:1e.2 child on link 0 SPI: 00
1490 12:40:14.544274 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 12:40:14.548331 SPI: 00
1492 12:40:14.551120 PCI: 00:1e.3 child on link 0 SPI: 00
1493 12:40:14.561212 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 12:40:14.561765 SPI: 00
1495 12:40:14.567889 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 12:40:14.574853 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 12:40:14.577416 PNP: 0c09.0
1498 12:40:14.584412 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 12:40:14.591654 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 12:40:14.601014 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 12:40:14.608251 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 12:40:14.614362 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 12:40:14.614919 GENERIC: 0.0
1504 12:40:14.617231 GENERIC: 1.0
1505 12:40:14.617686 PCI: 00:1f.3
1506 12:40:14.627528 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 12:40:14.640520 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 12:40:14.641060 PCI: 00:1f.5
1509 12:40:14.650807 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 12:40:14.654016 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 12:40:14.657369 APIC: 00
1512 12:40:14.657909 APIC: 01
1513 12:40:14.660625 APIC: 05
1514 12:40:14.661170 APIC: 07
1515 12:40:14.661553 APIC: 02
1516 12:40:14.663954 APIC: 04
1517 12:40:14.664580 APIC: 06
1518 12:40:14.667215 APIC: 03
1519 12:40:14.667783 Done allocating resources.
1520 12:40:14.674138 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 12:40:14.680595 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 12:40:14.683871 Configure GPIOs for I2S audio on UP4.
1523 12:40:14.690819 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 12:40:14.693855 Enabling resources...
1525 12:40:14.697446 PCI: 00:00.0 subsystem <- 8086/9a12
1526 12:40:14.700737 PCI: 00:00.0 cmd <- 06
1527 12:40:14.704155 PCI: 00:02.0 subsystem <- 8086/9a40
1528 12:40:14.707271 PCI: 00:02.0 cmd <- 03
1529 12:40:14.710673 PCI: 00:04.0 subsystem <- 8086/9a03
1530 12:40:14.713606 PCI: 00:04.0 cmd <- 02
1531 12:40:14.716986 PCI: 00:05.0 subsystem <- 8086/9a19
1532 12:40:14.717441 PCI: 00:05.0 cmd <- 02
1533 12:40:14.723488 PCI: 00:08.0 subsystem <- 8086/9a11
1534 12:40:14.723994 PCI: 00:08.0 cmd <- 06
1535 12:40:14.727159 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 12:40:14.730736 PCI: 00:0d.0 cmd <- 02
1537 12:40:14.733928 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 12:40:14.736730 PCI: 00:14.0 cmd <- 02
1539 12:40:14.740018 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 12:40:14.743339 PCI: 00:14.2 cmd <- 02
1541 12:40:14.746572 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 12:40:14.749935 PCI: 00:14.3 cmd <- 02
1543 12:40:14.752827 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 12:40:14.756675 PCI: 00:15.0 cmd <- 02
1545 12:40:14.759431 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 12:40:14.762569 PCI: 00:15.1 cmd <- 02
1547 12:40:14.766401 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 12:40:14.769759 PCI: 00:15.2 cmd <- 02
1549 12:40:14.773046 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 12:40:14.773140 PCI: 00:15.3 cmd <- 02
1551 12:40:14.779311 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 12:40:14.779398 PCI: 00:16.0 cmd <- 02
1553 12:40:14.782527 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 12:40:14.785669 PCI: 00:19.1 cmd <- 02
1555 12:40:14.789050 PCI: 00:1d.0 bridge ctrl <- 0013
1556 12:40:14.792444 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 12:40:14.795791 PCI: 00:1d.0 cmd <- 06
1558 12:40:14.798779 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 12:40:14.802538 PCI: 00:1e.0 cmd <- 06
1560 12:40:14.805703 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 12:40:14.808681 PCI: 00:1e.2 cmd <- 06
1562 12:40:14.812358 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 12:40:14.815560 PCI: 00:1e.3 cmd <- 02
1564 12:40:14.818796 PCI: 00:1f.0 subsystem <- 8086/a087
1565 12:40:14.822174 PCI: 00:1f.0 cmd <- 407
1566 12:40:14.825262 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 12:40:14.828774 PCI: 00:1f.3 cmd <- 02
1568 12:40:14.831798 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 12:40:14.831883 PCI: 00:1f.5 cmd <- 406
1570 12:40:14.837871 PCI: 01:00.0 cmd <- 02
1571 12:40:14.842730 done.
1572 12:40:14.845462 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 12:40:14.848747 Initializing devices...
1574 12:40:14.851895 Root Device init
1575 12:40:14.855156 Chrome EC: Set SMI mask to 0x0000000000000000
1576 12:40:14.861998 Chrome EC: clear events_b mask to 0x0000000000000000
1577 12:40:14.868495 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 12:40:14.872063 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 12:40:14.878994 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 12:40:14.884996 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 12:40:14.888514 fw_config match found: DB_USB=USB3_ACTIVE
1582 12:40:14.895220 Configure Right Type-C port orientation for retimer
1583 12:40:14.898327 Root Device init finished in 43 msecs
1584 12:40:14.901730 PCI: 00:00.0 init
1585 12:40:14.905175 CPU TDP = 9 Watts
1586 12:40:14.905256 CPU PL1 = 9 Watts
1587 12:40:14.908255 CPU PL2 = 40 Watts
1588 12:40:14.911585 CPU PL4 = 83 Watts
1589 12:40:14.915201 PCI: 00:00.0 init finished in 8 msecs
1590 12:40:14.915283 PCI: 00:02.0 init
1591 12:40:14.918837 GMA: Found VBT in CBFS
1592 12:40:14.921594 GMA: Found valid VBT in CBFS
1593 12:40:14.928337 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 12:40:14.934977 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 12:40:14.938234 PCI: 00:02.0 init finished in 18 msecs
1596 12:40:14.941429 PCI: 00:05.0 init
1597 12:40:14.945145 PCI: 00:05.0 init finished in 0 msecs
1598 12:40:14.948090 PCI: 00:08.0 init
1599 12:40:14.951686 PCI: 00:08.0 init finished in 0 msecs
1600 12:40:14.954927 PCI: 00:14.0 init
1601 12:40:14.958369 PCI: 00:14.0 init finished in 0 msecs
1602 12:40:14.961916 PCI: 00:14.2 init
1603 12:40:14.964783 PCI: 00:14.2 init finished in 0 msecs
1604 12:40:14.964907 PCI: 00:15.0 init
1605 12:40:14.968713 I2C bus 0 version 0x3230302a
1606 12:40:14.971454 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 12:40:14.978120 PCI: 00:15.0 init finished in 6 msecs
1608 12:40:14.978278 PCI: 00:15.1 init
1609 12:40:14.981632 I2C bus 1 version 0x3230302a
1610 12:40:14.984700 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 12:40:14.988202 PCI: 00:15.1 init finished in 6 msecs
1612 12:40:14.991712 PCI: 00:15.2 init
1613 12:40:14.994962 I2C bus 2 version 0x3230302a
1614 12:40:14.998561 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 12:40:15.001773 PCI: 00:15.2 init finished in 6 msecs
1616 12:40:15.004966 PCI: 00:15.3 init
1617 12:40:15.008892 I2C bus 3 version 0x3230302a
1618 12:40:15.011757 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 12:40:15.016084 PCI: 00:15.3 init finished in 6 msecs
1620 12:40:15.018121 PCI: 00:16.0 init
1621 12:40:15.021556 PCI: 00:16.0 init finished in 0 msecs
1622 12:40:15.024513 PCI: 00:19.1 init
1623 12:40:15.024717 I2C bus 5 version 0x3230302a
1624 12:40:15.031199 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 12:40:15.034641 PCI: 00:19.1 init finished in 6 msecs
1626 12:40:15.034959 PCI: 00:1d.0 init
1627 12:40:15.037757 Initializing PCH PCIe bridge.
1628 12:40:15.041306 PCI: 00:1d.0 init finished in 3 msecs
1629 12:40:15.046768 PCI: 00:1f.0 init
1630 12:40:15.049885 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 12:40:15.055780 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 12:40:15.056294 IOAPIC: ID = 0x02
1633 12:40:15.059079 IOAPIC: Dumping registers
1634 12:40:15.062848 reg 0x0000: 0x02000000
1635 12:40:15.066095 reg 0x0001: 0x00770020
1636 12:40:15.066665 reg 0x0002: 0x00000000
1637 12:40:15.072668 PCI: 00:1f.0 init finished in 21 msecs
1638 12:40:15.072796 PCI: 00:1f.2 init
1639 12:40:15.075898 Disabling ACPI via APMC.
1640 12:40:15.080373 APMC done.
1641 12:40:15.083637 PCI: 00:1f.2 init finished in 6 msecs
1642 12:40:15.095420 PCI: 01:00.0 init
1643 12:40:15.098483 PCI: 01:00.0 init finished in 0 msecs
1644 12:40:15.101948 PNP: 0c09.0 init
1645 12:40:15.108532 Google Chrome EC uptime: 8.409 seconds
1646 12:40:15.112220 Google Chrome AP resets since EC boot: 0
1647 12:40:15.115231 Google Chrome most recent AP reset causes:
1648 12:40:15.122302 Google Chrome EC reset flags at last EC boot: reset-pin
1649 12:40:15.125606 PNP: 0c09.0 init finished in 19 msecs
1650 12:40:15.130771 Devices initialized
1651 12:40:15.133916 Show all devs... After init.
1652 12:40:15.137430 Root Device: enabled 1
1653 12:40:15.137994 DOMAIN: 0000: enabled 1
1654 12:40:15.140936 CPU_CLUSTER: 0: enabled 1
1655 12:40:15.144228 PCI: 00:00.0: enabled 1
1656 12:40:15.147632 PCI: 00:02.0: enabled 1
1657 12:40:15.148249 PCI: 00:04.0: enabled 1
1658 12:40:15.150504 PCI: 00:05.0: enabled 1
1659 12:40:15.154425 PCI: 00:06.0: enabled 0
1660 12:40:15.158160 PCI: 00:07.0: enabled 0
1661 12:40:15.158718 PCI: 00:07.1: enabled 0
1662 12:40:15.160371 PCI: 00:07.2: enabled 0
1663 12:40:15.163729 PCI: 00:07.3: enabled 0
1664 12:40:15.166991 PCI: 00:08.0: enabled 1
1665 12:40:15.167441 PCI: 00:09.0: enabled 0
1666 12:40:15.170493 PCI: 00:0a.0: enabled 0
1667 12:40:15.173926 PCI: 00:0d.0: enabled 1
1668 12:40:15.176781 PCI: 00:0d.1: enabled 0
1669 12:40:15.177236 PCI: 00:0d.2: enabled 0
1670 12:40:15.180656 PCI: 00:0d.3: enabled 0
1671 12:40:15.183719 PCI: 00:0e.0: enabled 0
1672 12:40:15.187119 PCI: 00:10.2: enabled 1
1673 12:40:15.187801 PCI: 00:10.6: enabled 0
1674 12:40:15.190591 PCI: 00:10.7: enabled 0
1675 12:40:15.193934 PCI: 00:12.0: enabled 0
1676 12:40:15.194489 PCI: 00:12.6: enabled 0
1677 12:40:15.198329 PCI: 00:13.0: enabled 0
1678 12:40:15.200688 PCI: 00:14.0: enabled 1
1679 12:40:15.203652 PCI: 00:14.1: enabled 0
1680 12:40:15.204246 PCI: 00:14.2: enabled 1
1681 12:40:15.207099 PCI: 00:14.3: enabled 1
1682 12:40:15.210396 PCI: 00:15.0: enabled 1
1683 12:40:15.213284 PCI: 00:15.1: enabled 1
1684 12:40:15.213736 PCI: 00:15.2: enabled 1
1685 12:40:15.216932 PCI: 00:15.3: enabled 1
1686 12:40:15.219790 PCI: 00:16.0: enabled 1
1687 12:40:15.223209 PCI: 00:16.1: enabled 0
1688 12:40:15.223674 PCI: 00:16.2: enabled 0
1689 12:40:15.226825 PCI: 00:16.3: enabled 0
1690 12:40:15.229718 PCI: 00:16.4: enabled 0
1691 12:40:15.233304 PCI: 00:16.5: enabled 0
1692 12:40:15.233862 PCI: 00:17.0: enabled 0
1693 12:40:15.236977 PCI: 00:19.0: enabled 0
1694 12:40:15.239715 PCI: 00:19.1: enabled 1
1695 12:40:15.243792 PCI: 00:19.2: enabled 0
1696 12:40:15.244494 PCI: 00:1c.0: enabled 1
1697 12:40:15.246803 PCI: 00:1c.1: enabled 0
1698 12:40:15.249816 PCI: 00:1c.2: enabled 0
1699 12:40:15.250275 PCI: 00:1c.3: enabled 0
1700 12:40:15.253944 PCI: 00:1c.4: enabled 0
1701 12:40:15.256589 PCI: 00:1c.5: enabled 0
1702 12:40:15.261050 PCI: 00:1c.6: enabled 1
1703 12:40:15.261610 PCI: 00:1c.7: enabled 0
1704 12:40:15.263009 PCI: 00:1d.0: enabled 1
1705 12:40:15.266917 PCI: 00:1d.1: enabled 0
1706 12:40:15.269971 PCI: 00:1d.2: enabled 1
1707 12:40:15.270427 PCI: 00:1d.3: enabled 0
1708 12:40:15.273210 PCI: 00:1e.0: enabled 1
1709 12:40:15.276619 PCI: 00:1e.1: enabled 0
1710 12:40:15.280270 PCI: 00:1e.2: enabled 1
1711 12:40:15.280995 PCI: 00:1e.3: enabled 1
1712 12:40:15.283290 PCI: 00:1f.0: enabled 1
1713 12:40:15.286572 PCI: 00:1f.1: enabled 0
1714 12:40:15.287026 PCI: 00:1f.2: enabled 1
1715 12:40:15.289741 PCI: 00:1f.3: enabled 1
1716 12:40:15.293632 PCI: 00:1f.4: enabled 0
1717 12:40:15.296398 PCI: 00:1f.5: enabled 1
1718 12:40:15.296995 PCI: 00:1f.6: enabled 0
1719 12:40:15.299718 PCI: 00:1f.7: enabled 0
1720 12:40:15.303144 APIC: 00: enabled 1
1721 12:40:15.307086 GENERIC: 0.0: enabled 1
1722 12:40:15.307639 GENERIC: 0.0: enabled 1
1723 12:40:15.309752 GENERIC: 1.0: enabled 1
1724 12:40:15.313632 GENERIC: 0.0: enabled 1
1725 12:40:15.314179 GENERIC: 1.0: enabled 1
1726 12:40:15.316440 USB0 port 0: enabled 1
1727 12:40:15.319661 GENERIC: 0.0: enabled 1
1728 12:40:15.323024 USB0 port 0: enabled 1
1729 12:40:15.323477 GENERIC: 0.0: enabled 1
1730 12:40:15.326154 I2C: 00:1a: enabled 1
1731 12:40:15.329581 I2C: 00:31: enabled 1
1732 12:40:15.330158 I2C: 00:32: enabled 1
1733 12:40:15.332797 I2C: 00:10: enabled 1
1734 12:40:15.336477 I2C: 00:15: enabled 1
1735 12:40:15.337053 GENERIC: 0.0: enabled 0
1736 12:40:15.339987 GENERIC: 1.0: enabled 0
1737 12:40:15.342845 GENERIC: 0.0: enabled 1
1738 12:40:15.345993 SPI: 00: enabled 1
1739 12:40:15.346535 SPI: 00: enabled 1
1740 12:40:15.349477 PNP: 0c09.0: enabled 1
1741 12:40:15.352879 GENERIC: 0.0: enabled 1
1742 12:40:15.353333 USB3 port 0: enabled 1
1743 12:40:15.355934 USB3 port 1: enabled 1
1744 12:40:15.359176 USB3 port 2: enabled 0
1745 12:40:15.359597 USB3 port 3: enabled 0
1746 12:40:15.362440 USB2 port 0: enabled 0
1747 12:40:15.365894 USB2 port 1: enabled 1
1748 12:40:15.366370 USB2 port 2: enabled 1
1749 12:40:15.369508 USB2 port 3: enabled 0
1750 12:40:15.372794 USB2 port 4: enabled 1
1751 12:40:15.375697 USB2 port 5: enabled 0
1752 12:40:15.376010 USB2 port 6: enabled 0
1753 12:40:15.379254 USB2 port 7: enabled 0
1754 12:40:15.382671 USB2 port 8: enabled 0
1755 12:40:15.382847 USB2 port 9: enabled 0
1756 12:40:15.385793 USB3 port 0: enabled 0
1757 12:40:15.388738 USB3 port 1: enabled 1
1758 12:40:15.392035 USB3 port 2: enabled 0
1759 12:40:15.392164 USB3 port 3: enabled 0
1760 12:40:15.395964 GENERIC: 0.0: enabled 1
1761 12:40:15.398793 GENERIC: 1.0: enabled 1
1762 12:40:15.398894 APIC: 01: enabled 1
1763 12:40:15.402667 APIC: 05: enabled 1
1764 12:40:15.405570 APIC: 07: enabled 1
1765 12:40:15.405661 APIC: 02: enabled 1
1766 12:40:15.408719 APIC: 04: enabled 1
1767 12:40:15.408802 APIC: 06: enabled 1
1768 12:40:15.411961 APIC: 03: enabled 1
1769 12:40:15.415561 PCI: 01:00.0: enabled 1
1770 12:40:15.418986 BS: BS_DEV_INIT run times (exec / console): 32 / 536 ms
1771 12:40:15.425254 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1772 12:40:15.428569 ELOG: NV offset 0xf30000 size 0x1000
1773 12:40:15.435559 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1774 12:40:15.441975 ELOG: Event(17) added with size 13 at 2024-01-03 12:40:14 UTC
1775 12:40:15.448584 ELOG: Event(92) added with size 9 at 2024-01-03 12:40:14 UTC
1776 12:40:15.455452 ELOG: Event(93) added with size 9 at 2024-01-03 12:40:14 UTC
1777 12:40:15.461937 ELOG: Event(9E) added with size 10 at 2024-01-03 12:40:14 UTC
1778 12:40:15.468921 ELOG: Event(9F) added with size 14 at 2024-01-03 12:40:14 UTC
1779 12:40:15.475727 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1780 12:40:15.481652 ELOG: Event(A1) added with size 10 at 2024-01-03 12:40:14 UTC
1781 12:40:15.488400 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1782 12:40:15.495358 ELOG: Event(A0) added with size 9 at 2024-01-03 12:40:14 UTC
1783 12:40:15.499268 elog_add_boot_reason: Logged dev mode boot
1784 12:40:15.504997 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1785 12:40:15.505085 Finalize devices...
1786 12:40:15.508256 Devices finalized
1787 12:40:15.515082 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1788 12:40:15.518264 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1789 12:40:15.525069 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1790 12:40:15.528346 ME: HFSTS1 : 0x80030055
1791 12:40:15.534842 ME: HFSTS2 : 0x30280116
1792 12:40:15.538097 ME: HFSTS3 : 0x00000050
1793 12:40:15.541407 ME: HFSTS4 : 0x00004000
1794 12:40:15.548339 ME: HFSTS5 : 0x00000000
1795 12:40:15.552165 ME: HFSTS6 : 0x00400006
1796 12:40:15.555085 ME: Manufacturing Mode : YES
1797 12:40:15.558335 ME: SPI Protection Mode Enabled : NO
1798 12:40:15.561239 ME: FW Partition Table : OK
1799 12:40:15.568228 ME: Bringup Loader Failure : NO
1800 12:40:15.571378 ME: Firmware Init Complete : NO
1801 12:40:15.574356 ME: Boot Options Present : NO
1802 12:40:15.577873 ME: Update In Progress : NO
1803 12:40:15.581604 ME: D0i3 Support : YES
1804 12:40:15.584616 ME: Low Power State Enabled : NO
1805 12:40:15.587769 ME: CPU Replaced : YES
1806 12:40:15.594852 ME: CPU Replacement Valid : YES
1807 12:40:15.597882 ME: Current Working State : 5
1808 12:40:15.601401 ME: Current Operation State : 1
1809 12:40:15.604240 ME: Current Operation Mode : 3
1810 12:40:15.608130 ME: Error Code : 0
1811 12:40:15.611079 ME: Enhanced Debug Mode : NO
1812 12:40:15.614419 ME: CPU Debug Disabled : YES
1813 12:40:15.618365 ME: TXT Support : NO
1814 12:40:15.624296 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1815 12:40:15.631168 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1816 12:40:15.633976 CBFS: 'fallback/slic' not found.
1817 12:40:15.640799 ACPI: Writing ACPI tables at 76b01000.
1818 12:40:15.640927 ACPI: * FACS
1819 12:40:15.645052 ACPI: * DSDT
1820 12:40:15.647981 Ramoops buffer: 0x100000@0x76a00000.
1821 12:40:15.650895 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1822 12:40:15.657796 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1823 12:40:15.661243 Google Chrome EC: version:
1824 12:40:15.663774 ro: voema_v2.0.10114-a447f03e46
1825 12:40:15.667325 rw: voema_v2.0.10114-a447f03e46
1826 12:40:15.670667 running image: 1
1827 12:40:15.673759 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1828 12:40:15.679372 ACPI: * FADT
1829 12:40:15.679448 SCI is IRQ9
1830 12:40:15.687256 ACPI: added table 1/32, length now 40
1831 12:40:15.687367 ACPI: * SSDT
1832 12:40:15.689765 Found 1 CPU(s) with 8 core(s) each.
1833 12:40:15.697081 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1834 12:40:15.700021 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1835 12:40:15.702947 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1836 12:40:15.706192 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1837 12:40:15.712610 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1838 12:40:15.719343 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1839 12:40:15.722726 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1840 12:40:15.729228 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1841 12:40:15.735818 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1842 12:40:15.739064 \_SB.PCI0.RP09: Added StorageD3Enable property
1843 12:40:15.742374 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1844 12:40:15.749153 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1845 12:40:15.755811 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1846 12:40:15.758959 PS2K: Passing 80 keymaps to kernel
1847 12:40:15.765642 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1848 12:40:15.772192 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1849 12:40:15.778963 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1850 12:40:15.785625 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1851 12:40:15.792366 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1852 12:40:15.798816 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1853 12:40:15.805437 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1854 12:40:15.811903 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1855 12:40:15.815695 ACPI: added table 2/32, length now 44
1856 12:40:15.819168 ACPI: * MCFG
1857 12:40:15.821940 ACPI: added table 3/32, length now 48
1858 12:40:15.822048 ACPI: * TPM2
1859 12:40:15.825422 TPM2 log created at 0x769f0000
1860 12:40:15.829467 ACPI: added table 4/32, length now 52
1861 12:40:15.831942 ACPI: * MADT
1862 12:40:15.832048 SCI is IRQ9
1863 12:40:15.835424 ACPI: added table 5/32, length now 56
1864 12:40:15.838869 current = 76b09850
1865 12:40:15.839001 ACPI: * DMAR
1866 12:40:15.846095 ACPI: added table 6/32, length now 60
1867 12:40:15.848621 ACPI: added table 7/32, length now 64
1868 12:40:15.848728 ACPI: * HPET
1869 12:40:15.851902 ACPI: added table 8/32, length now 68
1870 12:40:15.855330 ACPI: done.
1871 12:40:15.855438 ACPI tables: 35216 bytes.
1872 12:40:15.858368 smbios_write_tables: 769ef000
1873 12:40:15.861982 EC returned error result code 3
1874 12:40:15.866017 Couldn't obtain OEM name from CBI
1875 12:40:15.870061 Create SMBIOS type 16
1876 12:40:15.873481 Create SMBIOS type 17
1877 12:40:15.877580 GENERIC: 0.0 (WIFI Device)
1878 12:40:15.877683 SMBIOS tables: 1750 bytes.
1879 12:40:15.883761 Writing table forward entry at 0x00000500
1880 12:40:15.890419 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1881 12:40:15.893400 Writing coreboot table at 0x76b25000
1882 12:40:15.899818 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1883 12:40:15.903142 1. 0000000000001000-000000000009ffff: RAM
1884 12:40:15.906418 2. 00000000000a0000-00000000000fffff: RESERVED
1885 12:40:15.912977 3. 0000000000100000-00000000769eefff: RAM
1886 12:40:15.916782 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1887 12:40:15.922873 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1888 12:40:15.929761 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1889 12:40:15.933070 7. 0000000077000000-000000007fbfffff: RESERVED
1890 12:40:15.936549 8. 00000000c0000000-00000000cfffffff: RESERVED
1891 12:40:15.943516 9. 00000000f8000000-00000000f9ffffff: RESERVED
1892 12:40:15.946348 10. 00000000fb000000-00000000fb000fff: RESERVED
1893 12:40:15.953194 11. 00000000fe000000-00000000fe00ffff: RESERVED
1894 12:40:15.956477 12. 00000000fed80000-00000000fed87fff: RESERVED
1895 12:40:15.963294 13. 00000000fed90000-00000000fed92fff: RESERVED
1896 12:40:15.966215 14. 00000000feda0000-00000000feda1fff: RESERVED
1897 12:40:15.973289 15. 00000000fedc0000-00000000feddffff: RESERVED
1898 12:40:15.976048 16. 0000000100000000-00000002803fffff: RAM
1899 12:40:15.979737 Passing 4 GPIOs to payload:
1900 12:40:15.983076 NAME | PORT | POLARITY | VALUE
1901 12:40:15.989747 lid | undefined | high | high
1902 12:40:15.992667 power | undefined | high | low
1903 12:40:15.999448 oprom | undefined | high | low
1904 12:40:16.005929 EC in RW | 0x000000e5 | high | low
1905 12:40:16.012876 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8bc
1906 12:40:16.012981 coreboot table: 1576 bytes.
1907 12:40:16.019171 IMD ROOT 0. 0x76fff000 0x00001000
1908 12:40:16.022463 IMD SMALL 1. 0x76ffe000 0x00001000
1909 12:40:16.026177 FSP MEMORY 2. 0x76c4e000 0x003b0000
1910 12:40:16.029027 VPD 3. 0x76c4d000 0x00000367
1911 12:40:16.032694 RO MCACHE 4. 0x76c4c000 0x00000fdc
1912 12:40:16.035781 CONSOLE 5. 0x76c2c000 0x00020000
1913 12:40:16.039853 FMAP 6. 0x76c2b000 0x00000578
1914 12:40:16.042307 TIME STAMP 7. 0x76c2a000 0x00000910
1915 12:40:16.049068 VBOOT WORK 8. 0x76c16000 0x00014000
1916 12:40:16.052219 ROMSTG STCK 9. 0x76c15000 0x00001000
1917 12:40:16.055641 AFTER CAR 10. 0x76c0a000 0x0000b000
1918 12:40:16.059302 RAMSTAGE 11. 0x76b97000 0x00073000
1919 12:40:16.062229 REFCODE 12. 0x76b42000 0x00055000
1920 12:40:16.065999 SMM BACKUP 13. 0x76b32000 0x00010000
1921 12:40:16.068932 4f444749 14. 0x76b30000 0x00002000
1922 12:40:16.072538 EXT VBT15. 0x76b2d000 0x0000219f
1923 12:40:16.075478 COREBOOT 16. 0x76b25000 0x00008000
1924 12:40:16.082139 ACPI 17. 0x76b01000 0x00024000
1925 12:40:16.085788 ACPI GNVS 18. 0x76b00000 0x00001000
1926 12:40:16.088761 RAMOOPS 19. 0x76a00000 0x00100000
1927 12:40:16.092212 TPM2 TCGLOG20. 0x769f0000 0x00010000
1928 12:40:16.095568 SMBIOS 21. 0x769ef000 0x00000800
1929 12:40:16.098604 IMD small region:
1930 12:40:16.102074 IMD ROOT 0. 0x76ffec00 0x00000400
1931 12:40:16.105605 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1932 12:40:16.108626 POWER STATE 2. 0x76ffeb80 0x00000044
1933 12:40:16.112153 ROMSTAGE 3. 0x76ffeb60 0x00000004
1934 12:40:16.118939 MEM INFO 4. 0x76ffe980 0x000001e0
1935 12:40:16.121800 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1936 12:40:16.125621 MTRR: Physical address space:
1937 12:40:16.131903 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1938 12:40:16.138913 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1939 12:40:16.145178 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1940 12:40:16.151509 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1941 12:40:16.158272 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1942 12:40:16.165129 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1943 12:40:16.168412 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1944 12:40:16.174993 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 12:40:16.178885 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 12:40:16.182006 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 12:40:16.184967 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 12:40:16.191381 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 12:40:16.195148 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 12:40:16.198035 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 12:40:16.201564 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 12:40:16.208211 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 12:40:16.211435 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 12:40:16.214696 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 12:40:16.218123 call enable_fixed_mtrr()
1956 12:40:16.221292 CPU physical address size: 39 bits
1957 12:40:16.228276 MTRR: default type WB/UC MTRR counts: 6/6.
1958 12:40:16.231659 MTRR: UC selected as default type.
1959 12:40:16.237950 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1960 12:40:16.241059 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1961 12:40:16.247664 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1962 12:40:16.254649 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1963 12:40:16.261222 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1964 12:40:16.267945 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1965 12:40:16.268084
1966 12:40:16.271336 MTRR check
1967 12:40:16.271444 Fixed MTRRs : Enabled
1968 12:40:16.274278 Variable MTRRs: Enabled
1969 12:40:16.274385
1970 12:40:16.280699 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 12:40:16.284149 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 12:40:16.287674 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 12:40:16.290693 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 12:40:16.293986 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 12:40:16.300923 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 12:40:16.304163 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 12:40:16.307599 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 12:40:16.310526 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 12:40:16.317350 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 12:40:16.320774 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 12:40:16.323871 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 12:40:16.327094 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 12:40:16.334430 MTRR: Fixed MSR 0x258 0x0606060606060606
1984 12:40:16.337379 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 12:40:16.340649 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 12:40:16.344040 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 12:40:16.350481 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 12:40:16.354478 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 12:40:16.357150 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 12:40:16.360552 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 12:40:16.363790 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 12:40:16.370728 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 12:40:16.373986 MTRR: Fixed MSR 0x258 0x0606060606060606
1994 12:40:16.380416 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 12:40:16.383911 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 12:40:16.387012 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 12:40:16.390550 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 12:40:16.393795 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 12:40:16.400378 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 12:40:16.403595 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 12:40:16.406780 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 12:40:16.410187 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 12:40:16.414411 call enable_fixed_mtrr()
2004 12:40:16.418011 call enable_fixed_mtrr()
2005 12:40:16.421816 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 12:40:16.424401 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 12:40:16.430882 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 12:40:16.434370 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 12:40:16.437670 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 12:40:16.441107 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 12:40:16.447889 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 12:40:16.451428 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 12:40:16.454444 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 12:40:16.457574 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 12:40:16.464288 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 12:40:16.467318 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 12:40:16.471160 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 12:40:16.473994 call enable_fixed_mtrr()
2019 12:40:16.477689 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 12:40:16.484655 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 12:40:16.487489 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 12:40:16.490599 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 12:40:16.494025 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 12:40:16.500713 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 12:40:16.503976 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 12:40:16.507443 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 12:40:16.510663 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 12:40:16.514272 CPU physical address size: 39 bits
2029 12:40:16.520999 call enable_fixed_mtrr()
2030 12:40:16.524180 CPU physical address size: 39 bits
2031 12:40:16.527619 CPU physical address size: 39 bits
2032 12:40:16.531399 CPU physical address size: 39 bits
2033 12:40:16.537607 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2034 12:40:16.541048 call enable_fixed_mtrr()
2035 12:40:16.544634 Checking cr50 for pending updates
2036 12:40:16.548485 CPU physical address size: 39 bits
2037 12:40:16.551519 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 12:40:16.555123 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 12:40:16.558128 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 12:40:16.561603 MTRR: Fixed MSR 0x259 0x0000000000000000
2041 12:40:16.567891 MTRR: Fixed MSR 0x268 0x0606060606060606
2042 12:40:16.571431 MTRR: Fixed MSR 0x269 0x0606060606060606
2043 12:40:16.574673 MTRR: Fixed MSR 0x26a 0x0606060606060606
2044 12:40:16.577919 MTRR: Fixed MSR 0x26b 0x0606060606060606
2045 12:40:16.585680 MTRR: Fixed MSR 0x26c 0x0606060606060606
2046 12:40:16.588474 MTRR: Fixed MSR 0x26d 0x0606060606060606
2047 12:40:16.591520 MTRR: Fixed MSR 0x26e 0x0606060606060606
2048 12:40:16.594709 MTRR: Fixed MSR 0x26f 0x0606060606060606
2049 12:40:16.602373 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 12:40:16.602480 call enable_fixed_mtrr()
2051 12:40:16.608804 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 12:40:16.612108 MTRR: Fixed MSR 0x268 0x0606060606060606
2053 12:40:16.615409 MTRR: Fixed MSR 0x269 0x0606060606060606
2054 12:40:16.618599 MTRR: Fixed MSR 0x26a 0x0606060606060606
2055 12:40:16.625063 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 12:40:16.628445 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 12:40:16.632372 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 12:40:16.635280 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 12:40:16.642069 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 12:40:16.645192 CPU physical address size: 39 bits
2061 12:40:16.648300 call enable_fixed_mtrr()
2062 12:40:16.652280 Reading cr50 TPM mode
2063 12:40:16.655535 CPU physical address size: 39 bits
2064 12:40:16.662503 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2065 12:40:16.668725 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2066 12:40:16.675444 Checking segment from ROM address 0xffc02b38
2067 12:40:16.679256 Checking segment from ROM address 0xffc02b54
2068 12:40:16.682299 Loading segment from ROM address 0xffc02b38
2069 12:40:16.685424 code (compression=0)
2070 12:40:16.692675 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2071 12:40:16.702073 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2072 12:40:16.706084 it's not compressed!
2073 12:40:16.843397 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2074 12:40:16.850039 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2075 12:40:16.856721 Loading segment from ROM address 0xffc02b54
2076 12:40:16.860196 Entry Point 0x30000000
2077 12:40:16.860319 Loaded segments
2078 12:40:16.866424 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2079 12:40:16.909724 Finalizing chipset.
2080 12:40:16.912721 Finalizing SMM.
2081 12:40:16.912841 APMC done.
2082 12:40:16.919318 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2083 12:40:16.923284 mp_park_aps done after 0 msecs.
2084 12:40:16.926385 Jumping to boot code at 0x30000000(0x76b25000)
2085 12:40:16.936189 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2086 12:40:16.936293
2087 12:40:16.936381
2088 12:40:16.936461
2089 12:40:16.939268 Starting depthcharge on Voema...
2090 12:40:16.939352
2091 12:40:16.939721 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2092 12:40:16.939835 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2093 12:40:16.939927 Setting prompt string to ['volteer:']
2094 12:40:16.940044 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2095 12:40:16.949916 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2096 12:40:16.950025
2097 12:40:16.955938 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2098 12:40:16.956049
2099 12:40:16.962382 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2100 12:40:16.962468
2101 12:40:16.965809 Failed to find eMMC card reader
2102 12:40:16.965894
2103 12:40:16.965980 Wipe memory regions:
2104 12:40:16.966060
2105 12:40:16.972225 [0x00000000001000, 0x000000000a0000)
2106 12:40:16.972337
2107 12:40:16.975807 [0x00000000100000, 0x00000030000000)
2108 12:40:17.001139
2109 12:40:17.004568 [0x00000032662db0, 0x000000769ef000)
2110 12:40:17.041158
2111 12:40:17.044020 [0x00000100000000, 0x00000280400000)
2112 12:40:17.244219
2113 12:40:17.247198 ec_init: CrosEC protocol v3 supported (256, 256)
2114 12:40:17.678433
2115 12:40:17.678602 R8152: Initializing
2116 12:40:17.678670
2117 12:40:17.681251 Version 6 (ocp_data = 5c30)
2118 12:40:17.681335
2119 12:40:17.684664 R8152: Done initializing
2120 12:40:17.684751
2121 12:40:17.687911 Adding net device
2122 12:40:17.989232
2123 12:40:17.992455 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2124 12:40:17.992550
2125 12:40:17.992614
2126 12:40:17.992674
2127 12:40:17.995769 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2129 12:40:18.096117 volteer: tftpboot 192.168.201.1 12437309/tftp-deploy-r203kpa_/kernel/bzImage 12437309/tftp-deploy-r203kpa_/kernel/cmdline 12437309/tftp-deploy-r203kpa_/ramdisk/ramdisk.cpio.gz
2130 12:40:18.096290 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2131 12:40:18.096425 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2132 12:40:18.100531 tftpboot 192.168.201.1 12437309/tftp-deploy-r203kpa_/kernel/bzIploy-r203kpa_/kernel/cmdline 12437309/tftp-deploy-r203kpa_/ramdisk/ramdisk.cpio.gz
2133 12:40:18.100620
2134 12:40:18.100719 Waiting for link
2135 12:40:18.303504
2136 12:40:18.303660 done.
2137 12:40:18.303756
2138 12:40:18.303838 MAC: 00:24:32:30:77:76
2139 12:40:18.303935
2140 12:40:18.306579 Sending DHCP discover... done.
2141 12:40:18.306664
2142 12:40:18.309846 Waiting for reply... done.
2143 12:40:18.309931
2144 12:40:18.314113 Sending DHCP request... done.
2145 12:40:18.314199
2146 12:40:18.316823 Waiting for reply... done.
2147 12:40:18.320044
2148 12:40:18.320153 My ip is 192.168.201.16
2149 12:40:18.320239
2150 12:40:18.323283 The DHCP server ip is 192.168.201.1
2151 12:40:18.323368
2152 12:40:18.330151 TFTP server IP predefined by user: 192.168.201.1
2153 12:40:18.330258
2154 12:40:18.336413 Bootfile predefined by user: 12437309/tftp-deploy-r203kpa_/kernel/bzImage
2155 12:40:18.336508
2156 12:40:18.339906 Sending tftp read request... done.
2157 12:40:18.339991
2158 12:40:18.343221 Waiting for the transfer...
2159 12:40:18.343309
2160 12:40:18.923312 00000000 ################################################################
2161 12:40:18.923462
2162 12:40:19.488798 00080000 ################################################################
2163 12:40:19.488971
2164 12:40:20.059908 00100000 ################################################################
2165 12:40:20.060115
2166 12:40:20.623437 00180000 ################################################################
2167 12:40:20.623586
2168 12:40:21.181411 00200000 ################################################################
2169 12:40:21.181581
2170 12:40:21.714711 00280000 ################################################################
2171 12:40:21.714859
2172 12:40:22.274253 00300000 ################################################################
2173 12:40:22.274401
2174 12:40:22.849333 00380000 ################################################################
2175 12:40:22.849486
2176 12:40:23.435404 00400000 ################################################################
2177 12:40:23.435549
2178 12:40:24.012675 00480000 ################################################################
2179 12:40:24.012818
2180 12:40:24.593687 00500000 ################################################################
2181 12:40:24.593826
2182 12:40:25.188699 00580000 ################################################################
2183 12:40:25.188845
2184 12:40:25.772089 00600000 ################################################################
2185 12:40:25.772246
2186 12:40:26.360908 00680000 ################################################################
2187 12:40:26.361124
2188 12:40:26.933619 00700000 ################################################################
2189 12:40:26.933776
2190 12:40:27.501263 00780000 ################################################################
2191 12:40:27.501420
2192 12:40:27.718061 00800000 ######################## done.
2193 12:40:27.718298
2194 12:40:27.721423 The bootfile was 8585104 bytes long.
2195 12:40:27.721568
2196 12:40:27.724846 Sending tftp read request... done.
2197 12:40:27.724992
2198 12:40:27.728345 Waiting for the transfer...
2199 12:40:27.728487
2200 12:40:28.309812 00000000 ################################################################
2201 12:40:28.309955
2202 12:40:28.844894 00080000 ################################################################
2203 12:40:28.845042
2204 12:40:29.381908 00100000 ################################################################
2205 12:40:29.382096
2206 12:40:29.913828 00180000 ################################################################
2207 12:40:29.913975
2208 12:40:30.480127 00200000 ################################################################
2209 12:40:30.480742
2210 12:40:31.084318 00280000 ################################################################
2211 12:40:31.084498
2212 12:40:31.613293 00300000 ################################################################
2213 12:40:31.613443
2214 12:40:32.159964 00380000 ################################################################
2215 12:40:32.160134
2216 12:40:32.706288 00400000 ################################################################
2217 12:40:32.706479
2218 12:40:33.235106 00480000 ################################################################
2219 12:40:33.235256
2220 12:40:33.786909 00500000 ################################################################
2221 12:40:33.787050
2222 12:40:34.335763 00580000 ################################################################
2223 12:40:34.335905
2224 12:40:34.892258 00600000 ################################################################
2225 12:40:34.892404
2226 12:40:35.423806 00680000 ################################################################
2227 12:40:35.424002
2228 12:40:35.998184 00700000 ################################################################
2229 12:40:35.998367
2230 12:40:36.558293 00780000 ################################################################
2231 12:40:36.558478
2232 12:40:36.994153 00800000 ##################################################### done.
2233 12:40:36.994331
2234 12:40:36.997501 Sending tftp read request... done.
2235 12:40:36.997616
2236 12:40:37.000706 Waiting for the transfer...
2237 12:40:37.000819
2238 12:40:37.000912 00000000 # done.
2239 12:40:37.001006
2240 12:40:37.010443 Command line loaded dynamically from TFTP file: 12437309/tftp-deploy-r203kpa_/kernel/cmdline
2241 12:40:37.010557
2242 12:40:37.026846 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2243 12:40:37.030248
2244 12:40:37.033221 Shutting down all USB controllers.
2245 12:40:37.033331
2246 12:40:37.033424 Removing current net device
2247 12:40:37.033514
2248 12:40:37.036680 Finalizing coreboot
2249 12:40:37.036789
2250 12:40:37.043433 Exiting depthcharge with code 4 at timestamp: 28755670
2251 12:40:37.043545
2252 12:40:37.043640
2253 12:40:37.043732 Starting kernel ...
2254 12:40:37.043821
2255 12:40:37.043909
2256 12:40:37.044420 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2257 12:40:37.044624 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2258 12:40:37.044736 Setting prompt string to ['Linux version [0-9]']
2259 12:40:37.044837 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2260 12:40:37.044938 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2262 12:45:01.045539 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2264 12:45:01.046659 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2266 12:45:01.047431 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2269 12:45:01.048764 end: 2 depthcharge-action (duration 00:05:00) [common]
2271 12:45:01.049898 Cleaning after the job
2272 12:45:01.050353 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437309/tftp-deploy-r203kpa_/ramdisk
2273 12:45:01.051670 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437309/tftp-deploy-r203kpa_/kernel
2274 12:45:01.053010 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437309/tftp-deploy-r203kpa_/modules
2275 12:45:01.053464 start: 5.1 power-off (timeout 00:00:30) [common]
2276 12:45:01.053618 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2277 12:45:01.136256 >> Command sent successfully.
2278 12:45:01.141372 Returned 0 in 0 seconds
2279 12:45:01.242465 end: 5.1 power-off (duration 00:00:00) [common]
2281 12:45:01.243855 start: 5.2 read-feedback (timeout 00:10:00) [common]
2282 12:45:01.245070 Listened to connection for namespace 'common' for up to 1s
2283 12:45:02.245754 Finalising connection for namespace 'common'
2284 12:45:02.246364 Disconnecting from shell: Finalise
2285 12:45:02.246800
2286 12:45:02.347947 end: 5.2 read-feedback (duration 00:00:01) [common]
2287 12:45:02.348578 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12437309
2288 12:45:02.404412 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12437309
2289 12:45:02.404632 JobError: Your job cannot terminate cleanly.