Boot log: acer-cbv514-1h-34uz-brya
- Kernel Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:40:55.537905 lava-dispatcher, installed at version: 2023.10
2 12:40:55.538139 start: 0 validate
3 12:40:55.538262 Start time: 2024-01-03 12:40:55.538254+00:00 (UTC)
4 12:40:55.538381 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:55.538504 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:40:55.807003 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:55.807676 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:56.077166 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:56.077368 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:40:56.342781 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:40:56.342999 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:40:56.602362 validate duration: 1.06
14 12:40:56.602719 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:40:56.602850 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:40:56.602967 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:40:56.603150 Not decompressing ramdisk as can be used compressed.
18 12:40:56.603275 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 12:40:56.603369 saving as /var/lib/lava/dispatcher/tmp/12437377/tftp-deploy-uvrdbu8x/ramdisk/initrd.cpio.gz
20 12:40:56.603462 total size: 5432690 (5 MB)
21 12:40:56.604864 progress 0 % (0 MB)
22 12:40:56.607155 progress 5 % (0 MB)
23 12:40:56.609187 progress 10 % (0 MB)
24 12:40:56.611244 progress 15 % (0 MB)
25 12:40:56.613508 progress 20 % (1 MB)
26 12:40:56.615543 progress 25 % (1 MB)
27 12:40:56.617568 progress 30 % (1 MB)
28 12:40:56.619788 progress 35 % (1 MB)
29 12:40:56.621776 progress 40 % (2 MB)
30 12:40:56.623761 progress 45 % (2 MB)
31 12:40:56.625740 progress 50 % (2 MB)
32 12:40:56.627965 progress 55 % (2 MB)
33 12:40:56.629738 progress 60 % (3 MB)
34 12:40:56.631507 progress 65 % (3 MB)
35 12:40:56.633471 progress 70 % (3 MB)
36 12:40:56.635064 progress 75 % (3 MB)
37 12:40:56.636638 progress 80 % (4 MB)
38 12:40:56.638215 progress 85 % (4 MB)
39 12:40:56.639815 progress 90 % (4 MB)
40 12:40:56.641249 progress 95 % (4 MB)
41 12:40:56.642704 progress 100 % (5 MB)
42 12:40:56.642924 5 MB downloaded in 0.04 s (131.29 MB/s)
43 12:40:56.643092 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:40:56.643328 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:40:56.643413 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:40:56.643495 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:40:56.643622 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:40:56.643697 saving as /var/lib/lava/dispatcher/tmp/12437377/tftp-deploy-uvrdbu8x/kernel/bzImage
50 12:40:56.643757 total size: 8585104 (8 MB)
51 12:40:56.643817 No compression specified
52 12:40:56.644897 progress 0 % (0 MB)
53 12:40:56.647176 progress 5 % (0 MB)
54 12:40:56.649375 progress 10 % (0 MB)
55 12:40:56.651575 progress 15 % (1 MB)
56 12:40:56.653765 progress 20 % (1 MB)
57 12:40:56.656028 progress 25 % (2 MB)
58 12:40:56.658265 progress 30 % (2 MB)
59 12:40:56.660460 progress 35 % (2 MB)
60 12:40:56.662693 progress 40 % (3 MB)
61 12:40:56.664892 progress 45 % (3 MB)
62 12:40:56.667136 progress 50 % (4 MB)
63 12:40:56.669488 progress 55 % (4 MB)
64 12:40:56.671674 progress 60 % (4 MB)
65 12:40:56.673841 progress 65 % (5 MB)
66 12:40:56.676091 progress 70 % (5 MB)
67 12:40:56.678279 progress 75 % (6 MB)
68 12:40:56.680442 progress 80 % (6 MB)
69 12:40:56.682642 progress 85 % (6 MB)
70 12:40:56.684803 progress 90 % (7 MB)
71 12:40:56.687057 progress 95 % (7 MB)
72 12:40:56.689264 progress 100 % (8 MB)
73 12:40:56.689504 8 MB downloaded in 0.05 s (178.99 MB/s)
74 12:40:56.689648 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:40:56.689881 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:40:56.690002 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:40:56.690089 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:40:56.690219 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 12:40:56.690287 saving as /var/lib/lava/dispatcher/tmp/12437377/tftp-deploy-uvrdbu8x/nfsrootfs/full.rootfs.tar
81 12:40:56.690348 total size: 133380384 (127 MB)
82 12:40:56.690411 Using unxz to decompress xz
83 12:40:56.693855 progress 0 % (0 MB)
84 12:40:57.063764 progress 5 % (6 MB)
85 12:40:57.449547 progress 10 % (12 MB)
86 12:40:57.769015 progress 15 % (19 MB)
87 12:40:57.973570 progress 20 % (25 MB)
88 12:40:58.235887 progress 25 % (31 MB)
89 12:40:58.603660 progress 30 % (38 MB)
90 12:40:58.972716 progress 35 % (44 MB)
91 12:40:59.381497 progress 40 % (50 MB)
92 12:40:59.777525 progress 45 % (57 MB)
93 12:41:00.159388 progress 50 % (63 MB)
94 12:41:00.549291 progress 55 % (69 MB)
95 12:41:00.927152 progress 60 % (76 MB)
96 12:41:01.303648 progress 65 % (82 MB)
97 12:41:01.694012 progress 70 % (89 MB)
98 12:41:02.080998 progress 75 % (95 MB)
99 12:41:02.532012 progress 80 % (101 MB)
100 12:41:02.969212 progress 85 % (108 MB)
101 12:41:03.240262 progress 90 % (114 MB)
102 12:41:03.611363 progress 95 % (120 MB)
103 12:41:04.029002 progress 100 % (127 MB)
104 12:41:04.034827 127 MB downloaded in 7.34 s (17.32 MB/s)
105 12:41:04.035145 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:41:04.035587 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:41:04.035707 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:41:04.035825 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:41:04.036006 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:41:04.036112 saving as /var/lib/lava/dispatcher/tmp/12437377/tftp-deploy-uvrdbu8x/modules/modules.tar
112 12:41:04.036205 total size: 253660 (0 MB)
113 12:41:04.036330 Using unxz to decompress xz
114 12:41:04.040087 progress 12 % (0 MB)
115 12:41:04.040510 progress 25 % (0 MB)
116 12:41:04.040780 progress 38 % (0 MB)
117 12:41:04.042349 progress 51 % (0 MB)
118 12:41:04.044452 progress 64 % (0 MB)
119 12:41:04.046521 progress 77 % (0 MB)
120 12:41:04.048425 progress 90 % (0 MB)
121 12:41:04.050555 progress 100 % (0 MB)
122 12:41:04.056471 0 MB downloaded in 0.02 s (11.94 MB/s)
123 12:41:04.056728 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:41:04.057000 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:41:04.057114 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 12:41:04.057246 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 12:41:06.116750 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12437377/extract-nfsrootfs-9rkrq6i0
129 12:41:06.116976 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 12:41:06.117087 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 12:41:06.117250 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym
132 12:41:06.117377 makedir: /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin
133 12:41:06.117474 makedir: /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/tests
134 12:41:06.117569 makedir: /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/results
135 12:41:06.117670 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-add-keys
136 12:41:06.117811 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-add-sources
137 12:41:06.117943 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-background-process-start
138 12:41:06.118068 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-background-process-stop
139 12:41:06.118189 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-common-functions
140 12:41:06.118309 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-echo-ipv4
141 12:41:06.118430 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-install-packages
142 12:41:06.118557 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-installed-packages
143 12:41:06.118678 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-os-build
144 12:41:06.118801 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-probe-channel
145 12:41:06.118922 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-probe-ip
146 12:41:06.119043 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-target-ip
147 12:41:06.119161 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-target-mac
148 12:41:06.119279 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-target-storage
149 12:41:06.119400 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-test-case
150 12:41:06.119525 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-test-event
151 12:41:06.119644 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-test-feedback
152 12:41:06.119763 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-test-raise
153 12:41:06.119882 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-test-reference
154 12:41:06.120002 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-test-runner
155 12:41:06.120123 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-test-set
156 12:41:06.120242 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-test-shell
157 12:41:06.120362 Updating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-install-packages (oe)
158 12:41:06.120514 Updating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/bin/lava-installed-packages (oe)
159 12:41:06.120635 Creating /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/environment
160 12:41:06.120730 LAVA metadata
161 12:41:06.120801 - LAVA_JOB_ID=12437377
162 12:41:06.120865 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:41:06.120978 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 12:41:06.121046 skipped lava-vland-overlay
165 12:41:06.121123 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:41:06.121203 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 12:41:06.121264 skipped lava-multinode-overlay
168 12:41:06.121336 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:41:06.121414 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 12:41:06.121490 Loading test definitions
171 12:41:06.121581 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 12:41:06.121656 Using /lava-12437377 at stage 0
173 12:41:06.121993 uuid=12437377_1.5.2.3.1 testdef=None
174 12:41:06.122082 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 12:41:06.122167 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 12:41:06.122669 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 12:41:06.122889 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 12:41:06.123506 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 12:41:06.123735 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 12:41:06.124748 runner path: /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/0/tests/0_dmesg test_uuid 12437377_1.5.2.3.1
183 12:41:06.124907 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 12:41:06.125131 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 12:41:06.125202 Using /lava-12437377 at stage 1
187 12:41:06.125490 uuid=12437377_1.5.2.3.5 testdef=None
188 12:41:06.125577 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 12:41:06.125660 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 12:41:06.126158 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 12:41:06.126375 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 12:41:06.127009 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 12:41:06.127236 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 12:41:06.127850 runner path: /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/1/tests/1_bootrr test_uuid 12437377_1.5.2.3.5
197 12:41:06.128001 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 12:41:06.128206 Creating lava-test-runner.conf files
200 12:41:06.128269 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/0 for stage 0
201 12:41:06.128363 - 0_dmesg
202 12:41:06.128442 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437377/lava-overlay-x8bry3ym/lava-12437377/1 for stage 1
203 12:41:06.128530 - 1_bootrr
204 12:41:06.128623 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 12:41:06.128709 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 12:41:06.135837 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 12:41:06.135990 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 12:41:06.136082 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:41:06.136170 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 12:41:06.136286 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 12:41:06.267028 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:41:06.267390 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 12:41:06.267508 extracting modules file /var/lib/lava/dispatcher/tmp/12437377/tftp-deploy-uvrdbu8x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437377/extract-nfsrootfs-9rkrq6i0
214 12:41:06.280562 extracting modules file /var/lib/lava/dispatcher/tmp/12437377/tftp-deploy-uvrdbu8x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437377/extract-overlay-ramdisk-n76lvh4q/ramdisk
215 12:41:06.293676 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:41:06.293831 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 12:41:06.293928 [common] Applying overlay to NFS
218 12:41:06.294046 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437377/compress-overlay-8qx_dkb_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12437377/extract-nfsrootfs-9rkrq6i0
219 12:41:06.302086 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 12:41:06.302233 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 12:41:06.302328 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:41:06.302416 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 12:41:06.302503 Building ramdisk /var/lib/lava/dispatcher/tmp/12437377/extract-overlay-ramdisk-n76lvh4q/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12437377/extract-overlay-ramdisk-n76lvh4q/ramdisk
224 12:41:06.364466 >> 26197 blocks
225 12:41:06.918274 rename /var/lib/lava/dispatcher/tmp/12437377/extract-overlay-ramdisk-n76lvh4q/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12437377/tftp-deploy-uvrdbu8x/ramdisk/ramdisk.cpio.gz
226 12:41:06.918692 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:41:06.918816 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 12:41:06.918918 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 12:41:06.919019 No mkimage arch provided, not using FIT.
230 12:41:06.919112 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:41:06.919201 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:41:06.919306 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 12:41:06.919397 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 12:41:06.919478 No LXC device requested
235 12:41:06.919558 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:41:06.919649 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 12:41:06.919736 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:41:06.919812 Checking files for TFTP limit of 4294967296 bytes.
239 12:41:06.920208 end: 1 tftp-deploy (duration 00:00:10) [common]
240 12:41:06.920320 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:41:06.920437 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:41:06.920574 substitutions:
243 12:41:06.920643 - {DTB}: None
244 12:41:06.920706 - {INITRD}: 12437377/tftp-deploy-uvrdbu8x/ramdisk/ramdisk.cpio.gz
245 12:41:06.920770 - {KERNEL}: 12437377/tftp-deploy-uvrdbu8x/kernel/bzImage
246 12:41:06.920830 - {LAVA_MAC}: None
247 12:41:06.920888 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12437377/extract-nfsrootfs-9rkrq6i0
248 12:41:06.920949 - {NFS_SERVER_IP}: 192.168.201.1
249 12:41:06.921006 - {PRESEED_CONFIG}: None
250 12:41:06.921063 - {PRESEED_LOCAL}: None
251 12:41:06.921119 - {RAMDISK}: 12437377/tftp-deploy-uvrdbu8x/ramdisk/ramdisk.cpio.gz
252 12:41:06.921175 - {ROOT_PART}: None
253 12:41:06.921231 - {ROOT}: None
254 12:41:06.921286 - {SERVER_IP}: 192.168.201.1
255 12:41:06.921340 - {TEE}: None
256 12:41:06.921396 Parsed boot commands:
257 12:41:06.921450 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:41:06.921617 Parsed boot commands: tftpboot 192.168.201.1 12437377/tftp-deploy-uvrdbu8x/kernel/bzImage 12437377/tftp-deploy-uvrdbu8x/kernel/cmdline 12437377/tftp-deploy-uvrdbu8x/ramdisk/ramdisk.cpio.gz
259 12:41:06.921705 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:41:06.921793 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:41:06.921891 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:41:06.922028 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:41:06.922100 Not connected, no need to disconnect.
264 12:41:06.922176 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:41:06.922260 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:41:06.922349 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-0'
267 12:41:06.925971 Setting prompt string to ['lava-test: # ']
268 12:41:06.926391 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:41:06.926523 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:41:06.926623 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:41:06.926714 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:41:06.926912 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=reboot'
273 12:41:12.060172 >> Command sent successfully.
274 12:41:12.062816 Returned 0 in 5 seconds
275 12:41:12.163212 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 12:41:12.163594 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 12:41:12.163727 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 12:41:12.163832 Setting prompt string to 'Starting depthcharge on Volmar...'
280 12:41:12.163915 Changing prompt to 'Starting depthcharge on Volmar...'
281 12:41:12.164014 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
282 12:41:12.164349 [Enter `^Ec?' for help]
283 12:41:13.540988
284 12:41:13.541130
285 12:41:13.547775 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
286 12:41:13.551331 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
287 12:41:13.557907 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
288 12:41:13.561467 CPU: AES supported, TXT NOT supported, VT supported
289 12:41:13.572092 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
290 12:41:13.572181 Cache size = 10 MiB
291 12:41:13.575518 MCH: device id 4609 (rev 04) is Alderlake-P
292 12:41:13.582352 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
293 12:41:13.585895 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
294 12:41:13.589290 VBOOT: Loading verstage.
295 12:41:13.593295 FMAP: Found "FLASH" version 1.1 at 0x1804000.
296 12:41:13.600231 FMAP: base = 0x0 size = 0x2000000 #areas = 37
297 12:41:13.603443 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 12:41:13.613280 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
299 12:41:13.620201 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
300 12:41:13.620290
301 12:41:13.620356
302 12:41:13.630449 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
303 12:41:13.633963 Probing TPM I2C: I2C bus 1 version 0x3230302a
304 12:41:13.637438 DW I2C bus 1 at 0xfe022000 (400 KHz)
305 12:41:13.641331 I2C TX abort detected (00000001)
306 12:41:13.644279 cr50_i2c_read: Address write failed
307 12:41:13.657400 .done! DID_VID 0x00281ae0
308 12:41:13.661086 TPM ready after 0 ms
309 12:41:13.664430 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
310 12:41:13.678007 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
311 12:41:13.685298 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
312 12:41:13.737422 tlcl_send_startup: Startup return code is 0
313 12:41:13.737520 TPM: setup succeeded
314 12:41:13.757155 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
315 12:41:13.780557 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
316 12:41:13.784517 Chrome EC: UHEPI supported
317 12:41:13.787790 Reading cr50 boot mode
318 12:41:13.802793 Cr50 says boot_mode is VERIFIED_RW(0x00).
319 12:41:13.802880 Phase 1
320 12:41:13.809508 FMAP: area GBB found @ 1805000 (458752 bytes)
321 12:41:13.816176 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
322 12:41:13.822552 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
323 12:41:13.829394 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
324 12:41:13.829476 Phase 2
325 12:41:13.833219 Phase 3
326 12:41:13.835992 FMAP: area GBB found @ 1805000 (458752 bytes)
327 12:41:13.842808 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
328 12:41:13.845880 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
329 12:41:13.852862 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 12:41:13.859303 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
331 12:41:13.865930 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
332 12:41:13.875852 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
333 12:41:13.887405 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
334 12:41:13.890735 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
335 12:41:13.897518 VB2:vb2_verify_fw_preamble() Verifying preamble.
336 12:41:13.904076 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
337 12:41:13.910808 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
338 12:41:13.917394 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
339 12:41:13.921832 Phase 4
340 12:41:13.924986 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
341 12:41:13.931276 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
342 12:41:14.144116 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
343 12:41:14.150570 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
344 12:41:14.153950 Saving vboot hash.
345 12:41:14.160767 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
346 12:41:14.176907 tlcl_extend: response is 0
347 12:41:14.183191 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
348 12:41:14.186656 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
349 12:41:14.204575 tlcl_extend: response is 0
350 12:41:14.208928 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
351 12:41:14.230567 tlcl_lock_nv_write: response is 0
352 12:41:14.250241 tlcl_lock_nv_write: response is 0
353 12:41:14.250333 Slot A is selected
354 12:41:14.256557 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
355 12:41:14.263421 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
356 12:41:14.269746 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
357 12:41:14.276439 BS: verstage times (exec / console): total (unknown) / 264 ms
358 12:41:14.276525
359 12:41:14.276594
360 12:41:14.283209 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
361 12:41:14.286961 Google Chrome EC: version:
362 12:41:14.290533 ro: volmar_v2.0.14126-e605144e9c
363 12:41:14.293750 rw: volmar_v0.0.55-22d1557
364 12:41:14.297051 running image: 2
365 12:41:14.300565 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
366 12:41:14.310279 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
367 12:41:14.316899 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
368 12:41:14.323771 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
369 12:41:14.333399 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
370 12:41:14.343644 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
371 12:41:14.346803 EC took 941us to calculate image hash
372 12:41:14.357104 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
373 12:41:14.360447 VB2:sync_ec() select_rw=RW(active)
374 12:41:14.371699 Waited 270us to clear limit power flag.
375 12:41:14.374754 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 12:41:14.377841 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 12:41:14.381645 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
378 12:41:14.388065 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
379 12:41:14.391347 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
380 12:41:14.395018 TCO_STS: 0000 0000
381 12:41:14.398153 GEN_PMCON: d0015038 00002200
382 12:41:14.401409 GBLRST_CAUSE: 00000000 00000000
383 12:41:14.401515 HPR_CAUSE0: 00000000
384 12:41:14.404729 prev_sleep_state 5
385 12:41:14.408081 Abort disabling TXT, as CPU is not TXT capable.
386 12:41:14.416357 cse_lite: Number of partitions = 3
387 12:41:14.419683 cse_lite: Current partition = RO
388 12:41:14.419768 cse_lite: Next partition = RO
389 12:41:14.423015 cse_lite: Flags = 0x7
390 12:41:14.429543 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
391 12:41:14.439954 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
392 12:41:14.442855 FMAP: area SI_ME found @ 1000 (5238784 bytes)
393 12:41:14.449881 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
394 12:41:14.456373 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
395 12:41:14.462860 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
396 12:41:14.466256 cse_lite: CSE CBFS RW version : 16.1.25.2049
397 12:41:14.472725 cse_lite: Set Boot Partition Info Command (RW)
398 12:41:14.476250 HECI: Global Reset(Type:1) Command
399 12:41:15.902119
400 12:41:15.902282
401 12:41:15.902543 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
402 12:41:15.911588 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
403 12:41:15.911704 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
404 12:41:15.912095 CPU: AES supported, TXT NOT supported, VT supported
405 12:41:15.923050 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
406 12:41:15.923441 Cache size = 10 MiB
407 12:41:15.923543 MCH: device id 4609 (rev 04) is Alderlake-P
408 12:41:15.966501 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
409 12:41:15.966627 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
410 12:41:15.966724 VBOOT: Loading verstage.
411 12:41:15.966968 FMAP: Found "FLASH" version 1.1 at 0x1804000.
412 12:41:15.967120 FMAP: base = 0x0 size = 0x2000000 #areas = 37
413 12:41:15.967212 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
414 12:41:15.967331 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
415 12:41:15.978667 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
416 12:41:15.978760
417 12:41:15.978826
418 12:41:15.979064 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
419 12:41:16.014299 Probing TPM I2C: I2C bus 1 version 0x3230302a
420 12:41:16.040354 DW I2C bus 1 at 0xfe022000 (400 KHz)
421 12:41:16.129261 Cr50 i2c TPM IRQ timeout!
422 12:41:16.141908 .done! DID_VID 0x00281ae0
423 12:41:16.145226 TPM ready after 0 ms
424 12:41:16.148703 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
425 12:41:16.162104 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
426 12:41:16.168963 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
427 12:41:16.217216 tlcl_send_startup: Startup return code is 0
428 12:41:16.217319 TPM: setup succeeded
429 12:41:16.237075 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
430 12:41:16.259207 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
431 12:41:16.263148 Chrome EC: UHEPI supported
432 12:41:16.266646 Reading cr50 boot mode
433 12:41:16.281429 Cr50 says boot_mode is VERIFIED_RW(0x00).
434 12:41:16.281521 Phase 1
435 12:41:16.287960 FMAP: area GBB found @ 1805000 (458752 bytes)
436 12:41:16.294416 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
437 12:41:16.301218 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
438 12:41:16.307866 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
439 12:41:16.311362 Phase 2
440 12:41:16.311474 Phase 3
441 12:41:16.314724 FMAP: area GBB found @ 1805000 (458752 bytes)
442 12:41:16.321333 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
443 12:41:16.325019 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
444 12:41:16.331144 VB2:vb2_verify_keyblock() Checking keyblock signature...
445 12:41:16.338043 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
446 12:41:16.344452 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
447 12:41:16.354697 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
448 12:41:16.366422 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
449 12:41:16.369784 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
450 12:41:16.376151 VB2:vb2_verify_fw_preamble() Verifying preamble.
451 12:41:16.382754 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
452 12:41:16.389326 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
453 12:41:16.396299 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
454 12:41:16.400382 Phase 4
455 12:41:16.403531 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
456 12:41:16.410086 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
457 12:41:16.622420 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
458 12:41:16.629331 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
459 12:41:16.632312 Saving vboot hash.
460 12:41:16.638923 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
461 12:41:16.654819 tlcl_extend: response is 0
462 12:41:16.661853 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
463 12:41:16.668111 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
464 12:41:16.682646 tlcl_extend: response is 0
465 12:41:16.689268 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
466 12:41:16.712356 tlcl_lock_nv_write: response is 0
467 12:41:16.731302 tlcl_lock_nv_write: response is 0
468 12:41:16.731398 Slot A is selected
469 12:41:16.738225 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
470 12:41:16.744380 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
471 12:41:16.751367 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
472 12:41:16.757826 BS: verstage times (exec / console): total (unknown) / 259 ms
473 12:41:16.757963
474 12:41:16.758089
475 12:41:16.764723 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
476 12:41:16.768336 Google Chrome EC: version:
477 12:41:16.771634 ro: volmar_v2.0.14126-e605144e9c
478 12:41:16.775012 rw: volmar_v0.0.55-22d1557
479 12:41:16.778430 running image: 2
480 12:41:16.781796 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
481 12:41:16.791960 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
482 12:41:16.798538 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
483 12:41:16.805274 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
484 12:41:16.815249 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
485 12:41:16.825430 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
486 12:41:16.828637 EC took 941us to calculate image hash
487 12:41:16.838389 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
488 12:41:16.841682 VB2:sync_ec() select_rw=RW(active)
489 12:41:16.854256 Waited 605us to clear limit power flag.
490 12:41:16.858032 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
491 12:41:16.860946 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
492 12:41:16.864225 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
493 12:41:16.870899 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
494 12:41:16.874416 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
495 12:41:16.878231 TCO_STS: 0000 0000
496 12:41:16.881068 GEN_PMCON: d1001038 00002200
497 12:41:16.881155 GBLRST_CAUSE: 00000040 00000000
498 12:41:16.884558 HPR_CAUSE0: 00000000
499 12:41:16.888001 prev_sleep_state 5
500 12:41:16.891305 Abort disabling TXT, as CPU is not TXT capable.
501 12:41:16.899078 cse_lite: Number of partitions = 3
502 12:41:16.902267 cse_lite: Current partition = RW
503 12:41:16.902353 cse_lite: Next partition = RW
504 12:41:16.905633 cse_lite: Flags = 0x7
505 12:41:16.912164 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
506 12:41:16.922432 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
507 12:41:16.925717 FMAP: area SI_ME found @ 1000 (5238784 bytes)
508 12:41:16.932336 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
509 12:41:16.938725 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
510 12:41:16.945591 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
511 12:41:16.948915 cse_lite: CSE CBFS RW version : 16.1.25.2049
512 12:41:16.952336 Boot Count incremented to 3598
513 12:41:16.958801 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
514 12:41:16.965528 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
515 12:41:16.978451 Probing TPM I2C: done! DID_VID 0x00281ae0
516 12:41:16.982015 Locality already claimed
517 12:41:16.984938 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
518 12:41:17.007396 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
519 12:41:17.010902 MRC: Hash idx 0x100d comparison successful.
520 12:41:17.014334 MRC cache found, size f6c8
521 12:41:17.014437 bootmode is set to: 2
522 12:41:17.018523 EC returned error result code 3
523 12:41:17.022105 FW_CONFIG value from CBI is 0x131
524 12:41:17.028452 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
525 12:41:17.031984 SPD index = 0
526 12:41:17.038467 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
527 12:41:17.038574 SPD: module type is LPDDR4X
528 12:41:17.045824 SPD: module part number is K4U6E3S4AB-MGCL
529 12:41:17.052654 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
530 12:41:17.056069 SPD: device width 16 bits, bus width 16 bits
531 12:41:17.059389 SPD: module size is 1024 MB (per channel)
532 12:41:17.128737 CBMEM:
533 12:41:17.131911 IMD: root @ 0x76fff000 254 entries.
534 12:41:17.135161 IMD: root @ 0x76ffec00 62 entries.
535 12:41:17.143238 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
536 12:41:17.146129 RO_VPD is uninitialized or empty.
537 12:41:17.149620 FMAP: area RW_VPD found @ f29000 (8192 bytes)
538 12:41:17.156387 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
539 12:41:17.159355 External stage cache:
540 12:41:17.162694 IMD: root @ 0x7bbff000 254 entries.
541 12:41:17.166086 IMD: root @ 0x7bbfec00 62 entries.
542 12:41:17.172956 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
543 12:41:17.179431 MRC: Checking cached data update for 'RW_MRC_CACHE'.
544 12:41:17.182959 MRC: 'RW_MRC_CACHE' does not need update.
545 12:41:17.183036 8 DIMMs found
546 12:41:17.186350 SMM Memory Map
547 12:41:17.189359 SMRAM : 0x7b800000 0x800000
548 12:41:17.192917 Subregion 0: 0x7b800000 0x200000
549 12:41:17.196218 Subregion 1: 0x7ba00000 0x200000
550 12:41:17.199583 Subregion 2: 0x7bc00000 0x400000
551 12:41:17.203082 top_of_ram = 0x77000000
552 12:41:17.206075 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
553 12:41:17.212825 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
554 12:41:17.219410 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
555 12:41:17.222806 MTRR Range: Start=ff000000 End=0 (Size 1000000)
556 12:41:17.222892 Normal boot
557 12:41:17.232742 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
558 12:41:17.239524 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
559 12:41:17.245994 Processing 237 relocs. Offset value of 0x74ab9000
560 12:41:17.254183 BS: romstage times (exec / console): total (unknown) / 377 ms
561 12:41:17.261681
562 12:41:17.261772
563 12:41:17.267987 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
564 12:41:17.268069 Normal boot
565 12:41:17.274836 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
566 12:41:17.282542 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
567 12:41:17.289098 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
568 12:41:17.295444 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
569 12:41:17.345320 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
570 12:41:17.352115 Processing 5931 relocs. Offset value of 0x72a2f000
571 12:41:17.355383 BS: postcar times (exec / console): total (unknown) / 51 ms
572 12:41:17.355475
573 12:41:17.358926
574 12:41:17.365677 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
575 12:41:17.368599 Reserving BERT start 76a1e000, size 10000
576 12:41:17.371907 Normal boot
577 12:41:17.375428 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
578 12:41:17.381958 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
579 12:41:17.392145 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
580 12:41:17.395102 FMAP: area RW_VPD found @ f29000 (8192 bytes)
581 12:41:17.398581 Google Chrome EC: version:
582 12:41:17.401948 ro: volmar_v2.0.14126-e605144e9c
583 12:41:17.405346 rw: volmar_v0.0.55-22d1557
584 12:41:17.405428 running image: 2
585 12:41:17.412209 ACPI _SWS is PM1 Index 8 GPE Index -1
586 12:41:17.415233 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
587 12:41:17.419106 EC returned error result code 3
588 12:41:17.422468 FW_CONFIG value from CBI is 0x131
589 12:41:17.428970 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
590 12:41:17.432324 PCI: 00:1c.2 disabled by fw_config
591 12:41:17.438973 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
592 12:41:17.442541 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
593 12:41:17.449300 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
594 12:41:17.452412 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
595 12:41:17.458753 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
596 12:41:17.465533 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
597 12:41:17.472396 microcode: sig=0x906a4 pf=0x80 revision=0x423
598 12:41:17.475379 microcode: Update skipped, already up-to-date
599 12:41:17.482327 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
600 12:41:17.515293 Detected 6 core, 8 thread CPU.
601 12:41:17.518328 Setting up SMI for CPU
602 12:41:17.522072 IED base = 0x7bc00000
603 12:41:17.522150 IED size = 0x00400000
604 12:41:17.525305 Will perform SMM setup.
605 12:41:17.528625 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
606 12:41:17.531475 LAPIC 0x0 in XAPIC mode.
607 12:41:17.541577 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
608 12:41:17.545203 Processing 18 relocs. Offset value of 0x00030000
609 12:41:17.549664 Attempting to start 7 APs
610 12:41:17.553056 Waiting for 10ms after sending INIT.
611 12:41:17.566069 Waiting for SIPI to complete...
612 12:41:17.569199 done.
613 12:41:17.569284 LAPIC 0x16 in XAPIC mode.
614 12:41:17.572476 LAPIC 0x8 in XAPIC mode.
615 12:41:17.575901 LAPIC 0x9 in XAPIC mode.
616 12:41:17.579393 AP: slot 7 apic_id 8, MCU rev: 0x00000423
617 12:41:17.582981 LAPIC 0x10 in XAPIC mode.
618 12:41:17.585872 LAPIC 0x14 in XAPIC mode.
619 12:41:17.589336 AP: slot 6 apic_id 9, MCU rev: 0x00000423
620 12:41:17.592608 LAPIC 0x12 in XAPIC mode.
621 12:41:17.595935 AP: slot 3 apic_id 10, MCU rev: 0x00000423
622 12:41:17.599192 AP: slot 1 apic_id 14, MCU rev: 0x00000423
623 12:41:17.605912 AP: slot 2 apic_id 16, MCU rev: 0x00000423
624 12:41:17.609545 AP: slot 4 apic_id 12, MCU rev: 0x00000423
625 12:41:17.612722 LAPIC 0x1 in XAPIC mode.
626 12:41:17.616093 Waiting for SIPI to complete...
627 12:41:17.616170 done.
628 12:41:17.619124 AP: slot 5 apic_id 1, MCU rev: 0x00000423
629 12:41:17.622462 smm_setup_relocation_handler: enter
630 12:41:17.625778 smm_setup_relocation_handler: exit
631 12:41:17.635849 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
632 12:41:17.639179 Processing 11 relocs. Offset value of 0x00038000
633 12:41:17.645741 smm_module_setup_stub: stack_top = 0x7b804000
634 12:41:17.649182 smm_module_setup_stub: per cpu stack_size = 0x800
635 12:41:17.655942 smm_module_setup_stub: runtime.start32_offset = 0x4c
636 12:41:17.659117 smm_module_setup_stub: runtime.smm_size = 0x10000
637 12:41:17.665932 SMM Module: stub loaded at 38000. Will call 0x76a52094
638 12:41:17.669276 Installing permanent SMM handler to 0x7b800000
639 12:41:17.676081 smm_load_module: total_smm_space_needed e468, available -> 200000
640 12:41:17.685656 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
641 12:41:17.689153 Processing 255 relocs. Offset value of 0x7b9f6000
642 12:41:17.693108 smm_load_module: smram_start: 0x7b800000
643 12:41:17.699417 smm_load_module: smram_end: 7ba00000
644 12:41:17.702476 smm_load_module: handler start 0x7b9f6d5f
645 12:41:17.705761 smm_load_module: handler_size 98d0
646 12:41:17.709251 smm_load_module: fxsave_area 0x7b9ff000
647 12:41:17.712264 smm_load_module: fxsave_size 1000
648 12:41:17.715619 smm_load_module: CONFIG_MSEG_SIZE 0x0
649 12:41:17.722511 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
650 12:41:17.728998 smm_load_module: handler_mod_params.smbase = 0x7b800000
651 12:41:17.732336 smm_load_module: per_cpu_save_state_size = 0x400
652 12:41:17.735551 smm_load_module: num_cpus = 0x8
653 12:41:17.742401 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
654 12:41:17.745821 smm_load_module: total_save_state_size = 0x2000
655 12:41:17.749140 smm_load_module: cpu0 entry: 7b9e6000
656 12:41:17.755758 smm_create_map: cpus allowed in one segment 30
657 12:41:17.759158 smm_create_map: min # of segments needed 1
658 12:41:17.759275 CPU 0x0
659 12:41:17.762665 smbase 7b9e6000 entry 7b9ee000
660 12:41:17.769209 ss_start 7b9f5c00 code_end 7b9ee208
661 12:41:17.769320 CPU 0x1
662 12:41:17.772292 smbase 7b9e5c00 entry 7b9edc00
663 12:41:17.779473 ss_start 7b9f5800 code_end 7b9ede08
664 12:41:17.779581 CPU 0x2
665 12:41:17.782492 smbase 7b9e5800 entry 7b9ed800
666 12:41:17.785886 ss_start 7b9f5400 code_end 7b9eda08
667 12:41:17.789344 CPU 0x3
668 12:41:17.792369 smbase 7b9e5400 entry 7b9ed400
669 12:41:17.796115 ss_start 7b9f5000 code_end 7b9ed608
670 12:41:17.796220 CPU 0x4
671 12:41:17.798970 smbase 7b9e5000 entry 7b9ed000
672 12:41:17.805727 ss_start 7b9f4c00 code_end 7b9ed208
673 12:41:17.805837 CPU 0x5
674 12:41:17.809081 smbase 7b9e4c00 entry 7b9ecc00
675 12:41:17.816074 ss_start 7b9f4800 code_end 7b9ece08
676 12:41:17.816182 CPU 0x6
677 12:41:17.818968 smbase 7b9e4800 entry 7b9ec800
678 12:41:17.822463 ss_start 7b9f4400 code_end 7b9eca08
679 12:41:17.826164 CPU 0x7
680 12:41:17.829323 smbase 7b9e4400 entry 7b9ec400
681 12:41:17.832200 ss_start 7b9f4000 code_end 7b9ec608
682 12:41:17.842322 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
683 12:41:17.845713 Processing 11 relocs. Offset value of 0x7b9ee000
684 12:41:17.852255 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
685 12:41:17.859167 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
686 12:41:17.865502 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
687 12:41:17.868920 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
688 12:41:17.879134 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
689 12:41:17.882096 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
690 12:41:17.888723 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
691 12:41:17.896041 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
692 12:41:17.902120 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
693 12:41:17.909019 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
694 12:41:17.915900 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
695 12:41:17.922362 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
696 12:41:17.928567 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
697 12:41:17.931872 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
698 12:41:17.938779 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
699 12:41:17.945350 smm_module_setup_stub: stack_top = 0x7b804000
700 12:41:17.949017 smm_module_setup_stub: per cpu stack_size = 0x800
701 12:41:17.955301 smm_module_setup_stub: runtime.start32_offset = 0x4c
702 12:41:17.958630 smm_module_setup_stub: runtime.smm_size = 0x200000
703 12:41:17.965305 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
704 12:41:17.969545 Clearing SMI status registers
705 12:41:17.973045 SMI_STS: PM1
706 12:41:17.973131 PM1_STS: WAK PWRBTN
707 12:41:17.983114 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
708 12:41:17.986246 In relocation handler: CPU 0
709 12:41:17.989551 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
710 12:41:17.993118 Writing SMRR. base = 0x7b800006, mask=0xff800c00
711 12:41:17.996202 Relocation complete.
712 12:41:18.002828 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
713 12:41:18.006297 In relocation handler: CPU 5
714 12:41:18.009812 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
715 12:41:18.013222 Relocation complete.
716 12:41:18.019805 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
717 12:41:18.022868 In relocation handler: CPU 1
718 12:41:18.026566 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
719 12:41:18.032925 Writing SMRR. base = 0x7b800006, mask=0xff800c00
720 12:41:18.033012 Relocation complete.
721 12:41:18.039660 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
722 12:41:18.043067 In relocation handler: CPU 3
723 12:41:18.046434 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
724 12:41:18.053150 Writing SMRR. base = 0x7b800006, mask=0xff800c00
725 12:41:18.056081 Relocation complete.
726 12:41:18.063280 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
727 12:41:18.066163 In relocation handler: CPU 4
728 12:41:18.069581 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
729 12:41:18.073000 Writing SMRR. base = 0x7b800006, mask=0xff800c00
730 12:41:18.076412 Relocation complete.
731 12:41:18.083146 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
732 12:41:18.086751 In relocation handler: CPU 2
733 12:41:18.089857 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
734 12:41:18.096165 Writing SMRR. base = 0x7b800006, mask=0xff800c00
735 12:41:18.096257 Relocation complete.
736 12:41:18.102880 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
737 12:41:18.106405 In relocation handler: CPU 6
738 12:41:18.112805 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
739 12:41:18.112927 Relocation complete.
740 12:41:18.119414 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
741 12:41:18.122948 In relocation handler: CPU 7
742 12:41:18.126383 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
743 12:41:18.132903 Writing SMRR. base = 0x7b800006, mask=0xff800c00
744 12:41:18.136153 Relocation complete.
745 12:41:18.136277 Initializing CPU #0
746 12:41:18.139611 CPU: vendor Intel device 906a4
747 12:41:18.143024 CPU: family 06, model 9a, stepping 04
748 12:41:18.145974 Clearing out pending MCEs
749 12:41:18.149347 cpu: energy policy set to 7
750 12:41:18.152728 Turbo is available but hidden
751 12:41:18.155959 Turbo is available and visible
752 12:41:18.159454 microcode: Update skipped, already up-to-date
753 12:41:18.162873 CPU #0 initialized
754 12:41:18.162998 Initializing CPU #5
755 12:41:18.166206 Initializing CPU #4
756 12:41:18.169326 Initializing CPU #2
757 12:41:18.172700 CPU: vendor Intel device 906a4
758 12:41:18.176095 CPU: family 06, model 9a, stepping 04
759 12:41:18.176206 Initializing CPU #1
760 12:41:18.179578 CPU: vendor Intel device 906a4
761 12:41:18.182612 CPU: family 06, model 9a, stepping 04
762 12:41:18.185925 CPU: vendor Intel device 906a4
763 12:41:18.192803 CPU: family 06, model 9a, stepping 04
764 12:41:18.192920 Clearing out pending MCEs
765 12:41:18.196046 Initializing CPU #3
766 12:41:18.199399 Clearing out pending MCEs
767 12:41:18.202862 Clearing out pending MCEs
768 12:41:18.202981 CPU: vendor Intel device 906a4
769 12:41:18.209618 CPU: family 06, model 9a, stepping 04
770 12:41:18.209739 cpu: energy policy set to 7
771 12:41:18.212794 cpu: energy policy set to 7
772 12:41:18.216153 CPU: vendor Intel device 906a4
773 12:41:18.219542 CPU: family 06, model 9a, stepping 04
774 12:41:18.222768 Clearing out pending MCEs
775 12:41:18.226038 cpu: energy policy set to 7
776 12:41:18.229452 microcode: Update skipped, already up-to-date
777 12:41:18.232870 CPU #4 initialized
778 12:41:18.236274 microcode: Update skipped, already up-to-date
779 12:41:18.239176 CPU #2 initialized
780 12:41:18.242568 microcode: Update skipped, already up-to-date
781 12:41:18.246017 CPU #1 initialized
782 12:41:18.246129 Initializing CPU #7
783 12:41:18.249489 cpu: energy policy set to 7
784 12:41:18.252924 Clearing out pending MCEs
785 12:41:18.259098 microcode: Update skipped, already up-to-date
786 12:41:18.259211 CPU #3 initialized
787 12:41:18.262539 CPU: vendor Intel device 906a4
788 12:41:18.265820 CPU: family 06, model 9a, stepping 04
789 12:41:18.269184 Initializing CPU #6
790 12:41:18.272419 cpu: energy policy set to 7
791 12:41:18.272531 Clearing out pending MCEs
792 12:41:18.279190 microcode: Update skipped, already up-to-date
793 12:41:18.279304 CPU #5 initialized
794 12:41:18.282654 cpu: energy policy set to 7
795 12:41:18.285716 CPU: vendor Intel device 906a4
796 12:41:18.289133 CPU: family 06, model 9a, stepping 04
797 12:41:18.296036 microcode: Update skipped, already up-to-date
798 12:41:18.296150 CPU #7 initialized
799 12:41:18.299340 Clearing out pending MCEs
800 12:41:18.302676 cpu: energy policy set to 7
801 12:41:18.305827 microcode: Update skipped, already up-to-date
802 12:41:18.309727 CPU #6 initialized
803 12:41:18.312812 bsp_do_flight_plan done after 693 msecs.
804 12:41:18.316034 CPU: frequency set to 4400 MHz
805 12:41:18.319311 Enabling SMIs.
806 12:41:18.325845 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
807 12:41:18.340505 Probing TPM I2C: done! DID_VID 0x00281ae0
808 12:41:18.343745 Locality already claimed
809 12:41:18.347289 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
810 12:41:18.358639 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
811 12:41:18.361889 Enabling GPIO PM b/c CR50 has long IRQ pulse support
812 12:41:18.368398 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
813 12:41:18.375125 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
814 12:41:18.378272 Found a VBT of 9216 bytes after decompression
815 12:41:18.382033 PCI 1.0, PIN A, using IRQ #16
816 12:41:18.385080 PCI 2.0, PIN A, using IRQ #17
817 12:41:18.388489 PCI 4.0, PIN A, using IRQ #18
818 12:41:18.391955 PCI 5.0, PIN A, using IRQ #16
819 12:41:18.395234 PCI 6.0, PIN A, using IRQ #16
820 12:41:18.398753 PCI 6.2, PIN C, using IRQ #18
821 12:41:18.402138 PCI 7.0, PIN A, using IRQ #19
822 12:41:18.405422 PCI 7.1, PIN B, using IRQ #20
823 12:41:18.408368 PCI 7.2, PIN C, using IRQ #21
824 12:41:18.411701 PCI 7.3, PIN D, using IRQ #22
825 12:41:18.415078 PCI 8.0, PIN A, using IRQ #23
826 12:41:18.418365 PCI D.0, PIN A, using IRQ #17
827 12:41:18.418506 PCI D.1, PIN B, using IRQ #19
828 12:41:18.422076 PCI 10.0, PIN A, using IRQ #24
829 12:41:18.425331 PCI 10.1, PIN B, using IRQ #25
830 12:41:18.428336 PCI 10.6, PIN C, using IRQ #20
831 12:41:18.432013 PCI 10.7, PIN D, using IRQ #21
832 12:41:18.435189 PCI 11.0, PIN A, using IRQ #26
833 12:41:18.438812 PCI 11.1, PIN B, using IRQ #27
834 12:41:18.441814 PCI 11.2, PIN C, using IRQ #28
835 12:41:18.445326 PCI 11.3, PIN D, using IRQ #29
836 12:41:18.448301 PCI 12.0, PIN A, using IRQ #30
837 12:41:18.451633 PCI 12.6, PIN B, using IRQ #31
838 12:41:18.455203 PCI 12.7, PIN C, using IRQ #22
839 12:41:18.458694 PCI 13.0, PIN A, using IRQ #32
840 12:41:18.462137 PCI 13.1, PIN B, using IRQ #33
841 12:41:18.465382 PCI 13.2, PIN C, using IRQ #34
842 12:41:18.468761 PCI 13.3, PIN D, using IRQ #35
843 12:41:18.468877 PCI 14.0, PIN B, using IRQ #23
844 12:41:18.471641 PCI 14.1, PIN A, using IRQ #36
845 12:41:18.475268 PCI 14.3, PIN C, using IRQ #17
846 12:41:18.478450 PCI 15.0, PIN A, using IRQ #37
847 12:41:18.481730 PCI 15.1, PIN B, using IRQ #38
848 12:41:18.485231 PCI 15.2, PIN C, using IRQ #39
849 12:41:18.488614 PCI 15.3, PIN D, using IRQ #40
850 12:41:18.491866 PCI 16.0, PIN A, using IRQ #18
851 12:41:18.495350 PCI 16.1, PIN B, using IRQ #19
852 12:41:18.498611 PCI 16.2, PIN C, using IRQ #20
853 12:41:18.501878 PCI 16.3, PIN D, using IRQ #21
854 12:41:18.505499 PCI 16.4, PIN A, using IRQ #18
855 12:41:18.508830 PCI 16.5, PIN B, using IRQ #19
856 12:41:18.511980 PCI 17.0, PIN A, using IRQ #22
857 12:41:18.515450 PCI 19.0, PIN A, using IRQ #41
858 12:41:18.515566 PCI 19.1, PIN B, using IRQ #42
859 12:41:18.518887 PCI 19.2, PIN C, using IRQ #43
860 12:41:18.521730 PCI 1C.0, PIN A, using IRQ #16
861 12:41:18.525309 PCI 1C.1, PIN B, using IRQ #17
862 12:41:18.528807 PCI 1C.2, PIN C, using IRQ #18
863 12:41:18.531996 PCI 1C.3, PIN D, using IRQ #19
864 12:41:18.535258 PCI 1C.4, PIN A, using IRQ #16
865 12:41:18.538257 PCI 1C.5, PIN B, using IRQ #17
866 12:41:18.541914 PCI 1C.6, PIN C, using IRQ #18
867 12:41:18.545345 PCI 1C.7, PIN D, using IRQ #19
868 12:41:18.548673 PCI 1D.0, PIN A, using IRQ #16
869 12:41:18.551667 PCI 1D.1, PIN B, using IRQ #17
870 12:41:18.555093 PCI 1D.2, PIN C, using IRQ #18
871 12:41:18.558497 PCI 1D.3, PIN D, using IRQ #19
872 12:41:18.562051 PCI 1E.0, PIN A, using IRQ #23
873 12:41:18.565045 PCI 1E.1, PIN B, using IRQ #20
874 12:41:18.568555 PCI 1E.2, PIN C, using IRQ #44
875 12:41:18.568638 PCI 1E.3, PIN D, using IRQ #45
876 12:41:18.571547 PCI 1F.3, PIN B, using IRQ #22
877 12:41:18.575017 PCI 1F.4, PIN C, using IRQ #23
878 12:41:18.578419 PCI 1F.6, PIN D, using IRQ #20
879 12:41:18.581815 PCI 1F.7, PIN A, using IRQ #21
880 12:41:18.588272 IRQ: Using dynamically assigned PCI IO-APIC IRQs
881 12:41:18.594787 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
882 12:41:18.773392 FSPS returned 0
883 12:41:18.776622 Executing Phase 1 of FspMultiPhaseSiInit
884 12:41:18.787083 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
885 12:41:18.790332 port C0 DISC req: usage 1 usb3 1 usb2 1
886 12:41:18.793565 Raw Buffer output 0 00000111
887 12:41:18.797150 Raw Buffer output 1 00000000
888 12:41:18.800414 pmc_send_ipc_cmd succeeded
889 12:41:18.806877 port C1 DISC req: usage 1 usb3 3 usb2 3
890 12:41:18.806958 Raw Buffer output 0 00000331
891 12:41:18.810198 Raw Buffer output 1 00000000
892 12:41:18.814581 pmc_send_ipc_cmd succeeded
893 12:41:18.818219 Detected 6 core, 8 thread CPU.
894 12:41:18.821551 Detected 6 core, 8 thread CPU.
895 12:41:18.826509 Detected 6 core, 8 thread CPU.
896 12:41:18.830119 Detected 6 core, 8 thread CPU.
897 12:41:18.833504 Detected 6 core, 8 thread CPU.
898 12:41:18.836903 Detected 6 core, 8 thread CPU.
899 12:41:18.840349 Detected 6 core, 8 thread CPU.
900 12:41:18.843815 Detected 6 core, 8 thread CPU.
901 12:41:18.846878 Detected 6 core, 8 thread CPU.
902 12:41:18.850032 Detected 6 core, 8 thread CPU.
903 12:41:18.853304 Detected 6 core, 8 thread CPU.
904 12:41:18.856837 Detected 6 core, 8 thread CPU.
905 12:41:18.860179 Detected 6 core, 8 thread CPU.
906 12:41:18.863318 Detected 6 core, 8 thread CPU.
907 12:41:18.866642 Detected 6 core, 8 thread CPU.
908 12:41:18.870058 Detected 6 core, 8 thread CPU.
909 12:41:18.873712 Detected 6 core, 8 thread CPU.
910 12:41:18.876556 Detected 6 core, 8 thread CPU.
911 12:41:18.879984 Detected 6 core, 8 thread CPU.
912 12:41:18.883921 Detected 6 core, 8 thread CPU.
913 12:41:18.886553 Detected 6 core, 8 thread CPU.
914 12:41:18.890140 Detected 6 core, 8 thread CPU.
915 12:41:19.179744 Detected 6 core, 8 thread CPU.
916 12:41:19.183422 Detected 6 core, 8 thread CPU.
917 12:41:19.186680 Detected 6 core, 8 thread CPU.
918 12:41:19.189836 Detected 6 core, 8 thread CPU.
919 12:41:19.193280 Detected 6 core, 8 thread CPU.
920 12:41:19.196476 Detected 6 core, 8 thread CPU.
921 12:41:19.199849 Detected 6 core, 8 thread CPU.
922 12:41:19.203306 Detected 6 core, 8 thread CPU.
923 12:41:19.206717 Detected 6 core, 8 thread CPU.
924 12:41:19.210211 Detected 6 core, 8 thread CPU.
925 12:41:19.213621 Detected 6 core, 8 thread CPU.
926 12:41:19.216666 Detected 6 core, 8 thread CPU.
927 12:41:19.220040 Detected 6 core, 8 thread CPU.
928 12:41:19.223454 Detected 6 core, 8 thread CPU.
929 12:41:19.226862 Detected 6 core, 8 thread CPU.
930 12:41:19.230284 Detected 6 core, 8 thread CPU.
931 12:41:19.233292 Detected 6 core, 8 thread CPU.
932 12:41:19.236722 Detected 6 core, 8 thread CPU.
933 12:41:19.240042 Detected 6 core, 8 thread CPU.
934 12:41:19.240140 Detected 6 core, 8 thread CPU.
935 12:41:19.243995 Display FSP Version Info HOB
936 12:41:19.247074 Reference Code - CPU = c.0.65.70
937 12:41:19.250067 uCode Version = 0.0.4.23
938 12:41:19.253615 TXT ACM version = ff.ff.ff.ffff
939 12:41:19.257120 Reference Code - ME = c.0.65.70
940 12:41:19.260540 MEBx version = 0.0.0.0
941 12:41:19.263493 ME Firmware Version = Lite SKU
942 12:41:19.266883 Reference Code - PCH = c.0.65.70
943 12:41:19.270207 PCH-CRID Status = Disabled
944 12:41:19.273476 PCH-CRID Original Value = ff.ff.ff.ffff
945 12:41:19.277095 PCH-CRID New Value = ff.ff.ff.ffff
946 12:41:19.280402 OPROM - RST - RAID = ff.ff.ff.ffff
947 12:41:19.283648 PCH Hsio Version = 4.0.0.0
948 12:41:19.287192 Reference Code - SA - System Agent = c.0.65.70
949 12:41:19.290430 Reference Code - MRC = 0.0.3.80
950 12:41:19.293555 SA - PCIe Version = c.0.65.70
951 12:41:19.296924 SA-CRID Status = Disabled
952 12:41:19.300286 SA-CRID Original Value = 0.0.0.4
953 12:41:19.303506 SA-CRID New Value = 0.0.0.4
954 12:41:19.306950 OPROM - VBIOS = ff.ff.ff.ffff
955 12:41:19.310305 IO Manageability Engine FW Version = 24.0.4.0
956 12:41:19.313833 PHY Build Version = 0.0.0.2016
957 12:41:19.316849 Thunderbolt(TM) FW Version = 0.0.0.0
958 12:41:19.323627 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
959 12:41:19.330396 BS: BS_DEV_INIT_CHIPS run times (exec / console): 490 / 507 ms
960 12:41:19.330506 Enumerating buses...
961 12:41:19.336786 Show all devs... Before device enumeration.
962 12:41:19.336875 Root Device: enabled 1
963 12:41:19.340497 CPU_CLUSTER: 0: enabled 1
964 12:41:19.343850 DOMAIN: 0000: enabled 1
965 12:41:19.343926 GPIO: 0: enabled 1
966 12:41:19.347210 PCI: 00:00.0: enabled 1
967 12:41:19.350384 PCI: 00:01.0: enabled 0
968 12:41:19.353801 PCI: 00:01.1: enabled 0
969 12:41:19.353901 PCI: 00:02.0: enabled 1
970 12:41:19.357009 PCI: 00:04.0: enabled 1
971 12:41:19.360391 PCI: 00:05.0: enabled 0
972 12:41:19.363718 PCI: 00:06.0: enabled 1
973 12:41:19.363828 PCI: 00:06.2: enabled 0
974 12:41:19.366730 PCI: 00:07.0: enabled 0
975 12:41:19.370206 PCI: 00:07.1: enabled 0
976 12:41:19.373712 PCI: 00:07.2: enabled 0
977 12:41:19.373813 PCI: 00:07.3: enabled 0
978 12:41:19.376772 PCI: 00:08.0: enabled 0
979 12:41:19.380235 PCI: 00:09.0: enabled 0
980 12:41:19.383748 PCI: 00:0a.0: enabled 1
981 12:41:19.383848 PCI: 00:0d.0: enabled 1
982 12:41:19.386657 PCI: 00:0d.1: enabled 0
983 12:41:19.390052 PCI: 00:0d.2: enabled 0
984 12:41:19.393652 PCI: 00:0d.3: enabled 0
985 12:41:19.393758 PCI: 00:0e.0: enabled 0
986 12:41:19.396748 PCI: 00:10.0: enabled 0
987 12:41:19.400257 PCI: 00:10.1: enabled 0
988 12:41:19.400361 PCI: 00:10.6: enabled 0
989 12:41:19.403271 PCI: 00:10.7: enabled 0
990 12:41:19.406996 PCI: 00:12.0: enabled 0
991 12:41:19.410331 PCI: 00:12.6: enabled 0
992 12:41:19.410409 PCI: 00:12.7: enabled 0
993 12:41:19.413125 PCI: 00:13.0: enabled 0
994 12:41:19.416602 PCI: 00:14.0: enabled 1
995 12:41:19.420340 PCI: 00:14.1: enabled 0
996 12:41:19.420446 PCI: 00:14.2: enabled 1
997 12:41:19.423711 PCI: 00:14.3: enabled 1
998 12:41:19.426507 PCI: 00:15.0: enabled 1
999 12:41:19.429822 PCI: 00:15.1: enabled 1
1000 12:41:19.429922 PCI: 00:15.2: enabled 0
1001 12:41:19.433224 PCI: 00:15.3: enabled 1
1002 12:41:19.436572 PCI: 00:16.0: enabled 1
1003 12:41:19.436671 PCI: 00:16.1: enabled 0
1004 12:41:19.440006 PCI: 00:16.2: enabled 0
1005 12:41:19.443371 PCI: 00:16.3: enabled 0
1006 12:41:19.446553 PCI: 00:16.4: enabled 0
1007 12:41:19.446622 PCI: 00:16.5: enabled 0
1008 12:41:19.449906 PCI: 00:17.0: enabled 1
1009 12:41:19.453440 PCI: 00:19.0: enabled 0
1010 12:41:19.456605 PCI: 00:19.1: enabled 1
1011 12:41:19.456702 PCI: 00:19.2: enabled 0
1012 12:41:19.460053 PCI: 00:1a.0: enabled 0
1013 12:41:19.463474 PCI: 00:1c.0: enabled 0
1014 12:41:19.463557 PCI: 00:1c.1: enabled 0
1015 12:41:19.466826 PCI: 00:1c.2: enabled 0
1016 12:41:19.470231 PCI: 00:1c.3: enabled 0
1017 12:41:19.473259 PCI: 00:1c.4: enabled 0
1018 12:41:19.473335 PCI: 00:1c.5: enabled 0
1019 12:41:19.476633 PCI: 00:1c.6: enabled 0
1020 12:41:19.480101 PCI: 00:1c.7: enabled 0
1021 12:41:19.483396 PCI: 00:1d.0: enabled 0
1022 12:41:19.483473 PCI: 00:1d.1: enabled 0
1023 12:41:19.486771 PCI: 00:1d.2: enabled 0
1024 12:41:19.490039 PCI: 00:1d.3: enabled 0
1025 12:41:19.493573 PCI: 00:1e.0: enabled 1
1026 12:41:19.493646 PCI: 00:1e.1: enabled 0
1027 12:41:19.496563 PCI: 00:1e.2: enabled 0
1028 12:41:19.500082 PCI: 00:1e.3: enabled 1
1029 12:41:19.503053 PCI: 00:1f.0: enabled 1
1030 12:41:19.503198 PCI: 00:1f.1: enabled 0
1031 12:41:19.506498 PCI: 00:1f.2: enabled 1
1032 12:41:19.510317 PCI: 00:1f.3: enabled 1
1033 12:41:19.510391 PCI: 00:1f.4: enabled 0
1034 12:41:19.513195 PCI: 00:1f.5: enabled 1
1035 12:41:19.516751 PCI: 00:1f.6: enabled 0
1036 12:41:19.519942 PCI: 00:1f.7: enabled 0
1037 12:41:19.520018 GENERIC: 0.0: enabled 1
1038 12:41:19.523275 GENERIC: 0.0: enabled 1
1039 12:41:19.526413 GENERIC: 1.0: enabled 1
1040 12:41:19.529697 GENERIC: 0.0: enabled 1
1041 12:41:19.529801 GENERIC: 1.0: enabled 1
1042 12:41:19.533288 USB0 port 0: enabled 1
1043 12:41:19.536756 USB0 port 0: enabled 1
1044 12:41:19.536855 GENERIC: 0.0: enabled 1
1045 12:41:19.539961 I2C: 00:1a: enabled 1
1046 12:41:19.543395 I2C: 00:31: enabled 1
1047 12:41:19.546382 I2C: 00:32: enabled 1
1048 12:41:19.546469 I2C: 00:50: enabled 1
1049 12:41:19.549842 I2C: 00:10: enabled 1
1050 12:41:19.553148 I2C: 00:15: enabled 1
1051 12:41:19.553240 I2C: 00:2c: enabled 1
1052 12:41:19.556581 GENERIC: 0.0: enabled 1
1053 12:41:19.559760 SPI: 00: enabled 1
1054 12:41:19.559862 PNP: 0c09.0: enabled 1
1055 12:41:19.563251 GENERIC: 0.0: enabled 1
1056 12:41:19.566268 USB3 port 0: enabled 1
1057 12:41:19.566386 USB3 port 1: enabled 0
1058 12:41:19.569563 USB3 port 2: enabled 1
1059 12:41:19.573216 USB3 port 3: enabled 0
1060 12:41:19.576863 USB2 port 0: enabled 1
1061 12:41:19.576965 USB2 port 1: enabled 0
1062 12:41:19.579750 USB2 port 2: enabled 1
1063 12:41:19.583228 USB2 port 3: enabled 0
1064 12:41:19.583313 USB2 port 4: enabled 0
1065 12:41:19.586202 USB2 port 5: enabled 1
1066 12:41:19.589532 USB2 port 6: enabled 0
1067 12:41:19.589640 USB2 port 7: enabled 0
1068 12:41:19.593037 USB2 port 8: enabled 1
1069 12:41:19.596219 USB2 port 9: enabled 1
1070 12:41:19.599407 USB3 port 0: enabled 1
1071 12:41:19.599513 USB3 port 1: enabled 0
1072 12:41:19.602904 USB3 port 2: enabled 0
1073 12:41:19.606211 USB3 port 3: enabled 0
1074 12:41:19.606287 GENERIC: 0.0: enabled 1
1075 12:41:19.609634 GENERIC: 1.0: enabled 1
1076 12:41:19.612813 APIC: 00: enabled 1
1077 12:41:19.612933 APIC: 14: enabled 1
1078 12:41:19.616227 APIC: 16: enabled 1
1079 12:41:19.619351 APIC: 10: enabled 1
1080 12:41:19.619451 APIC: 12: enabled 1
1081 12:41:19.622917 APIC: 01: enabled 1
1082 12:41:19.622997 APIC: 09: enabled 1
1083 12:41:19.626365 APIC: 08: enabled 1
1084 12:41:19.629371 Compare with tree...
1085 12:41:19.629474 Root Device: enabled 1
1086 12:41:19.633352 CPU_CLUSTER: 0: enabled 1
1087 12:41:19.636164 APIC: 00: enabled 1
1088 12:41:19.639578 APIC: 14: enabled 1
1089 12:41:19.639667 APIC: 16: enabled 1
1090 12:41:19.642933 APIC: 10: enabled 1
1091 12:41:19.646519 APIC: 12: enabled 1
1092 12:41:19.646596 APIC: 01: enabled 1
1093 12:41:19.649730 APIC: 09: enabled 1
1094 12:41:19.652872 APIC: 08: enabled 1
1095 12:41:19.652959 DOMAIN: 0000: enabled 1
1096 12:41:19.655918 GPIO: 0: enabled 1
1097 12:41:19.659428 PCI: 00:00.0: enabled 1
1098 12:41:19.662749 PCI: 00:01.0: enabled 0
1099 12:41:19.662863 PCI: 00:01.1: enabled 0
1100 12:41:19.665862 PCI: 00:02.0: enabled 1
1101 12:41:19.669262 PCI: 00:04.0: enabled 1
1102 12:41:19.672809 GENERIC: 0.0: enabled 1
1103 12:41:19.676265 PCI: 00:05.0: enabled 0
1104 12:41:19.676352 PCI: 00:06.0: enabled 1
1105 12:41:19.679920 PCI: 00:06.2: enabled 0
1106 12:41:19.682932 PCI: 00:08.0: enabled 0
1107 12:41:19.685832 PCI: 00:09.0: enabled 0
1108 12:41:19.689625 PCI: 00:0a.0: enabled 1
1109 12:41:19.689712 PCI: 00:0d.0: enabled 1
1110 12:41:19.692594 USB0 port 0: enabled 1
1111 12:41:19.695955 USB3 port 0: enabled 1
1112 12:41:19.699359 USB3 port 1: enabled 0
1113 12:41:19.702859 USB3 port 2: enabled 1
1114 12:41:19.706206 USB3 port 3: enabled 0
1115 12:41:19.706293 PCI: 00:0d.1: enabled 0
1116 12:41:19.709453 PCI: 00:0d.2: enabled 0
1117 12:41:19.712885 PCI: 00:0d.3: enabled 0
1118 12:41:19.715862 PCI: 00:0e.0: enabled 0
1119 12:41:19.715948 PCI: 00:10.0: enabled 0
1120 12:41:19.719808 PCI: 00:10.1: enabled 0
1121 12:41:19.722934 PCI: 00:10.6: enabled 0
1122 12:41:19.725976 PCI: 00:10.7: enabled 0
1123 12:41:19.729583 PCI: 00:12.0: enabled 0
1124 12:41:19.729671 PCI: 00:12.6: enabled 0
1125 12:41:19.732661 PCI: 00:12.7: enabled 0
1126 12:41:19.736005 PCI: 00:13.0: enabled 0
1127 12:41:19.739260 PCI: 00:14.0: enabled 1
1128 12:41:19.742469 USB0 port 0: enabled 1
1129 12:41:19.742600 USB2 port 0: enabled 1
1130 12:41:19.746069 USB2 port 1: enabled 0
1131 12:41:19.749485 USB2 port 2: enabled 1
1132 12:41:19.752550 USB2 port 3: enabled 0
1133 12:41:19.756042 USB2 port 4: enabled 0
1134 12:41:19.759406 USB2 port 5: enabled 1
1135 12:41:19.759533 USB2 port 6: enabled 0
1136 12:41:19.762730 USB2 port 7: enabled 0
1137 12:41:19.765967 USB2 port 8: enabled 1
1138 12:41:19.769499 USB2 port 9: enabled 1
1139 12:41:19.772407 USB3 port 0: enabled 1
1140 12:41:19.772492 USB3 port 1: enabled 0
1141 12:41:19.776044 USB3 port 2: enabled 0
1142 12:41:19.779385 USB3 port 3: enabled 0
1143 12:41:19.782373 PCI: 00:14.1: enabled 0
1144 12:41:19.786075 PCI: 00:14.2: enabled 1
1145 12:41:19.789323 PCI: 00:14.3: enabled 1
1146 12:41:19.789407 GENERIC: 0.0: enabled 1
1147 12:41:19.792299 PCI: 00:15.0: enabled 1
1148 12:41:19.795722 I2C: 00:1a: enabled 1
1149 12:41:19.799316 I2C: 00:31: enabled 1
1150 12:41:19.799401 I2C: 00:32: enabled 1
1151 12:41:19.802312 PCI: 00:15.1: enabled 1
1152 12:41:19.805795 I2C: 00:50: enabled 1
1153 12:41:19.809316 PCI: 00:15.2: enabled 0
1154 12:41:19.812536 PCI: 00:15.3: enabled 1
1155 12:41:19.812633 I2C: 00:10: enabled 1
1156 12:41:19.815933 PCI: 00:16.0: enabled 1
1157 12:41:19.819028 PCI: 00:16.1: enabled 0
1158 12:41:19.822401 PCI: 00:16.2: enabled 0
1159 12:41:19.822484 PCI: 00:16.3: enabled 0
1160 12:41:19.825621 PCI: 00:16.4: enabled 0
1161 12:41:19.829105 PCI: 00:16.5: enabled 0
1162 12:41:19.832517 PCI: 00:17.0: enabled 1
1163 12:41:19.835911 PCI: 00:19.0: enabled 0
1164 12:41:19.835994 PCI: 00:19.1: enabled 1
1165 12:41:19.839029 I2C: 00:15: enabled 1
1166 12:41:19.842780 I2C: 00:2c: enabled 1
1167 12:41:19.846092 PCI: 00:19.2: enabled 0
1168 12:41:19.849050 PCI: 00:1a.0: enabled 0
1169 12:41:19.849133 PCI: 00:1e.0: enabled 1
1170 12:41:19.852661 PCI: 00:1e.1: enabled 0
1171 12:41:19.855701 PCI: 00:1e.2: enabled 0
1172 12:41:19.859249 PCI: 00:1e.3: enabled 1
1173 12:41:19.859331 SPI: 00: enabled 1
1174 12:41:19.862513 PCI: 00:1f.0: enabled 1
1175 12:41:19.866326 PNP: 0c09.0: enabled 1
1176 12:41:19.869386 PCI: 00:1f.1: enabled 0
1177 12:41:19.872292 PCI: 00:1f.2: enabled 1
1178 12:41:19.872376 GENERIC: 0.0: enabled 1
1179 12:41:19.875643 GENERIC: 0.0: enabled 1
1180 12:41:19.879074 GENERIC: 1.0: enabled 1
1181 12:41:19.882246 PCI: 00:1f.3: enabled 1
1182 12:41:19.885604 PCI: 00:1f.4: enabled 0
1183 12:41:19.885687 PCI: 00:1f.5: enabled 1
1184 12:41:19.889128 PCI: 00:1f.6: enabled 0
1185 12:41:19.892538 PCI: 00:1f.7: enabled 0
1186 12:41:19.895550 Root Device scanning...
1187 12:41:19.899059 scan_static_bus for Root Device
1188 12:41:19.899144 CPU_CLUSTER: 0 enabled
1189 12:41:19.902680 DOMAIN: 0000 enabled
1190 12:41:19.905681 DOMAIN: 0000 scanning...
1191 12:41:19.909194 PCI: pci_scan_bus for bus 00
1192 12:41:19.912237 PCI: 00:00.0 [8086/0000] ops
1193 12:41:19.915505 PCI: 00:00.0 [8086/4609] enabled
1194 12:41:19.918877 PCI: 00:02.0 [8086/0000] bus ops
1195 12:41:19.922450 PCI: 00:02.0 [8086/46b3] enabled
1196 12:41:19.925313 PCI: 00:04.0 [8086/0000] bus ops
1197 12:41:19.928829 PCI: 00:04.0 [8086/461d] enabled
1198 12:41:19.932260 PCI: 00:06.0 [8086/0000] bus ops
1199 12:41:19.935660 PCI: 00:06.0 [8086/464d] enabled
1200 12:41:19.938998 PCI: 00:08.0 [8086/464f] disabled
1201 12:41:19.942038 PCI: 00:0a.0 [8086/467d] enabled
1202 12:41:19.945560 PCI: 00:0d.0 [8086/0000] bus ops
1203 12:41:19.948631 PCI: 00:0d.0 [8086/461e] enabled
1204 12:41:19.952443 PCI: 00:14.0 [8086/0000] bus ops
1205 12:41:19.955305 PCI: 00:14.0 [8086/51ed] enabled
1206 12:41:19.958927 PCI: 00:14.2 [8086/51ef] enabled
1207 12:41:19.962443 PCI: 00:14.3 [8086/0000] bus ops
1208 12:41:19.965448 PCI: 00:14.3 [8086/51f0] enabled
1209 12:41:19.968737 PCI: 00:15.0 [8086/0000] bus ops
1210 12:41:19.972157 PCI: 00:15.0 [8086/51e8] enabled
1211 12:41:19.975561 PCI: 00:15.1 [8086/0000] bus ops
1212 12:41:19.978873 PCI: 00:15.1 [8086/51e9] enabled
1213 12:41:19.982375 PCI: 00:15.2 [8086/0000] bus ops
1214 12:41:19.985424 PCI: 00:15.2 [8086/51ea] disabled
1215 12:41:19.988807 PCI: 00:15.3 [8086/0000] bus ops
1216 12:41:19.992040 PCI: 00:15.3 [8086/51eb] enabled
1217 12:41:19.995256 PCI: 00:16.0 [8086/0000] ops
1218 12:41:19.998946 PCI: 00:16.0 [8086/51e0] enabled
1219 12:41:20.005382 PCI: Static device PCI: 00:17.0 not found, disabling it.
1220 12:41:20.008808 PCI: 00:19.0 [8086/0000] bus ops
1221 12:41:20.012330 PCI: 00:19.0 [8086/51c5] disabled
1222 12:41:20.015457 PCI: 00:19.1 [8086/0000] bus ops
1223 12:41:20.018989 PCI: 00:19.1 [8086/51c6] enabled
1224 12:41:20.021826 PCI: 00:1e.0 [8086/0000] ops
1225 12:41:20.025266 PCI: 00:1e.0 [8086/51a8] enabled
1226 12:41:20.028852 PCI: 00:1e.3 [8086/0000] bus ops
1227 12:41:20.032431 PCI: 00:1e.3 [8086/51ab] enabled
1228 12:41:20.035461 PCI: 00:1f.0 [8086/0000] bus ops
1229 12:41:20.038870 PCI: 00:1f.0 [8086/5182] enabled
1230 12:41:20.038954 RTC Init
1231 12:41:20.042244 Set power on after power failure.
1232 12:41:20.045545 Disabling Deep S3
1233 12:41:20.048821 Disabling Deep S3
1234 12:41:20.048905 Disabling Deep S4
1235 12:41:20.052118 Disabling Deep S4
1236 12:41:20.052226 Disabling Deep S5
1237 12:41:20.055571 Disabling Deep S5
1238 12:41:20.058517 PCI: 00:1f.2 [0000/0000] hidden
1239 12:41:20.062403 PCI: 00:1f.3 [8086/0000] bus ops
1240 12:41:20.065772 PCI: 00:1f.3 [8086/51c8] enabled
1241 12:41:20.068694 PCI: 00:1f.5 [8086/0000] bus ops
1242 12:41:20.072290 PCI: 00:1f.5 [8086/51a4] enabled
1243 12:41:20.072375 GPIO: 0 enabled
1244 12:41:20.075315 PCI: Leftover static devices:
1245 12:41:20.078584 PCI: 00:01.0
1246 12:41:20.078668 PCI: 00:01.1
1247 12:41:20.078751 PCI: 00:05.0
1248 12:41:20.082161 PCI: 00:06.2
1249 12:41:20.082269 PCI: 00:09.0
1250 12:41:20.085455 PCI: 00:0d.1
1251 12:41:20.085538 PCI: 00:0d.2
1252 12:41:20.085639 PCI: 00:0d.3
1253 12:41:20.089076 PCI: 00:0e.0
1254 12:41:20.089160 PCI: 00:10.0
1255 12:41:20.091754 PCI: 00:10.1
1256 12:41:20.091856 PCI: 00:10.6
1257 12:41:20.095281 PCI: 00:10.7
1258 12:41:20.095365 PCI: 00:12.0
1259 12:41:20.095448 PCI: 00:12.6
1260 12:41:20.098848 PCI: 00:12.7
1261 12:41:20.098932 PCI: 00:13.0
1262 12:41:20.101771 PCI: 00:14.1
1263 12:41:20.101878 PCI: 00:16.1
1264 12:41:20.102013 PCI: 00:16.2
1265 12:41:20.105573 PCI: 00:16.3
1266 12:41:20.105657 PCI: 00:16.4
1267 12:41:20.108877 PCI: 00:16.5
1268 12:41:20.108962 PCI: 00:17.0
1269 12:41:20.109045 PCI: 00:19.2
1270 12:41:20.112023 PCI: 00:1a.0
1271 12:41:20.112107 PCI: 00:1e.1
1272 12:41:20.115350 PCI: 00:1e.2
1273 12:41:20.115437 PCI: 00:1f.1
1274 12:41:20.118914 PCI: 00:1f.4
1275 12:41:20.119001 PCI: 00:1f.6
1276 12:41:20.119074 PCI: 00:1f.7
1277 12:41:20.121816 PCI: Check your devicetree.cb.
1278 12:41:20.125260 PCI: 00:02.0 scanning...
1279 12:41:20.128492 scan_generic_bus for PCI: 00:02.0
1280 12:41:20.132064 scan_generic_bus for PCI: 00:02.0 done
1281 12:41:20.138719 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1282 12:41:20.138806 PCI: 00:04.0 scanning...
1283 12:41:20.141933 scan_generic_bus for PCI: 00:04.0
1284 12:41:20.145060 GENERIC: 0.0 enabled
1285 12:41:20.151883 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1286 12:41:20.155503 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1287 12:41:20.158701 PCI: 00:06.0 scanning...
1288 12:41:20.161876 do_pci_scan_bridge for PCI: 00:06.0
1289 12:41:20.165442 PCI: pci_scan_bus for bus 01
1290 12:41:20.168541 PCI: 01:00.0 [15b7/5009] enabled
1291 12:41:20.171985 Enabling Common Clock Configuration
1292 12:41:20.175506 L1 Sub-State supported from root port 6
1293 12:41:20.178721 L1 Sub-State Support = 0x5
1294 12:41:20.182154 CommonModeRestoreTime = 0x6e
1295 12:41:20.185381 Power On Value = 0x5, Power On Scale = 0x2
1296 12:41:20.188408 ASPM: Enabled L1
1297 12:41:20.191850 PCIe: Max_Payload_Size adjusted to 256
1298 12:41:20.195384 PCI: 01:00.0: Enabled LTR
1299 12:41:20.198386 PCI: 01:00.0: Programmed LTR max latencies
1300 12:41:20.205475 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1301 12:41:20.205556 PCI: 00:0d.0 scanning...
1302 12:41:20.208457 scan_static_bus for PCI: 00:0d.0
1303 12:41:20.211909 USB0 port 0 enabled
1304 12:41:20.215397 USB0 port 0 scanning...
1305 12:41:20.218502 scan_static_bus for USB0 port 0
1306 12:41:20.218579 USB3 port 0 enabled
1307 12:41:20.221949 USB3 port 1 disabled
1308 12:41:20.225329 USB3 port 2 enabled
1309 12:41:20.225402 USB3 port 3 disabled
1310 12:41:20.228369 USB3 port 0 scanning...
1311 12:41:20.231708 scan_static_bus for USB3 port 0
1312 12:41:20.235162 scan_static_bus for USB3 port 0 done
1313 12:41:20.238904 scan_bus: bus USB3 port 0 finished in 6 msecs
1314 12:41:20.241739 USB3 port 2 scanning...
1315 12:41:20.245246 scan_static_bus for USB3 port 2
1316 12:41:20.248696 scan_static_bus for USB3 port 2 done
1317 12:41:20.255010 scan_bus: bus USB3 port 2 finished in 6 msecs
1318 12:41:20.258352 scan_static_bus for USB0 port 0 done
1319 12:41:20.261600 scan_bus: bus USB0 port 0 finished in 43 msecs
1320 12:41:20.265301 scan_static_bus for PCI: 00:0d.0 done
1321 12:41:20.271823 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1322 12:41:20.271908 PCI: 00:14.0 scanning...
1323 12:41:20.274964 scan_static_bus for PCI: 00:14.0
1324 12:41:20.278630 USB0 port 0 enabled
1325 12:41:20.281589 USB0 port 0 scanning...
1326 12:41:20.284882 scan_static_bus for USB0 port 0
1327 12:41:20.284965 USB2 port 0 enabled
1328 12:41:20.288323 USB2 port 1 disabled
1329 12:41:20.291538 USB2 port 2 enabled
1330 12:41:20.291621 USB2 port 3 disabled
1331 12:41:20.294884 USB2 port 4 disabled
1332 12:41:20.298275 USB2 port 5 enabled
1333 12:41:20.298384 USB2 port 6 disabled
1334 12:41:20.301927 USB2 port 7 disabled
1335 12:41:20.304974 USB2 port 8 enabled
1336 12:41:20.305057 USB2 port 9 enabled
1337 12:41:20.308521 USB3 port 0 enabled
1338 12:41:20.308603 USB3 port 1 disabled
1339 12:41:20.311506 USB3 port 2 disabled
1340 12:41:20.314935 USB3 port 3 disabled
1341 12:41:20.315018 USB2 port 0 scanning...
1342 12:41:20.318442 scan_static_bus for USB2 port 0
1343 12:41:20.321950 scan_static_bus for USB2 port 0 done
1344 12:41:20.328311 scan_bus: bus USB2 port 0 finished in 6 msecs
1345 12:41:20.331912 USB2 port 2 scanning...
1346 12:41:20.335236 scan_static_bus for USB2 port 2
1347 12:41:20.338428 scan_static_bus for USB2 port 2 done
1348 12:41:20.341954 scan_bus: bus USB2 port 2 finished in 6 msecs
1349 12:41:20.345007 USB2 port 5 scanning...
1350 12:41:20.348647 scan_static_bus for USB2 port 5
1351 12:41:20.352111 scan_static_bus for USB2 port 5 done
1352 12:41:20.355141 scan_bus: bus USB2 port 5 finished in 6 msecs
1353 12:41:20.358867 USB2 port 8 scanning...
1354 12:41:20.361722 scan_static_bus for USB2 port 8
1355 12:41:20.365249 scan_static_bus for USB2 port 8 done
1356 12:41:20.368794 scan_bus: bus USB2 port 8 finished in 6 msecs
1357 12:41:20.371816 USB2 port 9 scanning...
1358 12:41:20.375128 scan_static_bus for USB2 port 9
1359 12:41:20.378593 scan_static_bus for USB2 port 9 done
1360 12:41:20.385403 scan_bus: bus USB2 port 9 finished in 6 msecs
1361 12:41:20.385487 USB3 port 0 scanning...
1362 12:41:20.388497 scan_static_bus for USB3 port 0
1363 12:41:20.392042 scan_static_bus for USB3 port 0 done
1364 12:41:20.398710 scan_bus: bus USB3 port 0 finished in 6 msecs
1365 12:41:20.402080 scan_static_bus for USB0 port 0 done
1366 12:41:20.404950 scan_bus: bus USB0 port 0 finished in 120 msecs
1367 12:41:20.408441 scan_static_bus for PCI: 00:14.0 done
1368 12:41:20.415288 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1369 12:41:20.418718 PCI: 00:14.3 scanning...
1370 12:41:20.421811 scan_static_bus for PCI: 00:14.3
1371 12:41:20.421895 GENERIC: 0.0 enabled
1372 12:41:20.424977 scan_static_bus for PCI: 00:14.3 done
1373 12:41:20.432134 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1374 12:41:20.435089 PCI: 00:15.0 scanning...
1375 12:41:20.438504 scan_static_bus for PCI: 00:15.0
1376 12:41:20.438587 I2C: 00:1a enabled
1377 12:41:20.441928 I2C: 00:31 enabled
1378 12:41:20.442050 I2C: 00:32 enabled
1379 12:41:20.448263 scan_static_bus for PCI: 00:15.0 done
1380 12:41:20.452040 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1381 12:41:20.455397 PCI: 00:15.1 scanning...
1382 12:41:20.458314 scan_static_bus for PCI: 00:15.1
1383 12:41:20.458397 I2C: 00:50 enabled
1384 12:41:20.461692 scan_static_bus for PCI: 00:15.1 done
1385 12:41:20.468655 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1386 12:41:20.471623 PCI: 00:15.3 scanning...
1387 12:41:20.475041 scan_static_bus for PCI: 00:15.3
1388 12:41:20.475118 I2C: 00:10 enabled
1389 12:41:20.478173 scan_static_bus for PCI: 00:15.3 done
1390 12:41:20.485251 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1391 12:41:20.488571 PCI: 00:19.1 scanning...
1392 12:41:20.491658 scan_static_bus for PCI: 00:19.1
1393 12:41:20.491732 I2C: 00:15 enabled
1394 12:41:20.495067 I2C: 00:2c enabled
1395 12:41:20.498355 scan_static_bus for PCI: 00:19.1 done
1396 12:41:20.501590 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1397 12:41:20.504948 PCI: 00:1e.3 scanning...
1398 12:41:20.508494 scan_generic_bus for PCI: 00:1e.3
1399 12:41:20.511508 SPI: 00 enabled
1400 12:41:20.515047 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1401 12:41:20.521523 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1402 12:41:20.525072 PCI: 00:1f.0 scanning...
1403 12:41:20.528071 scan_static_bus for PCI: 00:1f.0
1404 12:41:20.528175 PNP: 0c09.0 enabled
1405 12:41:20.531502 PNP: 0c09.0 scanning...
1406 12:41:20.535046 scan_static_bus for PNP: 0c09.0
1407 12:41:20.538086 scan_static_bus for PNP: 0c09.0 done
1408 12:41:20.541623 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1409 12:41:20.548322 scan_static_bus for PCI: 00:1f.0 done
1410 12:41:20.551332 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1411 12:41:20.554908 PCI: 00:1f.2 scanning...
1412 12:41:20.558368 scan_static_bus for PCI: 00:1f.2
1413 12:41:20.558477 GENERIC: 0.0 enabled
1414 12:41:20.561389 GENERIC: 0.0 scanning...
1415 12:41:20.564880 scan_static_bus for GENERIC: 0.0
1416 12:41:20.568707 GENERIC: 0.0 enabled
1417 12:41:20.568811 GENERIC: 1.0 enabled
1418 12:41:20.575016 scan_static_bus for GENERIC: 0.0 done
1419 12:41:20.578027 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1420 12:41:20.581486 scan_static_bus for PCI: 00:1f.2 done
1421 12:41:20.588258 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1422 12:41:20.588382 PCI: 00:1f.3 scanning...
1423 12:41:20.591313 scan_static_bus for PCI: 00:1f.3
1424 12:41:20.598200 scan_static_bus for PCI: 00:1f.3 done
1425 12:41:20.601308 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1426 12:41:20.604864 PCI: 00:1f.5 scanning...
1427 12:41:20.608327 scan_generic_bus for PCI: 00:1f.5
1428 12:41:20.611719 scan_generic_bus for PCI: 00:1f.5 done
1429 12:41:20.615059 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1430 12:41:20.621478 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1431 12:41:20.625010 scan_static_bus for Root Device done
1432 12:41:20.627913 scan_bus: bus Root Device finished in 729 msecs
1433 12:41:20.628007 done
1434 12:41:20.634986 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1435 12:41:20.641473 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1436 12:41:20.648094 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1437 12:41:20.651666 SPI flash protection: WPSW=1 SRP0=0
1438 12:41:20.655008 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1439 12:41:20.661430 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1440 12:41:20.665009 found VGA at PCI: 00:02.0
1441 12:41:20.668061 Setting up VGA for PCI: 00:02.0
1442 12:41:20.674650 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1443 12:41:20.678512 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1444 12:41:20.681492 Allocating resources...
1445 12:41:20.681591 Reading resources...
1446 12:41:20.688087 Root Device read_resources bus 0 link: 0
1447 12:41:20.691341 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1448 12:41:20.694796 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1449 12:41:20.701325 DOMAIN: 0000 read_resources bus 0 link: 0
1450 12:41:20.708122 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1451 12:41:20.711796 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1452 12:41:20.717931 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1453 12:41:20.724620 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1454 12:41:20.731580 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1455 12:41:20.738051 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1456 12:41:20.745038 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1457 12:41:20.751298 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1458 12:41:20.757873 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1459 12:41:20.764868 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1460 12:41:20.771283 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1461 12:41:20.777862 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1462 12:41:20.781391 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1463 12:41:20.787849 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1464 12:41:20.794280 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1465 12:41:20.800836 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1466 12:41:20.807701 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1467 12:41:20.814088 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1468 12:41:20.821366 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1469 12:41:20.827683 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1470 12:41:20.830866 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1471 12:41:20.837397 PCI: 00:04.0 read_resources bus 1 link: 0
1472 12:41:20.840864 PCI: 00:04.0 read_resources bus 1 link: 0 done
1473 12:41:20.844304 PCI: 00:06.0 read_resources bus 1 link: 0
1474 12:41:20.850860 PCI: 00:06.0 read_resources bus 1 link: 0 done
1475 12:41:20.854423 PCI: 00:0d.0 read_resources bus 0 link: 0
1476 12:41:20.857790 USB0 port 0 read_resources bus 0 link: 0
1477 12:41:20.864024 USB0 port 0 read_resources bus 0 link: 0 done
1478 12:41:20.867498 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1479 12:41:20.873910 PCI: 00:14.0 read_resources bus 0 link: 0
1480 12:41:20.877299 USB0 port 0 read_resources bus 0 link: 0
1481 12:41:20.880714 USB0 port 0 read_resources bus 0 link: 0 done
1482 12:41:20.887725 PCI: 00:14.0 read_resources bus 0 link: 0 done
1483 12:41:20.890743 PCI: 00:14.3 read_resources bus 0 link: 0
1484 12:41:20.894250 PCI: 00:14.3 read_resources bus 0 link: 0 done
1485 12:41:20.900740 PCI: 00:15.0 read_resources bus 0 link: 0
1486 12:41:20.904522 PCI: 00:15.0 read_resources bus 0 link: 0 done
1487 12:41:20.907525 PCI: 00:15.1 read_resources bus 0 link: 0
1488 12:41:20.913957 PCI: 00:15.1 read_resources bus 0 link: 0 done
1489 12:41:20.917191 PCI: 00:15.3 read_resources bus 0 link: 0
1490 12:41:20.920880 PCI: 00:15.3 read_resources bus 0 link: 0 done
1491 12:41:20.927500 PCI: 00:19.1 read_resources bus 0 link: 0
1492 12:41:20.930530 PCI: 00:19.1 read_resources bus 0 link: 0 done
1493 12:41:20.934121 PCI: 00:1e.3 read_resources bus 2 link: 0
1494 12:41:20.940677 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1495 12:41:20.944265 PCI: 00:1f.0 read_resources bus 0 link: 0
1496 12:41:20.950858 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1497 12:41:20.953823 PCI: 00:1f.2 read_resources bus 0 link: 0
1498 12:41:20.957382 GENERIC: 0.0 read_resources bus 0 link: 0
1499 12:41:20.960940 GENERIC: 0.0 read_resources bus 0 link: 0 done
1500 12:41:20.967483 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1501 12:41:20.970501 DOMAIN: 0000 read_resources bus 0 link: 0 done
1502 12:41:20.977424 Root Device read_resources bus 0 link: 0 done
1503 12:41:20.980650 Done reading resources.
1504 12:41:20.983903 Show resources in subtree (Root Device)...After reading.
1505 12:41:20.990804 Root Device child on link 0 CPU_CLUSTER: 0
1506 12:41:20.994230 CPU_CLUSTER: 0 child on link 0 APIC: 00
1507 12:41:20.994314 APIC: 00
1508 12:41:20.997242 APIC: 14
1509 12:41:20.997326 APIC: 16
1510 12:41:20.997391 APIC: 10
1511 12:41:21.000759 APIC: 12
1512 12:41:21.000841 APIC: 01
1513 12:41:21.000905 APIC: 09
1514 12:41:21.004192 APIC: 08
1515 12:41:21.007221 DOMAIN: 0000 child on link 0 GPIO: 0
1516 12:41:21.017211 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1517 12:41:21.027372 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1518 12:41:21.027460 GPIO: 0
1519 12:41:21.030883 PCI: 00:00.0
1520 12:41:21.040960 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1521 12:41:21.047028 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1522 12:41:21.057073 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1523 12:41:21.066903 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1524 12:41:21.077007 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1525 12:41:21.086990 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1526 12:41:21.093571 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1527 12:41:21.103944 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1528 12:41:21.113901 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1529 12:41:21.124021 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1530 12:41:21.133896 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1531 12:41:21.143558 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1532 12:41:21.153335 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1533 12:41:21.160306 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1534 12:41:21.170225 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1535 12:41:21.180017 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1536 12:41:21.190017 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1537 12:41:21.200075 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1538 12:41:21.209891 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1539 12:41:21.220468 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1540 12:41:21.230262 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1541 12:41:21.236784 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1542 12:41:21.246795 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1543 12:41:21.256677 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1544 12:41:21.266933 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1545 12:41:21.276742 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1546 12:41:21.286950 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1547 12:41:21.293480 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1548 12:41:21.296383 PCI: 00:02.0
1549 12:41:21.306667 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1550 12:41:21.316697 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1551 12:41:21.326593 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1552 12:41:21.329654 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1553 12:41:21.339936 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1554 12:41:21.342945 GENERIC: 0.0
1555 12:41:21.346341 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1556 12:41:21.356491 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1557 12:41:21.366522 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1558 12:41:21.373312 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1559 12:41:21.376095 PCI: 01:00.0
1560 12:41:21.386166 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1561 12:41:21.396167 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1562 12:41:21.396251 PCI: 00:08.0
1563 12:41:21.399573 PCI: 00:0a.0
1564 12:41:21.409730 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1565 12:41:21.412865 PCI: 00:0d.0 child on link 0 USB0 port 0
1566 12:41:21.422846 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1567 12:41:21.426307 USB0 port 0 child on link 0 USB3 port 0
1568 12:41:21.429901 USB3 port 0
1569 12:41:21.432836 USB3 port 1
1570 12:41:21.432920 USB3 port 2
1571 12:41:21.436214 USB3 port 3
1572 12:41:21.439639 PCI: 00:14.0 child on link 0 USB0 port 0
1573 12:41:21.449513 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1574 12:41:21.452866 USB0 port 0 child on link 0 USB2 port 0
1575 12:41:21.456258 USB2 port 0
1576 12:41:21.456341 USB2 port 1
1577 12:41:21.459705 USB2 port 2
1578 12:41:21.459788 USB2 port 3
1579 12:41:21.463157 USB2 port 4
1580 12:41:21.463240 USB2 port 5
1581 12:41:21.466377 USB2 port 6
1582 12:41:21.466461 USB2 port 7
1583 12:41:21.469581 USB2 port 8
1584 12:41:21.473132 USB2 port 9
1585 12:41:21.473214 USB3 port 0
1586 12:41:21.476238 USB3 port 1
1587 12:41:21.476349 USB3 port 2
1588 12:41:21.479545 USB3 port 3
1589 12:41:21.479629 PCI: 00:14.2
1590 12:41:21.489451 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1591 12:41:21.499603 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1592 12:41:21.503009 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1593 12:41:21.512819 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1594 12:41:21.516342 GENERIC: 0.0
1595 12:41:21.519416 PCI: 00:15.0 child on link 0 I2C: 00:1a
1596 12:41:21.529534 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1597 12:41:21.533023 I2C: 00:1a
1598 12:41:21.533106 I2C: 00:31
1599 12:41:21.536036 I2C: 00:32
1600 12:41:21.539407 PCI: 00:15.1 child on link 0 I2C: 00:50
1601 12:41:21.549319 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1602 12:41:21.549397 I2C: 00:50
1603 12:41:21.552837 PCI: 00:15.2
1604 12:41:21.555932 PCI: 00:15.3 child on link 0 I2C: 00:10
1605 12:41:21.566038 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1606 12:41:21.569369 I2C: 00:10
1607 12:41:21.569446 PCI: 00:16.0
1608 12:41:21.579086 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1609 12:41:21.582578 PCI: 00:19.0
1610 12:41:21.586162 PCI: 00:19.1 child on link 0 I2C: 00:15
1611 12:41:21.595833 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1612 12:41:21.599357 I2C: 00:15
1613 12:41:21.599434 I2C: 00:2c
1614 12:41:21.599497 PCI: 00:1e.0
1615 12:41:21.612387 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1616 12:41:21.615746 PCI: 00:1e.3 child on link 0 SPI: 00
1617 12:41:21.625744 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1618 12:41:21.625824 SPI: 00
1619 12:41:21.632643 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1620 12:41:21.639250 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1621 12:41:21.642584 PNP: 0c09.0
1622 12:41:21.648873 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1623 12:41:21.655789 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1624 12:41:21.665654 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1625 12:41:21.672683 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1626 12:41:21.679067 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1627 12:41:21.679152 GENERIC: 0.0
1628 12:41:21.682319 GENERIC: 1.0
1629 12:41:21.682402 PCI: 00:1f.3
1630 12:41:21.692852 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1631 12:41:21.702181 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1632 12:41:21.705743 PCI: 00:1f.5
1633 12:41:21.715871 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1634 12:41:21.722358 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1635 12:41:21.729199 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1636 12:41:21.735646 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1637 12:41:21.739042 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1638 12:41:21.745474 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1639 12:41:21.748823 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1640 12:41:21.755604 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1641 12:41:21.762475 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1642 12:41:21.769469 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1643 12:41:21.779333 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1644 12:41:21.785780 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1645 12:41:21.792088 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1646 12:41:21.798997 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1647 12:41:21.805734 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1648 12:41:21.808976 DOMAIN: 0000: Resource ranges:
1649 12:41:21.812534 * Base: 1000, Size: 800, Tag: 100
1650 12:41:21.815822 * Base: 1900, Size: e700, Tag: 100
1651 12:41:21.822147 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1652 12:41:21.829034 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1653 12:41:21.835467 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1654 12:41:21.842340 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1655 12:41:21.852361 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1656 12:41:21.858716 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1657 12:41:21.865650 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1658 12:41:21.875575 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1659 12:41:21.882007 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1660 12:41:21.888526 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1661 12:41:21.898540 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1662 12:41:21.905331 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1663 12:41:21.912026 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1664 12:41:21.922259 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1665 12:41:21.928457 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1666 12:41:21.935800 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1667 12:41:21.945299 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1668 12:41:21.951912 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1669 12:41:21.958709 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1670 12:41:21.965724 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1671 12:41:21.975506 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1672 12:41:21.981912 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1673 12:41:21.988834 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1674 12:41:21.998964 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1675 12:41:22.005434 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1676 12:41:22.011871 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1677 12:41:22.021637 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1678 12:41:22.028446 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1679 12:41:22.034793 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1680 12:41:22.044746 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1681 12:41:22.051751 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1682 12:41:22.058366 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1683 12:41:22.068340 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1684 12:41:22.071328 DOMAIN: 0000: Resource ranges:
1685 12:41:22.074889 * Base: 80400000, Size: 3fc00000, Tag: 200
1686 12:41:22.078350 * Base: d0000000, Size: 28000000, Tag: 200
1687 12:41:22.084836 * Base: fa000000, Size: 1000000, Tag: 200
1688 12:41:22.087888 * Base: fb001000, Size: 17ff000, Tag: 200
1689 12:41:22.091553 * Base: fe800000, Size: 300000, Tag: 200
1690 12:41:22.094876 * Base: feb80000, Size: 80000, Tag: 200
1691 12:41:22.101381 * Base: fed00000, Size: 40000, Tag: 200
1692 12:41:22.105027 * Base: fed70000, Size: 10000, Tag: 200
1693 12:41:22.107964 * Base: fed88000, Size: 8000, Tag: 200
1694 12:41:22.111435 * Base: fed93000, Size: d000, Tag: 200
1695 12:41:22.118040 * Base: feda2000, Size: 1e000, Tag: 200
1696 12:41:22.121546 * Base: fede0000, Size: 1220000, Tag: 200
1697 12:41:22.124753 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1698 12:41:22.131472 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1699 12:41:22.137728 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1700 12:41:22.144466 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1701 12:41:22.151354 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1702 12:41:22.157872 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1703 12:41:22.164856 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1704 12:41:22.171320 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1705 12:41:22.177665 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1706 12:41:22.184537 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1707 12:41:22.190969 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1708 12:41:22.197951 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1709 12:41:22.204429 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1710 12:41:22.210967 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1711 12:41:22.217378 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1712 12:41:22.224407 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1713 12:41:22.231094 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1714 12:41:22.237866 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1715 12:41:22.244093 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1716 12:41:22.250827 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1717 12:41:22.260975 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1718 12:41:22.267392 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1719 12:41:22.270816 PCI: 00:06.0: Resource ranges:
1720 12:41:22.274236 * Base: 80400000, Size: 100000, Tag: 200
1721 12:41:22.281250 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1722 12:41:22.287638 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1723 12:41:22.297423 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1724 12:41:22.303910 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1725 12:41:22.307540 Root Device assign_resources, bus 0 link: 0
1726 12:41:22.314010 DOMAIN: 0000 assign_resources, bus 0 link: 0
1727 12:41:22.320433 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1728 12:41:22.330492 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1729 12:41:22.337322 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1730 12:41:22.344281 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1731 12:41:22.350937 PCI: 00:04.0 assign_resources, bus 1 link: 0
1732 12:41:22.354059 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1733 12:41:22.364018 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1734 12:41:22.373825 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1735 12:41:22.380592 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1736 12:41:22.387003 PCI: 00:06.0 assign_resources, bus 1 link: 0
1737 12:41:22.393825 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1738 12:41:22.400130 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1739 12:41:22.407008 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1740 12:41:22.413526 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1741 12:41:22.423476 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1742 12:41:22.426816 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1743 12:41:22.433427 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1744 12:41:22.440307 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1745 12:41:22.443659 PCI: 00:14.0 assign_resources, bus 0 link: 0
1746 12:41:22.449902 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1747 12:41:22.456894 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1748 12:41:22.466747 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1749 12:41:22.473179 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1750 12:41:22.476636 PCI: 00:14.3 assign_resources, bus 0 link: 0
1751 12:41:22.483137 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1752 12:41:22.490071 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1753 12:41:22.496366 PCI: 00:15.0 assign_resources, bus 0 link: 0
1754 12:41:22.499683 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1755 12:41:22.510071 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1756 12:41:22.513224 PCI: 00:15.1 assign_resources, bus 0 link: 0
1757 12:41:22.519807 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1758 12:41:22.526347 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1759 12:41:22.529794 PCI: 00:15.3 assign_resources, bus 0 link: 0
1760 12:41:22.536326 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1761 12:41:22.543263 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1762 12:41:22.552995 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1763 12:41:22.556147 PCI: 00:19.1 assign_resources, bus 0 link: 0
1764 12:41:22.559508 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1765 12:41:22.569379 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1766 12:41:22.573107 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1767 12:41:22.579410 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1768 12:41:22.582873 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1769 12:41:22.589403 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1770 12:41:22.592966 LPC: Trying to open IO window from 800 size 1ff
1771 12:41:22.599224 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1772 12:41:22.609527 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1773 12:41:22.615875 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1774 12:41:22.622856 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1775 12:41:22.625786 Root Device assign_resources, bus 0 link: 0 done
1776 12:41:22.629388 Done setting resources.
1777 12:41:22.636054 Show resources in subtree (Root Device)...After assigning values.
1778 12:41:22.639747 Root Device child on link 0 CPU_CLUSTER: 0
1779 12:41:22.642860 CPU_CLUSTER: 0 child on link 0 APIC: 00
1780 12:41:22.645848 APIC: 00
1781 12:41:22.645956 APIC: 14
1782 12:41:22.649340 APIC: 16
1783 12:41:22.649423 APIC: 10
1784 12:41:22.649489 APIC: 12
1785 12:41:22.652444 APIC: 01
1786 12:41:22.652528 APIC: 09
1787 12:41:22.655926 APIC: 08
1788 12:41:22.659218 DOMAIN: 0000 child on link 0 GPIO: 0
1789 12:41:22.669552 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1790 12:41:22.675737 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1791 12:41:22.679319 GPIO: 0
1792 12:41:22.679410 PCI: 00:00.0
1793 12:41:22.689369 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1794 12:41:22.699366 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1795 12:41:22.709244 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1796 12:41:22.718994 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1797 12:41:22.725866 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1798 12:41:22.735871 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1799 12:41:22.745724 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1800 12:41:22.755581 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1801 12:41:22.765739 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1802 12:41:22.775328 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1803 12:41:22.785919 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1804 12:41:22.791903 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1805 12:41:22.802020 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1806 12:41:22.811753 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1807 12:41:22.821925 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1808 12:41:22.831725 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1809 12:41:22.841992 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1810 12:41:22.851959 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1811 12:41:22.861690 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1812 12:41:22.868337 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1813 12:41:22.878273 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1814 12:41:22.888411 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1815 12:41:22.898287 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1816 12:41:22.908305 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1817 12:41:22.918178 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1818 12:41:22.927939 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1819 12:41:22.934800 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1820 12:41:22.944732 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1821 12:41:22.947944 PCI: 00:02.0
1822 12:41:22.957893 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1823 12:41:22.967706 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1824 12:41:22.977633 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1825 12:41:22.981044 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1826 12:41:22.994361 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1827 12:41:22.994445 GENERIC: 0.0
1828 12:41:22.997814 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1829 12:41:23.007570 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1830 12:41:23.020778 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1831 12:41:23.030659 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1832 12:41:23.030749 PCI: 01:00.0
1833 12:41:23.043920 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1834 12:41:23.053916 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1835 12:41:23.054091 PCI: 00:08.0
1836 12:41:23.057444 PCI: 00:0a.0
1837 12:41:23.067573 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1838 12:41:23.070794 PCI: 00:0d.0 child on link 0 USB0 port 0
1839 12:41:23.080182 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1840 12:41:23.087121 USB0 port 0 child on link 0 USB3 port 0
1841 12:41:23.087214 USB3 port 0
1842 12:41:23.090677 USB3 port 1
1843 12:41:23.090761 USB3 port 2
1844 12:41:23.093850 USB3 port 3
1845 12:41:23.097209 PCI: 00:14.0 child on link 0 USB0 port 0
1846 12:41:23.106946 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1847 12:41:23.113441 USB0 port 0 child on link 0 USB2 port 0
1848 12:41:23.113521 USB2 port 0
1849 12:41:23.116877 USB2 port 1
1850 12:41:23.116988 USB2 port 2
1851 12:41:23.120465 USB2 port 3
1852 12:41:23.120548 USB2 port 4
1853 12:41:23.123632 USB2 port 5
1854 12:41:23.123741 USB2 port 6
1855 12:41:23.126872 USB2 port 7
1856 12:41:23.126963 USB2 port 8
1857 12:41:23.130337 USB2 port 9
1858 12:41:23.130420 USB3 port 0
1859 12:41:23.133619 USB3 port 1
1860 12:41:23.133703 USB3 port 2
1861 12:41:23.137176 USB3 port 3
1862 12:41:23.140353 PCI: 00:14.2
1863 12:41:23.150119 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1864 12:41:23.160091 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1865 12:41:23.163490 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1866 12:41:23.173556 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1867 12:41:23.176950 GENERIC: 0.0
1868 12:41:23.180495 PCI: 00:15.0 child on link 0 I2C: 00:1a
1869 12:41:23.190311 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1870 12:41:23.193278 I2C: 00:1a
1871 12:41:23.193364 I2C: 00:31
1872 12:41:23.196736 I2C: 00:32
1873 12:41:23.200158 PCI: 00:15.1 child on link 0 I2C: 00:50
1874 12:41:23.210159 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1875 12:41:23.210246 I2C: 00:50
1876 12:41:23.213653 PCI: 00:15.2
1877 12:41:23.216567 PCI: 00:15.3 child on link 0 I2C: 00:10
1878 12:41:23.226899 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1879 12:41:23.229810 I2C: 00:10
1880 12:41:23.229919 PCI: 00:16.0
1881 12:41:23.239826 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1882 12:41:23.243452 PCI: 00:19.0
1883 12:41:23.246596 PCI: 00:19.1 child on link 0 I2C: 00:15
1884 12:41:23.256369 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1885 12:41:23.260033 I2C: 00:15
1886 12:41:23.260118 I2C: 00:2c
1887 12:41:23.262975 PCI: 00:1e.0
1888 12:41:23.272967 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1889 12:41:23.276530 PCI: 00:1e.3 child on link 0 SPI: 00
1890 12:41:23.286323 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1891 12:41:23.289633 SPI: 00
1892 12:41:23.293267 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1893 12:41:23.303086 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1894 12:41:23.303171 PNP: 0c09.0
1895 12:41:23.313261 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1896 12:41:23.316184 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1897 12:41:23.326223 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1898 12:41:23.336192 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1899 12:41:23.339625 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1900 12:41:23.342987 GENERIC: 0.0
1901 12:41:23.343072 GENERIC: 1.0
1902 12:41:23.346149 PCI: 00:1f.3
1903 12:41:23.356386 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1904 12:41:23.366106 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1905 12:41:23.369587 PCI: 00:1f.5
1906 12:41:23.379433 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1907 12:41:23.383111 Done allocating resources.
1908 12:41:23.385858 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1909 12:41:23.393117 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1910 12:41:23.399490 Configure audio over I2S with MAX98373 NAU88L25B.
1911 12:41:23.403096 Enabling BT offload
1912 12:41:23.409946 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1913 12:41:23.413202 Enabling resources...
1914 12:41:23.416818 PCI: 00:00.0 subsystem <- 8086/4609
1915 12:41:23.419809 PCI: 00:00.0 cmd <- 06
1916 12:41:23.423407 PCI: 00:02.0 subsystem <- 8086/46b3
1917 12:41:23.426436 PCI: 00:02.0 cmd <- 03
1918 12:41:23.429699 PCI: 00:04.0 subsystem <- 8086/461d
1919 12:41:23.429783 PCI: 00:04.0 cmd <- 02
1920 12:41:23.433499 PCI: 00:06.0 bridge ctrl <- 0013
1921 12:41:23.436828 PCI: 00:06.0 subsystem <- 8086/464d
1922 12:41:23.439892 PCI: 00:06.0 cmd <- 106
1923 12:41:23.443189 PCI: 00:0a.0 subsystem <- 8086/467d
1924 12:41:23.446252 PCI: 00:0a.0 cmd <- 02
1925 12:41:23.449691 PCI: 00:0d.0 subsystem <- 8086/461e
1926 12:41:23.453395 PCI: 00:0d.0 cmd <- 02
1927 12:41:23.456321 PCI: 00:14.0 subsystem <- 8086/51ed
1928 12:41:23.459550 PCI: 00:14.0 cmd <- 02
1929 12:41:23.462848 PCI: 00:14.2 subsystem <- 8086/51ef
1930 12:41:23.462932 PCI: 00:14.2 cmd <- 02
1931 12:41:23.466261 PCI: 00:14.3 subsystem <- 8086/51f0
1932 12:41:23.469741 PCI: 00:14.3 cmd <- 02
1933 12:41:23.472840 PCI: 00:15.0 subsystem <- 8086/51e8
1934 12:41:23.476283 PCI: 00:15.0 cmd <- 02
1935 12:41:23.479322 PCI: 00:15.1 subsystem <- 8086/51e9
1936 12:41:23.483150 PCI: 00:15.1 cmd <- 06
1937 12:41:23.485955 PCI: 00:15.3 subsystem <- 8086/51eb
1938 12:41:23.489432 PCI: 00:15.3 cmd <- 02
1939 12:41:23.492950 PCI: 00:16.0 subsystem <- 8086/51e0
1940 12:41:23.493034 PCI: 00:16.0 cmd <- 02
1941 12:41:23.499508 PCI: 00:19.1 subsystem <- 8086/51c6
1942 12:41:23.499592 PCI: 00:19.1 cmd <- 02
1943 12:41:23.502997 PCI: 00:1e.0 subsystem <- 8086/51a8
1944 12:41:23.505899 PCI: 00:1e.0 cmd <- 06
1945 12:41:23.509362 PCI: 00:1e.3 subsystem <- 8086/51ab
1946 12:41:23.513006 PCI: 00:1e.3 cmd <- 02
1947 12:41:23.516286 PCI: 00:1f.0 subsystem <- 8086/5182
1948 12:41:23.519215 PCI: 00:1f.0 cmd <- 407
1949 12:41:23.522667 PCI: 00:1f.3 subsystem <- 8086/51c8
1950 12:41:23.522752 PCI: 00:1f.3 cmd <- 02
1951 12:41:23.529261 PCI: 00:1f.5 subsystem <- 8086/51a4
1952 12:41:23.529345 PCI: 00:1f.5 cmd <- 406
1953 12:41:23.532956 PCI: 01:00.0 cmd <- 02
1954 12:41:23.533040 done.
1955 12:41:23.539492 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1956 12:41:23.542933 ME: Version: Unavailable
1957 12:41:23.546191 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1958 12:41:23.549662 Initializing devices...
1959 12:41:23.552635 Root Device init
1960 12:41:23.552719 mainboard: EC init
1961 12:41:23.559424 Chrome EC: Set SMI mask to 0x0000000000000000
1962 12:41:23.559509 Chrome EC: UHEPI supported
1963 12:41:23.567479 Chrome EC: clear events_b mask to 0x0000000000000000
1964 12:41:23.573838 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1965 12:41:23.580887 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1966 12:41:23.587394 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1967 12:41:23.590382 Chrome EC: Set WAKE mask to 0x0000000000000000
1968 12:41:23.598801 Root Device init finished in 42 msecs
1969 12:41:23.598886 PCI: 00:00.0 init
1970 12:41:23.602130 CPU TDP = 15 Watts
1971 12:41:23.605680 CPU PL1 = 15 Watts
1972 12:41:23.605764 CPU PL2 = 55 Watts
1973 12:41:23.608633 CPU PL4 = 123 Watts
1974 12:41:23.612071 PCI: 00:00.0 init finished in 8 msecs
1975 12:41:23.615620 PCI: 00:02.0 init
1976 12:41:23.615704 GMA: Found VBT in CBFS
1977 12:41:23.618965 GMA: Found valid VBT in CBFS
1978 12:41:23.625400 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1979 12:41:23.631994 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1980 12:41:23.635431 PCI: 00:02.0 init finished in 18 msecs
1981 12:41:23.638958 PCI: 00:06.0 init
1982 12:41:23.641948 Initializing PCH PCIe bridge.
1983 12:41:23.645138 PCI: 00:06.0 init finished in 3 msecs
1984 12:41:23.648603 PCI: 00:0a.0 init
1985 12:41:23.651988 PCI: 00:0a.0 init finished in 0 msecs
1986 12:41:23.652072 PCI: 00:14.0 init
1987 12:41:23.655554 PCI: 00:14.0 init finished in 0 msecs
1988 12:41:23.658576 PCI: 00:14.2 init
1989 12:41:23.662074 PCI: 00:14.2 init finished in 0 msecs
1990 12:41:23.665407 PCI: 00:15.0 init
1991 12:41:23.668737 I2C bus 0 version 0x3230302a
1992 12:41:23.671815 DW I2C bus 0 at 0x80655000 (400 KHz)
1993 12:41:23.675213 PCI: 00:15.0 init finished in 6 msecs
1994 12:41:23.675296 PCI: 00:15.1 init
1995 12:41:23.678974 I2C bus 1 version 0x3230302a
1996 12:41:23.682030 DW I2C bus 1 at 0x80656000 (400 KHz)
1997 12:41:23.685370 PCI: 00:15.1 init finished in 6 msecs
1998 12:41:23.688476 PCI: 00:15.3 init
1999 12:41:23.691995 I2C bus 3 version 0x3230302a
2000 12:41:23.695521 DW I2C bus 3 at 0x80657000 (400 KHz)
2001 12:41:23.698501 PCI: 00:15.3 init finished in 6 msecs
2002 12:41:23.701905 PCI: 00:16.0 init
2003 12:41:23.705196 PCI: 00:16.0 init finished in 0 msecs
2004 12:41:23.705281 PCI: 00:19.1 init
2005 12:41:23.708721 I2C bus 5 version 0x3230302a
2006 12:41:23.711878 DW I2C bus 5 at 0x80659000 (400 KHz)
2007 12:41:23.718845 PCI: 00:19.1 init finished in 6 msecs
2008 12:41:23.718930 PCI: 00:1f.0 init
2009 12:41:23.721882 IOAPIC: Initializing IOAPIC at 0xfec00000
2010 12:41:23.725090 IOAPIC: ID = 0x02
2011 12:41:23.728602 IOAPIC: Dumping registers
2012 12:41:23.732025 reg 0x0000: 0x02000000
2013 12:41:23.732109 reg 0x0001: 0x00770020
2014 12:41:23.735020 reg 0x0002: 0x00000000
2015 12:41:23.738447 IOAPIC: 120 interrupts
2016 12:41:23.741883 IOAPIC: Clearing IOAPIC at 0xfec00000
2017 12:41:23.745604 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2018 12:41:23.751656 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2019 12:41:23.755296 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2020 12:41:23.761828 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2021 12:41:23.765377 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2022 12:41:23.771915 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2023 12:41:23.775301 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2024 12:41:23.778703 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2025 12:41:23.785301 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2026 12:41:23.788924 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2027 12:41:23.795419 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2028 12:41:23.798343 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2029 12:41:23.805410 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2030 12:41:23.808338 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2031 12:41:23.815048 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2032 12:41:23.818521 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2033 12:41:23.821864 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2034 12:41:23.828259 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2035 12:41:23.831675 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2036 12:41:23.838594 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2037 12:41:23.841589 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2038 12:41:23.848644 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2039 12:41:23.851553 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2040 12:41:23.858464 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2041 12:41:23.861853 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2042 12:41:23.865005 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2043 12:41:23.871419 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2044 12:41:23.875028 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2045 12:41:23.881545 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2046 12:41:23.884836 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2047 12:41:23.891768 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2048 12:41:23.894999 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2049 12:41:23.901569 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2050 12:41:23.904913 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2051 12:41:23.908371 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2052 12:41:23.915194 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2053 12:41:23.918076 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2054 12:41:23.924981 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2055 12:41:23.928442 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2056 12:41:23.935188 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2057 12:41:23.938273 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2058 12:41:23.944817 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2059 12:41:23.948081 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2060 12:41:23.951278 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2061 12:41:23.958137 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2062 12:41:23.961315 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2063 12:41:23.967790 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2064 12:41:23.971310 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2065 12:41:23.977871 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2066 12:41:23.980894 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2067 12:41:23.987376 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2068 12:41:23.990830 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2069 12:41:23.994201 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2070 12:41:24.001124 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2071 12:41:24.004348 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2072 12:41:24.010723 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2073 12:41:24.014364 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2074 12:41:24.020758 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2075 12:41:24.024219 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2076 12:41:24.030758 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2077 12:41:24.034112 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2078 12:41:24.037424 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2079 12:41:24.043873 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2080 12:41:24.047333 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2081 12:41:24.053863 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2082 12:41:24.057408 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2083 12:41:24.064097 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2084 12:41:24.067144 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2085 12:41:24.074053 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2086 12:41:24.077565 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2087 12:41:24.080641 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2088 12:41:24.087025 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2089 12:41:24.091005 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2090 12:41:24.097347 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2091 12:41:24.100585 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2092 12:41:24.107151 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2093 12:41:24.110546 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2094 12:41:24.117077 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2095 12:41:24.120661 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2096 12:41:24.124032 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2097 12:41:24.130553 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2098 12:41:24.134161 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2099 12:41:24.140445 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2100 12:41:24.144096 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2101 12:41:24.150625 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2102 12:41:24.153977 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2103 12:41:24.156864 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2104 12:41:24.163843 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2105 12:41:24.167048 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2106 12:41:24.173643 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2107 12:41:24.177049 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2108 12:41:24.183432 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2109 12:41:24.186918 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2110 12:41:24.193557 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2111 12:41:24.197083 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2112 12:41:24.200086 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2113 12:41:24.206882 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2114 12:41:24.210207 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2115 12:41:24.216867 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2116 12:41:24.220112 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2117 12:41:24.226842 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2118 12:41:24.230306 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2119 12:41:24.236910 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2120 12:41:24.240449 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2121 12:41:24.243571 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2122 12:41:24.250098 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2123 12:41:24.253490 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2124 12:41:24.260302 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2125 12:41:24.263477 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2126 12:41:24.270354 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2127 12:41:24.273346 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2128 12:41:24.280334 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2129 12:41:24.283286 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2130 12:41:24.286913 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2131 12:41:24.293411 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2132 12:41:24.296922 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2133 12:41:24.303397 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2134 12:41:24.307064 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2135 12:41:24.313486 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2136 12:41:24.316972 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2137 12:41:24.320209 IOAPIC: Bootstrap Processor Local APIC = 0x00
2138 12:41:24.326737 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2139 12:41:24.330223 PCI: 00:1f.0 init finished in 607 msecs
2140 12:41:24.333404 PCI: 00:1f.2 init
2141 12:41:24.336719 apm_control: Disabling ACPI.
2142 12:41:24.340345 APMC done.
2143 12:41:24.343886 PCI: 00:1f.2 init finished in 6 msecs
2144 12:41:24.343970 PCI: 00:1f.3 init
2145 12:41:24.346869 PCI: 00:1f.3 init finished in 0 msecs
2146 12:41:24.350265 PCI: 01:00.0 init
2147 12:41:24.353608 PCI: 01:00.0 init finished in 0 msecs
2148 12:41:24.357110 PNP: 0c09.0 init
2149 12:41:24.360343 Google Chrome EC uptime: 12.231 seconds
2150 12:41:24.363664 Google Chrome AP resets since EC boot: 1
2151 12:41:24.370621 Google Chrome most recent AP reset causes:
2152 12:41:24.373884 0.340: 32775 shutdown: entering G3
2153 12:41:24.380472 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2154 12:41:24.384036 PNP: 0c09.0 init finished in 23 msecs
2155 12:41:24.384119 GENERIC: 0.0 init
2156 12:41:24.390553 GENERIC: 0.0 init finished in 0 msecs
2157 12:41:24.390637 GENERIC: 1.0 init
2158 12:41:24.393540 GENERIC: 1.0 init finished in 0 msecs
2159 12:41:24.397035 Devices initialized
2160 12:41:24.400540 Show all devs... After init.
2161 12:41:24.403498 Root Device: enabled 1
2162 12:41:24.403580 CPU_CLUSTER: 0: enabled 1
2163 12:41:24.407041 DOMAIN: 0000: enabled 1
2164 12:41:24.410488 GPIO: 0: enabled 1
2165 12:41:24.410593 PCI: 00:00.0: enabled 1
2166 12:41:24.413366 PCI: 00:01.0: enabled 0
2167 12:41:24.416768 PCI: 00:01.1: enabled 0
2168 12:41:24.420146 PCI: 00:02.0: enabled 1
2169 12:41:24.420229 PCI: 00:04.0: enabled 1
2170 12:41:24.423529 PCI: 00:05.0: enabled 0
2171 12:41:24.426890 PCI: 00:06.0: enabled 1
2172 12:41:24.426972 PCI: 00:06.2: enabled 0
2173 12:41:24.430430 PCI: 00:07.0: enabled 0
2174 12:41:24.433647 PCI: 00:07.1: enabled 0
2175 12:41:24.436941 PCI: 00:07.2: enabled 0
2176 12:41:24.437024 PCI: 00:07.3: enabled 0
2177 12:41:24.439991 PCI: 00:08.0: enabled 0
2178 12:41:24.443806 PCI: 00:09.0: enabled 0
2179 12:41:24.446852 PCI: 00:0a.0: enabled 1
2180 12:41:24.446935 PCI: 00:0d.0: enabled 1
2181 12:41:24.450234 PCI: 00:0d.1: enabled 0
2182 12:41:24.453776 PCI: 00:0d.2: enabled 0
2183 12:41:24.456918 PCI: 00:0d.3: enabled 0
2184 12:41:24.457001 PCI: 00:0e.0: enabled 0
2185 12:41:24.460209 PCI: 00:10.0: enabled 0
2186 12:41:24.463653 PCI: 00:10.1: enabled 0
2187 12:41:24.463736 PCI: 00:10.6: enabled 0
2188 12:41:24.467098 PCI: 00:10.7: enabled 0
2189 12:41:24.470213 PCI: 00:12.0: enabled 0
2190 12:41:24.473789 PCI: 00:12.6: enabled 0
2191 12:41:24.473888 PCI: 00:12.7: enabled 0
2192 12:41:24.477060 PCI: 00:13.0: enabled 0
2193 12:41:24.480672 PCI: 00:14.0: enabled 1
2194 12:41:24.483764 PCI: 00:14.1: enabled 0
2195 12:41:24.483879 PCI: 00:14.2: enabled 1
2196 12:41:24.486839 PCI: 00:14.3: enabled 1
2197 12:41:24.490366 PCI: 00:15.0: enabled 1
2198 12:41:24.493467 PCI: 00:15.1: enabled 1
2199 12:41:24.493550 PCI: 00:15.2: enabled 0
2200 12:41:24.497179 PCI: 00:15.3: enabled 1
2201 12:41:24.500058 PCI: 00:16.0: enabled 1
2202 12:41:24.503532 PCI: 00:16.1: enabled 0
2203 12:41:24.503616 PCI: 00:16.2: enabled 0
2204 12:41:24.507031 PCI: 00:16.3: enabled 0
2205 12:41:24.509906 PCI: 00:16.4: enabled 0
2206 12:41:24.510014 PCI: 00:16.5: enabled 0
2207 12:41:24.513316 PCI: 00:17.0: enabled 0
2208 12:41:24.516883 PCI: 00:19.0: enabled 0
2209 12:41:24.520219 PCI: 00:19.1: enabled 1
2210 12:41:24.520302 PCI: 00:19.2: enabled 0
2211 12:41:24.523651 PCI: 00:1a.0: enabled 0
2212 12:41:24.526537 PCI: 00:1c.0: enabled 0
2213 12:41:24.530203 PCI: 00:1c.1: enabled 0
2214 12:41:24.530285 PCI: 00:1c.2: enabled 0
2215 12:41:24.533515 PCI: 00:1c.3: enabled 0
2216 12:41:24.536632 PCI: 00:1c.4: enabled 0
2217 12:41:24.540156 PCI: 00:1c.5: enabled 0
2218 12:41:24.540238 PCI: 00:1c.6: enabled 0
2219 12:41:24.543506 PCI: 00:1c.7: enabled 0
2220 12:41:24.546576 PCI: 00:1d.0: enabled 0
2221 12:41:24.546659 PCI: 00:1d.1: enabled 0
2222 12:41:24.550130 PCI: 00:1d.2: enabled 0
2223 12:41:24.553100 PCI: 00:1d.3: enabled 0
2224 12:41:24.556491 PCI: 00:1e.0: enabled 1
2225 12:41:24.556573 PCI: 00:1e.1: enabled 0
2226 12:41:24.559848 PCI: 00:1e.2: enabled 0
2227 12:41:24.563653 PCI: 00:1e.3: enabled 1
2228 12:41:24.566661 PCI: 00:1f.0: enabled 1
2229 12:41:24.566744 PCI: 00:1f.1: enabled 0
2230 12:41:24.570184 PCI: 00:1f.2: enabled 1
2231 12:41:24.573126 PCI: 00:1f.3: enabled 1
2232 12:41:24.576700 PCI: 00:1f.4: enabled 0
2233 12:41:24.576783 PCI: 00:1f.5: enabled 1
2234 12:41:24.580075 PCI: 00:1f.6: enabled 0
2235 12:41:24.583350 PCI: 00:1f.7: enabled 0
2236 12:41:24.586704 GENERIC: 0.0: enabled 1
2237 12:41:24.586787 GENERIC: 0.0: enabled 1
2238 12:41:24.589904 GENERIC: 1.0: enabled 1
2239 12:41:24.593149 GENERIC: 0.0: enabled 1
2240 12:41:24.593232 GENERIC: 1.0: enabled 1
2241 12:41:24.596594 USB0 port 0: enabled 1
2242 12:41:24.599745 USB0 port 0: enabled 1
2243 12:41:24.603135 GENERIC: 0.0: enabled 1
2244 12:41:24.603218 I2C: 00:1a: enabled 1
2245 12:41:24.606624 I2C: 00:31: enabled 1
2246 12:41:24.609656 I2C: 00:32: enabled 1
2247 12:41:24.609739 I2C: 00:50: enabled 1
2248 12:41:24.613226 I2C: 00:10: enabled 1
2249 12:41:24.616644 I2C: 00:15: enabled 1
2250 12:41:24.616728 I2C: 00:2c: enabled 1
2251 12:41:24.619559 GENERIC: 0.0: enabled 1
2252 12:41:24.622987 SPI: 00: enabled 1
2253 12:41:24.623070 PNP: 0c09.0: enabled 1
2254 12:41:24.626373 GENERIC: 0.0: enabled 1
2255 12:41:24.629893 USB3 port 0: enabled 1
2256 12:41:24.632882 USB3 port 1: enabled 0
2257 12:41:24.632966 USB3 port 2: enabled 1
2258 12:41:24.636383 USB3 port 3: enabled 0
2259 12:41:24.639755 USB2 port 0: enabled 1
2260 12:41:24.639838 USB2 port 1: enabled 0
2261 12:41:24.643146 USB2 port 2: enabled 1
2262 12:41:24.646331 USB2 port 3: enabled 0
2263 12:41:24.646417 USB2 port 4: enabled 0
2264 12:41:24.649804 USB2 port 5: enabled 1
2265 12:41:24.653028 USB2 port 6: enabled 0
2266 12:41:24.656050 USB2 port 7: enabled 0
2267 12:41:24.656124 USB2 port 8: enabled 1
2268 12:41:24.659531 USB2 port 9: enabled 1
2269 12:41:24.663148 USB3 port 0: enabled 1
2270 12:41:24.663233 USB3 port 1: enabled 0
2271 12:41:24.666395 USB3 port 2: enabled 0
2272 12:41:24.669687 USB3 port 3: enabled 0
2273 12:41:24.672954 GENERIC: 0.0: enabled 1
2274 12:41:24.673038 GENERIC: 1.0: enabled 1
2275 12:41:24.676220 APIC: 00: enabled 1
2276 12:41:24.679246 APIC: 14: enabled 1
2277 12:41:24.679330 APIC: 16: enabled 1
2278 12:41:24.682703 APIC: 10: enabled 1
2279 12:41:24.682788 APIC: 12: enabled 1
2280 12:41:24.686125 APIC: 01: enabled 1
2281 12:41:24.689353 APIC: 09: enabled 1
2282 12:41:24.689438 APIC: 08: enabled 1
2283 12:41:24.692905 PCI: 01:00.0: enabled 1
2284 12:41:24.699371 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2285 12:41:24.702987 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2286 12:41:24.705989 ELOG: NV offset 0xf20000 size 0x4000
2287 12:41:24.713401 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2288 12:41:24.720824 ELOG: Event(17) added with size 13 at 2024-01-03 12:40:43 UTC
2289 12:41:24.726946 ELOG: Event(9E) added with size 10 at 2024-01-03 12:40:43 UTC
2290 12:41:24.733522 ELOG: Event(9F) added with size 14 at 2024-01-03 12:40:43 UTC
2291 12:41:24.740591 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2292 12:41:24.746795 ELOG: Event(A0) added with size 9 at 2024-01-03 12:40:43 UTC
2293 12:41:24.750233 elog_add_boot_reason: Logged dev mode boot
2294 12:41:24.757174 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2295 12:41:24.760461 Finalize devices...
2296 12:41:24.760546 PCI: 00:16.0 final
2297 12:41:24.763817 PCI: 00:1f.2 final
2298 12:41:24.763901 GENERIC: 0.0 final
2299 12:41:24.770248 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2300 12:41:24.773320 GENERIC: 1.0 final
2301 12:41:24.780199 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2302 12:41:24.780283 Devices finalized
2303 12:41:24.786856 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2304 12:41:24.789774 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2305 12:41:24.796455 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2306 12:41:24.803466 ME: HFSTS1 : 0x90000245
2307 12:41:24.806445 ME: HFSTS2 : 0x82100116
2308 12:41:24.809835 ME: HFSTS3 : 0x00000050
2309 12:41:24.816353 ME: HFSTS4 : 0x00004000
2310 12:41:24.819944 ME: HFSTS5 : 0x00000000
2311 12:41:24.823348 ME: HFSTS6 : 0x40600006
2312 12:41:24.826387 ME: Manufacturing Mode : NO
2313 12:41:24.832927 ME: SPI Protection Mode Enabled : YES
2314 12:41:24.836231 ME: FPFs Committed : YES
2315 12:41:24.839938 ME: Manufacturing Vars Locked : YES
2316 12:41:24.842881 ME: FW Partition Table : OK
2317 12:41:24.846541 ME: Bringup Loader Failure : NO
2318 12:41:24.849488 ME: Firmware Init Complete : YES
2319 12:41:24.852720 ME: Boot Options Present : NO
2320 12:41:24.859675 ME: Update In Progress : NO
2321 12:41:24.862877 ME: D0i3 Support : YES
2322 12:41:24.865945 ME: Low Power State Enabled : NO
2323 12:41:24.869354 ME: CPU Replaced : YES
2324 12:41:24.873063 ME: CPU Replacement Valid : YES
2325 12:41:24.876196 ME: Current Working State : 5
2326 12:41:24.879404 ME: Current Operation State : 1
2327 12:41:24.882610 ME: Current Operation Mode : 0
2328 12:41:24.885857 ME: Error Code : 0
2329 12:41:24.892885 ME: Enhanced Debug Mode : NO
2330 12:41:24.895779 ME: CPU Debug Disabled : YES
2331 12:41:24.899132 ME: TXT Support : NO
2332 12:41:24.902537 ME: WP for RO is enabled : YES
2333 12:41:24.909307 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2334 12:41:24.915881 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2335 12:41:24.919378 Ramoops buffer: 0x100000@0x76899000.
2336 12:41:24.925538 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2337 12:41:24.932464 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2338 12:41:24.935805 CBFS: 'fallback/slic' not found.
2339 12:41:24.938754 ACPI: Writing ACPI tables at 7686d000.
2340 12:41:24.942345 ACPI: * FACS
2341 12:41:24.942419 ACPI: * DSDT
2342 12:41:24.948805 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2343 12:41:24.952410 ACPI: * FADT
2344 12:41:24.952496 SCI is IRQ9
2345 12:41:24.956510 ACPI: added table 1/32, length now 40
2346 12:41:24.960041 ACPI: * SSDT
2347 12:41:24.963493 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2348 12:41:24.970886 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2349 12:41:24.974193 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2350 12:41:24.977449 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2351 12:41:24.983883 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2352 12:41:24.990845 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2353 12:41:24.997179 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2354 12:41:25.000511 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2355 12:41:25.007400 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2356 12:41:25.010903 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2357 12:41:25.017439 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2358 12:41:25.020429 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2359 12:41:25.027395 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2360 12:41:25.030343 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2361 12:41:25.039294 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2362 12:41:25.042674 PS2K: Passing 80 keymaps to kernel
2363 12:41:25.049221 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2364 12:41:25.055774 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2365 12:41:25.062567 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2366 12:41:25.068954 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2367 12:41:25.076084 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2368 12:41:25.082537 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2369 12:41:25.085634 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2370 12:41:25.092554 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2371 12:41:25.098934 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2372 12:41:25.105991 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2373 12:41:25.109011 ACPI: added table 2/32, length now 44
2374 12:41:25.112372 ACPI: * MCFG
2375 12:41:25.115955 ACPI: added table 3/32, length now 48
2376 12:41:25.116039 ACPI: * TPM2
2377 12:41:25.119062 TPM2 log created at 0x7685d000
2378 12:41:25.122122 ACPI: added table 4/32, length now 52
2379 12:41:25.125548 ACPI: * LPIT
2380 12:41:25.129191 ACPI: added table 5/32, length now 56
2381 12:41:25.132175 ACPI: * MADT
2382 12:41:25.132289 SCI is IRQ9
2383 12:41:25.135606 ACPI: added table 6/32, length now 60
2384 12:41:25.138650 cmd_reg from pmc_make_ipc_cmd 1052838
2385 12:41:25.145380 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2386 12:41:25.151932 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2387 12:41:25.158931 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2388 12:41:25.161925 PMC CrashLog size in discovery mode: 0xC00
2389 12:41:25.165858 cpu crashlog bar addr: 0x80640000
2390 12:41:25.168558 cpu discovery table offset: 0x6030
2391 12:41:25.175541 cpu_crashlog_discovery_table buffer count: 0x3
2392 12:41:25.181900 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2393 12:41:25.188613 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2394 12:41:25.195404 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2395 12:41:25.198829 PMC crashLog size in discovery mode : 0xC00
2396 12:41:25.205428 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2397 12:41:25.211988 discover mode PMC crashlog size adjusted to: 0x200
2398 12:41:25.218908 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2399 12:41:25.221880 discover mode PMC crashlog size adjusted to: 0x0
2400 12:41:25.225431 m_cpu_crashLog_size : 0x3480 bytes
2401 12:41:25.228342 CPU crashLog present.
2402 12:41:25.231964 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2403 12:41:25.238457 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2404 12:41:25.241847 current = 76876550
2405 12:41:25.244953 ACPI: * DMAR
2406 12:41:25.248214 ACPI: added table 7/32, length now 64
2407 12:41:25.251726 ACPI: added table 8/32, length now 68
2408 12:41:25.251811 ACPI: * HPET
2409 12:41:25.258350 ACPI: added table 9/32, length now 72
2410 12:41:25.258438 ACPI: done.
2411 12:41:25.261982 ACPI tables: 38528 bytes.
2412 12:41:25.265467 smbios_write_tables: 76857000
2413 12:41:25.268757 EC returned error result code 3
2414 12:41:25.272242 Couldn't obtain OEM name from CBI
2415 12:41:25.272332 Create SMBIOS type 16
2416 12:41:25.275672 Create SMBIOS type 17
2417 12:41:25.279014 Create SMBIOS type 20
2418 12:41:25.282604 GENERIC: 0.0 (WIFI Device)
2419 12:41:25.282688 SMBIOS tables: 2156 bytes.
2420 12:41:25.288798 Writing table forward entry at 0x00000500
2421 12:41:25.295818 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2422 12:41:25.298980 Writing coreboot table at 0x76891000
2423 12:41:25.305410 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2424 12:41:25.308919 1. 0000000000001000-000000000009ffff: RAM
2425 12:41:25.312563 2. 00000000000a0000-00000000000fffff: RESERVED
2426 12:41:25.318950 3. 0000000000100000-0000000076856fff: RAM
2427 12:41:25.322068 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2428 12:41:25.328574 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2429 12:41:25.335539 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2430 12:41:25.338604 7. 0000000077000000-00000000803fffff: RESERVED
2431 12:41:25.342076 8. 00000000c0000000-00000000cfffffff: RESERVED
2432 12:41:25.348553 9. 00000000f8000000-00000000f9ffffff: RESERVED
2433 12:41:25.351861 10. 00000000fb000000-00000000fb000fff: RESERVED
2434 12:41:25.358770 11. 00000000fc800000-00000000fe7fffff: RESERVED
2435 12:41:25.362255 12. 00000000feb00000-00000000feb7ffff: RESERVED
2436 12:41:25.368818 13. 00000000fec00000-00000000fecfffff: RESERVED
2437 12:41:25.371932 14. 00000000fed40000-00000000fed6ffff: RESERVED
2438 12:41:25.378608 15. 00000000fed80000-00000000fed87fff: RESERVED
2439 12:41:25.382016 16. 00000000fed90000-00000000fed92fff: RESERVED
2440 12:41:25.384998 17. 00000000feda0000-00000000feda1fff: RESERVED
2441 12:41:25.391812 18. 00000000fedc0000-00000000feddffff: RESERVED
2442 12:41:25.395102 19. 0000000100000000-000000027fbfffff: RAM
2443 12:41:25.398177 Passing 4 GPIOs to payload:
2444 12:41:25.404961 NAME | PORT | POLARITY | VALUE
2445 12:41:25.408342 lid | undefined | high | high
2446 12:41:25.415205 power | undefined | high | low
2447 12:41:25.418684 oprom | undefined | high | low
2448 12:41:25.425165 EC in RW | 0x00000151 | high | high
2449 12:41:25.425248 Board ID: 3
2450 12:41:25.428377 FW config: 0x131
2451 12:41:25.434847 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum fa0c
2452 12:41:25.438381 coreboot table: 1788 bytes.
2453 12:41:25.441840 IMD ROOT 0. 0x76fff000 0x00001000
2454 12:41:25.444876 IMD SMALL 1. 0x76ffe000 0x00001000
2455 12:41:25.448292 FSP MEMORY 2. 0x76afe000 0x00500000
2456 12:41:25.451775 CONSOLE 3. 0x76ade000 0x00020000
2457 12:41:25.455175 RW MCACHE 4. 0x76add000 0x0000043c
2458 12:41:25.458166 RO MCACHE 5. 0x76adc000 0x00000fd8
2459 12:41:25.461727 FMAP 6. 0x76adb000 0x0000064a
2460 12:41:25.468293 TIME STAMP 7. 0x76ada000 0x00000910
2461 12:41:25.471825 VBOOT WORK 8. 0x76ac6000 0x00014000
2462 12:41:25.474855 MEM INFO 9. 0x76ac5000 0x000003b8
2463 12:41:25.478159 ROMSTG STCK10. 0x76ac4000 0x00001000
2464 12:41:25.481507 AFTER CAR 11. 0x76ab8000 0x0000c000
2465 12:41:25.485057 RAMSTAGE 12. 0x76a2e000 0x0008a000
2466 12:41:25.488168 ACPI BERT 13. 0x76a1e000 0x00010000
2467 12:41:25.491691 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2468 12:41:25.498564 REFCODE 15. 0x769ae000 0x0006f000
2469 12:41:25.501926 SMM BACKUP 16. 0x7699e000 0x00010000
2470 12:41:25.504934 IGD OPREGION17. 0x76999000 0x00004203
2471 12:41:25.508430 RAMOOPS 18. 0x76899000 0x00100000
2472 12:41:25.511669 COREBOOT 19. 0x76891000 0x00008000
2473 12:41:25.515404 ACPI 20. 0x7686d000 0x00024000
2474 12:41:25.518453 TPM2 TCGLOG21. 0x7685d000 0x00010000
2475 12:41:25.522076 PMC CRASHLOG22. 0x7685c000 0x00000c00
2476 12:41:25.528497 CPU CRASHLOG23. 0x76858000 0x00003480
2477 12:41:25.531725 SMBIOS 24. 0x76857000 0x00001000
2478 12:41:25.531808 IMD small region:
2479 12:41:25.535244 IMD ROOT 0. 0x76ffec00 0x00000400
2480 12:41:25.541898 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2481 12:41:25.545262 VPD 2. 0x76ffeb60 0x0000006c
2482 12:41:25.548306 POWER STATE 3. 0x76ffeb00 0x00000044
2483 12:41:25.551734 ROMSTAGE 4. 0x76ffeae0 0x00000004
2484 12:41:25.555337 ACPI GNVS 5. 0x76ffea80 0x00000048
2485 12:41:25.561651 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2486 12:41:25.565106 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2487 12:41:25.568637 MTRR: Physical address space:
2488 12:41:25.575533 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2489 12:41:25.581862 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2490 12:41:25.588158 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2491 12:41:25.594953 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2492 12:41:25.601497 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2493 12:41:25.604869 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2494 12:41:25.611744 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2495 12:41:25.618313 MTRR: Fixed MSR 0x250 0x0606060606060606
2496 12:41:25.621435 MTRR: Fixed MSR 0x258 0x0606060606060606
2497 12:41:25.624695 MTRR: Fixed MSR 0x259 0x0000000000000000
2498 12:41:25.628132 MTRR: Fixed MSR 0x268 0x0606060606060606
2499 12:41:25.634858 MTRR: Fixed MSR 0x269 0x0606060606060606
2500 12:41:25.638231 MTRR: Fixed MSR 0x26a 0x0606060606060606
2501 12:41:25.641178 MTRR: Fixed MSR 0x26b 0x0606060606060606
2502 12:41:25.645251 MTRR: Fixed MSR 0x26c 0x0606060606060606
2503 12:41:25.651595 MTRR: Fixed MSR 0x26d 0x0606060606060606
2504 12:41:25.655065 MTRR: Fixed MSR 0x26e 0x0606060606060606
2505 12:41:25.658148 MTRR: Fixed MSR 0x26f 0x0606060606060606
2506 12:41:25.661671 call enable_fixed_mtrr()
2507 12:41:25.664970 CPU physical address size: 39 bits
2508 12:41:25.671560 MTRR: default type WB/UC MTRR counts: 6/6.
2509 12:41:25.674513 MTRR: UC selected as default type.
2510 12:41:25.678351 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2511 12:41:25.684538 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2512 12:41:25.691507 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2513 12:41:25.697972 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2514 12:41:25.704448 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2515 12:41:25.711520 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2516 12:41:25.718045 MTRR: Fixed MSR 0x250 0x0606060606060606
2517 12:41:25.721059 MTRR: Fixed MSR 0x258 0x0606060606060606
2518 12:41:25.724437 MTRR: Fixed MSR 0x259 0x0000000000000000
2519 12:41:25.727638 MTRR: Fixed MSR 0x268 0x0606060606060606
2520 12:41:25.734052 MTRR: Fixed MSR 0x269 0x0606060606060606
2521 12:41:25.737642 MTRR: Fixed MSR 0x26a 0x0606060606060606
2522 12:41:25.740979 MTRR: Fixed MSR 0x26b 0x0606060606060606
2523 12:41:25.744155 MTRR: Fixed MSR 0x26c 0x0606060606060606
2524 12:41:25.750808 MTRR: Fixed MSR 0x26d 0x0606060606060606
2525 12:41:25.753998 MTRR: Fixed MSR 0x26e 0x0606060606060606
2526 12:41:25.757442 MTRR: Fixed MSR 0x26f 0x0606060606060606
2527 12:41:25.760979 MTRR: Fixed MSR 0x250 0x0606060606060606
2528 12:41:25.764006 call enable_fixed_mtrr()
2529 12:41:25.767459 MTRR: Fixed MSR 0x250 0x0606060606060606
2530 12:41:25.770857 MTRR: Fixed MSR 0x250 0x0606060606060606
2531 12:41:25.777335 MTRR: Fixed MSR 0x258 0x0606060606060606
2532 12:41:25.780359 MTRR: Fixed MSR 0x259 0x0000000000000000
2533 12:41:25.784001 MTRR: Fixed MSR 0x268 0x0606060606060606
2534 12:41:25.787039 MTRR: Fixed MSR 0x269 0x0606060606060606
2535 12:41:25.790458 CPU physical address size: 39 bits
2536 12:41:25.797470 MTRR: Fixed MSR 0x250 0x0606060606060606
2537 12:41:25.800374 MTRR: Fixed MSR 0x258 0x0606060606060606
2538 12:41:25.803808 MTRR: Fixed MSR 0x26a 0x0606060606060606
2539 12:41:25.806830 MTRR: Fixed MSR 0x259 0x0000000000000000
2540 12:41:25.813819 MTRR: Fixed MSR 0x268 0x0606060606060606
2541 12:41:25.817262 MTRR: Fixed MSR 0x269 0x0606060606060606
2542 12:41:25.820309 MTRR: Fixed MSR 0x26a 0x0606060606060606
2543 12:41:25.823840 MTRR: Fixed MSR 0x26b 0x0606060606060606
2544 12:41:25.830534 MTRR: Fixed MSR 0x26c 0x0606060606060606
2545 12:41:25.833600 MTRR: Fixed MSR 0x26d 0x0606060606060606
2546 12:41:25.837278 MTRR: Fixed MSR 0x26e 0x0606060606060606
2547 12:41:25.840575 MTRR: Fixed MSR 0x26f 0x0606060606060606
2548 12:41:25.846892 MTRR: Fixed MSR 0x26b 0x0606060606060606
2549 12:41:25.846999 call enable_fixed_mtrr()
2550 12:41:25.853601 MTRR: Fixed MSR 0x26c 0x0606060606060606
2551 12:41:25.856848 MTRR: Fixed MSR 0x26d 0x0606060606060606
2552 12:41:25.860127 MTRR: Fixed MSR 0x26e 0x0606060606060606
2553 12:41:25.863586 MTRR: Fixed MSR 0x26f 0x0606060606060606
2554 12:41:25.867110 MTRR: Fixed MSR 0x258 0x0606060606060606
2555 12:41:25.870013 call enable_fixed_mtrr()
2556 12:41:25.873530 MTRR: Fixed MSR 0x250 0x0606060606060606
2557 12:41:25.879932 MTRR: Fixed MSR 0x258 0x0606060606060606
2558 12:41:25.883444 MTRR: Fixed MSR 0x259 0x0000000000000000
2559 12:41:25.886802 MTRR: Fixed MSR 0x268 0x0606060606060606
2560 12:41:25.889794 MTRR: Fixed MSR 0x269 0x0606060606060606
2561 12:41:25.896793 MTRR: Fixed MSR 0x26a 0x0606060606060606
2562 12:41:25.900047 MTRR: Fixed MSR 0x26b 0x0606060606060606
2563 12:41:25.903506 MTRR: Fixed MSR 0x26c 0x0606060606060606
2564 12:41:25.906589 MTRR: Fixed MSR 0x26d 0x0606060606060606
2565 12:41:25.913474 MTRR: Fixed MSR 0x26e 0x0606060606060606
2566 12:41:25.916466 MTRR: Fixed MSR 0x26f 0x0606060606060606
2567 12:41:25.919968 MTRR: Fixed MSR 0x250 0x0606060606060606
2568 12:41:25.923334 call enable_fixed_mtrr()
2569 12:41:25.926707 MTRR: Fixed MSR 0x259 0x0000000000000000
2570 12:41:25.929879 MTRR: Fixed MSR 0x258 0x0606060606060606
2571 12:41:25.936828 MTRR: Fixed MSR 0x259 0x0000000000000000
2572 12:41:25.939850 MTRR: Fixed MSR 0x268 0x0606060606060606
2573 12:41:25.943183 MTRR: Fixed MSR 0x269 0x0606060606060606
2574 12:41:25.946410 CPU physical address size: 39 bits
2575 12:41:25.949653 MTRR: Fixed MSR 0x26a 0x0606060606060606
2576 12:41:25.956656 MTRR: Fixed MSR 0x268 0x0606060606060606
2577 12:41:25.959536 CPU physical address size: 39 bits
2578 12:41:25.963288 MTRR: Fixed MSR 0x258 0x0606060606060606
2579 12:41:25.966628 CPU physical address size: 39 bits
2580 12:41:25.969640 MTRR: Fixed MSR 0x26b 0x0606060606060606
2581 12:41:25.973239 MTRR: Fixed MSR 0x269 0x0606060606060606
2582 12:41:25.979486 MTRR: Fixed MSR 0x26c 0x0606060606060606
2583 12:41:25.982998 MTRR: Fixed MSR 0x26d 0x0606060606060606
2584 12:41:25.986093 MTRR: Fixed MSR 0x26e 0x0606060606060606
2585 12:41:25.989567 MTRR: Fixed MSR 0x26f 0x0606060606060606
2586 12:41:25.996460 MTRR: Fixed MSR 0x26a 0x0606060606060606
2587 12:41:25.999456 call enable_fixed_mtrr()
2588 12:41:26.002556 MTRR: Fixed MSR 0x26b 0x0606060606060606
2589 12:41:26.005927 MTRR: Fixed MSR 0x26c 0x0606060606060606
2590 12:41:26.009356 MTRR: Fixed MSR 0x26d 0x0606060606060606
2591 12:41:26.012863 MTRR: Fixed MSR 0x26e 0x0606060606060606
2592 12:41:26.019356 MTRR: Fixed MSR 0x26f 0x0606060606060606
2593 12:41:26.022863 MTRR: Fixed MSR 0x259 0x0000000000000000
2594 12:41:26.026023 call enable_fixed_mtrr()
2595 12:41:26.029426 CPU physical address size: 39 bits
2596 12:41:26.032523 CPU physical address size: 39 bits
2597 12:41:26.036073 MTRR: Fixed MSR 0x268 0x0606060606060606
2598 12:41:26.040126 MTRR: Fixed MSR 0x269 0x0606060606060606
2599 12:41:26.045865 MTRR: Fixed MSR 0x26a 0x0606060606060606
2600 12:41:26.049321 MTRR: Fixed MSR 0x26b 0x0606060606060606
2601 12:41:26.052408 MTRR: Fixed MSR 0x26c 0x0606060606060606
2602 12:41:26.056019 MTRR: Fixed MSR 0x26d 0x0606060606060606
2603 12:41:26.062688 MTRR: Fixed MSR 0x26e 0x0606060606060606
2604 12:41:26.065901 MTRR: Fixed MSR 0x26f 0x0606060606060606
2605 12:41:26.069216 call enable_fixed_mtrr()
2606 12:41:26.072745 CPU physical address size: 39 bits
2607 12:41:26.076487
2608 12:41:26.076574 MTRR check
2609 12:41:26.079684 Fixed MTRRs : Enabled
2610 12:41:26.079771 Variable MTRRs: Enabled
2611 12:41:26.079857
2612 12:41:26.086462 BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms
2613 12:41:26.090082 Checking cr50 for pending updates
2614 12:41:26.102058 Reading cr50 TPM mode
2615 12:41:26.117595 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2616 12:41:26.127169 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2617 12:41:26.130630 Checking segment from ROM address 0xf96cbe6c
2618 12:41:26.134121 Checking segment from ROM address 0xf96cbe88
2619 12:41:26.140606 Loading segment from ROM address 0xf96cbe6c
2620 12:41:26.140694 code (compression=1)
2621 12:41:26.150864 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2622 12:41:26.157385 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2623 12:41:26.160637 using LZMA
2624 12:41:26.183545 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2625 12:41:26.189916 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2626 12:41:26.198198 Loading segment from ROM address 0xf96cbe88
2627 12:41:26.201723 Entry Point 0x30000000
2628 12:41:26.201848 Loaded segments
2629 12:41:26.208294 BS: BS_PAYLOAD_LOAD run times (exec / console): 22 / 62 ms
2630 12:41:26.215163 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2631 12:41:26.218107 Finalizing chipset.
2632 12:41:26.218194 apm_control: Finalizing SMM.
2633 12:41:26.221481 APMC done.
2634 12:41:26.225084 HECI: CSE device 16.1 is disabled
2635 12:41:26.228350 HECI: CSE device 16.2 is disabled
2636 12:41:26.231883 HECI: CSE device 16.3 is disabled
2637 12:41:26.234877 HECI: CSE device 16.4 is disabled
2638 12:41:26.238402 HECI: CSE device 16.5 is disabled
2639 12:41:26.241287 HECI: Sending End-of-Post
2640 12:41:26.249801 CSE: EOP requested action: continue boot
2641 12:41:26.253271 CSE EOP successful, continuing boot
2642 12:41:26.260077 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2643 12:41:26.263174 mp_park_aps done after 0 msecs.
2644 12:41:26.266578 Jumping to boot code at 0x30000000(0x76891000)
2645 12:41:26.276435 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2646 12:41:26.280494
2647 12:41:26.280581
2648 12:41:26.280666
2649 12:41:26.283773 Starting depthcharge on Volmar...
2650 12:41:26.283859
2651 12:41:26.284254 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2652 12:41:26.284366 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2653 12:41:26.284459 Setting prompt string to ['brya:']
2654 12:41:26.284555 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2655 12:41:26.290300 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2656 12:41:26.290387
2657 12:41:26.296995 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2658 12:41:26.297078
2659 12:41:26.303509 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2660 12:41:26.303584
2661 12:41:26.306951 configure_storage: Failed to remap 1C:2
2662 12:41:26.307052
2663 12:41:26.310434 Wipe memory regions:
2664 12:41:26.310505
2665 12:41:26.313517 [0x00000000001000, 0x000000000a0000)
2666 12:41:26.313588
2667 12:41:26.316757 [0x00000000100000, 0x00000030000000)
2668 12:41:26.427159
2669 12:41:26.430101 [0x00000032668e60, 0x00000076857000)
2670 12:41:26.581860
2671 12:41:26.585461 [0x00000100000000, 0x0000027fc00000)
2672 12:41:27.441681
2673 12:41:27.445138 ec_init: CrosEC protocol v3 supported (256, 256)
2674 12:41:28.054337
2675 12:41:28.054892 R8152: Initializing
2676 12:41:28.055267
2677 12:41:28.057464 Version 9 (ocp_data = 6010)
2678 12:41:28.058077
2679 12:41:28.060609 R8152: Done initializing
2680 12:41:28.061076
2681 12:41:28.063956 Adding net device
2682 12:41:28.364778
2683 12:41:28.367935 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2684 12:41:28.368245
2685 12:41:28.368485
2686 12:41:28.368710
2687 12:41:28.369278 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2689 12:41:28.470086 brya: tftpboot 192.168.201.1 12437377/tftp-deploy-uvrdbu8x/kernel/bzImage 12437377/tftp-deploy-uvrdbu8x/kernel/cmdline 12437377/tftp-deploy-uvrdbu8x/ramdisk/ramdisk.cpio.gz
2690 12:41:28.470667 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2691 12:41:28.471080 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2692 12:41:28.475532 tftpboot 192.168.201.1 12437377/tftp-deploy-uvrdbu8x/kernel/bzImaploy-uvrdbu8x/kernel/cmdline 12437377/tftp-deploy-uvrdbu8x/ramdisk/ramdisk.cpio.gz
2693 12:41:28.476085
2694 12:41:28.476431 Waiting for link
2695 12:41:28.677858
2696 12:41:28.678146 done.
2697 12:41:28.678313
2698 12:41:28.678466 MAC: 00:e0:4c:68:01:8f
2699 12:41:28.678612
2700 12:41:28.680899 Sending DHCP discover... done.
2701 12:41:28.681097
2702 12:41:28.684556 Waiting for reply... done.
2703 12:41:28.684760
2704 12:41:28.687771 Sending DHCP request... done.
2705 12:41:28.687976
2706 12:41:28.814376 Waiting for reply... done.
2707 12:41:28.814870
2708 12:41:28.815210 My ip is 192.168.201.28
2709 12:41:28.815524
2710 12:41:28.817666 The DHCP server ip is 192.168.201.1
2711 12:41:28.821384
2712 12:41:28.824423 TFTP server IP predefined by user: 192.168.201.1
2713 12:41:28.824852
2714 12:41:28.830756 Bootfile predefined by user: 12437377/tftp-deploy-uvrdbu8x/kernel/bzImage
2715 12:41:28.831247
2716 12:41:28.834098 Sending tftp read request... done.
2717 12:41:28.834404
2718 12:41:28.840554 Waiting for the transfer...
2719 12:41:28.840870
2720 12:41:29.084956 00000000 ################################################################
2721 12:41:29.085093
2722 12:41:29.332260 00080000 ################################################################
2723 12:41:29.332398
2724 12:41:29.574285 00100000 ################################################################
2725 12:41:29.574424
2726 12:41:29.833319 00180000 ################################################################
2727 12:41:29.833458
2728 12:41:30.083548 00200000 ################################################################
2729 12:41:30.083707
2730 12:41:30.356408 00280000 ################################################################
2731 12:41:30.356575
2732 12:41:30.605955 00300000 ################################################################
2733 12:41:30.606099
2734 12:41:30.863851 00380000 ################################################################
2735 12:41:30.863982
2736 12:41:31.120957 00400000 ################################################################
2737 12:41:31.121090
2738 12:41:31.384528 00480000 ################################################################
2739 12:41:31.384681
2740 12:41:31.648439 00500000 ################################################################
2741 12:41:31.648571
2742 12:41:31.924036 00580000 ################################################################
2743 12:41:31.924172
2744 12:41:32.197639 00600000 ################################################################
2745 12:41:32.197773
2746 12:41:32.462566 00680000 ################################################################
2747 12:41:32.462702
2748 12:41:32.711328 00700000 ################################################################
2749 12:41:32.711458
2750 12:41:32.974951 00780000 ################################################################
2751 12:41:32.975093
2752 12:41:33.068025 00800000 ######################## done.
2753 12:41:33.068141
2754 12:41:33.071475 The bootfile was 8585104 bytes long.
2755 12:41:33.071566
2756 12:41:33.074978 Sending tftp read request... done.
2757 12:41:33.075103
2758 12:41:33.077899 Waiting for the transfer...
2759 12:41:33.078014
2760 12:41:33.325855 00000000 ################################################################
2761 12:41:33.326028
2762 12:41:33.579332 00080000 ################################################################
2763 12:41:33.579465
2764 12:41:33.838945 00100000 ################################################################
2765 12:41:33.839081
2766 12:41:34.092792 00180000 ################################################################
2767 12:41:34.092930
2768 12:41:34.337262 00200000 ################################################################
2769 12:41:34.337393
2770 12:41:34.588268 00280000 ################################################################
2771 12:41:34.588421
2772 12:41:34.857490 00300000 ################################################################
2773 12:41:34.857633
2774 12:41:35.100097 00380000 ################################################################
2775 12:41:35.100235
2776 12:41:35.382431 00400000 ################################################################
2777 12:41:35.382571
2778 12:41:35.648229 00480000 ################################################################
2779 12:41:35.648361
2780 12:41:35.916819 00500000 ################################################################ done.
2781 12:41:35.916948
2782 12:41:35.920475 Sending tftp read request... done.
2783 12:41:35.920567
2784 12:41:35.923445 Waiting for the transfer...
2785 12:41:35.923534
2786 12:41:35.927131 00000000 # done.
2787 12:41:35.927228
2788 12:41:35.937035 Command line loaded dynamically from TFTP file: 12437377/tftp-deploy-uvrdbu8x/kernel/cmdline
2789 12:41:35.937147
2790 12:41:35.960107 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12437377/extract-nfsrootfs-9rkrq6i0,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2791 12:41:35.966509
2792 12:41:35.969786 Shutting down all USB controllers.
2793 12:41:35.970114
2794 12:41:35.970351 Removing current net device
2795 12:41:35.970573
2796 12:41:35.973262 Finalizing coreboot
2797 12:41:35.973653
2798 12:41:35.979976 Exiting depthcharge with code 4 at timestamp: 20101292
2799 12:41:35.980552
2800 12:41:35.981206
2801 12:41:35.981536 Starting kernel ...
2802 12:41:35.981937
2803 12:41:35.982307
2804 12:41:35.983417 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2805 12:41:35.983895 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2806 12:41:35.984261 Setting prompt string to ['Linux version [0-9]']
2807 12:41:35.984697 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2808 12:41:35.985048 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2810 12:46:06.984869 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2812 12:46:06.986011 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2814 12:46:06.986852 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2817 12:46:06.988290 end: 2 depthcharge-action (duration 00:05:00) [common]
2819 12:46:06.989447 Cleaning after the job
2820 12:46:06.989554 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437377/tftp-deploy-uvrdbu8x/ramdisk
2821 12:46:06.990401 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437377/tftp-deploy-uvrdbu8x/kernel
2822 12:46:06.991421 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437377/tftp-deploy-uvrdbu8x/nfsrootfs
2823 12:46:07.048009 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437377/tftp-deploy-uvrdbu8x/modules
2824 12:46:07.048435 start: 5.1 power-off (timeout 00:00:30) [common]
2825 12:46:07.048609 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=off'
2826 12:46:07.125531 >> Command sent successfully.
2827 12:46:07.129602 Returned 0 in 0 seconds
2828 12:46:07.230465 end: 5.1 power-off (duration 00:00:00) [common]
2830 12:46:07.231954 start: 5.2 read-feedback (timeout 00:10:00) [common]
2831 12:46:07.233246 Listened to connection for namespace 'common' for up to 1s
2833 12:46:07.234643 Listened to connection for namespace 'common' for up to 1s
2834 12:46:08.234006 Finalising connection for namespace 'common'
2835 12:46:08.234873 Disconnecting from shell: Finalise
2836 12:46:08.235297
2837 12:46:08.336321 end: 5.2 read-feedback (duration 00:00:01) [common]
2838 12:46:08.336964 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12437377
2839 12:46:08.591256 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12437377
2840 12:46:08.591449 JobError: Your job cannot terminate cleanly.