Boot log: dell-latitude-5400-8665U-sarien
- Kernel Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:40:14.583858 lava-dispatcher, installed at version: 2023.10
2 12:40:14.584087 start: 0 validate
3 12:40:14.584222 Start time: 2024-01-03 12:40:14.584214+00:00 (UTC)
4 12:40:14.584344 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:14.584478 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:40:14.852963 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:14.853168 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:15.120566 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:15.121227 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:40:15.384876 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:40:15.385553 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:40:15.657850 validate duration: 1.07
14 12:40:15.658212 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:40:15.658348 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:40:15.658468 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:40:15.658632 Not decompressing ramdisk as can be used compressed.
18 12:40:15.658746 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 12:40:15.658833 saving as /var/lib/lava/dispatcher/tmp/12437369/tftp-deploy-iou58a26/ramdisk/initrd.cpio.gz
20 12:40:15.658920 total size: 5432690 (5 MB)
21 12:40:15.660336 progress 0 % (0 MB)
22 12:40:15.662762 progress 5 % (0 MB)
23 12:40:15.664919 progress 10 % (0 MB)
24 12:40:15.667034 progress 15 % (0 MB)
25 12:40:15.669468 progress 20 % (1 MB)
26 12:40:15.671622 progress 25 % (1 MB)
27 12:40:15.673762 progress 30 % (1 MB)
28 12:40:15.676110 progress 35 % (1 MB)
29 12:40:15.678278 progress 40 % (2 MB)
30 12:40:15.680412 progress 45 % (2 MB)
31 12:40:15.682489 progress 50 % (2 MB)
32 12:40:15.684853 progress 55 % (2 MB)
33 12:40:15.686920 progress 60 % (3 MB)
34 12:40:15.688760 progress 65 % (3 MB)
35 12:40:15.690841 progress 70 % (3 MB)
36 12:40:15.692652 progress 75 % (3 MB)
37 12:40:15.694303 progress 80 % (4 MB)
38 12:40:15.695955 progress 85 % (4 MB)
39 12:40:15.697697 progress 90 % (4 MB)
40 12:40:15.699214 progress 95 % (4 MB)
41 12:40:15.700732 progress 100 % (5 MB)
42 12:40:15.700959 5 MB downloaded in 0.04 s (123.24 MB/s)
43 12:40:15.701127 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:40:15.701387 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:40:15.701478 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:40:15.701567 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:40:15.701721 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:40:15.701796 saving as /var/lib/lava/dispatcher/tmp/12437369/tftp-deploy-iou58a26/kernel/bzImage
50 12:40:15.701858 total size: 8585104 (8 MB)
51 12:40:15.701918 No compression specified
52 12:40:15.703021 progress 0 % (0 MB)
53 12:40:15.705395 progress 5 % (0 MB)
54 12:40:15.707770 progress 10 % (0 MB)
55 12:40:15.710035 progress 15 % (1 MB)
56 12:40:15.712337 progress 20 % (1 MB)
57 12:40:15.714636 progress 25 % (2 MB)
58 12:40:15.716947 progress 30 % (2 MB)
59 12:40:15.719204 progress 35 % (2 MB)
60 12:40:15.721532 progress 40 % (3 MB)
61 12:40:15.723912 progress 45 % (3 MB)
62 12:40:15.726209 progress 50 % (4 MB)
63 12:40:15.728706 progress 55 % (4 MB)
64 12:40:15.731068 progress 60 % (4 MB)
65 12:40:15.733450 progress 65 % (5 MB)
66 12:40:15.735704 progress 70 % (5 MB)
67 12:40:15.737998 progress 75 % (6 MB)
68 12:40:15.740277 progress 80 % (6 MB)
69 12:40:15.742487 progress 85 % (6 MB)
70 12:40:15.744762 progress 90 % (7 MB)
71 12:40:15.746995 progress 95 % (7 MB)
72 12:40:15.749294 progress 100 % (8 MB)
73 12:40:15.749554 8 MB downloaded in 0.05 s (171.68 MB/s)
74 12:40:15.749710 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:40:15.749942 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:40:15.750027 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:40:15.750115 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:40:15.750253 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 12:40:15.750320 saving as /var/lib/lava/dispatcher/tmp/12437369/tftp-deploy-iou58a26/nfsrootfs/full.rootfs.tar
81 12:40:15.750381 total size: 133380384 (127 MB)
82 12:40:15.750443 Using unxz to decompress xz
83 12:40:15.754475 progress 0 % (0 MB)
84 12:40:16.138266 progress 5 % (6 MB)
85 12:40:16.514498 progress 10 % (12 MB)
86 12:40:16.827655 progress 15 % (19 MB)
87 12:40:17.026916 progress 20 % (25 MB)
88 12:40:17.283582 progress 25 % (31 MB)
89 12:40:17.678722 progress 30 % (38 MB)
90 12:40:18.049068 progress 35 % (44 MB)
91 12:40:18.472264 progress 40 % (50 MB)
92 12:40:18.876334 progress 45 % (57 MB)
93 12:40:19.250918 progress 50 % (63 MB)
94 12:40:19.685839 progress 55 % (69 MB)
95 12:40:20.076959 progress 60 % (76 MB)
96 12:40:20.463501 progress 65 % (82 MB)
97 12:40:20.846691 progress 70 % (89 MB)
98 12:40:21.246864 progress 75 % (95 MB)
99 12:40:21.725684 progress 80 % (101 MB)
100 12:40:22.189618 progress 85 % (108 MB)
101 12:40:22.492338 progress 90 % (114 MB)
102 12:40:22.876808 progress 95 % (120 MB)
103 12:40:23.304928 progress 100 % (127 MB)
104 12:40:23.310808 127 MB downloaded in 7.56 s (16.82 MB/s)
105 12:40:23.311173 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:40:23.311694 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:40:23.311832 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:40:23.312022 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:40:23.312267 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:40:23.312363 saving as /var/lib/lava/dispatcher/tmp/12437369/tftp-deploy-iou58a26/modules/modules.tar
112 12:40:23.312483 total size: 253660 (0 MB)
113 12:40:23.312617 Using unxz to decompress xz
114 12:40:23.317659 progress 12 % (0 MB)
115 12:40:23.318154 progress 25 % (0 MB)
116 12:40:23.318456 progress 38 % (0 MB)
117 12:40:23.320187 progress 51 % (0 MB)
118 12:40:23.322604 progress 64 % (0 MB)
119 12:40:23.324835 progress 77 % (0 MB)
120 12:40:23.326885 progress 90 % (0 MB)
121 12:40:23.329387 progress 100 % (0 MB)
122 12:40:23.336013 0 MB downloaded in 0.02 s (10.29 MB/s)
123 12:40:23.336414 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:40:23.336866 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:40:23.337006 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 12:40:23.337153 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 12:40:25.726737 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12437369/extract-nfsrootfs-lxfn6pfw
129 12:40:25.726954 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 12:40:25.727086 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 12:40:25.727312 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr
132 12:40:25.727573 makedir: /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin
133 12:40:25.728160 makedir: /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/tests
134 12:40:25.728300 makedir: /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/results
135 12:40:25.728440 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-add-keys
136 12:40:25.728627 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-add-sources
137 12:40:25.728763 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-background-process-start
138 12:40:25.728903 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-background-process-stop
139 12:40:25.729066 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-common-functions
140 12:40:25.729236 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-echo-ipv4
141 12:40:25.729423 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-install-packages
142 12:40:25.729685 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-installed-packages
143 12:40:25.729852 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-os-build
144 12:40:25.730015 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-probe-channel
145 12:40:25.730204 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-probe-ip
146 12:40:25.730364 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-target-ip
147 12:40:25.730524 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-target-mac
148 12:40:25.730685 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-target-storage
149 12:40:25.730817 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-test-case
150 12:40:25.730952 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-test-event
151 12:40:25.731135 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-test-feedback
152 12:40:25.731306 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-test-raise
153 12:40:25.731507 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-test-reference
154 12:40:25.731722 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-test-runner
155 12:40:25.731925 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-test-set
156 12:40:25.732051 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-test-shell
157 12:40:25.732292 Updating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-install-packages (oe)
158 12:40:25.733682 Updating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/bin/lava-installed-packages (oe)
159 12:40:25.733883 Creating /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/environment
160 12:40:25.733984 LAVA metadata
161 12:40:25.734090 - LAVA_JOB_ID=12437369
162 12:40:25.734184 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:40:25.734353 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 12:40:25.734449 skipped lava-vland-overlay
165 12:40:25.734562 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:40:25.734686 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 12:40:25.734771 skipped lava-multinode-overlay
168 12:40:25.734879 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:40:25.734974 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 12:40:25.735100 Loading test definitions
171 12:40:25.735255 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 12:40:25.735356 Using /lava-12437369 at stage 0
173 12:40:25.736112 uuid=12437369_1.5.2.3.1 testdef=None
174 12:40:25.736284 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 12:40:25.736445 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 12:40:25.737136 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 12:40:25.737494 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 12:40:25.738446 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 12:40:25.738821 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 12:40:25.740961 runner path: /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/0/tests/0_dmesg test_uuid 12437369_1.5.2.3.1
183 12:40:25.741192 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 12:40:25.741570 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 12:40:25.741674 Using /lava-12437369 at stage 1
187 12:40:25.742118 uuid=12437369_1.5.2.3.5 testdef=None
188 12:40:25.742236 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 12:40:25.742321 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 12:40:25.743051 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 12:40:25.743473 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 12:40:25.745786 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 12:40:25.746208 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 12:40:25.747142 runner path: /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/1/tests/1_bootrr test_uuid 12437369_1.5.2.3.5
197 12:40:25.747367 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 12:40:25.747744 Creating lava-test-runner.conf files
200 12:40:25.747828 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/0 for stage 0
201 12:40:25.747920 - 0_dmesg
202 12:40:25.748013 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437369/lava-overlay-3gv3ynrr/lava-12437369/1 for stage 1
203 12:40:25.748123 - 1_bootrr
204 12:40:25.748218 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 12:40:25.748334 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 12:40:25.758520 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 12:40:25.758725 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 12:40:25.758855 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:40:25.758995 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 12:40:25.759144 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 12:40:25.911761 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:40:25.912391 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 12:40:25.912630 extracting modules file /var/lib/lava/dispatcher/tmp/12437369/tftp-deploy-iou58a26/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437369/extract-nfsrootfs-lxfn6pfw
214 12:40:25.941739 extracting modules file /var/lib/lava/dispatcher/tmp/12437369/tftp-deploy-iou58a26/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437369/extract-overlay-ramdisk-ytuifn19/ramdisk
215 12:40:25.965833 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:40:25.966026 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 12:40:25.966157 [common] Applying overlay to NFS
218 12:40:25.966258 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437369/compress-overlay-52ytkdfp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12437369/extract-nfsrootfs-lxfn6pfw
219 12:40:25.976775 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 12:40:25.976941 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 12:40:25.977037 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:40:25.977128 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 12:40:25.977217 Building ramdisk /var/lib/lava/dispatcher/tmp/12437369/extract-overlay-ramdisk-ytuifn19/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12437369/extract-overlay-ramdisk-ytuifn19/ramdisk
224 12:40:26.054383 >> 26197 blocks
225 12:40:26.658791 rename /var/lib/lava/dispatcher/tmp/12437369/extract-overlay-ramdisk-ytuifn19/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12437369/tftp-deploy-iou58a26/ramdisk/ramdisk.cpio.gz
226 12:40:26.659251 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:40:26.659384 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 12:40:26.659497 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 12:40:26.659594 No mkimage arch provided, not using FIT.
230 12:40:26.659701 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:40:26.659794 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:40:26.659909 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 12:40:26.660005 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 12:40:26.660091 No LXC device requested
235 12:40:26.660168 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:40:26.660260 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 12:40:26.660346 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:40:26.660426 Checking files for TFTP limit of 4294967296 bytes.
239 12:40:26.660865 end: 1 tftp-deploy (duration 00:00:11) [common]
240 12:40:26.660967 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:40:26.661057 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:40:26.661188 substitutions:
243 12:40:26.661255 - {DTB}: None
244 12:40:26.661318 - {INITRD}: 12437369/tftp-deploy-iou58a26/ramdisk/ramdisk.cpio.gz
245 12:40:26.661386 - {KERNEL}: 12437369/tftp-deploy-iou58a26/kernel/bzImage
246 12:40:26.661444 - {LAVA_MAC}: None
247 12:40:26.661501 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12437369/extract-nfsrootfs-lxfn6pfw
248 12:40:26.661566 - {NFS_SERVER_IP}: 192.168.201.1
249 12:40:26.661623 - {PRESEED_CONFIG}: None
250 12:40:26.661678 - {PRESEED_LOCAL}: None
251 12:40:26.661733 - {RAMDISK}: 12437369/tftp-deploy-iou58a26/ramdisk/ramdisk.cpio.gz
252 12:40:26.661793 - {ROOT_PART}: None
253 12:40:26.661849 - {ROOT}: None
254 12:40:26.661904 - {SERVER_IP}: 192.168.201.1
255 12:40:26.661958 - {TEE}: None
256 12:40:26.662018 Parsed boot commands:
257 12:40:26.662073 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:40:26.662256 Parsed boot commands: tftpboot 192.168.201.1 12437369/tftp-deploy-iou58a26/kernel/bzImage 12437369/tftp-deploy-iou58a26/kernel/cmdline 12437369/tftp-deploy-iou58a26/ramdisk/ramdisk.cpio.gz
259 12:40:26.662345 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:40:26.662431 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:40:26.662537 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:40:26.662623 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:40:26.662695 Not connected, no need to disconnect.
264 12:40:26.662776 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:40:26.662860 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:40:26.662933 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-2'
267 12:40:26.667130 Setting prompt string to ['lava-test: # ']
268 12:40:26.667540 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:40:26.667667 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:40:26.667776 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:40:26.667866 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:40:26.668251 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-2' '--port=1' '--command=reboot'
273 12:40:43.562226 >> Command sent successfully.
274 12:40:43.565037 Returned 0 in 16 seconds
275 12:40:43.665460 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
277 12:40:43.665910 end: 2.2.2 reset-device (duration 00:00:17) [common]
278 12:40:43.666050 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
279 12:40:43.666183 Setting prompt string to 'Starting depthcharge on sarien...'
280 12:40:43.666295 Changing prompt to 'Starting depthcharge on sarien...'
281 12:40:43.666396 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
282 12:40:43.666781 [Enter `^Ec?' for help]
283 12:40:43.666895
284 12:40:43.667020
285 12:40:43.667118 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
286 12:40:43.667226 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
287 12:40:43.667316 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
288 12:40:43.667417 CPU: AES supported, TXT supported, VT supported
289 12:40:43.667507 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
290 12:40:43.667596 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
291 12:40:43.667703 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
292 12:40:43.667764 VBOOT: Loading verstage.
293 12:40:43.667823 CBFS @ 1d00000 size 300000
294 12:40:43.667924 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
295 12:40:43.668012 CBFS: Locating 'fallback/verstage'
296 12:40:43.668110 CBFS: Found @ offset 10f6c0 size 1435c
297 12:40:43.668218
298 12:40:43.668312
299 12:40:43.668421 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
300 12:40:43.668509 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
301 12:40:43.668604 done! DID_VID 0x00281ae0
302 12:40:43.668682 TPM ready after 0 ms
303 12:40:43.668740 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
304 12:40:43.668799 tlcl_send_startup: Startup return code is 0
305 12:40:43.668882 TPM: setup succeeded
306 12:40:43.668958 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
307 12:40:43.669015 Checking cr50 for recovery request
308 12:40:43.669111 Phase 1
309 12:40:43.669197 FMAP: Found "FLASH" version 1.1 at 1c10000.
310 12:40:43.669290 FMAP: base = fe000000 size = 2000000 #areas = 37
311 12:40:43.669379 FMAP: area GBB found @ 1c11000 (978944 bytes)
312 12:40:43.669466 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
313 12:40:43.669556 Phase 2
314 12:40:43.669674 Phase 3
315 12:40:43.669775 FMAP: area GBB found @ 1c11000 (978944 bytes)
316 12:40:43.669864 VB2:vb2_report_dev_firmware() This is developer signed firmware
317 12:40:43.669950 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
318 12:40:43.670049 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
319 12:40:43.670136 VB2:vb2_verify_keyblock() Checking key block signature...
320 12:40:43.670243 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
321 12:40:43.670349 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
322 12:40:43.670448 VB2:vb2_verify_fw_preamble() Verifying preamble.
323 12:40:43.670536 Phase 4
324 12:40:43.670621 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
325 12:40:43.670719 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
326 12:40:43.670805 VB2:vb2_rsa_verify_digest() Digest check failed!
327 12:40:43.670912 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
328 12:40:43.671007 Saving nvdata
329 12:40:43.671095 Reboot requested (10020007)
330 12:40:43.671190 board_reset() called!
331 12:40:43.671275 full_reset() called!
332 12:40:47.863289
333 12:40:47.863453
334 12:40:47.871136 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
335 12:40:47.876330 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
336 12:40:47.880469 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
337 12:40:47.885998 CPU: AES supported, TXT supported, VT supported
338 12:40:47.890365 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
339 12:40:47.896484 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
340 12:40:47.900775 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
341 12:40:47.904871 VBOOT: Loading verstage.
342 12:40:47.907520 CBFS @ 1d00000 size 300000
343 12:40:47.913771 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
344 12:40:47.917696 CBFS: Locating 'fallback/verstage'
345 12:40:47.921810 CBFS: Found @ offset 10f6c0 size 1435c
346 12:40:47.935649
347 12:40:47.935755
348 12:40:47.944221 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
349 12:40:47.951273 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
350 12:40:47.954280 done! DID_VID 0x00281ae0
351 12:40:47.956391 TPM ready after 0 ms
352 12:40:47.960563 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
353 12:40:48.021027 tlcl_send_startup: Startup return code is 0
354 12:40:48.023157 TPM: setup succeeded
355 12:40:48.041440 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
356 12:40:48.046119 Checking cr50 for recovery request
357 12:40:48.054707 Phase 1
358 12:40:48.060168 FMAP: Found "FLASH" version 1.1 at 1c10000.
359 12:40:48.065180 FMAP: base = fe000000 size = 2000000 #areas = 37
360 12:40:48.069546 FMAP: area GBB found @ 1c11000 (978944 bytes)
361 12:40:48.076655 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
362 12:40:48.082590 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
363 12:40:48.085956 Recovery requested (1009000e)
364 12:40:48.087311 Saving nvdata
365 12:40:48.103935 tlcl_extend: response is 0
366 12:40:48.119629 tlcl_extend: response is 0
367 12:40:48.123498 CBFS @ 1d00000 size 300000
368 12:40:48.129495 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
369 12:40:48.132923 CBFS: Locating 'fallback/romstage'
370 12:40:48.136261 CBFS: Found @ offset 80 size 15b2c
371 12:40:48.137714
372 12:40:48.137994
373 12:40:48.145693 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
374 12:40:48.150815 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
375 12:40:48.155189 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
376 12:40:48.159338 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
377 12:40:48.164213 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
378 12:40:48.168356 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
379 12:40:48.170324 TCO_STS: 0000 0004
380 12:40:48.173039 GEN_PMCON: d0015209 00002200
381 12:40:48.176872 GBLRST_CAUSE: 00000000 00000000
382 12:40:48.178279 prev_sleep_state 5
383 12:40:48.182237 Boot Count incremented to 33843
384 12:40:48.185172 CBFS @ 1d00000 size 300000
385 12:40:48.192125 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
386 12:40:48.194885 CBFS: Locating 'fspm.bin'
387 12:40:48.198125 CBFS: Found @ offset 60fc0 size 70000
388 12:40:48.203649 FMAP: Found "FLASH" version 1.1 at 1c10000.
389 12:40:48.207988 FMAP: base = fe000000 size = 2000000 #areas = 37
390 12:40:48.214538 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
391 12:40:48.220180 Probing TPM I2C: done! DID_VID 0x00281ae0
392 12:40:48.223735 Locality already claimed
393 12:40:48.226848 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
394 12:40:48.246105 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
395 12:40:48.253228 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 12:40:48.254998 MRC cache found, size 18e0
397 12:40:48.257430 bootmode is set to :2
398 12:40:48.351247 CBMEM:
399 12:40:48.354724 IMD: root @ 89fff000 254 entries.
400 12:40:48.358804 IMD: root @ 89ffec00 62 entries.
401 12:40:48.360854 External stage cache:
402 12:40:48.364694 IMD: root @ 8abff000 254 entries.
403 12:40:48.367500 IMD: root @ 8abfec00 62 entries.
404 12:40:48.373216 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
405 12:40:48.376918 creating vboot_handoff structure
406 12:40:48.397843 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
407 12:40:48.414038 tlcl_write: response is 0
408 12:40:48.432191 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
409 12:40:48.436056 MRC: TPM MRC hash updated successfully.
410 12:40:48.437665 1 DIMMs found
411 12:40:48.440969 top_of_ram = 0x8a000000
412 12:40:48.445975 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
413 12:40:48.450523 MTRR Range: Start=ff000000 End=0 (Size 1000000)
414 12:40:48.453472 CBFS @ 1d00000 size 300000
415 12:40:48.459668 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
416 12:40:48.463539 CBFS: Locating 'fallback/postcar'
417 12:40:48.467410 CBFS: Found @ offset 107000 size 41a4
418 12:40:48.473151 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
419 12:40:48.483203 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
420 12:40:48.488381 Processing 126 relocs. Offset value of 0x87cdd000
421 12:40:48.491136
422 12:40:48.491223
423 12:40:48.499494 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
424 12:40:48.502774 CBFS @ 1d00000 size 300000
425 12:40:48.509449 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
426 12:40:48.512101 CBFS: Locating 'fallback/ramstage'
427 12:40:48.516409 CBFS: Found @ offset 458c0 size 1a8a8
428 12:40:48.523489 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
429 12:40:48.552558 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
430 12:40:48.557308 Processing 3754 relocs. Offset value of 0x88e81000
431 12:40:48.563165
432 12:40:48.563290
433 12:40:48.572216 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
434 12:40:48.575933 FMAP: Found "FLASH" version 1.1 at 1c10000.
435 12:40:48.580699 FMAP: base = fe000000 size = 2000000 #areas = 37
436 12:40:48.586108 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
437 12:40:48.590520 WARNING: RO_VPD is uninitialized or empty.
438 12:40:48.595248 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
439 12:40:48.599930 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
440 12:40:48.601193 Normal boot.
441 12:40:48.607454 BS: BS_PRE_DEVICE times (us): entry 0 run 59 exit 1161
442 12:40:48.610708 CBFS @ 1d00000 size 300000
443 12:40:48.616621 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
444 12:40:48.620669 CBFS: Locating 'cpu_microcode_blob.bin'
445 12:40:48.624803 CBFS: Found @ offset 15c40 size 2fc00
446 12:40:48.629750 microcode: sig=0x806ec pf=0x80 revision=0xb7
447 12:40:48.631821 Skip microcode update
448 12:40:48.634646 CBFS @ 1d00000 size 300000
449 12:40:48.640531 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
450 12:40:48.642681 CBFS: Locating 'fsps.bin'
451 12:40:48.646869 CBFS: Found @ offset d1fc0 size 35000
452 12:40:48.681647 Detected 4 core, 8 thread CPU.
453 12:40:48.683555 Setting up SMI for CPU
454 12:40:48.686930 IED base = 0x8ac00000
455 12:40:48.688699 IED size = 0x00400000
456 12:40:48.691276 Will perform SMM setup.
457 12:40:48.696266 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
458 12:40:48.703772 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
459 12:40:48.709157 Processing 16 relocs. Offset value of 0x00030000
460 12:40:48.712032 Attempting to start 7 APs
461 12:40:48.715626 Waiting for 10ms after sending INIT.
462 12:40:48.730928 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
463 12:40:48.732188 done.
464 12:40:48.734097 AP: slot 4 apic_id 7.
465 12:40:48.736429 AP: slot 5 apic_id 6.
466 12:40:48.738429 AP: slot 6 apic_id 5.
467 12:40:48.741338 AP: slot 7 apic_id 4.
468 12:40:48.743579 AP: slot 3 apic_id 2.
469 12:40:48.745494 AP: slot 1 apic_id 3.
470 12:40:48.749431 Waiting for 2nd SIPI to complete...done.
471 12:40:48.756791 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
472 12:40:48.762427 Processing 13 relocs. Offset value of 0x00038000
473 12:40:48.768922 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
474 12:40:48.772285 Installing SMM handler to 0x8a000000
475 12:40:48.780699 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
476 12:40:48.785977 Processing 867 relocs. Offset value of 0x8a010000
477 12:40:48.794568 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
478 12:40:48.799178 Processing 13 relocs. Offset value of 0x8a008000
479 12:40:48.804751 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
480 12:40:48.810314 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
481 12:40:48.816296 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
482 12:40:48.822123 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
483 12:40:48.827478 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
484 12:40:48.833057 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
485 12:40:48.838421 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
486 12:40:48.845251 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
487 12:40:48.848901 Clearing SMI status registers
488 12:40:48.850447 SMI_STS: PM1
489 12:40:48.852106 PM1_STS: WAK PWRBTN
490 12:40:48.855551 TCO_STS: BOOT SECOND_TO
491 12:40:48.857074 GPE0 STD STS: eSPI
492 12:40:48.859521 New SMBASE 0x8a000000
493 12:40:48.862374 In relocation handler: CPU 0
494 12:40:48.866599 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
495 12:40:48.871108 Writing SMRR. base = 0x8a000006, mask=0xff000800
496 12:40:48.872933 Relocation complete.
497 12:40:48.876334 New SMBASE 0x89fff800
498 12:40:48.878362 In relocation handler: CPU 2
499 12:40:48.883240 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
500 12:40:48.888028 Writing SMRR. base = 0x8a000006, mask=0xff000800
501 12:40:48.889429 Relocation complete.
502 12:40:48.892103 New SMBASE 0x89fff000
503 12:40:48.894795 In relocation handler: CPU 4
504 12:40:48.899201 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
505 12:40:48.903559 Writing SMRR. base = 0x8a000006, mask=0xff000800
506 12:40:48.905987 Relocation complete.
507 12:40:48.908416 New SMBASE 0x89ffec00
508 12:40:48.911412 In relocation handler: CPU 5
509 12:40:48.915529 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
510 12:40:48.919819 Writing SMRR. base = 0x8a000006, mask=0xff000800
511 12:40:48.922333 Relocation complete.
512 12:40:48.924329 New SMBASE 0x89ffe400
513 12:40:48.927091 In relocation handler: CPU 7
514 12:40:48.932084 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
515 12:40:48.936328 Writing SMRR. base = 0x8a000006, mask=0xff000800
516 12:40:48.938255 Relocation complete.
517 12:40:48.940903 New SMBASE 0x89ffe800
518 12:40:48.944352 In relocation handler: CPU 6
519 12:40:48.948187 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
520 12:40:48.953141 Writing SMRR. base = 0x8a000006, mask=0xff000800
521 12:40:48.954537 Relocation complete.
522 12:40:48.957804 New SMBASE 0x89fff400
523 12:40:48.960485 In relocation handler: CPU 3
524 12:40:48.964407 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
525 12:40:48.968958 Writing SMRR. base = 0x8a000006, mask=0xff000800
526 12:40:48.971107 Relocation complete.
527 12:40:48.974135 New SMBASE 0x89fffc00
528 12:40:48.976284 In relocation handler: CPU 1
529 12:40:48.980783 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
530 12:40:48.986092 Writing SMRR. base = 0x8a000006, mask=0xff000800
531 12:40:48.987096 Relocation complete.
532 12:40:48.989828 Initializing CPU #0
533 12:40:48.992467 CPU: vendor Intel device 806ec
534 12:40:48.997070 CPU: family 06, model 8e, stepping 0c
535 12:40:48.998896 Clearing out pending MCEs
536 12:40:49.004273 Setting up local APIC... apic_id: 0x00 done.
537 12:40:49.006545 Turbo is available but hidden
538 12:40:49.009345 Turbo has been enabled
539 12:40:49.011660 VMX status: enabled
540 12:40:49.015089 IA32_FEATURE_CONTROL status: locked
541 12:40:49.016706 Skip microcode update
542 12:40:49.018810 CPU #0 initialized
543 12:40:49.021509 Initializing CPU #2
544 12:40:49.022845 Initializing CPU #6
545 12:40:49.025895 Initializing CPU #7
546 12:40:49.028638 CPU: vendor Intel device 806ec
547 12:40:49.031792 CPU: family 06, model 8e, stepping 0c
548 12:40:49.035511 CPU: vendor Intel device 806ec
549 12:40:49.039545 CPU: family 06, model 8e, stepping 0c
550 12:40:49.041736 Clearing out pending MCEs
551 12:40:49.044418 Clearing out pending MCEs
552 12:40:49.048508 Setting up local APIC...Initializing CPU #4
553 12:40:49.050583 Initializing CPU #5
554 12:40:49.054247 CPU: vendor Intel device 806ec
555 12:40:49.057342 CPU: family 06, model 8e, stepping 0c
556 12:40:49.061032 CPU: vendor Intel device 806ec
557 12:40:49.064997 CPU: family 06, model 8e, stepping 0c
558 12:40:49.067829 Clearing out pending MCEs
559 12:40:49.069895 Clearing out pending MCEs
560 12:40:49.074112 Setting up local APIC...Initializing CPU #1
561 12:40:49.076180 Initializing CPU #3
562 12:40:49.079312 CPU: vendor Intel device 806ec
563 12:40:49.083078 CPU: family 06, model 8e, stepping 0c
564 12:40:49.086435 CPU: vendor Intel device 806ec
565 12:40:49.090274 CPU: family 06, model 8e, stepping 0c
566 12:40:49.092919 Clearing out pending MCEs
567 12:40:49.095873 Clearing out pending MCEs
568 12:40:49.099614 Setting up local APIC... apic_id: 0x07 done.
569 12:40:49.103962 Setting up local APIC... apic_id: 0x05 done.
570 12:40:49.108445 Setting up local APIC...VMX status: enabled
571 12:40:49.111611 apic_id: 0x06 done.
572 12:40:49.114634 IA32_FEATURE_CONTROL status: locked
573 12:40:49.116535 VMX status: enabled
574 12:40:49.118839 Skip microcode update
575 12:40:49.121903 IA32_FEATURE_CONTROL status: locked
576 12:40:49.124056 CPU #4 initialized
577 12:40:49.126786 Skip microcode update
578 12:40:49.128851 apic_id: 0x03 done.
579 12:40:49.134048 Setting up local APIC...CPU: vendor Intel device 806ec
580 12:40:49.137468 CPU: family 06, model 8e, stepping 0c
581 12:40:49.140285 Clearing out pending MCEs
582 12:40:49.143031 VMX status: enabled
583 12:40:49.145187 apic_id: 0x04 done.
584 12:40:49.148602 IA32_FEATURE_CONTROL status: locked
585 12:40:49.150031 VMX status: enabled
586 12:40:49.153108 Skip microcode update
587 12:40:49.156392 IA32_FEATURE_CONTROL status: locked
588 12:40:49.158179 CPU #6 initialized
589 12:40:49.160565 Skip microcode update
590 12:40:49.162479 CPU #5 initialized
591 12:40:49.164008 CPU #7 initialized
592 12:40:49.165986 VMX status: enabled
593 12:40:49.168169 apic_id: 0x02 done.
594 12:40:49.171479 IA32_FEATURE_CONTROL status: locked
595 12:40:49.174232 VMX status: enabled
596 12:40:49.176267 Skip microcode update
597 12:40:49.180158 IA32_FEATURE_CONTROL status: locked
598 12:40:49.181783 CPU #1 initialized
599 12:40:49.184235 Skip microcode update
600 12:40:49.188911 Setting up local APIC...CPU #3 initialized
601 12:40:49.190303 apic_id: 0x01 done.
602 12:40:49.192820 VMX status: enabled
603 12:40:49.196502 IA32_FEATURE_CONTROL status: locked
604 12:40:49.198090 Skip microcode update
605 12:40:49.200189 CPU #2 initialized
606 12:40:49.205159 bsp_do_flight_plan done after 451 msecs.
607 12:40:49.207461 CPU: frequency set to 4800 MHz
608 12:40:49.208985 Enabling SMIs.
609 12:40:49.211060 Locking SMM.
610 12:40:49.213628 CBFS @ 1d00000 size 300000
611 12:40:49.220518 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
612 12:40:49.222498 CBFS: Locating 'vbt.bin'
613 12:40:49.226417 CBFS: Found @ offset 60a40 size 4a0
614 12:40:49.231263 Found a VBT of 4608 bytes after decompression
615 12:40:49.244450 FMAP: area GBB found @ 1c11000 (978944 bytes)
616 12:40:49.305079 Detected 4 core, 8 thread CPU.
617 12:40:49.308503 Detected 4 core, 8 thread CPU.
618 12:40:49.535207 Display FSP Version Info HOB
619 12:40:49.538844 Reference Code - CPU = 7.0.5e.40
620 12:40:49.540895 uCode Version = 0.0.0.b8
621 12:40:49.543731 Display FSP Version Info HOB
622 12:40:49.546961 Reference Code - ME = 7.0.5e.40
623 12:40:49.549828 MEBx version = 0.0.0.0
624 12:40:49.553126 ME Firmware Version = Consumer SKU
625 12:40:49.555680 Display FSP Version Info HOB
626 12:40:49.559254 Reference Code - CNL PCH = 7.0.5e.40
627 12:40:49.562092 PCH-CRID Status = Disabled
628 12:40:49.566006 CNL PCH H A0 Hsio Version = 2.0.0.0
629 12:40:49.570052 CNL PCH H Ax Hsio Version = 9.0.0.0
630 12:40:49.573181 CNL PCH H Bx Hsio Version = a.0.0.0
631 12:40:49.576450 CNL PCH LP B0 Hsio Version = 7.0.0.0
632 12:40:49.580278 CNL PCH LP Bx Hsio Version = 6.0.0.0
633 12:40:49.584051 CNL PCH LP Dx Hsio Version = 7.0.0.0
634 12:40:49.586893 Display FSP Version Info HOB
635 12:40:49.591521 Reference Code - SA - System Agent = 7.0.5e.40
636 12:40:49.594574 Reference Code - MRC = 0.7.1.68
637 12:40:49.598075 SA - PCIe Version = 7.0.5e.40
638 12:40:49.600244 SA-CRID Status = Disabled
639 12:40:49.604749 SA-CRID Original Value = 0.0.0.c
640 12:40:49.607298 SA-CRID New Value = 0.0.0.c
641 12:40:49.625034 RTC Init
642 12:40:49.629192 Set power off after power failure.
643 12:40:49.631703 Disabling Deep S3
644 12:40:49.632635 Disabling Deep S3
645 12:40:49.635284 Disabling Deep S4
646 12:40:49.637176 Disabling Deep S4
647 12:40:49.638085 Disabling Deep S5
648 12:40:49.640608 Disabling Deep S5
649 12:40:49.647371 BS: BS_DEV_INIT_CHIPS times (us): entry 602729 run 413444 exit 16238
650 12:40:49.649067 Enumerating buses...
651 12:40:49.653362 Show all devs... Before device enumeration.
652 12:40:49.656260 Root Device: enabled 1
653 12:40:49.658931 CPU_CLUSTER: 0: enabled 1
654 12:40:49.660744 DOMAIN: 0000: enabled 1
655 12:40:49.662682 APIC: 00: enabled 1
656 12:40:49.665691 PCI: 00:00.0: enabled 1
657 12:40:49.668018 PCI: 00:02.0: enabled 1
658 12:40:49.670792 PCI: 00:04.0: enabled 1
659 12:40:49.672637 PCI: 00:12.0: enabled 1
660 12:40:49.675134 PCI: 00:12.5: enabled 0
661 12:40:49.677992 PCI: 00:12.6: enabled 0
662 12:40:49.679835 PCI: 00:13.0: enabled 0
663 12:40:49.682200 PCI: 00:14.0: enabled 1
664 12:40:49.684802 PCI: 00:14.1: enabled 0
665 12:40:49.687286 PCI: 00:14.3: enabled 1
666 12:40:49.690293 PCI: 00:14.5: enabled 0
667 12:40:49.692494 PCI: 00:15.0: enabled 1
668 12:40:49.694793 PCI: 00:15.1: enabled 1
669 12:40:49.697020 PCI: 00:15.2: enabled 0
670 12:40:49.699269 PCI: 00:15.3: enabled 0
671 12:40:49.702038 PCI: 00:16.0: enabled 1
672 12:40:49.704138 PCI: 00:16.1: enabled 0
673 12:40:49.706507 PCI: 00:16.2: enabled 0
674 12:40:49.710043 PCI: 00:16.3: enabled 0
675 12:40:49.711467 PCI: 00:16.4: enabled 0
676 12:40:49.714221 PCI: 00:16.5: enabled 0
677 12:40:49.716974 PCI: 00:17.0: enabled 1
678 12:40:49.719075 PCI: 00:19.0: enabled 1
679 12:40:49.722140 PCI: 00:19.1: enabled 0
680 12:40:49.723681 PCI: 00:19.2: enabled 1
681 12:40:49.726578 PCI: 00:1a.0: enabled 0
682 12:40:49.729132 PCI: 00:1c.0: enabled 1
683 12:40:49.731386 PCI: 00:1c.1: enabled 0
684 12:40:49.733361 PCI: 00:1c.2: enabled 0
685 12:40:49.736053 PCI: 00:1c.3: enabled 0
686 12:40:49.738906 PCI: 00:1c.4: enabled 0
687 12:40:49.740572 PCI: 00:1c.5: enabled 0
688 12:40:49.743632 PCI: 00:1c.6: enabled 0
689 12:40:49.745840 PCI: 00:1c.7: enabled 1
690 12:40:49.748948 PCI: 00:1d.0: enabled 1
691 12:40:49.751061 PCI: 00:1d.1: enabled 1
692 12:40:49.752671 PCI: 00:1d.2: enabled 0
693 12:40:49.755412 PCI: 00:1d.3: enabled 0
694 12:40:49.758515 PCI: 00:1d.4: enabled 1
695 12:40:49.760668 PCI: 00:1e.0: enabled 0
696 12:40:49.763350 PCI: 00:1e.1: enabled 0
697 12:40:49.765466 PCI: 00:1e.2: enabled 0
698 12:40:49.767753 PCI: 00:1e.3: enabled 0
699 12:40:49.770276 PCI: 00:1f.0: enabled 1
700 12:40:49.772419 PCI: 00:1f.1: enabled 1
701 12:40:49.774654 PCI: 00:1f.2: enabled 1
702 12:40:49.777095 PCI: 00:1f.3: enabled 1
703 12:40:49.779580 PCI: 00:1f.4: enabled 1
704 12:40:49.782561 PCI: 00:1f.5: enabled 1
705 12:40:49.784548 PCI: 00:1f.6: enabled 1
706 12:40:49.787467 USB0 port 0: enabled 1
707 12:40:49.789319 I2C: 00:10: enabled 1
708 12:40:49.791463 I2C: 00:10: enabled 1
709 12:40:49.794490 I2C: 00:34: enabled 1
710 12:40:49.796295 I2C: 00:2c: enabled 1
711 12:40:49.797901 I2C: 00:50: enabled 1
712 12:40:49.800256 PNP: 0c09.0: enabled 1
713 12:40:49.803227 USB2 port 0: enabled 1
714 12:40:49.805277 USB2 port 1: enabled 1
715 12:40:49.807007 USB2 port 2: enabled 1
716 12:40:49.810087 USB2 port 4: enabled 1
717 12:40:49.812681 USB2 port 5: enabled 1
718 12:40:49.814735 USB2 port 6: enabled 1
719 12:40:49.816613 USB2 port 7: enabled 1
720 12:40:49.819633 USB2 port 8: enabled 1
721 12:40:49.822062 USB2 port 9: enabled 1
722 12:40:49.823575 USB3 port 0: enabled 1
723 12:40:49.826415 USB3 port 1: enabled 1
724 12:40:49.828370 USB3 port 2: enabled 1
725 12:40:49.831424 USB3 port 3: enabled 1
726 12:40:49.833422 USB3 port 4: enabled 1
727 12:40:49.835160 APIC: 03: enabled 1
728 12:40:49.836782 APIC: 01: enabled 1
729 12:40:49.839147 APIC: 02: enabled 1
730 12:40:49.841496 APIC: 07: enabled 1
731 12:40:49.843966 APIC: 06: enabled 1
732 12:40:49.845091 APIC: 05: enabled 1
733 12:40:49.847444 APIC: 04: enabled 1
734 12:40:49.850336 Compare with tree...
735 12:40:49.851876 Root Device: enabled 1
736 12:40:49.854662 CPU_CLUSTER: 0: enabled 1
737 12:40:49.857254 APIC: 00: enabled 1
738 12:40:49.858847 APIC: 03: enabled 1
739 12:40:49.861371 APIC: 01: enabled 1
740 12:40:49.863411 APIC: 02: enabled 1
741 12:40:49.865457 APIC: 07: enabled 1
742 12:40:49.868091 APIC: 06: enabled 1
743 12:40:49.870606 APIC: 05: enabled 1
744 12:40:49.872342 APIC: 04: enabled 1
745 12:40:49.875152 DOMAIN: 0000: enabled 1
746 12:40:49.877964 PCI: 00:00.0: enabled 1
747 12:40:49.880721 PCI: 00:02.0: enabled 1
748 12:40:49.883380 PCI: 00:04.0: enabled 1
749 12:40:49.886003 PCI: 00:12.0: enabled 1
750 12:40:49.888740 PCI: 00:12.5: enabled 0
751 12:40:49.890995 PCI: 00:12.6: enabled 0
752 12:40:49.893978 PCI: 00:13.0: enabled 0
753 12:40:49.896111 PCI: 00:14.0: enabled 1
754 12:40:49.898867 USB0 port 0: enabled 1
755 12:40:49.901753 USB2 port 0: enabled 1
756 12:40:49.904214 USB2 port 1: enabled 1
757 12:40:49.907181 USB2 port 2: enabled 1
758 12:40:49.909378 USB2 port 4: enabled 1
759 12:40:49.912139 USB2 port 5: enabled 1
760 12:40:49.914791 USB2 port 6: enabled 1
761 12:40:49.917362 USB2 port 7: enabled 1
762 12:40:49.920580 USB2 port 8: enabled 1
763 12:40:49.923624 USB2 port 9: enabled 1
764 12:40:49.926084 USB3 port 0: enabled 1
765 12:40:49.928647 USB3 port 1: enabled 1
766 12:40:49.932006 USB3 port 2: enabled 1
767 12:40:49.934170 USB3 port 3: enabled 1
768 12:40:49.936858 USB3 port 4: enabled 1
769 12:40:49.939791 PCI: 00:14.1: enabled 0
770 12:40:49.942414 PCI: 00:14.3: enabled 1
771 12:40:49.944802 PCI: 00:14.5: enabled 0
772 12:40:49.947823 PCI: 00:15.0: enabled 1
773 12:40:49.949870 I2C: 00:10: enabled 1
774 12:40:49.952121 I2C: 00:10: enabled 1
775 12:40:49.955437 I2C: 00:34: enabled 1
776 12:40:49.958053 PCI: 00:15.1: enabled 1
777 12:40:49.960756 I2C: 00:2c: enabled 1
778 12:40:49.962398 PCI: 00:15.2: enabled 0
779 12:40:49.965443 PCI: 00:15.3: enabled 0
780 12:40:49.967801 PCI: 00:16.0: enabled 1
781 12:40:49.970368 PCI: 00:16.1: enabled 0
782 12:40:49.972671 PCI: 00:16.2: enabled 0
783 12:40:49.976291 PCI: 00:16.3: enabled 0
784 12:40:49.978091 PCI: 00:16.4: enabled 0
785 12:40:49.981147 PCI: 00:16.5: enabled 0
786 12:40:49.983891 PCI: 00:17.0: enabled 1
787 12:40:49.986495 PCI: 00:19.0: enabled 1
788 12:40:49.988845 I2C: 00:50: enabled 1
789 12:40:49.991886 PCI: 00:19.1: enabled 0
790 12:40:49.994510 PCI: 00:19.2: enabled 1
791 12:40:49.997182 PCI: 00:1a.0: enabled 0
792 12:40:49.999410 PCI: 00:1c.0: enabled 1
793 12:40:50.002561 PCI: 00:1c.1: enabled 0
794 12:40:50.005007 PCI: 00:1c.2: enabled 0
795 12:40:50.007348 PCI: 00:1c.3: enabled 0
796 12:40:50.009937 PCI: 00:1c.4: enabled 0
797 12:40:50.012756 PCI: 00:1c.5: enabled 0
798 12:40:50.015090 PCI: 00:1c.6: enabled 0
799 12:40:50.018013 PCI: 00:1c.7: enabled 1
800 12:40:50.020080 PCI: 00:1d.0: enabled 1
801 12:40:50.022609 PCI: 00:1d.1: enabled 1
802 12:40:50.025544 PCI: 00:1d.2: enabled 0
803 12:40:50.028250 PCI: 00:1d.3: enabled 0
804 12:40:50.030370 PCI: 00:1d.4: enabled 1
805 12:40:50.033324 PCI: 00:1e.0: enabled 0
806 12:40:50.035809 PCI: 00:1e.1: enabled 0
807 12:40:50.038592 PCI: 00:1e.2: enabled 0
808 12:40:50.041087 PCI: 00:1e.3: enabled 0
809 12:40:50.044504 PCI: 00:1f.0: enabled 1
810 12:40:50.046696 PNP: 0c09.0: enabled 1
811 12:40:50.049270 PCI: 00:1f.1: enabled 1
812 12:40:50.052185 PCI: 00:1f.2: enabled 1
813 12:40:50.054272 PCI: 00:1f.3: enabled 1
814 12:40:50.057406 PCI: 00:1f.4: enabled 1
815 12:40:50.060264 PCI: 00:1f.5: enabled 1
816 12:40:50.062824 PCI: 00:1f.6: enabled 1
817 12:40:50.064637 Root Device scanning...
818 12:40:50.068934 root_dev_scan_bus for Root Device
819 12:40:50.070982 CPU_CLUSTER: 0 enabled
820 12:40:50.073682 DOMAIN: 0000 enabled
821 12:40:50.075695 DOMAIN: 0000 scanning...
822 12:40:50.079002 PCI: pci_scan_bus for bus 00
823 12:40:50.082316 PCI: 00:00.0 [8086/0000] ops
824 12:40:50.085634 PCI: 00:00.0 [8086/3e34] enabled
825 12:40:50.088353 PCI: 00:02.0 [8086/0000] ops
826 12:40:50.091008 PCI: 00:02.0 [8086/3ea0] enabled
827 12:40:50.094486 PCI: 00:04.0 [8086/1903] enabled
828 12:40:50.097782 PCI: 00:08.0 [8086/1911] enabled
829 12:40:50.101926 PCI: 00:12.0 [8086/9df9] enabled
830 12:40:50.104591 PCI: 00:14.0 [8086/0000] bus ops
831 12:40:50.107681 PCI: 00:14.0 [8086/9ded] enabled
832 12:40:50.111361 PCI: 00:14.2 [8086/9def] enabled
833 12:40:50.115032 PCI: 00:14.3 [8086/9df0] enabled
834 12:40:50.118201 PCI: 00:15.0 [8086/0000] bus ops
835 12:40:50.121489 PCI: 00:15.0 [8086/9de8] enabled
836 12:40:50.124410 PCI: 00:15.1 [8086/0000] bus ops
837 12:40:50.128007 PCI: 00:15.1 [8086/9de9] enabled
838 12:40:50.130508 PCI: 00:16.0 [8086/0000] ops
839 12:40:50.134015 PCI: 00:16.0 [8086/9de0] enabled
840 12:40:50.136713 PCI: 00:17.0 [8086/0000] ops
841 12:40:50.140338 PCI: 00:17.0 [8086/9dd3] enabled
842 12:40:50.143576 PCI: 00:19.0 [8086/0000] bus ops
843 12:40:50.146473 PCI: 00:19.0 [8086/9dc5] enabled
844 12:40:50.150182 PCI: 00:19.2 [8086/0000] ops
845 12:40:50.152742 PCI: 00:19.2 [8086/9dc7] enabled
846 12:40:50.156911 PCI: 00:1c.0 [8086/0000] bus ops
847 12:40:50.159826 PCI: 00:1c.0 [8086/9dbf] enabled
848 12:40:50.165731 PCI: Static device PCI: 00:1c.7 not found, disabling it.
849 12:40:50.168466 PCI: 00:1d.0 [8086/0000] bus ops
850 12:40:50.172479 PCI: 00:1d.0 [8086/9db4] enabled
851 12:40:50.178054 PCI: Static device PCI: 00:1d.1 not found, disabling it.
852 12:40:50.183543 PCI: Static device PCI: 00:1d.4 not found, disabling it.
853 12:40:50.186926 PCI: 00:1f.0 [8086/0000] bus ops
854 12:40:50.190227 PCI: 00:1f.0 [8086/9d84] enabled
855 12:40:50.195312 PCI: Static device PCI: 00:1f.1 not found, disabling it.
856 12:40:50.201064 PCI: Static device PCI: 00:1f.2 not found, disabling it.
857 12:40:50.204203 PCI: 00:1f.3 [8086/0000] bus ops
858 12:40:50.207682 PCI: 00:1f.3 [8086/9dc8] enabled
859 12:40:50.211088 PCI: 00:1f.4 [8086/0000] bus ops
860 12:40:50.214941 PCI: 00:1f.4 [8086/9da3] enabled
861 12:40:50.218281 PCI: 00:1f.5 [8086/0000] bus ops
862 12:40:50.221384 PCI: 00:1f.5 [8086/9da4] enabled
863 12:40:50.225012 PCI: 00:1f.6 [8086/15be] enabled
864 12:40:50.227306 PCI: Leftover static devices:
865 12:40:50.228730 PCI: 00:12.5
866 12:40:50.230891 PCI: 00:12.6
867 12:40:50.231868 PCI: 00:13.0
868 12:40:50.233806 PCI: 00:14.1
869 12:40:50.234271 PCI: 00:14.5
870 12:40:50.235974 PCI: 00:15.2
871 12:40:50.237164 PCI: 00:15.3
872 12:40:50.238139 PCI: 00:16.1
873 12:40:50.240523 PCI: 00:16.2
874 12:40:50.241366 PCI: 00:16.3
875 12:40:50.242471 PCI: 00:16.4
876 12:40:50.244312 PCI: 00:16.5
877 12:40:50.245047 PCI: 00:19.1
878 12:40:50.246443 PCI: 00:1a.0
879 12:40:50.247621 PCI: 00:1c.1
880 12:40:50.249788 PCI: 00:1c.2
881 12:40:50.250952 PCI: 00:1c.3
882 12:40:50.252396 PCI: 00:1c.4
883 12:40:50.254274 PCI: 00:1c.5
884 12:40:50.255536 PCI: 00:1c.6
885 12:40:50.256819 PCI: 00:1c.7
886 12:40:50.257982 PCI: 00:1d.1
887 12:40:50.258796 PCI: 00:1d.2
888 12:40:50.260335 PCI: 00:1d.3
889 12:40:50.261771 PCI: 00:1d.4
890 12:40:50.263478 PCI: 00:1e.0
891 12:40:50.264782 PCI: 00:1e.1
892 12:40:50.265674 PCI: 00:1e.2
893 12:40:50.267820 PCI: 00:1e.3
894 12:40:50.268612 PCI: 00:1f.1
895 12:40:50.269654 PCI: 00:1f.2
896 12:40:50.273207 PCI: Check your devicetree.cb.
897 12:40:50.275797 PCI: 00:14.0 scanning...
898 12:40:50.278975 scan_usb_bus for PCI: 00:14.0
899 12:40:50.281038 USB0 port 0 enabled
900 12:40:50.283830 USB0 port 0 scanning...
901 12:40:50.286652 scan_usb_bus for USB0 port 0
902 12:40:50.288172 USB2 port 0 enabled
903 12:40:50.290918 USB2 port 1 enabled
904 12:40:50.292832 USB2 port 2 enabled
905 12:40:50.295227 USB2 port 4 enabled
906 12:40:50.296570 USB2 port 5 enabled
907 12:40:50.299108 USB2 port 6 enabled
908 12:40:50.301168 USB2 port 7 enabled
909 12:40:50.302758 USB2 port 8 enabled
910 12:40:50.305027 USB2 port 9 enabled
911 12:40:50.307195 USB3 port 0 enabled
912 12:40:50.309102 USB3 port 1 enabled
913 12:40:50.311212 USB3 port 2 enabled
914 12:40:50.313382 USB3 port 3 enabled
915 12:40:50.314810 USB3 port 4 enabled
916 12:40:50.317509 USB2 port 0 scanning...
917 12:40:50.320797 scan_usb_bus for USB2 port 0
918 12:40:50.324207 scan_usb_bus for USB2 port 0 done
919 12:40:50.329196 scan_bus: scanning of bus USB2 port 0 took 9062 usecs
920 12:40:50.332471 USB2 port 1 scanning...
921 12:40:50.335658 scan_usb_bus for USB2 port 1
922 12:40:50.338490 scan_usb_bus for USB2 port 1 done
923 12:40:50.344049 scan_bus: scanning of bus USB2 port 1 took 9061 usecs
924 12:40:50.346558 USB2 port 2 scanning...
925 12:40:50.350483 scan_usb_bus for USB2 port 2
926 12:40:50.352887 scan_usb_bus for USB2 port 2 done
927 12:40:50.358105 scan_bus: scanning of bus USB2 port 2 took 9062 usecs
928 12:40:50.361612 USB2 port 4 scanning...
929 12:40:50.363696 scan_usb_bus for USB2 port 4
930 12:40:50.367509 scan_usb_bus for USB2 port 4 done
931 12:40:50.372429 scan_bus: scanning of bus USB2 port 4 took 9061 usecs
932 12:40:50.374979 USB2 port 5 scanning...
933 12:40:50.378114 scan_usb_bus for USB2 port 5
934 12:40:50.381862 scan_usb_bus for USB2 port 5 done
935 12:40:50.387043 scan_bus: scanning of bus USB2 port 5 took 9061 usecs
936 12:40:50.389314 USB2 port 6 scanning...
937 12:40:50.393062 scan_usb_bus for USB2 port 6
938 12:40:50.395743 scan_usb_bus for USB2 port 6 done
939 12:40:50.401420 scan_bus: scanning of bus USB2 port 6 took 9060 usecs
940 12:40:50.404441 USB2 port 7 scanning...
941 12:40:50.407721 scan_usb_bus for USB2 port 7
942 12:40:50.411129 scan_usb_bus for USB2 port 7 done
943 12:40:50.416023 scan_bus: scanning of bus USB2 port 7 took 9061 usecs
944 12:40:50.418613 USB2 port 8 scanning...
945 12:40:50.421952 scan_usb_bus for USB2 port 8
946 12:40:50.425276 scan_usb_bus for USB2 port 8 done
947 12:40:50.430871 scan_bus: scanning of bus USB2 port 8 took 9061 usecs
948 12:40:50.432855 USB2 port 9 scanning...
949 12:40:50.436130 scan_usb_bus for USB2 port 9
950 12:40:50.439787 scan_usb_bus for USB2 port 9 done
951 12:40:50.444865 scan_bus: scanning of bus USB2 port 9 took 9062 usecs
952 12:40:50.447214 USB3 port 0 scanning...
953 12:40:50.450766 scan_usb_bus for USB3 port 0
954 12:40:50.454647 scan_usb_bus for USB3 port 0 done
955 12:40:50.459221 scan_bus: scanning of bus USB3 port 0 took 9060 usecs
956 12:40:50.461305 USB3 port 1 scanning...
957 12:40:50.464548 scan_usb_bus for USB3 port 1
958 12:40:50.467776 scan_usb_bus for USB3 port 1 done
959 12:40:50.473177 scan_bus: scanning of bus USB3 port 1 took 9062 usecs
960 12:40:50.476634 USB3 port 2 scanning...
961 12:40:50.479173 scan_usb_bus for USB3 port 2
962 12:40:50.483317 scan_usb_bus for USB3 port 2 done
963 12:40:50.488707 scan_bus: scanning of bus USB3 port 2 took 9060 usecs
964 12:40:50.490104 USB3 port 3 scanning...
965 12:40:50.494100 scan_usb_bus for USB3 port 3
966 12:40:50.496663 scan_usb_bus for USB3 port 3 done
967 12:40:50.502510 scan_bus: scanning of bus USB3 port 3 took 9062 usecs
968 12:40:50.505508 USB3 port 4 scanning...
969 12:40:50.508006 scan_usb_bus for USB3 port 4
970 12:40:50.511009 scan_usb_bus for USB3 port 4 done
971 12:40:50.517098 scan_bus: scanning of bus USB3 port 4 took 9061 usecs
972 12:40:50.520115 scan_usb_bus for USB0 port 0 done
973 12:40:50.525982 scan_bus: scanning of bus USB0 port 0 took 239318 usecs
974 12:40:50.529061 scan_usb_bus for PCI: 00:14.0 done
975 12:40:50.534567 scan_bus: scanning of bus PCI: 00:14.0 took 256251 usecs
976 12:40:50.537717 PCI: 00:15.0 scanning...
977 12:40:50.541228 scan_generic_bus for PCI: 00:15.0
978 12:40:50.545636 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
979 12:40:50.549349 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
980 12:40:50.552990 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
981 12:40:50.557321 scan_generic_bus for PCI: 00:15.0 done
982 12:40:50.563126 scan_bus: scanning of bus PCI: 00:15.0 took 22385 usecs
983 12:40:50.565498 PCI: 00:15.1 scanning...
984 12:40:50.569039 scan_generic_bus for PCI: 00:15.1
985 12:40:50.572905 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
986 12:40:50.576837 scan_generic_bus for PCI: 00:15.1 done
987 12:40:50.582559 scan_bus: scanning of bus PCI: 00:15.1 took 14213 usecs
988 12:40:50.584845 PCI: 00:19.0 scanning...
989 12:40:50.589036 scan_generic_bus for PCI: 00:19.0
990 12:40:50.592958 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
991 12:40:50.597414 scan_generic_bus for PCI: 00:19.0 done
992 12:40:50.602983 scan_bus: scanning of bus PCI: 00:19.0 took 14215 usecs
993 12:40:50.605485 PCI: 00:1c.0 scanning...
994 12:40:50.608583 do_pci_scan_bridge for PCI: 00:1c.0
995 12:40:50.611244 PCI: pci_scan_bus for bus 01
996 12:40:50.614943 PCI: 01:00.0 [10ec/525a] enabled
997 12:40:50.618392 Capability: type 0x01 @ 0x80
998 12:40:50.621740 Capability: type 0x05 @ 0x90
999 12:40:50.623768 Capability: type 0x10 @ 0xb0
1000 12:40:50.627306 Capability: type 0x10 @ 0x40
1001 12:40:50.630438 Enabling Common Clock Configuration
1002 12:40:50.635557 L1 Sub-State supported from root port 28
1003 12:40:50.637711 L1 Sub-State Support = 0xf
1004 12:40:50.640088 CommonModeRestoreTime = 0x3c
1005 12:40:50.645187 Power On Value = 0x6, Power On Scale = 0x1
1006 12:40:50.647384 ASPM: Enabled L0s and L1
1007 12:40:50.650015 Capability: type 0x01 @ 0x80
1008 12:40:50.653203 Capability: type 0x05 @ 0x90
1009 12:40:50.656223 Capability: type 0x10 @ 0xb0
1010 12:40:50.661346 scan_bus: scanning of bus PCI: 00:1c.0 took 53670 usecs
1011 12:40:50.664783 PCI: 00:1d.0 scanning...
1012 12:40:50.668089 do_pci_scan_bridge for PCI: 00:1d.0
1013 12:40:50.670498 PCI: pci_scan_bus for bus 02
1014 12:40:50.675086 PCI: 02:00.0 [1217/8620] enabled
1015 12:40:50.677714 Capability: type 0x01 @ 0x6c
1016 12:40:50.680520 Capability: type 0x05 @ 0x48
1017 12:40:50.683128 Capability: type 0x10 @ 0x80
1018 12:40:50.685894 Capability: type 0x10 @ 0x40
1019 12:40:50.690602 L1 Sub-State supported from root port 29
1020 12:40:50.693012 L1 Sub-State Support = 0xf
1021 12:40:50.695692 CommonModeRestoreTime = 0x78
1022 12:40:50.699857 Power On Value = 0x16, Power On Scale = 0x0
1023 12:40:50.701744 ASPM: Enabled L1
1024 12:40:50.706565 Capability: type 0x01 @ 0x6c
1025 12:40:50.711833 Capability: type 0x05 @ 0x48
1026 12:40:50.716509 Capability: type 0x10 @ 0x80
1027 12:40:50.723843 scan_bus: scanning of bus PCI: 00:1d.0 took 56025 usecs
1028 12:40:50.725426 PCI: 00:1f.0 scanning...
1029 12:40:50.729404 scan_lpc_bus for PCI: 00:1f.0
1030 12:40:50.731145 PNP: 0c09.0 enabled
1031 12:40:50.735011 scan_lpc_bus for PCI: 00:1f.0 done
1032 12:40:50.740064 scan_bus: scanning of bus PCI: 00:1f.0 took 11394 usecs
1033 12:40:50.742319 PCI: 00:1f.3 scanning...
1034 12:40:50.748706 scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs
1035 12:40:50.750646 PCI: 00:1f.4 scanning...
1036 12:40:50.754322 scan_generic_bus for PCI: 00:1f.4
1037 12:40:50.758624 scan_generic_bus for PCI: 00:1f.4 done
1038 12:40:50.764177 scan_bus: scanning of bus PCI: 00:1f.4 took 10128 usecs
1039 12:40:50.766841 PCI: 00:1f.5 scanning...
1040 12:40:50.770690 scan_generic_bus for PCI: 00:1f.5
1041 12:40:50.774099 scan_generic_bus for PCI: 00:1f.5 done
1042 12:40:50.779277 scan_bus: scanning of bus PCI: 00:1f.5 took 10128 usecs
1043 12:40:50.785791 scan_bus: scanning of bus DOMAIN: 0000 took 706795 usecs
1044 12:40:50.789603 root_dev_scan_bus for Root Device done
1045 12:40:50.795029 scan_bus: scanning of bus Root Device took 726935 usecs
1046 12:40:50.795838 done
1047 12:40:50.801988 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1048 12:40:50.807443 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1049 12:40:50.815765 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1050 12:40:50.822198 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1051 12:40:50.826018 SPI flash protection: WPSW=0 SRP0=1
1052 12:40:50.830275 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1053 12:40:50.837132 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148651 exit 34820
1054 12:40:50.840266 found VGA at PCI: 00:02.0
1055 12:40:50.843044 Setting up VGA for PCI: 00:02.0
1056 12:40:50.847739 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1057 12:40:50.852971 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1058 12:40:50.855497 Allocating resources...
1059 12:40:50.857155 Reading resources...
1060 12:40:50.861766 Root Device read_resources bus 0 link: 0
1061 12:40:50.866054 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1062 12:40:50.870998 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1063 12:40:50.875474 DOMAIN: 0000 read_resources bus 0 link: 0
1064 12:40:50.882377 PCI: 00:14.0 read_resources bus 0 link: 0
1065 12:40:50.886086 USB0 port 0 read_resources bus 0 link: 0
1066 12:40:50.895661 USB0 port 0 read_resources bus 0 link: 0 done
1067 12:40:50.900352 PCI: 00:14.0 read_resources bus 0 link: 0 done
1068 12:40:50.905981 PCI: 00:15.0 read_resources bus 1 link: 0
1069 12:40:50.911464 PCI: 00:15.0 read_resources bus 1 link: 0 done
1070 12:40:50.916147 PCI: 00:15.1 read_resources bus 2 link: 0
1071 12:40:50.921724 PCI: 00:15.1 read_resources bus 2 link: 0 done
1072 12:40:50.926780 PCI: 00:19.0 read_resources bus 3 link: 0
1073 12:40:50.932380 PCI: 00:19.0 read_resources bus 3 link: 0 done
1074 12:40:50.937605 PCI: 00:1c.0 read_resources bus 1 link: 0
1075 12:40:50.942869 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1076 12:40:50.947667 PCI: 00:1d.0 read_resources bus 2 link: 0
1077 12:40:50.953999 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1078 12:40:50.958682 PCI: 00:1f.0 read_resources bus 0 link: 0
1079 12:40:50.964618 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1080 12:40:50.970791 DOMAIN: 0000 read_resources bus 0 link: 0 done
1081 12:40:50.975582 Root Device read_resources bus 0 link: 0 done
1082 12:40:50.978054 Done reading resources.
1083 12:40:50.983225 Show resources in subtree (Root Device)...After reading.
1084 12:40:50.988177 Root Device child on link 0 CPU_CLUSTER: 0
1085 12:40:50.992301 CPU_CLUSTER: 0 child on link 0 APIC: 00
1086 12:40:50.993695 APIC: 00
1087 12:40:50.994629 APIC: 03
1088 12:40:50.996400 APIC: 01
1089 12:40:50.997750 APIC: 02
1090 12:40:50.998031 APIC: 07
1091 12:40:50.999408 APIC: 06
1092 12:40:51.001199 APIC: 05
1093 12:40:51.002270 APIC: 04
1094 12:40:51.006107 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1095 12:40:51.015923 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1096 12:40:51.025151 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1097 12:40:51.026542 PCI: 00:00.0
1098 12:40:51.036593 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1099 12:40:51.045755 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1100 12:40:51.055792 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1101 12:40:51.064861 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1102 12:40:51.073793 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1103 12:40:51.083675 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1104 12:40:51.093115 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1105 12:40:51.101820 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1106 12:40:51.111091 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1107 12:40:51.120306 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1108 12:40:51.130175 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1109 12:40:51.140786 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1110 12:40:51.148998 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1111 12:40:51.158468 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1112 12:40:51.160239 PCI: 00:02.0
1113 12:40:51.169979 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1114 12:40:51.181010 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1115 12:40:51.188775 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1116 12:40:51.190953 PCI: 00:04.0
1117 12:40:51.200475 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1118 12:40:51.202103 PCI: 00:08.0
1119 12:40:51.212534 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1120 12:40:51.213827 PCI: 00:12.0
1121 12:40:51.223552 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 12:40:51.227540 PCI: 00:14.0 child on link 0 USB0 port 0
1123 12:40:51.237832 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1124 12:40:51.242528 USB0 port 0 child on link 0 USB2 port 0
1125 12:40:51.244554 USB2 port 0
1126 12:40:51.245532 USB2 port 1
1127 12:40:51.248330 USB2 port 2
1128 12:40:51.249706 USB2 port 4
1129 12:40:51.251105 USB2 port 5
1130 12:40:51.252783 USB2 port 6
1131 12:40:51.254366 USB2 port 7
1132 12:40:51.256388 USB2 port 8
1133 12:40:51.258194 USB2 port 9
1134 12:40:51.259880 USB3 port 0
1135 12:40:51.261346 USB3 port 1
1136 12:40:51.262997 USB3 port 2
1137 12:40:51.265011 USB3 port 3
1138 12:40:51.266735 USB3 port 4
1139 12:40:51.268564 PCI: 00:14.2
1140 12:40:51.278335 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1141 12:40:51.288214 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1142 12:40:51.289665 PCI: 00:14.3
1143 12:40:51.300089 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1144 12:40:51.304347 PCI: 00:15.0 child on link 0 I2C: 01:10
1145 12:40:51.314328 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1146 12:40:51.315770 I2C: 01:10
1147 12:40:51.317244 I2C: 01:10
1148 12:40:51.318650 I2C: 01:34
1149 12:40:51.323522 PCI: 00:15.1 child on link 0 I2C: 02:2c
1150 12:40:51.333287 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 12:40:51.334358 I2C: 02:2c
1152 12:40:51.336682 PCI: 00:16.0
1153 12:40:51.346779 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 12:40:51.347767 PCI: 00:17.0
1155 12:40:51.357298 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1156 12:40:51.366084 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1157 12:40:51.374413 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1158 12:40:51.382027 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1159 12:40:51.390964 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1160 12:40:51.399965 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1161 12:40:51.403884 PCI: 00:19.0 child on link 0 I2C: 03:50
1162 12:40:51.414043 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 12:40:51.424445 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1164 12:40:51.425467 I2C: 03:50
1165 12:40:51.427080 PCI: 00:19.2
1166 12:40:51.438920 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1167 12:40:51.448449 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1168 12:40:51.452631 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1169 12:40:51.460927 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1170 12:40:51.470847 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1171 12:40:51.479707 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1172 12:40:51.482479 PCI: 01:00.0
1173 12:40:51.491764 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1174 12:40:51.495199 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1175 12:40:51.504092 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1176 12:40:51.514461 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1177 12:40:51.522970 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1178 12:40:51.525371 PCI: 02:00.0
1179 12:40:51.534154 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1180 12:40:51.542724 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1181 12:40:51.547760 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1182 12:40:51.556185 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1183 12:40:51.564801 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1184 12:40:51.566603 PNP: 0c09.0
1185 12:40:51.575141 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1186 12:40:51.584431 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1187 12:40:51.592103 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1188 12:40:51.594106 PCI: 00:1f.3
1189 12:40:51.603755 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1190 12:40:51.614032 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1191 12:40:51.615990 PCI: 00:1f.4
1192 12:40:51.625781 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1193 12:40:51.634549 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1194 12:40:51.636489 PCI: 00:1f.5
1195 12:40:51.645226 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1196 12:40:51.646847 PCI: 00:1f.6
1197 12:40:51.656356 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1198 12:40:51.663452 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 12:40:51.669107 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 12:40:51.675633 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 12:40:51.682551 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1202 12:40:51.689505 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1203 12:40:51.692902 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1204 12:40:51.696184 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1205 12:40:51.699678 PCI: 00:17.0 18 * [0x60 - 0x67] io
1206 12:40:51.703332 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1207 12:40:51.711119 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1208 12:40:51.716403 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1209 12:40:51.724341 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1210 12:40:51.733325 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1211 12:40:51.739886 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1212 12:40:51.743299 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1213 12:40:51.751626 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1214 12:40:51.759196 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1215 12:40:51.768809 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1216 12:40:51.774969 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1217 12:40:51.778417 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1218 12:40:51.782451 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1219 12:40:51.790735 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1220 12:40:51.795363 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1221 12:40:51.800136 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1222 12:40:51.805392 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1223 12:40:51.810130 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1224 12:40:51.814415 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1225 12:40:51.819903 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1226 12:40:51.824827 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1227 12:40:51.829868 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1228 12:40:51.833892 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1229 12:40:51.838980 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1230 12:40:51.843788 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1231 12:40:51.849353 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1232 12:40:51.853280 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1233 12:40:51.858588 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1234 12:40:51.863971 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1235 12:40:51.868635 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1236 12:40:51.873574 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1237 12:40:51.877579 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1238 12:40:51.882388 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1239 12:40:51.887755 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1240 12:40:51.892684 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1241 12:40:51.897763 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1242 12:40:51.902714 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1243 12:40:51.907646 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1244 12:40:51.912002 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1245 12:40:51.920315 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1246 12:40:51.924110 avoid_fixed_resources: DOMAIN: 0000
1247 12:40:51.930253 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1248 12:40:51.935759 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1249 12:40:51.943802 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1250 12:40:51.951114 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1251 12:40:51.958946 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1252 12:40:51.966440 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1253 12:40:51.974483 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1254 12:40:51.982140 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 12:40:51.990295 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1256 12:40:51.997728 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1257 12:40:52.005123 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1258 12:40:52.011263 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1259 12:40:52.013363 Setting resources...
1260 12:40:52.020435 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1261 12:40:52.024007 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1262 12:40:52.028704 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1263 12:40:52.032101 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1264 12:40:52.036869 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1265 12:40:52.042625 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1266 12:40:52.048195 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1267 12:40:52.055566 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1268 12:40:52.060709 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1269 12:40:52.067773 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1270 12:40:52.074862 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1271 12:40:52.080494 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1272 12:40:52.085520 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1273 12:40:52.089712 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1274 12:40:52.094437 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1275 12:40:52.100057 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1276 12:40:52.104557 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1277 12:40:52.109133 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1278 12:40:52.114056 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1279 12:40:52.119729 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1280 12:40:52.123818 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1281 12:40:52.129175 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1282 12:40:52.134529 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1283 12:40:52.138686 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1284 12:40:52.143758 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1285 12:40:52.148292 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1286 12:40:52.153592 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1287 12:40:52.157929 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1288 12:40:52.162819 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1289 12:40:52.167497 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1290 12:40:52.172708 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1291 12:40:52.177676 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1292 12:40:52.181961 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1293 12:40:52.186848 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1294 12:40:52.191778 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1295 12:40:52.197533 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1296 12:40:52.204456 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1297 12:40:52.211433 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1298 12:40:52.219601 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1299 12:40:52.226183 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1300 12:40:52.231917 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1301 12:40:52.239394 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1302 12:40:52.246383 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1303 12:40:52.253509 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1304 12:40:52.260686 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1305 12:40:52.265863 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1306 12:40:52.271153 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1307 12:40:52.278767 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1308 12:40:52.282364 Root Device assign_resources, bus 0 link: 0
1309 12:40:52.287653 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 12:40:52.295359 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 12:40:52.303927 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 12:40:52.311503 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 12:40:52.320062 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1314 12:40:52.328622 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1315 12:40:52.336812 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1316 12:40:52.345546 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1317 12:40:52.349671 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 12:40:52.354475 PCI: 00:14.0 assign_resources, bus 0 link: 0
1319 12:40:52.362930 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1320 12:40:52.370745 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1321 12:40:52.378535 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1322 12:40:52.386873 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1323 12:40:52.391658 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 12:40:52.396973 PCI: 00:15.0 assign_resources, bus 1 link: 0
1325 12:40:52.404585 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1326 12:40:52.409797 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 12:40:52.413758 PCI: 00:15.1 assign_resources, bus 2 link: 0
1328 12:40:52.421813 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1329 12:40:52.429894 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1330 12:40:52.437803 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1331 12:40:52.445814 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1332 12:40:52.453564 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1333 12:40:52.461239 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1334 12:40:52.468936 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1335 12:40:52.476954 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1336 12:40:52.484560 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1337 12:40:52.489180 PCI: 00:19.0 assign_resources, bus 3 link: 0
1338 12:40:52.494173 PCI: 00:19.0 assign_resources, bus 3 link: 0
1339 12:40:52.502778 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1340 12:40:52.511167 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1341 12:40:52.520068 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1342 12:40:52.528927 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1343 12:40:52.533173 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1344 12:40:52.541502 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1345 12:40:52.546246 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1346 12:40:52.554770 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1347 12:40:52.563025 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1348 12:40:52.572281 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1349 12:40:52.576271 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1350 12:40:52.586117 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1351 12:40:52.596414 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1352 12:40:52.602243 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1353 12:40:52.606964 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1354 12:40:52.611834 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1355 12:40:52.617063 LPC: Trying to open IO window from 930 size 8
1356 12:40:52.621791 LPC: Trying to open IO window from 940 size 8
1357 12:40:52.625364 LPC: Trying to open IO window from 950 size 10
1358 12:40:52.633696 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1359 12:40:52.642393 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1360 12:40:52.651074 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1361 12:40:52.658945 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1362 12:40:52.666837 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1363 12:40:52.671350 DOMAIN: 0000 assign_resources, bus 0 link: 0
1364 12:40:52.676650 Root Device assign_resources, bus 0 link: 0
1365 12:40:52.678078 Done setting resources.
1366 12:40:52.684643 Show resources in subtree (Root Device)...After assigning values.
1367 12:40:52.689466 Root Device child on link 0 CPU_CLUSTER: 0
1368 12:40:52.693343 CPU_CLUSTER: 0 child on link 0 APIC: 00
1369 12:40:52.694901 APIC: 00
1370 12:40:52.696183 APIC: 03
1371 12:40:52.697997 APIC: 01
1372 12:40:52.698424 APIC: 02
1373 12:40:52.700322 APIC: 07
1374 12:40:52.700773 APIC: 06
1375 12:40:52.702553 APIC: 05
1376 12:40:52.703576 APIC: 04
1377 12:40:52.707679 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1378 12:40:52.717372 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1379 12:40:52.728376 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1380 12:40:52.730533 PCI: 00:00.0
1381 12:40:52.739833 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1382 12:40:52.750064 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1383 12:40:52.758363 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1384 12:40:52.767871 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1385 12:40:52.777734 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1386 12:40:52.786750 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1387 12:40:52.796197 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1388 12:40:52.805385 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1389 12:40:52.814213 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1390 12:40:52.823922 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1391 12:40:52.833784 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1392 12:40:52.843647 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1393 12:40:52.852887 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1394 12:40:52.861347 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1395 12:40:52.862927 PCI: 00:02.0
1396 12:40:52.873956 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1397 12:40:52.885092 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1398 12:40:52.894053 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1399 12:40:52.895472 PCI: 00:04.0
1400 12:40:52.905869 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1401 12:40:52.907573 PCI: 00:08.0
1402 12:40:52.917708 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1403 12:40:52.919627 PCI: 00:12.0
1404 12:40:52.929351 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1405 12:40:52.934052 PCI: 00:14.0 child on link 0 USB0 port 0
1406 12:40:52.944814 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1407 12:40:52.949624 USB0 port 0 child on link 0 USB2 port 0
1408 12:40:52.950526 USB2 port 0
1409 12:40:52.951980 USB2 port 1
1410 12:40:52.954091 USB2 port 2
1411 12:40:52.955949 USB2 port 4
1412 12:40:52.957561 USB2 port 5
1413 12:40:52.959634 USB2 port 6
1414 12:40:52.961193 USB2 port 7
1415 12:40:52.962501 USB2 port 8
1416 12:40:52.964504 USB2 port 9
1417 12:40:52.966470 USB3 port 0
1418 12:40:52.967767 USB3 port 1
1419 12:40:52.969823 USB3 port 2
1420 12:40:52.972249 USB3 port 3
1421 12:40:52.973056 USB3 port 4
1422 12:40:52.974994 PCI: 00:14.2
1423 12:40:52.985872 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1424 12:40:52.995132 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1425 12:40:52.996801 PCI: 00:14.3
1426 12:40:53.007785 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1427 12:40:53.011756 PCI: 00:15.0 child on link 0 I2C: 01:10
1428 12:40:53.022034 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1429 12:40:53.023823 I2C: 01:10
1430 12:40:53.025236 I2C: 01:10
1431 12:40:53.027160 I2C: 01:34
1432 12:40:53.031451 PCI: 00:15.1 child on link 0 I2C: 02:2c
1433 12:40:53.041055 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1434 12:40:53.043161 I2C: 02:2c
1435 12:40:53.044951 PCI: 00:16.0
1436 12:40:53.055212 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1437 12:40:53.056244 PCI: 00:17.0
1438 12:40:53.067368 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1439 12:40:53.076717 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1440 12:40:53.085590 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1441 12:40:53.095354 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1442 12:40:53.104009 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1443 12:40:53.114763 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1444 12:40:53.118880 PCI: 00:19.0 child on link 0 I2C: 03:50
1445 12:40:53.129021 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1446 12:40:53.139338 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1447 12:40:53.141398 I2C: 03:50
1448 12:40:53.142649 PCI: 00:19.2
1449 12:40:53.153748 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1450 12:40:53.163445 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1451 12:40:53.168323 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1452 12:40:53.177236 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1453 12:40:53.187551 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1454 12:40:53.197661 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1455 12:40:53.199532 PCI: 01:00.0
1456 12:40:53.210270 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1457 12:40:53.215007 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1458 12:40:53.224150 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 12:40:53.234132 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 12:40:53.244011 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1461 12:40:53.246055 PCI: 02:00.0
1462 12:40:53.256734 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1463 12:40:53.267257 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1464 12:40:53.270986 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1465 12:40:53.279533 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1466 12:40:53.288493 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1467 12:40:53.290155 PNP: 0c09.0
1468 12:40:53.298786 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1469 12:40:53.307549 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1470 12:40:53.315951 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1471 12:40:53.317652 PCI: 00:1f.3
1472 12:40:53.327933 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1473 12:40:53.338596 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1474 12:40:53.340393 PCI: 00:1f.4
1475 12:40:53.349770 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1476 12:40:53.359845 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1477 12:40:53.360969 PCI: 00:1f.5
1478 12:40:53.371538 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1479 12:40:53.374204 PCI: 00:1f.6
1480 12:40:53.383448 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1481 12:40:53.386480 Done allocating resources.
1482 12:40:53.392510 BS: BS_DEV_RESOURCES times (us): entry 0 run 2549333 exit 14
1483 12:40:53.395071 Enabling resources...
1484 12:40:53.399406 PCI: 00:00.0 subsystem <- 1028/3e34
1485 12:40:53.402108 PCI: 00:00.0 cmd <- 06
1486 12:40:53.405986 PCI: 00:02.0 subsystem <- 1028/3ea0
1487 12:40:53.407670 PCI: 00:02.0 cmd <- 03
1488 12:40:53.412660 PCI: 00:04.0 subsystem <- 1028/1903
1489 12:40:53.414070 PCI: 00:04.0 cmd <- 02
1490 12:40:53.416814 PCI: 00:08.0 cmd <- 06
1491 12:40:53.421443 PCI: 00:12.0 subsystem <- 1028/9df9
1492 12:40:53.423405 PCI: 00:12.0 cmd <- 02
1493 12:40:53.427623 PCI: 00:14.0 subsystem <- 1028/9ded
1494 12:40:53.429300 PCI: 00:14.0 cmd <- 02
1495 12:40:53.432083 PCI: 00:14.2 cmd <- 02
1496 12:40:53.435773 PCI: 00:14.3 subsystem <- 1028/9df0
1497 12:40:53.438133 PCI: 00:14.3 cmd <- 02
1498 12:40:53.442263 PCI: 00:15.0 subsystem <- 1028/9de8
1499 12:40:53.444530 PCI: 00:15.0 cmd <- 02
1500 12:40:53.448301 PCI: 00:15.1 subsystem <- 1028/9de9
1501 12:40:53.450554 PCI: 00:15.1 cmd <- 02
1502 12:40:53.454718 PCI: 00:16.0 subsystem <- 1028/9de0
1503 12:40:53.457077 PCI: 00:16.0 cmd <- 02
1504 12:40:53.461377 PCI: 00:17.0 subsystem <- 1028/9dd3
1505 12:40:53.463977 PCI: 00:17.0 cmd <- 03
1506 12:40:53.467029 PCI: 00:19.0 subsystem <- 1028/9dc5
1507 12:40:53.469594 PCI: 00:19.0 cmd <- 06
1508 12:40:53.473957 PCI: 00:19.2 subsystem <- 1028/9dc7
1509 12:40:53.475673 PCI: 00:19.2 cmd <- 06
1510 12:40:53.479353 PCI: 00:1c.0 bridge ctrl <- 0003
1511 12:40:53.482745 PCI: 00:1c.0 subsystem <- 1028/9dbf
1512 12:40:53.486247 Capability: type 0x10 @ 0x40
1513 12:40:53.489019 Capability: type 0x05 @ 0x80
1514 12:40:53.492154 Capability: type 0x0d @ 0x90
1515 12:40:53.494381 PCI: 00:1c.0 cmd <- 06
1516 12:40:53.498275 PCI: 00:1d.0 bridge ctrl <- 0003
1517 12:40:53.502084 PCI: 00:1d.0 subsystem <- 1028/9db4
1518 12:40:53.504770 Capability: type 0x10 @ 0x40
1519 12:40:53.507018 Capability: type 0x05 @ 0x80
1520 12:40:53.509859 Capability: type 0x0d @ 0x90
1521 12:40:53.512493 PCI: 00:1d.0 cmd <- 06
1522 12:40:53.516015 PCI: 00:1f.0 subsystem <- 1028/9d84
1523 12:40:53.519074 PCI: 00:1f.0 cmd <- 407
1524 12:40:53.523234 PCI: 00:1f.3 subsystem <- 1028/9dc8
1525 12:40:53.525283 PCI: 00:1f.3 cmd <- 02
1526 12:40:53.529208 PCI: 00:1f.4 subsystem <- 1028/9da3
1527 12:40:53.531252 PCI: 00:1f.4 cmd <- 03
1528 12:40:53.535634 PCI: 00:1f.5 subsystem <- 1028/9da4
1529 12:40:53.537523 PCI: 00:1f.5 cmd <- 406
1530 12:40:53.541929 PCI: 00:1f.6 subsystem <- 1028/15be
1531 12:40:53.543743 PCI: 00:1f.6 cmd <- 02
1532 12:40:53.554488 PCI: 01:00.0 cmd <- 02
1533 12:40:53.558905 PCI: 02:00.0 cmd <- 06
1534 12:40:53.562790 done.
1535 12:40:53.568866 BS: BS_DEV_ENABLE times (us): entry 405 run 170488 exit 0
1536 12:40:53.571304 Initializing devices...
1537 12:40:53.573522 Root Device init ...
1538 12:40:53.577250 Root Device init finished in 2139 usecs
1539 12:40:53.581086 CPU_CLUSTER: 0 init ...
1540 12:40:53.584475 CPU_CLUSTER: 0 init finished in 2429 usecs
1541 12:40:53.590925 PCI: 00:00.0 init ...
1542 12:40:53.593753 CPU TDP: 15 Watts
1543 12:40:53.595736 CPU PL2 = 51 Watts
1544 12:40:53.600248 PCI: 00:00.0 init finished in 7037 usecs
1545 12:40:53.602964 PCI: 00:02.0 init ...
1546 12:40:53.606414 PCI: 00:02.0 init finished in 2236 usecs
1547 12:40:53.609606 PCI: 00:04.0 init ...
1548 12:40:53.613089 PCI: 00:04.0 init finished in 2235 usecs
1549 12:40:53.615778 PCI: 00:08.0 init ...
1550 12:40:53.619755 PCI: 00:08.0 init finished in 2236 usecs
1551 12:40:53.622347 PCI: 00:12.0 init ...
1552 12:40:53.627000 PCI: 00:12.0 init finished in 2235 usecs
1553 12:40:53.629394 PCI: 00:14.0 init ...
1554 12:40:53.633379 PCI: 00:14.0 init finished in 2237 usecs
1555 12:40:53.636476 PCI: 00:14.2 init ...
1556 12:40:53.640407 PCI: 00:14.2 init finished in 2235 usecs
1557 12:40:53.643029 PCI: 00:14.3 init ...
1558 12:40:53.646984 PCI: 00:14.3 init finished in 2241 usecs
1559 12:40:53.649750 PCI: 00:15.0 init ...
1560 12:40:53.652911 DW I2C bus 0 at 0xd1347000 (400 KHz)
1561 12:40:53.657070 PCI: 00:15.0 init finished in 5934 usecs
1562 12:40:53.659678 PCI: 00:15.1 init ...
1563 12:40:53.663673 DW I2C bus 1 at 0xd1348000 (400 KHz)
1564 12:40:53.667460 PCI: 00:15.1 init finished in 5935 usecs
1565 12:40:53.670653 PCI: 00:16.0 init ...
1566 12:40:53.674119 PCI: 00:16.0 init finished in 2235 usecs
1567 12:40:53.677436 PCI: 00:19.0 init ...
1568 12:40:53.681397 DW I2C bus 4 at 0xd134a000 (400 KHz)
1569 12:40:53.686384 PCI: 00:19.0 init finished in 5924 usecs
1570 12:40:53.688792 PCI: 00:1c.0 init ...
1571 12:40:53.691089 Initializing PCH PCIe bridge.
1572 12:40:53.695834 PCI: 00:1c.0 init finished in 5248 usecs
1573 12:40:53.698399 PCI: 00:1d.0 init ...
1574 12:40:53.700980 Initializing PCH PCIe bridge.
1575 12:40:53.705382 PCI: 00:1d.0 init finished in 5248 usecs
1576 12:40:53.707992 PCI: 00:1f.0 init ...
1577 12:40:53.711929 IOAPIC: Initializing IOAPIC at 0xfec00000
1578 12:40:53.716829 IOAPIC: Bootstrap Processor Local APIC = 0x00
1579 12:40:53.719254 IOAPIC: ID = 0x02
1580 12:40:53.721239 IOAPIC: Dumping registers
1581 12:40:53.723171 reg 0x0000: 0x02000000
1582 12:40:53.726730 reg 0x0001: 0x00770020
1583 12:40:53.728848 reg 0x0002: 0x00000000
1584 12:40:53.734894 PCI: 00:1f.0 init finished in 25045 usecs
1585 12:40:53.737157 PCI: 00:1f.3 init ...
1586 12:40:53.742270 HDA: codec_mask = 05
1587 12:40:53.745674 HDA: Initializing codec #2
1588 12:40:53.747788 HDA: codec viddid: 8086280b
1589 12:40:53.751893 HDA: No verb table entry found
1590 12:40:53.754284 HDA: Initializing codec #0
1591 12:40:53.757040 HDA: codec viddid: 10ec0236
1592 12:40:53.763895 HDA: verb loaded.
1593 12:40:53.768096 PCI: 00:1f.3 init finished in 28836 usecs
1594 12:40:53.770774 PCI: 00:1f.4 init ...
1595 12:40:53.774776 PCI: 00:1f.4 init finished in 2246 usecs
1596 12:40:53.778372 PCI: 00:1f.6 init ...
1597 12:40:53.782483 PCI: 00:1f.6 init finished in 2236 usecs
1598 12:40:53.792839 PCI: 01:00.0 init ...
1599 12:40:53.796894 PCI: 01:00.0 init finished in 2235 usecs
1600 12:40:53.799467 PCI: 02:00.0 init ...
1601 12:40:53.803486 PCI: 02:00.0 init finished in 2235 usecs
1602 12:40:53.806399 PNP: 0c09.0 init ...
1603 12:40:53.810950 EC Label : 00.00.20
1604 12:40:53.813930 EC Revision : 9ca674bba
1605 12:40:53.817494 EC Model Num : 08B9
1606 12:40:53.821741 EC Build Date : 05/10/19
1607 12:40:53.830074 PNP: 0c09.0 init finished in 21737 usecs
1608 12:40:53.832594 Devices initialized
1609 12:40:53.834969 Show all devs... After init.
1610 12:40:53.837620 Root Device: enabled 1
1611 12:40:53.839916 CPU_CLUSTER: 0: enabled 1
1612 12:40:53.842380 DOMAIN: 0000: enabled 1
1613 12:40:53.844818 APIC: 00: enabled 1
1614 12:40:53.847558 PCI: 00:00.0: enabled 1
1615 12:40:53.850200 PCI: 00:02.0: enabled 1
1616 12:40:53.852938 PCI: 00:04.0: enabled 1
1617 12:40:53.854376 PCI: 00:12.0: enabled 1
1618 12:40:53.857167 PCI: 00:12.5: enabled 0
1619 12:40:53.859677 PCI: 00:12.6: enabled 0
1620 12:40:53.862124 PCI: 00:13.0: enabled 0
1621 12:40:53.864240 PCI: 00:14.0: enabled 1
1622 12:40:53.866680 PCI: 00:14.1: enabled 0
1623 12:40:53.869107 PCI: 00:14.3: enabled 1
1624 12:40:53.871141 PCI: 00:14.5: enabled 0
1625 12:40:53.874418 PCI: 00:15.0: enabled 1
1626 12:40:53.877023 PCI: 00:15.1: enabled 1
1627 12:40:53.878564 PCI: 00:15.2: enabled 0
1628 12:40:53.881176 PCI: 00:15.3: enabled 0
1629 12:40:53.884089 PCI: 00:16.0: enabled 1
1630 12:40:53.885709 PCI: 00:16.1: enabled 0
1631 12:40:53.888608 PCI: 00:16.2: enabled 0
1632 12:40:53.891348 PCI: 00:16.3: enabled 0
1633 12:40:53.893310 PCI: 00:16.4: enabled 0
1634 12:40:53.896116 PCI: 00:16.5: enabled 0
1635 12:40:53.898053 PCI: 00:17.0: enabled 1
1636 12:40:53.900920 PCI: 00:19.0: enabled 1
1637 12:40:53.903665 PCI: 00:19.1: enabled 0
1638 12:40:53.906208 PCI: 00:19.2: enabled 1
1639 12:40:53.908169 PCI: 00:1a.0: enabled 0
1640 12:40:53.910585 PCI: 00:1c.0: enabled 1
1641 12:40:53.912826 PCI: 00:1c.1: enabled 0
1642 12:40:53.914844 PCI: 00:1c.2: enabled 0
1643 12:40:53.917338 PCI: 00:1c.3: enabled 0
1644 12:40:53.919687 PCI: 00:1c.4: enabled 0
1645 12:40:53.922235 PCI: 00:1c.5: enabled 0
1646 12:40:53.924457 PCI: 00:1c.6: enabled 0
1647 12:40:53.927347 PCI: 00:1c.7: enabled 0
1648 12:40:53.929908 PCI: 00:1d.0: enabled 1
1649 12:40:53.932432 PCI: 00:1d.1: enabled 0
1650 12:40:53.934613 PCI: 00:1d.2: enabled 0
1651 12:40:53.937568 PCI: 00:1d.3: enabled 0
1652 12:40:53.939048 PCI: 00:1d.4: enabled 0
1653 12:40:53.942409 PCI: 00:1e.0: enabled 0
1654 12:40:53.944056 PCI: 00:1e.1: enabled 0
1655 12:40:53.947170 PCI: 00:1e.2: enabled 0
1656 12:40:53.949265 PCI: 00:1e.3: enabled 0
1657 12:40:53.951970 PCI: 00:1f.0: enabled 1
1658 12:40:53.954745 PCI: 00:1f.1: enabled 0
1659 12:40:53.956439 PCI: 00:1f.2: enabled 0
1660 12:40:53.959151 PCI: 00:1f.3: enabled 1
1661 12:40:53.961306 PCI: 00:1f.4: enabled 1
1662 12:40:53.963834 PCI: 00:1f.5: enabled 1
1663 12:40:53.966335 PCI: 00:1f.6: enabled 1
1664 12:40:53.969034 USB0 port 0: enabled 1
1665 12:40:53.970977 I2C: 01:10: enabled 1
1666 12:40:53.973242 I2C: 01:10: enabled 1
1667 12:40:53.975136 I2C: 01:34: enabled 1
1668 12:40:53.977573 I2C: 02:2c: enabled 1
1669 12:40:53.979800 I2C: 03:50: enabled 1
1670 12:40:53.981826 PNP: 0c09.0: enabled 1
1671 12:40:53.985036 USB2 port 0: enabled 1
1672 12:40:53.986368 USB2 port 1: enabled 1
1673 12:40:53.989610 USB2 port 2: enabled 1
1674 12:40:53.992161 USB2 port 4: enabled 1
1675 12:40:53.993586 USB2 port 5: enabled 1
1676 12:40:53.995890 USB2 port 6: enabled 1
1677 12:40:53.998536 USB2 port 7: enabled 1
1678 12:40:54.001003 USB2 port 8: enabled 1
1679 12:40:54.003654 USB2 port 9: enabled 1
1680 12:40:54.005802 USB3 port 0: enabled 1
1681 12:40:54.007363 USB3 port 1: enabled 1
1682 12:40:54.010193 USB3 port 2: enabled 1
1683 12:40:54.012669 USB3 port 3: enabled 1
1684 12:40:54.015495 USB3 port 4: enabled 1
1685 12:40:54.016495 APIC: 03: enabled 1
1686 12:40:54.019132 APIC: 01: enabled 1
1687 12:40:54.021590 APIC: 02: enabled 1
1688 12:40:54.023749 APIC: 07: enabled 1
1689 12:40:54.025512 APIC: 06: enabled 1
1690 12:40:54.027052 APIC: 05: enabled 1
1691 12:40:54.029053 APIC: 04: enabled 1
1692 12:40:54.031854 PCI: 00:08.0: enabled 1
1693 12:40:54.034123 PCI: 00:14.2: enabled 1
1694 12:40:54.036027 PCI: 01:00.0: enabled 1
1695 12:40:54.039221 PCI: 02:00.0: enabled 1
1696 12:40:54.043754 Disabling ACPI via APMC:
1697 12:40:54.045592 done.
1698 12:40:54.050560 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1699 12:40:54.054531 ELOG: NV offset 0x1bf0000 size 0x4000
1700 12:40:54.062163 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1701 12:40:54.068872 ELOG: Event(17) added with size 13 at 2024-01-03 12:40:54 UTC
1702 12:40:54.074066 POST: Unexpected post code in previous boot: 0x73
1703 12:40:54.080033 ELOG: Event(A3) added with size 11 at 2024-01-03 12:40:54 UTC
1704 12:40:54.087117 ELOG: Event(92) added with size 9 at 2024-01-03 12:40:54 UTC
1705 12:40:54.092672 ELOG: Event(93) added with size 9 at 2024-01-03 12:40:54 UTC
1706 12:40:54.099351 ELOG: Event(9A) added with size 9 at 2024-01-03 12:40:54 UTC
1707 12:40:54.105177 ELOG: Event(9E) added with size 10 at 2024-01-03 12:40:54 UTC
1708 12:40:54.111374 ELOG: Event(9F) added with size 14 at 2024-01-03 12:40:54 UTC
1709 12:40:54.117967 ELOG: Event(16) added with size 11 at 2024-01-03 12:40:54 UTC
1710 12:40:54.121278 Erasing flash addr 1bf0000 + 4 KiB
1711 12:40:54.184192 BS: BS_DEV_INIT times (us): entry 0 run 469791 exit 113532
1712 12:40:54.190751 ELOG: Event(A1) added with size 10 at 2024-01-03 12:40:54 UTC
1713 12:40:54.198650 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1714 12:40:54.204983 ELOG: Event(A0) added with size 9 at 2024-01-03 12:40:54 UTC
1715 12:40:54.209223 elog_add_boot_reason: Logged dev mode boot
1716 12:40:54.211246 Finalize devices...
1717 12:40:54.213752 PCI: 00:17.0 final
1718 12:40:54.215187 Devices finalized
1719 12:40:54.219668 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1720 12:40:54.226647 BS: BS_POST_DEVICE times (us): entry 24775 run 5935 exit 5359
1721 12:40:54.232195 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1722 12:40:54.240966 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1723 12:40:54.244819 disable_unused_touchscreen: Disable ACPI0C50
1724 12:40:54.249280 disable_unused_touchscreen: Enable ELAN900C
1725 12:40:54.252804 CBFS @ 1d00000 size 300000
1726 12:40:54.258423 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1727 12:40:54.261834 CBFS: Locating 'fallback/dsdt.aml'
1728 12:40:54.266224 CBFS: Found @ offset 10b200 size 4448
1729 12:40:54.268426 CBFS @ 1d00000 size 300000
1730 12:40:54.274792 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1731 12:40:54.278028 CBFS: Locating 'fallback/slic'
1732 12:40:54.283708 CBFS: 'fallback/slic' not found.
1733 12:40:54.287517 ACPI: Writing ACPI tables at 89c0f000.
1734 12:40:54.288669 ACPI: * FACS
1735 12:40:54.290385 ACPI: * DSDT
1736 12:40:54.294102 Ramoops buffer: 0x100000@0x89b0e000.
1737 12:40:54.299134 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1738 12:40:54.303624 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1739 12:40:54.307750 ACPI: * FADT
1740 12:40:54.308999 SCI is IRQ9
1741 12:40:54.313272 ACPI: added table 1/32, length now 40
1742 12:40:54.314263 ACPI: * SSDT
1743 12:40:54.318217 Found 1 CPU(s) with 8 core(s) each.
1744 12:40:54.322489 Error: Could not locate 'wifi_sar' in VPD.
1745 12:40:54.326386 Error: failed from getting SAR limits!
1746 12:40:54.330279 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1747 12:40:54.333995 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1748 12:40:54.337928 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1749 12:40:54.342072 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1750 12:40:54.347885 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1751 12:40:54.352946 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1752 12:40:54.357835 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1753 12:40:54.361941 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1754 12:40:54.367484 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1755 12:40:54.374148 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1756 12:40:54.379223 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1757 12:40:54.385507 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1758 12:40:54.390609 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1759 12:40:54.395420 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1760 12:40:54.399146 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1761 12:40:54.404331 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1762 12:40:54.409943 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1763 12:40:54.415486 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1764 12:40:54.421268 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1765 12:40:54.427410 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1766 12:40:54.432938 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1767 12:40:54.437579 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1768 12:40:54.441782 ACPI: added table 2/32, length now 44
1769 12:40:54.443815 ACPI: * MCFG
1770 12:40:54.447544 ACPI: added table 3/32, length now 48
1771 12:40:54.448801 ACPI: * TPM2
1772 12:40:54.452030 TPM2 log created at 89afe000
1773 12:40:54.455025 ACPI: added table 4/32, length now 52
1774 12:40:54.456956 ACPI: * MADT
1775 12:40:54.458801 SCI is IRQ9
1776 12:40:54.461928 ACPI: added table 5/32, length now 56
1777 12:40:54.464432 current = 89c14bd0
1778 12:40:54.466258 ACPI: * IGD OpRegion
1779 12:40:54.469167 GMA: Found VBT in CBFS
1780 12:40:54.471488 GMA: Found valid VBT in CBFS
1781 12:40:54.476003 ACPI: added table 6/32, length now 60
1782 12:40:54.476925 ACPI: * HPET
1783 12:40:54.480838 ACPI: added table 7/32, length now 64
1784 12:40:54.482247 ACPI: done.
1785 12:40:54.485710 ACPI tables: 31872 bytes.
1786 12:40:54.487373 smbios_write_tables: 89afd000
1787 12:40:54.490089 recv_ec_data: 0x01
1788 12:40:54.492725 Create SMBIOS type 17
1789 12:40:54.495392 PCI: 00:14.3 (Intel WiFi)
1790 12:40:54.497263 SMBIOS tables: 708 bytes.
1791 12:40:54.502324 Writing table forward entry at 0x00000500
1792 12:40:54.507752 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1793 12:40:54.511129 Writing coreboot table at 0x89c33000
1794 12:40:54.517864 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1795 12:40:54.522273 1. 0000000000001000-000000000009ffff: RAM
1796 12:40:54.527042 2. 00000000000a0000-00000000000fffff: RESERVED
1797 12:40:54.530926 3. 0000000000100000-0000000089afcfff: RAM
1798 12:40:54.536311 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1799 12:40:54.541477 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1800 12:40:54.547318 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1801 12:40:54.551829 7. 000000008a000000-000000008f7fffff: RESERVED
1802 12:40:54.556854 8. 00000000e0000000-00000000efffffff: RESERVED
1803 12:40:54.561533 9. 00000000fc000000-00000000fc000fff: RESERVED
1804 12:40:54.566485 10. 00000000fe000000-00000000fe00ffff: RESERVED
1805 12:40:54.571570 11. 00000000fed10000-00000000fed17fff: RESERVED
1806 12:40:54.576379 12. 00000000fed80000-00000000fed83fff: RESERVED
1807 12:40:54.581051 13. 00000000feda0000-00000000feda1fff: RESERVED
1808 12:40:54.585973 14. 0000000100000000-000000026e7fffff: RAM
1809 12:40:54.588983 Graphics framebuffer located at 0xc0000000
1810 12:40:54.592109 Passing 6 GPIOs to payload:
1811 12:40:54.597577 NAME | PORT | POLARITY | VALUE
1812 12:40:54.602337 write protect | 0x000000dc | high | low
1813 12:40:54.607605 recovery | 0x000000d5 | low | high
1814 12:40:54.613358 lid | undefined | high | high
1815 12:40:54.617967 power | undefined | high | low
1816 12:40:54.623808 oprom | undefined | high | low
1817 12:40:54.628855 EC in RW | undefined | high | low
1818 12:40:54.630688 recv_ec_data: 0x01
1819 12:40:54.631785 SKU ID: 3
1820 12:40:54.634957 CBFS @ 1d00000 size 300000
1821 12:40:54.641466 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1822 12:40:54.647560 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum bba
1823 12:40:54.650554 coreboot table: 1484 bytes.
1824 12:40:54.653165 IMD ROOT 0. 89fff000 00001000
1825 12:40:54.656468 IMD SMALL 1. 89ffe000 00001000
1826 12:40:54.659778 FSP MEMORY 2. 89d0e000 002f0000
1827 12:40:54.664183 CONSOLE 3. 89cee000 00020000
1828 12:40:54.667314 TIME STAMP 4. 89ced000 00000910
1829 12:40:54.670418 VBOOT WORK 5. 89cea000 00003000
1830 12:40:54.672926 VBOOT 6. 89ce9000 00000c0c
1831 12:40:54.676276 MRC DATA 7. 89ce7000 000018f0
1832 12:40:54.680144 ROMSTG STCK 8. 89ce6000 00000400
1833 12:40:54.683165 AFTER CAR 9. 89cdc000 0000a000
1834 12:40:54.686580 RAMSTAGE 10. 89c80000 0005c000
1835 12:40:54.690139 REFCODE 11. 89c4b000 00035000
1836 12:40:54.693436 SMM BACKUP 12. 89c3b000 00010000
1837 12:40:54.696070 COREBOOT 13. 89c33000 00008000
1838 12:40:54.700229 ACPI 14. 89c0f000 00024000
1839 12:40:54.703637 ACPI GNVS 15. 89c0e000 00001000
1840 12:40:54.706506 RAMOOPS 16. 89b0e000 00100000
1841 12:40:54.710143 TPM2 TCGLOG17. 89afe000 00010000
1842 12:40:54.712701 SMBIOS 18. 89afd000 00000800
1843 12:40:54.714866 IMD small region:
1844 12:40:54.718820 IMD ROOT 0. 89ffec00 00000400
1845 12:40:54.722244 FSP RUNTIME 1. 89ffebe0 00000004
1846 12:40:54.725869 POWER STATE 2. 89ffeba0 00000040
1847 12:40:54.729185 ROMSTAGE 3. 89ffeb80 00000004
1848 12:40:54.732244 MEM INFO 4. 89ffe9c0 000001a9
1849 12:40:54.735654 VPD 5. 89ffe960 00000058
1850 12:40:54.740294 COREBOOTFWD 6. 89ffe920 00000028
1851 12:40:54.742522 MTRR: Physical address space:
1852 12:40:54.749368 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1853 12:40:54.754566 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1854 12:40:54.761130 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1855 12:40:54.767753 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1856 12:40:54.773788 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1857 12:40:54.780315 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1858 12:40:54.786725 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1859 12:40:54.789777 MTRR: Fixed MSR 0x250 0x0606060606060606
1860 12:40:54.794313 MTRR: Fixed MSR 0x258 0x0606060606060606
1861 12:40:54.798771 MTRR: Fixed MSR 0x259 0x0000000000000000
1862 12:40:54.802297 MTRR: Fixed MSR 0x268 0x0606060606060606
1863 12:40:54.806961 MTRR: Fixed MSR 0x269 0x0606060606060606
1864 12:40:54.811026 MTRR: Fixed MSR 0x26a 0x0606060606060606
1865 12:40:54.814639 MTRR: Fixed MSR 0x26b 0x0606060606060606
1866 12:40:54.819164 MTRR: Fixed MSR 0x26c 0x0606060606060606
1867 12:40:54.823308 MTRR: Fixed MSR 0x26d 0x0606060606060606
1868 12:40:54.827001 MTRR: Fixed MSR 0x26e 0x0606060606060606
1869 12:40:54.831133 MTRR: Fixed MSR 0x26f 0x0606060606060606
1870 12:40:54.834210 call enable_fixed_mtrr()
1871 12:40:54.838334 CPU physical address size: 39 bits
1872 12:40:54.841930 MTRR: default type WB/UC MTRR counts: 7/7.
1873 12:40:54.846441 MTRR: UC selected as default type.
1874 12:40:54.852055 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1875 12:40:54.858817 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1876 12:40:54.864053 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1877 12:40:54.871083 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1878 12:40:54.877223 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1879 12:40:54.883527 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1880 12:40:54.889320 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1881 12:40:54.890785
1882 12:40:54.892168 MTRR check
1883 12:40:54.894194 Fixed MTRRs : Enabled
1884 12:40:54.896032 Variable MTRRs: Enabled
1885 12:40:54.896406
1886 12:40:54.900997 MTRR: Fixed MSR 0x250 0x0606060606060606
1887 12:40:54.904873 MTRR: Fixed MSR 0x258 0x0606060606060606
1888 12:40:54.908744 MTRR: Fixed MSR 0x259 0x0000000000000000
1889 12:40:54.912616 MTRR: Fixed MSR 0x268 0x0606060606060606
1890 12:40:54.916773 MTRR: Fixed MSR 0x269 0x0606060606060606
1891 12:40:54.921336 MTRR: Fixed MSR 0x26a 0x0606060606060606
1892 12:40:54.925078 MTRR: Fixed MSR 0x26b 0x0606060606060606
1893 12:40:54.929040 MTRR: Fixed MSR 0x26c 0x0606060606060606
1894 12:40:54.933367 MTRR: Fixed MSR 0x26d 0x0606060606060606
1895 12:40:54.937384 MTRR: Fixed MSR 0x26e 0x0606060606060606
1896 12:40:54.941070 MTRR: Fixed MSR 0x26f 0x0606060606060606
1897 12:40:54.948218 BS: BS_WRITE_TABLES times (us): entry 17197 run 490127 exit 157186
1898 12:40:54.950917 call enable_fixed_mtrr()
1899 12:40:54.954068 CBFS @ 1d00000 size 300000
1900 12:40:54.960358 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1901 12:40:54.963316 CPU physical address size: 39 bits
1902 12:40:54.967854 CBFS: Locating 'fallback/payload'
1903 12:40:54.971425 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 12:40:54.975699 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 12:40:54.980157 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 12:40:54.983768 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 12:40:54.987875 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 12:40:54.991918 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 12:40:54.995732 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 12:40:54.999762 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 12:40:55.003941 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 12:40:55.008501 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 12:40:55.012077 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 12:40:55.015773 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 12:40:55.020719 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 12:40:55.022848 call enable_fixed_mtrr()
1917 12:40:55.027437 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 12:40:55.030889 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 12:40:55.036008 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 12:40:55.039886 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 12:40:55.043333 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 12:40:55.047578 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 12:40:55.052354 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 12:40:55.056319 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 12:40:55.060489 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 12:40:55.063972 CPU physical address size: 39 bits
1927 12:40:55.067278 call enable_fixed_mtrr()
1928 12:40:55.071671 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 12:40:55.074339 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 12:40:55.079214 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 12:40:55.083389 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 12:40:55.087301 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 12:40:55.090601 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 12:40:55.095280 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 12:40:55.099300 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 12:40:55.103012 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 12:40:55.107944 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 12:40:55.111596 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 12:40:55.115921 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 12:40:55.119885 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 12:40:55.122826 call enable_fixed_mtrr()
1942 12:40:55.126406 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 12:40:55.130774 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 12:40:55.134835 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 12:40:55.139312 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 12:40:55.143219 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 12:40:55.147066 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 12:40:55.150673 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 12:40:55.155069 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 12:40:55.159125 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 12:40:55.162683 CPU physical address size: 39 bits
1952 12:40:55.166520 call enable_fixed_mtrr()
1953 12:40:55.169054 CPU physical address size: 39 bits
1954 12:40:55.174020 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 12:40:55.178245 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 12:40:55.182430 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 12:40:55.186658 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 12:40:55.189466 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 12:40:55.193866 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 12:40:55.198541 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 12:40:55.202605 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 12:40:55.205730 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 12:40:55.210914 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 12:40:55.214324 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 12:40:55.218596 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 12:40:55.223435 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 12:40:55.225961 call enable_fixed_mtrr()
1968 12:40:55.229233 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 12:40:55.233925 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 12:40:55.237687 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 12:40:55.241771 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 12:40:55.245999 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 12:40:55.250541 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 12:40:55.254059 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 12:40:55.258479 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 12:40:55.262327 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 12:40:55.266286 CPU physical address size: 39 bits
1978 12:40:55.269063 call enable_fixed_mtrr()
1979 12:40:55.273289 CBFS: Found @ offset 1cf4c0 size 3a954
1980 12:40:55.276206 CPU physical address size: 39 bits
1981 12:40:55.280302 CPU physical address size: 39 bits
1982 12:40:55.284889 Checking segment from ROM address 0xffecf4f8
1983 12:40:55.288521 Checking segment from ROM address 0xffecf514
1984 12:40:55.293828 Loading segment from ROM address 0xffecf4f8
1985 12:40:55.295252 code (compression=0)
1986 12:40:55.304503 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1987 12:40:55.312624 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1988 12:40:55.314602 it's not compressed!
1989 12:40:55.397080 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1990 12:40:55.403393 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1991 12:40:55.411960 Loading segment from ROM address 0xffecf514
1992 12:40:55.414090 Entry Point 0x30100018
1993 12:40:55.416736 Loaded segments
1994 12:40:55.426183 Finalizing chipset.
1995 12:40:55.427474 Finalizing SMM.
1996 12:40:55.433118 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 467038 exit 11523
1997 12:40:55.437352 mp_park_aps done after 0 msecs.
1998 12:40:55.440735 Jumping to boot code at 30100018(89c33000)
1999 12:40:55.450275 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
2000 12:40:55.450699
2001 12:40:55.451391
2002 12:40:55.451771
2003 12:40:55.452978 Starting depthcharge on sarien...
2004 12:40:55.455311 end: 2.2.3 depthcharge-start (duration 00:00:12) [common]
2005 12:40:55.455920 start: 2.2.4 bootloader-commands (timeout 00:04:31) [common]
2006 12:40:55.456467 Setting prompt string to ['sarien:']
2007 12:40:55.456951 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:31)
2008 12:40:55.457720
2009 12:40:55.460802 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2010 12:40:55.461232
2011 12:40:55.468014 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2012 12:40:55.468823
2013 12:40:55.476305 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
2014 12:40:55.476909
2015 12:40:55.478318 BIOS MMAP details:
2016 12:40:55.478973
2017 12:40:55.480713 IFD Base Offset : 0x1000000
2018 12:40:55.481489
2019 12:40:55.483972 IFD End Offset : 0x2000000
2020 12:40:55.484439
2021 12:40:55.487461 MMAP Size : 0x1000000
2022 12:40:55.487949
2023 12:40:55.489925 MMAP Start : 0xff000000
2024 12:40:55.490621
2025 12:40:55.496579 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
2026 12:40:55.501225
2027 12:40:55.504994 New NVMe Controller 0x3214e128 @ 00:1d:04
2028 12:40:55.505412
2029 12:40:55.509671 New NVMe Controller 0x3214e1f0 @ 00:1d:00
2030 12:40:55.510531
2031 12:40:55.515739 The GBB signature is at 0x30000014 and is: 24 47 42 42
2032 12:40:55.519781
2033 12:40:55.521852 Wipe memory regions:
2034 12:40:55.522266
2035 12:40:55.525874 [0x00000000001000, 0x000000000a0000)
2036 12:40:55.526289
2037 12:40:55.529371 [0x00000000100000, 0x00000030000000)
2038 12:40:55.611629
2039 12:40:55.615443 [0x00000032751910, 0x00000089afd000)
2040 12:40:55.764434
2041 12:40:55.768639 [0x00000100000000, 0x0000026e800000)
2042 12:40:56.781202
2043 12:40:56.783444 R8152: Initializing
2044 12:40:56.783762
2045 12:40:56.786437 Version 6 (ocp_data = 5c30)
2046 12:40:56.787164
2047 12:40:56.789512 R8152: Done initializing
2048 12:40:56.790319
2049 12:40:56.791036 Adding net device
2050 12:40:56.791589
2051 12:40:56.797834 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2052 12:40:56.798099
2053 12:40:56.798607
2054 12:40:56.798834
2055 12:40:56.799443 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 12:40:56.900172 sarien: tftpboot 192.168.201.1 12437369/tftp-deploy-iou58a26/kernel/bzImage 12437369/tftp-deploy-iou58a26/kernel/cmdline 12437369/tftp-deploy-iou58a26/ramdisk/ramdisk.cpio.gz
2058 12:40:56.900305 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 12:40:56.900438 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:30)
2060 12:40:56.943809 tftpboot 192.168.201.1 12437369/tftp-deploy-iou58a26/kernel/bzImage 12437369/tftp-deploy-iou58a26/kernel/cmdline 12437369/tftp-deploy-iou58a26/ramdisk/ramdisk.cpio.gz
2061 12:40:56.944039
2062 12:40:56.944398 Waiting for link
2063 12:40:57.103305
2064 12:40:57.104608 done.
2065 12:40:57.104793
2066 12:40:57.106687 MAC: 00:24:32:30:7c:12
2067 12:40:57.106867
2068 12:40:57.109437 Sending DHCP discover... done.
2069 12:40:57.110076
2070 12:40:57.112594 Waiting for reply... done.
2071 12:40:57.112812
2072 12:40:57.115538 Sending DHCP request... done.
2073 12:40:57.115789
2074 12:40:57.119883 Waiting for reply... done.
2075 12:40:57.120079
2076 12:40:57.122763 My ip is 192.168.201.191
2077 12:40:57.123262
2078 12:40:57.126678 The DHCP server ip is 192.168.201.1
2079 12:40:57.126903
2080 12:40:57.131185 TFTP server IP predefined by user: 192.168.201.1
2081 12:40:57.131459
2082 12:40:57.138513 Bootfile predefined by user: 12437369/tftp-deploy-iou58a26/kernel/bzImage
2083 12:40:57.138716
2084 12:40:57.141134 Sending tftp read request... done.
2085 12:40:57.141547
2086 12:40:57.146497 Waiting for the transfer...
2087 12:40:57.146680
2088 12:40:57.687610 00000000 ################################################################
2089 12:40:57.688924
2090 12:40:58.238820 00080000 ################################################################
2091 12:40:58.239319
2092 12:40:58.928489 00100000 ################################################################
2093 12:40:58.929023
2094 12:40:59.611323 00180000 ################################################################
2095 12:40:59.612255
2096 12:41:00.231610 00200000 ################################################################
2097 12:41:00.233006
2098 12:41:00.800106 00280000 ################################################################
2099 12:41:00.801012
2100 12:41:01.486061 00300000 ################################################################
2101 12:41:01.486572
2102 12:41:02.151418 00380000 ################################################################
2103 12:41:02.152529
2104 12:41:02.811758 00400000 ################################################################
2105 12:41:02.812677
2106 12:41:03.509208 00480000 ################################################################
2107 12:41:03.509701
2108 12:41:04.233008 00500000 ################################################################
2109 12:41:04.233521
2110 12:41:04.957856 00580000 ################################################################
2111 12:41:04.958427
2112 12:41:05.685021 00600000 ################################################################
2113 12:41:05.686096
2114 12:41:06.401951 00680000 ################################################################
2115 12:41:06.402565
2116 12:41:07.099572 00700000 ################################################################
2117 12:41:07.100055
2118 12:41:07.799074 00780000 ################################################################
2119 12:41:07.799701
2120 12:41:08.064552 00800000 ######################## done.
2121 12:41:08.065057
2122 12:41:08.067769 The bootfile was 8585104 bytes long.
2123 12:41:08.068198
2124 12:41:08.072458 Sending tftp read request... done.
2125 12:41:08.073769
2126 12:41:08.076137 Waiting for the transfer...
2127 12:41:08.076636
2128 12:41:08.750778 00000000 ################################################################
2129 12:41:08.751368
2130 12:41:09.443896 00080000 ################################################################
2131 12:41:09.445277
2132 12:41:10.171154 00100000 ################################################################
2133 12:41:10.171770
2134 12:41:10.885293 00180000 ################################################################
2135 12:41:10.886374
2136 12:41:11.603429 00200000 ################################################################
2137 12:41:11.604053
2138 12:41:12.310329 00280000 ################################################################
2139 12:41:12.311363
2140 12:41:13.039278 00300000 ################################################################
2141 12:41:13.040480
2142 12:41:13.767191 00380000 ################################################################
2143 12:41:13.768037
2144 12:41:14.476632 00400000 ################################################################
2145 12:41:14.477715
2146 12:41:15.191411 00480000 ################################################################
2147 12:41:15.192174
2148 12:41:15.894197 00500000 ################################################################ done.
2149 12:41:15.894708
2150 12:41:15.897728 Sending tftp read request... done.
2151 12:41:15.898150
2152 12:41:15.900540 Waiting for the transfer...
2153 12:41:15.901626
2154 12:41:15.902080 00000000 # done.
2155 12:41:15.903089
2156 12:41:15.911681 Command line loaded dynamically from TFTP file: 12437369/tftp-deploy-iou58a26/kernel/cmdline
2157 12:41:15.912106
2158 12:41:15.940350 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12437369/extract-nfsrootfs-lxfn6pfw,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2159 12:41:15.944023
2160 12:41:15.947586 Shutting down all USB controllers.
2161 12:41:15.948091
2162 12:41:15.950390 Removing current net device
2163 12:41:15.951728
2164 12:41:15.953515 EC: exit firmware mode
2165 12:41:15.955090
2166 12:41:15.957042 Finalizing coreboot
2167 12:41:15.958058
2168 12:41:15.963758 Exiting depthcharge with code 4 at timestamp: 28120991
2169 12:41:15.963939
2170 12:41:15.964464
2171 12:41:15.965886 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2172 12:41:15.966064 start: 2.2.5 auto-login-action (timeout 00:04:11) [common]
2173 12:41:15.966203 Setting prompt string to ['Linux version [0-9]']
2174 12:41:15.966328 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 12:41:15.966452 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2176 12:41:15.966754 Starting kernel ...
2177 12:41:15.966882
2178 12:41:15.966994
2180 12:45:26.966493 end: 2.2.5 auto-login-action (duration 00:04:11) [common]
2182 12:45:26.967055 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 251 seconds'
2184 12:45:26.967504 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2187 12:45:26.968263 end: 2 depthcharge-action (duration 00:05:00) [common]
2189 12:45:26.968874 Cleaning after the job
2190 12:45:26.969103 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437369/tftp-deploy-iou58a26/ramdisk
2191 12:45:26.970812 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437369/tftp-deploy-iou58a26/kernel
2192 12:45:26.973124 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437369/tftp-deploy-iou58a26/nfsrootfs
2193 12:45:27.054990 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437369/tftp-deploy-iou58a26/modules
2194 12:45:27.055502 start: 5.1 power-off (timeout 00:00:30) [common]
2195 12:45:27.055744 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-2' '--port=1' '--command=off'
2196 12:45:32.189890 >> Command sent successfully.
2197 12:45:32.192506 Returned 0 in 5 seconds
2198 12:45:32.292898 end: 5.1 power-off (duration 00:00:05) [common]
2200 12:45:32.293213 start: 5.2 read-feedback (timeout 00:09:55) [common]
2201 12:45:32.293461 Listened to connection for namespace 'common' for up to 1s
2202 12:45:33.294429 Finalising connection for namespace 'common'
2203 12:45:33.294602 Disconnecting from shell: Finalise
2204 12:45:33.294680
2205 12:45:33.395023 end: 5.2 read-feedback (duration 00:00:01) [common]
2206 12:45:33.395187 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12437369
2207 12:45:33.703438 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12437369
2208 12:45:33.703639 JobError: Your job cannot terminate cleanly.