Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:39:55.010098 lava-dispatcher, installed at version: 2023.10
2 12:39:55.010315 start: 0 validate
3 12:39:55.010454 Start time: 2024-01-03 12:39:55.010446+00:00 (UTC)
4 12:39:55.010581 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:39:55.010724 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 12:39:55.271114 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:39:55.271408 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:39:58.792835 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:39:58.793580 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:39:59.805908 validate duration: 4.80
12 12:39:59.806201 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:39:59.806311 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:39:59.806400 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:39:59.806528 Not decompressing ramdisk as can be used compressed.
16 12:39:59.806613 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 12:39:59.806679 saving as /var/lib/lava/dispatcher/tmp/12437315/tftp-deploy-vkw3yt6g/ramdisk/rootfs.cpio.gz
18 12:39:59.806741 total size: 35760064 (34 MB)
19 12:39:59.811293 progress 0 % (0 MB)
20 12:39:59.820748 progress 5 % (1 MB)
21 12:39:59.830205 progress 10 % (3 MB)
22 12:39:59.839467 progress 15 % (5 MB)
23 12:39:59.848998 progress 20 % (6 MB)
24 12:39:59.858310 progress 25 % (8 MB)
25 12:39:59.867917 progress 30 % (10 MB)
26 12:39:59.877560 progress 35 % (11 MB)
27 12:39:59.887308 progress 40 % (13 MB)
28 12:39:59.896974 progress 45 % (15 MB)
29 12:39:59.906466 progress 50 % (17 MB)
30 12:39:59.916736 progress 55 % (18 MB)
31 12:39:59.926570 progress 60 % (20 MB)
32 12:39:59.936298 progress 65 % (22 MB)
33 12:39:59.945721 progress 70 % (23 MB)
34 12:39:59.955143 progress 75 % (25 MB)
35 12:39:59.964747 progress 80 % (27 MB)
36 12:39:59.974045 progress 85 % (29 MB)
37 12:39:59.983622 progress 90 % (30 MB)
38 12:39:59.992730 progress 95 % (32 MB)
39 12:40:00.002078 progress 100 % (34 MB)
40 12:40:00.002284 34 MB downloaded in 0.20 s (174.41 MB/s)
41 12:40:00.002450 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:40:00.002692 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:40:00.002776 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:40:00.002858 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:40:00.002993 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:40:00.003063 saving as /var/lib/lava/dispatcher/tmp/12437315/tftp-deploy-vkw3yt6g/kernel/bzImage
48 12:40:00.003123 total size: 8585104 (8 MB)
49 12:40:00.003182 No compression specified
50 12:40:00.004359 progress 0 % (0 MB)
51 12:40:00.006805 progress 5 % (0 MB)
52 12:40:00.010397 progress 10 % (0 MB)
53 12:40:00.012826 progress 15 % (1 MB)
54 12:40:00.015096 progress 20 % (1 MB)
55 12:40:00.017406 progress 25 % (2 MB)
56 12:40:00.019662 progress 30 % (2 MB)
57 12:40:00.022009 progress 35 % (2 MB)
58 12:40:00.024321 progress 40 % (3 MB)
59 12:40:00.026654 progress 45 % (3 MB)
60 12:40:00.028964 progress 50 % (4 MB)
61 12:40:00.031418 progress 55 % (4 MB)
62 12:40:00.033661 progress 60 % (4 MB)
63 12:40:00.035956 progress 65 % (5 MB)
64 12:40:00.038244 progress 70 % (5 MB)
65 12:40:00.040692 progress 75 % (6 MB)
66 12:40:00.042911 progress 80 % (6 MB)
67 12:40:00.045201 progress 85 % (6 MB)
68 12:40:00.047419 progress 90 % (7 MB)
69 12:40:00.049679 progress 95 % (7 MB)
70 12:40:00.051969 progress 100 % (8 MB)
71 12:40:00.052278 8 MB downloaded in 0.05 s (166.58 MB/s)
72 12:40:00.052425 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:40:00.052658 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:40:00.052742 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:40:00.052828 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:40:00.052969 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:40:00.053040 saving as /var/lib/lava/dispatcher/tmp/12437315/tftp-deploy-vkw3yt6g/modules/modules.tar
79 12:40:00.053101 total size: 253660 (0 MB)
80 12:40:00.053161 Using unxz to decompress xz
81 12:40:00.057623 progress 12 % (0 MB)
82 12:40:00.058052 progress 25 % (0 MB)
83 12:40:00.058292 progress 38 % (0 MB)
84 12:40:00.059929 progress 51 % (0 MB)
85 12:40:00.061817 progress 64 % (0 MB)
86 12:40:00.063786 progress 77 % (0 MB)
87 12:40:00.065568 progress 90 % (0 MB)
88 12:40:00.067524 progress 100 % (0 MB)
89 12:40:00.073078 0 MB downloaded in 0.02 s (12.11 MB/s)
90 12:40:00.073317 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:40:00.073591 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:40:00.073689 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 12:40:00.073794 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 12:40:00.073877 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:40:00.073963 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 12:40:00.074195 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv
98 12:40:00.074328 makedir: /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin
99 12:40:00.074435 makedir: /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/tests
100 12:40:00.074533 makedir: /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/results
101 12:40:00.074650 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-add-keys
102 12:40:00.074797 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-add-sources
103 12:40:00.074928 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-background-process-start
104 12:40:00.075054 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-background-process-stop
105 12:40:00.075181 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-common-functions
106 12:40:00.075304 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-echo-ipv4
107 12:40:00.075429 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-install-packages
108 12:40:00.075551 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-installed-packages
109 12:40:00.075678 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-os-build
110 12:40:00.075833 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-probe-channel
111 12:40:00.075957 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-probe-ip
112 12:40:00.076080 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-target-ip
113 12:40:00.076201 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-target-mac
114 12:40:00.076321 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-target-storage
115 12:40:00.076445 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-test-case
116 12:40:00.076565 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-test-event
117 12:40:00.076686 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-test-feedback
118 12:40:00.076807 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-test-raise
119 12:40:00.076931 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-test-reference
120 12:40:00.077055 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-test-runner
121 12:40:00.077178 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-test-set
122 12:40:00.077300 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-test-shell
123 12:40:00.077458 Updating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-install-packages (oe)
124 12:40:00.077609 Updating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/bin/lava-installed-packages (oe)
125 12:40:00.077731 Creating /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/environment
126 12:40:00.077828 LAVA metadata
127 12:40:00.077901 - LAVA_JOB_ID=12437315
128 12:40:00.077962 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:40:00.078063 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 12:40:00.078129 skipped lava-vland-overlay
131 12:40:00.078204 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:40:00.078286 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 12:40:00.078347 skipped lava-multinode-overlay
134 12:40:00.078418 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:40:00.078496 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 12:40:00.078580 Loading test definitions
137 12:40:00.078673 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 12:40:00.078750 Using /lava-12437315 at stage 0
139 12:40:00.079217 uuid=12437315_1.4.2.3.1 testdef=None
140 12:40:00.079310 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:40:00.079392 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 12:40:00.079944 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:40:00.080240 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 12:40:00.080857 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:40:00.081094 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 12:40:00.081714 runner path: /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/0/tests/0_cros-ec test_uuid 12437315_1.4.2.3.1
149 12:40:00.081864 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:40:00.082065 Creating lava-test-runner.conf files
152 12:40:00.082128 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437315/lava-overlay-0_a6w9dv/lava-12437315/0 for stage 0
153 12:40:00.082214 - 0_cros-ec
154 12:40:00.082309 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 12:40:00.082394 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 12:40:00.089213 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 12:40:00.089341 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 12:40:00.089429 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 12:40:00.089512 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 12:40:00.089595 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 12:40:01.147161 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 12:40:01.147561 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 12:40:01.147699 extracting modules file /var/lib/lava/dispatcher/tmp/12437315/tftp-deploy-vkw3yt6g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437315/extract-overlay-ramdisk-gjorscn4/ramdisk
164 12:40:01.163011 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 12:40:01.163174 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 12:40:01.163273 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437315/compress-overlay-cjwc_m5m/overlay-1.4.2.4.tar.gz to ramdisk
167 12:40:01.163345 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437315/compress-overlay-cjwc_m5m/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12437315/extract-overlay-ramdisk-gjorscn4/ramdisk
168 12:40:01.171160 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 12:40:01.171290 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 12:40:01.171378 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 12:40:01.171530 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 12:40:01.171651 Building ramdisk /var/lib/lava/dispatcher/tmp/12437315/extract-overlay-ramdisk-gjorscn4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12437315/extract-overlay-ramdisk-gjorscn4/ramdisk
173 12:40:01.728582 >> 184120 blocks
174 12:40:05.197372 rename /var/lib/lava/dispatcher/tmp/12437315/extract-overlay-ramdisk-gjorscn4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12437315/tftp-deploy-vkw3yt6g/ramdisk/ramdisk.cpio.gz
175 12:40:05.197826 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 12:40:05.197947 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 12:40:05.198050 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 12:40:05.198145 No mkimage arch provided, not using FIT.
179 12:40:05.198232 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 12:40:05.198314 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 12:40:05.198414 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 12:40:05.198505 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 12:40:05.198582 No LXC device requested
184 12:40:05.198656 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 12:40:05.198741 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 12:40:05.198821 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 12:40:05.198892 Checking files for TFTP limit of 4294967296 bytes.
188 12:40:05.199342 end: 1 tftp-deploy (duration 00:00:05) [common]
189 12:40:05.199447 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 12:40:05.199536 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 12:40:05.199655 substitutions:
192 12:40:05.199763 - {DTB}: None
193 12:40:05.199826 - {INITRD}: 12437315/tftp-deploy-vkw3yt6g/ramdisk/ramdisk.cpio.gz
194 12:40:05.199884 - {KERNEL}: 12437315/tftp-deploy-vkw3yt6g/kernel/bzImage
195 12:40:05.199941 - {LAVA_MAC}: None
196 12:40:05.199996 - {PRESEED_CONFIG}: None
197 12:40:05.200050 - {PRESEED_LOCAL}: None
198 12:40:05.200104 - {RAMDISK}: 12437315/tftp-deploy-vkw3yt6g/ramdisk/ramdisk.cpio.gz
199 12:40:05.200157 - {ROOT_PART}: None
200 12:40:05.200210 - {ROOT}: None
201 12:40:05.200262 - {SERVER_IP}: 192.168.201.1
202 12:40:05.200313 - {TEE}: None
203 12:40:05.200366 Parsed boot commands:
204 12:40:05.200417 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 12:40:05.200594 Parsed boot commands: tftpboot 192.168.201.1 12437315/tftp-deploy-vkw3yt6g/kernel/bzImage 12437315/tftp-deploy-vkw3yt6g/kernel/cmdline 12437315/tftp-deploy-vkw3yt6g/ramdisk/ramdisk.cpio.gz
206 12:40:05.200678 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 12:40:05.200764 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 12:40:05.200859 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 12:40:05.200946 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 12:40:05.201016 Not connected, no need to disconnect.
211 12:40:05.201090 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 12:40:05.201167 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 12:40:05.201232 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-8'
214 12:40:05.205320 Setting prompt string to ['lava-test: # ']
215 12:40:05.205674 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 12:40:05.205777 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 12:40:05.205870 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 12:40:05.205957 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 12:40:05.206170 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
220 12:40:10.343301 >> Command sent successfully.
221 12:40:10.353058 Returned 0 in 5 seconds
222 12:40:10.453977 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 12:40:10.454522 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 12:40:10.454701 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 12:40:10.454860 Setting prompt string to 'Starting depthcharge on Voema...'
227 12:40:10.454983 Changing prompt to 'Starting depthcharge on Voema...'
228 12:40:10.455099 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 12:40:10.455644 [Enter `^Ec?' for help]
230 12:40:12.046881
231 12:40:12.047328
232 12:40:12.056209 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 12:40:12.062756 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
234 12:40:12.066602 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 12:40:12.069394 CPU: AES supported, TXT NOT supported, VT supported
236 12:40:12.076104 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 12:40:12.082822 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 12:40:12.085980 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 12:40:12.089286 VBOOT: Loading verstage.
240 12:40:12.095761 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 12:40:12.099130 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 12:40:12.106589 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 12:40:12.112532 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 12:40:12.118723 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 12:40:12.122749
246 12:40:12.123045
247 12:40:12.132577 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 12:40:12.147057 Probing TPM: . done!
249 12:40:12.150619 TPM ready after 0 ms
250 12:40:12.154060 Connected to device vid:did:rid of 1ae0:0028:00
251 12:40:12.165063 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
252 12:40:12.172826 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 12:40:12.174961 Initialized TPM device CR50 revision 0
254 12:40:12.225318 tlcl_send_startup: Startup return code is 0
255 12:40:12.225505 TPM: setup succeeded
256 12:40:12.239664 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 12:40:12.254029 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 12:40:12.266434 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 12:40:12.276870 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 12:40:12.280085 Chrome EC: UHEPI supported
261 12:40:12.283504 Phase 1
262 12:40:12.286682 FMAP: area GBB found @ 1805000 (458752 bytes)
263 12:40:12.297056 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 12:40:12.303388 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 12:40:12.310217 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 12:40:12.316789 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 12:40:12.319731 Recovery requested (1009000e)
268 12:40:12.323600 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 12:40:12.334781 tlcl_extend: response is 0
270 12:40:12.341831 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 12:40:12.351382 tlcl_extend: response is 0
272 12:40:12.358090 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 12:40:12.364695 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 12:40:12.371273 BS: verstage times (exec / console): total (unknown) / 142 ms
275 12:40:12.371739
276 12:40:12.372087
277 12:40:12.384407 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 12:40:12.390767 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 12:40:12.394545 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 12:40:12.397375 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 12:40:12.404040 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 12:40:12.407419 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 12:40:12.410712 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
284 12:40:12.414269 TCO_STS: 0000 0000
285 12:40:12.417344 GEN_PMCON: d0015038 00002200
286 12:40:12.420836 GBLRST_CAUSE: 00000000 00000000
287 12:40:12.423964 HPR_CAUSE0: 00000000
288 12:40:12.424501 prev_sleep_state 5
289 12:40:12.427242 Boot Count incremented to 25404
290 12:40:12.433770 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 12:40:12.440688 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 12:40:12.450119 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 12:40:12.456938 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 12:40:12.460262 Chrome EC: UHEPI supported
295 12:40:12.466917 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 12:40:12.478634 Probing TPM: done!
297 12:40:12.486459 Connected to device vid:did:rid of 1ae0:0028:00
298 12:40:12.493982 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
299 12:40:12.502599 Initialized TPM device CR50 revision 0
300 12:40:12.512955 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 12:40:12.519910 MRC: Hash idx 0x100b comparison successful.
302 12:40:12.523071 MRC cache found, size faa8
303 12:40:12.523285 bootmode is set to: 2
304 12:40:12.526287 SPD index = 0
305 12:40:12.532998 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 12:40:12.536406 SPD: module type is LPDDR4X
307 12:40:12.539766 SPD: module part number is MT53E512M64D4NW-046
308 12:40:12.546487 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
309 12:40:12.552947 SPD: device width 16 bits, bus width 16 bits
310 12:40:12.555770 SPD: module size is 1024 MB (per channel)
311 12:40:12.989957 CBMEM:
312 12:40:12.992621 IMD: root @ 0x76fff000 254 entries.
313 12:40:12.996168 IMD: root @ 0x76ffec00 62 entries.
314 12:40:12.999540 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 12:40:13.005749 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 12:40:13.009255 External stage cache:
317 12:40:13.012696 IMD: root @ 0x7b3ff000 254 entries.
318 12:40:13.016128 IMD: root @ 0x7b3fec00 62 entries.
319 12:40:13.031996 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 12:40:13.037842 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 12:40:13.044431 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 12:40:13.058564 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 12:40:13.062455 cse_lite: Skip switching to RW in the recovery path
324 12:40:13.066246 8 DIMMs found
325 12:40:13.066716 SMM Memory Map
326 12:40:13.069841 SMRAM : 0x7b000000 0x800000
327 12:40:13.073114 Subregion 0: 0x7b000000 0x200000
328 12:40:13.076406 Subregion 1: 0x7b200000 0x200000
329 12:40:13.079742 Subregion 2: 0x7b400000 0x400000
330 12:40:13.082580 top_of_ram = 0x77000000
331 12:40:13.089616 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 12:40:13.092767 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 12:40:13.099341 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 12:40:13.102681 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 12:40:13.112383 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 12:40:13.119380 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 12:40:13.129117 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 12:40:13.132168 Processing 211 relocs. Offset value of 0x74c0b000
339 12:40:13.141841 BS: romstage times (exec / console): total (unknown) / 277 ms
340 12:40:13.147693
341 12:40:13.148220
342 12:40:13.157377 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 12:40:13.160760 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 12:40:13.170475 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 12:40:13.176866 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 12:40:13.184136 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 12:40:13.190201 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 12:40:13.237432 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 12:40:13.243751 Processing 5008 relocs. Offset value of 0x75d98000
350 12:40:13.247410 BS: postcar times (exec / console): total (unknown) / 59 ms
351 12:40:13.250640
352 12:40:13.251183
353 12:40:13.260608 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 12:40:13.261092 Normal boot
355 12:40:13.263877 FW_CONFIG value is 0x804c02
356 12:40:13.267745 PCI: 00:07.0 disabled by fw_config
357 12:40:13.270914 PCI: 00:07.1 disabled by fw_config
358 12:40:13.273953 PCI: 00:0d.2 disabled by fw_config
359 12:40:13.280869 PCI: 00:1c.7 disabled by fw_config
360 12:40:13.284299 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 12:40:13.290451 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 12:40:13.293760 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 12:40:13.300875 GENERIC: 0.0 disabled by fw_config
364 12:40:13.303994 GENERIC: 1.0 disabled by fw_config
365 12:40:13.307353 fw_config match found: DB_USB=USB3_ACTIVE
366 12:40:13.310344 fw_config match found: DB_USB=USB3_ACTIVE
367 12:40:13.314792 fw_config match found: DB_USB=USB3_ACTIVE
368 12:40:13.320093 fw_config match found: DB_USB=USB3_ACTIVE
369 12:40:13.323391 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 12:40:13.330584 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 12:40:13.339896 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 12:40:13.347044 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 12:40:13.350239 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 12:40:13.356775 microcode: Update skipped, already up-to-date
375 12:40:13.363221 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 12:40:13.391525 Detected 4 core, 8 thread CPU.
377 12:40:13.394231 Setting up SMI for CPU
378 12:40:13.398364 IED base = 0x7b400000
379 12:40:13.398811 IED size = 0x00400000
380 12:40:13.401189 Will perform SMM setup.
381 12:40:13.407485 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
382 12:40:13.414686 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 12:40:13.421487 Processing 16 relocs. Offset value of 0x00030000
384 12:40:13.424157 Attempting to start 7 APs
385 12:40:13.427507 Waiting for 10ms after sending INIT.
386 12:40:13.443437 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 12:40:13.444052 done.
388 12:40:13.446627 AP: slot 6 apic_id 6.
389 12:40:13.449421 AP: slot 3 apic_id 7.
390 12:40:13.449871 AP: slot 2 apic_id 3.
391 12:40:13.453197 AP: slot 5 apic_id 2.
392 12:40:13.456337 AP: slot 7 apic_id 5.
393 12:40:13.456788 AP: slot 4 apic_id 4.
394 12:40:13.463213 Waiting for 2nd SIPI to complete...done.
395 12:40:13.469281 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 12:40:13.476110 Processing 13 relocs. Offset value of 0x00038000
397 12:40:13.479542 Unable to locate Global NVS
398 12:40:13.485980 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 12:40:13.489271 Installing permanent SMM handler to 0x7b000000
400 12:40:13.499084 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 12:40:13.502440 Processing 794 relocs. Offset value of 0x7b010000
402 12:40:13.512932 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 12:40:13.515868 Processing 13 relocs. Offset value of 0x7b008000
404 12:40:13.522448 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 12:40:13.529078 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 12:40:13.535526 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 12:40:13.539370 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 12:40:13.546421 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 12:40:13.552332 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 12:40:13.558647 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 12:40:13.562185 Unable to locate Global NVS
412 12:40:13.569179 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 12:40:13.571997 Clearing SMI status registers
414 12:40:13.575613 SMI_STS: PM1
415 12:40:13.576104 PM1_STS: PWRBTN
416 12:40:13.581987 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 12:40:13.585357 In relocation handler: CPU 0
418 12:40:13.588360 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 12:40:13.595310 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 12:40:13.598369 Relocation complete.
421 12:40:13.604811 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 12:40:13.608351 In relocation handler: CPU 1
423 12:40:13.611897 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 12:40:13.614868 Relocation complete.
425 12:40:13.621475 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
426 12:40:13.624545 In relocation handler: CPU 6
427 12:40:13.628018 New SMBASE=0x7affe800 IEDBASE=0x7b400000
428 12:40:13.631272 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 12:40:13.635046 Relocation complete.
430 12:40:13.640910 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
431 12:40:13.644678 In relocation handler: CPU 3
432 12:40:13.647525 New SMBASE=0x7afff400 IEDBASE=0x7b400000
433 12:40:13.650887 Relocation complete.
434 12:40:13.658098 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
435 12:40:13.661173 In relocation handler: CPU 2
436 12:40:13.664155 New SMBASE=0x7afff800 IEDBASE=0x7b400000
437 12:40:13.667114 Relocation complete.
438 12:40:13.674127 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
439 12:40:13.677233 In relocation handler: CPU 5
440 12:40:13.680447 New SMBASE=0x7affec00 IEDBASE=0x7b400000
441 12:40:13.687184 Writing SMRR. base = 0x7b000006, mask=0xff800c00
442 12:40:13.690316 Relocation complete.
443 12:40:13.696931 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
444 12:40:13.700210 In relocation handler: CPU 7
445 12:40:13.703501 New SMBASE=0x7affe400 IEDBASE=0x7b400000
446 12:40:13.706837 Relocation complete.
447 12:40:13.713554 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
448 12:40:13.717324 In relocation handler: CPU 4
449 12:40:13.720595 New SMBASE=0x7afff000 IEDBASE=0x7b400000
450 12:40:13.723656 Writing SMRR. base = 0x7b000006, mask=0xff800c00
451 12:40:13.726717 Relocation complete.
452 12:40:13.730559 Initializing CPU #0
453 12:40:13.734307 CPU: vendor Intel device 806c1
454 12:40:13.737959 CPU: family 06, model 8c, stepping 01
455 12:40:13.738412 Clearing out pending MCEs
456 12:40:13.741335 Setting up local APIC...
457 12:40:13.744754 apic_id: 0x00 done.
458 12:40:13.747711 Turbo is available but hidden
459 12:40:13.751132 Turbo is available and visible
460 12:40:13.754038 microcode: Update skipped, already up-to-date
461 12:40:13.757742 CPU #0 initialized
462 12:40:13.758187 Initializing CPU #3
463 12:40:13.760858 Initializing CPU #6
464 12:40:13.764878 CPU: vendor Intel device 806c1
465 12:40:13.767366 CPU: family 06, model 8c, stepping 01
466 12:40:13.771023 CPU: vendor Intel device 806c1
467 12:40:13.774575 CPU: family 06, model 8c, stepping 01
468 12:40:13.777777 Clearing out pending MCEs
469 12:40:13.781203 Clearing out pending MCEs
470 12:40:13.784362 Setting up local APIC...
471 12:40:13.784814 Initializing CPU #7
472 12:40:13.787447 Initializing CPU #4
473 12:40:13.790696 CPU: vendor Intel device 806c1
474 12:40:13.793751 CPU: family 06, model 8c, stepping 01
475 12:40:13.797038 CPU: vendor Intel device 806c1
476 12:40:13.800855 CPU: family 06, model 8c, stepping 01
477 12:40:13.804051 Clearing out pending MCEs
478 12:40:13.807182 Clearing out pending MCEs
479 12:40:13.807629 Setting up local APIC...
480 12:40:13.810905 Setting up local APIC...
481 12:40:13.813862 Initializing CPU #5
482 12:40:13.814308 Initializing CPU #2
483 12:40:13.816937 CPU: vendor Intel device 806c1
484 12:40:13.820555 CPU: family 06, model 8c, stepping 01
485 12:40:13.824234 Initializing CPU #1
486 12:40:13.827219 apic_id: 0x07 done.
487 12:40:13.827668 apic_id: 0x06 done.
488 12:40:13.833749 microcode: Update skipped, already up-to-date
489 12:40:13.837227 microcode: Update skipped, already up-to-date
490 12:40:13.840419 CPU #3 initialized
491 12:40:13.840965 CPU #6 initialized
492 12:40:13.843706 CPU: vendor Intel device 806c1
493 12:40:13.847110 CPU: family 06, model 8c, stepping 01
494 12:40:13.850620 Clearing out pending MCEs
495 12:40:13.854074 Clearing out pending MCEs
496 12:40:13.857116 Setting up local APIC...
497 12:40:13.857560 Setting up local APIC...
498 12:40:13.860418 apic_id: 0x02 done.
499 12:40:13.863569 Setting up local APIC...
500 12:40:13.867165 apic_id: 0x04 done.
501 12:40:13.867606 apic_id: 0x05 done.
502 12:40:13.873586 microcode: Update skipped, already up-to-date
503 12:40:13.876636 microcode: Update skipped, already up-to-date
504 12:40:13.880168 CPU #4 initialized
505 12:40:13.880597 CPU #7 initialized
506 12:40:13.883500 CPU: vendor Intel device 806c1
507 12:40:13.886743 CPU: family 06, model 8c, stepping 01
508 12:40:13.890241 apic_id: 0x03 done.
509 12:40:13.893219 microcode: Update skipped, already up-to-date
510 12:40:13.900169 microcode: Update skipped, already up-to-date
511 12:40:13.900604 CPU #5 initialized
512 12:40:13.903557 CPU #2 initialized
513 12:40:13.906548 Clearing out pending MCEs
514 12:40:13.907086 Setting up local APIC...
515 12:40:13.910135 apic_id: 0x01 done.
516 12:40:13.913159 microcode: Update skipped, already up-to-date
517 12:40:13.916935 CPU #1 initialized
518 12:40:13.920115 bsp_do_flight_plan done after 455 msecs.
519 12:40:13.923301 CPU: frequency set to 4000 MHz
520 12:40:13.927259 Enabling SMIs.
521 12:40:13.933381 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 12:40:13.948042 SATAXPCIE1 indicates PCIe NVMe is present
523 12:40:13.951487 Probing TPM: done!
524 12:40:13.955375 Connected to device vid:did:rid of 1ae0:0028:00
525 12:40:13.965837 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
526 12:40:13.968870 Initialized TPM device CR50 revision 0
527 12:40:13.972050 Enabling S0i3.4
528 12:40:13.978733 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 12:40:13.982050 Found a VBT of 8704 bytes after decompression
530 12:40:13.988554 cse_lite: CSE RO boot. HybridStorageMode disabled
531 12:40:13.995449 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 12:40:14.070539 FSPS returned 0
533 12:40:14.073515 Executing Phase 1 of FspMultiPhaseSiInit
534 12:40:14.083513 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 12:40:14.086768 port C0 DISC req: usage 1 usb3 1 usb2 5
536 12:40:14.090336 Raw Buffer output 0 00000511
537 12:40:14.093803 Raw Buffer output 1 00000000
538 12:40:14.097738 pmc_send_ipc_cmd succeeded
539 12:40:14.103992 port C1 DISC req: usage 1 usb3 2 usb2 3
540 12:40:14.104427 Raw Buffer output 0 00000321
541 12:40:14.107269 Raw Buffer output 1 00000000
542 12:40:14.111723 pmc_send_ipc_cmd succeeded
543 12:40:14.116491 Detected 4 core, 8 thread CPU.
544 12:40:14.120022 Detected 4 core, 8 thread CPU.
545 12:40:14.354256 Display FSP Version Info HOB
546 12:40:14.357291 Reference Code - CPU = a.0.4c.31
547 12:40:14.360950 uCode Version = 0.0.0.86
548 12:40:14.364133 TXT ACM version = ff.ff.ff.ffff
549 12:40:14.367217 Reference Code - ME = a.0.4c.31
550 12:40:14.370727 MEBx version = 0.0.0.0
551 12:40:14.374107 ME Firmware Version = Consumer SKU
552 12:40:14.377042 Reference Code - PCH = a.0.4c.31
553 12:40:14.380202 PCH-CRID Status = Disabled
554 12:40:14.383856 PCH-CRID Original Value = ff.ff.ff.ffff
555 12:40:14.387354 PCH-CRID New Value = ff.ff.ff.ffff
556 12:40:14.391284 OPROM - RST - RAID = ff.ff.ff.ffff
557 12:40:14.394353 PCH Hsio Version = 4.0.0.0
558 12:40:14.396883 Reference Code - SA - System Agent = a.0.4c.31
559 12:40:14.400084 Reference Code - MRC = 2.0.0.1
560 12:40:14.403663 SA - PCIe Version = a.0.4c.31
561 12:40:14.407623 SA-CRID Status = Disabled
562 12:40:14.410225 SA-CRID Original Value = 0.0.0.1
563 12:40:14.413585 SA-CRID New Value = 0.0.0.1
564 12:40:14.417051 OPROM - VBIOS = ff.ff.ff.ffff
565 12:40:14.420411 IO Manageability Engine FW Version = 11.1.4.0
566 12:40:14.423628 PHY Build Version = 0.0.0.e0
567 12:40:14.426759 Thunderbolt(TM) FW Version = 0.0.0.0
568 12:40:14.434223 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 12:40:14.437125 ITSS IRQ Polarities Before:
570 12:40:14.437689 IPC0: 0xffffffff
571 12:40:14.440097 IPC1: 0xffffffff
572 12:40:14.440549 IPC2: 0xffffffff
573 12:40:14.443078 IPC3: 0xffffffff
574 12:40:14.446841 ITSS IRQ Polarities After:
575 12:40:14.447394 IPC0: 0xffffffff
576 12:40:14.449851 IPC1: 0xffffffff
577 12:40:14.450294 IPC2: 0xffffffff
578 12:40:14.453678 IPC3: 0xffffffff
579 12:40:14.456588 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 12:40:14.469766 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 12:40:14.479810 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 12:40:14.493172 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 12:40:14.499406 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
584 12:40:14.502776 Enumerating buses...
585 12:40:14.505998 Show all devs... Before device enumeration.
586 12:40:14.509848 Root Device: enabled 1
587 12:40:14.510080 DOMAIN: 0000: enabled 1
588 12:40:14.512364 CPU_CLUSTER: 0: enabled 1
589 12:40:14.515736 PCI: 00:00.0: enabled 1
590 12:40:14.519242 PCI: 00:02.0: enabled 1
591 12:40:14.522696 PCI: 00:04.0: enabled 1
592 12:40:14.522864 PCI: 00:05.0: enabled 1
593 12:40:14.525929 PCI: 00:06.0: enabled 0
594 12:40:14.529244 PCI: 00:07.0: enabled 0
595 12:40:14.529364 PCI: 00:07.1: enabled 0
596 12:40:14.532102 PCI: 00:07.2: enabled 0
597 12:40:14.535592 PCI: 00:07.3: enabled 0
598 12:40:14.538870 PCI: 00:08.0: enabled 1
599 12:40:14.538965 PCI: 00:09.0: enabled 0
600 12:40:14.542352 PCI: 00:0a.0: enabled 0
601 12:40:14.545893 PCI: 00:0d.0: enabled 1
602 12:40:14.549179 PCI: 00:0d.1: enabled 0
603 12:40:14.549266 PCI: 00:0d.2: enabled 0
604 12:40:14.552112 PCI: 00:0d.3: enabled 0
605 12:40:14.555288 PCI: 00:0e.0: enabled 0
606 12:40:14.558439 PCI: 00:10.2: enabled 1
607 12:40:14.558538 PCI: 00:10.6: enabled 0
608 12:40:14.561922 PCI: 00:10.7: enabled 0
609 12:40:14.565155 PCI: 00:12.0: enabled 0
610 12:40:14.568665 PCI: 00:12.6: enabled 0
611 12:40:14.568769 PCI: 00:13.0: enabled 0
612 12:40:14.571677 PCI: 00:14.0: enabled 1
613 12:40:14.575267 PCI: 00:14.1: enabled 0
614 12:40:14.578255 PCI: 00:14.2: enabled 1
615 12:40:14.578345 PCI: 00:14.3: enabled 1
616 12:40:14.581552 PCI: 00:15.0: enabled 1
617 12:40:14.585224 PCI: 00:15.1: enabled 1
618 12:40:14.588650 PCI: 00:15.2: enabled 1
619 12:40:14.588746 PCI: 00:15.3: enabled 1
620 12:40:14.591699 PCI: 00:16.0: enabled 1
621 12:40:14.594655 PCI: 00:16.1: enabled 0
622 12:40:14.594741 PCI: 00:16.2: enabled 0
623 12:40:14.598169 PCI: 00:16.3: enabled 0
624 12:40:14.601307 PCI: 00:16.4: enabled 0
625 12:40:14.604770 PCI: 00:16.5: enabled 0
626 12:40:14.604867 PCI: 00:17.0: enabled 1
627 12:40:14.607861 PCI: 00:19.0: enabled 0
628 12:40:14.611438 PCI: 00:19.1: enabled 1
629 12:40:14.614486 PCI: 00:19.2: enabled 0
630 12:40:14.614576 PCI: 00:1c.0: enabled 1
631 12:40:14.617775 PCI: 00:1c.1: enabled 0
632 12:40:14.620981 PCI: 00:1c.2: enabled 0
633 12:40:14.624587 PCI: 00:1c.3: enabled 0
634 12:40:14.624675 PCI: 00:1c.4: enabled 0
635 12:40:14.627558 PCI: 00:1c.5: enabled 0
636 12:40:14.631796 PCI: 00:1c.6: enabled 1
637 12:40:14.634239 PCI: 00:1c.7: enabled 0
638 12:40:14.634338 PCI: 00:1d.0: enabled 1
639 12:40:14.637589 PCI: 00:1d.1: enabled 0
640 12:40:14.641121 PCI: 00:1d.2: enabled 1
641 12:40:14.644655 PCI: 00:1d.3: enabled 0
642 12:40:14.644748 PCI: 00:1e.0: enabled 1
643 12:40:14.647413 PCI: 00:1e.1: enabled 0
644 12:40:14.651337 PCI: 00:1e.2: enabled 1
645 12:40:14.654056 PCI: 00:1e.3: enabled 1
646 12:40:14.654144 PCI: 00:1f.0: enabled 1
647 12:40:14.657351 PCI: 00:1f.1: enabled 0
648 12:40:14.661082 PCI: 00:1f.2: enabled 1
649 12:40:14.661181 PCI: 00:1f.3: enabled 1
650 12:40:14.664485 PCI: 00:1f.4: enabled 0
651 12:40:14.667263 PCI: 00:1f.5: enabled 1
652 12:40:14.670807 PCI: 00:1f.6: enabled 0
653 12:40:14.670905 PCI: 00:1f.7: enabled 0
654 12:40:14.673942 APIC: 00: enabled 1
655 12:40:14.677621 GENERIC: 0.0: enabled 1
656 12:40:14.677708 GENERIC: 0.0: enabled 1
657 12:40:14.680805 GENERIC: 1.0: enabled 1
658 12:40:14.683802 GENERIC: 0.0: enabled 1
659 12:40:14.687061 GENERIC: 1.0: enabled 1
660 12:40:14.687165 USB0 port 0: enabled 1
661 12:40:14.690917 GENERIC: 0.0: enabled 1
662 12:40:14.693764 USB0 port 0: enabled 1
663 12:40:14.697027 GENERIC: 0.0: enabled 1
664 12:40:14.697116 I2C: 00:1a: enabled 1
665 12:40:14.700491 I2C: 00:31: enabled 1
666 12:40:14.703396 I2C: 00:32: enabled 1
667 12:40:14.703481 I2C: 00:10: enabled 1
668 12:40:14.706989 I2C: 00:15: enabled 1
669 12:40:14.710350 GENERIC: 0.0: enabled 0
670 12:40:14.713484 GENERIC: 1.0: enabled 0
671 12:40:14.713609 GENERIC: 0.0: enabled 1
672 12:40:14.716954 SPI: 00: enabled 1
673 12:40:14.717050 SPI: 00: enabled 1
674 12:40:14.720218 PNP: 0c09.0: enabled 1
675 12:40:14.724300 GENERIC: 0.0: enabled 1
676 12:40:14.727110 USB3 port 0: enabled 1
677 12:40:14.727441 USB3 port 1: enabled 1
678 12:40:14.730390 USB3 port 2: enabled 0
679 12:40:14.734054 USB3 port 3: enabled 0
680 12:40:14.734298 USB2 port 0: enabled 0
681 12:40:14.737570 USB2 port 1: enabled 1
682 12:40:14.740297 USB2 port 2: enabled 1
683 12:40:14.743641 USB2 port 3: enabled 0
684 12:40:14.743914 USB2 port 4: enabled 1
685 12:40:14.747181 USB2 port 5: enabled 0
686 12:40:14.750330 USB2 port 6: enabled 0
687 12:40:14.750573 USB2 port 7: enabled 0
688 12:40:14.753993 USB2 port 8: enabled 0
689 12:40:14.756930 USB2 port 9: enabled 0
690 12:40:14.760145 USB3 port 0: enabled 0
691 12:40:14.760388 USB3 port 1: enabled 1
692 12:40:14.763378 USB3 port 2: enabled 0
693 12:40:14.766985 USB3 port 3: enabled 0
694 12:40:14.767230 GENERIC: 0.0: enabled 1
695 12:40:14.769893 GENERIC: 1.0: enabled 1
696 12:40:14.773220 APIC: 01: enabled 1
697 12:40:14.773522 APIC: 03: enabled 1
698 12:40:14.777074 APIC: 07: enabled 1
699 12:40:14.780903 APIC: 04: enabled 1
700 12:40:14.781293 APIC: 02: enabled 1
701 12:40:14.783486 APIC: 06: enabled 1
702 12:40:14.786850 APIC: 05: enabled 1
703 12:40:14.787274 Compare with tree...
704 12:40:14.790293 Root Device: enabled 1
705 12:40:14.793482 DOMAIN: 0000: enabled 1
706 12:40:14.794008 PCI: 00:00.0: enabled 1
707 12:40:14.796453 PCI: 00:02.0: enabled 1
708 12:40:14.799955 PCI: 00:04.0: enabled 1
709 12:40:14.803386 GENERIC: 0.0: enabled 1
710 12:40:14.806501 PCI: 00:05.0: enabled 1
711 12:40:14.807024 PCI: 00:06.0: enabled 0
712 12:40:14.809892 PCI: 00:07.0: enabled 0
713 12:40:14.813444 GENERIC: 0.0: enabled 1
714 12:40:14.816614 PCI: 00:07.1: enabled 0
715 12:40:14.819974 GENERIC: 1.0: enabled 1
716 12:40:14.822848 PCI: 00:07.2: enabled 0
717 12:40:14.823282 GENERIC: 0.0: enabled 1
718 12:40:14.826605 PCI: 00:07.3: enabled 0
719 12:40:14.829894 GENERIC: 1.0: enabled 1
720 12:40:14.832892 PCI: 00:08.0: enabled 1
721 12:40:14.836628 PCI: 00:09.0: enabled 0
722 12:40:14.837150 PCI: 00:0a.0: enabled 0
723 12:40:14.839901 PCI: 00:0d.0: enabled 1
724 12:40:14.843234 USB0 port 0: enabled 1
725 12:40:14.846136 USB3 port 0: enabled 1
726 12:40:14.849581 USB3 port 1: enabled 1
727 12:40:14.850106 USB3 port 2: enabled 0
728 12:40:14.852643 USB3 port 3: enabled 0
729 12:40:14.856199 PCI: 00:0d.1: enabled 0
730 12:40:14.859241 PCI: 00:0d.2: enabled 0
731 12:40:14.862923 GENERIC: 0.0: enabled 1
732 12:40:14.863351 PCI: 00:0d.3: enabled 0
733 12:40:14.866017 PCI: 00:0e.0: enabled 0
734 12:40:14.869308 PCI: 00:10.2: enabled 1
735 12:40:14.872834 PCI: 00:10.6: enabled 0
736 12:40:14.875887 PCI: 00:10.7: enabled 0
737 12:40:14.876371 PCI: 00:12.0: enabled 0
738 12:40:14.879580 PCI: 00:12.6: enabled 0
739 12:40:14.882144 PCI: 00:13.0: enabled 0
740 12:40:14.885879 PCI: 00:14.0: enabled 1
741 12:40:14.889157 USB0 port 0: enabled 1
742 12:40:14.892823 USB2 port 0: enabled 0
743 12:40:14.893250 USB2 port 1: enabled 1
744 12:40:14.895756 USB2 port 2: enabled 1
745 12:40:14.898884 USB2 port 3: enabled 0
746 12:40:14.902428 USB2 port 4: enabled 1
747 12:40:14.905588 USB2 port 5: enabled 0
748 12:40:14.906016 USB2 port 6: enabled 0
749 12:40:14.908659 USB2 port 7: enabled 0
750 12:40:14.912012 USB2 port 8: enabled 0
751 12:40:14.915285 USB2 port 9: enabled 0
752 12:40:14.918720 USB3 port 0: enabled 0
753 12:40:14.921666 USB3 port 1: enabled 1
754 12:40:14.921852 USB3 port 2: enabled 0
755 12:40:14.925317 USB3 port 3: enabled 0
756 12:40:14.928348 PCI: 00:14.1: enabled 0
757 12:40:14.931836 PCI: 00:14.2: enabled 1
758 12:40:14.934747 PCI: 00:14.3: enabled 1
759 12:40:14.938095 GENERIC: 0.0: enabled 1
760 12:40:14.938201 PCI: 00:15.0: enabled 1
761 12:40:14.941833 I2C: 00:1a: enabled 1
762 12:40:14.944784 I2C: 00:31: enabled 1
763 12:40:14.948056 I2C: 00:32: enabled 1
764 12:40:14.948143 PCI: 00:15.1: enabled 1
765 12:40:14.951268 I2C: 00:10: enabled 1
766 12:40:14.954590 PCI: 00:15.2: enabled 1
767 12:40:14.958074 PCI: 00:15.3: enabled 1
768 12:40:14.961252 PCI: 00:16.0: enabled 1
769 12:40:14.961342 PCI: 00:16.1: enabled 0
770 12:40:14.964556 PCI: 00:16.2: enabled 0
771 12:40:14.967766 PCI: 00:16.3: enabled 0
772 12:40:14.972005 PCI: 00:16.4: enabled 0
773 12:40:14.972103 PCI: 00:16.5: enabled 0
774 12:40:14.975512 PCI: 00:17.0: enabled 1
775 12:40:14.979117 PCI: 00:19.0: enabled 0
776 12:40:14.982905 PCI: 00:19.1: enabled 1
777 12:40:14.983000 I2C: 00:15: enabled 1
778 12:40:14.985797 PCI: 00:19.2: enabled 0
779 12:40:14.989367 PCI: 00:1d.0: enabled 1
780 12:40:14.992398 GENERIC: 0.0: enabled 1
781 12:40:15.042433 PCI: 00:1e.0: enabled 1
782 12:40:15.042582 PCI: 00:1e.1: enabled 0
783 12:40:15.042650 PCI: 00:1e.2: enabled 1
784 12:40:15.042908 SPI: 00: enabled 1
785 12:40:15.042976 PCI: 00:1e.3: enabled 1
786 12:40:15.043228 SPI: 00: enabled 1
787 12:40:15.043323 PCI: 00:1f.0: enabled 1
788 12:40:15.043413 PNP: 0c09.0: enabled 1
789 12:40:15.043960 PCI: 00:1f.1: enabled 0
790 12:40:15.044074 PCI: 00:1f.2: enabled 1
791 12:40:15.044338 GENERIC: 0.0: enabled 1
792 12:40:15.044406 GENERIC: 0.0: enabled 1
793 12:40:15.044655 GENERIC: 1.0: enabled 1
794 12:40:15.044722 PCI: 00:1f.3: enabled 1
795 12:40:15.044781 PCI: 00:1f.4: enabled 0
796 12:40:15.044849 PCI: 00:1f.5: enabled 1
797 12:40:15.044917 PCI: 00:1f.6: enabled 0
798 12:40:15.044986 PCI: 00:1f.7: enabled 0
799 12:40:15.045043 CPU_CLUSTER: 0: enabled 1
800 12:40:15.045099 APIC: 00: enabled 1
801 12:40:15.090274 APIC: 01: enabled 1
802 12:40:15.090445 APIC: 03: enabled 1
803 12:40:15.090755 APIC: 07: enabled 1
804 12:40:15.090865 APIC: 04: enabled 1
805 12:40:15.090967 APIC: 02: enabled 1
806 12:40:15.091046 APIC: 06: enabled 1
807 12:40:15.091106 APIC: 05: enabled 1
808 12:40:15.091174 Root Device scanning...
809 12:40:15.091232 scan_static_bus for Root Device
810 12:40:15.091288 DOMAIN: 0000 enabled
811 12:40:15.091355 CPU_CLUSTER: 0 enabled
812 12:40:15.091412 DOMAIN: 0000 scanning...
813 12:40:15.091467 PCI: pci_scan_bus for bus 00
814 12:40:15.091521 PCI: 00:00.0 [8086/0000] ops
815 12:40:15.091574 PCI: 00:00.0 [8086/9a12] enabled
816 12:40:15.091628 PCI: 00:02.0 [8086/0000] bus ops
817 12:40:15.094291 PCI: 00:02.0 [8086/9a40] enabled
818 12:40:15.094374 PCI: 00:04.0 [8086/0000] bus ops
819 12:40:15.097768 PCI: 00:04.0 [8086/9a03] enabled
820 12:40:15.101537 PCI: 00:05.0 [8086/9a19] enabled
821 12:40:15.104154 PCI: 00:07.0 [0000/0000] hidden
822 12:40:15.107979 PCI: 00:08.0 [8086/9a11] enabled
823 12:40:15.110739 PCI: 00:0a.0 [8086/9a0d] disabled
824 12:40:15.113975 PCI: 00:0d.0 [8086/0000] bus ops
825 12:40:15.117801 PCI: 00:0d.0 [8086/9a13] enabled
826 12:40:15.120910 PCI: 00:14.0 [8086/0000] bus ops
827 12:40:15.123899 PCI: 00:14.0 [8086/a0ed] enabled
828 12:40:15.127403 PCI: 00:14.2 [8086/a0ef] enabled
829 12:40:15.130572 PCI: 00:14.3 [8086/0000] bus ops
830 12:40:15.134048 PCI: 00:14.3 [8086/a0f0] enabled
831 12:40:15.137355 PCI: 00:15.0 [8086/0000] bus ops
832 12:40:15.141104 PCI: 00:15.0 [8086/a0e8] enabled
833 12:40:15.143516 PCI: 00:15.1 [8086/0000] bus ops
834 12:40:15.147133 PCI: 00:15.1 [8086/a0e9] enabled
835 12:40:15.150440 PCI: 00:15.2 [8086/0000] bus ops
836 12:40:15.154122 PCI: 00:15.2 [8086/a0ea] enabled
837 12:40:15.157180 PCI: 00:15.3 [8086/0000] bus ops
838 12:40:15.160141 PCI: 00:15.3 [8086/a0eb] enabled
839 12:40:15.163735 PCI: 00:16.0 [8086/0000] ops
840 12:40:15.166969 PCI: 00:16.0 [8086/a0e0] enabled
841 12:40:15.173740 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 12:40:15.176927 PCI: 00:19.0 [8086/0000] bus ops
843 12:40:15.180798 PCI: 00:19.0 [8086/a0c5] disabled
844 12:40:15.183172 PCI: 00:19.1 [8086/0000] bus ops
845 12:40:15.186967 PCI: 00:19.1 [8086/a0c6] enabled
846 12:40:15.189740 PCI: 00:1d.0 [8086/0000] bus ops
847 12:40:15.193824 PCI: 00:1d.0 [8086/a0b0] enabled
848 12:40:15.196477 PCI: 00:1e.0 [8086/0000] ops
849 12:40:15.199829 PCI: 00:1e.0 [8086/a0a8] enabled
850 12:40:15.202982 PCI: 00:1e.2 [8086/0000] bus ops
851 12:40:15.206675 PCI: 00:1e.2 [8086/a0aa] enabled
852 12:40:15.209718 PCI: 00:1e.3 [8086/0000] bus ops
853 12:40:15.213053 PCI: 00:1e.3 [8086/a0ab] enabled
854 12:40:15.216332 PCI: 00:1f.0 [8086/0000] bus ops
855 12:40:15.219770 PCI: 00:1f.0 [8086/a087] enabled
856 12:40:15.220026 RTC Init
857 12:40:15.223131 Set power on after power failure.
858 12:40:15.226601 Disabling Deep S3
859 12:40:15.226808 Disabling Deep S3
860 12:40:15.229991 Disabling Deep S4
861 12:40:15.230235 Disabling Deep S4
862 12:40:15.233311 Disabling Deep S5
863 12:40:15.233744 Disabling Deep S5
864 12:40:15.236519 PCI: 00:1f.2 [0000/0000] hidden
865 12:40:15.239608 PCI: 00:1f.3 [8086/0000] bus ops
866 12:40:15.243481 PCI: 00:1f.3 [8086/a0c8] enabled
867 12:40:15.247027 PCI: 00:1f.5 [8086/0000] bus ops
868 12:40:15.249654 PCI: 00:1f.5 [8086/a0a4] enabled
869 12:40:15.253207 PCI: Leftover static devices:
870 12:40:15.256512 PCI: 00:10.2
871 12:40:15.257035 PCI: 00:10.6
872 12:40:15.259765 PCI: 00:10.7
873 12:40:15.260190 PCI: 00:06.0
874 12:40:15.260547 PCI: 00:07.1
875 12:40:15.263832 PCI: 00:07.2
876 12:40:15.264271 PCI: 00:07.3
877 12:40:15.266501 PCI: 00:09.0
878 12:40:15.266939 PCI: 00:0d.1
879 12:40:15.269734 PCI: 00:0d.2
880 12:40:15.270209 PCI: 00:0d.3
881 12:40:15.270695 PCI: 00:0e.0
882 12:40:15.272997 PCI: 00:12.0
883 12:40:15.273435 PCI: 00:12.6
884 12:40:15.276266 PCI: 00:13.0
885 12:40:15.276718 PCI: 00:14.1
886 12:40:15.277055 PCI: 00:16.1
887 12:40:15.279316 PCI: 00:16.2
888 12:40:15.279800 PCI: 00:16.3
889 12:40:15.282850 PCI: 00:16.4
890 12:40:15.283275 PCI: 00:16.5
891 12:40:15.286158 PCI: 00:17.0
892 12:40:15.286659 PCI: 00:19.2
893 12:40:15.287124 PCI: 00:1e.1
894 12:40:15.289690 PCI: 00:1f.1
895 12:40:15.290112 PCI: 00:1f.4
896 12:40:15.292784 PCI: 00:1f.6
897 12:40:15.293233 PCI: 00:1f.7
898 12:40:15.296065 PCI: Check your devicetree.cb.
899 12:40:15.299781 PCI: 00:02.0 scanning...
900 12:40:15.302750 scan_generic_bus for PCI: 00:02.0
901 12:40:15.306330 scan_generic_bus for PCI: 00:02.0 done
902 12:40:15.309102 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 12:40:15.313120 PCI: 00:04.0 scanning...
904 12:40:15.315915 scan_generic_bus for PCI: 00:04.0
905 12:40:15.319337 GENERIC: 0.0 enabled
906 12:40:15.325936 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 12:40:15.329313 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 12:40:15.332383 PCI: 00:0d.0 scanning...
909 12:40:15.336568 scan_static_bus for PCI: 00:0d.0
910 12:40:15.338987 USB0 port 0 enabled
911 12:40:15.339448 USB0 port 0 scanning...
912 12:40:15.342822 scan_static_bus for USB0 port 0
913 12:40:15.345768 USB3 port 0 enabled
914 12:40:15.349326 USB3 port 1 enabled
915 12:40:15.349751 USB3 port 2 disabled
916 12:40:15.352407 USB3 port 3 disabled
917 12:40:15.355522 USB3 port 0 scanning...
918 12:40:15.359071 scan_static_bus for USB3 port 0
919 12:40:15.362115 scan_static_bus for USB3 port 0 done
920 12:40:15.365663 scan_bus: bus USB3 port 0 finished in 6 msecs
921 12:40:15.369008 USB3 port 1 scanning...
922 12:40:15.372112 scan_static_bus for USB3 port 1
923 12:40:15.375638 scan_static_bus for USB3 port 1 done
924 12:40:15.382193 scan_bus: bus USB3 port 1 finished in 6 msecs
925 12:40:15.385310 scan_static_bus for USB0 port 0 done
926 12:40:15.388639 scan_bus: bus USB0 port 0 finished in 43 msecs
927 12:40:15.392199 scan_static_bus for PCI: 00:0d.0 done
928 12:40:15.398766 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 12:40:15.401617 PCI: 00:14.0 scanning...
930 12:40:15.405029 scan_static_bus for PCI: 00:14.0
931 12:40:15.405451 USB0 port 0 enabled
932 12:40:15.408580 USB0 port 0 scanning...
933 12:40:15.411714 scan_static_bus for USB0 port 0
934 12:40:15.415170 USB2 port 0 disabled
935 12:40:15.415593 USB2 port 1 enabled
936 12:40:15.418275 USB2 port 2 enabled
937 12:40:15.421861 USB2 port 3 disabled
938 12:40:15.422284 USB2 port 4 enabled
939 12:40:15.425090 USB2 port 5 disabled
940 12:40:15.428288 USB2 port 6 disabled
941 12:40:15.428714 USB2 port 7 disabled
942 12:40:15.431844 USB2 port 8 disabled
943 12:40:15.432412 USB2 port 9 disabled
944 12:40:15.435227 USB3 port 0 disabled
945 12:40:15.438577 USB3 port 1 enabled
946 12:40:15.439104 USB3 port 2 disabled
947 12:40:15.441741 USB3 port 3 disabled
948 12:40:15.444658 USB2 port 1 scanning...
949 12:40:15.447947 scan_static_bus for USB2 port 1
950 12:40:15.451254 scan_static_bus for USB2 port 1 done
951 12:40:15.454909 scan_bus: bus USB2 port 1 finished in 6 msecs
952 12:40:15.457984 USB2 port 2 scanning...
953 12:40:15.460940 scan_static_bus for USB2 port 2
954 12:40:15.464305 scan_static_bus for USB2 port 2 done
955 12:40:15.471098 scan_bus: bus USB2 port 2 finished in 6 msecs
956 12:40:15.471633 USB2 port 4 scanning...
957 12:40:15.474746 scan_static_bus for USB2 port 4
958 12:40:15.481051 scan_static_bus for USB2 port 4 done
959 12:40:15.484469 scan_bus: bus USB2 port 4 finished in 6 msecs
960 12:40:15.488217 USB3 port 1 scanning...
961 12:40:15.491094 scan_static_bus for USB3 port 1
962 12:40:15.494601 scan_static_bus for USB3 port 1 done
963 12:40:15.497734 scan_bus: bus USB3 port 1 finished in 6 msecs
964 12:40:15.501007 scan_static_bus for USB0 port 0 done
965 12:40:15.507613 scan_bus: bus USB0 port 0 finished in 93 msecs
966 12:40:15.510695 scan_static_bus for PCI: 00:14.0 done
967 12:40:15.514095 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
968 12:40:15.518067 PCI: 00:14.3 scanning...
969 12:40:15.520962 scan_static_bus for PCI: 00:14.3
970 12:40:15.523871 GENERIC: 0.0 enabled
971 12:40:15.527023 scan_static_bus for PCI: 00:14.3 done
972 12:40:15.533961 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 12:40:15.534503 PCI: 00:15.0 scanning...
974 12:40:15.537307 scan_static_bus for PCI: 00:15.0
975 12:40:15.541461 I2C: 00:1a enabled
976 12:40:15.544036 I2C: 00:31 enabled
977 12:40:15.544350 I2C: 00:32 enabled
978 12:40:15.546743 scan_static_bus for PCI: 00:15.0 done
979 12:40:15.553471 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 12:40:15.556844 PCI: 00:15.1 scanning...
981 12:40:15.559818 scan_static_bus for PCI: 00:15.1
982 12:40:15.559974 I2C: 00:10 enabled
983 12:40:15.563508 scan_static_bus for PCI: 00:15.1 done
984 12:40:15.570481 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 12:40:15.570600 PCI: 00:15.2 scanning...
986 12:40:15.573920 scan_static_bus for PCI: 00:15.2
987 12:40:15.580239 scan_static_bus for PCI: 00:15.2 done
988 12:40:15.583617 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 12:40:15.586782 PCI: 00:15.3 scanning...
990 12:40:15.590061 scan_static_bus for PCI: 00:15.3
991 12:40:15.593559 scan_static_bus for PCI: 00:15.3 done
992 12:40:15.596778 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 12:40:15.600156 PCI: 00:19.1 scanning...
994 12:40:15.603520 scan_static_bus for PCI: 00:19.1
995 12:40:15.606918 I2C: 00:15 enabled
996 12:40:15.609714 scan_static_bus for PCI: 00:19.1 done
997 12:40:15.613052 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 12:40:15.616430 PCI: 00:1d.0 scanning...
999 12:40:15.619863 do_pci_scan_bridge for PCI: 00:1d.0
1000 12:40:15.622991 PCI: pci_scan_bus for bus 01
1001 12:40:15.626945 PCI: 01:00.0 [1c5c/174a] enabled
1002 12:40:15.630026 GENERIC: 0.0 enabled
1003 12:40:15.633317 Enabling Common Clock Configuration
1004 12:40:15.636514 L1 Sub-State supported from root port 29
1005 12:40:15.639882 L1 Sub-State Support = 0xf
1006 12:40:15.643286 CommonModeRestoreTime = 0x28
1007 12:40:15.646399 Power On Value = 0x16, Power On Scale = 0x0
1008 12:40:15.649674 ASPM: Enabled L1
1009 12:40:15.653207 PCIe: Max_Payload_Size adjusted to 128
1010 12:40:15.659262 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 12:40:15.659425 PCI: 00:1e.2 scanning...
1012 12:40:15.662933 scan_generic_bus for PCI: 00:1e.2
1013 12:40:15.666516 SPI: 00 enabled
1014 12:40:15.672797 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 12:40:15.676241 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 12:40:15.679759 PCI: 00:1e.3 scanning...
1017 12:40:15.683307 scan_generic_bus for PCI: 00:1e.3
1018 12:40:15.686262 SPI: 00 enabled
1019 12:40:15.689020 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 12:40:15.695599 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 12:40:15.699142 PCI: 00:1f.0 scanning...
1022 12:40:15.702642 scan_static_bus for PCI: 00:1f.0
1023 12:40:15.702752 PNP: 0c09.0 enabled
1024 12:40:15.706233 PNP: 0c09.0 scanning...
1025 12:40:15.709355 scan_static_bus for PNP: 0c09.0
1026 12:40:15.712466 scan_static_bus for PNP: 0c09.0 done
1027 12:40:15.719331 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 12:40:15.722390 scan_static_bus for PCI: 00:1f.0 done
1029 12:40:15.725484 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 12:40:15.728887 PCI: 00:1f.2 scanning...
1031 12:40:15.732295 scan_static_bus for PCI: 00:1f.2
1032 12:40:15.735607 GENERIC: 0.0 enabled
1033 12:40:15.738940 GENERIC: 0.0 scanning...
1034 12:40:15.742253 scan_static_bus for GENERIC: 0.0
1035 12:40:15.742338 GENERIC: 0.0 enabled
1036 12:40:15.745808 GENERIC: 1.0 enabled
1037 12:40:15.748754 scan_static_bus for GENERIC: 0.0 done
1038 12:40:15.755192 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 12:40:15.758777 scan_static_bus for PCI: 00:1f.2 done
1040 12:40:15.761813 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 12:40:15.765130 PCI: 00:1f.3 scanning...
1042 12:40:15.768791 scan_static_bus for PCI: 00:1f.3
1043 12:40:15.771978 scan_static_bus for PCI: 00:1f.3 done
1044 12:40:15.778541 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 12:40:15.778707 PCI: 00:1f.5 scanning...
1046 12:40:15.781783 scan_generic_bus for PCI: 00:1f.5
1047 12:40:15.788377 scan_generic_bus for PCI: 00:1f.5 done
1048 12:40:15.791470 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 12:40:15.798248 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1050 12:40:15.801437 scan_static_bus for Root Device done
1051 12:40:15.805087 scan_bus: bus Root Device finished in 737 msecs
1052 12:40:15.805181 done
1053 12:40:15.811350 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1054 12:40:15.814719 Chrome EC: UHEPI supported
1055 12:40:15.821289 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 12:40:15.828017 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 12:40:15.831198 SPI flash protection: WPSW=1 SRP0=0
1058 12:40:15.837997 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 12:40:15.841708 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1060 12:40:15.844673 found VGA at PCI: 00:02.0
1061 12:40:15.847638 Setting up VGA for PCI: 00:02.0
1062 12:40:15.854175 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 12:40:15.857714 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 12:40:15.861328 Allocating resources...
1065 12:40:15.864367 Reading resources...
1066 12:40:15.868117 Root Device read_resources bus 0 link: 0
1067 12:40:15.870560 DOMAIN: 0000 read_resources bus 0 link: 0
1068 12:40:15.877774 PCI: 00:04.0 read_resources bus 1 link: 0
1069 12:40:15.881334 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 12:40:15.887854 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 12:40:15.891522 USB0 port 0 read_resources bus 0 link: 0
1072 12:40:15.898049 USB0 port 0 read_resources bus 0 link: 0 done
1073 12:40:15.901017 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 12:40:15.908022 PCI: 00:14.0 read_resources bus 0 link: 0
1075 12:40:15.910836 USB0 port 0 read_resources bus 0 link: 0
1076 12:40:15.917455 USB0 port 0 read_resources bus 0 link: 0 done
1077 12:40:15.920990 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 12:40:15.927385 PCI: 00:14.3 read_resources bus 0 link: 0
1079 12:40:15.930533 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 12:40:15.937119 PCI: 00:15.0 read_resources bus 0 link: 0
1081 12:40:15.940890 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 12:40:15.947218 PCI: 00:15.1 read_resources bus 0 link: 0
1083 12:40:15.950395 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 12:40:15.957187 PCI: 00:19.1 read_resources bus 0 link: 0
1085 12:40:15.960631 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 12:40:15.966887 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 12:40:15.970525 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 12:40:15.977246 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 12:40:15.980719 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 12:40:15.987103 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 12:40:15.990343 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 12:40:15.997108 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 12:40:16.000468 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 12:40:16.006832 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 12:40:16.009838 GENERIC: 0.0 read_resources bus 0 link: 0
1096 12:40:16.016799 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 12:40:16.020482 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 12:40:16.026644 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 12:40:16.029994 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 12:40:16.036712 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 12:40:16.039581 Root Device read_resources bus 0 link: 0 done
1102 12:40:16.043087 Done reading resources.
1103 12:40:16.049699 Show resources in subtree (Root Device)...After reading.
1104 12:40:16.053472 Root Device child on link 0 DOMAIN: 0000
1105 12:40:16.056395 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 12:40:16.066465 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 12:40:16.076162 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 12:40:16.076260 PCI: 00:00.0
1109 12:40:16.086316 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 12:40:16.096343 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 12:40:16.106111 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 12:40:16.116034 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 12:40:16.125756 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 12:40:16.136113 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 12:40:16.142142 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 12:40:16.152675 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 12:40:16.162161 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 12:40:16.172068 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 12:40:16.182062 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 12:40:16.191703 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 12:40:16.198938 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 12:40:16.208155 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 12:40:16.218099 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 12:40:16.228289 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 12:40:16.238422 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 12:40:16.247979 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 12:40:16.257923 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 12:40:16.264460 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 12:40:16.267971 PCI: 00:02.0
1130 12:40:16.277787 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 12:40:16.288068 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 12:40:16.297317 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 12:40:16.301080 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 12:40:16.310775 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 12:40:16.313921 GENERIC: 0.0
1136 12:40:16.314003 PCI: 00:05.0
1137 12:40:16.323971 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 12:40:16.330251 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 12:40:16.330371 GENERIC: 0.0
1140 12:40:16.333613 PCI: 00:08.0
1141 12:40:16.343892 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 12:40:16.343978 PCI: 00:0a.0
1143 12:40:16.350376 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 12:40:16.360571 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 12:40:16.363435 USB0 port 0 child on link 0 USB3 port 0
1146 12:40:16.366732 USB3 port 0
1147 12:40:16.366815 USB3 port 1
1148 12:40:16.369942 USB3 port 2
1149 12:40:16.370025 USB3 port 3
1150 12:40:16.373389 PCI: 00:14.0 child on link 0 USB0 port 0
1151 12:40:16.383771 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 12:40:16.390165 USB0 port 0 child on link 0 USB2 port 0
1153 12:40:16.390256 USB2 port 0
1154 12:40:16.393321 USB2 port 1
1155 12:40:16.393400 USB2 port 2
1156 12:40:16.396593 USB2 port 3
1157 12:40:16.396667 USB2 port 4
1158 12:40:16.399787 USB2 port 5
1159 12:40:16.402993 USB2 port 6
1160 12:40:16.403075 USB2 port 7
1161 12:40:16.406683 USB2 port 8
1162 12:40:16.406765 USB2 port 9
1163 12:40:16.409698 USB3 port 0
1164 12:40:16.409780 USB3 port 1
1165 12:40:16.413131 USB3 port 2
1166 12:40:16.413212 USB3 port 3
1167 12:40:16.416651 PCI: 00:14.2
1168 12:40:16.426186 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 12:40:16.436933 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 12:40:16.440274 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 12:40:16.449989 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 12:40:16.452842 GENERIC: 0.0
1173 12:40:16.456102 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 12:40:16.465848 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 12:40:16.469433 I2C: 00:1a
1176 12:40:16.469555 I2C: 00:31
1177 12:40:16.469625 I2C: 00:32
1178 12:40:16.475663 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 12:40:16.485507 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 12:40:16.485623 I2C: 00:10
1181 12:40:16.489169 PCI: 00:15.2
1182 12:40:16.499125 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 12:40:16.499248 PCI: 00:15.3
1184 12:40:16.508665 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 12:40:16.512286 PCI: 00:16.0
1186 12:40:16.522178 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 12:40:16.522268 PCI: 00:19.0
1188 12:40:16.528799 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 12:40:16.538617 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:40:16.538729 I2C: 00:15
1191 12:40:16.545057 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 12:40:16.551506 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 12:40:16.561684 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 12:40:16.571653 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 12:40:16.571772 GENERIC: 0.0
1196 12:40:16.574940 PCI: 01:00.0
1197 12:40:16.584826 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 12:40:16.594701 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1199 12:40:16.604699 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1200 12:40:16.604799 PCI: 00:1e.0
1201 12:40:16.614665 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1202 12:40:16.620960 PCI: 00:1e.2 child on link 0 SPI: 00
1203 12:40:16.630852 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 12:40:16.630978 SPI: 00
1205 12:40:16.634547 PCI: 00:1e.3 child on link 0 SPI: 00
1206 12:40:16.644856 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 12:40:16.647580 SPI: 00
1208 12:40:16.650578 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1209 12:40:16.660783 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1210 12:40:16.660875 PNP: 0c09.0
1211 12:40:16.670622 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1212 12:40:16.673721 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1213 12:40:16.683682 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1214 12:40:16.693801 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1215 12:40:16.696894 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1216 12:40:16.700781 GENERIC: 0.0
1217 12:40:16.700897 GENERIC: 1.0
1218 12:40:16.704258 PCI: 00:1f.3
1219 12:40:16.713686 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 12:40:16.723463 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1221 12:40:16.723593 PCI: 00:1f.5
1222 12:40:16.734018 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1223 12:40:16.737000 CPU_CLUSTER: 0 child on link 0 APIC: 00
1224 12:40:16.739734 APIC: 00
1225 12:40:16.739843 APIC: 01
1226 12:40:16.743342 APIC: 03
1227 12:40:16.743454 APIC: 07
1228 12:40:16.743554 APIC: 04
1229 12:40:16.746344 APIC: 02
1230 12:40:16.746459 APIC: 06
1231 12:40:16.749695 APIC: 05
1232 12:40:16.756328 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1233 12:40:16.763449 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1234 12:40:16.766316 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1235 12:40:16.773114 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1236 12:40:16.780130 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1237 12:40:16.783142 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1238 12:40:16.786323 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1239 12:40:16.792831 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1240 12:40:16.799636 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1241 12:40:16.809670 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1242 12:40:16.815994 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1243 12:40:16.823431 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1244 12:40:16.829159 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 12:40:16.835839 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1246 12:40:16.845928 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1247 12:40:16.848860 DOMAIN: 0000: Resource ranges:
1248 12:40:16.852241 * Base: 1000, Size: 800, Tag: 100
1249 12:40:16.856142 * Base: 1900, Size: e700, Tag: 100
1250 12:40:16.862208 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1251 12:40:16.869223 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1252 12:40:16.875502 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1253 12:40:16.881974 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1254 12:40:16.888741 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1255 12:40:16.898473 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1256 12:40:16.905323 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1257 12:40:16.912143 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1258 12:40:16.921969 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1259 12:40:16.928338 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1260 12:40:16.934975 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1261 12:40:16.944978 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1262 12:40:16.951854 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1263 12:40:16.958383 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1264 12:40:16.968262 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1265 12:40:16.974850 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1266 12:40:16.981629 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1267 12:40:16.991895 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1268 12:40:16.997961 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1269 12:40:17.004507 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1270 12:40:17.014489 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1271 12:40:17.020660 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1272 12:40:17.027218 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1273 12:40:17.037881 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1274 12:40:17.044456 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1275 12:40:17.047433 DOMAIN: 0000: Resource ranges:
1276 12:40:17.050961 * Base: 7fc00000, Size: 40400000, Tag: 200
1277 12:40:17.057620 * Base: d0000000, Size: 28000000, Tag: 200
1278 12:40:17.060694 * Base: fa000000, Size: 1000000, Tag: 200
1279 12:40:17.063929 * Base: fb001000, Size: 2fff000, Tag: 200
1280 12:40:17.066947 * Base: fe010000, Size: 2e000, Tag: 200
1281 12:40:17.073915 * Base: fe03f000, Size: d41000, Tag: 200
1282 12:40:17.077413 * Base: fed88000, Size: 8000, Tag: 200
1283 12:40:17.080595 * Base: fed93000, Size: d000, Tag: 200
1284 12:40:17.083525 * Base: feda2000, Size: 1e000, Tag: 200
1285 12:40:17.090373 * Base: fede0000, Size: 1220000, Tag: 200
1286 12:40:17.093557 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1287 12:40:17.100427 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1288 12:40:17.106872 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1289 12:40:17.113302 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1290 12:40:17.119631 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1291 12:40:17.126852 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1292 12:40:17.133283 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1293 12:40:17.140128 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1294 12:40:17.146411 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1295 12:40:17.153245 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1296 12:40:17.159697 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1297 12:40:17.166395 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1298 12:40:17.172778 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1299 12:40:17.179367 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1300 12:40:17.186418 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1301 12:40:17.192305 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1302 12:40:17.199593 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1303 12:40:17.205718 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1304 12:40:17.212623 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1305 12:40:17.219520 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1306 12:40:17.226714 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1307 12:40:17.232465 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1308 12:40:17.239104 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1309 12:40:17.249023 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1310 12:40:17.255610 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1311 12:40:17.258955 PCI: 00:1d.0: Resource ranges:
1312 12:40:17.262280 * Base: 7fc00000, Size: 100000, Tag: 200
1313 12:40:17.268769 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1314 12:40:17.275478 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1315 12:40:17.281725 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1316 12:40:17.291877 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1317 12:40:17.298560 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1318 12:40:17.301675 Root Device assign_resources, bus 0 link: 0
1319 12:40:17.308382 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 12:40:17.314980 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1321 12:40:17.325172 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1322 12:40:17.331557 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1323 12:40:17.341342 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1324 12:40:17.344965 PCI: 00:04.0 assign_resources, bus 1 link: 0
1325 12:40:17.352032 PCI: 00:04.0 assign_resources, bus 1 link: 0
1326 12:40:17.357870 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1327 12:40:17.367442 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1328 12:40:17.374259 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1329 12:40:17.377536 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1330 12:40:17.384154 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1331 12:40:17.390897 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1332 12:40:17.397797 PCI: 00:14.0 assign_resources, bus 0 link: 0
1333 12:40:17.400845 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 12:40:17.410766 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1335 12:40:17.417676 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1336 12:40:17.427021 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1337 12:40:17.430532 PCI: 00:14.3 assign_resources, bus 0 link: 0
1338 12:40:17.433748 PCI: 00:14.3 assign_resources, bus 0 link: 0
1339 12:40:17.443501 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1340 12:40:17.447037 PCI: 00:15.0 assign_resources, bus 0 link: 0
1341 12:40:17.453404 PCI: 00:15.0 assign_resources, bus 0 link: 0
1342 12:40:17.460393 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1343 12:40:17.466742 PCI: 00:15.1 assign_resources, bus 0 link: 0
1344 12:40:17.469957 PCI: 00:15.1 assign_resources, bus 0 link: 0
1345 12:40:17.480341 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1346 12:40:17.486520 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1347 12:40:17.496404 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1348 12:40:17.502596 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1349 12:40:17.506184 PCI: 00:19.1 assign_resources, bus 0 link: 0
1350 12:40:17.512638 PCI: 00:19.1 assign_resources, bus 0 link: 0
1351 12:40:17.519198 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1352 12:40:17.529168 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 12:40:17.539127 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1354 12:40:17.542819 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 12:40:17.552336 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1356 12:40:17.559005 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1357 12:40:17.568847 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1358 12:40:17.572019 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 12:40:17.582124 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1360 12:40:17.585560 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1361 12:40:17.588961 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1362 12:40:17.598696 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1363 12:40:17.601710 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1364 12:40:17.608974 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1365 12:40:17.612001 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 12:40:17.618752 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1367 12:40:17.621720 LPC: Trying to open IO window from 800 size 1ff
1368 12:40:17.631213 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1369 12:40:17.638294 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1370 12:40:17.648335 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1371 12:40:17.651509 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 12:40:17.654945 Root Device assign_resources, bus 0 link: 0
1373 12:40:17.658033 Done setting resources.
1374 12:40:17.664536 Show resources in subtree (Root Device)...After assigning values.
1375 12:40:17.667835 Root Device child on link 0 DOMAIN: 0000
1376 12:40:17.674246 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1377 12:40:17.684349 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1378 12:40:17.694070 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1379 12:40:17.694160 PCI: 00:00.0
1380 12:40:17.704153 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1381 12:40:17.713996 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1382 12:40:17.723875 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1383 12:40:17.733719 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1384 12:40:17.740994 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1385 12:40:17.750837 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1386 12:40:17.760154 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1387 12:40:17.770137 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1388 12:40:17.780533 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1389 12:40:17.786713 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1390 12:40:17.797327 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1391 12:40:17.807028 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1392 12:40:17.816832 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1393 12:40:17.827122 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1394 12:40:17.833673 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1395 12:40:17.843174 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1396 12:40:17.853100 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1397 12:40:17.863380 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1398 12:40:17.873135 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1399 12:40:17.883251 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1400 12:40:17.883342 PCI: 00:02.0
1401 12:40:17.896338 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1402 12:40:17.906161 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1403 12:40:17.915811 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1404 12:40:17.919613 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1405 12:40:17.929080 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1406 12:40:17.933012 GENERIC: 0.0
1407 12:40:17.933131 PCI: 00:05.0
1408 12:40:17.942340 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1409 12:40:17.948785 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1410 12:40:17.948871 GENERIC: 0.0
1411 12:40:17.952175 PCI: 00:08.0
1412 12:40:17.962052 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1413 12:40:17.965739 PCI: 00:0a.0
1414 12:40:17.968884 PCI: 00:0d.0 child on link 0 USB0 port 0
1415 12:40:17.978419 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1416 12:40:17.981777 USB0 port 0 child on link 0 USB3 port 0
1417 12:40:17.985009 USB3 port 0
1418 12:40:17.985086 USB3 port 1
1419 12:40:17.988780 USB3 port 2
1420 12:40:17.992068 USB3 port 3
1421 12:40:17.995178 PCI: 00:14.0 child on link 0 USB0 port 0
1422 12:40:18.005154 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1423 12:40:18.008520 USB0 port 0 child on link 0 USB2 port 0
1424 12:40:18.011922 USB2 port 0
1425 12:40:18.012006 USB2 port 1
1426 12:40:18.015195 USB2 port 2
1427 12:40:18.015277 USB2 port 3
1428 12:40:18.018954 USB2 port 4
1429 12:40:18.021437 USB2 port 5
1430 12:40:18.021519 USB2 port 6
1431 12:40:18.024981 USB2 port 7
1432 12:40:18.025064 USB2 port 8
1433 12:40:18.028647 USB2 port 9
1434 12:40:18.028736 USB3 port 0
1435 12:40:18.031362 USB3 port 1
1436 12:40:18.031444 USB3 port 2
1437 12:40:18.034730 USB3 port 3
1438 12:40:18.034811 PCI: 00:14.2
1439 12:40:18.045078 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1440 12:40:18.057690 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1441 12:40:18.061731 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1442 12:40:18.071129 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1443 12:40:18.074539 GENERIC: 0.0
1444 12:40:18.078064 PCI: 00:15.0 child on link 0 I2C: 00:1a
1445 12:40:18.087514 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1446 12:40:18.087605 I2C: 00:1a
1447 12:40:18.090966 I2C: 00:31
1448 12:40:18.091049 I2C: 00:32
1449 12:40:18.097460 PCI: 00:15.1 child on link 0 I2C: 00:10
1450 12:40:18.107623 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1451 12:40:18.107750 I2C: 00:10
1452 12:40:18.111117 PCI: 00:15.2
1453 12:40:18.120510 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1454 12:40:18.120596 PCI: 00:15.3
1455 12:40:18.133966 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1456 12:40:18.134064 PCI: 00:16.0
1457 12:40:18.143504 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1458 12:40:18.146995 PCI: 00:19.0
1459 12:40:18.150551 PCI: 00:19.1 child on link 0 I2C: 00:15
1460 12:40:18.160358 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1461 12:40:18.163681 I2C: 00:15
1462 12:40:18.166684 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1463 12:40:18.176929 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1464 12:40:18.186984 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1465 12:40:18.200232 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1466 12:40:18.200330 GENERIC: 0.0
1467 12:40:18.203515 PCI: 01:00.0
1468 12:40:18.213029 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1469 12:40:18.223218 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1470 12:40:18.233467 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1471 12:40:18.236512 PCI: 00:1e.0
1472 12:40:18.246049 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1473 12:40:18.249505 PCI: 00:1e.2 child on link 0 SPI: 00
1474 12:40:18.259606 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1475 12:40:18.262534 SPI: 00
1476 12:40:18.265872 PCI: 00:1e.3 child on link 0 SPI: 00
1477 12:40:18.276209 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1478 12:40:18.276390 SPI: 00
1479 12:40:18.282862 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1480 12:40:18.289418 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1481 12:40:18.292724 PNP: 0c09.0
1482 12:40:18.299262 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1483 12:40:18.305830 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1484 12:40:18.315418 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 12:40:18.322438 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1486 12:40:18.329476 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1487 12:40:18.329608 GENERIC: 0.0
1488 12:40:18.332510 GENERIC: 1.0
1489 12:40:18.335427 PCI: 00:1f.3
1490 12:40:18.345353 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1491 12:40:18.355170 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1492 12:40:18.355334 PCI: 00:1f.5
1493 12:40:18.365328 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1494 12:40:18.372293 CPU_CLUSTER: 0 child on link 0 APIC: 00
1495 12:40:18.372443 APIC: 00
1496 12:40:18.374924 APIC: 01
1497 12:40:18.375034 APIC: 03
1498 12:40:18.375130 APIC: 07
1499 12:40:18.378247 APIC: 04
1500 12:40:18.378360 APIC: 02
1501 12:40:18.378455 APIC: 06
1502 12:40:18.381609 APIC: 05
1503 12:40:18.384745 Done allocating resources.
1504 12:40:18.392031 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1505 12:40:18.394869 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1506 12:40:18.398474 Configure GPIOs for I2S audio on UP4.
1507 12:40:18.406629 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1508 12:40:18.409616 Enabling resources...
1509 12:40:18.413078 PCI: 00:00.0 subsystem <- 8086/9a12
1510 12:40:18.416070 PCI: 00:00.0 cmd <- 06
1511 12:40:18.419640 PCI: 00:02.0 subsystem <- 8086/9a40
1512 12:40:18.422852 PCI: 00:02.0 cmd <- 03
1513 12:40:18.426077 PCI: 00:04.0 subsystem <- 8086/9a03
1514 12:40:18.430015 PCI: 00:04.0 cmd <- 02
1515 12:40:18.432710 PCI: 00:05.0 subsystem <- 8086/9a19
1516 12:40:18.432844 PCI: 00:05.0 cmd <- 02
1517 12:40:18.439857 PCI: 00:08.0 subsystem <- 8086/9a11
1518 12:40:18.439948 PCI: 00:08.0 cmd <- 06
1519 12:40:18.442548 PCI: 00:0d.0 subsystem <- 8086/9a13
1520 12:40:18.445928 PCI: 00:0d.0 cmd <- 02
1521 12:40:18.449493 PCI: 00:14.0 subsystem <- 8086/a0ed
1522 12:40:18.452385 PCI: 00:14.0 cmd <- 02
1523 12:40:18.455864 PCI: 00:14.2 subsystem <- 8086/a0ef
1524 12:40:18.459920 PCI: 00:14.2 cmd <- 02
1525 12:40:18.462829 PCI: 00:14.3 subsystem <- 8086/a0f0
1526 12:40:18.466013 PCI: 00:14.3 cmd <- 02
1527 12:40:18.468892 PCI: 00:15.0 subsystem <- 8086/a0e8
1528 12:40:18.472174 PCI: 00:15.0 cmd <- 02
1529 12:40:18.475539 PCI: 00:15.1 subsystem <- 8086/a0e9
1530 12:40:18.479263 PCI: 00:15.1 cmd <- 02
1531 12:40:18.482825 PCI: 00:15.2 subsystem <- 8086/a0ea
1532 12:40:18.482943 PCI: 00:15.2 cmd <- 02
1533 12:40:18.489211 PCI: 00:15.3 subsystem <- 8086/a0eb
1534 12:40:18.489330 PCI: 00:15.3 cmd <- 02
1535 12:40:18.492324 PCI: 00:16.0 subsystem <- 8086/a0e0
1536 12:40:18.495917 PCI: 00:16.0 cmd <- 02
1537 12:40:18.498798 PCI: 00:19.1 subsystem <- 8086/a0c6
1538 12:40:18.502367 PCI: 00:19.1 cmd <- 02
1539 12:40:18.505819 PCI: 00:1d.0 bridge ctrl <- 0013
1540 12:40:18.508810 PCI: 00:1d.0 subsystem <- 8086/a0b0
1541 12:40:18.512366 PCI: 00:1d.0 cmd <- 06
1542 12:40:18.515220 PCI: 00:1e.0 subsystem <- 8086/a0a8
1543 12:40:18.518646 PCI: 00:1e.0 cmd <- 06
1544 12:40:18.521814 PCI: 00:1e.2 subsystem <- 8086/a0aa
1545 12:40:18.525148 PCI: 00:1e.2 cmd <- 06
1546 12:40:18.528636 PCI: 00:1e.3 subsystem <- 8086/a0ab
1547 12:40:18.531849 PCI: 00:1e.3 cmd <- 02
1548 12:40:18.535372 PCI: 00:1f.0 subsystem <- 8086/a087
1549 12:40:18.538447 PCI: 00:1f.0 cmd <- 407
1550 12:40:18.541685 PCI: 00:1f.3 subsystem <- 8086/a0c8
1551 12:40:18.541778 PCI: 00:1f.3 cmd <- 02
1552 12:40:18.548450 PCI: 00:1f.5 subsystem <- 8086/a0a4
1553 12:40:18.548536 PCI: 00:1f.5 cmd <- 406
1554 12:40:18.554202 PCI: 01:00.0 cmd <- 02
1555 12:40:18.558392 done.
1556 12:40:18.561757 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1557 12:40:18.564551 Initializing devices...
1558 12:40:18.568165 Root Device init
1559 12:40:18.571351 Chrome EC: Set SMI mask to 0x0000000000000000
1560 12:40:18.578209 Chrome EC: clear events_b mask to 0x0000000000000000
1561 12:40:18.585029 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1562 12:40:18.591113 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1563 12:40:18.598049 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1564 12:40:18.601208 Chrome EC: Set WAKE mask to 0x0000000000000000
1565 12:40:18.608983 fw_config match found: DB_USB=USB3_ACTIVE
1566 12:40:18.612309 Configure Right Type-C port orientation for retimer
1567 12:40:18.615401 Root Device init finished in 45 msecs
1568 12:40:18.620066 PCI: 00:00.0 init
1569 12:40:18.622942 CPU TDP = 9 Watts
1570 12:40:18.623024 CPU PL1 = 9 Watts
1571 12:40:18.626498 CPU PL2 = 40 Watts
1572 12:40:18.629651 CPU PL4 = 83 Watts
1573 12:40:18.632709 PCI: 00:00.0 init finished in 8 msecs
1574 12:40:18.632792 PCI: 00:02.0 init
1575 12:40:18.636431 GMA: Found VBT in CBFS
1576 12:40:18.639156 GMA: Found valid VBT in CBFS
1577 12:40:18.646186 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1578 12:40:18.652832 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1579 12:40:18.655650 PCI: 00:02.0 init finished in 18 msecs
1580 12:40:18.659208 PCI: 00:05.0 init
1581 12:40:18.662755 PCI: 00:05.0 init finished in 0 msecs
1582 12:40:18.666010 PCI: 00:08.0 init
1583 12:40:18.669036 PCI: 00:08.0 init finished in 0 msecs
1584 12:40:18.672245 PCI: 00:14.0 init
1585 12:40:18.675637 PCI: 00:14.0 init finished in 0 msecs
1586 12:40:18.679108 PCI: 00:14.2 init
1587 12:40:18.682419 PCI: 00:14.2 init finished in 0 msecs
1588 12:40:18.685943 PCI: 00:15.0 init
1589 12:40:18.688836 I2C bus 0 version 0x3230302a
1590 12:40:18.692239 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1591 12:40:18.695462 PCI: 00:15.0 init finished in 6 msecs
1592 12:40:18.695572 PCI: 00:15.1 init
1593 12:40:18.699008 I2C bus 1 version 0x3230302a
1594 12:40:18.702327 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1595 12:40:18.708697 PCI: 00:15.1 init finished in 6 msecs
1596 12:40:18.708811 PCI: 00:15.2 init
1597 12:40:18.712207 I2C bus 2 version 0x3230302a
1598 12:40:18.715376 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1599 12:40:18.718749 PCI: 00:15.2 init finished in 6 msecs
1600 12:40:18.722101 PCI: 00:15.3 init
1601 12:40:18.725505 I2C bus 3 version 0x3230302a
1602 12:40:18.729263 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1603 12:40:18.732259 PCI: 00:15.3 init finished in 6 msecs
1604 12:40:18.735332 PCI: 00:16.0 init
1605 12:40:18.738789 PCI: 00:16.0 init finished in 0 msecs
1606 12:40:18.741901 PCI: 00:19.1 init
1607 12:40:18.745282 I2C bus 5 version 0x3230302a
1608 12:40:18.748525 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1609 12:40:18.751828 PCI: 00:19.1 init finished in 6 msecs
1610 12:40:18.755906 PCI: 00:1d.0 init
1611 12:40:18.758386 Initializing PCH PCIe bridge.
1612 12:40:18.762022 PCI: 00:1d.0 init finished in 3 msecs
1613 12:40:18.765084 PCI: 00:1f.0 init
1614 12:40:18.768722 IOAPIC: Initializing IOAPIC at 0xfec00000
1615 12:40:18.771876 IOAPIC: Bootstrap Processor Local APIC = 0x00
1616 12:40:18.775295 IOAPIC: ID = 0x02
1617 12:40:18.778154 IOAPIC: Dumping registers
1618 12:40:18.778236 reg 0x0000: 0x02000000
1619 12:40:18.781786 reg 0x0001: 0x00770020
1620 12:40:18.784927 reg 0x0002: 0x00000000
1621 12:40:18.788032 PCI: 00:1f.0 init finished in 21 msecs
1622 12:40:18.791699 PCI: 00:1f.2 init
1623 12:40:18.795213 Disabling ACPI via APMC.
1624 12:40:18.798240 APMC done.
1625 12:40:18.801821 PCI: 00:1f.2 init finished in 5 msecs
1626 12:40:18.812614 PCI: 01:00.0 init
1627 12:40:18.815639 PCI: 01:00.0 init finished in 0 msecs
1628 12:40:18.818915 PNP: 0c09.0 init
1629 12:40:18.822345 Google Chrome EC uptime: 8.411 seconds
1630 12:40:18.828812 Google Chrome AP resets since EC boot: 1
1631 12:40:18.832474 Google Chrome most recent AP reset causes:
1632 12:40:18.835579 0.350: 32775 shutdown: entering G3
1633 12:40:18.842183 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1634 12:40:18.845471 PNP: 0c09.0 init finished in 22 msecs
1635 12:40:18.851189 Devices initialized
1636 12:40:18.854347 Show all devs... After init.
1637 12:40:18.857736 Root Device: enabled 1
1638 12:40:18.857819 DOMAIN: 0000: enabled 1
1639 12:40:18.861144 CPU_CLUSTER: 0: enabled 1
1640 12:40:18.864170 PCI: 00:00.0: enabled 1
1641 12:40:18.867937 PCI: 00:02.0: enabled 1
1642 12:40:18.868019 PCI: 00:04.0: enabled 1
1643 12:40:18.871088 PCI: 00:05.0: enabled 1
1644 12:40:18.874403 PCI: 00:06.0: enabled 0
1645 12:40:18.878039 PCI: 00:07.0: enabled 0
1646 12:40:18.878121 PCI: 00:07.1: enabled 0
1647 12:40:18.880829 PCI: 00:07.2: enabled 0
1648 12:40:18.884336 PCI: 00:07.3: enabled 0
1649 12:40:18.888005 PCI: 00:08.0: enabled 1
1650 12:40:18.888117 PCI: 00:09.0: enabled 0
1651 12:40:18.890799 PCI: 00:0a.0: enabled 0
1652 12:40:18.894228 PCI: 00:0d.0: enabled 1
1653 12:40:18.897522 PCI: 00:0d.1: enabled 0
1654 12:40:18.897639 PCI: 00:0d.2: enabled 0
1655 12:40:18.900613 PCI: 00:0d.3: enabled 0
1656 12:40:18.903992 PCI: 00:0e.0: enabled 0
1657 12:40:18.907564 PCI: 00:10.2: enabled 1
1658 12:40:18.907699 PCI: 00:10.6: enabled 0
1659 12:40:18.910518 PCI: 00:10.7: enabled 0
1660 12:40:18.914009 PCI: 00:12.0: enabled 0
1661 12:40:18.917038 PCI: 00:12.6: enabled 0
1662 12:40:18.917148 PCI: 00:13.0: enabled 0
1663 12:40:18.920703 PCI: 00:14.0: enabled 1
1664 12:40:18.923624 PCI: 00:14.1: enabled 0
1665 12:40:18.923772 PCI: 00:14.2: enabled 1
1666 12:40:18.927555 PCI: 00:14.3: enabled 1
1667 12:40:18.930067 PCI: 00:15.0: enabled 1
1668 12:40:18.933765 PCI: 00:15.1: enabled 1
1669 12:40:18.933877 PCI: 00:15.2: enabled 1
1670 12:40:18.937204 PCI: 00:15.3: enabled 1
1671 12:40:18.940181 PCI: 00:16.0: enabled 1
1672 12:40:18.943635 PCI: 00:16.1: enabled 0
1673 12:40:18.943785 PCI: 00:16.2: enabled 0
1674 12:40:18.947340 PCI: 00:16.3: enabled 0
1675 12:40:18.950086 PCI: 00:16.4: enabled 0
1676 12:40:18.953725 PCI: 00:16.5: enabled 0
1677 12:40:18.953834 PCI: 00:17.0: enabled 0
1678 12:40:18.956900 PCI: 00:19.0: enabled 0
1679 12:40:18.960000 PCI: 00:19.1: enabled 1
1680 12:40:18.963935 PCI: 00:19.2: enabled 0
1681 12:40:18.964048 PCI: 00:1c.0: enabled 1
1682 12:40:18.966924 PCI: 00:1c.1: enabled 0
1683 12:40:18.970288 PCI: 00:1c.2: enabled 0
1684 12:40:18.970401 PCI: 00:1c.3: enabled 0
1685 12:40:18.973310 PCI: 00:1c.4: enabled 0
1686 12:40:18.976797 PCI: 00:1c.5: enabled 0
1687 12:40:18.980290 PCI: 00:1c.6: enabled 1
1688 12:40:18.980399 PCI: 00:1c.7: enabled 0
1689 12:40:18.983350 PCI: 00:1d.0: enabled 1
1690 12:40:18.986707 PCI: 00:1d.1: enabled 0
1691 12:40:18.990194 PCI: 00:1d.2: enabled 1
1692 12:40:18.990321 PCI: 00:1d.3: enabled 0
1693 12:40:18.993767 PCI: 00:1e.0: enabled 1
1694 12:40:18.996572 PCI: 00:1e.1: enabled 0
1695 12:40:18.999689 PCI: 00:1e.2: enabled 1
1696 12:40:18.999787 PCI: 00:1e.3: enabled 1
1697 12:40:19.002955 PCI: 00:1f.0: enabled 1
1698 12:40:19.006661 PCI: 00:1f.1: enabled 0
1699 12:40:19.009881 PCI: 00:1f.2: enabled 1
1700 12:40:19.009994 PCI: 00:1f.3: enabled 1
1701 12:40:19.012891 PCI: 00:1f.4: enabled 0
1702 12:40:19.016231 PCI: 00:1f.5: enabled 1
1703 12:40:19.019605 PCI: 00:1f.6: enabled 0
1704 12:40:19.019752 PCI: 00:1f.7: enabled 0
1705 12:40:19.022800 APIC: 00: enabled 1
1706 12:40:19.026215 GENERIC: 0.0: enabled 1
1707 12:40:19.026330 GENERIC: 0.0: enabled 1
1708 12:40:19.029520 GENERIC: 1.0: enabled 1
1709 12:40:19.032853 GENERIC: 0.0: enabled 1
1710 12:40:19.036013 GENERIC: 1.0: enabled 1
1711 12:40:19.036124 USB0 port 0: enabled 1
1712 12:40:19.039311 GENERIC: 0.0: enabled 1
1713 12:40:19.042733 USB0 port 0: enabled 1
1714 12:40:19.045833 GENERIC: 0.0: enabled 1
1715 12:40:19.045946 I2C: 00:1a: enabled 1
1716 12:40:19.049177 I2C: 00:31: enabled 1
1717 12:40:19.052812 I2C: 00:32: enabled 1
1718 12:40:19.052920 I2C: 00:10: enabled 1
1719 12:40:19.055982 I2C: 00:15: enabled 1
1720 12:40:19.059185 GENERIC: 0.0: enabled 0
1721 12:40:19.059295 GENERIC: 1.0: enabled 0
1722 12:40:19.062559 GENERIC: 0.0: enabled 1
1723 12:40:19.065611 SPI: 00: enabled 1
1724 12:40:19.065721 SPI: 00: enabled 1
1725 12:40:19.068935 PNP: 0c09.0: enabled 1
1726 12:40:19.072511 GENERIC: 0.0: enabled 1
1727 12:40:19.072624 USB3 port 0: enabled 1
1728 12:40:19.075987 USB3 port 1: enabled 1
1729 12:40:19.078889 USB3 port 2: enabled 0
1730 12:40:19.082285 USB3 port 3: enabled 0
1731 12:40:19.082366 USB2 port 0: enabled 0
1732 12:40:19.085880 USB2 port 1: enabled 1
1733 12:40:19.089236 USB2 port 2: enabled 1
1734 12:40:19.089318 USB2 port 3: enabled 0
1735 12:40:19.092012 USB2 port 4: enabled 1
1736 12:40:19.095392 USB2 port 5: enabled 0
1737 12:40:19.099112 USB2 port 6: enabled 0
1738 12:40:19.099194 USB2 port 7: enabled 0
1739 12:40:19.102261 USB2 port 8: enabled 0
1740 12:40:19.105347 USB2 port 9: enabled 0
1741 12:40:19.105428 USB3 port 0: enabled 0
1742 12:40:19.108865 USB3 port 1: enabled 1
1743 12:40:19.112342 USB3 port 2: enabled 0
1744 12:40:19.115570 USB3 port 3: enabled 0
1745 12:40:19.115651 GENERIC: 0.0: enabled 1
1746 12:40:19.118713 GENERIC: 1.0: enabled 1
1747 12:40:19.121993 APIC: 01: enabled 1
1748 12:40:19.122075 APIC: 03: enabled 1
1749 12:40:19.125444 APIC: 07: enabled 1
1750 12:40:19.125525 APIC: 04: enabled 1
1751 12:40:19.129039 APIC: 02: enabled 1
1752 12:40:19.131700 APIC: 06: enabled 1
1753 12:40:19.131794 APIC: 05: enabled 1
1754 12:40:19.135246 PCI: 01:00.0: enabled 1
1755 12:40:19.141988 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1756 12:40:19.144997 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1757 12:40:19.148042 ELOG: NV offset 0xf30000 size 0x1000
1758 12:40:19.156224 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1759 12:40:19.162815 ELOG: Event(17) added with size 13 at 2024-01-03 12:40:18 UTC
1760 12:40:19.169655 ELOG: Event(92) added with size 9 at 2024-01-03 12:40:18 UTC
1761 12:40:19.176349 ELOG: Event(93) added with size 9 at 2024-01-03 12:40:18 UTC
1762 12:40:19.182811 ELOG: Event(9E) added with size 10 at 2024-01-03 12:40:18 UTC
1763 12:40:19.189289 ELOG: Event(9F) added with size 14 at 2024-01-03 12:40:18 UTC
1764 12:40:19.196189 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1765 12:40:19.202440 ELOG: Event(A1) added with size 10 at 2024-01-03 12:40:18 UTC
1766 12:40:19.205730 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1767 12:40:19.212423 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1768 12:40:19.216205 Finalize devices...
1769 12:40:19.216317 Devices finalized
1770 12:40:19.222235 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1771 12:40:19.229098 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1772 12:40:19.232154 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1773 12:40:19.239196 ME: HFSTS1 : 0x80030055
1774 12:40:19.242103 ME: HFSTS2 : 0x30280116
1775 12:40:19.248948 ME: HFSTS3 : 0x00000050
1776 12:40:19.252254 ME: HFSTS4 : 0x00004000
1777 12:40:19.255678 ME: HFSTS5 : 0x00000000
1778 12:40:19.262510 ME: HFSTS6 : 0x00400006
1779 12:40:19.265196 ME: Manufacturing Mode : YES
1780 12:40:19.268766 ME: SPI Protection Mode Enabled : NO
1781 12:40:19.271771 ME: FW Partition Table : OK
1782 12:40:19.275125 ME: Bringup Loader Failure : NO
1783 12:40:19.278554 ME: Firmware Init Complete : NO
1784 12:40:19.281666 ME: Boot Options Present : NO
1785 12:40:19.285174 ME: Update In Progress : NO
1786 12:40:19.291651 ME: D0i3 Support : YES
1787 12:40:19.295914 ME: Low Power State Enabled : NO
1788 12:40:19.298218 ME: CPU Replaced : YES
1789 12:40:19.301552 ME: CPU Replacement Valid : YES
1790 12:40:19.305743 ME: Current Working State : 5
1791 12:40:19.308928 ME: Current Operation State : 1
1792 12:40:19.311898 ME: Current Operation Mode : 3
1793 12:40:19.315028 ME: Error Code : 0
1794 12:40:19.318491 ME: Enhanced Debug Mode : NO
1795 12:40:19.325006 ME: CPU Debug Disabled : YES
1796 12:40:19.328244 ME: TXT Support : NO
1797 12:40:19.335028 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1798 12:40:19.341593 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1799 12:40:19.344679 CBFS: 'fallback/slic' not found.
1800 12:40:19.348208 ACPI: Writing ACPI tables at 76b01000.
1801 12:40:19.351651 ACPI: * FACS
1802 12:40:19.351760 ACPI: * DSDT
1803 12:40:19.354850 Ramoops buffer: 0x100000@0x76a00000.
1804 12:40:19.361752 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1805 12:40:19.364952 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1806 12:40:19.368079 Google Chrome EC: version:
1807 12:40:19.371479 ro: voema_v2.0.7540-147f8d37d1
1808 12:40:19.374505 rw: voema_v2.0.7540-147f8d37d1
1809 12:40:19.378352 running image: 2
1810 12:40:19.384738 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1811 12:40:19.387842 ACPI: * FADT
1812 12:40:19.387952 SCI is IRQ9
1813 12:40:19.390927 ACPI: added table 1/32, length now 40
1814 12:40:19.394294 ACPI: * SSDT
1815 12:40:19.397869 Found 1 CPU(s) with 8 core(s) each.
1816 12:40:19.401487 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1817 12:40:19.408224 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1818 12:40:19.410980 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1819 12:40:19.414175 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1820 12:40:19.420915 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1821 12:40:19.427527 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1822 12:40:19.430951 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1823 12:40:19.437470 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1824 12:40:19.444415 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1825 12:40:19.447620 \_SB.PCI0.RP09: Added StorageD3Enable property
1826 12:40:19.451004 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1827 12:40:19.457275 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1828 12:40:19.464080 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1829 12:40:19.467059 PS2K: Passing 80 keymaps to kernel
1830 12:40:19.473917 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1831 12:40:19.480507 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1832 12:40:19.486976 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1833 12:40:19.493760 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1834 12:40:19.500289 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1835 12:40:19.507362 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1836 12:40:19.513609 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1837 12:40:19.520123 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1838 12:40:19.523636 ACPI: added table 2/32, length now 44
1839 12:40:19.523757 ACPI: * MCFG
1840 12:40:19.527116 ACPI: added table 3/32, length now 48
1841 12:40:19.530992 ACPI: * TPM2
1842 12:40:19.533351 TPM2 log created at 0x769f0000
1843 12:40:19.537270 ACPI: added table 4/32, length now 52
1844 12:40:19.537355 ACPI: * MADT
1845 12:40:19.540307 SCI is IRQ9
1846 12:40:19.543208 ACPI: added table 5/32, length now 56
1847 12:40:19.546460 current = 76b09850
1848 12:40:19.546543 ACPI: * DMAR
1849 12:40:19.549770 ACPI: added table 6/32, length now 60
1850 12:40:19.553179 ACPI: added table 7/32, length now 64
1851 12:40:19.556615 ACPI: * HPET
1852 12:40:19.560151 ACPI: added table 8/32, length now 68
1853 12:40:19.560234 ACPI: done.
1854 12:40:19.563021 ACPI tables: 35216 bytes.
1855 12:40:19.566511 smbios_write_tables: 769ef000
1856 12:40:19.570059 EC returned error result code 3
1857 12:40:19.573418 Couldn't obtain OEM name from CBI
1858 12:40:19.576618 Create SMBIOS type 16
1859 12:40:19.579511 Create SMBIOS type 17
1860 12:40:19.583100 GENERIC: 0.0 (WIFI Device)
1861 12:40:19.583199 SMBIOS tables: 1750 bytes.
1862 12:40:19.589684 Writing table forward entry at 0x00000500
1863 12:40:19.596056 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1864 12:40:19.599741 Writing coreboot table at 0x76b25000
1865 12:40:19.606246 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1866 12:40:19.609572 1. 0000000000001000-000000000009ffff: RAM
1867 12:40:19.613307 2. 00000000000a0000-00000000000fffff: RESERVED
1868 12:40:19.619504 3. 0000000000100000-00000000769eefff: RAM
1869 12:40:19.623186 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1870 12:40:19.629307 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1871 12:40:19.635685 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1872 12:40:19.639171 7. 0000000077000000-000000007fbfffff: RESERVED
1873 12:40:19.646018 8. 00000000c0000000-00000000cfffffff: RESERVED
1874 12:40:19.648986 9. 00000000f8000000-00000000f9ffffff: RESERVED
1875 12:40:19.652248 10. 00000000fb000000-00000000fb000fff: RESERVED
1876 12:40:19.659309 11. 00000000fe000000-00000000fe00ffff: RESERVED
1877 12:40:19.662520 12. 00000000fed80000-00000000fed87fff: RESERVED
1878 12:40:19.668896 13. 00000000fed90000-00000000fed92fff: RESERVED
1879 12:40:19.672196 14. 00000000feda0000-00000000feda1fff: RESERVED
1880 12:40:19.678647 15. 00000000fedc0000-00000000feddffff: RESERVED
1881 12:40:19.682088 16. 0000000100000000-00000002803fffff: RAM
1882 12:40:19.685245 Passing 4 GPIOs to payload:
1883 12:40:19.688549 NAME | PORT | POLARITY | VALUE
1884 12:40:19.695439 lid | undefined | high | high
1885 12:40:19.701991 power | undefined | high | low
1886 12:40:19.705198 oprom | undefined | high | low
1887 12:40:19.711855 EC in RW | 0x000000e5 | high | high
1888 12:40:19.718452 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum ad33
1889 12:40:19.721732 coreboot table: 1576 bytes.
1890 12:40:19.725613 IMD ROOT 0. 0x76fff000 0x00001000
1891 12:40:19.728628 IMD SMALL 1. 0x76ffe000 0x00001000
1892 12:40:19.731702 FSP MEMORY 2. 0x76c4e000 0x003b0000
1893 12:40:19.734902 VPD 3. 0x76c4d000 0x00000367
1894 12:40:19.738159 RO MCACHE 4. 0x76c4c000 0x00000fdc
1895 12:40:19.741511 CONSOLE 5. 0x76c2c000 0x00020000
1896 12:40:19.748128 FMAP 6. 0x76c2b000 0x00000578
1897 12:40:19.751448 TIME STAMP 7. 0x76c2a000 0x00000910
1898 12:40:19.754726 VBOOT WORK 8. 0x76c16000 0x00014000
1899 12:40:19.757756 ROMSTG STCK 9. 0x76c15000 0x00001000
1900 12:40:19.761304 AFTER CAR 10. 0x76c0a000 0x0000b000
1901 12:40:19.764473 RAMSTAGE 11. 0x76b97000 0x00073000
1902 12:40:19.767592 REFCODE 12. 0x76b42000 0x00055000
1903 12:40:19.770879 SMM BACKUP 13. 0x76b32000 0x00010000
1904 12:40:19.777952 4f444749 14. 0x76b30000 0x00002000
1905 12:40:19.780820 EXT VBT15. 0x76b2d000 0x0000219f
1906 12:40:19.784729 COREBOOT 16. 0x76b25000 0x00008000
1907 12:40:19.787502 ACPI 17. 0x76b01000 0x00024000
1908 12:40:19.791057 ACPI GNVS 18. 0x76b00000 0x00001000
1909 12:40:19.794388 RAMOOPS 19. 0x76a00000 0x00100000
1910 12:40:19.797362 TPM2 TCGLOG20. 0x769f0000 0x00010000
1911 12:40:19.800647 SMBIOS 21. 0x769ef000 0x00000800
1912 12:40:19.804102 IMD small region:
1913 12:40:19.807320 IMD ROOT 0. 0x76ffec00 0x00000400
1914 12:40:19.810558 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1915 12:40:19.816998 POWER STATE 2. 0x76ffeb80 0x00000044
1916 12:40:19.820518 ROMSTAGE 3. 0x76ffeb60 0x00000004
1917 12:40:19.824267 MEM INFO 4. 0x76ffe980 0x000001e0
1918 12:40:19.830563 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1919 12:40:19.834001 MTRR: Physical address space:
1920 12:40:19.837096 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1921 12:40:19.843951 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1922 12:40:19.850140 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1923 12:40:19.856749 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1924 12:40:19.863373 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1925 12:40:19.870354 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1926 12:40:19.876706 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1927 12:40:19.879922 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 12:40:19.883318 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 12:40:19.889866 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 12:40:19.892942 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 12:40:19.896459 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 12:40:19.899834 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 12:40:19.906152 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 12:40:19.909599 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 12:40:19.912887 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 12:40:19.916201 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 12:40:19.923057 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 12:40:19.926193 call enable_fixed_mtrr()
1939 12:40:19.929518 CPU physical address size: 39 bits
1940 12:40:19.932953 MTRR: default type WB/UC MTRR counts: 6/6.
1941 12:40:19.936017 MTRR: UC selected as default type.
1942 12:40:19.943027 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1943 12:40:19.949378 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1944 12:40:19.956004 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1945 12:40:19.962982 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1946 12:40:19.969156 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1947 12:40:19.972205 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1948 12:40:19.980021 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 12:40:19.983654 MTRR: Fixed MSR 0x258 0x0606060606060606
1950 12:40:19.987061 MTRR: Fixed MSR 0x259 0x0000000000000000
1951 12:40:19.989921 MTRR: Fixed MSR 0x268 0x0606060606060606
1952 12:40:19.996496 MTRR: Fixed MSR 0x269 0x0606060606060606
1953 12:40:20.000009 MTRR: Fixed MSR 0x26a 0x0606060606060606
1954 12:40:20.003556 MTRR: Fixed MSR 0x26b 0x0606060606060606
1955 12:40:20.006826 MTRR: Fixed MSR 0x26c 0x0606060606060606
1956 12:40:20.013528 MTRR: Fixed MSR 0x26d 0x0606060606060606
1957 12:40:20.016663 MTRR: Fixed MSR 0x26e 0x0606060606060606
1958 12:40:20.019829 MTRR: Fixed MSR 0x26f 0x0606060606060606
1959 12:40:20.019911
1960 12:40:20.023160 MTRR check
1961 12:40:20.026423 call enable_fixed_mtrr()
1962 12:40:20.026505 Fixed MTRRs : Enabled
1963 12:40:20.029765 Variable MTRRs: Enabled
1964 12:40:20.029847
1965 12:40:20.033077 CPU physical address size: 39 bits
1966 12:40:20.040569 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1967 12:40:20.046699 MTRR: Fixed MSR 0x250 0x0606060606060606
1968 12:40:20.050314 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 12:40:20.053993 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 12:40:20.057112 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 12:40:20.059924 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 12:40:20.066415 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 12:40:20.069958 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 12:40:20.073254 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 12:40:20.076403 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 12:40:20.082983 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 12:40:20.086347 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 12:40:20.089866 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 12:40:20.096540 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 12:40:20.099899 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 12:40:20.103386 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 12:40:20.106573 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 12:40:20.113031 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 12:40:20.116701 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 12:40:20.119464 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 12:40:20.123061 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 12:40:20.129712 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 12:40:20.132623 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 12:40:20.136316 call enable_fixed_mtrr()
1990 12:40:20.139913 call enable_fixed_mtrr()
1991 12:40:20.142989 Checking cr50 for pending updates
1992 12:40:20.146122 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 12:40:20.150303 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 12:40:20.152900 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 12:40:20.159526 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 12:40:20.162758 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 12:40:20.166343 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 12:40:20.169658 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 12:40:20.176193 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 12:40:20.179616 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 12:40:20.182893 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 12:40:20.185949 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 12:40:20.192345 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 12:40:20.195736 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 12:40:20.199400 call enable_fixed_mtrr()
2006 12:40:20.202129 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 12:40:20.205895 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 12:40:20.211952 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 12:40:20.215501 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 12:40:20.218781 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 12:40:20.222170 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 12:40:20.228745 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 12:40:20.232598 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 12:40:20.235818 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 12:40:20.239170 CPU physical address size: 39 bits
2016 12:40:20.242820 call enable_fixed_mtrr()
2017 12:40:20.246422 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 12:40:20.252989 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 12:40:20.256396 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 12:40:20.260017 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 12:40:20.263089 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 12:40:20.269249 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 12:40:20.272699 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 12:40:20.276273 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 12:40:20.279264 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 12:40:20.285852 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 12:40:20.289042 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 12:40:20.292197 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 12:40:20.298762 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 12:40:20.298852 call enable_fixed_mtrr()
2031 12:40:20.305487 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 12:40:20.309380 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 12:40:20.312155 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 12:40:20.316078 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 12:40:20.322221 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 12:40:20.325330 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 12:40:20.329060 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 12:40:20.332172 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 12:40:20.338677 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 12:40:20.341909 CPU physical address size: 39 bits
2041 12:40:20.345375 call enable_fixed_mtrr()
2042 12:40:20.348825 CPU physical address size: 39 bits
2043 12:40:20.351965 CPU physical address size: 39 bits
2044 12:40:20.355404 Reading cr50 TPM mode
2045 12:40:20.359190 CPU physical address size: 39 bits
2046 12:40:20.362953 CPU physical address size: 39 bits
2047 12:40:20.368864 BS: BS_PAYLOAD_LOAD entry times (exec / console): 313 / 6 ms
2048 12:40:20.376052 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2049 12:40:20.382723 Checking segment from ROM address 0xffc02b38
2050 12:40:20.386095 Checking segment from ROM address 0xffc02b54
2051 12:40:20.389053 Loading segment from ROM address 0xffc02b38
2052 12:40:20.392348 code (compression=0)
2053 12:40:20.402419 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2054 12:40:20.408685 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2055 12:40:20.411917 it's not compressed!
2056 12:40:20.550792 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2057 12:40:20.557249 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2058 12:40:20.563998 Loading segment from ROM address 0xffc02b54
2059 12:40:20.567363 Entry Point 0x30000000
2060 12:40:20.567446 Loaded segments
2061 12:40:20.573753 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2062 12:40:20.617906 Finalizing chipset.
2063 12:40:20.620664 Finalizing SMM.
2064 12:40:20.620783 APMC done.
2065 12:40:20.627518 BS: BS_PAYLOAD_LOAD exit times (exec / console): 43 / 5 ms
2066 12:40:20.630800 mp_park_aps done after 0 msecs.
2067 12:40:20.634327 Jumping to boot code at 0x30000000(0x76b25000)
2068 12:40:20.644024 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2069 12:40:20.644114
2070 12:40:20.644179
2071 12:40:20.647145
2072 12:40:20.647233 Starting depthcharge on Voema...
2073 12:40:20.647582 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2074 12:40:20.647707 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2075 12:40:20.647804 Setting prompt string to ['volteer:']
2076 12:40:20.647884 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2077 12:40:20.650822
2078 12:40:20.657382 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2079 12:40:20.657468
2080 12:40:20.663969 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2081 12:40:20.664054
2082 12:40:20.670202 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2083 12:40:20.670285
2084 12:40:20.673764 Failed to find eMMC card reader
2085 12:40:20.673861
2086 12:40:20.676828 Wipe memory regions:
2087 12:40:20.676910
2088 12:40:20.680357 [0x00000000001000, 0x000000000a0000)
2089 12:40:20.680441
2090 12:40:20.683366 [0x00000000100000, 0x00000030000000)
2091 12:40:20.709377
2092 12:40:20.712278 [0x00000032662db0, 0x000000769ef000)
2093 12:40:20.748057
2094 12:40:20.750808 [0x00000100000000, 0x00000280400000)
2095 12:40:20.954077
2096 12:40:20.957732 ec_init: CrosEC protocol v3 supported (256, 256)
2097 12:40:20.957820
2098 12:40:20.963626 update_port_state: port C0 state: usb enable 1 mux conn 0
2099 12:40:20.963734
2100 12:40:20.973466 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2101 12:40:20.973555
2102 12:40:20.976818 pmc_check_ipc_sts: STS_BUSY done after 1511 us
2103 12:40:20.976900
2104 12:40:20.983770 send_conn_disc_msg: pmc_send_cmd succeeded
2105 12:40:21.413340
2106 12:40:21.413475 R8152: Initializing
2107 12:40:21.413541
2108 12:40:21.416557 Version 6 (ocp_data = 5c30)
2109 12:40:21.416640
2110 12:40:21.420017 R8152: Done initializing
2111 12:40:21.420099
2112 12:40:21.423054 Adding net device
2113 12:40:21.725232
2114 12:40:21.728970 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2115 12:40:21.729058
2116 12:40:21.729124
2117 12:40:21.729185
2118 12:40:21.732080 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2120 12:40:21.832460 volteer: tftpboot 192.168.201.1 12437315/tftp-deploy-vkw3yt6g/kernel/bzImage 12437315/tftp-deploy-vkw3yt6g/kernel/cmdline 12437315/tftp-deploy-vkw3yt6g/ramdisk/ramdisk.cpio.gz
2121 12:40:21.832643 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2122 12:40:21.832798 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2123 12:40:21.837577 tftpboot 192.168.201.1 12437315/tftp-deploy-vkw3yt6g/kernel/bzIploy-vkw3yt6g/kernel/cmdline 12437315/tftp-deploy-vkw3yt6g/ramdisk/ramdisk.cpio.gz
2124 12:40:21.837696
2125 12:40:21.837762 Waiting for link
2126 12:40:22.040184
2127 12:40:22.040321 done.
2128 12:40:22.040391
2129 12:40:22.040452 MAC: 00:24:32:30:79:42
2130 12:40:22.040510
2131 12:40:22.043587 Sending DHCP discover... done.
2132 12:40:22.043740
2133 12:40:22.047449 Waiting for reply... done.
2134 12:40:22.047560
2135 12:40:22.051110 Sending DHCP request... done.
2136 12:40:22.051223
2137 12:40:22.059486 Waiting for reply... done.
2138 12:40:22.059574
2139 12:40:22.059638 My ip is 192.168.201.13
2140 12:40:22.059739
2141 12:40:22.065953 The DHCP server ip is 192.168.201.1
2142 12:40:22.066039
2143 12:40:22.069157 TFTP server IP predefined by user: 192.168.201.1
2144 12:40:22.069240
2145 12:40:22.075736 Bootfile predefined by user: 12437315/tftp-deploy-vkw3yt6g/kernel/bzImage
2146 12:40:22.075825
2147 12:40:22.078977 Sending tftp read request... done.
2148 12:40:22.079085
2149 12:40:22.085297 Waiting for the transfer...
2150 12:40:22.085411
2151 12:40:22.620216 00000000 ################################################################
2152 12:40:22.620350
2153 12:40:23.161049 00080000 ################################################################
2154 12:40:23.161182
2155 12:40:23.734521 00100000 ################################################################
2156 12:40:23.734654
2157 12:40:24.308761 00180000 ################################################################
2158 12:40:24.308897
2159 12:40:24.896998 00200000 ################################################################
2160 12:40:24.897194
2161 12:40:25.463549 00280000 ################################################################
2162 12:40:25.463746
2163 12:40:26.046361 00300000 ################################################################
2164 12:40:26.046520
2165 12:40:26.607525 00380000 ################################################################
2166 12:40:26.607694
2167 12:40:27.173789 00400000 ################################################################
2168 12:40:27.173957
2169 12:40:27.708775 00480000 ################################################################
2170 12:40:27.708945
2171 12:40:28.255531 00500000 ################################################################
2172 12:40:28.255727
2173 12:40:28.803344 00580000 ################################################################
2174 12:40:28.803492
2175 12:40:29.370070 00600000 ################################################################
2176 12:40:29.370205
2177 12:40:29.974759 00680000 ################################################################
2178 12:40:29.974893
2179 12:40:30.578384 00700000 ################################################################
2180 12:40:30.578527
2181 12:40:31.164344 00780000 ################################################################
2182 12:40:31.164712
2183 12:40:31.398016 00800000 ######################## done.
2184 12:40:31.398157
2185 12:40:31.400943 The bootfile was 8585104 bytes long.
2186 12:40:31.401026
2187 12:40:31.404488 Sending tftp read request... done.
2188 12:40:31.404571
2189 12:40:31.407583 Waiting for the transfer...
2190 12:40:31.407664
2191 12:40:32.014900 00000000 ################################################################
2192 12:40:32.015042
2193 12:40:32.661614 00080000 ################################################################
2194 12:40:32.662154
2195 12:40:33.291841 00100000 ################################################################
2196 12:40:33.291977
2197 12:40:33.869680 00180000 ################################################################
2198 12:40:33.869819
2199 12:40:34.448887 00200000 ################################################################
2200 12:40:34.449021
2201 12:40:34.998018 00280000 ################################################################
2202 12:40:34.998153
2203 12:40:35.576378 00300000 ################################################################
2204 12:40:35.576518
2205 12:40:36.124873 00380000 ################################################################
2206 12:40:36.125005
2207 12:40:36.692338 00400000 ################################################################
2208 12:40:36.692473
2209 12:40:37.256821 00480000 ################################################################
2210 12:40:37.256966
2211 12:40:37.805234 00500000 ################################################################
2212 12:40:37.805390
2213 12:40:38.389948 00580000 ################################################################
2214 12:40:38.390088
2215 12:40:38.943296 00600000 ################################################################
2216 12:40:38.943435
2217 12:40:39.482943 00680000 ################################################################
2218 12:40:39.483092
2219 12:40:40.028692 00700000 ################################################################
2220 12:40:40.028837
2221 12:40:40.563067 00780000 ################################################################
2222 12:40:40.563249
2223 12:40:41.093940 00800000 ################################################################
2224 12:40:41.094074
2225 12:40:41.622398 00880000 ################################################################
2226 12:40:41.622533
2227 12:40:42.159828 00900000 ################################################################
2228 12:40:42.159970
2229 12:40:42.704591 00980000 ################################################################
2230 12:40:42.704721
2231 12:40:43.234286 00a00000 ################################################################
2232 12:40:43.234417
2233 12:40:43.778622 00a80000 ################################################################
2234 12:40:43.778780
2235 12:40:44.312515 00b00000 ################################################################
2236 12:40:44.312649
2237 12:40:44.855638 00b80000 ################################################################
2238 12:40:44.855815
2239 12:40:45.404582 00c00000 ################################################################
2240 12:40:45.404724
2241 12:40:45.942344 00c80000 ################################################################
2242 12:40:45.942480
2243 12:40:46.453575 00d00000 ################################################################
2244 12:40:46.453707
2245 12:40:46.962767 00d80000 ################################################################
2246 12:40:46.962904
2247 12:40:47.470595 00e00000 ################################################################
2248 12:40:47.470731
2249 12:40:47.983601 00e80000 ################################################################
2250 12:40:47.983800
2251 12:40:48.500942 00f00000 ################################################################
2252 12:40:48.501109
2253 12:40:49.015294 00f80000 ################################################################
2254 12:40:49.015436
2255 12:40:49.530036 01000000 ################################################################
2256 12:40:49.530214
2257 12:40:50.045171 01080000 ################################################################
2258 12:40:50.045309
2259 12:40:50.563364 01100000 ################################################################
2260 12:40:50.563525
2261 12:40:51.078584 01180000 ################################################################
2262 12:40:51.078720
2263 12:40:51.602094 01200000 ################################################################
2264 12:40:51.602235
2265 12:40:52.119309 01280000 ################################################################
2266 12:40:52.119442
2267 12:40:52.637109 01300000 ################################################################
2268 12:40:52.637242
2269 12:40:53.152636 01380000 ################################################################
2270 12:40:53.152780
2271 12:40:53.680012 01400000 ################################################################
2272 12:40:53.680162
2273 12:40:54.222676 01480000 ################################################################
2274 12:40:54.222813
2275 12:40:54.763479 01500000 ################################################################
2276 12:40:54.763612
2277 12:40:55.294315 01580000 ################################################################
2278 12:40:55.294448
2279 12:40:55.853701 01600000 ################################################################
2280 12:40:55.853864
2281 12:40:56.404505 01680000 ################################################################
2282 12:40:56.404638
2283 12:40:56.963733 01700000 ################################################################
2284 12:40:56.963864
2285 12:40:57.544831 01780000 ################################################################
2286 12:40:57.544967
2287 12:40:58.156903 01800000 ################################################################
2288 12:40:58.157046
2289 12:40:58.768105 01880000 ################################################################
2290 12:40:58.768262
2291 12:40:59.367530 01900000 ################################################################
2292 12:40:59.367666
2293 12:41:00.038176 01980000 ################################################################
2294 12:41:00.038863
2295 12:41:00.694543 01a00000 ################################################################
2296 12:41:00.695111
2297 12:41:01.371183 01a80000 ################################################################
2298 12:41:01.371740
2299 12:41:02.050566 01b00000 ################################################################
2300 12:41:02.051119
2301 12:41:02.717095 01b80000 ################################################################
2302 12:41:02.717602
2303 12:41:03.399730 01c00000 ################################################################
2304 12:41:03.400238
2305 12:41:04.072254 01c80000 ################################################################
2306 12:41:04.072762
2307 12:41:04.718099 01d00000 ################################################################
2308 12:41:04.718242
2309 12:41:05.267467 01d80000 ################################################################
2310 12:41:05.267619
2311 12:41:05.805045 01e00000 ################################################################
2312 12:41:05.805194
2313 12:41:06.366367 01e80000 ################################################################
2314 12:41:06.366503
2315 12:41:06.914490 01f00000 ################################################################
2316 12:41:06.914641
2317 12:41:07.503590 01f80000 ################################################################
2318 12:41:07.503764
2319 12:41:08.075599 02000000 ################################################################
2320 12:41:08.075785
2321 12:41:08.724311 02080000 ################################################################
2322 12:41:08.724501
2323 12:41:09.427167 02100000 ################################################################
2324 12:41:09.427314
2325 12:41:10.033654 02180000 ################################################################
2326 12:41:10.033803
2327 12:41:10.467385 02200000 ##################################################### done.
2328 12:41:10.467535
2329 12:41:10.471013 Sending tftp read request... done.
2330 12:41:10.471096
2331 12:41:10.474191 Waiting for the transfer...
2332 12:41:10.474273
2333 12:41:10.474337 00000000 # done.
2334 12:41:10.474400
2335 12:41:10.483922 Command line loaded dynamically from TFTP file: 12437315/tftp-deploy-vkw3yt6g/kernel/cmdline
2336 12:41:10.484005
2337 12:41:10.500253 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2338 12:41:10.506518
2339 12:41:10.509428 Shutting down all USB controllers.
2340 12:41:10.509509
2341 12:41:10.509573 Removing current net device
2342 12:41:10.509633
2343 12:41:10.512547 Finalizing coreboot
2344 12:41:10.512672
2345 12:41:10.519442 Exiting depthcharge with code 4 at timestamp: 58525485
2346 12:41:10.519524
2347 12:41:10.519588
2348 12:41:10.519647 Starting kernel ...
2349 12:41:10.519716
2350 12:41:10.519773
2351 12:41:10.520248 end: 2.2.4 bootloader-commands (duration 00:00:50) [common]
2352 12:41:10.520344 start: 2.2.5 auto-login-action (timeout 00:03:55) [common]
2353 12:41:10.520418 Setting prompt string to ['Linux version [0-9]']
2354 12:41:10.520485 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2355 12:41:10.520551 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2357 12:45:05.521334 end: 2.2.5 auto-login-action (duration 00:03:55) [common]
2359 12:45:05.522439 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 235 seconds'
2361 12:45:05.523309 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2364 12:45:05.524866 end: 2 depthcharge-action (duration 00:05:00) [common]
2366 12:45:05.526022 Cleaning after the job
2367 12:45:05.526234 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437315/tftp-deploy-vkw3yt6g/ramdisk
2368 12:45:05.531391 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437315/tftp-deploy-vkw3yt6g/kernel
2369 12:45:05.532804 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437315/tftp-deploy-vkw3yt6g/modules
2370 12:45:05.533147 start: 4.1 power-off (timeout 00:00:30) [common]
2371 12:45:05.533302 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2372 12:45:05.605273 >> Command sent successfully.
2373 12:45:05.609213 Returned 0 in 0 seconds
2374 12:45:05.710116 end: 4.1 power-off (duration 00:00:00) [common]
2376 12:45:05.711807 start: 4.2 read-feedback (timeout 00:10:00) [common]
2377 12:45:05.713126 Listened to connection for namespace 'common' for up to 1s
2378 12:45:06.713848 Finalising connection for namespace 'common'
2379 12:45:06.714523 Disconnecting from shell: Finalise
2380 12:45:06.714966
2381 12:45:06.816098 end: 4.2 read-feedback (duration 00:00:01) [common]
2382 12:45:06.816731 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12437315
2383 12:45:06.909053 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12437315
2384 12:45:06.909253 JobError: Your job cannot terminate cleanly.