Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:42:31.395937 lava-dispatcher, installed at version: 2023.10
2 12:42:31.396152 start: 0 validate
3 12:42:31.396307 Start time: 2024-01-03 12:42:31.396277+00:00 (UTC)
4 12:42:31.396441 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:42:31.396572 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20231214.0%2Famd64%2Finitrd.cpio.gz exists
6 12:42:31.666071 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:42:31.666242 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:42:34.167466 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:42:34.167713 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20231214.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:42:34.433221 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:42:34.433471 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:42:34.935302 validate duration: 3.54
14 12:42:34.935629 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:42:34.935761 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:42:34.935848 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:42:34.936018 Not decompressing ramdisk as can be used compressed.
18 12:42:34.936116 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20231214.0/amd64/initrd.cpio.gz
19 12:42:34.936184 saving as /var/lib/lava/dispatcher/tmp/12437305/tftp-deploy-0pc67qil/ramdisk/initrd.cpio.gz
20 12:42:34.936251 total size: 6136272 (5 MB)
21 12:42:34.937349 progress 0 % (0 MB)
22 12:42:34.939073 progress 5 % (0 MB)
23 12:42:34.940707 progress 10 % (0 MB)
24 12:42:34.942457 progress 15 % (0 MB)
25 12:42:34.944072 progress 20 % (1 MB)
26 12:42:34.945710 progress 25 % (1 MB)
27 12:42:34.947489 progress 30 % (1 MB)
28 12:42:34.949124 progress 35 % (2 MB)
29 12:42:34.950739 progress 40 % (2 MB)
30 12:42:34.952534 progress 45 % (2 MB)
31 12:42:34.954117 progress 50 % (2 MB)
32 12:42:34.955669 progress 55 % (3 MB)
33 12:42:34.957450 progress 60 % (3 MB)
34 12:42:34.959006 progress 65 % (3 MB)
35 12:42:34.960782 progress 70 % (4 MB)
36 12:42:34.962339 progress 75 % (4 MB)
37 12:42:34.963918 progress 80 % (4 MB)
38 12:42:34.965789 progress 85 % (5 MB)
39 12:42:34.967340 progress 90 % (5 MB)
40 12:42:34.968922 progress 95 % (5 MB)
41 12:42:34.970644 progress 100 % (5 MB)
42 12:42:34.970793 5 MB downloaded in 0.03 s (169.42 MB/s)
43 12:42:34.970947 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:42:34.971195 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:42:34.971279 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:42:34.971363 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:42:34.971491 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:42:34.971563 saving as /var/lib/lava/dispatcher/tmp/12437305/tftp-deploy-0pc67qil/kernel/bzImage
50 12:42:34.971623 total size: 8585104 (8 MB)
51 12:42:34.971683 No compression specified
52 12:42:34.972800 progress 0 % (0 MB)
53 12:42:34.975143 progress 5 % (0 MB)
54 12:42:34.977476 progress 10 % (0 MB)
55 12:42:34.979802 progress 15 % (1 MB)
56 12:42:34.982114 progress 20 % (1 MB)
57 12:42:34.984406 progress 25 % (2 MB)
58 12:42:34.986650 progress 30 % (2 MB)
59 12:42:34.988926 progress 35 % (2 MB)
60 12:42:34.991202 progress 40 % (3 MB)
61 12:42:34.993529 progress 45 % (3 MB)
62 12:42:34.995811 progress 50 % (4 MB)
63 12:42:34.998280 progress 55 % (4 MB)
64 12:42:35.000530 progress 60 % (4 MB)
65 12:42:35.002768 progress 65 % (5 MB)
66 12:42:35.005051 progress 70 % (5 MB)
67 12:42:35.007265 progress 75 % (6 MB)
68 12:42:35.009537 progress 80 % (6 MB)
69 12:42:35.011827 progress 85 % (6 MB)
70 12:42:35.014063 progress 90 % (7 MB)
71 12:42:35.016365 progress 95 % (7 MB)
72 12:42:35.018776 progress 100 % (8 MB)
73 12:42:35.019062 8 MB downloaded in 0.05 s (172.61 MB/s)
74 12:42:35.019216 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:42:35.019465 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:42:35.019553 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:42:35.019657 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:42:35.019883 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20231214.0/amd64/full.rootfs.tar.xz
80 12:42:35.019951 saving as /var/lib/lava/dispatcher/tmp/12437305/tftp-deploy-0pc67qil/nfsrootfs/full.rootfs.tar
81 12:42:35.020013 total size: 205766564 (196 MB)
82 12:42:35.020073 Using unxz to decompress xz
83 12:42:35.024602 progress 0 % (0 MB)
84 12:42:35.636160 progress 5 % (9 MB)
85 12:42:36.203317 progress 10 % (19 MB)
86 12:42:36.889541 progress 15 % (29 MB)
87 12:42:37.190504 progress 20 % (39 MB)
88 12:42:37.792801 progress 25 % (49 MB)
89 12:42:38.411123 progress 30 % (58 MB)
90 12:42:39.056561 progress 35 % (68 MB)
91 12:42:39.688462 progress 40 % (78 MB)
92 12:42:40.361047 progress 45 % (88 MB)
93 12:42:41.086551 progress 50 % (98 MB)
94 12:42:41.798452 progress 55 % (107 MB)
95 12:42:42.589258 progress 60 % (117 MB)
96 12:42:43.027690 progress 65 % (127 MB)
97 12:42:43.122454 progress 70 % (137 MB)
98 12:42:43.278234 progress 75 % (147 MB)
99 12:42:43.370387 progress 80 % (157 MB)
100 12:42:43.428036 progress 85 % (166 MB)
101 12:42:43.537842 progress 90 % (176 MB)
102 12:42:43.921704 progress 95 % (186 MB)
103 12:42:44.596557 progress 100 % (196 MB)
104 12:42:44.602350 196 MB downloaded in 9.58 s (20.48 MB/s)
105 12:42:44.602606 end: 1.3.1 http-download (duration 00:00:10) [common]
107 12:42:44.602868 end: 1.3 download-retry (duration 00:00:10) [common]
108 12:42:44.602956 start: 1.4 download-retry (timeout 00:09:50) [common]
109 12:42:44.603045 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 12:42:44.603195 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:42:44.603266 saving as /var/lib/lava/dispatcher/tmp/12437305/tftp-deploy-0pc67qil/modules/modules.tar
112 12:42:44.603343 total size: 253660 (0 MB)
113 12:42:44.603437 Using unxz to decompress xz
114 12:42:44.608022 progress 12 % (0 MB)
115 12:42:44.608478 progress 25 % (0 MB)
116 12:42:44.608716 progress 38 % (0 MB)
117 12:42:44.610402 progress 51 % (0 MB)
118 12:42:44.612494 progress 64 % (0 MB)
119 12:42:44.614385 progress 77 % (0 MB)
120 12:42:44.616181 progress 90 % (0 MB)
121 12:42:44.618354 progress 100 % (0 MB)
122 12:42:44.624064 0 MB downloaded in 0.02 s (11.68 MB/s)
123 12:42:44.624420 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:42:44.624852 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:42:44.625005 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
127 12:42:44.625143 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
128 12:42:49.080447 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12437305/extract-nfsrootfs-a_2cjqq_
129 12:42:49.080666 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 12:42:49.080769 start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
131 12:42:49.080941 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y
132 12:42:49.081078 makedir: /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin
133 12:42:49.081187 makedir: /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/tests
134 12:42:49.081288 makedir: /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/results
135 12:42:49.081391 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-add-keys
136 12:42:49.081543 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-add-sources
137 12:42:49.081797 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-background-process-start
138 12:42:49.081942 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-background-process-stop
139 12:42:49.082098 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-common-functions
140 12:42:49.082223 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-echo-ipv4
141 12:42:49.082349 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-install-packages
142 12:42:49.082474 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-installed-packages
143 12:42:49.082598 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-os-build
144 12:42:49.082723 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-probe-channel
145 12:42:49.082846 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-probe-ip
146 12:42:49.082969 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-target-ip
147 12:42:49.083093 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-target-mac
148 12:42:49.083219 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-target-storage
149 12:42:49.083346 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-test-case
150 12:42:49.083475 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-test-event
151 12:42:49.083600 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-test-feedback
152 12:42:49.083723 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-test-raise
153 12:42:49.083847 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-test-reference
154 12:42:49.083973 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-test-runner
155 12:42:49.084097 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-test-set
156 12:42:49.084257 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-test-shell
157 12:42:49.084641 Updating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-add-keys (debian)
158 12:42:49.084796 Updating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-add-sources (debian)
159 12:42:49.084939 Updating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-install-packages (debian)
160 12:42:49.085081 Updating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-installed-packages (debian)
161 12:42:49.085221 Updating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/bin/lava-os-build (debian)
162 12:42:49.085344 Creating /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/environment
163 12:42:49.085440 LAVA metadata
164 12:42:49.085511 - LAVA_JOB_ID=12437305
165 12:42:49.085574 - LAVA_DISPATCHER_IP=192.168.201.1
166 12:42:49.085674 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
167 12:42:49.085741 skipped lava-vland-overlay
168 12:42:49.085815 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 12:42:49.085893 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
170 12:42:49.085954 skipped lava-multinode-overlay
171 12:42:49.086027 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 12:42:49.086104 start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
173 12:42:49.086176 Loading test definitions
174 12:42:49.086265 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:46) [common]
175 12:42:49.086334 Using /lava-12437305 at stage 0
176 12:42:49.086622 uuid=12437305_1.5.2.3.1 testdef=None
177 12:42:49.086710 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 12:42:49.086794 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
179 12:42:49.087255 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 12:42:49.087475 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
182 12:42:49.088027 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 12:42:49.088254 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
185 12:42:49.089125 runner path: /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/0/tests/0_timesync-off test_uuid 12437305_1.5.2.3.1
186 12:42:49.089285 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 12:42:49.089512 start: 1.5.2.3.5 git-repo-action (timeout 00:09:46) [common]
189 12:42:49.089583 Using /lava-12437305 at stage 0
190 12:42:49.089680 Fetching tests from https://github.com/kernelci/test-definitions.git
191 12:42:49.089758 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/0/tests/1_kselftest-alsa'
192 12:42:51.792754 Running '/usr/bin/git checkout kernelci.org
193 12:42:51.974091 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
194 12:42:51.974968 uuid=12437305_1.5.2.3.5 testdef=None
195 12:42:51.975156 end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
197 12:42:51.975447 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
198 12:42:51.976869 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 12:42:51.977293 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
201 12:42:51.979173 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 12:42:51.979608 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
204 12:42:51.981057 runner path: /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/0/tests/1_kselftest-alsa test_uuid 12437305_1.5.2.3.5
205 12:42:51.981162 BOARD='asus-C436FA-Flip-hatch'
206 12:42:51.981231 BRANCH='cip'
207 12:42:51.981332 SKIPFILE='/dev/null'
208 12:42:51.981443 SKIP_INSTALL='True'
209 12:42:51.981553 TESTPROG_URL='None'
210 12:42:51.981664 TST_CASENAME=''
211 12:42:51.981774 TST_CMDFILES='alsa'
212 12:42:51.982012 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 12:42:51.982400 Creating lava-test-runner.conf files
215 12:42:51.982515 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437305/lava-overlay-cmb2lu8y/lava-12437305/0 for stage 0
216 12:42:51.982673 - 0_timesync-off
217 12:42:51.982793 - 1_kselftest-alsa
218 12:42:51.982959 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
219 12:42:51.983111 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
220 12:43:00.428808 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
221 12:43:00.429024 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
222 12:43:00.429175 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 12:43:00.429339 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
224 12:43:00.429484 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
225 12:43:00.609310 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 12:43:00.609818 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
227 12:43:00.610127 extracting modules file /var/lib/lava/dispatcher/tmp/12437305/tftp-deploy-0pc67qil/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437305/extract-nfsrootfs-a_2cjqq_
228 12:43:00.635996 extracting modules file /var/lib/lava/dispatcher/tmp/12437305/tftp-deploy-0pc67qil/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437305/extract-overlay-ramdisk-6sl0j9bo/ramdisk
229 12:43:00.660590 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 12:43:00.660786 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
231 12:43:00.660921 [common] Applying overlay to NFS
232 12:43:00.661029 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437305/compress-overlay-nhiz8gl1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12437305/extract-nfsrootfs-a_2cjqq_
233 12:43:01.848134 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 12:43:01.848347 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
235 12:43:01.848475 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 12:43:01.848594 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
237 12:43:01.848697 Building ramdisk /var/lib/lava/dispatcher/tmp/12437305/extract-overlay-ramdisk-6sl0j9bo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12437305/extract-overlay-ramdisk-6sl0j9bo/ramdisk
238 12:43:01.964438 >> 30726 blocks
239 12:43:02.699373 rename /var/lib/lava/dispatcher/tmp/12437305/extract-overlay-ramdisk-6sl0j9bo/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12437305/tftp-deploy-0pc67qil/ramdisk/ramdisk.cpio.gz
240 12:43:02.699976 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 12:43:02.700172 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
242 12:43:02.700348 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
243 12:43:02.700507 No mkimage arch provided, not using FIT.
244 12:43:02.700659 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 12:43:02.700802 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 12:43:02.700975 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
247 12:43:02.701131 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
248 12:43:02.701266 No LXC device requested
249 12:43:02.701408 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 12:43:02.701564 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
251 12:43:02.701709 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 12:43:02.701840 Checking files for TFTP limit of 4294967296 bytes.
253 12:43:02.702475 end: 1 tftp-deploy (duration 00:00:28) [common]
254 12:43:02.702634 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 12:43:02.702787 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 12:43:02.702992 substitutions:
257 12:43:02.703106 - {DTB}: None
258 12:43:02.703222 - {INITRD}: 12437305/tftp-deploy-0pc67qil/ramdisk/ramdisk.cpio.gz
259 12:43:02.703331 - {KERNEL}: 12437305/tftp-deploy-0pc67qil/kernel/bzImage
260 12:43:02.703438 - {LAVA_MAC}: None
261 12:43:02.703544 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12437305/extract-nfsrootfs-a_2cjqq_
262 12:43:02.703650 - {NFS_SERVER_IP}: 192.168.201.1
263 12:43:02.703756 - {PRESEED_CONFIG}: None
264 12:43:02.703862 - {PRESEED_LOCAL}: None
265 12:43:02.703968 - {RAMDISK}: 12437305/tftp-deploy-0pc67qil/ramdisk/ramdisk.cpio.gz
266 12:43:02.704075 - {ROOT_PART}: None
267 12:43:02.704181 - {ROOT}: None
268 12:43:02.704293 - {SERVER_IP}: 192.168.201.1
269 12:43:02.704402 - {TEE}: None
270 12:43:02.704507 Parsed boot commands:
271 12:43:02.704611 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 12:43:02.704893 Parsed boot commands: tftpboot 192.168.201.1 12437305/tftp-deploy-0pc67qil/kernel/bzImage 12437305/tftp-deploy-0pc67qil/kernel/cmdline 12437305/tftp-deploy-0pc67qil/ramdisk/ramdisk.cpio.gz
273 12:43:02.705050 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 12:43:02.705195 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 12:43:02.705356 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 12:43:02.705507 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 12:43:02.705634 Not connected, no need to disconnect.
278 12:43:02.705766 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 12:43:02.705911 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 12:43:02.706034 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
281 12:43:02.711508 Setting prompt string to ['lava-test: # ']
282 12:43:02.712045 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 12:43:02.712227 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 12:43:02.712396 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 12:43:02.712547 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 12:43:02.712886 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
287 12:43:07.845922 >> Command sent successfully.
288 12:43:07.848879 Returned 0 in 5 seconds
289 12:43:07.949277 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 12:43:07.949612 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 12:43:07.949727 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 12:43:07.949853 Setting prompt string to 'Starting depthcharge on Helios...'
294 12:43:07.949955 Changing prompt to 'Starting depthcharge on Helios...'
295 12:43:07.950037 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 12:43:07.950316 [Enter `^Ec?' for help]
297 12:43:08.569830
298 12:43:08.569986
299 12:43:08.580668 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 12:43:08.584171 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 12:43:08.587336 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 12:43:08.594568 CPU: AES supported, TXT NOT supported, VT supported
303 12:43:08.597450 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 12:43:08.604580 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 12:43:08.611143 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 12:43:08.614273 VBOOT: Loading verstage.
307 12:43:08.617548 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 12:43:08.624773 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 12:43:08.627673 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 12:43:08.631178 CBFS @ c08000 size 3f8000
311 12:43:08.637504 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 12:43:08.641497 CBFS: Locating 'fallback/verstage'
313 12:43:08.644312 CBFS: Found @ offset 10fb80 size 1072c
314 12:43:08.644394
315 12:43:08.644461
316 12:43:08.657484 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 12:43:08.670843 Probing TPM: . done!
318 12:43:08.674453 TPM ready after 0 ms
319 12:43:08.677549 Connected to device vid:did:rid of 1ae0:0028:00
320 12:43:08.688065 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 12:43:08.691436 Initialized TPM device CR50 revision 0
322 12:43:08.735625 tlcl_send_startup: Startup return code is 0
323 12:43:08.735779 TPM: setup succeeded
324 12:43:08.748489 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 12:43:08.752535 Chrome EC: UHEPI supported
326 12:43:08.755592 Phase 1
327 12:43:08.758852 FMAP: area GBB found @ c05000 (12288 bytes)
328 12:43:08.765850 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 12:43:08.765987 Phase 2
330 12:43:08.768914 Phase 3
331 12:43:08.772214 FMAP: area GBB found @ c05000 (12288 bytes)
332 12:43:08.778708 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 12:43:08.785725 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
334 12:43:08.788826 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
335 12:43:08.795830 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 12:43:08.811196 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
337 12:43:08.814193 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
338 12:43:08.821064 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 12:43:08.825132 Phase 4
340 12:43:08.828427 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
341 12:43:08.835366 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 12:43:09.014605 VB2:vb2_rsa_verify_digest() Digest check failed!
343 12:43:09.021113 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 12:43:09.021263 Saving nvdata
345 12:43:09.024939 Reboot requested (10020007)
346 12:43:09.027960 board_reset() called!
347 12:43:09.028081 full_reset() called!
348 12:43:13.537148
349 12:43:13.537329
350 12:43:13.547333 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 12:43:13.550485 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 12:43:13.557063 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 12:43:13.560187 CPU: AES supported, TXT NOT supported, VT supported
354 12:43:13.566903 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 12:43:13.570721 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 12:43:13.576775 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 12:43:13.580436 VBOOT: Loading verstage.
358 12:43:13.583731 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 12:43:13.590547 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 12:43:13.593515 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 12:43:13.597128 CBFS @ c08000 size 3f8000
362 12:43:13.603853 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 12:43:13.606867 CBFS: Locating 'fallback/verstage'
364 12:43:13.610042 CBFS: Found @ offset 10fb80 size 1072c
365 12:43:13.614070
366 12:43:13.614195
367 12:43:13.623994 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 12:43:13.637818 Probing TPM: . done!
369 12:43:13.641548 TPM ready after 0 ms
370 12:43:13.644727 Connected to device vid:did:rid of 1ae0:0028:00
371 12:43:13.654977 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
372 12:43:13.694263 Initialized TPM device CR50 revision 0
373 12:43:13.702728 tlcl_send_startup: Startup return code is 0
374 12:43:13.702823 TPM: setup succeeded
375 12:43:13.715970 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 12:43:13.719669 Chrome EC: UHEPI supported
377 12:43:13.722753 Phase 1
378 12:43:13.725753 FMAP: area GBB found @ c05000 (12288 bytes)
379 12:43:13.732883 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 12:43:13.739663 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 12:43:13.742838 Recovery requested (1009000e)
382 12:43:13.747860 Saving nvdata
383 12:43:13.754225 tlcl_extend: response is 0
384 12:43:13.763111 tlcl_extend: response is 0
385 12:43:13.770173 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 12:43:13.773345 CBFS @ c08000 size 3f8000
387 12:43:13.779963 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 12:43:13.783551 CBFS: Locating 'fallback/romstage'
389 12:43:13.787022 CBFS: Found @ offset 80 size 145fc
390 12:43:13.790001 Accumulated console time in verstage 98 ms
391 12:43:13.790092
392 12:43:13.790160
393 12:43:13.803284 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 12:43:13.810315 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 12:43:13.813428 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 12:43:13.816710 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 12:43:13.822988 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 12:43:13.826432 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 12:43:13.830243 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
400 12:43:13.833266 TCO_STS: 0000 0000
401 12:43:13.836253 GEN_PMCON: e0015238 00000200
402 12:43:13.839755 GBLRST_CAUSE: 00000000 00000000
403 12:43:13.839862 prev_sleep_state 5
404 12:43:13.842891 Boot Count incremented to 3020
405 12:43:13.849737 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 12:43:13.852899 CBFS @ c08000 size 3f8000
407 12:43:13.859968 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 12:43:13.860101 CBFS: Locating 'fspm.bin'
409 12:43:13.866236 CBFS: Found @ offset 5ffc0 size 71000
410 12:43:13.869613 Chrome EC: UHEPI supported
411 12:43:13.875920 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 12:43:13.879820 Probing TPM: done!
413 12:43:13.886177 Connected to device vid:did:rid of 1ae0:0028:00
414 12:43:13.896512 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
415 12:43:13.902380 Initialized TPM device CR50 revision 0
416 12:43:13.911151 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 12:43:13.917919 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 12:43:13.921229 MRC cache found, size 1948
419 12:43:13.924344 bootmode is set to: 2
420 12:43:13.927387 PRMRR disabled by config.
421 12:43:13.927475 SPD INDEX = 1
422 12:43:13.934437 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 12:43:13.937514 CBFS @ c08000 size 3f8000
424 12:43:13.944404 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 12:43:13.944491 CBFS: Locating 'spd.bin'
426 12:43:13.947639 CBFS: Found @ offset 5fb80 size 400
427 12:43:13.951214 SPD: module type is LPDDR3
428 12:43:13.954541 SPD: module part is
429 12:43:13.961251 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 12:43:13.964558 SPD: device width 4 bits, bus width 8 bits
431 12:43:13.968070 SPD: module size is 4096 MB (per channel)
432 12:43:13.971077 memory slot: 0 configuration done.
433 12:43:13.974338 memory slot: 2 configuration done.
434 12:43:14.025283 CBMEM:
435 12:43:14.029138 IMD: root @ 99fff000 254 entries.
436 12:43:14.032022 IMD: root @ 99ffec00 62 entries.
437 12:43:14.035525 External stage cache:
438 12:43:14.038551 IMD: root @ 9abff000 254 entries.
439 12:43:14.042147 IMD: root @ 9abfec00 62 entries.
440 12:43:14.045567 Chrome EC: clear events_b mask to 0x0000000020004000
441 12:43:14.061280 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 12:43:14.074237 tlcl_write: response is 0
443 12:43:14.083281 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 12:43:14.090568 MRC: TPM MRC hash updated successfully.
445 12:43:14.090654 2 DIMMs found
446 12:43:14.093832 SMM Memory Map
447 12:43:14.097096 SMRAM : 0x9a000000 0x1000000
448 12:43:14.100551 Subregion 0: 0x9a000000 0xa00000
449 12:43:14.103645 Subregion 1: 0x9aa00000 0x200000
450 12:43:14.106634 Subregion 2: 0x9ac00000 0x400000
451 12:43:14.110407 top_of_ram = 0x9a000000
452 12:43:14.113459 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 12:43:14.120150 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 12:43:14.123404 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 12:43:14.130298 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 12:43:14.133144 CBFS @ c08000 size 3f8000
457 12:43:14.136450 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 12:43:14.140281 CBFS: Locating 'fallback/postcar'
459 12:43:14.146564 CBFS: Found @ offset 107000 size 4b44
460 12:43:14.149480 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 12:43:14.162137 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 12:43:14.165171 Processing 180 relocs. Offset value of 0x97c0c000
463 12:43:14.174188 Accumulated console time in romstage 285 ms
464 12:43:14.174275
465 12:43:14.174343
466 12:43:14.183696 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 12:43:14.190786 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 12:43:14.194202 CBFS @ c08000 size 3f8000
469 12:43:14.197179 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 12:43:14.203276 CBFS: Locating 'fallback/ramstage'
471 12:43:14.207034 CBFS: Found @ offset 43380 size 1b9e8
472 12:43:14.213302 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 12:43:14.245425 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 12:43:14.248967 Processing 3976 relocs. Offset value of 0x98db0000
475 12:43:14.255490 Accumulated console time in postcar 52 ms
476 12:43:14.255615
477 12:43:14.255697
478 12:43:14.265817 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 12:43:14.272102 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 12:43:14.275341 WARNING: RO_VPD is uninitialized or empty.
481 12:43:14.278557 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 12:43:14.285712 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 12:43:14.285798 Normal boot.
484 12:43:14.291639 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 12:43:14.295215 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 12:43:14.298578 CBFS @ c08000 size 3f8000
487 12:43:14.304950 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 12:43:14.308360 CBFS: Locating 'cpu_microcode_blob.bin'
489 12:43:14.312020 CBFS: Found @ offset 14700 size 2ec00
490 12:43:14.315304 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 12:43:14.318526 Skip microcode update
492 12:43:14.325193 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 12:43:14.325281 CBFS @ c08000 size 3f8000
494 12:43:14.331295 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 12:43:14.335106 CBFS: Locating 'fsps.bin'
496 12:43:14.337887 CBFS: Found @ offset d1fc0 size 35000
497 12:43:14.363722 Detected 4 core, 8 thread CPU.
498 12:43:14.367179 Setting up SMI for CPU
499 12:43:14.370643 IED base = 0x9ac00000
500 12:43:14.370730 IED size = 0x00400000
501 12:43:14.373688 Will perform SMM setup.
502 12:43:14.380066 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 12:43:14.387029 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 12:43:14.390095 Processing 16 relocs. Offset value of 0x00030000
505 12:43:14.394128 Attempting to start 7 APs
506 12:43:14.397086 Waiting for 10ms after sending INIT.
507 12:43:14.413528 Waiting for 1st SIPI to complete...done.
508 12:43:14.413612 AP: slot 1 apic_id 1.
509 12:43:14.420054 Waiting for 2nd SIPI to complete...done.
510 12:43:14.420141 AP: slot 7 apic_id 2.
511 12:43:14.423477 AP: slot 6 apic_id 3.
512 12:43:14.426579 AP: slot 5 apic_id 4.
513 12:43:14.426709 AP: slot 4 apic_id 7.
514 12:43:14.429867 AP: slot 2 apic_id 6.
515 12:43:14.433835 AP: slot 3 apic_id 5.
516 12:43:14.439954 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 12:43:14.446460 Processing 13 relocs. Offset value of 0x00038000
518 12:43:14.449764 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 12:43:14.456850 Installing SMM handler to 0x9a000000
520 12:43:14.462893 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 12:43:14.466738 Processing 658 relocs. Offset value of 0x9a010000
522 12:43:14.476420 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 12:43:14.479706 Processing 13 relocs. Offset value of 0x9a008000
524 12:43:14.486727 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 12:43:14.492965 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 12:43:14.496738 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 12:43:14.502949 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 12:43:14.510035 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 12:43:14.516192 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 12:43:14.519491 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 12:43:14.525789 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 12:43:14.529707 Clearing SMI status registers
533 12:43:14.532967 SMI_STS: PM1
534 12:43:14.533094 PM1_STS: PWRBTN
535 12:43:14.536233 TCO_STS: SECOND_TO
536 12:43:14.539577 New SMBASE 0x9a000000
537 12:43:14.542586 In relocation handler: CPU 0
538 12:43:14.546025 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 12:43:14.549541 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 12:43:14.552595 Relocation complete.
541 12:43:14.556209 New SMBASE 0x99fffc00
542 12:43:14.559390 In relocation handler: CPU 1
543 12:43:14.562634 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
544 12:43:14.566154 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 12:43:14.569490 Relocation complete.
546 12:43:14.572815 New SMBASE 0x99ffe400
547 12:43:14.572901 In relocation handler: CPU 7
548 12:43:14.579512 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
549 12:43:14.582743 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 12:43:14.586302 Relocation complete.
551 12:43:14.586387 New SMBASE 0x99ffe800
552 12:43:14.589125 In relocation handler: CPU 6
553 12:43:14.596417 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
554 12:43:14.599149 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 12:43:14.602733 Relocation complete.
556 12:43:14.602819 New SMBASE 0x99fff000
557 12:43:14.605834 In relocation handler: CPU 4
558 12:43:14.609701 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
559 12:43:14.615813 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 12:43:14.619363 Relocation complete.
561 12:43:14.619449 New SMBASE 0x99ffec00
562 12:43:14.622683 In relocation handler: CPU 5
563 12:43:14.625715 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
564 12:43:14.632964 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 12:43:14.635871 Relocation complete.
566 12:43:14.635975 New SMBASE 0x99fff400
567 12:43:14.639393 In relocation handler: CPU 3
568 12:43:14.642318 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
569 12:43:14.649062 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 12:43:14.649192 Relocation complete.
571 12:43:14.652700 New SMBASE 0x99fff800
572 12:43:14.655817 In relocation handler: CPU 2
573 12:43:14.659218 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
574 12:43:14.665867 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 12:43:14.665952 Relocation complete.
576 12:43:14.669236 Initializing CPU #0
577 12:43:14.672670 CPU: vendor Intel device 806ec
578 12:43:14.675857 CPU: family 06, model 8e, stepping 0c
579 12:43:14.679232 Clearing out pending MCEs
580 12:43:14.682361 Setting up local APIC...
581 12:43:14.682449 apic_id: 0x00 done.
582 12:43:14.686251 Turbo is available but hidden
583 12:43:14.689285 Turbo is available and visible
584 12:43:14.692655 VMX status: enabled
585 12:43:14.695717 IA32_FEATURE_CONTROL status: locked
586 12:43:14.698960 Skip microcode update
587 12:43:14.699045 CPU #0 initialized
588 12:43:14.702726 Initializing CPU #1
589 12:43:14.702813 Initializing CPU #6
590 12:43:14.705700 Initializing CPU #7
591 12:43:14.709508 CPU: vendor Intel device 806ec
592 12:43:14.712226 CPU: family 06, model 8e, stepping 0c
593 12:43:14.715686 CPU: vendor Intel device 806ec
594 12:43:14.719224 CPU: family 06, model 8e, stepping 0c
595 12:43:14.722551 Clearing out pending MCEs
596 12:43:14.725509 Clearing out pending MCEs
597 12:43:14.729160 Setting up local APIC...
598 12:43:14.729286 CPU: vendor Intel device 806ec
599 12:43:14.735421 CPU: family 06, model 8e, stepping 0c
600 12:43:14.735507 Clearing out pending MCEs
601 12:43:14.739226 Initializing CPU #4
602 12:43:14.742482 Initializing CPU #2
603 12:43:14.745863 CPU: vendor Intel device 806ec
604 12:43:14.749110 CPU: family 06, model 8e, stepping 0c
605 12:43:14.752279 CPU: vendor Intel device 806ec
606 12:43:14.755546 CPU: family 06, model 8e, stepping 0c
607 12:43:14.758805 Clearing out pending MCEs
608 12:43:14.758932 Clearing out pending MCEs
609 12:43:14.762041 Setting up local APIC...
610 12:43:14.765658 Initializing CPU #3
611 12:43:14.765785 Initializing CPU #5
612 12:43:14.768905 CPU: vendor Intel device 806ec
613 12:43:14.772211 CPU: family 06, model 8e, stepping 0c
614 12:43:14.775308 CPU: vendor Intel device 806ec
615 12:43:14.778933 CPU: family 06, model 8e, stepping 0c
616 12:43:14.782000 Clearing out pending MCEs
617 12:43:14.785430 Clearing out pending MCEs
618 12:43:14.788605 Setting up local APIC...
619 12:43:14.792386 Setting up local APIC...
620 12:43:14.792512 Setting up local APIC...
621 12:43:14.795625 apic_id: 0x03 done.
622 12:43:14.798847 apic_id: 0x02 done.
623 12:43:14.798974 VMX status: enabled
624 12:43:14.802788 VMX status: enabled
625 12:43:14.805373 IA32_FEATURE_CONTROL status: locked
626 12:43:14.809008 IA32_FEATURE_CONTROL status: locked
627 12:43:14.812034 Skip microcode update
628 12:43:14.812158 Skip microcode update
629 12:43:14.815858 CPU #6 initialized
630 12:43:14.819163 CPU #7 initialized
631 12:43:14.819291 Setting up local APIC...
632 12:43:14.822073 apic_id: 0x07 done.
633 12:43:14.825548 Setting up local APIC...
634 12:43:14.825635 apic_id: 0x01 done.
635 12:43:14.828982 VMX status: enabled
636 12:43:14.832443 apic_id: 0x06 done.
637 12:43:14.835437 IA32_FEATURE_CONTROL status: locked
638 12:43:14.835548 VMX status: enabled
639 12:43:14.838698 Skip microcode update
640 12:43:14.842269 IA32_FEATURE_CONTROL status: locked
641 12:43:14.845497 CPU #4 initialized
642 12:43:14.845577 Skip microcode update
643 12:43:14.848926 VMX status: enabled
644 12:43:14.852433 CPU #2 initialized
645 12:43:14.855673 IA32_FEATURE_CONTROL status: locked
646 12:43:14.855777 apic_id: 0x05 done.
647 12:43:14.858775 apic_id: 0x04 done.
648 12:43:14.862268 VMX status: enabled
649 12:43:14.862355 VMX status: enabled
650 12:43:14.865846 IA32_FEATURE_CONTROL status: locked
651 12:43:14.868941 IA32_FEATURE_CONTROL status: locked
652 12:43:14.872197 Skip microcode update
653 12:43:14.875204 Skip microcode update
654 12:43:14.875305 CPU #3 initialized
655 12:43:14.878623 CPU #5 initialized
656 12:43:14.878708 Skip microcode update
657 12:43:14.882342 CPU #1 initialized
658 12:43:14.885430 bsp_do_flight_plan done after 466 msecs.
659 12:43:14.889019 CPU: frequency set to 4200 MHz
660 12:43:14.892342 Enabling SMIs.
661 12:43:14.892464 Locking SMM.
662 12:43:14.907200 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 12:43:14.910565 CBFS @ c08000 size 3f8000
664 12:43:14.917398 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 12:43:14.917512 CBFS: Locating 'vbt.bin'
666 12:43:14.920694 CBFS: Found @ offset 5f5c0 size 499
667 12:43:14.927874 Found a VBT of 4608 bytes after decompression
668 12:43:15.110367 Display FSP Version Info HOB
669 12:43:15.113308 Reference Code - CPU = 9.0.1e.30
670 12:43:15.116725 uCode Version = 0.0.0.ca
671 12:43:15.120174 TXT ACM version = ff.ff.ff.ffff
672 12:43:15.123324 Display FSP Version Info HOB
673 12:43:15.126561 Reference Code - ME = 9.0.1e.30
674 12:43:15.129862 MEBx version = 0.0.0.0
675 12:43:15.133404 ME Firmware Version = Consumer SKU
676 12:43:15.136950 Display FSP Version Info HOB
677 12:43:15.140083 Reference Code - CML PCH = 9.0.1e.30
678 12:43:15.143323 PCH-CRID Status = Disabled
679 12:43:15.146608 PCH-CRID Original Value = ff.ff.ff.ffff
680 12:43:15.149713 PCH-CRID New Value = ff.ff.ff.ffff
681 12:43:15.153432 OPROM - RST - RAID = ff.ff.ff.ffff
682 12:43:15.156344 ChipsetInit Base Version = ff.ff.ff.ffff
683 12:43:15.160191 ChipsetInit Oem Version = ff.ff.ff.ffff
684 12:43:15.163008 Display FSP Version Info HOB
685 12:43:15.169819 Reference Code - SA - System Agent = 9.0.1e.30
686 12:43:15.173509 Reference Code - MRC = 0.7.1.6c
687 12:43:15.173595 SA - PCIe Version = 9.0.1e.30
688 12:43:15.176594 SA-CRID Status = Disabled
689 12:43:15.179948 SA-CRID Original Value = 0.0.0.c
690 12:43:15.183385 SA-CRID New Value = 0.0.0.c
691 12:43:15.186247 OPROM - VBIOS = ff.ff.ff.ffff
692 12:43:15.190100 RTC Init
693 12:43:15.193141 Set power on after power failure.
694 12:43:15.193253 Disabling Deep S3
695 12:43:15.196480 Disabling Deep S3
696 12:43:15.196591 Disabling Deep S4
697 12:43:15.199499 Disabling Deep S4
698 12:43:15.199598 Disabling Deep S5
699 12:43:15.202829 Disabling Deep S5
700 12:43:15.209836 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
701 12:43:15.209923 Enumerating buses...
702 12:43:15.216222 Show all devs... Before device enumeration.
703 12:43:15.216319 Root Device: enabled 1
704 12:43:15.219560 CPU_CLUSTER: 0: enabled 1
705 12:43:15.223389 DOMAIN: 0000: enabled 1
706 12:43:15.226256 APIC: 00: enabled 1
707 12:43:15.226340 PCI: 00:00.0: enabled 1
708 12:43:15.229454 PCI: 00:02.0: enabled 1
709 12:43:15.232735 PCI: 00:04.0: enabled 0
710 12:43:15.236171 PCI: 00:05.0: enabled 0
711 12:43:15.236282 PCI: 00:12.0: enabled 1
712 12:43:15.239935 PCI: 00:12.5: enabled 0
713 12:43:15.242943 PCI: 00:12.6: enabled 0
714 12:43:15.243048 PCI: 00:14.0: enabled 1
715 12:43:15.246039 PCI: 00:14.1: enabled 0
716 12:43:15.249275 PCI: 00:14.3: enabled 1
717 12:43:15.252586 PCI: 00:14.5: enabled 0
718 12:43:15.252670 PCI: 00:15.0: enabled 1
719 12:43:15.256188 PCI: 00:15.1: enabled 1
720 12:43:15.259369 PCI: 00:15.2: enabled 0
721 12:43:15.262715 PCI: 00:15.3: enabled 0
722 12:43:15.262799 PCI: 00:16.0: enabled 1
723 12:43:15.265945 PCI: 00:16.1: enabled 0
724 12:43:15.269367 PCI: 00:16.2: enabled 0
725 12:43:15.273027 PCI: 00:16.3: enabled 0
726 12:43:15.273110 PCI: 00:16.4: enabled 0
727 12:43:15.276291 PCI: 00:16.5: enabled 0
728 12:43:15.279371 PCI: 00:17.0: enabled 1
729 12:43:15.279469 PCI: 00:19.0: enabled 1
730 12:43:15.283012 PCI: 00:19.1: enabled 0
731 12:43:15.285816 PCI: 00:19.2: enabled 0
732 12:43:15.289289 PCI: 00:1a.0: enabled 0
733 12:43:15.289415 PCI: 00:1c.0: enabled 0
734 12:43:15.292867 PCI: 00:1c.1: enabled 0
735 12:43:15.295868 PCI: 00:1c.2: enabled 0
736 12:43:15.299275 PCI: 00:1c.3: enabled 0
737 12:43:15.299383 PCI: 00:1c.4: enabled 0
738 12:43:15.302284 PCI: 00:1c.5: enabled 0
739 12:43:15.305897 PCI: 00:1c.6: enabled 0
740 12:43:15.308994 PCI: 00:1c.7: enabled 0
741 12:43:15.309081 PCI: 00:1d.0: enabled 1
742 12:43:15.312216 PCI: 00:1d.1: enabled 0
743 12:43:15.315490 PCI: 00:1d.2: enabled 0
744 12:43:15.315577 PCI: 00:1d.3: enabled 0
745 12:43:15.319565 PCI: 00:1d.4: enabled 0
746 12:43:15.322599 PCI: 00:1d.5: enabled 1
747 12:43:15.325753 PCI: 00:1e.0: enabled 1
748 12:43:15.325845 PCI: 00:1e.1: enabled 0
749 12:43:15.328855 PCI: 00:1e.2: enabled 1
750 12:43:15.332690 PCI: 00:1e.3: enabled 1
751 12:43:15.335798 PCI: 00:1f.0: enabled 1
752 12:43:15.335904 PCI: 00:1f.1: enabled 1
753 12:43:15.339028 PCI: 00:1f.2: enabled 1
754 12:43:15.342705 PCI: 00:1f.3: enabled 1
755 12:43:15.345838 PCI: 00:1f.4: enabled 1
756 12:43:15.345920 PCI: 00:1f.5: enabled 1
757 12:43:15.348948 PCI: 00:1f.6: enabled 0
758 12:43:15.352429 USB0 port 0: enabled 1
759 12:43:15.352510 I2C: 00:15: enabled 1
760 12:43:15.355846 I2C: 00:5d: enabled 1
761 12:43:15.359096 GENERIC: 0.0: enabled 1
762 12:43:15.359210 I2C: 00:1a: enabled 1
763 12:43:15.362353 I2C: 00:38: enabled 1
764 12:43:15.365223 I2C: 00:39: enabled 1
765 12:43:15.368810 I2C: 00:3a: enabled 1
766 12:43:15.368888 I2C: 00:3b: enabled 1
767 12:43:15.371758 PCI: 00:00.0: enabled 1
768 12:43:15.375586 SPI: 00: enabled 1
769 12:43:15.375697 SPI: 01: enabled 1
770 12:43:15.378942 PNP: 0c09.0: enabled 1
771 12:43:15.381981 USB2 port 0: enabled 1
772 12:43:15.382060 USB2 port 1: enabled 1
773 12:43:15.385285 USB2 port 2: enabled 0
774 12:43:15.389097 USB2 port 3: enabled 0
775 12:43:15.389186 USB2 port 5: enabled 0
776 12:43:15.392188 USB2 port 6: enabled 1
777 12:43:15.395603 USB2 port 9: enabled 1
778 12:43:15.395681 USB3 port 0: enabled 1
779 12:43:15.398651 USB3 port 1: enabled 1
780 12:43:15.401826 USB3 port 2: enabled 1
781 12:43:15.405260 USB3 port 3: enabled 1
782 12:43:15.405338 USB3 port 4: enabled 0
783 12:43:15.408155 APIC: 01: enabled 1
784 12:43:15.411935 APIC: 06: enabled 1
785 12:43:15.412046 APIC: 05: enabled 1
786 12:43:15.415198 APIC: 07: enabled 1
787 12:43:15.415276 APIC: 04: enabled 1
788 12:43:15.418383 APIC: 03: enabled 1
789 12:43:15.421801 APIC: 02: enabled 1
790 12:43:15.421903 Compare with tree...
791 12:43:15.424924 Root Device: enabled 1
792 12:43:15.428820 CPU_CLUSTER: 0: enabled 1
793 12:43:15.428896 APIC: 00: enabled 1
794 12:43:15.431578 APIC: 01: enabled 1
795 12:43:15.434781 APIC: 06: enabled 1
796 12:43:15.434886 APIC: 05: enabled 1
797 12:43:15.438080 APIC: 07: enabled 1
798 12:43:15.441945 APIC: 04: enabled 1
799 12:43:15.444995 APIC: 03: enabled 1
800 12:43:15.445098 APIC: 02: enabled 1
801 12:43:15.447981 DOMAIN: 0000: enabled 1
802 12:43:15.451828 PCI: 00:00.0: enabled 1
803 12:43:15.454852 PCI: 00:02.0: enabled 1
804 12:43:15.454939 PCI: 00:04.0: enabled 0
805 12:43:15.458477 PCI: 00:05.0: enabled 0
806 12:43:15.461659 PCI: 00:12.0: enabled 1
807 12:43:15.464841 PCI: 00:12.5: enabled 0
808 12:43:15.468084 PCI: 00:12.6: enabled 0
809 12:43:15.468170 PCI: 00:14.0: enabled 1
810 12:43:15.471274 USB0 port 0: enabled 1
811 12:43:15.474457 USB2 port 0: enabled 1
812 12:43:15.477794 USB2 port 1: enabled 1
813 12:43:15.481517 USB2 port 2: enabled 0
814 12:43:15.481603 USB2 port 3: enabled 0
815 12:43:15.484702 USB2 port 5: enabled 0
816 12:43:15.488083 USB2 port 6: enabled 1
817 12:43:15.490968 USB2 port 9: enabled 1
818 12:43:15.494769 USB3 port 0: enabled 1
819 12:43:15.498060 USB3 port 1: enabled 1
820 12:43:15.498147 USB3 port 2: enabled 1
821 12:43:15.501094 USB3 port 3: enabled 1
822 12:43:15.504224 USB3 port 4: enabled 0
823 12:43:15.507475 PCI: 00:14.1: enabled 0
824 12:43:15.511224 PCI: 00:14.3: enabled 1
825 12:43:15.511329 PCI: 00:14.5: enabled 0
826 12:43:15.514492 PCI: 00:15.0: enabled 1
827 12:43:15.517692 I2C: 00:15: enabled 1
828 12:43:15.520872 PCI: 00:15.1: enabled 1
829 12:43:15.520975 I2C: 00:5d: enabled 1
830 12:43:15.524150 GENERIC: 0.0: enabled 1
831 12:43:15.527229 PCI: 00:15.2: enabled 0
832 12:43:15.531082 PCI: 00:15.3: enabled 0
833 12:43:15.534191 PCI: 00:16.0: enabled 1
834 12:43:15.534277 PCI: 00:16.1: enabled 0
835 12:43:15.537278 PCI: 00:16.2: enabled 0
836 12:43:15.540703 PCI: 00:16.3: enabled 0
837 12:43:15.544400 PCI: 00:16.4: enabled 0
838 12:43:15.547661 PCI: 00:16.5: enabled 0
839 12:43:15.547769 PCI: 00:17.0: enabled 1
840 12:43:15.550916 PCI: 00:19.0: enabled 1
841 12:43:15.554386 I2C: 00:1a: enabled 1
842 12:43:15.557726 I2C: 00:38: enabled 1
843 12:43:15.560649 I2C: 00:39: enabled 1
844 12:43:15.560734 I2C: 00:3a: enabled 1
845 12:43:15.564507 I2C: 00:3b: enabled 1
846 12:43:15.567606 PCI: 00:19.1: enabled 0
847 12:43:15.570477 PCI: 00:19.2: enabled 0
848 12:43:15.570561 PCI: 00:1a.0: enabled 0
849 12:43:15.573900 PCI: 00:1c.0: enabled 0
850 12:43:15.577023 PCI: 00:1c.1: enabled 0
851 12:43:15.580271 PCI: 00:1c.2: enabled 0
852 12:43:15.583963 PCI: 00:1c.3: enabled 0
853 12:43:15.584046 PCI: 00:1c.4: enabled 0
854 12:43:15.587509 PCI: 00:1c.5: enabled 0
855 12:43:15.590512 PCI: 00:1c.6: enabled 0
856 12:43:15.593956 PCI: 00:1c.7: enabled 0
857 12:43:15.597612 PCI: 00:1d.0: enabled 1
858 12:43:15.597696 PCI: 00:1d.1: enabled 0
859 12:43:15.600544 PCI: 00:1d.2: enabled 0
860 12:43:15.603861 PCI: 00:1d.3: enabled 0
861 12:43:15.606953 PCI: 00:1d.4: enabled 0
862 12:43:15.610924 PCI: 00:1d.5: enabled 1
863 12:43:15.611007 PCI: 00:00.0: enabled 1
864 12:43:15.613981 PCI: 00:1e.0: enabled 1
865 12:43:15.616995 PCI: 00:1e.1: enabled 0
866 12:43:15.620277 PCI: 00:1e.2: enabled 1
867 12:43:15.620370 SPI: 00: enabled 1
868 12:43:15.623528 PCI: 00:1e.3: enabled 1
869 12:43:15.627437 SPI: 01: enabled 1
870 12:43:15.630286 PCI: 00:1f.0: enabled 1
871 12:43:15.630368 PNP: 0c09.0: enabled 1
872 12:43:15.633397 PCI: 00:1f.1: enabled 1
873 12:43:15.636947 PCI: 00:1f.2: enabled 1
874 12:43:15.640092 PCI: 00:1f.3: enabled 1
875 12:43:15.643985 PCI: 00:1f.4: enabled 1
876 12:43:15.644089 PCI: 00:1f.5: enabled 1
877 12:43:15.646999 PCI: 00:1f.6: enabled 0
878 12:43:15.650096 Root Device scanning...
879 12:43:15.653134 scan_static_bus for Root Device
880 12:43:15.656853 CPU_CLUSTER: 0 enabled
881 12:43:15.656935 DOMAIN: 0000 enabled
882 12:43:15.659993 DOMAIN: 0000 scanning...
883 12:43:15.663151 PCI: pci_scan_bus for bus 00
884 12:43:15.666985 PCI: 00:00.0 [8086/0000] ops
885 12:43:15.669864 PCI: 00:00.0 [8086/9b61] enabled
886 12:43:15.673709 PCI: 00:02.0 [8086/0000] bus ops
887 12:43:15.676700 PCI: 00:02.0 [8086/9b41] enabled
888 12:43:15.680103 PCI: 00:04.0 [8086/1903] disabled
889 12:43:15.683556 PCI: 00:08.0 [8086/1911] enabled
890 12:43:15.686915 PCI: 00:12.0 [8086/02f9] enabled
891 12:43:15.690110 PCI: 00:14.0 [8086/0000] bus ops
892 12:43:15.693564 PCI: 00:14.0 [8086/02ed] enabled
893 12:43:15.697028 PCI: 00:14.2 [8086/02ef] enabled
894 12:43:15.699701 PCI: 00:14.3 [8086/02f0] enabled
895 12:43:15.703048 PCI: 00:15.0 [8086/0000] bus ops
896 12:43:15.706758 PCI: 00:15.0 [8086/02e8] enabled
897 12:43:15.709865 PCI: 00:15.1 [8086/0000] bus ops
898 12:43:15.713517 PCI: 00:15.1 [8086/02e9] enabled
899 12:43:15.716653 PCI: 00:16.0 [8086/0000] ops
900 12:43:15.719866 PCI: 00:16.0 [8086/02e0] enabled
901 12:43:15.723029 PCI: 00:17.0 [8086/0000] ops
902 12:43:15.726307 PCI: 00:17.0 [8086/02d3] enabled
903 12:43:15.729595 PCI: 00:19.0 [8086/0000] bus ops
904 12:43:15.733340 PCI: 00:19.0 [8086/02c5] enabled
905 12:43:15.736477 PCI: 00:1d.0 [8086/0000] bus ops
906 12:43:15.740261 PCI: 00:1d.0 [8086/02b0] enabled
907 12:43:15.746144 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 12:43:15.746236 PCI: 00:1e.0 [8086/0000] ops
909 12:43:15.749477 PCI: 00:1e.0 [8086/02a8] enabled
910 12:43:15.752956 PCI: 00:1e.2 [8086/0000] bus ops
911 12:43:15.756122 PCI: 00:1e.2 [8086/02aa] enabled
912 12:43:15.759853 PCI: 00:1e.3 [8086/0000] bus ops
913 12:43:15.763347 PCI: 00:1e.3 [8086/02ab] enabled
914 12:43:15.766517 PCI: 00:1f.0 [8086/0000] bus ops
915 12:43:15.769680 PCI: 00:1f.0 [8086/0284] enabled
916 12:43:15.776018 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 12:43:15.782868 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 12:43:15.785920 PCI: 00:1f.3 [8086/0000] bus ops
919 12:43:15.789198 PCI: 00:1f.3 [8086/02c8] enabled
920 12:43:15.793198 PCI: 00:1f.4 [8086/0000] bus ops
921 12:43:15.796251 PCI: 00:1f.4 [8086/02a3] enabled
922 12:43:15.799447 PCI: 00:1f.5 [8086/0000] bus ops
923 12:43:15.803067 PCI: 00:1f.5 [8086/02a4] enabled
924 12:43:15.805987 PCI: Leftover static devices:
925 12:43:15.806073 PCI: 00:05.0
926 12:43:15.809301 PCI: 00:12.5
927 12:43:15.809388 PCI: 00:12.6
928 12:43:15.809455 PCI: 00:14.1
929 12:43:15.812964 PCI: 00:14.5
930 12:43:15.813049 PCI: 00:15.2
931 12:43:15.816054 PCI: 00:15.3
932 12:43:15.816140 PCI: 00:16.1
933 12:43:15.819173 PCI: 00:16.2
934 12:43:15.819260 PCI: 00:16.3
935 12:43:15.819328 PCI: 00:16.4
936 12:43:15.822342 PCI: 00:16.5
937 12:43:15.822427 PCI: 00:19.1
938 12:43:15.825939 PCI: 00:19.2
939 12:43:15.826024 PCI: 00:1a.0
940 12:43:15.826091 PCI: 00:1c.0
941 12:43:15.828981 PCI: 00:1c.1
942 12:43:15.829066 PCI: 00:1c.2
943 12:43:15.832871 PCI: 00:1c.3
944 12:43:15.832956 PCI: 00:1c.4
945 12:43:15.833023 PCI: 00:1c.5
946 12:43:15.836356 PCI: 00:1c.6
947 12:43:15.836441 PCI: 00:1c.7
948 12:43:15.838985 PCI: 00:1d.1
949 12:43:15.839070 PCI: 00:1d.2
950 12:43:15.842615 PCI: 00:1d.3
951 12:43:15.842700 PCI: 00:1d.4
952 12:43:15.842768 PCI: 00:1d.5
953 12:43:15.845816 PCI: 00:1e.1
954 12:43:15.845906 PCI: 00:1f.1
955 12:43:15.849110 PCI: 00:1f.2
956 12:43:15.849195 PCI: 00:1f.6
957 12:43:15.852196 PCI: Check your devicetree.cb.
958 12:43:15.855952 PCI: 00:02.0 scanning...
959 12:43:15.859312 scan_generic_bus for PCI: 00:02.0
960 12:43:15.862159 scan_generic_bus for PCI: 00:02.0 done
961 12:43:15.868847 scan_bus: scanning of bus PCI: 00:02.0 took 10188 usecs
962 12:43:15.868934 PCI: 00:14.0 scanning...
963 12:43:15.872118 scan_static_bus for PCI: 00:14.0
964 12:43:15.875946 USB0 port 0 enabled
965 12:43:15.879188 USB0 port 0 scanning...
966 12:43:15.882602 scan_static_bus for USB0 port 0
967 12:43:15.885381 USB2 port 0 enabled
968 12:43:15.885466 USB2 port 1 enabled
969 12:43:15.889016 USB2 port 2 disabled
970 12:43:15.889110 USB2 port 3 disabled
971 12:43:15.892042 USB2 port 5 disabled
972 12:43:15.895320 USB2 port 6 enabled
973 12:43:15.895405 USB2 port 9 enabled
974 12:43:15.899235 USB3 port 0 enabled
975 12:43:15.901993 USB3 port 1 enabled
976 12:43:15.902079 USB3 port 2 enabled
977 12:43:15.905648 USB3 port 3 enabled
978 12:43:15.905733 USB3 port 4 disabled
979 12:43:15.908731 USB2 port 0 scanning...
980 12:43:15.912484 scan_static_bus for USB2 port 0
981 12:43:15.915874 scan_static_bus for USB2 port 0 done
982 12:43:15.922351 scan_bus: scanning of bus USB2 port 0 took 9710 usecs
983 12:43:15.925351 USB2 port 1 scanning...
984 12:43:15.929009 scan_static_bus for USB2 port 1
985 12:43:15.932021 scan_static_bus for USB2 port 1 done
986 12:43:15.935458 scan_bus: scanning of bus USB2 port 1 took 9689 usecs
987 12:43:15.938854 USB2 port 6 scanning...
988 12:43:15.941922 scan_static_bus for USB2 port 6
989 12:43:15.945234 scan_static_bus for USB2 port 6 done
990 12:43:15.952219 scan_bus: scanning of bus USB2 port 6 took 9697 usecs
991 12:43:15.955378 USB2 port 9 scanning...
992 12:43:15.958627 scan_static_bus for USB2 port 9
993 12:43:15.961888 scan_static_bus for USB2 port 9 done
994 12:43:15.968246 scan_bus: scanning of bus USB2 port 9 took 9696 usecs
995 12:43:15.968352 USB3 port 0 scanning...
996 12:43:15.971753 scan_static_bus for USB3 port 0
997 12:43:15.974828 scan_static_bus for USB3 port 0 done
998 12:43:15.981406 scan_bus: scanning of bus USB3 port 0 took 9705 usecs
999 12:43:15.985176 USB3 port 1 scanning...
1000 12:43:15.988388 scan_static_bus for USB3 port 1
1001 12:43:15.991303 scan_static_bus for USB3 port 1 done
1002 12:43:15.998114 scan_bus: scanning of bus USB3 port 1 took 9697 usecs
1003 12:43:15.998201 USB3 port 2 scanning...
1004 12:43:16.001292 scan_static_bus for USB3 port 2
1005 12:43:16.007948 scan_static_bus for USB3 port 2 done
1006 12:43:16.011774 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
1007 12:43:16.014876 USB3 port 3 scanning...
1008 12:43:16.017972 scan_static_bus for USB3 port 3
1009 12:43:16.021611 scan_static_bus for USB3 port 3 done
1010 12:43:16.028068 scan_bus: scanning of bus USB3 port 3 took 9696 usecs
1011 12:43:16.031478 scan_static_bus for USB0 port 0 done
1012 12:43:16.034697 scan_bus: scanning of bus USB0 port 0 took 155350 usecs
1013 12:43:16.041020 scan_static_bus for PCI: 00:14.0 done
1014 12:43:16.044460 scan_bus: scanning of bus PCI: 00:14.0 took 172979 usecs
1015 12:43:16.047643 PCI: 00:15.0 scanning...
1016 12:43:16.050984 scan_generic_bus for PCI: 00:15.0
1017 12:43:16.054541 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 12:43:16.061181 scan_generic_bus for PCI: 00:15.0 done
1019 12:43:16.064366 scan_bus: scanning of bus PCI: 00:15.0 took 14307 usecs
1020 12:43:16.067688 PCI: 00:15.1 scanning...
1021 12:43:16.070922 scan_generic_bus for PCI: 00:15.1
1022 12:43:16.074261 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 12:43:16.080975 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 12:43:16.084194 scan_generic_bus for PCI: 00:15.1 done
1025 12:43:16.090957 scan_bus: scanning of bus PCI: 00:15.1 took 18611 usecs
1026 12:43:16.091044 PCI: 00:19.0 scanning...
1027 12:43:16.093697 scan_generic_bus for PCI: 00:19.0
1028 12:43:16.100784 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 12:43:16.103496 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 12:43:16.107352 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 12:43:16.113466 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 12:43:16.116729 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 12:43:16.120653 scan_generic_bus for PCI: 00:19.0 done
1034 12:43:16.126930 scan_bus: scanning of bus PCI: 00:19.0 took 30743 usecs
1035 12:43:16.127015 PCI: 00:1d.0 scanning...
1036 12:43:16.133425 do_pci_scan_bridge for PCI: 00:1d.0
1037 12:43:16.133511 PCI: pci_scan_bus for bus 01
1038 12:43:16.136873 PCI: 01:00.0 [1c5c/1327] enabled
1039 12:43:16.143185 Enabling Common Clock Configuration
1040 12:43:16.146969 L1 Sub-State supported from root port 29
1041 12:43:16.150234 L1 Sub-State Support = 0xf
1042 12:43:16.153237 CommonModeRestoreTime = 0x28
1043 12:43:16.156913 Power On Value = 0x16, Power On Scale = 0x0
1044 12:43:16.156992 ASPM: Enabled L1
1045 12:43:16.163621 scan_bus: scanning of bus PCI: 00:1d.0 took 32783 usecs
1046 12:43:16.166714 PCI: 00:1e.2 scanning...
1047 12:43:16.169866 scan_generic_bus for PCI: 00:1e.2
1048 12:43:16.173667 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 12:43:16.176853 scan_generic_bus for PCI: 00:1e.2 done
1050 12:43:16.183080 scan_bus: scanning of bus PCI: 00:1e.2 took 13994 usecs
1051 12:43:16.187062 PCI: 00:1e.3 scanning...
1052 12:43:16.190112 scan_generic_bus for PCI: 00:1e.3
1053 12:43:16.193238 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 12:43:16.196578 scan_generic_bus for PCI: 00:1e.3 done
1055 12:43:16.202840 scan_bus: scanning of bus PCI: 00:1e.3 took 14007 usecs
1056 12:43:16.206129 PCI: 00:1f.0 scanning...
1057 12:43:16.209631 scan_static_bus for PCI: 00:1f.0
1058 12:43:16.209710 PNP: 0c09.0 enabled
1059 12:43:16.213200 scan_static_bus for PCI: 00:1f.0 done
1060 12:43:16.219539 scan_bus: scanning of bus PCI: 00:1f.0 took 12056 usecs
1061 12:43:16.223065 PCI: 00:1f.3 scanning...
1062 12:43:16.229566 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1063 12:43:16.229653 PCI: 00:1f.4 scanning...
1064 12:43:16.236046 scan_generic_bus for PCI: 00:1f.4
1065 12:43:16.239294 scan_generic_bus for PCI: 00:1f.4 done
1066 12:43:16.243023 scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
1067 12:43:16.246036 PCI: 00:1f.5 scanning...
1068 12:43:16.249703 scan_generic_bus for PCI: 00:1f.5
1069 12:43:16.252986 scan_generic_bus for PCI: 00:1f.5 done
1070 12:43:16.260012 scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs
1071 12:43:16.266148 scan_bus: scanning of bus DOMAIN: 0000 took 605084 usecs
1072 12:43:16.269778 scan_static_bus for Root Device done
1073 12:43:16.276434 scan_bus: scanning of bus Root Device took 624962 usecs
1074 12:43:16.276520 done
1075 12:43:16.279551 Chrome EC: UHEPI supported
1076 12:43:16.285720 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 12:43:16.289552 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 12:43:16.295906 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 12:43:16.302996 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 12:43:16.306271 SPI flash protection: WPSW=0 SRP0=0
1081 12:43:16.312904 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 12:43:16.316125 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1083 12:43:16.319416 found VGA at PCI: 00:02.0
1084 12:43:16.322763 Setting up VGA for PCI: 00:02.0
1085 12:43:16.330007 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 12:43:16.333069 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 12:43:16.336029 Allocating resources...
1088 12:43:16.339198 Reading resources...
1089 12:43:16.342551 Root Device read_resources bus 0 link: 0
1090 12:43:16.345822 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 12:43:16.352689 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 12:43:16.356171 DOMAIN: 0000 read_resources bus 0 link: 0
1093 12:43:16.363185 PCI: 00:14.0 read_resources bus 0 link: 0
1094 12:43:16.366792 USB0 port 0 read_resources bus 0 link: 0
1095 12:43:16.374932 USB0 port 0 read_resources bus 0 link: 0 done
1096 12:43:16.377979 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 12:43:16.385272 PCI: 00:15.0 read_resources bus 1 link: 0
1098 12:43:16.388461 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 12:43:16.395272 PCI: 00:15.1 read_resources bus 2 link: 0
1100 12:43:16.398995 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 12:43:16.406107 PCI: 00:19.0 read_resources bus 3 link: 0
1102 12:43:16.412890 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 12:43:16.416392 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 12:43:16.422532 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 12:43:16.426038 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 12:43:16.432826 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 12:43:16.436257 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 12:43:16.442421 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 12:43:16.445962 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 12:43:16.452706 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 12:43:16.459022 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 12:43:16.462765 Root Device read_resources bus 0 link: 0 done
1113 12:43:16.466023 Done reading resources.
1114 12:43:16.468951 Show resources in subtree (Root Device)...After reading.
1115 12:43:16.475829 Root Device child on link 0 CPU_CLUSTER: 0
1116 12:43:16.479264 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 12:43:16.479352 APIC: 00
1118 12:43:16.482930 APIC: 01
1119 12:43:16.483017 APIC: 06
1120 12:43:16.485805 APIC: 05
1121 12:43:16.485892 APIC: 07
1122 12:43:16.485980 APIC: 04
1123 12:43:16.488901 APIC: 03
1124 12:43:16.488988 APIC: 02
1125 12:43:16.492308 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 12:43:16.502573 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 12:43:16.552212 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 12:43:16.552317 PCI: 00:00.0
1129 12:43:16.552402 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 12:43:16.552469 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 12:43:16.552723 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 12:43:16.552975 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 12:43:16.593968 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 12:43:16.594305 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 12:43:16.594628 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 12:43:16.594748 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 12:43:16.601255 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 12:43:16.608036 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 12:43:16.617714 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 12:43:16.627529 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 12:43:16.634531 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 12:43:16.644178 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 12:43:16.654530 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 12:43:16.664401 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 12:43:16.664525 PCI: 00:02.0
1146 12:43:16.677324 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 12:43:16.687294 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 12:43:16.693819 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 12:43:16.697784 PCI: 00:04.0
1150 12:43:16.697878 PCI: 00:08.0
1151 12:43:16.707338 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 12:43:16.710609 PCI: 00:12.0
1153 12:43:16.720936 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 12:43:16.724189 PCI: 00:14.0 child on link 0 USB0 port 0
1155 12:43:16.733687 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 12:43:16.736842 USB0 port 0 child on link 0 USB2 port 0
1157 12:43:16.740304 USB2 port 0
1158 12:43:16.740391 USB2 port 1
1159 12:43:16.743480 USB2 port 2
1160 12:43:16.747177 USB2 port 3
1161 12:43:16.747263 USB2 port 5
1162 12:43:16.750318 USB2 port 6
1163 12:43:16.750405 USB2 port 9
1164 12:43:16.753732 USB3 port 0
1165 12:43:16.753839 USB3 port 1
1166 12:43:16.757052 USB3 port 2
1167 12:43:16.757136 USB3 port 3
1168 12:43:16.760124 USB3 port 4
1169 12:43:16.760232 PCI: 00:14.2
1170 12:43:16.769872 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 12:43:16.780153 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 12:43:16.783674 PCI: 00:14.3
1173 12:43:16.793153 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 12:43:16.796223 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 12:43:16.806379 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 12:43:16.809564 I2C: 01:15
1177 12:43:16.813201 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 12:43:16.822654 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 12:43:16.822777 I2C: 02:5d
1180 12:43:16.825931 GENERIC: 0.0
1181 12:43:16.826059 PCI: 00:16.0
1182 12:43:16.836222 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 12:43:16.839648 PCI: 00:17.0
1184 12:43:16.849080 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 12:43:16.855705 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 12:43:16.865983 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 12:43:16.872146 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 12:43:16.882229 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 12:43:16.892559 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 12:43:16.895825 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 12:43:16.905589 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:43:16.905674 I2C: 03:1a
1193 12:43:16.908849 I2C: 03:38
1194 12:43:16.908932 I2C: 03:39
1195 12:43:16.911967 I2C: 03:3a
1196 12:43:16.912050 I2C: 03:3b
1197 12:43:16.918695 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 12:43:16.925400 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 12:43:16.935009 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 12:43:16.945130 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 12:43:16.948600 PCI: 01:00.0
1202 12:43:16.958171 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 12:43:16.958258 PCI: 00:1e.0
1204 12:43:16.968378 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 12:43:16.978134 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 12:43:16.984763 PCI: 00:1e.2 child on link 0 SPI: 00
1207 12:43:16.994850 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 12:43:16.994935 SPI: 00
1209 12:43:16.998158 PCI: 00:1e.3 child on link 0 SPI: 01
1210 12:43:17.007745 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 12:43:17.011296 SPI: 01
1212 12:43:17.014370 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 12:43:17.024293 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 12:43:17.030689 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 12:43:17.034325 PNP: 0c09.0
1216 12:43:17.041057 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 12:43:17.044124 PCI: 00:1f.3
1218 12:43:17.054023 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 12:43:17.063983 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 12:43:17.064069 PCI: 00:1f.4
1221 12:43:17.073688 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 12:43:17.083705 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 12:43:17.087002 PCI: 00:1f.5
1224 12:43:17.093650 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 12:43:17.100392 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 12:43:17.106767 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 12:43:17.113932 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 12:43:17.116894 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 12:43:17.120009 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 12:43:17.126770 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 12:43:17.129971 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 12:43:17.136695 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 12:43:17.143464 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 12:43:17.149777 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 12:43:17.160204 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 12:43:17.166502 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 12:43:17.169861 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 12:43:17.176546 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 12:43:17.182823 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 12:43:17.186438 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 12:43:17.193416 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 12:43:17.196219 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 12:43:17.203063 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 12:43:17.206426 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 12:43:17.209509 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 12:43:17.215995 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 12:43:17.220026 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 12:43:17.226208 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 12:43:17.229797 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 12:43:17.236152 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 12:43:17.239293 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 12:43:17.245893 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 12:43:17.249658 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 12:43:17.255691 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 12:43:17.259038 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 12:43:17.266016 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 12:43:17.268778 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 12:43:17.275901 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 12:43:17.279111 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 12:43:17.285353 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 12:43:17.288603 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 12:43:17.299021 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 12:43:17.301944 avoid_fixed_resources: DOMAIN: 0000
1264 12:43:17.305367 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 12:43:17.312079 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 12:43:17.321836 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 12:43:17.328489 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 12:43:17.334873 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 12:43:17.345074 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 12:43:17.351465 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 12:43:17.357836 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 12:43:17.368032 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 12:43:17.374558 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 12:43:17.381067 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 12:43:17.387912 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 12:43:17.390986 Setting resources...
1277 12:43:17.397514 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 12:43:17.400776 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 12:43:17.404012 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 12:43:17.408091 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 12:43:17.414353 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 12:43:17.420623 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 12:43:17.424184 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 12:43:17.431093 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 12:43:17.441028 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 12:43:17.444146 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 12:43:17.450658 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 12:43:17.453758 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 12:43:17.460656 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 12:43:17.463854 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 12:43:17.470579 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 12:43:17.473987 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 12:43:17.477075 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 12:43:17.483806 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 12:43:17.487032 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 12:43:17.494085 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 12:43:17.497232 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 12:43:17.503739 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 12:43:17.507195 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 12:43:17.513475 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 12:43:17.517491 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 12:43:17.523582 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 12:43:17.526886 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 12:43:17.533849 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 12:43:17.536984 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 12:43:17.540119 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 12:43:17.546698 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 12:43:17.550183 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 12:43:17.559750 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 12:43:17.566253 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 12:43:17.573183 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 12:43:17.579661 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 12:43:17.586328 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 12:43:17.593105 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 12:43:17.596097 Root Device assign_resources, bus 0 link: 0
1316 12:43:17.603243 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 12:43:17.609679 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 12:43:17.620209 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 12:43:17.626438 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 12:43:17.636207 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 12:43:17.643253 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 12:43:17.652621 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 12:43:17.656180 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 12:43:17.662582 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 12:43:17.669481 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 12:43:17.676004 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 12:43:17.686409 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 12:43:17.692603 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 12:43:17.699418 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 12:43:17.702593 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 12:43:17.712564 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 12:43:17.716444 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 12:43:17.719376 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 12:43:17.729569 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 12:43:17.736333 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 12:43:17.746258 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 12:43:17.752747 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 12:43:17.759465 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 12:43:17.769133 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 12:43:17.775576 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 12:43:17.785580 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 12:43:17.788739 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 12:43:17.792716 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 12:43:17.802703 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 12:43:17.812468 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 12:43:17.818880 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 12:43:17.825290 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 12:43:17.832387 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 12:43:17.835472 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 12:43:17.845216 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 12:43:17.852182 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 12:43:17.858822 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 12:43:17.862183 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 12:43:17.871752 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 12:43:17.875137 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 12:43:17.878851 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 12:43:17.885357 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 12:43:17.888966 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 12:43:17.895732 LPC: Trying to open IO window from 800 size 1ff
1360 12:43:17.902145 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 12:43:17.911916 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 12:43:17.918642 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 12:43:17.928920 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 12:43:17.932085 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 12:43:17.938394 Root Device assign_resources, bus 0 link: 0
1366 12:43:17.938520 Done setting resources.
1367 12:43:17.945276 Show resources in subtree (Root Device)...After assigning values.
1368 12:43:17.951951 Root Device child on link 0 CPU_CLUSTER: 0
1369 12:43:17.955397 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 12:43:17.955487 APIC: 00
1371 12:43:17.958521 APIC: 01
1372 12:43:17.958607 APIC: 06
1373 12:43:17.958672 APIC: 05
1374 12:43:17.961598 APIC: 07
1375 12:43:17.961683 APIC: 04
1376 12:43:17.964809 APIC: 03
1377 12:43:17.964894 APIC: 02
1378 12:43:17.968770 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 12:43:17.978574 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 12:43:17.988532 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 12:43:17.991773 PCI: 00:00.0
1382 12:43:18.001561 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 12:43:18.011084 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 12:43:18.021482 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 12:43:18.027538 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 12:43:18.037642 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 12:43:18.047799 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 12:43:18.057776 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 12:43:18.067512 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 12:43:18.077485 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 12:43:18.084052 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 12:43:18.093710 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 12:43:18.104005 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 12:43:18.113518 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 12:43:18.123725 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 12:43:18.133472 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 12:43:18.140053 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 12:43:18.143225 PCI: 00:02.0
1399 12:43:18.153367 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 12:43:18.163481 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 12:43:18.173165 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 12:43:18.176836 PCI: 00:04.0
1403 12:43:18.176921 PCI: 00:08.0
1404 12:43:18.186663 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 12:43:18.189613 PCI: 00:12.0
1406 12:43:18.199859 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 12:43:18.202589 PCI: 00:14.0 child on link 0 USB0 port 0
1408 12:43:18.213055 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 12:43:18.219424 USB0 port 0 child on link 0 USB2 port 0
1410 12:43:18.219549 USB2 port 0
1411 12:43:18.222509 USB2 port 1
1412 12:43:18.222646 USB2 port 2
1413 12:43:18.226311 USB2 port 3
1414 12:43:18.226432 USB2 port 5
1415 12:43:18.229345 USB2 port 6
1416 12:43:18.229468 USB2 port 9
1417 12:43:18.232642 USB3 port 0
1418 12:43:18.232765 USB3 port 1
1419 12:43:18.235843 USB3 port 2
1420 12:43:18.235965 USB3 port 3
1421 12:43:18.239044 USB3 port 4
1422 12:43:18.242209 PCI: 00:14.2
1423 12:43:18.252564 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 12:43:18.262528 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 12:43:18.262641 PCI: 00:14.3
1426 12:43:18.272134 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 12:43:18.279101 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 12:43:18.288734 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 12:43:18.288837 I2C: 01:15
1430 12:43:18.295593 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 12:43:18.305468 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 12:43:18.305605 I2C: 02:5d
1433 12:43:18.308662 GENERIC: 0.0
1434 12:43:18.308784 PCI: 00:16.0
1435 12:43:18.318183 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 12:43:18.321833 PCI: 00:17.0
1437 12:43:18.331856 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 12:43:18.341861 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 12:43:18.351246 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 12:43:18.361287 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 12:43:18.367869 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 12:43:18.377699 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 12:43:18.384605 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 12:43:18.394208 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 12:43:18.394301 I2C: 03:1a
1446 12:43:18.397549 I2C: 03:38
1447 12:43:18.397635 I2C: 03:39
1448 12:43:18.400773 I2C: 03:3a
1449 12:43:18.400858 I2C: 03:3b
1450 12:43:18.407575 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 12:43:18.414261 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 12:43:18.423871 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 12:43:18.436914 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 12:43:18.437030 PCI: 01:00.0
1455 12:43:18.446944 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 12:43:18.450429 PCI: 00:1e.0
1457 12:43:18.460147 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 12:43:18.470498 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 12:43:18.473698 PCI: 00:1e.2 child on link 0 SPI: 00
1460 12:43:18.486748 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 12:43:18.486838 SPI: 00
1462 12:43:18.490045 PCI: 00:1e.3 child on link 0 SPI: 01
1463 12:43:18.500192 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 12:43:18.503359 SPI: 01
1465 12:43:18.506380 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 12:43:18.516604 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 12:43:18.522985 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 12:43:18.526577 PNP: 0c09.0
1469 12:43:18.532661 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 12:43:18.536283 PCI: 00:1f.3
1471 12:43:18.546055 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 12:43:18.555918 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 12:43:18.559526 PCI: 00:1f.4
1474 12:43:18.565918 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 12:43:18.579304 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 12:43:18.579418 PCI: 00:1f.5
1477 12:43:18.589146 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 12:43:18.592053 Done allocating resources.
1479 12:43:18.598973 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 12:43:18.599117 Enabling resources...
1481 12:43:18.606673 PCI: 00:00.0 subsystem <- 8086/9b61
1482 12:43:18.606767 PCI: 00:00.0 cmd <- 06
1483 12:43:18.609550 PCI: 00:02.0 subsystem <- 8086/9b41
1484 12:43:18.612748 PCI: 00:02.0 cmd <- 03
1485 12:43:18.616615 PCI: 00:08.0 cmd <- 06
1486 12:43:18.620034 PCI: 00:12.0 subsystem <- 8086/02f9
1487 12:43:18.623365 PCI: 00:12.0 cmd <- 02
1488 12:43:18.626364 PCI: 00:14.0 subsystem <- 8086/02ed
1489 12:43:18.629693 PCI: 00:14.0 cmd <- 02
1490 12:43:18.632698 PCI: 00:14.2 cmd <- 02
1491 12:43:18.636337 PCI: 00:14.3 subsystem <- 8086/02f0
1492 12:43:18.636445 PCI: 00:14.3 cmd <- 02
1493 12:43:18.643125 PCI: 00:15.0 subsystem <- 8086/02e8
1494 12:43:18.643216 PCI: 00:15.0 cmd <- 02
1495 12:43:18.646205 PCI: 00:15.1 subsystem <- 8086/02e9
1496 12:43:18.649485 PCI: 00:15.1 cmd <- 02
1497 12:43:18.652907 PCI: 00:16.0 subsystem <- 8086/02e0
1498 12:43:18.656051 PCI: 00:16.0 cmd <- 02
1499 12:43:18.659859 PCI: 00:17.0 subsystem <- 8086/02d3
1500 12:43:18.662954 PCI: 00:17.0 cmd <- 03
1501 12:43:18.666212 PCI: 00:19.0 subsystem <- 8086/02c5
1502 12:43:18.669699 PCI: 00:19.0 cmd <- 02
1503 12:43:18.672650 PCI: 00:1d.0 bridge ctrl <- 0013
1504 12:43:18.676230 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 12:43:18.679283 PCI: 00:1d.0 cmd <- 06
1506 12:43:18.682962 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 12:43:18.686038 PCI: 00:1e.0 cmd <- 06
1508 12:43:18.689408 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 12:43:18.692523 PCI: 00:1e.2 cmd <- 06
1510 12:43:18.695883 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 12:43:18.695985 PCI: 00:1e.3 cmd <- 02
1512 12:43:18.702649 PCI: 00:1f.0 subsystem <- 8086/0284
1513 12:43:18.702753 PCI: 00:1f.0 cmd <- 407
1514 12:43:18.705834 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 12:43:18.709809 PCI: 00:1f.3 cmd <- 02
1516 12:43:18.712677 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 12:43:18.716221 PCI: 00:1f.4 cmd <- 03
1518 12:43:18.719521 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 12:43:18.722567 PCI: 00:1f.5 cmd <- 406
1520 12:43:18.731708 PCI: 01:00.0 cmd <- 02
1521 12:43:18.736525 done.
1522 12:43:18.749788 ME: Version: 14.0.39.1367
1523 12:43:18.755997 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 12
1524 12:43:18.759133 Initializing devices...
1525 12:43:18.759220 Root Device init ...
1526 12:43:18.765776 Chrome EC: Set SMI mask to 0x0000000000000000
1527 12:43:18.769457 Chrome EC: clear events_b mask to 0x0000000000000000
1528 12:43:18.776206 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 12:43:18.782697 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 12:43:18.789187 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 12:43:18.792907 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 12:43:18.795649 Root Device init finished in 35164 usecs
1533 12:43:18.799104 CPU_CLUSTER: 0 init ...
1534 12:43:18.806047 CPU_CLUSTER: 0 init finished in 2448 usecs
1535 12:43:18.810417 PCI: 00:00.0 init ...
1536 12:43:18.813154 CPU TDP: 15 Watts
1537 12:43:18.816610 CPU PL2 = 64 Watts
1538 12:43:18.820212 PCI: 00:00.0 init finished in 7078 usecs
1539 12:43:18.823765 PCI: 00:02.0 init ...
1540 12:43:18.826910 PCI: 00:02.0 init finished in 2252 usecs
1541 12:43:18.830044 PCI: 00:08.0 init ...
1542 12:43:18.833483 PCI: 00:08.0 init finished in 2253 usecs
1543 12:43:18.836472 PCI: 00:12.0 init ...
1544 12:43:18.839651 PCI: 00:12.0 init finished in 2252 usecs
1545 12:43:18.843318 PCI: 00:14.0 init ...
1546 12:43:18.846458 PCI: 00:14.0 init finished in 2250 usecs
1547 12:43:18.850266 PCI: 00:14.2 init ...
1548 12:43:18.853264 PCI: 00:14.2 init finished in 2253 usecs
1549 12:43:18.856518 PCI: 00:14.3 init ...
1550 12:43:18.859751 PCI: 00:14.3 init finished in 2262 usecs
1551 12:43:18.862914 PCI: 00:15.0 init ...
1552 12:43:18.866621 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 12:43:18.870000 PCI: 00:15.0 init finished in 5970 usecs
1554 12:43:18.872977 PCI: 00:15.1 init ...
1555 12:43:18.876424 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 12:43:18.880036 PCI: 00:15.1 init finished in 5976 usecs
1557 12:43:18.883706 PCI: 00:16.0 init ...
1558 12:43:18.886914 PCI: 00:16.0 init finished in 2250 usecs
1559 12:43:18.890653 PCI: 00:19.0 init ...
1560 12:43:18.894043 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 12:43:18.900907 PCI: 00:19.0 init finished in 5975 usecs
1562 12:43:18.901091 PCI: 00:1d.0 init ...
1563 12:43:18.903884 Initializing PCH PCIe bridge.
1564 12:43:18.906979 PCI: 00:1d.0 init finished in 5284 usecs
1565 12:43:18.912000 PCI: 00:1f.0 init ...
1566 12:43:18.915258 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 12:43:18.921948 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 12:43:18.922132 IOAPIC: ID = 0x02
1569 12:43:18.924951 IOAPIC: Dumping registers
1570 12:43:18.928546 reg 0x0000: 0x02000000
1571 12:43:18.931676 reg 0x0001: 0x00770020
1572 12:43:18.931795 reg 0x0002: 0x00000000
1573 12:43:18.938725 PCI: 00:1f.0 init finished in 23547 usecs
1574 12:43:18.942372 PCI: 00:1f.4 init ...
1575 12:43:18.945322 PCI: 00:1f.4 init finished in 2262 usecs
1576 12:43:18.955902 PCI: 01:00.0 init ...
1577 12:43:18.959909 PCI: 01:00.0 init finished in 2251 usecs
1578 12:43:18.963596 PNP: 0c09.0 init ...
1579 12:43:18.966919 Google Chrome EC uptime: 11.093 seconds
1580 12:43:18.973838 Google Chrome AP resets since EC boot: 0
1581 12:43:18.977041 Google Chrome most recent AP reset causes:
1582 12:43:18.983788 Google Chrome EC reset flags at last EC boot: reset-pin
1583 12:43:18.987120 PNP: 0c09.0 init finished in 20563 usecs
1584 12:43:18.990497 Devices initialized
1585 12:43:18.990629 Show all devs... After init.
1586 12:43:18.993545 Root Device: enabled 1
1587 12:43:18.996701 CPU_CLUSTER: 0: enabled 1
1588 12:43:18.999893 DOMAIN: 0000: enabled 1
1589 12:43:19.000022 APIC: 00: enabled 1
1590 12:43:19.003831 PCI: 00:00.0: enabled 1
1591 12:43:19.006850 PCI: 00:02.0: enabled 1
1592 12:43:19.010283 PCI: 00:04.0: enabled 0
1593 12:43:19.010414 PCI: 00:05.0: enabled 0
1594 12:43:19.013702 PCI: 00:12.0: enabled 1
1595 12:43:19.016720 PCI: 00:12.5: enabled 0
1596 12:43:19.016797 PCI: 00:12.6: enabled 0
1597 12:43:19.019974 PCI: 00:14.0: enabled 1
1598 12:43:19.023089 PCI: 00:14.1: enabled 0
1599 12:43:19.026420 PCI: 00:14.3: enabled 1
1600 12:43:19.026544 PCI: 00:14.5: enabled 0
1601 12:43:19.030151 PCI: 00:15.0: enabled 1
1602 12:43:19.033491 PCI: 00:15.1: enabled 1
1603 12:43:19.036673 PCI: 00:15.2: enabled 0
1604 12:43:19.036801 PCI: 00:15.3: enabled 0
1605 12:43:19.039873 PCI: 00:16.0: enabled 1
1606 12:43:19.043197 PCI: 00:16.1: enabled 0
1607 12:43:19.046577 PCI: 00:16.2: enabled 0
1608 12:43:19.046684 PCI: 00:16.3: enabled 0
1609 12:43:19.049697 PCI: 00:16.4: enabled 0
1610 12:43:19.052917 PCI: 00:16.5: enabled 0
1611 12:43:19.056260 PCI: 00:17.0: enabled 1
1612 12:43:19.056407 PCI: 00:19.0: enabled 1
1613 12:43:19.059736 PCI: 00:19.1: enabled 0
1614 12:43:19.063071 PCI: 00:19.2: enabled 0
1615 12:43:19.063197 PCI: 00:1a.0: enabled 0
1616 12:43:19.066314 PCI: 00:1c.0: enabled 0
1617 12:43:19.069946 PCI: 00:1c.1: enabled 0
1618 12:43:19.073254 PCI: 00:1c.2: enabled 0
1619 12:43:19.073340 PCI: 00:1c.3: enabled 0
1620 12:43:19.076098 PCI: 00:1c.4: enabled 0
1621 12:43:19.080011 PCI: 00:1c.5: enabled 0
1622 12:43:19.083098 PCI: 00:1c.6: enabled 0
1623 12:43:19.083183 PCI: 00:1c.7: enabled 0
1624 12:43:19.086205 PCI: 00:1d.0: enabled 1
1625 12:43:19.089502 PCI: 00:1d.1: enabled 0
1626 12:43:19.092550 PCI: 00:1d.2: enabled 0
1627 12:43:19.092676 PCI: 00:1d.3: enabled 0
1628 12:43:19.096104 PCI: 00:1d.4: enabled 0
1629 12:43:19.099951 PCI: 00:1d.5: enabled 0
1630 12:43:19.100078 PCI: 00:1e.0: enabled 1
1631 12:43:19.102773 PCI: 00:1e.1: enabled 0
1632 12:43:19.105970 PCI: 00:1e.2: enabled 1
1633 12:43:19.109547 PCI: 00:1e.3: enabled 1
1634 12:43:19.109680 PCI: 00:1f.0: enabled 1
1635 12:43:19.112979 PCI: 00:1f.1: enabled 0
1636 12:43:19.116164 PCI: 00:1f.2: enabled 0
1637 12:43:19.119124 PCI: 00:1f.3: enabled 1
1638 12:43:19.119245 PCI: 00:1f.4: enabled 1
1639 12:43:19.122873 PCI: 00:1f.5: enabled 1
1640 12:43:19.125595 PCI: 00:1f.6: enabled 0
1641 12:43:19.129302 USB0 port 0: enabled 1
1642 12:43:19.129413 I2C: 01:15: enabled 1
1643 12:43:19.132596 I2C: 02:5d: enabled 1
1644 12:43:19.135781 GENERIC: 0.0: enabled 1
1645 12:43:19.135892 I2C: 03:1a: enabled 1
1646 12:43:19.138935 I2C: 03:38: enabled 1
1647 12:43:19.142205 I2C: 03:39: enabled 1
1648 12:43:19.142290 I2C: 03:3a: enabled 1
1649 12:43:19.145465 I2C: 03:3b: enabled 1
1650 12:43:19.148859 PCI: 00:00.0: enabled 1
1651 12:43:19.148943 SPI: 00: enabled 1
1652 12:43:19.152774 SPI: 01: enabled 1
1653 12:43:19.155776 PNP: 0c09.0: enabled 1
1654 12:43:19.155886 USB2 port 0: enabled 1
1655 12:43:19.159479 USB2 port 1: enabled 1
1656 12:43:19.162297 USB2 port 2: enabled 0
1657 12:43:19.162382 USB2 port 3: enabled 0
1658 12:43:19.165988 USB2 port 5: enabled 0
1659 12:43:19.168663 USB2 port 6: enabled 1
1660 12:43:19.172183 USB2 port 9: enabled 1
1661 12:43:19.172300 USB3 port 0: enabled 1
1662 12:43:19.175339 USB3 port 1: enabled 1
1663 12:43:19.178707 USB3 port 2: enabled 1
1664 12:43:19.178792 USB3 port 3: enabled 1
1665 12:43:19.182074 USB3 port 4: enabled 0
1666 12:43:19.185258 APIC: 01: enabled 1
1667 12:43:19.185344 APIC: 06: enabled 1
1668 12:43:19.188714 APIC: 05: enabled 1
1669 12:43:19.192107 APIC: 07: enabled 1
1670 12:43:19.192221 APIC: 04: enabled 1
1671 12:43:19.195315 APIC: 03: enabled 1
1672 12:43:19.195399 APIC: 02: enabled 1
1673 12:43:19.198490 PCI: 00:08.0: enabled 1
1674 12:43:19.201811 PCI: 00:14.2: enabled 1
1675 12:43:19.205140 PCI: 01:00.0: enabled 1
1676 12:43:19.209267 Disabling ACPI via APMC:
1677 12:43:19.209377 done.
1678 12:43:19.215832 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 12:43:19.219210 ELOG: NV offset 0xaf0000 size 0x4000
1680 12:43:19.226004 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 12:43:19.232190 ELOG: Event(17) added with size 13 at 2024-01-03 12:40:42 UTC
1682 12:43:19.239156 ELOG: Event(92) added with size 9 at 2024-01-03 12:40:42 UTC
1683 12:43:19.245451 ELOG: Event(93) added with size 9 at 2024-01-03 12:40:42 UTC
1684 12:43:19.251850 ELOG: Event(9A) added with size 9 at 2024-01-03 12:40:42 UTC
1685 12:43:19.259058 ELOG: Event(9E) added with size 10 at 2024-01-03 12:40:42 UTC
1686 12:43:19.265085 ELOG: Event(9F) added with size 14 at 2024-01-03 12:40:42 UTC
1687 12:43:19.268876 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1688 12:43:19.275855 ELOG: Event(A1) added with size 10 at 2024-01-03 12:40:42 UTC
1689 12:43:19.286080 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 12:43:19.292256 ELOG: Event(A0) added with size 9 at 2024-01-03 12:40:42 UTC
1691 12:43:19.295930 elog_add_boot_reason: Logged dev mode boot
1692 12:43:19.299031 Finalize devices...
1693 12:43:19.299152 PCI: 00:17.0 final
1694 12:43:19.301861 Devices finalized
1695 12:43:19.305164 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 12:43:19.312428 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 12:43:19.315614 ME: HFSTS1 : 0x90000245
1698 12:43:19.318577 ME: HFSTS2 : 0x3B850126
1699 12:43:19.325131 ME: HFSTS3 : 0x00000020
1700 12:43:19.328644 ME: HFSTS4 : 0x00004800
1701 12:43:19.331779 ME: HFSTS5 : 0x00000000
1702 12:43:19.334853 ME: HFSTS6 : 0x40400006
1703 12:43:19.338877 ME: Manufacturing Mode : NO
1704 12:43:19.341911 ME: FW Partition Table : OK
1705 12:43:19.345191 ME: Bringup Loader Failure : NO
1706 12:43:19.348330 ME: Firmware Init Complete : YES
1707 12:43:19.351562 ME: Boot Options Present : NO
1708 12:43:19.354842 ME: Update In Progress : NO
1709 12:43:19.358877 ME: D0i3 Support : YES
1710 12:43:19.361831 ME: Low Power State Enabled : NO
1711 12:43:19.365085 ME: CPU Replaced : NO
1712 12:43:19.368215 ME: CPU Replacement Valid : YES
1713 12:43:19.371352 ME: Current Working State : 5
1714 12:43:19.375023 ME: Current Operation State : 1
1715 12:43:19.378208 ME: Current Operation Mode : 0
1716 12:43:19.381636 ME: Error Code : 0
1717 12:43:19.384718 ME: CPU Debug Disabled : YES
1718 12:43:19.388242 ME: TXT Support : NO
1719 12:43:19.394872 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 12:43:19.401172 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 12:43:19.401259 CBFS @ c08000 size 3f8000
1722 12:43:19.407967 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 12:43:19.411497 CBFS: Locating 'fallback/dsdt.aml'
1724 12:43:19.414625 CBFS: Found @ offset 10bb80 size 3fa5
1725 12:43:19.421225 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 12:43:19.424570 CBFS @ c08000 size 3f8000
1727 12:43:19.427736 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 12:43:19.430954 CBFS: Locating 'fallback/slic'
1729 12:43:19.436060 CBFS: 'fallback/slic' not found.
1730 12:43:19.442847 ACPI: Writing ACPI tables at 99b3e000.
1731 12:43:19.442978 ACPI: * FACS
1732 12:43:19.445907 ACPI: * DSDT
1733 12:43:19.449664 Ramoops buffer: 0x100000@0x99a3d000.
1734 12:43:19.452627 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 12:43:19.459678 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 12:43:19.462972 Google Chrome EC: version:
1737 12:43:19.466078 ro: helios_v2.0.2659-56403530b
1738 12:43:19.469306 rw: helios_v2.0.2849-c41de27e7d
1739 12:43:19.469435 running image: 1
1740 12:43:19.473947 ACPI: * FADT
1741 12:43:19.474033 SCI is IRQ9
1742 12:43:19.480172 ACPI: added table 1/32, length now 40
1743 12:43:19.480276 ACPI: * SSDT
1744 12:43:19.483543 Found 1 CPU(s) with 8 core(s) each.
1745 12:43:19.486619 Error: Could not locate 'wifi_sar' in VPD.
1746 12:43:19.493666 Checking CBFS for default SAR values
1747 12:43:19.496927 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 12:43:19.499921 CBFS @ c08000 size 3f8000
1749 12:43:19.506718 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 12:43:19.510137 CBFS: Locating 'wifi_sar_defaults.hex'
1751 12:43:19.513463 CBFS: Found @ offset 5fac0 size 77
1752 12:43:19.516957 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 12:43:19.523036 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 12:43:19.526774 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 12:43:19.533408 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 12:43:19.536306 failed to find key in VPD: dsm_calib_r0_0
1757 12:43:19.546626 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 12:43:19.549781 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 12:43:19.552770 failed to find key in VPD: dsm_calib_r0_1
1760 12:43:19.563181 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 12:43:19.569346 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 12:43:19.573153 failed to find key in VPD: dsm_calib_r0_2
1763 12:43:19.583039 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 12:43:19.586164 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 12:43:19.592594 failed to find key in VPD: dsm_calib_r0_3
1766 12:43:19.599060 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 12:43:19.605699 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 12:43:19.609291 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 12:43:19.612454 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 12:43:19.616533 EC returned error result code 1
1771 12:43:19.620045 EC returned error result code 1
1772 12:43:19.623755 EC returned error result code 1
1773 12:43:19.631020 PS2K: Bad resp from EC. Vivaldi disabled!
1774 12:43:19.633996 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 12:43:19.640711 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 12:43:19.646974 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 12:43:19.650355 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 12:43:19.656724 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 12:43:19.663531 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 12:43:19.670369 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 12:43:19.673730 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 12:43:19.679992 ACPI: added table 2/32, length now 44
1783 12:43:19.680077 ACPI: * MCFG
1784 12:43:19.683845 ACPI: added table 3/32, length now 48
1785 12:43:19.687177 ACPI: * TPM2
1786 12:43:19.690407 TPM2 log created at 99a2d000
1787 12:43:19.693401 ACPI: added table 4/32, length now 52
1788 12:43:19.693512 ACPI: * MADT
1789 12:43:19.697086 SCI is IRQ9
1790 12:43:19.700146 ACPI: added table 5/32, length now 56
1791 12:43:19.700256 current = 99b43ac0
1792 12:43:19.703338 ACPI: * DMAR
1793 12:43:19.706996 ACPI: added table 6/32, length now 60
1794 12:43:19.710132 ACPI: * IGD OpRegion
1795 12:43:19.710216 GMA: Found VBT in CBFS
1796 12:43:19.713337 GMA: Found valid VBT in CBFS
1797 12:43:19.716587 ACPI: added table 7/32, length now 64
1798 12:43:19.720453 ACPI: * HPET
1799 12:43:19.723295 ACPI: added table 8/32, length now 68
1800 12:43:19.723378 ACPI: done.
1801 12:43:19.726341 ACPI tables: 31744 bytes.
1802 12:43:19.730222 smbios_write_tables: 99a2c000
1803 12:43:19.733678 EC returned error result code 3
1804 12:43:19.737012 Couldn't obtain OEM name from CBI
1805 12:43:19.740227 Create SMBIOS type 17
1806 12:43:19.744045 PCI: 00:00.0 (Intel Cannonlake)
1807 12:43:19.746883 PCI: 00:14.3 (Intel WiFi)
1808 12:43:19.750211 SMBIOS tables: 939 bytes.
1809 12:43:19.753867 Writing table forward entry at 0x00000500
1810 12:43:19.760517 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 12:43:19.763592 Writing coreboot table at 0x99b62000
1812 12:43:19.770100 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 12:43:19.773174 1. 0000000000001000-000000000009ffff: RAM
1814 12:43:19.776913 2. 00000000000a0000-00000000000fffff: RESERVED
1815 12:43:19.783586 3. 0000000000100000-0000000099a2bfff: RAM
1816 12:43:19.786313 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 12:43:19.793263 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 12:43:19.799702 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 12:43:19.802913 7. 000000009a000000-000000009f7fffff: RESERVED
1820 12:43:19.809891 8. 00000000e0000000-00000000efffffff: RESERVED
1821 12:43:19.813010 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 12:43:19.816687 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 12:43:19.823088 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 12:43:19.826182 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 12:43:19.832559 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 12:43:19.836430 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 12:43:19.839447 15. 0000000100000000-000000045e7fffff: RAM
1828 12:43:19.845975 Graphics framebuffer located at 0xc0000000
1829 12:43:19.849184 Passing 5 GPIOs to payload:
1830 12:43:19.852872 NAME | PORT | POLARITY | VALUE
1831 12:43:19.859554 write protect | undefined | high | low
1832 12:43:19.862694 lid | undefined | high | high
1833 12:43:19.869798 power | undefined | high | low
1834 12:43:19.876175 oprom | undefined | high | low
1835 12:43:19.879376 EC in RW | 0x000000cb | high | low
1836 12:43:19.882420 Board ID: 4
1837 12:43:19.886091 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 12:43:19.889006 CBFS @ c08000 size 3f8000
1839 12:43:19.895858 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 12:43:19.899444 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1841 12:43:19.902628 coreboot table: 1492 bytes.
1842 12:43:19.905661 IMD ROOT 0. 99fff000 00001000
1843 12:43:19.908900 IMD SMALL 1. 99ffe000 00001000
1844 12:43:19.912736 FSP MEMORY 2. 99c4e000 003b0000
1845 12:43:19.915951 CONSOLE 3. 99c2e000 00020000
1846 12:43:19.919356 FMAP 4. 99c2d000 0000054e
1847 12:43:19.922445 TIME STAMP 5. 99c2c000 00000910
1848 12:43:19.925714 VBOOT WORK 6. 99c18000 00014000
1849 12:43:19.929022 MRC DATA 7. 99c16000 00001958
1850 12:43:19.932068 ROMSTG STCK 8. 99c15000 00001000
1851 12:43:19.935938 AFTER CAR 9. 99c0b000 0000a000
1852 12:43:19.939317 RAMSTAGE 10. 99baf000 0005c000
1853 12:43:19.942513 REFCODE 11. 99b7a000 00035000
1854 12:43:19.945713 SMM BACKUP 12. 99b6a000 00010000
1855 12:43:19.949160 COREBOOT 13. 99b62000 00008000
1856 12:43:19.951994 ACPI 14. 99b3e000 00024000
1857 12:43:19.955761 ACPI GNVS 15. 99b3d000 00001000
1858 12:43:19.959305 RAMOOPS 16. 99a3d000 00100000
1859 12:43:19.962377 TPM2 TCGLOG17. 99a2d000 00010000
1860 12:43:19.965612 SMBIOS 18. 99a2c000 00000800
1861 12:43:19.968997 IMD small region:
1862 12:43:19.972157 IMD ROOT 0. 99ffec00 00000400
1863 12:43:19.975498 FSP RUNTIME 1. 99ffebe0 00000004
1864 12:43:19.978731 EC HOSTEVENT 2. 99ffebc0 00000008
1865 12:43:19.982020 POWER STATE 3. 99ffeb80 00000040
1866 12:43:19.985380 ROMSTAGE 4. 99ffeb60 00000004
1867 12:43:19.989235 MEM INFO 5. 99ffe9a0 000001b9
1868 12:43:19.992146 VPD 6. 99ffe920 0000006c
1869 12:43:19.995422 MTRR: Physical address space:
1870 12:43:20.001919 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 12:43:20.008995 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 12:43:20.015517 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 12:43:20.022173 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 12:43:20.028637 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 12:43:20.031817 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 12:43:20.038690 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 12:43:20.045128 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 12:43:20.048166 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 12:43:20.051575 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 12:43:20.055294 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 12:43:20.061678 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 12:43:20.064735 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 12:43:20.068315 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 12:43:20.071443 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 12:43:20.078441 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 12:43:20.081513 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 12:43:20.085121 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 12:43:20.087920 call enable_fixed_mtrr()
1889 12:43:20.091524 CPU physical address size: 39 bits
1890 12:43:20.094620 MTRR: default type WB/UC MTRR counts: 6/8.
1891 12:43:20.098327 MTRR: WB selected as default type.
1892 12:43:20.104640 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 12:43:20.111352 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 12:43:20.118004 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 12:43:20.124787 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 12:43:20.131058 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 12:43:20.137392 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 12:43:20.141312 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 12:43:20.147601 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 12:43:20.150810 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 12:43:20.154055 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 12:43:20.157260 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 12:43:20.161168 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 12:43:20.167530 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 12:43:20.170734 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 12:43:20.173889 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 12:43:20.177610 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 12:43:20.184200 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 12:43:20.184295
1910 12:43:20.184379 MTRR check
1911 12:43:20.187215 Fixed MTRRs : Enabled
1912 12:43:20.190497 Variable MTRRs: Enabled
1913 12:43:20.190579
1914 12:43:20.190643 call enable_fixed_mtrr()
1915 12:43:20.197179 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1916 12:43:20.200692 CPU physical address size: 39 bits
1917 12:43:20.207145 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1918 12:43:20.210449 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 12:43:20.213721 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 12:43:20.217586 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 12:43:20.224117 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 12:43:20.226917 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 12:43:20.230647 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 12:43:20.233832 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 12:43:20.240611 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 12:43:20.243801 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 12:43:20.246953 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 12:43:20.250544 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 12:43:20.257244 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 12:43:20.260526 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 12:43:20.263636 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 12:43:20.266907 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 12:43:20.273398 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 12:43:20.276685 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 12:43:20.280166 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 12:43:20.283141 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 12:43:20.289844 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 12:43:20.293151 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 12:43:20.296825 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 12:43:20.300123 call enable_fixed_mtrr()
1941 12:43:20.303296 call enable_fixed_mtrr()
1942 12:43:20.306561 CPU physical address size: 39 bits
1943 12:43:20.309690 CPU physical address size: 39 bits
1944 12:43:20.313218 CBFS @ c08000 size 3f8000
1945 12:43:20.316635 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1946 12:43:20.319918 CBFS: Locating 'fallback/payload'
1947 12:43:20.326718 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 12:43:20.329757 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 12:43:20.333193 MTRR: Fixed MSR 0x258 0x0606060606060606
1950 12:43:20.336079 MTRR: Fixed MSR 0x259 0x0000000000000000
1951 12:43:20.343152 MTRR: Fixed MSR 0x268 0x0606060606060606
1952 12:43:20.346249 MTRR: Fixed MSR 0x269 0x0606060606060606
1953 12:43:20.349309 MTRR: Fixed MSR 0x26a 0x0606060606060606
1954 12:43:20.353097 MTRR: Fixed MSR 0x26b 0x0606060606060606
1955 12:43:20.355868 MTRR: Fixed MSR 0x26c 0x0606060606060606
1956 12:43:20.363097 MTRR: Fixed MSR 0x26d 0x0606060606060606
1957 12:43:20.366259 MTRR: Fixed MSR 0x26e 0x0606060606060606
1958 12:43:20.369312 MTRR: Fixed MSR 0x26f 0x0606060606060606
1959 12:43:20.375842 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 12:43:20.379713 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 12:43:20.382892 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 12:43:20.385926 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 12:43:20.389269 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 12:43:20.395991 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 12:43:20.398903 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 12:43:20.402391 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 12:43:20.405527 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 12:43:20.412040 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 12:43:20.415967 call enable_fixed_mtrr()
1970 12:43:20.416064 call enable_fixed_mtrr()
1971 12:43:20.419201 CPU physical address size: 39 bits
1972 12:43:20.425512 CPU physical address size: 39 bits
1973 12:43:20.429142 CBFS: Found @ offset 1c96c0 size 3f798
1974 12:43:20.431866 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 12:43:20.435340 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 12:43:20.438633 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 12:43:20.445481 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 12:43:20.448532 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 12:43:20.452322 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 12:43:20.455524 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 12:43:20.461820 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 12:43:20.465235 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 12:43:20.468704 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 12:43:20.471827 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 12:43:20.478857 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 12:43:20.478941 call enable_fixed_mtrr()
1987 12:43:20.485378 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 12:43:20.488613 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 12:43:20.492456 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 12:43:20.495515 MTRR: Fixed MSR 0x269 0x0606060606060606
1991 12:43:20.498745 MTRR: Fixed MSR 0x26a 0x0606060606060606
1992 12:43:20.505150 MTRR: Fixed MSR 0x26b 0x0606060606060606
1993 12:43:20.508609 MTRR: Fixed MSR 0x26c 0x0606060606060606
1994 12:43:20.511717 MTRR: Fixed MSR 0x26d 0x0606060606060606
1995 12:43:20.515479 MTRR: Fixed MSR 0x26e 0x0606060606060606
1996 12:43:20.522057 MTRR: Fixed MSR 0x26f 0x0606060606060606
1997 12:43:20.525167 CPU physical address size: 39 bits
1998 12:43:20.528459 call enable_fixed_mtrr()
1999 12:43:20.531774 Checking segment from ROM address 0xffdd16f8
2000 12:43:20.534929 CPU physical address size: 39 bits
2001 12:43:20.538484 Checking segment from ROM address 0xffdd1714
2002 12:43:20.545064 Loading segment from ROM address 0xffdd16f8
2003 12:43:20.547898 code (compression=0)
2004 12:43:20.554843 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 12:43:20.564546 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 12:43:20.564633 it's not compressed!
2007 12:43:20.658221 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 12:43:20.665005 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 12:43:20.667871 Loading segment from ROM address 0xffdd1714
2010 12:43:20.671192 Entry Point 0x30000000
2011 12:43:20.673954 Loaded segments
2012 12:43:20.680000 Finalizing chipset.
2013 12:43:20.683617 Finalizing SMM.
2014 12:43:20.686880 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2015 12:43:20.689878 mp_park_aps done after 0 msecs.
2016 12:43:20.696268 Jumping to boot code at 30000000(99b62000)
2017 12:43:20.703423 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 12:43:20.703508
2019 12:43:20.703573
2020 12:43:20.703633
2021 12:43:20.706747 Starting depthcharge on Helios...
2022 12:43:20.706828
2023 12:43:20.707178 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 12:43:20.707271 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 12:43:20.707355 Setting prompt string to ['hatch:']
2026 12:43:20.707435 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 12:43:20.716208 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 12:43:20.716306
2029 12:43:20.723399 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 12:43:20.723481
2031 12:43:20.729800 board_setup: Info: eMMC controller not present; skipping
2032 12:43:20.729883
2033 12:43:20.733087 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 12:43:20.733169
2035 12:43:20.739679 board_setup: Info: SDHCI controller not present; skipping
2036 12:43:20.739815
2037 12:43:20.746085 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 12:43:20.746193
2039 12:43:20.746285 Wipe memory regions:
2040 12:43:20.746365
2041 12:43:20.749798 [0x00000000001000, 0x000000000a0000)
2042 12:43:20.749915
2043 12:43:20.752946 [0x00000000100000, 0x00000030000000)
2044 12:43:20.819135
2045 12:43:20.822299 [0x00000030657430, 0x00000099a2c000)
2046 12:43:20.959923
2047 12:43:20.963065 [0x00000100000000, 0x0000045e800000)
2048 12:43:22.346240
2049 12:43:22.346406 R8152: Initializing
2050 12:43:22.346502
2051 12:43:22.349869 Version 9 (ocp_data = 6010)
2052 12:43:22.354129
2053 12:43:22.354232 R8152: Done initializing
2054 12:43:22.354326
2055 12:43:22.357233 Adding net device
2056 12:43:22.840185
2057 12:43:22.840379 R8152: Initializing
2058 12:43:22.840451
2059 12:43:22.843073 Version 6 (ocp_data = 5c30)
2060 12:43:22.843169
2061 12:43:22.846662 R8152: Done initializing
2062 12:43:22.846740
2063 12:43:22.849810 net_add_device: Attemp to include the same device
2064 12:43:22.853453
2065 12:43:22.860443 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 12:43:22.860520
2067 12:43:22.860582
2068 12:43:22.860641
2069 12:43:22.860949 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 12:43:22.961249 hatch: tftpboot 192.168.201.1 12437305/tftp-deploy-0pc67qil/kernel/bzImage 12437305/tftp-deploy-0pc67qil/kernel/cmdline 12437305/tftp-deploy-0pc67qil/ramdisk/ramdisk.cpio.gz
2072 12:43:22.961469 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 12:43:22.961581 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 12:43:22.966313 tftpboot 192.168.201.1 12437305/tftp-deploy-0pc67qil/kernel/bzIploy-0pc67qil/kernel/cmdline 12437305/tftp-deploy-0pc67qil/ramdisk/ramdisk.cpio.gz
2075 12:43:22.966424
2076 12:43:22.966516 Waiting for link
2077 12:43:23.166823
2078 12:43:23.166983 done.
2079 12:43:23.167068
2080 12:43:23.167130 MAC: 00:24:32:50:19:be
2081 12:43:23.167189
2082 12:43:23.170375 Sending DHCP discover... done.
2083 12:43:23.170548
2084 12:43:23.173925 Waiting for reply... done.
2085 12:43:23.174021
2086 12:43:23.177317 Sending DHCP request... done.
2087 12:43:23.177441
2088 12:43:23.180429 Waiting for reply... done.
2089 12:43:23.180507
2090 12:43:23.183738 My ip is 192.168.201.15
2091 12:43:23.183808
2092 12:43:23.186722 The DHCP server ip is 192.168.201.1
2093 12:43:23.186833
2094 12:43:23.189894 TFTP server IP predefined by user: 192.168.201.1
2095 12:43:23.189990
2096 12:43:23.200132 Bootfile predefined by user: 12437305/tftp-deploy-0pc67qil/kernel/bzImage
2097 12:43:23.200245
2098 12:43:23.203240 Sending tftp read request... done.
2099 12:43:23.203348
2100 12:43:23.206548 Waiting for the transfer...
2101 12:43:23.206653
2102 12:43:23.742259 00000000 ################################################################
2103 12:43:23.742402
2104 12:43:24.259837 00080000 ################################################################
2105 12:43:24.259988
2106 12:43:24.789660 00100000 ################################################################
2107 12:43:24.789789
2108 12:43:25.301998 00180000 ################################################################
2109 12:43:25.302135
2110 12:43:25.825725 00200000 ################################################################
2111 12:43:25.825894
2112 12:43:26.340141 00280000 ################################################################
2113 12:43:26.340317
2114 12:43:26.868856 00300000 ################################################################
2115 12:43:26.869027
2116 12:43:27.391096 00380000 ################################################################
2117 12:43:27.391267
2118 12:43:27.917058 00400000 ################################################################
2119 12:43:27.917198
2120 12:43:28.438328 00480000 ################################################################
2121 12:43:28.438477
2122 12:43:28.960603 00500000 ################################################################
2123 12:43:28.960745
2124 12:43:29.475621 00580000 ################################################################
2125 12:43:29.475767
2126 12:43:30.004224 00600000 ################################################################
2127 12:43:30.004447
2128 12:43:30.524784 00680000 ################################################################
2129 12:43:30.524937
2130 12:43:31.051812 00700000 ################################################################
2131 12:43:31.052009
2132 12:43:31.583299 00780000 ################################################################
2133 12:43:31.583474
2134 12:43:31.780059 00800000 ######################## done.
2135 12:43:31.780191
2136 12:43:31.783413 The bootfile was 8585104 bytes long.
2137 12:43:31.783500
2138 12:43:31.786883 Sending tftp read request... done.
2139 12:43:31.786978
2140 12:43:31.790377 Waiting for the transfer...
2141 12:43:31.790461
2142 12:43:32.320694 00000000 ################################################################
2143 12:43:32.320828
2144 12:43:32.846425 00080000 ################################################################
2145 12:43:32.846565
2146 12:43:33.367574 00100000 ################################################################
2147 12:43:33.367732
2148 12:43:33.887503 00180000 ################################################################
2149 12:43:33.887647
2150 12:43:34.406808 00200000 ################################################################
2151 12:43:34.406941
2152 12:43:34.929556 00280000 ################################################################
2153 12:43:34.929687
2154 12:43:35.455873 00300000 ################################################################
2155 12:43:35.456081
2156 12:43:35.982018 00380000 ################################################################
2157 12:43:35.982192
2158 12:43:36.514001 00400000 ################################################################
2159 12:43:36.514137
2160 12:43:37.039466 00480000 ################################################################
2161 12:43:37.039610
2162 12:43:37.570965 00500000 ################################################################
2163 12:43:37.571137
2164 12:43:38.092903 00580000 ################################################################
2165 12:43:38.093124
2166 12:43:38.265355 00600000 ###################### done.
2167 12:43:38.265569
2168 12:43:38.268398 Sending tftp read request... done.
2169 12:43:38.268533
2170 12:43:38.271819 Waiting for the transfer...
2171 12:43:38.271953
2172 12:43:38.272070 00000000 # done.
2173 12:43:38.274862
2174 12:43:38.281547 Command line loaded dynamically from TFTP file: 12437305/tftp-deploy-0pc67qil/kernel/cmdline
2175 12:43:38.281678
2176 12:43:38.311668 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12437305/extract-nfsrootfs-a_2cjqq_,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2177 12:43:38.311814
2178 12:43:38.317968 ec_init(0): CrosEC protocol v3 supported (256, 256)
2179 12:43:38.321653
2180 12:43:38.324854 Shutting down all USB controllers.
2181 12:43:38.324969
2182 12:43:38.325065 Removing current net device
2183 12:43:38.328943
2184 12:43:38.329026 Finalizing coreboot
2185 12:43:38.329095
2186 12:43:38.335469 Exiting depthcharge with code 4 at timestamp: 24953811
2187 12:43:38.335562
2188 12:43:38.335628
2189 12:43:38.335690 Starting kernel ...
2190 12:43:38.335766
2191 12:43:38.335825
2192 12:43:38.336190 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2193 12:43:38.336333 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2194 12:43:38.336414 Setting prompt string to ['Linux version [0-9]']
2195 12:43:38.336501 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2196 12:43:38.336579 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2198 12:48:02.336584 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2200 12:48:02.336791 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2202 12:48:02.336956 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2205 12:48:02.337212 end: 2 depthcharge-action (duration 00:05:00) [common]
2207 12:48:02.337423 Cleaning after the job
2208 12:48:02.337511 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437305/tftp-deploy-0pc67qil/ramdisk
2209 12:48:02.338500 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437305/tftp-deploy-0pc67qil/kernel
2210 12:48:02.339825 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437305/tftp-deploy-0pc67qil/nfsrootfs
2211 12:48:02.436618 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437305/tftp-deploy-0pc67qil/modules
2212 12:48:02.437067 start: 4.1 power-off (timeout 00:00:30) [common]
2213 12:48:02.437234 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2214 12:48:02.507149 >> Command sent successfully.
2215 12:48:02.510520 Returned 0 in 0 seconds
2216 12:48:02.610886 end: 4.1 power-off (duration 00:00:00) [common]
2218 12:48:02.611207 start: 4.2 read-feedback (timeout 00:10:00) [common]
2219 12:48:02.611466 Listened to connection for namespace 'common' for up to 1s
2221 12:48:02.611836 Listened to connection for namespace 'common' for up to 1s
2222 12:48:03.612418 Finalising connection for namespace 'common'
2223 12:48:03.612594 Disconnecting from shell: Finalise
2224 12:48:03.612677
2225 12:48:03.713007 end: 4.2 read-feedback (duration 00:00:01) [common]
2226 12:48:03.713137 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12437305
2227 12:48:04.325305 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12437305
2228 12:48:04.325502 JobError: Your job cannot terminate cleanly.