Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:40:14.944481 lava-dispatcher, installed at version: 2023.10
2 12:40:14.944691 start: 0 validate
3 12:40:14.944818 Start time: 2024-01-03 12:40:14.944808+00:00 (UTC)
4 12:40:14.944942 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:14.945075 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20231214.0%2Famd64%2Finitrd.cpio.gz exists
6 12:40:15.214054 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:15.214775 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:15.220267 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:15.220956 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20231214.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:40:15.489604 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:40:15.489779 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:40:15.492120 validate duration: 0.55
14 12:40:15.492365 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:40:15.492460 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:40:15.492545 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:40:15.492675 Not decompressing ramdisk as can be used compressed.
18 12:40:15.492759 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20231214.0/amd64/initrd.cpio.gz
19 12:40:15.492822 saving as /var/lib/lava/dispatcher/tmp/12437361/tftp-deploy-1munw6gw/ramdisk/initrd.cpio.gz
20 12:40:15.492885 total size: 6136272 (5 MB)
21 12:40:15.493838 progress 0 % (0 MB)
22 12:40:15.495590 progress 5 % (0 MB)
23 12:40:15.497236 progress 10 % (0 MB)
24 12:40:15.498992 progress 15 % (0 MB)
25 12:40:15.500633 progress 20 % (1 MB)
26 12:40:15.502246 progress 25 % (1 MB)
27 12:40:15.503999 progress 30 % (1 MB)
28 12:40:15.505637 progress 35 % (2 MB)
29 12:40:15.507199 progress 40 % (2 MB)
30 12:40:15.509063 progress 45 % (2 MB)
31 12:40:15.510619 progress 50 % (2 MB)
32 12:40:15.512217 progress 55 % (3 MB)
33 12:40:15.513934 progress 60 % (3 MB)
34 12:40:15.515495 progress 65 % (3 MB)
35 12:40:15.517262 progress 70 % (4 MB)
36 12:40:15.518819 progress 75 % (4 MB)
37 12:40:15.520418 progress 80 % (4 MB)
38 12:40:15.522140 progress 85 % (5 MB)
39 12:40:15.523694 progress 90 % (5 MB)
40 12:40:15.525286 progress 95 % (5 MB)
41 12:40:15.527019 progress 100 % (5 MB)
42 12:40:15.527161 5 MB downloaded in 0.03 s (170.73 MB/s)
43 12:40:15.527324 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:40:15.527568 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:40:15.527657 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:40:15.527740 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:40:15.527882 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:40:15.527956 saving as /var/lib/lava/dispatcher/tmp/12437361/tftp-deploy-1munw6gw/kernel/bzImage
50 12:40:15.528015 total size: 8585104 (8 MB)
51 12:40:15.528113 No compression specified
52 12:40:15.529224 progress 0 % (0 MB)
53 12:40:15.531688 progress 5 % (0 MB)
54 12:40:15.533989 progress 10 % (0 MB)
55 12:40:15.536354 progress 15 % (1 MB)
56 12:40:15.538607 progress 20 % (1 MB)
57 12:40:15.540964 progress 25 % (2 MB)
58 12:40:15.543250 progress 30 % (2 MB)
59 12:40:15.545561 progress 35 % (2 MB)
60 12:40:15.547806 progress 40 % (3 MB)
61 12:40:15.550137 progress 45 % (3 MB)
62 12:40:15.552467 progress 50 % (4 MB)
63 12:40:15.554916 progress 55 % (4 MB)
64 12:40:15.557222 progress 60 % (4 MB)
65 12:40:15.559435 progress 65 % (5 MB)
66 12:40:15.561759 progress 70 % (5 MB)
67 12:40:15.563978 progress 75 % (6 MB)
68 12:40:15.566236 progress 80 % (6 MB)
69 12:40:15.568500 progress 85 % (6 MB)
70 12:40:15.570748 progress 90 % (7 MB)
71 12:40:15.572992 progress 95 % (7 MB)
72 12:40:15.575230 progress 100 % (8 MB)
73 12:40:15.575473 8 MB downloaded in 0.05 s (172.53 MB/s)
74 12:40:15.575619 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:40:15.575845 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:40:15.575935 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:40:15.576018 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:40:15.576195 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20231214.0/amd64/full.rootfs.tar.xz
80 12:40:15.576262 saving as /var/lib/lava/dispatcher/tmp/12437361/tftp-deploy-1munw6gw/nfsrootfs/full.rootfs.tar
81 12:40:15.576322 total size: 205766564 (196 MB)
82 12:40:15.576382 Using unxz to decompress xz
83 12:40:15.580801 progress 0 % (0 MB)
84 12:40:16.161408 progress 5 % (9 MB)
85 12:40:16.686831 progress 10 % (19 MB)
86 12:40:17.263868 progress 15 % (29 MB)
87 12:40:17.531611 progress 20 % (39 MB)
88 12:40:18.077343 progress 25 % (49 MB)
89 12:40:18.649011 progress 30 % (58 MB)
90 12:40:19.221084 progress 35 % (68 MB)
91 12:40:19.778974 progress 40 % (78 MB)
92 12:40:20.358937 progress 45 % (88 MB)
93 12:40:20.955987 progress 50 % (98 MB)
94 12:40:21.568856 progress 55 % (107 MB)
95 12:40:22.250611 progress 60 % (117 MB)
96 12:40:22.655066 progress 65 % (127 MB)
97 12:40:22.744455 progress 70 % (137 MB)
98 12:40:22.891486 progress 75 % (147 MB)
99 12:40:22.973954 progress 80 % (157 MB)
100 12:40:23.024943 progress 85 % (166 MB)
101 12:40:23.118609 progress 90 % (176 MB)
102 12:40:23.478752 progress 95 % (186 MB)
103 12:40:24.074775 progress 100 % (196 MB)
104 12:40:24.080363 196 MB downloaded in 8.50 s (23.08 MB/s)
105 12:40:24.080645 end: 1.3.1 http-download (duration 00:00:09) [common]
107 12:40:24.080909 end: 1.3 download-retry (duration 00:00:09) [common]
108 12:40:24.081000 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:40:24.081090 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:40:24.081279 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:40:24.081353 saving as /var/lib/lava/dispatcher/tmp/12437361/tftp-deploy-1munw6gw/modules/modules.tar
112 12:40:24.081415 total size: 253660 (0 MB)
113 12:40:24.081481 Using unxz to decompress xz
114 12:40:24.085665 progress 12 % (0 MB)
115 12:40:24.086107 progress 25 % (0 MB)
116 12:40:24.086381 progress 38 % (0 MB)
117 12:40:24.087943 progress 51 % (0 MB)
118 12:40:24.089916 progress 64 % (0 MB)
119 12:40:24.091805 progress 77 % (0 MB)
120 12:40:24.093604 progress 90 % (0 MB)
121 12:40:24.095545 progress 100 % (0 MB)
122 12:40:24.101078 0 MB downloaded in 0.02 s (12.31 MB/s)
123 12:40:24.101316 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:40:24.101582 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:40:24.101681 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 12:40:24.101784 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 12:40:27.806026 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12437361/extract-nfsrootfs-wxiuadt1
129 12:40:27.806227 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 12:40:27.806324 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 12:40:27.806493 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9
132 12:40:27.806624 makedir: /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin
133 12:40:27.806725 makedir: /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/tests
134 12:40:27.806822 makedir: /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/results
135 12:40:27.806922 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-add-keys
136 12:40:27.807067 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-add-sources
137 12:40:27.807195 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-background-process-start
138 12:40:27.807322 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-background-process-stop
139 12:40:27.807446 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-common-functions
140 12:40:27.807568 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-echo-ipv4
141 12:40:27.807692 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-install-packages
142 12:40:27.807815 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-installed-packages
143 12:40:27.807938 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-os-build
144 12:40:27.808277 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-probe-channel
145 12:40:27.808408 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-probe-ip
146 12:40:27.808535 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-target-ip
147 12:40:27.808659 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-target-mac
148 12:40:27.808786 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-target-storage
149 12:40:27.808912 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-test-case
150 12:40:27.809039 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-test-event
151 12:40:27.809161 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-test-feedback
152 12:40:27.809284 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-test-raise
153 12:40:27.809407 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-test-reference
154 12:40:27.809531 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-test-runner
155 12:40:27.809654 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-test-set
156 12:40:27.809779 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-test-shell
157 12:40:27.809903 Updating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-add-keys (debian)
158 12:40:27.810055 Updating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-add-sources (debian)
159 12:40:27.810195 Updating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-install-packages (debian)
160 12:40:27.810332 Updating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-installed-packages (debian)
161 12:40:27.810470 Updating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/bin/lava-os-build (debian)
162 12:40:27.810589 Creating /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/environment
163 12:40:27.810683 LAVA metadata
164 12:40:27.810750 - LAVA_JOB_ID=12437361
165 12:40:27.810810 - LAVA_DISPATCHER_IP=192.168.201.1
166 12:40:27.810908 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
167 12:40:27.810972 skipped lava-vland-overlay
168 12:40:27.811044 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 12:40:27.811121 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
170 12:40:27.811179 skipped lava-multinode-overlay
171 12:40:27.811251 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 12:40:27.811341 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
173 12:40:27.811412 Loading test definitions
174 12:40:27.811500 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
175 12:40:27.811569 Using /lava-12437361 at stage 0
176 12:40:27.811850 uuid=12437361_1.5.2.3.1 testdef=None
177 12:40:27.811938 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 12:40:27.812022 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
179 12:40:27.812481 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 12:40:27.812696 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
182 12:40:27.813249 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 12:40:27.813473 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
185 12:40:27.814094 runner path: /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/0/tests/0_timesync-off test_uuid 12437361_1.5.2.3.1
186 12:40:27.814250 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 12:40:27.814471 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
189 12:40:27.814543 Using /lava-12437361 at stage 0
190 12:40:27.814638 Fetching tests from https://github.com/kernelci/test-definitions.git
191 12:40:27.814716 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/0/tests/1_kselftest-alsa'
192 12:40:35.628656 Running '/usr/bin/git checkout kernelci.org
193 12:40:35.778339 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
194 12:40:35.779092 uuid=12437361_1.5.2.3.5 testdef=None
195 12:40:35.779260 end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
197 12:40:35.779516 start: 1.5.2.3.6 test-overlay (timeout 00:09:40) [common]
198 12:40:35.780300 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 12:40:35.780534 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:40) [common]
201 12:40:35.781507 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 12:40:35.781742 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:40) [common]
204 12:40:35.782669 runner path: /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/0/tests/1_kselftest-alsa test_uuid 12437361_1.5.2.3.5
205 12:40:35.782763 BOARD='asus-cx9400-volteer'
206 12:40:35.782827 BRANCH='cip'
207 12:40:35.782886 SKIPFILE='/dev/null'
208 12:40:35.782943 SKIP_INSTALL='True'
209 12:40:35.782998 TESTPROG_URL='None'
210 12:40:35.783052 TST_CASENAME=''
211 12:40:35.783106 TST_CMDFILES='alsa'
212 12:40:35.783250 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 12:40:35.783453 Creating lava-test-runner.conf files
215 12:40:35.783515 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437361/lava-overlay-cyqtb7h9/lava-12437361/0 for stage 0
216 12:40:35.783609 - 0_timesync-off
217 12:40:35.783715 - 1_kselftest-alsa
218 12:40:35.783812 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
219 12:40:35.783900 start: 1.5.2.4 compress-overlay (timeout 00:09:40) [common]
220 12:40:43.280769 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
221 12:40:43.280928 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:32) [common]
222 12:40:43.281020 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 12:40:43.281120 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
224 12:40:43.281207 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:32) [common]
225 12:40:43.441321 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 12:40:43.441721 start: 1.5.4 extract-modules (timeout 00:09:32) [common]
227 12:40:43.441928 extracting modules file /var/lib/lava/dispatcher/tmp/12437361/tftp-deploy-1munw6gw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437361/extract-nfsrootfs-wxiuadt1
228 12:40:43.456198 extracting modules file /var/lib/lava/dispatcher/tmp/12437361/tftp-deploy-1munw6gw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437361/extract-overlay-ramdisk-ts82wum_/ramdisk
229 12:40:43.470071 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 12:40:43.470193 start: 1.5.5 apply-overlay-tftp (timeout 00:09:32) [common]
231 12:40:43.470279 [common] Applying overlay to NFS
232 12:40:43.470347 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437361/compress-overlay-e9rnnhz0/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12437361/extract-nfsrootfs-wxiuadt1
233 12:40:44.378065 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 12:40:44.378235 start: 1.5.6 configure-preseed-file (timeout 00:09:31) [common]
235 12:40:44.378328 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 12:40:44.378413 start: 1.5.7 compress-ramdisk (timeout 00:09:31) [common]
237 12:40:44.378493 Building ramdisk /var/lib/lava/dispatcher/tmp/12437361/extract-overlay-ramdisk-ts82wum_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12437361/extract-overlay-ramdisk-ts82wum_/ramdisk
238 12:40:44.469831 >> 30726 blocks
239 12:40:45.083493 rename /var/lib/lava/dispatcher/tmp/12437361/extract-overlay-ramdisk-ts82wum_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12437361/tftp-deploy-1munw6gw/ramdisk/ramdisk.cpio.gz
240 12:40:45.083975 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 12:40:45.084153 start: 1.5.8 prepare-kernel (timeout 00:09:30) [common]
242 12:40:45.084253 start: 1.5.8.1 prepare-fit (timeout 00:09:30) [common]
243 12:40:45.084350 No mkimage arch provided, not using FIT.
244 12:40:45.084440 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 12:40:45.084520 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 12:40:45.084624 end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
247 12:40:45.084711 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:30) [common]
248 12:40:45.084790 No LXC device requested
249 12:40:45.084870 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 12:40:45.084955 start: 1.7 deploy-device-env (timeout 00:09:30) [common]
251 12:40:45.085034 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 12:40:45.085105 Checking files for TFTP limit of 4294967296 bytes.
253 12:40:45.085507 end: 1 tftp-deploy (duration 00:00:30) [common]
254 12:40:45.085608 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 12:40:45.085699 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 12:40:45.085823 substitutions:
257 12:40:45.085893 - {DTB}: None
258 12:40:45.085953 - {INITRD}: 12437361/tftp-deploy-1munw6gw/ramdisk/ramdisk.cpio.gz
259 12:40:45.086011 - {KERNEL}: 12437361/tftp-deploy-1munw6gw/kernel/bzImage
260 12:40:45.086067 - {LAVA_MAC}: None
261 12:40:45.086122 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12437361/extract-nfsrootfs-wxiuadt1
262 12:40:45.086177 - {NFS_SERVER_IP}: 192.168.201.1
263 12:40:45.086231 - {PRESEED_CONFIG}: None
264 12:40:45.086284 - {PRESEED_LOCAL}: None
265 12:40:45.086336 - {RAMDISK}: 12437361/tftp-deploy-1munw6gw/ramdisk/ramdisk.cpio.gz
266 12:40:45.086389 - {ROOT_PART}: None
267 12:40:45.086440 - {ROOT}: None
268 12:40:45.086493 - {SERVER_IP}: 192.168.201.1
269 12:40:45.086545 - {TEE}: None
270 12:40:45.086596 Parsed boot commands:
271 12:40:45.086648 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 12:40:45.086825 Parsed boot commands: tftpboot 192.168.201.1 12437361/tftp-deploy-1munw6gw/kernel/bzImage 12437361/tftp-deploy-1munw6gw/kernel/cmdline 12437361/tftp-deploy-1munw6gw/ramdisk/ramdisk.cpio.gz
273 12:40:45.086910 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 12:40:45.086991 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 12:40:45.087083 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 12:40:45.087169 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 12:40:45.087238 Not connected, no need to disconnect.
278 12:40:45.087310 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 12:40:45.087389 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 12:40:45.087454 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-7'
281 12:40:45.091537 Setting prompt string to ['lava-test: # ']
282 12:40:45.091911 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 12:40:45.092067 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 12:40:45.092203 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 12:40:45.092326 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 12:40:45.092553 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
287 12:40:50.231472 >> Command sent successfully.
288 12:40:50.242089 Returned 0 in 5 seconds
289 12:40:50.343307 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 12:40:50.344759 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 12:40:50.345318 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 12:40:50.345764 Setting prompt string to 'Starting depthcharge on Voema...'
294 12:40:50.346102 Changing prompt to 'Starting depthcharge on Voema...'
295 12:40:50.346457 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
296 12:40:50.347648 [Enter `^Ec?' for help]
297 12:40:51.936251
298 12:40:51.936854
299 12:40:51.946025 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
300 12:40:51.949350 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
301 12:40:51.956301 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
302 12:40:51.959612 CPU: AES supported, TXT NOT supported, VT supported
303 12:40:51.966462 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
304 12:40:51.972809 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
305 12:40:51.976271 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
306 12:40:51.979171 VBOOT: Loading verstage.
307 12:40:51.983059 FMAP: Found "FLASH" version 1.1 at 0x1804000.
308 12:40:51.989323 FMAP: base = 0x0 size = 0x2000000 #areas = 32
309 12:40:51.992483 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
310 12:40:52.002891 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
311 12:40:52.010167 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
312 12:40:52.010732
313 12:40:52.011067
314 12:40:52.022914 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
315 12:40:52.036634 Probing TPM: . done!
316 12:40:52.040003 TPM ready after 0 ms
317 12:40:52.043084 Connected to device vid:did:rid of 1ae0:0028:00
318 12:40:52.055213 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
319 12:40:52.061398 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
320 12:40:52.064963 Initialized TPM device CR50 revision 0
321 12:40:52.116516 tlcl_send_startup: Startup return code is 0
322 12:40:52.117038 TPM: setup succeeded
323 12:40:52.131494 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
324 12:40:52.145553 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
325 12:40:52.158820 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
326 12:40:52.168780 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
327 12:40:52.172698 Chrome EC: UHEPI supported
328 12:40:52.176443 Phase 1
329 12:40:52.179910 FMAP: area GBB found @ 1805000 (458752 bytes)
330 12:40:52.189975 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 12:40:52.196788 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 12:40:52.202701 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
333 12:40:52.209458 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
334 12:40:52.213003 Recovery requested (1009000e)
335 12:40:52.216215 TPM: Extending digest for VBOOT: boot mode into PCR 0
336 12:40:52.228608 tlcl_extend: response is 0
337 12:40:52.234934 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
338 12:40:52.244345 tlcl_extend: response is 0
339 12:40:52.251792 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 12:40:52.257660 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
341 12:40:52.264540 BS: verstage times (exec / console): total (unknown) / 142 ms
342 12:40:52.265110
343 12:40:52.265617
344 12:40:52.278414 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
345 12:40:52.284163 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
346 12:40:52.287382 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 12:40:52.290736 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
348 12:40:52.297300 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 12:40:52.301052 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
350 12:40:52.304315 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
351 12:40:52.307442 TCO_STS: 0000 0000
352 12:40:52.310848 GEN_PMCON: d0015038 00002200
353 12:40:52.314634 GBLRST_CAUSE: 00000000 00000000
354 12:40:52.315166 HPR_CAUSE0: 00000000
355 12:40:52.317816 prev_sleep_state 5
356 12:40:52.321140 Boot Count incremented to 26032
357 12:40:52.327486 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
358 12:40:52.333874 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
359 12:40:52.340806 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
360 12:40:52.347447 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
361 12:40:52.352346 Chrome EC: UHEPI supported
362 12:40:52.358832 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
363 12:40:52.372099 Probing TPM: done!
364 12:40:52.378444 Connected to device vid:did:rid of 1ae0:0028:00
365 12:40:52.389461 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
366 12:40:52.396578 Initialized TPM device CR50 revision 0
367 12:40:52.406924 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
368 12:40:52.413421 MRC: Hash idx 0x100b comparison successful.
369 12:40:52.417036 MRC cache found, size faa8
370 12:40:52.417563 bootmode is set to: 2
371 12:40:52.420179 SPD index = 0
372 12:40:52.427150 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
373 12:40:52.429838 SPD: module type is LPDDR4X
374 12:40:52.432836 SPD: module part number is MT53E512M64D4NW-046
375 12:40:52.439836 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
376 12:40:52.443531 SPD: device width 16 bits, bus width 16 bits
377 12:40:52.449317 SPD: module size is 1024 MB (per channel)
378 12:40:52.882408 CBMEM:
379 12:40:52.886049 IMD: root @ 0x76fff000 254 entries.
380 12:40:52.888726 IMD: root @ 0x76ffec00 62 entries.
381 12:40:52.892036 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
382 12:40:52.899009 FMAP: area RW_VPD found @ f35000 (8192 bytes)
383 12:40:52.902296 External stage cache:
384 12:40:52.906404 IMD: root @ 0x7b3ff000 254 entries.
385 12:40:52.908749 IMD: root @ 0x7b3fec00 62 entries.
386 12:40:52.923786 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
387 12:40:52.930568 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
388 12:40:52.936687 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
389 12:40:52.950951 MRC: 'RECOVERY_MRC_CACHE' does not need update.
390 12:40:52.957781 cse_lite: Skip switching to RW in the recovery path
391 12:40:52.958208 8 DIMMs found
392 12:40:52.958551 SMM Memory Map
393 12:40:52.961380 SMRAM : 0x7b000000 0x800000
394 12:40:52.965149 Subregion 0: 0x7b000000 0x200000
395 12:40:52.969123 Subregion 1: 0x7b200000 0x200000
396 12:40:52.972200 Subregion 2: 0x7b400000 0x400000
397 12:40:52.975828 top_of_ram = 0x77000000
398 12:40:52.982583 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
399 12:40:52.985540 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
400 12:40:52.992359 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
401 12:40:52.996206 MTRR Range: Start=ff000000 End=0 (Size 1000000)
402 12:40:53.002858 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
403 12:40:53.008762 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
404 12:40:53.020706 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
405 12:40:53.027340 Processing 211 relocs. Offset value of 0x74c0b000
406 12:40:53.033932 BS: romstage times (exec / console): total (unknown) / 277 ms
407 12:40:53.039957
408 12:40:53.040412
409 12:40:53.050000 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
410 12:40:53.053059 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
411 12:40:53.063415 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
412 12:40:53.070090 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
413 12:40:53.076468 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
414 12:40:53.082906 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
415 12:40:53.129926 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
416 12:40:53.136240 Processing 5008 relocs. Offset value of 0x75d98000
417 12:40:53.139557 BS: postcar times (exec / console): total (unknown) / 59 ms
418 12:40:53.142927
419 12:40:53.143348
420 12:40:53.153020 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
421 12:40:53.153555 Normal boot
422 12:40:53.156594 FW_CONFIG value is 0x804c02
423 12:40:53.159995 PCI: 00:07.0 disabled by fw_config
424 12:40:53.164121 PCI: 00:07.1 disabled by fw_config
425 12:40:53.167183 PCI: 00:0d.2 disabled by fw_config
426 12:40:53.170708 PCI: 00:1c.7 disabled by fw_config
427 12:40:53.178302 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
428 12:40:53.180562 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
429 12:40:53.187611 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
430 12:40:53.191199 GENERIC: 0.0 disabled by fw_config
431 12:40:53.194173 GENERIC: 1.0 disabled by fw_config
432 12:40:53.197587 fw_config match found: DB_USB=USB3_ACTIVE
433 12:40:53.204275 fw_config match found: DB_USB=USB3_ACTIVE
434 12:40:53.207170 fw_config match found: DB_USB=USB3_ACTIVE
435 12:40:53.210677 fw_config match found: DB_USB=USB3_ACTIVE
436 12:40:53.217377 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
437 12:40:53.224361 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
438 12:40:53.230626 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
439 12:40:53.240343 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
440 12:40:53.243989 microcode: sig=0x806c1 pf=0x80 revision=0x86
441 12:40:53.247337 microcode: Update skipped, already up-to-date
442 12:40:53.257340 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
443 12:40:53.283677 Detected 4 core, 8 thread CPU.
444 12:40:53.286896 Setting up SMI for CPU
445 12:40:53.289784 IED base = 0x7b400000
446 12:40:53.290210 IED size = 0x00400000
447 12:40:53.293558 Will perform SMM setup.
448 12:40:53.300514 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
449 12:40:53.306886 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
450 12:40:53.313615 Processing 16 relocs. Offset value of 0x00030000
451 12:40:53.316743 Attempting to start 7 APs
452 12:40:53.320255 Waiting for 10ms after sending INIT.
453 12:40:53.335401 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
454 12:40:53.339206 AP: slot 5 apic_id 5.
455 12:40:53.342662 AP: slot 4 apic_id 4.
456 12:40:53.343086 AP: slot 3 apic_id 6.
457 12:40:53.345748 AP: slot 7 apic_id 7.
458 12:40:53.348742 AP: slot 2 apic_id 3.
459 12:40:53.349168 done.
460 12:40:53.349505 AP: slot 6 apic_id 2.
461 12:40:53.355725 Waiting for 2nd SIPI to complete...done.
462 12:40:53.361990 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
463 12:40:53.368809 Processing 13 relocs. Offset value of 0x00038000
464 12:40:53.369334 Unable to locate Global NVS
465 12:40:53.378566 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
466 12:40:53.382431 Installing permanent SMM handler to 0x7b000000
467 12:40:53.391989 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
468 12:40:53.395123 Processing 794 relocs. Offset value of 0x7b010000
469 12:40:53.405874 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
470 12:40:53.408818 Processing 13 relocs. Offset value of 0x7b008000
471 12:40:53.415128 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
472 12:40:53.421890 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
473 12:40:53.426109 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
474 12:40:53.432142 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
475 12:40:53.438520 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
476 12:40:53.445255 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
477 12:40:53.451812 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
478 12:40:53.452298 Unable to locate Global NVS
479 12:40:53.461785 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
480 12:40:53.464670 Clearing SMI status registers
481 12:40:53.465193 SMI_STS: PM1
482 12:40:53.468654 PM1_STS: PWRBTN
483 12:40:53.475158 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
484 12:40:53.478234 In relocation handler: CPU 0
485 12:40:53.481756 New SMBASE=0x7b000000 IEDBASE=0x7b400000
486 12:40:53.488342 Writing SMRR. base = 0x7b000006, mask=0xff800c00
487 12:40:53.488869 Relocation complete.
488 12:40:53.498518 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
489 12:40:53.499043 In relocation handler: CPU 1
490 12:40:53.504628 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
491 12:40:53.505061 Relocation complete.
492 12:40:53.511655 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
493 12:40:53.515047 In relocation handler: CPU 7
494 12:40:53.521272 New SMBASE=0x7affe400 IEDBASE=0x7b400000
495 12:40:53.521800 Relocation complete.
496 12:40:53.528436 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
497 12:40:53.531295 In relocation handler: CPU 3
498 12:40:53.538355 New SMBASE=0x7afff400 IEDBASE=0x7b400000
499 12:40:53.541439 Writing SMRR. base = 0x7b000006, mask=0xff800c00
500 12:40:53.544896 Relocation complete.
501 12:40:53.551648 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
502 12:40:53.554998 In relocation handler: CPU 4
503 12:40:53.558008 New SMBASE=0x7afff000 IEDBASE=0x7b400000
504 12:40:53.560995 Writing SMRR. base = 0x7b000006, mask=0xff800c00
505 12:40:53.564649 Relocation complete.
506 12:40:53.571110 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
507 12:40:53.574910 In relocation handler: CPU 5
508 12:40:53.578115 New SMBASE=0x7affec00 IEDBASE=0x7b400000
509 12:40:53.581758 Relocation complete.
510 12:40:53.588603 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
511 12:40:53.591456 In relocation handler: CPU 6
512 12:40:53.594519 New SMBASE=0x7affe800 IEDBASE=0x7b400000
513 12:40:53.602502 Writing SMRR. base = 0x7b000006, mask=0xff800c00
514 12:40:53.603028 Relocation complete.
515 12:40:53.611435 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
516 12:40:53.614494 In relocation handler: CPU 2
517 12:40:53.618137 New SMBASE=0x7afff800 IEDBASE=0x7b400000
518 12:40:53.618666 Relocation complete.
519 12:40:53.621373 Initializing CPU #0
520 12:40:53.624676 CPU: vendor Intel device 806c1
521 12:40:53.628411 CPU: family 06, model 8c, stepping 01
522 12:40:53.631343 Clearing out pending MCEs
523 12:40:53.635823 Setting up local APIC...
524 12:40:53.636317 apic_id: 0x00 done.
525 12:40:53.639172 Turbo is available but hidden
526 12:40:53.642593 Turbo is available and visible
527 12:40:53.646251 microcode: Update skipped, already up-to-date
528 12:40:53.649000 CPU #0 initialized
529 12:40:53.652397 Initializing CPU #6
530 12:40:53.652822 Initializing CPU #2
531 12:40:53.656414 CPU: vendor Intel device 806c1
532 12:40:53.658944 CPU: family 06, model 8c, stepping 01
533 12:40:53.662130 CPU: vendor Intel device 806c1
534 12:40:53.665930 CPU: family 06, model 8c, stepping 01
535 12:40:53.668646 Clearing out pending MCEs
536 12:40:53.672292 Clearing out pending MCEs
537 12:40:53.675499 Setting up local APIC...
538 12:40:53.675928 Initializing CPU #4
539 12:40:53.678526 Initializing CPU #5
540 12:40:53.682500 CPU: vendor Intel device 806c1
541 12:40:53.685303 CPU: family 06, model 8c, stepping 01
542 12:40:53.688573 CPU: vendor Intel device 806c1
543 12:40:53.691866 CPU: family 06, model 8c, stepping 01
544 12:40:53.695440 Clearing out pending MCEs
545 12:40:53.698966 Clearing out pending MCEs
546 12:40:53.702414 Setting up local APIC...
547 12:40:53.702942 Initializing CPU #3
548 12:40:53.705438 Initializing CPU #7
549 12:40:53.708480 CPU: vendor Intel device 806c1
550 12:40:53.712472 CPU: family 06, model 8c, stepping 01
551 12:40:53.715783 CPU: vendor Intel device 806c1
552 12:40:53.719399 CPU: family 06, model 8c, stepping 01
553 12:40:53.722435 Clearing out pending MCEs
554 12:40:53.722963 Setting up local APIC...
555 12:40:53.725424 Initializing CPU #1
556 12:40:53.728841 Setting up local APIC...
557 12:40:53.731761 apic_id: 0x04 done.
558 12:40:53.732213 Setting up local APIC...
559 12:40:53.735358 apic_id: 0x03 done.
560 12:40:53.738554 apic_id: 0x02 done.
561 12:40:53.742002 microcode: Update skipped, already up-to-date
562 12:40:53.745301 microcode: Update skipped, already up-to-date
563 12:40:53.748580 CPU #2 initialized
564 12:40:53.751649 CPU #6 initialized
565 12:40:53.752183 apic_id: 0x05 done.
566 12:40:53.759106 microcode: Update skipped, already up-to-date
567 12:40:53.761590 microcode: Update skipped, already up-to-date
568 12:40:53.765130 CPU #4 initialized
569 12:40:53.765554 CPU #5 initialized
570 12:40:53.767974 CPU: vendor Intel device 806c1
571 12:40:53.771542 CPU: family 06, model 8c, stepping 01
572 12:40:53.775123 Clearing out pending MCEs
573 12:40:53.778607 apic_id: 0x06 done.
574 12:40:53.781690 Clearing out pending MCEs
575 12:40:53.784862 microcode: Update skipped, already up-to-date
576 12:40:53.788345 Setting up local APIC...
577 12:40:53.788845 Setting up local APIC...
578 12:40:53.791343 apic_id: 0x07 done.
579 12:40:53.794933 CPU #3 initialized
580 12:40:53.798379 microcode: Update skipped, already up-to-date
581 12:40:53.801290 apic_id: 0x01 done.
582 12:40:53.801851 CPU #7 initialized
583 12:40:53.808135 microcode: Update skipped, already up-to-date
584 12:40:53.808563 CPU #1 initialized
585 12:40:53.814652 bsp_do_flight_plan done after 455 msecs.
586 12:40:53.818266 CPU: frequency set to 4000 MHz
587 12:40:53.818792 Enabling SMIs.
588 12:40:53.825042 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
589 12:40:53.840287 SATAXPCIE1 indicates PCIe NVMe is present
590 12:40:53.844299 Probing TPM: done!
591 12:40:53.847360 Connected to device vid:did:rid of 1ae0:0028:00
592 12:40:53.857677 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
593 12:40:53.861387 Initialized TPM device CR50 revision 0
594 12:40:53.864711 Enabling S0i3.4
595 12:40:53.871074 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
596 12:40:53.874129 Found a VBT of 8704 bytes after decompression
597 12:40:53.881076 cse_lite: CSE RO boot. HybridStorageMode disabled
598 12:40:53.887648 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
599 12:40:53.964274 FSPS returned 0
600 12:40:53.967925 Executing Phase 1 of FspMultiPhaseSiInit
601 12:40:53.977709 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
602 12:40:53.980659 port C0 DISC req: usage 1 usb3 1 usb2 5
603 12:40:53.983867 Raw Buffer output 0 00000511
604 12:40:53.987227 Raw Buffer output 1 00000000
605 12:40:53.990825 pmc_send_ipc_cmd succeeded
606 12:40:53.997868 port C1 DISC req: usage 1 usb3 2 usb2 3
607 12:40:53.998297 Raw Buffer output 0 00000321
608 12:40:54.000666 Raw Buffer output 1 00000000
609 12:40:54.005305 pmc_send_ipc_cmd succeeded
610 12:40:54.010222 Detected 4 core, 8 thread CPU.
611 12:40:54.013402 Detected 4 core, 8 thread CPU.
612 12:40:54.246987 Display FSP Version Info HOB
613 12:40:54.250325 Reference Code - CPU = a.0.4c.31
614 12:40:54.253800 uCode Version = 0.0.0.86
615 12:40:54.257717 TXT ACM version = ff.ff.ff.ffff
616 12:40:54.260746 Reference Code - ME = a.0.4c.31
617 12:40:54.263761 MEBx version = 0.0.0.0
618 12:40:54.267311 ME Firmware Version = Consumer SKU
619 12:40:54.270428 Reference Code - PCH = a.0.4c.31
620 12:40:54.273884 PCH-CRID Status = Disabled
621 12:40:54.276973 PCH-CRID Original Value = ff.ff.ff.ffff
622 12:40:54.280730 PCH-CRID New Value = ff.ff.ff.ffff
623 12:40:54.283937 OPROM - RST - RAID = ff.ff.ff.ffff
624 12:40:54.287693 PCH Hsio Version = 4.0.0.0
625 12:40:54.290313 Reference Code - SA - System Agent = a.0.4c.31
626 12:40:54.293728 Reference Code - MRC = 2.0.0.1
627 12:40:54.296995 SA - PCIe Version = a.0.4c.31
628 12:40:54.300896 SA-CRID Status = Disabled
629 12:40:54.303881 SA-CRID Original Value = 0.0.0.1
630 12:40:54.307171 SA-CRID New Value = 0.0.0.1
631 12:40:54.310509 OPROM - VBIOS = ff.ff.ff.ffff
632 12:40:54.313957 IO Manageability Engine FW Version = 11.1.4.0
633 12:40:54.317176 PHY Build Version = 0.0.0.e0
634 12:40:54.320377 Thunderbolt(TM) FW Version = 0.0.0.0
635 12:40:54.327303 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
636 12:40:54.330558 ITSS IRQ Polarities Before:
637 12:40:54.330985 IPC0: 0xffffffff
638 12:40:54.334768 IPC1: 0xffffffff
639 12:40:54.335288 IPC2: 0xffffffff
640 12:40:54.336963 IPC3: 0xffffffff
641 12:40:54.340896 ITSS IRQ Polarities After:
642 12:40:54.341416 IPC0: 0xffffffff
643 12:40:54.343950 IPC1: 0xffffffff
644 12:40:54.344420 IPC2: 0xffffffff
645 12:40:54.347719 IPC3: 0xffffffff
646 12:40:54.350608 Found PCIe Root Port #9 at PCI: 00:1d.0.
647 12:40:54.364157 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
648 12:40:54.374400 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
649 12:40:54.387577 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
650 12:40:54.393727 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
651 12:40:54.394158 Enumerating buses...
652 12:40:54.400403 Show all devs... Before device enumeration.
653 12:40:54.400907 Root Device: enabled 1
654 12:40:54.403488 DOMAIN: 0000: enabled 1
655 12:40:54.407055 CPU_CLUSTER: 0: enabled 1
656 12:40:54.410505 PCI: 00:00.0: enabled 1
657 12:40:54.410968 PCI: 00:02.0: enabled 1
658 12:40:54.413731 PCI: 00:04.0: enabled 1
659 12:40:54.417190 PCI: 00:05.0: enabled 1
660 12:40:54.420177 PCI: 00:06.0: enabled 0
661 12:40:54.420602 PCI: 00:07.0: enabled 0
662 12:40:54.423535 PCI: 00:07.1: enabled 0
663 12:40:54.426670 PCI: 00:07.2: enabled 0
664 12:40:54.430190 PCI: 00:07.3: enabled 0
665 12:40:54.430679 PCI: 00:08.0: enabled 1
666 12:40:54.433740 PCI: 00:09.0: enabled 0
667 12:40:54.436993 PCI: 00:0a.0: enabled 0
668 12:40:54.440045 PCI: 00:0d.0: enabled 1
669 12:40:54.440511 PCI: 00:0d.1: enabled 0
670 12:40:54.443919 PCI: 00:0d.2: enabled 0
671 12:40:54.446791 PCI: 00:0d.3: enabled 0
672 12:40:54.447208 PCI: 00:0e.0: enabled 0
673 12:40:54.450235 PCI: 00:10.2: enabled 1
674 12:40:54.453418 PCI: 00:10.6: enabled 0
675 12:40:54.456772 PCI: 00:10.7: enabled 0
676 12:40:54.457192 PCI: 00:12.0: enabled 0
677 12:40:54.459979 PCI: 00:12.6: enabled 0
678 12:40:54.463233 PCI: 00:13.0: enabled 0
679 12:40:54.466429 PCI: 00:14.0: enabled 1
680 12:40:54.466889 PCI: 00:14.1: enabled 0
681 12:40:54.470186 PCI: 00:14.2: enabled 1
682 12:40:54.473766 PCI: 00:14.3: enabled 1
683 12:40:54.476739 PCI: 00:15.0: enabled 1
684 12:40:54.477126 PCI: 00:15.1: enabled 1
685 12:40:54.480390 PCI: 00:15.2: enabled 1
686 12:40:54.483003 PCI: 00:15.3: enabled 1
687 12:40:54.486638 PCI: 00:16.0: enabled 1
688 12:40:54.487023 PCI: 00:16.1: enabled 0
689 12:40:54.490125 PCI: 00:16.2: enabled 0
690 12:40:54.492915 PCI: 00:16.3: enabled 0
691 12:40:54.493298 PCI: 00:16.4: enabled 0
692 12:40:54.496605 PCI: 00:16.5: enabled 0
693 12:40:54.499967 PCI: 00:17.0: enabled 1
694 12:40:54.503467 PCI: 00:19.0: enabled 0
695 12:40:54.503967 PCI: 00:19.1: enabled 1
696 12:40:54.506358 PCI: 00:19.2: enabled 0
697 12:40:54.510030 PCI: 00:1c.0: enabled 1
698 12:40:54.513518 PCI: 00:1c.1: enabled 0
699 12:40:54.514009 PCI: 00:1c.2: enabled 0
700 12:40:54.516385 PCI: 00:1c.3: enabled 0
701 12:40:54.520331 PCI: 00:1c.4: enabled 0
702 12:40:54.523353 PCI: 00:1c.5: enabled 0
703 12:40:54.523907 PCI: 00:1c.6: enabled 1
704 12:40:54.526656 PCI: 00:1c.7: enabled 0
705 12:40:54.530089 PCI: 00:1d.0: enabled 1
706 12:40:54.530618 PCI: 00:1d.1: enabled 0
707 12:40:54.533371 PCI: 00:1d.2: enabled 1
708 12:40:54.536921 PCI: 00:1d.3: enabled 0
709 12:40:54.540577 PCI: 00:1e.0: enabled 1
710 12:40:54.541130 PCI: 00:1e.1: enabled 0
711 12:40:54.543023 PCI: 00:1e.2: enabled 1
712 12:40:54.546539 PCI: 00:1e.3: enabled 1
713 12:40:54.550044 PCI: 00:1f.0: enabled 1
714 12:40:54.550480 PCI: 00:1f.1: enabled 0
715 12:40:54.553308 PCI: 00:1f.2: enabled 1
716 12:40:54.556600 PCI: 00:1f.3: enabled 1
717 12:40:54.560688 PCI: 00:1f.4: enabled 0
718 12:40:54.561112 PCI: 00:1f.5: enabled 1
719 12:40:54.563382 PCI: 00:1f.6: enabled 0
720 12:40:54.567096 PCI: 00:1f.7: enabled 0
721 12:40:54.567619 APIC: 00: enabled 1
722 12:40:54.570458 GENERIC: 0.0: enabled 1
723 12:40:54.573627 GENERIC: 0.0: enabled 1
724 12:40:54.576828 GENERIC: 1.0: enabled 1
725 12:40:54.577366 GENERIC: 0.0: enabled 1
726 12:40:54.579965 GENERIC: 1.0: enabled 1
727 12:40:54.583431 USB0 port 0: enabled 1
728 12:40:54.583992 GENERIC: 0.0: enabled 1
729 12:40:54.586952 USB0 port 0: enabled 1
730 12:40:54.589863 GENERIC: 0.0: enabled 1
731 12:40:54.593000 I2C: 00:1a: enabled 1
732 12:40:54.593423 I2C: 00:31: enabled 1
733 12:40:54.596522 I2C: 00:32: enabled 1
734 12:40:54.599758 I2C: 00:10: enabled 1
735 12:40:54.600251 I2C: 00:15: enabled 1
736 12:40:54.603234 GENERIC: 0.0: enabled 0
737 12:40:54.606727 GENERIC: 1.0: enabled 0
738 12:40:54.609780 GENERIC: 0.0: enabled 1
739 12:40:54.610205 SPI: 00: enabled 1
740 12:40:54.613978 SPI: 00: enabled 1
741 12:40:54.614477 PNP: 0c09.0: enabled 1
742 12:40:54.616382 GENERIC: 0.0: enabled 1
743 12:40:54.619554 USB3 port 0: enabled 1
744 12:40:54.623082 USB3 port 1: enabled 1
745 12:40:54.623633 USB3 port 2: enabled 0
746 12:40:54.626220 USB3 port 3: enabled 0
747 12:40:54.629848 USB2 port 0: enabled 0
748 12:40:54.630375 USB2 port 1: enabled 1
749 12:40:54.633172 USB2 port 2: enabled 1
750 12:40:54.636430 USB2 port 3: enabled 0
751 12:40:54.636867 USB2 port 4: enabled 1
752 12:40:54.639824 USB2 port 5: enabled 0
753 12:40:54.643131 USB2 port 6: enabled 0
754 12:40:54.646384 USB2 port 7: enabled 0
755 12:40:54.646841 USB2 port 8: enabled 0
756 12:40:54.649905 USB2 port 9: enabled 0
757 12:40:54.652851 USB3 port 0: enabled 0
758 12:40:54.653287 USB3 port 1: enabled 1
759 12:40:54.656121 USB3 port 2: enabled 0
760 12:40:54.659431 USB3 port 3: enabled 0
761 12:40:54.663232 GENERIC: 0.0: enabled 1
762 12:40:54.663655 GENERIC: 1.0: enabled 1
763 12:40:54.666405 APIC: 01: enabled 1
764 12:40:54.669555 APIC: 03: enabled 1
765 12:40:54.669983 APIC: 06: enabled 1
766 12:40:54.672752 APIC: 04: enabled 1
767 12:40:54.673174 APIC: 05: enabled 1
768 12:40:54.676411 APIC: 02: enabled 1
769 12:40:54.679461 APIC: 07: enabled 1
770 12:40:54.679883 Compare with tree...
771 12:40:54.682909 Root Device: enabled 1
772 12:40:54.686239 DOMAIN: 0000: enabled 1
773 12:40:54.689758 PCI: 00:00.0: enabled 1
774 12:40:54.690197 PCI: 00:02.0: enabled 1
775 12:40:54.692458 PCI: 00:04.0: enabled 1
776 12:40:54.696230 GENERIC: 0.0: enabled 1
777 12:40:54.699341 PCI: 00:05.0: enabled 1
778 12:40:54.703231 PCI: 00:06.0: enabled 0
779 12:40:54.703785 PCI: 00:07.0: enabled 0
780 12:40:54.706253 GENERIC: 0.0: enabled 1
781 12:40:54.709569 PCI: 00:07.1: enabled 0
782 12:40:54.712693 GENERIC: 1.0: enabled 1
783 12:40:54.716658 PCI: 00:07.2: enabled 0
784 12:40:54.717337 GENERIC: 0.0: enabled 1
785 12:40:54.719662 PCI: 00:07.3: enabled 0
786 12:40:54.722756 GENERIC: 1.0: enabled 1
787 12:40:54.726117 PCI: 00:08.0: enabled 1
788 12:40:54.729257 PCI: 00:09.0: enabled 0
789 12:40:54.729834 PCI: 00:0a.0: enabled 0
790 12:40:54.732931 PCI: 00:0d.0: enabled 1
791 12:40:54.735814 USB0 port 0: enabled 1
792 12:40:54.739627 USB3 port 0: enabled 1
793 12:40:54.743062 USB3 port 1: enabled 1
794 12:40:54.743759 USB3 port 2: enabled 0
795 12:40:54.745906 USB3 port 3: enabled 0
796 12:40:54.749691 PCI: 00:0d.1: enabled 0
797 12:40:54.752522 PCI: 00:0d.2: enabled 0
798 12:40:54.756038 GENERIC: 0.0: enabled 1
799 12:40:54.756534 PCI: 00:0d.3: enabled 0
800 12:40:54.759191 PCI: 00:0e.0: enabled 0
801 12:40:54.763047 PCI: 00:10.2: enabled 1
802 12:40:54.766169 PCI: 00:10.6: enabled 0
803 12:40:54.769368 PCI: 00:10.7: enabled 0
804 12:40:54.769942 PCI: 00:12.0: enabled 0
805 12:40:54.773089 PCI: 00:12.6: enabled 0
806 12:40:54.776007 PCI: 00:13.0: enabled 0
807 12:40:54.779216 PCI: 00:14.0: enabled 1
808 12:40:54.782583 USB0 port 0: enabled 1
809 12:40:54.783024 USB2 port 0: enabled 0
810 12:40:54.786654 USB2 port 1: enabled 1
811 12:40:54.789281 USB2 port 2: enabled 1
812 12:40:54.792343 USB2 port 3: enabled 0
813 12:40:54.795963 USB2 port 4: enabled 1
814 12:40:54.799169 USB2 port 5: enabled 0
815 12:40:54.799676 USB2 port 6: enabled 0
816 12:40:54.802625 USB2 port 7: enabled 0
817 12:40:54.805968 USB2 port 8: enabled 0
818 12:40:54.809052 USB2 port 9: enabled 0
819 12:40:54.812525 USB3 port 0: enabled 0
820 12:40:54.812961 USB3 port 1: enabled 1
821 12:40:54.816032 USB3 port 2: enabled 0
822 12:40:54.819238 USB3 port 3: enabled 0
823 12:40:54.822848 PCI: 00:14.1: enabled 0
824 12:40:54.826001 PCI: 00:14.2: enabled 1
825 12:40:54.828948 PCI: 00:14.3: enabled 1
826 12:40:54.829426 GENERIC: 0.0: enabled 1
827 12:40:54.832355 PCI: 00:15.0: enabled 1
828 12:40:54.835855 I2C: 00:1a: enabled 1
829 12:40:54.839401 I2C: 00:31: enabled 1
830 12:40:54.839824 I2C: 00:32: enabled 1
831 12:40:54.842639 PCI: 00:15.1: enabled 1
832 12:40:54.845688 I2C: 00:10: enabled 1
833 12:40:54.849224 PCI: 00:15.2: enabled 1
834 12:40:54.853346 PCI: 00:15.3: enabled 1
835 12:40:54.853767 PCI: 00:16.0: enabled 1
836 12:40:54.856107 PCI: 00:16.1: enabled 0
837 12:40:54.859480 PCI: 00:16.2: enabled 0
838 12:40:54.862786 PCI: 00:16.3: enabled 0
839 12:40:54.865943 PCI: 00:16.4: enabled 0
840 12:40:54.866444 PCI: 00:16.5: enabled 0
841 12:40:54.868905 PCI: 00:17.0: enabled 1
842 12:40:54.872813 PCI: 00:19.0: enabled 0
843 12:40:54.876001 PCI: 00:19.1: enabled 1
844 12:40:54.876565 I2C: 00:15: enabled 1
845 12:40:54.879028 PCI: 00:19.2: enabled 0
846 12:40:54.883169 PCI: 00:1d.0: enabled 1
847 12:40:54.886877 GENERIC: 0.0: enabled 1
848 12:40:54.887302 PCI: 00:1e.0: enabled 1
849 12:40:54.891280 PCI: 00:1e.1: enabled 0
850 12:40:54.894276 PCI: 00:1e.2: enabled 1
851 12:40:54.894694 SPI: 00: enabled 1
852 12:40:54.897813 PCI: 00:1e.3: enabled 1
853 12:40:54.900922 SPI: 00: enabled 1
854 12:40:54.904372 PCI: 00:1f.0: enabled 1
855 12:40:54.904795 PNP: 0c09.0: enabled 1
856 12:40:54.907465 PCI: 00:1f.1: enabled 0
857 12:40:54.959078 PCI: 00:1f.2: enabled 1
858 12:40:54.959587 GENERIC: 0.0: enabled 1
859 12:40:54.960264 GENERIC: 0.0: enabled 1
860 12:40:54.960611 GENERIC: 1.0: enabled 1
861 12:40:54.960922 PCI: 00:1f.3: enabled 1
862 12:40:54.961214 PCI: 00:1f.4: enabled 0
863 12:40:54.961529 PCI: 00:1f.5: enabled 1
864 12:40:54.962016 PCI: 00:1f.6: enabled 0
865 12:40:54.962384 PCI: 00:1f.7: enabled 0
866 12:40:54.962776 CPU_CLUSTER: 0: enabled 1
867 12:40:54.963164 APIC: 00: enabled 1
868 12:40:54.963548 APIC: 01: enabled 1
869 12:40:54.964026 APIC: 03: enabled 1
870 12:40:54.964453 APIC: 06: enabled 1
871 12:40:54.964931 APIC: 04: enabled 1
872 12:40:54.965406 APIC: 05: enabled 1
873 12:40:54.965787 APIC: 02: enabled 1
874 12:40:54.966168 APIC: 07: enabled 1
875 12:40:54.966626 Root Device scanning...
876 12:40:54.966982 scan_static_bus for Root Device
877 12:40:54.967365 DOMAIN: 0000 enabled
878 12:40:54.967746 CPU_CLUSTER: 0 enabled
879 12:40:54.969741 DOMAIN: 0000 scanning...
880 12:40:54.970175 PCI: pci_scan_bus for bus 00
881 12:40:54.973438 PCI: 00:00.0 [8086/0000] ops
882 12:40:54.976477 PCI: 00:00.0 [8086/9a12] enabled
883 12:40:54.980282 PCI: 00:02.0 [8086/0000] bus ops
884 12:40:54.983459 PCI: 00:02.0 [8086/9a40] enabled
885 12:40:54.987068 PCI: 00:04.0 [8086/0000] bus ops
886 12:40:54.989688 PCI: 00:04.0 [8086/9a03] enabled
887 12:40:54.993283 PCI: 00:05.0 [8086/9a19] enabled
888 12:40:54.996351 PCI: 00:07.0 [0000/0000] hidden
889 12:40:55.000160 PCI: 00:08.0 [8086/9a11] enabled
890 12:40:55.003974 PCI: 00:0a.0 [8086/9a0d] disabled
891 12:40:55.006638 PCI: 00:0d.0 [8086/0000] bus ops
892 12:40:55.009947 PCI: 00:0d.0 [8086/9a13] enabled
893 12:40:55.013265 PCI: 00:14.0 [8086/0000] bus ops
894 12:40:55.016788 PCI: 00:14.0 [8086/a0ed] enabled
895 12:40:55.019739 PCI: 00:14.2 [8086/a0ef] enabled
896 12:40:55.023486 PCI: 00:14.3 [8086/0000] bus ops
897 12:40:55.026521 PCI: 00:14.3 [8086/a0f0] enabled
898 12:40:55.029772 PCI: 00:15.0 [8086/0000] bus ops
899 12:40:55.033623 PCI: 00:15.0 [8086/a0e8] enabled
900 12:40:55.036559 PCI: 00:15.1 [8086/0000] bus ops
901 12:40:55.039714 PCI: 00:15.1 [8086/a0e9] enabled
902 12:40:55.043051 PCI: 00:15.2 [8086/0000] bus ops
903 12:40:55.046865 PCI: 00:15.2 [8086/a0ea] enabled
904 12:40:55.049671 PCI: 00:15.3 [8086/0000] bus ops
905 12:40:55.052887 PCI: 00:15.3 [8086/a0eb] enabled
906 12:40:55.056466 PCI: 00:16.0 [8086/0000] ops
907 12:40:55.059513 PCI: 00:16.0 [8086/a0e0] enabled
908 12:40:55.066292 PCI: Static device PCI: 00:17.0 not found, disabling it.
909 12:40:55.069455 PCI: 00:19.0 [8086/0000] bus ops
910 12:40:55.072799 PCI: 00:19.0 [8086/a0c5] disabled
911 12:40:55.076236 PCI: 00:19.1 [8086/0000] bus ops
912 12:40:55.079708 PCI: 00:19.1 [8086/a0c6] enabled
913 12:40:55.083183 PCI: 00:1d.0 [8086/0000] bus ops
914 12:40:55.087254 PCI: 00:1d.0 [8086/a0b0] enabled
915 12:40:55.089652 PCI: 00:1e.0 [8086/0000] ops
916 12:40:55.093137 PCI: 00:1e.0 [8086/a0a8] enabled
917 12:40:55.096407 PCI: 00:1e.2 [8086/0000] bus ops
918 12:40:55.100043 PCI: 00:1e.2 [8086/a0aa] enabled
919 12:40:55.102759 PCI: 00:1e.3 [8086/0000] bus ops
920 12:40:55.106020 PCI: 00:1e.3 [8086/a0ab] enabled
921 12:40:55.109660 PCI: 00:1f.0 [8086/0000] bus ops
922 12:40:55.112553 PCI: 00:1f.0 [8086/a087] enabled
923 12:40:55.113063 RTC Init
924 12:40:55.116281 Set power on after power failure.
925 12:40:55.119483 Disabling Deep S3
926 12:40:55.119900 Disabling Deep S3
927 12:40:55.122906 Disabling Deep S4
928 12:40:55.123324 Disabling Deep S4
929 12:40:55.125857 Disabling Deep S5
930 12:40:55.129162 Disabling Deep S5
931 12:40:55.132546 PCI: 00:1f.2 [0000/0000] hidden
932 12:40:55.135890 PCI: 00:1f.3 [8086/0000] bus ops
933 12:40:55.139465 PCI: 00:1f.3 [8086/a0c8] enabled
934 12:40:55.142401 PCI: 00:1f.5 [8086/0000] bus ops
935 12:40:55.146350 PCI: 00:1f.5 [8086/a0a4] enabled
936 12:40:55.146765 PCI: Leftover static devices:
937 12:40:55.149478 PCI: 00:10.2
938 12:40:55.149907 PCI: 00:10.6
939 12:40:55.152677 PCI: 00:10.7
940 12:40:55.153159 PCI: 00:06.0
941 12:40:55.155779 PCI: 00:07.1
942 12:40:55.156240 PCI: 00:07.2
943 12:40:55.156574 PCI: 00:07.3
944 12:40:55.159399 PCI: 00:09.0
945 12:40:55.159816 PCI: 00:0d.1
946 12:40:55.162662 PCI: 00:0d.2
947 12:40:55.163187 PCI: 00:0d.3
948 12:40:55.163517 PCI: 00:0e.0
949 12:40:55.166411 PCI: 00:12.0
950 12:40:55.166938 PCI: 00:12.6
951 12:40:55.169318 PCI: 00:13.0
952 12:40:55.169743 PCI: 00:14.1
953 12:40:55.172642 PCI: 00:16.1
954 12:40:55.173065 PCI: 00:16.2
955 12:40:55.173396 PCI: 00:16.3
956 12:40:55.176196 PCI: 00:16.4
957 12:40:55.176821 PCI: 00:16.5
958 12:40:55.179473 PCI: 00:17.0
959 12:40:55.179998 PCI: 00:19.2
960 12:40:55.180385 PCI: 00:1e.1
961 12:40:55.182436 PCI: 00:1f.1
962 12:40:55.182854 PCI: 00:1f.4
963 12:40:55.186099 PCI: 00:1f.6
964 12:40:55.186623 PCI: 00:1f.7
965 12:40:55.189289 PCI: Check your devicetree.cb.
966 12:40:55.192876 PCI: 00:02.0 scanning...
967 12:40:55.196216 scan_generic_bus for PCI: 00:02.0
968 12:40:55.199535 scan_generic_bus for PCI: 00:02.0 done
969 12:40:55.202378 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
970 12:40:55.206074 PCI: 00:04.0 scanning...
971 12:40:55.209124 scan_generic_bus for PCI: 00:04.0
972 12:40:55.212958 GENERIC: 0.0 enabled
973 12:40:55.219418 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
974 12:40:55.222656 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
975 12:40:55.225899 PCI: 00:0d.0 scanning...
976 12:40:55.229612 scan_static_bus for PCI: 00:0d.0
977 12:40:55.232518 USB0 port 0 enabled
978 12:40:55.232941 USB0 port 0 scanning...
979 12:40:55.235774 scan_static_bus for USB0 port 0
980 12:40:55.238957 USB3 port 0 enabled
981 12:40:55.242719 USB3 port 1 enabled
982 12:40:55.243235 USB3 port 2 disabled
983 12:40:55.246227 USB3 port 3 disabled
984 12:40:55.248907 USB3 port 0 scanning...
985 12:40:55.252273 scan_static_bus for USB3 port 0
986 12:40:55.256017 scan_static_bus for USB3 port 0 done
987 12:40:55.258882 scan_bus: bus USB3 port 0 finished in 6 msecs
988 12:40:55.262643 USB3 port 1 scanning...
989 12:40:55.265768 scan_static_bus for USB3 port 1
990 12:40:55.269263 scan_static_bus for USB3 port 1 done
991 12:40:55.275266 scan_bus: bus USB3 port 1 finished in 6 msecs
992 12:40:55.278642 scan_static_bus for USB0 port 0 done
993 12:40:55.282241 scan_bus: bus USB0 port 0 finished in 43 msecs
994 12:40:55.285212 scan_static_bus for PCI: 00:0d.0 done
995 12:40:55.292302 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
996 12:40:55.292729 PCI: 00:14.0 scanning...
997 12:40:55.295380 scan_static_bus for PCI: 00:14.0
998 12:40:55.299509 USB0 port 0 enabled
999 12:40:55.302069 USB0 port 0 scanning...
1000 12:40:55.305963 scan_static_bus for USB0 port 0
1001 12:40:55.308569 USB2 port 0 disabled
1002 12:40:55.309002 USB2 port 1 enabled
1003 12:40:55.312581 USB2 port 2 enabled
1004 12:40:55.313006 USB2 port 3 disabled
1005 12:40:55.315619 USB2 port 4 enabled
1006 12:40:55.319436 USB2 port 5 disabled
1007 12:40:55.319955 USB2 port 6 disabled
1008 12:40:55.322291 USB2 port 7 disabled
1009 12:40:55.325480 USB2 port 8 disabled
1010 12:40:55.326019 USB2 port 9 disabled
1011 12:40:55.329326 USB3 port 0 disabled
1012 12:40:55.332031 USB3 port 1 enabled
1013 12:40:55.332614 USB3 port 2 disabled
1014 12:40:55.335370 USB3 port 3 disabled
1015 12:40:55.338587 USB2 port 1 scanning...
1016 12:40:55.342271 scan_static_bus for USB2 port 1
1017 12:40:55.345283 scan_static_bus for USB2 port 1 done
1018 12:40:55.348619 scan_bus: bus USB2 port 1 finished in 6 msecs
1019 12:40:55.351962 USB2 port 2 scanning...
1020 12:40:55.355027 scan_static_bus for USB2 port 2
1021 12:40:55.358724 scan_static_bus for USB2 port 2 done
1022 12:40:55.361658 scan_bus: bus USB2 port 2 finished in 6 msecs
1023 12:40:55.365072 USB2 port 4 scanning...
1024 12:40:55.368220 scan_static_bus for USB2 port 4
1025 12:40:55.371711 scan_static_bus for USB2 port 4 done
1026 12:40:55.378966 scan_bus: bus USB2 port 4 finished in 6 msecs
1027 12:40:55.379479 USB3 port 1 scanning...
1028 12:40:55.381636 scan_static_bus for USB3 port 1
1029 12:40:55.388228 scan_static_bus for USB3 port 1 done
1030 12:40:55.391708 scan_bus: bus USB3 port 1 finished in 6 msecs
1031 12:40:55.394705 scan_static_bus for USB0 port 0 done
1032 12:40:55.398825 scan_bus: bus USB0 port 0 finished in 93 msecs
1033 12:40:55.405233 scan_static_bus for PCI: 00:14.0 done
1034 12:40:55.408391 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1035 12:40:55.411689 PCI: 00:14.3 scanning...
1036 12:40:55.415367 scan_static_bus for PCI: 00:14.3
1037 12:40:55.418137 GENERIC: 0.0 enabled
1038 12:40:55.421875 scan_static_bus for PCI: 00:14.3 done
1039 12:40:55.425009 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1040 12:40:55.428230 PCI: 00:15.0 scanning...
1041 12:40:55.432127 scan_static_bus for PCI: 00:15.0
1042 12:40:55.435037 I2C: 00:1a enabled
1043 12:40:55.435502 I2C: 00:31 enabled
1044 12:40:55.438396 I2C: 00:32 enabled
1045 12:40:55.442252 scan_static_bus for PCI: 00:15.0 done
1046 12:40:55.445327 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1047 12:40:55.447970 PCI: 00:15.1 scanning...
1048 12:40:55.451211 scan_static_bus for PCI: 00:15.1
1049 12:40:55.455131 I2C: 00:10 enabled
1050 12:40:55.458302 scan_static_bus for PCI: 00:15.1 done
1051 12:40:55.461597 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1052 12:40:55.464985 PCI: 00:15.2 scanning...
1053 12:40:55.468208 scan_static_bus for PCI: 00:15.2
1054 12:40:55.471539 scan_static_bus for PCI: 00:15.2 done
1055 12:40:55.478091 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1056 12:40:55.478609 PCI: 00:15.3 scanning...
1057 12:40:55.481516 scan_static_bus for PCI: 00:15.3
1058 12:40:55.488339 scan_static_bus for PCI: 00:15.3 done
1059 12:40:55.491961 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1060 12:40:55.494678 PCI: 00:19.1 scanning...
1061 12:40:55.498815 scan_static_bus for PCI: 00:19.1
1062 12:40:55.499230 I2C: 00:15 enabled
1063 12:40:55.504581 scan_static_bus for PCI: 00:19.1 done
1064 12:40:55.508199 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1065 12:40:55.511709 PCI: 00:1d.0 scanning...
1066 12:40:55.515060 do_pci_scan_bridge for PCI: 00:1d.0
1067 12:40:55.518213 PCI: pci_scan_bus for bus 01
1068 12:40:55.521852 PCI: 01:00.0 [1c5c/174a] enabled
1069 12:40:55.522338 GENERIC: 0.0 enabled
1070 12:40:55.528289 Enabling Common Clock Configuration
1071 12:40:55.531702 L1 Sub-State supported from root port 29
1072 12:40:55.535070 L1 Sub-State Support = 0xf
1073 12:40:55.538150 CommonModeRestoreTime = 0x28
1074 12:40:55.541405 Power On Value = 0x16, Power On Scale = 0x0
1075 12:40:55.541951 ASPM: Enabled L1
1076 12:40:55.548171 PCIe: Max_Payload_Size adjusted to 128
1077 12:40:55.551429 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1078 12:40:55.555018 PCI: 00:1e.2 scanning...
1079 12:40:55.558267 scan_generic_bus for PCI: 00:1e.2
1080 12:40:55.558763 SPI: 00 enabled
1081 12:40:55.564903 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1082 12:40:55.571373 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1083 12:40:55.571881 PCI: 00:1e.3 scanning...
1084 12:40:55.578438 scan_generic_bus for PCI: 00:1e.3
1085 12:40:55.578918 SPI: 00 enabled
1086 12:40:55.584789 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1087 12:40:55.588253 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1088 12:40:55.591230 PCI: 00:1f.0 scanning...
1089 12:40:55.594898 scan_static_bus for PCI: 00:1f.0
1090 12:40:55.598015 PNP: 0c09.0 enabled
1091 12:40:55.598428 PNP: 0c09.0 scanning...
1092 12:40:55.601490 scan_static_bus for PNP: 0c09.0
1093 12:40:55.608109 scan_static_bus for PNP: 0c09.0 done
1094 12:40:55.612092 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1095 12:40:55.615368 scan_static_bus for PCI: 00:1f.0 done
1096 12:40:55.622231 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1097 12:40:55.622716 PCI: 00:1f.2 scanning...
1098 12:40:55.624819 scan_static_bus for PCI: 00:1f.2
1099 12:40:55.628516 GENERIC: 0.0 enabled
1100 12:40:55.631934 GENERIC: 0.0 scanning...
1101 12:40:55.635166 scan_static_bus for GENERIC: 0.0
1102 12:40:55.635647 GENERIC: 0.0 enabled
1103 12:40:55.638059 GENERIC: 1.0 enabled
1104 12:40:55.641382 scan_static_bus for GENERIC: 0.0 done
1105 12:40:55.648340 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1106 12:40:55.651783 scan_static_bus for PCI: 00:1f.2 done
1107 12:40:55.655014 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1108 12:40:55.658458 PCI: 00:1f.3 scanning...
1109 12:40:55.661526 scan_static_bus for PCI: 00:1f.3
1110 12:40:55.664761 scan_static_bus for PCI: 00:1f.3 done
1111 12:40:55.671434 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1112 12:40:55.671919 PCI: 00:1f.5 scanning...
1113 12:40:55.678211 scan_generic_bus for PCI: 00:1f.5
1114 12:40:55.681444 scan_generic_bus for PCI: 00:1f.5 done
1115 12:40:55.685363 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1116 12:40:55.692162 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1117 12:40:55.694913 scan_static_bus for Root Device done
1118 12:40:55.698306 scan_bus: bus Root Device finished in 736 msecs
1119 12:40:55.698725 done
1120 12:40:55.704868 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1121 12:40:55.708347 Chrome EC: UHEPI supported
1122 12:40:55.714695 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1123 12:40:55.721421 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1124 12:40:55.724698 SPI flash protection: WPSW=0 SRP0=0
1125 12:40:55.727990 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1126 12:40:55.735183 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1127 12:40:55.737713 found VGA at PCI: 00:02.0
1128 12:40:55.741011 Setting up VGA for PCI: 00:02.0
1129 12:40:55.748046 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1130 12:40:55.751148 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1131 12:40:55.754772 Allocating resources...
1132 12:40:55.755182 Reading resources...
1133 12:40:55.760949 Root Device read_resources bus 0 link: 0
1134 12:40:55.764737 DOMAIN: 0000 read_resources bus 0 link: 0
1135 12:40:55.771054 PCI: 00:04.0 read_resources bus 1 link: 0
1136 12:40:55.774616 PCI: 00:04.0 read_resources bus 1 link: 0 done
1137 12:40:55.780876 PCI: 00:0d.0 read_resources bus 0 link: 0
1138 12:40:55.784155 USB0 port 0 read_resources bus 0 link: 0
1139 12:40:55.791017 USB0 port 0 read_resources bus 0 link: 0 done
1140 12:40:55.794508 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1141 12:40:55.797633 PCI: 00:14.0 read_resources bus 0 link: 0
1142 12:40:55.804005 USB0 port 0 read_resources bus 0 link: 0
1143 12:40:55.807119 USB0 port 0 read_resources bus 0 link: 0 done
1144 12:40:55.814586 PCI: 00:14.0 read_resources bus 0 link: 0 done
1145 12:40:55.817577 PCI: 00:14.3 read_resources bus 0 link: 0
1146 12:40:55.824667 PCI: 00:14.3 read_resources bus 0 link: 0 done
1147 12:40:55.827548 PCI: 00:15.0 read_resources bus 0 link: 0
1148 12:40:55.834708 PCI: 00:15.0 read_resources bus 0 link: 0 done
1149 12:40:55.837641 PCI: 00:15.1 read_resources bus 0 link: 0
1150 12:40:55.844789 PCI: 00:15.1 read_resources bus 0 link: 0 done
1151 12:40:55.848099 PCI: 00:19.1 read_resources bus 0 link: 0
1152 12:40:55.854628 PCI: 00:19.1 read_resources bus 0 link: 0 done
1153 12:40:55.858615 PCI: 00:1d.0 read_resources bus 1 link: 0
1154 12:40:55.864592 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1155 12:40:55.868258 PCI: 00:1e.2 read_resources bus 2 link: 0
1156 12:40:55.874892 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1157 12:40:55.877843 PCI: 00:1e.3 read_resources bus 3 link: 0
1158 12:40:55.884787 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1159 12:40:55.887804 PCI: 00:1f.0 read_resources bus 0 link: 0
1160 12:40:55.894657 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1161 12:40:55.897744 PCI: 00:1f.2 read_resources bus 0 link: 0
1162 12:40:55.901335 GENERIC: 0.0 read_resources bus 0 link: 0
1163 12:40:55.908529 GENERIC: 0.0 read_resources bus 0 link: 0 done
1164 12:40:55.911416 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1165 12:40:55.918868 DOMAIN: 0000 read_resources bus 0 link: 0 done
1166 12:40:55.922337 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1167 12:40:55.928993 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1168 12:40:55.932005 Root Device read_resources bus 0 link: 0 done
1169 12:40:55.935232 Done reading resources.
1170 12:40:55.942186 Show resources in subtree (Root Device)...After reading.
1171 12:40:55.945689 Root Device child on link 0 DOMAIN: 0000
1172 12:40:55.948892 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1173 12:40:55.958712 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1174 12:40:55.968759 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1175 12:40:55.972117 PCI: 00:00.0
1176 12:40:55.979071 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1177 12:40:55.988640 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1178 12:40:55.998680 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1179 12:40:56.008864 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1180 12:40:56.018785 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1181 12:40:56.028655 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1182 12:40:56.035311 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1183 12:40:56.045164 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1184 12:40:56.055191 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1185 12:40:56.064906 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1186 12:40:56.075009 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1187 12:40:56.084864 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1188 12:40:56.092154 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1189 12:40:56.101443 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1190 12:40:56.111930 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1191 12:40:56.121384 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1192 12:40:56.131674 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1193 12:40:56.141865 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1194 12:40:56.148140 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1195 12:40:56.158251 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1196 12:40:56.161158 PCI: 00:02.0
1197 12:40:56.171165 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 12:40:56.181294 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1199 12:40:56.191101 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1200 12:40:56.194340 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1201 12:40:56.204594 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1202 12:40:56.205055 GENERIC: 0.0
1203 12:40:56.207479 PCI: 00:05.0
1204 12:40:56.217849 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 12:40:56.220942 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1206 12:40:56.224228 GENERIC: 0.0
1207 12:40:56.224647 PCI: 00:08.0
1208 12:40:56.234474 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 12:40:56.237448 PCI: 00:0a.0
1210 12:40:56.241039 PCI: 00:0d.0 child on link 0 USB0 port 0
1211 12:40:56.250840 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 12:40:56.257596 USB0 port 0 child on link 0 USB3 port 0
1213 12:40:56.258159 USB3 port 0
1214 12:40:56.261050 USB3 port 1
1215 12:40:56.261543 USB3 port 2
1216 12:40:56.264195 USB3 port 3
1217 12:40:56.267649 PCI: 00:14.0 child on link 0 USB0 port 0
1218 12:40:56.277877 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1219 12:40:56.280968 USB0 port 0 child on link 0 USB2 port 0
1220 12:40:56.284195 USB2 port 0
1221 12:40:56.284617 USB2 port 1
1222 12:40:56.288310 USB2 port 2
1223 12:40:56.290721 USB2 port 3
1224 12:40:56.291142 USB2 port 4
1225 12:40:56.294293 USB2 port 5
1226 12:40:56.294712 USB2 port 6
1227 12:40:56.297825 USB2 port 7
1228 12:40:56.298366 USB2 port 8
1229 12:40:56.300810 USB2 port 9
1230 12:40:56.301242 USB3 port 0
1231 12:40:56.304542 USB3 port 1
1232 12:40:56.305050 USB3 port 2
1233 12:40:56.308495 USB3 port 3
1234 12:40:56.308912 PCI: 00:14.2
1235 12:40:56.317471 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 12:40:56.327281 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1237 12:40:56.334303 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1238 12:40:56.343841 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 12:40:56.344318 GENERIC: 0.0
1240 12:40:56.350693 PCI: 00:15.0 child on link 0 I2C: 00:1a
1241 12:40:56.360400 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 12:40:56.360824 I2C: 00:1a
1243 12:40:56.361148 I2C: 00:31
1244 12:40:56.363927 I2C: 00:32
1245 12:40:56.367625 PCI: 00:15.1 child on link 0 I2C: 00:10
1246 12:40:56.377745 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 12:40:56.380717 I2C: 00:10
1248 12:40:56.381137 PCI: 00:15.2
1249 12:40:56.390430 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 12:40:56.393886 PCI: 00:15.3
1251 12:40:56.403688 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1252 12:40:56.404210 PCI: 00:16.0
1253 12:40:56.414306 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 12:40:56.416847 PCI: 00:19.0
1255 12:40:56.420672 PCI: 00:19.1 child on link 0 I2C: 00:15
1256 12:40:56.430558 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 12:40:56.431039 I2C: 00:15
1258 12:40:56.436990 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1259 12:40:56.443649 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1260 12:40:56.453334 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1261 12:40:56.463312 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1262 12:40:56.467580 GENERIC: 0.0
1263 12:40:56.468107 PCI: 01:00.0
1264 12:40:56.476516 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1265 12:40:56.486929 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1266 12:40:56.496189 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1267 12:40:56.496724 PCI: 00:1e.0
1268 12:40:56.510270 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1269 12:40:56.513109 PCI: 00:1e.2 child on link 0 SPI: 00
1270 12:40:56.524673 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1271 12:40:56.525312 SPI: 00
1272 12:40:56.527197 PCI: 00:1e.3 child on link 0 SPI: 00
1273 12:40:56.536683 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1274 12:40:56.539984 SPI: 00
1275 12:40:56.543491 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1276 12:40:56.553469 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1277 12:40:56.553954 PNP: 0c09.0
1278 12:40:56.563191 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1279 12:40:56.566680 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1280 12:40:56.576797 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1281 12:40:56.586645 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1282 12:40:56.589649 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1283 12:40:56.593234 GENERIC: 0.0
1284 12:40:56.593655 GENERIC: 1.0
1285 12:40:56.596742 PCI: 00:1f.3
1286 12:40:56.606284 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1287 12:40:56.617019 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1288 12:40:56.617504 PCI: 00:1f.5
1289 12:40:56.627141 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1290 12:40:56.630255 CPU_CLUSTER: 0 child on link 0 APIC: 00
1291 12:40:56.633114 APIC: 00
1292 12:40:56.633631 APIC: 01
1293 12:40:56.633964 APIC: 03
1294 12:40:56.636900 APIC: 06
1295 12:40:56.637555 APIC: 04
1296 12:40:56.640368 APIC: 05
1297 12:40:56.640883 APIC: 02
1298 12:40:56.641213 APIC: 07
1299 12:40:56.650639 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1300 12:40:56.653458 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1301 12:40:56.660214 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1302 12:40:56.666918 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1303 12:40:56.669679 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1304 12:40:56.676775 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1305 12:40:56.679960 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1306 12:40:56.686534 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1307 12:40:56.693260 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1308 12:40:56.703139 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1309 12:40:56.710265 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1310 12:40:56.716517 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1311 12:40:56.723087 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1312 12:40:56.730071 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1313 12:40:56.736492 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1314 12:40:56.740238 DOMAIN: 0000: Resource ranges:
1315 12:40:56.746589 * Base: 1000, Size: 800, Tag: 100
1316 12:40:56.749948 * Base: 1900, Size: e700, Tag: 100
1317 12:40:56.753066 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1318 12:40:56.759547 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1319 12:40:56.766530 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1320 12:40:56.775984 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1321 12:40:56.783546 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1322 12:40:56.789840 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1323 12:40:56.799846 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1324 12:40:56.805862 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1325 12:40:56.812989 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1326 12:40:56.819989 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1327 12:40:56.829597 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1328 12:40:56.836524 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1329 12:40:56.842611 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1330 12:40:56.852718 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1331 12:40:56.859086 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1332 12:40:56.866097 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1333 12:40:56.875710 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1334 12:40:56.882471 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1335 12:40:56.889532 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1336 12:40:56.898850 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1337 12:40:56.905642 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1338 12:40:56.912377 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1339 12:40:56.922781 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1340 12:40:56.929135 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1341 12:40:56.936274 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1342 12:40:56.938563 DOMAIN: 0000: Resource ranges:
1343 12:40:56.945648 * Base: 7fc00000, Size: 40400000, Tag: 200
1344 12:40:56.948733 * Base: d0000000, Size: 28000000, Tag: 200
1345 12:40:56.952613 * Base: fa000000, Size: 1000000, Tag: 200
1346 12:40:56.958283 * Base: fb001000, Size: 2fff000, Tag: 200
1347 12:40:56.962153 * Base: fe010000, Size: 2e000, Tag: 200
1348 12:40:56.965641 * Base: fe03f000, Size: d41000, Tag: 200
1349 12:40:56.968976 * Base: fed88000, Size: 8000, Tag: 200
1350 12:40:56.975387 * Base: fed93000, Size: d000, Tag: 200
1351 12:40:56.978695 * Base: feda2000, Size: 1e000, Tag: 200
1352 12:40:56.982361 * Base: fede0000, Size: 1220000, Tag: 200
1353 12:40:56.988705 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1354 12:40:56.995422 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1355 12:40:57.001595 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1356 12:40:57.008669 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1357 12:40:57.014952 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1358 12:40:57.021415 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1359 12:40:57.028302 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1360 12:40:57.035306 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1361 12:40:57.041557 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1362 12:40:57.048406 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1363 12:40:57.055201 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1364 12:40:57.062057 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1365 12:40:57.068038 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1366 12:40:57.075640 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1367 12:40:57.081604 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1368 12:40:57.088274 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1369 12:40:57.094889 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1370 12:40:57.101318 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1371 12:40:57.107780 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1372 12:40:57.114937 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1373 12:40:57.122120 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1374 12:40:57.127824 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1375 12:40:57.134561 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1376 12:40:57.141354 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1377 12:40:57.147882 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1378 12:40:57.151881 PCI: 00:1d.0: Resource ranges:
1379 12:40:57.155378 * Base: 7fc00000, Size: 100000, Tag: 200
1380 12:40:57.161468 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1381 12:40:57.168640 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1382 12:40:57.174801 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1383 12:40:57.184635 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1384 12:40:57.191069 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1385 12:40:57.195066 Root Device assign_resources, bus 0 link: 0
1386 12:40:57.201367 DOMAIN: 0000 assign_resources, bus 0 link: 0
1387 12:40:57.207889 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1388 12:40:57.218113 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1389 12:40:57.224337 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1390 12:40:57.234851 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1391 12:40:57.237342 PCI: 00:04.0 assign_resources, bus 1 link: 0
1392 12:40:57.243756 PCI: 00:04.0 assign_resources, bus 1 link: 0
1393 12:40:57.250367 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1394 12:40:57.260597 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1395 12:40:57.267410 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1396 12:40:57.270494 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1397 12:40:57.277250 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1398 12:40:57.283498 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1399 12:40:57.290032 PCI: 00:14.0 assign_resources, bus 0 link: 0
1400 12:40:57.293432 PCI: 00:14.0 assign_resources, bus 0 link: 0
1401 12:40:57.303736 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1402 12:40:57.310431 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1403 12:40:57.316870 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1404 12:40:57.323651 PCI: 00:14.3 assign_resources, bus 0 link: 0
1405 12:40:57.327045 PCI: 00:14.3 assign_resources, bus 0 link: 0
1406 12:40:57.336816 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1407 12:40:57.340222 PCI: 00:15.0 assign_resources, bus 0 link: 0
1408 12:40:57.347285 PCI: 00:15.0 assign_resources, bus 0 link: 0
1409 12:40:57.353549 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1410 12:40:57.356474 PCI: 00:15.1 assign_resources, bus 0 link: 0
1411 12:40:57.363040 PCI: 00:15.1 assign_resources, bus 0 link: 0
1412 12:40:57.370348 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1413 12:40:57.380301 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1414 12:40:57.386685 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1415 12:40:57.396767 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1416 12:40:57.399705 PCI: 00:19.1 assign_resources, bus 0 link: 0
1417 12:40:57.406358 PCI: 00:19.1 assign_resources, bus 0 link: 0
1418 12:40:57.412997 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1419 12:40:57.423248 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1420 12:40:57.432972 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1421 12:40:57.436407 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1422 12:40:57.446389 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1423 12:40:57.453357 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1424 12:40:57.459197 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1425 12:40:57.466202 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1426 12:40:57.472541 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1427 12:40:57.479691 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1428 12:40:57.483425 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1429 12:40:57.492887 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1430 12:40:57.496022 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1431 12:40:57.499668 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1432 12:40:57.505812 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1433 12:40:57.509802 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1434 12:40:57.516146 LPC: Trying to open IO window from 800 size 1ff
1435 12:40:57.522710 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1436 12:40:57.532644 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1437 12:40:57.539389 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1438 12:40:57.542782 DOMAIN: 0000 assign_resources, bus 0 link: 0
1439 12:40:57.549658 Root Device assign_resources, bus 0 link: 0
1440 12:40:57.552669 Done setting resources.
1441 12:40:57.560201 Show resources in subtree (Root Device)...After assigning values.
1442 12:40:57.562719 Root Device child on link 0 DOMAIN: 0000
1443 12:40:57.566257 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1444 12:40:57.575537 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1445 12:40:57.585808 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1446 12:40:57.586461 PCI: 00:00.0
1447 12:40:57.596173 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1448 12:40:57.605572 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1449 12:40:57.615853 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1450 12:40:57.626106 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1451 12:40:57.635743 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1452 12:40:57.642074 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1453 12:40:57.652751 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1454 12:40:57.661766 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1455 12:40:57.671795 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1456 12:40:57.682765 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1457 12:40:57.692018 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1458 12:40:57.698360 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1459 12:40:57.708530 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1460 12:40:57.718937 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1461 12:40:57.728687 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1462 12:40:57.738688 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1463 12:40:57.748734 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1464 12:40:57.755590 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1465 12:40:57.765139 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1466 12:40:57.775134 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1467 12:40:57.778253 PCI: 00:02.0
1468 12:40:57.788327 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1469 12:40:57.798418 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1470 12:40:57.807971 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1471 12:40:57.811452 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1472 12:40:57.821732 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1473 12:40:57.825107 GENERIC: 0.0
1474 12:40:57.825612 PCI: 00:05.0
1475 12:40:57.838284 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1476 12:40:57.841439 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1477 12:40:57.841961 GENERIC: 0.0
1478 12:40:57.844862 PCI: 00:08.0
1479 12:40:57.855055 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1480 12:40:57.858560 PCI: 00:0a.0
1481 12:40:57.861270 PCI: 00:0d.0 child on link 0 USB0 port 0
1482 12:40:57.871293 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1483 12:40:57.875202 USB0 port 0 child on link 0 USB3 port 0
1484 12:40:57.878296 USB3 port 0
1485 12:40:57.878800 USB3 port 1
1486 12:40:57.881444 USB3 port 2
1487 12:40:57.881950 USB3 port 3
1488 12:40:57.888160 PCI: 00:14.0 child on link 0 USB0 port 0
1489 12:40:57.898129 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1490 12:40:57.901301 USB0 port 0 child on link 0 USB2 port 0
1491 12:40:57.904757 USB2 port 0
1492 12:40:57.905173 USB2 port 1
1493 12:40:57.908292 USB2 port 2
1494 12:40:57.908813 USB2 port 3
1495 12:40:57.911548 USB2 port 4
1496 12:40:57.911968 USB2 port 5
1497 12:40:57.914315 USB2 port 6
1498 12:40:57.914773 USB2 port 7
1499 12:40:57.917832 USB2 port 8
1500 12:40:57.921661 USB2 port 9
1501 12:40:57.922196 USB3 port 0
1502 12:40:57.924852 USB3 port 1
1503 12:40:57.925368 USB3 port 2
1504 12:40:57.928304 USB3 port 3
1505 12:40:57.928810 PCI: 00:14.2
1506 12:40:57.943044 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1507 12:40:57.947882 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1508 12:40:57.954820 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1509 12:40:57.964468 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1510 12:40:57.964956 GENERIC: 0.0
1511 12:40:57.971206 PCI: 00:15.0 child on link 0 I2C: 00:1a
1512 12:40:57.981007 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1513 12:40:57.981434 I2C: 00:1a
1514 12:40:57.984715 I2C: 00:31
1515 12:40:57.985268 I2C: 00:32
1516 12:40:57.990999 PCI: 00:15.1 child on link 0 I2C: 00:10
1517 12:40:58.000771 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1518 12:40:58.001196 I2C: 00:10
1519 12:40:58.004129 PCI: 00:15.2
1520 12:40:58.014178 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1521 12:40:58.014502 PCI: 00:15.3
1522 12:40:58.024122 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1523 12:40:58.027172 PCI: 00:16.0
1524 12:40:58.037261 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1525 12:40:58.037570 PCI: 00:19.0
1526 12:40:58.043724 PCI: 00:19.1 child on link 0 I2C: 00:15
1527 12:40:58.054403 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1528 12:40:58.054910 I2C: 00:15
1529 12:40:58.060785 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1530 12:40:58.067210 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1531 12:40:58.080404 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1532 12:40:58.090706 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1533 12:40:58.093741 GENERIC: 0.0
1534 12:40:58.094160 PCI: 01:00.0
1535 12:40:58.104135 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1536 12:40:58.113695 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1537 12:40:58.127294 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1538 12:40:58.127813 PCI: 00:1e.0
1539 12:40:58.137039 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1540 12:40:58.143527 PCI: 00:1e.2 child on link 0 SPI: 00
1541 12:40:58.153531 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1542 12:40:58.154010 SPI: 00
1543 12:40:58.157018 PCI: 00:1e.3 child on link 0 SPI: 00
1544 12:40:58.169979 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1545 12:40:58.170487 SPI: 00
1546 12:40:58.173295 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1547 12:40:58.183708 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1548 12:40:58.184162 PNP: 0c09.0
1549 12:40:58.193579 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1550 12:40:58.196891 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1551 12:40:58.207116 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1552 12:40:58.216869 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1553 12:40:58.220513 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1554 12:40:58.223468 GENERIC: 0.0
1555 12:40:58.223883 GENERIC: 1.0
1556 12:40:58.226717 PCI: 00:1f.3
1557 12:40:58.236718 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1558 12:40:58.246596 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1559 12:40:58.249840 PCI: 00:1f.5
1560 12:40:58.260221 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1561 12:40:58.263839 CPU_CLUSTER: 0 child on link 0 APIC: 00
1562 12:40:58.264491 APIC: 00
1563 12:40:58.266912 APIC: 01
1564 12:40:58.267323 APIC: 03
1565 12:40:58.270168 APIC: 06
1566 12:40:58.270685 APIC: 04
1567 12:40:58.271016 APIC: 05
1568 12:40:58.273513 APIC: 02
1569 12:40:58.273925 APIC: 07
1570 12:40:58.276617 Done allocating resources.
1571 12:40:58.283941 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1572 12:40:58.289700 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1573 12:40:58.293342 Configure GPIOs for I2S audio on UP4.
1574 12:40:58.299859 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1575 12:40:58.303190 Enabling resources...
1576 12:40:58.306594 PCI: 00:00.0 subsystem <- 8086/9a12
1577 12:40:58.310384 PCI: 00:00.0 cmd <- 06
1578 12:40:58.313284 PCI: 00:02.0 subsystem <- 8086/9a40
1579 12:40:58.313702 PCI: 00:02.0 cmd <- 03
1580 12:40:58.319767 PCI: 00:04.0 subsystem <- 8086/9a03
1581 12:40:58.320297 PCI: 00:04.0 cmd <- 02
1582 12:40:58.322738 PCI: 00:05.0 subsystem <- 8086/9a19
1583 12:40:58.326299 PCI: 00:05.0 cmd <- 02
1584 12:40:58.329777 PCI: 00:08.0 subsystem <- 8086/9a11
1585 12:40:58.332642 PCI: 00:08.0 cmd <- 06
1586 12:40:58.336128 PCI: 00:0d.0 subsystem <- 8086/9a13
1587 12:40:58.339574 PCI: 00:0d.0 cmd <- 02
1588 12:40:58.342552 PCI: 00:14.0 subsystem <- 8086/a0ed
1589 12:40:58.346147 PCI: 00:14.0 cmd <- 02
1590 12:40:58.349603 PCI: 00:14.2 subsystem <- 8086/a0ef
1591 12:40:58.352885 PCI: 00:14.2 cmd <- 02
1592 12:40:58.356136 PCI: 00:14.3 subsystem <- 8086/a0f0
1593 12:40:58.359683 PCI: 00:14.3 cmd <- 02
1594 12:40:58.362757 PCI: 00:15.0 subsystem <- 8086/a0e8
1595 12:40:58.363168 PCI: 00:15.0 cmd <- 02
1596 12:40:58.369500 PCI: 00:15.1 subsystem <- 8086/a0e9
1597 12:40:58.369913 PCI: 00:15.1 cmd <- 02
1598 12:40:58.372391 PCI: 00:15.2 subsystem <- 8086/a0ea
1599 12:40:58.375996 PCI: 00:15.2 cmd <- 02
1600 12:40:58.379264 PCI: 00:15.3 subsystem <- 8086/a0eb
1601 12:40:58.382624 PCI: 00:15.3 cmd <- 02
1602 12:40:58.385841 PCI: 00:16.0 subsystem <- 8086/a0e0
1603 12:40:58.389767 PCI: 00:16.0 cmd <- 02
1604 12:40:58.392500 PCI: 00:19.1 subsystem <- 8086/a0c6
1605 12:40:58.395793 PCI: 00:19.1 cmd <- 02
1606 12:40:58.399360 PCI: 00:1d.0 bridge ctrl <- 0013
1607 12:40:58.403239 PCI: 00:1d.0 subsystem <- 8086/a0b0
1608 12:40:58.405922 PCI: 00:1d.0 cmd <- 06
1609 12:40:58.409065 PCI: 00:1e.0 subsystem <- 8086/a0a8
1610 12:40:58.409444 PCI: 00:1e.0 cmd <- 06
1611 12:40:58.415919 PCI: 00:1e.2 subsystem <- 8086/a0aa
1612 12:40:58.416366 PCI: 00:1e.2 cmd <- 06
1613 12:40:58.419098 PCI: 00:1e.3 subsystem <- 8086/a0ab
1614 12:40:58.423038 PCI: 00:1e.3 cmd <- 02
1615 12:40:58.426065 PCI: 00:1f.0 subsystem <- 8086/a087
1616 12:40:58.429549 PCI: 00:1f.0 cmd <- 407
1617 12:40:58.432880 PCI: 00:1f.3 subsystem <- 8086/a0c8
1618 12:40:58.436204 PCI: 00:1f.3 cmd <- 02
1619 12:40:58.439482 PCI: 00:1f.5 subsystem <- 8086/a0a4
1620 12:40:58.441944 PCI: 00:1f.5 cmd <- 406
1621 12:40:58.446100 PCI: 01:00.0 cmd <- 02
1622 12:40:58.451285 done.
1623 12:40:58.454336 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1624 12:40:58.457801 Initializing devices...
1625 12:40:58.460598 Root Device init
1626 12:40:58.464220 Chrome EC: Set SMI mask to 0x0000000000000000
1627 12:40:58.470940 Chrome EC: clear events_b mask to 0x0000000000000000
1628 12:40:58.477324 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1629 12:40:58.480762 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1630 12:40:58.488112 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1631 12:40:58.494481 Chrome EC: Set WAKE mask to 0x0000000000000000
1632 12:40:58.497822 fw_config match found: DB_USB=USB3_ACTIVE
1633 12:40:58.504663 Configure Right Type-C port orientation for retimer
1634 12:40:58.507866 Root Device init finished in 44 msecs
1635 12:40:58.511374 PCI: 00:00.0 init
1636 12:40:58.514494 CPU TDP = 9 Watts
1637 12:40:58.515005 CPU PL1 = 9 Watts
1638 12:40:58.518015 CPU PL2 = 40 Watts
1639 12:40:58.521171 CPU PL4 = 83 Watts
1640 12:40:58.524406 PCI: 00:00.0 init finished in 8 msecs
1641 12:40:58.524823 PCI: 00:02.0 init
1642 12:40:58.528032 GMA: Found VBT in CBFS
1643 12:40:58.531512 GMA: Found valid VBT in CBFS
1644 12:40:58.537843 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1645 12:40:58.544854 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1646 12:40:58.547648 PCI: 00:02.0 init finished in 18 msecs
1647 12:40:58.551166 PCI: 00:05.0 init
1648 12:40:58.554479 PCI: 00:05.0 init finished in 0 msecs
1649 12:40:58.558206 PCI: 00:08.0 init
1650 12:40:58.561195 PCI: 00:08.0 init finished in 0 msecs
1651 12:40:58.564515 PCI: 00:14.0 init
1652 12:40:58.568221 PCI: 00:14.0 init finished in 0 msecs
1653 12:40:58.571388 PCI: 00:14.2 init
1654 12:40:58.574510 PCI: 00:14.2 init finished in 0 msecs
1655 12:40:58.578197 PCI: 00:15.0 init
1656 12:40:58.578718 I2C bus 0 version 0x3230302a
1657 12:40:58.584230 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1658 12:40:58.587812 PCI: 00:15.0 init finished in 6 msecs
1659 12:40:58.588418 PCI: 00:15.1 init
1660 12:40:58.590998 I2C bus 1 version 0x3230302a
1661 12:40:58.594600 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1662 12:40:58.597542 PCI: 00:15.1 init finished in 6 msecs
1663 12:40:58.601293 PCI: 00:15.2 init
1664 12:40:58.604390 I2C bus 2 version 0x3230302a
1665 12:40:58.608098 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1666 12:40:58.611708 PCI: 00:15.2 init finished in 6 msecs
1667 12:40:58.614732 PCI: 00:15.3 init
1668 12:40:58.618547 I2C bus 3 version 0x3230302a
1669 12:40:58.621487 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1670 12:40:58.624855 PCI: 00:15.3 init finished in 6 msecs
1671 12:40:58.628433 PCI: 00:16.0 init
1672 12:40:58.631328 PCI: 00:16.0 init finished in 0 msecs
1673 12:40:58.634641 PCI: 00:19.1 init
1674 12:40:58.635093 I2C bus 5 version 0x3230302a
1675 12:40:58.641088 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1676 12:40:58.644560 PCI: 00:19.1 init finished in 6 msecs
1677 12:40:58.645117 PCI: 00:1d.0 init
1678 12:40:58.647750 Initializing PCH PCIe bridge.
1679 12:40:58.651372 PCI: 00:1d.0 init finished in 3 msecs
1680 12:40:58.655619 PCI: 00:1f.0 init
1681 12:40:58.658948 IOAPIC: Initializing IOAPIC at 0xfec00000
1682 12:40:58.665603 IOAPIC: Bootstrap Processor Local APIC = 0x00
1683 12:40:58.666120 IOAPIC: ID = 0x02
1684 12:40:58.668771 IOAPIC: Dumping registers
1685 12:40:58.672756 reg 0x0000: 0x02000000
1686 12:40:58.676200 reg 0x0001: 0x00770020
1687 12:40:58.676712 reg 0x0002: 0x00000000
1688 12:40:58.682030 PCI: 00:1f.0 init finished in 21 msecs
1689 12:40:58.682509 PCI: 00:1f.2 init
1690 12:40:58.686179 Disabling ACPI via APMC.
1691 12:40:58.689388 APMC done.
1692 12:40:58.692711 PCI: 00:1f.2 init finished in 5 msecs
1693 12:40:58.704396 PCI: 01:00.0 init
1694 12:40:58.707974 PCI: 01:00.0 init finished in 0 msecs
1695 12:40:58.710876 PNP: 0c09.0 init
1696 12:40:58.714581 Google Chrome EC uptime: 8.373 seconds
1697 12:40:58.721914 Google Chrome AP resets since EC boot: 1
1698 12:40:58.724423 Google Chrome most recent AP reset causes:
1699 12:40:58.728481 0.349: 32775 shutdown: entering G3
1700 12:40:58.734976 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1701 12:40:58.737902 PNP: 0c09.0 init finished in 22 msecs
1702 12:40:58.743145 Devices initialized
1703 12:40:58.746947 Show all devs... After init.
1704 12:40:58.750088 Root Device: enabled 1
1705 12:40:58.750519 DOMAIN: 0000: enabled 1
1706 12:40:58.753592 CPU_CLUSTER: 0: enabled 1
1707 12:40:58.756630 PCI: 00:00.0: enabled 1
1708 12:40:58.760166 PCI: 00:02.0: enabled 1
1709 12:40:58.760580 PCI: 00:04.0: enabled 1
1710 12:40:58.763003 PCI: 00:05.0: enabled 1
1711 12:40:58.766510 PCI: 00:06.0: enabled 0
1712 12:40:58.770208 PCI: 00:07.0: enabled 0
1713 12:40:58.770723 PCI: 00:07.1: enabled 0
1714 12:40:58.773795 PCI: 00:07.2: enabled 0
1715 12:40:58.776568 PCI: 00:07.3: enabled 0
1716 12:40:58.780162 PCI: 00:08.0: enabled 1
1717 12:40:58.780576 PCI: 00:09.0: enabled 0
1718 12:40:58.783465 PCI: 00:0a.0: enabled 0
1719 12:40:58.787151 PCI: 00:0d.0: enabled 1
1720 12:40:58.787669 PCI: 00:0d.1: enabled 0
1721 12:40:58.790025 PCI: 00:0d.2: enabled 0
1722 12:40:58.793388 PCI: 00:0d.3: enabled 0
1723 12:40:58.796443 PCI: 00:0e.0: enabled 0
1724 12:40:58.796859 PCI: 00:10.2: enabled 1
1725 12:40:58.799932 PCI: 00:10.6: enabled 0
1726 12:40:58.803577 PCI: 00:10.7: enabled 0
1727 12:40:58.806844 PCI: 00:12.0: enabled 0
1728 12:40:58.807365 PCI: 00:12.6: enabled 0
1729 12:40:58.810256 PCI: 00:13.0: enabled 0
1730 12:40:58.813610 PCI: 00:14.0: enabled 1
1731 12:40:58.816435 PCI: 00:14.1: enabled 0
1732 12:40:58.816870 PCI: 00:14.2: enabled 1
1733 12:40:58.819713 PCI: 00:14.3: enabled 1
1734 12:40:58.823161 PCI: 00:15.0: enabled 1
1735 12:40:58.827217 PCI: 00:15.1: enabled 1
1736 12:40:58.827695 PCI: 00:15.2: enabled 1
1737 12:40:58.830179 PCI: 00:15.3: enabled 1
1738 12:40:58.833214 PCI: 00:16.0: enabled 1
1739 12:40:58.833627 PCI: 00:16.1: enabled 0
1740 12:40:58.836294 PCI: 00:16.2: enabled 0
1741 12:40:58.839863 PCI: 00:16.3: enabled 0
1742 12:40:58.842940 PCI: 00:16.4: enabled 0
1743 12:40:58.843318 PCI: 00:16.5: enabled 0
1744 12:40:58.846362 PCI: 00:17.0: enabled 0
1745 12:40:58.849785 PCI: 00:19.0: enabled 0
1746 12:40:58.852696 PCI: 00:19.1: enabled 1
1747 12:40:58.853073 PCI: 00:19.2: enabled 0
1748 12:40:58.856643 PCI: 00:1c.0: enabled 1
1749 12:40:58.859885 PCI: 00:1c.1: enabled 0
1750 12:40:58.863410 PCI: 00:1c.2: enabled 0
1751 12:40:58.863980 PCI: 00:1c.3: enabled 0
1752 12:40:58.866099 PCI: 00:1c.4: enabled 0
1753 12:40:58.869309 PCI: 00:1c.5: enabled 0
1754 12:40:58.869691 PCI: 00:1c.6: enabled 1
1755 12:40:58.872611 PCI: 00:1c.7: enabled 0
1756 12:40:58.875790 PCI: 00:1d.0: enabled 1
1757 12:40:58.879465 PCI: 00:1d.1: enabled 0
1758 12:40:58.879843 PCI: 00:1d.2: enabled 1
1759 12:40:58.882725 PCI: 00:1d.3: enabled 0
1760 12:40:58.885936 PCI: 00:1e.0: enabled 1
1761 12:40:58.889454 PCI: 00:1e.1: enabled 0
1762 12:40:58.889939 PCI: 00:1e.2: enabled 1
1763 12:40:58.892820 PCI: 00:1e.3: enabled 1
1764 12:40:58.896224 PCI: 00:1f.0: enabled 1
1765 12:40:58.900157 PCI: 00:1f.1: enabled 0
1766 12:40:58.900667 PCI: 00:1f.2: enabled 1
1767 12:40:58.902735 PCI: 00:1f.3: enabled 1
1768 12:40:58.906087 PCI: 00:1f.4: enabled 0
1769 12:40:58.909689 PCI: 00:1f.5: enabled 1
1770 12:40:58.910220 PCI: 00:1f.6: enabled 0
1771 12:40:58.912606 PCI: 00:1f.7: enabled 0
1772 12:40:58.916733 APIC: 00: enabled 1
1773 12:40:58.917302 GENERIC: 0.0: enabled 1
1774 12:40:58.919636 GENERIC: 0.0: enabled 1
1775 12:40:58.922795 GENERIC: 1.0: enabled 1
1776 12:40:58.926432 GENERIC: 0.0: enabled 1
1777 12:40:58.926948 GENERIC: 1.0: enabled 1
1778 12:40:58.929441 USB0 port 0: enabled 1
1779 12:40:58.932809 GENERIC: 0.0: enabled 1
1780 12:40:58.933230 USB0 port 0: enabled 1
1781 12:40:58.935675 GENERIC: 0.0: enabled 1
1782 12:40:58.939674 I2C: 00:1a: enabled 1
1783 12:40:58.942656 I2C: 00:31: enabled 1
1784 12:40:58.943202 I2C: 00:32: enabled 1
1785 12:40:58.945824 I2C: 00:10: enabled 1
1786 12:40:58.949160 I2C: 00:15: enabled 1
1787 12:40:58.949573 GENERIC: 0.0: enabled 0
1788 12:40:58.952718 GENERIC: 1.0: enabled 0
1789 12:40:58.956579 GENERIC: 0.0: enabled 1
1790 12:40:58.957097 SPI: 00: enabled 1
1791 12:40:58.959330 SPI: 00: enabled 1
1792 12:40:58.962678 PNP: 0c09.0: enabled 1
1793 12:40:58.963096 GENERIC: 0.0: enabled 1
1794 12:40:58.965951 USB3 port 0: enabled 1
1795 12:40:58.969024 USB3 port 1: enabled 1
1796 12:40:58.969447 USB3 port 2: enabled 0
1797 12:40:58.972813 USB3 port 3: enabled 0
1798 12:40:58.976207 USB2 port 0: enabled 0
1799 12:40:58.979072 USB2 port 1: enabled 1
1800 12:40:58.979483 USB2 port 2: enabled 1
1801 12:40:58.982759 USB2 port 3: enabled 0
1802 12:40:58.985854 USB2 port 4: enabled 1
1803 12:40:58.986319 USB2 port 5: enabled 0
1804 12:40:58.989329 USB2 port 6: enabled 0
1805 12:40:58.992328 USB2 port 7: enabled 0
1806 12:40:58.995526 USB2 port 8: enabled 0
1807 12:40:58.995944 USB2 port 9: enabled 0
1808 12:40:58.999027 USB3 port 0: enabled 0
1809 12:40:59.002389 USB3 port 1: enabled 1
1810 12:40:59.002858 USB3 port 2: enabled 0
1811 12:40:59.005558 USB3 port 3: enabled 0
1812 12:40:59.008864 GENERIC: 0.0: enabled 1
1813 12:40:59.012712 GENERIC: 1.0: enabled 1
1814 12:40:59.013280 APIC: 01: enabled 1
1815 12:40:59.015545 APIC: 03: enabled 1
1816 12:40:59.015956 APIC: 06: enabled 1
1817 12:40:59.018971 APIC: 04: enabled 1
1818 12:40:59.022094 APIC: 05: enabled 1
1819 12:40:59.022509 APIC: 02: enabled 1
1820 12:40:59.025519 APIC: 07: enabled 1
1821 12:40:59.028660 PCI: 01:00.0: enabled 1
1822 12:40:59.032177 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1823 12:40:59.038598 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1824 12:40:59.041755 ELOG: NV offset 0xf30000 size 0x1000
1825 12:40:59.048607 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1826 12:40:59.055931 ELOG: Event(17) added with size 13 at 2024-01-03 12:40:59 UTC
1827 12:40:59.061835 ELOG: Event(92) added with size 9 at 2024-01-03 12:40:59 UTC
1828 12:40:59.068518 ELOG: Event(93) added with size 9 at 2024-01-03 12:40:59 UTC
1829 12:40:59.074827 ELOG: Event(9E) added with size 10 at 2024-01-03 12:40:59 UTC
1830 12:40:59.081675 ELOG: Event(9F) added with size 14 at 2024-01-03 12:40:59 UTC
1831 12:40:59.084877 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1832 12:40:59.091878 ELOG: Event(A1) added with size 10 at 2024-01-03 12:40:59 UTC
1833 12:40:59.101866 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1834 12:40:59.108103 ELOG: Event(A0) added with size 9 at 2024-01-03 12:40:59 UTC
1835 12:40:59.112048 elog_add_boot_reason: Logged dev mode boot
1836 12:40:59.117990 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1837 12:40:59.118100 Finalize devices...
1838 12:40:59.121494 Devices finalized
1839 12:40:59.124581 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1840 12:40:59.132014 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1841 12:40:59.138572 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1842 12:40:59.141413 ME: HFSTS1 : 0x80030055
1843 12:40:59.144763 ME: HFSTS2 : 0x30280116
1844 12:40:59.152446 ME: HFSTS3 : 0x00000050
1845 12:40:59.155097 ME: HFSTS4 : 0x00004000
1846 12:40:59.158244 ME: HFSTS5 : 0x00000000
1847 12:40:59.165242 ME: HFSTS6 : 0x00400006
1848 12:40:59.168704 ME: Manufacturing Mode : YES
1849 12:40:59.171532 ME: SPI Protection Mode Enabled : NO
1850 12:40:59.174631 ME: FW Partition Table : OK
1851 12:40:59.178064 ME: Bringup Loader Failure : NO
1852 12:40:59.181636 ME: Firmware Init Complete : NO
1853 12:40:59.188293 ME: Boot Options Present : NO
1854 12:40:59.191316 ME: Update In Progress : NO
1855 12:40:59.194919 ME: D0i3 Support : YES
1856 12:40:59.197892 ME: Low Power State Enabled : NO
1857 12:40:59.201618 ME: CPU Replaced : YES
1858 12:40:59.204519 ME: CPU Replacement Valid : YES
1859 12:40:59.208152 ME: Current Working State : 5
1860 12:40:59.211180 ME: Current Operation State : 1
1861 12:40:59.214654 ME: Current Operation Mode : 3
1862 12:40:59.221435 ME: Error Code : 0
1863 12:40:59.224323 ME: Enhanced Debug Mode : NO
1864 12:40:59.228018 ME: CPU Debug Disabled : YES
1865 12:40:59.231002 ME: TXT Support : NO
1866 12:40:59.237921 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1867 12:40:59.244210 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1868 12:40:59.248188 CBFS: 'fallback/slic' not found.
1869 12:40:59.250886 ACPI: Writing ACPI tables at 76b01000.
1870 12:40:59.254302 ACPI: * FACS
1871 12:40:59.254429 ACPI: * DSDT
1872 12:40:59.257799 Ramoops buffer: 0x100000@0x76a00000.
1873 12:40:59.264423 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1874 12:40:59.267964 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1875 12:40:59.270983 Google Chrome EC: version:
1876 12:40:59.274718 ro: voema_v2.0.7540-147f8d37d1
1877 12:40:59.277777 rw: voema_v2.0.7540-147f8d37d1
1878 12:40:59.280988 running image: 2
1879 12:40:59.287631 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1880 12:40:59.291144 ACPI: * FADT
1881 12:40:59.291224 SCI is IRQ9
1882 12:40:59.294244 ACPI: added table 1/32, length now 40
1883 12:40:59.297657 ACPI: * SSDT
1884 12:40:59.300938 Found 1 CPU(s) with 8 core(s) each.
1885 12:40:59.304412 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1886 12:40:59.310771 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1887 12:40:59.313965 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1888 12:40:59.317582 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1889 12:40:59.324337 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1890 12:40:59.331125 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1891 12:40:59.334063 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1892 12:40:59.340948 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1893 12:40:59.347278 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1894 12:40:59.350657 \_SB.PCI0.RP09: Added StorageD3Enable property
1895 12:40:59.354474 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1896 12:40:59.360782 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1897 12:40:59.367575 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1898 12:40:59.370782 PS2K: Passing 80 keymaps to kernel
1899 12:40:59.377556 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1900 12:40:59.384506 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1901 12:40:59.390801 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1902 12:40:59.397846 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1903 12:40:59.403657 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1904 12:40:59.410493 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1905 12:40:59.417213 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1906 12:40:59.423744 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1907 12:40:59.426820 ACPI: added table 2/32, length now 44
1908 12:40:59.426934 ACPI: * MCFG
1909 12:40:59.430425 ACPI: added table 3/32, length now 48
1910 12:40:59.433485 ACPI: * TPM2
1911 12:40:59.437297 TPM2 log created at 0x769f0000
1912 12:40:59.440384 ACPI: added table 4/32, length now 52
1913 12:40:59.440492 ACPI: * MADT
1914 12:40:59.444531 SCI is IRQ9
1915 12:40:59.447698 ACPI: added table 5/32, length now 56
1916 12:40:59.450798 current = 76b09850
1917 12:40:59.450905 ACPI: * DMAR
1918 12:40:59.453723 ACPI: added table 6/32, length now 60
1919 12:40:59.456702 ACPI: added table 7/32, length now 64
1920 12:40:59.460196 ACPI: * HPET
1921 12:40:59.463722 ACPI: added table 8/32, length now 68
1922 12:40:59.463846 ACPI: done.
1923 12:40:59.467028 ACPI tables: 35216 bytes.
1924 12:40:59.469967 smbios_write_tables: 769ef000
1925 12:40:59.473433 EC returned error result code 3
1926 12:40:59.476801 Couldn't obtain OEM name from CBI
1927 12:40:59.480346 Create SMBIOS type 16
1928 12:40:59.484303 Create SMBIOS type 17
1929 12:40:59.484389 GENERIC: 0.0 (WIFI Device)
1930 12:40:59.487151 SMBIOS tables: 1750 bytes.
1931 12:40:59.493674 Writing table forward entry at 0x00000500
1932 12:40:59.497096 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1933 12:40:59.503356 Writing coreboot table at 0x76b25000
1934 12:40:59.506531 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1935 12:40:59.514011 1. 0000000000001000-000000000009ffff: RAM
1936 12:40:59.516954 2. 00000000000a0000-00000000000fffff: RESERVED
1937 12:40:59.519924 3. 0000000000100000-00000000769eefff: RAM
1938 12:40:59.526651 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1939 12:40:59.533384 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1940 12:40:59.536573 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1941 12:40:59.543044 7. 0000000077000000-000000007fbfffff: RESERVED
1942 12:40:59.546768 8. 00000000c0000000-00000000cfffffff: RESERVED
1943 12:40:59.553445 9. 00000000f8000000-00000000f9ffffff: RESERVED
1944 12:40:59.556825 10. 00000000fb000000-00000000fb000fff: RESERVED
1945 12:40:59.563064 11. 00000000fe000000-00000000fe00ffff: RESERVED
1946 12:40:59.566906 12. 00000000fed80000-00000000fed87fff: RESERVED
1947 12:40:59.569966 13. 00000000fed90000-00000000fed92fff: RESERVED
1948 12:40:59.576479 14. 00000000feda0000-00000000feda1fff: RESERVED
1949 12:40:59.579578 15. 00000000fedc0000-00000000feddffff: RESERVED
1950 12:40:59.586514 16. 0000000100000000-00000002803fffff: RAM
1951 12:40:59.589982 Passing 4 GPIOs to payload:
1952 12:40:59.593546 NAME | PORT | POLARITY | VALUE
1953 12:40:59.600005 lid | undefined | high | high
1954 12:40:59.603228 power | undefined | high | low
1955 12:40:59.609874 oprom | undefined | high | low
1956 12:40:59.613066 EC in RW | 0x000000e5 | high | high
1957 12:40:59.619832 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 1656
1958 12:40:59.623239 coreboot table: 1576 bytes.
1959 12:40:59.626988 IMD ROOT 0. 0x76fff000 0x00001000
1960 12:40:59.630166 IMD SMALL 1. 0x76ffe000 0x00001000
1961 12:40:59.637042 FSP MEMORY 2. 0x76c4e000 0x003b0000
1962 12:40:59.639981 VPD 3. 0x76c4d000 0x00000367
1963 12:40:59.643601 RO MCACHE 4. 0x76c4c000 0x00000fdc
1964 12:40:59.646565 CONSOLE 5. 0x76c2c000 0x00020000
1965 12:40:59.649828 FMAP 6. 0x76c2b000 0x00000578
1966 12:40:59.653128 TIME STAMP 7. 0x76c2a000 0x00000910
1967 12:40:59.656580 VBOOT WORK 8. 0x76c16000 0x00014000
1968 12:40:59.659905 ROMSTG STCK 9. 0x76c15000 0x00001000
1969 12:40:59.666737 AFTER CAR 10. 0x76c0a000 0x0000b000
1970 12:40:59.669806 RAMSTAGE 11. 0x76b97000 0x00073000
1971 12:40:59.672976 REFCODE 12. 0x76b42000 0x00055000
1972 12:40:59.676495 SMM BACKUP 13. 0x76b32000 0x00010000
1973 12:40:59.679545 4f444749 14. 0x76b30000 0x00002000
1974 12:40:59.683001 EXT VBT15. 0x76b2d000 0x0000219f
1975 12:40:59.686304 COREBOOT 16. 0x76b25000 0x00008000
1976 12:40:59.689803 ACPI 17. 0x76b01000 0x00024000
1977 12:40:59.692897 ACPI GNVS 18. 0x76b00000 0x00001000
1978 12:40:59.696063 RAMOOPS 19. 0x76a00000 0x00100000
1979 12:40:59.702727 TPM2 TCGLOG20. 0x769f0000 0x00010000
1980 12:40:59.705964 SMBIOS 21. 0x769ef000 0x00000800
1981 12:40:59.706072 IMD small region:
1982 12:40:59.709691 IMD ROOT 0. 0x76ffec00 0x00000400
1983 12:40:59.716094 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1984 12:40:59.719547 POWER STATE 2. 0x76ffeb80 0x00000044
1985 12:40:59.722922 ROMSTAGE 3. 0x76ffeb60 0x00000004
1986 12:40:59.726503 MEM INFO 4. 0x76ffe980 0x000001e0
1987 12:40:59.733107 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1988 12:40:59.736028 MTRR: Physical address space:
1989 12:40:59.743282 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1990 12:40:59.749366 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1991 12:40:59.752801 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1992 12:40:59.759421 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1993 12:40:59.766203 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1994 12:40:59.773291 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1995 12:40:59.779610 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1996 12:40:59.782888 MTRR: Fixed MSR 0x250 0x0606060606060606
1997 12:40:59.789420 MTRR: Fixed MSR 0x258 0x0606060606060606
1998 12:40:59.793029 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 12:40:59.796175 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 12:40:59.799558 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 12:40:59.803254 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 12:40:59.809203 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 12:40:59.812659 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 12:40:59.815717 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 12:40:59.819289 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 12:40:59.825638 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 12:40:59.829038 call enable_fixed_mtrr()
2008 12:40:59.832578 CPU physical address size: 39 bits
2009 12:40:59.835558 MTRR: default type WB/UC MTRR counts: 6/6.
2010 12:40:59.839078 MTRR: UC selected as default type.
2011 12:40:59.845607 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2012 12:40:59.852340 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2013 12:40:59.858721 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2014 12:40:59.865560 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2015 12:40:59.872316 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2016 12:40:59.878773 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2017 12:40:59.882100 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 12:40:59.885036 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 12:40:59.891827 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 12:40:59.895606 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 12:40:59.898903 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 12:40:59.902339 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 12:40:59.908983 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 12:40:59.912013 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 12:40:59.915198 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 12:40:59.918564 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 12:40:59.925136 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 12:40:59.925258
2029 12:40:59.925354 MTRR check
2030 12:40:59.928714 Fixed MTRRs : Enabled
2031 12:40:59.932006 Variable MTRRs: Enabled
2032 12:40:59.932168
2033 12:40:59.934988 call enable_fixed_mtrr()
2034 12:40:59.938298 BS: BS_WRITE_TABLES exit times (exec / console): 48 / 151 ms
2035 12:40:59.941802 CPU physical address size: 39 bits
2036 12:40:59.946714 Checking cr50 for pending updates
2037 12:40:59.950586 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 12:40:59.957692 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 12:40:59.960649 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 12:40:59.964129 MTRR: Fixed MSR 0x259 0x0000000000000000
2041 12:40:59.967625 MTRR: Fixed MSR 0x268 0x0606060606060606
2042 12:40:59.974028 MTRR: Fixed MSR 0x269 0x0606060606060606
2043 12:40:59.977668 MTRR: Fixed MSR 0x26a 0x0606060606060606
2044 12:40:59.981426 MTRR: Fixed MSR 0x26b 0x0606060606060606
2045 12:40:59.984196 MTRR: Fixed MSR 0x26c 0x0606060606060606
2046 12:40:59.987207 MTRR: Fixed MSR 0x26d 0x0606060606060606
2047 12:40:59.993919 MTRR: Fixed MSR 0x26e 0x0606060606060606
2048 12:40:59.997561 MTRR: Fixed MSR 0x26f 0x0606060606060606
2049 12:41:00.003765 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 12:41:00.004355 call enable_fixed_mtrr()
2051 12:41:00.011296 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 12:41:00.013831 MTRR: Fixed MSR 0x268 0x0606060606060606
2053 12:41:00.017462 MTRR: Fixed MSR 0x269 0x0606060606060606
2054 12:41:00.020574 MTRR: Fixed MSR 0x26a 0x0606060606060606
2055 12:41:00.024137 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 12:41:00.030486 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 12:41:00.034036 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 12:41:00.037313 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 12:41:00.040653 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 12:41:00.044695 CPU physical address size: 39 bits
2061 12:41:00.051531 call enable_fixed_mtrr()
2062 12:41:00.054951 MTRR: Fixed MSR 0x250 0x0606060606060606
2063 12:41:00.057954 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 12:41:00.061703 MTRR: Fixed MSR 0x258 0x0606060606060606
2065 12:41:00.068250 MTRR: Fixed MSR 0x259 0x0000000000000000
2066 12:41:00.071701 MTRR: Fixed MSR 0x268 0x0606060606060606
2067 12:41:00.075389 MTRR: Fixed MSR 0x269 0x0606060606060606
2068 12:41:00.077907 MTRR: Fixed MSR 0x26a 0x0606060606060606
2069 12:41:00.081531 MTRR: Fixed MSR 0x26b 0x0606060606060606
2070 12:41:00.088244 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 12:41:00.091157 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 12:41:00.094617 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 12:41:00.097669 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 12:41:00.105703 MTRR: Fixed MSR 0x258 0x0606060606060606
2075 12:41:00.106210 call enable_fixed_mtrr()
2076 12:41:00.112475 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 12:41:00.115957 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 12:41:00.118971 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 12:41:00.121707 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 12:41:00.128589 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 12:41:00.132589 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 12:41:00.136046 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 12:41:00.138930 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 12:41:00.144846 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 12:41:00.148156 CPU physical address size: 39 bits
2086 12:41:00.152096 call enable_fixed_mtrr()
2087 12:41:00.154863 MTRR: Fixed MSR 0x250 0x0606060606060606
2088 12:41:00.161745 MTRR: Fixed MSR 0x250 0x0606060606060606
2089 12:41:00.164991 MTRR: Fixed MSR 0x258 0x0606060606060606
2090 12:41:00.168695 MTRR: Fixed MSR 0x259 0x0000000000000000
2091 12:41:00.171332 MTRR: Fixed MSR 0x268 0x0606060606060606
2092 12:41:00.175513 MTRR: Fixed MSR 0x269 0x0606060606060606
2093 12:41:00.181511 MTRR: Fixed MSR 0x26a 0x0606060606060606
2094 12:41:00.184682 MTRR: Fixed MSR 0x26b 0x0606060606060606
2095 12:41:00.187966 MTRR: Fixed MSR 0x26c 0x0606060606060606
2096 12:41:00.191095 MTRR: Fixed MSR 0x26d 0x0606060606060606
2097 12:41:00.197818 MTRR: Fixed MSR 0x26e 0x0606060606060606
2098 12:41:00.201884 MTRR: Fixed MSR 0x26f 0x0606060606060606
2099 12:41:00.204989 MTRR: Fixed MSR 0x258 0x0606060606060606
2100 12:41:00.211304 MTRR: Fixed MSR 0x259 0x0000000000000000
2101 12:41:00.214752 MTRR: Fixed MSR 0x268 0x0606060606060606
2102 12:41:00.217980 MTRR: Fixed MSR 0x269 0x0606060606060606
2103 12:41:00.220980 MTRR: Fixed MSR 0x26a 0x0606060606060606
2104 12:41:00.228032 MTRR: Fixed MSR 0x26b 0x0606060606060606
2105 12:41:00.231390 MTRR: Fixed MSR 0x26c 0x0606060606060606
2106 12:41:00.234775 MTRR: Fixed MSR 0x26d 0x0606060606060606
2107 12:41:00.238273 MTRR: Fixed MSR 0x26e 0x0606060606060606
2108 12:41:00.244337 MTRR: Fixed MSR 0x26f 0x0606060606060606
2109 12:41:00.247469 call enable_fixed_mtrr()
2110 12:41:00.247887 call enable_fixed_mtrr()
2111 12:41:00.251464 CPU physical address size: 39 bits
2112 12:41:00.258698 CPU physical address size: 39 bits
2113 12:41:00.259212 Reading cr50 TPM mode
2114 12:41:00.262101 CPU physical address size: 39 bits
2115 12:41:00.265274 CPU physical address size: 39 bits
2116 12:41:00.271713 BS: BS_PAYLOAD_LOAD entry times (exec / console): 316 / 7 ms
2117 12:41:00.279036 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2118 12:41:00.285685 Checking segment from ROM address 0xffc02b38
2119 12:41:00.288611 Checking segment from ROM address 0xffc02b54
2120 12:41:00.291863 Loading segment from ROM address 0xffc02b38
2121 12:41:00.295458 code (compression=0)
2122 12:41:00.304891 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2123 12:41:00.312192 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2124 12:41:00.315169 it's not compressed!
2125 12:41:00.454397 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2126 12:41:00.460951 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2127 12:41:00.467484 Loading segment from ROM address 0xffc02b54
2128 12:41:00.467904 Entry Point 0x30000000
2129 12:41:00.470621 Loaded segments
2130 12:41:00.477436 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2131 12:41:00.520367 Finalizing chipset.
2132 12:41:00.523379 Finalizing SMM.
2133 12:41:00.523862 APMC done.
2134 12:41:00.530418 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2135 12:41:00.533377 mp_park_aps done after 0 msecs.
2136 12:41:00.537058 Jumping to boot code at 0x30000000(0x76b25000)
2137 12:41:00.547359 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2138 12:41:00.547786
2139 12:41:00.548161
2140 12:41:00.548481
2141 12:41:00.550645 Starting depthcharge on Voema...
2142 12:41:00.551100
2143 12:41:00.552267 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2144 12:41:00.552799 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2145 12:41:00.553250 Setting prompt string to ['volteer:']
2146 12:41:00.553679 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2147 12:41:00.560800 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2148 12:41:00.561288
2149 12:41:00.567394 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2150 12:41:00.567998
2151 12:41:00.570248 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2152 12:41:00.573429
2153 12:41:00.577021 Failed to find eMMC card reader
2154 12:41:00.577441
2155 12:41:00.577765 Wipe memory regions:
2156 12:41:00.578069
2157 12:41:00.583270 [0x00000000001000, 0x000000000a0000)
2158 12:41:00.583749
2159 12:41:00.586536 [0x00000000100000, 0x00000030000000)
2160 12:41:00.612435
2161 12:41:00.615078 [0x00000032662db0, 0x000000769ef000)
2162 12:41:00.651326
2163 12:41:00.654808 [0x00000100000000, 0x00000280400000)
2164 12:41:00.857947
2165 12:41:00.860908 ec_init: CrosEC protocol v3 supported (256, 256)
2166 12:41:00.861331
2167 12:41:00.867902 update_port_state: port C0 state: usb enable 1 mux conn 0
2168 12:41:00.868418
2169 12:41:00.877863 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2170 12:41:00.880918
2171 12:41:00.884343 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2172 12:41:00.884762
2173 12:41:00.888276 send_conn_disc_msg: pmc_send_cmd succeeded
2174 12:41:01.320418
2175 12:41:01.320925 R8152: Initializing
2176 12:41:01.321256
2177 12:41:01.323236 Version 9 (ocp_data = 6010)
2178 12:41:01.323747
2179 12:41:01.326478 R8152: Done initializing
2180 12:41:01.326896
2181 12:41:01.329901 Adding net device
2182 12:41:01.632263
2183 12:41:01.635744 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2184 12:41:01.636306
2185 12:41:01.636646
2186 12:41:01.636952
2187 12:41:01.639262 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 12:41:01.740775 volteer: tftpboot 192.168.201.1 12437361/tftp-deploy-1munw6gw/kernel/bzImage 12437361/tftp-deploy-1munw6gw/kernel/cmdline 12437361/tftp-deploy-1munw6gw/ramdisk/ramdisk.cpio.gz
2190 12:41:01.741379 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2191 12:41:01.741849 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2192 12:41:01.746398 tftpboot 192.168.201.1 12437361/tftp-deploy-1munw6gw/kernel/bzIloy-1munw6gw/kernel/cmdline 12437361/tftp-deploy-1munw6gw/ramdisk/ramdisk.cpio.gz
2193 12:41:01.746839
2194 12:41:01.747169 Waiting for link
2195 12:41:01.949665
2196 12:41:01.950172 done.
2197 12:41:01.950502
2198 12:41:01.950807 MAC: 00:e0:4c:71:a6:42
2199 12:41:01.951105
2200 12:41:01.952972 Sending DHCP discover... done.
2201 12:41:01.953393
2202 12:41:01.956780 Waiting for reply... done.
2203 12:41:01.957393
2204 12:41:01.960820 Sending DHCP request... done.
2205 12:41:01.961233
2206 12:41:01.977449 Waiting for reply... done.
2207 12:41:01.977605
2208 12:41:01.977678 My ip is 192.168.201.18
2209 12:41:01.977743
2210 12:41:01.980550 The DHCP server ip is 192.168.201.1
2211 12:41:01.983686
2212 12:41:01.987213 TFTP server IP predefined by user: 192.168.201.1
2213 12:41:01.987382
2214 12:41:01.993919 Bootfile predefined by user: 12437361/tftp-deploy-1munw6gw/kernel/bzImage
2215 12:41:01.994109
2216 12:41:01.997252 Sending tftp read request... done.
2217 12:41:01.997410
2218 12:41:02.004082 Waiting for the transfer...
2219 12:41:02.004270
2220 12:41:02.415674 00000000 ################################################################
2221 12:41:02.416176
2222 12:41:02.817203 00080000 ################################################################
2223 12:41:02.817709
2224 12:41:03.166181 00100000 ################################################################
2225 12:41:03.166314
2226 12:41:03.441360 00180000 ################################################################
2227 12:41:03.441498
2228 12:41:03.715490 00200000 ################################################################
2229 12:41:03.715629
2230 12:41:03.978597 00280000 ################################################################
2231 12:41:03.978749
2232 12:41:04.260948 00300000 ################################################################
2233 12:41:04.261092
2234 12:41:04.522170 00380000 ################################################################
2235 12:41:04.522294
2236 12:41:04.793630 00400000 ################################################################
2237 12:41:04.793771
2238 12:41:05.049652 00480000 ################################################################
2239 12:41:05.049819
2240 12:41:05.331180 00500000 ################################################################
2241 12:41:05.331317
2242 12:41:05.600721 00580000 ################################################################
2243 12:41:05.600847
2244 12:41:05.857244 00600000 ################################################################
2245 12:41:05.857377
2246 12:41:06.143674 00680000 ################################################################
2247 12:41:06.143808
2248 12:41:06.396714 00700000 ################################################################
2249 12:41:06.396851
2250 12:41:06.642257 00780000 ################################################################
2251 12:41:06.642381
2252 12:41:06.734117 00800000 ######################## done.
2253 12:41:06.734218
2254 12:41:06.737682 The bootfile was 8585104 bytes long.
2255 12:41:06.737855
2256 12:41:06.740841 Sending tftp read request... done.
2257 12:41:06.740968
2258 12:41:06.743859 Waiting for the transfer...
2259 12:41:06.743957
2260 12:41:07.023845 00000000 ################################################################
2261 12:41:07.023988
2262 12:41:07.280233 00080000 ################################################################
2263 12:41:07.280396
2264 12:41:07.538287 00100000 ################################################################
2265 12:41:07.538451
2266 12:41:07.824245 00180000 ################################################################
2267 12:41:07.824390
2268 12:41:08.100608 00200000 ################################################################
2269 12:41:08.100747
2270 12:41:08.407110 00280000 ################################################################
2271 12:41:08.407251
2272 12:41:08.668384 00300000 ################################################################
2273 12:41:08.668549
2274 12:41:08.922688 00380000 ################################################################
2275 12:41:08.922821
2276 12:41:09.186365 00400000 ################################################################
2277 12:41:09.186545
2278 12:41:09.452225 00480000 ################################################################
2279 12:41:09.452393
2280 12:41:09.730243 00500000 ################################################################
2281 12:41:09.730379
2282 12:41:10.017584 00580000 ################################################################
2283 12:41:10.017755
2284 12:41:10.093341 00600000 ###################### done.
2285 12:41:10.093488
2286 12:41:10.096939 Sending tftp read request... done.
2287 12:41:10.097019
2288 12:41:10.100271 Waiting for the transfer...
2289 12:41:10.100375
2290 12:41:10.103407 00000000 # done.
2291 12:41:10.103496
2292 12:41:10.109793 Command line loaded dynamically from TFTP file: 12437361/tftp-deploy-1munw6gw/kernel/cmdline
2293 12:41:10.109888
2294 12:41:10.136595 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12437361/extract-nfsrootfs-wxiuadt1,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2295 12:41:10.140987
2296 12:41:10.144728 Shutting down all USB controllers.
2297 12:41:10.145141
2298 12:41:10.145465 Removing current net device
2299 12:41:10.145788
2300 12:41:10.147603 Finalizing coreboot
2301 12:41:10.148106
2302 12:41:10.154582 Exiting depthcharge with code 4 at timestamp: 18253101
2303 12:41:10.154994
2304 12:41:10.155316
2305 12:41:10.155614 Starting kernel ...
2306 12:41:10.155902
2307 12:41:10.156222
2308 12:41:10.157348 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2309 12:41:10.157819 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
2310 12:41:10.158183 Setting prompt string to ['Linux version [0-9]']
2311 12:41:10.158513 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2312 12:41:10.158842 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2314 12:45:45.158510 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
2316 12:45:45.159320 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
2318 12:45:45.159930 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2321 12:45:45.160999 end: 2 depthcharge-action (duration 00:05:00) [common]
2323 12:45:45.161837 Cleaning after the job
2324 12:45:45.162213 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437361/tftp-deploy-1munw6gw/ramdisk
2325 12:45:45.164167 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437361/tftp-deploy-1munw6gw/kernel
2326 12:45:45.165471 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437361/tftp-deploy-1munw6gw/nfsrootfs
2327 12:45:45.262957 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437361/tftp-deploy-1munw6gw/modules
2328 12:45:45.263435 start: 4.1 power-off (timeout 00:00:30) [common]
2329 12:45:45.263604 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2330 12:45:45.341667 >> Command sent successfully.
2331 12:45:45.346158 Returned 0 in 0 seconds
2332 12:45:45.447218 end: 4.1 power-off (duration 00:00:00) [common]
2334 12:45:45.448684 start: 4.2 read-feedback (timeout 00:10:00) [common]
2335 12:45:45.449896 Listened to connection for namespace 'common' for up to 1s
2336 12:45:46.450498 Finalising connection for namespace 'common'
2337 12:45:46.451106 Disconnecting from shell: Finalise
2338 12:45:46.451481
2339 12:45:46.552580 end: 4.2 read-feedback (duration 00:00:01) [common]
2340 12:45:46.553229 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12437361
2341 12:45:47.139167 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12437361
2342 12:45:47.139359 JobError: Your job cannot terminate cleanly.