Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:40:15.630959 lava-dispatcher, installed at version: 2023.10
2 12:40:15.631170 start: 0 validate
3 12:40:15.631304 Start time: 2024-01-03 12:40:15.631296+00:00 (UTC)
4 12:40:15.631427 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:15.631554 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:40:15.903086 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:15.903272 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:15.904414 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:15.904550 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:40:16.175909 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:40:16.176095 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:40:16.178411 validate duration: 0.55
14 12:40:16.178705 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:40:16.178827 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:40:16.178943 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:40:16.179112 Not decompressing ramdisk as can be used compressed.
18 12:40:16.179212 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 12:40:16.179280 saving as /var/lib/lava/dispatcher/tmp/12437344/tftp-deploy-xx8fv787/ramdisk/initrd.cpio.gz
20 12:40:16.179347 total size: 5671549 (5 MB)
21 12:40:16.180620 progress 0 % (0 MB)
22 12:40:16.182470 progress 5 % (0 MB)
23 12:40:16.184112 progress 10 % (0 MB)
24 12:40:16.185773 progress 15 % (0 MB)
25 12:40:16.187530 progress 20 % (1 MB)
26 12:40:16.189285 progress 25 % (1 MB)
27 12:40:16.190861 progress 30 % (1 MB)
28 12:40:16.192603 progress 35 % (1 MB)
29 12:40:16.194267 progress 40 % (2 MB)
30 12:40:16.195911 progress 45 % (2 MB)
31 12:40:16.197763 progress 50 % (2 MB)
32 12:40:16.199375 progress 55 % (3 MB)
33 12:40:16.200881 progress 60 % (3 MB)
34 12:40:16.202505 progress 65 % (3 MB)
35 12:40:16.204090 progress 70 % (3 MB)
36 12:40:16.205783 progress 75 % (4 MB)
37 12:40:16.207482 progress 80 % (4 MB)
38 12:40:16.209196 progress 85 % (4 MB)
39 12:40:16.210833 progress 90 % (4 MB)
40 12:40:16.212585 progress 95 % (5 MB)
41 12:40:16.214374 progress 100 % (5 MB)
42 12:40:16.214557 5 MB downloaded in 0.04 s (153.62 MB/s)
43 12:40:16.214780 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:40:16.215034 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:40:16.215147 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:40:16.215231 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:40:16.215352 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:40:16.215428 saving as /var/lib/lava/dispatcher/tmp/12437344/tftp-deploy-xx8fv787/kernel/bzImage
50 12:40:16.215489 total size: 8585104 (8 MB)
51 12:40:16.215549 No compression specified
52 12:40:16.216687 progress 0 % (0 MB)
53 12:40:16.219048 progress 5 % (0 MB)
54 12:40:16.221445 progress 10 % (0 MB)
55 12:40:16.224014 progress 15 % (1 MB)
56 12:40:16.226472 progress 20 % (1 MB)
57 12:40:16.228900 progress 25 % (2 MB)
58 12:40:16.231214 progress 30 % (2 MB)
59 12:40:16.233562 progress 35 % (2 MB)
60 12:40:16.235831 progress 40 % (3 MB)
61 12:40:16.238331 progress 45 % (3 MB)
62 12:40:16.240795 progress 50 % (4 MB)
63 12:40:16.243339 progress 55 % (4 MB)
64 12:40:16.245628 progress 60 % (4 MB)
65 12:40:16.247863 progress 65 % (5 MB)
66 12:40:16.250131 progress 70 % (5 MB)
67 12:40:16.252387 progress 75 % (6 MB)
68 12:40:16.254684 progress 80 % (6 MB)
69 12:40:16.258161 progress 85 % (6 MB)
70 12:40:16.261931 progress 90 % (7 MB)
71 12:40:16.265752 progress 95 % (7 MB)
72 12:40:16.269581 progress 100 % (8 MB)
73 12:40:16.270089 8 MB downloaded in 0.05 s (149.97 MB/s)
74 12:40:16.270419 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:40:16.270794 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:40:16.270920 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:40:16.271040 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:40:16.271225 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 12:40:16.271324 saving as /var/lib/lava/dispatcher/tmp/12437344/tftp-deploy-xx8fv787/nfsrootfs/full.rootfs.tar
81 12:40:16.271413 total size: 126031368 (120 MB)
82 12:40:16.271504 Using unxz to decompress xz
83 12:40:16.277385 progress 0 % (0 MB)
84 12:40:16.807334 progress 5 % (6 MB)
85 12:40:17.318727 progress 10 % (12 MB)
86 12:40:17.824308 progress 15 % (18 MB)
87 12:40:18.336398 progress 20 % (24 MB)
88 12:40:18.678344 progress 25 % (30 MB)
89 12:40:19.018556 progress 30 % (36 MB)
90 12:40:19.282154 progress 35 % (42 MB)
91 12:40:19.462309 progress 40 % (48 MB)
92 12:40:19.824188 progress 45 % (54 MB)
93 12:40:20.197316 progress 50 % (60 MB)
94 12:40:20.533178 progress 55 % (66 MB)
95 12:40:20.886439 progress 60 % (72 MB)
96 12:40:21.222666 progress 65 % (78 MB)
97 12:40:21.608870 progress 70 % (84 MB)
98 12:40:22.020794 progress 75 % (90 MB)
99 12:40:22.433419 progress 80 % (96 MB)
100 12:40:22.531138 progress 85 % (102 MB)
101 12:40:22.685445 progress 90 % (108 MB)
102 12:40:23.020835 progress 95 % (114 MB)
103 12:40:23.395260 progress 100 % (120 MB)
104 12:40:23.400123 120 MB downloaded in 7.13 s (16.86 MB/s)
105 12:40:23.400379 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:40:23.400668 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:40:23.400774 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:40:23.400876 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:40:23.401046 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:40:23.401124 saving as /var/lib/lava/dispatcher/tmp/12437344/tftp-deploy-xx8fv787/modules/modules.tar
112 12:40:23.401205 total size: 253660 (0 MB)
113 12:40:23.401307 Using unxz to decompress xz
114 12:40:23.405899 progress 12 % (0 MB)
115 12:40:23.406333 progress 25 % (0 MB)
116 12:40:23.406577 progress 38 % (0 MB)
117 12:40:23.408204 progress 51 % (0 MB)
118 12:40:23.410168 progress 64 % (0 MB)
119 12:40:23.412009 progress 77 % (0 MB)
120 12:40:23.413820 progress 90 % (0 MB)
121 12:40:23.415769 progress 100 % (0 MB)
122 12:40:23.421449 0 MB downloaded in 0.02 s (11.95 MB/s)
123 12:40:23.421778 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:40:23.422042 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:40:23.422141 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 12:40:23.422277 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 12:40:26.393739 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12437344/extract-nfsrootfs-so9ih2ji
129 12:40:26.393925 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 12:40:26.394028 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 12:40:26.394194 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn
132 12:40:26.394326 makedir: /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin
133 12:40:26.394428 makedir: /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/tests
134 12:40:26.394525 makedir: /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/results
135 12:40:26.394628 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-add-keys
136 12:40:26.394774 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-add-sources
137 12:40:26.394903 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-background-process-start
138 12:40:26.395030 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-background-process-stop
139 12:40:26.395154 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-common-functions
140 12:40:26.395277 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-echo-ipv4
141 12:40:26.395403 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-install-packages
142 12:40:26.395527 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-installed-packages
143 12:40:26.395651 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-os-build
144 12:40:26.395774 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-probe-channel
145 12:40:26.395896 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-probe-ip
146 12:40:26.396018 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-target-ip
147 12:40:26.396139 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-target-mac
148 12:40:26.396262 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-target-storage
149 12:40:26.396387 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-test-case
150 12:40:26.396512 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-test-event
151 12:40:26.396635 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-test-feedback
152 12:40:26.396758 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-test-raise
153 12:40:26.396880 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-test-reference
154 12:40:26.397007 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-test-runner
155 12:40:26.397130 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-test-set
156 12:40:26.397251 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-test-shell
157 12:40:26.397375 Updating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-install-packages (oe)
158 12:40:26.397569 Updating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/bin/lava-installed-packages (oe)
159 12:40:26.397697 Creating /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/environment
160 12:40:26.397796 LAVA metadata
161 12:40:26.397865 - LAVA_JOB_ID=12437344
162 12:40:26.397928 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:40:26.398028 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 12:40:26.398094 skipped lava-vland-overlay
165 12:40:26.398167 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:40:26.398244 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 12:40:26.398303 skipped lava-multinode-overlay
168 12:40:26.398374 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:40:26.398450 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 12:40:26.398522 Loading test definitions
171 12:40:26.398611 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 12:40:26.398684 Using /lava-12437344 at stage 0
173 12:40:26.398780 Fetching tests from https://github.com/kernelci/test-definitions
174 12:40:26.398859 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/0/tests/0_ltp-ipc'
175 12:40:32.649105 Running '/usr/bin/git checkout kernelci.org
176 12:40:32.798306 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 12:40:32.799260 uuid=12437344_1.5.2.3.1 testdef=None
178 12:40:32.799452 end: 1.5.2.3.1 git-repo-action (duration 00:00:06) [common]
180 12:40:32.799719 start: 1.5.2.3.2 test-overlay (timeout 00:09:43) [common]
181 12:40:32.800630 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 12:40:32.800978 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:43) [common]
184 12:40:32.802474 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 12:40:32.802715 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:43) [common]
187 12:40:32.804240 runner path: /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/0/tests/0_ltp-ipc test_uuid 12437344_1.5.2.3.1
188 12:40:32.804336 SKIPFILE='skipfile-lkft.yaml'
189 12:40:32.804403 SKIP_INSTALL='true'
190 12:40:32.804467 TST_CMDFILES='ipc'
191 12:40:32.804632 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 12:40:32.804931 Creating lava-test-runner.conf files
194 12:40:32.804997 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437344/lava-overlay-48z3mtyn/lava-12437344/0 for stage 0
195 12:40:32.805091 - 0_ltp-ipc
196 12:40:32.805246 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
197 12:40:32.805359 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
198 12:40:40.460566 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 12:40:40.460752 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
200 12:40:40.460884 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 12:40:40.461024 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
202 12:40:40.461148 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
203 12:40:40.615422 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 12:40:40.615889 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
205 12:40:40.616057 extracting modules file /var/lib/lava/dispatcher/tmp/12437344/tftp-deploy-xx8fv787/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437344/extract-nfsrootfs-so9ih2ji
206 12:40:40.637628 extracting modules file /var/lib/lava/dispatcher/tmp/12437344/tftp-deploy-xx8fv787/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437344/extract-overlay-ramdisk-fecez722/ramdisk
207 12:40:40.659185 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 12:40:40.659381 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
209 12:40:40.659511 [common] Applying overlay to NFS
210 12:40:40.659615 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437344/compress-overlay-02bv5k05/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12437344/extract-nfsrootfs-so9ih2ji
211 12:40:41.799306 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 12:40:41.799483 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
213 12:40:41.799590 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 12:40:41.799678 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
215 12:40:41.799754 Building ramdisk /var/lib/lava/dispatcher/tmp/12437344/extract-overlay-ramdisk-fecez722/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12437344/extract-overlay-ramdisk-fecez722/ramdisk
216 12:40:41.879460 >> 27216 blocks
217 12:40:42.475502 rename /var/lib/lava/dispatcher/tmp/12437344/extract-overlay-ramdisk-fecez722/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12437344/tftp-deploy-xx8fv787/ramdisk/ramdisk.cpio.gz
218 12:40:42.476084 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 12:40:42.476278 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
220 12:40:42.476443 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
221 12:40:42.476580 No mkimage arch provided, not using FIT.
222 12:40:42.476729 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 12:40:42.476899 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 12:40:42.477039 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
225 12:40:42.477170 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
226 12:40:42.477293 No LXC device requested
227 12:40:42.477405 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 12:40:42.477566 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
229 12:40:42.477750 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 12:40:42.477856 Checking files for TFTP limit of 4294967296 bytes.
231 12:40:42.478469 end: 1 tftp-deploy (duration 00:00:26) [common]
232 12:40:42.478612 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 12:40:42.478770 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 12:40:42.479004 substitutions:
235 12:40:42.479116 - {DTB}: None
236 12:40:42.479247 - {INITRD}: 12437344/tftp-deploy-xx8fv787/ramdisk/ramdisk.cpio.gz
237 12:40:42.479379 - {KERNEL}: 12437344/tftp-deploy-xx8fv787/kernel/bzImage
238 12:40:42.479470 - {LAVA_MAC}: None
239 12:40:42.479558 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12437344/extract-nfsrootfs-so9ih2ji
240 12:40:42.479651 - {NFS_SERVER_IP}: 192.168.201.1
241 12:40:42.479744 - {PRESEED_CONFIG}: None
242 12:40:42.479842 - {PRESEED_LOCAL}: None
243 12:40:42.479928 - {RAMDISK}: 12437344/tftp-deploy-xx8fv787/ramdisk/ramdisk.cpio.gz
244 12:40:42.480042 - {ROOT_PART}: None
245 12:40:42.480159 - {ROOT}: None
246 12:40:42.480247 - {SERVER_IP}: 192.168.201.1
247 12:40:42.480333 - {TEE}: None
248 12:40:42.480456 Parsed boot commands:
249 12:40:42.480541 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 12:40:42.480797 Parsed boot commands: tftpboot 192.168.201.1 12437344/tftp-deploy-xx8fv787/kernel/bzImage 12437344/tftp-deploy-xx8fv787/kernel/cmdline 12437344/tftp-deploy-xx8fv787/ramdisk/ramdisk.cpio.gz
251 12:40:42.480921 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 12:40:42.481057 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 12:40:42.481199 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 12:40:42.481338 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 12:40:42.481440 Not connected, no need to disconnect.
256 12:40:42.481621 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 12:40:42.481795 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 12:40:42.481897 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-3'
259 12:40:42.486506 Setting prompt string to ['lava-test: # ']
260 12:40:42.486937 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 12:40:42.487084 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 12:40:42.487222 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 12:40:42.487343 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 12:40:42.487678 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
265 12:40:47.626749 >> Command sent successfully.
266 12:40:47.629213 Returned 0 in 5 seconds
267 12:40:47.729595 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 12:40:47.729950 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 12:40:47.730072 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 12:40:47.730174 Setting prompt string to 'Starting depthcharge on Voema...'
272 12:40:47.730241 Changing prompt to 'Starting depthcharge on Voema...'
273 12:40:47.730331 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
274 12:40:47.730629 [Enter `^Ec?' for help]
275 12:40:49.331675
276 12:40:49.331851
277 12:40:49.341766 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
278 12:40:49.345193 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
279 12:40:49.351299 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
280 12:40:49.354797 CPU: AES supported, TXT NOT supported, VT supported
281 12:40:49.361679 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
282 12:40:49.367952 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
283 12:40:49.371350 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
284 12:40:49.374642 VBOOT: Loading verstage.
285 12:40:49.378074 FMAP: Found "FLASH" version 1.1 at 0x1804000.
286 12:40:49.384791 FMAP: base = 0x0 size = 0x2000000 #areas = 32
287 12:40:49.387681 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
288 12:40:49.398538 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
289 12:40:49.405242 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
290 12:40:49.405320
291 12:40:49.405391
292 12:40:49.418204 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
293 12:40:49.432131 Probing TPM: . done!
294 12:40:49.435694 TPM ready after 0 ms
295 12:40:49.439179 Connected to device vid:did:rid of 1ae0:0028:00
296 12:40:49.450068 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
297 12:40:49.456495 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
298 12:40:49.459934 Initialized TPM device CR50 revision 0
299 12:40:49.509689 tlcl_send_startup: Startup return code is 0
300 12:40:49.509803 TPM: setup succeeded
301 12:40:49.523693 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
302 12:40:49.538136 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
303 12:40:49.550832 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
304 12:40:49.560510 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 12:40:49.564278 Chrome EC: UHEPI supported
306 12:40:49.568013 Phase 1
307 12:40:49.570964 FMAP: area GBB found @ 1805000 (458752 bytes)
308 12:40:49.581078 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
309 12:40:49.587766 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
310 12:40:49.594263 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
311 12:40:49.600945 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
312 12:40:49.604392 Recovery requested (1009000e)
313 12:40:49.607758 TPM: Extending digest for VBOOT: boot mode into PCR 0
314 12:40:49.619082 tlcl_extend: response is 0
315 12:40:49.625900 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
316 12:40:49.635878 tlcl_extend: response is 0
317 12:40:49.642666 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
318 12:40:49.649328 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
319 12:40:49.655801 BS: verstage times (exec / console): total (unknown) / 142 ms
320 12:40:49.655881
321 12:40:49.655950
322 12:40:49.669046 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
323 12:40:49.675771 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
324 12:40:49.679146 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
325 12:40:49.682340 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
326 12:40:49.689028 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
327 12:40:49.692205 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
328 12:40:49.695345 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
329 12:40:49.698815 TCO_STS: 0000 0000
330 12:40:49.702259 GEN_PMCON: d0015038 00002200
331 12:40:49.705429 GBLRST_CAUSE: 00000000 00000000
332 12:40:49.705528 HPR_CAUSE0: 00000000
333 12:40:49.708951 prev_sleep_state 5
334 12:40:49.712008 Boot Count incremented to 26243
335 12:40:49.718874 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
336 12:40:49.725549 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
337 12:40:49.731766 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
338 12:40:49.738623 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
339 12:40:49.743106 Chrome EC: UHEPI supported
340 12:40:49.749849 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
341 12:40:49.763050 Probing TPM: done!
342 12:40:49.769283 Connected to device vid:did:rid of 1ae0:0028:00
343 12:40:49.780871 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
344 12:40:49.787106 Initialized TPM device CR50 revision 0
345 12:40:49.797744 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
346 12:40:49.804459 MRC: Hash idx 0x100b comparison successful.
347 12:40:49.807733 MRC cache found, size faa8
348 12:40:49.807806 bootmode is set to: 2
349 12:40:49.811030 SPD index = 0
350 12:40:49.817418 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
351 12:40:49.821160 SPD: module type is LPDDR4X
352 12:40:49.824047 SPD: module part number is MT53E512M64D4NW-046
353 12:40:49.830774 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
354 12:40:49.834560 SPD: device width 16 bits, bus width 16 bits
355 12:40:49.840900 SPD: module size is 1024 MB (per channel)
356 12:40:50.274660 CBMEM:
357 12:40:50.277439 IMD: root @ 0x76fff000 254 entries.
358 12:40:50.280934 IMD: root @ 0x76ffec00 62 entries.
359 12:40:50.284273 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
360 12:40:50.290937 FMAP: area RW_VPD found @ f35000 (8192 bytes)
361 12:40:50.294621 External stage cache:
362 12:40:50.297424 IMD: root @ 0x7b3ff000 254 entries.
363 12:40:50.300955 IMD: root @ 0x7b3fec00 62 entries.
364 12:40:50.316477 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
365 12:40:50.322794 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
366 12:40:50.329699 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
367 12:40:50.343453 MRC: 'RECOVERY_MRC_CACHE' does not need update.
368 12:40:50.350306 cse_lite: Skip switching to RW in the recovery path
369 12:40:50.350419 8 DIMMs found
370 12:40:50.350515 SMM Memory Map
371 12:40:50.354290 SMRAM : 0x7b000000 0x800000
372 12:40:50.358132 Subregion 0: 0x7b000000 0x200000
373 12:40:50.361071 Subregion 1: 0x7b200000 0x200000
374 12:40:50.364487 Subregion 2: 0x7b400000 0x400000
375 12:40:50.367998 top_of_ram = 0x77000000
376 12:40:50.374687 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
377 12:40:50.377780 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
378 12:40:50.384167 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
379 12:40:50.387549 MTRR Range: Start=ff000000 End=0 (Size 1000000)
380 12:40:50.397840 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
381 12:40:50.401035 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
382 12:40:50.412875 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
383 12:40:50.419440 Processing 211 relocs. Offset value of 0x74c0b000
384 12:40:50.426357 BS: romstage times (exec / console): total (unknown) / 277 ms
385 12:40:50.432143
386 12:40:50.432220
387 12:40:50.442271 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
388 12:40:50.445611 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
389 12:40:50.455748 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
390 12:40:50.462110 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
391 12:40:50.468942 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
392 12:40:50.475249 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
393 12:40:50.521817 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
394 12:40:50.528534 Processing 5008 relocs. Offset value of 0x75d98000
395 12:40:50.531812 BS: postcar times (exec / console): total (unknown) / 59 ms
396 12:40:50.535688
397 12:40:50.535784
398 12:40:50.545976 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
399 12:40:50.546063 Normal boot
400 12:40:50.548893 FW_CONFIG value is 0x804c02
401 12:40:50.552312 PCI: 00:07.0 disabled by fw_config
402 12:40:50.555741 PCI: 00:07.1 disabled by fw_config
403 12:40:50.559051 PCI: 00:0d.2 disabled by fw_config
404 12:40:50.562111 PCI: 00:1c.7 disabled by fw_config
405 12:40:50.568912 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
406 12:40:50.575442 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
407 12:40:50.578795 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 12:40:50.582221 GENERIC: 0.0 disabled by fw_config
409 12:40:50.585732 GENERIC: 1.0 disabled by fw_config
410 12:40:50.592269 fw_config match found: DB_USB=USB3_ACTIVE
411 12:40:50.595399 fw_config match found: DB_USB=USB3_ACTIVE
412 12:40:50.599077 fw_config match found: DB_USB=USB3_ACTIVE
413 12:40:50.602442 fw_config match found: DB_USB=USB3_ACTIVE
414 12:40:50.608753 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
415 12:40:50.615285 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
416 12:40:50.622090 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
417 12:40:50.632280 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
418 12:40:50.635423 microcode: sig=0x806c1 pf=0x80 revision=0x86
419 12:40:50.641929 microcode: Update skipped, already up-to-date
420 12:40:50.648596 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
421 12:40:50.675751 Detected 4 core, 8 thread CPU.
422 12:40:50.678973 Setting up SMI for CPU
423 12:40:50.682224 IED base = 0x7b400000
424 12:40:50.682332 IED size = 0x00400000
425 12:40:50.685655 Will perform SMM setup.
426 12:40:50.692005 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
427 12:40:50.698832 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
428 12:40:50.705515 Processing 16 relocs. Offset value of 0x00030000
429 12:40:50.708912 Attempting to start 7 APs
430 12:40:50.712436 Waiting for 10ms after sending INIT.
431 12:40:50.727902 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
432 12:40:50.727981 done.
433 12:40:50.730833 AP: slot 6 apic_id 3.
434 12:40:50.734422 AP: slot 2 apic_id 2.
435 12:40:50.734495 AP: slot 5 apic_id 7.
436 12:40:50.737883 AP: slot 7 apic_id 5.
437 12:40:50.741044 AP: slot 3 apic_id 4.
438 12:40:50.741142 AP: slot 4 apic_id 6.
439 12:40:50.747585 Waiting for 2nd SIPI to complete...done.
440 12:40:50.754058 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
441 12:40:50.760860 Processing 13 relocs. Offset value of 0x00038000
442 12:40:50.760962 Unable to locate Global NVS
443 12:40:50.770996 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
444 12:40:50.774173 Installing permanent SMM handler to 0x7b000000
445 12:40:50.784329 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
446 12:40:50.787389 Processing 794 relocs. Offset value of 0x7b010000
447 12:40:50.797619 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
448 12:40:50.801034 Processing 13 relocs. Offset value of 0x7b008000
449 12:40:50.807257 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
450 12:40:50.813975 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
451 12:40:50.817360 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
452 12:40:50.823882 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
453 12:40:50.830696 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
454 12:40:50.837380 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
455 12:40:50.843713 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
456 12:40:50.843826 Unable to locate Global NVS
457 12:40:50.853661 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
458 12:40:50.856940 Clearing SMI status registers
459 12:40:50.857051 SMI_STS: PM1
460 12:40:50.860537 PM1_STS: PWRBTN
461 12:40:50.867240 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
462 12:40:50.870696 In relocation handler: CPU 0
463 12:40:50.874025 New SMBASE=0x7b000000 IEDBASE=0x7b400000
464 12:40:50.880141 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 12:40:50.880258 Relocation complete.
466 12:40:50.890617 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
467 12:40:50.890701 In relocation handler: CPU 1
468 12:40:50.897104 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
469 12:40:50.897186 Relocation complete.
470 12:40:50.906907 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
471 12:40:50.907006 In relocation handler: CPU 3
472 12:40:50.913795 New SMBASE=0x7afff400 IEDBASE=0x7b400000
473 12:40:50.916828 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 12:40:50.920474 Relocation complete.
475 12:40:50.927147 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
476 12:40:50.930570 In relocation handler: CPU 5
477 12:40:50.933940 New SMBASE=0x7affec00 IEDBASE=0x7b400000
478 12:40:50.936851 Relocation complete.
479 12:40:50.943621 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
480 12:40:50.946998 In relocation handler: CPU 4
481 12:40:50.950373 New SMBASE=0x7afff000 IEDBASE=0x7b400000
482 12:40:50.953635 Writing SMRR. base = 0x7b000006, mask=0xff800c00
483 12:40:50.956746 Relocation complete.
484 12:40:50.963628 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
485 12:40:50.966878 In relocation handler: CPU 6
486 12:40:50.970543 New SMBASE=0x7affe800 IEDBASE=0x7b400000
487 12:40:50.973905 Relocation complete.
488 12:40:50.980322 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
489 12:40:50.983536 In relocation handler: CPU 2
490 12:40:50.987012 New SMBASE=0x7afff800 IEDBASE=0x7b400000
491 12:40:50.993705 Writing SMRR. base = 0x7b000006, mask=0xff800c00
492 12:40:50.993851 Relocation complete.
493 12:40:51.003543 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
494 12:40:51.003650 In relocation handler: CPU 7
495 12:40:51.010351 New SMBASE=0x7affe400 IEDBASE=0x7b400000
496 12:40:51.010474 Relocation complete.
497 12:40:51.013837 Initializing CPU #0
498 12:40:51.017336 CPU: vendor Intel device 806c1
499 12:40:51.021841 CPU: family 06, model 8c, stepping 01
500 12:40:51.025118 Clearing out pending MCEs
501 12:40:51.025221 Setting up local APIC...
502 12:40:51.028689 apic_id: 0x00 done.
503 12:40:51.031923 Turbo is available but hidden
504 12:40:51.035260 Turbo is available and visible
505 12:40:51.038656 microcode: Update skipped, already up-to-date
506 12:40:51.042193 CPU #0 initialized
507 12:40:51.042297 Initializing CPU #4
508 12:40:51.044952 Initializing CPU #5
509 12:40:51.048385 CPU: vendor Intel device 806c1
510 12:40:51.051617 CPU: family 06, model 8c, stepping 01
511 12:40:51.055066 CPU: vendor Intel device 806c1
512 12:40:51.058418 CPU: family 06, model 8c, stepping 01
513 12:40:51.061779 Clearing out pending MCEs
514 12:40:51.065060 Clearing out pending MCEs
515 12:40:51.068258 Setting up local APIC...
516 12:40:51.068361 Initializing CPU #1
517 12:40:51.071709 Initializing CPU #3
518 12:40:51.071815 Initializing CPU #7
519 12:40:51.075122 CPU: vendor Intel device 806c1
520 12:40:51.081694 CPU: family 06, model 8c, stepping 01
521 12:40:51.081805 CPU: vendor Intel device 806c1
522 12:40:51.088102 CPU: family 06, model 8c, stepping 01
523 12:40:51.088208 Clearing out pending MCEs
524 12:40:51.091635 Clearing out pending MCEs
525 12:40:51.094756 Setting up local APIC...
526 12:40:51.098594 Initializing CPU #6
527 12:40:51.098697 Initializing CPU #2
528 12:40:51.101342 CPU: vendor Intel device 806c1
529 12:40:51.104719 CPU: family 06, model 8c, stepping 01
530 12:40:51.108464 CPU: vendor Intel device 806c1
531 12:40:51.111372 CPU: family 06, model 8c, stepping 01
532 12:40:51.114777 Setting up local APIC...
533 12:40:51.118283 Setting up local APIC...
534 12:40:51.121806 apic_id: 0x05 done.
535 12:40:51.121912 apic_id: 0x04 done.
536 12:40:51.128355 microcode: Update skipped, already up-to-date
537 12:40:51.131715 microcode: Update skipped, already up-to-date
538 12:40:51.134799 CPU #7 initialized
539 12:40:51.134900 CPU #3 initialized
540 12:40:51.138367 Clearing out pending MCEs
541 12:40:51.141234 apic_id: 0x06 done.
542 12:40:51.141341 apic_id: 0x07 done.
543 12:40:51.148080 microcode: Update skipped, already up-to-date
544 12:40:51.151453 microcode: Update skipped, already up-to-date
545 12:40:51.154827 CPU #4 initialized
546 12:40:51.154927 CPU #5 initialized
547 12:40:51.158166 Setting up local APIC...
548 12:40:51.161385 Clearing out pending MCEs
549 12:40:51.164704 CPU: vendor Intel device 806c1
550 12:40:51.167933 CPU: family 06, model 8c, stepping 01
551 12:40:51.171562 Clearing out pending MCEs
552 12:40:51.171637 Setting up local APIC...
553 12:40:51.174713 apic_id: 0x01 done.
554 12:40:51.178121 Setting up local APIC...
555 12:40:51.181349 microcode: Update skipped, already up-to-date
556 12:40:51.184671 apic_id: 0x02 done.
557 12:40:51.184796 apic_id: 0x03 done.
558 12:40:51.190965 microcode: Update skipped, already up-to-date
559 12:40:51.191068 CPU #1 initialized
560 12:40:51.198028 microcode: Update skipped, already up-to-date
561 12:40:51.198129 CPU #2 initialized
562 12:40:51.201261 CPU #6 initialized
563 12:40:51.204593 bsp_do_flight_plan done after 454 msecs.
564 12:40:51.207674 CPU: frequency set to 4000 MHz
565 12:40:51.211188 Enabling SMIs.
566 12:40:51.217814 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
567 12:40:51.232168 SATAXPCIE1 indicates PCIe NVMe is present
568 12:40:51.236126 Probing TPM: done!
569 12:40:51.239413 Connected to device vid:did:rid of 1ae0:0028:00
570 12:40:51.249708 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
571 12:40:51.253044 Initialized TPM device CR50 revision 0
572 12:40:51.256472 Enabling S0i3.4
573 12:40:51.263192 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
574 12:40:51.266251 Found a VBT of 8704 bytes after decompression
575 12:40:51.272846 cse_lite: CSE RO boot. HybridStorageMode disabled
576 12:40:51.279855 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
577 12:40:51.355693 FSPS returned 0
578 12:40:51.359230 Executing Phase 1 of FspMultiPhaseSiInit
579 12:40:51.368644 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
580 12:40:51.371839 port C0 DISC req: usage 1 usb3 1 usb2 5
581 12:40:51.375350 Raw Buffer output 0 00000511
582 12:40:51.378755 Raw Buffer output 1 00000000
583 12:40:51.382822 pmc_send_ipc_cmd succeeded
584 12:40:51.389167 port C1 DISC req: usage 1 usb3 2 usb2 3
585 12:40:51.389285 Raw Buffer output 0 00000321
586 12:40:51.392238 Raw Buffer output 1 00000000
587 12:40:51.396714 pmc_send_ipc_cmd succeeded
588 12:40:51.401918 Detected 4 core, 8 thread CPU.
589 12:40:51.405278 Detected 4 core, 8 thread CPU.
590 12:40:51.639872 Display FSP Version Info HOB
591 12:40:51.642655 Reference Code - CPU = a.0.4c.31
592 12:40:51.646032 uCode Version = 0.0.0.86
593 12:40:51.649667 TXT ACM version = ff.ff.ff.ffff
594 12:40:51.652708 Reference Code - ME = a.0.4c.31
595 12:40:51.656066 MEBx version = 0.0.0.0
596 12:40:51.659400 ME Firmware Version = Consumer SKU
597 12:40:51.662921 Reference Code - PCH = a.0.4c.31
598 12:40:51.666233 PCH-CRID Status = Disabled
599 12:40:51.669684 PCH-CRID Original Value = ff.ff.ff.ffff
600 12:40:51.672938 PCH-CRID New Value = ff.ff.ff.ffff
601 12:40:51.676109 OPROM - RST - RAID = ff.ff.ff.ffff
602 12:40:51.679632 PCH Hsio Version = 4.0.0.0
603 12:40:51.683058 Reference Code - SA - System Agent = a.0.4c.31
604 12:40:51.685928 Reference Code - MRC = 2.0.0.1
605 12:40:51.689428 SA - PCIe Version = a.0.4c.31
606 12:40:51.692749 SA-CRID Status = Disabled
607 12:40:51.696036 SA-CRID Original Value = 0.0.0.1
608 12:40:51.699538 SA-CRID New Value = 0.0.0.1
609 12:40:51.702753 OPROM - VBIOS = ff.ff.ff.ffff
610 12:40:51.706027 IO Manageability Engine FW Version = 11.1.4.0
611 12:40:51.709356 PHY Build Version = 0.0.0.e0
612 12:40:51.712766 Thunderbolt(TM) FW Version = 0.0.0.0
613 12:40:51.719153 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
614 12:40:51.722999 ITSS IRQ Polarities Before:
615 12:40:51.723082 IPC0: 0xffffffff
616 12:40:51.726109 IPC1: 0xffffffff
617 12:40:51.726205 IPC2: 0xffffffff
618 12:40:51.729293 IPC3: 0xffffffff
619 12:40:51.732504 ITSS IRQ Polarities After:
620 12:40:51.732596 IPC0: 0xffffffff
621 12:40:51.735936 IPC1: 0xffffffff
622 12:40:51.736009 IPC2: 0xffffffff
623 12:40:51.739411 IPC3: 0xffffffff
624 12:40:51.742807 Found PCIe Root Port #9 at PCI: 00:1d.0.
625 12:40:51.756207 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
626 12:40:51.766267 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
627 12:40:51.779448 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
628 12:40:51.785711 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
629 12:40:51.785839 Enumerating buses...
630 12:40:51.792344 Show all devs... Before device enumeration.
631 12:40:51.792464 Root Device: enabled 1
632 12:40:51.795792 DOMAIN: 0000: enabled 1
633 12:40:51.799090 CPU_CLUSTER: 0: enabled 1
634 12:40:51.802590 PCI: 00:00.0: enabled 1
635 12:40:51.802690 PCI: 00:02.0: enabled 1
636 12:40:51.806001 PCI: 00:04.0: enabled 1
637 12:40:51.809585 PCI: 00:05.0: enabled 1
638 12:40:51.812392 PCI: 00:06.0: enabled 0
639 12:40:51.812496 PCI: 00:07.0: enabled 0
640 12:40:51.815817 PCI: 00:07.1: enabled 0
641 12:40:51.819369 PCI: 00:07.2: enabled 0
642 12:40:51.822827 PCI: 00:07.3: enabled 0
643 12:40:51.822940 PCI: 00:08.0: enabled 1
644 12:40:51.826081 PCI: 00:09.0: enabled 0
645 12:40:51.829344 PCI: 00:0a.0: enabled 0
646 12:40:51.829455 PCI: 00:0d.0: enabled 1
647 12:40:51.832503 PCI: 00:0d.1: enabled 0
648 12:40:51.835730 PCI: 00:0d.2: enabled 0
649 12:40:51.839206 PCI: 00:0d.3: enabled 0
650 12:40:51.839318 PCI: 00:0e.0: enabled 0
651 12:40:51.842714 PCI: 00:10.2: enabled 1
652 12:40:51.845959 PCI: 00:10.6: enabled 0
653 12:40:51.849266 PCI: 00:10.7: enabled 0
654 12:40:51.849388 PCI: 00:12.0: enabled 0
655 12:40:51.852576 PCI: 00:12.6: enabled 0
656 12:40:51.855911 PCI: 00:13.0: enabled 0
657 12:40:51.859418 PCI: 00:14.0: enabled 1
658 12:40:51.859528 PCI: 00:14.1: enabled 0
659 12:40:51.862760 PCI: 00:14.2: enabled 1
660 12:40:51.865704 PCI: 00:14.3: enabled 1
661 12:40:51.865804 PCI: 00:15.0: enabled 1
662 12:40:51.869249 PCI: 00:15.1: enabled 1
663 12:40:51.872774 PCI: 00:15.2: enabled 1
664 12:40:51.875943 PCI: 00:15.3: enabled 1
665 12:40:51.876053 PCI: 00:16.0: enabled 1
666 12:40:51.879406 PCI: 00:16.1: enabled 0
667 12:40:51.882352 PCI: 00:16.2: enabled 0
668 12:40:51.885723 PCI: 00:16.3: enabled 0
669 12:40:51.885810 PCI: 00:16.4: enabled 0
670 12:40:51.889119 PCI: 00:16.5: enabled 0
671 12:40:51.892755 PCI: 00:17.0: enabled 1
672 12:40:51.895843 PCI: 00:19.0: enabled 0
673 12:40:51.895946 PCI: 00:19.1: enabled 1
674 12:40:51.899348 PCI: 00:19.2: enabled 0
675 12:40:51.902583 PCI: 00:1c.0: enabled 1
676 12:40:51.902702 PCI: 00:1c.1: enabled 0
677 12:40:51.906007 PCI: 00:1c.2: enabled 0
678 12:40:51.909393 PCI: 00:1c.3: enabled 0
679 12:40:51.912259 PCI: 00:1c.4: enabled 0
680 12:40:51.912360 PCI: 00:1c.5: enabled 0
681 12:40:51.915717 PCI: 00:1c.6: enabled 1
682 12:40:51.919093 PCI: 00:1c.7: enabled 0
683 12:40:51.922585 PCI: 00:1d.0: enabled 1
684 12:40:51.922695 PCI: 00:1d.1: enabled 0
685 12:40:51.925992 PCI: 00:1d.2: enabled 1
686 12:40:51.929188 PCI: 00:1d.3: enabled 0
687 12:40:51.932447 PCI: 00:1e.0: enabled 1
688 12:40:51.932536 PCI: 00:1e.1: enabled 0
689 12:40:51.935971 PCI: 00:1e.2: enabled 1
690 12:40:51.939038 PCI: 00:1e.3: enabled 1
691 12:40:51.942579 PCI: 00:1f.0: enabled 1
692 12:40:51.942657 PCI: 00:1f.1: enabled 0
693 12:40:51.945652 PCI: 00:1f.2: enabled 1
694 12:40:51.949324 PCI: 00:1f.3: enabled 1
695 12:40:51.949436 PCI: 00:1f.4: enabled 0
696 12:40:51.952404 PCI: 00:1f.5: enabled 1
697 12:40:51.955843 PCI: 00:1f.6: enabled 0
698 12:40:51.959286 PCI: 00:1f.7: enabled 0
699 12:40:51.959390 APIC: 00: enabled 1
700 12:40:51.962654 GENERIC: 0.0: enabled 1
701 12:40:51.965479 GENERIC: 0.0: enabled 1
702 12:40:51.965558 GENERIC: 1.0: enabled 1
703 12:40:51.969085 GENERIC: 0.0: enabled 1
704 12:40:51.972490 GENERIC: 1.0: enabled 1
705 12:40:51.975784 USB0 port 0: enabled 1
706 12:40:51.975891 GENERIC: 0.0: enabled 1
707 12:40:51.978874 USB0 port 0: enabled 1
708 12:40:51.982462 GENERIC: 0.0: enabled 1
709 12:40:51.982540 I2C: 00:1a: enabled 1
710 12:40:51.985700 I2C: 00:31: enabled 1
711 12:40:51.989124 I2C: 00:32: enabled 1
712 12:40:51.992062 I2C: 00:10: enabled 1
713 12:40:51.992171 I2C: 00:15: enabled 1
714 12:40:51.995606 GENERIC: 0.0: enabled 0
715 12:40:51.998690 GENERIC: 1.0: enabled 0
716 12:40:51.998791 GENERIC: 0.0: enabled 1
717 12:40:52.002292 SPI: 00: enabled 1
718 12:40:52.005632 SPI: 00: enabled 1
719 12:40:52.005739 PNP: 0c09.0: enabled 1
720 12:40:52.008972 GENERIC: 0.0: enabled 1
721 12:40:52.012518 USB3 port 0: enabled 1
722 12:40:52.012596 USB3 port 1: enabled 1
723 12:40:52.015849 USB3 port 2: enabled 0
724 12:40:52.018822 USB3 port 3: enabled 0
725 12:40:52.022186 USB2 port 0: enabled 0
726 12:40:52.022288 USB2 port 1: enabled 1
727 12:40:52.025839 USB2 port 2: enabled 1
728 12:40:52.029108 USB2 port 3: enabled 0
729 12:40:52.029191 USB2 port 4: enabled 1
730 12:40:52.031983 USB2 port 5: enabled 0
731 12:40:52.035317 USB2 port 6: enabled 0
732 12:40:52.035400 USB2 port 7: enabled 0
733 12:40:52.038655 USB2 port 8: enabled 0
734 12:40:52.042331 USB2 port 9: enabled 0
735 12:40:52.045573 USB3 port 0: enabled 0
736 12:40:52.045675 USB3 port 1: enabled 1
737 12:40:52.048891 USB3 port 2: enabled 0
738 12:40:52.052344 USB3 port 3: enabled 0
739 12:40:52.052427 GENERIC: 0.0: enabled 1
740 12:40:52.055629 GENERIC: 1.0: enabled 1
741 12:40:52.058764 APIC: 01: enabled 1
742 12:40:52.058843 APIC: 02: enabled 1
743 12:40:52.062096 APIC: 04: enabled 1
744 12:40:52.065643 APIC: 06: enabled 1
745 12:40:52.065721 APIC: 07: enabled 1
746 12:40:52.068582 APIC: 03: enabled 1
747 12:40:52.071914 APIC: 05: enabled 1
748 12:40:52.072000 Compare with tree...
749 12:40:52.075289 Root Device: enabled 1
750 12:40:52.078769 DOMAIN: 0000: enabled 1
751 12:40:52.078857 PCI: 00:00.0: enabled 1
752 12:40:52.082032 PCI: 00:02.0: enabled 1
753 12:40:52.085367 PCI: 00:04.0: enabled 1
754 12:40:52.088573 GENERIC: 0.0: enabled 1
755 12:40:52.092184 PCI: 00:05.0: enabled 1
756 12:40:52.092292 PCI: 00:06.0: enabled 0
757 12:40:52.095271 PCI: 00:07.0: enabled 0
758 12:40:52.098638 GENERIC: 0.0: enabled 1
759 12:40:52.102055 PCI: 00:07.1: enabled 0
760 12:40:52.105451 GENERIC: 1.0: enabled 1
761 12:40:52.105557 PCI: 00:07.2: enabled 0
762 12:40:52.108557 GENERIC: 0.0: enabled 1
763 12:40:52.111832 PCI: 00:07.3: enabled 0
764 12:40:52.115408 GENERIC: 1.0: enabled 1
765 12:40:52.118797 PCI: 00:08.0: enabled 1
766 12:40:52.118878 PCI: 00:09.0: enabled 0
767 12:40:52.121637 PCI: 00:0a.0: enabled 0
768 12:40:52.125087 PCI: 00:0d.0: enabled 1
769 12:40:52.128532 USB0 port 0: enabled 1
770 12:40:52.131907 USB3 port 0: enabled 1
771 12:40:52.135361 USB3 port 1: enabled 1
772 12:40:52.135442 USB3 port 2: enabled 0
773 12:40:52.141452 USB3 port 3: enabled 0
774 12:40:52.142096 PCI: 00:0d.1: enabled 0
775 12:40:52.145309 PCI: 00:0d.2: enabled 0
776 12:40:52.148801 GENERIC: 0.0: enabled 1
777 12:40:52.148912 PCI: 00:0d.3: enabled 0
778 12:40:52.151523 PCI: 00:0e.0: enabled 0
779 12:40:52.155159 PCI: 00:10.2: enabled 1
780 12:40:52.158295 PCI: 00:10.6: enabled 0
781 12:40:52.161808 PCI: 00:10.7: enabled 0
782 12:40:52.161890 PCI: 00:12.0: enabled 0
783 12:40:52.164890 PCI: 00:12.6: enabled 0
784 12:40:52.168230 PCI: 00:13.0: enabled 0
785 12:40:52.171592 PCI: 00:14.0: enabled 1
786 12:40:52.174859 USB0 port 0: enabled 1
787 12:40:52.174967 USB2 port 0: enabled 0
788 12:40:52.178225 USB2 port 1: enabled 1
789 12:40:52.181641 USB2 port 2: enabled 1
790 12:40:52.184940 USB2 port 3: enabled 0
791 12:40:52.188430 USB2 port 4: enabled 1
792 12:40:52.188532 USB2 port 5: enabled 0
793 12:40:52.191257 USB2 port 6: enabled 0
794 12:40:52.194707 USB2 port 7: enabled 0
795 12:40:52.198036 USB2 port 8: enabled 0
796 12:40:52.201630 USB2 port 9: enabled 0
797 12:40:52.204747 USB3 port 0: enabled 0
798 12:40:52.204845 USB3 port 1: enabled 1
799 12:40:52.208055 USB3 port 2: enabled 0
800 12:40:52.211420 USB3 port 3: enabled 0
801 12:40:52.214823 PCI: 00:14.1: enabled 0
802 12:40:52.217942 PCI: 00:14.2: enabled 1
803 12:40:52.218040 PCI: 00:14.3: enabled 1
804 12:40:52.221515 GENERIC: 0.0: enabled 1
805 12:40:52.224741 PCI: 00:15.0: enabled 1
806 12:40:52.227825 I2C: 00:1a: enabled 1
807 12:40:52.231270 I2C: 00:31: enabled 1
808 12:40:52.231345 I2C: 00:32: enabled 1
809 12:40:52.234727 PCI: 00:15.1: enabled 1
810 12:40:52.238113 I2C: 00:10: enabled 1
811 12:40:52.241598 PCI: 00:15.2: enabled 1
812 12:40:52.244395 PCI: 00:15.3: enabled 1
813 12:40:52.244507 PCI: 00:16.0: enabled 1
814 12:40:52.247775 PCI: 00:16.1: enabled 0
815 12:40:52.251058 PCI: 00:16.2: enabled 0
816 12:40:52.254575 PCI: 00:16.3: enabled 0
817 12:40:52.257942 PCI: 00:16.4: enabled 0
818 12:40:52.258043 PCI: 00:16.5: enabled 0
819 12:40:52.261829 PCI: 00:17.0: enabled 1
820 12:40:52.265559 PCI: 00:19.0: enabled 0
821 12:40:52.265637 PCI: 00:19.1: enabled 1
822 12:40:52.269347 I2C: 00:15: enabled 1
823 12:40:52.272396 PCI: 00:19.2: enabled 0
824 12:40:52.275736 PCI: 00:1d.0: enabled 1
825 12:40:52.275859 GENERIC: 0.0: enabled 1
826 12:40:52.279235 PCI: 00:1e.0: enabled 1
827 12:40:52.282300 PCI: 00:1e.1: enabled 0
828 12:40:52.285671 PCI: 00:1e.2: enabled 1
829 12:40:52.289071 SPI: 00: enabled 1
830 12:40:52.289170 PCI: 00:1e.3: enabled 1
831 12:40:52.292431 SPI: 00: enabled 1
832 12:40:52.295865 PCI: 00:1f.0: enabled 1
833 12:40:52.346949 PNP: 0c09.0: enabled 1
834 12:40:52.347045 PCI: 00:1f.1: enabled 0
835 12:40:52.347112 PCI: 00:1f.2: enabled 1
836 12:40:52.347358 GENERIC: 0.0: enabled 1
837 12:40:52.347423 GENERIC: 0.0: enabled 1
838 12:40:52.347490 GENERIC: 1.0: enabled 1
839 12:40:52.347548 PCI: 00:1f.3: enabled 1
840 12:40:52.347619 PCI: 00:1f.4: enabled 0
841 12:40:52.347712 PCI: 00:1f.5: enabled 1
842 12:40:52.347819 PCI: 00:1f.6: enabled 0
843 12:40:52.347905 PCI: 00:1f.7: enabled 0
844 12:40:52.348031 CPU_CLUSTER: 0: enabled 1
845 12:40:52.348133 APIC: 00: enabled 1
846 12:40:52.348237 APIC: 01: enabled 1
847 12:40:52.348321 APIC: 02: enabled 1
848 12:40:52.348404 APIC: 04: enabled 1
849 12:40:52.348489 APIC: 06: enabled 1
850 12:40:52.348571 APIC: 07: enabled 1
851 12:40:52.348654 APIC: 03: enabled 1
852 12:40:52.348735 APIC: 05: enabled 1
853 12:40:52.381033 Root Device scanning...
854 12:40:52.381159 scan_static_bus for Root Device
855 12:40:52.381253 DOMAIN: 0000 enabled
856 12:40:52.381545 CPU_CLUSTER: 0 enabled
857 12:40:52.381619 DOMAIN: 0000 scanning...
858 12:40:52.381678 PCI: pci_scan_bus for bus 00
859 12:40:52.381735 PCI: 00:00.0 [8086/0000] ops
860 12:40:52.381803 PCI: 00:00.0 [8086/9a12] enabled
861 12:40:52.381866 PCI: 00:02.0 [8086/0000] bus ops
862 12:40:52.381922 PCI: 00:02.0 [8086/9a40] enabled
863 12:40:52.381976 PCI: 00:04.0 [8086/0000] bus ops
864 12:40:52.385078 PCI: 00:04.0 [8086/9a03] enabled
865 12:40:52.385180 PCI: 00:05.0 [8086/9a19] enabled
866 12:40:52.388366 PCI: 00:07.0 [0000/0000] hidden
867 12:40:52.391882 PCI: 00:08.0 [8086/9a11] enabled
868 12:40:52.394796 PCI: 00:0a.0 [8086/9a0d] disabled
869 12:40:52.398235 PCI: 00:0d.0 [8086/0000] bus ops
870 12:40:52.401599 PCI: 00:0d.0 [8086/9a13] enabled
871 12:40:52.405066 PCI: 00:14.0 [8086/0000] bus ops
872 12:40:52.408385 PCI: 00:14.0 [8086/a0ed] enabled
873 12:40:52.411752 PCI: 00:14.2 [8086/a0ef] enabled
874 12:40:52.415110 PCI: 00:14.3 [8086/0000] bus ops
875 12:40:52.418535 PCI: 00:14.3 [8086/a0f0] enabled
876 12:40:52.421674 PCI: 00:15.0 [8086/0000] bus ops
877 12:40:52.425231 PCI: 00:15.0 [8086/a0e8] enabled
878 12:40:52.428608 PCI: 00:15.1 [8086/0000] bus ops
879 12:40:52.431563 PCI: 00:15.1 [8086/a0e9] enabled
880 12:40:52.434964 PCI: 00:15.2 [8086/0000] bus ops
881 12:40:52.438351 PCI: 00:15.2 [8086/a0ea] enabled
882 12:40:52.441836 PCI: 00:15.3 [8086/0000] bus ops
883 12:40:52.445043 PCI: 00:15.3 [8086/a0eb] enabled
884 12:40:52.448487 PCI: 00:16.0 [8086/0000] ops
885 12:40:52.451869 PCI: 00:16.0 [8086/a0e0] enabled
886 12:40:52.458351 PCI: Static device PCI: 00:17.0 not found, disabling it.
887 12:40:52.461928 PCI: 00:19.0 [8086/0000] bus ops
888 12:40:52.464766 PCI: 00:19.0 [8086/a0c5] disabled
889 12:40:52.468103 PCI: 00:19.1 [8086/0000] bus ops
890 12:40:52.471591 PCI: 00:19.1 [8086/a0c6] enabled
891 12:40:52.474976 PCI: 00:1d.0 [8086/0000] bus ops
892 12:40:52.478195 PCI: 00:1d.0 [8086/a0b0] enabled
893 12:40:52.481892 PCI: 00:1e.0 [8086/0000] ops
894 12:40:52.485090 PCI: 00:1e.0 [8086/a0a8] enabled
895 12:40:52.488170 PCI: 00:1e.2 [8086/0000] bus ops
896 12:40:52.491727 PCI: 00:1e.2 [8086/a0aa] enabled
897 12:40:52.494969 PCI: 00:1e.3 [8086/0000] bus ops
898 12:40:52.498174 PCI: 00:1e.3 [8086/a0ab] enabled
899 12:40:52.501501 PCI: 00:1f.0 [8086/0000] bus ops
900 12:40:52.504896 PCI: 00:1f.0 [8086/a087] enabled
901 12:40:52.504999 RTC Init
902 12:40:52.508261 Set power on after power failure.
903 12:40:52.511799 Disabling Deep S3
904 12:40:52.511874 Disabling Deep S3
905 12:40:52.514682 Disabling Deep S4
906 12:40:52.514762 Disabling Deep S4
907 12:40:52.518194 Disabling Deep S5
908 12:40:52.521487 Disabling Deep S5
909 12:40:52.524910 PCI: 00:1f.2 [0000/0000] hidden
910 12:40:52.528045 PCI: 00:1f.3 [8086/0000] bus ops
911 12:40:52.531634 PCI: 00:1f.3 [8086/a0c8] enabled
912 12:40:52.534824 PCI: 00:1f.5 [8086/0000] bus ops
913 12:40:52.538112 PCI: 00:1f.5 [8086/a0a4] enabled
914 12:40:52.541609 PCI: Leftover static devices:
915 12:40:52.541689 PCI: 00:10.2
916 12:40:52.541753 PCI: 00:10.6
917 12:40:52.544712 PCI: 00:10.7
918 12:40:52.544792 PCI: 00:06.0
919 12:40:52.548041 PCI: 00:07.1
920 12:40:52.548122 PCI: 00:07.2
921 12:40:52.548185 PCI: 00:07.3
922 12:40:52.551394 PCI: 00:09.0
923 12:40:52.551477 PCI: 00:0d.1
924 12:40:52.554668 PCI: 00:0d.2
925 12:40:52.554768 PCI: 00:0d.3
926 12:40:52.554857 PCI: 00:0e.0
927 12:40:52.558296 PCI: 00:12.0
928 12:40:52.558409 PCI: 00:12.6
929 12:40:52.561363 PCI: 00:13.0
930 12:40:52.561463 PCI: 00:14.1
931 12:40:52.564691 PCI: 00:16.1
932 12:40:52.564796 PCI: 00:16.2
933 12:40:52.564893 PCI: 00:16.3
934 12:40:52.568057 PCI: 00:16.4
935 12:40:52.568167 PCI: 00:16.5
936 12:40:52.571560 PCI: 00:17.0
937 12:40:52.571667 PCI: 00:19.2
938 12:40:52.571756 PCI: 00:1e.1
939 12:40:52.575006 PCI: 00:1f.1
940 12:40:52.575102 PCI: 00:1f.4
941 12:40:52.578530 PCI: 00:1f.6
942 12:40:52.578607 PCI: 00:1f.7
943 12:40:52.581335 PCI: Check your devicetree.cb.
944 12:40:52.584788 PCI: 00:02.0 scanning...
945 12:40:52.588127 scan_generic_bus for PCI: 00:02.0
946 12:40:52.591281 scan_generic_bus for PCI: 00:02.0 done
947 12:40:52.594855 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
948 12:40:52.598168 PCI: 00:04.0 scanning...
949 12:40:52.601176 scan_generic_bus for PCI: 00:04.0
950 12:40:52.604800 GENERIC: 0.0 enabled
951 12:40:52.611194 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
952 12:40:52.614715 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
953 12:40:52.618007 PCI: 00:0d.0 scanning...
954 12:40:52.621614 scan_static_bus for PCI: 00:0d.0
955 12:40:52.624950 USB0 port 0 enabled
956 12:40:52.625029 USB0 port 0 scanning...
957 12:40:52.627804 scan_static_bus for USB0 port 0
958 12:40:52.631260 USB3 port 0 enabled
959 12:40:52.634678 USB3 port 1 enabled
960 12:40:52.634759 USB3 port 2 disabled
961 12:40:52.637965 USB3 port 3 disabled
962 12:40:52.641279 USB3 port 0 scanning...
963 12:40:52.644719 scan_static_bus for USB3 port 0
964 12:40:52.647990 scan_static_bus for USB3 port 0 done
965 12:40:52.651496 scan_bus: bus USB3 port 0 finished in 6 msecs
966 12:40:52.654940 USB3 port 1 scanning...
967 12:40:52.657727 scan_static_bus for USB3 port 1
968 12:40:52.661203 scan_static_bus for USB3 port 1 done
969 12:40:52.668124 scan_bus: bus USB3 port 1 finished in 6 msecs
970 12:40:52.671215 scan_static_bus for USB0 port 0 done
971 12:40:52.674520 scan_bus: bus USB0 port 0 finished in 43 msecs
972 12:40:52.678027 scan_static_bus for PCI: 00:0d.0 done
973 12:40:52.684821 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
974 12:40:52.684898 PCI: 00:14.0 scanning...
975 12:40:52.688248 scan_static_bus for PCI: 00:14.0
976 12:40:52.691173 USB0 port 0 enabled
977 12:40:52.695015 USB0 port 0 scanning...
978 12:40:52.697823 scan_static_bus for USB0 port 0
979 12:40:52.697906 USB2 port 0 disabled
980 12:40:52.701595 USB2 port 1 enabled
981 12:40:52.704456 USB2 port 2 enabled
982 12:40:52.704562 USB2 port 3 disabled
983 12:40:52.707703 USB2 port 4 enabled
984 12:40:52.711300 USB2 port 5 disabled
985 12:40:52.711377 USB2 port 6 disabled
986 12:40:52.714471 USB2 port 7 disabled
987 12:40:52.718067 USB2 port 8 disabled
988 12:40:52.718152 USB2 port 9 disabled
989 12:40:52.721383 USB3 port 0 disabled
990 12:40:52.721457 USB3 port 1 enabled
991 12:40:52.724763 USB3 port 2 disabled
992 12:40:52.727579 USB3 port 3 disabled
993 12:40:52.730932 USB2 port 1 scanning...
994 12:40:52.734434 scan_static_bus for USB2 port 1
995 12:40:52.737696 scan_static_bus for USB2 port 1 done
996 12:40:52.741190 scan_bus: bus USB2 port 1 finished in 6 msecs
997 12:40:52.743931 USB2 port 2 scanning...
998 12:40:52.747356 scan_static_bus for USB2 port 2
999 12:40:52.750863 scan_static_bus for USB2 port 2 done
1000 12:40:52.754382 scan_bus: bus USB2 port 2 finished in 6 msecs
1001 12:40:52.757338 USB2 port 4 scanning...
1002 12:40:52.760803 scan_static_bus for USB2 port 4
1003 12:40:52.764084 scan_static_bus for USB2 port 4 done
1004 12:40:52.770593 scan_bus: bus USB2 port 4 finished in 6 msecs
1005 12:40:52.770684 USB3 port 1 scanning...
1006 12:40:52.774348 scan_static_bus for USB3 port 1
1007 12:40:52.780705 scan_static_bus for USB3 port 1 done
1008 12:40:52.783975 scan_bus: bus USB3 port 1 finished in 6 msecs
1009 12:40:52.787350 scan_static_bus for USB0 port 0 done
1010 12:40:52.794193 scan_bus: bus USB0 port 0 finished in 93 msecs
1011 12:40:52.797540 scan_static_bus for PCI: 00:14.0 done
1012 12:40:52.800933 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1013 12:40:52.803719 PCI: 00:14.3 scanning...
1014 12:40:52.806985 scan_static_bus for PCI: 00:14.3
1015 12:40:52.810378 GENERIC: 0.0 enabled
1016 12:40:52.813908 scan_static_bus for PCI: 00:14.3 done
1017 12:40:52.817192 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1018 12:40:52.820368 PCI: 00:15.0 scanning...
1019 12:40:52.823822 scan_static_bus for PCI: 00:15.0
1020 12:40:52.827329 I2C: 00:1a enabled
1021 12:40:52.827402 I2C: 00:31 enabled
1022 12:40:52.830419 I2C: 00:32 enabled
1023 12:40:52.833893 scan_static_bus for PCI: 00:15.0 done
1024 12:40:52.837333 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1025 12:40:52.840875 PCI: 00:15.1 scanning...
1026 12:40:52.844283 scan_static_bus for PCI: 00:15.1
1027 12:40:52.847759 I2C: 00:10 enabled
1028 12:40:52.851118 scan_static_bus for PCI: 00:15.1 done
1029 12:40:52.854621 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1030 12:40:52.857617 PCI: 00:15.2 scanning...
1031 12:40:52.860970 scan_static_bus for PCI: 00:15.2
1032 12:40:52.864301 scan_static_bus for PCI: 00:15.2 done
1033 12:40:52.870894 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1034 12:40:52.870993 PCI: 00:15.3 scanning...
1035 12:40:52.874743 scan_static_bus for PCI: 00:15.3
1036 12:40:52.877721 scan_static_bus for PCI: 00:15.3 done
1037 12:40:52.884348 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1038 12:40:52.887842 PCI: 00:19.1 scanning...
1039 12:40:52.891014 scan_static_bus for PCI: 00:19.1
1040 12:40:52.891088 I2C: 00:15 enabled
1041 12:40:52.894314 scan_static_bus for PCI: 00:19.1 done
1042 12:40:52.900946 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1043 12:40:52.904430 PCI: 00:1d.0 scanning...
1044 12:40:52.907866 do_pci_scan_bridge for PCI: 00:1d.0
1045 12:40:52.911242 PCI: pci_scan_bus for bus 01
1046 12:40:52.914445 PCI: 01:00.0 [1c5c/174a] enabled
1047 12:40:52.914520 GENERIC: 0.0 enabled
1048 12:40:52.917979 Enabling Common Clock Configuration
1049 12:40:52.924192 L1 Sub-State supported from root port 29
1050 12:40:52.927938 L1 Sub-State Support = 0xf
1051 12:40:52.928038 CommonModeRestoreTime = 0x28
1052 12:40:52.934735 Power On Value = 0x16, Power On Scale = 0x0
1053 12:40:52.934816 ASPM: Enabled L1
1054 12:40:52.937842 PCIe: Max_Payload_Size adjusted to 128
1055 12:40:52.944124 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1056 12:40:52.947729 PCI: 00:1e.2 scanning...
1057 12:40:52.951083 scan_generic_bus for PCI: 00:1e.2
1058 12:40:52.951159 SPI: 00 enabled
1059 12:40:52.957585 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1060 12:40:52.964340 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1061 12:40:52.964444 PCI: 00:1e.3 scanning...
1062 12:40:52.967856 scan_generic_bus for PCI: 00:1e.3
1063 12:40:52.971269 SPI: 00 enabled
1064 12:40:52.977768 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1065 12:40:52.981251 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1066 12:40:52.984015 PCI: 00:1f.0 scanning...
1067 12:40:52.987377 scan_static_bus for PCI: 00:1f.0
1068 12:40:52.991086 PNP: 0c09.0 enabled
1069 12:40:52.991162 PNP: 0c09.0 scanning...
1070 12:40:52.994280 scan_static_bus for PNP: 0c09.0
1071 12:40:52.997772 scan_static_bus for PNP: 0c09.0 done
1072 12:40:53.004243 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1073 12:40:53.007416 scan_static_bus for PCI: 00:1f.0 done
1074 12:40:53.010753 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1075 12:40:53.014192 PCI: 00:1f.2 scanning...
1076 12:40:53.017612 scan_static_bus for PCI: 00:1f.2
1077 12:40:53.020803 GENERIC: 0.0 enabled
1078 12:40:53.024217 GENERIC: 0.0 scanning...
1079 12:40:53.027539 scan_static_bus for GENERIC: 0.0
1080 12:40:53.027622 GENERIC: 0.0 enabled
1081 12:40:53.030908 GENERIC: 1.0 enabled
1082 12:40:53.034193 scan_static_bus for GENERIC: 0.0 done
1083 12:40:53.040838 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1084 12:40:53.044089 scan_static_bus for PCI: 00:1f.2 done
1085 12:40:53.047317 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1086 12:40:53.050735 PCI: 00:1f.3 scanning...
1087 12:40:53.054211 scan_static_bus for PCI: 00:1f.3
1088 12:40:53.057659 scan_static_bus for PCI: 00:1f.3 done
1089 12:40:53.064070 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1090 12:40:53.064158 PCI: 00:1f.5 scanning...
1091 12:40:53.067490 scan_generic_bus for PCI: 00:1f.5
1092 12:40:53.074320 scan_generic_bus for PCI: 00:1f.5 done
1093 12:40:53.077820 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1094 12:40:53.084404 scan_bus: bus DOMAIN: 0000 finished in 718 msecs
1095 12:40:53.087282 scan_static_bus for Root Device done
1096 12:40:53.090790 scan_bus: bus Root Device finished in 737 msecs
1097 12:40:53.090908 done
1098 12:40:53.097335 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1099 12:40:53.100791 Chrome EC: UHEPI supported
1100 12:40:53.107486 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1101 12:40:53.114349 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1102 12:40:53.117156 SPI flash protection: WPSW=0 SRP0=0
1103 12:40:53.120555 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1104 12:40:53.127538 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1105 12:40:53.130496 found VGA at PCI: 00:02.0
1106 12:40:53.134207 Setting up VGA for PCI: 00:02.0
1107 12:40:53.137362 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1108 12:40:53.144146 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1109 12:40:53.147412 Allocating resources...
1110 12:40:53.147518 Reading resources...
1111 12:40:53.153919 Root Device read_resources bus 0 link: 0
1112 12:40:53.157379 DOMAIN: 0000 read_resources bus 0 link: 0
1113 12:40:53.160211 PCI: 00:04.0 read_resources bus 1 link: 0
1114 12:40:53.167122 PCI: 00:04.0 read_resources bus 1 link: 0 done
1115 12:40:53.170499 PCI: 00:0d.0 read_resources bus 0 link: 0
1116 12:40:53.177338 USB0 port 0 read_resources bus 0 link: 0
1117 12:40:53.180765 USB0 port 0 read_resources bus 0 link: 0 done
1118 12:40:53.187418 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1119 12:40:53.190924 PCI: 00:14.0 read_resources bus 0 link: 0
1120 12:40:53.193844 USB0 port 0 read_resources bus 0 link: 0
1121 12:40:53.201661 USB0 port 0 read_resources bus 0 link: 0 done
1122 12:40:53.204754 PCI: 00:14.0 read_resources bus 0 link: 0 done
1123 12:40:53.211739 PCI: 00:14.3 read_resources bus 0 link: 0
1124 12:40:53.215159 PCI: 00:14.3 read_resources bus 0 link: 0 done
1125 12:40:53.221850 PCI: 00:15.0 read_resources bus 0 link: 0
1126 12:40:53.225326 PCI: 00:15.0 read_resources bus 0 link: 0 done
1127 12:40:53.231897 PCI: 00:15.1 read_resources bus 0 link: 0
1128 12:40:53.234803 PCI: 00:15.1 read_resources bus 0 link: 0 done
1129 12:40:53.242215 PCI: 00:19.1 read_resources bus 0 link: 0
1130 12:40:53.245821 PCI: 00:19.1 read_resources bus 0 link: 0 done
1131 12:40:53.252185 PCI: 00:1d.0 read_resources bus 1 link: 0
1132 12:40:53.255919 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1133 12:40:53.262454 PCI: 00:1e.2 read_resources bus 2 link: 0
1134 12:40:53.265822 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1135 12:40:53.272175 PCI: 00:1e.3 read_resources bus 3 link: 0
1136 12:40:53.275547 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1137 12:40:53.282237 PCI: 00:1f.0 read_resources bus 0 link: 0
1138 12:40:53.285676 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1139 12:40:53.289005 PCI: 00:1f.2 read_resources bus 0 link: 0
1140 12:40:53.295778 GENERIC: 0.0 read_resources bus 0 link: 0
1141 12:40:53.299049 GENERIC: 0.0 read_resources bus 0 link: 0 done
1142 12:40:53.305968 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1143 12:40:53.312337 DOMAIN: 0000 read_resources bus 0 link: 0 done
1144 12:40:53.315788 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1145 12:40:53.319096 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1146 12:40:53.325842 Root Device read_resources bus 0 link: 0 done
1147 12:40:53.329294 Done reading resources.
1148 12:40:53.332668 Show resources in subtree (Root Device)...After reading.
1149 12:40:53.338875 Root Device child on link 0 DOMAIN: 0000
1150 12:40:53.342699 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1151 12:40:53.352374 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1152 12:40:53.362571 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1153 12:40:53.362676 PCI: 00:00.0
1154 12:40:53.372377 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1155 12:40:53.382276 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1156 12:40:53.391894 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1157 12:40:53.402092 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1158 12:40:53.408914 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1159 12:40:53.418873 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1160 12:40:53.428531 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1161 12:40:53.438987 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1162 12:40:53.448870 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1163 12:40:53.455604 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1164 12:40:53.465611 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1165 12:40:53.475271 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1166 12:40:53.485353 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1167 12:40:53.495355 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1168 12:40:53.501910 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1169 12:40:53.511864 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1170 12:40:53.521960 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1171 12:40:53.531840 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1172 12:40:53.541405 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1173 12:40:53.551459 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1174 12:40:53.551542 PCI: 00:02.0
1175 12:40:53.561865 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1176 12:40:53.574694 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1177 12:40:53.581549 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1178 12:40:53.588293 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1179 12:40:53.597805 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1180 12:40:53.597888 GENERIC: 0.0
1181 12:40:53.601280 PCI: 00:05.0
1182 12:40:53.611265 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 12:40:53.614655 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1184 12:40:53.617921 GENERIC: 0.0
1185 12:40:53.618016 PCI: 00:08.0
1186 12:40:53.627632 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 12:40:53.631815 PCI: 00:0a.0
1188 12:40:53.634691 PCI: 00:0d.0 child on link 0 USB0 port 0
1189 12:40:53.643984 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1190 12:40:53.647799 USB0 port 0 child on link 0 USB3 port 0
1191 12:40:53.651093 USB3 port 0
1192 12:40:53.651169 USB3 port 1
1193 12:40:53.654363 USB3 port 2
1194 12:40:53.654440 USB3 port 3
1195 12:40:53.660757 PCI: 00:14.0 child on link 0 USB0 port 0
1196 12:40:53.670817 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 12:40:53.674204 USB0 port 0 child on link 0 USB2 port 0
1198 12:40:53.677498 USB2 port 0
1199 12:40:53.677658 USB2 port 1
1200 12:40:53.680446 USB2 port 2
1201 12:40:53.680541 USB2 port 3
1202 12:40:53.683897 USB2 port 4
1203 12:40:53.683996 USB2 port 5
1204 12:40:53.687277 USB2 port 6
1205 12:40:53.687383 USB2 port 7
1206 12:40:53.690967 USB2 port 8
1207 12:40:53.691072 USB2 port 9
1208 12:40:53.694103 USB3 port 0
1209 12:40:53.694174 USB3 port 1
1210 12:40:53.697546 USB3 port 2
1211 12:40:53.700915 USB3 port 3
1212 12:40:53.701010 PCI: 00:14.2
1213 12:40:53.710825 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 12:40:53.720537 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1215 12:40:53.723926 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1216 12:40:53.734035 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1217 12:40:53.737209 GENERIC: 0.0
1218 12:40:53.740436 PCI: 00:15.0 child on link 0 I2C: 00:1a
1219 12:40:53.750243 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 12:40:53.753687 I2C: 00:1a
1221 12:40:53.753764 I2C: 00:31
1222 12:40:53.757104 I2C: 00:32
1223 12:40:53.760425 PCI: 00:15.1 child on link 0 I2C: 00:10
1224 12:40:53.770029 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 12:40:53.770143 I2C: 00:10
1226 12:40:53.773410 PCI: 00:15.2
1227 12:40:53.783589 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 12:40:53.783699 PCI: 00:15.3
1229 12:40:53.793426 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 12:40:53.796805 PCI: 00:16.0
1231 12:40:53.806530 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 12:40:53.806643 PCI: 00:19.0
1233 12:40:53.813676 PCI: 00:19.1 child on link 0 I2C: 00:15
1234 12:40:53.823272 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 12:40:53.823353 I2C: 00:15
1236 12:40:53.829943 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1237 12:40:53.836245 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1238 12:40:53.846578 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1239 12:40:53.856559 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1240 12:40:53.856669 GENERIC: 0.0
1241 12:40:53.859760 PCI: 01:00.0
1242 12:40:53.869755 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 12:40:53.879612 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1244 12:40:53.889385 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1245 12:40:53.889529 PCI: 00:1e.0
1246 12:40:53.899709 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1247 12:40:53.906046 PCI: 00:1e.2 child on link 0 SPI: 00
1248 12:40:53.915991 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 12:40:53.916067 SPI: 00
1250 12:40:53.919113 PCI: 00:1e.3 child on link 0 SPI: 00
1251 12:40:53.929218 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1252 12:40:53.932579 SPI: 00
1253 12:40:53.935854 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1254 12:40:53.945817 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1255 12:40:53.945904 PNP: 0c09.0
1256 12:40:53.956105 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1257 12:40:53.959050 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1258 12:40:53.968981 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1259 12:40:53.978646 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1260 12:40:53.982412 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1261 12:40:53.985597 GENERIC: 0.0
1262 12:40:53.985680 GENERIC: 1.0
1263 12:40:53.988543 PCI: 00:1f.3
1264 12:40:53.998785 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1265 12:40:54.008624 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1266 12:40:54.008728 PCI: 00:1f.5
1267 12:40:54.018936 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1268 12:40:54.022082 CPU_CLUSTER: 0 child on link 0 APIC: 00
1269 12:40:54.025236 APIC: 00
1270 12:40:54.025362 APIC: 01
1271 12:40:54.028895 APIC: 02
1272 12:40:54.029003 APIC: 04
1273 12:40:54.029099 APIC: 06
1274 12:40:54.031835 APIC: 07
1275 12:40:54.031921 APIC: 03
1276 12:40:54.032022 APIC: 05
1277 12:40:54.041993 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1278 12:40:54.045411 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1279 12:40:54.051779 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1280 12:40:54.058832 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1281 12:40:54.062058 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1282 12:40:54.068708 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1283 12:40:54.071909 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1284 12:40:54.078811 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1285 12:40:54.085383 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1286 12:40:54.095202 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1287 12:40:54.102191 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1288 12:40:54.108288 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1289 12:40:54.114753 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1290 12:40:54.121607 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1291 12:40:54.131412 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1292 12:40:54.135087 DOMAIN: 0000: Resource ranges:
1293 12:40:54.138343 * Base: 1000, Size: 800, Tag: 100
1294 12:40:54.141683 * Base: 1900, Size: e700, Tag: 100
1295 12:40:54.145003 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1296 12:40:54.151347 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1297 12:40:54.158102 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1298 12:40:54.168011 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1299 12:40:54.174680 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1300 12:40:54.181614 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1301 12:40:54.191144 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1302 12:40:54.198148 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1303 12:40:54.204680 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1304 12:40:54.214399 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1305 12:40:54.221249 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1306 12:40:54.227709 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1307 12:40:54.237966 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1308 12:40:54.244328 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1309 12:40:54.251305 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1310 12:40:54.260793 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1311 12:40:54.267585 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1312 12:40:54.274127 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1313 12:40:54.284237 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1314 12:40:54.291001 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1315 12:40:54.297130 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1316 12:40:54.307199 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1317 12:40:54.314049 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1318 12:40:54.320868 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1319 12:40:54.330699 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1320 12:40:54.330809 DOMAIN: 0000: Resource ranges:
1321 12:40:54.337085 * Base: 7fc00000, Size: 40400000, Tag: 200
1322 12:40:54.340284 * Base: d0000000, Size: 28000000, Tag: 200
1323 12:40:54.343991 * Base: fa000000, Size: 1000000, Tag: 200
1324 12:40:54.350684 * Base: fb001000, Size: 2fff000, Tag: 200
1325 12:40:54.353745 * Base: fe010000, Size: 2e000, Tag: 200
1326 12:40:54.357346 * Base: fe03f000, Size: d41000, Tag: 200
1327 12:40:54.360498 * Base: fed88000, Size: 8000, Tag: 200
1328 12:40:54.367377 * Base: fed93000, Size: d000, Tag: 200
1329 12:40:54.370587 * Base: feda2000, Size: 1e000, Tag: 200
1330 12:40:54.373938 * Base: fede0000, Size: 1220000, Tag: 200
1331 12:40:54.380290 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1332 12:40:54.386965 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1333 12:40:54.393787 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1334 12:40:54.400430 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1335 12:40:54.406738 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1336 12:40:54.413547 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1337 12:40:54.420316 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1338 12:40:54.426548 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1339 12:40:54.433679 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1340 12:40:54.440304 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1341 12:40:54.446750 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1342 12:40:54.453414 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1343 12:40:54.459736 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1344 12:40:54.466278 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1345 12:40:54.473366 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1346 12:40:54.479698 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1347 12:40:54.486610 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1348 12:40:54.492958 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1349 12:40:54.499832 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1350 12:40:54.506075 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1351 12:40:54.513047 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1352 12:40:54.519823 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1353 12:40:54.526528 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1354 12:40:54.532896 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1355 12:40:54.539959 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1356 12:40:54.542684 PCI: 00:1d.0: Resource ranges:
1357 12:40:54.549638 * Base: 7fc00000, Size: 100000, Tag: 200
1358 12:40:54.555838 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1359 12:40:54.562989 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1360 12:40:54.569482 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1361 12:40:54.576168 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1362 12:40:54.582906 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1363 12:40:54.589237 Root Device assign_resources, bus 0 link: 0
1364 12:40:54.592432 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 12:40:54.602763 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1366 12:40:54.609278 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1367 12:40:54.615736 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1368 12:40:54.625874 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1369 12:40:54.629685 PCI: 00:04.0 assign_resources, bus 1 link: 0
1370 12:40:54.636031 PCI: 00:04.0 assign_resources, bus 1 link: 0
1371 12:40:54.642976 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1372 12:40:54.652707 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1373 12:40:54.659533 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1374 12:40:54.662462 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1375 12:40:54.669125 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1376 12:40:54.675933 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1377 12:40:54.682763 PCI: 00:14.0 assign_resources, bus 0 link: 0
1378 12:40:54.685874 PCI: 00:14.0 assign_resources, bus 0 link: 0
1379 12:40:54.695849 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1380 12:40:54.702605 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1381 12:40:54.712110 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1382 12:40:54.715858 PCI: 00:14.3 assign_resources, bus 0 link: 0
1383 12:40:54.718921 PCI: 00:14.3 assign_resources, bus 0 link: 0
1384 12:40:54.728610 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1385 12:40:54.732304 PCI: 00:15.0 assign_resources, bus 0 link: 0
1386 12:40:54.738933 PCI: 00:15.0 assign_resources, bus 0 link: 0
1387 12:40:54.745161 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1388 12:40:54.748581 PCI: 00:15.1 assign_resources, bus 0 link: 0
1389 12:40:54.755492 PCI: 00:15.1 assign_resources, bus 0 link: 0
1390 12:40:54.762244 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1391 12:40:54.771799 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1392 12:40:54.778966 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1393 12:40:54.788623 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1394 12:40:54.792201 PCI: 00:19.1 assign_resources, bus 0 link: 0
1395 12:40:54.798870 PCI: 00:19.1 assign_resources, bus 0 link: 0
1396 12:40:54.805638 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1397 12:40:54.815199 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1398 12:40:54.825421 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1399 12:40:54.828813 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1400 12:40:54.838512 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1401 12:40:54.845017 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1402 12:40:54.852065 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1403 12:40:54.858401 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1404 12:40:54.865300 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1405 12:40:54.871592 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1406 12:40:54.874971 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1407 12:40:54.882061 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1408 12:40:54.888264 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1409 12:40:54.891535 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1410 12:40:54.898427 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1411 12:40:54.901552 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1412 12:40:54.908394 LPC: Trying to open IO window from 800 size 1ff
1413 12:40:54.915235 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1414 12:40:54.924760 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1415 12:40:54.931654 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1416 12:40:54.935161 DOMAIN: 0000 assign_resources, bus 0 link: 0
1417 12:40:54.941403 Root Device assign_resources, bus 0 link: 0
1418 12:40:54.945276 Done setting resources.
1419 12:40:54.951616 Show resources in subtree (Root Device)...After assigning values.
1420 12:40:54.955097 Root Device child on link 0 DOMAIN: 0000
1421 12:40:54.958175 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1422 12:40:54.968694 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1423 12:40:54.978367 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1424 12:40:54.978450 PCI: 00:00.0
1425 12:40:54.988296 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1426 12:40:54.998097 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1427 12:40:55.008079 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1428 12:40:55.018268 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1429 12:40:55.027851 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1430 12:40:55.034590 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1431 12:40:55.044293 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1432 12:40:55.054347 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1433 12:40:55.064320 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1434 12:40:55.074867 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1435 12:40:55.084679 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1436 12:40:55.090840 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1437 12:40:55.100667 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1438 12:40:55.110982 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1439 12:40:55.120746 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1440 12:40:55.130754 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1441 12:40:55.140812 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1442 12:40:55.147148 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1443 12:40:55.157519 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1444 12:40:55.166967 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1445 12:40:55.170371 PCI: 00:02.0
1446 12:40:55.180513 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1447 12:40:55.190487 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1448 12:40:55.200452 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1449 12:40:55.203586 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1450 12:40:55.213712 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1451 12:40:55.217052 GENERIC: 0.0
1452 12:40:55.217136 PCI: 00:05.0
1453 12:40:55.230484 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1454 12:40:55.233685 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1455 12:40:55.236982 GENERIC: 0.0
1456 12:40:55.237099 PCI: 00:08.0
1457 12:40:55.246640 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1458 12:40:55.250100 PCI: 00:0a.0
1459 12:40:55.253552 PCI: 00:0d.0 child on link 0 USB0 port 0
1460 12:40:55.263387 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1461 12:40:55.266715 USB0 port 0 child on link 0 USB3 port 0
1462 12:40:55.269979 USB3 port 0
1463 12:40:55.270055 USB3 port 1
1464 12:40:55.273363 USB3 port 2
1465 12:40:55.276906 USB3 port 3
1466 12:40:55.280232 PCI: 00:14.0 child on link 0 USB0 port 0
1467 12:40:55.290244 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1468 12:40:55.293710 USB0 port 0 child on link 0 USB2 port 0
1469 12:40:55.296682 USB2 port 0
1470 12:40:55.296757 USB2 port 1
1471 12:40:55.300028 USB2 port 2
1472 12:40:55.300111 USB2 port 3
1473 12:40:55.303129 USB2 port 4
1474 12:40:55.303203 USB2 port 5
1475 12:40:55.306808 USB2 port 6
1476 12:40:55.310308 USB2 port 7
1477 12:40:55.310399 USB2 port 8
1478 12:40:55.313581 USB2 port 9
1479 12:40:55.313655 USB3 port 0
1480 12:40:55.316736 USB3 port 1
1481 12:40:55.316812 USB3 port 2
1482 12:40:55.319841 USB3 port 3
1483 12:40:55.319915 PCI: 00:14.2
1484 12:40:55.330249 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1485 12:40:55.340259 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1486 12:40:55.346943 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1487 12:40:55.356802 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1488 12:40:55.356881 GENERIC: 0.0
1489 12:40:55.363013 PCI: 00:15.0 child on link 0 I2C: 00:1a
1490 12:40:55.373101 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1491 12:40:55.373177 I2C: 00:1a
1492 12:40:55.376535 I2C: 00:31
1493 12:40:55.376613 I2C: 00:32
1494 12:40:55.383001 PCI: 00:15.1 child on link 0 I2C: 00:10
1495 12:40:55.393107 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1496 12:40:55.393185 I2C: 00:10
1497 12:40:55.396287 PCI: 00:15.2
1498 12:40:55.406454 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1499 12:40:55.406530 PCI: 00:15.3
1500 12:40:55.416703 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1501 12:40:55.419555 PCI: 00:16.0
1502 12:40:55.429942 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1503 12:40:55.430025 PCI: 00:19.0
1504 12:40:55.436723 PCI: 00:19.1 child on link 0 I2C: 00:15
1505 12:40:55.446404 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1506 12:40:55.446485 I2C: 00:15
1507 12:40:55.452794 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1508 12:40:55.462935 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1509 12:40:55.472926 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1510 12:40:55.482962 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1511 12:40:55.485933 GENERIC: 0.0
1512 12:40:55.486010 PCI: 01:00.0
1513 12:40:55.496230 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1514 12:40:55.509289 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1515 12:40:55.519098 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1516 12:40:55.519205 PCI: 00:1e.0
1517 12:40:55.532562 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1518 12:40:55.535826 PCI: 00:1e.2 child on link 0 SPI: 00
1519 12:40:55.545768 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1520 12:40:55.545846 SPI: 00
1521 12:40:55.552419 PCI: 00:1e.3 child on link 0 SPI: 00
1522 12:40:55.562051 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1523 12:40:55.562155 SPI: 00
1524 12:40:55.565359 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1525 12:40:55.575314 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1526 12:40:55.575418 PNP: 0c09.0
1527 12:40:55.585323 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1528 12:40:55.591734 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1529 12:40:55.598718 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1530 12:40:55.608485 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1531 12:40:55.615112 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1532 12:40:55.615216 GENERIC: 0.0
1533 12:40:55.618585 GENERIC: 1.0
1534 12:40:55.618690 PCI: 00:1f.3
1535 12:40:55.628341 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1536 12:40:55.638561 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1537 12:40:55.641849 PCI: 00:1f.5
1538 12:40:55.651451 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1539 12:40:55.654969 CPU_CLUSTER: 0 child on link 0 APIC: 00
1540 12:40:55.658446 APIC: 00
1541 12:40:55.658518 APIC: 01
1542 12:40:55.658578 APIC: 02
1543 12:40:55.661440 APIC: 04
1544 12:40:55.661555 APIC: 06
1545 12:40:55.664920 APIC: 07
1546 12:40:55.665015 APIC: 03
1547 12:40:55.665101 APIC: 05
1548 12:40:55.668267 Done allocating resources.
1549 12:40:55.674930 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1550 12:40:55.681647 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1551 12:40:55.685088 Configure GPIOs for I2S audio on UP4.
1552 12:40:55.691676 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1553 12:40:55.694839 Enabling resources...
1554 12:40:55.698136 PCI: 00:00.0 subsystem <- 8086/9a12
1555 12:40:55.701620 PCI: 00:00.0 cmd <- 06
1556 12:40:55.704996 PCI: 00:02.0 subsystem <- 8086/9a40
1557 12:40:55.707866 PCI: 00:02.0 cmd <- 03
1558 12:40:55.711409 PCI: 00:04.0 subsystem <- 8086/9a03
1559 12:40:55.711481 PCI: 00:04.0 cmd <- 02
1560 12:40:55.718316 PCI: 00:05.0 subsystem <- 8086/9a19
1561 12:40:55.718391 PCI: 00:05.0 cmd <- 02
1562 12:40:55.721317 PCI: 00:08.0 subsystem <- 8086/9a11
1563 12:40:55.724624 PCI: 00:08.0 cmd <- 06
1564 12:40:55.728021 PCI: 00:0d.0 subsystem <- 8086/9a13
1565 12:40:55.731349 PCI: 00:0d.0 cmd <- 02
1566 12:40:55.734790 PCI: 00:14.0 subsystem <- 8086/a0ed
1567 12:40:55.738535 PCI: 00:14.0 cmd <- 02
1568 12:40:55.741368 PCI: 00:14.2 subsystem <- 8086/a0ef
1569 12:40:55.744870 PCI: 00:14.2 cmd <- 02
1570 12:40:55.748200 PCI: 00:14.3 subsystem <- 8086/a0f0
1571 12:40:55.751539 PCI: 00:14.3 cmd <- 02
1572 12:40:55.754797 PCI: 00:15.0 subsystem <- 8086/a0e8
1573 12:40:55.754869 PCI: 00:15.0 cmd <- 02
1574 12:40:55.761627 PCI: 00:15.1 subsystem <- 8086/a0e9
1575 12:40:55.761727 PCI: 00:15.1 cmd <- 02
1576 12:40:55.765035 PCI: 00:15.2 subsystem <- 8086/a0ea
1577 12:40:55.768488 PCI: 00:15.2 cmd <- 02
1578 12:40:55.772006 PCI: 00:15.3 subsystem <- 8086/a0eb
1579 12:40:55.775506 PCI: 00:15.3 cmd <- 02
1580 12:40:55.778999 PCI: 00:16.0 subsystem <- 8086/a0e0
1581 12:40:55.782042 PCI: 00:16.0 cmd <- 02
1582 12:40:55.785295 PCI: 00:19.1 subsystem <- 8086/a0c6
1583 12:40:55.788354 PCI: 00:19.1 cmd <- 02
1584 12:40:55.792092 PCI: 00:1d.0 bridge ctrl <- 0013
1585 12:40:55.794960 PCI: 00:1d.0 subsystem <- 8086/a0b0
1586 12:40:55.798787 PCI: 00:1d.0 cmd <- 06
1587 12:40:55.801839 PCI: 00:1e.0 subsystem <- 8086/a0a8
1588 12:40:55.801910 PCI: 00:1e.0 cmd <- 06
1589 12:40:55.808436 PCI: 00:1e.2 subsystem <- 8086/a0aa
1590 12:40:55.808537 PCI: 00:1e.2 cmd <- 06
1591 12:40:55.811973 PCI: 00:1e.3 subsystem <- 8086/a0ab
1592 12:40:55.815033 PCI: 00:1e.3 cmd <- 02
1593 12:40:55.818381 PCI: 00:1f.0 subsystem <- 8086/a087
1594 12:40:55.821650 PCI: 00:1f.0 cmd <- 407
1595 12:40:55.824891 PCI: 00:1f.3 subsystem <- 8086/a0c8
1596 12:40:55.828235 PCI: 00:1f.3 cmd <- 02
1597 12:40:55.831693 PCI: 00:1f.5 subsystem <- 8086/a0a4
1598 12:40:55.835182 PCI: 00:1f.5 cmd <- 406
1599 12:40:55.839102 PCI: 01:00.0 cmd <- 02
1600 12:40:55.843521 done.
1601 12:40:55.847014 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1602 12:40:55.849831 Initializing devices...
1603 12:40:55.853158 Root Device init
1604 12:40:55.856406 Chrome EC: Set SMI mask to 0x0000000000000000
1605 12:40:55.863277 Chrome EC: clear events_b mask to 0x0000000000000000
1606 12:40:55.869745 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1607 12:40:55.873197 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1608 12:40:55.879959 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1609 12:40:55.886275 Chrome EC: Set WAKE mask to 0x0000000000000000
1610 12:40:55.889694 fw_config match found: DB_USB=USB3_ACTIVE
1611 12:40:55.896285 Configure Right Type-C port orientation for retimer
1612 12:40:55.899678 Root Device init finished in 42 msecs
1613 12:40:55.902921 PCI: 00:00.0 init
1614 12:40:55.906359 CPU TDP = 9 Watts
1615 12:40:55.906459 CPU PL1 = 9 Watts
1616 12:40:55.909352 CPU PL2 = 40 Watts
1617 12:40:55.909432 CPU PL4 = 83 Watts
1618 12:40:55.912618 PCI: 00:00.0 init finished in 8 msecs
1619 12:40:55.915945 PCI: 00:02.0 init
1620 12:40:55.919287 GMA: Found VBT in CBFS
1621 12:40:55.922924 GMA: Found valid VBT in CBFS
1622 12:40:55.925940 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1623 12:40:55.935913 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1624 12:40:55.939650 PCI: 00:02.0 init finished in 18 msecs
1625 12:40:55.942770 PCI: 00:05.0 init
1626 12:40:55.946380 PCI: 00:05.0 init finished in 0 msecs
1627 12:40:55.946459 PCI: 00:08.0 init
1628 12:40:55.952586 PCI: 00:08.0 init finished in 0 msecs
1629 12:40:55.952666 PCI: 00:14.0 init
1630 12:40:55.959198 PCI: 00:14.0 init finished in 0 msecs
1631 12:40:55.959294 PCI: 00:14.2 init
1632 12:40:55.962603 PCI: 00:14.2 init finished in 0 msecs
1633 12:40:55.966728 PCI: 00:15.0 init
1634 12:40:55.969430 I2C bus 0 version 0x3230302a
1635 12:40:55.972960 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1636 12:40:55.976356 PCI: 00:15.0 init finished in 6 msecs
1637 12:40:55.979877 PCI: 00:15.1 init
1638 12:40:55.983152 I2C bus 1 version 0x3230302a
1639 12:40:55.986199 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1640 12:40:55.989489 PCI: 00:15.1 init finished in 6 msecs
1641 12:40:55.992945 PCI: 00:15.2 init
1642 12:40:55.993045 I2C bus 2 version 0x3230302a
1643 12:40:55.999490 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1644 12:40:56.002850 PCI: 00:15.2 init finished in 6 msecs
1645 12:40:56.002950 PCI: 00:15.3 init
1646 12:40:56.006258 I2C bus 3 version 0x3230302a
1647 12:40:56.009496 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1648 12:40:56.016351 PCI: 00:15.3 init finished in 6 msecs
1649 12:40:56.016457 PCI: 00:16.0 init
1650 12:40:56.019772 PCI: 00:16.0 init finished in 0 msecs
1651 12:40:56.023231 PCI: 00:19.1 init
1652 12:40:56.026621 I2C bus 5 version 0x3230302a
1653 12:40:56.029690 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1654 12:40:56.033028 PCI: 00:19.1 init finished in 6 msecs
1655 12:40:56.036460 PCI: 00:1d.0 init
1656 12:40:56.039896 Initializing PCH PCIe bridge.
1657 12:40:56.042844 PCI: 00:1d.0 init finished in 3 msecs
1658 12:40:56.046502 PCI: 00:1f.0 init
1659 12:40:56.049457 IOAPIC: Initializing IOAPIC at 0xfec00000
1660 12:40:56.056304 IOAPIC: Bootstrap Processor Local APIC = 0x00
1661 12:40:56.056385 IOAPIC: ID = 0x02
1662 12:40:56.059588 IOAPIC: Dumping registers
1663 12:40:56.062980 reg 0x0000: 0x02000000
1664 12:40:56.063059 reg 0x0001: 0x00770020
1665 12:40:56.066509 reg 0x0002: 0x00000000
1666 12:40:56.069828 PCI: 00:1f.0 init finished in 21 msecs
1667 12:40:56.073214 PCI: 00:1f.2 init
1668 12:40:56.076724 Disabling ACPI via APMC.
1669 12:40:56.080163 APMC done.
1670 12:40:56.082937 PCI: 00:1f.2 init finished in 5 msecs
1671 12:40:56.094281 PCI: 01:00.0 init
1672 12:40:56.097081 PCI: 01:00.0 init finished in 0 msecs
1673 12:40:56.100458 PNP: 0c09.0 init
1674 12:40:56.103839 Google Chrome EC uptime: 8.406 seconds
1675 12:40:56.110786 Google Chrome AP resets since EC boot: 1
1676 12:40:56.113930 Google Chrome most recent AP reset causes:
1677 12:40:56.117268 0.347: 32775 shutdown: entering G3
1678 12:40:56.123919 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1679 12:40:56.127312 PNP: 0c09.0 init finished in 23 msecs
1680 12:40:56.133066 Devices initialized
1681 12:40:56.136559 Show all devs... After init.
1682 12:40:56.139981 Root Device: enabled 1
1683 12:40:56.140060 DOMAIN: 0000: enabled 1
1684 12:40:56.143323 CPU_CLUSTER: 0: enabled 1
1685 12:40:56.146834 PCI: 00:00.0: enabled 1
1686 12:40:56.149775 PCI: 00:02.0: enabled 1
1687 12:40:56.149854 PCI: 00:04.0: enabled 1
1688 12:40:56.153255 PCI: 00:05.0: enabled 1
1689 12:40:56.156631 PCI: 00:06.0: enabled 0
1690 12:40:56.159798 PCI: 00:07.0: enabled 0
1691 12:40:56.159876 PCI: 00:07.1: enabled 0
1692 12:40:56.163320 PCI: 00:07.2: enabled 0
1693 12:40:56.166373 PCI: 00:07.3: enabled 0
1694 12:40:56.170057 PCI: 00:08.0: enabled 1
1695 12:40:56.170136 PCI: 00:09.0: enabled 0
1696 12:40:56.173182 PCI: 00:0a.0: enabled 0
1697 12:40:56.176274 PCI: 00:0d.0: enabled 1
1698 12:40:56.179670 PCI: 00:0d.1: enabled 0
1699 12:40:56.179749 PCI: 00:0d.2: enabled 0
1700 12:40:56.182929 PCI: 00:0d.3: enabled 0
1701 12:40:56.186301 PCI: 00:0e.0: enabled 0
1702 12:40:56.186382 PCI: 00:10.2: enabled 1
1703 12:40:56.189692 PCI: 00:10.6: enabled 0
1704 12:40:56.193097 PCI: 00:10.7: enabled 0
1705 12:40:56.196570 PCI: 00:12.0: enabled 0
1706 12:40:56.196665 PCI: 00:12.6: enabled 0
1707 12:40:56.199837 PCI: 00:13.0: enabled 0
1708 12:40:56.203158 PCI: 00:14.0: enabled 1
1709 12:40:56.206386 PCI: 00:14.1: enabled 0
1710 12:40:56.206457 PCI: 00:14.2: enabled 1
1711 12:40:56.209799 PCI: 00:14.3: enabled 1
1712 12:40:56.213097 PCI: 00:15.0: enabled 1
1713 12:40:56.216176 PCI: 00:15.1: enabled 1
1714 12:40:56.216259 PCI: 00:15.2: enabled 1
1715 12:40:56.219555 PCI: 00:15.3: enabled 1
1716 12:40:56.223277 PCI: 00:16.0: enabled 1
1717 12:40:56.223358 PCI: 00:16.1: enabled 0
1718 12:40:56.226421 PCI: 00:16.2: enabled 0
1719 12:40:56.229817 PCI: 00:16.3: enabled 0
1720 12:40:56.232740 PCI: 00:16.4: enabled 0
1721 12:40:56.232818 PCI: 00:16.5: enabled 0
1722 12:40:56.236121 PCI: 00:17.0: enabled 0
1723 12:40:56.239708 PCI: 00:19.0: enabled 0
1724 12:40:56.243019 PCI: 00:19.1: enabled 1
1725 12:40:56.243102 PCI: 00:19.2: enabled 0
1726 12:40:56.246439 PCI: 00:1c.0: enabled 1
1727 12:40:56.249306 PCI: 00:1c.1: enabled 0
1728 12:40:56.252846 PCI: 00:1c.2: enabled 0
1729 12:40:56.252925 PCI: 00:1c.3: enabled 0
1730 12:40:56.256208 PCI: 00:1c.4: enabled 0
1731 12:40:56.259672 PCI: 00:1c.5: enabled 0
1732 12:40:56.262576 PCI: 00:1c.6: enabled 1
1733 12:40:56.262666 PCI: 00:1c.7: enabled 0
1734 12:40:56.265932 PCI: 00:1d.0: enabled 1
1735 12:40:56.269713 PCI: 00:1d.1: enabled 0
1736 12:40:56.269792 PCI: 00:1d.2: enabled 1
1737 12:40:56.272819 PCI: 00:1d.3: enabled 0
1738 12:40:56.276281 PCI: 00:1e.0: enabled 1
1739 12:40:56.279695 PCI: 00:1e.1: enabled 0
1740 12:40:56.279774 PCI: 00:1e.2: enabled 1
1741 12:40:56.283058 PCI: 00:1e.3: enabled 1
1742 12:40:56.286479 PCI: 00:1f.0: enabled 1
1743 12:40:56.289706 PCI: 00:1f.1: enabled 0
1744 12:40:56.289813 PCI: 00:1f.2: enabled 1
1745 12:40:56.292763 PCI: 00:1f.3: enabled 1
1746 12:40:56.295887 PCI: 00:1f.4: enabled 0
1747 12:40:56.299627 PCI: 00:1f.5: enabled 1
1748 12:40:56.299726 PCI: 00:1f.6: enabled 0
1749 12:40:56.302460 PCI: 00:1f.7: enabled 0
1750 12:40:56.306155 APIC: 00: enabled 1
1751 12:40:56.306262 GENERIC: 0.0: enabled 1
1752 12:40:56.309194 GENERIC: 0.0: enabled 1
1753 12:40:56.313069 GENERIC: 1.0: enabled 1
1754 12:40:56.315868 GENERIC: 0.0: enabled 1
1755 12:40:56.315974 GENERIC: 1.0: enabled 1
1756 12:40:56.319245 USB0 port 0: enabled 1
1757 12:40:56.322677 GENERIC: 0.0: enabled 1
1758 12:40:56.322768 USB0 port 0: enabled 1
1759 12:40:56.326155 GENERIC: 0.0: enabled 1
1760 12:40:56.329429 I2C: 00:1a: enabled 1
1761 12:40:56.332453 I2C: 00:31: enabled 1
1762 12:40:56.332532 I2C: 00:32: enabled 1
1763 12:40:56.335711 I2C: 00:10: enabled 1
1764 12:40:56.339014 I2C: 00:15: enabled 1
1765 12:40:56.339094 GENERIC: 0.0: enabled 0
1766 12:40:56.342501 GENERIC: 1.0: enabled 0
1767 12:40:56.346075 GENERIC: 0.0: enabled 1
1768 12:40:56.346155 SPI: 00: enabled 1
1769 12:40:56.349752 SPI: 00: enabled 1
1770 12:40:56.352506 PNP: 0c09.0: enabled 1
1771 12:40:56.352588 GENERIC: 0.0: enabled 1
1772 12:40:56.355973 USB3 port 0: enabled 1
1773 12:40:56.359442 USB3 port 1: enabled 1
1774 12:40:56.359521 USB3 port 2: enabled 0
1775 12:40:56.362441 USB3 port 3: enabled 0
1776 12:40:56.365751 USB2 port 0: enabled 0
1777 12:40:56.369165 USB2 port 1: enabled 1
1778 12:40:56.369272 USB2 port 2: enabled 1
1779 12:40:56.372738 USB2 port 3: enabled 0
1780 12:40:56.375601 USB2 port 4: enabled 1
1781 12:40:56.375680 USB2 port 5: enabled 0
1782 12:40:56.378943 USB2 port 6: enabled 0
1783 12:40:56.382170 USB2 port 7: enabled 0
1784 12:40:56.385766 USB2 port 8: enabled 0
1785 12:40:56.385846 USB2 port 9: enabled 0
1786 12:40:56.388765 USB3 port 0: enabled 0
1787 12:40:56.392449 USB3 port 1: enabled 1
1788 12:40:56.392529 USB3 port 2: enabled 0
1789 12:40:56.395821 USB3 port 3: enabled 0
1790 12:40:56.399116 GENERIC: 0.0: enabled 1
1791 12:40:56.402500 GENERIC: 1.0: enabled 1
1792 12:40:56.402579 APIC: 01: enabled 1
1793 12:40:56.405328 APIC: 02: enabled 1
1794 12:40:56.405449 APIC: 04: enabled 1
1795 12:40:56.408827 APIC: 06: enabled 1
1796 12:40:56.412091 APIC: 07: enabled 1
1797 12:40:56.412170 APIC: 03: enabled 1
1798 12:40:56.415163 APIC: 05: enabled 1
1799 12:40:56.418801 PCI: 01:00.0: enabled 1
1800 12:40:56.421997 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1801 12:40:56.428631 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1802 12:40:56.432058 ELOG: NV offset 0xf30000 size 0x1000
1803 12:40:56.438726 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1804 12:40:56.445182 ELOG: Event(17) added with size 13 at 2024-01-03 12:40:55 UTC
1805 12:40:56.451913 ELOG: Event(92) added with size 9 at 2024-01-03 12:40:55 UTC
1806 12:40:56.458289 ELOG: Event(93) added with size 9 at 2024-01-03 12:40:55 UTC
1807 12:40:56.465192 ELOG: Event(9E) added with size 10 at 2024-01-03 12:40:55 UTC
1808 12:40:56.472003 ELOG: Event(9F) added with size 14 at 2024-01-03 12:40:55 UTC
1809 12:40:56.478263 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1810 12:40:56.481746 ELOG: Event(A1) added with size 10 at 2024-01-03 12:40:55 UTC
1811 12:40:56.488543 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1812 12:40:56.495038 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1813 12:40:56.498532 Finalize devices...
1814 12:40:56.498634 Devices finalized
1815 12:40:56.505073 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1816 12:40:56.508141 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1817 12:40:56.515021 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1818 12:40:56.521677 ME: HFSTS1 : 0x80030055
1819 12:40:56.524859 ME: HFSTS2 : 0x30280116
1820 12:40:56.528240 ME: HFSTS3 : 0x00000050
1821 12:40:56.534673 ME: HFSTS4 : 0x00004000
1822 12:40:56.538349 ME: HFSTS5 : 0x00000000
1823 12:40:56.541691 ME: HFSTS6 : 0x00400006
1824 12:40:56.544612 ME: Manufacturing Mode : YES
1825 12:40:56.551541 ME: SPI Protection Mode Enabled : NO
1826 12:40:56.554758 ME: FW Partition Table : OK
1827 12:40:56.558149 ME: Bringup Loader Failure : NO
1828 12:40:56.561654 ME: Firmware Init Complete : NO
1829 12:40:56.564470 ME: Boot Options Present : NO
1830 12:40:56.567971 ME: Update In Progress : NO
1831 12:40:56.571546 ME: D0i3 Support : YES
1832 12:40:56.574987 ME: Low Power State Enabled : NO
1833 12:40:56.581424 ME: CPU Replaced : YES
1834 12:40:56.584616 ME: CPU Replacement Valid : YES
1835 12:40:56.587990 ME: Current Working State : 5
1836 12:40:56.591405 ME: Current Operation State : 1
1837 12:40:56.594299 ME: Current Operation Mode : 3
1838 12:40:56.597680 ME: Error Code : 0
1839 12:40:56.601019 ME: Enhanced Debug Mode : NO
1840 12:40:56.604404 ME: CPU Debug Disabled : YES
1841 12:40:56.610920 ME: TXT Support : NO
1842 12:40:56.614324 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1843 12:40:56.624528 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1844 12:40:56.627858 CBFS: 'fallback/slic' not found.
1845 12:40:56.631209 ACPI: Writing ACPI tables at 76b01000.
1846 12:40:56.631289 ACPI: * FACS
1847 12:40:56.634603 ACPI: * DSDT
1848 12:40:56.637832 Ramoops buffer: 0x100000@0x76a00000.
1849 12:40:56.641317 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1850 12:40:56.648002 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1851 12:40:56.651138 Google Chrome EC: version:
1852 12:40:56.654405 ro: voema_v2.0.7540-147f8d37d1
1853 12:40:56.657890 rw: voema_v2.0.7540-147f8d37d1
1854 12:40:56.657970 running image: 2
1855 12:40:56.663948 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1856 12:40:56.669102 ACPI: * FADT
1857 12:40:56.669181 SCI is IRQ9
1858 12:40:56.675958 ACPI: added table 1/32, length now 40
1859 12:40:56.676038 ACPI: * SSDT
1860 12:40:56.679251 Found 1 CPU(s) with 8 core(s) each.
1861 12:40:56.685601 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1862 12:40:56.689024 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1863 12:40:56.692435 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1864 12:40:56.695954 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1865 12:40:56.702465 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1866 12:40:56.709111 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1867 12:40:56.712439 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1868 12:40:56.718798 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1869 12:40:56.725707 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1870 12:40:56.728691 \_SB.PCI0.RP09: Added StorageD3Enable property
1871 12:40:56.732133 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1872 12:40:56.739028 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1873 12:40:56.746484 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1874 12:40:56.749721 PS2K: Passing 80 keymaps to kernel
1875 12:40:56.755950 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1876 12:40:56.762752 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1877 12:40:56.769186 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1878 12:40:56.776146 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1879 12:40:56.783013 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1880 12:40:56.789362 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1881 12:40:56.796275 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1882 12:40:56.802683 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1883 12:40:56.805895 ACPI: added table 2/32, length now 44
1884 12:40:56.805970 ACPI: * MCFG
1885 12:40:56.812499 ACPI: added table 3/32, length now 48
1886 12:40:56.812610 ACPI: * TPM2
1887 12:40:56.815772 TPM2 log created at 0x769f0000
1888 12:40:56.819106 ACPI: added table 4/32, length now 52
1889 12:40:56.822579 ACPI: * MADT
1890 12:40:56.822651 SCI is IRQ9
1891 12:40:56.825661 ACPI: added table 5/32, length now 56
1892 12:40:56.829210 current = 76b09850
1893 12:40:56.829311 ACPI: * DMAR
1894 12:40:56.832653 ACPI: added table 6/32, length now 60
1895 12:40:56.839137 ACPI: added table 7/32, length now 64
1896 12:40:56.839238 ACPI: * HPET
1897 12:40:56.842182 ACPI: added table 8/32, length now 68
1898 12:40:56.845211 ACPI: done.
1899 12:40:56.848732 ACPI tables: 35216 bytes.
1900 12:40:56.848838 smbios_write_tables: 769ef000
1901 12:40:56.851984 EC returned error result code 3
1902 12:40:56.855455 Couldn't obtain OEM name from CBI
1903 12:40:56.859584 Create SMBIOS type 16
1904 12:40:56.862842 Create SMBIOS type 17
1905 12:40:56.866261 GENERIC: 0.0 (WIFI Device)
1906 12:40:56.866351 SMBIOS tables: 1750 bytes.
1907 12:40:56.872585 Writing table forward entry at 0x00000500
1908 12:40:56.879113 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1909 12:40:56.882769 Writing coreboot table at 0x76b25000
1910 12:40:56.889643 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1911 12:40:56.892734 1. 0000000000001000-000000000009ffff: RAM
1912 12:40:56.896088 2. 00000000000a0000-00000000000fffff: RESERVED
1913 12:40:56.902277 3. 0000000000100000-00000000769eefff: RAM
1914 12:40:56.905674 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1915 12:40:56.912364 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1916 12:40:56.918922 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1917 12:40:56.922424 7. 0000000077000000-000000007fbfffff: RESERVED
1918 12:40:56.925841 8. 00000000c0000000-00000000cfffffff: RESERVED
1919 12:40:56.932342 9. 00000000f8000000-00000000f9ffffff: RESERVED
1920 12:40:56.935760 10. 00000000fb000000-00000000fb000fff: RESERVED
1921 12:40:56.942674 11. 00000000fe000000-00000000fe00ffff: RESERVED
1922 12:40:56.945906 12. 00000000fed80000-00000000fed87fff: RESERVED
1923 12:40:56.952297 13. 00000000fed90000-00000000fed92fff: RESERVED
1924 12:40:56.955943 14. 00000000feda0000-00000000feda1fff: RESERVED
1925 12:40:56.962180 15. 00000000fedc0000-00000000feddffff: RESERVED
1926 12:40:56.965378 16. 0000000100000000-00000002803fffff: RAM
1927 12:40:56.968862 Passing 4 GPIOs to payload:
1928 12:40:56.972130 NAME | PORT | POLARITY | VALUE
1929 12:40:56.978893 lid | undefined | high | high
1930 12:40:56.982300 power | undefined | high | low
1931 12:40:56.988854 oprom | undefined | high | low
1932 12:40:56.995435 EC in RW | 0x000000e5 | high | high
1933 12:40:57.002199 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum a74e
1934 12:40:57.002282 coreboot table: 1576 bytes.
1935 12:40:57.009113 IMD ROOT 0. 0x76fff000 0x00001000
1936 12:40:57.012499 IMD SMALL 1. 0x76ffe000 0x00001000
1937 12:40:57.015188 FSP MEMORY 2. 0x76c4e000 0x003b0000
1938 12:40:57.018527 VPD 3. 0x76c4d000 0x00000367
1939 12:40:57.022259 RO MCACHE 4. 0x76c4c000 0x00000fdc
1940 12:40:57.025600 CONSOLE 5. 0x76c2c000 0x00020000
1941 12:40:57.028531 FMAP 6. 0x76c2b000 0x00000578
1942 12:40:57.032005 TIME STAMP 7. 0x76c2a000 0x00000910
1943 12:40:57.035226 VBOOT WORK 8. 0x76c16000 0x00014000
1944 12:40:57.041952 ROMSTG STCK 9. 0x76c15000 0x00001000
1945 12:40:57.045359 AFTER CAR 10. 0x76c0a000 0x0000b000
1946 12:40:57.048824 RAMSTAGE 11. 0x76b97000 0x00073000
1947 12:40:57.052260 REFCODE 12. 0x76b42000 0x00055000
1948 12:40:57.055469 SMM BACKUP 13. 0x76b32000 0x00010000
1949 12:40:57.058527 4f444749 14. 0x76b30000 0x00002000
1950 12:40:57.062343 EXT VBT15. 0x76b2d000 0x0000219f
1951 12:40:57.065336 COREBOOT 16. 0x76b25000 0x00008000
1952 12:40:57.068966 ACPI 17. 0x76b01000 0x00024000
1953 12:40:57.075399 ACPI GNVS 18. 0x76b00000 0x00001000
1954 12:40:57.078850 RAMOOPS 19. 0x76a00000 0x00100000
1955 12:40:57.082289 TPM2 TCGLOG20. 0x769f0000 0x00010000
1956 12:40:57.085725 SMBIOS 21. 0x769ef000 0x00000800
1957 12:40:57.085807 IMD small region:
1958 12:40:57.092060 IMD ROOT 0. 0x76ffec00 0x00000400
1959 12:40:57.095392 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1960 12:40:57.098756 POWER STATE 2. 0x76ffeb80 0x00000044
1961 12:40:57.102045 ROMSTAGE 3. 0x76ffeb60 0x00000004
1962 12:40:57.105733 MEM INFO 4. 0x76ffe980 0x000001e0
1963 12:40:57.112003 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1964 12:40:57.115776 MTRR: Physical address space:
1965 12:40:57.122375 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1966 12:40:57.128857 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1967 12:40:57.135586 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1968 12:40:57.142247 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1969 12:40:57.145168 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1970 12:40:57.151935 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1971 12:40:57.158866 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1972 12:40:57.161950 MTRR: Fixed MSR 0x250 0x0606060606060606
1973 12:40:57.168942 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 12:40:57.171590 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 12:40:57.175378 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 12:40:57.178850 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 12:40:57.184912 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 12:40:57.188651 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 12:40:57.192016 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 12:40:57.195407 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 12:40:57.201507 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 12:40:57.204977 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 12:40:57.208279 call enable_fixed_mtrr()
1984 12:40:57.211622 CPU physical address size: 39 bits
1985 12:40:57.214825 MTRR: default type WB/UC MTRR counts: 6/6.
1986 12:40:57.218478 MTRR: UC selected as default type.
1987 12:40:57.224887 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1988 12:40:57.231486 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1989 12:40:57.238358 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1990 12:40:57.244947 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1991 12:40:57.251737 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1992 12:40:57.258082 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1993 12:40:57.258199
1994 12:40:57.258263 MTRR check
1995 12:40:57.261740 Fixed MTRRs : Enabled
1996 12:40:57.264896 Variable MTRRs: Enabled
1997 12:40:57.264994
1998 12:40:57.268209 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 12:40:57.271635 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 12:40:57.278043 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 12:40:57.281544 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 12:40:57.285071 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 12:40:57.288320 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 12:40:57.294643 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 12:40:57.297951 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 12:40:57.301374 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 12:40:57.304752 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 12:40:57.311459 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 12:40:57.318275 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2010 12:40:57.318362 call enable_fixed_mtrr()
2011 12:40:57.321635 Checking cr50 for pending updates
2012 12:40:57.325171 CPU physical address size: 39 bits
2013 12:40:57.331814 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 12:40:57.334750 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 12:40:57.338563 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 12:40:57.341868 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 12:40:57.347996 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 12:40:57.351643 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 12:40:57.354710 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 12:40:57.358108 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 12:40:57.365016 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 12:40:57.367880 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 12:40:57.371671 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 12:40:57.374450 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 12:40:57.381743 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 12:40:57.381847 call enable_fixed_mtrr()
2027 12:40:57.388376 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 12:40:57.391709 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 12:40:57.395102 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 12:40:57.398494 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 12:40:57.404901 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 12:40:57.408334 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 12:40:57.411431 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 12:40:57.414901 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 12:40:57.421701 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 12:40:57.424541 CPU physical address size: 39 bits
2037 12:40:57.427955 call enable_fixed_mtrr()
2038 12:40:57.431248 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 12:40:57.435067 MTRR: Fixed MSR 0x250 0x0606060606060606
2040 12:40:57.441063 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 12:40:57.444667 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 12:40:57.447681 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 12:40:57.450955 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 12:40:57.457586 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 12:40:57.461015 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 12:40:57.464560 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 12:40:57.467906 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 12:40:57.474630 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 12:40:57.477417 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 12:40:57.481137 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 12:40:57.484286 call enable_fixed_mtrr()
2052 12:40:57.487514 MTRR: Fixed MSR 0x259 0x0000000000000000
2053 12:40:57.494406 MTRR: Fixed MSR 0x268 0x0606060606060606
2054 12:40:57.497809 MTRR: Fixed MSR 0x269 0x0606060606060606
2055 12:40:57.501218 MTRR: Fixed MSR 0x26a 0x0606060606060606
2056 12:40:57.504052 MTRR: Fixed MSR 0x26b 0x0606060606060606
2057 12:40:57.510894 MTRR: Fixed MSR 0x26c 0x0606060606060606
2058 12:40:57.514197 MTRR: Fixed MSR 0x26d 0x0606060606060606
2059 12:40:57.517461 MTRR: Fixed MSR 0x26e 0x0606060606060606
2060 12:40:57.520395 MTRR: Fixed MSR 0x26f 0x0606060606060606
2061 12:40:57.524912 CPU physical address size: 39 bits
2062 12:40:57.531280 call enable_fixed_mtrr()
2063 12:40:57.534649 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 12:40:57.537970 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 12:40:57.541372 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 12:40:57.548161 MTRR: Fixed MSR 0x259 0x0000000000000000
2067 12:40:57.551369 MTRR: Fixed MSR 0x268 0x0606060606060606
2068 12:40:57.554528 MTRR: Fixed MSR 0x269 0x0606060606060606
2069 12:40:57.558134 MTRR: Fixed MSR 0x26a 0x0606060606060606
2070 12:40:57.561383 MTRR: Fixed MSR 0x26b 0x0606060606060606
2071 12:40:57.568050 MTRR: Fixed MSR 0x26c 0x0606060606060606
2072 12:40:57.571563 MTRR: Fixed MSR 0x26d 0x0606060606060606
2073 12:40:57.574560 MTRR: Fixed MSR 0x26e 0x0606060606060606
2074 12:40:57.578031 MTRR: Fixed MSR 0x26f 0x0606060606060606
2075 12:40:57.585360 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 12:40:57.585442 call enable_fixed_mtrr()
2077 12:40:57.592556 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 12:40:57.595512 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 12:40:57.598710 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 12:40:57.602219 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 12:40:57.608540 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 12:40:57.611893 MTRR: Fixed MSR 0x26c 0x0606060606060606
2083 12:40:57.615197 MTRR: Fixed MSR 0x26d 0x0606060606060606
2084 12:40:57.618848 MTRR: Fixed MSR 0x26e 0x0606060606060606
2085 12:40:57.625501 MTRR: Fixed MSR 0x26f 0x0606060606060606
2086 12:40:57.628953 CPU physical address size: 39 bits
2087 12:40:57.631839 call enable_fixed_mtrr()
2088 12:40:57.635529 CPU physical address size: 39 bits
2089 12:40:57.638790 CPU physical address size: 39 bits
2090 12:40:57.642127 CPU physical address size: 39 bits
2091 12:40:57.644959 Reading cr50 TPM mode
2092 12:40:57.654689 BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms
2093 12:40:57.664839 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2094 12:40:57.667988 Checking segment from ROM address 0xffc02b38
2095 12:40:57.671423 Checking segment from ROM address 0xffc02b54
2096 12:40:57.677988 Loading segment from ROM address 0xffc02b38
2097 12:40:57.678068 code (compression=0)
2098 12:40:57.687962 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2099 12:40:57.694640 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2100 12:40:57.698026 it's not compressed!
2101 12:40:57.837679 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2102 12:40:57.843822 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2103 12:40:57.850554 Loading segment from ROM address 0xffc02b54
2104 12:40:57.850634 Entry Point 0x30000000
2105 12:40:57.853873 Loaded segments
2106 12:40:57.860721 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2107 12:40:57.903342 Finalizing chipset.
2108 12:40:57.906922 Finalizing SMM.
2109 12:40:57.907004 APMC done.
2110 12:40:57.913318 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2111 12:40:57.916904 mp_park_aps done after 0 msecs.
2112 12:40:57.919840 Jumping to boot code at 0x30000000(0x76b25000)
2113 12:40:57.930074 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2114 12:40:57.930155
2115 12:40:57.930217
2116 12:40:57.930276
2117 12:40:57.933396 Starting depthcharge on Voema...
2118 12:40:57.933506
2119 12:40:57.933855 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2120 12:40:57.933945 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2121 12:40:57.934026 Setting prompt string to ['volteer:']
2122 12:40:57.934103 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2123 12:40:57.943270 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2124 12:40:57.943351
2125 12:40:57.949931 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2126 12:40:57.950011
2127 12:40:57.953167 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2128 12:40:57.957463
2129 12:40:57.957551 Failed to find eMMC card reader
2130 12:40:57.957614
2131 12:40:57.961095 Wipe memory regions:
2132 12:40:57.961174
2133 12:40:57.964372 [0x00000000001000, 0x000000000a0000)
2134 12:40:57.964453
2135 12:40:57.967776 [0x00000000100000, 0x00000030000000)
2136 12:40:57.995408
2137 12:40:57.998579 [0x00000032662db0, 0x000000769ef000)
2138 12:40:58.033380
2139 12:40:58.037108 [0x00000100000000, 0x00000280400000)
2140 12:40:58.238936
2141 12:40:58.242020 ec_init: CrosEC protocol v3 supported (256, 256)
2142 12:40:58.242107
2143 12:40:58.248888 update_port_state: port C0 state: usb enable 1 mux conn 0
2144 12:40:58.248965
2145 12:40:58.258685 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2146 12:40:58.258768
2147 12:40:58.265249 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2148 12:40:58.265326
2149 12:40:58.268608 send_conn_disc_msg: pmc_send_cmd succeeded
2150 12:40:58.701310
2151 12:40:58.701487 R8152: Initializing
2152 12:40:58.701593
2153 12:40:58.704613 Version 6 (ocp_data = 5c30)
2154 12:40:58.704682
2155 12:40:58.707895 R8152: Done initializing
2156 12:40:58.707965
2157 12:40:58.711178 Adding net device
2158 12:40:59.013744
2159 12:40:59.016997 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2160 12:40:59.017088
2161 12:40:59.017152
2162 12:40:59.017211
2163 12:40:59.019962 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2165 12:40:59.120247 volteer: tftpboot 192.168.201.1 12437344/tftp-deploy-xx8fv787/kernel/bzImage 12437344/tftp-deploy-xx8fv787/kernel/cmdline 12437344/tftp-deploy-xx8fv787/ramdisk/ramdisk.cpio.gz
2166 12:40:59.120389 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2167 12:40:59.120473 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2168 12:40:59.124975 tftpboot 192.168.201.1 12437344/tftp-deploy-xx8fv787/kernel/bzImploy-xx8fv787/kernel/cmdline 12437344/tftp-deploy-xx8fv787/ramdisk/ramdisk.cpio.gz
2169 12:40:59.125057
2170 12:40:59.125119 Waiting for link
2171 12:40:59.328258
2172 12:40:59.328383 done.
2173 12:40:59.328452
2174 12:40:59.328512 MAC: 00:24:32:30:7c:e4
2175 12:40:59.328577
2176 12:40:59.331617 Sending DHCP discover... done.
2177 12:40:59.331686
2178 12:40:59.335139 Waiting for reply... done.
2179 12:40:59.335206
2180 12:40:59.339116 Sending DHCP request... done.
2181 12:40:59.339190
2182 12:40:59.346588 Waiting for reply... done.
2183 12:40:59.346662
2184 12:40:59.346723 My ip is 192.168.201.23
2185 12:40:59.346780
2186 12:40:59.349884 The DHCP server ip is 192.168.201.1
2187 12:40:59.353344
2188 12:40:59.356616 TFTP server IP predefined by user: 192.168.201.1
2189 12:40:59.356691
2190 12:40:59.363312 Bootfile predefined by user: 12437344/tftp-deploy-xx8fv787/kernel/bzImage
2191 12:40:59.363394
2192 12:40:59.366575 Sending tftp read request... done.
2193 12:40:59.366642
2194 12:40:59.369688 Waiting for the transfer...
2195 12:40:59.373103
2196 12:40:59.912305 00000000 ################################################################
2197 12:40:59.912474
2198 12:41:00.451418 00080000 ################################################################
2199 12:41:00.451550
2200 12:41:00.987581 00100000 ################################################################
2201 12:41:00.987708
2202 12:41:01.555779 00180000 ################################################################
2203 12:41:01.555910
2204 12:41:02.106652 00200000 ################################################################
2205 12:41:02.106782
2206 12:41:02.641018 00280000 ################################################################
2207 12:41:02.641186
2208 12:41:03.175916 00300000 ################################################################
2209 12:41:03.176084
2210 12:41:03.709668 00380000 ################################################################
2211 12:41:03.709800
2212 12:41:04.241678 00400000 ################################################################
2213 12:41:04.241812
2214 12:41:04.781842 00480000 ################################################################
2215 12:41:04.781977
2216 12:41:05.332913 00500000 ################################################################
2217 12:41:05.333047
2218 12:41:05.872007 00580000 ################################################################
2219 12:41:05.872144
2220 12:41:06.416773 00600000 ################################################################
2221 12:41:06.416903
2222 12:41:06.950699 00680000 ################################################################
2223 12:41:06.950846
2224 12:41:07.487762 00700000 ################################################################
2225 12:41:07.487896
2226 12:41:08.023112 00780000 ################################################################
2227 12:41:08.023251
2228 12:41:08.224813 00800000 ######################## done.
2229 12:41:08.224938
2230 12:41:08.228053 The bootfile was 8585104 bytes long.
2231 12:41:08.228156
2232 12:41:08.231234 Sending tftp read request... done.
2233 12:41:08.231327
2234 12:41:08.234304 Waiting for the transfer...
2235 12:41:08.234404
2236 12:41:08.773110 00000000 ################################################################
2237 12:41:08.773250
2238 12:41:09.307458 00080000 ################################################################
2239 12:41:09.307588
2240 12:41:09.842450 00100000 ################################################################
2241 12:41:09.842586
2242 12:41:10.384511 00180000 ################################################################
2243 12:41:10.384642
2244 12:41:10.919798 00200000 ################################################################
2245 12:41:10.919938
2246 12:41:11.469299 00280000 ################################################################
2247 12:41:11.469971
2248 12:41:12.216068 00300000 ################################################################
2249 12:41:12.216597
2250 12:41:12.914288 00380000 ################################################################
2251 12:41:12.914423
2252 12:41:13.527776 00400000 ################################################################
2253 12:41:13.528322
2254 12:41:14.149632 00480000 ################################################################
2255 12:41:14.149884
2256 12:41:14.746656 00500000 ################################################################
2257 12:41:14.746904
2258 12:41:15.039747 00580000 ############################## done.
2259 12:41:15.040308
2260 12:41:15.042643 Sending tftp read request... done.
2261 12:41:15.043103
2262 12:41:15.046062 Waiting for the transfer...
2263 12:41:15.046518
2264 12:41:15.049522 00000000 # done.
2265 12:41:15.049946
2266 12:41:15.056551 Command line loaded dynamically from TFTP file: 12437344/tftp-deploy-xx8fv787/kernel/cmdline
2267 12:41:15.057110
2268 12:41:15.082795 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12437344/extract-nfsrootfs-so9ih2ji,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2269 12:41:15.086933
2270 12:41:15.090223 Shutting down all USB controllers.
2271 12:41:15.090790
2272 12:41:15.091155 Removing current net device
2273 12:41:15.091493
2274 12:41:15.093653 Finalizing coreboot
2275 12:41:15.094212
2276 12:41:15.099904 Exiting depthcharge with code 4 at timestamp: 25805523
2277 12:41:15.100473
2278 12:41:15.100906
2279 12:41:15.101246 Starting kernel ...
2280 12:41:15.101619
2281 12:41:15.101946
2282 12:41:15.103220 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2283 12:41:15.103744 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2284 12:41:15.104147 Setting prompt string to ['Linux version [0-9]']
2285 12:41:15.104523 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2286 12:41:15.104889 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2288 12:45:42.104704 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2290 12:45:42.105717 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2292 12:45:42.106512 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2295 12:45:42.107803 end: 2 depthcharge-action (duration 00:05:00) [common]
2297 12:45:42.108876 Cleaning after the job
2298 12:45:42.109132 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437344/tftp-deploy-xx8fv787/ramdisk
2299 12:45:42.110067 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437344/tftp-deploy-xx8fv787/kernel
2300 12:45:42.111358 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437344/tftp-deploy-xx8fv787/nfsrootfs
2301 12:45:42.227368 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437344/tftp-deploy-xx8fv787/modules
2302 12:45:42.227826 start: 4.1 power-off (timeout 00:00:30) [common]
2303 12:45:42.227995 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2304 12:45:42.308000 >> Command sent successfully.
2305 12:45:42.317770 Returned 0 in 0 seconds
2306 12:45:42.419029 end: 4.1 power-off (duration 00:00:00) [common]
2308 12:45:42.420426 start: 4.2 read-feedback (timeout 00:10:00) [common]
2309 12:45:42.421661 Listened to connection for namespace 'common' for up to 1s
2310 12:45:43.422318 Finalising connection for namespace 'common'
2311 12:45:43.422933 Disconnecting from shell: Finalise
2312 12:45:43.423307
2313 12:45:43.524277 end: 4.2 read-feedback (duration 00:00:01) [common]
2314 12:45:43.525016 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12437344
2315 12:45:44.029259 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12437344
2316 12:45:44.029450 JobError: Your job cannot terminate cleanly.