Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
1 12:40:47.918364 lava-dispatcher, installed at version: 2023.10
2 12:40:47.918595 start: 0 validate
3 12:40:47.918745 Start time: 2024-01-03 12:40:47.918737+00:00 (UTC)
4 12:40:47.918873 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:40:47.919031 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:40:48.186425 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:40:48.186607 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:40:48.187801 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:40:48.187943 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:40:48.453703 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:40:48.453891 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rt%2Fv4.4-st20-2890-g35edf5997b50a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:40:48.720495 validate duration: 0.80
14 12:40:48.720818 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:40:48.720948 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:40:48.721049 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:40:48.721195 Not decompressing ramdisk as can be used compressed.
18 12:40:48.721291 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 12:40:48.721368 saving as /var/lib/lava/dispatcher/tmp/12437329/tftp-deploy-lyols63z/ramdisk/initrd.cpio.gz
20 12:40:48.721441 total size: 5671549 (5 MB)
21 12:40:48.722633 progress 0 % (0 MB)
22 12:40:48.724515 progress 5 % (0 MB)
23 12:40:48.726323 progress 10 % (0 MB)
24 12:40:48.727991 progress 15 % (0 MB)
25 12:40:48.729804 progress 20 % (1 MB)
26 12:40:48.731647 progress 25 % (1 MB)
27 12:40:48.733272 progress 30 % (1 MB)
28 12:40:48.735098 progress 35 % (1 MB)
29 12:40:48.736918 progress 40 % (2 MB)
30 12:40:48.738544 progress 45 % (2 MB)
31 12:40:48.740338 progress 50 % (2 MB)
32 12:40:48.742107 progress 55 % (3 MB)
33 12:40:48.743691 progress 60 % (3 MB)
34 12:40:48.745505 progress 65 % (3 MB)
35 12:40:48.747331 progress 70 % (3 MB)
36 12:40:48.748936 progress 75 % (4 MB)
37 12:40:48.750756 progress 80 % (4 MB)
38 12:40:48.752537 progress 85 % (4 MB)
39 12:40:48.754182 progress 90 % (4 MB)
40 12:40:48.756003 progress 95 % (5 MB)
41 12:40:48.757834 progress 100 % (5 MB)
42 12:40:48.757987 5 MB downloaded in 0.04 s (148.00 MB/s)
43 12:40:48.758180 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:40:48.758487 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:40:48.758605 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:40:48.758720 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:40:48.758875 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:40:48.758996 saving as /var/lib/lava/dispatcher/tmp/12437329/tftp-deploy-lyols63z/kernel/bzImage
50 12:40:48.759111 total size: 8585104 (8 MB)
51 12:40:48.759225 No compression specified
52 12:40:48.761061 progress 0 % (0 MB)
53 12:40:48.763736 progress 5 % (0 MB)
54 12:40:48.766327 progress 10 % (0 MB)
55 12:40:48.768929 progress 15 % (1 MB)
56 12:40:48.771606 progress 20 % (1 MB)
57 12:40:48.774326 progress 25 % (2 MB)
58 12:40:48.776931 progress 30 % (2 MB)
59 12:40:48.779524 progress 35 % (2 MB)
60 12:40:48.782224 progress 40 % (3 MB)
61 12:40:48.784867 progress 45 % (3 MB)
62 12:40:48.787478 progress 50 % (4 MB)
63 12:40:48.790214 progress 55 % (4 MB)
64 12:40:48.792752 progress 60 % (4 MB)
65 12:40:48.795284 progress 65 % (5 MB)
66 12:40:48.797912 progress 70 % (5 MB)
67 12:40:48.800453 progress 75 % (6 MB)
68 12:40:48.803021 progress 80 % (6 MB)
69 12:40:48.805714 progress 85 % (6 MB)
70 12:40:48.808347 progress 90 % (7 MB)
71 12:40:48.810907 progress 95 % (7 MB)
72 12:40:48.813540 progress 100 % (8 MB)
73 12:40:48.813863 8 MB downloaded in 0.05 s (149.54 MB/s)
74 12:40:48.814051 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:40:48.814352 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:40:48.814474 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:40:48.814589 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:40:48.814749 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 12:40:48.814861 saving as /var/lib/lava/dispatcher/tmp/12437329/tftp-deploy-lyols63z/nfsrootfs/full.rootfs.tar
81 12:40:48.814975 total size: 126031368 (120 MB)
82 12:40:48.815091 Using unxz to decompress xz
83 12:40:48.820882 progress 0 % (0 MB)
84 12:40:49.382158 progress 5 % (6 MB)
85 12:40:49.946120 progress 10 % (12 MB)
86 12:40:50.529385 progress 15 % (18 MB)
87 12:40:51.112525 progress 20 % (24 MB)
88 12:40:51.506546 progress 25 % (30 MB)
89 12:40:51.896445 progress 30 % (36 MB)
90 12:40:52.202021 progress 35 % (42 MB)
91 12:40:52.407775 progress 40 % (48 MB)
92 12:40:52.831503 progress 45 % (54 MB)
93 12:40:53.250415 progress 50 % (60 MB)
94 12:40:53.640733 progress 55 % (66 MB)
95 12:40:54.053267 progress 60 % (72 MB)
96 12:40:54.442364 progress 65 % (78 MB)
97 12:40:54.892786 progress 70 % (84 MB)
98 12:40:55.374054 progress 75 % (90 MB)
99 12:40:55.853990 progress 80 % (96 MB)
100 12:40:55.965114 progress 85 % (102 MB)
101 12:40:56.149067 progress 90 % (108 MB)
102 12:40:56.534416 progress 95 % (114 MB)
103 12:40:56.960815 progress 100 % (120 MB)
104 12:40:56.966332 120 MB downloaded in 8.15 s (14.75 MB/s)
105 12:40:56.966714 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:40:56.967175 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:40:56.967338 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:40:56.967498 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:40:56.967732 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rt/v4.4-st20-2890-g35edf5997b50a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:40:56.967866 saving as /var/lib/lava/dispatcher/tmp/12437329/tftp-deploy-lyols63z/modules/modules.tar
112 12:40:56.967975 total size: 253660 (0 MB)
113 12:40:56.968101 Using unxz to decompress xz
114 12:40:56.974127 progress 12 % (0 MB)
115 12:40:56.974785 progress 25 % (0 MB)
116 12:40:56.975218 progress 38 % (0 MB)
117 12:40:56.976854 progress 51 % (0 MB)
118 12:40:56.978992 progress 64 % (0 MB)
119 12:40:56.981121 progress 77 % (0 MB)
120 12:40:56.983106 progress 90 % (0 MB)
121 12:40:56.985372 progress 100 % (0 MB)
122 12:40:56.991652 0 MB downloaded in 0.02 s (10.22 MB/s)
123 12:40:56.992024 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:40:56.992518 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:40:56.992684 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 12:40:56.992847 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 12:41:00.687376 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12437329/extract-nfsrootfs-hyldd6qg
129 12:41:00.687575 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 12:41:00.687688 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 12:41:00.687876 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p
132 12:41:00.688039 makedir: /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin
133 12:41:00.688211 makedir: /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/tests
134 12:41:00.688489 makedir: /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/results
135 12:41:00.688613 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-add-keys
136 12:41:00.688788 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-add-sources
137 12:41:00.688933 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-background-process-start
138 12:41:00.689079 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-background-process-stop
139 12:41:00.689223 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-common-functions
140 12:41:00.689362 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-echo-ipv4
141 12:41:00.689500 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-install-packages
142 12:41:00.689637 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-installed-packages
143 12:41:00.689775 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-os-build
144 12:41:00.689912 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-probe-channel
145 12:41:00.690050 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-probe-ip
146 12:41:00.690187 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-target-ip
147 12:41:00.690322 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-target-mac
148 12:41:00.690460 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-target-storage
149 12:41:00.690599 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-test-case
150 12:41:00.690736 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-test-event
151 12:41:00.690871 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-test-feedback
152 12:41:00.691008 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-test-raise
153 12:41:00.691145 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-test-reference
154 12:41:00.691284 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-test-runner
155 12:41:00.691423 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-test-set
156 12:41:00.691560 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-test-shell
157 12:41:00.691699 Updating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-install-packages (oe)
158 12:41:00.691868 Updating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/bin/lava-installed-packages (oe)
159 12:41:00.692016 Creating /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/environment
160 12:41:00.692122 LAVA metadata
161 12:41:00.692204 - LAVA_JOB_ID=12437329
162 12:41:00.692286 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:41:00.692440 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
164 12:41:00.692517 skipped lava-vland-overlay
165 12:41:00.692602 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:41:00.692690 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
167 12:41:00.692766 skipped lava-multinode-overlay
168 12:41:00.692848 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:41:00.692935 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
170 12:41:00.693015 Loading test definitions
171 12:41:00.693115 start: 1.5.2.3.1 git-repo-action (timeout 00:09:48) [common]
172 12:41:00.693195 Using /lava-12437329 at stage 0
173 12:41:00.693302 Fetching tests from https://github.com/kernelci/test-definitions
174 12:41:00.693389 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/0/tests/0_ltp-mm'
175 12:41:04.490537 Running '/usr/bin/git checkout kernelci.org
176 12:41:04.654114 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
177 12:41:04.655034 uuid=12437329_1.5.2.3.1 testdef=None
178 12:41:04.655215 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
180 12:41:04.655517 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
181 12:41:04.656433 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 12:41:04.656702 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
184 12:41:04.657880 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 12:41:04.658146 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
187 12:41:04.659323 runner path: /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/0/tests/0_ltp-mm test_uuid 12437329_1.5.2.3.1
188 12:41:04.659422 SKIPFILE='skipfile-lkft.yaml'
189 12:41:04.659494 SKIP_INSTALL='true'
190 12:41:04.659561 TST_CMDFILES='mm'
191 12:41:04.659719 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 12:41:04.659951 Creating lava-test-runner.conf files
194 12:41:04.660024 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12437329/lava-overlay-0_irk77p/lava-12437329/0 for stage 0
195 12:41:04.660126 - 0_ltp-mm
196 12:41:04.660239 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
197 12:41:04.660348 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
198 12:41:13.039210 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 12:41:13.039370 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
200 12:41:13.039472 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 12:41:13.039584 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
202 12:41:13.039686 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
203 12:41:13.201966 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 12:41:13.202394 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
205 12:41:13.202527 extracting modules file /var/lib/lava/dispatcher/tmp/12437329/tftp-deploy-lyols63z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437329/extract-nfsrootfs-hyldd6qg
206 12:41:13.217949 extracting modules file /var/lib/lava/dispatcher/tmp/12437329/tftp-deploy-lyols63z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12437329/extract-overlay-ramdisk-g8jyjzp1/ramdisk
207 12:41:13.233421 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 12:41:13.233561 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
209 12:41:13.233661 [common] Applying overlay to NFS
210 12:41:13.233739 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12437329/compress-overlay-nk4bh9pl/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12437329/extract-nfsrootfs-hyldd6qg
211 12:41:14.272326 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 12:41:14.272498 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
213 12:41:14.272607 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 12:41:14.272705 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
215 12:41:14.272792 Building ramdisk /var/lib/lava/dispatcher/tmp/12437329/extract-overlay-ramdisk-g8jyjzp1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12437329/extract-overlay-ramdisk-g8jyjzp1/ramdisk
216 12:41:14.354891 >> 27216 blocks
217 12:41:14.995597 rename /var/lib/lava/dispatcher/tmp/12437329/extract-overlay-ramdisk-g8jyjzp1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12437329/tftp-deploy-lyols63z/ramdisk/ramdisk.cpio.gz
218 12:41:14.996108 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 12:41:14.996253 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
220 12:41:14.996373 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
221 12:41:14.996473 No mkimage arch provided, not using FIT.
222 12:41:14.996569 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 12:41:14.996674 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 12:41:14.996783 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
225 12:41:14.996883 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
226 12:41:14.996972 No LXC device requested
227 12:41:14.997061 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 12:41:14.997160 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
229 12:41:14.997244 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 12:41:14.997329 Checking files for TFTP limit of 4294967296 bytes.
231 12:41:14.997785 end: 1 tftp-deploy (duration 00:00:26) [common]
232 12:41:14.997901 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 12:41:14.998001 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 12:41:14.998140 substitutions:
235 12:41:14.998213 - {DTB}: None
236 12:41:14.998281 - {INITRD}: 12437329/tftp-deploy-lyols63z/ramdisk/ramdisk.cpio.gz
237 12:41:14.998354 - {KERNEL}: 12437329/tftp-deploy-lyols63z/kernel/bzImage
238 12:41:14.998421 - {LAVA_MAC}: None
239 12:41:14.998483 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12437329/extract-nfsrootfs-hyldd6qg
240 12:41:14.998547 - {NFS_SERVER_IP}: 192.168.201.1
241 12:41:14.998607 - {PRESEED_CONFIG}: None
242 12:41:14.998686 - {PRESEED_LOCAL}: None
243 12:41:14.998756 - {RAMDISK}: 12437329/tftp-deploy-lyols63z/ramdisk/ramdisk.cpio.gz
244 12:41:14.998816 - {ROOT_PART}: None
245 12:41:14.998876 - {ROOT}: None
246 12:41:14.998936 - {SERVER_IP}: 192.168.201.1
247 12:41:14.998995 - {TEE}: None
248 12:41:14.999053 Parsed boot commands:
249 12:41:14.999112 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 12:41:14.999307 Parsed boot commands: tftpboot 192.168.201.1 12437329/tftp-deploy-lyols63z/kernel/bzImage 12437329/tftp-deploy-lyols63z/kernel/cmdline 12437329/tftp-deploy-lyols63z/ramdisk/ramdisk.cpio.gz
251 12:41:14.999407 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 12:41:14.999504 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 12:41:14.999604 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 12:41:14.999699 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 12:41:14.999775 Not connected, no need to disconnect.
256 12:41:14.999855 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 12:41:14.999942 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 12:41:15.000013 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
259 12:41:15.004597 Setting prompt string to ['lava-test: # ']
260 12:41:15.005067 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 12:41:15.005193 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 12:41:15.005302 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 12:41:15.005401 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 12:41:15.005628 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
265 12:41:20.154895 >> Command sent successfully.
266 12:41:20.166484 Returned 0 in 5 seconds
267 12:41:20.267737 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 12:41:20.269521 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 12:41:20.270270 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 12:41:20.270778 Setting prompt string to 'Starting depthcharge on Helios...'
272 12:41:20.271281 Changing prompt to 'Starting depthcharge on Helios...'
273 12:41:20.271775 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
274 12:41:20.273120 [Enter `^Ec?' for help]
275 12:41:20.880815
276 12:41:20.881388
277 12:41:20.890451 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
278 12:41:20.894076 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
279 12:41:20.900829 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
280 12:41:20.903572 CPU: AES supported, TXT NOT supported, VT supported
281 12:41:20.910607 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
282 12:41:20.914051 PCH: device id 0284 (rev 00) is Cometlake-U Premium
283 12:41:20.920588 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
284 12:41:20.924085 VBOOT: Loading verstage.
285 12:41:20.926937 FMAP: Found "FLASH" version 1.1 at 0xc04000.
286 12:41:20.933617 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
287 12:41:20.937640 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 12:41:20.940528 CBFS @ c08000 size 3f8000
289 12:41:20.947200 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
290 12:41:20.950911 CBFS: Locating 'fallback/verstage'
291 12:41:20.953712 CBFS: Found @ offset 10fb80 size 1072c
292 12:41:20.954137
293 12:41:20.954469
294 12:41:20.967587 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
295 12:41:20.980770 Probing TPM: . done!
296 12:41:20.984296 TPM ready after 0 ms
297 12:41:20.987389 Connected to device vid:did:rid of 1ae0:0028:00
298 12:41:20.997501 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
299 12:41:21.001696 Initialized TPM device CR50 revision 0
300 12:41:21.046718 tlcl_send_startup: Startup return code is 0
301 12:41:21.047185 TPM: setup succeeded
302 12:41:21.059105 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
303 12:41:21.063223 Chrome EC: UHEPI supported
304 12:41:21.066562 Phase 1
305 12:41:21.069894 FMAP: area GBB found @ c05000 (12288 bytes)
306 12:41:21.076548 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
307 12:41:21.076985 Phase 2
308 12:41:21.080113 Phase 3
309 12:41:21.083372 FMAP: area GBB found @ c05000 (12288 bytes)
310 12:41:21.089228 VB2:vb2_report_dev_firmware() This is developer signed firmware
311 12:41:21.096269 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
312 12:41:21.099458 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
313 12:41:21.106069 VB2:vb2_verify_keyblock() Checking keyblock signature...
314 12:41:21.122020 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
315 12:41:21.125217 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
316 12:41:21.131771 VB2:vb2_verify_fw_preamble() Verifying preamble.
317 12:41:21.135935 Phase 4
318 12:41:21.139018 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
319 12:41:21.145457 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
320 12:41:21.324974 VB2:vb2_rsa_verify_digest() Digest check failed!
321 12:41:21.331741 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
322 12:41:21.331844 Saving nvdata
323 12:41:21.334963 Reboot requested (10020007)
324 12:41:21.338255 board_reset() called!
325 12:41:21.338351 full_reset() called!
326 12:41:25.846589
327 12:41:25.846737
328 12:41:25.856230 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
329 12:41:25.859404 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
330 12:41:25.866233 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
331 12:41:25.869583 CPU: AES supported, TXT NOT supported, VT supported
332 12:41:25.876022 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
333 12:41:25.879101 PCH: device id 0284 (rev 00) is Cometlake-U Premium
334 12:41:25.886201 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
335 12:41:25.889419 VBOOT: Loading verstage.
336 12:41:25.892843 FMAP: Found "FLASH" version 1.1 at 0xc04000.
337 12:41:25.899691 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
338 12:41:25.902828 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
339 12:41:25.905581 CBFS @ c08000 size 3f8000
340 12:41:25.912634 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
341 12:41:25.915611 CBFS: Locating 'fallback/verstage'
342 12:41:25.919102 CBFS: Found @ offset 10fb80 size 1072c
343 12:41:25.923314
344 12:41:25.923411
345 12:41:25.932765 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
346 12:41:25.947224 Probing TPM: . done!
347 12:41:25.950852 TPM ready after 0 ms
348 12:41:25.953943 Connected to device vid:did:rid of 1ae0:0028:00
349 12:41:25.964403 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
350 12:41:25.967914 Initialized TPM device CR50 revision 0
351 12:41:26.013522 tlcl_send_startup: Startup return code is 0
352 12:41:26.013625 TPM: setup succeeded
353 12:41:26.026251 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
354 12:41:26.029910 Chrome EC: UHEPI supported
355 12:41:26.033104 Phase 1
356 12:41:26.036777 FMAP: area GBB found @ c05000 (12288 bytes)
357 12:41:26.043039 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
358 12:41:26.049589 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
359 12:41:26.052902 Recovery requested (1009000e)
360 12:41:26.058742 Saving nvdata
361 12:41:26.065495 tlcl_extend: response is 0
362 12:41:26.073545 tlcl_extend: response is 0
363 12:41:26.080495 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
364 12:41:26.084124 CBFS @ c08000 size 3f8000
365 12:41:26.090567 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
366 12:41:26.094479 CBFS: Locating 'fallback/romstage'
367 12:41:26.097601 CBFS: Found @ offset 80 size 145fc
368 12:41:26.101417 Accumulated console time in verstage 98 ms
369 12:41:26.101513
370 12:41:26.101588
371 12:41:26.113945 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
372 12:41:26.120687 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
373 12:41:26.123957 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
374 12:41:26.127048 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
375 12:41:26.134296 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
376 12:41:26.137521 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
377 12:41:26.141064 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
378 12:41:26.144200 TCO_STS: 0000 0000
379 12:41:26.147188 GEN_PMCON: e0015238 00000200
380 12:41:26.151834 GBLRST_CAUSE: 00000000 00000000
381 12:41:26.151976 prev_sleep_state 5
382 12:41:26.153566 Boot Count incremented to 68005
383 12:41:26.160438 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 12:41:26.164151 CBFS @ c08000 size 3f8000
385 12:41:26.170229 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
386 12:41:26.170332 CBFS: Locating 'fspm.bin'
387 12:41:26.176744 CBFS: Found @ offset 5ffc0 size 71000
388 12:41:26.180129 Chrome EC: UHEPI supported
389 12:41:26.186784 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
390 12:41:26.190459 Probing TPM: done!
391 12:41:26.197163 Connected to device vid:did:rid of 1ae0:0028:00
392 12:41:26.206507 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
393 12:41:26.213132 Initialized TPM device CR50 revision 0
394 12:41:26.221985 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
395 12:41:26.228362 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 12:41:26.231632 MRC cache found, size 1948
397 12:41:26.235689 bootmode is set to: 2
398 12:41:26.238598 PRMRR disabled by config.
399 12:41:26.238721 SPD INDEX = 1
400 12:41:26.245529 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 12:41:26.248492 CBFS @ c08000 size 3f8000
402 12:41:26.251830 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 12:41:26.255149 CBFS: Locating 'spd.bin'
404 12:41:26.258717 CBFS: Found @ offset 5fb80 size 400
405 12:41:26.261950 SPD: module type is LPDDR3
406 12:41:26.265158 SPD: module part is
407 12:41:26.271845 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
408 12:41:26.275137 SPD: device width 4 bits, bus width 8 bits
409 12:41:26.278370 SPD: module size is 4096 MB (per channel)
410 12:41:26.281801 memory slot: 0 configuration done.
411 12:41:26.285299 memory slot: 2 configuration done.
412 12:41:26.335866 CBMEM:
413 12:41:26.339252 IMD: root @ 99fff000 254 entries.
414 12:41:26.342908 IMD: root @ 99ffec00 62 entries.
415 12:41:26.346307 External stage cache:
416 12:41:26.349252 IMD: root @ 9abff000 254 entries.
417 12:41:26.352389 IMD: root @ 9abfec00 62 entries.
418 12:41:26.355704 Chrome EC: clear events_b mask to 0x0000000020004000
419 12:41:26.371733 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
420 12:41:26.385247 tlcl_write: response is 0
421 12:41:26.393818 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 12:41:26.400838 MRC: TPM MRC hash updated successfully.
423 12:41:26.400934 2 DIMMs found
424 12:41:26.403931 SMM Memory Map
425 12:41:26.407154 SMRAM : 0x9a000000 0x1000000
426 12:41:26.410854 Subregion 0: 0x9a000000 0xa00000
427 12:41:26.414264 Subregion 1: 0x9aa00000 0x200000
428 12:41:26.417733 Subregion 2: 0x9ac00000 0x400000
429 12:41:26.420509 top_of_ram = 0x9a000000
430 12:41:26.424235 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
431 12:41:26.430254 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
432 12:41:26.434080 MTRR Range: Start=ff000000 End=0 (Size 1000000)
433 12:41:26.440509 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 12:41:26.444432 CBFS @ c08000 size 3f8000
435 12:41:26.447102 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 12:41:26.450698 CBFS: Locating 'fallback/postcar'
437 12:41:26.453912 CBFS: Found @ offset 107000 size 4b44
438 12:41:26.460475 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 12:41:26.472443 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 12:41:26.475545 Processing 180 relocs. Offset value of 0x97c0c000
441 12:41:26.484896 Accumulated console time in romstage 286 ms
442 12:41:26.484988
443 12:41:26.485060
444 12:41:26.494751 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 12:41:26.500761 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 12:41:26.504242 CBFS @ c08000 size 3f8000
447 12:41:26.507576 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 12:41:26.510991 CBFS: Locating 'fallback/ramstage'
449 12:41:26.517671 CBFS: Found @ offset 43380 size 1b9e8
450 12:41:26.524258 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 12:41:26.555661 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 12:41:26.559101 Processing 3976 relocs. Offset value of 0x98db0000
453 12:41:26.565880 Accumulated console time in postcar 52 ms
454 12:41:26.566004
455 12:41:26.566119
456 12:41:26.576163 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 12:41:26.582579 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 12:41:26.586459 WARNING: RO_VPD is uninitialized or empty.
459 12:41:26.589438 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 12:41:26.595966 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 12:41:26.596065 Normal boot.
462 12:41:26.602570 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 12:41:26.606332 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 12:41:26.609156 CBFS @ c08000 size 3f8000
465 12:41:26.615994 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 12:41:26.619082 CBFS: Locating 'cpu_microcode_blob.bin'
467 12:41:26.622814 CBFS: Found @ offset 14700 size 2ec00
468 12:41:26.626132 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 12:41:26.629125 Skip microcode update
470 12:41:26.632277 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 12:41:26.635533 CBFS @ c08000 size 3f8000
472 12:41:26.642310 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 12:41:26.645596 CBFS: Locating 'fsps.bin'
474 12:41:26.649534 CBFS: Found @ offset d1fc0 size 35000
475 12:41:26.674212 Detected 4 core, 8 thread CPU.
476 12:41:26.677489 Setting up SMI for CPU
477 12:41:26.680699 IED base = 0x9ac00000
478 12:41:26.680829 IED size = 0x00400000
479 12:41:26.683956 Will perform SMM setup.
480 12:41:26.690505 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 12:41:26.697633 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 12:41:26.700423 Processing 16 relocs. Offset value of 0x00030000
483 12:41:26.704232 Attempting to start 7 APs
484 12:41:26.707415 Waiting for 10ms after sending INIT.
485 12:41:26.723875 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
486 12:41:26.723972 done.
487 12:41:26.727626 AP: slot 7 apic_id 7.
488 12:41:26.730727 AP: slot 2 apic_id 6.
489 12:41:26.730837 AP: slot 4 apic_id 3.
490 12:41:26.733817 AP: slot 1 apic_id 2.
491 12:41:26.737491 AP: slot 5 apic_id 4.
492 12:41:26.737586 AP: slot 6 apic_id 5.
493 12:41:26.744355 Waiting for 2nd SIPI to complete...done.
494 12:41:26.750541 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 12:41:26.753795 Processing 13 relocs. Offset value of 0x00038000
496 12:41:26.760804 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
497 12:41:26.764120 Installing SMM handler to 0x9a000000
498 12:41:26.774179 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
499 12:41:26.777195 Processing 658 relocs. Offset value of 0x9a010000
500 12:41:26.787147 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
501 12:41:26.790660 Processing 13 relocs. Offset value of 0x9a008000
502 12:41:26.797147 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
503 12:41:26.803927 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
504 12:41:26.807375 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
505 12:41:26.813704 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
506 12:41:26.820753 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
507 12:41:26.823860 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
508 12:41:26.830335 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
509 12:41:26.837024 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
510 12:41:26.840705 Clearing SMI status registers
511 12:41:26.843661 SMI_STS: PM1
512 12:41:26.843784 PM1_STS: PWRBTN
513 12:41:26.847181 TCO_STS: SECOND_TO
514 12:41:26.847302 New SMBASE 0x9a000000
515 12:41:26.850362 In relocation handler: CPU 0
516 12:41:26.857301 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
517 12:41:26.860522 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 12:41:26.863597 Relocation complete.
519 12:41:26.863680 New SMBASE 0x99fff400
520 12:41:26.866874 In relocation handler: CPU 3
521 12:41:26.873834 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
522 12:41:26.877083 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 12:41:26.880789 Relocation complete.
524 12:41:26.880912 New SMBASE 0x99ffe800
525 12:41:26.883818 In relocation handler: CPU 6
526 12:41:26.887154 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
527 12:41:26.893872 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 12:41:26.897119 Relocation complete.
529 12:41:26.897244 New SMBASE 0x99ffec00
530 12:41:26.900582 In relocation handler: CPU 5
531 12:41:26.903449 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
532 12:41:26.909984 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 12:41:26.910101 Relocation complete.
534 12:41:26.913406 New SMBASE 0x99fffc00
535 12:41:26.917302 In relocation handler: CPU 1
536 12:41:26.920559 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
537 12:41:26.926705 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 12:41:26.926838 Relocation complete.
539 12:41:26.930132 New SMBASE 0x99fff000
540 12:41:26.933454 In relocation handler: CPU 4
541 12:41:26.936655 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
542 12:41:26.943612 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 12:41:26.943731 Relocation complete.
544 12:41:26.947113 New SMBASE 0x99fff800
545 12:41:26.950414 In relocation handler: CPU 2
546 12:41:26.953367 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
547 12:41:26.959991 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 12:41:26.960116 Relocation complete.
549 12:41:26.963490 New SMBASE 0x99ffe400
550 12:41:26.967444 In relocation handler: CPU 7
551 12:41:26.970348 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
552 12:41:26.973693 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 12:41:26.976857 Relocation complete.
554 12:41:26.980043 Initializing CPU #0
555 12:41:26.983403 CPU: vendor Intel device 806ec
556 12:41:26.986963 CPU: family 06, model 8e, stepping 0c
557 12:41:26.990000 Clearing out pending MCEs
558 12:41:26.990118 Setting up local APIC...
559 12:41:26.993481 apic_id: 0x00 done.
560 12:41:26.997193 Turbo is available but hidden
561 12:41:26.999954 Turbo is available and visible
562 12:41:27.003269 VMX status: enabled
563 12:41:27.006642 IA32_FEATURE_CONTROL status: locked
564 12:41:27.006766 Skip microcode update
565 12:41:27.009889 CPU #0 initialized
566 12:41:27.013784 Initializing CPU #3
567 12:41:27.013898 Initializing CPU #5
568 12:41:27.016866 Initializing CPU #6
569 12:41:27.020257 CPU: vendor Intel device 806ec
570 12:41:27.023415 CPU: family 06, model 8e, stepping 0c
571 12:41:27.026736 CPU: vendor Intel device 806ec
572 12:41:27.029876 CPU: family 06, model 8e, stepping 0c
573 12:41:27.033740 Clearing out pending MCEs
574 12:41:27.036806 Clearing out pending MCEs
575 12:41:27.036924 Setting up local APIC...
576 12:41:27.040172 Initializing CPU #4
577 12:41:27.040262 Initializing CPU #1
578 12:41:27.043464 CPU: vendor Intel device 806ec
579 12:41:27.050495 CPU: family 06, model 8e, stepping 0c
580 12:41:27.050585 CPU: vendor Intel device 806ec
581 12:41:27.056724 CPU: family 06, model 8e, stepping 0c
582 12:41:27.056843 Clearing out pending MCEs
583 12:41:27.060362 Clearing out pending MCEs
584 12:41:27.063620 Setting up local APIC...
585 12:41:27.067255 CPU: vendor Intel device 806ec
586 12:41:27.070530 CPU: family 06, model 8e, stepping 0c
587 12:41:27.074079 Clearing out pending MCEs
588 12:41:27.074161 apic_id: 0x05 done.
589 12:41:27.077117 Setting up local APIC...
590 12:41:27.080251 Initializing CPU #2
591 12:41:27.080336 Initializing CPU #7
592 12:41:27.083445 CPU: vendor Intel device 806ec
593 12:41:27.087260 CPU: family 06, model 8e, stepping 0c
594 12:41:27.090357 apic_id: 0x03 done.
595 12:41:27.093603 Setting up local APIC...
596 12:41:27.096814 apic_id: 0x01 done.
597 12:41:27.096897 CPU: vendor Intel device 806ec
598 12:41:27.103693 CPU: family 06, model 8e, stepping 0c
599 12:41:27.103805 Clearing out pending MCEs
600 12:41:27.106983 Clearing out pending MCEs
601 12:41:27.110025 Setting up local APIC...
602 12:41:27.113337 apic_id: 0x02 done.
603 12:41:27.113450 VMX status: enabled
604 12:41:27.116680 VMX status: enabled
605 12:41:27.119930 IA32_FEATURE_CONTROL status: locked
606 12:41:27.123368 IA32_FEATURE_CONTROL status: locked
607 12:41:27.127151 Skip microcode update
608 12:41:27.127264 Skip microcode update
609 12:41:27.129981 CPU #4 initialized
610 12:41:27.133152 CPU #1 initialized
611 12:41:27.133236 apic_id: 0x06 done.
612 12:41:27.136502 Setting up local APIC...
613 12:41:27.139747 VMX status: enabled
614 12:41:27.139860 apic_id: 0x07 done.
615 12:41:27.143084 VMX status: enabled
616 12:41:27.143175 VMX status: enabled
617 12:41:27.149942 IA32_FEATURE_CONTROL status: locked
618 12:41:27.153133 IA32_FEATURE_CONTROL status: locked
619 12:41:27.153246 Skip microcode update
620 12:41:27.156507 VMX status: enabled
621 12:41:27.159868 Setting up local APIC...
622 12:41:27.159978 CPU #2 initialized
623 12:41:27.163681 Skip microcode update
624 12:41:27.166465 IA32_FEATURE_CONTROL status: locked
625 12:41:27.170137 IA32_FEATURE_CONTROL status: locked
626 12:41:27.173362 apic_id: 0x04 done.
627 12:41:27.173473 Skip microcode update
628 12:41:27.176694 VMX status: enabled
629 12:41:27.180350 CPU #6 initialized
630 12:41:27.180463 CPU #7 initialized
631 12:41:27.183609 IA32_FEATURE_CONTROL status: locked
632 12:41:27.186714 Skip microcode update
633 12:41:27.189819 Skip microcode update
634 12:41:27.189930 CPU #3 initialized
635 12:41:27.193645 CPU #5 initialized
636 12:41:27.196557 bsp_do_flight_plan done after 452 msecs.
637 12:41:27.199905 CPU: frequency set to 4200 MHz
638 12:41:27.200016 Enabling SMIs.
639 12:41:27.203037 Locking SMM.
640 12:41:27.217867 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 12:41:27.220900 CBFS @ c08000 size 3f8000
642 12:41:27.227604 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 12:41:27.227720 CBFS: Locating 'vbt.bin'
644 12:41:27.231145 CBFS: Found @ offset 5f5c0 size 499
645 12:41:27.237973 Found a VBT of 4608 bytes after decompression
646 12:41:27.419933 Display FSP Version Info HOB
647 12:41:27.423785 Reference Code - CPU = 9.0.1e.30
648 12:41:27.426987 uCode Version = 0.0.0.ca
649 12:41:27.430282 TXT ACM version = ff.ff.ff.ffff
650 12:41:27.433377 Display FSP Version Info HOB
651 12:41:27.436608 Reference Code - ME = 9.0.1e.30
652 12:41:27.439905 MEBx version = 0.0.0.0
653 12:41:27.443528 ME Firmware Version = Consumer SKU
654 12:41:27.447142 Display FSP Version Info HOB
655 12:41:27.450396 Reference Code - CML PCH = 9.0.1e.30
656 12:41:27.453325 PCH-CRID Status = Disabled
657 12:41:27.456621 PCH-CRID Original Value = ff.ff.ff.ffff
658 12:41:27.459719 PCH-CRID New Value = ff.ff.ff.ffff
659 12:41:27.463027 OPROM - RST - RAID = ff.ff.ff.ffff
660 12:41:27.466685 ChipsetInit Base Version = ff.ff.ff.ffff
661 12:41:27.469924 ChipsetInit Oem Version = ff.ff.ff.ffff
662 12:41:27.473514 Display FSP Version Info HOB
663 12:41:27.479801 Reference Code - SA - System Agent = 9.0.1e.30
664 12:41:27.483478 Reference Code - MRC = 0.7.1.6c
665 12:41:27.483570 SA - PCIe Version = 9.0.1e.30
666 12:41:27.486838 SA-CRID Status = Disabled
667 12:41:27.489941 SA-CRID Original Value = 0.0.0.c
668 12:41:27.493141 SA-CRID New Value = 0.0.0.c
669 12:41:27.496352 OPROM - VBIOS = ff.ff.ff.ffff
670 12:41:27.499685 RTC Init
671 12:41:27.503454 Set power on after power failure.
672 12:41:27.503574 Disabling Deep S3
673 12:41:27.506597 Disabling Deep S3
674 12:41:27.506698 Disabling Deep S4
675 12:41:27.509709 Disabling Deep S4
676 12:41:27.509795 Disabling Deep S5
677 12:41:27.513024 Disabling Deep S5
678 12:41:27.519837 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
679 12:41:27.519962 Enumerating buses...
680 12:41:27.526547 Show all devs... Before device enumeration.
681 12:41:27.526731 Root Device: enabled 1
682 12:41:27.529595 CPU_CLUSTER: 0: enabled 1
683 12:41:27.533329 DOMAIN: 0000: enabled 1
684 12:41:27.536242 APIC: 00: enabled 1
685 12:41:27.536340 PCI: 00:00.0: enabled 1
686 12:41:27.539575 PCI: 00:02.0: enabled 1
687 12:41:27.543180 PCI: 00:04.0: enabled 0
688 12:41:27.546318 PCI: 00:05.0: enabled 0
689 12:41:27.546431 PCI: 00:12.0: enabled 1
690 12:41:27.549528 PCI: 00:12.5: enabled 0
691 12:41:27.552888 PCI: 00:12.6: enabled 0
692 12:41:27.552979 PCI: 00:14.0: enabled 1
693 12:41:27.556392 PCI: 00:14.1: enabled 0
694 12:41:27.559711 PCI: 00:14.3: enabled 1
695 12:41:27.563004 PCI: 00:14.5: enabled 0
696 12:41:27.563120 PCI: 00:15.0: enabled 1
697 12:41:27.565997 PCI: 00:15.1: enabled 1
698 12:41:27.569561 PCI: 00:15.2: enabled 0
699 12:41:27.573179 PCI: 00:15.3: enabled 0
700 12:41:27.573259 PCI: 00:16.0: enabled 1
701 12:41:27.576435 PCI: 00:16.1: enabled 0
702 12:41:27.579602 PCI: 00:16.2: enabled 0
703 12:41:27.579710 PCI: 00:16.3: enabled 0
704 12:41:27.582913 PCI: 00:16.4: enabled 0
705 12:41:27.586103 PCI: 00:16.5: enabled 0
706 12:41:27.590115 PCI: 00:17.0: enabled 1
707 12:41:27.590205 PCI: 00:19.0: enabled 1
708 12:41:27.592923 PCI: 00:19.1: enabled 0
709 12:41:27.596147 PCI: 00:19.2: enabled 0
710 12:41:27.599546 PCI: 00:1a.0: enabled 0
711 12:41:27.599671 PCI: 00:1c.0: enabled 0
712 12:41:27.602570 PCI: 00:1c.1: enabled 0
713 12:41:27.606270 PCI: 00:1c.2: enabled 0
714 12:41:27.609328 PCI: 00:1c.3: enabled 0
715 12:41:27.609418 PCI: 00:1c.4: enabled 0
716 12:41:27.612424 PCI: 00:1c.5: enabled 0
717 12:41:27.615721 PCI: 00:1c.6: enabled 0
718 12:41:27.619420 PCI: 00:1c.7: enabled 0
719 12:41:27.619540 PCI: 00:1d.0: enabled 1
720 12:41:27.622431 PCI: 00:1d.1: enabled 0
721 12:41:27.626100 PCI: 00:1d.2: enabled 0
722 12:41:27.626197 PCI: 00:1d.3: enabled 0
723 12:41:27.629953 PCI: 00:1d.4: enabled 0
724 12:41:27.633060 PCI: 00:1d.5: enabled 1
725 12:41:27.636714 PCI: 00:1e.0: enabled 1
726 12:41:27.636800 PCI: 00:1e.1: enabled 0
727 12:41:27.639465 PCI: 00:1e.2: enabled 1
728 12:41:27.642417 PCI: 00:1e.3: enabled 1
729 12:41:27.645806 PCI: 00:1f.0: enabled 1
730 12:41:27.645922 PCI: 00:1f.1: enabled 1
731 12:41:27.648948 PCI: 00:1f.2: enabled 1
732 12:41:27.652598 PCI: 00:1f.3: enabled 1
733 12:41:27.655858 PCI: 00:1f.4: enabled 1
734 12:41:27.655947 PCI: 00:1f.5: enabled 1
735 12:41:27.659432 PCI: 00:1f.6: enabled 0
736 12:41:27.662534 USB0 port 0: enabled 1
737 12:41:27.662613 I2C: 00:15: enabled 1
738 12:41:27.665632 I2C: 00:5d: enabled 1
739 12:41:27.669308 GENERIC: 0.0: enabled 1
740 12:41:27.669391 I2C: 00:1a: enabled 1
741 12:41:27.672757 I2C: 00:38: enabled 1
742 12:41:27.675689 I2C: 00:39: enabled 1
743 12:41:27.675814 I2C: 00:3a: enabled 1
744 12:41:27.679098 I2C: 00:3b: enabled 1
745 12:41:27.682958 PCI: 00:00.0: enabled 1
746 12:41:27.683052 SPI: 00: enabled 1
747 12:41:27.686181 SPI: 01: enabled 1
748 12:41:27.689424 PNP: 0c09.0: enabled 1
749 12:41:27.689518 USB2 port 0: enabled 1
750 12:41:27.692521 USB2 port 1: enabled 1
751 12:41:27.696397 USB2 port 2: enabled 0
752 12:41:27.696491 USB2 port 3: enabled 0
753 12:41:27.699378 USB2 port 5: enabled 0
754 12:41:27.702582 USB2 port 6: enabled 1
755 12:41:27.705877 USB2 port 9: enabled 1
756 12:41:27.705976 USB3 port 0: enabled 1
757 12:41:27.708934 USB3 port 1: enabled 1
758 12:41:27.712771 USB3 port 2: enabled 1
759 12:41:27.712864 USB3 port 3: enabled 1
760 12:41:27.715781 USB3 port 4: enabled 0
761 12:41:27.718950 APIC: 02: enabled 1
762 12:41:27.719044 APIC: 06: enabled 1
763 12:41:27.722270 APIC: 01: enabled 1
764 12:41:27.726249 APIC: 03: enabled 1
765 12:41:27.726373 APIC: 04: enabled 1
766 12:41:27.729154 APIC: 05: enabled 1
767 12:41:27.729249 APIC: 07: enabled 1
768 12:41:27.732369 Compare with tree...
769 12:41:27.735556 Root Device: enabled 1
770 12:41:27.738775 CPU_CLUSTER: 0: enabled 1
771 12:41:27.738869 APIC: 00: enabled 1
772 12:41:27.742095 APIC: 02: enabled 1
773 12:41:27.745614 APIC: 06: enabled 1
774 12:41:27.745708 APIC: 01: enabled 1
775 12:41:27.748736 APIC: 03: enabled 1
776 12:41:27.752195 APIC: 04: enabled 1
777 12:41:27.752332 APIC: 05: enabled 1
778 12:41:27.755580 APIC: 07: enabled 1
779 12:41:27.758809 DOMAIN: 0000: enabled 1
780 12:41:27.762115 PCI: 00:00.0: enabled 1
781 12:41:27.762208 PCI: 00:02.0: enabled 1
782 12:41:27.765569 PCI: 00:04.0: enabled 0
783 12:41:27.769008 PCI: 00:05.0: enabled 0
784 12:41:27.771938 PCI: 00:12.0: enabled 1
785 12:41:27.775579 PCI: 00:12.5: enabled 0
786 12:41:27.775713 PCI: 00:12.6: enabled 0
787 12:41:27.778602 PCI: 00:14.0: enabled 1
788 12:41:27.782157 USB0 port 0: enabled 1
789 12:41:27.785883 USB2 port 0: enabled 1
790 12:41:27.789232 USB2 port 1: enabled 1
791 12:41:27.789329 USB2 port 2: enabled 0
792 12:41:27.792602 USB2 port 3: enabled 0
793 12:41:27.795455 USB2 port 5: enabled 0
794 12:41:27.799023 USB2 port 6: enabled 1
795 12:41:27.802038 USB2 port 9: enabled 1
796 12:41:27.802149 USB3 port 0: enabled 1
797 12:41:27.805664 USB3 port 1: enabled 1
798 12:41:27.808934 USB3 port 2: enabled 1
799 12:41:27.812152 USB3 port 3: enabled 1
800 12:41:27.815470 USB3 port 4: enabled 0
801 12:41:27.818610 PCI: 00:14.1: enabled 0
802 12:41:27.818805 PCI: 00:14.3: enabled 1
803 12:41:27.821906 PCI: 00:14.5: enabled 0
804 12:41:27.825515 PCI: 00:15.0: enabled 1
805 12:41:27.828689 I2C: 00:15: enabled 1
806 12:41:27.832048 PCI: 00:15.1: enabled 1
807 12:41:27.832304 I2C: 00:5d: enabled 1
808 12:41:27.835035 GENERIC: 0.0: enabled 1
809 12:41:27.838563 PCI: 00:15.2: enabled 0
810 12:41:27.842361 PCI: 00:15.3: enabled 0
811 12:41:27.842730 PCI: 00:16.0: enabled 1
812 12:41:27.845514 PCI: 00:16.1: enabled 0
813 12:41:27.848871 PCI: 00:16.2: enabled 0
814 12:41:27.851934 PCI: 00:16.3: enabled 0
815 12:41:27.855780 PCI: 00:16.4: enabled 0
816 12:41:27.856234 PCI: 00:16.5: enabled 0
817 12:41:27.858893 PCI: 00:17.0: enabled 1
818 12:41:27.862060 PCI: 00:19.0: enabled 1
819 12:41:27.865190 I2C: 00:1a: enabled 1
820 12:41:27.868862 I2C: 00:38: enabled 1
821 12:41:27.868978 I2C: 00:39: enabled 1
822 12:41:27.871957 I2C: 00:3a: enabled 1
823 12:41:27.875048 I2C: 00:3b: enabled 1
824 12:41:27.878336 PCI: 00:19.1: enabled 0
825 12:41:27.878448 PCI: 00:19.2: enabled 0
826 12:41:27.881748 PCI: 00:1a.0: enabled 0
827 12:41:27.884994 PCI: 00:1c.0: enabled 0
828 12:41:27.888421 PCI: 00:1c.1: enabled 0
829 12:41:27.891465 PCI: 00:1c.2: enabled 0
830 12:41:27.891567 PCI: 00:1c.3: enabled 0
831 12:41:27.895072 PCI: 00:1c.4: enabled 0
832 12:41:27.898583 PCI: 00:1c.5: enabled 0
833 12:41:27.901780 PCI: 00:1c.6: enabled 0
834 12:41:27.905622 PCI: 00:1c.7: enabled 0
835 12:41:27.905790 PCI: 00:1d.0: enabled 1
836 12:41:27.908190 PCI: 00:1d.1: enabled 0
837 12:41:27.912140 PCI: 00:1d.2: enabled 0
838 12:41:27.914799 PCI: 00:1d.3: enabled 0
839 12:41:27.914888 PCI: 00:1d.4: enabled 0
840 12:41:27.918350 PCI: 00:1d.5: enabled 1
841 12:41:27.921546 PCI: 00:00.0: enabled 1
842 12:41:27.924658 PCI: 00:1e.0: enabled 1
843 12:41:27.927943 PCI: 00:1e.1: enabled 0
844 12:41:27.928037 PCI: 00:1e.2: enabled 1
845 12:41:27.931641 SPI: 00: enabled 1
846 12:41:27.934533 PCI: 00:1e.3: enabled 1
847 12:41:27.938209 SPI: 01: enabled 1
848 12:41:27.938304 PCI: 00:1f.0: enabled 1
849 12:41:27.941418 PNP: 0c09.0: enabled 1
850 12:41:27.944742 PCI: 00:1f.1: enabled 1
851 12:41:27.948257 PCI: 00:1f.2: enabled 1
852 12:41:27.951601 PCI: 00:1f.3: enabled 1
853 12:41:27.951695 PCI: 00:1f.4: enabled 1
854 12:41:27.954663 PCI: 00:1f.5: enabled 1
855 12:41:27.957868 PCI: 00:1f.6: enabled 0
856 12:41:27.961079 Root Device scanning...
857 12:41:27.964732 scan_static_bus for Root Device
858 12:41:27.964826 CPU_CLUSTER: 0 enabled
859 12:41:27.968013 DOMAIN: 0000 enabled
860 12:41:27.971262 DOMAIN: 0000 scanning...
861 12:41:27.974876 PCI: pci_scan_bus for bus 00
862 12:41:27.978092 PCI: 00:00.0 [8086/0000] ops
863 12:41:27.981191 PCI: 00:00.0 [8086/9b61] enabled
864 12:41:27.984865 PCI: 00:02.0 [8086/0000] bus ops
865 12:41:27.988151 PCI: 00:02.0 [8086/9b41] enabled
866 12:41:27.991998 PCI: 00:04.0 [8086/1903] disabled
867 12:41:27.994808 PCI: 00:08.0 [8086/1911] enabled
868 12:41:27.998189 PCI: 00:12.0 [8086/02f9] enabled
869 12:41:28.002062 PCI: 00:14.0 [8086/0000] bus ops
870 12:41:28.004905 PCI: 00:14.0 [8086/02ed] enabled
871 12:41:28.008322 PCI: 00:14.2 [8086/02ef] enabled
872 12:41:28.011643 PCI: 00:14.3 [8086/02f0] enabled
873 12:41:28.015026 PCI: 00:15.0 [8086/0000] bus ops
874 12:41:28.018618 PCI: 00:15.0 [8086/02e8] enabled
875 12:41:28.021779 PCI: 00:15.1 [8086/0000] bus ops
876 12:41:28.024888 PCI: 00:15.1 [8086/02e9] enabled
877 12:41:28.028169 PCI: 00:16.0 [8086/0000] ops
878 12:41:28.031301 PCI: 00:16.0 [8086/02e0] enabled
879 12:41:28.034822 PCI: 00:17.0 [8086/0000] ops
880 12:41:28.038416 PCI: 00:17.0 [8086/02d3] enabled
881 12:41:28.041801 PCI: 00:19.0 [8086/0000] bus ops
882 12:41:28.042259 PCI: 00:19.0 [8086/02c5] enabled
883 12:41:28.045585 PCI: 00:1d.0 [8086/0000] bus ops
884 12:41:28.048373 PCI: 00:1d.0 [8086/02b0] enabled
885 12:41:28.055009 PCI: Static device PCI: 00:1d.5 not found, disabling it.
886 12:41:28.058482 PCI: 00:1e.0 [8086/0000] ops
887 12:41:28.061514 PCI: 00:1e.0 [8086/02a8] enabled
888 12:41:28.064872 PCI: 00:1e.2 [8086/0000] bus ops
889 12:41:28.068206 PCI: 00:1e.2 [8086/02aa] enabled
890 12:41:28.071915 PCI: 00:1e.3 [8086/0000] bus ops
891 12:41:28.075145 PCI: 00:1e.3 [8086/02ab] enabled
892 12:41:28.078948 PCI: 00:1f.0 [8086/0000] bus ops
893 12:41:28.081724 PCI: 00:1f.0 [8086/0284] enabled
894 12:41:28.088279 PCI: Static device PCI: 00:1f.1 not found, disabling it.
895 12:41:28.091751 PCI: Static device PCI: 00:1f.2 not found, disabling it.
896 12:41:28.094679 PCI: 00:1f.3 [8086/0000] bus ops
897 12:41:28.098626 PCI: 00:1f.3 [8086/02c8] enabled
898 12:41:28.101884 PCI: 00:1f.4 [8086/0000] bus ops
899 12:41:28.104876 PCI: 00:1f.4 [8086/02a3] enabled
900 12:41:28.108685 PCI: 00:1f.5 [8086/0000] bus ops
901 12:41:28.111875 PCI: 00:1f.5 [8086/02a4] enabled
902 12:41:28.114829 PCI: Leftover static devices:
903 12:41:28.118607 PCI: 00:05.0
904 12:41:28.119266 PCI: 00:12.5
905 12:41:28.121656 PCI: 00:12.6
906 12:41:28.122182 PCI: 00:14.1
907 12:41:28.122523 PCI: 00:14.5
908 12:41:28.125084 PCI: 00:15.2
909 12:41:28.125514 PCI: 00:15.3
910 12:41:28.128094 PCI: 00:16.1
911 12:41:28.128572 PCI: 00:16.2
912 12:41:28.128915 PCI: 00:16.3
913 12:41:28.131493 PCI: 00:16.4
914 12:41:28.131960 PCI: 00:16.5
915 12:41:28.135083 PCI: 00:19.1
916 12:41:28.135520 PCI: 00:19.2
917 12:41:28.135861 PCI: 00:1a.0
918 12:41:28.138418 PCI: 00:1c.0
919 12:41:28.138849 PCI: 00:1c.1
920 12:41:28.141670 PCI: 00:1c.2
921 12:41:28.142103 PCI: 00:1c.3
922 12:41:28.144844 PCI: 00:1c.4
923 12:41:28.145273 PCI: 00:1c.5
924 12:41:28.145614 PCI: 00:1c.6
925 12:41:28.148640 PCI: 00:1c.7
926 12:41:28.149069 PCI: 00:1d.1
927 12:41:28.151612 PCI: 00:1d.2
928 12:41:28.152128 PCI: 00:1d.3
929 12:41:28.152519 PCI: 00:1d.4
930 12:41:28.154935 PCI: 00:1d.5
931 12:41:28.155374 PCI: 00:1e.1
932 12:41:28.158179 PCI: 00:1f.1
933 12:41:28.158604 PCI: 00:1f.2
934 12:41:28.161494 PCI: 00:1f.6
935 12:41:28.161921 PCI: Check your devicetree.cb.
936 12:41:28.164592 PCI: 00:02.0 scanning...
937 12:41:28.167795 scan_generic_bus for PCI: 00:02.0
938 12:41:28.171433 scan_generic_bus for PCI: 00:02.0 done
939 12:41:28.177772 scan_bus: scanning of bus PCI: 00:02.0 took 10198 usecs
940 12:41:28.181236 PCI: 00:14.0 scanning...
941 12:41:28.184767 scan_static_bus for PCI: 00:14.0
942 12:41:28.187521 USB0 port 0 enabled
943 12:41:28.187950 USB0 port 0 scanning...
944 12:41:28.190967 scan_static_bus for USB0 port 0
945 12:41:28.195132 USB2 port 0 enabled
946 12:41:28.197990 USB2 port 1 enabled
947 12:41:28.198429 USB2 port 2 disabled
948 12:41:28.201264 USB2 port 3 disabled
949 12:41:28.204299 USB2 port 5 disabled
950 12:41:28.204729 USB2 port 6 enabled
951 12:41:28.208214 USB2 port 9 enabled
952 12:41:28.208677 USB3 port 0 enabled
953 12:41:28.211187 USB3 port 1 enabled
954 12:41:28.215084 USB3 port 2 enabled
955 12:41:28.215516 USB3 port 3 enabled
956 12:41:28.218195 USB3 port 4 disabled
957 12:41:28.221338 USB2 port 0 scanning...
958 12:41:28.224974 scan_static_bus for USB2 port 0
959 12:41:28.227916 scan_static_bus for USB2 port 0 done
960 12:41:28.231113 scan_bus: scanning of bus USB2 port 0 took 9711 usecs
961 12:41:28.234582 USB2 port 1 scanning...
962 12:41:28.237824 scan_static_bus for USB2 port 1
963 12:41:28.241477 scan_static_bus for USB2 port 1 done
964 12:41:28.247617 scan_bus: scanning of bus USB2 port 1 took 9701 usecs
965 12:41:28.251267 USB2 port 6 scanning...
966 12:41:28.254536 scan_static_bus for USB2 port 6
967 12:41:28.257809 scan_static_bus for USB2 port 6 done
968 12:41:28.261496 scan_bus: scanning of bus USB2 port 6 took 9713 usecs
969 12:41:28.264151 USB2 port 9 scanning...
970 12:41:28.267619 scan_static_bus for USB2 port 9
971 12:41:28.271253 scan_static_bus for USB2 port 9 done
972 12:41:28.278038 scan_bus: scanning of bus USB2 port 9 took 9713 usecs
973 12:41:28.281118 USB3 port 0 scanning...
974 12:41:28.284354 scan_static_bus for USB3 port 0
975 12:41:28.287564 scan_static_bus for USB3 port 0 done
976 12:41:28.291228 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
977 12:41:28.294640 USB3 port 1 scanning...
978 12:41:28.298166 scan_static_bus for USB3 port 1
979 12:41:28.301030 scan_static_bus for USB3 port 1 done
980 12:41:28.307444 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
981 12:41:28.311143 USB3 port 2 scanning...
982 12:41:28.314578 scan_static_bus for USB3 port 2
983 12:41:28.318022 scan_static_bus for USB3 port 2 done
984 12:41:28.324221 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
985 12:41:28.324817 USB3 port 3 scanning...
986 12:41:28.327296 scan_static_bus for USB3 port 3
987 12:41:28.330825 scan_static_bus for USB3 port 3 done
988 12:41:28.337709 scan_bus: scanning of bus USB3 port 3 took 9692 usecs
989 12:41:28.340782 scan_static_bus for USB0 port 0 done
990 12:41:28.347581 scan_bus: scanning of bus USB0 port 0 took 155419 usecs
991 12:41:28.351321 scan_static_bus for PCI: 00:14.0 done
992 12:41:28.357881 scan_bus: scanning of bus PCI: 00:14.0 took 173056 usecs
993 12:41:28.358315 PCI: 00:15.0 scanning...
994 12:41:28.364480 scan_generic_bus for PCI: 00:15.0
995 12:41:28.367402 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
996 12:41:28.371297 scan_generic_bus for PCI: 00:15.0 done
997 12:41:28.377350 scan_bus: scanning of bus PCI: 00:15.0 took 14298 usecs
998 12:41:28.377895 PCI: 00:15.1 scanning...
999 12:41:28.381144 scan_generic_bus for PCI: 00:15.1
1000 12:41:28.387493 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1001 12:41:28.390516 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1002 12:41:28.394265 scan_generic_bus for PCI: 00:15.1 done
1003 12:41:28.401000 scan_bus: scanning of bus PCI: 00:15.1 took 18615 usecs
1004 12:41:28.404155 PCI: 00:19.0 scanning...
1005 12:41:28.407570 scan_generic_bus for PCI: 00:19.0
1006 12:41:28.410570 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1007 12:41:28.414288 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1008 12:41:28.417427 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1009 12:41:28.423849 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1010 12:41:28.427215 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1011 12:41:28.430439 scan_generic_bus for PCI: 00:19.0 done
1012 12:41:28.437430 scan_bus: scanning of bus PCI: 00:19.0 took 30732 usecs
1013 12:41:28.437858 PCI: 00:1d.0 scanning...
1014 12:41:28.443857 do_pci_scan_bridge for PCI: 00:1d.0
1015 12:41:28.444354 PCI: pci_scan_bus for bus 01
1016 12:41:28.447197 PCI: 01:00.0 [1c5c/1327] enabled
1017 12:41:28.454472 Enabling Common Clock Configuration
1018 12:41:28.457381 L1 Sub-State supported from root port 29
1019 12:41:28.460853 L1 Sub-State Support = 0xf
1020 12:41:28.464118 CommonModeRestoreTime = 0x28
1021 12:41:28.467986 Power On Value = 0x16, Power On Scale = 0x0
1022 12:41:28.468491 ASPM: Enabled L1
1023 12:41:28.474279 scan_bus: scanning of bus PCI: 00:1d.0 took 32796 usecs
1024 12:41:28.477920 PCI: 00:1e.2 scanning...
1025 12:41:28.480890 scan_generic_bus for PCI: 00:1e.2
1026 12:41:28.484132 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1027 12:41:28.487748 scan_generic_bus for PCI: 00:1e.2 done
1028 12:41:28.494087 scan_bus: scanning of bus PCI: 00:1e.2 took 14006 usecs
1029 12:41:28.497786 PCI: 00:1e.3 scanning...
1030 12:41:28.501332 scan_generic_bus for PCI: 00:1e.3
1031 12:41:28.504736 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1032 12:41:28.507812 scan_generic_bus for PCI: 00:1e.3 done
1033 12:41:28.514510 scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs
1034 12:41:28.517693 PCI: 00:1f.0 scanning...
1035 12:41:28.520955 scan_static_bus for PCI: 00:1f.0
1036 12:41:28.521372 PNP: 0c09.0 enabled
1037 12:41:28.524502 scan_static_bus for PCI: 00:1f.0 done
1038 12:41:28.530636 scan_bus: scanning of bus PCI: 00:1f.0 took 12062 usecs
1039 12:41:28.534585 PCI: 00:1f.3 scanning...
1040 12:41:28.540602 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1041 12:41:28.541021 PCI: 00:1f.4 scanning...
1042 12:41:28.544131 scan_generic_bus for PCI: 00:1f.4
1043 12:41:28.550577 scan_generic_bus for PCI: 00:1f.4 done
1044 12:41:28.554404 scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs
1045 12:41:28.557323 PCI: 00:1f.5 scanning...
1046 12:41:28.561143 scan_generic_bus for PCI: 00:1f.5
1047 12:41:28.563916 scan_generic_bus for PCI: 00:1f.5 done
1048 12:41:28.570781 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1049 12:41:28.577290 scan_bus: scanning of bus DOMAIN: 0000 took 605227 usecs
1050 12:41:28.580825 scan_static_bus for Root Device done
1051 12:41:28.584097 scan_bus: scanning of bus Root Device took 625096 usecs
1052 12:41:28.587530 done
1053 12:41:28.590931 Chrome EC: UHEPI supported
1054 12:41:28.593962 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1055 12:41:28.600681 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 12:41:28.607656 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1057 12:41:28.613853 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1058 12:41:28.617499 SPI flash protection: WPSW=0 SRP0=0
1059 12:41:28.623970 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1060 12:41:28.627590 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1061 12:41:28.630974 found VGA at PCI: 00:02.0
1062 12:41:28.634200 Setting up VGA for PCI: 00:02.0
1063 12:41:28.641074 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1064 12:41:28.644237 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1065 12:41:28.647278 Allocating resources...
1066 12:41:28.647701 Reading resources...
1067 12:41:28.654020 Root Device read_resources bus 0 link: 0
1068 12:41:28.657310 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1069 12:41:28.663892 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1070 12:41:28.667095 DOMAIN: 0000 read_resources bus 0 link: 0
1071 12:41:28.673971 PCI: 00:14.0 read_resources bus 0 link: 0
1072 12:41:28.677789 USB0 port 0 read_resources bus 0 link: 0
1073 12:41:28.685157 USB0 port 0 read_resources bus 0 link: 0 done
1074 12:41:28.688962 PCI: 00:14.0 read_resources bus 0 link: 0 done
1075 12:41:28.696424 PCI: 00:15.0 read_resources bus 1 link: 0
1076 12:41:28.699521 PCI: 00:15.0 read_resources bus 1 link: 0 done
1077 12:41:28.706356 PCI: 00:15.1 read_resources bus 2 link: 0
1078 12:41:28.709516 PCI: 00:15.1 read_resources bus 2 link: 0 done
1079 12:41:28.716692 PCI: 00:19.0 read_resources bus 3 link: 0
1080 12:41:28.723702 PCI: 00:19.0 read_resources bus 3 link: 0 done
1081 12:41:28.726779 PCI: 00:1d.0 read_resources bus 1 link: 0
1082 12:41:28.733830 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1083 12:41:28.737080 PCI: 00:1e.2 read_resources bus 4 link: 0
1084 12:41:28.743453 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1085 12:41:28.746967 PCI: 00:1e.3 read_resources bus 5 link: 0
1086 12:41:28.753701 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1087 12:41:28.757231 PCI: 00:1f.0 read_resources bus 0 link: 0
1088 12:41:28.763943 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1089 12:41:28.767050 DOMAIN: 0000 read_resources bus 0 link: 0 done
1090 12:41:28.773727 Root Device read_resources bus 0 link: 0 done
1091 12:41:28.777025 Done reading resources.
1092 12:41:28.780688 Show resources in subtree (Root Device)...After reading.
1093 12:41:28.787524 Root Device child on link 0 CPU_CLUSTER: 0
1094 12:41:28.790783 CPU_CLUSTER: 0 child on link 0 APIC: 00
1095 12:41:28.791202 APIC: 00
1096 12:41:28.793882 APIC: 02
1097 12:41:28.794295 APIC: 06
1098 12:41:28.794623 APIC: 01
1099 12:41:28.796868 APIC: 03
1100 12:41:28.797282 APIC: 04
1101 12:41:28.800652 APIC: 05
1102 12:41:28.801069 APIC: 07
1103 12:41:28.803615 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1104 12:41:28.813965 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1105 12:41:28.870047 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1106 12:41:28.870505 PCI: 00:00.0
1107 12:41:28.870841 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1108 12:41:28.871160 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1109 12:41:28.871797 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1110 12:41:28.872145 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1111 12:41:28.919946 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1112 12:41:28.920750 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1113 12:41:28.921118 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1114 12:41:28.921446 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1115 12:41:28.921814 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1116 12:41:28.922469 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1117 12:41:28.933221 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1118 12:41:28.936765 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1119 12:41:28.946743 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1120 12:41:28.956419 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1121 12:41:28.966820 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1122 12:41:28.976550 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1123 12:41:28.976989 PCI: 00:02.0
1124 12:41:28.986462 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 12:41:28.996498 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 12:41:29.006548 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 12:41:29.006972 PCI: 00:04.0
1128 12:41:29.010079 PCI: 00:08.0
1129 12:41:29.019840 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 12:41:29.020301 PCI: 00:12.0
1131 12:41:29.030036 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 12:41:29.036314 PCI: 00:14.0 child on link 0 USB0 port 0
1133 12:41:29.046579 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1134 12:41:29.049599 USB0 port 0 child on link 0 USB2 port 0
1135 12:41:29.050019 USB2 port 0
1136 12:41:29.053174 USB2 port 1
1137 12:41:29.053595 USB2 port 2
1138 12:41:29.056372 USB2 port 3
1139 12:41:29.060158 USB2 port 5
1140 12:41:29.060645 USB2 port 6
1141 12:41:29.063352 USB2 port 9
1142 12:41:29.063774 USB3 port 0
1143 12:41:29.066217 USB3 port 1
1144 12:41:29.066636 USB3 port 2
1145 12:41:29.069854 USB3 port 3
1146 12:41:29.070277 USB3 port 4
1147 12:41:29.072888 PCI: 00:14.2
1148 12:41:29.083119 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1149 12:41:29.093016 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1150 12:41:29.093432 PCI: 00:14.3
1151 12:41:29.102780 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 12:41:29.106433 PCI: 00:15.0 child on link 0 I2C: 01:15
1153 12:41:29.116205 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 12:41:29.120188 I2C: 01:15
1155 12:41:29.123243 PCI: 00:15.1 child on link 0 I2C: 02:5d
1156 12:41:29.133095 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 12:41:29.136035 I2C: 02:5d
1158 12:41:29.136571 GENERIC: 0.0
1159 12:41:29.139754 PCI: 00:16.0
1160 12:41:29.149746 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 12:41:29.150169 PCI: 00:17.0
1162 12:41:29.159494 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1163 12:41:29.169515 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1164 12:41:29.176141 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1165 12:41:29.185919 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1166 12:41:29.192862 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1167 12:41:29.202664 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1168 12:41:29.205858 PCI: 00:19.0 child on link 0 I2C: 03:1a
1169 12:41:29.215958 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 12:41:29.218895 I2C: 03:1a
1171 12:41:29.219307 I2C: 03:38
1172 12:41:29.222457 I2C: 03:39
1173 12:41:29.222916 I2C: 03:3a
1174 12:41:29.225799 I2C: 03:3b
1175 12:41:29.229264 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1176 12:41:29.235528 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1177 12:41:29.246002 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1178 12:41:29.255651 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1179 12:41:29.259452 PCI: 01:00.0
1180 12:41:29.268890 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 12:41:29.269336 PCI: 00:1e.0
1182 12:41:29.279310 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1183 12:41:29.288838 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 12:41:29.295756 PCI: 00:1e.2 child on link 0 SPI: 00
1185 12:41:29.305752 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 12:41:29.306212 SPI: 00
1187 12:41:29.309047 PCI: 00:1e.3 child on link 0 SPI: 01
1188 12:41:29.318606 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 12:41:29.322051 SPI: 01
1190 12:41:29.325575 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1191 12:41:29.335552 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1192 12:41:29.342097 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1193 12:41:29.345473 PNP: 0c09.0
1194 12:41:29.351772 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1195 12:41:29.355504 PCI: 00:1f.3
1196 12:41:29.365418 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 12:41:29.375404 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1198 12:41:29.375827 PCI: 00:1f.4
1199 12:41:29.385254 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1200 12:41:29.395184 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1201 12:41:29.398735 PCI: 00:1f.5
1202 12:41:29.405543 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1203 12:41:29.411810 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1204 12:41:29.418608 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1205 12:41:29.425390 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1206 12:41:29.428404 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1207 12:41:29.432275 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1208 12:41:29.435384 PCI: 00:17.0 18 * [0x60 - 0x67] io
1209 12:41:29.442062 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1210 12:41:29.448549 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1211 12:41:29.455543 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1212 12:41:29.461591 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1213 12:41:29.471497 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1214 12:41:29.478320 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1215 12:41:29.481807 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1216 12:41:29.487973 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1217 12:41:29.492320 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1218 12:41:29.498134 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1219 12:41:29.501491 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1220 12:41:29.507602 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1221 12:41:29.511451 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1222 12:41:29.517727 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1223 12:41:29.521278 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1224 12:41:29.527790 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1225 12:41:29.531539 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1226 12:41:29.537735 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1227 12:41:29.540830 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1228 12:41:29.547680 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1229 12:41:29.550779 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1230 12:41:29.557701 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1231 12:41:29.561143 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1232 12:41:29.564459 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1233 12:41:29.570991 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1234 12:41:29.573928 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1235 12:41:29.580910 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1236 12:41:29.584153 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1237 12:41:29.590854 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1238 12:41:29.594312 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1239 12:41:29.601080 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1240 12:41:29.607486 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1241 12:41:29.610985 avoid_fixed_resources: DOMAIN: 0000
1242 12:41:29.617082 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1243 12:41:29.624038 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1244 12:41:29.630708 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1245 12:41:29.640907 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1246 12:41:29.647558 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1247 12:41:29.653855 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1248 12:41:29.660697 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1249 12:41:29.670639 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 12:41:29.677208 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1251 12:41:29.684137 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1252 12:41:29.693753 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1253 12:41:29.700392 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1254 12:41:29.700488 Setting resources...
1255 12:41:29.706862 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1256 12:41:29.710251 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1257 12:41:29.717450 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1258 12:41:29.720744 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1259 12:41:29.723775 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1260 12:41:29.730597 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1261 12:41:29.737117 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1262 12:41:29.743750 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1263 12:41:29.750378 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1264 12:41:29.757028 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1265 12:41:29.760136 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1266 12:41:29.767192 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1267 12:41:29.770307 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1268 12:41:29.773394 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1269 12:41:29.780198 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1270 12:41:29.783824 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1271 12:41:29.790527 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1272 12:41:29.793694 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1273 12:41:29.800151 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1274 12:41:29.803519 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1275 12:41:29.810429 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1276 12:41:29.813435 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1277 12:41:29.820024 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1278 12:41:29.823285 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1279 12:41:29.830294 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1280 12:41:29.833122 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1281 12:41:29.836888 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1282 12:41:29.843515 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1283 12:41:29.846541 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1284 12:41:29.853300 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1285 12:41:29.856412 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1286 12:41:29.863230 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1287 12:41:29.870043 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1288 12:41:29.876969 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1289 12:41:29.883780 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1290 12:41:29.893357 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1291 12:41:29.896697 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1292 12:41:29.903382 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1293 12:41:29.910096 Root Device assign_resources, bus 0 link: 0
1294 12:41:29.913424 DOMAIN: 0000 assign_resources, bus 0 link: 0
1295 12:41:29.923644 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1296 12:41:29.929753 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1297 12:41:29.939877 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1298 12:41:29.946510 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1299 12:41:29.956477 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1300 12:41:29.963021 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1301 12:41:29.966633 PCI: 00:14.0 assign_resources, bus 0 link: 0
1302 12:41:29.972940 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 12:41:29.979846 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1304 12:41:29.989418 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1305 12:41:29.996242 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1306 12:41:30.006141 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1307 12:41:30.009882 PCI: 00:15.0 assign_resources, bus 1 link: 0
1308 12:41:30.012929 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 12:41:30.023403 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1310 12:41:30.027161 PCI: 00:15.1 assign_resources, bus 2 link: 0
1311 12:41:30.033253 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 12:41:30.040109 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1313 12:41:30.050274 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1314 12:41:30.056770 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1315 12:41:30.063446 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1316 12:41:30.073630 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1317 12:41:30.079882 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1318 12:41:30.086283 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1319 12:41:30.096111 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1320 12:41:30.099688 PCI: 00:19.0 assign_resources, bus 3 link: 0
1321 12:41:30.106394 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 12:41:30.112664 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1323 12:41:30.122567 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1324 12:41:30.129422 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1325 12:41:30.136348 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1326 12:41:30.142962 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1327 12:41:30.149361 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 12:41:30.155753 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1329 12:41:30.165773 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1330 12:41:30.169102 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1331 12:41:30.172155 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 12:41:30.182642 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1333 12:41:30.186268 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1334 12:41:30.192520 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 12:41:30.196272 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1336 12:41:30.202582 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 12:41:30.205854 LPC: Trying to open IO window from 800 size 1ff
1338 12:41:30.215958 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1339 12:41:30.222014 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1340 12:41:30.232048 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1341 12:41:30.239306 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1342 12:41:30.242395 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 12:41:30.248959 Root Device assign_resources, bus 0 link: 0
1344 12:41:30.252890 Done setting resources.
1345 12:41:30.259087 Show resources in subtree (Root Device)...After assigning values.
1346 12:41:30.262122 Root Device child on link 0 CPU_CLUSTER: 0
1347 12:41:30.265650 CPU_CLUSTER: 0 child on link 0 APIC: 00
1348 12:41:30.265851 APIC: 00
1349 12:41:30.268698 APIC: 02
1350 12:41:30.268982 APIC: 06
1351 12:41:30.272614 APIC: 01
1352 12:41:30.272903 APIC: 03
1353 12:41:30.273110 APIC: 04
1354 12:41:30.275645 APIC: 05
1355 12:41:30.275851 APIC: 07
1356 12:41:30.279427 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1357 12:41:30.289191 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1358 12:41:30.302329 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1359 12:41:30.302461 PCI: 00:00.0
1360 12:41:30.312166 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1361 12:41:30.321991 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1362 12:41:30.331830 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1363 12:41:30.341890 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1364 12:41:30.348270 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1365 12:41:30.358336 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1366 12:41:30.367848 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1367 12:41:30.377806 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1368 12:41:30.387823 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1369 12:41:30.394467 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1370 12:41:30.404509 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1371 12:41:30.414369 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1372 12:41:30.424252 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1373 12:41:30.434188 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1374 12:41:30.444203 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1375 12:41:30.454490 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1376 12:41:30.454637 PCI: 00:02.0
1377 12:41:30.464159 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1378 12:41:30.477661 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1379 12:41:30.484145 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1380 12:41:30.487431 PCI: 00:04.0
1381 12:41:30.487548 PCI: 00:08.0
1382 12:41:30.497014 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1383 12:41:30.500188 PCI: 00:12.0
1384 12:41:30.510576 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1385 12:41:30.513398 PCI: 00:14.0 child on link 0 USB0 port 0
1386 12:41:30.526977 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1387 12:41:30.530481 USB0 port 0 child on link 0 USB2 port 0
1388 12:41:30.530584 USB2 port 0
1389 12:41:30.533769 USB2 port 1
1390 12:41:30.533903 USB2 port 2
1391 12:41:30.536969 USB2 port 3
1392 12:41:30.540124 USB2 port 5
1393 12:41:30.540252 USB2 port 6
1394 12:41:30.543202 USB2 port 9
1395 12:41:30.543330 USB3 port 0
1396 12:41:30.546949 USB3 port 1
1397 12:41:30.547074 USB3 port 2
1398 12:41:30.549867 USB3 port 3
1399 12:41:30.550007 USB3 port 4
1400 12:41:30.553488 PCI: 00:14.2
1401 12:41:30.563272 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1402 12:41:30.573485 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1403 12:41:30.573639 PCI: 00:14.3
1404 12:41:30.586586 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1405 12:41:30.589573 PCI: 00:15.0 child on link 0 I2C: 01:15
1406 12:41:30.599549 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1407 12:41:30.599704 I2C: 01:15
1408 12:41:30.606477 PCI: 00:15.1 child on link 0 I2C: 02:5d
1409 12:41:30.616552 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1410 12:41:30.616660 I2C: 02:5d
1411 12:41:30.619638 GENERIC: 0.0
1412 12:41:30.619731 PCI: 00:16.0
1413 12:41:30.629568 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1414 12:41:30.632756 PCI: 00:17.0
1415 12:41:30.643078 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1416 12:41:30.652695 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1417 12:41:30.663029 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1418 12:41:30.672328 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1419 12:41:30.679090 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1420 12:41:30.689173 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1421 12:41:30.695472 PCI: 00:19.0 child on link 0 I2C: 03:1a
1422 12:41:30.705574 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1423 12:41:30.705664 I2C: 03:1a
1424 12:41:30.709300 I2C: 03:38
1425 12:41:30.709380 I2C: 03:39
1426 12:41:30.712622 I2C: 03:3a
1427 12:41:30.712702 I2C: 03:3b
1428 12:41:30.718597 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1429 12:41:30.725484 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1430 12:41:30.735312 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1431 12:41:30.748951 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1432 12:41:30.749099 PCI: 01:00.0
1433 12:41:30.758743 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1434 12:41:30.762254 PCI: 00:1e.0
1435 12:41:30.771713 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1436 12:41:30.781675 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1437 12:41:30.785359 PCI: 00:1e.2 child on link 0 SPI: 00
1438 12:41:30.798263 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1439 12:41:30.798356 SPI: 00
1440 12:41:30.801942 PCI: 00:1e.3 child on link 0 SPI: 01
1441 12:41:30.811916 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1442 12:41:30.814979 SPI: 01
1443 12:41:30.818192 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1444 12:41:30.827871 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1445 12:41:30.834560 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1446 12:41:30.838140 PNP: 0c09.0
1447 12:41:30.844916 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1448 12:41:30.847774 PCI: 00:1f.3
1449 12:41:30.857886 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1450 12:41:30.868132 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1451 12:41:30.870909 PCI: 00:1f.4
1452 12:41:30.877825 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1453 12:41:30.891044 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1454 12:41:30.891134 PCI: 00:1f.5
1455 12:41:30.900526 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1456 12:41:30.904266 Done allocating resources.
1457 12:41:30.910561 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1458 12:41:30.910649 Enabling resources...
1459 12:41:30.918115 PCI: 00:00.0 subsystem <- 8086/9b61
1460 12:41:30.918202 PCI: 00:00.0 cmd <- 06
1461 12:41:30.922067 PCI: 00:02.0 subsystem <- 8086/9b41
1462 12:41:30.925058 PCI: 00:02.0 cmd <- 03
1463 12:41:30.928176 PCI: 00:08.0 cmd <- 06
1464 12:41:30.931222 PCI: 00:12.0 subsystem <- 8086/02f9
1465 12:41:30.934918 PCI: 00:12.0 cmd <- 02
1466 12:41:30.938541 PCI: 00:14.0 subsystem <- 8086/02ed
1467 12:41:30.941471 PCI: 00:14.0 cmd <- 02
1468 12:41:30.945041 PCI: 00:14.2 cmd <- 02
1469 12:41:30.947897 PCI: 00:14.3 subsystem <- 8086/02f0
1470 12:41:30.947979 PCI: 00:14.3 cmd <- 02
1471 12:41:30.955215 PCI: 00:15.0 subsystem <- 8086/02e8
1472 12:41:30.955305 PCI: 00:15.0 cmd <- 02
1473 12:41:30.958153 PCI: 00:15.1 subsystem <- 8086/02e9
1474 12:41:30.961846 PCI: 00:15.1 cmd <- 02
1475 12:41:30.964857 PCI: 00:16.0 subsystem <- 8086/02e0
1476 12:41:30.968396 PCI: 00:16.0 cmd <- 02
1477 12:41:30.971467 PCI: 00:17.0 subsystem <- 8086/02d3
1478 12:41:30.975107 PCI: 00:17.0 cmd <- 03
1479 12:41:30.978170 PCI: 00:19.0 subsystem <- 8086/02c5
1480 12:41:30.981414 PCI: 00:19.0 cmd <- 02
1481 12:41:30.985279 PCI: 00:1d.0 bridge ctrl <- 0013
1482 12:41:30.988014 PCI: 00:1d.0 subsystem <- 8086/02b0
1483 12:41:30.991670 PCI: 00:1d.0 cmd <- 06
1484 12:41:30.994702 PCI: 00:1e.0 subsystem <- 8086/02a8
1485 12:41:30.998239 PCI: 00:1e.0 cmd <- 06
1486 12:41:31.001640 PCI: 00:1e.2 subsystem <- 8086/02aa
1487 12:41:31.001727 PCI: 00:1e.2 cmd <- 06
1488 12:41:31.008158 PCI: 00:1e.3 subsystem <- 8086/02ab
1489 12:41:31.008255 PCI: 00:1e.3 cmd <- 02
1490 12:41:31.011793 PCI: 00:1f.0 subsystem <- 8086/0284
1491 12:41:31.014696 PCI: 00:1f.0 cmd <- 407
1492 12:41:31.017888 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 12:41:31.021723 PCI: 00:1f.3 cmd <- 02
1494 12:41:31.024673 PCI: 00:1f.4 subsystem <- 8086/02a3
1495 12:41:31.028567 PCI: 00:1f.4 cmd <- 03
1496 12:41:31.031511 PCI: 00:1f.5 subsystem <- 8086/02a4
1497 12:41:31.034676 PCI: 00:1f.5 cmd <- 406
1498 12:41:31.043147 PCI: 01:00.0 cmd <- 02
1499 12:41:31.048669 done.
1500 12:41:31.059258 ME: Version: 14.0.39.1367
1501 12:41:31.065715 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1502 12:41:31.069077 Initializing devices...
1503 12:41:31.069160 Root Device init ...
1504 12:41:31.075378 Chrome EC: Set SMI mask to 0x0000000000000000
1505 12:41:31.078676 Chrome EC: clear events_b mask to 0x0000000000000000
1506 12:41:31.085297 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1507 12:41:31.092177 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1508 12:41:31.098555 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1509 12:41:31.102262 Chrome EC: Set WAKE mask to 0x0000000000000000
1510 12:41:31.105441 Root Device init finished in 35208 usecs
1511 12:41:31.108709 CPU_CLUSTER: 0 init ...
1512 12:41:31.115906 CPU_CLUSTER: 0 init finished in 2446 usecs
1513 12:41:31.119774 PCI: 00:00.0 init ...
1514 12:41:31.123213 CPU TDP: 15 Watts
1515 12:41:31.126132 CPU PL2 = 64 Watts
1516 12:41:31.129878 PCI: 00:00.0 init finished in 7078 usecs
1517 12:41:31.133160 PCI: 00:02.0 init ...
1518 12:41:31.136144 PCI: 00:02.0 init finished in 2244 usecs
1519 12:41:31.139452 PCI: 00:08.0 init ...
1520 12:41:31.143163 PCI: 00:08.0 init finished in 2252 usecs
1521 12:41:31.146072 PCI: 00:12.0 init ...
1522 12:41:31.149824 PCI: 00:12.0 init finished in 2244 usecs
1523 12:41:31.152999 PCI: 00:14.0 init ...
1524 12:41:31.156349 PCI: 00:14.0 init finished in 2251 usecs
1525 12:41:31.159451 PCI: 00:14.2 init ...
1526 12:41:31.163178 PCI: 00:14.2 init finished in 2242 usecs
1527 12:41:31.166305 PCI: 00:14.3 init ...
1528 12:41:31.169285 PCI: 00:14.3 init finished in 2272 usecs
1529 12:41:31.172927 PCI: 00:15.0 init ...
1530 12:41:31.175943 DW I2C bus 0 at 0xd121f000 (400 KHz)
1531 12:41:31.179293 PCI: 00:15.0 init finished in 5975 usecs
1532 12:41:31.182631 PCI: 00:15.1 init ...
1533 12:41:31.186386 DW I2C bus 1 at 0xd1220000 (400 KHz)
1534 12:41:31.189524 PCI: 00:15.1 init finished in 5978 usecs
1535 12:41:31.193048 PCI: 00:16.0 init ...
1536 12:41:31.196386 PCI: 00:16.0 init finished in 2253 usecs
1537 12:41:31.199940 PCI: 00:19.0 init ...
1538 12:41:31.203616 DW I2C bus 4 at 0xd1222000 (400 KHz)
1539 12:41:31.209943 PCI: 00:19.0 init finished in 5978 usecs
1540 12:41:31.210036 PCI: 00:1d.0 init ...
1541 12:41:31.213901 Initializing PCH PCIe bridge.
1542 12:41:31.217041 PCI: 00:1d.0 init finished in 5284 usecs
1543 12:41:31.221512 PCI: 00:1f.0 init ...
1544 12:41:31.225245 IOAPIC: Initializing IOAPIC at 0xfec00000
1545 12:41:31.231223 IOAPIC: Bootstrap Processor Local APIC = 0x00
1546 12:41:31.231305 IOAPIC: ID = 0x02
1547 12:41:31.234599 IOAPIC: Dumping registers
1548 12:41:31.237850 reg 0x0000: 0x02000000
1549 12:41:31.241514 reg 0x0001: 0x00770020
1550 12:41:31.241599 reg 0x0002: 0x00000000
1551 12:41:31.248334 PCI: 00:1f.0 init finished in 23528 usecs
1552 12:41:31.251739 PCI: 00:1f.4 init ...
1553 12:41:31.255250 PCI: 00:1f.4 init finished in 2263 usecs
1554 12:41:31.265695 PCI: 01:00.0 init ...
1555 12:41:31.269005 PCI: 01:00.0 init finished in 2252 usecs
1556 12:41:31.273206 PNP: 0c09.0 init ...
1557 12:41:31.276832 Google Chrome EC uptime: 11.058 seconds
1558 12:41:31.283516 Google Chrome AP resets since EC boot: 0
1559 12:41:31.286656 Google Chrome most recent AP reset causes:
1560 12:41:31.293432 Google Chrome EC reset flags at last EC boot: reset-pin
1561 12:41:31.296694 PNP: 0c09.0 init finished in 20570 usecs
1562 12:41:31.299724 Devices initialized
1563 12:41:31.299859 Show all devs... After init.
1564 12:41:31.303279 Root Device: enabled 1
1565 12:41:31.306696 CPU_CLUSTER: 0: enabled 1
1566 12:41:31.309764 DOMAIN: 0000: enabled 1
1567 12:41:31.309849 APIC: 00: enabled 1
1568 12:41:31.312856 PCI: 00:00.0: enabled 1
1569 12:41:31.316694 PCI: 00:02.0: enabled 1
1570 12:41:31.319838 PCI: 00:04.0: enabled 0
1571 12:41:31.319920 PCI: 00:05.0: enabled 0
1572 12:41:31.323197 PCI: 00:12.0: enabled 1
1573 12:41:31.326944 PCI: 00:12.5: enabled 0
1574 12:41:31.327027 PCI: 00:12.6: enabled 0
1575 12:41:31.329788 PCI: 00:14.0: enabled 1
1576 12:41:31.332934 PCI: 00:14.1: enabled 0
1577 12:41:31.336058 PCI: 00:14.3: enabled 1
1578 12:41:31.336136 PCI: 00:14.5: enabled 0
1579 12:41:31.340009 PCI: 00:15.0: enabled 1
1580 12:41:31.343364 PCI: 00:15.1: enabled 1
1581 12:41:31.346191 PCI: 00:15.2: enabled 0
1582 12:41:31.346300 PCI: 00:15.3: enabled 0
1583 12:41:31.349731 PCI: 00:16.0: enabled 1
1584 12:41:31.353178 PCI: 00:16.1: enabled 0
1585 12:41:31.356255 PCI: 00:16.2: enabled 0
1586 12:41:31.356344 PCI: 00:16.3: enabled 0
1587 12:41:31.359328 PCI: 00:16.4: enabled 0
1588 12:41:31.362734 PCI: 00:16.5: enabled 0
1589 12:41:31.362813 PCI: 00:17.0: enabled 1
1590 12:41:31.366019 PCI: 00:19.0: enabled 1
1591 12:41:31.369536 PCI: 00:19.1: enabled 0
1592 12:41:31.373140 PCI: 00:19.2: enabled 0
1593 12:41:31.373225 PCI: 00:1a.0: enabled 0
1594 12:41:31.376082 PCI: 00:1c.0: enabled 0
1595 12:41:31.379838 PCI: 00:1c.1: enabled 0
1596 12:41:31.383030 PCI: 00:1c.2: enabled 0
1597 12:41:31.383127 PCI: 00:1c.3: enabled 0
1598 12:41:31.386058 PCI: 00:1c.4: enabled 0
1599 12:41:31.389428 PCI: 00:1c.5: enabled 0
1600 12:41:31.392674 PCI: 00:1c.6: enabled 0
1601 12:41:31.392786 PCI: 00:1c.7: enabled 0
1602 12:41:31.395773 PCI: 00:1d.0: enabled 1
1603 12:41:31.399285 PCI: 00:1d.1: enabled 0
1604 12:41:31.399415 PCI: 00:1d.2: enabled 0
1605 12:41:31.402383 PCI: 00:1d.3: enabled 0
1606 12:41:31.406096 PCI: 00:1d.4: enabled 0
1607 12:41:31.409150 PCI: 00:1d.5: enabled 0
1608 12:41:31.409312 PCI: 00:1e.0: enabled 1
1609 12:41:31.412880 PCI: 00:1e.1: enabled 0
1610 12:41:31.416433 PCI: 00:1e.2: enabled 1
1611 12:41:31.419172 PCI: 00:1e.3: enabled 1
1612 12:41:31.419416 PCI: 00:1f.0: enabled 1
1613 12:41:31.423180 PCI: 00:1f.1: enabled 0
1614 12:41:31.425693 PCI: 00:1f.2: enabled 0
1615 12:41:31.429358 PCI: 00:1f.3: enabled 1
1616 12:41:31.429718 PCI: 00:1f.4: enabled 1
1617 12:41:31.432732 PCI: 00:1f.5: enabled 1
1618 12:41:31.436186 PCI: 00:1f.6: enabled 0
1619 12:41:31.436675 USB0 port 0: enabled 1
1620 12:41:31.439264 I2C: 01:15: enabled 1
1621 12:41:31.442432 I2C: 02:5d: enabled 1
1622 12:41:31.446404 GENERIC: 0.0: enabled 1
1623 12:41:31.446859 I2C: 03:1a: enabled 1
1624 12:41:31.449205 I2C: 03:38: enabled 1
1625 12:41:31.452523 I2C: 03:39: enabled 1
1626 12:41:31.452926 I2C: 03:3a: enabled 1
1627 12:41:31.455824 I2C: 03:3b: enabled 1
1628 12:41:31.459363 PCI: 00:00.0: enabled 1
1629 12:41:31.459731 SPI: 00: enabled 1
1630 12:41:31.462558 SPI: 01: enabled 1
1631 12:41:31.466014 PNP: 0c09.0: enabled 1
1632 12:41:31.466468 USB2 port 0: enabled 1
1633 12:41:31.468944 USB2 port 1: enabled 1
1634 12:41:31.472324 USB2 port 2: enabled 0
1635 12:41:31.472776 USB2 port 3: enabled 0
1636 12:41:31.475700 USB2 port 5: enabled 0
1637 12:41:31.478929 USB2 port 6: enabled 1
1638 12:41:31.482308 USB2 port 9: enabled 1
1639 12:41:31.482759 USB3 port 0: enabled 1
1640 12:41:31.485691 USB3 port 1: enabled 1
1641 12:41:31.488999 USB3 port 2: enabled 1
1642 12:41:31.489445 USB3 port 3: enabled 1
1643 12:41:31.492129 USB3 port 4: enabled 0
1644 12:41:31.495896 APIC: 02: enabled 1
1645 12:41:31.496383 APIC: 06: enabled 1
1646 12:41:31.498962 APIC: 01: enabled 1
1647 12:41:31.502483 APIC: 03: enabled 1
1648 12:41:31.502929 APIC: 04: enabled 1
1649 12:41:31.505605 APIC: 05: enabled 1
1650 12:41:31.506023 APIC: 07: enabled 1
1651 12:41:31.508702 PCI: 00:08.0: enabled 1
1652 12:41:31.511951 PCI: 00:14.2: enabled 1
1653 12:41:31.515449 PCI: 01:00.0: enabled 1
1654 12:41:31.519479 Disabling ACPI via APMC:
1655 12:41:31.519916 done.
1656 12:41:31.525869 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1657 12:41:31.529151 ELOG: NV offset 0xaf0000 size 0x4000
1658 12:41:31.535683 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 12:41:31.542496 ELOG: Event(17) added with size 13 at 2024-01-03 12:40:59 UTC
1660 12:41:31.548791 ELOG: Event(92) added with size 9 at 2024-01-03 12:40:59 UTC
1661 12:41:31.555650 ELOG: Event(93) added with size 9 at 2024-01-03 12:40:59 UTC
1662 12:41:31.562501 ELOG: Event(9A) added with size 9 at 2024-01-03 12:40:59 UTC
1663 12:41:31.568822 ELOG: Event(9E) added with size 10 at 2024-01-03 12:40:59 UTC
1664 12:41:31.575255 ELOG: Event(9F) added with size 14 at 2024-01-03 12:40:59 UTC
1665 12:41:31.578424 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1666 12:41:31.585448 ELOG: Event(A1) added with size 10 at 2024-01-03 12:40:59 UTC
1667 12:41:31.595526 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1668 12:41:31.602226 ELOG: Event(A0) added with size 9 at 2024-01-03 12:40:59 UTC
1669 12:41:31.605326 elog_add_boot_reason: Logged dev mode boot
1670 12:41:31.608746 Finalize devices...
1671 12:41:31.609181 PCI: 00:17.0 final
1672 12:41:31.612118 Devices finalized
1673 12:41:31.615165 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1674 12:41:31.622297 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1675 12:41:31.625488 ME: HFSTS1 : 0x90000245
1676 12:41:31.628922 ME: HFSTS2 : 0x3B850126
1677 12:41:31.635188 ME: HFSTS3 : 0x00000020
1678 12:41:31.638672 ME: HFSTS4 : 0x00004800
1679 12:41:31.642046 ME: HFSTS5 : 0x00000000
1680 12:41:31.644968 ME: HFSTS6 : 0x40400006
1681 12:41:31.648344 ME: Manufacturing Mode : NO
1682 12:41:31.651893 ME: FW Partition Table : OK
1683 12:41:31.655425 ME: Bringup Loader Failure : NO
1684 12:41:31.658233 ME: Firmware Init Complete : YES
1685 12:41:31.661430 ME: Boot Options Present : NO
1686 12:41:31.665216 ME: Update In Progress : NO
1687 12:41:31.668032 ME: D0i3 Support : YES
1688 12:41:31.671950 ME: Low Power State Enabled : NO
1689 12:41:31.674900 ME: CPU Replaced : NO
1690 12:41:31.677985 ME: CPU Replacement Valid : YES
1691 12:41:31.681593 ME: Current Working State : 5
1692 12:41:31.684897 ME: Current Operation State : 1
1693 12:41:31.688341 ME: Current Operation Mode : 0
1694 12:41:31.691585 ME: Error Code : 0
1695 12:41:31.694796 ME: CPU Debug Disabled : YES
1696 12:41:31.698445 ME: TXT Support : NO
1697 12:41:31.704706 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1698 12:41:31.707904 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 12:41:31.711395 CBFS @ c08000 size 3f8000
1700 12:41:31.718352 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 12:41:31.721620 CBFS: Locating 'fallback/dsdt.aml'
1702 12:41:31.724446 CBFS: Found @ offset 10bb80 size 3fa5
1703 12:41:31.731446 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 12:41:31.734740 CBFS @ c08000 size 3f8000
1705 12:41:31.738082 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 12:41:31.741449 CBFS: Locating 'fallback/slic'
1707 12:41:31.746218 CBFS: 'fallback/slic' not found.
1708 12:41:31.752753 ACPI: Writing ACPI tables at 99b3e000.
1709 12:41:31.753208 ACPI: * FACS
1710 12:41:31.755957 ACPI: * DSDT
1711 12:41:31.759293 Ramoops buffer: 0x100000@0x99a3d000.
1712 12:41:31.762227 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1713 12:41:31.768958 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1714 12:41:31.772378 Google Chrome EC: version:
1715 12:41:31.775901 ro: helios_v2.0.2659-56403530b
1716 12:41:31.779017 rw: helios_v2.0.2849-c41de27e7d
1717 12:41:31.779498 running image: 1
1718 12:41:31.783450 ACPI: * FADT
1719 12:41:31.783982 SCI is IRQ9
1720 12:41:31.790066 ACPI: added table 1/32, length now 40
1721 12:41:31.790486 ACPI: * SSDT
1722 12:41:31.793331 Found 1 CPU(s) with 8 core(s) each.
1723 12:41:31.796608 Error: Could not locate 'wifi_sar' in VPD.
1724 12:41:31.803274 Checking CBFS for default SAR values
1725 12:41:31.806836 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 12:41:31.809597 CBFS @ c08000 size 3f8000
1727 12:41:31.816412 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 12:41:31.819619 CBFS: Locating 'wifi_sar_defaults.hex'
1729 12:41:31.823072 CBFS: Found @ offset 5fac0 size 77
1730 12:41:31.826300 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1731 12:41:31.833158 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1732 12:41:31.836298 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1733 12:41:31.842996 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1734 12:41:31.846218 failed to find key in VPD: dsm_calib_r0_0
1735 12:41:31.855764 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1736 12:41:31.859373 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1737 12:41:31.862765 failed to find key in VPD: dsm_calib_r0_1
1738 12:41:31.872696 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1739 12:41:31.879399 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1740 12:41:31.882384 failed to find key in VPD: dsm_calib_r0_2
1741 12:41:31.892667 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1742 12:41:31.895604 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1743 12:41:31.902608 failed to find key in VPD: dsm_calib_r0_3
1744 12:41:31.908847 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1745 12:41:31.915676 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1746 12:41:31.918863 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1747 12:41:31.922712 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1748 12:41:31.926408 EC returned error result code 1
1749 12:41:31.930188 EC returned error result code 1
1750 12:41:31.933571 EC returned error result code 1
1751 12:41:31.939900 PS2K: Bad resp from EC. Vivaldi disabled!
1752 12:41:31.943492 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1753 12:41:31.950517 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1754 12:41:31.956832 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1755 12:41:31.959888 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1756 12:41:31.966643 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1757 12:41:31.973520 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1758 12:41:31.976571 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1759 12:41:31.983170 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1760 12:41:31.986502 ACPI: added table 2/32, length now 44
1761 12:41:31.990298 ACPI: * MCFG
1762 12:41:31.993395 ACPI: added table 3/32, length now 48
1763 12:41:31.996802 ACPI: * TPM2
1764 12:41:31.997224 TPM2 log created at 99a2d000
1765 12:41:32.003008 ACPI: added table 4/32, length now 52
1766 12:41:32.003450 ACPI: * MADT
1767 12:41:32.006846 SCI is IRQ9
1768 12:41:32.010135 ACPI: added table 5/32, length now 56
1769 12:41:32.010561 current = 99b43ac0
1770 12:41:32.012938 ACPI: * DMAR
1771 12:41:32.016952 ACPI: added table 6/32, length now 60
1772 12:41:32.020120 ACPI: * IGD OpRegion
1773 12:41:32.020623 GMA: Found VBT in CBFS
1774 12:41:32.022974 GMA: Found valid VBT in CBFS
1775 12:41:32.026685 ACPI: added table 7/32, length now 64
1776 12:41:32.030195 ACPI: * HPET
1777 12:41:32.033415 ACPI: added table 8/32, length now 68
1778 12:41:32.033847 ACPI: done.
1779 12:41:32.036498 ACPI tables: 31744 bytes.
1780 12:41:32.039698 smbios_write_tables: 99a2c000
1781 12:41:32.043317 EC returned error result code 3
1782 12:41:32.046377 Couldn't obtain OEM name from CBI
1783 12:41:32.049963 Create SMBIOS type 17
1784 12:41:32.053170 PCI: 00:00.0 (Intel Cannonlake)
1785 12:41:32.056337 PCI: 00:14.3 (Intel WiFi)
1786 12:41:32.059915 SMBIOS tables: 939 bytes.
1787 12:41:32.063019 Writing table forward entry at 0x00000500
1788 12:41:32.069623 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1789 12:41:32.073190 Writing coreboot table at 0x99b62000
1790 12:41:32.079525 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1791 12:41:32.083339 1. 0000000000001000-000000000009ffff: RAM
1792 12:41:32.086094 2. 00000000000a0000-00000000000fffff: RESERVED
1793 12:41:32.093024 3. 0000000000100000-0000000099a2bfff: RAM
1794 12:41:32.096519 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1795 12:41:32.102972 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1796 12:41:32.109339 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1797 12:41:32.112825 7. 000000009a000000-000000009f7fffff: RESERVED
1798 12:41:32.116347 8. 00000000e0000000-00000000efffffff: RESERVED
1799 12:41:32.122732 9. 00000000fc000000-00000000fc000fff: RESERVED
1800 12:41:32.126132 10. 00000000fe000000-00000000fe00ffff: RESERVED
1801 12:41:32.132477 11. 00000000fed10000-00000000fed17fff: RESERVED
1802 12:41:32.136062 12. 00000000fed80000-00000000fed83fff: RESERVED
1803 12:41:32.142760 13. 00000000fed90000-00000000fed91fff: RESERVED
1804 12:41:32.146163 14. 00000000feda0000-00000000feda1fff: RESERVED
1805 12:41:32.149266 15. 0000000100000000-000000045e7fffff: RAM
1806 12:41:32.155692 Graphics framebuffer located at 0xc0000000
1807 12:41:32.159141 Passing 5 GPIOs to payload:
1808 12:41:32.162631 NAME | PORT | POLARITY | VALUE
1809 12:41:32.169234 write protect | undefined | high | low
1810 12:41:32.172919 lid | undefined | high | high
1811 12:41:32.179282 power | undefined | high | low
1812 12:41:32.182419 oprom | undefined | high | low
1813 12:41:32.189272 EC in RW | 0x000000cb | high | low
1814 12:41:32.189706 Board ID: 4
1815 12:41:32.195417 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1816 12:41:32.198918 CBFS @ c08000 size 3f8000
1817 12:41:32.202006 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1818 12:41:32.209155 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1819 12:41:32.212165 coreboot table: 1492 bytes.
1820 12:41:32.215632 IMD ROOT 0. 99fff000 00001000
1821 12:41:32.219006 IMD SMALL 1. 99ffe000 00001000
1822 12:41:32.222317 FSP MEMORY 2. 99c4e000 003b0000
1823 12:41:32.225670 CONSOLE 3. 99c2e000 00020000
1824 12:41:32.229597 FMAP 4. 99c2d000 0000054e
1825 12:41:32.232400 TIME STAMP 5. 99c2c000 00000910
1826 12:41:32.235386 VBOOT WORK 6. 99c18000 00014000
1827 12:41:32.238967 MRC DATA 7. 99c16000 00001958
1828 12:41:32.242359 ROMSTG STCK 8. 99c15000 00001000
1829 12:41:32.245661 AFTER CAR 9. 99c0b000 0000a000
1830 12:41:32.248614 RAMSTAGE 10. 99baf000 0005c000
1831 12:41:32.252025 REFCODE 11. 99b7a000 00035000
1832 12:41:32.255815 SMM BACKUP 12. 99b6a000 00010000
1833 12:41:32.258853 COREBOOT 13. 99b62000 00008000
1834 12:41:32.262582 ACPI 14. 99b3e000 00024000
1835 12:41:32.265614 ACPI GNVS 15. 99b3d000 00001000
1836 12:41:32.269302 RAMOOPS 16. 99a3d000 00100000
1837 12:41:32.272321 TPM2 TCGLOG17. 99a2d000 00010000
1838 12:41:32.275405 SMBIOS 18. 99a2c000 00000800
1839 12:41:32.278936 IMD small region:
1840 12:41:32.281983 IMD ROOT 0. 99ffec00 00000400
1841 12:41:32.285060 FSP RUNTIME 1. 99ffebe0 00000004
1842 12:41:32.288964 EC HOSTEVENT 2. 99ffebc0 00000008
1843 12:41:32.292161 POWER STATE 3. 99ffeb80 00000040
1844 12:41:32.295261 ROMSTAGE 4. 99ffeb60 00000004
1845 12:41:32.298618 MEM INFO 5. 99ffe9a0 000001b9
1846 12:41:32.302251 VPD 6. 99ffe920 0000006c
1847 12:41:32.305636 MTRR: Physical address space:
1848 12:41:32.312198 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1849 12:41:32.318589 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1850 12:41:32.325023 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1851 12:41:32.331594 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1852 12:41:32.338168 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1853 12:41:32.342184 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1854 12:41:32.348850 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1855 12:41:32.354583 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 12:41:32.358293 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 12:41:32.361521 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 12:41:32.364872 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 12:41:32.367912 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 12:41:32.374664 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 12:41:32.378514 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 12:41:32.381363 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 12:41:32.384673 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 12:41:32.391555 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 12:41:32.394542 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 12:41:32.398291 call enable_fixed_mtrr()
1867 12:41:32.401422 CPU physical address size: 39 bits
1868 12:41:32.404437 MTRR: default type WB/UC MTRR counts: 6/8.
1869 12:41:32.408150 MTRR: WB selected as default type.
1870 12:41:32.414571 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1871 12:41:32.421076 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1872 12:41:32.427670 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1873 12:41:32.434581 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1874 12:41:32.440709 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1875 12:41:32.447421 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1876 12:41:32.451058 MTRR: Fixed MSR 0x250 0x0606060606060606
1877 12:41:32.454093 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 12:41:32.461057 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 12:41:32.463907 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 12:41:32.467173 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 12:41:32.470571 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 12:41:32.477321 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 12:41:32.480637 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 12:41:32.484071 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 12:41:32.487143 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 12:41:32.490823 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 12:41:32.493865
1888 12:41:32.494467 MTRR check
1889 12:41:32.497682 Fixed MTRRs : Enabled
1890 12:41:32.498101 Variable MTRRs: Enabled
1891 12:41:32.500699
1892 12:41:32.501133 call enable_fixed_mtrr()
1893 12:41:32.506818 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1894 12:41:32.510674 CPU physical address size: 39 bits
1895 12:41:32.516897 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1896 12:41:32.519996 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 12:41:32.523707 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 12:41:32.526692 MTRR: Fixed MSR 0x259 0x0000000000000000
1899 12:41:32.533430 MTRR: Fixed MSR 0x268 0x0606060606060606
1900 12:41:32.536791 MTRR: Fixed MSR 0x269 0x0606060606060606
1901 12:41:32.540322 MTRR: Fixed MSR 0x26a 0x0606060606060606
1902 12:41:32.543371 MTRR: Fixed MSR 0x26b 0x0606060606060606
1903 12:41:32.547080 MTRR: Fixed MSR 0x26c 0x0606060606060606
1904 12:41:32.553321 MTRR: Fixed MSR 0x26d 0x0606060606060606
1905 12:41:32.557113 MTRR: Fixed MSR 0x26e 0x0606060606060606
1906 12:41:32.560284 MTRR: Fixed MSR 0x26f 0x0606060606060606
1907 12:41:32.563964 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 12:41:32.566634 call enable_fixed_mtrr()
1909 12:41:32.570103 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 12:41:32.576853 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 12:41:32.579958 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 12:41:32.583168 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 12:41:32.586461 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 12:41:32.593185 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 12:41:32.596571 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 12:41:32.599749 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 12:41:32.602884 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 12:41:32.609828 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 12:41:32.613191 CPU physical address size: 39 bits
1920 12:41:32.616739 call enable_fixed_mtrr()
1921 12:41:32.619986 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 12:41:32.623097 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 12:41:32.626240 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 12:41:32.633054 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 12:41:32.636354 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 12:41:32.639356 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 12:41:32.642695 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 12:41:32.646116 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 12:41:32.653001 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 12:41:32.656439 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 12:41:32.659436 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 12:41:32.665810 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 12:41:32.666471 call enable_fixed_mtrr()
1934 12:41:32.672389 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 12:41:32.675590 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 12:41:32.679173 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 12:41:32.682913 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 12:41:32.685955 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 12:41:32.692848 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 12:41:32.696017 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 12:41:32.698842 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 12:41:32.702793 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 12:41:32.709190 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 12:41:32.712416 CPU physical address size: 39 bits
1945 12:41:32.715496 call enable_fixed_mtrr()
1946 12:41:32.718853 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 12:41:32.722026 MTRR: Fixed MSR 0x258 0x0606060606060606
1948 12:41:32.725432 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 12:41:32.732123 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 12:41:32.735849 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 12:41:32.739079 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 12:41:32.742208 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 12:41:32.748957 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 12:41:32.751982 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 12:41:32.755448 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 12:41:32.758685 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 12:41:32.765458 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 12:41:32.765871 call enable_fixed_mtrr()
1959 12:41:32.772059 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 12:41:32.775150 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 12:41:32.778856 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 12:41:32.782041 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 12:41:32.785474 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 12:41:32.791680 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 12:41:32.794891 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 12:41:32.798687 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 12:41:32.801723 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 12:41:32.808571 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 12:41:32.811859 CPU physical address size: 39 bits
1970 12:41:32.815024 call enable_fixed_mtrr()
1971 12:41:32.818324 CPU physical address size: 39 bits
1972 12:41:32.821704 CPU physical address size: 39 bits
1973 12:41:32.824807 CBFS @ c08000 size 3f8000
1974 12:41:32.828727 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1975 12:41:32.831652 CBFS: Locating 'fallback/payload'
1976 12:41:32.834748 CPU physical address size: 39 bits
1977 12:41:32.841623 CBFS: Found @ offset 1c96c0 size 3f798
1978 12:41:32.845299 Checking segment from ROM address 0xffdd16f8
1979 12:41:32.848212 Checking segment from ROM address 0xffdd1714
1980 12:41:32.854689 Loading segment from ROM address 0xffdd16f8
1981 12:41:32.855118 code (compression=0)
1982 12:41:32.864684 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1983 12:41:32.871495 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1984 12:41:32.874436 it's not compressed!
1985 12:41:32.967161 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1986 12:41:32.973778 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1987 12:41:32.977279 Loading segment from ROM address 0xffdd1714
1988 12:41:32.980427 Entry Point 0x30000000
1989 12:41:32.983969 Loaded segments
1990 12:41:32.989295 Finalizing chipset.
1991 12:41:32.992679 Finalizing SMM.
1992 12:41:32.995903 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1993 12:41:32.999425 mp_park_aps done after 0 msecs.
1994 12:41:33.005726 Jumping to boot code at 30000000(99b62000)
1995 12:41:33.012498 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1996 12:41:33.012934
1997 12:41:33.013267
1998 12:41:33.013595
1999 12:41:33.016274 Starting depthcharge on Helios...
2000 12:41:33.016715
2001 12:41:33.017834 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2002 12:41:33.018375 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2003 12:41:33.018839 Setting prompt string to ['hatch:']
2004 12:41:33.019269 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2005 12:41:33.025965 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 12:41:33.026469
2007 12:41:33.032364 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2008 12:41:33.032874
2009 12:41:33.039129 board_setup: Info: eMMC controller not present; skipping
2010 12:41:33.039562
2011 12:41:33.042245 New NVMe Controller 0x30053ac0 @ 00:1d:00
2012 12:41:33.042705
2013 12:41:33.048873 board_setup: Info: SDHCI controller not present; skipping
2014 12:41:33.049355
2015 12:41:33.052681 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2016 12:41:33.055573
2017 12:41:33.056002 Wipe memory regions:
2018 12:41:33.056506
2019 12:41:33.058725 [0x00000000001000, 0x000000000a0000)
2020 12:41:33.059157
2021 12:41:33.062370 [0x00000000100000, 0x00000030000000)
2022 12:41:33.128483
2023 12:41:33.131765 [0x00000030657430, 0x00000099a2c000)
2024 12:41:33.278649
2025 12:41:33.281372 [0x00000100000000, 0x0000045e800000)
2026 12:41:34.737558
2027 12:41:34.738074 R8152: Initializing
2028 12:41:34.738414
2029 12:41:34.741629 Version 9 (ocp_data = 6010)
2030 12:41:34.745100
2031 12:41:34.745551 R8152: Done initializing
2032 12:41:34.745902
2033 12:41:34.748672 Adding net device
2034 12:41:35.231286
2035 12:41:35.231809 R8152: Initializing
2036 12:41:35.232189
2037 12:41:35.234562 Version 6 (ocp_data = 5c30)
2038 12:41:35.235001
2039 12:41:35.238009 R8152: Done initializing
2040 12:41:35.238473
2041 12:41:35.241262 net_add_device: Attemp to include the same device
2042 12:41:35.244912
2043 12:41:35.252491 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2044 12:41:35.253033
2045 12:41:35.253374
2046 12:41:35.253685
2047 12:41:35.254431 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2049 12:41:35.355532 hatch: tftpboot 192.168.201.1 12437329/tftp-deploy-lyols63z/kernel/bzImage 12437329/tftp-deploy-lyols63z/kernel/cmdline 12437329/tftp-deploy-lyols63z/ramdisk/ramdisk.cpio.gz
2050 12:41:35.356158 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2051 12:41:35.356733 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2052 12:41:35.360743 tftpboot 192.168.201.1 12437329/tftp-deploy-lyols63z/kernel/bzImploy-lyols63z/kernel/cmdline 12437329/tftp-deploy-lyols63z/ramdisk/ramdisk.cpio.gz
2053 12:41:35.361212
2054 12:41:35.361542 Waiting for link
2055 12:41:35.561528
2056 12:41:35.562029 done.
2057 12:41:35.562389
2058 12:41:35.562706 MAC: 00:24:32:50:1a:59
2059 12:41:35.563024
2060 12:41:35.565055 Sending DHCP discover... done.
2061 12:41:35.565490
2062 12:41:35.568379 Waiting for reply... done.
2063 12:41:35.568841
2064 12:41:35.572109 Sending DHCP request... done.
2065 12:41:35.572606
2066 12:41:35.575377 Waiting for reply... done.
2067 12:41:35.575861
2068 12:41:35.578423 My ip is 192.168.201.14
2069 12:41:35.578931
2070 12:41:35.581599 The DHCP server ip is 192.168.201.1
2071 12:41:35.582037
2072 12:41:35.585100 TFTP server IP predefined by user: 192.168.201.1
2073 12:41:35.585573
2074 12:41:35.595043 Bootfile predefined by user: 12437329/tftp-deploy-lyols63z/kernel/bzImage
2075 12:41:35.595499
2076 12:41:35.598156 Sending tftp read request... done.
2077 12:41:35.598577
2078 12:41:35.605516 Waiting for the transfer...
2079 12:41:35.605988
2080 12:41:36.153494 00000000 ################################################################
2081 12:41:36.153659
2082 12:41:36.694070 00080000 ################################################################
2083 12:41:36.694239
2084 12:41:37.222666 00100000 ################################################################
2085 12:41:37.222821
2086 12:41:37.763160 00180000 ################################################################
2087 12:41:37.763315
2088 12:41:38.319385 00200000 ################################################################
2089 12:41:38.319528
2090 12:41:38.850908 00280000 ################################################################
2091 12:41:38.851067
2092 12:41:39.404327 00300000 ################################################################
2093 12:41:39.404475
2094 12:41:39.925915 00380000 ################################################################
2095 12:41:39.926097
2096 12:41:40.474521 00400000 ################################################################
2097 12:41:40.474677
2098 12:41:41.004233 00480000 ################################################################
2099 12:41:41.004387
2100 12:41:41.522211 00500000 ################################################################
2101 12:41:41.522362
2102 12:41:42.043332 00580000 ################################################################
2103 12:41:42.043484
2104 12:41:42.561933 00600000 ################################################################
2105 12:41:42.562090
2106 12:41:43.081330 00680000 ################################################################
2107 12:41:43.081493
2108 12:41:43.601229 00700000 ################################################################
2109 12:41:43.601393
2110 12:41:44.141655 00780000 ################################################################
2111 12:41:44.141816
2112 12:41:44.363254 00800000 ######################## done.
2113 12:41:44.363402
2114 12:41:44.366354 The bootfile was 8585104 bytes long.
2115 12:41:44.366452
2116 12:41:44.369870 Sending tftp read request... done.
2117 12:41:44.369967
2118 12:41:44.373135 Waiting for the transfer...
2119 12:41:44.373240
2120 12:41:45.029658 00000000 ################################################################
2121 12:41:45.030187
2122 12:41:45.700990 00080000 ################################################################
2123 12:41:45.701545
2124 12:41:46.335051 00100000 ################################################################
2125 12:41:46.335209
2126 12:41:46.912970 00180000 ################################################################
2127 12:41:46.913127
2128 12:41:47.491769 00200000 ################################################################
2129 12:41:47.491939
2130 12:41:48.076942 00280000 ################################################################
2131 12:41:48.077110
2132 12:41:48.675075 00300000 ################################################################
2133 12:41:48.675244
2134 12:41:49.265443 00380000 ################################################################
2135 12:41:49.265613
2136 12:41:49.845791 00400000 ################################################################
2137 12:41:49.845947
2138 12:41:50.468378 00480000 ################################################################
2139 12:41:50.468881
2140 12:41:51.134027 00500000 ################################################################
2141 12:41:51.134559
2142 12:41:51.438816 00580000 ############################# done.
2143 12:41:51.439343
2144 12:41:51.441562 Sending tftp read request... done.
2145 12:41:51.442024
2146 12:41:51.444953 Waiting for the transfer...
2147 12:41:51.445389
2148 12:41:51.445837 00000000 # done.
2149 12:41:51.446265
2150 12:41:51.455068 Command line loaded dynamically from TFTP file: 12437329/tftp-deploy-lyols63z/kernel/cmdline
2151 12:41:51.455507
2152 12:41:51.484560 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12437329/extract-nfsrootfs-hyldd6qg,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2153 12:41:51.485014
2154 12:41:51.491133 ec_init(0): CrosEC protocol v3 supported (256, 256)
2155 12:41:51.494593
2156 12:41:51.497755 Shutting down all USB controllers.
2157 12:41:51.498186
2158 12:41:51.498630 Removing current net device
2159 12:41:51.502457
2160 12:41:51.502895 Finalizing coreboot
2161 12:41:51.503333
2162 12:41:51.509079 Exiting depthcharge with code 4 at timestamp: 25822196
2163 12:41:51.509528
2164 12:41:51.509967
2165 12:41:51.510384 Starting kernel ...
2166 12:41:51.510790
2167 12:41:51.511187
2168 12:41:51.512776 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2169 12:41:51.513316 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2170 12:41:51.513743 Setting prompt string to ['Linux version [0-9]']
2171 12:41:51.514285 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 12:41:51.514715 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2174 12:46:14.514308 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2176 12:46:14.516137 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2178 12:46:14.517586 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2181 12:46:14.519770 end: 2 depthcharge-action (duration 00:05:00) [common]
2183 12:46:14.521042 Cleaning after the job
2184 12:46:14.521530 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437329/tftp-deploy-lyols63z/ramdisk
2185 12:46:14.526716 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437329/tftp-deploy-lyols63z/kernel
2186 12:46:14.532948 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437329/tftp-deploy-lyols63z/nfsrootfs
2187 12:46:14.687641 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12437329/tftp-deploy-lyols63z/modules
2188 12:46:14.688184 start: 4.1 power-off (timeout 00:00:30) [common]
2189 12:46:14.688399 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2190 12:46:14.773237 >> Command sent successfully.
2191 12:46:14.784000 Returned 0 in 0 seconds
2192 12:46:14.885452 end: 4.1 power-off (duration 00:00:00) [common]
2194 12:46:14.887204 start: 4.2 read-feedback (timeout 00:10:00) [common]
2195 12:46:14.888698 Listened to connection for namespace 'common' for up to 1s
2197 12:46:14.890233 Listened to connection for namespace 'common' for up to 1s
2198 12:46:15.889267 Finalising connection for namespace 'common'
2199 12:46:15.890037 Disconnecting from shell: Finalise
2200 12:46:15.890557
2201 12:46:15.991843 end: 4.2 read-feedback (duration 00:00:01) [common]
2202 12:46:15.992547 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12437329
2203 12:46:16.546663 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12437329
2204 12:46:16.546864 JobError: Your job cannot terminate cleanly.