Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 15:57:27.680136 lava-dispatcher, installed at version: 2023.06
2 15:57:27.680368 start: 0 validate
3 15:57:27.680529 Start time: 2023-09-06 15:57:27.680519+00:00 (UTC)
4 15:57:27.680688 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:57:27.680880 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:57:27.939570 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:57:27.939822 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1638-gdc4a7f7fb55c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:57:28.205560 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:57:28.205832 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1638-gdc4a7f7fb55c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:57:28.474616 validate duration: 0.79
12 15:57:28.475039 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:57:28.475192 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:57:28.475354 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:57:28.475546 Not decompressing ramdisk as can be used compressed.
16 15:57:28.475727 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:57:28.475843 saving as /var/lib/lava/dispatcher/tmp/11447434/tftp-deploy-mri5yeev/ramdisk/rootfs.cpio.gz
18 15:57:28.475944 total size: 8418130 (8 MB)
19 15:57:28.477643 progress 0 % (0 MB)
20 15:57:28.480413 progress 5 % (0 MB)
21 15:57:28.483116 progress 10 % (0 MB)
22 15:57:28.485725 progress 15 % (1 MB)
23 15:57:28.488351 progress 20 % (1 MB)
24 15:57:28.491010 progress 25 % (2 MB)
25 15:57:28.493608 progress 30 % (2 MB)
26 15:57:28.495912 progress 35 % (2 MB)
27 15:57:28.498355 progress 40 % (3 MB)
28 15:57:28.500761 progress 45 % (3 MB)
29 15:57:28.503100 progress 50 % (4 MB)
30 15:57:28.505427 progress 55 % (4 MB)
31 15:57:28.507734 progress 60 % (4 MB)
32 15:57:28.509845 progress 65 % (5 MB)
33 15:57:28.512148 progress 70 % (5 MB)
34 15:57:28.514435 progress 75 % (6 MB)
35 15:57:28.516736 progress 80 % (6 MB)
36 15:57:28.519223 progress 85 % (6 MB)
37 15:57:28.522192 progress 90 % (7 MB)
38 15:57:28.524949 progress 95 % (7 MB)
39 15:57:28.527139 progress 100 % (8 MB)
40 15:57:28.527433 8 MB downloaded in 0.05 s (155.92 MB/s)
41 15:57:28.527612 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:57:28.527866 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:57:28.527953 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:57:28.528039 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:57:28.528203 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1638-gdc4a7f7fb55c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:57:28.528293 saving as /var/lib/lava/dispatcher/tmp/11447434/tftp-deploy-mri5yeev/kernel/bzImage
48 15:57:28.528382 total size: 8490896 (8 MB)
49 15:57:28.528448 No compression specified
50 15:57:28.529589 progress 0 % (0 MB)
51 15:57:28.531853 progress 5 % (0 MB)
52 15:57:28.534184 progress 10 % (0 MB)
53 15:57:28.536525 progress 15 % (1 MB)
54 15:57:28.538859 progress 20 % (1 MB)
55 15:57:28.541189 progress 25 % (2 MB)
56 15:57:28.543577 progress 30 % (2 MB)
57 15:57:28.546040 progress 35 % (2 MB)
58 15:57:28.548387 progress 40 % (3 MB)
59 15:57:28.550743 progress 45 % (3 MB)
60 15:57:28.553098 progress 50 % (4 MB)
61 15:57:28.555415 progress 55 % (4 MB)
62 15:57:28.557744 progress 60 % (4 MB)
63 15:57:28.560097 progress 65 % (5 MB)
64 15:57:28.562383 progress 70 % (5 MB)
65 15:57:28.564693 progress 75 % (6 MB)
66 15:57:28.566993 progress 80 % (6 MB)
67 15:57:28.569316 progress 85 % (6 MB)
68 15:57:28.571615 progress 90 % (7 MB)
69 15:57:28.573910 progress 95 % (7 MB)
70 15:57:28.576604 progress 100 % (8 MB)
71 15:57:28.576794 8 MB downloaded in 0.05 s (167.28 MB/s)
72 15:57:28.576955 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:57:28.577198 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:57:28.577327 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:57:28.577445 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:57:28.577636 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1638-gdc4a7f7fb55c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:57:28.577737 saving as /var/lib/lava/dispatcher/tmp/11447434/tftp-deploy-mri5yeev/modules/modules.tar
79 15:57:28.577829 total size: 250824 (0 MB)
80 15:57:28.577933 Using unxz to decompress xz
81 15:57:28.583080 progress 13 % (0 MB)
82 15:57:28.583706 progress 26 % (0 MB)
83 15:57:28.584049 progress 39 % (0 MB)
84 15:57:28.585582 progress 52 % (0 MB)
85 15:57:28.587610 progress 65 % (0 MB)
86 15:57:28.589649 progress 78 % (0 MB)
87 15:57:28.591719 progress 91 % (0 MB)
88 15:57:28.593654 progress 100 % (0 MB)
89 15:57:28.599812 0 MB downloaded in 0.02 s (10.89 MB/s)
90 15:57:28.600164 end: 1.3.1 http-download (duration 00:00:00) [common]
92 15:57:28.600579 end: 1.3 download-retry (duration 00:00:00) [common]
93 15:57:28.600710 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 15:57:28.600845 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 15:57:28.600967 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 15:57:28.601072 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 15:57:28.601305 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4
98 15:57:28.601453 makedir: /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin
99 15:57:28.601566 makedir: /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/tests
100 15:57:28.601671 makedir: /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/results
101 15:57:28.601794 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-add-keys
102 15:57:28.601972 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-add-sources
103 15:57:28.602111 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-background-process-start
104 15:57:28.602248 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-background-process-stop
105 15:57:28.602380 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-common-functions
106 15:57:28.602510 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-echo-ipv4
107 15:57:28.602643 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-install-packages
108 15:57:28.602787 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-installed-packages
109 15:57:28.602919 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-os-build
110 15:57:28.603049 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-probe-channel
111 15:57:28.603179 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-probe-ip
112 15:57:28.603309 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-target-ip
113 15:57:28.603442 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-target-mac
114 15:57:28.603571 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-target-storage
115 15:57:28.603722 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-test-case
116 15:57:28.603853 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-test-event
117 15:57:28.603982 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-test-feedback
118 15:57:28.604111 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-test-raise
119 15:57:28.604241 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-test-reference
120 15:57:28.604374 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-test-runner
121 15:57:28.604521 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-test-set
122 15:57:28.604656 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-test-shell
123 15:57:28.604790 Updating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-install-packages (oe)
124 15:57:28.604954 Updating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/bin/lava-installed-packages (oe)
125 15:57:28.605093 Creating /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/environment
126 15:57:28.605198 LAVA metadata
127 15:57:28.605274 - LAVA_JOB_ID=11447434
128 15:57:28.605341 - LAVA_DISPATCHER_IP=192.168.201.1
129 15:57:28.605462 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 15:57:28.605530 skipped lava-vland-overlay
131 15:57:28.605610 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 15:57:28.605692 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 15:57:28.605757 skipped lava-multinode-overlay
134 15:57:28.605832 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 15:57:28.605912 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 15:57:28.605988 Loading test definitions
137 15:57:28.606085 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 15:57:28.606166 Using /lava-11447434 at stage 0
139 15:57:28.606505 uuid=11447434_1.4.2.3.1 testdef=None
140 15:57:28.606598 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 15:57:28.606686 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 15:57:28.607280 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 15:57:28.607509 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 15:57:28.608193 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 15:57:28.608430 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 15:57:28.609084 runner path: /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/0/tests/0_dmesg test_uuid 11447434_1.4.2.3.1
149 15:57:28.609249 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 15:57:28.609484 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 15:57:28.609558 Using /lava-11447434 at stage 1
153 15:57:28.609889 uuid=11447434_1.4.2.3.5 testdef=None
154 15:57:28.609980 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 15:57:28.610065 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 15:57:28.610568 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 15:57:28.610804 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 15:57:28.611483 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 15:57:28.611729 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 15:57:28.612387 runner path: /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/1/tests/1_bootrr test_uuid 11447434_1.4.2.3.5
163 15:57:28.612547 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 15:57:28.612760 Creating lava-test-runner.conf files
166 15:57:28.612824 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/0 for stage 0
167 15:57:28.612920 - 0_dmesg
168 15:57:28.613006 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11447434/lava-overlay-3m00g3k4/lava-11447434/1 for stage 1
169 15:57:28.613102 - 1_bootrr
170 15:57:28.613200 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 15:57:28.613289 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 15:57:28.622176 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 15:57:28.622341 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 15:57:28.622442 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 15:57:28.622533 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 15:57:28.622622 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 15:57:28.910641 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 15:57:28.911031 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 15:57:28.911157 extracting modules file /var/lib/lava/dispatcher/tmp/11447434/tftp-deploy-mri5yeev/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11447434/extract-overlay-ramdisk-xnrodtpt/ramdisk
180 15:57:28.925388 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 15:57:28.925560 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 15:57:28.925667 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11447434/compress-overlay-1pvluuoi/overlay-1.4.2.4.tar.gz to ramdisk
183 15:57:28.925743 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11447434/compress-overlay-1pvluuoi/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11447434/extract-overlay-ramdisk-xnrodtpt/ramdisk
184 15:57:28.935221 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 15:57:28.935375 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 15:57:28.935475 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 15:57:28.935566 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 15:57:28.935665 Building ramdisk /var/lib/lava/dispatcher/tmp/11447434/extract-overlay-ramdisk-xnrodtpt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11447434/extract-overlay-ramdisk-xnrodtpt/ramdisk
189 15:57:29.084923 >> 49788 blocks
190 15:57:29.990907 rename /var/lib/lava/dispatcher/tmp/11447434/extract-overlay-ramdisk-xnrodtpt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11447434/tftp-deploy-mri5yeev/ramdisk/ramdisk.cpio.gz
191 15:57:29.991452 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 15:57:29.991644 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 15:57:29.991797 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 15:57:29.991938 No mkimage arch provided, not using FIT.
195 15:57:29.992078 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 15:57:29.992196 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 15:57:29.992360 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 15:57:29.992491 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 15:57:29.992614 No LXC device requested
200 15:57:29.992727 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 15:57:29.992857 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 15:57:29.992969 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 15:57:29.993084 Checking files for TFTP limit of 4294967296 bytes.
204 15:57:29.993657 end: 1 tftp-deploy (duration 00:00:02) [common]
205 15:57:29.993802 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 15:57:29.993934 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 15:57:29.994107 substitutions:
208 15:57:29.994205 - {DTB}: None
209 15:57:29.994296 - {INITRD}: 11447434/tftp-deploy-mri5yeev/ramdisk/ramdisk.cpio.gz
210 15:57:29.994398 - {KERNEL}: 11447434/tftp-deploy-mri5yeev/kernel/bzImage
211 15:57:29.994483 - {LAVA_MAC}: None
212 15:57:29.994568 - {PRESEED_CONFIG}: None
213 15:57:29.994660 - {PRESEED_LOCAL}: None
214 15:57:29.994743 - {RAMDISK}: 11447434/tftp-deploy-mri5yeev/ramdisk/ramdisk.cpio.gz
215 15:57:29.994831 - {ROOT_PART}: None
216 15:57:29.994919 - {ROOT}: None
217 15:57:29.995000 - {SERVER_IP}: 192.168.201.1
218 15:57:29.995090 - {TEE}: None
219 15:57:29.995180 Parsed boot commands:
220 15:57:29.995262 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 15:57:29.995516 Parsed boot commands: tftpboot 192.168.201.1 11447434/tftp-deploy-mri5yeev/kernel/bzImage 11447434/tftp-deploy-mri5yeev/kernel/cmdline 11447434/tftp-deploy-mri5yeev/ramdisk/ramdisk.cpio.gz
222 15:57:29.995656 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 15:57:29.995774 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 15:57:29.995918 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 15:57:29.996039 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 15:57:29.996154 Not connected, no need to disconnect.
227 15:57:29.996262 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 15:57:29.996388 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 15:57:29.996490 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
230 15:57:30.001455 Setting prompt string to ['lava-test: # ']
231 15:57:30.001948 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 15:57:30.002108 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 15:57:30.002256 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 15:57:30.002392 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 15:57:30.002700 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
236 15:57:35.136185 >> Command sent successfully.
237 15:57:35.139249 Returned 0 in 5 seconds
238 15:57:35.239672 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 15:57:35.240038 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 15:57:35.240142 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 15:57:35.240233 Setting prompt string to 'Starting depthcharge on Helios...'
243 15:57:35.240302 Changing prompt to 'Starting depthcharge on Helios...'
244 15:57:35.240373 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 15:57:35.240749 [Enter `^Ec?' for help]
246 15:57:35.858807
247 15:57:35.858991
248 15:57:35.870080 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 15:57:35.873213 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 15:57:35.877201 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 15:57:35.883700 CPU: AES supported, TXT NOT supported, VT supported
252 15:57:35.886849 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 15:57:35.893983 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 15:57:35.900439 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 15:57:35.903557 VBOOT: Loading verstage.
256 15:57:35.907258 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 15:57:35.913939 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 15:57:35.916888 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 15:57:35.920444 CBFS @ c08000 size 3f8000
260 15:57:35.927003 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 15:57:35.930127 CBFS: Locating 'fallback/verstage'
262 15:57:35.933381 CBFS: Found @ offset 10fb80 size 1072c
263 15:57:35.933464
264 15:57:35.933529
265 15:57:35.946725 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 15:57:35.960418 Probing TPM: . done!
267 15:57:35.963434 TPM ready after 0 ms
268 15:57:35.966804 Connected to device vid:did:rid of 1ae0:0028:00
269 15:57:35.976924 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
270 15:57:35.980546 Initialized TPM device CR50 revision 0
271 15:57:36.025201 tlcl_send_startup: Startup return code is 0
272 15:57:36.025329 TPM: setup succeeded
273 15:57:36.037721 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 15:57:36.041679 Chrome EC: UHEPI supported
275 15:57:36.044954 Phase 1
276 15:57:36.048094 FMAP: area GBB found @ c05000 (12288 bytes)
277 15:57:36.055048 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 15:57:36.055165 Phase 2
279 15:57:36.058337 Phase 3
280 15:57:36.061544 FMAP: area GBB found @ c05000 (12288 bytes)
281 15:57:36.068046 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 15:57:36.074715 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
283 15:57:36.078042 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
284 15:57:36.084630 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 15:57:36.100542 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
286 15:57:36.103466 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
287 15:57:36.110455 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 15:57:36.114465 Phase 4
289 15:57:36.117978 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
290 15:57:36.124599 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 15:57:36.303929 VB2:vb2_rsa_verify_digest() Digest check failed!
292 15:57:36.310529 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 15:57:36.310641 Saving nvdata
294 15:57:36.314533 Reboot requested (10020007)
295 15:57:36.317632 board_reset() called!
296 15:57:36.317714 full_reset() called!
297 15:57:40.825970
298 15:57:40.826179
299 15:57:40.836354 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 15:57:40.839481 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 15:57:40.846404 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 15:57:40.849635 CPU: AES supported, TXT NOT supported, VT supported
303 15:57:40.855863 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 15:57:40.859549 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 15:57:40.865757 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 15:57:40.868984 VBOOT: Loading verstage.
307 15:57:40.872398 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 15:57:40.879580 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 15:57:40.885414 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 15:57:40.885506 CBFS @ c08000 size 3f8000
311 15:57:40.892055 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 15:57:40.895431 CBFS: Locating 'fallback/verstage'
313 15:57:40.898695 CBFS: Found @ offset 10fb80 size 1072c
314 15:57:40.903332
315 15:57:40.903430
316 15:57:40.912938 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 15:57:40.927509 Probing TPM: . done!
318 15:57:40.930793 TPM ready after 0 ms
319 15:57:40.933699 Connected to device vid:did:rid of 1ae0:0028:00
320 15:57:40.943910 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 15:57:40.947709 Initialized TPM device CR50 revision 0
322 15:57:40.991948 tlcl_send_startup: Startup return code is 0
323 15:57:40.992084 TPM: setup succeeded
324 15:57:41.004732 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 15:57:41.008585 Chrome EC: UHEPI supported
326 15:57:41.011713 Phase 1
327 15:57:41.014900 FMAP: area GBB found @ c05000 (12288 bytes)
328 15:57:41.022109 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 15:57:41.028713 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 15:57:41.032051 Recovery requested (1009000e)
331 15:57:41.037333 Saving nvdata
332 15:57:41.043796 tlcl_extend: response is 0
333 15:57:41.052464 tlcl_extend: response is 0
334 15:57:41.059820 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 15:57:41.062979 CBFS @ c08000 size 3f8000
336 15:57:41.069853 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 15:57:41.073070 CBFS: Locating 'fallback/romstage'
338 15:57:41.076322 CBFS: Found @ offset 80 size 145fc
339 15:57:41.079460 Accumulated console time in verstage 98 ms
340 15:57:41.079563
341 15:57:41.079667
342 15:57:41.092688 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 15:57:41.099329 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 15:57:41.102689 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 15:57:41.105917 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 15:57:41.112511 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
347 15:57:41.115896 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 15:57:41.118815 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
349 15:57:41.122672 TCO_STS: 0000 0000
350 15:57:41.125849 GEN_PMCON: e0015238 00000200
351 15:57:41.129067 GBLRST_CAUSE: 00000000 00000000
352 15:57:41.129154 prev_sleep_state 5
353 15:57:41.132443 Boot Count incremented to 63495
354 15:57:41.139128 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 15:57:41.142562 CBFS @ c08000 size 3f8000
356 15:57:41.149195 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 15:57:41.149288 CBFS: Locating 'fspm.bin'
358 15:57:41.155532 CBFS: Found @ offset 5ffc0 size 71000
359 15:57:41.158608 Chrome EC: UHEPI supported
360 15:57:41.165663 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 15:57:41.168852 Probing TPM: done!
362 15:57:41.175498 Connected to device vid:did:rid of 1ae0:0028:00
363 15:57:41.185868 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
364 15:57:41.191706 Initialized TPM device CR50 revision 0
365 15:57:41.200671 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 15:57:41.207028 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 15:57:41.210327 MRC cache found, size 1948
368 15:57:41.213748 bootmode is set to: 2
369 15:57:41.217078 PRMRR disabled by config.
370 15:57:41.217164 SPD INDEX = 1
371 15:57:41.223495 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 15:57:41.227112 CBFS @ c08000 size 3f8000
373 15:57:41.233376 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 15:57:41.233520 CBFS: Locating 'spd.bin'
375 15:57:41.236828 CBFS: Found @ offset 5fb80 size 400
376 15:57:41.240049 SPD: module type is LPDDR3
377 15:57:41.243295 SPD: module part is
378 15:57:41.250494 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 15:57:41.253660 SPD: device width 4 bits, bus width 8 bits
380 15:57:41.256774 SPD: module size is 4096 MB (per channel)
381 15:57:41.259888 memory slot: 0 configuration done.
382 15:57:41.263684 memory slot: 2 configuration done.
383 15:57:41.314658 CBMEM:
384 15:57:41.317873 IMD: root @ 99fff000 254 entries.
385 15:57:41.321140 IMD: root @ 99ffec00 62 entries.
386 15:57:41.324406 External stage cache:
387 15:57:41.327883 IMD: root @ 9abff000 254 entries.
388 15:57:41.330931 IMD: root @ 9abfec00 62 entries.
389 15:57:41.334141 Chrome EC: clear events_b mask to 0x0000000020004000
390 15:57:41.350028 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 15:57:41.363637 tlcl_write: response is 0
392 15:57:41.372928 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 15:57:41.379656 MRC: TPM MRC hash updated successfully.
394 15:57:41.379758 2 DIMMs found
395 15:57:41.382906 SMM Memory Map
396 15:57:41.386124 SMRAM : 0x9a000000 0x1000000
397 15:57:41.389638 Subregion 0: 0x9a000000 0xa00000
398 15:57:41.392935 Subregion 1: 0x9aa00000 0x200000
399 15:57:41.395967 Subregion 2: 0x9ac00000 0x400000
400 15:57:41.399577 top_of_ram = 0x9a000000
401 15:57:41.402846 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 15:57:41.409435 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 15:57:41.412731 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 15:57:41.419401 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 15:57:41.422513 CBFS @ c08000 size 3f8000
406 15:57:41.425771 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 15:57:41.429725 CBFS: Locating 'fallback/postcar'
408 15:57:41.432498 CBFS: Found @ offset 107000 size 4b44
409 15:57:41.438995 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 15:57:41.451919 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 15:57:41.454986 Processing 180 relocs. Offset value of 0x97c0c000
412 15:57:41.463537 Accumulated console time in romstage 285 ms
413 15:57:41.463658
414 15:57:41.463726
415 15:57:41.473900 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 15:57:41.479916 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 15:57:41.483477 CBFS @ c08000 size 3f8000
418 15:57:41.486568 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 15:57:41.493539 CBFS: Locating 'fallback/ramstage'
420 15:57:41.496788 CBFS: Found @ offset 43380 size 1b9e8
421 15:57:41.503081 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 15:57:41.535271 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 15:57:41.538449 Processing 3976 relocs. Offset value of 0x98db0000
424 15:57:41.545014 Accumulated console time in postcar 52 ms
425 15:57:41.545098
426 15:57:41.545163
427 15:57:41.555494 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 15:57:41.561634 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 15:57:41.565221 WARNING: RO_VPD is uninitialized or empty.
430 15:57:41.568475 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 15:57:41.574764 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 15:57:41.574848 Normal boot.
433 15:57:41.581743 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 15:57:41.585171 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 15:57:41.588218 CBFS @ c08000 size 3f8000
436 15:57:41.594690 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 15:57:41.598461 CBFS: Locating 'cpu_microcode_blob.bin'
438 15:57:41.601693 CBFS: Found @ offset 14700 size 2ec00
439 15:57:41.605023 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 15:57:41.608183 Skip microcode update
441 15:57:41.614381 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 15:57:41.614464 CBFS @ c08000 size 3f8000
443 15:57:41.621554 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 15:57:41.624485 CBFS: Locating 'fsps.bin'
445 15:57:41.628046 CBFS: Found @ offset d1fc0 size 35000
446 15:57:41.653138 Detected 4 core, 8 thread CPU.
447 15:57:41.656419 Setting up SMI for CPU
448 15:57:41.660162 IED base = 0x9ac00000
449 15:57:41.660246 IED size = 0x00400000
450 15:57:41.663453 Will perform SMM setup.
451 15:57:41.669888 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 15:57:41.676555 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 15:57:41.680167 Processing 16 relocs. Offset value of 0x00030000
454 15:57:41.683567 Attempting to start 7 APs
455 15:57:41.686702 Waiting for 10ms after sending INIT.
456 15:57:41.703031 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
457 15:57:41.703133 done.
458 15:57:41.706668 AP: slot 2 apic_id 5.
459 15:57:41.709907 AP: slot 5 apic_id 4.
460 15:57:41.709991 AP: slot 7 apic_id 6.
461 15:57:41.713129 AP: slot 6 apic_id 7.
462 15:57:41.716566 AP: slot 1 apic_id 3.
463 15:57:41.716650 AP: slot 4 apic_id 2.
464 15:57:41.722736 Waiting for 2nd SIPI to complete...done.
465 15:57:41.729765 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 15:57:41.732862 Processing 13 relocs. Offset value of 0x00038000
467 15:57:41.739736 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 15:57:41.746040 Installing SMM handler to 0x9a000000
469 15:57:41.752532 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 15:57:41.759014 Processing 658 relocs. Offset value of 0x9a010000
471 15:57:41.765630 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 15:57:41.769024 Processing 13 relocs. Offset value of 0x9a008000
473 15:57:41.775559 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 15:57:41.782074 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 15:57:41.788811 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 15:57:41.792343 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 15:57:41.798647 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 15:57:41.805625 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 15:57:41.812127 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 15:57:41.815321 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 15:57:41.819379 Clearing SMI status registers
482 15:57:41.822493 SMI_STS: PM1
483 15:57:41.822573 PM1_STS: PWRBTN
484 15:57:41.825673 TCO_STS: SECOND_TO
485 15:57:41.829023 New SMBASE 0x9a000000
486 15:57:41.832279 In relocation handler: CPU 0
487 15:57:41.836075 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 15:57:41.839252 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 15:57:41.842506 Relocation complete.
490 15:57:41.845596 New SMBASE 0x99fff400
491 15:57:41.845669 In relocation handler: CPU 3
492 15:57:41.852365 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
493 15:57:41.855344 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 15:57:41.859078 Relocation complete.
495 15:57:41.862246 New SMBASE 0x99fff000
496 15:57:41.862328 In relocation handler: CPU 4
497 15:57:41.868734 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
498 15:57:41.872147 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 15:57:41.875517 Relocation complete.
500 15:57:41.875660 New SMBASE 0x99fffc00
501 15:57:41.878868 In relocation handler: CPU 1
502 15:57:41.885572 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
503 15:57:41.888873 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 15:57:41.892002 Relocation complete.
505 15:57:41.892084 New SMBASE 0x99ffe400
506 15:57:41.895931 In relocation handler: CPU 7
507 15:57:41.899173 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
508 15:57:41.905788 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 15:57:41.908718 Relocation complete.
510 15:57:41.908799 New SMBASE 0x99ffe800
511 15:57:41.912126 In relocation handler: CPU 6
512 15:57:41.915582 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
513 15:57:41.921887 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 15:57:41.925451 Relocation complete.
515 15:57:41.925567 New SMBASE 0x99fff800
516 15:57:41.929082 In relocation handler: CPU 2
517 15:57:41.932274 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
518 15:57:41.938618 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 15:57:41.938700 Relocation complete.
520 15:57:41.941756 New SMBASE 0x99ffec00
521 15:57:41.945649 In relocation handler: CPU 5
522 15:57:41.948923 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
523 15:57:41.955202 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 15:57:41.955311 Relocation complete.
525 15:57:41.958372 Initializing CPU #0
526 15:57:41.962163 CPU: vendor Intel device 806ec
527 15:57:41.965234 CPU: family 06, model 8e, stepping 0c
528 15:57:41.968772 Clearing out pending MCEs
529 15:57:41.972066 Setting up local APIC...
530 15:57:41.972152 apic_id: 0x00 done.
531 15:57:41.975362 Turbo is available but hidden
532 15:57:41.978690 Turbo is available and visible
533 15:57:41.982005 VMX status: enabled
534 15:57:41.985386 IA32_FEATURE_CONTROL status: locked
535 15:57:41.988483 Skip microcode update
536 15:57:41.988614 CPU #0 initialized
537 15:57:41.991613 Initializing CPU #3
538 15:57:41.991714 Initializing CPU #2
539 15:57:41.994844 Initializing CPU #5
540 15:57:41.998121 CPU: vendor Intel device 806ec
541 15:57:42.001819 CPU: family 06, model 8e, stepping 0c
542 15:57:42.005005 CPU: vendor Intel device 806ec
543 15:57:42.008389 CPU: family 06, model 8e, stepping 0c
544 15:57:42.011631 Clearing out pending MCEs
545 15:57:42.014694 CPU: vendor Intel device 806ec
546 15:57:42.018162 CPU: family 06, model 8e, stepping 0c
547 15:57:42.021348 Clearing out pending MCEs
548 15:57:42.025025 Initializing CPU #7
549 15:57:42.025214 Initializing CPU #6
550 15:57:42.027972 CPU: vendor Intel device 806ec
551 15:57:42.031583 CPU: family 06, model 8e, stepping 0c
552 15:57:42.035020 CPU: vendor Intel device 806ec
553 15:57:42.037970 CPU: family 06, model 8e, stepping 0c
554 15:57:42.041527 Clearing out pending MCEs
555 15:57:42.044729 Clearing out pending MCEs
556 15:57:42.047998 Setting up local APIC...
557 15:57:42.048156 Initializing CPU #4
558 15:57:42.051173 Initializing CPU #1
559 15:57:42.054433 CPU: vendor Intel device 806ec
560 15:57:42.057722 CPU: family 06, model 8e, stepping 0c
561 15:57:42.061088 CPU: vendor Intel device 806ec
562 15:57:42.064824 CPU: family 06, model 8e, stepping 0c
563 15:57:42.067456 Clearing out pending MCEs
564 15:57:42.071273 Clearing out pending MCEs
565 15:57:42.071364 Setting up local APIC...
566 15:57:42.074332 Setting up local APIC...
567 15:57:42.077349 Clearing out pending MCEs
568 15:57:42.081147 Setting up local APIC...
569 15:57:42.084543 Setting up local APIC...
570 15:57:42.084629 Setting up local APIC...
571 15:57:42.087696 Setting up local APIC...
572 15:57:42.091112 apic_id: 0x03 done.
573 15:57:42.091196 apic_id: 0x02 done.
574 15:57:42.094329 VMX status: enabled
575 15:57:42.097611 VMX status: enabled
576 15:57:42.100815 IA32_FEATURE_CONTROL status: locked
577 15:57:42.104223 IA32_FEATURE_CONTROL status: locked
578 15:57:42.104308 Skip microcode update
579 15:57:42.107567 Skip microcode update
580 15:57:42.110918 CPU #1 initialized
581 15:57:42.111009 CPU #4 initialized
582 15:57:42.114231 apic_id: 0x01 done.
583 15:57:42.117510 apic_id: 0x07 done.
584 15:57:42.117621 apic_id: 0x06 done.
585 15:57:42.120856 VMX status: enabled
586 15:57:42.123988 VMX status: enabled
587 15:57:42.127558 IA32_FEATURE_CONTROL status: locked
588 15:57:42.130818 IA32_FEATURE_CONTROL status: locked
589 15:57:42.130902 Skip microcode update
590 15:57:42.134097 Skip microcode update
591 15:57:42.137285 CPU #6 initialized
592 15:57:42.137369 CPU #7 initialized
593 15:57:42.140817 VMX status: enabled
594 15:57:42.140902 apic_id: 0x04 done.
595 15:57:42.143722 apic_id: 0x05 done.
596 15:57:42.147608 VMX status: enabled
597 15:57:42.147719 VMX status: enabled
598 15:57:42.150730 IA32_FEATURE_CONTROL status: locked
599 15:57:42.157140 IA32_FEATURE_CONTROL status: locked
600 15:57:42.157284 Skip microcode update
601 15:57:42.160615 Skip microcode update
602 15:57:42.160753 CPU #5 initialized
603 15:57:42.163859 CPU #2 initialized
604 15:57:42.166831 IA32_FEATURE_CONTROL status: locked
605 15:57:42.170602 Skip microcode update
606 15:57:42.170738 CPU #3 initialized
607 15:57:42.177228 bsp_do_flight_plan done after 452 msecs.
608 15:57:42.180339 CPU: frequency set to 4200 MHz
609 15:57:42.180472 Enabling SMIs.
610 15:57:42.183426 Locking SMM.
611 15:57:42.197033 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 15:57:42.200293 CBFS @ c08000 size 3f8000
613 15:57:42.206874 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 15:57:42.206958 CBFS: Locating 'vbt.bin'
615 15:57:42.210118 CBFS: Found @ offset 5f5c0 size 499
616 15:57:42.217105 Found a VBT of 4608 bytes after decompression
617 15:57:42.474354 Display FSP Version Info HOB
618 15:57:42.474505 Reference Code - CPU = 9.0.1e.30
619 15:57:42.474577 uCode Version = 0.0.0.ca
620 15:57:42.474637 TXT ACM version = ff.ff.ff.ffff
621 15:57:42.474697 Display FSP Version Info HOB
622 15:57:42.474755 Reference Code - ME = 9.0.1e.30
623 15:57:42.474811 MEBx version = 0.0.0.0
624 15:57:42.474866 ME Firmware Version = Consumer SKU
625 15:57:42.474921 Display FSP Version Info HOB
626 15:57:42.474976 Reference Code - CML PCH = 9.0.1e.30
627 15:57:42.475031 PCH-CRID Status = Disabled
628 15:57:42.475085 PCH-CRID Original Value = ff.ff.ff.ffff
629 15:57:42.475162 PCH-CRID New Value = ff.ff.ff.ffff
630 15:57:42.475230 OPROM - RST - RAID = ff.ff.ff.ffff
631 15:57:42.475284 ChipsetInit Base Version = ff.ff.ff.ffff
632 15:57:42.475352 ChipsetInit Oem Version = ff.ff.ff.ffff
633 15:57:42.475406 Display FSP Version Info HOB
634 15:57:42.475461 Reference Code - SA - System Agent = 9.0.1e.30
635 15:57:42.475515 Reference Code - MRC = 0.7.1.6c
636 15:57:42.475569 SA - PCIe Version = 9.0.1e.30
637 15:57:42.475655 SA-CRID Status = Disabled
638 15:57:42.475710 SA-CRID Original Value = 0.0.0.c
639 15:57:42.475962 SA-CRID New Value = 0.0.0.c
640 15:57:42.479206 OPROM - VBIOS = ff.ff.ff.ffff
641 15:57:42.482486 RTC Init
642 15:57:42.485743 Set power on after power failure.
643 15:57:42.485825 Disabling Deep S3
644 15:57:42.489097 Disabling Deep S3
645 15:57:42.489179 Disabling Deep S4
646 15:57:42.492441 Disabling Deep S4
647 15:57:42.492525 Disabling Deep S5
648 15:57:42.495570 Disabling Deep S5
649 15:57:42.502417 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
650 15:57:42.502509 Enumerating buses...
651 15:57:42.508806 Show all devs... Before device enumeration.
652 15:57:42.512112 Root Device: enabled 1
653 15:57:42.512211 CPU_CLUSTER: 0: enabled 1
654 15:57:42.515101 DOMAIN: 0000: enabled 1
655 15:57:42.518675 APIC: 00: enabled 1
656 15:57:42.518774 PCI: 00:00.0: enabled 1
657 15:57:42.522069 PCI: 00:02.0: enabled 1
658 15:57:42.525191 PCI: 00:04.0: enabled 0
659 15:57:42.528575 PCI: 00:05.0: enabled 0
660 15:57:42.528659 PCI: 00:12.0: enabled 1
661 15:57:42.531860 PCI: 00:12.5: enabled 0
662 15:57:42.535012 PCI: 00:12.6: enabled 0
663 15:57:42.538470 PCI: 00:14.0: enabled 1
664 15:57:42.538552 PCI: 00:14.1: enabled 0
665 15:57:42.541591 PCI: 00:14.3: enabled 1
666 15:57:42.545379 PCI: 00:14.5: enabled 0
667 15:57:42.545461 PCI: 00:15.0: enabled 1
668 15:57:42.548646 PCI: 00:15.1: enabled 1
669 15:57:42.551922 PCI: 00:15.2: enabled 0
670 15:57:42.555094 PCI: 00:15.3: enabled 0
671 15:57:42.555189 PCI: 00:16.0: enabled 1
672 15:57:42.558165 PCI: 00:16.1: enabled 0
673 15:57:42.561602 PCI: 00:16.2: enabled 0
674 15:57:42.564778 PCI: 00:16.3: enabled 0
675 15:57:42.564867 PCI: 00:16.4: enabled 0
676 15:57:42.568590 PCI: 00:16.5: enabled 0
677 15:57:42.571866 PCI: 00:17.0: enabled 1
678 15:57:42.588714 PCI: 00:19.0: enabled 1
679 15:57:42.588869 PCI: 00:19.1: enabled 0
680 15:57:42.588988 PCI: 00:19.2: enabled 0
681 15:57:42.589097 PCI: 00:1a.0: enabled 0
682 15:57:42.589212 PCI: 00:1c.0: enabled 0
683 15:57:42.589366 PCI: 00:1c.1: enabled 0
684 15:57:42.589462 PCI: 00:1c.2: enabled 0
685 15:57:42.591409 PCI: 00:1c.3: enabled 0
686 15:57:42.591515 PCI: 00:1c.4: enabled 0
687 15:57:42.594650 PCI: 00:1c.5: enabled 0
688 15:57:42.597968 PCI: 00:1c.6: enabled 0
689 15:57:42.601271 PCI: 00:1c.7: enabled 0
690 15:57:42.601356 PCI: 00:1d.0: enabled 1
691 15:57:42.604273 PCI: 00:1d.1: enabled 0
692 15:57:42.608021 PCI: 00:1d.2: enabled 0
693 15:57:42.611233 PCI: 00:1d.3: enabled 0
694 15:57:42.611371 PCI: 00:1d.4: enabled 0
695 15:57:42.614486 PCI: 00:1d.5: enabled 1
696 15:57:42.617716 PCI: 00:1e.0: enabled 1
697 15:57:42.621123 PCI: 00:1e.1: enabled 0
698 15:57:42.621204 PCI: 00:1e.2: enabled 1
699 15:57:42.624349 PCI: 00:1e.3: enabled 1
700 15:57:42.627583 PCI: 00:1f.0: enabled 1
701 15:57:42.627705 PCI: 00:1f.1: enabled 1
702 15:57:42.631413 PCI: 00:1f.2: enabled 1
703 15:57:42.634731 PCI: 00:1f.3: enabled 1
704 15:57:42.637808 PCI: 00:1f.4: enabled 1
705 15:57:42.637907 PCI: 00:1f.5: enabled 1
706 15:57:42.640932 PCI: 00:1f.6: enabled 0
707 15:57:42.644253 USB0 port 0: enabled 1
708 15:57:42.644332 I2C: 00:15: enabled 1
709 15:57:42.647787 I2C: 00:5d: enabled 1
710 15:57:42.651282 GENERIC: 0.0: enabled 1
711 15:57:42.654286 I2C: 00:1a: enabled 1
712 15:57:42.654388 I2C: 00:38: enabled 1
713 15:57:42.657731 I2C: 00:39: enabled 1
714 15:57:42.661031 I2C: 00:3a: enabled 1
715 15:57:42.661111 I2C: 00:3b: enabled 1
716 15:57:42.664387 PCI: 00:00.0: enabled 1
717 15:57:42.667453 SPI: 00: enabled 1
718 15:57:42.667537 SPI: 01: enabled 1
719 15:57:42.671048 PNP: 0c09.0: enabled 1
720 15:57:42.674359 USB2 port 0: enabled 1
721 15:57:42.674448 USB2 port 1: enabled 1
722 15:57:42.677633 USB2 port 2: enabled 0
723 15:57:42.680947 USB2 port 3: enabled 0
724 15:57:42.681032 USB2 port 5: enabled 0
725 15:57:42.684086 USB2 port 6: enabled 1
726 15:57:42.687344 USB2 port 9: enabled 1
727 15:57:42.690657 USB3 port 0: enabled 1
728 15:57:42.690735 USB3 port 1: enabled 1
729 15:57:42.693905 USB3 port 2: enabled 1
730 15:57:42.697215 USB3 port 3: enabled 1
731 15:57:42.697320 USB3 port 4: enabled 0
732 15:57:42.700543 APIC: 03: enabled 1
733 15:57:42.703795 APIC: 05: enabled 1
734 15:57:42.703908 APIC: 01: enabled 1
735 15:57:42.707589 APIC: 02: enabled 1
736 15:57:42.707686 APIC: 04: enabled 1
737 15:57:42.710668 APIC: 07: enabled 1
738 15:57:42.713667 APIC: 06: enabled 1
739 15:57:42.713779 Compare with tree...
740 15:57:42.717455 Root Device: enabled 1
741 15:57:42.720706 CPU_CLUSTER: 0: enabled 1
742 15:57:42.724022 APIC: 00: enabled 1
743 15:57:42.724107 APIC: 03: enabled 1
744 15:57:42.727253 APIC: 05: enabled 1
745 15:57:42.730496 APIC: 01: enabled 1
746 15:57:42.730607 APIC: 02: enabled 1
747 15:57:42.733833 APIC: 04: enabled 1
748 15:57:42.737063 APIC: 07: enabled 1
749 15:57:42.737230 APIC: 06: enabled 1
750 15:57:42.740519 DOMAIN: 0000: enabled 1
751 15:57:42.743603 PCI: 00:00.0: enabled 1
752 15:57:42.746938 PCI: 00:02.0: enabled 1
753 15:57:42.747052 PCI: 00:04.0: enabled 0
754 15:57:42.750210 PCI: 00:05.0: enabled 0
755 15:57:42.754122 PCI: 00:12.0: enabled 1
756 15:57:42.757197 PCI: 00:12.5: enabled 0
757 15:57:42.760237 PCI: 00:12.6: enabled 0
758 15:57:42.760351 PCI: 00:14.0: enabled 1
759 15:57:42.763794 USB0 port 0: enabled 1
760 15:57:42.766895 USB2 port 0: enabled 1
761 15:57:42.770566 USB2 port 1: enabled 1
762 15:57:42.773294 USB2 port 2: enabled 0
763 15:57:42.773384 USB2 port 3: enabled 0
764 15:57:42.777105 USB2 port 5: enabled 0
765 15:57:42.780181 USB2 port 6: enabled 1
766 15:57:42.783288 USB2 port 9: enabled 1
767 15:57:42.786742 USB3 port 0: enabled 1
768 15:57:42.790003 USB3 port 1: enabled 1
769 15:57:42.790113 USB3 port 2: enabled 1
770 15:57:42.793225 USB3 port 3: enabled 1
771 15:57:42.796566 USB3 port 4: enabled 0
772 15:57:42.799910 PCI: 00:14.1: enabled 0
773 15:57:42.803274 PCI: 00:14.3: enabled 1
774 15:57:42.803358 PCI: 00:14.5: enabled 0
775 15:57:42.806538 PCI: 00:15.0: enabled 1
776 15:57:42.809845 I2C: 00:15: enabled 1
777 15:57:42.813130 PCI: 00:15.1: enabled 1
778 15:57:42.816445 I2C: 00:5d: enabled 1
779 15:57:42.816531 GENERIC: 0.0: enabled 1
780 15:57:42.820187 PCI: 00:15.2: enabled 0
781 15:57:42.823158 PCI: 00:15.3: enabled 0
782 15:57:42.826577 PCI: 00:16.0: enabled 1
783 15:57:42.829842 PCI: 00:16.1: enabled 0
784 15:57:42.829954 PCI: 00:16.2: enabled 0
785 15:57:42.833174 PCI: 00:16.3: enabled 0
786 15:57:42.836383 PCI: 00:16.4: enabled 0
787 15:57:42.839561 PCI: 00:16.5: enabled 0
788 15:57:42.842928 PCI: 00:17.0: enabled 1
789 15:57:42.843039 PCI: 00:19.0: enabled 1
790 15:57:42.846258 I2C: 00:1a: enabled 1
791 15:57:42.849602 I2C: 00:38: enabled 1
792 15:57:42.852944 I2C: 00:39: enabled 1
793 15:57:42.853028 I2C: 00:3a: enabled 1
794 15:57:42.856212 I2C: 00:3b: enabled 1
795 15:57:42.859501 PCI: 00:19.1: enabled 0
796 15:57:42.862791 PCI: 00:19.2: enabled 0
797 15:57:42.862866 PCI: 00:1a.0: enabled 0
798 15:57:42.866582 PCI: 00:1c.0: enabled 0
799 15:57:42.870019 PCI: 00:1c.1: enabled 0
800 15:57:42.873215 PCI: 00:1c.2: enabled 0
801 15:57:42.876566 PCI: 00:1c.3: enabled 0
802 15:57:42.876643 PCI: 00:1c.4: enabled 0
803 15:57:42.879503 PCI: 00:1c.5: enabled 0
804 15:57:42.883006 PCI: 00:1c.6: enabled 0
805 15:57:42.886125 PCI: 00:1c.7: enabled 0
806 15:57:42.889355 PCI: 00:1d.0: enabled 1
807 15:57:42.889461 PCI: 00:1d.1: enabled 0
808 15:57:42.892562 PCI: 00:1d.2: enabled 0
809 15:57:42.896042 PCI: 00:1d.3: enabled 0
810 15:57:42.899357 PCI: 00:1d.4: enabled 0
811 15:57:42.902570 PCI: 00:1d.5: enabled 1
812 15:57:42.902680 PCI: 00:00.0: enabled 1
813 15:57:42.905826 PCI: 00:1e.0: enabled 1
814 15:57:42.909102 PCI: 00:1e.1: enabled 0
815 15:57:42.912552 PCI: 00:1e.2: enabled 1
816 15:57:42.912634 SPI: 00: enabled 1
817 15:57:42.915849 PCI: 00:1e.3: enabled 1
818 15:57:42.919056 SPI: 01: enabled 1
819 15:57:42.922334 PCI: 00:1f.0: enabled 1
820 15:57:42.926214 PNP: 0c09.0: enabled 1
821 15:57:42.926326 PCI: 00:1f.1: enabled 1
822 15:57:42.929074 PCI: 00:1f.2: enabled 1
823 15:57:42.932519 PCI: 00:1f.3: enabled 1
824 15:57:42.935789 PCI: 00:1f.4: enabled 1
825 15:57:42.939045 PCI: 00:1f.5: enabled 1
826 15:57:42.939125 PCI: 00:1f.6: enabled 0
827 15:57:42.942398 Root Device scanning...
828 15:57:42.945493 scan_static_bus for Root Device
829 15:57:42.948847 CPU_CLUSTER: 0 enabled
830 15:57:42.948952 DOMAIN: 0000 enabled
831 15:57:42.952745 DOMAIN: 0000 scanning...
832 15:57:42.955463 PCI: pci_scan_bus for bus 00
833 15:57:42.959341 PCI: 00:00.0 [8086/0000] ops
834 15:57:42.962541 PCI: 00:00.0 [8086/9b61] enabled
835 15:57:42.965817 PCI: 00:02.0 [8086/0000] bus ops
836 15:57:42.969029 PCI: 00:02.0 [8086/9b41] enabled
837 15:57:42.972095 PCI: 00:04.0 [8086/1903] disabled
838 15:57:42.975489 PCI: 00:08.0 [8086/1911] enabled
839 15:57:42.978765 PCI: 00:12.0 [8086/02f9] enabled
840 15:57:42.982774 PCI: 00:14.0 [8086/0000] bus ops
841 15:57:42.985913 PCI: 00:14.0 [8086/02ed] enabled
842 15:57:42.989076 PCI: 00:14.2 [8086/02ef] enabled
843 15:57:42.992300 PCI: 00:14.3 [8086/02f0] enabled
844 15:57:42.995692 PCI: 00:15.0 [8086/0000] bus ops
845 15:57:42.998795 PCI: 00:15.0 [8086/02e8] enabled
846 15:57:43.002555 PCI: 00:15.1 [8086/0000] bus ops
847 15:57:43.005697 PCI: 00:15.1 [8086/02e9] enabled
848 15:57:43.008608 PCI: 00:16.0 [8086/0000] ops
849 15:57:43.012311 PCI: 00:16.0 [8086/02e0] enabled
850 15:57:43.015589 PCI: 00:17.0 [8086/0000] ops
851 15:57:43.018720 PCI: 00:17.0 [8086/02d3] enabled
852 15:57:43.021869 PCI: 00:19.0 [8086/0000] bus ops
853 15:57:43.025219 PCI: 00:19.0 [8086/02c5] enabled
854 15:57:43.028583 PCI: 00:1d.0 [8086/0000] bus ops
855 15:57:43.032407 PCI: 00:1d.0 [8086/02b0] enabled
856 15:57:43.038979 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 15:57:43.042242 PCI: 00:1e.0 [8086/0000] ops
858 15:57:43.045601 PCI: 00:1e.0 [8086/02a8] enabled
859 15:57:43.048963 PCI: 00:1e.2 [8086/0000] bus ops
860 15:57:43.049047 PCI: 00:1e.2 [8086/02aa] enabled
861 15:57:43.052308 PCI: 00:1e.3 [8086/0000] bus ops
862 15:57:43.055652 PCI: 00:1e.3 [8086/02ab] enabled
863 15:57:43.059173 PCI: 00:1f.0 [8086/0000] bus ops
864 15:57:43.062157 PCI: 00:1f.0 [8086/0284] enabled
865 15:57:43.068705 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 15:57:43.075015 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 15:57:43.078887 PCI: 00:1f.3 [8086/0000] bus ops
868 15:57:43.082233 PCI: 00:1f.3 [8086/02c8] enabled
869 15:57:43.085486 PCI: 00:1f.4 [8086/0000] bus ops
870 15:57:43.088885 PCI: 00:1f.4 [8086/02a3] enabled
871 15:57:43.092100 PCI: 00:1f.5 [8086/0000] bus ops
872 15:57:43.095403 PCI: 00:1f.5 [8086/02a4] enabled
873 15:57:43.098781 PCI: Leftover static devices:
874 15:57:43.098879 PCI: 00:05.0
875 15:57:43.101646 PCI: 00:12.5
876 15:57:43.101728 PCI: 00:12.6
877 15:57:43.101793 PCI: 00:14.1
878 15:57:43.105256 PCI: 00:14.5
879 15:57:43.105339 PCI: 00:15.2
880 15:57:43.108334 PCI: 00:15.3
881 15:57:43.108417 PCI: 00:16.1
882 15:57:43.111477 PCI: 00:16.2
883 15:57:43.111585 PCI: 00:16.3
884 15:57:43.111693 PCI: 00:16.4
885 15:57:43.114932 PCI: 00:16.5
886 15:57:43.115080 PCI: 00:19.1
887 15:57:43.118511 PCI: 00:19.2
888 15:57:43.118642 PCI: 00:1a.0
889 15:57:43.118707 PCI: 00:1c.0
890 15:57:43.121559 PCI: 00:1c.1
891 15:57:43.121680 PCI: 00:1c.2
892 15:57:43.125491 PCI: 00:1c.3
893 15:57:43.125574 PCI: 00:1c.4
894 15:57:43.125638 PCI: 00:1c.5
895 15:57:43.128434 PCI: 00:1c.6
896 15:57:43.128517 PCI: 00:1c.7
897 15:57:43.131801 PCI: 00:1d.1
898 15:57:43.131884 PCI: 00:1d.2
899 15:57:43.134999 PCI: 00:1d.3
900 15:57:43.135081 PCI: 00:1d.4
901 15:57:43.135145 PCI: 00:1d.5
902 15:57:43.138259 PCI: 00:1e.1
903 15:57:43.138342 PCI: 00:1f.1
904 15:57:43.141388 PCI: 00:1f.2
905 15:57:43.141470 PCI: 00:1f.6
906 15:57:43.145174 PCI: Check your devicetree.cb.
907 15:57:43.148553 PCI: 00:02.0 scanning...
908 15:57:43.151816 scan_generic_bus for PCI: 00:02.0
909 15:57:43.154978 scan_generic_bus for PCI: 00:02.0 done
910 15:57:43.161511 scan_bus: scanning of bus PCI: 00:02.0 took 10186 usecs
911 15:57:43.161594 PCI: 00:14.0 scanning...
912 15:57:43.165128 scan_static_bus for PCI: 00:14.0
913 15:57:43.168354 USB0 port 0 enabled
914 15:57:43.171629 USB0 port 0 scanning...
915 15:57:43.174832 scan_static_bus for USB0 port 0
916 15:57:43.177985 USB2 port 0 enabled
917 15:57:43.178069 USB2 port 1 enabled
918 15:57:43.181229 USB2 port 2 disabled
919 15:57:43.181311 USB2 port 3 disabled
920 15:57:43.184593 USB2 port 5 disabled
921 15:57:43.187968 USB2 port 6 enabled
922 15:57:43.188069 USB2 port 9 enabled
923 15:57:43.191192 USB3 port 0 enabled
924 15:57:43.194499 USB3 port 1 enabled
925 15:57:43.194594 USB3 port 2 enabled
926 15:57:43.197949 USB3 port 3 enabled
927 15:57:43.198048 USB3 port 4 disabled
928 15:57:43.201183 USB2 port 0 scanning...
929 15:57:43.204517 scan_static_bus for USB2 port 0
930 15:57:43.207913 scan_static_bus for USB2 port 0 done
931 15:57:43.214502 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
932 15:57:43.217636 USB2 port 1 scanning...
933 15:57:43.221514 scan_static_bus for USB2 port 1
934 15:57:43.224574 scan_static_bus for USB2 port 1 done
935 15:57:43.228281 scan_bus: scanning of bus USB2 port 1 took 9696 usecs
936 15:57:43.231171 USB2 port 6 scanning...
937 15:57:43.234681 scan_static_bus for USB2 port 6
938 15:57:43.237780 scan_static_bus for USB2 port 6 done
939 15:57:43.244635 scan_bus: scanning of bus USB2 port 6 took 9714 usecs
940 15:57:43.247707 USB2 port 9 scanning...
941 15:57:43.251459 scan_static_bus for USB2 port 9
942 15:57:43.254752 scan_static_bus for USB2 port 9 done
943 15:57:43.261153 scan_bus: scanning of bus USB2 port 9 took 9698 usecs
944 15:57:43.261239 USB3 port 0 scanning...
945 15:57:43.264516 scan_static_bus for USB3 port 0
946 15:57:43.267699 scan_static_bus for USB3 port 0 done
947 15:57:43.274778 scan_bus: scanning of bus USB3 port 0 took 9697 usecs
948 15:57:43.277470 USB3 port 1 scanning...
949 15:57:43.281394 scan_static_bus for USB3 port 1
950 15:57:43.284424 scan_static_bus for USB3 port 1 done
951 15:57:43.291028 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
952 15:57:43.291114 USB3 port 2 scanning...
953 15:57:43.294321 scan_static_bus for USB3 port 2
954 15:57:43.297752 scan_static_bus for USB3 port 2 done
955 15:57:43.304231 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
956 15:57:43.307642 USB3 port 3 scanning...
957 15:57:43.311016 scan_static_bus for USB3 port 3
958 15:57:43.314286 scan_static_bus for USB3 port 3 done
959 15:57:43.320724 scan_bus: scanning of bus USB3 port 3 took 9704 usecs
960 15:57:43.324143 scan_static_bus for USB0 port 0 done
961 15:57:43.327445 scan_bus: scanning of bus USB0 port 0 took 155389 usecs
962 15:57:43.333614 scan_static_bus for PCI: 00:14.0 done
963 15:57:43.337393 scan_bus: scanning of bus PCI: 00:14.0 took 173004 usecs
964 15:57:43.340575 PCI: 00:15.0 scanning...
965 15:57:43.343626 scan_generic_bus for PCI: 00:15.0
966 15:57:43.347168 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 15:57:43.353516 scan_generic_bus for PCI: 00:15.0 done
968 15:57:43.356934 scan_bus: scanning of bus PCI: 00:15.0 took 14320 usecs
969 15:57:43.360022 PCI: 00:15.1 scanning...
970 15:57:43.363556 scan_generic_bus for PCI: 00:15.1
971 15:57:43.366970 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 15:57:43.373835 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 15:57:43.377144 scan_generic_bus for PCI: 00:15.1 done
974 15:57:43.383554 scan_bus: scanning of bus PCI: 00:15.1 took 18616 usecs
975 15:57:43.383650 PCI: 00:19.0 scanning...
976 15:57:43.386797 scan_generic_bus for PCI: 00:19.0
977 15:57:43.393479 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 15:57:43.396749 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 15:57:43.399993 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 15:57:43.403219 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 15:57:43.409870 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 15:57:43.413207 scan_generic_bus for PCI: 00:19.0 done
983 15:57:43.416430 scan_bus: scanning of bus PCI: 00:19.0 took 30724 usecs
984 15:57:43.420399 PCI: 00:1d.0 scanning...
985 15:57:43.423055 do_pci_scan_bridge for PCI: 00:1d.0
986 15:57:43.426922 PCI: pci_scan_bus for bus 01
987 15:57:43.430150 PCI: 01:00.0 [1c5c/1327] enabled
988 15:57:43.433389 Enabling Common Clock Configuration
989 15:57:43.440081 L1 Sub-State supported from root port 29
990 15:57:43.443377 L1 Sub-State Support = 0xf
991 15:57:43.443462 CommonModeRestoreTime = 0x28
992 15:57:43.450021 Power On Value = 0x16, Power On Scale = 0x0
993 15:57:43.450105 ASPM: Enabled L1
994 15:57:43.456558 scan_bus: scanning of bus PCI: 00:1d.0 took 32793 usecs
995 15:57:43.459570 PCI: 00:1e.2 scanning...
996 15:57:43.463089 scan_generic_bus for PCI: 00:1e.2
997 15:57:43.466202 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 15:57:43.469457 scan_generic_bus for PCI: 00:1e.2 done
999 15:57:43.476103 scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
1000 15:57:43.479773 PCI: 00:1e.3 scanning...
1001 15:57:43.482742 scan_generic_bus for PCI: 00:1e.3
1002 15:57:43.486150 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 15:57:43.489488 scan_generic_bus for PCI: 00:1e.3 done
1004 15:57:43.495902 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1005 15:57:43.496003 PCI: 00:1f.0 scanning...
1006 15:57:43.500007 scan_static_bus for PCI: 00:1f.0
1007 15:57:43.503361 PNP: 0c09.0 enabled
1008 15:57:43.506029 scan_static_bus for PCI: 00:1f.0 done
1009 15:57:43.512762 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1010 15:57:43.515987 PCI: 00:1f.3 scanning...
1011 15:57:43.519474 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1012 15:57:43.522718 PCI: 00:1f.4 scanning...
1013 15:57:43.525915 scan_generic_bus for PCI: 00:1f.4
1014 15:57:43.529354 scan_generic_bus for PCI: 00:1f.4 done
1015 15:57:43.535922 scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
1016 15:57:43.539272 PCI: 00:1f.5 scanning...
1017 15:57:43.542606 scan_generic_bus for PCI: 00:1f.5
1018 15:57:43.546478 scan_generic_bus for PCI: 00:1f.5 done
1019 15:57:43.552591 scan_bus: scanning of bus PCI: 00:1f.5 took 10186 usecs
1020 15:57:43.559282 scan_bus: scanning of bus DOMAIN: 0000 took 605089 usecs
1021 15:57:43.562433 scan_static_bus for Root Device done
1022 15:57:43.565671 scan_bus: scanning of bus Root Device took 624962 usecs
1023 15:57:43.569264 done
1024 15:57:43.572355 Chrome EC: UHEPI supported
1025 15:57:43.575847 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 15:57:43.582384 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 15:57:43.588929 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 15:57:43.595511 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 15:57:43.599422 SPI flash protection: WPSW=0 SRP0=0
1030 15:57:43.605612 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 15:57:43.609261 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1032 15:57:43.612260 found VGA at PCI: 00:02.0
1033 15:57:43.615654 Setting up VGA for PCI: 00:02.0
1034 15:57:43.622141 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 15:57:43.625426 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 15:57:43.628809 Allocating resources...
1037 15:57:43.632172 Reading resources...
1038 15:57:43.635419 Root Device read_resources bus 0 link: 0
1039 15:57:43.638569 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 15:57:43.645126 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 15:57:43.648386 DOMAIN: 0000 read_resources bus 0 link: 0
1042 15:57:43.655748 PCI: 00:14.0 read_resources bus 0 link: 0
1043 15:57:43.659057 USB0 port 0 read_resources bus 0 link: 0
1044 15:57:43.667094 USB0 port 0 read_resources bus 0 link: 0 done
1045 15:57:43.670455 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 15:57:43.678085 PCI: 00:15.0 read_resources bus 1 link: 0
1047 15:57:43.681217 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 15:57:43.687964 PCI: 00:15.1 read_resources bus 2 link: 0
1049 15:57:43.691259 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 15:57:43.698443 PCI: 00:19.0 read_resources bus 3 link: 0
1051 15:57:43.705543 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 15:57:43.708895 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 15:57:43.715451 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 15:57:43.718646 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 15:57:43.725101 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 15:57:43.728650 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 15:57:43.735099 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 15:57:43.738154 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 15:57:43.745508 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 15:57:43.751722 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 15:57:43.755063 Root Device read_resources bus 0 link: 0 done
1062 15:57:43.758388 Done reading resources.
1063 15:57:43.761630 Show resources in subtree (Root Device)...After reading.
1064 15:57:43.768190 Root Device child on link 0 CPU_CLUSTER: 0
1065 15:57:43.772130 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 15:57:43.772235 APIC: 00
1067 15:57:43.775444 APIC: 03
1068 15:57:43.775553 APIC: 05
1069 15:57:43.778617 APIC: 01
1070 15:57:43.778734 APIC: 02
1071 15:57:43.778810 APIC: 04
1072 15:57:43.781953 APIC: 07
1073 15:57:43.782052 APIC: 06
1074 15:57:43.785311 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 15:57:43.841742 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 15:57:43.842113 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 15:57:43.842204 PCI: 00:00.0
1078 15:57:43.842623 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 15:57:43.843099 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 15:57:43.843216 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 15:57:43.862480 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 15:57:43.862762 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 15:57:43.866370 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 15:57:43.872936 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 15:57:43.882576 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 15:57:43.892267 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 15:57:43.899405 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 15:57:43.909293 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 15:57:43.918927 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 15:57:43.929184 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 15:57:43.938977 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 15:57:43.948745 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 15:57:43.955225 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 15:57:43.959003 PCI: 00:02.0
1095 15:57:43.968879 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 15:57:43.978860 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 15:57:43.988650 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 15:57:43.988772 PCI: 00:04.0
1099 15:57:43.992135 PCI: 00:08.0
1100 15:57:44.001758 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 15:57:44.001866 PCI: 00:12.0
1102 15:57:44.011849 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 15:57:44.014730 PCI: 00:14.0 child on link 0 USB0 port 0
1104 15:57:44.028066 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 15:57:44.031410 USB0 port 0 child on link 0 USB2 port 0
1106 15:57:44.031514 USB2 port 0
1107 15:57:44.034701 USB2 port 1
1108 15:57:44.034799 USB2 port 2
1109 15:57:44.037937 USB2 port 3
1110 15:57:44.038049 USB2 port 5
1111 15:57:44.041221 USB2 port 6
1112 15:57:44.044600 USB2 port 9
1113 15:57:44.044674 USB3 port 0
1114 15:57:44.047847 USB3 port 1
1115 15:57:44.047950 USB3 port 2
1116 15:57:44.051747 USB3 port 3
1117 15:57:44.051822 USB3 port 4
1118 15:57:44.054465 PCI: 00:14.2
1119 15:57:44.064908 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 15:57:44.074419 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 15:57:44.074537 PCI: 00:14.3
1122 15:57:44.084368 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 15:57:44.087707 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 15:57:44.098131 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 15:57:44.101181 I2C: 01:15
1126 15:57:44.104530 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 15:57:44.114412 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 15:57:44.117675 I2C: 02:5d
1129 15:57:44.117782 GENERIC: 0.0
1130 15:57:44.120759 PCI: 00:16.0
1131 15:57:44.130883 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 15:57:44.130989 PCI: 00:17.0
1133 15:57:44.141058 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 15:57:44.150499 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 15:57:44.157093 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 15:57:44.167013 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 15:57:44.174026 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 15:57:44.183657 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 15:57:44.186843 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 15:57:44.196941 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 15:57:44.200595 I2C: 03:1a
1142 15:57:44.200680 I2C: 03:38
1143 15:57:44.203684 I2C: 03:39
1144 15:57:44.203770 I2C: 03:3a
1145 15:57:44.207058 I2C: 03:3b
1146 15:57:44.210501 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 15:57:44.220395 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 15:57:44.230066 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 15:57:44.236655 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 15:57:44.239877 PCI: 01:00.0
1151 15:57:44.249586 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 15:57:44.249675 PCI: 00:1e.0
1153 15:57:44.263231 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 15:57:44.273038 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 15:57:44.276287 PCI: 00:1e.2 child on link 0 SPI: 00
1156 15:57:44.286595 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 15:57:44.286706 SPI: 00
1158 15:57:44.289922 PCI: 00:1e.3 child on link 0 SPI: 01
1159 15:57:44.299579 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 15:57:44.302660 SPI: 01
1161 15:57:44.305846 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 15:57:44.316003 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 15:57:44.325768 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 15:57:44.325889 PNP: 0c09.0
1165 15:57:44.336127 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 15:57:44.336245 PCI: 00:1f.3
1167 15:57:44.345800 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 15:57:44.355617 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 15:57:44.358908 PCI: 00:1f.4
1170 15:57:44.365600 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 15:57:44.375566 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 15:57:44.378866 PCI: 00:1f.5
1173 15:57:44.388713 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 15:57:44.395425 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 15:57:44.402288 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 15:57:44.408503 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 15:57:44.411843 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 15:57:44.415039 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 15:57:44.418832 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 15:57:44.421692 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 15:57:44.428701 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 15:57:44.435099 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 15:57:44.442203 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 15:57:44.451412 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 15:57:44.458674 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 15:57:44.461891 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 15:57:44.471891 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 15:57:44.475004 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 15:57:44.478288 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 15:57:44.484764 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 15:57:44.487983 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 15:57:44.494920 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 15:57:44.497602 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 15:57:44.504178 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 15:57:44.507552 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 15:57:44.514580 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 15:57:44.517996 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 15:57:44.524009 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 15:57:44.527817 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 15:57:44.534722 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 15:57:44.537692 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 15:57:44.543901 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 15:57:44.547782 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 15:57:44.551088 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 15:57:44.557527 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 15:57:44.561004 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 15:57:44.567326 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 15:57:44.570705 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 15:57:44.577333 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 15:57:44.580511 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 15:57:44.590344 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 15:57:44.593491 avoid_fixed_resources: DOMAIN: 0000
1213 15:57:44.600693 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 15:57:44.607240 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 15:57:44.613769 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 15:57:44.620211 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 15:57:44.626738 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 15:57:44.636896 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 15:57:44.643432 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 15:57:44.649665 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 15:57:44.659546 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 15:57:44.666798 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 15:57:44.673525 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 15:57:44.680175 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 15:57:44.683439 Setting resources...
1226 15:57:44.690099 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 15:57:44.692879 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 15:57:44.696319 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 15:57:44.703231 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 15:57:44.706537 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 15:57:44.713076 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 15:57:44.719738 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 15:57:44.722972 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 15:57:44.732860 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 15:57:44.736023 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 15:57:44.742458 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 15:57:44.746175 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 15:57:44.752842 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 15:57:44.756161 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 15:57:44.762559 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 15:57:44.765997 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 15:57:44.772667 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 15:57:44.775785 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 15:57:44.782090 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 15:57:44.785399 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 15:57:44.792344 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 15:57:44.795741 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 15:57:44.798932 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 15:57:44.805447 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 15:57:44.808469 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 15:57:44.815099 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 15:57:44.818465 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 15:57:44.825008 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 15:57:44.828272 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 15:57:44.835376 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 15:57:44.838677 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 15:57:44.845246 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 15:57:44.851650 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 15:57:44.858368 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 15:57:44.865126 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 15:57:44.874672 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 15:57:44.877763 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 15:57:44.884839 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 15:57:44.891415 Root Device assign_resources, bus 0 link: 0
1265 15:57:44.894759 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 15:57:44.904363 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 15:57:44.910932 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 15:57:44.921159 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 15:57:44.927747 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 15:57:44.937469 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 15:57:44.944409 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 15:57:44.947668 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 15:57:44.954157 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 15:57:44.960816 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 15:57:44.970767 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 15:57:44.977876 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 15:57:44.987865 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 15:57:44.991044 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 15:57:44.997234 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 15:57:45.003979 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 15:57:45.007553 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 15:57:45.013781 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 15:57:45.020771 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 15:57:45.030680 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 15:57:45.037151 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 15:57:45.043731 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 15:57:45.053824 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 15:57:45.060846 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 15:57:45.067509 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 15:57:45.076844 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 15:57:45.080152 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 15:57:45.086813 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 15:57:45.093531 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 15:57:45.103402 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 15:57:45.113562 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 15:57:45.116798 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 15:57:45.123397 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 15:57:45.130277 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 15:57:45.136977 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 15:57:45.146752 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 15:57:45.149553 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 15:57:45.156757 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 15:57:45.162881 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 15:57:45.169393 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 15:57:45.173040 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 15:57:45.176399 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 15:57:45.183136 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 15:57:45.187064 LPC: Trying to open IO window from 800 size 1ff
1309 15:57:45.196418 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 15:57:45.203038 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 15:57:45.213402 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 15:57:45.220015 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 15:57:45.226593 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 15:57:45.229847 Root Device assign_resources, bus 0 link: 0
1315 15:57:45.232920 Done setting resources.
1316 15:57:45.239366 Show resources in subtree (Root Device)...After assigning values.
1317 15:57:45.243113 Root Device child on link 0 CPU_CLUSTER: 0
1318 15:57:45.246008 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 15:57:45.249532 APIC: 00
1320 15:57:45.249639 APIC: 03
1321 15:57:45.249747 APIC: 05
1322 15:57:45.252674 APIC: 01
1323 15:57:45.252784 APIC: 02
1324 15:57:45.256071 APIC: 04
1325 15:57:45.256174 APIC: 07
1326 15:57:45.256262 APIC: 06
1327 15:57:45.262678 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 15:57:45.272371 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 15:57:45.282621 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 15:57:45.282740 PCI: 00:00.0
1331 15:57:45.292402 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 15:57:45.302420 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 15:57:45.312208 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 15:57:45.322367 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 15:57:45.332491 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 15:57:45.341895 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 15:57:45.348555 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 15:57:45.358674 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 15:57:45.368723 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 15:57:45.378062 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 15:57:45.388323 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 15:57:45.394768 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 15:57:45.404677 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 15:57:45.414512 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 15:57:45.424789 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 15:57:45.434701 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 15:57:45.434788 PCI: 00:02.0
1348 15:57:45.447674 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 15:57:45.457641 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 15:57:45.467771 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 15:57:45.467883 PCI: 00:04.0
1352 15:57:45.470942 PCI: 00:08.0
1353 15:57:45.481023 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 15:57:45.481143 PCI: 00:12.0
1355 15:57:45.490688 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 15:57:45.497174 PCI: 00:14.0 child on link 0 USB0 port 0
1357 15:57:45.507027 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 15:57:45.510396 USB0 port 0 child on link 0 USB2 port 0
1359 15:57:45.513783 USB2 port 0
1360 15:57:45.513905 USB2 port 1
1361 15:57:45.516981 USB2 port 2
1362 15:57:45.517082 USB2 port 3
1363 15:57:45.520256 USB2 port 5
1364 15:57:45.520331 USB2 port 6
1365 15:57:45.523652 USB2 port 9
1366 15:57:45.523758 USB3 port 0
1367 15:57:45.526920 USB3 port 1
1368 15:57:45.527019 USB3 port 2
1369 15:57:45.530148 USB3 port 3
1370 15:57:45.530253 USB3 port 4
1371 15:57:45.534042 PCI: 00:14.2
1372 15:57:45.543370 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 15:57:45.553497 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 15:57:45.556748 PCI: 00:14.3
1375 15:57:45.566646 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 15:57:45.570007 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 15:57:45.580142 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 15:57:45.583446 I2C: 01:15
1379 15:57:45.586689 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 15:57:45.596443 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 15:57:45.599629 I2C: 02:5d
1382 15:57:45.599712 GENERIC: 0.0
1383 15:57:45.603416 PCI: 00:16.0
1384 15:57:45.613144 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 15:57:45.613227 PCI: 00:17.0
1386 15:57:45.623201 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 15:57:45.632967 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 15:57:45.642744 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 15:57:45.653166 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 15:57:45.662432 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 15:57:45.672458 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 15:57:45.675648 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 15:57:45.685941 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 15:57:45.689097 I2C: 03:1a
1395 15:57:45.689202 I2C: 03:38
1396 15:57:45.692366 I2C: 03:39
1397 15:57:45.692438 I2C: 03:3a
1398 15:57:45.692512 I2C: 03:3b
1399 15:57:45.698881 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 15:57:45.708939 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 15:57:45.718719 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 15:57:45.728624 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 15:57:45.728742 PCI: 01:00.0
1404 15:57:45.738951 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 15:57:45.741949 PCI: 00:1e.0
1406 15:57:45.751777 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 15:57:45.761783 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 15:57:45.768240 PCI: 00:1e.2 child on link 0 SPI: 00
1409 15:57:45.778107 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 15:57:45.778223 SPI: 00
1411 15:57:45.781388 PCI: 00:1e.3 child on link 0 SPI: 01
1412 15:57:45.791276 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 15:57:45.795240 SPI: 01
1414 15:57:45.798540 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 15:57:45.808196 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 15:57:45.818374 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 15:57:45.818482 PNP: 0c09.0
1418 15:57:45.827881 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 15:57:45.827989 PCI: 00:1f.3
1420 15:57:45.837834 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 15:57:45.847722 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 15:57:45.851104 PCI: 00:1f.4
1423 15:57:45.860918 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 15:57:45.870802 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 15:57:45.870881 PCI: 00:1f.5
1426 15:57:45.880591 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 15:57:45.884394 Done allocating resources.
1428 15:57:45.890976 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 15:57:45.894098 Enabling resources...
1430 15:57:45.897127 PCI: 00:00.0 subsystem <- 8086/9b61
1431 15:57:45.900520 PCI: 00:00.0 cmd <- 06
1432 15:57:45.903948 PCI: 00:02.0 subsystem <- 8086/9b41
1433 15:57:45.907156 PCI: 00:02.0 cmd <- 03
1434 15:57:45.907256 PCI: 00:08.0 cmd <- 06
1435 15:57:45.914255 PCI: 00:12.0 subsystem <- 8086/02f9
1436 15:57:45.914369 PCI: 00:12.0 cmd <- 02
1437 15:57:45.917452 PCI: 00:14.0 subsystem <- 8086/02ed
1438 15:57:45.920779 PCI: 00:14.0 cmd <- 02
1439 15:57:45.923868 PCI: 00:14.2 cmd <- 02
1440 15:57:45.927678 PCI: 00:14.3 subsystem <- 8086/02f0
1441 15:57:45.930705 PCI: 00:14.3 cmd <- 02
1442 15:57:45.933792 PCI: 00:15.0 subsystem <- 8086/02e8
1443 15:57:45.937224 PCI: 00:15.0 cmd <- 02
1444 15:57:45.940622 PCI: 00:15.1 subsystem <- 8086/02e9
1445 15:57:45.943878 PCI: 00:15.1 cmd <- 02
1446 15:57:45.947049 PCI: 00:16.0 subsystem <- 8086/02e0
1447 15:57:45.950402 PCI: 00:16.0 cmd <- 02
1448 15:57:45.954191 PCI: 00:17.0 subsystem <- 8086/02d3
1449 15:57:45.954292 PCI: 00:17.0 cmd <- 03
1450 15:57:45.960789 PCI: 00:19.0 subsystem <- 8086/02c5
1451 15:57:45.960896 PCI: 00:19.0 cmd <- 02
1452 15:57:45.963972 PCI: 00:1d.0 bridge ctrl <- 0013
1453 15:57:45.967349 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 15:57:45.970589 PCI: 00:1d.0 cmd <- 06
1455 15:57:45.973877 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 15:57:45.977035 PCI: 00:1e.0 cmd <- 06
1457 15:57:45.980786 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 15:57:45.984073 PCI: 00:1e.2 cmd <- 06
1459 15:57:45.987481 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 15:57:45.990824 PCI: 00:1e.3 cmd <- 02
1461 15:57:45.994059 PCI: 00:1f.0 subsystem <- 8086/0284
1462 15:57:45.997459 PCI: 00:1f.0 cmd <- 407
1463 15:57:46.000660 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 15:57:46.003932 PCI: 00:1f.3 cmd <- 02
1465 15:57:46.007225 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 15:57:46.007324 PCI: 00:1f.4 cmd <- 03
1467 15:57:46.014394 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 15:57:46.014498 PCI: 00:1f.5 cmd <- 406
1469 15:57:46.024357 PCI: 01:00.0 cmd <- 02
1470 15:57:46.029040 done.
1471 15:57:46.041934 ME: Version: 14.0.39.1367
1472 15:57:46.048406 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1473 15:57:46.051787 Initializing devices...
1474 15:57:46.051889 Root Device init ...
1475 15:57:46.058113 Chrome EC: Set SMI mask to 0x0000000000000000
1476 15:57:46.061477 Chrome EC: clear events_b mask to 0x0000000000000000
1477 15:57:46.068564 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 15:57:46.074678 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 15:57:46.081442 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 15:57:46.084575 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 15:57:46.088484 Root Device init finished in 35184 usecs
1482 15:57:46.091767 CPU_CLUSTER: 0 init ...
1483 15:57:46.098430 CPU_CLUSTER: 0 init finished in 2447 usecs
1484 15:57:46.102212 PCI: 00:00.0 init ...
1485 15:57:46.105577 CPU TDP: 15 Watts
1486 15:57:46.109308 CPU PL2 = 64 Watts
1487 15:57:46.112612 PCI: 00:00.0 init finished in 7083 usecs
1488 15:57:46.115885 PCI: 00:02.0 init ...
1489 15:57:46.119252 PCI: 00:02.0 init finished in 2254 usecs
1490 15:57:46.122535 PCI: 00:08.0 init ...
1491 15:57:46.125634 PCI: 00:08.0 init finished in 2251 usecs
1492 15:57:46.128751 PCI: 00:12.0 init ...
1493 15:57:46.132323 PCI: 00:12.0 init finished in 2252 usecs
1494 15:57:46.135323 PCI: 00:14.0 init ...
1495 15:57:46.138538 PCI: 00:14.0 init finished in 2253 usecs
1496 15:57:46.142010 PCI: 00:14.2 init ...
1497 15:57:46.145118 PCI: 00:14.2 init finished in 2252 usecs
1498 15:57:46.149015 PCI: 00:14.3 init ...
1499 15:57:46.152159 PCI: 00:14.3 init finished in 2270 usecs
1500 15:57:46.155396 PCI: 00:15.0 init ...
1501 15:57:46.158526 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 15:57:46.161761 PCI: 00:15.0 init finished in 5977 usecs
1503 15:57:46.165070 PCI: 00:15.1 init ...
1504 15:57:46.168896 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 15:57:46.175231 PCI: 00:15.1 init finished in 5977 usecs
1506 15:57:46.175341 PCI: 00:16.0 init ...
1507 15:57:46.181854 PCI: 00:16.0 init finished in 2244 usecs
1508 15:57:46.181970 PCI: 00:19.0 init ...
1509 15:57:46.188609 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 15:57:46.191600 PCI: 00:19.0 init finished in 5974 usecs
1511 15:57:46.195327 PCI: 00:1d.0 init ...
1512 15:57:46.198442 Initializing PCH PCIe bridge.
1513 15:57:46.201552 PCI: 00:1d.0 init finished in 5284 usecs
1514 15:57:46.204643 PCI: 00:1f.0 init ...
1515 15:57:46.207947 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 15:57:46.214830 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 15:57:46.214939 IOAPIC: ID = 0x02
1518 15:57:46.218043 IOAPIC: Dumping registers
1519 15:57:46.221415 reg 0x0000: 0x02000000
1520 15:57:46.224609 reg 0x0001: 0x00770020
1521 15:57:46.224714 reg 0x0002: 0x00000000
1522 15:57:46.231290 PCI: 00:1f.0 init finished in 23541 usecs
1523 15:57:46.234441 PCI: 00:1f.4 init ...
1524 15:57:46.238267 PCI: 00:1f.4 init finished in 2261 usecs
1525 15:57:46.248478 PCI: 01:00.0 init ...
1526 15:57:46.251712 PCI: 01:00.0 init finished in 2250 usecs
1527 15:57:46.255741 PNP: 0c09.0 init ...
1528 15:57:46.259535 Google Chrome EC uptime: 11.091 seconds
1529 15:57:46.266249 Google Chrome AP resets since EC boot: 0
1530 15:57:46.269272 Google Chrome most recent AP reset causes:
1531 15:57:46.275590 Google Chrome EC reset flags at last EC boot: reset-pin
1532 15:57:46.279543 PNP: 0c09.0 init finished in 20567 usecs
1533 15:57:46.282746 Devices initialized
1534 15:57:46.286025 Show all devs... After init.
1535 15:57:46.286135 Root Device: enabled 1
1536 15:57:46.289222 CPU_CLUSTER: 0: enabled 1
1537 15:57:46.292450 DOMAIN: 0000: enabled 1
1538 15:57:46.292561 APIC: 00: enabled 1
1539 15:57:46.295722 PCI: 00:00.0: enabled 1
1540 15:57:46.299069 PCI: 00:02.0: enabled 1
1541 15:57:46.302134 PCI: 00:04.0: enabled 0
1542 15:57:46.302247 PCI: 00:05.0: enabled 0
1543 15:57:46.305772 PCI: 00:12.0: enabled 1
1544 15:57:46.308960 PCI: 00:12.5: enabled 0
1545 15:57:46.312081 PCI: 00:12.6: enabled 0
1546 15:57:46.312187 PCI: 00:14.0: enabled 1
1547 15:57:46.315753 PCI: 00:14.1: enabled 0
1548 15:57:46.318810 PCI: 00:14.3: enabled 1
1549 15:57:46.318912 PCI: 00:14.5: enabled 0
1550 15:57:46.322086 PCI: 00:15.0: enabled 1
1551 15:57:46.325420 PCI: 00:15.1: enabled 1
1552 15:57:46.328621 PCI: 00:15.2: enabled 0
1553 15:57:46.328698 PCI: 00:15.3: enabled 0
1554 15:57:46.331891 PCI: 00:16.0: enabled 1
1555 15:57:46.335172 PCI: 00:16.1: enabled 0
1556 15:57:46.338413 PCI: 00:16.2: enabled 0
1557 15:57:46.338513 PCI: 00:16.3: enabled 0
1558 15:57:46.342249 PCI: 00:16.4: enabled 0
1559 15:57:46.345490 PCI: 00:16.5: enabled 0
1560 15:57:46.348653 PCI: 00:17.0: enabled 1
1561 15:57:46.348726 PCI: 00:19.0: enabled 1
1562 15:57:46.352128 PCI: 00:19.1: enabled 0
1563 15:57:46.355540 PCI: 00:19.2: enabled 0
1564 15:57:46.355661 PCI: 00:1a.0: enabled 0
1565 15:57:46.358734 PCI: 00:1c.0: enabled 0
1566 15:57:46.361564 PCI: 00:1c.1: enabled 0
1567 15:57:46.365115 PCI: 00:1c.2: enabled 0
1568 15:57:46.365218 PCI: 00:1c.3: enabled 0
1569 15:57:46.368695 PCI: 00:1c.4: enabled 0
1570 15:57:46.371566 PCI: 00:1c.5: enabled 0
1571 15:57:46.375410 PCI: 00:1c.6: enabled 0
1572 15:57:46.375531 PCI: 00:1c.7: enabled 0
1573 15:57:46.378135 PCI: 00:1d.0: enabled 1
1574 15:57:46.381413 PCI: 00:1d.1: enabled 0
1575 15:57:46.384810 PCI: 00:1d.2: enabled 0
1576 15:57:46.384944 PCI: 00:1d.3: enabled 0
1577 15:57:46.388616 PCI: 00:1d.4: enabled 0
1578 15:57:46.391839 PCI: 00:1d.5: enabled 0
1579 15:57:46.394986 PCI: 00:1e.0: enabled 1
1580 15:57:46.395087 PCI: 00:1e.1: enabled 0
1581 15:57:46.398419 PCI: 00:1e.2: enabled 1
1582 15:57:46.401586 PCI: 00:1e.3: enabled 1
1583 15:57:46.401686 PCI: 00:1f.0: enabled 1
1584 15:57:46.404819 PCI: 00:1f.1: enabled 0
1585 15:57:46.408123 PCI: 00:1f.2: enabled 0
1586 15:57:46.411281 PCI: 00:1f.3: enabled 1
1587 15:57:46.411388 PCI: 00:1f.4: enabled 1
1588 15:57:46.414908 PCI: 00:1f.5: enabled 1
1589 15:57:46.417990 PCI: 00:1f.6: enabled 0
1590 15:57:46.421084 USB0 port 0: enabled 1
1591 15:57:46.421196 I2C: 01:15: enabled 1
1592 15:57:46.424838 I2C: 02:5d: enabled 1
1593 15:57:46.428011 GENERIC: 0.0: enabled 1
1594 15:57:46.428112 I2C: 03:1a: enabled 1
1595 15:57:46.431392 I2C: 03:38: enabled 1
1596 15:57:46.434650 I2C: 03:39: enabled 1
1597 15:57:46.434740 I2C: 03:3a: enabled 1
1598 15:57:46.437875 I2C: 03:3b: enabled 1
1599 15:57:46.441108 PCI: 00:00.0: enabled 1
1600 15:57:46.441208 SPI: 00: enabled 1
1601 15:57:46.444397 SPI: 01: enabled 1
1602 15:57:46.447618 PNP: 0c09.0: enabled 1
1603 15:57:46.447711 USB2 port 0: enabled 1
1604 15:57:46.450894 USB2 port 1: enabled 1
1605 15:57:46.454208 USB2 port 2: enabled 0
1606 15:57:46.454314 USB2 port 3: enabled 0
1607 15:57:46.458028 USB2 port 5: enabled 0
1608 15:57:46.461059 USB2 port 6: enabled 1
1609 15:57:46.464093 USB2 port 9: enabled 1
1610 15:57:46.464195 USB3 port 0: enabled 1
1611 15:57:46.467340 USB3 port 1: enabled 1
1612 15:57:46.470986 USB3 port 2: enabled 1
1613 15:57:46.471063 USB3 port 3: enabled 1
1614 15:57:46.474208 USB3 port 4: enabled 0
1615 15:57:46.477428 APIC: 03: enabled 1
1616 15:57:46.477536 APIC: 05: enabled 1
1617 15:57:46.480832 APIC: 01: enabled 1
1618 15:57:46.483980 APIC: 02: enabled 1
1619 15:57:46.484069 APIC: 04: enabled 1
1620 15:57:46.487292 APIC: 07: enabled 1
1621 15:57:46.487393 APIC: 06: enabled 1
1622 15:57:46.491430 PCI: 00:08.0: enabled 1
1623 15:57:46.494206 PCI: 00:14.2: enabled 1
1624 15:57:46.497124 PCI: 01:00.0: enabled 1
1625 15:57:46.501164 Disabling ACPI via APMC:
1626 15:57:46.501272 done.
1627 15:57:46.507927 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 15:57:46.511104 ELOG: NV offset 0xaf0000 size 0x4000
1629 15:57:46.518089 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 15:57:46.524065 ELOG: Event(17) added with size 13 at 2023-09-06 15:56:39 UTC
1631 15:57:46.530485 POST: Unexpected post code in previous boot: 0x73
1632 15:57:46.537578 ELOG: Event(A3) added with size 11 at 2023-09-06 15:56:39 UTC
1633 15:57:46.544288 ELOG: Event(A6) added with size 13 at 2023-09-06 15:56:39 UTC
1634 15:57:46.550675 ELOG: Event(92) added with size 9 at 2023-09-06 15:56:39 UTC
1635 15:57:46.554020 ELOG: Event(93) added with size 9 at 2023-09-06 15:56:39 UTC
1636 15:57:46.560460 ELOG: Event(9A) added with size 9 at 2023-09-06 15:56:39 UTC
1637 15:57:46.567389 ELOG: Event(9E) added with size 10 at 2023-09-06 15:56:39 UTC
1638 15:57:46.573923 ELOG: Event(9F) added with size 14 at 2023-09-06 15:56:39 UTC
1639 15:57:46.580231 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1640 15:57:46.587187 ELOG: Event(A1) added with size 10 at 2023-09-06 15:56:39 UTC
1641 15:57:46.593488 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1642 15:57:46.600091 ELOG: Event(A0) added with size 9 at 2023-09-06 15:56:39 UTC
1643 15:57:46.603857 elog_add_boot_reason: Logged dev mode boot
1644 15:57:46.607164 Finalize devices...
1645 15:57:46.610110 PCI: 00:17.0 final
1646 15:57:46.610214 Devices finalized
1647 15:57:46.617005 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1648 15:57:46.620064 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1649 15:57:46.626619 ME: HFSTS1 : 0x90000245
1650 15:57:46.630471 ME: HFSTS2 : 0x3B850126
1651 15:57:46.633487 ME: HFSTS3 : 0x00000020
1652 15:57:46.636563 ME: HFSTS4 : 0x00004800
1653 15:57:46.643364 ME: HFSTS5 : 0x00000000
1654 15:57:46.646719 ME: HFSTS6 : 0x40400006
1655 15:57:46.650124 ME: Manufacturing Mode : NO
1656 15:57:46.653348 ME: FW Partition Table : OK
1657 15:57:46.657092 ME: Bringup Loader Failure : NO
1658 15:57:46.659979 ME: Firmware Init Complete : YES
1659 15:57:46.663217 ME: Boot Options Present : NO
1660 15:57:46.666557 ME: Update In Progress : NO
1661 15:57:46.669681 ME: D0i3 Support : YES
1662 15:57:46.672930 ME: Low Power State Enabled : NO
1663 15:57:46.676401 ME: CPU Replaced : NO
1664 15:57:46.679747 ME: CPU Replacement Valid : YES
1665 15:57:46.683367 ME: Current Working State : 5
1666 15:57:46.686527 ME: Current Operation State : 1
1667 15:57:46.689599 ME: Current Operation Mode : 0
1668 15:57:46.692801 ME: Error Code : 0
1669 15:57:46.696028 ME: CPU Debug Disabled : YES
1670 15:57:46.699959 ME: TXT Support : NO
1671 15:57:46.702549 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1672 15:57:46.709718 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1673 15:57:46.712775 CBFS @ c08000 size 3f8000
1674 15:57:46.719339 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1675 15:57:46.723005 CBFS: Locating 'fallback/dsdt.aml'
1676 15:57:46.726017 CBFS: Found @ offset 10bb80 size 3fa5
1677 15:57:46.729624 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1678 15:57:46.732473 CBFS @ c08000 size 3f8000
1679 15:57:46.739025 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1680 15:57:46.742230 CBFS: Locating 'fallback/slic'
1681 15:57:46.745952 CBFS: 'fallback/slic' not found.
1682 15:57:46.752875 ACPI: Writing ACPI tables at 99b3e000.
1683 15:57:46.753019 ACPI: * FACS
1684 15:57:46.755936 ACPI: * DSDT
1685 15:57:46.759204 Ramoops buffer: 0x100000@0x99a3d000.
1686 15:57:46.762540 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1687 15:57:46.769128 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1688 15:57:46.772352 Google Chrome EC: version:
1689 15:57:46.776195 ro: helios_v2.0.2659-56403530b
1690 15:57:46.779576 rw: helios_v2.0.2849-c41de27e7d
1691 15:57:46.779707 running image: 1
1692 15:57:46.783402 ACPI: * FADT
1693 15:57:46.783516 SCI is IRQ9
1694 15:57:46.790120 ACPI: added table 1/32, length now 40
1695 15:57:46.790250 ACPI: * SSDT
1696 15:57:46.793100 Found 1 CPU(s) with 8 core(s) each.
1697 15:57:46.796690 Error: Could not locate 'wifi_sar' in VPD.
1698 15:57:46.802947 Checking CBFS for default SAR values
1699 15:57:46.806222 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1700 15:57:46.810093 CBFS @ c08000 size 3f8000
1701 15:57:46.816533 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1702 15:57:46.819840 CBFS: Locating 'wifi_sar_defaults.hex'
1703 15:57:46.823103 CBFS: Found @ offset 5fac0 size 77
1704 15:57:46.826390 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1705 15:57:46.833037 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1706 15:57:46.836093 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1707 15:57:46.843201 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1708 15:57:46.845905 failed to find key in VPD: dsm_calib_r0_0
1709 15:57:46.855830 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1710 15:57:46.860483 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1711 15:57:46.862642 failed to find key in VPD: dsm_calib_r0_1
1712 15:57:46.872718 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1713 15:57:46.879300 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1714 15:57:46.882695 failed to find key in VPD: dsm_calib_r0_2
1715 15:57:46.892562 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1716 15:57:46.895897 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1717 15:57:46.902638 failed to find key in VPD: dsm_calib_r0_3
1718 15:57:46.909224 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1719 15:57:46.915717 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1720 15:57:46.919004 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1721 15:57:46.922187 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1722 15:57:46.926094 EC returned error result code 1
1723 15:57:46.929853 EC returned error result code 1
1724 15:57:46.933933 EC returned error result code 1
1725 15:57:46.940420 PS2K: Bad resp from EC. Vivaldi disabled!
1726 15:57:46.943568 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1727 15:57:46.950569 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1728 15:57:46.956562 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1729 15:57:46.960311 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1730 15:57:46.966876 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1731 15:57:46.973426 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1732 15:57:46.980171 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1733 15:57:46.983466 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1734 15:57:46.989995 ACPI: added table 2/32, length now 44
1735 15:57:46.990094 ACPI: * MCFG
1736 15:57:46.993353 ACPI: added table 3/32, length now 48
1737 15:57:46.996568 ACPI: * TPM2
1738 15:57:46.999635 TPM2 log created at 99a2d000
1739 15:57:47.002985 ACPI: added table 4/32, length now 52
1740 15:57:47.003066 ACPI: * MADT
1741 15:57:47.006241 SCI is IRQ9
1742 15:57:47.009712 ACPI: added table 5/32, length now 56
1743 15:57:47.009809 current = 99b43ac0
1744 15:57:47.013294 ACPI: * DMAR
1745 15:57:47.016509 ACPI: added table 6/32, length now 60
1746 15:57:47.019949 ACPI: * IGD OpRegion
1747 15:57:47.020047 GMA: Found VBT in CBFS
1748 15:57:47.022922 GMA: Found valid VBT in CBFS
1749 15:57:47.026577 ACPI: added table 7/32, length now 64
1750 15:57:47.029944 ACPI: * HPET
1751 15:57:47.033065 ACPI: added table 8/32, length now 68
1752 15:57:47.033148 ACPI: done.
1753 15:57:47.036328 ACPI tables: 31744 bytes.
1754 15:57:47.040325 smbios_write_tables: 99a2c000
1755 15:57:47.043617 EC returned error result code 3
1756 15:57:47.046297 Couldn't obtain OEM name from CBI
1757 15:57:47.050123 Create SMBIOS type 17
1758 15:57:47.053437 PCI: 00:00.0 (Intel Cannonlake)
1759 15:57:47.056647 PCI: 00:14.3 (Intel WiFi)
1760 15:57:47.059945 SMBIOS tables: 939 bytes.
1761 15:57:47.063054 Writing table forward entry at 0x00000500
1762 15:57:47.069655 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1763 15:57:47.072827 Writing coreboot table at 0x99b62000
1764 15:57:47.079512 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1765 15:57:47.083038 1. 0000000000001000-000000000009ffff: RAM
1766 15:57:47.086071 2. 00000000000a0000-00000000000fffff: RESERVED
1767 15:57:47.093091 3. 0000000000100000-0000000099a2bfff: RAM
1768 15:57:47.096324 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1769 15:57:47.102623 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1770 15:57:47.109746 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1771 15:57:47.112943 7. 000000009a000000-000000009f7fffff: RESERVED
1772 15:57:47.119165 8. 00000000e0000000-00000000efffffff: RESERVED
1773 15:57:47.122831 9. 00000000fc000000-00000000fc000fff: RESERVED
1774 15:57:47.125673 10. 00000000fe000000-00000000fe00ffff: RESERVED
1775 15:57:47.132904 11. 00000000fed10000-00000000fed17fff: RESERVED
1776 15:57:47.135864 12. 00000000fed80000-00000000fed83fff: RESERVED
1777 15:57:47.142940 13. 00000000fed90000-00000000fed91fff: RESERVED
1778 15:57:47.146057 14. 00000000feda0000-00000000feda1fff: RESERVED
1779 15:57:47.149250 15. 0000000100000000-000000045e7fffff: RAM
1780 15:57:47.156076 Graphics framebuffer located at 0xc0000000
1781 15:57:47.159004 Passing 5 GPIOs to payload:
1782 15:57:47.162303 NAME | PORT | POLARITY | VALUE
1783 15:57:47.169402 write protect | undefined | high | low
1784 15:57:47.172444 lid | undefined | high | high
1785 15:57:47.179215 power | undefined | high | low
1786 15:57:47.185748 oprom | undefined | high | low
1787 15:57:47.188816 EC in RW | 0x000000cb | high | low
1788 15:57:47.192408 Board ID: 4
1789 15:57:47.195246 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1790 15:57:47.198699 CBFS @ c08000 size 3f8000
1791 15:57:47.205620 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1792 15:57:47.211980 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1793 15:57:47.212101 coreboot table: 1492 bytes.
1794 15:57:47.215278 IMD ROOT 0. 99fff000 00001000
1795 15:57:47.218562 IMD SMALL 1. 99ffe000 00001000
1796 15:57:47.221755 FSP MEMORY 2. 99c4e000 003b0000
1797 15:57:47.224937 CONSOLE 3. 99c2e000 00020000
1798 15:57:47.228703 FMAP 4. 99c2d000 0000054e
1799 15:57:47.231950 TIME STAMP 5. 99c2c000 00000910
1800 15:57:47.235158 VBOOT WORK 6. 99c18000 00014000
1801 15:57:47.238156 MRC DATA 7. 99c16000 00001958
1802 15:57:47.241825 ROMSTG STCK 8. 99c15000 00001000
1803 15:57:47.244873 AFTER CAR 9. 99c0b000 0000a000
1804 15:57:47.248695 RAMSTAGE 10. 99baf000 0005c000
1805 15:57:47.251855 REFCODE 11. 99b7a000 00035000
1806 15:57:47.255359 SMM BACKUP 12. 99b6a000 00010000
1807 15:57:47.259000 COREBOOT 13. 99b62000 00008000
1808 15:57:47.261477 ACPI 14. 99b3e000 00024000
1809 15:57:47.264694 ACPI GNVS 15. 99b3d000 00001000
1810 15:57:47.268651 RAMOOPS 16. 99a3d000 00100000
1811 15:57:47.272039 TPM2 TCGLOG17. 99a2d000 00010000
1812 15:57:47.275312 SMBIOS 18. 99a2c000 00000800
1813 15:57:47.278519 IMD small region:
1814 15:57:47.281784 IMD ROOT 0. 99ffec00 00000400
1815 15:57:47.284696 FSP RUNTIME 1. 99ffebe0 00000004
1816 15:57:47.288540 EC HOSTEVENT 2. 99ffebc0 00000008
1817 15:57:47.291751 POWER STATE 3. 99ffeb80 00000040
1818 15:57:47.294964 ROMSTAGE 4. 99ffeb60 00000004
1819 15:57:47.298246 MEM INFO 5. 99ffe9a0 000001b9
1820 15:57:47.301301 VPD 6. 99ffe920 0000006c
1821 15:57:47.304883 MTRR: Physical address space:
1822 15:57:47.311527 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1823 15:57:47.317831 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1824 15:57:47.324836 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1825 15:57:47.330948 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1826 15:57:47.337755 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1827 15:57:47.344090 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1828 15:57:47.350805 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1829 15:57:47.354440 MTRR: Fixed MSR 0x250 0x0606060606060606
1830 15:57:47.357625 MTRR: Fixed MSR 0x258 0x0606060606060606
1831 15:57:47.360945 MTRR: Fixed MSR 0x259 0x0000000000000000
1832 15:57:47.367226 MTRR: Fixed MSR 0x268 0x0606060606060606
1833 15:57:47.371043 MTRR: Fixed MSR 0x269 0x0606060606060606
1834 15:57:47.374237 MTRR: Fixed MSR 0x26a 0x0606060606060606
1835 15:57:47.377352 MTRR: Fixed MSR 0x26b 0x0606060606060606
1836 15:57:47.384090 MTRR: Fixed MSR 0x26c 0x0606060606060606
1837 15:57:47.387211 MTRR: Fixed MSR 0x26d 0x0606060606060606
1838 15:57:47.390900 MTRR: Fixed MSR 0x26e 0x0606060606060606
1839 15:57:47.393899 MTRR: Fixed MSR 0x26f 0x0606060606060606
1840 15:57:47.397255 call enable_fixed_mtrr()
1841 15:57:47.400444 CPU physical address size: 39 bits
1842 15:57:47.407643 MTRR: default type WB/UC MTRR counts: 6/8.
1843 15:57:47.410678 MTRR: WB selected as default type.
1844 15:57:47.417166 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1845 15:57:47.420369 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1846 15:57:47.426813 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1847 15:57:47.433948 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1848 15:57:47.440055 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1849 15:57:47.446991 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1850 15:57:47.450058 MTRR: Fixed MSR 0x250 0x0606060606060606
1851 15:57:47.457099 MTRR: Fixed MSR 0x258 0x0606060606060606
1852 15:57:47.460220 MTRR: Fixed MSR 0x259 0x0000000000000000
1853 15:57:47.463322 MTRR: Fixed MSR 0x268 0x0606060606060606
1854 15:57:47.466506 MTRR: Fixed MSR 0x269 0x0606060606060606
1855 15:57:47.473356 MTRR: Fixed MSR 0x26a 0x0606060606060606
1856 15:57:47.476646 MTRR: Fixed MSR 0x26b 0x0606060606060606
1857 15:57:47.480098 MTRR: Fixed MSR 0x26c 0x0606060606060606
1858 15:57:47.483359 MTRR: Fixed MSR 0x26d 0x0606060606060606
1859 15:57:47.489821 MTRR: Fixed MSR 0x26e 0x0606060606060606
1860 15:57:47.493026 MTRR: Fixed MSR 0x26f 0x0606060606060606
1861 15:57:47.493110
1862 15:57:47.493175 MTRR check
1863 15:57:47.496751 Fixed MTRRs : Enabled
1864 15:57:47.499789 Variable MTRRs: Enabled
1865 15:57:47.499900
1866 15:57:47.502940 call enable_fixed_mtrr()
1867 15:57:47.506137 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1868 15:57:47.509371 CPU physical address size: 39 bits
1869 15:57:47.516860 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1870 15:57:47.520054 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 15:57:47.523412 MTRR: Fixed MSR 0x250 0x0606060606060606
1872 15:57:47.529813 MTRR: Fixed MSR 0x258 0x0606060606060606
1873 15:57:47.533577 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 15:57:47.536689 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 15:57:47.539818 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 15:57:47.546487 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 15:57:47.549937 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 15:57:47.553212 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 15:57:47.556387 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 15:57:47.559535 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 15:57:47.566442 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 15:57:47.569520 MTRR: Fixed MSR 0x258 0x0606060606060606
1883 15:57:47.573137 call enable_fixed_mtrr()
1884 15:57:47.576137 MTRR: Fixed MSR 0x259 0x0000000000000000
1885 15:57:47.579428 MTRR: Fixed MSR 0x268 0x0606060606060606
1886 15:57:47.585987 MTRR: Fixed MSR 0x269 0x0606060606060606
1887 15:57:47.589237 MTRR: Fixed MSR 0x26a 0x0606060606060606
1888 15:57:47.592417 MTRR: Fixed MSR 0x26b 0x0606060606060606
1889 15:57:47.595757 MTRR: Fixed MSR 0x26c 0x0606060606060606
1890 15:57:47.599686 MTRR: Fixed MSR 0x26d 0x0606060606060606
1891 15:57:47.606007 MTRR: Fixed MSR 0x26e 0x0606060606060606
1892 15:57:47.609133 MTRR: Fixed MSR 0x26f 0x0606060606060606
1893 15:57:47.612469 CPU physical address size: 39 bits
1894 15:57:47.615706 call enable_fixed_mtrr()
1895 15:57:47.619449 MTRR: Fixed MSR 0x250 0x0606060606060606
1896 15:57:47.622687 MTRR: Fixed MSR 0x258 0x0606060606060606
1897 15:57:47.629196 MTRR: Fixed MSR 0x259 0x0000000000000000
1898 15:57:47.632435 MTRR: Fixed MSR 0x268 0x0606060606060606
1899 15:57:47.635672 MTRR: Fixed MSR 0x269 0x0606060606060606
1900 15:57:47.639345 MTRR: Fixed MSR 0x26a 0x0606060606060606
1901 15:57:47.645521 MTRR: Fixed MSR 0x26b 0x0606060606060606
1902 15:57:47.648791 MTRR: Fixed MSR 0x26c 0x0606060606060606
1903 15:57:47.652568 MTRR: Fixed MSR 0x26d 0x0606060606060606
1904 15:57:47.655686 MTRR: Fixed MSR 0x26e 0x0606060606060606
1905 15:57:47.662175 MTRR: Fixed MSR 0x26f 0x0606060606060606
1906 15:57:47.665645 MTRR: Fixed MSR 0x250 0x0606060606060606
1907 15:57:47.668973 call enable_fixed_mtrr()
1908 15:57:47.672407 MTRR: Fixed MSR 0x258 0x0606060606060606
1909 15:57:47.675485 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 15:57:47.678706 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 15:57:47.685096 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 15:57:47.688780 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 15:57:47.692054 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 15:57:47.695383 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 15:57:47.702024 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 15:57:47.705347 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 15:57:47.708582 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 15:57:47.711752 CPU physical address size: 39 bits
1919 15:57:47.714890 call enable_fixed_mtrr()
1920 15:57:47.718711 CBFS @ c08000 size 3f8000
1921 15:57:47.725038 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1922 15:57:47.728275 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 15:57:47.731444 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 15:57:47.734669 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 15:57:47.737924 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 15:57:47.745075 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 15:57:47.748114 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 15:57:47.751681 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 15:57:47.754921 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 15:57:47.761372 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 15:57:47.764803 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 15:57:47.768076 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 15:57:47.771190 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 15:57:47.774817 call enable_fixed_mtrr()
1935 15:57:47.777823 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 15:57:47.784465 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 15:57:47.787880 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 15:57:47.791122 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 15:57:47.794424 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 15:57:47.800917 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 15:57:47.804726 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 15:57:47.808025 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 15:57:47.811226 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 15:57:47.817770 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 15:57:47.820940 CPU physical address size: 39 bits
1946 15:57:47.824678 call enable_fixed_mtrr()
1947 15:57:47.827583 CBFS: Locating 'fallback/payload'
1948 15:57:47.830961 CPU physical address size: 39 bits
1949 15:57:47.834071 CPU physical address size: 39 bits
1950 15:57:47.837418 CBFS: Found @ offset 1c96c0 size 3f798
1951 15:57:47.841212 CPU physical address size: 39 bits
1952 15:57:47.844377 Checking segment from ROM address 0xffdd16f8
1953 15:57:47.850834 Checking segment from ROM address 0xffdd1714
1954 15:57:47.854096 Loading segment from ROM address 0xffdd16f8
1955 15:57:47.857853 code (compression=0)
1956 15:57:47.863908 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1957 15:57:47.873956 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1958 15:57:47.874108 it's not compressed!
1959 15:57:47.967983 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1960 15:57:47.974632 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1961 15:57:47.977870 Loading segment from ROM address 0xffdd1714
1962 15:57:47.981252 Entry Point 0x30000000
1963 15:57:47.984508 Loaded segments
1964 15:57:47.990354 Finalizing chipset.
1965 15:57:47.993790 Finalizing SMM.
1966 15:57:47.997009 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1967 15:57:48.000065 mp_park_aps done after 0 msecs.
1968 15:57:48.006832 Jumping to boot code at 30000000(99b62000)
1969 15:57:48.013346 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1970 15:57:48.013483
1971 15:57:48.013580
1972 15:57:48.013675
1973 15:57:48.017067 Starting depthcharge on Helios...
1974 15:57:48.017178
1975 15:57:48.017588 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1976 15:57:48.017728 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1977 15:57:48.017846 Setting prompt string to ['hatch:']
1978 15:57:48.017963 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1979 15:57:48.026584 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1980 15:57:48.026710
1981 15:57:48.033533 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1982 15:57:48.033656
1983 15:57:48.039978 board_setup: Info: eMMC controller not present; skipping
1984 15:57:48.040096
1985 15:57:48.043174 New NVMe Controller 0x30053ac0 @ 00:1d:00
1986 15:57:48.043289
1987 15:57:48.049674 board_setup: Info: SDHCI controller not present; skipping
1988 15:57:48.049806
1989 15:57:48.053005 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1990 15:57:48.056832
1991 15:57:48.056948 Wipe memory regions:
1992 15:57:48.057047
1993 15:57:48.060047 [0x00000000001000, 0x000000000a0000)
1994 15:57:48.060149
1995 15:57:48.063461 [0x00000000100000, 0x00000030000000)
1996 15:57:48.129101
1997 15:57:48.132260 [0x00000030657430, 0x00000099a2c000)
1998 15:57:48.269539
1999 15:57:48.272946 [0x00000100000000, 0x0000045e800000)
2000 15:57:49.655434
2001 15:57:49.655603 R8152: Initializing
2002 15:57:49.655704
2003 15:57:49.658584 Version 9 (ocp_data = 6010)
2004 15:57:49.662702
2005 15:57:49.662805 R8152: Done initializing
2006 15:57:49.662899
2007 15:57:49.666019 Adding net device
2008 15:57:50.149440
2009 15:57:50.149602 R8152: Initializing
2010 15:57:50.149701
2011 15:57:50.152160 Version 6 (ocp_data = 5c30)
2012 15:57:50.152272
2013 15:57:50.155685 R8152: Done initializing
2014 15:57:50.155787
2015 15:57:50.158915 net_add_device: Attemp to include the same device
2016 15:57:50.162127
2017 15:57:50.166822 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2018 15:57:50.169562
2019 15:57:50.169695
2020 15:57:50.169796
2021 15:57:50.170168 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2023 15:57:50.270605 hatch: tftpboot 192.168.201.1 11447434/tftp-deploy-mri5yeev/kernel/bzImage 11447434/tftp-deploy-mri5yeev/kernel/cmdline 11447434/tftp-deploy-mri5yeev/ramdisk/ramdisk.cpio.gz
2024 15:57:50.270797 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2025 15:57:50.270910 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2026 15:57:50.274717 tftpboot 192.168.201.1 11447434/tftp-deploy-mri5yeev/kernel/bzIploy-mri5yeev/kernel/cmdline 11447434/tftp-deploy-mri5yeev/ramdisk/ramdisk.cpio.gz
2027 15:57:50.274833
2028 15:57:50.274927 Waiting for link
2029 15:57:50.475607
2030 15:57:50.475777 done.
2031 15:57:50.475903
2032 15:57:50.476025 MAC: 00:24:32:50:19:be
2033 15:57:50.476113
2034 15:57:50.478838 Sending DHCP discover... done.
2035 15:57:50.478943
2036 15:57:50.482567 Waiting for reply... done.
2037 15:57:50.482694
2038 15:57:50.486310 Sending DHCP request... done.
2039 15:57:50.486442
2040 15:57:50.562157 Waiting for reply... done.
2041 15:57:50.562325
2042 15:57:50.562427 My ip is 192.168.201.15
2043 15:57:50.562526
2044 15:57:50.565344 The DHCP server ip is 192.168.201.1
2045 15:57:50.568711
2046 15:57:50.571859 TFTP server IP predefined by user: 192.168.201.1
2047 15:57:50.571990
2048 15:57:50.578609 Bootfile predefined by user: 11447434/tftp-deploy-mri5yeev/kernel/bzImage
2049 15:57:50.578737
2050 15:57:50.581724 Sending tftp read request... done.
2051 15:57:50.581829
2052 15:57:50.585362 Waiting for the transfer...
2053 15:57:50.585491
2054 15:57:51.110089 00000000 ################################################################
2055 15:57:51.110224
2056 15:57:51.632913 00080000 ################################################################
2057 15:57:51.633058
2058 15:57:52.163155 00100000 ################################################################
2059 15:57:52.163290
2060 15:57:52.738880 00180000 ################################################################
2061 15:57:52.739016
2062 15:57:53.374347 00200000 ################################################################
2063 15:57:53.374483
2064 15:57:53.989679 00280000 ################################################################
2065 15:57:53.989840
2066 15:57:54.616638 00300000 ################################################################
2067 15:57:54.616820
2068 15:57:55.235090 00380000 ################################################################
2069 15:57:55.235258
2070 15:57:55.862355 00400000 ################################################################
2071 15:57:55.862488
2072 15:57:56.474133 00480000 ################################################################
2073 15:57:56.474271
2074 15:57:57.073896 00500000 ################################################################
2075 15:57:57.074032
2076 15:57:57.673535 00580000 ################################################################
2077 15:57:57.673700
2078 15:57:58.195944 00600000 ################################################################
2079 15:57:58.196132
2080 15:57:58.719663 00680000 ################################################################
2081 15:57:58.719813
2082 15:57:59.249849 00700000 ################################################################
2083 15:57:59.250010
2084 15:57:59.769643 00780000 ################################################################
2085 15:57:59.769784
2086 15:57:59.870281 00800000 ############# done.
2087 15:57:59.870438
2088 15:57:59.873974 The bootfile was 8490896 bytes long.
2089 15:57:59.874144
2090 15:57:59.876951 Sending tftp read request... done.
2091 15:57:59.877076
2092 15:57:59.880344 Waiting for the transfer...
2093 15:57:59.880444
2094 15:58:00.418934 00000000 ################################################################
2095 15:58:00.419063
2096 15:58:00.951113 00080000 ################################################################
2097 15:58:00.951247
2098 15:58:01.471529 00100000 ################################################################
2099 15:58:01.471708
2100 15:58:01.989382 00180000 ################################################################
2101 15:58:01.989523
2102 15:58:02.511843 00200000 ################################################################
2103 15:58:02.512009
2104 15:58:03.068099 00280000 ################################################################
2105 15:58:03.068230
2106 15:58:04.176948 00300000 ################################################################
2107 15:58:04.177110
2108 15:58:04.177198 00380000 ################################################################
2109 15:58:04.177298
2110 15:58:04.719328 00400000 ################################################################
2111 15:58:04.719485
2112 15:58:05.330977 00480000 ################################################################
2113 15:58:05.331505
2114 15:58:06.014657 00500000 ################################################################
2115 15:58:06.015208
2116 15:58:06.631692 00580000 ################################################################
2117 15:58:06.631822
2118 15:58:07.188449 00600000 ################################################################
2119 15:58:07.188592
2120 15:58:07.744440 00680000 ################################################################
2121 15:58:07.744573
2122 15:58:08.287861 00700000 ################################################################
2123 15:58:08.288532
2124 15:58:08.900788 00780000 ################################################################
2125 15:58:08.900926
2126 15:58:09.441563 00800000 ####################################################### done.
2127 15:58:09.441706
2128 15:58:09.444670 Sending tftp read request... done.
2129 15:58:09.444755
2130 15:58:09.448366 Waiting for the transfer...
2131 15:58:09.448506
2132 15:58:09.451181 00000000 # done.
2133 15:58:09.451278
2134 15:58:09.458369 Command line loaded dynamically from TFTP file: 11447434/tftp-deploy-mri5yeev/kernel/cmdline
2135 15:58:09.461719
2136 15:58:09.478068 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2137 15:58:09.481276
2138 15:58:09.484547 ec_init(0): CrosEC protocol v3 supported (256, 256)
2139 15:58:09.490351
2140 15:58:09.493447 Shutting down all USB controllers.
2141 15:58:09.493526
2142 15:58:09.493590 Removing current net device
2143 15:58:09.497360
2144 15:58:09.497440 Finalizing coreboot
2145 15:58:09.497504
2146 15:58:09.504584 Exiting depthcharge with code 4 at timestamp: 28854925
2147 15:58:09.504703
2148 15:58:09.504796
2149 15:58:09.504878 Starting kernel ...
2150 15:58:09.504938
2151 15:58:09.504995
2152 15:58:09.505383 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2153 15:58:09.505481 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2154 15:58:09.505558 Setting prompt string to ['Linux version [0-9]']
2155 15:58:09.505626 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2156 15:58:09.505696 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2158 16:02:29.505771 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2160 16:02:29.506106 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2162 16:02:29.506342 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2165 16:02:29.506729 end: 2 depthcharge-action (duration 00:05:00) [common]
2167 16:02:29.507069 Cleaning after the job
2168 16:02:29.507197 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447434/tftp-deploy-mri5yeev/ramdisk
2169 16:02:29.509095 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447434/tftp-deploy-mri5yeev/kernel
2170 16:02:29.510916 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447434/tftp-deploy-mri5yeev/modules
2171 16:02:29.511430 start: 5.1 power-off (timeout 00:00:30) [common]
2172 16:02:29.511700 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2173 16:02:29.592307 >> Command sent successfully.
2174 16:02:29.595479 Returned 0 in 0 seconds
2175 16:02:29.695944 end: 5.1 power-off (duration 00:00:00) [common]
2177 16:02:29.696411 start: 5.2 read-feedback (timeout 00:10:00) [common]
2178 16:02:29.696703 Listened to connection for namespace 'common' for up to 1s
2180 16:02:29.697081 Listened to connection for namespace 'common' for up to 1s
2181 16:02:30.697621 Finalising connection for namespace 'common'
2182 16:02:30.697827 Disconnecting from shell: Finalise
2183 16:02:30.697940
2184 16:02:30.798308 end: 5.2 read-feedback (duration 00:00:01) [common]
2185 16:02:30.798510 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11447434
2186 16:02:30.822356 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11447434
2187 16:02:30.822604 JobError: Your job cannot terminate cleanly.