Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 15:57:46.844594 lava-dispatcher, installed at version: 2023.06
2 15:57:46.844824 start: 0 validate
3 15:57:46.844986 Start time: 2023-09-06 15:57:46.844978+00:00 (UTC)
4 15:57:46.845138 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:57:46.845303 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:57:47.103545 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:57:47.103771 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1638-gdc4a7f7fb55c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:57:47.369304 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:57:47.369477 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1638-gdc4a7f7fb55c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:57:47.636571 validate duration: 0.79
12 15:57:47.636827 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:57:47.636925 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:57:47.637011 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:57:47.637132 Not decompressing ramdisk as can be used compressed.
16 15:57:47.637253 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:57:47.637351 saving as /var/lib/lava/dispatcher/tmp/11447415/tftp-deploy-0l4lt34g/ramdisk/rootfs.cpio.gz
18 15:57:47.637417 total size: 8418130 (8 MB)
19 15:57:47.638500 progress 0 % (0 MB)
20 15:57:47.641004 progress 5 % (0 MB)
21 15:57:47.643362 progress 10 % (0 MB)
22 15:57:47.645906 progress 15 % (1 MB)
23 15:57:47.648314 progress 20 % (1 MB)
24 15:57:47.650673 progress 25 % (2 MB)
25 15:57:47.653324 progress 30 % (2 MB)
26 15:57:47.655414 progress 35 % (2 MB)
27 15:57:47.657862 progress 40 % (3 MB)
28 15:57:47.660231 progress 45 % (3 MB)
29 15:57:47.662489 progress 50 % (4 MB)
30 15:57:47.664854 progress 55 % (4 MB)
31 15:57:47.667349 progress 60 % (4 MB)
32 15:57:47.669458 progress 65 % (5 MB)
33 15:57:47.671754 progress 70 % (5 MB)
34 15:57:47.674057 progress 75 % (6 MB)
35 15:57:47.676393 progress 80 % (6 MB)
36 15:57:47.678802 progress 85 % (6 MB)
37 15:57:47.681228 progress 90 % (7 MB)
38 15:57:47.683488 progress 95 % (7 MB)
39 15:57:47.685628 progress 100 % (8 MB)
40 15:57:47.685867 8 MB downloaded in 0.05 s (165.70 MB/s)
41 15:57:47.686027 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:57:47.686301 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:57:47.686388 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:57:47.686504 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:57:47.686674 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1638-gdc4a7f7fb55c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:57:47.686795 saving as /var/lib/lava/dispatcher/tmp/11447415/tftp-deploy-0l4lt34g/kernel/bzImage
48 15:57:47.686902 total size: 8490896 (8 MB)
49 15:57:47.687003 No compression specified
50 15:57:47.688198 progress 0 % (0 MB)
51 15:57:47.690420 progress 5 % (0 MB)
52 15:57:47.692838 progress 10 % (0 MB)
53 15:57:47.695186 progress 15 % (1 MB)
54 15:57:47.697678 progress 20 % (1 MB)
55 15:57:47.700157 progress 25 % (2 MB)
56 15:57:47.702671 progress 30 % (2 MB)
57 15:57:47.705153 progress 35 % (2 MB)
58 15:57:47.707463 progress 40 % (3 MB)
59 15:57:47.709875 progress 45 % (3 MB)
60 15:57:47.712256 progress 50 % (4 MB)
61 15:57:47.714552 progress 55 % (4 MB)
62 15:57:47.716967 progress 60 % (4 MB)
63 15:57:47.719311 progress 65 % (5 MB)
64 15:57:47.721610 progress 70 % (5 MB)
65 15:57:47.723932 progress 75 % (6 MB)
66 15:57:47.726191 progress 80 % (6 MB)
67 15:57:47.728515 progress 85 % (6 MB)
68 15:57:47.730765 progress 90 % (7 MB)
69 15:57:47.733246 progress 95 % (7 MB)
70 15:57:47.735783 progress 100 % (8 MB)
71 15:57:47.735933 8 MB downloaded in 0.05 s (165.16 MB/s)
72 15:57:47.736130 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:57:47.736444 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:57:47.736624 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:57:47.736839 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:57:47.737048 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1638-gdc4a7f7fb55c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:57:47.737127 saving as /var/lib/lava/dispatcher/tmp/11447415/tftp-deploy-0l4lt34g/modules/modules.tar
79 15:57:47.737212 total size: 250824 (0 MB)
80 15:57:47.737296 Using unxz to decompress xz
81 15:57:47.742692 progress 13 % (0 MB)
82 15:57:47.743159 progress 26 % (0 MB)
83 15:57:47.743488 progress 39 % (0 MB)
84 15:57:47.745183 progress 52 % (0 MB)
85 15:57:47.747163 progress 65 % (0 MB)
86 15:57:47.749263 progress 78 % (0 MB)
87 15:57:47.751179 progress 91 % (0 MB)
88 15:57:47.753176 progress 100 % (0 MB)
89 15:57:47.758861 0 MB downloaded in 0.02 s (11.05 MB/s)
90 15:57:47.759142 end: 1.3.1 http-download (duration 00:00:00) [common]
92 15:57:47.759546 end: 1.3 download-retry (duration 00:00:00) [common]
93 15:57:47.759682 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 15:57:47.759797 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 15:57:47.759896 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 15:57:47.760004 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 15:57:47.760252 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3
98 15:57:47.760439 makedir: /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin
99 15:57:47.760598 makedir: /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/tests
100 15:57:47.760744 makedir: /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/results
101 15:57:47.760880 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-add-keys
102 15:57:47.761050 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-add-sources
103 15:57:47.761206 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-background-process-start
104 15:57:47.761370 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-background-process-stop
105 15:57:47.761558 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-common-functions
106 15:57:47.761739 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-echo-ipv4
107 15:57:47.761918 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-install-packages
108 15:57:47.762094 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-installed-packages
109 15:57:47.762271 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-os-build
110 15:57:47.762447 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-probe-channel
111 15:57:47.762623 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-probe-ip
112 15:57:47.762796 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-target-ip
113 15:57:47.762945 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-target-mac
114 15:57:47.763096 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-target-storage
115 15:57:47.763279 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-test-case
116 15:57:47.763496 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-test-event
117 15:57:47.763680 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-test-feedback
118 15:57:47.763832 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-test-raise
119 15:57:47.763987 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-test-reference
120 15:57:47.764173 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-test-runner
121 15:57:47.764352 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-test-set
122 15:57:47.764531 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-test-shell
123 15:57:47.764714 Updating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-install-packages (oe)
124 15:57:47.764919 Updating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/bin/lava-installed-packages (oe)
125 15:57:47.765106 Creating /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/environment
126 15:57:47.765251 LAVA metadata
127 15:57:47.765362 - LAVA_JOB_ID=11447415
128 15:57:47.765473 - LAVA_DISPATCHER_IP=192.168.201.1
129 15:57:47.765631 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 15:57:47.765733 skipped lava-vland-overlay
131 15:57:47.765836 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 15:57:47.765942 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 15:57:47.766015 skipped lava-multinode-overlay
134 15:57:47.766137 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 15:57:47.766266 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 15:57:47.766382 Loading test definitions
137 15:57:47.766526 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 15:57:47.766643 Using /lava-11447415 at stage 0
139 15:57:47.767079 uuid=11447415_1.4.2.3.1 testdef=None
140 15:57:47.767205 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 15:57:47.767341 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 15:57:47.767986 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 15:57:47.768240 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 15:57:47.769209 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 15:57:47.769601 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 15:57:47.770542 runner path: /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/0/tests/0_dmesg test_uuid 11447415_1.4.2.3.1
149 15:57:47.770745 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 15:57:47.771009 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 15:57:47.771119 Using /lava-11447415 at stage 1
153 15:57:47.771569 uuid=11447415_1.4.2.3.5 testdef=None
154 15:57:47.771682 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 15:57:47.771810 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 15:57:47.772548 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 15:57:47.772849 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 15:57:47.773830 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 15:57:47.774219 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 15:57:47.775186 runner path: /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/1/tests/1_bootrr test_uuid 11447415_1.4.2.3.5
163 15:57:47.775390 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 15:57:47.775711 Creating lava-test-runner.conf files
166 15:57:47.775796 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/0 for stage 0
167 15:57:47.775921 - 0_dmesg
168 15:57:47.776014 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11447415/lava-overlay-cg118im3/lava-11447415/1 for stage 1
169 15:57:47.776154 - 1_bootrr
170 15:57:47.776293 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 15:57:47.776422 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 15:57:47.785620 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 15:57:47.785767 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 15:57:47.785880 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 15:57:47.785985 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 15:57:47.786091 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 15:57:48.052433 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 15:57:48.052820 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 15:57:48.052963 extracting modules file /var/lib/lava/dispatcher/tmp/11447415/tftp-deploy-0l4lt34g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11447415/extract-overlay-ramdisk-mw9t_tez/ramdisk
180 15:57:48.067851 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 15:57:48.068004 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 15:57:48.068124 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11447415/compress-overlay-tcjyxe0u/overlay-1.4.2.4.tar.gz to ramdisk
183 15:57:48.068211 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11447415/compress-overlay-tcjyxe0u/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11447415/extract-overlay-ramdisk-mw9t_tez/ramdisk
184 15:57:48.078547 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 15:57:48.078708 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 15:57:48.078825 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 15:57:48.078934 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 15:57:48.079029 Building ramdisk /var/lib/lava/dispatcher/tmp/11447415/extract-overlay-ramdisk-mw9t_tez/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11447415/extract-overlay-ramdisk-mw9t_tez/ramdisk
189 15:57:48.217234 >> 49788 blocks
190 15:57:49.073774 rename /var/lib/lava/dispatcher/tmp/11447415/extract-overlay-ramdisk-mw9t_tez/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11447415/tftp-deploy-0l4lt34g/ramdisk/ramdisk.cpio.gz
191 15:57:49.074245 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 15:57:49.074395 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 15:57:49.074516 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 15:57:49.074627 No mkimage arch provided, not using FIT.
195 15:57:49.074737 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 15:57:49.074844 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 15:57:49.074976 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 15:57:49.075115 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 15:57:49.075241 No LXC device requested
200 15:57:49.075366 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 15:57:49.075500 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 15:57:49.075634 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 15:57:49.075725 Checking files for TFTP limit of 4294967296 bytes.
204 15:57:49.076169 end: 1 tftp-deploy (duration 00:00:01) [common]
205 15:57:49.076290 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 15:57:49.076402 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 15:57:49.076542 substitutions:
208 15:57:49.076617 - {DTB}: None
209 15:57:49.076722 - {INITRD}: 11447415/tftp-deploy-0l4lt34g/ramdisk/ramdisk.cpio.gz
210 15:57:49.076823 - {KERNEL}: 11447415/tftp-deploy-0l4lt34g/kernel/bzImage
211 15:57:49.076923 - {LAVA_MAC}: None
212 15:57:49.077021 - {PRESEED_CONFIG}: None
213 15:57:49.077120 - {PRESEED_LOCAL}: None
214 15:57:49.077217 - {RAMDISK}: 11447415/tftp-deploy-0l4lt34g/ramdisk/ramdisk.cpio.gz
215 15:57:49.077315 - {ROOT_PART}: None
216 15:57:49.077411 - {ROOT}: None
217 15:57:49.077508 - {SERVER_IP}: 192.168.201.1
218 15:57:49.077604 - {TEE}: None
219 15:57:49.077701 Parsed boot commands:
220 15:57:49.077796 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 15:57:49.078037 Parsed boot commands: tftpboot 192.168.201.1 11447415/tftp-deploy-0l4lt34g/kernel/bzImage 11447415/tftp-deploy-0l4lt34g/kernel/cmdline 11447415/tftp-deploy-0l4lt34g/ramdisk/ramdisk.cpio.gz
222 15:57:49.078165 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 15:57:49.078298 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 15:57:49.078441 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 15:57:49.078575 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 15:57:49.078684 Not connected, no need to disconnect.
227 15:57:49.078806 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 15:57:49.078933 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 15:57:49.079039 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-14'
230 15:57:49.083465 Setting prompt string to ['lava-test: # ']
231 15:57:49.083881 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 15:57:49.084010 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 15:57:49.084132 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 15:57:49.084246 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 15:57:49.084458 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
236 15:57:54.222857 >> Command sent successfully.
237 15:57:54.225681 Returned 0 in 5 seconds
238 15:57:54.326101 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 15:57:54.326427 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 15:57:54.326526 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 15:57:54.326621 Setting prompt string to 'Starting depthcharge on Voema...'
243 15:57:54.326694 Changing prompt to 'Starting depthcharge on Voema...'
244 15:57:54.326765 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 15:57:54.327038 [Enter `^Ec?' for help]
246 15:57:55.891843
247 15:57:55.892013
248 15:57:55.901541 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 15:57:55.908327 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
250 15:57:55.911468 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 15:57:55.915735 CPU: AES supported, TXT NOT supported, VT supported
252 15:57:55.922423 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 15:57:55.925776 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 15:57:55.932521 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 15:57:55.935865 VBOOT: Loading verstage.
256 15:57:55.939342 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 15:57:55.945946 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 15:57:55.949316 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 15:57:55.958729 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 15:57:55.965233 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 15:57:55.965324
262 15:57:55.965414
263 15:57:55.976000 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 15:57:55.992472 Probing TPM: . done!
265 15:57:55.995880 TPM ready after 0 ms
266 15:57:55.999190 Connected to device vid:did:rid of 1ae0:0028:00
267 15:57:56.010509 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
268 15:57:56.016803 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 15:57:56.020089 Initialized TPM device CR50 revision 0
270 15:57:56.079494 tlcl_send_startup: Startup return code is 0
271 15:57:56.079652 TPM: setup succeeded
272 15:57:56.093954 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 15:57:56.107768 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 15:57:56.120478 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 15:57:56.130661 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 15:57:56.133881 Chrome EC: UHEPI supported
277 15:57:56.137585 Phase 1
278 15:57:56.140771 FMAP: area GBB found @ 1805000 (458752 bytes)
279 15:57:56.150779 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 15:57:56.158066 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 15:57:56.164004 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 15:57:56.170715 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 15:57:56.173475 Recovery requested (1009000e)
284 15:57:56.177290 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 15:57:56.188589 tlcl_extend: response is 0
286 15:57:56.195260 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 15:57:56.205406 tlcl_extend: response is 0
288 15:57:56.212103 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 15:57:56.218698 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 15:57:56.225268 BS: verstage times (exec / console): total (unknown) / 142 ms
291 15:57:56.225402
292 15:57:56.225536
293 15:57:56.238379 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 15:57:56.245251 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 15:57:56.248553 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 15:57:56.251850 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 15:57:56.258441 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 15:57:56.261858 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 15:57:56.265282 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 15:57:56.267939 TCO_STS: 0000 0000
301 15:57:56.271334 GEN_PMCON: d0015038 00002200
302 15:57:56.274550 GBLRST_CAUSE: 00000000 00000000
303 15:57:56.277894 HPR_CAUSE0: 00000000
304 15:57:56.278001 prev_sleep_state 5
305 15:57:56.281145 Boot Count incremented to 11459
306 15:57:56.288273 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 15:57:56.294325 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 15:57:56.304336 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 15:57:56.310920 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 15:57:56.314633 Chrome EC: UHEPI supported
311 15:57:56.321142 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 15:57:56.332486 Probing TPM: done!
313 15:57:56.339502 Connected to device vid:did:rid of 1ae0:0028:00
314 15:57:56.349091 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
315 15:57:56.352182 Initialized TPM device CR50 revision 0
316 15:57:56.370590 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 15:57:56.374063 MRC: Hash idx 0x100b comparison successful.
318 15:57:56.376773 MRC cache found, size faa8
319 15:57:56.376883 bootmode is set to: 2
320 15:57:56.380733 SPD index = 2
321 15:57:56.387300 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 15:57:56.390511 SPD: module type is LPDDR4X
323 15:57:56.393885 SPD: module part number is MT53D1G64D4NW-046
324 15:57:56.400587 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
325 15:57:56.403958 SPD: device width 16 bits, bus width 16 bits
326 15:57:56.407888 SPD: module size is 2048 MB (per channel)
327 15:57:56.840396 CBMEM:
328 15:57:56.843633 IMD: root @ 0x76fff000 254 entries.
329 15:57:56.846929 IMD: root @ 0x76ffec00 62 entries.
330 15:57:56.850286 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 15:57:56.856884 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 15:57:56.860244 External stage cache:
333 15:57:56.863357 IMD: root @ 0x7b3ff000 254 entries.
334 15:57:56.866439 IMD: root @ 0x7b3fec00 62 entries.
335 15:57:56.881776 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 15:57:56.888880 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 15:57:56.894942 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 15:57:56.908893 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 15:57:56.915981 cse_lite: Skip switching to RW in the recovery path
340 15:57:56.916081 8 DIMMs found
341 15:57:56.916173 SMM Memory Map
342 15:57:56.922629 SMRAM : 0x7b000000 0x800000
343 15:57:56.925937 Subregion 0: 0x7b000000 0x200000
344 15:57:56.929199 Subregion 1: 0x7b200000 0x200000
345 15:57:56.932507 Subregion 2: 0x7b400000 0x400000
346 15:57:56.932590 top_of_ram = 0x77000000
347 15:57:56.939167 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 15:57:56.945204 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 15:57:56.948555 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 15:57:56.955334 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 15:57:56.961848 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 15:57:56.968466 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 15:57:56.978613 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 15:57:56.982045 Processing 211 relocs. Offset value of 0x74c0b000
355 15:57:56.991881 BS: romstage times (exec / console): total (unknown) / 277 ms
356 15:57:56.997853
357 15:57:56.997949
358 15:57:57.007774 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 15:57:57.011010 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 15:57:57.020822 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 15:57:57.027376 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 15:57:57.033977 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 15:57:57.040652 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 15:57:57.084812 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 15:57:57.090970 Processing 5008 relocs. Offset value of 0x75d98000
366 15:57:57.094635 BS: postcar times (exec / console): total (unknown) / 59 ms
367 15:57:57.098044
368 15:57:57.098135
369 15:57:57.107746 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 15:57:57.107837 Normal boot
371 15:57:57.110908 FW_CONFIG value is 0x804c02
372 15:57:57.113942 PCI: 00:07.0 disabled by fw_config
373 15:57:57.117640 PCI: 00:07.1 disabled by fw_config
374 15:57:57.124186 PCI: 00:0d.2 disabled by fw_config
375 15:57:57.127377 PCI: 00:1c.7 disabled by fw_config
376 15:57:57.130754 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 15:57:57.137185 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 15:57:57.143675 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 15:57:57.146990 GENERIC: 0.0 disabled by fw_config
380 15:57:57.150424 GENERIC: 1.0 disabled by fw_config
381 15:57:57.153772 fw_config match found: DB_USB=USB3_ACTIVE
382 15:57:57.157117 fw_config match found: DB_USB=USB3_ACTIVE
383 15:57:57.163893 fw_config match found: DB_USB=USB3_ACTIVE
384 15:57:57.166619 fw_config match found: DB_USB=USB3_ACTIVE
385 15:57:57.169932 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 15:57:57.180459 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 15:57:57.186455 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 15:57:57.193649 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 15:57:57.200193 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 15:57:57.204127 microcode: Update skipped, already up-to-date
391 15:57:57.210181 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 15:57:57.238303 Detected 4 core, 8 thread CPU.
393 15:57:57.241672 Setting up SMI for CPU
394 15:57:57.244649 IED base = 0x7b400000
395 15:57:57.247849 IED size = 0x00400000
396 15:57:57.247957 Will perform SMM setup.
397 15:57:57.254421 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
398 15:57:57.261567 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 15:57:57.268155 Processing 16 relocs. Offset value of 0x00030000
400 15:57:57.271411 Attempting to start 7 APs
401 15:57:57.274609 Waiting for 10ms after sending INIT.
402 15:57:57.290224 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 15:57:57.293658 AP: slot 7 apic_id 2.
404 15:57:57.293777 done.
405 15:57:57.296925 AP: slot 6 apic_id 4.
406 15:57:57.297046 AP: slot 2 apic_id 5.
407 15:57:57.299994 AP: slot 5 apic_id 6.
408 15:57:57.303270 AP: slot 4 apic_id 7.
409 15:57:57.306470 AP: slot 3 apic_id 3.
410 15:57:57.309871 Waiting for 2nd SIPI to complete...done.
411 15:57:57.316508 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 15:57:57.322933 Processing 13 relocs. Offset value of 0x00038000
413 15:57:57.326028 Unable to locate Global NVS
414 15:57:57.332740 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 15:57:57.336491 Installing permanent SMM handler to 0x7b000000
416 15:57:57.346432 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 15:57:57.349371 Processing 794 relocs. Offset value of 0x7b010000
418 15:57:57.359501 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 15:57:57.362789 Processing 13 relocs. Offset value of 0x7b008000
420 15:57:57.369625 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 15:57:57.375699 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 15:57:57.382291 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 15:57:57.385573 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 15:57:57.392649 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 15:57:57.398681 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 15:57:57.405302 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 15:57:57.409079 Unable to locate Global NVS
428 15:57:57.415498 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 15:57:57.418870 Clearing SMI status registers
430 15:57:57.422310 SMI_STS: PM1
431 15:57:57.422423 PM1_STS: PWRBTN
432 15:57:57.428952 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 15:57:57.432250 In relocation handler: CPU 0
434 15:57:57.435484 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 15:57:57.441737 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 15:57:57.444884 Relocation complete.
437 15:57:57.451686 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 15:57:57.454958 In relocation handler: CPU 1
439 15:57:57.458049 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 15:57:57.461366 Relocation complete.
441 15:57:57.468334 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
442 15:57:57.471650 In relocation handler: CPU 3
443 15:57:57.474432 New SMBASE=0x7afff400 IEDBASE=0x7b400000
444 15:57:57.477812 Relocation complete.
445 15:57:57.484402 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
446 15:57:57.487636 In relocation handler: CPU 7
447 15:57:57.490947 New SMBASE=0x7affe400 IEDBASE=0x7b400000
448 15:57:57.494693 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 15:57:57.497961 Relocation complete.
450 15:57:57.504296 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
451 15:57:57.507603 In relocation handler: CPU 4
452 15:57:57.510956 New SMBASE=0x7afff000 IEDBASE=0x7b400000
453 15:57:57.514220 Relocation complete.
454 15:57:57.521004 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
455 15:57:57.524345 In relocation handler: CPU 5
456 15:57:57.527056 New SMBASE=0x7affec00 IEDBASE=0x7b400000
457 15:57:57.533771 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 15:57:57.537097 Relocation complete.
459 15:57:57.543651 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
460 15:57:57.547329 In relocation handler: CPU 6
461 15:57:57.550630 New SMBASE=0x7affe800 IEDBASE=0x7b400000
462 15:57:57.553823 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 15:57:57.556850 Relocation complete.
464 15:57:57.563538 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
465 15:57:57.566860 In relocation handler: CPU 2
466 15:57:57.569987 New SMBASE=0x7afff800 IEDBASE=0x7b400000
467 15:57:57.573770 Relocation complete.
468 15:57:57.576852 Initializing CPU #0
469 15:57:57.580143 CPU: vendor Intel device 806c1
470 15:57:57.583503 CPU: family 06, model 8c, stepping 01
471 15:57:57.586850 Clearing out pending MCEs
472 15:57:57.586936 Setting up local APIC...
473 15:57:57.590108 apic_id: 0x00 done.
474 15:57:57.593376 Turbo is available but hidden
475 15:57:57.596633 Turbo is available and visible
476 15:57:57.599905 microcode: Update skipped, already up-to-date
477 15:57:57.603150 CPU #0 initialized
478 15:57:57.606452 Initializing CPU #1
479 15:57:57.606556 Initializing CPU #7
480 15:57:57.609778 Initializing CPU #3
481 15:57:57.613139 CPU: vendor Intel device 806c1
482 15:57:57.616462 CPU: family 06, model 8c, stepping 01
483 15:57:57.619747 Initializing CPU #5
484 15:57:57.619827 Initializing CPU #4
485 15:57:57.622770 CPU: vendor Intel device 806c1
486 15:57:57.626500 CPU: family 06, model 8c, stepping 01
487 15:57:57.629257 CPU: vendor Intel device 806c1
488 15:57:57.633134 CPU: family 06, model 8c, stepping 01
489 15:57:57.635825 Clearing out pending MCEs
490 15:57:57.639140 Clearing out pending MCEs
491 15:57:57.642418 Setting up local APIC...
492 15:57:57.645737 Clearing out pending MCEs
493 15:57:57.649778 CPU: vendor Intel device 806c1
494 15:57:57.653668 CPU: family 06, model 8c, stepping 01
495 15:57:57.653778 Initializing CPU #6
496 15:57:57.657021 Initializing CPU #2
497 15:57:57.657102 Clearing out pending MCEs
498 15:57:57.660390 Setting up local APIC...
499 15:57:57.663492 Setting up local APIC...
500 15:57:57.667204 apic_id: 0x06 done.
501 15:57:57.667308 Setting up local APIC...
502 15:57:57.670395 CPU: vendor Intel device 806c1
503 15:57:57.677195 CPU: family 06, model 8c, stepping 01
504 15:57:57.677308 CPU: vendor Intel device 806c1
505 15:57:57.683494 CPU: family 06, model 8c, stepping 01
506 15:57:57.683582 Clearing out pending MCEs
507 15:57:57.686720 apic_id: 0x07 done.
508 15:57:57.689963 microcode: Update skipped, already up-to-date
509 15:57:57.696610 microcode: Update skipped, already up-to-date
510 15:57:57.696712 CPU #5 initialized
511 15:57:57.699915 apic_id: 0x02 done.
512 15:57:57.703100 apic_id: 0x03 done.
513 15:57:57.706395 microcode: Update skipped, already up-to-date
514 15:57:57.709721 CPU: vendor Intel device 806c1
515 15:57:57.713674 CPU: family 06, model 8c, stepping 01
516 15:57:57.720162 microcode: Update skipped, already up-to-date
517 15:57:57.720246 CPU #7 initialized
518 15:57:57.723372 CPU #3 initialized
519 15:57:57.726088 Clearing out pending MCEs
520 15:57:57.726173 Setting up local APIC...
521 15:57:57.729772 CPU #4 initialized
522 15:57:57.733330 Setting up local APIC...
523 15:57:57.733413 apic_id: 0x04 done.
524 15:57:57.736208 apic_id: 0x05 done.
525 15:57:57.739519 microcode: Update skipped, already up-to-date
526 15:57:57.746207 microcode: Update skipped, already up-to-date
527 15:57:57.746291 CPU #6 initialized
528 15:57:57.749422 CPU #2 initialized
529 15:57:57.752574 Clearing out pending MCEs
530 15:57:57.755948 Setting up local APIC...
531 15:57:57.756031 apic_id: 0x01 done.
532 15:57:57.762567 microcode: Update skipped, already up-to-date
533 15:57:57.762650 CPU #1 initialized
534 15:57:57.769600 bsp_do_flight_plan done after 454 msecs.
535 15:57:57.773006 CPU: frequency set to 4400 MHz
536 15:57:57.773117 Enabling SMIs.
537 15:57:57.779436 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 15:57:57.794923 SATAXPCIE1 indicates PCIe NVMe is present
539 15:57:57.798199 Probing TPM: done!
540 15:57:57.801540 Connected to device vid:did:rid of 1ae0:0028:00
541 15:57:57.812351 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
542 15:57:57.815641 Initialized TPM device CR50 revision 0
543 15:57:57.819005 Enabling S0i3.4
544 15:57:57.825550 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 15:57:57.828861 Found a VBT of 8704 bytes after decompression
546 15:57:57.835510 cse_lite: CSE RO boot. HybridStorageMode disabled
547 15:57:57.841923 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 15:57:57.915431 FSPS returned 0
549 15:57:57.918674 Executing Phase 1 of FspMultiPhaseSiInit
550 15:57:57.928498 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 15:57:57.931901 port C0 DISC req: usage 1 usb3 1 usb2 5
552 15:57:57.935287 Raw Buffer output 0 00000511
553 15:57:57.938523 Raw Buffer output 1 00000000
554 15:57:57.942522 pmc_send_ipc_cmd succeeded
555 15:57:57.948875 port C1 DISC req: usage 1 usb3 2 usb2 3
556 15:57:57.948986 Raw Buffer output 0 00000321
557 15:57:57.952639 Raw Buffer output 1 00000000
558 15:57:57.956811 pmc_send_ipc_cmd succeeded
559 15:57:57.961412 Detected 4 core, 8 thread CPU.
560 15:57:57.964725 Detected 4 core, 8 thread CPU.
561 15:57:58.165490 Display FSP Version Info HOB
562 15:57:58.168461 Reference Code - CPU = a.0.4c.31
563 15:57:58.172163 uCode Version = 0.0.0.86
564 15:57:58.175142 TXT ACM version = ff.ff.ff.ffff
565 15:57:58.178613 Reference Code - ME = a.0.4c.31
566 15:57:58.181508 MEBx version = 0.0.0.0
567 15:57:58.185249 ME Firmware Version = Consumer SKU
568 15:57:58.188567 Reference Code - PCH = a.0.4c.31
569 15:57:58.191318 PCH-CRID Status = Disabled
570 15:57:58.195308 PCH-CRID Original Value = ff.ff.ff.ffff
571 15:57:58.198432 PCH-CRID New Value = ff.ff.ff.ffff
572 15:57:58.201591 OPROM - RST - RAID = ff.ff.ff.ffff
573 15:57:58.204991 PCH Hsio Version = 4.0.0.0
574 15:57:58.208313 Reference Code - SA - System Agent = a.0.4c.31
575 15:57:58.211579 Reference Code - MRC = 2.0.0.1
576 15:57:58.214967 SA - PCIe Version = a.0.4c.31
577 15:57:58.218097 SA-CRID Status = Disabled
578 15:57:58.221205 SA-CRID Original Value = 0.0.0.1
579 15:57:58.224267 SA-CRID New Value = 0.0.0.1
580 15:57:58.227985 OPROM - VBIOS = ff.ff.ff.ffff
581 15:57:58.232022 IO Manageability Engine FW Version = 11.1.4.0
582 15:57:58.235313 PHY Build Version = 0.0.0.e0
583 15:57:58.238614 Thunderbolt(TM) FW Version = 0.0.0.0
584 15:57:58.245531 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 15:57:58.248815 ITSS IRQ Polarities Before:
586 15:57:58.248899 IPC0: 0xffffffff
587 15:57:58.251502 IPC1: 0xffffffff
588 15:57:58.251633 IPC2: 0xffffffff
589 15:57:58.254932 IPC3: 0xffffffff
590 15:57:58.258275 ITSS IRQ Polarities After:
591 15:57:58.258358 IPC0: 0xffffffff
592 15:57:58.261668 IPC1: 0xffffffff
593 15:57:58.261750 IPC2: 0xffffffff
594 15:57:58.264885 IPC3: 0xffffffff
595 15:57:58.268111 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 15:57:58.281394 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 15:57:58.291281 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 15:57:58.304507 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 15:57:58.311222 BS: BS_DEV_INIT_CHIPS run times (exec / console): 289 / 236 ms
600 15:57:58.314605 Enumerating buses...
601 15:57:58.317809 Show all devs... Before device enumeration.
602 15:57:58.321188 Root Device: enabled 1
603 15:57:58.321272 DOMAIN: 0000: enabled 1
604 15:57:58.324384 CPU_CLUSTER: 0: enabled 1
605 15:57:58.327571 PCI: 00:00.0: enabled 1
606 15:57:58.330791 PCI: 00:02.0: enabled 1
607 15:57:58.330912 PCI: 00:04.0: enabled 1
608 15:57:58.334503 PCI: 00:05.0: enabled 1
609 15:57:58.337547 PCI: 00:06.0: enabled 0
610 15:57:58.341055 PCI: 00:07.0: enabled 0
611 15:57:58.341138 PCI: 00:07.1: enabled 0
612 15:57:58.344642 PCI: 00:07.2: enabled 0
613 15:57:58.347646 PCI: 00:07.3: enabled 0
614 15:57:58.350797 PCI: 00:08.0: enabled 1
615 15:57:58.350880 PCI: 00:09.0: enabled 0
616 15:57:58.353857 PCI: 00:0a.0: enabled 0
617 15:57:58.357369 PCI: 00:0d.0: enabled 1
618 15:57:58.357492 PCI: 00:0d.1: enabled 0
619 15:57:58.360678 PCI: 00:0d.2: enabled 0
620 15:57:58.363990 PCI: 00:0d.3: enabled 0
621 15:57:58.367268 PCI: 00:0e.0: enabled 0
622 15:57:58.367391 PCI: 00:10.2: enabled 1
623 15:57:58.370538 PCI: 00:10.6: enabled 0
624 15:57:58.373856 PCI: 00:10.7: enabled 0
625 15:57:58.377155 PCI: 00:12.0: enabled 0
626 15:57:58.377258 PCI: 00:12.6: enabled 0
627 15:57:58.380521 PCI: 00:13.0: enabled 0
628 15:57:58.383913 PCI: 00:14.0: enabled 1
629 15:57:58.387211 PCI: 00:14.1: enabled 0
630 15:57:58.387315 PCI: 00:14.2: enabled 1
631 15:57:58.390457 PCI: 00:14.3: enabled 1
632 15:57:58.393618 PCI: 00:15.0: enabled 1
633 15:57:58.396685 PCI: 00:15.1: enabled 1
634 15:57:58.396802 PCI: 00:15.2: enabled 1
635 15:57:58.400554 PCI: 00:15.3: enabled 1
636 15:57:58.403558 PCI: 00:16.0: enabled 1
637 15:57:58.407132 PCI: 00:16.1: enabled 0
638 15:57:58.407215 PCI: 00:16.2: enabled 0
639 15:57:58.410180 PCI: 00:16.3: enabled 0
640 15:57:58.413490 PCI: 00:16.4: enabled 0
641 15:57:58.416677 PCI: 00:16.5: enabled 0
642 15:57:58.416761 PCI: 00:17.0: enabled 1
643 15:57:58.419922 PCI: 00:19.0: enabled 0
644 15:57:58.423145 PCI: 00:19.1: enabled 1
645 15:57:58.423229 PCI: 00:19.2: enabled 0
646 15:57:58.426496 PCI: 00:1c.0: enabled 1
647 15:57:58.429670 PCI: 00:1c.1: enabled 0
648 15:57:58.432924 PCI: 00:1c.2: enabled 0
649 15:57:58.433008 PCI: 00:1c.3: enabled 0
650 15:57:58.436379 PCI: 00:1c.4: enabled 0
651 15:57:58.439699 PCI: 00:1c.5: enabled 0
652 15:57:58.443000 PCI: 00:1c.6: enabled 1
653 15:57:58.443084 PCI: 00:1c.7: enabled 0
654 15:57:58.446483 PCI: 00:1d.0: enabled 1
655 15:57:58.449788 PCI: 00:1d.1: enabled 0
656 15:57:58.452834 PCI: 00:1d.2: enabled 1
657 15:57:58.452944 PCI: 00:1d.3: enabled 0
658 15:57:58.455871 PCI: 00:1e.0: enabled 1
659 15:57:58.459752 PCI: 00:1e.1: enabled 0
660 15:57:58.462882 PCI: 00:1e.2: enabled 1
661 15:57:58.462965 PCI: 00:1e.3: enabled 1
662 15:57:58.465760 PCI: 00:1f.0: enabled 1
663 15:57:58.469498 PCI: 00:1f.1: enabled 0
664 15:57:58.472447 PCI: 00:1f.2: enabled 1
665 15:57:58.472530 PCI: 00:1f.3: enabled 1
666 15:57:58.476192 PCI: 00:1f.4: enabled 0
667 15:57:58.479416 PCI: 00:1f.5: enabled 1
668 15:57:58.482645 PCI: 00:1f.6: enabled 0
669 15:57:58.482728 PCI: 00:1f.7: enabled 0
670 15:57:58.485988 APIC: 00: enabled 1
671 15:57:58.489379 GENERIC: 0.0: enabled 1
672 15:57:58.489462 GENERIC: 0.0: enabled 1
673 15:57:58.492658 GENERIC: 1.0: enabled 1
674 15:57:58.495952 GENERIC: 0.0: enabled 1
675 15:57:58.498956 GENERIC: 1.0: enabled 1
676 15:57:58.499057 USB0 port 0: enabled 1
677 15:57:58.502036 GENERIC: 0.0: enabled 1
678 15:57:58.505389 USB0 port 0: enabled 1
679 15:57:58.508979 GENERIC: 0.0: enabled 1
680 15:57:58.509090 I2C: 00:1a: enabled 1
681 15:57:58.512111 I2C: 00:31: enabled 1
682 15:57:58.515225 I2C: 00:32: enabled 1
683 15:57:58.515308 I2C: 00:10: enabled 1
684 15:57:58.518795 I2C: 00:15: enabled 1
685 15:57:58.522127 GENERIC: 0.0: enabled 0
686 15:57:58.522210 GENERIC: 1.0: enabled 0
687 15:57:58.525330 GENERIC: 0.0: enabled 1
688 15:57:58.528584 SPI: 00: enabled 1
689 15:57:58.528667 SPI: 00: enabled 1
690 15:57:58.531991 PNP: 0c09.0: enabled 1
691 15:57:58.535310 GENERIC: 0.0: enabled 1
692 15:57:58.538456 USB3 port 0: enabled 1
693 15:57:58.538550 USB3 port 1: enabled 1
694 15:57:58.541598 USB3 port 2: enabled 0
695 15:57:58.544963 USB3 port 3: enabled 0
696 15:57:58.545054 USB2 port 0: enabled 0
697 15:57:58.548264 USB2 port 1: enabled 1
698 15:57:58.551545 USB2 port 2: enabled 1
699 15:57:58.551668 USB2 port 3: enabled 0
700 15:57:58.554829 USB2 port 4: enabled 1
701 15:57:58.558107 USB2 port 5: enabled 0
702 15:57:58.561980 USB2 port 6: enabled 0
703 15:57:58.562065 USB2 port 7: enabled 0
704 15:57:58.565275 USB2 port 8: enabled 0
705 15:57:58.568325 USB2 port 9: enabled 0
706 15:57:58.568412 USB3 port 0: enabled 0
707 15:57:58.571479 USB3 port 1: enabled 1
708 15:57:58.574561 USB3 port 2: enabled 0
709 15:57:58.578311 USB3 port 3: enabled 0
710 15:57:58.578387 GENERIC: 0.0: enabled 1
711 15:57:58.581368 GENERIC: 1.0: enabled 1
712 15:57:58.584614 APIC: 01: enabled 1
713 15:57:58.584691 APIC: 05: enabled 1
714 15:57:58.588218 APIC: 03: enabled 1
715 15:57:58.591028 APIC: 07: enabled 1
716 15:57:58.591141 APIC: 06: enabled 1
717 15:57:58.594927 APIC: 04: enabled 1
718 15:57:58.595073 APIC: 02: enabled 1
719 15:57:58.598162 Compare with tree...
720 15:57:58.600958 Root Device: enabled 1
721 15:57:58.604361 DOMAIN: 0000: enabled 1
722 15:57:58.604440 PCI: 00:00.0: enabled 1
723 15:57:58.607634 PCI: 00:02.0: enabled 1
724 15:57:58.610836 PCI: 00:04.0: enabled 1
725 15:57:58.614035 GENERIC: 0.0: enabled 1
726 15:57:58.617403 PCI: 00:05.0: enabled 1
727 15:57:58.617479 PCI: 00:06.0: enabled 0
728 15:57:58.620682 PCI: 00:07.0: enabled 0
729 15:57:58.624382 GENERIC: 0.0: enabled 1
730 15:57:58.627556 PCI: 00:07.1: enabled 0
731 15:57:58.630780 GENERIC: 1.0: enabled 1
732 15:57:58.630865 PCI: 00:07.2: enabled 0
733 15:57:58.634049 GENERIC: 0.0: enabled 1
734 15:57:58.637476 PCI: 00:07.3: enabled 0
735 15:57:58.640836 GENERIC: 1.0: enabled 1
736 15:57:58.644144 PCI: 00:08.0: enabled 1
737 15:57:58.644229 PCI: 00:09.0: enabled 0
738 15:57:58.647586 PCI: 00:0a.0: enabled 0
739 15:57:58.650795 PCI: 00:0d.0: enabled 1
740 15:57:58.654183 USB0 port 0: enabled 1
741 15:57:58.657529 USB3 port 0: enabled 1
742 15:57:58.660788 USB3 port 1: enabled 1
743 15:57:58.660866 USB3 port 2: enabled 0
744 15:57:58.663789 USB3 port 3: enabled 0
745 15:57:58.666969 PCI: 00:0d.1: enabled 0
746 15:57:58.670332 PCI: 00:0d.2: enabled 0
747 15:57:58.673708 GENERIC: 0.0: enabled 1
748 15:57:58.673808 PCI: 00:0d.3: enabled 0
749 15:57:58.676802 PCI: 00:0e.0: enabled 0
750 15:57:58.680707 PCI: 00:10.2: enabled 1
751 15:57:58.683963 PCI: 00:10.6: enabled 0
752 15:57:58.687207 PCI: 00:10.7: enabled 0
753 15:57:58.687311 PCI: 00:12.0: enabled 0
754 15:57:58.690597 PCI: 00:12.6: enabled 0
755 15:57:58.693726 PCI: 00:13.0: enabled 0
756 15:57:58.696729 PCI: 00:14.0: enabled 1
757 15:57:58.700529 USB0 port 0: enabled 1
758 15:57:58.700630 USB2 port 0: enabled 0
759 15:57:58.703356 USB2 port 1: enabled 1
760 15:57:58.706679 USB2 port 2: enabled 1
761 15:57:58.710032 USB2 port 3: enabled 0
762 15:57:58.713395 USB2 port 4: enabled 1
763 15:57:58.716382 USB2 port 5: enabled 0
764 15:57:58.716458 USB2 port 6: enabled 0
765 15:57:58.720325 USB2 port 7: enabled 0
766 15:57:58.723503 USB2 port 8: enabled 0
767 15:57:58.726840 USB2 port 9: enabled 0
768 15:57:58.730033 USB3 port 0: enabled 0
769 15:57:58.733106 USB3 port 1: enabled 1
770 15:57:58.733185 USB3 port 2: enabled 0
771 15:57:58.736175 USB3 port 3: enabled 0
772 15:57:58.739819 PCI: 00:14.1: enabled 0
773 15:57:58.743130 PCI: 00:14.2: enabled 1
774 15:57:58.746532 PCI: 00:14.3: enabled 1
775 15:57:58.746638 GENERIC: 0.0: enabled 1
776 15:57:58.749278 PCI: 00:15.0: enabled 1
777 15:57:58.753227 I2C: 00:1a: enabled 1
778 15:57:58.756376 I2C: 00:31: enabled 1
779 15:57:58.759526 I2C: 00:32: enabled 1
780 15:57:58.759673 PCI: 00:15.1: enabled 1
781 15:57:58.762936 I2C: 00:10: enabled 1
782 15:57:58.766010 PCI: 00:15.2: enabled 1
783 15:57:58.769194 PCI: 00:15.3: enabled 1
784 15:57:58.772868 PCI: 00:16.0: enabled 1
785 15:57:58.772951 PCI: 00:16.1: enabled 0
786 15:57:58.776160 PCI: 00:16.2: enabled 0
787 15:57:58.779401 PCI: 00:16.3: enabled 0
788 15:57:58.782588 PCI: 00:16.4: enabled 0
789 15:57:58.782671 PCI: 00:16.5: enabled 0
790 15:57:58.785753 PCI: 00:17.0: enabled 1
791 15:57:58.789115 PCI: 00:19.0: enabled 0
792 15:57:58.792498 PCI: 00:19.1: enabled 1
793 15:57:58.795898 I2C: 00:15: enabled 1
794 15:57:58.795999 PCI: 00:19.2: enabled 0
795 15:57:58.799137 PCI: 00:1d.0: enabled 1
796 15:57:58.802887 GENERIC: 0.0: enabled 1
797 15:57:58.806041 PCI: 00:1e.0: enabled 1
798 15:57:58.808950 PCI: 00:1e.1: enabled 0
799 15:57:58.809039 PCI: 00:1e.2: enabled 1
800 15:57:58.812684 SPI: 00: enabled 1
801 15:57:58.815681 PCI: 00:1e.3: enabled 1
802 15:57:58.818867 SPI: 00: enabled 1
803 15:57:58.818977 PCI: 00:1f.0: enabled 1
804 15:57:58.822039 PNP: 0c09.0: enabled 1
805 15:57:58.870122 PCI: 00:1f.1: enabled 0
806 15:57:58.870225 PCI: 00:1f.2: enabled 1
807 15:57:58.870497 GENERIC: 0.0: enabled 1
808 15:57:58.870658 GENERIC: 0.0: enabled 1
809 15:57:58.870886 GENERIC: 1.0: enabled 1
810 15:57:58.871027 PCI: 00:1f.3: enabled 1
811 15:57:58.871152 PCI: 00:1f.4: enabled 0
812 15:57:58.871297 PCI: 00:1f.5: enabled 1
813 15:57:58.871386 PCI: 00:1f.6: enabled 0
814 15:57:58.871473 PCI: 00:1f.7: enabled 0
815 15:57:58.871565 CPU_CLUSTER: 0: enabled 1
816 15:57:58.871688 APIC: 00: enabled 1
817 15:57:58.871746 APIC: 01: enabled 1
818 15:57:58.871802 APIC: 05: enabled 1
819 15:57:58.871857 APIC: 03: enabled 1
820 15:57:58.871928 APIC: 07: enabled 1
821 15:57:58.871981 APIC: 06: enabled 1
822 15:57:58.874614 APIC: 04: enabled 1
823 15:57:58.874683 APIC: 02: enabled 1
824 15:57:58.874753 Root Device scanning...
825 15:57:58.877854 scan_static_bus for Root Device
826 15:57:58.880590 DOMAIN: 0000 enabled
827 15:57:58.880666 CPU_CLUSTER: 0 enabled
828 15:57:58.884002 DOMAIN: 0000 scanning...
829 15:57:58.887329 PCI: pci_scan_bus for bus 00
830 15:57:58.891036 PCI: 00:00.0 [8086/0000] ops
831 15:57:58.895162 PCI: 00:00.0 [8086/9a12] enabled
832 15:57:58.898541 PCI: 00:02.0 [8086/0000] bus ops
833 15:57:58.901360 PCI: 00:02.0 [8086/9a40] enabled
834 15:57:58.904662 PCI: 00:04.0 [8086/0000] bus ops
835 15:57:58.907996 PCI: 00:04.0 [8086/9a03] enabled
836 15:57:58.911419 PCI: 00:05.0 [8086/9a19] enabled
837 15:57:58.914601 PCI: 00:07.0 [0000/0000] hidden
838 15:57:58.917861 PCI: 00:08.0 [8086/9a11] enabled
839 15:57:58.921560 PCI: 00:0a.0 [8086/9a0d] disabled
840 15:57:58.924539 PCI: 00:0d.0 [8086/0000] bus ops
841 15:57:58.928146 PCI: 00:0d.0 [8086/9a13] enabled
842 15:57:58.931104 PCI: 00:14.0 [8086/0000] bus ops
843 15:57:58.934608 PCI: 00:14.0 [8086/a0ed] enabled
844 15:57:58.937971 PCI: 00:14.2 [8086/a0ef] enabled
845 15:57:58.941286 PCI: 00:14.3 [8086/0000] bus ops
846 15:57:58.944580 PCI: 00:14.3 [8086/a0f0] enabled
847 15:57:58.947834 PCI: 00:15.0 [8086/0000] bus ops
848 15:57:58.950837 PCI: 00:15.0 [8086/a0e8] enabled
849 15:57:58.954593 PCI: 00:15.1 [8086/0000] bus ops
850 15:57:58.957806 PCI: 00:15.1 [8086/a0e9] enabled
851 15:57:58.961059 PCI: 00:15.2 [8086/0000] bus ops
852 15:57:58.964481 PCI: 00:15.2 [8086/a0ea] enabled
853 15:57:58.967614 PCI: 00:15.3 [8086/0000] bus ops
854 15:57:58.971043 PCI: 00:15.3 [8086/a0eb] enabled
855 15:57:58.974296 PCI: 00:16.0 [8086/0000] ops
856 15:57:58.977627 PCI: 00:16.0 [8086/a0e0] enabled
857 15:57:58.983969 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 15:57:58.987203 PCI: 00:19.0 [8086/0000] bus ops
859 15:57:58.990676 PCI: 00:19.0 [8086/a0c5] disabled
860 15:57:58.993944 PCI: 00:19.1 [8086/0000] bus ops
861 15:57:58.996999 PCI: 00:19.1 [8086/a0c6] enabled
862 15:57:59.000394 PCI: 00:1d.0 [8086/0000] bus ops
863 15:57:59.003785 PCI: 00:1d.0 [8086/a0b0] enabled
864 15:57:59.006945 PCI: 00:1e.0 [8086/0000] ops
865 15:57:59.010401 PCI: 00:1e.0 [8086/a0a8] enabled
866 15:57:59.013454 PCI: 00:1e.2 [8086/0000] bus ops
867 15:57:59.016715 PCI: 00:1e.2 [8086/a0aa] enabled
868 15:57:59.019953 PCI: 00:1e.3 [8086/0000] bus ops
869 15:57:59.023342 PCI: 00:1e.3 [8086/a0ab] enabled
870 15:57:59.026627 PCI: 00:1f.0 [8086/0000] bus ops
871 15:57:59.029978 PCI: 00:1f.0 [8086/a087] enabled
872 15:57:59.030082 RTC Init
873 15:57:59.033183 Set power on after power failure.
874 15:57:59.036896 Disabling Deep S3
875 15:57:59.037017 Disabling Deep S3
876 15:57:59.039860 Disabling Deep S4
877 15:57:59.043401 Disabling Deep S4
878 15:57:59.043528 Disabling Deep S5
879 15:57:59.046425 Disabling Deep S5
880 15:57:59.049833 PCI: 00:1f.2 [0000/0000] hidden
881 15:57:59.053016 PCI: 00:1f.3 [8086/0000] bus ops
882 15:57:59.056195 PCI: 00:1f.3 [8086/a0c8] enabled
883 15:57:59.059795 PCI: 00:1f.5 [8086/0000] bus ops
884 15:57:59.062867 PCI: 00:1f.5 [8086/a0a4] enabled
885 15:57:59.066103 PCI: Leftover static devices:
886 15:57:59.066186 PCI: 00:10.2
887 15:57:59.066252 PCI: 00:10.6
888 15:57:59.069864 PCI: 00:10.7
889 15:57:59.069942 PCI: 00:06.0
890 15:57:59.073107 PCI: 00:07.1
891 15:57:59.073221 PCI: 00:07.2
892 15:57:59.076422 PCI: 00:07.3
893 15:57:59.076505 PCI: 00:09.0
894 15:57:59.076571 PCI: 00:0d.1
895 15:57:59.079598 PCI: 00:0d.2
896 15:57:59.079720 PCI: 00:0d.3
897 15:57:59.082861 PCI: 00:0e.0
898 15:57:59.082944 PCI: 00:12.0
899 15:57:59.083010 PCI: 00:12.6
900 15:57:59.086198 PCI: 00:13.0
901 15:57:59.086285 PCI: 00:14.1
902 15:57:59.089484 PCI: 00:16.1
903 15:57:59.089568 PCI: 00:16.2
904 15:57:59.089633 PCI: 00:16.3
905 15:57:59.092720 PCI: 00:16.4
906 15:57:59.092818 PCI: 00:16.5
907 15:57:59.096066 PCI: 00:17.0
908 15:57:59.096159 PCI: 00:19.2
909 15:57:59.099285 PCI: 00:1e.1
910 15:57:59.099370 PCI: 00:1f.1
911 15:57:59.099437 PCI: 00:1f.4
912 15:57:59.102528 PCI: 00:1f.6
913 15:57:59.102604 PCI: 00:1f.7
914 15:57:59.105774 PCI: Check your devicetree.cb.
915 15:57:59.109085 PCI: 00:02.0 scanning...
916 15:57:59.112576 scan_generic_bus for PCI: 00:02.0
917 15:57:59.115997 scan_generic_bus for PCI: 00:02.0 done
918 15:57:59.122638 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 15:57:59.122721 PCI: 00:04.0 scanning...
920 15:57:59.125953 scan_generic_bus for PCI: 00:04.0
921 15:57:59.129229 GENERIC: 0.0 enabled
922 15:57:59.135967 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 15:57:59.139215 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 15:57:59.142540 PCI: 00:0d.0 scanning...
925 15:57:59.145901 scan_static_bus for PCI: 00:0d.0
926 15:57:59.149008 USB0 port 0 enabled
927 15:57:59.152066 USB0 port 0 scanning...
928 15:57:59.155544 scan_static_bus for USB0 port 0
929 15:57:59.155682 USB3 port 0 enabled
930 15:57:59.159133 USB3 port 1 enabled
931 15:57:59.162381 USB3 port 2 disabled
932 15:57:59.162470 USB3 port 3 disabled
933 15:57:59.165647 USB3 port 0 scanning...
934 15:57:59.168774 scan_static_bus for USB3 port 0
935 15:57:59.171942 scan_static_bus for USB3 port 0 done
936 15:57:59.178714 scan_bus: bus USB3 port 0 finished in 6 msecs
937 15:57:59.178805 USB3 port 1 scanning...
938 15:57:59.181963 scan_static_bus for USB3 port 1
939 15:57:59.185168 scan_static_bus for USB3 port 1 done
940 15:57:59.191730 scan_bus: bus USB3 port 1 finished in 6 msecs
941 15:57:59.194972 scan_static_bus for USB0 port 0 done
942 15:57:59.198338 scan_bus: bus USB0 port 0 finished in 43 msecs
943 15:57:59.205140 scan_static_bus for PCI: 00:0d.0 done
944 15:57:59.208344 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 15:57:59.211668 PCI: 00:14.0 scanning...
946 15:57:59.214892 scan_static_bus for PCI: 00:14.0
947 15:57:59.214969 USB0 port 0 enabled
948 15:57:59.218233 USB0 port 0 scanning...
949 15:57:59.221541 scan_static_bus for USB0 port 0
950 15:57:59.224811 USB2 port 0 disabled
951 15:57:59.224895 USB2 port 1 enabled
952 15:57:59.228028 USB2 port 2 enabled
953 15:57:59.231429 USB2 port 3 disabled
954 15:57:59.231504 USB2 port 4 enabled
955 15:57:59.234624 USB2 port 5 disabled
956 15:57:59.237936 USB2 port 6 disabled
957 15:57:59.238011 USB2 port 7 disabled
958 15:57:59.241311 USB2 port 8 disabled
959 15:57:59.244499 USB2 port 9 disabled
960 15:57:59.244578 USB3 port 0 disabled
961 15:57:59.247787 USB3 port 1 enabled
962 15:57:59.251130 USB3 port 2 disabled
963 15:57:59.251203 USB3 port 3 disabled
964 15:57:59.254522 USB2 port 1 scanning...
965 15:57:59.257792 scan_static_bus for USB2 port 1
966 15:57:59.260921 scan_static_bus for USB2 port 1 done
967 15:57:59.264624 scan_bus: bus USB2 port 1 finished in 6 msecs
968 15:57:59.267529 USB2 port 2 scanning...
969 15:57:59.271136 scan_static_bus for USB2 port 2
970 15:57:59.274104 scan_static_bus for USB2 port 2 done
971 15:57:59.280834 scan_bus: bus USB2 port 2 finished in 6 msecs
972 15:57:59.284137 USB2 port 4 scanning...
973 15:57:59.287834 scan_static_bus for USB2 port 4
974 15:57:59.290734 scan_static_bus for USB2 port 4 done
975 15:57:59.294315 scan_bus: bus USB2 port 4 finished in 6 msecs
976 15:57:59.297457 USB3 port 1 scanning...
977 15:57:59.300685 scan_static_bus for USB3 port 1
978 15:57:59.304527 scan_static_bus for USB3 port 1 done
979 15:57:59.307759 scan_bus: bus USB3 port 1 finished in 6 msecs
980 15:57:59.310907 scan_static_bus for USB0 port 0 done
981 15:57:59.317569 scan_bus: bus USB0 port 0 finished in 93 msecs
982 15:57:59.320878 scan_static_bus for PCI: 00:14.0 done
983 15:57:59.327648 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
984 15:57:59.327733 PCI: 00:14.3 scanning...
985 15:57:59.330920 scan_static_bus for PCI: 00:14.3
986 15:57:59.333621 GENERIC: 0.0 enabled
987 15:57:59.337056 scan_static_bus for PCI: 00:14.3 done
988 15:57:59.343714 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 15:57:59.343812 PCI: 00:15.0 scanning...
990 15:57:59.347044 scan_static_bus for PCI: 00:15.0
991 15:57:59.350325 I2C: 00:1a enabled
992 15:57:59.353617 I2C: 00:31 enabled
993 15:57:59.353695 I2C: 00:32 enabled
994 15:57:59.356984 scan_static_bus for PCI: 00:15.0 done
995 15:57:59.363767 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 15:57:59.367039 PCI: 00:15.1 scanning...
997 15:57:59.370340 scan_static_bus for PCI: 00:15.1
998 15:57:59.370453 I2C: 00:10 enabled
999 15:57:59.373568 scan_static_bus for PCI: 00:15.1 done
1000 15:57:59.379922 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 15:57:59.383063 PCI: 00:15.2 scanning...
1002 15:57:59.386583 scan_static_bus for PCI: 00:15.2
1003 15:57:59.389633 scan_static_bus for PCI: 00:15.2 done
1004 15:57:59.392956 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 15:57:59.396326 PCI: 00:15.3 scanning...
1006 15:57:59.400162 scan_static_bus for PCI: 00:15.3
1007 15:57:59.403477 scan_static_bus for PCI: 00:15.3 done
1008 15:57:59.409660 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 15:57:59.409745 PCI: 00:19.1 scanning...
1010 15:57:59.413074 scan_static_bus for PCI: 00:19.1
1011 15:57:59.416546 I2C: 00:15 enabled
1012 15:57:59.419958 scan_static_bus for PCI: 00:19.1 done
1013 15:57:59.426153 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 15:57:59.426238 PCI: 00:1d.0 scanning...
1015 15:57:59.432961 do_pci_scan_bridge for PCI: 00:1d.0
1016 15:57:59.433060 PCI: pci_scan_bus for bus 01
1017 15:57:59.436286 PCI: 01:00.0 [15b7/5009] enabled
1018 15:57:59.439683 GENERIC: 0.0 enabled
1019 15:57:59.443035 Enabling Common Clock Configuration
1020 15:57:59.449587 L1 Sub-State supported from root port 29
1021 15:57:59.449692 L1 Sub-State Support = 0x5
1022 15:57:59.452927 CommonModeRestoreTime = 0x28
1023 15:57:59.459681 Power On Value = 0x16, Power On Scale = 0x0
1024 15:57:59.459765 ASPM: Enabled L1
1025 15:57:59.462988 PCIe: Max_Payload_Size adjusted to 128
1026 15:57:59.469614 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 15:57:59.473581 PCI: 00:1e.2 scanning...
1028 15:57:59.473665 scan_generic_bus for PCI: 00:1e.2
1029 15:57:59.476926 SPI: 00 enabled
1030 15:57:59.483518 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 15:57:59.486777 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 15:57:59.490248 PCI: 00:1e.3 scanning...
1033 15:57:59.493499 scan_generic_bus for PCI: 00:1e.3
1034 15:57:59.496839 SPI: 00 enabled
1035 15:57:59.499694 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 15:57:59.506779 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 15:57:59.509993 PCI: 00:1f.0 scanning...
1038 15:57:59.513143 scan_static_bus for PCI: 00:1f.0
1039 15:57:59.513221 PNP: 0c09.0 enabled
1040 15:57:59.516329 PNP: 0c09.0 scanning...
1041 15:57:59.519506 scan_static_bus for PNP: 0c09.0
1042 15:57:59.522621 scan_static_bus for PNP: 0c09.0 done
1043 15:57:59.529493 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 15:57:59.533009 scan_static_bus for PCI: 00:1f.0 done
1045 15:57:59.536006 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 15:57:59.539685 PCI: 00:1f.2 scanning...
1047 15:57:59.542933 scan_static_bus for PCI: 00:1f.2
1048 15:57:59.546214 GENERIC: 0.0 enabled
1049 15:57:59.549496 GENERIC: 0.0 scanning...
1050 15:57:59.552684 scan_static_bus for GENERIC: 0.0
1051 15:57:59.552774 GENERIC: 0.0 enabled
1052 15:57:59.555984 GENERIC: 1.0 enabled
1053 15:57:59.559339 scan_static_bus for GENERIC: 0.0 done
1054 15:57:59.565920 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 15:57:59.569327 scan_static_bus for PCI: 00:1f.2 done
1056 15:57:59.572640 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 15:57:59.575368 PCI: 00:1f.3 scanning...
1058 15:57:59.578578 scan_static_bus for PCI: 00:1f.3
1059 15:57:59.582047 scan_static_bus for PCI: 00:1f.3 done
1060 15:57:59.588456 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 15:57:59.588533 PCI: 00:1f.5 scanning...
1062 15:57:59.591819 scan_generic_bus for PCI: 00:1f.5
1063 15:57:59.598751 scan_generic_bus for PCI: 00:1f.5 done
1064 15:57:59.602118 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 15:57:59.608513 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1066 15:57:59.611775 scan_static_bus for Root Device done
1067 15:57:59.615039 scan_bus: bus Root Device finished in 736 msecs
1068 15:57:59.615138 done
1069 15:57:59.621573 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1070 15:57:59.625361 Chrome EC: UHEPI supported
1071 15:57:59.632059 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 15:57:59.638441 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 15:57:59.641654 SPI flash protection: WPSW=0 SRP0=0
1074 15:57:59.648446 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 15:57:59.651758 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 15:57:59.654938 found VGA at PCI: 00:02.0
1077 15:57:59.658324 Setting up VGA for PCI: 00:02.0
1078 15:57:59.664792 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 15:57:59.668094 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 15:57:59.671439 Allocating resources...
1081 15:57:59.674769 Reading resources...
1082 15:57:59.678310 Root Device read_resources bus 0 link: 0
1083 15:57:59.681562 DOMAIN: 0000 read_resources bus 0 link: 0
1084 15:57:59.687605 PCI: 00:04.0 read_resources bus 1 link: 0
1085 15:57:59.690926 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 15:57:59.698047 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 15:57:59.701400 USB0 port 0 read_resources bus 0 link: 0
1088 15:57:59.707703 USB0 port 0 read_resources bus 0 link: 0 done
1089 15:57:59.711485 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 15:57:59.717850 PCI: 00:14.0 read_resources bus 0 link: 0
1091 15:57:59.721064 USB0 port 0 read_resources bus 0 link: 0
1092 15:57:59.727423 USB0 port 0 read_resources bus 0 link: 0 done
1093 15:57:59.731182 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 15:57:59.737170 PCI: 00:14.3 read_resources bus 0 link: 0
1095 15:57:59.740947 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 15:57:59.746974 PCI: 00:15.0 read_resources bus 0 link: 0
1097 15:57:59.750776 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 15:57:59.756834 PCI: 00:15.1 read_resources bus 0 link: 0
1099 15:57:59.760407 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 15:57:59.766892 PCI: 00:19.1 read_resources bus 0 link: 0
1101 15:57:59.770316 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 15:57:59.776787 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 15:57:59.780089 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 15:57:59.787369 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 15:57:59.790671 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 15:57:59.797099 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 15:57:59.800481 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 15:57:59.807020 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 15:57:59.810084 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 15:57:59.816817 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 15:57:59.819857 GENERIC: 0.0 read_resources bus 0 link: 0
1112 15:57:59.823550 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 15:57:59.830262 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 15:57:59.836540 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 15:57:59.840355 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 15:57:59.846788 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 15:57:59.850110 Root Device read_resources bus 0 link: 0 done
1118 15:57:59.853545 Done reading resources.
1119 15:57:59.856269 Show resources in subtree (Root Device)...After reading.
1120 15:57:59.863391 Root Device child on link 0 DOMAIN: 0000
1121 15:57:59.866580 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 15:57:59.876398 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 15:57:59.886327 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 15:57:59.886442 PCI: 00:00.0
1125 15:57:59.896708 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 15:57:59.906331 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 15:57:59.916375 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 15:57:59.925909 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 15:57:59.936027 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 15:57:59.942527 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 15:57:59.952356 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 15:57:59.962238 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 15:57:59.972422 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 15:57:59.982576 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 15:57:59.991937 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 15:57:59.998646 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 15:58:00.008947 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 15:58:00.018829 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 15:58:00.028672 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 15:58:00.038142 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 15:58:00.048114 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 15:58:00.058384 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 15:58:00.065070 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 15:58:00.074721 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 15:58:00.078147 PCI: 00:02.0
1146 15:58:00.088130 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 15:58:00.097724 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 15:58:00.108178 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 15:58:00.111463 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 15:58:00.121137 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 15:58:00.124462 GENERIC: 0.0
1152 15:58:00.124549 PCI: 00:05.0
1153 15:58:00.134019 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 15:58:00.140577 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 15:58:00.140676 GENERIC: 0.0
1156 15:58:00.143978 PCI: 00:08.0
1157 15:58:00.154134 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 15:58:00.154231 PCI: 00:0a.0
1159 15:58:00.157260 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 15:58:00.166988 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 15:58:00.173897 USB0 port 0 child on link 0 USB3 port 0
1162 15:58:00.174010 USB3 port 0
1163 15:58:00.177051 USB3 port 1
1164 15:58:00.177148 USB3 port 2
1165 15:58:00.180344 USB3 port 3
1166 15:58:00.183572 PCI: 00:14.0 child on link 0 USB0 port 0
1167 15:58:00.193388 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 15:58:00.199978 USB0 port 0 child on link 0 USB2 port 0
1169 15:58:00.200082 USB2 port 0
1170 15:58:00.203123 USB2 port 1
1171 15:58:00.203200 USB2 port 2
1172 15:58:00.206941 USB2 port 3
1173 15:58:00.207022 USB2 port 4
1174 15:58:00.210026 USB2 port 5
1175 15:58:00.210105 USB2 port 6
1176 15:58:00.213293 USB2 port 7
1177 15:58:00.216596 USB2 port 8
1178 15:58:00.216676 USB2 port 9
1179 15:58:00.219822 USB3 port 0
1180 15:58:00.219900 USB3 port 1
1181 15:58:00.223097 USB3 port 2
1182 15:58:00.223171 USB3 port 3
1183 15:58:00.226472 PCI: 00:14.2
1184 15:58:00.236588 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 15:58:00.246342 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 15:58:00.249612 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 15:58:00.259477 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 15:58:00.263040 GENERIC: 0.0
1189 15:58:00.266120 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 15:58:00.276282 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 15:58:00.276362 I2C: 00:1a
1192 15:58:00.279208 I2C: 00:31
1193 15:58:00.279319 I2C: 00:32
1194 15:58:00.285838 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 15:58:00.296048 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 15:58:00.296163 I2C: 00:10
1197 15:58:00.299280 PCI: 00:15.2
1198 15:58:00.309259 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 15:58:00.309347 PCI: 00:15.3
1200 15:58:00.319212 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 15:58:00.322351 PCI: 00:16.0
1202 15:58:00.332422 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 15:58:00.332512 PCI: 00:19.0
1204 15:58:00.335742 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 15:58:00.345146 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 15:58:00.348458 I2C: 00:15
1207 15:58:00.351828 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 15:58:00.361867 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 15:58:00.372031 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 15:58:00.381646 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 15:58:00.381748 GENERIC: 0.0
1212 15:58:00.384915 PCI: 01:00.0
1213 15:58:00.394773 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 15:58:00.404791 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1215 15:58:00.404896 PCI: 00:1e.0
1216 15:58:00.418231 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1217 15:58:00.421480 PCI: 00:1e.2 child on link 0 SPI: 00
1218 15:58:00.431295 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 15:58:00.431402 SPI: 00
1220 15:58:00.434668 PCI: 00:1e.3 child on link 0 SPI: 00
1221 15:58:00.447783 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 15:58:00.447868 SPI: 00
1223 15:58:00.450933 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1224 15:58:00.461087 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1225 15:58:00.461170 PNP: 0c09.0
1226 15:58:00.470671 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1227 15:58:00.473984 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1228 15:58:00.483807 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1229 15:58:00.493724 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1230 15:58:00.497058 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1231 15:58:00.500387 GENERIC: 0.0
1232 15:58:00.503677 GENERIC: 1.0
1233 15:58:00.503757 PCI: 00:1f.3
1234 15:58:00.513635 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1235 15:58:00.523514 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1236 15:58:00.526850 PCI: 00:1f.5
1237 15:58:00.533572 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1238 15:58:00.540191 CPU_CLUSTER: 0 child on link 0 APIC: 00
1239 15:58:00.540291 APIC: 00
1240 15:58:00.540356 APIC: 01
1241 15:58:00.543447 APIC: 05
1242 15:58:00.543549 APIC: 03
1243 15:58:00.546655 APIC: 07
1244 15:58:00.546728 APIC: 06
1245 15:58:00.546789 APIC: 04
1246 15:58:00.549817 APIC: 02
1247 15:58:00.556380 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1248 15:58:00.562991 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1249 15:58:00.569635 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1250 15:58:00.576197 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1251 15:58:00.579533 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1252 15:58:00.582858 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1253 15:58:00.589402 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1254 15:58:00.599677 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1255 15:58:00.606091 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1256 15:58:00.612513 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1257 15:58:00.619197 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1258 15:58:00.625695 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1259 15:58:00.632646 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1260 15:58:00.642694 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1261 15:58:00.645870 DOMAIN: 0000: Resource ranges:
1262 15:58:00.649038 * Base: 1000, Size: 800, Tag: 100
1263 15:58:00.652077 * Base: 1900, Size: e700, Tag: 100
1264 15:58:00.658660 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1265 15:58:00.665781 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1266 15:58:00.672490 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1267 15:58:00.679145 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1268 15:58:00.685727 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1269 15:58:00.695575 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1270 15:58:00.702158 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1271 15:58:00.708567 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1272 15:58:00.718139 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1273 15:58:00.724776 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1274 15:58:00.731740 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1275 15:58:00.741378 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1276 15:58:00.748026 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1277 15:58:00.754474 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1278 15:58:00.764826 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1279 15:58:00.771265 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1280 15:58:00.777712 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1281 15:58:00.787705 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1282 15:58:00.794508 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1283 15:58:00.801006 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1284 15:58:00.811032 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1285 15:58:00.817716 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1286 15:58:00.824281 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1287 15:58:00.833812 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1288 15:58:00.840613 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1289 15:58:00.843550 DOMAIN: 0000: Resource ranges:
1290 15:58:00.846902 * Base: 7fc00000, Size: 40400000, Tag: 200
1291 15:58:00.854014 * Base: d0000000, Size: 28000000, Tag: 200
1292 15:58:00.856889 * Base: fa000000, Size: 1000000, Tag: 200
1293 15:58:00.860600 * Base: fb001000, Size: 2fff000, Tag: 200
1294 15:58:00.863945 * Base: fe010000, Size: 2e000, Tag: 200
1295 15:58:00.870133 * Base: fe03f000, Size: d41000, Tag: 200
1296 15:58:00.873901 * Base: fed88000, Size: 8000, Tag: 200
1297 15:58:00.877248 * Base: fed93000, Size: d000, Tag: 200
1298 15:58:00.879913 * Base: feda2000, Size: 1e000, Tag: 200
1299 15:58:00.886666 * Base: fede0000, Size: 1220000, Tag: 200
1300 15:58:00.890017 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1301 15:58:00.896828 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1302 15:58:00.903402 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1303 15:58:00.910302 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1304 15:58:00.916888 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1305 15:58:00.923426 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1306 15:58:00.930073 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1307 15:58:00.936614 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1308 15:58:00.943120 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1309 15:58:00.949753 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1310 15:58:00.956124 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1311 15:58:00.962820 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1312 15:58:00.969319 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1313 15:58:00.976002 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1314 15:58:00.982372 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1315 15:58:00.989116 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1316 15:58:00.995962 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1317 15:58:01.002650 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1318 15:58:01.009219 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1319 15:58:01.015756 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1320 15:58:01.022404 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1321 15:58:01.028927 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1322 15:58:01.035501 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1323 15:58:01.045390 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1324 15:58:01.051909 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1325 15:58:01.055116 PCI: 00:1d.0: Resource ranges:
1326 15:58:01.058302 * Base: 7fc00000, Size: 100000, Tag: 200
1327 15:58:01.064982 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1328 15:58:01.071669 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1329 15:58:01.081439 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1330 15:58:01.087846 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1331 15:58:01.091634 Root Device assign_resources, bus 0 link: 0
1332 15:58:01.098478 DOMAIN: 0000 assign_resources, bus 0 link: 0
1333 15:58:01.104715 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1334 15:58:01.114722 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1335 15:58:01.121448 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1336 15:58:01.131369 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1337 15:58:01.134608 PCI: 00:04.0 assign_resources, bus 1 link: 0
1338 15:58:01.141413 PCI: 00:04.0 assign_resources, bus 1 link: 0
1339 15:58:01.147308 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1340 15:58:01.157650 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1341 15:58:01.164135 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1342 15:58:01.167296 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1343 15:58:01.174045 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1344 15:58:01.180353 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1345 15:58:01.187375 PCI: 00:14.0 assign_resources, bus 0 link: 0
1346 15:58:01.190572 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 15:58:01.200547 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1348 15:58:01.207121 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1349 15:58:01.216894 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1350 15:58:01.219878 PCI: 00:14.3 assign_resources, bus 0 link: 0
1351 15:58:01.223326 PCI: 00:14.3 assign_resources, bus 0 link: 0
1352 15:58:01.233192 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1353 15:58:01.236390 PCI: 00:15.0 assign_resources, bus 0 link: 0
1354 15:58:01.243107 PCI: 00:15.0 assign_resources, bus 0 link: 0
1355 15:58:01.249764 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1356 15:58:01.256307 PCI: 00:15.1 assign_resources, bus 0 link: 0
1357 15:58:01.259465 PCI: 00:15.1 assign_resources, bus 0 link: 0
1358 15:58:01.266072 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1359 15:58:01.276291 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1360 15:58:01.282470 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1361 15:58:01.292673 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1362 15:58:01.295883 PCI: 00:19.1 assign_resources, bus 0 link: 0
1363 15:58:01.302461 PCI: 00:19.1 assign_resources, bus 0 link: 0
1364 15:58:01.308816 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1365 15:58:01.319012 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1366 15:58:01.328677 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1367 15:58:01.332318 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 15:58:01.341976 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1369 15:58:01.348773 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1370 15:58:01.355320 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 15:58:01.361862 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1372 15:58:01.368360 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1373 15:58:01.371715 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1374 15:58:01.382015 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1375 15:58:01.385158 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1376 15:58:01.388365 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1377 15:58:01.395012 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 15:58:01.398214 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1379 15:58:01.404676 LPC: Trying to open IO window from 800 size 1ff
1380 15:58:01.411176 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1381 15:58:01.421041 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1382 15:58:01.427795 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1383 15:58:01.434520 DOMAIN: 0000 assign_resources, bus 0 link: 0
1384 15:58:01.437653 Root Device assign_resources, bus 0 link: 0
1385 15:58:01.440640 Done setting resources.
1386 15:58:01.447433 Show resources in subtree (Root Device)...After assigning values.
1387 15:58:01.450658 Root Device child on link 0 DOMAIN: 0000
1388 15:58:01.453871 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1389 15:58:01.463720 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1390 15:58:01.474184 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1391 15:58:01.476829 PCI: 00:00.0
1392 15:58:01.487332 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1393 15:58:01.493753 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1394 15:58:01.503920 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1395 15:58:01.513470 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1396 15:58:01.523747 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1397 15:58:01.533742 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1398 15:58:01.543567 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1399 15:58:01.549967 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1400 15:58:01.560111 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1401 15:58:01.569983 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1402 15:58:01.579872 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1403 15:58:01.589788 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1404 15:58:01.600072 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1405 15:58:01.606603 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1406 15:58:01.616550 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1407 15:58:01.626046 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1408 15:58:01.635831 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1409 15:58:01.646040 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1410 15:58:01.655564 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1411 15:58:01.665660 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1412 15:58:01.665771 PCI: 00:02.0
1413 15:58:01.675869 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1414 15:58:01.689120 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1415 15:58:01.695276 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1416 15:58:01.702276 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1417 15:58:01.712156 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1418 15:58:01.712275 GENERIC: 0.0
1419 15:58:01.715462 PCI: 00:05.0
1420 15:58:01.725495 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1421 15:58:01.728685 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1422 15:58:01.732028 GENERIC: 0.0
1423 15:58:01.732112 PCI: 00:08.0
1424 15:58:01.744799 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1425 15:58:01.744884 PCI: 00:0a.0
1426 15:58:01.748505 PCI: 00:0d.0 child on link 0 USB0 port 0
1427 15:58:01.761406 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1428 15:58:01.765152 USB0 port 0 child on link 0 USB3 port 0
1429 15:58:01.765236 USB3 port 0
1430 15:58:01.768488 USB3 port 1
1431 15:58:01.771536 USB3 port 2
1432 15:58:01.771640 USB3 port 3
1433 15:58:01.774878 PCI: 00:14.0 child on link 0 USB0 port 0
1434 15:58:01.787686 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1435 15:58:01.791538 USB0 port 0 child on link 0 USB2 port 0
1436 15:58:01.791660 USB2 port 0
1437 15:58:01.794917 USB2 port 1
1438 15:58:01.794998 USB2 port 2
1439 15:58:01.798267 USB2 port 3
1440 15:58:01.800890 USB2 port 4
1441 15:58:01.800987 USB2 port 5
1442 15:58:01.804170 USB2 port 6
1443 15:58:01.804254 USB2 port 7
1444 15:58:01.808042 USB2 port 8
1445 15:58:01.808124 USB2 port 9
1446 15:58:01.811429 USB3 port 0
1447 15:58:01.811510 USB3 port 1
1448 15:58:01.814679 USB3 port 2
1449 15:58:01.814760 USB3 port 3
1450 15:58:01.817918 PCI: 00:14.2
1451 15:58:01.827884 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1452 15:58:01.837528 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1453 15:58:01.840941 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1454 15:58:01.854027 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1455 15:58:01.854149 GENERIC: 0.0
1456 15:58:01.857271 PCI: 00:15.0 child on link 0 I2C: 00:1a
1457 15:58:01.870375 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1458 15:58:01.870488 I2C: 00:1a
1459 15:58:01.874028 I2C: 00:31
1460 15:58:01.874110 I2C: 00:32
1461 15:58:01.877152 PCI: 00:15.1 child on link 0 I2C: 00:10
1462 15:58:01.887111 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1463 15:58:01.890404 I2C: 00:10
1464 15:58:01.890487 PCI: 00:15.2
1465 15:58:01.903700 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1466 15:58:01.903813 PCI: 00:15.3
1467 15:58:01.913553 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1468 15:58:01.916870 PCI: 00:16.0
1469 15:58:01.926918 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1470 15:58:01.927002 PCI: 00:19.0
1471 15:58:01.933457 PCI: 00:19.1 child on link 0 I2C: 00:15
1472 15:58:01.943792 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1473 15:58:01.943876 I2C: 00:15
1474 15:58:01.949730 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1475 15:58:01.956964 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1476 15:58:01.969834 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1477 15:58:01.980039 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1478 15:58:01.982926 GENERIC: 0.0
1479 15:58:01.983026 PCI: 01:00.0
1480 15:58:01.993123 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1481 15:58:02.002887 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1482 15:58:02.006150 PCI: 00:1e.0
1483 15:58:02.016406 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1484 15:58:02.019740 PCI: 00:1e.2 child on link 0 SPI: 00
1485 15:58:02.033016 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1486 15:58:02.033098 SPI: 00
1487 15:58:02.035824 PCI: 00:1e.3 child on link 0 SPI: 00
1488 15:58:02.046015 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1489 15:58:02.049288 SPI: 00
1490 15:58:02.052521 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1491 15:58:02.062316 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1492 15:58:02.062430 PNP: 0c09.0
1493 15:58:02.072367 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 15:58:02.075563 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1495 15:58:02.085563 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1496 15:58:02.095367 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1497 15:58:02.098986 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1498 15:58:02.101859 GENERIC: 0.0
1499 15:58:02.101967 GENERIC: 1.0
1500 15:58:02.105156 PCI: 00:1f.3
1501 15:58:02.115189 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1502 15:58:02.125506 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1503 15:58:02.128840 PCI: 00:1f.5
1504 15:58:02.138147 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1505 15:58:02.141563 CPU_CLUSTER: 0 child on link 0 APIC: 00
1506 15:58:02.141671 APIC: 00
1507 15:58:02.144714 APIC: 01
1508 15:58:02.144820 APIC: 05
1509 15:58:02.148470 APIC: 03
1510 15:58:02.148577 APIC: 07
1511 15:58:02.148683 APIC: 06
1512 15:58:02.151755 APIC: 04
1513 15:58:02.151862 APIC: 02
1514 15:58:02.154585 Done allocating resources.
1515 15:58:02.161174 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1516 15:58:02.167665 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1517 15:58:02.171108 Configure GPIOs for I2S audio on UP4.
1518 15:58:02.178164 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1519 15:58:02.181387 Enabling resources...
1520 15:58:02.184725 PCI: 00:00.0 subsystem <- 8086/9a12
1521 15:58:02.184808 PCI: 00:00.0 cmd <- 06
1522 15:58:02.191259 PCI: 00:02.0 subsystem <- 8086/9a40
1523 15:58:02.191342 PCI: 00:02.0 cmd <- 03
1524 15:58:02.194465 PCI: 00:04.0 subsystem <- 8086/9a03
1525 15:58:02.197808 PCI: 00:04.0 cmd <- 02
1526 15:58:02.201463 PCI: 00:05.0 subsystem <- 8086/9a19
1527 15:58:02.204698 PCI: 00:05.0 cmd <- 02
1528 15:58:02.207788 PCI: 00:08.0 subsystem <- 8086/9a11
1529 15:58:02.210876 PCI: 00:08.0 cmd <- 06
1530 15:58:02.214542 PCI: 00:0d.0 subsystem <- 8086/9a13
1531 15:58:02.217547 PCI: 00:0d.0 cmd <- 02
1532 15:58:02.221105 PCI: 00:14.0 subsystem <- 8086/a0ed
1533 15:58:02.224277 PCI: 00:14.0 cmd <- 02
1534 15:58:02.227549 PCI: 00:14.2 subsystem <- 8086/a0ef
1535 15:58:02.230518 PCI: 00:14.2 cmd <- 02
1536 15:58:02.233948 PCI: 00:14.3 subsystem <- 8086/a0f0
1537 15:58:02.234060 PCI: 00:14.3 cmd <- 02
1538 15:58:02.240571 PCI: 00:15.0 subsystem <- 8086/a0e8
1539 15:58:02.240682 PCI: 00:15.0 cmd <- 02
1540 15:58:02.243889 PCI: 00:15.1 subsystem <- 8086/a0e9
1541 15:58:02.247082 PCI: 00:15.1 cmd <- 02
1542 15:58:02.250859 PCI: 00:15.2 subsystem <- 8086/a0ea
1543 15:58:02.254032 PCI: 00:15.2 cmd <- 02
1544 15:58:02.257286 PCI: 00:15.3 subsystem <- 8086/a0eb
1545 15:58:02.260588 PCI: 00:15.3 cmd <- 02
1546 15:58:02.263927 PCI: 00:16.0 subsystem <- 8086/a0e0
1547 15:58:02.267309 PCI: 00:16.0 cmd <- 02
1548 15:58:02.270612 PCI: 00:19.1 subsystem <- 8086/a0c6
1549 15:58:02.274005 PCI: 00:19.1 cmd <- 02
1550 15:58:02.276806 PCI: 00:1d.0 bridge ctrl <- 0013
1551 15:58:02.280079 PCI: 00:1d.0 subsystem <- 8086/a0b0
1552 15:58:02.283450 PCI: 00:1d.0 cmd <- 06
1553 15:58:02.286639 PCI: 00:1e.0 subsystem <- 8086/a0a8
1554 15:58:02.290060 PCI: 00:1e.0 cmd <- 06
1555 15:58:02.293411 PCI: 00:1e.2 subsystem <- 8086/a0aa
1556 15:58:02.293519 PCI: 00:1e.2 cmd <- 06
1557 15:58:02.300054 PCI: 00:1e.3 subsystem <- 8086/a0ab
1558 15:58:02.300156 PCI: 00:1e.3 cmd <- 02
1559 15:58:02.303309 PCI: 00:1f.0 subsystem <- 8086/a087
1560 15:58:02.306704 PCI: 00:1f.0 cmd <- 407
1561 15:58:02.310127 PCI: 00:1f.3 subsystem <- 8086/a0c8
1562 15:58:02.313492 PCI: 00:1f.3 cmd <- 02
1563 15:58:02.316250 PCI: 00:1f.5 subsystem <- 8086/a0a4
1564 15:58:02.319457 PCI: 00:1f.5 cmd <- 406
1565 15:58:02.324075 PCI: 01:00.0 cmd <- 02
1566 15:58:02.328474 done.
1567 15:58:02.331613 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1568 15:58:02.334640 Initializing devices...
1569 15:58:02.338320 Root Device init
1570 15:58:02.341362 Chrome EC: Set SMI mask to 0x0000000000000000
1571 15:58:02.349077 Chrome EC: clear events_b mask to 0x0000000000000000
1572 15:58:02.355625 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1573 15:58:02.362303 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1574 15:58:02.368974 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1575 15:58:02.372280 Chrome EC: Set WAKE mask to 0x0000000000000000
1576 15:58:02.380253 fw_config match found: DB_USB=USB3_ACTIVE
1577 15:58:02.383010 Configure Right Type-C port orientation for retimer
1578 15:58:02.386827 Root Device init finished in 46 msecs
1579 15:58:02.390736 PCI: 00:00.0 init
1580 15:58:02.394173 CPU TDP = 9 Watts
1581 15:58:02.394276 CPU PL1 = 9 Watts
1582 15:58:02.397585 CPU PL2 = 40 Watts
1583 15:58:02.400698 CPU PL4 = 83 Watts
1584 15:58:02.403844 PCI: 00:00.0 init finished in 8 msecs
1585 15:58:02.403951 PCI: 00:02.0 init
1586 15:58:02.407583 GMA: Found VBT in CBFS
1587 15:58:02.410916 GMA: Found valid VBT in CBFS
1588 15:58:02.417451 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1589 15:58:02.424146 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1590 15:58:02.427419 PCI: 00:02.0 init finished in 18 msecs
1591 15:58:02.430085 PCI: 00:05.0 init
1592 15:58:02.433455 PCI: 00:05.0 init finished in 0 msecs
1593 15:58:02.437127 PCI: 00:08.0 init
1594 15:58:02.440387 PCI: 00:08.0 init finished in 0 msecs
1595 15:58:02.443859 PCI: 00:14.0 init
1596 15:58:02.446571 PCI: 00:14.0 init finished in 0 msecs
1597 15:58:02.450050 PCI: 00:14.2 init
1598 15:58:02.453144 PCI: 00:14.2 init finished in 0 msecs
1599 15:58:02.456875 PCI: 00:15.0 init
1600 15:58:02.460259 I2C bus 0 version 0x3230302a
1601 15:58:02.463396 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1602 15:58:02.466579 PCI: 00:15.0 init finished in 6 msecs
1603 15:58:02.469826 PCI: 00:15.1 init
1604 15:58:02.469907 I2C bus 1 version 0x3230302a
1605 15:58:02.476495 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1606 15:58:02.479626 PCI: 00:15.1 init finished in 6 msecs
1607 15:58:02.479722 PCI: 00:15.2 init
1608 15:58:02.483034 I2C bus 2 version 0x3230302a
1609 15:58:02.486296 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1610 15:58:02.492846 PCI: 00:15.2 init finished in 6 msecs
1611 15:58:02.492929 PCI: 00:15.3 init
1612 15:58:02.496052 I2C bus 3 version 0x3230302a
1613 15:58:02.499365 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1614 15:58:02.502717 PCI: 00:15.3 init finished in 6 msecs
1615 15:58:02.506019 PCI: 00:16.0 init
1616 15:58:02.509180 PCI: 00:16.0 init finished in 0 msecs
1617 15:58:02.512433 PCI: 00:19.1 init
1618 15:58:02.515845 I2C bus 5 version 0x3230302a
1619 15:58:02.519195 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1620 15:58:02.522473 PCI: 00:19.1 init finished in 6 msecs
1621 15:58:02.525859 PCI: 00:1d.0 init
1622 15:58:02.529175 Initializing PCH PCIe bridge.
1623 15:58:02.532290 PCI: 00:1d.0 init finished in 3 msecs
1624 15:58:02.535535 PCI: 00:1f.0 init
1625 15:58:02.538844 IOAPIC: Initializing IOAPIC at 0xfec00000
1626 15:58:02.542046 IOAPIC: Bootstrap Processor Local APIC = 0x00
1627 15:58:02.545224 IOAPIC: ID = 0x02
1628 15:58:02.548509 IOAPIC: Dumping registers
1629 15:58:02.551906 reg 0x0000: 0x02000000
1630 15:58:02.551979 reg 0x0001: 0x00770020
1631 15:58:02.555133 reg 0x0002: 0x00000000
1632 15:58:02.558564 PCI: 00:1f.0 init finished in 21 msecs
1633 15:58:02.561770 PCI: 00:1f.2 init
1634 15:58:02.565635 Disabling ACPI via APMC.
1635 15:58:02.569219 APMC done.
1636 15:58:02.572123 PCI: 00:1f.2 init finished in 6 msecs
1637 15:58:02.584436 PCI: 01:00.0 init
1638 15:58:02.587149 PCI: 01:00.0 init finished in 0 msecs
1639 15:58:02.591251 PNP: 0c09.0 init
1640 15:58:02.593946 Google Chrome EC uptime: 8.295 seconds
1641 15:58:02.600507 Google Chrome AP resets since EC boot: 1
1642 15:58:02.603880 Google Chrome most recent AP reset causes:
1643 15:58:02.607294 0.452: 32775 shutdown: entering G3
1644 15:58:02.613874 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1645 15:58:02.617027 PNP: 0c09.0 init finished in 22 msecs
1646 15:58:02.622964 Devices initialized
1647 15:58:02.626254 Show all devs... After init.
1648 15:58:02.629445 Root Device: enabled 1
1649 15:58:02.629528 DOMAIN: 0000: enabled 1
1650 15:58:02.632783 CPU_CLUSTER: 0: enabled 1
1651 15:58:02.635915 PCI: 00:00.0: enabled 1
1652 15:58:02.639123 PCI: 00:02.0: enabled 1
1653 15:58:02.642505 PCI: 00:04.0: enabled 1
1654 15:58:02.642605 PCI: 00:05.0: enabled 1
1655 15:58:02.645768 PCI: 00:06.0: enabled 0
1656 15:58:02.648955 PCI: 00:07.0: enabled 0
1657 15:58:02.649056 PCI: 00:07.1: enabled 0
1658 15:58:02.652382 PCI: 00:07.2: enabled 0
1659 15:58:02.655629 PCI: 00:07.3: enabled 0
1660 15:58:02.658854 PCI: 00:08.0: enabled 1
1661 15:58:02.658954 PCI: 00:09.0: enabled 0
1662 15:58:02.662311 PCI: 00:0a.0: enabled 0
1663 15:58:02.665923 PCI: 00:0d.0: enabled 1
1664 15:58:02.668700 PCI: 00:0d.1: enabled 0
1665 15:58:02.668782 PCI: 00:0d.2: enabled 0
1666 15:58:02.671985 PCI: 00:0d.3: enabled 0
1667 15:58:02.675784 PCI: 00:0e.0: enabled 0
1668 15:58:02.678914 PCI: 00:10.2: enabled 1
1669 15:58:02.679012 PCI: 00:10.6: enabled 0
1670 15:58:02.682026 PCI: 00:10.7: enabled 0
1671 15:58:02.685693 PCI: 00:12.0: enabled 0
1672 15:58:02.688973 PCI: 00:12.6: enabled 0
1673 15:58:02.689056 PCI: 00:13.0: enabled 0
1674 15:58:02.691893 PCI: 00:14.0: enabled 1
1675 15:58:02.694933 PCI: 00:14.1: enabled 0
1676 15:58:02.698270 PCI: 00:14.2: enabled 1
1677 15:58:02.698352 PCI: 00:14.3: enabled 1
1678 15:58:02.701677 PCI: 00:15.0: enabled 1
1679 15:58:02.704936 PCI: 00:15.1: enabled 1
1680 15:58:02.708213 PCI: 00:15.2: enabled 1
1681 15:58:02.708294 PCI: 00:15.3: enabled 1
1682 15:58:02.711577 PCI: 00:16.0: enabled 1
1683 15:58:02.714705 PCI: 00:16.1: enabled 0
1684 15:58:02.718036 PCI: 00:16.2: enabled 0
1685 15:58:02.718144 PCI: 00:16.3: enabled 0
1686 15:58:02.721837 PCI: 00:16.4: enabled 0
1687 15:58:02.725063 PCI: 00:16.5: enabled 0
1688 15:58:02.727914 PCI: 00:17.0: enabled 0
1689 15:58:02.727995 PCI: 00:19.0: enabled 0
1690 15:58:02.731374 PCI: 00:19.1: enabled 1
1691 15:58:02.734707 PCI: 00:19.2: enabled 0
1692 15:58:02.734789 PCI: 00:1c.0: enabled 1
1693 15:58:02.738045 PCI: 00:1c.1: enabled 0
1694 15:58:02.741306 PCI: 00:1c.2: enabled 0
1695 15:58:02.744616 PCI: 00:1c.3: enabled 0
1696 15:58:02.744697 PCI: 00:1c.4: enabled 0
1697 15:58:02.747887 PCI: 00:1c.5: enabled 0
1698 15:58:02.751214 PCI: 00:1c.6: enabled 1
1699 15:58:02.754624 PCI: 00:1c.7: enabled 0
1700 15:58:02.754706 PCI: 00:1d.0: enabled 1
1701 15:58:02.757700 PCI: 00:1d.1: enabled 0
1702 15:58:02.761055 PCI: 00:1d.2: enabled 1
1703 15:58:02.764480 PCI: 00:1d.3: enabled 0
1704 15:58:02.764562 PCI: 00:1e.0: enabled 1
1705 15:58:02.767521 PCI: 00:1e.1: enabled 0
1706 15:58:02.770778 PCI: 00:1e.2: enabled 1
1707 15:58:02.774168 PCI: 00:1e.3: enabled 1
1708 15:58:02.774272 PCI: 00:1f.0: enabled 1
1709 15:58:02.777748 PCI: 00:1f.1: enabled 0
1710 15:58:02.781164 PCI: 00:1f.2: enabled 1
1711 15:58:02.781282 PCI: 00:1f.3: enabled 1
1712 15:58:02.784020 PCI: 00:1f.4: enabled 0
1713 15:58:02.787338 PCI: 00:1f.5: enabled 1
1714 15:58:02.790619 PCI: 00:1f.6: enabled 0
1715 15:58:02.790705 PCI: 00:1f.7: enabled 0
1716 15:58:02.793928 APIC: 00: enabled 1
1717 15:58:02.797741 GENERIC: 0.0: enabled 1
1718 15:58:02.800916 GENERIC: 0.0: enabled 1
1719 15:58:02.800998 GENERIC: 1.0: enabled 1
1720 15:58:02.803889 GENERIC: 0.0: enabled 1
1721 15:58:02.807128 GENERIC: 1.0: enabled 1
1722 15:58:02.807212 USB0 port 0: enabled 1
1723 15:58:02.810901 GENERIC: 0.0: enabled 1
1724 15:58:02.813968 USB0 port 0: enabled 1
1725 15:58:02.817221 GENERIC: 0.0: enabled 1
1726 15:58:02.817302 I2C: 00:1a: enabled 1
1727 15:58:02.820708 I2C: 00:31: enabled 1
1728 15:58:02.824036 I2C: 00:32: enabled 1
1729 15:58:02.824117 I2C: 00:10: enabled 1
1730 15:58:02.827157 I2C: 00:15: enabled 1
1731 15:58:02.830533 GENERIC: 0.0: enabled 0
1732 15:58:02.833822 GENERIC: 1.0: enabled 0
1733 15:58:02.833904 GENERIC: 0.0: enabled 1
1734 15:58:02.837127 SPI: 00: enabled 1
1735 15:58:02.837208 SPI: 00: enabled 1
1736 15:58:02.840441 PNP: 0c09.0: enabled 1
1737 15:58:02.843597 GENERIC: 0.0: enabled 1
1738 15:58:02.846884 USB3 port 0: enabled 1
1739 15:58:02.846965 USB3 port 1: enabled 1
1740 15:58:02.850107 USB3 port 2: enabled 0
1741 15:58:02.853496 USB3 port 3: enabled 0
1742 15:58:02.853602 USB2 port 0: enabled 0
1743 15:58:02.856735 USB2 port 1: enabled 1
1744 15:58:02.859935 USB2 port 2: enabled 1
1745 15:58:02.863687 USB2 port 3: enabled 0
1746 15:58:02.863777 USB2 port 4: enabled 1
1747 15:58:02.867046 USB2 port 5: enabled 0
1748 15:58:02.870358 USB2 port 6: enabled 0
1749 15:58:02.870461 USB2 port 7: enabled 0
1750 15:58:02.873515 USB2 port 8: enabled 0
1751 15:58:02.876800 USB2 port 9: enabled 0
1752 15:58:02.880163 USB3 port 0: enabled 0
1753 15:58:02.880246 USB3 port 1: enabled 1
1754 15:58:02.883334 USB3 port 2: enabled 0
1755 15:58:02.886464 USB3 port 3: enabled 0
1756 15:58:02.886545 GENERIC: 0.0: enabled 1
1757 15:58:02.889776 GENERIC: 1.0: enabled 1
1758 15:58:02.893125 APIC: 01: enabled 1
1759 15:58:02.893207 APIC: 05: enabled 1
1760 15:58:02.896389 APIC: 03: enabled 1
1761 15:58:02.899468 APIC: 07: enabled 1
1762 15:58:02.899551 APIC: 06: enabled 1
1763 15:58:02.903403 APIC: 04: enabled 1
1764 15:58:02.906780 APIC: 02: enabled 1
1765 15:58:02.906864 PCI: 01:00.0: enabled 1
1766 15:58:02.912830 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1767 15:58:02.916090 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1768 15:58:02.919326 ELOG: NV offset 0xf30000 size 0x1000
1769 15:58:02.928128 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1770 15:58:02.934469 ELOG: Event(17) added with size 13 at 2023-09-06 15:56:54 UTC
1771 15:58:02.941642 ELOG: Event(92) added with size 9 at 2023-09-06 15:56:54 UTC
1772 15:58:02.948282 ELOG: Event(93) added with size 9 at 2023-09-06 15:56:54 UTC
1773 15:58:02.954502 ELOG: Event(9E) added with size 10 at 2023-09-06 15:56:54 UTC
1774 15:58:02.961334 ELOG: Event(9F) added with size 14 at 2023-09-06 15:56:54 UTC
1775 15:58:02.967859 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1776 15:58:02.974141 ELOG: Event(A1) added with size 10 at 2023-09-06 15:56:54 UTC
1777 15:58:02.981116 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1778 15:58:02.987779 ELOG: Event(A0) added with size 9 at 2023-09-06 15:56:54 UTC
1779 15:58:02.991034 elog_add_boot_reason: Logged dev mode boot
1780 15:58:02.997657 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1781 15:58:02.997740 Finalize devices...
1782 15:58:03.000906 Devices finalized
1783 15:58:03.007745 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1784 15:58:03.010970 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1785 15:58:03.017631 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1786 15:58:03.020957 ME: HFSTS1 : 0x80030055
1787 15:58:03.027378 ME: HFSTS2 : 0x30280116
1788 15:58:03.030476 ME: HFSTS3 : 0x00000050
1789 15:58:03.034101 ME: HFSTS4 : 0x00004000
1790 15:58:03.040664 ME: HFSTS5 : 0x00000000
1791 15:58:03.043796 ME: HFSTS6 : 0x40400006
1792 15:58:03.047291 ME: Manufacturing Mode : YES
1793 15:58:03.050567 ME: SPI Protection Mode Enabled : NO
1794 15:58:03.056897 ME: FW Partition Table : OK
1795 15:58:03.060037 ME: Bringup Loader Failure : NO
1796 15:58:03.063367 ME: Firmware Init Complete : NO
1797 15:58:03.066681 ME: Boot Options Present : NO
1798 15:58:03.069990 ME: Update In Progress : NO
1799 15:58:03.073259 ME: D0i3 Support : YES
1800 15:58:03.077021 ME: Low Power State Enabled : NO
1801 15:58:03.080239 ME: CPU Replaced : YES
1802 15:58:03.086886 ME: CPU Replacement Valid : YES
1803 15:58:03.090100 ME: Current Working State : 5
1804 15:58:03.093352 ME: Current Operation State : 1
1805 15:58:03.096640 ME: Current Operation Mode : 3
1806 15:58:03.100009 ME: Error Code : 0
1807 15:58:03.103391 ME: Enhanced Debug Mode : NO
1808 15:58:03.106574 ME: CPU Debug Disabled : YES
1809 15:58:03.109701 ME: TXT Support : NO
1810 15:58:03.116610 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1811 15:58:03.126096 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1812 15:58:03.129305 CBFS: 'fallback/slic' not found.
1813 15:58:03.133172 ACPI: Writing ACPI tables at 76b01000.
1814 15:58:03.133254 ACPI: * FACS
1815 15:58:03.136379 ACPI: * DSDT
1816 15:58:03.139559 Ramoops buffer: 0x100000@0x76a00000.
1817 15:58:03.142641 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1818 15:58:03.149453 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1819 15:58:03.152393 Google Chrome EC: version:
1820 15:58:03.156204 ro: voema_v2.0.10114-a447f03e46
1821 15:58:03.159429 rw: voema_v2.0.10132-7b2059e3bc
1822 15:58:03.159535 running image: 2
1823 15:58:03.165838 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1824 15:58:03.171096 ACPI: * FADT
1825 15:58:03.171215 SCI is IRQ9
1826 15:58:03.177943 ACPI: added table 1/32, length now 40
1827 15:58:03.178025 ACPI: * SSDT
1828 15:58:03.181227 Found 1 CPU(s) with 8 core(s) each.
1829 15:58:03.187390 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1830 15:58:03.190519 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1831 15:58:03.194236 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1832 15:58:03.197346 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1833 15:58:03.204041 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1834 15:58:03.210803 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1835 15:58:03.214064 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1836 15:58:03.220373 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1837 15:58:03.227473 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1838 15:58:03.230741 \_SB.PCI0.RP09: Added StorageD3Enable property
1839 15:58:03.236725 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1840 15:58:03.240101 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1841 15:58:03.246729 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1842 15:58:03.250145 PS2K: Passing 80 keymaps to kernel
1843 15:58:03.256858 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1844 15:58:03.263549 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1845 15:58:03.269773 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1846 15:58:03.276893 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1847 15:58:03.282900 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1848 15:58:03.289459 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1849 15:58:03.296155 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1850 15:58:03.303053 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1851 15:58:03.306189 ACPI: added table 2/32, length now 44
1852 15:58:03.306296 ACPI: * MCFG
1853 15:58:03.312509 ACPI: added table 3/32, length now 48
1854 15:58:03.312610 ACPI: * TPM2
1855 15:58:03.316390 TPM2 log created at 0x769f0000
1856 15:58:03.319710 ACPI: added table 4/32, length now 52
1857 15:58:03.322961 ACPI: * MADT
1858 15:58:03.323036 SCI is IRQ9
1859 15:58:03.326177 ACPI: added table 5/32, length now 56
1860 15:58:03.329264 current = 76b09850
1861 15:58:03.329364 ACPI: * DMAR
1862 15:58:03.332524 ACPI: added table 6/32, length now 60
1863 15:58:03.338880 ACPI: added table 7/32, length now 64
1864 15:58:03.338955 ACPI: * HPET
1865 15:58:03.342271 ACPI: added table 8/32, length now 68
1866 15:58:03.345595 ACPI: done.
1867 15:58:03.345684 ACPI tables: 35216 bytes.
1868 15:58:03.348864 smbios_write_tables: 769ef000
1869 15:58:03.352146 EC returned error result code 3
1870 15:58:03.355395 Couldn't obtain OEM name from CBI
1871 15:58:03.359509 Create SMBIOS type 16
1872 15:58:03.362818 Create SMBIOS type 17
1873 15:58:03.365988 GENERIC: 0.0 (WIFI Device)
1874 15:58:03.369124 SMBIOS tables: 1734 bytes.
1875 15:58:03.372902 Writing table forward entry at 0x00000500
1876 15:58:03.379392 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1877 15:58:03.382769 Writing coreboot table at 0x76b25000
1878 15:58:03.389349 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1879 15:58:03.392746 1. 0000000000001000-000000000009ffff: RAM
1880 15:58:03.396022 2. 00000000000a0000-00000000000fffff: RESERVED
1881 15:58:03.402693 3. 0000000000100000-00000000769eefff: RAM
1882 15:58:03.406013 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1883 15:58:03.412179 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1884 15:58:03.419097 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1885 15:58:03.422221 7. 0000000077000000-000000007fbfffff: RESERVED
1886 15:58:03.428967 8. 00000000c0000000-00000000cfffffff: RESERVED
1887 15:58:03.432093 9. 00000000f8000000-00000000f9ffffff: RESERVED
1888 15:58:03.435440 10. 00000000fb000000-00000000fb000fff: RESERVED
1889 15:58:03.442027 11. 00000000fe000000-00000000fe00ffff: RESERVED
1890 15:58:03.445267 12. 00000000fed80000-00000000fed87fff: RESERVED
1891 15:58:03.452080 13. 00000000fed90000-00000000fed92fff: RESERVED
1892 15:58:03.455410 14. 00000000feda0000-00000000feda1fff: RESERVED
1893 15:58:03.462007 15. 00000000fedc0000-00000000feddffff: RESERVED
1894 15:58:03.465315 16. 0000000100000000-00000004803fffff: RAM
1895 15:58:03.468562 Passing 4 GPIOs to payload:
1896 15:58:03.471790 NAME | PORT | POLARITY | VALUE
1897 15:58:03.478169 lid | undefined | high | high
1898 15:58:03.485100 power | undefined | high | low
1899 15:58:03.488271 oprom | undefined | high | low
1900 15:58:03.494415 EC in RW | 0x000000e5 | high | high
1901 15:58:04.149620 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1902 15:58:04.149798 coreboot table: 1576 bytes.
1903 15:58:04.149906 IMD ROOT 0. 0x76fff000 0x00001000
1904 15:58:04.150032 IMD SMALL 1. 0x76ffe000 0x00001000
1905 15:58:04.150139 FSP MEMORY 2. 0x76c4e000 0x003b0000
1906 15:58:04.150199 VPD 3. 0x76c4d000 0x00000367
1907 15:58:04.150257 RO MCACHE 4. 0x76c4c000 0x00000fdc
1908 15:58:04.150329 CONSOLE 5. 0x76c2c000 0x00020000
1909 15:58:04.150400 FMAP 6. 0x76c2b000 0x00000578
1910 15:58:04.150456 TIME STAMP 7. 0x76c2a000 0x00000910
1911 15:58:04.150540 VBOOT WORK 8. 0x76c16000 0x00014000
1912 15:58:04.150615 ROMSTG STCK 9. 0x76c15000 0x00001000
1913 15:58:04.150671 AFTER CAR 10. 0x76c0a000 0x0000b000
1914 15:58:04.150724 RAMSTAGE 11. 0x76b97000 0x00073000
1915 15:58:04.150777 REFCODE 12. 0x76b42000 0x00055000
1916 15:58:04.150830 SMM BACKUP 13. 0x76b32000 0x00010000
1917 15:58:04.150884 4f444749 14. 0x76b30000 0x00002000
1918 15:58:04.150938 EXT VBT15. 0x76b2d000 0x0000219f
1919 15:58:04.150991 COREBOOT 16. 0x76b25000 0x00008000
1920 15:58:04.151045 ACPI 17. 0x76b01000 0x00024000
1921 15:58:04.151097 ACPI GNVS 18. 0x76b00000 0x00001000
1922 15:58:04.151150 RAMOOPS 19. 0x76a00000 0x00100000
1923 15:58:04.151203 TPM2 TCGLOG20. 0x769f0000 0x00010000
1924 15:58:04.151256 SMBIOS 21. 0x769ef000 0x00000800
1925 15:58:04.151326 IMD small region:
1926 15:58:04.151379 IMD ROOT 0. 0x76ffec00 0x00000400
1927 15:58:04.151447 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1928 15:58:04.151500 POWER STATE 2. 0x76ffeb80 0x00000044
1929 15:58:04.151581 ROMSTAGE 3. 0x76ffeb60 0x00000004
1930 15:58:04.151671 MEM INFO 4. 0x76ffe980 0x000001e0
1931 15:58:04.151725 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1932 15:58:04.151779 MTRR: Physical address space:
1933 15:58:04.151831 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1934 15:58:04.151888 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1935 15:58:04.151943 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1936 15:58:04.151997 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1937 15:58:04.152052 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1938 15:58:04.152106 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1939 15:58:04.152162 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1940 15:58:04.152217 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 15:58:04.152269 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 15:58:04.152321 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 15:58:04.152373 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 15:58:04.152426 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 15:58:04.152477 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 15:58:04.152529 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 15:58:04.152582 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 15:58:04.152634 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 15:58:04.152686 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 15:58:04.152737 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 15:58:04.152789 call enable_fixed_mtrr()
1952 15:58:04.152841 CPU physical address size: 39 bits
1953 15:58:04.152893 MTRR: default type WB/UC MTRR counts: 6/7.
1954 15:58:04.152945 MTRR: WB selected as default type.
1955 15:58:04.152997 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 15:58:04.153050 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 15:58:04.153103 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 15:58:04.153155 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1959 15:58:04.153207 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1960 15:58:04.153260 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1961 15:58:04.153312
1962 15:58:04.153365 MTRR check
1963 15:58:04.153417 Fixed MTRRs : Enabled
1964 15:58:04.153471 Variable MTRRs: Enabled
1965 15:58:04.153523
1966 15:58:04.153575 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 15:58:04.153628 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 15:58:04.153680 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 15:58:04.153733 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 15:58:04.153785 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 15:58:04.153837 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 15:58:04.153921 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 15:58:04.153974 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 15:58:04.154026 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 15:58:04.154110 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 15:58:04.154163 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 15:58:04.154215 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1978 15:58:04.154268 call enable_fixed_mtrr()
1979 15:58:04.154320 Checking cr50 for pending updates
1980 15:58:04.154372 CPU physical address size: 39 bits
1981 15:58:04.154425 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 15:58:04.154477 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 15:58:04.154563 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 15:58:04.154620 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 15:58:04.154687 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 15:58:04.154740 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 15:58:04.154792 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 15:58:04.154845 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 15:58:04.154898 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 15:58:04.154950 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 15:58:04.155002 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 15:58:04.155054 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 15:58:04.155107 call enable_fixed_mtrr()
1994 15:58:04.155159 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 15:58:04.155211 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 15:58:04.155263 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 15:58:04.155315 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 15:58:04.155401 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 15:58:04.155454 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 15:58:04.155692 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 15:58:04.155752 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 15:58:04.155808 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 15:58:04.155862 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 15:58:04.155916 CPU physical address size: 39 bits
2005 15:58:04.155971 call enable_fixed_mtrr()
2006 15:58:04.156025 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 15:58:04.156079 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 15:58:04.156133 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 15:58:04.156187 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 15:58:04.156241 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 15:58:04.156295 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 15:58:04.156350 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 15:58:04.156404 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 15:58:04.156457 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 15:58:04.156515 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 15:58:04.156603 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 15:58:04.156686 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 15:58:04.156757 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 15:58:04.156810 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 15:58:04.156863 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 15:58:04.156916 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 15:58:04.156968 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 15:58:04.157021 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 15:58:04.157073 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 15:58:04.157159 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 15:58:04.157211 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 15:58:04.157264 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 15:58:04.157316 call enable_fixed_mtrr()
2029 15:58:04.157368 call enable_fixed_mtrr()
2030 15:58:04.157421 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 15:58:04.157473 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 15:58:04.157526 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 15:58:04.157578 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 15:58:04.157631 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 15:58:04.157702 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 15:58:04.157769 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 15:58:04.157821 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 15:58:04.157905 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 15:58:04.157959 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 15:58:04.158012 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 15:58:04.158064 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 15:58:04.158117 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 15:58:04.158169 call enable_fixed_mtrr()
2044 15:58:04.158221 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 15:58:04.158291 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 15:58:04.158375 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 15:58:04.158430 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 15:58:04.158482 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 15:58:04.158560 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 15:58:04.158629 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 15:58:04.158681 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 15:58:04.158734 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 15:58:04.158786 CPU physical address size: 39 bits
2054 15:58:04.158881 call enable_fixed_mtrr()
2055 15:58:04.158949 CPU physical address size: 39 bits
2056 15:58:04.159002 CPU physical address size: 39 bits
2057 15:58:04.159054 CPU physical address size: 39 bits
2058 15:58:04.159106 CPU physical address size: 39 bits
2059 15:58:04.159158 Reading cr50 TPM mode
2060 15:58:04.164602 BS: BS_PAYLOAD_LOAD entry times (exec / console): 334 / 6 ms
2061 15:58:04.174476 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2062 15:58:04.177654 Checking segment from ROM address 0xffc02b38
2063 15:58:04.181001 Checking segment from ROM address 0xffc02b54
2064 15:58:04.187729 Loading segment from ROM address 0xffc02b38
2065 15:58:04.187882 code (compression=0)
2066 15:58:04.197789 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2067 15:58:04.207893 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2068 15:58:04.208115 it's not compressed!
2069 15:58:04.348607 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2070 15:58:04.355298 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2071 15:58:04.361674 Loading segment from ROM address 0xffc02b54
2072 15:58:04.365436 Entry Point 0x30000000
2073 15:58:04.365524 Loaded segments
2074 15:58:04.371814 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2075 15:58:04.416759 Finalizing chipset.
2076 15:58:04.420042 Finalizing SMM.
2077 15:58:04.420157 APMC done.
2078 15:58:04.426674 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2079 15:58:04.430072 mp_park_aps done after 0 msecs.
2080 15:58:04.433169 Jumping to boot code at 0x30000000(0x76b25000)
2081 15:58:04.443099 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2082 15:58:04.443274
2083 15:58:04.446394
2084 15:58:04.446592
2085 15:58:04.447184 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2086 15:58:04.447415 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2087 15:58:04.447627 Setting prompt string to ['volteer:']
2088 15:58:04.447823 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2089 15:58:04.450190 Starting depthcharge on Voema...
2090 15:58:04.450432
2091 15:58:04.456785 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2092 15:58:04.457084
2093 15:58:04.463766 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2094 15:58:04.464189
2095 15:58:04.470251 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2096 15:58:04.470673
2097 15:58:04.473584 Failed to find eMMC card reader
2098 15:58:04.474007
2099 15:58:04.476807 Wipe memory regions:
2100 15:58:04.477226
2101 15:58:04.479993 [0x00000000001000, 0x000000000a0000)
2102 15:58:04.480412
2103 15:58:04.483334 [0x00000000100000, 0x00000030000000)
2104 15:58:04.518828
2105 15:58:04.522340 [0x00000032662db0, 0x000000769ef000)
2106 15:58:04.571354
2107 15:58:04.574637 [0x00000100000000, 0x00000480400000)
2108 15:58:05.204781
2109 15:58:05.207989 ec_init: CrosEC protocol v3 supported (256, 256)
2110 15:58:05.638657
2111 15:58:05.639355 R8152: Initializing
2112 15:58:05.639966
2113 15:58:05.641771 Version 6 (ocp_data = 5c30)
2114 15:58:05.642273
2115 15:58:05.645010 R8152: Done initializing
2116 15:58:05.645512
2117 15:58:05.648318 Adding net device
2118 15:58:05.949687
2119 15:58:05.952922 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2120 15:58:05.953338
2121 15:58:05.953785
2122 15:58:05.954170
2123 15:58:05.956870 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2125 15:58:06.058421 volteer: tftpboot 192.168.201.1 11447415/tftp-deploy-0l4lt34g/kernel/bzImage 11447415/tftp-deploy-0l4lt34g/kernel/cmdline 11447415/tftp-deploy-0l4lt34g/ramdisk/ramdisk.cpio.gz
2126 15:58:06.058985 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2127 15:58:06.059402 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2128 15:58:06.063549 tftpboot 192.168.201.1 11447415/tftp-deploy-0l4lt34g/kernel/bzIploy-0l4lt34g/kernel/cmdline 11447415/tftp-deploy-0l4lt34g/ramdisk/ramdisk.cpio.gz
2129 15:58:06.064027
2130 15:58:06.064362 Waiting for link
2131 15:58:06.266985
2132 15:58:06.267478 done.
2133 15:58:06.267857
2134 15:58:06.268172 MAC: 00:24:32:30:7e:22
2135 15:58:06.268526
2136 15:58:06.270344 Sending DHCP discover... done.
2137 15:58:06.270766
2138 15:58:06.273544 Waiting for reply... done.
2139 15:58:06.273967
2140 15:58:06.279756 Sending DHCP request... done.
2141 15:58:06.280237
2142 15:58:06.298523 Waiting for reply... done.
2143 15:58:06.298941
2144 15:58:06.299325 My ip is 192.168.201.21
2145 15:58:06.299687
2146 15:58:06.305095 The DHCP server ip is 192.168.201.1
2147 15:58:06.305517
2148 15:58:06.308301 TFTP server IP predefined by user: 192.168.201.1
2149 15:58:06.308775
2150 15:58:06.314474 Bootfile predefined by user: 11447415/tftp-deploy-0l4lt34g/kernel/bzImage
2151 15:58:06.314901
2152 15:58:06.318147 Sending tftp read request... done.
2153 15:58:06.318572
2154 15:58:06.327705 Waiting for the transfer...
2155 15:58:06.328134
2156 15:58:06.869932 00000000 ################################################################
2157 15:58:06.870062
2158 15:58:07.408680 00080000 ################################################################
2159 15:58:07.408853
2160 15:58:07.934222 00100000 ################################################################
2161 15:58:07.934363
2162 15:58:08.472216 00180000 ################################################################
2163 15:58:08.472357
2164 15:58:08.990659 00200000 ################################################################
2165 15:58:08.990803
2166 15:58:09.514596 00280000 ################################################################
2167 15:58:09.514746
2168 15:58:10.095707 00300000 ################################################################
2169 15:58:10.095844
2170 15:58:10.627778 00380000 ################################################################
2171 15:58:10.628008
2172 15:58:11.213250 00400000 ################################################################
2173 15:58:11.213785
2174 15:58:11.818884 00480000 ################################################################
2175 15:58:11.819032
2176 15:58:12.390911 00500000 ################################################################
2177 15:58:12.391069
2178 15:58:12.969894 00580000 ################################################################
2179 15:58:12.970042
2180 15:58:13.499132 00600000 ################################################################
2181 15:58:13.499289
2182 15:58:14.038572 00680000 ################################################################
2183 15:58:14.038725
2184 15:58:14.571023 00700000 ################################################################
2185 15:58:14.571154
2186 15:58:15.143914 00780000 ################################################################
2187 15:58:15.144052
2188 15:58:15.253812 00800000 ############# done.
2189 15:58:15.253982
2190 15:58:15.256892 The bootfile was 8490896 bytes long.
2191 15:58:15.257002
2192 15:58:15.260084 Sending tftp read request... done.
2193 15:58:15.260191
2194 15:58:15.263358 Waiting for the transfer...
2195 15:58:15.263463
2196 15:58:15.807823 00000000 ################################################################
2197 15:58:15.807980
2198 15:58:16.360121 00080000 ################################################################
2199 15:58:16.360253
2200 15:58:16.909250 00100000 ################################################################
2201 15:58:16.909403
2202 15:58:17.472998 00180000 ################################################################
2203 15:58:17.473813
2204 15:58:18.090494 00200000 ################################################################
2205 15:58:18.090686
2206 15:58:18.688996 00280000 ################################################################
2207 15:58:18.689184
2208 15:58:19.349742 00300000 ################################################################
2209 15:58:19.349924
2210 15:58:20.006991 00380000 ################################################################
2211 15:58:20.007155
2212 15:58:20.655948 00400000 ################################################################
2213 15:58:20.656096
2214 15:58:21.277097 00480000 ################################################################
2215 15:58:21.277277
2216 15:58:21.901810 00500000 ################################################################
2217 15:58:21.901986
2218 15:58:22.546292 00580000 ################################################################
2219 15:58:22.546473
2220 15:58:23.134625 00600000 ################################################################
2221 15:58:23.134780
2222 15:58:23.756252 00680000 ################################################################
2223 15:58:23.756401
2224 15:58:24.413725 00700000 ################################################################
2225 15:58:24.413880
2226 15:58:25.076569 00780000 ################################################################
2227 15:58:25.076789
2228 15:58:25.620666 00800000 ####################################################### done.
2229 15:58:25.620851
2230 15:58:25.623941 Sending tftp read request... done.
2231 15:58:25.624055
2232 15:58:25.627277 Waiting for the transfer...
2233 15:58:25.627401
2234 15:58:25.630455 00000000 # done.
2235 15:58:25.630568
2236 15:58:25.639962 Command line loaded dynamically from TFTP file: 11447415/tftp-deploy-0l4lt34g/kernel/cmdline
2237 15:58:25.640054
2238 15:58:25.653345 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2239 15:58:25.658495
2240 15:58:25.662435 Shutting down all USB controllers.
2241 15:58:25.662541
2242 15:58:25.662645 Removing current net device
2243 15:58:25.662738
2244 15:58:25.665608 Finalizing coreboot
2245 15:58:25.665716
2246 15:58:25.671924 Exiting depthcharge with code 4 at timestamp: 29806753
2247 15:58:25.672007
2248 15:58:25.672076
2249 15:58:25.672146 Starting kernel ...
2250 15:58:25.672207
2251 15:58:25.672274
2252 15:58:25.672898 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2253 15:58:25.673028 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2254 15:58:25.673140 Setting prompt string to ['Linux version [0-9]']
2255 15:58:25.673244 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2256 15:58:25.673351 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2258 16:02:48.673319 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2260 16:02:48.673540 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2262 16:02:48.673701 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2265 16:02:48.673951 end: 2 depthcharge-action (duration 00:05:00) [common]
2267 16:02:48.674169 Cleaning after the job
2268 16:02:48.674262 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447415/tftp-deploy-0l4lt34g/ramdisk
2269 16:02:48.675562 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447415/tftp-deploy-0l4lt34g/kernel
2270 16:02:48.676929 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447415/tftp-deploy-0l4lt34g/modules
2271 16:02:48.677420 start: 5.1 power-off (timeout 00:00:30) [common]
2272 16:02:48.677705 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2273 16:02:48.755073 >> Command sent successfully.
2274 16:02:48.757541 Returned 0 in 0 seconds
2275 16:02:48.857973 end: 5.1 power-off (duration 00:00:00) [common]
2277 16:02:48.858323 start: 5.2 read-feedback (timeout 00:10:00) [common]
2278 16:02:48.858592 Listened to connection for namespace 'common' for up to 1s
2279 16:02:49.859552 Finalising connection for namespace 'common'
2280 16:02:49.859793 Disconnecting from shell: Finalise
2281 16:02:49.859881
2282 16:02:49.960242 end: 5.2 read-feedback (duration 00:00:01) [common]
2283 16:02:49.960404 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11447415
2284 16:02:49.977175 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11447415
2285 16:02:49.977379 JobError: Your job cannot terminate cleanly.