Boot log: acer-cbv514-1h-34uz-brya
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Errors: 2
- Kernel Warnings: 0
1 15:55:45.229552 lava-dispatcher, installed at version: 2023.06
2 15:55:45.229752 start: 0 validate
3 15:55:45.229878 Start time: 2023-09-06 15:55:45.229871+00:00 (UTC)
4 15:55:45.229999 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:55:45.230145 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:55:45.485581 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:55:45.486385 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1638-gdc4a7f7fb55c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:55:45.751588 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:55:45.752316 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1638-gdc4a7f7fb55c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:56:12.623099 validate duration: 27.39
12 15:56:12.623402 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:56:12.623495 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:56:12.623578 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:56:12.623703 Not decompressing ramdisk as can be used compressed.
16 15:56:12.623784 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:56:12.623848 saving as /var/lib/lava/dispatcher/tmp/11447402/tftp-deploy-wclmmfql/ramdisk/rootfs.cpio.gz
18 15:56:12.623912 total size: 8418130 (8 MB)
19 15:56:13.542397 progress 0 % (0 MB)
20 15:56:13.547492 progress 5 % (0 MB)
21 15:56:13.549679 progress 10 % (0 MB)
22 15:56:13.551911 progress 15 % (1 MB)
23 15:56:13.554105 progress 20 % (1 MB)
24 15:56:13.556332 progress 25 % (2 MB)
25 15:56:13.558515 progress 30 % (2 MB)
26 15:56:13.560574 progress 35 % (2 MB)
27 15:56:13.562756 progress 40 % (3 MB)
28 15:56:13.565079 progress 45 % (3 MB)
29 15:56:13.567292 progress 50 % (4 MB)
30 15:56:13.569480 progress 55 % (4 MB)
31 15:56:13.571699 progress 60 % (4 MB)
32 15:56:13.573678 progress 65 % (5 MB)
33 15:56:13.575852 progress 70 % (5 MB)
34 15:56:13.577993 progress 75 % (6 MB)
35 15:56:13.580167 progress 80 % (6 MB)
36 15:56:13.582296 progress 85 % (6 MB)
37 15:56:13.584477 progress 90 % (7 MB)
38 15:56:13.586658 progress 95 % (7 MB)
39 15:56:13.588715 progress 100 % (8 MB)
40 15:56:13.588938 8 MB downloaded in 0.97 s (8.32 MB/s)
41 15:56:13.589090 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:56:13.589326 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:56:13.589410 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:56:13.589495 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:56:13.589636 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1638-gdc4a7f7fb55c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:56:13.589707 saving as /var/lib/lava/dispatcher/tmp/11447402/tftp-deploy-wclmmfql/kernel/bzImage
48 15:56:13.589766 total size: 8490896 (8 MB)
49 15:56:13.589826 No compression specified
50 15:56:13.856701 progress 0 % (0 MB)
51 15:56:13.869468 progress 5 % (0 MB)
52 15:56:13.882397 progress 10 % (0 MB)
53 15:56:13.892484 progress 15 % (1 MB)
54 15:56:13.898603 progress 20 % (1 MB)
55 15:56:13.903440 progress 25 % (2 MB)
56 15:56:13.907574 progress 30 % (2 MB)
57 15:56:13.911254 progress 35 % (2 MB)
58 15:56:13.914511 progress 40 % (3 MB)
59 15:56:13.917623 progress 45 % (3 MB)
60 15:56:13.920491 progress 50 % (4 MB)
61 15:56:13.923157 progress 55 % (4 MB)
62 15:56:13.925697 progress 60 % (4 MB)
63 15:56:13.928076 progress 65 % (5 MB)
64 15:56:13.930350 progress 70 % (5 MB)
65 15:56:13.932608 progress 75 % (6 MB)
66 15:56:13.934791 progress 80 % (6 MB)
67 15:56:13.936979 progress 85 % (6 MB)
68 15:56:13.939179 progress 90 % (7 MB)
69 15:56:13.941361 progress 95 % (7 MB)
70 15:56:13.943563 progress 100 % (8 MB)
71 15:56:13.943676 8 MB downloaded in 0.35 s (22.88 MB/s)
72 15:56:13.943822 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:56:13.944050 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:56:13.944135 start: 1.3 download-retry (timeout 00:09:59) [common]
76 15:56:13.944217 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 15:56:13.944359 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1638-gdc4a7f7fb55c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:56:13.944430 saving as /var/lib/lava/dispatcher/tmp/11447402/tftp-deploy-wclmmfql/modules/modules.tar
79 15:56:13.944490 total size: 250824 (0 MB)
80 15:56:13.944551 Using unxz to decompress xz
81 15:56:13.948428 progress 13 % (0 MB)
82 15:56:13.948816 progress 26 % (0 MB)
83 15:56:13.949050 progress 39 % (0 MB)
84 15:56:13.950632 progress 52 % (0 MB)
85 15:56:13.952477 progress 65 % (0 MB)
86 15:56:13.954333 progress 78 % (0 MB)
87 15:56:13.956190 progress 91 % (0 MB)
88 15:56:13.957909 progress 100 % (0 MB)
89 15:56:13.963444 0 MB downloaded in 0.02 s (12.62 MB/s)
90 15:56:13.963678 end: 1.3.1 http-download (duration 00:00:00) [common]
92 15:56:13.963940 end: 1.3 download-retry (duration 00:00:00) [common]
93 15:56:13.964063 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 15:56:13.964172 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 15:56:13.964255 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 15:56:13.964340 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 15:56:13.964559 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf
98 15:56:13.964696 makedir: /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin
99 15:56:13.964803 makedir: /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/tests
100 15:56:13.964903 makedir: /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/results
101 15:56:13.965015 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-add-keys
102 15:56:13.965160 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-add-sources
103 15:56:13.965290 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-background-process-start
104 15:56:13.965418 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-background-process-stop
105 15:56:13.965542 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-common-functions
106 15:56:13.965666 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-echo-ipv4
107 15:56:13.965791 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-install-packages
108 15:56:13.965913 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-installed-packages
109 15:56:13.966038 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-os-build
110 15:56:13.966161 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-probe-channel
111 15:56:13.966284 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-probe-ip
112 15:56:13.966407 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-target-ip
113 15:56:13.966533 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-target-mac
114 15:56:13.966655 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-target-storage
115 15:56:13.966782 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-test-case
116 15:56:13.966935 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-test-event
117 15:56:13.967061 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-test-feedback
118 15:56:13.967185 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-test-raise
119 15:56:13.967323 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-test-reference
120 15:56:13.967450 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-test-runner
121 15:56:13.967574 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-test-set
122 15:56:13.967699 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-test-shell
123 15:56:13.967829 Updating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-install-packages (oe)
124 15:56:13.967981 Updating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/bin/lava-installed-packages (oe)
125 15:56:13.968106 Creating /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/environment
126 15:56:13.968206 LAVA metadata
127 15:56:13.968278 - LAVA_JOB_ID=11447402
128 15:56:13.968343 - LAVA_DISPATCHER_IP=192.168.201.1
129 15:56:13.968464 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 15:56:13.968589 skipped lava-vland-overlay
131 15:56:13.968679 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 15:56:13.968761 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 15:56:13.968824 skipped lava-multinode-overlay
134 15:56:13.968897 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 15:56:13.968973 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 15:56:13.969044 Loading test definitions
137 15:56:13.969135 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 15:56:13.969216 Using /lava-11447402 at stage 0
139 15:56:13.969534 uuid=11447402_1.4.2.3.1 testdef=None
140 15:56:13.969621 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 15:56:13.969708 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 15:56:13.970238 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 15:56:13.970453 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 15:56:13.971089 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 15:56:13.971325 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 15:56:13.971940 runner path: /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/0/tests/0_dmesg test_uuid 11447402_1.4.2.3.1
149 15:56:13.972094 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 15:56:13.972320 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 15:56:13.972391 Using /lava-11447402 at stage 1
153 15:56:13.972693 uuid=11447402_1.4.2.3.5 testdef=None
154 15:56:13.972781 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 15:56:13.972863 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 15:56:13.973340 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 15:56:13.973557 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 15:56:13.974198 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 15:56:13.974421 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 15:56:13.975047 runner path: /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/1/tests/1_bootrr test_uuid 11447402_1.4.2.3.5
163 15:56:13.975199 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 15:56:13.975445 Creating lava-test-runner.conf files
166 15:56:13.975507 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/0 for stage 0
167 15:56:13.975596 - 0_dmesg
168 15:56:13.975676 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11447402/lava-overlay-8io2pbzf/lava-11447402/1 for stage 1
169 15:56:13.975765 - 1_bootrr
170 15:56:13.975856 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 15:56:13.975940 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 15:56:13.984303 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 15:56:13.984409 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 15:56:13.984495 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 15:56:13.984580 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 15:56:13.984664 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 15:56:14.229919 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 15:56:14.230304 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
179 15:56:14.230421 extracting modules file /var/lib/lava/dispatcher/tmp/11447402/tftp-deploy-wclmmfql/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11447402/extract-overlay-ramdisk-o7_6d73y/ramdisk
180 15:56:14.243620 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 15:56:14.243732 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
182 15:56:14.243824 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11447402/compress-overlay-dfcus_27/overlay-1.4.2.4.tar.gz to ramdisk
183 15:56:14.243898 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11447402/compress-overlay-dfcus_27/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11447402/extract-overlay-ramdisk-o7_6d73y/ramdisk
184 15:56:14.252594 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 15:56:14.252703 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
186 15:56:14.252797 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 15:56:14.252889 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
188 15:56:14.252971 Building ramdisk /var/lib/lava/dispatcher/tmp/11447402/extract-overlay-ramdisk-o7_6d73y/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11447402/extract-overlay-ramdisk-o7_6d73y/ramdisk
189 15:56:14.383828 >> 49788 blocks
190 15:56:15.203456 rename /var/lib/lava/dispatcher/tmp/11447402/extract-overlay-ramdisk-o7_6d73y/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11447402/tftp-deploy-wclmmfql/ramdisk/ramdisk.cpio.gz
191 15:56:15.203887 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 15:56:15.204003 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
193 15:56:15.204104 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
194 15:56:15.204198 No mkimage arch provided, not using FIT.
195 15:56:15.204286 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 15:56:15.204367 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 15:56:15.204477 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 15:56:15.204567 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
199 15:56:15.204646 No LXC device requested
200 15:56:15.204724 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 15:56:15.204810 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
202 15:56:15.204888 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 15:56:15.204957 Checking files for TFTP limit of 4294967296 bytes.
204 15:56:15.205339 end: 1 tftp-deploy (duration 00:00:03) [common]
205 15:56:15.205441 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 15:56:15.205527 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 15:56:15.205643 substitutions:
208 15:56:15.205707 - {DTB}: None
209 15:56:15.205766 - {INITRD}: 11447402/tftp-deploy-wclmmfql/ramdisk/ramdisk.cpio.gz
210 15:56:15.205824 - {KERNEL}: 11447402/tftp-deploy-wclmmfql/kernel/bzImage
211 15:56:15.205879 - {LAVA_MAC}: None
212 15:56:15.205932 - {PRESEED_CONFIG}: None
213 15:56:15.205985 - {PRESEED_LOCAL}: None
214 15:56:15.206037 - {RAMDISK}: 11447402/tftp-deploy-wclmmfql/ramdisk/ramdisk.cpio.gz
215 15:56:15.206089 - {ROOT_PART}: None
216 15:56:15.206140 - {ROOT}: None
217 15:56:15.206192 - {SERVER_IP}: 192.168.201.1
218 15:56:15.206243 - {TEE}: None
219 15:56:15.206295 Parsed boot commands:
220 15:56:15.206346 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 15:56:15.206511 Parsed boot commands: tftpboot 192.168.201.1 11447402/tftp-deploy-wclmmfql/kernel/bzImage 11447402/tftp-deploy-wclmmfql/kernel/cmdline 11447402/tftp-deploy-wclmmfql/ramdisk/ramdisk.cpio.gz
222 15:56:15.206595 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 15:56:15.206678 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 15:56:15.206768 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 15:56:15.206852 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 15:56:15.206917 Not connected, no need to disconnect.
227 15:56:15.206987 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 15:56:15.207066 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 15:56:15.207131 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-9'
230 15:56:15.210839 Setting prompt string to ['lava-test: # ']
231 15:56:15.211171 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 15:56:15.211314 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 15:56:15.211407 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 15:56:15.211522 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 15:56:15.211744 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=reboot'
236 15:56:20.364019 >> Command sent successfully.
237 15:56:20.375527 Returned 0 in 5 seconds
238 15:56:20.476848 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 15:56:20.478390 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 15:56:20.478929 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 15:56:20.479452 Setting prompt string to 'Starting depthcharge on Volmar...'
243 15:56:20.479823 Changing prompt to 'Starting depthcharge on Volmar...'
244 15:56:20.480195 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
245 15:56:20.481564 [Enter `^Ec?' for help]
246 15:56:21.849564
247 15:56:21.850140
248 15:56:21.856611 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
249 15:56:21.860410 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
250 15:56:21.863738 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 15:56:21.871309 CPU: AES supported, TXT NOT supported, VT supported
252 15:56:21.879063 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
253 15:56:21.879695 Cache size = 10 MiB
254 15:56:21.886714 MCH: device id 4609 (rev 04) is Alderlake-P
255 15:56:21.889740 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 15:56:21.893448 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 15:56:21.897243 VBOOT: Loading verstage.
258 15:56:21.903861 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 15:56:21.907560 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 15:56:21.910821 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 15:56:21.920788 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
262 15:56:21.927403 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
263 15:56:21.927895
264 15:56:21.928262
265 15:56:21.937319 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
266 15:56:21.945087 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 15:56:21.948396 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 15:56:21.951955 I2C TX abort detected (00000001)
269 15:56:21.955262 cr50_i2c_read: Address write failed
270 15:56:21.965746 .done! DID_VID 0x00281ae0
271 15:56:21.969304 TPM ready after 0 ms
272 15:56:21.972472 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
273 15:56:21.986182 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
274 15:56:21.993031 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 15:56:22.045398 tlcl_send_startup: Startup return code is 0
276 15:56:22.045964 TPM: setup succeeded
277 15:56:22.067133 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
278 15:56:22.088780 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
279 15:56:22.092572 Chrome EC: UHEPI supported
280 15:56:22.095882 Reading cr50 boot mode
281 15:56:22.111722 Cr50 says boot_mode is VERIFIED_RW(0x00).
282 15:56:22.112289 Phase 1
283 15:56:22.115212 FMAP: area GBB found @ 1805000 (458752 bytes)
284 15:56:22.122629 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
285 15:56:22.129237 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
286 15:56:22.139859 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
287 15:56:22.140441 Phase 2
288 15:56:22.141102 Phase 3
289 15:56:22.146560 FMAP: area GBB found @ 1805000 (458752 bytes)
290 15:56:22.149609 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
291 15:56:22.156093 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
292 15:56:22.159501 VB2:vb2_verify_keyblock() Checking keyblock signature...
293 15:56:22.170054 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
294 15:56:22.177006 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
295 15:56:22.183528 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
296 15:56:22.196070 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 15:56:22.200331 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 15:56:22.206846 VB2:vb2_verify_fw_preamble() Verifying preamble.
299 15:56:22.210217 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
300 15:56:22.219801 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
301 15:56:22.226787 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
302 15:56:22.230150 Phase 4
303 15:56:22.233081 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
304 15:56:22.240121 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
305 15:56:22.452463 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
306 15:56:22.458864 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
307 15:56:22.462589 Saving vboot hash.
308 15:56:22.468806 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
309 15:56:22.484944 tlcl_extend: response is 0
310 15:56:22.491727 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
311 15:56:22.498043 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
312 15:56:22.512443 tlcl_extend: response is 0
313 15:56:22.519579 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
314 15:56:22.539016 tlcl_lock_nv_write: response is 0
315 15:56:22.560925 tlcl_lock_nv_write: response is 0
316 15:56:22.561505 Slot A is selected
317 15:56:22.567551 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
318 15:56:22.574315 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
319 15:56:22.581496 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
320 15:56:22.588206 BS: verstage times (exec / console): total (unknown) / 264 ms
321 15:56:22.588799
322 15:56:22.589294
323 15:56:22.594395 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
324 15:56:22.598748 Google Chrome EC: version:
325 15:56:22.601659 ro: volmar_v2.0.14126-e605144e9c
326 15:56:22.604699 rw: volmar_v0.0.55-22d1557
327 15:56:22.608760 running image: 2
328 15:56:22.611621 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
329 15:56:22.621748 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
330 15:56:22.627985 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
331 15:56:22.634875 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
332 15:56:22.645147 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
333 15:56:22.655304 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
334 15:56:22.657953 EC took 1173us to calculate image hash
335 15:56:22.668203 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
336 15:56:22.674234 VB2:sync_ec() select_rw=RW(active)
337 15:56:22.684314 Waited 275us to clear limit power flag.
338 15:56:22.687663 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 15:56:22.691329 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 15:56:22.694808 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
341 15:56:22.701279 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
342 15:56:22.704233 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
343 15:56:22.708129 TCO_STS: 0000 0000
344 15:56:22.708725 GEN_PMCON: d0015038 00002200
345 15:56:22.711318 GBLRST_CAUSE: 00000000 00000000
346 15:56:22.714622 HPR_CAUSE0: 00000000
347 15:56:22.717524 prev_sleep_state 5
348 15:56:22.721229 Abort disabling TXT, as CPU is not TXT capable.
349 15:56:22.729356 cse_lite: Number of partitions = 3
350 15:56:22.732507 cse_lite: Current partition = RO
351 15:56:22.732998 cse_lite: Next partition = RO
352 15:56:22.735887 cse_lite: Flags = 0x7
353 15:56:22.742897 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
354 15:56:22.752806 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
355 15:56:22.756449 FMAP: area SI_ME found @ 1000 (5238784 bytes)
356 15:56:22.762902 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
357 15:56:22.769097 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
358 15:56:22.776638 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
359 15:56:22.779319 cse_lite: CSE CBFS RW version : 16.1.25.2049
360 15:56:22.785826 cse_lite: Set Boot Partition Info Command (RW)
361 15:56:22.789445 HECI: Global Reset(Type:1) Command
362 15:56:24.222323 supported
363 15:56:24.228552 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
364 15:56:24.232782 Cache size = 10 MiB
365 15:56:24.235690 MCH: device id 4609 (rev 04) is Alderlake-P
366 15:56:24.242009 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
367 15:56:24.245353 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
368 15:56:24.248702 VBOOT: Loading verstage.
369 15:56:24.251939 FMAP: Found "FLASH" version 1.1 at 0x1804000.
370 15:56:24.259033 FMAP: base = 0x0 size = 0x2000000 #areas = 37
371 15:56:24.262342 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
372 15:56:24.270547 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
373 15:56:24.276721 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
374 15:56:24.281179
375 15:56:24.281703
376 15:56:24.287681 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
377 15:56:24.294586 Probing TPM I2C: I2C bus 1 version 0x3230302a
378 15:56:24.298212 DW I2C bus 1 at 0xfe022000 (400 KHz)
379 15:56:24.301013 done! DID_VID 0x00281ae0
380 15:56:24.304224 TPM ready after 0 ms
381 15:56:24.308009 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
382 15:56:24.316683 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
383 15:56:24.324284 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
384 15:56:24.376514 tlcl_send_startup: Startup return code is 0
385 15:56:24.377070 TPM: setup succeeded
386 15:56:24.396655 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
387 15:56:24.418349 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
388 15:56:24.422034 Chrome EC: UHEPI supported
389 15:56:24.425104 Reading cr50 boot mode
390 15:56:24.440079 Cr50 says boot_mode is VERIFIED_RW(0x00).
391 15:56:24.440637 Phase 1
392 15:56:24.446476 FMAP: area GBB found @ 1805000 (458752 bytes)
393 15:56:24.453278 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 15:56:24.460098 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 15:56:24.466586 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
396 15:56:24.470162 Phase 2
397 15:56:24.470626 Phase 3
398 15:56:24.473455 FMAP: area GBB found @ 1805000 (458752 bytes)
399 15:56:24.480146 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
400 15:56:24.483065 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
401 15:56:24.489829 VB2:vb2_verify_keyblock() Checking keyblock signature...
402 15:56:24.496574 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
403 15:56:24.503347 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
404 15:56:24.513041 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
405 15:56:24.524828 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
406 15:56:24.528481 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
407 15:56:24.535284 VB2:vb2_verify_fw_preamble() Verifying preamble.
408 15:56:24.542011 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
409 15:56:24.548399 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
410 15:56:24.554889 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
411 15:56:24.559187 Phase 4
412 15:56:24.562201 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
413 15:56:24.569549 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
414 15:56:24.781243 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
415 15:56:24.787614 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
416 15:56:24.790916 Saving vboot hash.
417 15:56:24.798049 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
418 15:56:24.814196 tlcl_extend: response is 0
419 15:56:24.820337 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
420 15:56:24.826946 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
421 15:56:24.841803 tlcl_extend: response is 0
422 15:56:24.847887 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
423 15:56:24.868109 tlcl_lock_nv_write: response is 0
424 15:56:24.887346 tlcl_lock_nv_write: response is 0
425 15:56:24.888000 Slot A is selected
426 15:56:24.893926 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
427 15:56:24.900724 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
428 15:56:24.907100 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
429 15:56:24.914016 BS: verstage times (exec / console): total (unknown) / 256 ms
430 15:56:24.914536
431 15:56:24.914900
432 15:56:24.920855 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
433 15:56:24.924896 Google Chrome EC: version:
434 15:56:24.927825 ro: volmar_v2.0.14126-e605144e9c
435 15:56:24.931426 rw: volmar_v0.0.55-22d1557
436 15:56:24.935366 running image: 2
437 15:56:24.937884 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
438 15:56:24.947925 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
439 15:56:24.954335 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
440 15:56:24.961527 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
441 15:56:24.971125 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
442 15:56:24.980862 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
443 15:56:24.984569 EC took 941us to calculate image hash
444 15:56:24.994248 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
445 15:56:24.997577 VB2:sync_ec() select_rw=RW(active)
446 15:56:25.009578 Waited 275us to clear limit power flag.
447 15:56:25.012752 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
448 15:56:25.016288 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
449 15:56:25.020091 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
450 15:56:25.026072 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
451 15:56:25.029699 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
452 15:56:25.033230 TCO_STS: 0000 0000
453 15:56:25.033760 GEN_PMCON: d1001038 00002200
454 15:56:25.035979 GBLRST_CAUSE: 00000040 00000000
455 15:56:25.039633 HPR_CAUSE0: 00000000
456 15:56:25.043185 prev_sleep_state 5
457 15:56:25.045940 Abort disabling TXT, as CPU is not TXT capable.
458 15:56:25.054201 cse_lite: Number of partitions = 3
459 15:56:25.057578 cse_lite: Current partition = RW
460 15:56:25.058022 cse_lite: Next partition = RW
461 15:56:25.060973 cse_lite: Flags = 0x7
462 15:56:25.068237 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
463 15:56:25.075406 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
464 15:56:25.082410 FMAP: area SI_ME found @ 1000 (5238784 bytes)
465 15:56:25.088812 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
466 15:56:25.092008 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
467 15:56:25.098842 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
468 15:56:25.105322 cse_lite: CSE CBFS RW version : 16.1.25.2049
469 15:56:25.108524 Boot Count incremented to 3975
470 15:56:25.115681 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
471 15:56:25.121766 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
472 15:56:25.133543 Probing TPM I2C: done! DID_VID 0x00281ae0
473 15:56:25.137123 Locality already claimed
474 15:56:25.140133 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
475 15:56:25.159983 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
476 15:56:25.166571 MRC: Hash idx 0x100d comparison successful.
477 15:56:25.169406 MRC cache found, size f6c8
478 15:56:25.170110 bootmode is set to: 2
479 15:56:25.174736 EC returned error result code 3
480 15:56:25.179051 FW_CONFIG value from CBI is 0x131
481 15:56:25.185144 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
482 15:56:25.188060 SPD index = 0
483 15:56:25.195056 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
484 15:56:25.195688 SPD: module type is LPDDR4X
485 15:56:25.201837 SPD: module part number is K4U6E3S4AB-MGCL
486 15:56:25.208385 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
487 15:56:25.211636 SPD: device width 16 bits, bus width 16 bits
488 15:56:25.215262 SPD: module size is 1024 MB (per channel)
489 15:56:25.283975 CBMEM:
490 15:56:25.287265 IMD: root @ 0x76fff000 254 entries.
491 15:56:25.290418 IMD: root @ 0x76ffec00 62 entries.
492 15:56:25.298199 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
493 15:56:25.301751 RO_VPD is uninitialized or empty.
494 15:56:25.304862 FMAP: area RW_VPD found @ f29000 (8192 bytes)
495 15:56:25.308502 RW_VPD is uninitialized or empty.
496 15:56:25.315063 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
497 15:56:25.318242 External stage cache:
498 15:56:25.321552 IMD: root @ 0x7bbff000 254 entries.
499 15:56:25.325096 IMD: root @ 0x7bbfec00 62 entries.
500 15:56:25.331729 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
501 15:56:25.338343 MRC: Checking cached data update for 'RW_MRC_CACHE'.
502 15:56:25.341634 MRC: 'RW_MRC_CACHE' does not need update.
503 15:56:25.342203 8 DIMMs found
504 15:56:25.344762 SMM Memory Map
505 15:56:25.348069 SMRAM : 0x7b800000 0x800000
506 15:56:25.351830 Subregion 0: 0x7b800000 0x200000
507 15:56:25.354792 Subregion 1: 0x7ba00000 0x200000
508 15:56:25.358290 Subregion 2: 0x7bc00000 0x400000
509 15:56:25.361609 top_of_ram = 0x77000000
510 15:56:25.364803 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
511 15:56:25.371773 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
512 15:56:25.378111 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
513 15:56:25.381614 MTRR Range: Start=ff000000 End=0 (Size 1000000)
514 15:56:25.382080 Normal boot
515 15:56:25.391818 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
516 15:56:25.398198 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
517 15:56:25.404820 Processing 237 relocs. Offset value of 0x74ab9000
518 15:56:25.412933 BS: romstage times (exec / console): total (unknown) / 380 ms
519 15:56:25.420434
520 15:56:25.421004
521 15:56:25.427282 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
522 15:56:25.427757 Normal boot
523 15:56:25.433638 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
524 15:56:25.440098 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
525 15:56:25.446969 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
526 15:56:25.456558 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
527 15:56:25.504072 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
528 15:56:25.511156 Processing 5931 relocs. Offset value of 0x72a2f000
529 15:56:25.514316 BS: postcar times (exec / console): total (unknown) / 51 ms
530 15:56:25.517933
531 15:56:25.518511
532 15:56:25.524426 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
533 15:56:25.527822 Reserving BERT start 76a1e000, size 10000
534 15:56:25.531058 Normal boot
535 15:56:25.534270 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
536 15:56:25.540946 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
537 15:56:25.551017 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
538 15:56:25.553925 FMAP: area RW_VPD found @ f29000 (8192 bytes)
539 15:56:25.558299 Google Chrome EC: version:
540 15:56:25.561156 ro: volmar_v2.0.14126-e605144e9c
541 15:56:25.564411 rw: volmar_v0.0.55-22d1557
542 15:56:25.567627 running image: 2
543 15:56:25.571279 ACPI _SWS is PM1 Index 8 GPE Index -1
544 15:56:25.578398 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
545 15:56:25.581380 EC returned error result code 3
546 15:56:25.584844 FW_CONFIG value from CBI is 0x131
547 15:56:25.588685 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
548 15:56:25.595147 PCI: 00:1c.2 disabled by fw_config
549 15:56:25.598244 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
550 15:56:25.604974 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
551 15:56:25.607805 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
552 15:56:25.614667 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
553 15:56:25.617838 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
554 15:56:25.627947 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
555 15:56:25.630879 microcode: sig=0x906a4 pf=0x80 revision=0x423
556 15:56:25.634364 microcode: Update skipped, already up-to-date
557 15:56:25.640946 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
558 15:56:25.674570 Detected 6 core, 8 thread CPU.
559 15:56:25.677799 Setting up SMI for CPU
560 15:56:25.681030 IED base = 0x7bc00000
561 15:56:25.681116 IED size = 0x00400000
562 15:56:25.684511 Will perform SMM setup.
563 15:56:25.690897 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
564 15:56:25.691011 LAPIC 0x0 in XAPIC mode.
565 15:56:25.701170 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
566 15:56:25.704349 Processing 18 relocs. Offset value of 0x00030000
567 15:56:25.708947 Attempting to start 7 APs
568 15:56:25.712127 Waiting for 10ms after sending INIT.
569 15:56:25.725294 Waiting for SIPI to complete...
570 15:56:25.728767 LAPIC 0x1 in XAPIC mode.
571 15:56:25.732154 LAPIC 0x16 in XAPIC mode.
572 15:56:25.732255 done.
573 15:56:25.735791 AP: slot 5 apic_id 1, MCU rev: 0x00000423
574 15:56:25.738777 LAPIC 0x12 in XAPIC mode.
575 15:56:25.742390 Waiting for SIPI to complete...
576 15:56:25.742489 done.
577 15:56:25.748753 AP: slot 3 apic_id 16, MCU rev: 0x00000423
578 15:56:25.752347 AP: slot 1 apic_id 12, MCU rev: 0x00000423
579 15:56:25.755474 LAPIC 0x14 in XAPIC mode.
580 15:56:25.758416 LAPIC 0x10 in XAPIC mode.
581 15:56:25.761755 AP: slot 2 apic_id 14, MCU rev: 0x00000423
582 15:56:25.765159 AP: slot 4 apic_id 10, MCU rev: 0x00000423
583 15:56:25.768562 LAPIC 0x8 in XAPIC mode.
584 15:56:25.771875 LAPIC 0x9 in XAPIC mode.
585 15:56:25.775490 AP: slot 6 apic_id 8, MCU rev: 0x00000423
586 15:56:25.778506 AP: slot 7 apic_id 9, MCU rev: 0x00000423
587 15:56:25.781876 smm_setup_relocation_handler: enter
588 15:56:25.785382 smm_setup_relocation_handler: exit
589 15:56:25.795191 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
590 15:56:25.798348 Processing 11 relocs. Offset value of 0x00038000
591 15:56:25.805015 smm_module_setup_stub: stack_top = 0x7b804000
592 15:56:25.808245 smm_module_setup_stub: per cpu stack_size = 0x800
593 15:56:25.814977 smm_module_setup_stub: runtime.start32_offset = 0x4c
594 15:56:25.818359 smm_module_setup_stub: runtime.smm_size = 0x10000
595 15:56:25.824971 SMM Module: stub loaded at 38000. Will call 0x76a52094
596 15:56:25.828579 Installing permanent SMM handler to 0x7b800000
597 15:56:25.834825 smm_load_module: total_smm_space_needed e468, available -> 200000
598 15:56:25.845048 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
599 15:56:25.848118 Processing 255 relocs. Offset value of 0x7b9f6000
600 15:56:25.855011 smm_load_module: smram_start: 0x7b800000
601 15:56:25.858444 smm_load_module: smram_end: 7ba00000
602 15:56:25.861900 smm_load_module: handler start 0x7b9f6d5f
603 15:56:25.865047 smm_load_module: handler_size 98d0
604 15:56:25.868325 smm_load_module: fxsave_area 0x7b9ff000
605 15:56:25.871763 smm_load_module: fxsave_size 1000
606 15:56:25.874827 smm_load_module: CONFIG_MSEG_SIZE 0x0
607 15:56:25.881734 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
608 15:56:25.888681 smm_load_module: handler_mod_params.smbase = 0x7b800000
609 15:56:25.891792 smm_load_module: per_cpu_save_state_size = 0x400
610 15:56:25.894985 smm_load_module: num_cpus = 0x8
611 15:56:25.901653 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
612 15:56:25.904768 smm_load_module: total_save_state_size = 0x2000
613 15:56:25.908291 smm_load_module: cpu0 entry: 7b9e6000
614 15:56:25.914956 smm_create_map: cpus allowed in one segment 30
615 15:56:25.918441 smm_create_map: min # of segments needed 1
616 15:56:25.918526 CPU 0x0
617 15:56:25.921635 smbase 7b9e6000 entry 7b9ee000
618 15:56:25.928130 ss_start 7b9f5c00 code_end 7b9ee208
619 15:56:25.928215 CPU 0x1
620 15:56:25.931641 smbase 7b9e5c00 entry 7b9edc00
621 15:56:25.938196 ss_start 7b9f5800 code_end 7b9ede08
622 15:56:25.938280 CPU 0x2
623 15:56:25.941753 smbase 7b9e5800 entry 7b9ed800
624 15:56:25.944949 ss_start 7b9f5400 code_end 7b9eda08
625 15:56:25.948215 CPU 0x3
626 15:56:25.951553 smbase 7b9e5400 entry 7b9ed400
627 15:56:25.954993 ss_start 7b9f5000 code_end 7b9ed608
628 15:56:25.955077 CPU 0x4
629 15:56:25.961653 smbase 7b9e5000 entry 7b9ed000
630 15:56:25.964894 ss_start 7b9f4c00 code_end 7b9ed208
631 15:56:25.964978 CPU 0x5
632 15:56:25.968187 smbase 7b9e4c00 entry 7b9ecc00
633 15:56:25.975025 ss_start 7b9f4800 code_end 7b9ece08
634 15:56:25.975108 CPU 0x6
635 15:56:25.978136 smbase 7b9e4800 entry 7b9ec800
636 15:56:25.984648 ss_start 7b9f4400 code_end 7b9eca08
637 15:56:25.984735 CPU 0x7
638 15:56:25.988027 smbase 7b9e4400 entry 7b9ec400
639 15:56:25.991535 ss_start 7b9f4000 code_end 7b9ec608
640 15:56:26.001220 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
641 15:56:26.004923 Processing 11 relocs. Offset value of 0x7b9ee000
642 15:56:26.011474 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
643 15:56:26.017771 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
644 15:56:26.024535 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
645 15:56:26.031144 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
646 15:56:26.037614 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
647 15:56:26.041102 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
648 15:56:26.047897 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
649 15:56:26.054486 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
650 15:56:26.060987 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
651 15:56:26.067601 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
652 15:56:26.074282 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
653 15:56:26.080812 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
654 15:56:26.087507 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
655 15:56:26.094558 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
656 15:56:26.101136 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
657 15:56:26.104330 smm_module_setup_stub: stack_top = 0x7b804000
658 15:56:26.107647 smm_module_setup_stub: per cpu stack_size = 0x800
659 15:56:26.114100 smm_module_setup_stub: runtime.start32_offset = 0x4c
660 15:56:26.121132 smm_module_setup_stub: runtime.smm_size = 0x200000
661 15:56:26.124239 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
662 15:56:26.128970 Clearing SMI status registers
663 15:56:26.132640 SMI_STS: PM1
664 15:56:26.132724 PM1_STS: WAK PWRBTN
665 15:56:26.142545 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
666 15:56:26.145962 In relocation handler: CPU 0
667 15:56:26.149399 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
668 15:56:26.152497 Writing SMRR. base = 0x7b800006, mask=0xff800c00
669 15:56:26.155879 Relocation complete.
670 15:56:26.162468 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
671 15:56:26.165659 In relocation handler: CPU 5
672 15:56:26.169086 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
673 15:56:26.172682 Relocation complete.
674 15:56:26.179172 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
675 15:56:26.182472 In relocation handler: CPU 1
676 15:56:26.185757 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
677 15:56:26.192676 Writing SMRR. base = 0x7b800006, mask=0xff800c00
678 15:56:26.192762 Relocation complete.
679 15:56:26.199453 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
680 15:56:26.202577 In relocation handler: CPU 3
681 15:56:26.205866 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
682 15:56:26.212434 Writing SMRR. base = 0x7b800006, mask=0xff800c00
683 15:56:26.215913 Relocation complete.
684 15:56:26.222359 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
685 15:56:26.225570 In relocation handler: CPU 4
686 15:56:26.229005 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
687 15:56:26.232285 Writing SMRR. base = 0x7b800006, mask=0xff800c00
688 15:56:26.235677 Relocation complete.
689 15:56:26.242458 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
690 15:56:26.245331 In relocation handler: CPU 2
691 15:56:26.248790 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
692 15:56:26.255398 Writing SMRR. base = 0x7b800006, mask=0xff800c00
693 15:56:26.255482 Relocation complete.
694 15:56:26.265323 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
695 15:56:26.265407 In relocation handler: CPU 7
696 15:56:26.272297 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
697 15:56:26.272381 Relocation complete.
698 15:56:26.278564 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
699 15:56:26.281866 In relocation handler: CPU 6
700 15:56:26.288535 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
701 15:56:26.292427 Writing SMRR. base = 0x7b800006, mask=0xff800c00
702 15:56:26.295093 Relocation complete.
703 15:56:26.295175 Initializing CPU #0
704 15:56:26.298645 CPU: vendor Intel device 906a4
705 15:56:26.301932 CPU: family 06, model 9a, stepping 04
706 15:56:26.305412 Clearing out pending MCEs
707 15:56:26.308703 cpu: energy policy set to 7
708 15:56:26.311797 Turbo is available but hidden
709 15:56:26.315471 Turbo is available and visible
710 15:56:26.318739 microcode: Update skipped, already up-to-date
711 15:56:26.322157 CPU #0 initialized
712 15:56:26.325502 Initializing CPU #5
713 15:56:26.325585 Initializing CPU #3
714 15:56:26.328583 Initializing CPU #4
715 15:56:26.328666 Initializing CPU #1
716 15:56:26.331684 Initializing CPU #2
717 15:56:26.335180 CPU: vendor Intel device 906a4
718 15:56:26.338808 CPU: family 06, model 9a, stepping 04
719 15:56:26.341904 CPU: vendor Intel device 906a4
720 15:56:26.345385 CPU: family 06, model 9a, stepping 04
721 15:56:26.348671 CPU: vendor Intel device 906a4
722 15:56:26.351800 CPU: family 06, model 9a, stepping 04
723 15:56:26.355413 CPU: vendor Intel device 906a4
724 15:56:26.358592 CPU: family 06, model 9a, stepping 04
725 15:56:26.361580 Clearing out pending MCEs
726 15:56:26.365117 CPU: vendor Intel device 906a4
727 15:56:26.368207 CPU: family 06, model 9a, stepping 04
728 15:56:26.372117 Clearing out pending MCEs
729 15:56:26.374877 cpu: energy policy set to 7
730 15:56:26.378483 Clearing out pending MCEs
731 15:56:26.378566 Initializing CPU #6
732 15:56:26.384844 microcode: Update skipped, already up-to-date
733 15:56:26.384927 CPU #1 initialized
734 15:56:26.388355 cpu: energy policy set to 7
735 15:56:26.391616 Clearing out pending MCEs
736 15:56:26.394949 microcode: Update skipped, already up-to-date
737 15:56:26.398193 CPU #3 initialized
738 15:56:26.401987 cpu: energy policy set to 7
739 15:56:26.404891 Clearing out pending MCEs
740 15:56:26.408168 microcode: Update skipped, already up-to-date
741 15:56:26.411367 CPU #2 initialized
742 15:56:26.411451 cpu: energy policy set to 7
743 15:56:26.414604 cpu: energy policy set to 7
744 15:56:26.421461 microcode: Update skipped, already up-to-date
745 15:56:26.421545 CPU #4 initialized
746 15:56:26.424732 Initializing CPU #7
747 15:56:26.427957 CPU: vendor Intel device 906a4
748 15:56:26.431518 CPU: family 06, model 9a, stepping 04
749 15:56:26.434802 CPU: vendor Intel device 906a4
750 15:56:26.438104 CPU: family 06, model 9a, stepping 04
751 15:56:26.441234 microcode: Update skipped, already up-to-date
752 15:56:26.444623 CPU #5 initialized
753 15:56:26.447967 Clearing out pending MCEs
754 15:56:26.451256 Clearing out pending MCEs
755 15:56:26.451361 cpu: energy policy set to 7
756 15:56:26.454680 cpu: energy policy set to 7
757 15:56:26.461251 microcode: Update skipped, already up-to-date
758 15:56:26.461335 CPU #6 initialized
759 15:56:26.467809 microcode: Update skipped, already up-to-date
760 15:56:26.467894 CPU #7 initialized
761 15:56:26.471414 bsp_do_flight_plan done after 724 msecs.
762 15:56:26.474853 CPU: frequency set to 4400 MHz
763 15:56:26.478149 Enabling SMIs.
764 15:56:26.484619 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
765 15:56:26.499788 Probing TPM I2C: done! DID_VID 0x00281ae0
766 15:56:26.503234 Locality already claimed
767 15:56:26.506552 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
768 15:56:26.517946 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
769 15:56:26.521252 Enabling GPIO PM b/c CR50 has long IRQ pulse support
770 15:56:26.527868 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
771 15:56:26.534465 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
772 15:56:26.537654 Found a VBT of 9216 bytes after decompression
773 15:56:26.541156 PCI 1.0, PIN A, using IRQ #16
774 15:56:26.544618 PCI 2.0, PIN A, using IRQ #17
775 15:56:26.547836 PCI 4.0, PIN A, using IRQ #18
776 15:56:26.551173 PCI 5.0, PIN A, using IRQ #16
777 15:56:26.554477 PCI 6.0, PIN A, using IRQ #16
778 15:56:26.557716 PCI 6.2, PIN C, using IRQ #18
779 15:56:26.560997 PCI 7.0, PIN A, using IRQ #19
780 15:56:26.564389 PCI 7.1, PIN B, using IRQ #20
781 15:56:26.567842 PCI 7.2, PIN C, using IRQ #21
782 15:56:26.571018 PCI 7.3, PIN D, using IRQ #22
783 15:56:26.574361 PCI 8.0, PIN A, using IRQ #23
784 15:56:26.577776 PCI D.0, PIN A, using IRQ #17
785 15:56:26.580969 PCI D.1, PIN B, using IRQ #19
786 15:56:26.581051 PCI 10.0, PIN A, using IRQ #24
787 15:56:26.584514 PCI 10.1, PIN B, using IRQ #25
788 15:56:26.587550 PCI 10.6, PIN C, using IRQ #20
789 15:56:26.590752 PCI 10.7, PIN D, using IRQ #21
790 15:56:26.594150 PCI 11.0, PIN A, using IRQ #26
791 15:56:26.597587 PCI 11.1, PIN B, using IRQ #27
792 15:56:26.601048 PCI 11.2, PIN C, using IRQ #28
793 15:56:26.604261 PCI 11.3, PIN D, using IRQ #29
794 15:56:26.607592 PCI 12.0, PIN A, using IRQ #30
795 15:56:26.610996 PCI 12.6, PIN B, using IRQ #31
796 15:56:26.614105 PCI 12.7, PIN C, using IRQ #22
797 15:56:26.617640 PCI 13.0, PIN A, using IRQ #32
798 15:56:26.620736 PCI 13.1, PIN B, using IRQ #33
799 15:56:26.624244 PCI 13.2, PIN C, using IRQ #34
800 15:56:26.627441 PCI 13.3, PIN D, using IRQ #35
801 15:56:26.630528 PCI 14.0, PIN B, using IRQ #23
802 15:56:26.633879 PCI 14.1, PIN A, using IRQ #36
803 15:56:26.633962 PCI 14.3, PIN C, using IRQ #17
804 15:56:26.637277 PCI 15.0, PIN A, using IRQ #37
805 15:56:26.640679 PCI 15.1, PIN B, using IRQ #38
806 15:56:26.643986 PCI 15.2, PIN C, using IRQ #39
807 15:56:26.647354 PCI 15.3, PIN D, using IRQ #40
808 15:56:26.650909 PCI 16.0, PIN A, using IRQ #18
809 15:56:26.654102 PCI 16.1, PIN B, using IRQ #19
810 15:56:26.657581 PCI 16.2, PIN C, using IRQ #20
811 15:56:26.660723 PCI 16.3, PIN D, using IRQ #21
812 15:56:26.664026 PCI 16.4, PIN A, using IRQ #18
813 15:56:26.667230 PCI 16.5, PIN B, using IRQ #19
814 15:56:26.670781 PCI 17.0, PIN A, using IRQ #22
815 15:56:26.673975 PCI 19.0, PIN A, using IRQ #41
816 15:56:26.677205 PCI 19.1, PIN B, using IRQ #42
817 15:56:26.680504 PCI 19.2, PIN C, using IRQ #43
818 15:56:26.684042 PCI 1C.0, PIN A, using IRQ #16
819 15:56:26.687451 PCI 1C.1, PIN B, using IRQ #17
820 15:56:26.687534 PCI 1C.2, PIN C, using IRQ #18
821 15:56:26.690734 PCI 1C.3, PIN D, using IRQ #19
822 15:56:26.693831 PCI 1C.4, PIN A, using IRQ #16
823 15:56:26.697087 PCI 1C.5, PIN B, using IRQ #17
824 15:56:26.700574 PCI 1C.6, PIN C, using IRQ #18
825 15:56:26.703816 PCI 1C.7, PIN D, using IRQ #19
826 15:56:26.707154 PCI 1D.0, PIN A, using IRQ #16
827 15:56:26.710245 PCI 1D.1, PIN B, using IRQ #17
828 15:56:26.713775 PCI 1D.2, PIN C, using IRQ #18
829 15:56:26.716833 PCI 1D.3, PIN D, using IRQ #19
830 15:56:26.720343 PCI 1E.0, PIN A, using IRQ #23
831 15:56:26.723768 PCI 1E.1, PIN B, using IRQ #20
832 15:56:26.726854 PCI 1E.2, PIN C, using IRQ #44
833 15:56:26.730377 PCI 1E.3, PIN D, using IRQ #45
834 15:56:26.733563 PCI 1F.3, PIN B, using IRQ #22
835 15:56:26.737194 PCI 1F.4, PIN C, using IRQ #23
836 15:56:26.740181 PCI 1F.6, PIN D, using IRQ #20
837 15:56:26.740265 PCI 1F.7, PIN A, using IRQ #21
838 15:56:26.746749 IRQ: Using dynamically assigned PCI IO-APIC IRQs
839 15:56:26.753495 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
840 15:56:26.935077 FSPS returned 0
841 15:56:26.938628 Executing Phase 1 of FspMultiPhaseSiInit
842 15:56:26.948657 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
843 15:56:26.951809 port C0 DISC req: usage 1 usb3 1 usb2 1
844 15:56:26.955211 Raw Buffer output 0 00000111
845 15:56:26.958766 Raw Buffer output 1 00000000
846 15:56:26.961953 pmc_send_ipc_cmd succeeded
847 15:56:26.968641 port C1 DISC req: usage 1 usb3 3 usb2 3
848 15:56:26.968766 Raw Buffer output 0 00000331
849 15:56:26.972019 Raw Buffer output 1 00000000
850 15:56:26.976084 pmc_send_ipc_cmd succeeded
851 15:56:26.979845 Detected 6 core, 8 thread CPU.
852 15:56:26.983192 Detected 6 core, 8 thread CPU.
853 15:56:26.988440 Detected 6 core, 8 thread CPU.
854 15:56:26.991809 Detected 6 core, 8 thread CPU.
855 15:56:26.995088 Detected 6 core, 8 thread CPU.
856 15:56:26.998698 Detected 6 core, 8 thread CPU.
857 15:56:27.002026 Detected 6 core, 8 thread CPU.
858 15:56:27.005173 Detected 6 core, 8 thread CPU.
859 15:56:27.008428 Detected 6 core, 8 thread CPU.
860 15:56:27.011889 Detected 6 core, 8 thread CPU.
861 15:56:27.015077 Detected 6 core, 8 thread CPU.
862 15:56:27.018952 Detected 6 core, 8 thread CPU.
863 15:56:27.021848 Detected 6 core, 8 thread CPU.
864 15:56:27.024977 Detected 6 core, 8 thread CPU.
865 15:56:27.028253 Detected 6 core, 8 thread CPU.
866 15:56:27.031845 Detected 6 core, 8 thread CPU.
867 15:56:27.035034 Detected 6 core, 8 thread CPU.
868 15:56:27.038669 Detected 6 core, 8 thread CPU.
869 15:56:27.041849 Detected 6 core, 8 thread CPU.
870 15:56:27.045197 Detected 6 core, 8 thread CPU.
871 15:56:27.048470 Detected 6 core, 8 thread CPU.
872 15:56:27.051532 Detected 6 core, 8 thread CPU.
873 15:56:27.341592 Detected 6 core, 8 thread CPU.
874 15:56:27.345267 Detected 6 core, 8 thread CPU.
875 15:56:27.348493 Detected 6 core, 8 thread CPU.
876 15:56:27.351477 Detected 6 core, 8 thread CPU.
877 15:56:27.354951 Detected 6 core, 8 thread CPU.
878 15:56:27.358673 Detected 6 core, 8 thread CPU.
879 15:56:27.361718 Detected 6 core, 8 thread CPU.
880 15:56:27.364777 Detected 6 core, 8 thread CPU.
881 15:56:27.368305 Detected 6 core, 8 thread CPU.
882 15:56:27.371809 Detected 6 core, 8 thread CPU.
883 15:56:27.375108 Detected 6 core, 8 thread CPU.
884 15:56:27.378396 Detected 6 core, 8 thread CPU.
885 15:56:27.381778 Detected 6 core, 8 thread CPU.
886 15:56:27.385482 Detected 6 core, 8 thread CPU.
887 15:56:27.388233 Detected 6 core, 8 thread CPU.
888 15:56:27.391792 Detected 6 core, 8 thread CPU.
889 15:56:27.394765 Detected 6 core, 8 thread CPU.
890 15:56:27.398475 Detected 6 core, 8 thread CPU.
891 15:56:27.401414 Detected 6 core, 8 thread CPU.
892 15:56:27.401853 Detected 6 core, 8 thread CPU.
893 15:56:27.405449 Display FSP Version Info HOB
894 15:56:27.408568 Reference Code - CPU = c.0.65.70
895 15:56:27.412708 uCode Version = 0.0.4.23
896 15:56:27.415192 TXT ACM version = ff.ff.ff.ffff
897 15:56:27.419003 Reference Code - ME = c.0.65.70
898 15:56:27.422219 MEBx version = 0.0.0.0
899 15:56:27.425771 ME Firmware Version = Lite SKU
900 15:56:27.428714 Reference Code - PCH = c.0.65.70
901 15:56:27.431849 PCH-CRID Status = Disabled
902 15:56:27.435291 PCH-CRID Original Value = ff.ff.ff.ffff
903 15:56:27.438411 PCH-CRID New Value = ff.ff.ff.ffff
904 15:56:27.441793 OPROM - RST - RAID = ff.ff.ff.ffff
905 15:56:27.445614 PCH Hsio Version = 4.0.0.0
906 15:56:27.448791 Reference Code - SA - System Agent = c.0.65.70
907 15:56:27.451796 Reference Code - MRC = 0.0.3.80
908 15:56:27.455473 SA - PCIe Version = c.0.65.70
909 15:56:27.458677 SA-CRID Status = Disabled
910 15:56:27.462122 SA-CRID Original Value = 0.0.0.4
911 15:56:27.465080 SA-CRID New Value = 0.0.0.4
912 15:56:27.468697 OPROM - VBIOS = ff.ff.ff.ffff
913 15:56:27.471675 IO Manageability Engine FW Version = 24.0.4.0
914 15:56:27.475017 PHY Build Version = 0.0.0.2016
915 15:56:27.478313 Thunderbolt(TM) FW Version = 0.0.0.0
916 15:56:27.485434 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
917 15:56:27.492245 BS: BS_DEV_INIT_CHIPS run times (exec / console): 492 / 507 ms
918 15:56:27.492855 Enumerating buses...
919 15:56:27.498505 Show all devs... Before device enumeration.
920 15:56:27.498955 Root Device: enabled 1
921 15:56:27.502133 CPU_CLUSTER: 0: enabled 1
922 15:56:27.505400 DOMAIN: 0000: enabled 1
923 15:56:27.508371 GPIO: 0: enabled 1
924 15:56:27.508799 PCI: 00:00.0: enabled 1
925 15:56:27.511731 PCI: 00:01.0: enabled 0
926 15:56:27.515068 PCI: 00:01.1: enabled 0
927 15:56:27.515544 PCI: 00:02.0: enabled 1
928 15:56:27.519167 PCI: 00:04.0: enabled 1
929 15:56:27.522438 PCI: 00:05.0: enabled 0
930 15:56:27.525343 PCI: 00:06.0: enabled 1
931 15:56:27.525881 PCI: 00:06.2: enabled 0
932 15:56:27.528700 PCI: 00:07.0: enabled 0
933 15:56:27.531740 PCI: 00:07.1: enabled 0
934 15:56:27.535348 PCI: 00:07.2: enabled 0
935 15:56:27.535886 PCI: 00:07.3: enabled 0
936 15:56:27.538974 PCI: 00:08.0: enabled 0
937 15:56:27.541834 PCI: 00:09.0: enabled 0
938 15:56:27.545470 PCI: 00:0a.0: enabled 1
939 15:56:27.546009 PCI: 00:0d.0: enabled 1
940 15:56:27.548575 PCI: 00:0d.1: enabled 0
941 15:56:27.551760 PCI: 00:0d.2: enabled 0
942 15:56:27.552191 PCI: 00:0d.3: enabled 0
943 15:56:27.555127 PCI: 00:0e.0: enabled 0
944 15:56:27.558975 PCI: 00:10.0: enabled 0
945 15:56:27.562287 PCI: 00:10.1: enabled 0
946 15:56:27.562823 PCI: 00:10.6: enabled 0
947 15:56:27.565389 PCI: 00:10.7: enabled 0
948 15:56:27.568482 PCI: 00:12.0: enabled 0
949 15:56:27.571900 PCI: 00:12.6: enabled 0
950 15:56:27.572502 PCI: 00:12.7: enabled 0
951 15:56:27.574769 PCI: 00:13.0: enabled 0
952 15:56:27.578426 PCI: 00:14.0: enabled 1
953 15:56:27.581570 PCI: 00:14.1: enabled 0
954 15:56:27.582128 PCI: 00:14.2: enabled 1
955 15:56:27.585045 PCI: 00:14.3: enabled 1
956 15:56:27.587926 PCI: 00:15.0: enabled 1
957 15:56:27.591309 PCI: 00:15.1: enabled 1
958 15:56:27.591857 PCI: 00:15.2: enabled 0
959 15:56:27.595048 PCI: 00:15.3: enabled 1
960 15:56:27.598302 PCI: 00:16.0: enabled 1
961 15:56:27.598820 PCI: 00:16.1: enabled 0
962 15:56:27.601521 PCI: 00:16.2: enabled 0
963 15:56:27.605202 PCI: 00:16.3: enabled 0
964 15:56:27.608027 PCI: 00:16.4: enabled 0
965 15:56:27.608458 PCI: 00:16.5: enabled 0
966 15:56:27.611518 PCI: 00:17.0: enabled 1
967 15:56:27.615069 PCI: 00:19.0: enabled 0
968 15:56:27.618168 PCI: 00:19.1: enabled 1
969 15:56:27.618591 PCI: 00:19.2: enabled 0
970 15:56:27.621748 PCI: 00:1a.0: enabled 0
971 15:56:27.625088 PCI: 00:1c.0: enabled 0
972 15:56:27.627945 PCI: 00:1c.1: enabled 0
973 15:56:27.628374 PCI: 00:1c.2: enabled 0
974 15:56:27.631354 PCI: 00:1c.3: enabled 0
975 15:56:27.634860 PCI: 00:1c.4: enabled 0
976 15:56:27.638354 PCI: 00:1c.5: enabled 0
977 15:56:27.638874 PCI: 00:1c.6: enabled 0
978 15:56:27.641869 PCI: 00:1c.7: enabled 0
979 15:56:27.644834 PCI: 00:1d.0: enabled 0
980 15:56:27.645358 PCI: 00:1d.1: enabled 0
981 15:56:27.648224 PCI: 00:1d.2: enabled 0
982 15:56:27.651450 PCI: 00:1d.3: enabled 0
983 15:56:27.654746 PCI: 00:1e.0: enabled 1
984 15:56:27.655170 PCI: 00:1e.1: enabled 0
985 15:56:27.658051 PCI: 00:1e.2: enabled 0
986 15:56:27.661401 PCI: 00:1e.3: enabled 1
987 15:56:27.664597 PCI: 00:1f.0: enabled 1
988 15:56:27.665022 PCI: 00:1f.1: enabled 0
989 15:56:27.667915 PCI: 00:1f.2: enabled 1
990 15:56:27.671466 PCI: 00:1f.3: enabled 1
991 15:56:27.674825 PCI: 00:1f.4: enabled 0
992 15:56:27.675281 PCI: 00:1f.5: enabled 1
993 15:56:27.678456 PCI: 00:1f.6: enabled 0
994 15:56:27.681248 PCI: 00:1f.7: enabled 0
995 15:56:27.681675 GENERIC: 0.0: enabled 1
996 15:56:27.684881 GENERIC: 0.0: enabled 1
997 15:56:27.687828 GENERIC: 1.0: enabled 1
998 15:56:27.691133 GENERIC: 0.0: enabled 1
999 15:56:27.691608 GENERIC: 1.0: enabled 1
1000 15:56:27.694829 USB0 port 0: enabled 1
1001 15:56:27.697838 USB0 port 0: enabled 1
1002 15:56:27.701435 GENERIC: 0.0: enabled 1
1003 15:56:27.701962 I2C: 00:1a: enabled 1
1004 15:56:27.704628 I2C: 00:31: enabled 1
1005 15:56:27.708043 I2C: 00:32: enabled 1
1006 15:56:27.708527 I2C: 00:50: enabled 1
1007 15:56:27.711680 I2C: 00:10: enabled 1
1008 15:56:27.714715 I2C: 00:15: enabled 1
1009 15:56:27.715270 I2C: 00:2c: enabled 1
1010 15:56:27.718173 GENERIC: 0.0: enabled 1
1011 15:56:27.721180 SPI: 00: enabled 1
1012 15:56:27.721716 PNP: 0c09.0: enabled 1
1013 15:56:27.724586 GENERIC: 0.0: enabled 1
1014 15:56:27.727667 USB3 port 0: enabled 1
1015 15:56:27.728095 USB3 port 1: enabled 0
1016 15:56:27.731313 USB3 port 2: enabled 1
1017 15:56:27.734563 USB3 port 3: enabled 0
1018 15:56:27.737940 USB2 port 0: enabled 1
1019 15:56:27.738463 USB2 port 1: enabled 0
1020 15:56:27.740983 USB2 port 2: enabled 1
1021 15:56:27.744647 USB2 port 3: enabled 0
1022 15:56:27.745166 USB2 port 4: enabled 0
1023 15:56:27.747932 USB2 port 5: enabled 1
1024 15:56:27.751134 USB2 port 6: enabled 0
1025 15:56:27.754260 USB2 port 7: enabled 0
1026 15:56:27.754695 USB2 port 8: enabled 1
1027 15:56:27.757924 USB2 port 9: enabled 1
1028 15:56:27.761119 USB3 port 0: enabled 1
1029 15:56:27.761635 USB3 port 1: enabled 0
1030 15:56:27.764269 USB3 port 2: enabled 0
1031 15:56:27.767682 USB3 port 3: enabled 0
1032 15:56:27.768103 GENERIC: 0.0: enabled 1
1033 15:56:27.771182 GENERIC: 1.0: enabled 1
1034 15:56:27.774424 APIC: 00: enabled 1
1035 15:56:27.774945 APIC: 12: enabled 1
1036 15:56:27.777873 APIC: 14: enabled 1
1037 15:56:27.781199 APIC: 16: enabled 1
1038 15:56:27.781718 APIC: 10: enabled 1
1039 15:56:27.784514 APIC: 01: enabled 1
1040 15:56:27.787678 APIC: 08: enabled 1
1041 15:56:27.788096 APIC: 09: enabled 1
1042 15:56:27.790877 Compare with tree...
1043 15:56:27.794308 Root Device: enabled 1
1044 15:56:27.794836 CPU_CLUSTER: 0: enabled 1
1045 15:56:27.797943 APIC: 00: enabled 1
1046 15:56:27.801025 APIC: 12: enabled 1
1047 15:56:27.801548 APIC: 14: enabled 1
1048 15:56:27.804336 APIC: 16: enabled 1
1049 15:56:27.807703 APIC: 10: enabled 1
1050 15:56:27.808118 APIC: 01: enabled 1
1051 15:56:27.810773 APIC: 08: enabled 1
1052 15:56:27.814200 APIC: 09: enabled 1
1053 15:56:27.817576 DOMAIN: 0000: enabled 1
1054 15:56:27.817988 GPIO: 0: enabled 1
1055 15:56:27.820721 PCI: 00:00.0: enabled 1
1056 15:56:27.824427 PCI: 00:01.0: enabled 0
1057 15:56:27.827429 PCI: 00:01.1: enabled 0
1058 15:56:27.827854 PCI: 00:02.0: enabled 1
1059 15:56:27.830820 PCI: 00:04.0: enabled 1
1060 15:56:27.834122 GENERIC: 0.0: enabled 1
1061 15:56:27.838052 PCI: 00:05.0: enabled 0
1062 15:56:27.841063 PCI: 00:06.0: enabled 1
1063 15:56:27.841487 PCI: 00:06.2: enabled 0
1064 15:56:27.844259 PCI: 00:08.0: enabled 0
1065 15:56:27.847509 PCI: 00:09.0: enabled 0
1066 15:56:27.850841 PCI: 00:0a.0: enabled 1
1067 15:56:27.851306 PCI: 00:0d.0: enabled 1
1068 15:56:27.854074 USB0 port 0: enabled 1
1069 15:56:27.857667 USB3 port 0: enabled 1
1070 15:56:27.861046 USB3 port 1: enabled 0
1071 15:56:27.864231 USB3 port 2: enabled 1
1072 15:56:27.867417 USB3 port 3: enabled 0
1073 15:56:27.867842 PCI: 00:0d.1: enabled 0
1074 15:56:27.870589 PCI: 00:0d.2: enabled 0
1075 15:56:27.874475 PCI: 00:0d.3: enabled 0
1076 15:56:27.877402 PCI: 00:0e.0: enabled 0
1077 15:56:27.880707 PCI: 00:10.0: enabled 0
1078 15:56:27.881129 PCI: 00:10.1: enabled 0
1079 15:56:27.884038 PCI: 00:10.6: enabled 0
1080 15:56:27.887657 PCI: 00:10.7: enabled 0
1081 15:56:27.890777 PCI: 00:12.0: enabled 0
1082 15:56:27.894693 PCI: 00:12.6: enabled 0
1083 15:56:27.895213 PCI: 00:12.7: enabled 0
1084 15:56:27.897303 PCI: 00:13.0: enabled 0
1085 15:56:27.901300 PCI: 00:14.0: enabled 1
1086 15:56:27.904083 USB0 port 0: enabled 1
1087 15:56:27.904504 USB2 port 0: enabled 1
1088 15:56:27.907213 USB2 port 1: enabled 0
1089 15:56:27.910721 USB2 port 2: enabled 1
1090 15:56:27.914383 USB2 port 3: enabled 0
1091 15:56:27.917419 USB2 port 4: enabled 0
1092 15:56:27.921253 USB2 port 5: enabled 1
1093 15:56:27.921777 USB2 port 6: enabled 0
1094 15:56:27.924565 USB2 port 7: enabled 0
1095 15:56:27.927515 USB2 port 8: enabled 1
1096 15:56:27.930907 USB2 port 9: enabled 1
1097 15:56:27.933707 USB3 port 0: enabled 1
1098 15:56:27.937548 USB3 port 1: enabled 0
1099 15:56:27.938072 USB3 port 2: enabled 0
1100 15:56:27.940624 USB3 port 3: enabled 0
1101 15:56:27.943734 PCI: 00:14.1: enabled 0
1102 15:56:27.947620 PCI: 00:14.2: enabled 1
1103 15:56:27.950698 PCI: 00:14.3: enabled 1
1104 15:56:27.951123 GENERIC: 0.0: enabled 1
1105 15:56:27.954131 PCI: 00:15.0: enabled 1
1106 15:56:27.956902 I2C: 00:1a: enabled 1
1107 15:56:27.960331 I2C: 00:31: enabled 1
1108 15:56:27.963721 I2C: 00:32: enabled 1
1109 15:56:27.964140 PCI: 00:15.1: enabled 1
1110 15:56:27.966920 I2C: 00:50: enabled 1
1111 15:56:27.970669 PCI: 00:15.2: enabled 0
1112 15:56:27.973525 PCI: 00:15.3: enabled 1
1113 15:56:27.973944 I2C: 00:10: enabled 1
1114 15:56:27.976855 PCI: 00:16.0: enabled 1
1115 15:56:27.980192 PCI: 00:16.1: enabled 0
1116 15:56:27.983510 PCI: 00:16.2: enabled 0
1117 15:56:27.986849 PCI: 00:16.3: enabled 0
1118 15:56:27.987344 PCI: 00:16.4: enabled 0
1119 15:56:27.989945 PCI: 00:16.5: enabled 0
1120 15:56:27.993768 PCI: 00:17.0: enabled 1
1121 15:56:27.996688 PCI: 00:19.0: enabled 0
1122 15:56:28.000128 PCI: 00:19.1: enabled 1
1123 15:56:28.000649 I2C: 00:15: enabled 1
1124 15:56:28.003632 I2C: 00:2c: enabled 1
1125 15:56:28.006468 PCI: 00:19.2: enabled 0
1126 15:56:28.010070 PCI: 00:1a.0: enabled 0
1127 15:56:28.013328 PCI: 00:1e.0: enabled 1
1128 15:56:28.013855 PCI: 00:1e.1: enabled 0
1129 15:56:28.016594 PCI: 00:1e.2: enabled 0
1130 15:56:28.020238 PCI: 00:1e.3: enabled 1
1131 15:56:28.023335 SPI: 00: enabled 1
1132 15:56:28.023866 PCI: 00:1f.0: enabled 1
1133 15:56:28.026683 PNP: 0c09.0: enabled 1
1134 15:56:28.030014 PCI: 00:1f.1: enabled 0
1135 15:56:28.033535 PCI: 00:1f.2: enabled 1
1136 15:56:28.036794 GENERIC: 0.0: enabled 1
1137 15:56:28.037319 GENERIC: 0.0: enabled 1
1138 15:56:28.040119 GENERIC: 1.0: enabled 1
1139 15:56:28.043334 PCI: 00:1f.3: enabled 1
1140 15:56:28.046874 PCI: 00:1f.4: enabled 0
1141 15:56:28.049998 PCI: 00:1f.5: enabled 1
1142 15:56:28.050539 PCI: 00:1f.6: enabled 0
1143 15:56:28.052968 PCI: 00:1f.7: enabled 0
1144 15:56:28.056590 Root Device scanning...
1145 15:56:28.059737 scan_static_bus for Root Device
1146 15:56:28.063124 CPU_CLUSTER: 0 enabled
1147 15:56:28.063572 DOMAIN: 0000 enabled
1148 15:56:28.066623 DOMAIN: 0000 scanning...
1149 15:56:28.070413 PCI: pci_scan_bus for bus 00
1150 15:56:28.073280 PCI: 00:00.0 [8086/0000] ops
1151 15:56:28.076821 PCI: 00:00.0 [8086/4609] enabled
1152 15:56:28.079913 PCI: 00:02.0 [8086/0000] bus ops
1153 15:56:28.083125 PCI: 00:02.0 [8086/46b3] enabled
1154 15:56:28.086601 PCI: 00:04.0 [8086/0000] bus ops
1155 15:56:28.089716 PCI: 00:04.0 [8086/461d] enabled
1156 15:56:28.093224 PCI: 00:06.0 [8086/0000] bus ops
1157 15:56:28.096236 PCI: 00:06.0 [8086/464d] enabled
1158 15:56:28.099943 PCI: 00:08.0 [8086/464f] disabled
1159 15:56:28.103592 PCI: 00:0a.0 [8086/467d] enabled
1160 15:56:28.106334 PCI: 00:0d.0 [8086/0000] bus ops
1161 15:56:28.110248 PCI: 00:0d.0 [8086/461e] enabled
1162 15:56:28.113079 PCI: 00:14.0 [8086/0000] bus ops
1163 15:56:28.116984 PCI: 00:14.0 [8086/51ed] enabled
1164 15:56:28.120197 PCI: 00:14.2 [8086/51ef] enabled
1165 15:56:28.123394 PCI: 00:14.3 [8086/0000] bus ops
1166 15:56:28.126895 PCI: 00:14.3 [8086/51f0] enabled
1167 15:56:28.129885 PCI: 00:15.0 [8086/0000] bus ops
1168 15:56:28.133042 PCI: 00:15.0 [8086/51e8] enabled
1169 15:56:28.136746 PCI: 00:15.1 [8086/0000] bus ops
1170 15:56:28.139668 PCI: 00:15.1 [8086/51e9] enabled
1171 15:56:28.143572 PCI: 00:15.2 [8086/0000] bus ops
1172 15:56:28.146992 PCI: 00:15.2 [8086/51ea] disabled
1173 15:56:28.150107 PCI: 00:15.3 [8086/0000] bus ops
1174 15:56:28.153274 PCI: 00:15.3 [8086/51eb] enabled
1175 15:56:28.156662 PCI: 00:16.0 [8086/0000] ops
1176 15:56:28.159703 PCI: 00:16.0 [8086/51e0] enabled
1177 15:56:28.166843 PCI: Static device PCI: 00:17.0 not found, disabling it.
1178 15:56:28.169592 PCI: 00:19.0 [8086/0000] bus ops
1179 15:56:28.172998 PCI: 00:19.0 [8086/51c5] disabled
1180 15:56:28.176323 PCI: 00:19.1 [8086/0000] bus ops
1181 15:56:28.179458 PCI: 00:19.1 [8086/51c6] enabled
1182 15:56:28.182952 PCI: 00:1e.0 [8086/0000] ops
1183 15:56:28.186372 PCI: 00:1e.0 [8086/51a8] enabled
1184 15:56:28.189834 PCI: 00:1e.3 [8086/0000] bus ops
1185 15:56:28.193140 PCI: 00:1e.3 [8086/51ab] enabled
1186 15:56:28.196645 PCI: 00:1f.0 [8086/0000] bus ops
1187 15:56:28.199645 PCI: 00:1f.0 [8086/5182] enabled
1188 15:56:28.200068 RTC Init
1189 15:56:28.206771 Set power on after power failure.
1190 15:56:28.207339 Disabling Deep S3
1191 15:56:28.210376 Disabling Deep S3
1192 15:56:28.210892 Disabling Deep S4
1193 15:56:28.213430 Disabling Deep S4
1194 15:56:28.213944 Disabling Deep S5
1195 15:56:28.216551 Disabling Deep S5
1196 15:56:28.219793 PCI: 00:1f.2 [0000/0000] hidden
1197 15:56:28.222940 PCI: 00:1f.3 [8086/0000] bus ops
1198 15:56:28.226404 PCI: 00:1f.3 [8086/51c8] enabled
1199 15:56:28.230148 PCI: 00:1f.5 [8086/0000] bus ops
1200 15:56:28.233629 PCI: 00:1f.5 [8086/51a4] enabled
1201 15:56:28.234141 GPIO: 0 enabled
1202 15:56:28.236853 PCI: Leftover static devices:
1203 15:56:28.240327 PCI: 00:01.0
1204 15:56:28.240838 PCI: 00:01.1
1205 15:56:28.243593 PCI: 00:05.0
1206 15:56:28.244175 PCI: 00:06.2
1207 15:56:28.244521 PCI: 00:09.0
1208 15:56:28.246698 PCI: 00:0d.1
1209 15:56:28.247380 PCI: 00:0d.2
1210 15:56:28.250339 PCI: 00:0d.3
1211 15:56:28.250847 PCI: 00:0e.0
1212 15:56:28.251176 PCI: 00:10.0
1213 15:56:28.253197 PCI: 00:10.1
1214 15:56:28.253613 PCI: 00:10.6
1215 15:56:28.256430 PCI: 00:10.7
1216 15:56:28.256845 PCI: 00:12.0
1217 15:56:28.257174 PCI: 00:12.6
1218 15:56:28.260164 PCI: 00:12.7
1219 15:56:28.260583 PCI: 00:13.0
1220 15:56:28.263584 PCI: 00:14.1
1221 15:56:28.264100 PCI: 00:16.1
1222 15:56:28.266987 PCI: 00:16.2
1223 15:56:28.267538 PCI: 00:16.3
1224 15:56:28.267874 PCI: 00:16.4
1225 15:56:28.269816 PCI: 00:16.5
1226 15:56:28.270233 PCI: 00:17.0
1227 15:56:28.273346 PCI: 00:19.2
1228 15:56:28.274007 PCI: 00:1a.0
1229 15:56:28.274356 PCI: 00:1e.1
1230 15:56:28.277015 PCI: 00:1e.2
1231 15:56:28.277530 PCI: 00:1f.1
1232 15:56:28.280119 PCI: 00:1f.4
1233 15:56:28.280632 PCI: 00:1f.6
1234 15:56:28.280967 PCI: 00:1f.7
1235 15:56:28.283534 PCI: Check your devicetree.cb.
1236 15:56:28.286891 PCI: 00:02.0 scanning...
1237 15:56:28.290017 scan_generic_bus for PCI: 00:02.0
1238 15:56:28.293401 scan_generic_bus for PCI: 00:02.0 done
1239 15:56:28.299804 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1240 15:56:28.303174 PCI: 00:04.0 scanning...
1241 15:56:28.306405 scan_generic_bus for PCI: 00:04.0
1242 15:56:28.306973 GENERIC: 0.0 enabled
1243 15:56:28.313174 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1244 15:56:28.319618 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1245 15:56:28.320141 PCI: 00:06.0 scanning...
1246 15:56:28.323058 do_pci_scan_bridge for PCI: 00:06.0
1247 15:56:28.326402 PCI: pci_scan_bus for bus 01
1248 15:56:28.329747 PCI: 01:00.0 [15b7/5009] enabled
1249 15:56:28.333179 Enabling Common Clock Configuration
1250 15:56:28.339817 L1 Sub-State supported from root port 6
1251 15:56:28.340346 L1 Sub-State Support = 0x5
1252 15:56:28.342949 CommonModeRestoreTime = 0x6e
1253 15:56:28.349800 Power On Value = 0x5, Power On Scale = 0x2
1254 15:56:28.350337 ASPM: Enabled L1
1255 15:56:28.353252 PCIe: Max_Payload_Size adjusted to 256
1256 15:56:28.356341 PCI: 01:00.0: Enabled LTR
1257 15:56:28.359872 PCI: 01:00.0: Programmed LTR max latencies
1258 15:56:28.366450 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1259 15:56:28.369368 PCI: 00:0d.0 scanning...
1260 15:56:28.373041 scan_static_bus for PCI: 00:0d.0
1261 15:56:28.373593 USB0 port 0 enabled
1262 15:56:28.376371 USB0 port 0 scanning...
1263 15:56:28.379531 scan_static_bus for USB0 port 0
1264 15:56:28.383034 USB3 port 0 enabled
1265 15:56:28.383552 USB3 port 1 disabled
1266 15:56:28.386228 USB3 port 2 enabled
1267 15:56:28.386646 USB3 port 3 disabled
1268 15:56:28.389937 USB3 port 0 scanning...
1269 15:56:28.392586 scan_static_bus for USB3 port 0
1270 15:56:28.396147 scan_static_bus for USB3 port 0 done
1271 15:56:28.402978 scan_bus: bus USB3 port 0 finished in 6 msecs
1272 15:56:28.403648 USB3 port 2 scanning...
1273 15:56:28.406132 scan_static_bus for USB3 port 2
1274 15:56:28.409900 scan_static_bus for USB3 port 2 done
1275 15:56:28.416273 scan_bus: bus USB3 port 2 finished in 6 msecs
1276 15:56:28.419461 scan_static_bus for USB0 port 0 done
1277 15:56:28.422722 scan_bus: bus USB0 port 0 finished in 43 msecs
1278 15:56:28.429426 scan_static_bus for PCI: 00:0d.0 done
1279 15:56:28.432868 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1280 15:56:28.436209 PCI: 00:14.0 scanning...
1281 15:56:28.439391 scan_static_bus for PCI: 00:14.0
1282 15:56:28.439943 USB0 port 0 enabled
1283 15:56:28.442589 USB0 port 0 scanning...
1284 15:56:28.445829 scan_static_bus for USB0 port 0
1285 15:56:28.449337 USB2 port 0 enabled
1286 15:56:28.449890 USB2 port 1 disabled
1287 15:56:28.452762 USB2 port 2 enabled
1288 15:56:28.456324 USB2 port 3 disabled
1289 15:56:28.456791 USB2 port 4 disabled
1290 15:56:28.459817 USB2 port 5 enabled
1291 15:56:28.462734 USB2 port 6 disabled
1292 15:56:28.463335 USB2 port 7 disabled
1293 15:56:28.466526 USB2 port 8 enabled
1294 15:56:28.467095 USB2 port 9 enabled
1295 15:56:28.469311 USB3 port 0 enabled
1296 15:56:28.472846 USB3 port 1 disabled
1297 15:56:28.473416 USB3 port 2 disabled
1298 15:56:28.476205 USB3 port 3 disabled
1299 15:56:28.479452 USB2 port 0 scanning...
1300 15:56:28.482498 scan_static_bus for USB2 port 0
1301 15:56:28.486467 scan_static_bus for USB2 port 0 done
1302 15:56:28.489377 scan_bus: bus USB2 port 0 finished in 6 msecs
1303 15:56:28.492566 USB2 port 2 scanning...
1304 15:56:28.495553 scan_static_bus for USB2 port 2
1305 15:56:28.499041 scan_static_bus for USB2 port 2 done
1306 15:56:28.502587 scan_bus: bus USB2 port 2 finished in 6 msecs
1307 15:56:28.506453 USB2 port 5 scanning...
1308 15:56:28.509175 scan_static_bus for USB2 port 5
1309 15:56:28.512595 scan_static_bus for USB2 port 5 done
1310 15:56:28.519194 scan_bus: bus USB2 port 5 finished in 6 msecs
1311 15:56:28.519759 USB2 port 8 scanning...
1312 15:56:28.522696 scan_static_bus for USB2 port 8
1313 15:56:28.525807 scan_static_bus for USB2 port 8 done
1314 15:56:28.532564 scan_bus: bus USB2 port 8 finished in 6 msecs
1315 15:56:28.533097 USB2 port 9 scanning...
1316 15:56:28.535595 scan_static_bus for USB2 port 9
1317 15:56:28.542432 scan_static_bus for USB2 port 9 done
1318 15:56:28.545778 scan_bus: bus USB2 port 9 finished in 6 msecs
1319 15:56:28.549186 USB3 port 0 scanning...
1320 15:56:28.552582 scan_static_bus for USB3 port 0
1321 15:56:28.555361 scan_static_bus for USB3 port 0 done
1322 15:56:28.558805 scan_bus: bus USB3 port 0 finished in 6 msecs
1323 15:56:28.562690 scan_static_bus for USB0 port 0 done
1324 15:56:28.569126 scan_bus: bus USB0 port 0 finished in 120 msecs
1325 15:56:28.572474 scan_static_bus for PCI: 00:14.0 done
1326 15:56:28.575513 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1327 15:56:28.579129 PCI: 00:14.3 scanning...
1328 15:56:28.582557 scan_static_bus for PCI: 00:14.3
1329 15:56:28.585680 GENERIC: 0.0 enabled
1330 15:56:28.588941 scan_static_bus for PCI: 00:14.3 done
1331 15:56:28.592350 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1332 15:56:28.595113 PCI: 00:15.0 scanning...
1333 15:56:28.598914 scan_static_bus for PCI: 00:15.0
1334 15:56:28.602174 I2C: 00:1a enabled
1335 15:56:28.602697 I2C: 00:31 enabled
1336 15:56:28.605441 I2C: 00:32 enabled
1337 15:56:28.608942 scan_static_bus for PCI: 00:15.0 done
1338 15:56:28.612161 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1339 15:56:28.615455 PCI: 00:15.1 scanning...
1340 15:56:28.618914 scan_static_bus for PCI: 00:15.1
1341 15:56:28.622668 I2C: 00:50 enabled
1342 15:56:28.625913 scan_static_bus for PCI: 00:15.1 done
1343 15:56:28.628808 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1344 15:56:28.632165 PCI: 00:15.3 scanning...
1345 15:56:28.635600 scan_static_bus for PCI: 00:15.3
1346 15:56:28.639041 I2C: 00:10 enabled
1347 15:56:28.642089 scan_static_bus for PCI: 00:15.3 done
1348 15:56:28.645370 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1349 15:56:28.649120 PCI: 00:19.1 scanning...
1350 15:56:28.652135 scan_static_bus for PCI: 00:19.1
1351 15:56:28.655514 I2C: 00:15 enabled
1352 15:56:28.656180 I2C: 00:2c enabled
1353 15:56:28.658791 scan_static_bus for PCI: 00:19.1 done
1354 15:56:28.665748 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1355 15:56:28.669235 PCI: 00:1e.3 scanning...
1356 15:56:28.671762 scan_generic_bus for PCI: 00:1e.3
1357 15:56:28.672228 SPI: 00 enabled
1358 15:56:28.678730 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1359 15:56:28.682032 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1360 15:56:28.685366 PCI: 00:1f.0 scanning...
1361 15:56:28.688560 scan_static_bus for PCI: 00:1f.0
1362 15:56:28.692574 PNP: 0c09.0 enabled
1363 15:56:28.693138 PNP: 0c09.0 scanning...
1364 15:56:28.695666 scan_static_bus for PNP: 0c09.0
1365 15:56:28.698799 scan_static_bus for PNP: 0c09.0 done
1366 15:56:28.705400 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1367 15:56:28.708416 scan_static_bus for PCI: 00:1f.0 done
1368 15:56:28.711911 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1369 15:56:28.715523 PCI: 00:1f.2 scanning...
1370 15:56:28.718788 scan_static_bus for PCI: 00:1f.2
1371 15:56:28.722341 GENERIC: 0.0 enabled
1372 15:56:28.725675 GENERIC: 0.0 scanning...
1373 15:56:28.728870 scan_static_bus for GENERIC: 0.0
1374 15:56:28.729389 GENERIC: 0.0 enabled
1375 15:56:28.731833 GENERIC: 1.0 enabled
1376 15:56:28.735732 scan_static_bus for GENERIC: 0.0 done
1377 15:56:28.742015 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1378 15:56:28.745104 scan_static_bus for PCI: 00:1f.2 done
1379 15:56:28.748658 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1380 15:56:28.752031 PCI: 00:1f.3 scanning...
1381 15:56:28.754929 scan_static_bus for PCI: 00:1f.3
1382 15:56:28.758620 scan_static_bus for PCI: 00:1f.3 done
1383 15:56:28.761911 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1384 15:56:28.765647 PCI: 00:1f.5 scanning...
1385 15:56:28.768434 scan_generic_bus for PCI: 00:1f.5
1386 15:56:28.771785 scan_generic_bus for PCI: 00:1f.5 done
1387 15:56:28.778521 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1388 15:56:28.782124 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1389 15:56:28.785435 scan_static_bus for Root Device done
1390 15:56:28.791688 scan_bus: bus Root Device finished in 729 msecs
1391 15:56:28.792126 done
1392 15:56:28.798650 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1393 15:56:28.805307 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1394 15:56:28.808569 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1395 15:56:28.811654 SPI flash protection: WPSW=0 SRP0=0
1396 15:56:28.818854 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1397 15:56:28.825385 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1398 15:56:28.825914 found VGA at PCI: 00:02.0
1399 15:56:28.828663 Setting up VGA for PCI: 00:02.0
1400 15:56:28.835100 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1401 15:56:28.838254 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1402 15:56:28.841914 Allocating resources...
1403 15:56:28.845160 Reading resources...
1404 15:56:28.848517 Root Device read_resources bus 0 link: 0
1405 15:56:28.851468 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1406 15:56:28.858576 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1407 15:56:28.861479 DOMAIN: 0000 read_resources bus 0 link: 0
1408 15:56:28.868554 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1409 15:56:28.875313 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1410 15:56:28.881390 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1411 15:56:28.888094 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1412 15:56:28.892133 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1413 15:56:28.898225 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1414 15:56:28.904731 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1415 15:56:28.911684 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1416 15:56:28.918440 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1417 15:56:28.924828 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1418 15:56:28.931684 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1419 15:56:28.938123 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1420 15:56:28.944889 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1421 15:56:28.951667 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1422 15:56:28.957816 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1423 15:56:28.964652 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1424 15:56:28.971318 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1425 15:56:28.977886 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1426 15:56:28.981597 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1427 15:56:28.987950 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1428 15:56:28.994551 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1429 15:56:28.997810 PCI: 00:04.0 read_resources bus 1 link: 0
1430 15:56:29.004756 PCI: 00:04.0 read_resources bus 1 link: 0 done
1431 15:56:29.007821 PCI: 00:06.0 read_resources bus 1 link: 0
1432 15:56:29.011166 PCI: 00:06.0 read_resources bus 1 link: 0 done
1433 15:56:29.017564 PCI: 00:0d.0 read_resources bus 0 link: 0
1434 15:56:29.021046 USB0 port 0 read_resources bus 0 link: 0
1435 15:56:29.024401 USB0 port 0 read_resources bus 0 link: 0 done
1436 15:56:29.030871 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1437 15:56:29.034207 PCI: 00:14.0 read_resources bus 0 link: 0
1438 15:56:29.037638 USB0 port 0 read_resources bus 0 link: 0
1439 15:56:29.044359 USB0 port 0 read_resources bus 0 link: 0 done
1440 15:56:29.047785 PCI: 00:14.0 read_resources bus 0 link: 0 done
1441 15:56:29.051472 PCI: 00:14.3 read_resources bus 0 link: 0
1442 15:56:29.057313 PCI: 00:14.3 read_resources bus 0 link: 0 done
1443 15:56:29.060925 PCI: 00:15.0 read_resources bus 0 link: 0
1444 15:56:29.067574 PCI: 00:15.0 read_resources bus 0 link: 0 done
1445 15:56:29.071185 PCI: 00:15.1 read_resources bus 0 link: 0
1446 15:56:29.074524 PCI: 00:15.1 read_resources bus 0 link: 0 done
1447 15:56:29.081037 PCI: 00:15.3 read_resources bus 0 link: 0
1448 15:56:29.084187 PCI: 00:15.3 read_resources bus 0 link: 0 done
1449 15:56:29.087610 PCI: 00:19.1 read_resources bus 0 link: 0
1450 15:56:29.094317 PCI: 00:19.1 read_resources bus 0 link: 0 done
1451 15:56:29.097293 PCI: 00:1e.3 read_resources bus 2 link: 0
1452 15:56:29.100654 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1453 15:56:29.107657 PCI: 00:1f.0 read_resources bus 0 link: 0
1454 15:56:29.110997 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1455 15:56:29.114213 PCI: 00:1f.2 read_resources bus 0 link: 0
1456 15:56:29.120876 GENERIC: 0.0 read_resources bus 0 link: 0
1457 15:56:29.124111 GENERIC: 0.0 read_resources bus 0 link: 0 done
1458 15:56:29.127279 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1459 15:56:29.134191 DOMAIN: 0000 read_resources bus 0 link: 0 done
1460 15:56:29.137684 Root Device read_resources bus 0 link: 0 done
1461 15:56:29.141546 Done reading resources.
1462 15:56:29.147894 Show resources in subtree (Root Device)...After reading.
1463 15:56:29.151635 Root Device child on link 0 CPU_CLUSTER: 0
1464 15:56:29.154628 CPU_CLUSTER: 0 child on link 0 APIC: 00
1465 15:56:29.157578 APIC: 00
1466 15:56:29.158150 APIC: 12
1467 15:56:29.158628 APIC: 14
1468 15:56:29.161286 APIC: 16
1469 15:56:29.161761 APIC: 10
1470 15:56:29.164397 APIC: 01
1471 15:56:29.164872 APIC: 08
1472 15:56:29.165352 APIC: 09
1473 15:56:29.171286 DOMAIN: 0000 child on link 0 GPIO: 0
1474 15:56:29.177983 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1475 15:56:29.187840 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1476 15:56:29.190922 GPIO: 0
1477 15:56:29.191555 PCI: 00:00.0
1478 15:56:29.200727 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1479 15:56:29.211069 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1480 15:56:29.221039 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1481 15:56:29.227998 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1482 15:56:29.237873 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1483 15:56:29.247407 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1484 15:56:29.257690 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1485 15:56:29.267457 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1486 15:56:29.277315 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1487 15:56:29.287387 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1488 15:56:29.294374 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1489 15:56:29.304145 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1490 15:56:29.313670 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1491 15:56:29.323931 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1492 15:56:29.334222 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1493 15:56:29.343595 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1494 15:56:29.350607 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1495 15:56:29.359958 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1496 15:56:29.370414 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1497 15:56:29.380433 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1498 15:56:29.390240 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1499 15:56:29.400192 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1500 15:56:29.410391 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1501 15:56:29.420197 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1502 15:56:29.430379 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1503 15:56:29.437046 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1504 15:56:29.446994 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1505 15:56:29.457128 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1506 15:56:29.459909 PCI: 00:02.0
1507 15:56:29.470000 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1508 15:56:29.480013 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1509 15:56:29.486627 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1510 15:56:29.493466 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1511 15:56:29.503448 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1512 15:56:29.504002 GENERIC: 0.0
1513 15:56:29.509811 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1514 15:56:29.516494 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1515 15:56:29.526637 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1516 15:56:29.536484 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1517 15:56:29.537048 PCI: 01:00.0
1518 15:56:29.549489 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1519 15:56:29.556186 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1520 15:56:29.559542 PCI: 00:08.0
1521 15:56:29.560102 PCI: 00:0a.0
1522 15:56:29.569831 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1523 15:56:29.576304 PCI: 00:0d.0 child on link 0 USB0 port 0
1524 15:56:29.585962 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1525 15:56:29.589519 USB0 port 0 child on link 0 USB3 port 0
1526 15:56:29.592532 USB3 port 0
1527 15:56:29.593001 USB3 port 1
1528 15:56:29.595984 USB3 port 2
1529 15:56:29.596450 USB3 port 3
1530 15:56:29.602685 PCI: 00:14.0 child on link 0 USB0 port 0
1531 15:56:29.613188 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1532 15:56:29.616098 USB0 port 0 child on link 0 USB2 port 0
1533 15:56:29.616679 USB2 port 0
1534 15:56:29.619435 USB2 port 1
1535 15:56:29.622704 USB2 port 2
1536 15:56:29.623317 USB2 port 3
1537 15:56:29.626133 USB2 port 4
1538 15:56:29.626686 USB2 port 5
1539 15:56:29.629512 USB2 port 6
1540 15:56:29.630092 USB2 port 7
1541 15:56:29.632359 USB2 port 8
1542 15:56:29.632825 USB2 port 9
1543 15:56:29.636084 USB3 port 0
1544 15:56:29.636807 USB3 port 1
1545 15:56:29.639401 USB3 port 2
1546 15:56:29.639864 USB3 port 3
1547 15:56:29.642902 PCI: 00:14.2
1548 15:56:29.652762 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1549 15:56:29.662494 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1550 15:56:29.665683 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1551 15:56:29.675820 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1552 15:56:29.679344 GENERIC: 0.0
1553 15:56:29.682638 PCI: 00:15.0 child on link 0 I2C: 00:1a
1554 15:56:29.692595 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1555 15:56:29.695629 I2C: 00:1a
1556 15:56:29.696097 I2C: 00:31
1557 15:56:29.696462 I2C: 00:32
1558 15:56:29.702800 PCI: 00:15.1 child on link 0 I2C: 00:50
1559 15:56:29.712287 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1560 15:56:29.712857 I2C: 00:50
1561 15:56:29.715564 PCI: 00:15.2
1562 15:56:29.719024 PCI: 00:15.3 child on link 0 I2C: 00:10
1563 15:56:29.728999 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1564 15:56:29.729581 I2C: 00:10
1565 15:56:29.732411 PCI: 00:16.0
1566 15:56:29.742180 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1567 15:56:29.742761 PCI: 00:19.0
1568 15:56:29.748779 PCI: 00:19.1 child on link 0 I2C: 00:15
1569 15:56:29.759170 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1570 15:56:29.759870 I2C: 00:15
1571 15:56:29.762122 I2C: 00:2c
1572 15:56:29.762673 PCI: 00:1e.0
1573 15:56:29.776007 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1574 15:56:29.779003 PCI: 00:1e.3 child on link 0 SPI: 00
1575 15:56:29.789219 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1576 15:56:29.789785 SPI: 00
1577 15:56:29.792060 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1578 15:56:29.802210 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1579 15:56:29.805528 PNP: 0c09.0
1580 15:56:29.812436 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1581 15:56:29.819000 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1582 15:56:29.825563 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1583 15:56:29.835609 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1584 15:56:29.842463 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1585 15:56:29.843026 GENERIC: 0.0
1586 15:56:29.845519 GENERIC: 1.0
1587 15:56:29.846076 PCI: 00:1f.3
1588 15:56:29.855427 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1589 15:56:29.865130 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1590 15:56:29.868656 PCI: 00:1f.5
1591 15:56:29.878452 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1592 15:56:29.885153 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1593 15:56:29.888736 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1594 15:56:29.894767 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1595 15:56:29.901638 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1596 15:56:29.904963 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1597 15:56:29.911604 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1598 15:56:29.918209 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1599 15:56:29.924740 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1600 15:56:29.931322 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1601 15:56:29.941921 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1602 15:56:29.945016 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1603 15:56:29.955035 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1604 15:56:29.961915 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1605 15:56:29.968063 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1606 15:56:29.971480 DOMAIN: 0000: Resource ranges:
1607 15:56:29.975178 * Base: 1000, Size: 800, Tag: 100
1608 15:56:29.977890 * Base: 1900, Size: e700, Tag: 100
1609 15:56:29.984467 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1610 15:56:29.991389 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1611 15:56:29.997672 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1612 15:56:30.004534 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1613 15:56:30.014701 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1614 15:56:30.021202 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1615 15:56:30.027521 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1616 15:56:30.037409 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1617 15:56:30.044280 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1618 15:56:30.051324 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1619 15:56:30.060693 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1620 15:56:30.067622 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1621 15:56:30.074348 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1622 15:56:30.084480 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1623 15:56:30.090815 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1624 15:56:30.097519 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1625 15:56:30.107197 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1626 15:56:30.114075 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1627 15:56:30.121127 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1628 15:56:30.127351 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1629 15:56:30.137074 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1630 15:56:30.143645 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1631 15:56:30.150397 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1632 15:56:30.160906 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1633 15:56:30.167061 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1634 15:56:30.174404 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1635 15:56:30.184050 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1636 15:56:30.190803 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1637 15:56:30.196989 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1638 15:56:30.207169 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1639 15:56:30.213589 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1640 15:56:30.220655 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1641 15:56:30.230209 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1642 15:56:30.233685 DOMAIN: 0000: Resource ranges:
1643 15:56:30.237042 * Base: 80400000, Size: 3fc00000, Tag: 200
1644 15:56:30.240344 * Base: d0000000, Size: 28000000, Tag: 200
1645 15:56:30.247048 * Base: fa000000, Size: 1000000, Tag: 200
1646 15:56:30.250622 * Base: fb001000, Size: 17ff000, Tag: 200
1647 15:56:30.253544 * Base: fe800000, Size: 300000, Tag: 200
1648 15:56:30.257115 * Base: feb80000, Size: 80000, Tag: 200
1649 15:56:30.263578 * Base: fed00000, Size: 40000, Tag: 200
1650 15:56:30.266783 * Base: fed70000, Size: 10000, Tag: 200
1651 15:56:30.269971 * Base: fed88000, Size: 8000, Tag: 200
1652 15:56:30.273509 * Base: fed93000, Size: d000, Tag: 200
1653 15:56:30.276835 * Base: feda2000, Size: 1e000, Tag: 200
1654 15:56:30.283431 * Base: fede0000, Size: 1220000, Tag: 200
1655 15:56:30.286647 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1656 15:56:30.293780 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1657 15:56:30.300214 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1658 15:56:30.306708 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1659 15:56:30.313761 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1660 15:56:30.320062 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1661 15:56:30.326476 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1662 15:56:30.333585 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1663 15:56:30.340197 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1664 15:56:30.346607 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1665 15:56:30.352994 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1666 15:56:30.359591 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1667 15:56:30.366453 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1668 15:56:30.372894 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1669 15:56:30.379545 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1670 15:56:30.386168 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1671 15:56:30.393214 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1672 15:56:30.399362 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1673 15:56:30.406271 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1674 15:56:30.413022 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1675 15:56:30.423160 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1676 15:56:30.429725 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1677 15:56:30.432676 PCI: 00:06.0: Resource ranges:
1678 15:56:30.435825 * Base: 80400000, Size: 100000, Tag: 200
1679 15:56:30.442799 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1680 15:56:30.449138 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1681 15:56:30.459409 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1682 15:56:30.465741 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1683 15:56:30.469006 Root Device assign_resources, bus 0 link: 0
1684 15:56:30.475667 DOMAIN: 0000 assign_resources, bus 0 link: 0
1685 15:56:30.482285 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1686 15:56:30.492404 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1687 15:56:30.498839 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1688 15:56:30.505373 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1689 15:56:30.512619 PCI: 00:04.0 assign_resources, bus 1 link: 0
1690 15:56:30.515802 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1691 15:56:30.525618 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1692 15:56:30.535446 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1693 15:56:30.542004 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1694 15:56:30.548740 PCI: 00:06.0 assign_resources, bus 1 link: 0
1695 15:56:30.555478 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1696 15:56:30.561888 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1697 15:56:30.568490 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1698 15:56:30.575389 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1699 15:56:30.585430 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1700 15:56:30.589075 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1701 15:56:30.595722 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1702 15:56:30.602011 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1703 15:56:30.604948 PCI: 00:14.0 assign_resources, bus 0 link: 0
1704 15:56:30.611895 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1705 15:56:30.618967 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1706 15:56:30.628508 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1707 15:56:30.635071 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1708 15:56:30.641800 PCI: 00:14.3 assign_resources, bus 0 link: 0
1709 15:56:30.644977 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1710 15:56:30.651522 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1711 15:56:30.658331 PCI: 00:15.0 assign_resources, bus 0 link: 0
1712 15:56:30.661972 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1713 15:56:30.671385 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1714 15:56:30.674843 PCI: 00:15.1 assign_resources, bus 0 link: 0
1715 15:56:30.681344 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1716 15:56:30.687956 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1717 15:56:30.691727 PCI: 00:15.3 assign_resources, bus 0 link: 0
1718 15:56:30.697909 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1719 15:56:30.704585 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1720 15:56:30.714571 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1721 15:56:30.717669 PCI: 00:19.1 assign_resources, bus 0 link: 0
1722 15:56:30.724878 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1723 15:56:30.731800 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1724 15:56:30.735137 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1725 15:56:30.741610 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1726 15:56:30.745040 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1727 15:56:30.751384 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1728 15:56:30.754610 LPC: Trying to open IO window from 800 size 1ff
1729 15:56:30.764665 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1730 15:56:30.771390 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1731 15:56:30.778057 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1732 15:56:30.784187 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1733 15:56:30.787642 Root Device assign_resources, bus 0 link: 0 done
1734 15:56:30.791295 Done setting resources.
1735 15:56:30.797643 Show resources in subtree (Root Device)...After assigning values.
1736 15:56:30.800874 Root Device child on link 0 CPU_CLUSTER: 0
1737 15:56:30.807497 CPU_CLUSTER: 0 child on link 0 APIC: 00
1738 15:56:30.808054 APIC: 00
1739 15:56:30.808418 APIC: 12
1740 15:56:30.810807 APIC: 14
1741 15:56:30.811400 APIC: 16
1742 15:56:30.811766 APIC: 10
1743 15:56:30.814454 APIC: 01
1744 15:56:30.815015 APIC: 08
1745 15:56:30.817494 APIC: 09
1746 15:56:30.820811 DOMAIN: 0000 child on link 0 GPIO: 0
1747 15:56:30.830705 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1748 15:56:30.841061 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1749 15:56:30.841638 GPIO: 0
1750 15:56:30.842013 PCI: 00:00.0
1751 15:56:30.851009 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1752 15:56:30.860896 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1753 15:56:30.870622 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1754 15:56:30.880734 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1755 15:56:30.890857 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1756 15:56:30.897165 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1757 15:56:30.906866 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1758 15:56:30.917061 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1759 15:56:30.927352 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1760 15:56:30.937073 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1761 15:56:30.946764 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1762 15:56:30.956853 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1763 15:56:30.963904 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1764 15:56:30.973344 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1765 15:56:30.983694 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1766 15:56:30.993492 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1767 15:56:31.003290 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1768 15:56:31.013401 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1769 15:56:31.023591 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1770 15:56:31.033435 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1771 15:56:31.039886 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1772 15:56:31.049640 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1773 15:56:31.059758 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1774 15:56:31.069397 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1775 15:56:31.079380 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1776 15:56:31.089161 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1777 15:56:31.099334 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1778 15:56:31.109482 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1779 15:56:31.110059 PCI: 00:02.0
1780 15:56:31.119099 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1781 15:56:31.129351 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1782 15:56:31.139362 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1783 15:56:31.146086 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1784 15:56:31.156230 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1785 15:56:31.156808 GENERIC: 0.0
1786 15:56:31.162507 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1787 15:56:31.168843 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1788 15:56:31.181911 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1789 15:56:31.192255 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1790 15:56:31.195673 PCI: 01:00.0
1791 15:56:31.205471 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1792 15:56:31.215623 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1793 15:56:31.216249 PCI: 00:08.0
1794 15:56:31.219079 PCI: 00:0a.0
1795 15:56:31.229092 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1796 15:56:31.231859 PCI: 00:0d.0 child on link 0 USB0 port 0
1797 15:56:31.242288 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1798 15:56:31.249007 USB0 port 0 child on link 0 USB3 port 0
1799 15:56:31.249583 USB3 port 0
1800 15:56:31.252084 USB3 port 1
1801 15:56:31.252682 USB3 port 2
1802 15:56:31.255914 USB3 port 3
1803 15:56:31.258498 PCI: 00:14.0 child on link 0 USB0 port 0
1804 15:56:31.268299 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1805 15:56:31.275139 USB0 port 0 child on link 0 USB2 port 0
1806 15:56:31.275730 USB2 port 0
1807 15:56:31.278262 USB2 port 1
1808 15:56:31.278728 USB2 port 2
1809 15:56:31.281380 USB2 port 3
1810 15:56:31.281862 USB2 port 4
1811 15:56:31.285424 USB2 port 5
1812 15:56:31.285994 USB2 port 6
1813 15:56:31.288102 USB2 port 7
1814 15:56:31.292090 USB2 port 8
1815 15:56:31.292655 USB2 port 9
1816 15:56:31.295173 USB3 port 0
1817 15:56:31.295776 USB3 port 1
1818 15:56:31.298754 USB3 port 2
1819 15:56:31.299362 USB3 port 3
1820 15:56:31.301525 PCI: 00:14.2
1821 15:56:31.311908 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1822 15:56:31.321813 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1823 15:56:31.324981 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1824 15:56:31.334981 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1825 15:56:31.338447 GENERIC: 0.0
1826 15:56:31.341255 PCI: 00:15.0 child on link 0 I2C: 00:1a
1827 15:56:31.351670 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1828 15:56:31.354576 I2C: 00:1a
1829 15:56:31.355059 I2C: 00:31
1830 15:56:31.357787 I2C: 00:32
1831 15:56:31.362522 PCI: 00:15.1 child on link 0 I2C: 00:50
1832 15:56:31.371509 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1833 15:56:31.374944 I2C: 00:50
1834 15:56:31.375517 PCI: 00:15.2
1835 15:56:31.378301 PCI: 00:15.3 child on link 0 I2C: 00:10
1836 15:56:31.391291 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1837 15:56:31.391828 I2C: 00:10
1838 15:56:31.392171 PCI: 00:16.0
1839 15:56:31.404349 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1840 15:56:31.404912 PCI: 00:19.0
1841 15:56:31.408184 PCI: 00:19.1 child on link 0 I2C: 00:15
1842 15:56:31.421329 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1843 15:56:31.421906 I2C: 00:15
1844 15:56:31.422279 I2C: 00:2c
1845 15:56:31.424477 PCI: 00:1e.0
1846 15:56:31.434283 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1847 15:56:31.441071 PCI: 00:1e.3 child on link 0 SPI: 00
1848 15:56:31.451093 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1849 15:56:31.451717 SPI: 00
1850 15:56:31.454310 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1851 15:56:31.464546 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1852 15:56:31.465118 PNP: 0c09.0
1853 15:56:31.474288 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1854 15:56:31.477730 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1855 15:56:31.487746 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1856 15:56:31.497707 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1857 15:56:31.500952 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1858 15:56:31.503909 GENERIC: 0.0
1859 15:56:31.507371 GENERIC: 1.0
1860 15:56:31.507943 PCI: 00:1f.3
1861 15:56:31.517613 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1862 15:56:31.527904 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1863 15:56:31.530627 PCI: 00:1f.5
1864 15:56:31.540322 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1865 15:56:31.544052 Done allocating resources.
1866 15:56:31.550495 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1867 15:56:31.554055 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1868 15:56:31.560201 Configure audio over I2S with MAX98373 NAU88L25B.
1869 15:56:31.564128 Enabling BT offload
1870 15:56:31.571595 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1871 15:56:31.574956 Enabling resources...
1872 15:56:31.578253 PCI: 00:00.0 subsystem <- 8086/4609
1873 15:56:31.581550 PCI: 00:00.0 cmd <- 06
1874 15:56:31.584846 PCI: 00:02.0 subsystem <- 8086/46b3
1875 15:56:31.588482 PCI: 00:02.0 cmd <- 03
1876 15:56:31.591431 PCI: 00:04.0 subsystem <- 8086/461d
1877 15:56:31.591893 PCI: 00:04.0 cmd <- 02
1878 15:56:31.594998 PCI: 00:06.0 bridge ctrl <- 0013
1879 15:56:31.598550 PCI: 00:06.0 subsystem <- 8086/464d
1880 15:56:31.601390 PCI: 00:06.0 cmd <- 106
1881 15:56:31.605084 PCI: 00:0a.0 subsystem <- 8086/467d
1882 15:56:31.608070 PCI: 00:0a.0 cmd <- 02
1883 15:56:31.611582 PCI: 00:0d.0 subsystem <- 8086/461e
1884 15:56:31.614889 PCI: 00:0d.0 cmd <- 02
1885 15:56:31.617883 PCI: 00:14.0 subsystem <- 8086/51ed
1886 15:56:31.621550 PCI: 00:14.0 cmd <- 02
1887 15:56:31.624862 PCI: 00:14.2 subsystem <- 8086/51ef
1888 15:56:31.625424 PCI: 00:14.2 cmd <- 02
1889 15:56:31.631472 PCI: 00:14.3 subsystem <- 8086/51f0
1890 15:56:31.632028 PCI: 00:14.3 cmd <- 02
1891 15:56:31.634750 PCI: 00:15.0 subsystem <- 8086/51e8
1892 15:56:31.637782 PCI: 00:15.0 cmd <- 02
1893 15:56:31.641223 PCI: 00:15.1 subsystem <- 8086/51e9
1894 15:56:31.644576 PCI: 00:15.1 cmd <- 06
1895 15:56:31.647663 PCI: 00:15.3 subsystem <- 8086/51eb
1896 15:56:31.651139 PCI: 00:15.3 cmd <- 02
1897 15:56:31.654679 PCI: 00:16.0 subsystem <- 8086/51e0
1898 15:56:31.655454 PCI: 00:16.0 cmd <- 02
1899 15:56:31.661170 PCI: 00:19.1 subsystem <- 8086/51c6
1900 15:56:31.661739 PCI: 00:19.1 cmd <- 02
1901 15:56:31.664234 PCI: 00:1e.0 subsystem <- 8086/51a8
1902 15:56:31.668148 PCI: 00:1e.0 cmd <- 06
1903 15:56:31.671301 PCI: 00:1e.3 subsystem <- 8086/51ab
1904 15:56:31.674721 PCI: 00:1e.3 cmd <- 02
1905 15:56:31.677764 PCI: 00:1f.0 subsystem <- 8086/5182
1906 15:56:31.681213 PCI: 00:1f.0 cmd <- 407
1907 15:56:31.684914 PCI: 00:1f.3 subsystem <- 8086/51c8
1908 15:56:31.685509 PCI: 00:1f.3 cmd <- 02
1909 15:56:31.691387 PCI: 00:1f.5 subsystem <- 8086/51a4
1910 15:56:31.691974 PCI: 00:1f.5 cmd <- 406
1911 15:56:31.694318 PCI: 01:00.0 cmd <- 02
1912 15:56:31.694884 done.
1913 15:56:31.701130 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1914 15:56:31.704483 ME: Version: Unavailable
1915 15:56:31.707741 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1916 15:56:31.711160 Initializing devices...
1917 15:56:31.714670 Root Device init
1918 15:56:31.715271 mainboard: EC init
1919 15:56:31.721075 Chrome EC: Set SMI mask to 0x0000000000000000
1920 15:56:31.721647 Chrome EC: UHEPI supported
1921 15:56:31.729006 Chrome EC: clear events_b mask to 0x0000000000000000
1922 15:56:31.735646 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1923 15:56:31.742529 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1924 15:56:31.749094 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1925 15:56:31.754871 Chrome EC: Set WAKE mask to 0x0000000000000000
1926 15:56:31.758267 Root Device init finished in 42 msecs
1927 15:56:31.761916 PCI: 00:00.0 init
1928 15:56:31.765157 CPU TDP = 15 Watts
1929 15:56:31.765571 CPU PL1 = 15 Watts
1930 15:56:31.768376 CPU PL2 = 55 Watts
1931 15:56:31.771720 CPU PL4 = 123 Watts
1932 15:56:31.774773 PCI: 00:00.0 init finished in 8 msecs
1933 15:56:31.775189 PCI: 00:02.0 init
1934 15:56:31.778190 GMA: Found VBT in CBFS
1935 15:56:31.781876 GMA: Found valid VBT in CBFS
1936 15:56:31.788637 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1937 15:56:31.794973 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1938 15:56:31.798711 PCI: 00:02.0 init finished in 18 msecs
1939 15:56:31.801802 PCI: 00:06.0 init
1940 15:56:31.805005 Initializing PCH PCIe bridge.
1941 15:56:31.808677 PCI: 00:06.0 init finished in 3 msecs
1942 15:56:31.809228 PCI: 00:0a.0 init
1943 15:56:31.811450 PCI: 00:0a.0 init finished in 0 msecs
1944 15:56:31.815143 PCI: 00:14.0 init
1945 15:56:31.818410 PCI: 00:14.0 init finished in 0 msecs
1946 15:56:31.821806 PCI: 00:14.2 init
1947 15:56:31.824904 PCI: 00:14.2 init finished in 0 msecs
1948 15:56:31.825428 PCI: 00:15.0 init
1949 15:56:31.828555 I2C bus 0 version 0x3230302a
1950 15:56:31.831720 DW I2C bus 0 at 0x80655000 (400 KHz)
1951 15:56:31.838488 PCI: 00:15.0 init finished in 6 msecs
1952 15:56:31.839000 PCI: 00:15.1 init
1953 15:56:31.841849 I2C bus 1 version 0x3230302a
1954 15:56:31.845118 DW I2C bus 1 at 0x80656000 (400 KHz)
1955 15:56:31.848275 PCI: 00:15.1 init finished in 6 msecs
1956 15:56:31.851412 PCI: 00:15.3 init
1957 15:56:31.854770 I2C bus 3 version 0x3230302a
1958 15:56:31.858320 DW I2C bus 3 at 0x80657000 (400 KHz)
1959 15:56:31.861527 PCI: 00:15.3 init finished in 6 msecs
1960 15:56:31.861957 PCI: 00:16.0 init
1961 15:56:31.868004 PCI: 00:16.0 init finished in 0 msecs
1962 15:56:31.868433 PCI: 00:19.1 init
1963 15:56:31.871486 I2C bus 5 version 0x3230302a
1964 15:56:31.874778 DW I2C bus 5 at 0x80659000 (400 KHz)
1965 15:56:31.878578 PCI: 00:19.1 init finished in 6 msecs
1966 15:56:31.881484 PCI: 00:1f.0 init
1967 15:56:31.884736 IOAPIC: Initializing IOAPIC at 0xfec00000
1968 15:56:31.888323 IOAPIC: ID = 0x02
1969 15:56:31.891630 IOAPIC: Dumping registers
1970 15:56:31.892153 reg 0x0000: 0x02000000
1971 15:56:31.894968 reg 0x0001: 0x00770020
1972 15:56:31.898218 reg 0x0002: 0x00000000
1973 15:56:31.901511 IOAPIC: 120 interrupts
1974 15:56:31.904847 IOAPIC: Clearing IOAPIC at 0xfec00000
1975 15:56:31.907889 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1976 15:56:31.914855 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1977 15:56:31.918158 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1978 15:56:31.921578 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1979 15:56:31.928002 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1980 15:56:31.931480 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1981 15:56:31.938190 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1982 15:56:31.941458 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1983 15:56:31.948284 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1984 15:56:31.951586 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1985 15:56:31.958139 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1986 15:56:31.961647 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1987 15:56:31.964647 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1988 15:56:31.970984 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1989 15:56:31.974661 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1990 15:56:31.981229 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1991 15:56:31.984550 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1992 15:56:31.991211 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1993 15:56:31.994879 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1994 15:56:32.001296 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1995 15:56:32.004574 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1996 15:56:32.007759 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1997 15:56:32.014666 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1998 15:56:32.018064 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1999 15:56:32.024209 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2000 15:56:32.027690 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2001 15:56:32.034058 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2002 15:56:32.037362 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2003 15:56:32.040998 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2004 15:56:32.047715 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2005 15:56:32.051018 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2006 15:56:32.057195 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2007 15:56:32.061205 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2008 15:56:32.067445 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2009 15:56:32.071066 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2010 15:56:32.077345 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2011 15:56:32.080741 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2012 15:56:32.087464 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2013 15:56:32.090805 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2014 15:56:32.094405 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2015 15:56:32.100735 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2016 15:56:32.103962 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2017 15:56:32.110705 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2018 15:56:32.114099 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2019 15:56:32.120770 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2020 15:56:32.123883 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2021 15:56:32.130893 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2022 15:56:32.133972 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2023 15:56:32.137006 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2024 15:56:32.143694 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2025 15:56:32.147303 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2026 15:56:32.153846 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2027 15:56:32.156933 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2028 15:56:32.163562 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2029 15:56:32.166490 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2030 15:56:32.173373 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2031 15:56:32.176924 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2032 15:56:32.183871 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2033 15:56:32.186767 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2034 15:56:32.189873 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2035 15:56:32.196747 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2036 15:56:32.200025 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2037 15:56:32.206536 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2038 15:56:32.209944 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2039 15:56:32.216170 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2040 15:56:32.219835 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2041 15:56:32.226332 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2042 15:56:32.229914 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2043 15:56:32.233151 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2044 15:56:32.239655 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2045 15:56:32.242851 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2046 15:56:32.249749 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2047 15:56:32.252967 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2048 15:56:32.259559 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2049 15:56:32.262988 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2050 15:56:32.266098 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2051 15:56:32.273055 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2052 15:56:32.276177 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2053 15:56:32.282755 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2054 15:56:32.286250 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2055 15:56:32.292800 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2056 15:56:32.296021 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2057 15:56:32.302584 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2058 15:56:32.306193 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2059 15:56:32.309366 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2060 15:56:32.316263 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2061 15:56:32.319274 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2062 15:56:32.326349 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2063 15:56:32.329381 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2064 15:56:32.335907 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2065 15:56:32.339187 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2066 15:56:32.346334 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2067 15:56:32.349673 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2068 15:56:32.353195 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2069 15:56:32.359719 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2070 15:56:32.363133 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2071 15:56:32.369182 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2072 15:56:32.372787 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2073 15:56:32.379205 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2074 15:56:32.382384 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2075 15:56:32.389642 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2076 15:56:32.392730 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2077 15:56:32.395901 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2078 15:56:32.402750 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2079 15:56:32.405796 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2080 15:56:32.412208 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2081 15:56:32.415742 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2082 15:56:32.422635 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2083 15:56:32.425799 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2084 15:56:32.429047 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2085 15:56:32.435818 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2086 15:56:32.438839 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2087 15:56:32.445635 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2088 15:56:32.448982 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2089 15:56:32.456014 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2090 15:56:32.458938 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2091 15:56:32.465969 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2092 15:56:32.469246 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2093 15:56:32.472190 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2094 15:56:32.479087 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2095 15:56:32.482826 IOAPIC: Bootstrap Processor Local APIC = 0x00
2096 15:56:32.489626 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2097 15:56:32.492538 PCI: 00:1f.0 init finished in 607 msecs
2098 15:56:32.496197 PCI: 00:1f.2 init
2099 15:56:32.496723 apm_control: Disabling ACPI.
2100 15:56:32.501185 APMC done.
2101 15:56:32.504382 PCI: 00:1f.2 init finished in 6 msecs
2102 15:56:32.507738 PCI: 00:1f.3 init
2103 15:56:32.511141 PCI: 00:1f.3 init finished in 0 msecs
2104 15:56:32.511616 PCI: 01:00.0 init
2105 15:56:32.514519 PCI: 01:00.0 init finished in 0 msecs
2106 15:56:32.517944 PNP: 0c09.0 init
2107 15:56:32.521607 Google Chrome EC uptime: 11.956 seconds
2108 15:56:32.528004 Google Chrome AP resets since EC boot: 1
2109 15:56:32.531482 Google Chrome most recent AP reset causes:
2110 15:56:32.534810 0.338: 32775 shutdown: entering G3
2111 15:56:32.540901 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2112 15:56:32.544634 PNP: 0c09.0 init finished in 23 msecs
2113 15:56:32.548060 GENERIC: 0.0 init
2114 15:56:32.551196 GENERIC: 0.0 init finished in 0 msecs
2115 15:56:32.551773 GENERIC: 1.0 init
2116 15:56:32.554213 GENERIC: 1.0 init finished in 0 msecs
2117 15:56:32.557670 Devices initialized
2118 15:56:32.560938 Show all devs... After init.
2119 15:56:32.564284 Root Device: enabled 1
2120 15:56:32.564780 CPU_CLUSTER: 0: enabled 1
2121 15:56:32.567604 DOMAIN: 0000: enabled 1
2122 15:56:32.571563 GPIO: 0: enabled 1
2123 15:56:32.574761 PCI: 00:00.0: enabled 1
2124 15:56:32.575365 PCI: 00:01.0: enabled 0
2125 15:56:32.577637 PCI: 00:01.1: enabled 0
2126 15:56:32.580718 PCI: 00:02.0: enabled 1
2127 15:56:32.581177 PCI: 00:04.0: enabled 1
2128 15:56:32.584032 PCI: 00:05.0: enabled 0
2129 15:56:32.587828 PCI: 00:06.0: enabled 1
2130 15:56:32.591030 PCI: 00:06.2: enabled 0
2131 15:56:32.591637 PCI: 00:07.0: enabled 0
2132 15:56:32.594247 PCI: 00:07.1: enabled 0
2133 15:56:32.597382 PCI: 00:07.2: enabled 0
2134 15:56:32.600817 PCI: 00:07.3: enabled 0
2135 15:56:32.601298 PCI: 00:08.0: enabled 0
2136 15:56:32.604069 PCI: 00:09.0: enabled 0
2137 15:56:32.607327 PCI: 00:0a.0: enabled 1
2138 15:56:32.610643 PCI: 00:0d.0: enabled 1
2139 15:56:32.611122 PCI: 00:0d.1: enabled 0
2140 15:56:32.614251 PCI: 00:0d.2: enabled 0
2141 15:56:32.617321 PCI: 00:0d.3: enabled 0
2142 15:56:32.620990 PCI: 00:0e.0: enabled 0
2143 15:56:32.621548 PCI: 00:10.0: enabled 0
2144 15:56:32.624037 PCI: 00:10.1: enabled 0
2145 15:56:32.627307 PCI: 00:10.6: enabled 0
2146 15:56:32.627767 PCI: 00:10.7: enabled 0
2147 15:56:32.631187 PCI: 00:12.0: enabled 0
2148 15:56:32.634206 PCI: 00:12.6: enabled 0
2149 15:56:32.637651 PCI: 00:12.7: enabled 0
2150 15:56:32.638211 PCI: 00:13.0: enabled 0
2151 15:56:32.641016 PCI: 00:14.0: enabled 1
2152 15:56:32.644465 PCI: 00:14.1: enabled 0
2153 15:56:32.647787 PCI: 00:14.2: enabled 1
2154 15:56:32.648349 PCI: 00:14.3: enabled 1
2155 15:56:32.650634 PCI: 00:15.0: enabled 1
2156 15:56:32.654118 PCI: 00:15.1: enabled 1
2157 15:56:32.657665 PCI: 00:15.2: enabled 0
2158 15:56:32.658121 PCI: 00:15.3: enabled 1
2159 15:56:32.660549 PCI: 00:16.0: enabled 1
2160 15:56:32.663706 PCI: 00:16.1: enabled 0
2161 15:56:32.664118 PCI: 00:16.2: enabled 0
2162 15:56:32.667215 PCI: 00:16.3: enabled 0
2163 15:56:32.670711 PCI: 00:16.4: enabled 0
2164 15:56:32.674041 PCI: 00:16.5: enabled 0
2165 15:56:32.674571 PCI: 00:17.0: enabled 0
2166 15:56:32.677178 PCI: 00:19.0: enabled 0
2167 15:56:32.680557 PCI: 00:19.1: enabled 1
2168 15:56:32.683979 PCI: 00:19.2: enabled 0
2169 15:56:32.684446 PCI: 00:1a.0: enabled 0
2170 15:56:32.687455 PCI: 00:1c.0: enabled 0
2171 15:56:32.690811 PCI: 00:1c.1: enabled 0
2172 15:56:32.693948 PCI: 00:1c.2: enabled 0
2173 15:56:32.694512 PCI: 00:1c.3: enabled 0
2174 15:56:32.697472 PCI: 00:1c.4: enabled 0
2175 15:56:32.700511 PCI: 00:1c.5: enabled 0
2176 15:56:32.704014 PCI: 00:1c.6: enabled 0
2177 15:56:32.704482 PCI: 00:1c.7: enabled 0
2178 15:56:32.707016 PCI: 00:1d.0: enabled 0
2179 15:56:32.710430 PCI: 00:1d.1: enabled 0
2180 15:56:32.710896 PCI: 00:1d.2: enabled 0
2181 15:56:32.713834 PCI: 00:1d.3: enabled 0
2182 15:56:32.717230 PCI: 00:1e.0: enabled 1
2183 15:56:32.721037 PCI: 00:1e.1: enabled 0
2184 15:56:32.721637 PCI: 00:1e.2: enabled 0
2185 15:56:32.724088 PCI: 00:1e.3: enabled 1
2186 15:56:32.727073 PCI: 00:1f.0: enabled 1
2187 15:56:32.730125 PCI: 00:1f.1: enabled 0
2188 15:56:32.730589 PCI: 00:1f.2: enabled 1
2189 15:56:32.733875 PCI: 00:1f.3: enabled 1
2190 15:56:32.737223 PCI: 00:1f.4: enabled 0
2191 15:56:32.740302 PCI: 00:1f.5: enabled 1
2192 15:56:32.740830 PCI: 00:1f.6: enabled 0
2193 15:56:32.743988 PCI: 00:1f.7: enabled 0
2194 15:56:32.747557 GENERIC: 0.0: enabled 1
2195 15:56:32.748084 GENERIC: 0.0: enabled 1
2196 15:56:32.750455 GENERIC: 1.0: enabled 1
2197 15:56:32.754006 GENERIC: 0.0: enabled 1
2198 15:56:32.757025 GENERIC: 1.0: enabled 1
2199 15:56:32.757558 USB0 port 0: enabled 1
2200 15:56:32.760901 USB0 port 0: enabled 1
2201 15:56:32.764064 GENERIC: 0.0: enabled 1
2202 15:56:32.767116 I2C: 00:1a: enabled 1
2203 15:56:32.767611 I2C: 00:31: enabled 1
2204 15:56:32.770533 I2C: 00:32: enabled 1
2205 15:56:32.773686 I2C: 00:50: enabled 1
2206 15:56:32.774219 I2C: 00:10: enabled 1
2207 15:56:32.777035 I2C: 00:15: enabled 1
2208 15:56:32.780500 I2C: 00:2c: enabled 1
2209 15:56:32.781061 GENERIC: 0.0: enabled 1
2210 15:56:32.783758 SPI: 00: enabled 1
2211 15:56:32.786613 PNP: 0c09.0: enabled 1
2212 15:56:32.787034 GENERIC: 0.0: enabled 1
2213 15:56:32.790400 USB3 port 0: enabled 1
2214 15:56:32.793609 USB3 port 1: enabled 0
2215 15:56:32.794137 USB3 port 2: enabled 1
2216 15:56:32.797173 USB3 port 3: enabled 0
2217 15:56:32.800197 USB2 port 0: enabled 1
2218 15:56:32.804166 USB2 port 1: enabled 0
2219 15:56:32.804694 USB2 port 2: enabled 1
2220 15:56:32.806746 USB2 port 3: enabled 0
2221 15:56:32.810516 USB2 port 4: enabled 0
2222 15:56:32.811040 USB2 port 5: enabled 1
2223 15:56:32.813659 USB2 port 6: enabled 0
2224 15:56:32.817102 USB2 port 7: enabled 0
2225 15:56:32.817628 USB2 port 8: enabled 1
2226 15:56:32.819936 USB2 port 9: enabled 1
2227 15:56:32.823655 USB3 port 0: enabled 1
2228 15:56:32.826799 USB3 port 1: enabled 0
2229 15:56:32.827377 USB3 port 2: enabled 0
2230 15:56:32.830335 USB3 port 3: enabled 0
2231 15:56:32.833762 GENERIC: 0.0: enabled 1
2232 15:56:32.834288 GENERIC: 1.0: enabled 1
2233 15:56:32.837009 APIC: 00: enabled 1
2234 15:56:32.839915 APIC: 12: enabled 1
2235 15:56:32.840339 APIC: 14: enabled 1
2236 15:56:32.843673 APIC: 16: enabled 1
2237 15:56:32.846751 APIC: 10: enabled 1
2238 15:56:32.847333 APIC: 01: enabled 1
2239 15:56:32.850217 APIC: 08: enabled 1
2240 15:56:32.850741 APIC: 09: enabled 1
2241 15:56:32.853452 PCI: 01:00.0: enabled 1
2242 15:56:32.860214 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2243 15:56:32.863394 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2244 15:56:32.866956 ELOG: NV offset 0xf20000 size 0x4000
2245 15:56:32.874686 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2246 15:56:32.881646 ELOG: Event(17) added with size 13 at 2023-09-06 15:56:33 UTC
2247 15:56:32.888146 ELOG: Event(9E) added with size 10 at 2023-09-06 15:56:33 UTC
2248 15:56:32.895363 ELOG: Event(9F) added with size 14 at 2023-09-06 15:56:33 UTC
2249 15:56:32.901366 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2250 15:56:32.907945 ELOG: Event(A0) added with size 9 at 2023-09-06 15:56:33 UTC
2251 15:56:32.911008 elog_add_boot_reason: Logged dev mode boot
2252 15:56:32.918075 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2253 15:56:32.921081 Finalize devices...
2254 15:56:32.921510 PCI: 00:16.0 final
2255 15:56:32.924888 PCI: 00:1f.2 final
2256 15:56:32.925419 GENERIC: 0.0 final
2257 15:56:32.931033 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2258 15:56:32.934423 GENERIC: 1.0 final
2259 15:56:32.941306 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2260 15:56:32.941833 Devices finalized
2261 15:56:32.948097 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2262 15:56:32.950942 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2263 15:56:32.957938 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2264 15:56:32.964896 ME: HFSTS1 : 0x90000245
2265 15:56:32.968120 ME: HFSTS2 : 0x82100116
2266 15:56:32.971591 ME: HFSTS3 : 0x00000050
2267 15:56:32.978201 ME: HFSTS4 : 0x00004000
2268 15:56:32.981956 ME: HFSTS5 : 0x00000000
2269 15:56:32.984984 ME: HFSTS6 : 0x40600006
2270 15:56:32.987599 ME: Manufacturing Mode : NO
2271 15:56:32.994818 ME: SPI Protection Mode Enabled : YES
2272 15:56:32.998012 ME: FPFs Committed : YES
2273 15:56:33.001465 ME: Manufacturing Vars Locked : YES
2274 15:56:33.004304 ME: FW Partition Table : OK
2275 15:56:33.007758 ME: Bringup Loader Failure : NO
2276 15:56:33.010949 ME: Firmware Init Complete : YES
2277 15:56:33.014293 ME: Boot Options Present : NO
2278 15:56:33.017914 ME: Update In Progress : NO
2279 15:56:33.024237 ME: D0i3 Support : YES
2280 15:56:33.027544 ME: Low Power State Enabled : NO
2281 15:56:33.030892 ME: CPU Replaced : YES
2282 15:56:33.034017 ME: CPU Replacement Valid : YES
2283 15:56:33.038010 ME: Current Working State : 5
2284 15:56:33.040652 ME: Current Operation State : 1
2285 15:56:33.044581 ME: Current Operation Mode : 0
2286 15:56:33.047529 ME: Error Code : 0
2287 15:56:33.054558 ME: Enhanced Debug Mode : NO
2288 15:56:33.057514 ME: CPU Debug Disabled : YES
2289 15:56:33.061040 ME: TXT Support : NO
2290 15:56:33.064207 ME: WP for RO is enabled : YES
2291 15:56:33.070984 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2292 15:56:33.077747 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2293 15:56:33.081095 Ramoops buffer: 0x100000@0x76899000.
2294 15:56:33.084022 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2295 15:56:33.094305 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2296 15:56:33.097518 CBFS: 'fallback/slic' not found.
2297 15:56:33.101005 ACPI: Writing ACPI tables at 7686d000.
2298 15:56:33.101570 ACPI: * FACS
2299 15:56:33.103839 ACPI: * DSDT
2300 15:56:33.110531 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2301 15:56:33.113687 ACPI: * FADT
2302 15:56:33.114243 SCI is IRQ9
2303 15:56:33.120495 ACPI: added table 1/32, length now 40
2304 15:56:33.121053 ACPI: * SSDT
2305 15:56:33.127141 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2306 15:56:33.130570 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2307 15:56:33.137105 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2308 15:56:33.140183 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2309 15:56:33.147020 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2310 15:56:33.150434 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2311 15:56:33.156919 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2312 15:56:33.163338 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2313 15:56:33.166777 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2314 15:56:33.173705 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2315 15:56:33.177175 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2316 15:56:33.183702 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2317 15:56:33.186960 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2318 15:56:33.193474 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2319 15:56:33.200530 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2320 15:56:33.203347 PS2K: Passing 80 keymaps to kernel
2321 15:56:33.210346 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2322 15:56:33.217159 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2323 15:56:33.223491 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2324 15:56:33.230127 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2325 15:56:33.236797 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2326 15:56:33.243500 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2327 15:56:33.246756 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2328 15:56:33.253103 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2329 15:56:33.259800 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2330 15:56:33.266630 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2331 15:56:33.270196 ACPI: added table 2/32, length now 44
2332 15:56:33.273157 ACPI: * MCFG
2333 15:56:33.276593 ACPI: added table 3/32, length now 48
2334 15:56:33.277158 ACPI: * TPM2
2335 15:56:33.279935 TPM2 log created at 0x7685d000
2336 15:56:33.283148 ACPI: added table 4/32, length now 52
2337 15:56:33.286679 ACPI: * LPIT
2338 15:56:33.290028 ACPI: added table 5/32, length now 56
2339 15:56:33.293218 ACPI: * MADT
2340 15:56:33.293786 SCI is IRQ9
2341 15:56:33.296837 ACPI: added table 6/32, length now 60
2342 15:56:33.299970 cmd_reg from pmc_make_ipc_cmd 1052838
2343 15:56:33.306355 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2344 15:56:33.312934 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2345 15:56:33.319777 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2346 15:56:33.323162 PMC CrashLog size in discovery mode: 0xC00
2347 15:56:33.326338 cpu crashlog bar addr: 0x80640000
2348 15:56:33.330019 cpu discovery table offset: 0x6030
2349 15:56:33.336403 cpu_crashlog_discovery_table buffer count: 0x3
2350 15:56:33.343104 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2351 15:56:33.349569 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2352 15:56:33.356090 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2353 15:56:33.359370 PMC crashLog size in discovery mode : 0xC00
2354 15:56:33.366262 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2355 15:56:33.372597 discover mode PMC crashlog size adjusted to: 0x200
2356 15:56:33.379171 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2357 15:56:33.382822 discover mode PMC crashlog size adjusted to: 0x0
2358 15:56:33.385858 m_cpu_crashLog_size : 0x3480 bytes
2359 15:56:33.389492 CPU crashLog present.
2360 15:56:33.392854 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2361 15:56:33.402812 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2362 15:56:33.403450 current = 76876550
2363 15:56:33.406157 ACPI: * DMAR
2364 15:56:33.409027 ACPI: added table 7/32, length now 64
2365 15:56:33.412532 ACPI: added table 8/32, length now 68
2366 15:56:33.413118 ACPI: * HPET
2367 15:56:33.419417 ACPI: added table 9/32, length now 72
2368 15:56:33.419985 ACPI: done.
2369 15:56:33.422186 ACPI tables: 38528 bytes.
2370 15:56:33.426432 smbios_write_tables: 76857000
2371 15:56:33.429445 EC returned error result code 3
2372 15:56:33.433284 Couldn't obtain OEM name from CBI
2373 15:56:33.436364 Create SMBIOS type 16
2374 15:56:33.439726 Create SMBIOS type 17
2375 15:56:33.440292 Create SMBIOS type 20
2376 15:56:33.442479 GENERIC: 0.0 (WIFI Device)
2377 15:56:33.446090 SMBIOS tables: 2156 bytes.
2378 15:56:33.449037 Writing table forward entry at 0x00000500
2379 15:56:33.455801 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2380 15:56:33.459114 Writing coreboot table at 0x76891000
2381 15:56:33.465715 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2382 15:56:33.469401 1. 0000000000001000-000000000009ffff: RAM
2383 15:56:33.476013 2. 00000000000a0000-00000000000fffff: RESERVED
2384 15:56:33.479144 3. 0000000000100000-0000000076856fff: RAM
2385 15:56:33.485719 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2386 15:56:33.489058 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2387 15:56:33.495980 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2388 15:56:33.499287 7. 0000000077000000-00000000803fffff: RESERVED
2389 15:56:33.505741 8. 00000000c0000000-00000000cfffffff: RESERVED
2390 15:56:33.508935 9. 00000000f8000000-00000000f9ffffff: RESERVED
2391 15:56:33.515767 10. 00000000fb000000-00000000fb000fff: RESERVED
2392 15:56:33.519253 11. 00000000fc800000-00000000fe7fffff: RESERVED
2393 15:56:33.525834 12. 00000000feb00000-00000000feb7ffff: RESERVED
2394 15:56:33.528837 13. 00000000fec00000-00000000fecfffff: RESERVED
2395 15:56:33.532556 14. 00000000fed40000-00000000fed6ffff: RESERVED
2396 15:56:33.539205 15. 00000000fed80000-00000000fed87fff: RESERVED
2397 15:56:33.542654 16. 00000000fed90000-00000000fed92fff: RESERVED
2398 15:56:33.549140 17. 00000000feda0000-00000000feda1fff: RESERVED
2399 15:56:33.552096 18. 00000000fedc0000-00000000feddffff: RESERVED
2400 15:56:33.558957 19. 0000000100000000-000000027fbfffff: RAM
2401 15:56:33.559593 Passing 4 GPIOs to payload:
2402 15:56:33.565893 NAME | PORT | POLARITY | VALUE
2403 15:56:33.572328 lid | undefined | high | high
2404 15:56:33.575997 power | undefined | high | low
2405 15:56:33.582230 oprom | undefined | high | low
2406 15:56:33.585390 EC in RW | 0x00000151 | high | high
2407 15:56:33.588718 Board ID: 3
2408 15:56:33.589371 FW config: 0x131
2409 15:56:33.595255 Wrote coreboot table at: 0x76891000, 0x6bc bytes, checksum 9a2e
2410 15:56:33.598413 coreboot table: 1748 bytes.
2411 15:56:33.601764 IMD ROOT 0. 0x76fff000 0x00001000
2412 15:56:33.605053 IMD SMALL 1. 0x76ffe000 0x00001000
2413 15:56:33.608319 FSP MEMORY 2. 0x76afe000 0x00500000
2414 15:56:33.615131 CONSOLE 3. 0x76ade000 0x00020000
2415 15:56:33.618568 RW MCACHE 4. 0x76add000 0x0000043c
2416 15:56:33.621700 RO MCACHE 5. 0x76adc000 0x00000fd8
2417 15:56:33.625432 FMAP 6. 0x76adb000 0x0000064a
2418 15:56:33.628709 TIME STAMP 7. 0x76ada000 0x00000910
2419 15:56:33.631730 VBOOT WORK 8. 0x76ac6000 0x00014000
2420 15:56:33.635318 MEM INFO 9. 0x76ac5000 0x000003b8
2421 15:56:33.638902 ROMSTG STCK10. 0x76ac4000 0x00001000
2422 15:56:33.645200 AFTER CAR 11. 0x76ab8000 0x0000c000
2423 15:56:33.648726 RAMSTAGE 12. 0x76a2e000 0x0008a000
2424 15:56:33.651879 ACPI BERT 13. 0x76a1e000 0x00010000
2425 15:56:33.655168 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2426 15:56:33.658194 REFCODE 15. 0x769ae000 0x0006f000
2427 15:56:33.662056 SMM BACKUP 16. 0x7699e000 0x00010000
2428 15:56:33.665214 IGD OPREGION17. 0x76999000 0x00004203
2429 15:56:33.668506 RAMOOPS 18. 0x76899000 0x00100000
2430 15:56:33.675464 COREBOOT 19. 0x76891000 0x00008000
2431 15:56:33.678151 ACPI 20. 0x7686d000 0x00024000
2432 15:56:33.681432 TPM2 TCGLOG21. 0x7685d000 0x00010000
2433 15:56:33.685020 PMC CRASHLOG22. 0x7685c000 0x00000c00
2434 15:56:33.688042 CPU CRASHLOG23. 0x76858000 0x00003480
2435 15:56:33.691773 SMBIOS 24. 0x76857000 0x00001000
2436 15:56:33.694790 IMD small region:
2437 15:56:33.698046 IMD ROOT 0. 0x76ffec00 0x00000400
2438 15:56:33.701723 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2439 15:56:33.704812 POWER STATE 2. 0x76ffeb80 0x00000044
2440 15:56:33.711488 ROMSTAGE 3. 0x76ffeb60 0x00000004
2441 15:56:33.714668 ACPI GNVS 4. 0x76ffeb00 0x00000048
2442 15:56:33.717908 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2443 15:56:33.724739 BS: BS_WRITE_TABLES run times (exec / console): 8 / 624 ms
2444 15:56:33.727890 MTRR: Physical address space:
2445 15:56:33.731569 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2446 15:56:33.737686 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2447 15:56:33.744641 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2448 15:56:33.750850 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2449 15:56:33.757607 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2450 15:56:33.764418 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2451 15:56:33.770906 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2452 15:56:33.774724 MTRR: Fixed MSR 0x250 0x0606060606060606
2453 15:56:33.777820 MTRR: Fixed MSR 0x258 0x0606060606060606
2454 15:56:33.784546 MTRR: Fixed MSR 0x259 0x0000000000000000
2455 15:56:33.787718 MTRR: Fixed MSR 0x268 0x0606060606060606
2456 15:56:33.791333 MTRR: Fixed MSR 0x269 0x0606060606060606
2457 15:56:33.794613 MTRR: Fixed MSR 0x26a 0x0606060606060606
2458 15:56:33.797770 MTRR: Fixed MSR 0x26b 0x0606060606060606
2459 15:56:33.804359 MTRR: Fixed MSR 0x26c 0x0606060606060606
2460 15:56:33.807821 MTRR: Fixed MSR 0x26d 0x0606060606060606
2461 15:56:33.810570 MTRR: Fixed MSR 0x26e 0x0606060606060606
2462 15:56:33.814219 MTRR: Fixed MSR 0x26f 0x0606060606060606
2463 15:56:33.819180 call enable_fixed_mtrr()
2464 15:56:33.822117 CPU physical address size: 39 bits
2465 15:56:33.828924 MTRR: default type WB/UC MTRR counts: 6/6.
2466 15:56:33.832126 MTRR: UC selected as default type.
2467 15:56:33.839134 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2468 15:56:33.842205 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2469 15:56:33.848620 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2470 15:56:33.855152 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2471 15:56:33.861665 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2472 15:56:33.868795 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2473 15:56:33.874942 MTRR: Fixed MSR 0x250 0x0606060606060606
2474 15:56:33.878279 MTRR: Fixed MSR 0x258 0x0606060606060606
2475 15:56:33.881600 MTRR: Fixed MSR 0x259 0x0000000000000000
2476 15:56:33.885153 MTRR: Fixed MSR 0x268 0x0606060606060606
2477 15:56:33.891440 MTRR: Fixed MSR 0x269 0x0606060606060606
2478 15:56:33.895074 MTRR: Fixed MSR 0x26a 0x0606060606060606
2479 15:56:33.898336 MTRR: Fixed MSR 0x26b 0x0606060606060606
2480 15:56:33.902029 MTRR: Fixed MSR 0x26c 0x0606060606060606
2481 15:56:33.908584 MTRR: Fixed MSR 0x26d 0x0606060606060606
2482 15:56:33.911575 MTRR: Fixed MSR 0x26e 0x0606060606060606
2483 15:56:33.915178 MTRR: Fixed MSR 0x26f 0x0606060606060606
2484 15:56:33.918541 MTRR: Fixed MSR 0x250 0x0606060606060606
2485 15:56:33.921710 MTRR: Fixed MSR 0x250 0x0606060606060606
2486 15:56:33.928349 MTRR: Fixed MSR 0x250 0x0606060606060606
2487 15:56:33.931543 MTRR: Fixed MSR 0x258 0x0606060606060606
2488 15:56:33.934908 MTRR: Fixed MSR 0x259 0x0000000000000000
2489 15:56:33.938100 MTRR: Fixed MSR 0x268 0x0606060606060606
2490 15:56:33.944796 MTRR: Fixed MSR 0x269 0x0606060606060606
2491 15:56:33.948021 MTRR: Fixed MSR 0x26a 0x0606060606060606
2492 15:56:33.951341 MTRR: Fixed MSR 0x26b 0x0606060606060606
2493 15:56:33.954481 MTRR: Fixed MSR 0x26c 0x0606060606060606
2494 15:56:33.961513 MTRR: Fixed MSR 0x26d 0x0606060606060606
2495 15:56:33.964698 MTRR: Fixed MSR 0x26e 0x0606060606060606
2496 15:56:33.968207 MTRR: Fixed MSR 0x26f 0x0606060606060606
2497 15:56:33.971401 MTRR: Fixed MSR 0x250 0x0606060606060606
2498 15:56:33.978075 MTRR: Fixed MSR 0x250 0x0606060606060606
2499 15:56:33.981201 MTRR: Fixed MSR 0x258 0x0606060606060606
2500 15:56:33.984855 MTRR: Fixed MSR 0x259 0x0000000000000000
2501 15:56:33.988213 MTRR: Fixed MSR 0x268 0x0606060606060606
2502 15:56:33.991193 MTRR: Fixed MSR 0x269 0x0606060606060606
2503 15:56:33.994546 call enable_fixed_mtrr()
2504 15:56:33.997814 call enable_fixed_mtrr()
2505 15:56:34.001606 MTRR: Fixed MSR 0x250 0x0606060606060606
2506 15:56:34.004334 MTRR: Fixed MSR 0x258 0x0606060606060606
2507 15:56:34.011046 MTRR: Fixed MSR 0x258 0x0606060606060606
2508 15:56:34.014844 MTRR: Fixed MSR 0x259 0x0000000000000000
2509 15:56:34.017798 MTRR: Fixed MSR 0x268 0x0606060606060606
2510 15:56:34.021362 MTRR: Fixed MSR 0x269 0x0606060606060606
2511 15:56:34.027972 MTRR: Fixed MSR 0x26a 0x0606060606060606
2512 15:56:34.031037 MTRR: Fixed MSR 0x26b 0x0606060606060606
2513 15:56:34.034278 MTRR: Fixed MSR 0x26c 0x0606060606060606
2514 15:56:34.037618 MTRR: Fixed MSR 0x26d 0x0606060606060606
2515 15:56:34.044331 MTRR: Fixed MSR 0x26e 0x0606060606060606
2516 15:56:34.047426 MTRR: Fixed MSR 0x26f 0x0606060606060606
2517 15:56:34.050956 MTRR: Fixed MSR 0x258 0x0606060606060606
2518 15:56:34.054504 MTRR: Fixed MSR 0x259 0x0000000000000000
2519 15:56:34.057503 call enable_fixed_mtrr()
2520 15:56:34.061062 CPU physical address size: 39 bits
2521 15:56:34.063997 CPU physical address size: 39 bits
2522 15:56:34.070751 MTRR: Fixed MSR 0x26a 0x0606060606060606
2523 15:56:34.074038 CPU physical address size: 39 bits
2524 15:56:34.077218 MTRR: Fixed MSR 0x26b 0x0606060606060606
2525 15:56:34.080563 MTRR: Fixed MSR 0x258 0x0606060606060606
2526 15:56:34.084236 MTRR: Fixed MSR 0x259 0x0000000000000000
2527 15:56:34.090368 MTRR: Fixed MSR 0x268 0x0606060606060606
2528 15:56:34.093944 MTRR: Fixed MSR 0x269 0x0606060606060606
2529 15:56:34.097211 MTRR: Fixed MSR 0x26a 0x0606060606060606
2530 15:56:34.100732 MTRR: Fixed MSR 0x26b 0x0606060606060606
2531 15:56:34.103947 MTRR: Fixed MSR 0x26c 0x0606060606060606
2532 15:56:34.110392 MTRR: Fixed MSR 0x26d 0x0606060606060606
2533 15:56:34.113311 MTRR: Fixed MSR 0x26e 0x0606060606060606
2534 15:56:34.117070 MTRR: Fixed MSR 0x26f 0x0606060606060606
2535 15:56:34.120290 MTRR: Fixed MSR 0x259 0x0000000000000000
2536 15:56:34.123573 call enable_fixed_mtrr()
2537 15:56:34.127065 MTRR: Fixed MSR 0x26c 0x0606060606060606
2538 15:56:34.133733 CPU physical address size: 39 bits
2539 15:56:34.137119 MTRR: Fixed MSR 0x26d 0x0606060606060606
2540 15:56:34.139960 MTRR: Fixed MSR 0x268 0x0606060606060606
2541 15:56:34.143171 MTRR: Fixed MSR 0x26e 0x0606060606060606
2542 15:56:34.146649 MTRR: Fixed MSR 0x26f 0x0606060606060606
2543 15:56:34.153410 MTRR: Fixed MSR 0x268 0x0606060606060606
2544 15:56:34.153919 call enable_fixed_mtrr()
2545 15:56:34.159646 MTRR: Fixed MSR 0x269 0x0606060606060606
2546 15:56:34.163054 CPU physical address size: 39 bits
2547 15:56:34.166223 MTRR: Fixed MSR 0x26a 0x0606060606060606
2548 15:56:34.169718 MTRR: Fixed MSR 0x269 0x0606060606060606
2549 15:56:34.173457 MTRR: Fixed MSR 0x26b 0x0606060606060606
2550 15:56:34.179499 MTRR: Fixed MSR 0x26c 0x0606060606060606
2551 15:56:34.183071 MTRR: Fixed MSR 0x26d 0x0606060606060606
2552 15:56:34.186022 MTRR: Fixed MSR 0x26e 0x0606060606060606
2553 15:56:34.189329 MTRR: Fixed MSR 0x26f 0x0606060606060606
2554 15:56:34.196542 MTRR: Fixed MSR 0x26a 0x0606060606060606
2555 15:56:34.199492 call enable_fixed_mtrr()
2556 15:56:34.202591 MTRR: Fixed MSR 0x26b 0x0606060606060606
2557 15:56:34.206079 MTRR: Fixed MSR 0x26c 0x0606060606060606
2558 15:56:34.209342 MTRR: Fixed MSR 0x26d 0x0606060606060606
2559 15:56:34.215960 MTRR: Fixed MSR 0x26e 0x0606060606060606
2560 15:56:34.219286 MTRR: Fixed MSR 0x26f 0x0606060606060606
2561 15:56:34.222522 CPU physical address size: 39 bits
2562 15:56:34.226286 call enable_fixed_mtrr()
2563 15:56:34.229140 CPU physical address size: 39 bits
2564 15:56:34.232727
2565 15:56:34.233145 MTRR check
2566 15:56:34.236464 Fixed MTRRs : Enabled
2567 15:56:34.236884 Variable MTRRs: Enabled
2568 15:56:34.237212
2569 15:56:34.243285 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2570 15:56:34.246204 Checking cr50 for pending updates
2571 15:56:34.258440 Reading cr50 TPM mode
2572 15:56:34.273593 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2573 15:56:34.283820 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2574 15:56:34.287552 Checking segment from ROM address 0xf96cbe6c
2575 15:56:34.290625 Checking segment from ROM address 0xf96cbe88
2576 15:56:34.297613 Loading segment from ROM address 0xf96cbe6c
2577 15:56:34.298141 code (compression=1)
2578 15:56:34.307149 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2579 15:56:34.313692 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2580 15:56:34.317346 using LZMA
2581 15:56:34.340025 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2582 15:56:34.346508 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2583 15:56:34.354248 Loading segment from ROM address 0xf96cbe88
2584 15:56:34.357828 Entry Point 0x30000000
2585 15:56:34.358438 Loaded segments
2586 15:56:34.364580 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2587 15:56:34.371073 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2588 15:56:34.374430 Finalizing chipset.
2589 15:56:34.374852 apm_control: Finalizing SMM.
2590 15:56:34.377911 APMC done.
2591 15:56:34.380756 HECI: CSE device 16.1 is disabled
2592 15:56:34.384558 HECI: CSE device 16.2 is disabled
2593 15:56:34.387591 HECI: CSE device 16.3 is disabled
2594 15:56:34.390792 HECI: CSE device 16.4 is disabled
2595 15:56:34.394204 HECI: CSE device 16.5 is disabled
2596 15:56:34.397740 HECI: Sending End-of-Post
2597 15:56:34.406058 CSE: EOP requested action: continue boot
2598 15:56:34.409309 CSE EOP successful, continuing boot
2599 15:56:34.415839 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2600 15:56:34.419320 mp_park_aps done after 0 msecs.
2601 15:56:34.422790 Jumping to boot code at 0x30000000(0x76891000)
2602 15:56:34.432318 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2603 15:56:34.436697
2604 15:56:34.437129
2605 15:56:34.437504
2606 15:56:34.439791 Starting depthcharge on Volmar...
2607 15:56:34.440202
2608 15:56:34.441313 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2609 15:56:34.441776 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2610 15:56:34.442178 Setting prompt string to ['brya:']
2611 15:56:34.442553 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2612 15:56:34.446378 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2613 15:56:34.446843
2614 15:56:34.453198 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2615 15:56:34.453615
2616 15:56:34.459550 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2617 15:56:34.460113
2618 15:56:34.463200 configure_storage: Failed to remap 1C:2
2619 15:56:34.463915
2620 15:56:34.466313 Wipe memory regions:
2621 15:56:34.466767
2622 15:56:34.469445 [0x00000000001000, 0x000000000a0000)
2623 15:56:34.469860
2624 15:56:34.472781 [0x00000000100000, 0x00000030000000)
2625 15:56:34.580442
2626 15:56:34.583875 [0x00000032668e60, 0x00000076857000)
2627 15:56:34.734328
2628 15:56:34.737291 [0x00000100000000, 0x0000027fc00000)
2629 15:56:35.580755
2630 15:56:35.583968 ec_init: CrosEC protocol v3 supported (256, 256)
2631 15:56:36.193483
2632 15:56:36.194037 R8152: Initializing
2633 15:56:36.194401
2634 15:56:36.196973 Version 9 (ocp_data = 6010)
2635 15:56:36.197535
2636 15:56:36.199959 R8152: Done initializing
2637 15:56:36.200419
2638 15:56:36.202913 Adding net device
2639 15:56:36.504233
2640 15:56:36.507658 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2641 15:56:36.508220
2642 15:56:36.508584
2643 15:56:36.508917
2644 15:56:36.509714 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2646 15:56:36.611092 brya: tftpboot 192.168.201.1 11447402/tftp-deploy-wclmmfql/kernel/bzImage 11447402/tftp-deploy-wclmmfql/kernel/cmdline 11447402/tftp-deploy-wclmmfql/ramdisk/ramdisk.cpio.gz
2647 15:56:36.611798 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2648 15:56:36.612253 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2649 15:56:36.616654 tftpboot 192.168.201.1 11447402/tftp-deploy-wclmmfql/kernel/bzImaploy-wclmmfql/kernel/cmdline 11447402/tftp-deploy-wclmmfql/ramdisk/ramdisk.cpio.gz
2650 15:56:36.617143
2651 15:56:36.617500 Waiting for link
2652 15:56:36.820193
2653 15:56:36.820750 done.
2654 15:56:36.821108
2655 15:56:36.821473 MAC: 00:e0:4c:68:05:70
2656 15:56:36.821801
2657 15:56:36.822798 Sending DHCP discover... done.
2658 15:56:36.823286
2659 15:56:36.826248 Waiting for reply... done.
2660 15:56:36.826812
2661 15:56:36.829367 Sending DHCP request... done.
2662 15:56:36.829829
2663 15:56:36.836219 Waiting for reply... done.
2664 15:56:36.836781
2665 15:56:36.837145 My ip is 192.168.201.16
2666 15:56:36.837475
2667 15:56:36.839748 The DHCP server ip is 192.168.201.1
2668 15:56:36.840220
2669 15:56:36.846518 TFTP server IP predefined by user: 192.168.201.1
2670 15:56:36.847085
2671 15:56:36.853123 Bootfile predefined by user: 11447402/tftp-deploy-wclmmfql/kernel/bzImage
2672 15:56:36.853691
2673 15:56:36.855940 Sending tftp read request... done.
2674 15:56:36.856404
2675 15:56:36.864783 Waiting for the transfer...
2676 15:56:36.865301
2677 15:56:37.146948 00000000 ################################################################
2678 15:56:37.147094
2679 15:56:37.433553 00080000 ################################################################
2680 15:56:37.433696
2681 15:56:37.686953 00100000 ################################################################
2682 15:56:37.687094
2683 15:56:37.974387 00180000 ################################################################
2684 15:56:37.974527
2685 15:56:38.246981 00200000 ################################################################
2686 15:56:38.247127
2687 15:56:38.504566 00280000 ################################################################
2688 15:56:38.504774
2689 15:56:38.757923 00300000 ################################################################
2690 15:56:38.758060
2691 15:56:39.014888 00380000 ################################################################
2692 15:56:39.015049
2693 15:56:39.292025 00400000 ################################################################
2694 15:56:39.292164
2695 15:56:39.550726 00480000 ################################################################
2696 15:56:39.550858
2697 15:56:39.808728 00500000 ################################################################
2698 15:56:39.808861
2699 15:56:40.067405 00580000 ################################################################
2700 15:56:40.067539
2701 15:56:40.329577 00600000 ################################################################
2702 15:56:40.329711
2703 15:56:40.581633 00680000 ################################################################
2704 15:56:40.581763
2705 15:56:40.839097 00700000 ################################################################
2706 15:56:40.839256
2707 15:56:41.099394 00780000 ################################################################
2708 15:56:41.099564
2709 15:56:41.154984 00800000 ############# done.
2710 15:56:41.155087
2711 15:56:41.158434 The bootfile was 8490896 bytes long.
2712 15:56:41.158518
2713 15:56:41.161782 Sending tftp read request... done.
2714 15:56:41.165138
2715 15:56:41.165222 Waiting for the transfer...
2716 15:56:41.165289
2717 15:56:41.419413 00000000 ################################################################
2718 15:56:41.419592
2719 15:56:41.673174 00080000 ################################################################
2720 15:56:41.673323
2721 15:56:41.927124 00100000 ################################################################
2722 15:56:41.927294
2723 15:56:42.181801 00180000 ################################################################
2724 15:56:42.181934
2725 15:56:42.445482 00200000 ################################################################
2726 15:56:42.445614
2727 15:56:42.705102 00280000 ################################################################
2728 15:56:42.705233
2729 15:56:42.960480 00300000 ################################################################
2730 15:56:42.960615
2731 15:56:43.208623 00380000 ################################################################
2732 15:56:43.208751
2733 15:56:43.465500 00400000 ################################################################
2734 15:56:43.465630
2735 15:56:43.716232 00480000 ################################################################
2736 15:56:43.716370
2737 15:56:43.973675 00500000 ################################################################
2738 15:56:43.973812
2739 15:56:44.230592 00580000 ################################################################
2740 15:56:44.230730
2741 15:56:44.510570 00600000 ################################################################
2742 15:56:44.510707
2743 15:56:44.761965 00680000 ################################################################
2744 15:56:44.762106
2745 15:56:45.036962 00700000 ################################################################
2746 15:56:45.037108
2747 15:56:45.284001 00780000 ################################################################
2748 15:56:45.284143
2749 15:56:45.485152 00800000 #################################################### done.
2750 15:56:45.485287
2751 15:56:45.488599 Sending tftp read request... done.
2752 15:56:45.488686
2753 15:56:45.491521 Waiting for the transfer...
2754 15:56:45.491609
2755 15:56:45.495117 00000000 # done.
2756 15:56:45.495267
2757 15:56:45.501706 Command line loaded dynamically from TFTP file: 11447402/tftp-deploy-wclmmfql/kernel/cmdline
2758 15:56:45.501787
2759 15:56:45.517998 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2760 15:56:45.524117
2761 15:56:45.527232 Shutting down all USB controllers.
2762 15:56:45.527321
2763 15:56:45.527384 Removing current net device
2764 15:56:45.527444
2765 15:56:45.530392 Finalizing coreboot
2766 15:56:45.530475
2767 15:56:45.537114 Exiting depthcharge with code 4 at timestamp: 21348002
2768 15:56:45.537197
2769 15:56:45.537263
2770 15:56:45.537331 Starting kernel ...
2771 15:56:45.537390
2772 15:56:45.537450
2773 15:56:45.537818 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2774 15:56:45.537923 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2775 15:56:45.538001 Setting prompt string to ['Linux version [0-9]']
2776 15:56:45.538070 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2777 15:56:45.538145 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2779 16:01:15.538151 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2781 16:01:15.538360 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2783 16:01:15.538580 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2786 16:01:15.538856 end: 2 depthcharge-action (duration 00:05:00) [common]
2788 16:01:15.539214 Cleaning after the job
2789 16:01:15.539350 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447402/tftp-deploy-wclmmfql/ramdisk
2790 16:01:15.540651 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447402/tftp-deploy-wclmmfql/kernel
2791 16:01:15.542036 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11447402/tftp-deploy-wclmmfql/modules
2792 16:01:15.542426 start: 5.1 power-off (timeout 00:00:30) [common]
2793 16:01:15.542588 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-9' '--port=1' '--command=off'
2794 16:01:15.622976 >> Command sent successfully.
2795 16:01:15.626549 Returned 0 in 0 seconds
2796 16:01:15.727013 end: 5.1 power-off (duration 00:00:00) [common]
2798 16:01:15.727417 start: 5.2 read-feedback (timeout 00:10:00) [common]
2799 16:01:15.727735 Listened to connection for namespace 'common' for up to 1s
2801 16:01:15.728189 Listened to connection for namespace 'common' for up to 1s
2802 16:01:16.728337 Finalising connection for namespace 'common'
2803 16:01:16.729017 Disconnecting from shell: Finalise
2804 16:01:16.729429
2805 16:01:16.830467 end: 5.2 read-feedback (duration 00:00:01) [common]
2806 16:01:16.831076 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11447402
2807 16:01:16.878755 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11447402
2808 16:01:16.878958 JobError: Your job cannot terminate cleanly.