Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 06:39:54.430802 lava-dispatcher, installed at version: 2023.10
2 06:39:54.431006 start: 0 validate
3 06:39:54.431137 Start time: 2023-12-11 06:39:54.431129+00:00 (UTC)
4 06:39:54.431253 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:39:54.431383 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 06:39:54.699733 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:39:54.699986 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1988-gdf21aeeacf3cd%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:39:57.702449 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:39:57.703240 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1988-gdf21aeeacf3cd%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 06:39:58.707903 validate duration: 4.28
12 06:39:58.708208 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:39:58.708320 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:39:58.708407 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:39:58.708527 Not decompressing ramdisk as can be used compressed.
16 06:39:58.708616 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 06:39:58.708682 saving as /var/lib/lava/dispatcher/tmp/12243180/tftp-deploy-rw3w76uk/ramdisk/rootfs.cpio.gz
18 06:39:58.708746 total size: 8418130 (8 MB)
19 06:39:58.709854 progress 0 % (0 MB)
20 06:39:58.712173 progress 5 % (0 MB)
21 06:39:58.714455 progress 10 % (0 MB)
22 06:39:58.716731 progress 15 % (1 MB)
23 06:39:58.719015 progress 20 % (1 MB)
24 06:39:58.721329 progress 25 % (2 MB)
25 06:39:58.723657 progress 30 % (2 MB)
26 06:39:58.725777 progress 35 % (2 MB)
27 06:39:58.728042 progress 40 % (3 MB)
28 06:39:58.730354 progress 45 % (3 MB)
29 06:39:58.732676 progress 50 % (4 MB)
30 06:39:58.734935 progress 55 % (4 MB)
31 06:39:58.737263 progress 60 % (4 MB)
32 06:39:58.739419 progress 65 % (5 MB)
33 06:39:58.741681 progress 70 % (5 MB)
34 06:39:58.743909 progress 75 % (6 MB)
35 06:39:58.746170 progress 80 % (6 MB)
36 06:39:58.748426 progress 85 % (6 MB)
37 06:39:58.750721 progress 90 % (7 MB)
38 06:39:58.752994 progress 95 % (7 MB)
39 06:39:58.755162 progress 100 % (8 MB)
40 06:39:58.755396 8 MB downloaded in 0.05 s (172.09 MB/s)
41 06:39:58.755554 end: 1.1.1 http-download (duration 00:00:00) [common]
43 06:39:58.755799 end: 1.1 download-retry (duration 00:00:00) [common]
44 06:39:58.755886 start: 1.2 download-retry (timeout 00:10:00) [common]
45 06:39:58.755971 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 06:39:58.756132 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1988-gdf21aeeacf3cd/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 06:39:58.756207 saving as /var/lib/lava/dispatcher/tmp/12243180/tftp-deploy-rw3w76uk/kernel/bzImage
48 06:39:58.756271 total size: 8576912 (8 MB)
49 06:39:58.756334 No compression specified
50 06:39:58.757554 progress 0 % (0 MB)
51 06:39:58.759972 progress 5 % (0 MB)
52 06:39:58.762306 progress 10 % (0 MB)
53 06:39:58.764688 progress 15 % (1 MB)
54 06:39:58.766996 progress 20 % (1 MB)
55 06:39:58.769321 progress 25 % (2 MB)
56 06:39:58.771649 progress 30 % (2 MB)
57 06:39:58.773955 progress 35 % (2 MB)
58 06:39:58.776252 progress 40 % (3 MB)
59 06:39:58.778536 progress 45 % (3 MB)
60 06:39:58.780848 progress 50 % (4 MB)
61 06:39:58.783095 progress 55 % (4 MB)
62 06:39:58.785532 progress 60 % (4 MB)
63 06:39:58.787830 progress 65 % (5 MB)
64 06:39:58.790093 progress 70 % (5 MB)
65 06:39:58.792448 progress 75 % (6 MB)
66 06:39:58.794704 progress 80 % (6 MB)
67 06:39:58.797032 progress 85 % (6 MB)
68 06:39:58.799298 progress 90 % (7 MB)
69 06:39:58.801624 progress 95 % (7 MB)
70 06:39:58.803957 progress 100 % (8 MB)
71 06:39:58.804206 8 MB downloaded in 0.05 s (170.66 MB/s)
72 06:39:58.804353 end: 1.2.1 http-download (duration 00:00:00) [common]
74 06:39:58.804586 end: 1.2 download-retry (duration 00:00:00) [common]
75 06:39:58.804682 start: 1.3 download-retry (timeout 00:10:00) [common]
76 06:39:58.804775 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 06:39:58.804923 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1988-gdf21aeeacf3cd/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 06:39:58.805000 saving as /var/lib/lava/dispatcher/tmp/12243180/tftp-deploy-rw3w76uk/modules/modules.tar
79 06:39:58.805061 total size: 250896 (0 MB)
80 06:39:58.805124 Using unxz to decompress xz
81 06:39:58.809452 progress 13 % (0 MB)
82 06:39:58.809903 progress 26 % (0 MB)
83 06:39:58.810148 progress 39 % (0 MB)
84 06:39:58.811743 progress 52 % (0 MB)
85 06:39:58.813713 progress 65 % (0 MB)
86 06:39:58.815597 progress 78 % (0 MB)
87 06:39:58.817427 progress 91 % (0 MB)
88 06:39:58.819383 progress 100 % (0 MB)
89 06:39:58.824839 0 MB downloaded in 0.02 s (12.10 MB/s)
90 06:39:58.825089 end: 1.3.1 http-download (duration 00:00:00) [common]
92 06:39:58.825361 end: 1.3 download-retry (duration 00:00:00) [common]
93 06:39:58.825460 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 06:39:58.825558 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 06:39:58.825638 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 06:39:58.825725 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 06:39:58.825966 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv
98 06:39:58.826103 makedir: /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin
99 06:39:58.826210 makedir: /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/tests
100 06:39:58.826310 makedir: /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/results
101 06:39:58.826428 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-add-keys
102 06:39:58.826577 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-add-sources
103 06:39:58.826713 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-background-process-start
104 06:39:58.826846 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-background-process-stop
105 06:39:58.826975 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-common-functions
106 06:39:58.827103 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-echo-ipv4
107 06:39:58.827231 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-install-packages
108 06:39:58.827358 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-installed-packages
109 06:39:58.827484 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-os-build
110 06:39:58.827615 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-probe-channel
111 06:39:58.827743 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-probe-ip
112 06:39:58.827869 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-target-ip
113 06:39:58.827996 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-target-mac
114 06:39:58.828161 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-target-storage
115 06:39:58.828293 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-test-case
116 06:39:58.828422 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-test-event
117 06:39:58.828628 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-test-feedback
118 06:39:58.828816 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-test-raise
119 06:39:58.828980 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-test-reference
120 06:39:58.829109 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-test-runner
121 06:39:58.829239 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-test-set
122 06:39:58.829399 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-test-shell
123 06:39:58.829575 Updating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-install-packages (oe)
124 06:39:58.829769 Updating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/bin/lava-installed-packages (oe)
125 06:39:58.829932 Creating /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/environment
126 06:39:58.830082 LAVA metadata
127 06:39:58.830190 - LAVA_JOB_ID=12243180
128 06:39:58.830290 - LAVA_DISPATCHER_IP=192.168.201.1
129 06:39:58.830466 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 06:39:58.830537 skipped lava-vland-overlay
131 06:39:58.830628 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 06:39:58.830737 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 06:39:58.830801 skipped lava-multinode-overlay
134 06:39:58.830875 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 06:39:58.830998 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 06:39:58.831116 Loading test definitions
137 06:39:58.831229 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 06:39:58.831360 Using /lava-12243180 at stage 0
139 06:39:58.831713 uuid=12243180_1.4.2.3.1 testdef=None
140 06:39:58.831807 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 06:39:58.831896 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 06:39:58.832531 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 06:39:58.832853 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 06:39:58.833561 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 06:39:58.833886 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 06:39:58.834554 runner path: /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/0/tests/0_dmesg test_uuid 12243180_1.4.2.3.1
149 06:39:58.834732 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 06:39:58.834970 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 06:39:58.835041 Using /lava-12243180 at stage 1
153 06:39:58.835381 uuid=12243180_1.4.2.3.5 testdef=None
154 06:39:58.835470 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 06:39:58.835554 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 06:39:58.836087 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 06:39:58.836391 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 06:39:58.837081 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 06:39:58.837335 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 06:39:58.837967 runner path: /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/1/tests/1_bootrr test_uuid 12243180_1.4.2.3.5
163 06:39:58.838149 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 06:39:58.838360 Creating lava-test-runner.conf files
166 06:39:58.838425 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/0 for stage 0
167 06:39:58.838545 - 0_dmesg
168 06:39:58.838625 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243180/lava-overlay-4yxh8vwv/lava-12243180/1 for stage 1
169 06:39:58.838717 - 1_bootrr
170 06:39:58.838812 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 06:39:58.838899 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 06:39:58.847581 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 06:39:58.847698 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 06:39:58.847785 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 06:39:58.847871 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 06:39:58.847958 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 06:39:59.104290 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 06:39:59.104679 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 06:39:59.104800 extracting modules file /var/lib/lava/dispatcher/tmp/12243180/tftp-deploy-rw3w76uk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243180/extract-overlay-ramdisk-d3iirrm6/ramdisk
180 06:39:59.118551 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 06:39:59.118678 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 06:39:59.118770 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243180/compress-overlay-rkwvx4ws/overlay-1.4.2.4.tar.gz to ramdisk
183 06:39:59.118838 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243180/compress-overlay-rkwvx4ws/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243180/extract-overlay-ramdisk-d3iirrm6/ramdisk
184 06:39:59.127830 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 06:39:59.127951 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 06:39:59.128043 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 06:39:59.128182 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 06:39:59.128263 Building ramdisk /var/lib/lava/dispatcher/tmp/12243180/extract-overlay-ramdisk-d3iirrm6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243180/extract-overlay-ramdisk-d3iirrm6/ramdisk
189 06:39:59.269082 >> 49788 blocks
190 06:40:00.119842 rename /var/lib/lava/dispatcher/tmp/12243180/extract-overlay-ramdisk-d3iirrm6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243180/tftp-deploy-rw3w76uk/ramdisk/ramdisk.cpio.gz
191 06:40:00.120316 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 06:40:00.120446 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 06:40:00.120551 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 06:40:00.120649 No mkimage arch provided, not using FIT.
195 06:40:00.120740 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 06:40:00.120821 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 06:40:00.120924 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 06:40:00.121012 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 06:40:00.121095 No LXC device requested
200 06:40:00.121186 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 06:40:00.121271 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 06:40:00.121351 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 06:40:00.121432 Checking files for TFTP limit of 4294967296 bytes.
204 06:40:00.121836 end: 1 tftp-deploy (duration 00:00:01) [common]
205 06:40:00.121940 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 06:40:00.122030 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 06:40:00.122148 substitutions:
208 06:40:00.122213 - {DTB}: None
209 06:40:00.122274 - {INITRD}: 12243180/tftp-deploy-rw3w76uk/ramdisk/ramdisk.cpio.gz
210 06:40:00.122333 - {KERNEL}: 12243180/tftp-deploy-rw3w76uk/kernel/bzImage
211 06:40:00.122390 - {LAVA_MAC}: None
212 06:40:00.122445 - {PRESEED_CONFIG}: None
213 06:40:00.122499 - {PRESEED_LOCAL}: None
214 06:40:00.122553 - {RAMDISK}: 12243180/tftp-deploy-rw3w76uk/ramdisk/ramdisk.cpio.gz
215 06:40:00.122607 - {ROOT_PART}: None
216 06:40:00.122661 - {ROOT}: None
217 06:40:00.122713 - {SERVER_IP}: 192.168.201.1
218 06:40:00.122766 - {TEE}: None
219 06:40:00.122819 Parsed boot commands:
220 06:40:00.122871 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 06:40:00.123049 Parsed boot commands: tftpboot 192.168.201.1 12243180/tftp-deploy-rw3w76uk/kernel/bzImage 12243180/tftp-deploy-rw3w76uk/kernel/cmdline 12243180/tftp-deploy-rw3w76uk/ramdisk/ramdisk.cpio.gz
222 06:40:00.123135 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 06:40:00.123216 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 06:40:00.123312 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 06:40:00.123403 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 06:40:00.123472 Not connected, no need to disconnect.
227 06:40:00.123546 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 06:40:00.123631 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 06:40:00.123699 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-7'
230 06:40:00.127873 Setting prompt string to ['lava-test: # ']
231 06:40:00.128311 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 06:40:00.128424 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 06:40:00.128522 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 06:40:00.128632 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 06:40:00.128874 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
236 06:40:05.262651 >> Command sent successfully.
237 06:40:05.265142 Returned 0 in 5 seconds
238 06:40:05.365552 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 06:40:05.365892 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 06:40:05.365994 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 06:40:05.366082 Setting prompt string to 'Starting depthcharge on Voema...'
243 06:40:05.366153 Changing prompt to 'Starting depthcharge on Voema...'
244 06:40:05.366221 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 06:40:05.366492 [Enter `^Ec?' for help]
246 06:40:06.966846
247 06:40:06.967011
248 06:40:06.977028 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 06:40:06.979828 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 06:40:06.987039 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 06:40:06.990313 CPU: AES supported, TXT NOT supported, VT supported
252 06:40:06.996549 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 06:40:07.003538 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 06:40:07.006816 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 06:40:07.009871 VBOOT: Loading verstage.
256 06:40:07.013376 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 06:40:07.020778 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 06:40:07.023867 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 06:40:07.033924 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 06:40:07.040327 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 06:40:07.040420
262 06:40:07.040488
263 06:40:07.053736 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 06:40:07.067460 Probing TPM: . done!
265 06:40:07.070726 TPM ready after 0 ms
266 06:40:07.074028 Connected to device vid:did:rid of 1ae0:0028:00
267 06:40:07.086985 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
268 06:40:07.091819 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 06:40:07.095998 Initialized TPM device CR50 revision 0
270 06:40:07.147297 tlcl_send_startup: Startup return code is 0
271 06:40:07.147443 TPM: setup succeeded
272 06:40:07.162806 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 06:40:07.176676 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 06:40:07.189493 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 06:40:07.199434 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 06:40:07.203003 Chrome EC: UHEPI supported
277 06:40:07.206663 Phase 1
278 06:40:07.209707 FMAP: area GBB found @ 1805000 (458752 bytes)
279 06:40:07.219487 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 06:40:07.225887 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 06:40:07.232930 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 06:40:07.239508 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 06:40:07.242698 Recovery requested (1009000e)
284 06:40:07.246216 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 06:40:07.257511 tlcl_extend: response is 0
286 06:40:07.264190 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 06:40:07.274473 tlcl_extend: response is 0
288 06:40:07.281158 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 06:40:07.287493 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 06:40:07.294206 BS: verstage times (exec / console): total (unknown) / 142 ms
291 06:40:07.294295
292 06:40:07.294363
293 06:40:07.307627 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 06:40:07.313853 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 06:40:07.317467 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 06:40:07.320651 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 06:40:07.327373 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 06:40:07.330522 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 06:40:07.333977 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
300 06:40:07.337401 TCO_STS: 0000 0000
301 06:40:07.341244 GEN_PMCON: d0015038 00002200
302 06:40:07.344352 GBLRST_CAUSE: 00000000 00000000
303 06:40:07.344437 HPR_CAUSE0: 00000000
304 06:40:07.347176 prev_sleep_state 5
305 06:40:07.350468 Boot Count incremented to 25582
306 06:40:07.357018 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 06:40:07.363545 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 06:40:07.370437 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 06:40:07.377136 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 06:40:07.382161 Chrome EC: UHEPI supported
311 06:40:07.388821 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 06:40:07.401039 Probing TPM: done!
313 06:40:07.408411 Connected to device vid:did:rid of 1ae0:0028:00
314 06:40:07.419956 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
315 06:40:07.425980 Initialized TPM device CR50 revision 0
316 06:40:07.436084 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 06:40:07.442816 MRC: Hash idx 0x100b comparison successful.
318 06:40:07.446049 MRC cache found, size faa8
319 06:40:07.446133 bootmode is set to: 2
320 06:40:07.449344 SPD index = 0
321 06:40:07.455823 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 06:40:07.459158 SPD: module type is LPDDR4X
323 06:40:07.462991 SPD: module part number is MT53E512M64D4NW-046
324 06:40:07.469428 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 06:40:07.472530 SPD: device width 16 bits, bus width 16 bits
326 06:40:07.479245 SPD: module size is 1024 MB (per channel)
327 06:40:07.910808 CBMEM:
328 06:40:07.914170 IMD: root @ 0x76fff000 254 entries.
329 06:40:07.917491 IMD: root @ 0x76ffec00 62 entries.
330 06:40:07.921181 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 06:40:07.927996 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 06:40:07.931624 External stage cache:
333 06:40:07.934189 IMD: root @ 0x7b3ff000 254 entries.
334 06:40:07.937309 IMD: root @ 0x7b3fec00 62 entries.
335 06:40:07.952532 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 06:40:07.959326 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 06:40:07.965698 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 06:40:07.979982 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 06:40:07.986815 cse_lite: Skip switching to RW in the recovery path
340 06:40:07.986904 8 DIMMs found
341 06:40:07.986972 SMM Memory Map
342 06:40:07.990027 SMRAM : 0x7b000000 0x800000
343 06:40:07.993921 Subregion 0: 0x7b000000 0x200000
344 06:40:07.997126 Subregion 1: 0x7b200000 0x200000
345 06:40:08.000371 Subregion 2: 0x7b400000 0x400000
346 06:40:08.003808 top_of_ram = 0x77000000
347 06:40:08.010332 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 06:40:08.013685 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 06:40:08.020677 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 06:40:08.023607 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 06:40:08.033905 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 06:40:08.040252 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 06:40:08.050319 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 06:40:08.053506 Processing 211 relocs. Offset value of 0x74c0b000
355 06:40:08.063158 BS: romstage times (exec / console): total (unknown) / 277 ms
356 06:40:08.068677
357 06:40:08.068761
358 06:40:08.078995 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 06:40:08.082063 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 06:40:08.091921 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 06:40:08.098780 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 06:40:08.105185 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 06:40:08.112860 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 06:40:08.158546 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 06:40:08.165415 Processing 5008 relocs. Offset value of 0x75d98000
366 06:40:08.168509 BS: postcar times (exec / console): total (unknown) / 59 ms
367 06:40:08.168594
368 06:40:08.171954
369 06:40:08.183011 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 06:40:08.183097 Normal boot
371 06:40:08.185917 FW_CONFIG value is 0x804c02
372 06:40:08.188934 PCI: 00:07.0 disabled by fw_config
373 06:40:08.192357 PCI: 00:07.1 disabled by fw_config
374 06:40:08.195775 PCI: 00:0d.2 disabled by fw_config
375 06:40:08.199165 PCI: 00:1c.7 disabled by fw_config
376 06:40:08.205294 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 06:40:08.212295 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 06:40:08.216529 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 06:40:08.218736 GENERIC: 0.0 disabled by fw_config
380 06:40:08.222015 GENERIC: 1.0 disabled by fw_config
381 06:40:08.229511 fw_config match found: DB_USB=USB3_ACTIVE
382 06:40:08.231979 fw_config match found: DB_USB=USB3_ACTIVE
383 06:40:08.236013 fw_config match found: DB_USB=USB3_ACTIVE
384 06:40:08.238787 fw_config match found: DB_USB=USB3_ACTIVE
385 06:40:08.245394 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 06:40:08.251891 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 06:40:08.258760 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 06:40:08.269195 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 06:40:08.271980 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 06:40:08.278583 microcode: Update skipped, already up-to-date
391 06:40:08.285026 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 06:40:08.312243 Detected 4 core, 8 thread CPU.
393 06:40:08.315801 Setting up SMI for CPU
394 06:40:08.319091 IED base = 0x7b400000
395 06:40:08.319183 IED size = 0x00400000
396 06:40:08.322476 Will perform SMM setup.
397 06:40:08.329200 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 06:40:08.335176 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 06:40:08.342484 Processing 16 relocs. Offset value of 0x00030000
400 06:40:08.345446 Attempting to start 7 APs
401 06:40:08.348842 Waiting for 10ms after sending INIT.
402 06:40:08.364029 Waiting for 1st SIPI to complete...done.
403 06:40:08.364180 AP: slot 1 apic_id 1.
404 06:40:08.370798 Waiting for 2nd SIPI to complete...done.
405 06:40:08.370884 AP: slot 4 apic_id 2.
406 06:40:08.374410 AP: slot 7 apic_id 3.
407 06:40:08.377488 AP: slot 6 apic_id 6.
408 06:40:08.377572 AP: slot 3 apic_id 7.
409 06:40:08.380677 AP: slot 5 apic_id 4.
410 06:40:08.384596 AP: slot 2 apic_id 5.
411 06:40:08.391121 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 06:40:08.397338 Processing 13 relocs. Offset value of 0x00038000
413 06:40:08.397424 Unable to locate Global NVS
414 06:40:08.407320 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 06:40:08.410709 Installing permanent SMM handler to 0x7b000000
416 06:40:08.420514 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 06:40:08.423944 Processing 794 relocs. Offset value of 0x7b010000
418 06:40:08.433868 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 06:40:08.437118 Processing 13 relocs. Offset value of 0x7b008000
420 06:40:08.443895 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 06:40:08.450585 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 06:40:08.454369 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 06:40:08.460516 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 06:40:08.467153 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 06:40:08.473943 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 06:40:08.480481 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 06:40:08.480624 Unable to locate Global NVS
428 06:40:08.490186 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 06:40:08.493511 Clearing SMI status registers
430 06:40:08.493647 SMI_STS: PM1
431 06:40:08.497347 PM1_STS: PWRBTN
432 06:40:08.503746 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 06:40:08.506844 In relocation handler: CPU 0
434 06:40:08.510673 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 06:40:08.517227 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 06:40:08.517312 Relocation complete.
437 06:40:08.527096 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 06:40:08.527182 In relocation handler: CPU 1
439 06:40:08.533790 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 06:40:08.533891 Relocation complete.
441 06:40:08.540072 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
442 06:40:08.543396 In relocation handler: CPU 5
443 06:40:08.550499 New SMBASE=0x7affec00 IEDBASE=0x7b400000
444 06:40:08.553705 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 06:40:08.557017 Relocation complete.
446 06:40:08.563667 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
447 06:40:08.566728 In relocation handler: CPU 2
448 06:40:08.570094 New SMBASE=0x7afff800 IEDBASE=0x7b400000
449 06:40:08.573695 Relocation complete.
450 06:40:08.580010 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
451 06:40:08.583598 In relocation handler: CPU 4
452 06:40:08.587208 New SMBASE=0x7afff000 IEDBASE=0x7b400000
453 06:40:08.590378 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 06:40:08.593843 Relocation complete.
455 06:40:08.600569 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
456 06:40:08.603567 In relocation handler: CPU 7
457 06:40:08.608161 New SMBASE=0x7affe400 IEDBASE=0x7b400000
458 06:40:08.610185 Relocation complete.
459 06:40:08.616972 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
460 06:40:08.620230 In relocation handler: CPU 6
461 06:40:08.623270 New SMBASE=0x7affe800 IEDBASE=0x7b400000
462 06:40:08.631085 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 06:40:08.631171 Relocation complete.
464 06:40:08.640510 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
465 06:40:08.643566 In relocation handler: CPU 3
466 06:40:08.646720 New SMBASE=0x7afff400 IEDBASE=0x7b400000
467 06:40:08.646805 Relocation complete.
468 06:40:08.650523 Initializing CPU #0
469 06:40:08.653604 CPU: vendor Intel device 806c1
470 06:40:08.656648 CPU: family 06, model 8c, stepping 01
471 06:40:08.660664 Clearing out pending MCEs
472 06:40:08.664661 Setting up local APIC...
473 06:40:08.664803 apic_id: 0x00 done.
474 06:40:08.668400 Turbo is available but hidden
475 06:40:08.671890 Turbo is available and visible
476 06:40:08.674966 microcode: Update skipped, already up-to-date
477 06:40:08.678299 CPU #0 initialized
478 06:40:08.681175 Initializing CPU #7
479 06:40:08.681311 Initializing CPU #4
480 06:40:08.684834 Initializing CPU #2
481 06:40:08.684965 Initializing CPU #5
482 06:40:08.687963 CPU: vendor Intel device 806c1
483 06:40:08.691700 CPU: family 06, model 8c, stepping 01
484 06:40:08.694697 CPU: vendor Intel device 806c1
485 06:40:08.701247 CPU: family 06, model 8c, stepping 01
486 06:40:08.701381 Clearing out pending MCEs
487 06:40:08.704483 Clearing out pending MCEs
488 06:40:08.707784 Setting up local APIC...
489 06:40:08.711770 CPU: vendor Intel device 806c1
490 06:40:08.714727 CPU: family 06, model 8c, stepping 01
491 06:40:08.718319 CPU: vendor Intel device 806c1
492 06:40:08.721131 CPU: family 06, model 8c, stepping 01
493 06:40:08.724718 Clearing out pending MCEs
494 06:40:08.728338 Clearing out pending MCEs
495 06:40:08.728422 Setting up local APIC...
496 06:40:08.731618 Initializing CPU #6
497 06:40:08.734581 Initializing CPU #3
498 06:40:08.738031 CPU: vendor Intel device 806c1
499 06:40:08.740994 CPU: family 06, model 8c, stepping 01
500 06:40:08.744762 CPU: vendor Intel device 806c1
501 06:40:08.748337 CPU: family 06, model 8c, stepping 01
502 06:40:08.751122 Clearing out pending MCEs
503 06:40:08.751205 Clearing out pending MCEs
504 06:40:08.754237 Setting up local APIC...
505 06:40:08.757612 apic_id: 0x05 done.
506 06:40:08.761094 Setting up local APIC...
507 06:40:08.761177 Setting up local APIC...
508 06:40:08.764311 apic_id: 0x06 done.
509 06:40:08.767902 Setting up local APIC...
510 06:40:08.771558 microcode: Update skipped, already up-to-date
511 06:40:08.774311 apic_id: 0x04 done.
512 06:40:08.774394 CPU #2 initialized
513 06:40:08.781103 microcode: Update skipped, already up-to-date
514 06:40:08.784189 microcode: Update skipped, already up-to-date
515 06:40:08.787506 apic_id: 0x07 done.
516 06:40:08.787590 apic_id: 0x03 done.
517 06:40:08.790980 apic_id: 0x02 done.
518 06:40:08.797456 microcode: Update skipped, already up-to-date
519 06:40:08.801557 microcode: Update skipped, already up-to-date
520 06:40:08.801641 CPU #7 initialized
521 06:40:08.804505 CPU #4 initialized
522 06:40:08.807459 CPU #5 initialized
523 06:40:08.811093 microcode: Update skipped, already up-to-date
524 06:40:08.814290 CPU #6 initialized
525 06:40:08.814398 CPU #3 initialized
526 06:40:08.817602 Initializing CPU #1
527 06:40:08.820821 CPU: vendor Intel device 806c1
528 06:40:08.824074 CPU: family 06, model 8c, stepping 01
529 06:40:08.827384 Clearing out pending MCEs
530 06:40:08.831024 Setting up local APIC...
531 06:40:08.831108 apic_id: 0x01 done.
532 06:40:08.837821 microcode: Update skipped, already up-to-date
533 06:40:08.837905 CPU #1 initialized
534 06:40:08.844221 bsp_do_flight_plan done after 468 msecs.
535 06:40:08.844306 CPU: frequency set to 4000 MHz
536 06:40:08.847408 Enabling SMIs.
537 06:40:08.853976 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
538 06:40:08.869544 SATAXPCIE1 indicates PCIe NVMe is present
539 06:40:08.873441 Probing TPM: done!
540 06:40:08.876474 Connected to device vid:did:rid of 1ae0:0028:00
541 06:40:08.887109 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
542 06:40:08.890125 Initialized TPM device CR50 revision 0
543 06:40:08.893667 Enabling S0i3.4
544 06:40:08.900547 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 06:40:08.903703 Found a VBT of 8704 bytes after decompression
546 06:40:08.910443 cse_lite: CSE RO boot. HybridStorageMode disabled
547 06:40:08.916937 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 06:40:08.993053 FSPS returned 0
549 06:40:08.996288 Executing Phase 1 of FspMultiPhaseSiInit
550 06:40:09.006301 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 06:40:09.009673 port C0 DISC req: usage 1 usb3 1 usb2 5
552 06:40:09.013096 Raw Buffer output 0 00000511
553 06:40:09.016319 Raw Buffer output 1 00000000
554 06:40:09.020224 pmc_send_ipc_cmd succeeded
555 06:40:09.026698 port C1 DISC req: usage 1 usb3 2 usb2 3
556 06:40:09.026787 Raw Buffer output 0 00000321
557 06:40:09.030464 Raw Buffer output 1 00000000
558 06:40:09.034352 pmc_send_ipc_cmd succeeded
559 06:40:09.039258 Detected 4 core, 8 thread CPU.
560 06:40:09.042905 Detected 4 core, 8 thread CPU.
561 06:40:09.277262 Display FSP Version Info HOB
562 06:40:09.280465 Reference Code - CPU = a.0.4c.31
563 06:40:09.283263 uCode Version = 0.0.0.86
564 06:40:09.286759 TXT ACM version = ff.ff.ff.ffff
565 06:40:09.289772 Reference Code - ME = a.0.4c.31
566 06:40:09.293409 MEBx version = 0.0.0.0
567 06:40:09.297201 ME Firmware Version = Consumer SKU
568 06:40:09.299726 Reference Code - PCH = a.0.4c.31
569 06:40:09.303527 PCH-CRID Status = Disabled
570 06:40:09.306623 PCH-CRID Original Value = ff.ff.ff.ffff
571 06:40:09.309958 PCH-CRID New Value = ff.ff.ff.ffff
572 06:40:09.313028 OPROM - RST - RAID = ff.ff.ff.ffff
573 06:40:09.316499 PCH Hsio Version = 4.0.0.0
574 06:40:09.319813 Reference Code - SA - System Agent = a.0.4c.31
575 06:40:09.323072 Reference Code - MRC = 2.0.0.1
576 06:40:09.326862 SA - PCIe Version = a.0.4c.31
577 06:40:09.329594 SA-CRID Status = Disabled
578 06:40:09.332966 SA-CRID Original Value = 0.0.0.1
579 06:40:09.336387 SA-CRID New Value = 0.0.0.1
580 06:40:09.339581 OPROM - VBIOS = ff.ff.ff.ffff
581 06:40:09.342999 IO Manageability Engine FW Version = 11.1.4.0
582 06:40:09.346352 PHY Build Version = 0.0.0.e0
583 06:40:09.349787 Thunderbolt(TM) FW Version = 0.0.0.0
584 06:40:09.356239 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 06:40:09.359655 ITSS IRQ Polarities Before:
586 06:40:09.359751 IPC0: 0xffffffff
587 06:40:09.362858 IPC1: 0xffffffff
588 06:40:09.362944 IPC2: 0xffffffff
589 06:40:09.366660 IPC3: 0xffffffff
590 06:40:09.369478 ITSS IRQ Polarities After:
591 06:40:09.369571 IPC0: 0xffffffff
592 06:40:09.373091 IPC1: 0xffffffff
593 06:40:09.373188 IPC2: 0xffffffff
594 06:40:09.376425 IPC3: 0xffffffff
595 06:40:09.379903 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 06:40:09.392975 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 06:40:09.402912 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 06:40:09.416127 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 06:40:09.423059 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 06:40:09.423165 Enumerating buses...
601 06:40:09.430278 Show all devs... Before device enumeration.
602 06:40:09.434560 Root Device: enabled 1
603 06:40:09.434652 DOMAIN: 0000: enabled 1
604 06:40:09.436747 CPU_CLUSTER: 0: enabled 1
605 06:40:09.439188 PCI: 00:00.0: enabled 1
606 06:40:09.442698 PCI: 00:02.0: enabled 1
607 06:40:09.442785 PCI: 00:04.0: enabled 1
608 06:40:09.446129 PCI: 00:05.0: enabled 1
609 06:40:09.449432 PCI: 00:06.0: enabled 0
610 06:40:09.449517 PCI: 00:07.0: enabled 0
611 06:40:09.455973 PCI: 00:07.1: enabled 0
612 06:40:09.456286 PCI: 00:07.2: enabled 0
613 06:40:09.459245 PCI: 00:07.3: enabled 0
614 06:40:09.459330 PCI: 00:08.0: enabled 1
615 06:40:09.462662 PCI: 00:09.0: enabled 0
616 06:40:09.465908 PCI: 00:0a.0: enabled 0
617 06:40:09.469224 PCI: 00:0d.0: enabled 1
618 06:40:09.469327 PCI: 00:0d.1: enabled 0
619 06:40:09.472622 PCI: 00:0d.2: enabled 0
620 06:40:09.476243 PCI: 00:0d.3: enabled 0
621 06:40:09.479416 PCI: 00:0e.0: enabled 0
622 06:40:09.479502 PCI: 00:10.2: enabled 1
623 06:40:09.482603 PCI: 00:10.6: enabled 0
624 06:40:09.485838 PCI: 00:10.7: enabled 0
625 06:40:09.485926 PCI: 00:12.0: enabled 0
626 06:40:09.489234 PCI: 00:12.6: enabled 0
627 06:40:09.493326 PCI: 00:13.0: enabled 0
628 06:40:09.496173 PCI: 00:14.0: enabled 1
629 06:40:09.496259 PCI: 00:14.1: enabled 0
630 06:40:09.499132 PCI: 00:14.2: enabled 1
631 06:40:09.502733 PCI: 00:14.3: enabled 1
632 06:40:09.506276 PCI: 00:15.0: enabled 1
633 06:40:09.506362 PCI: 00:15.1: enabled 1
634 06:40:09.509503 PCI: 00:15.2: enabled 1
635 06:40:09.512931 PCI: 00:15.3: enabled 1
636 06:40:09.515922 PCI: 00:16.0: enabled 1
637 06:40:09.516008 PCI: 00:16.1: enabled 0
638 06:40:09.519264 PCI: 00:16.2: enabled 0
639 06:40:09.522737 PCI: 00:16.3: enabled 0
640 06:40:09.522822 PCI: 00:16.4: enabled 0
641 06:40:09.526218 PCI: 00:16.5: enabled 0
642 06:40:09.529755 PCI: 00:17.0: enabled 1
643 06:40:09.533184 PCI: 00:19.0: enabled 0
644 06:40:09.533272 PCI: 00:19.1: enabled 1
645 06:40:09.536391 PCI: 00:19.2: enabled 0
646 06:40:09.539366 PCI: 00:1c.0: enabled 1
647 06:40:09.542262 PCI: 00:1c.1: enabled 0
648 06:40:09.542349 PCI: 00:1c.2: enabled 0
649 06:40:09.545820 PCI: 00:1c.3: enabled 0
650 06:40:09.549552 PCI: 00:1c.4: enabled 0
651 06:40:09.552758 PCI: 00:1c.5: enabled 0
652 06:40:09.552849 PCI: 00:1c.6: enabled 1
653 06:40:09.556106 PCI: 00:1c.7: enabled 0
654 06:40:09.559241 PCI: 00:1d.0: enabled 1
655 06:40:09.562726 PCI: 00:1d.1: enabled 0
656 06:40:09.562811 PCI: 00:1d.2: enabled 1
657 06:40:09.565762 PCI: 00:1d.3: enabled 0
658 06:40:09.569449 PCI: 00:1e.0: enabled 1
659 06:40:09.569534 PCI: 00:1e.1: enabled 0
660 06:40:09.572604 PCI: 00:1e.2: enabled 1
661 06:40:09.575919 PCI: 00:1e.3: enabled 1
662 06:40:09.578948 PCI: 00:1f.0: enabled 1
663 06:40:09.579033 PCI: 00:1f.1: enabled 0
664 06:40:09.582227 PCI: 00:1f.2: enabled 1
665 06:40:09.585609 PCI: 00:1f.3: enabled 1
666 06:40:09.588805 PCI: 00:1f.4: enabled 0
667 06:40:09.588898 PCI: 00:1f.5: enabled 1
668 06:40:09.592271 PCI: 00:1f.6: enabled 0
669 06:40:09.595826 PCI: 00:1f.7: enabled 0
670 06:40:09.595949 APIC: 00: enabled 1
671 06:40:09.598946 GENERIC: 0.0: enabled 1
672 06:40:09.602140 GENERIC: 0.0: enabled 1
673 06:40:09.605693 GENERIC: 1.0: enabled 1
674 06:40:09.605791 GENERIC: 0.0: enabled 1
675 06:40:09.609035 GENERIC: 1.0: enabled 1
676 06:40:09.612031 USB0 port 0: enabled 1
677 06:40:09.615550 GENERIC: 0.0: enabled 1
678 06:40:09.615641 USB0 port 0: enabled 1
679 06:40:09.618824 GENERIC: 0.0: enabled 1
680 06:40:09.623084 I2C: 00:1a: enabled 1
681 06:40:09.623174 I2C: 00:31: enabled 1
682 06:40:09.625961 I2C: 00:32: enabled 1
683 06:40:09.629039 I2C: 00:10: enabled 1
684 06:40:09.629123 I2C: 00:15: enabled 1
685 06:40:09.633212 GENERIC: 0.0: enabled 0
686 06:40:09.635939 GENERIC: 1.0: enabled 0
687 06:40:09.639244 GENERIC: 0.0: enabled 1
688 06:40:09.639333 SPI: 00: enabled 1
689 06:40:09.642353 SPI: 00: enabled 1
690 06:40:09.642441 PNP: 0c09.0: enabled 1
691 06:40:09.645540 GENERIC: 0.0: enabled 1
692 06:40:09.648827 USB3 port 0: enabled 1
693 06:40:09.652448 USB3 port 1: enabled 1
694 06:40:09.652554 USB3 port 2: enabled 0
695 06:40:09.655656 USB3 port 3: enabled 0
696 06:40:09.659335 USB2 port 0: enabled 0
697 06:40:09.659426 USB2 port 1: enabled 1
698 06:40:09.662623 USB2 port 2: enabled 1
699 06:40:09.666110 USB2 port 3: enabled 0
700 06:40:09.666204 USB2 port 4: enabled 1
701 06:40:09.668972 USB2 port 5: enabled 0
702 06:40:09.672090 USB2 port 6: enabled 0
703 06:40:09.675758 USB2 port 7: enabled 0
704 06:40:09.675891 USB2 port 8: enabled 0
705 06:40:09.679067 USB2 port 9: enabled 0
706 06:40:09.683112 USB3 port 0: enabled 0
707 06:40:09.683256 USB3 port 1: enabled 1
708 06:40:09.685415 USB3 port 2: enabled 0
709 06:40:09.688660 USB3 port 3: enabled 0
710 06:40:09.692364 GENERIC: 0.0: enabled 1
711 06:40:09.692469 GENERIC: 1.0: enabled 1
712 06:40:09.695254 APIC: 01: enabled 1
713 06:40:09.698812 APIC: 05: enabled 1
714 06:40:09.698917 APIC: 07: enabled 1
715 06:40:09.702182 APIC: 02: enabled 1
716 06:40:09.702275 APIC: 04: enabled 1
717 06:40:09.705600 APIC: 06: enabled 1
718 06:40:09.708792 APIC: 03: enabled 1
719 06:40:09.708899 Compare with tree...
720 06:40:09.711979 Root Device: enabled 1
721 06:40:09.715228 DOMAIN: 0000: enabled 1
722 06:40:09.718636 PCI: 00:00.0: enabled 1
723 06:40:09.718738 PCI: 00:02.0: enabled 1
724 06:40:09.722162 PCI: 00:04.0: enabled 1
725 06:40:09.725886 GENERIC: 0.0: enabled 1
726 06:40:09.728710 PCI: 00:05.0: enabled 1
727 06:40:09.731892 PCI: 00:06.0: enabled 0
728 06:40:09.731978 PCI: 00:07.0: enabled 0
729 06:40:09.735375 GENERIC: 0.0: enabled 1
730 06:40:09.739228 PCI: 00:07.1: enabled 0
731 06:40:09.742857 GENERIC: 1.0: enabled 1
732 06:40:09.745342 PCI: 00:07.2: enabled 0
733 06:40:09.745436 GENERIC: 0.0: enabled 1
734 06:40:09.748757 PCI: 00:07.3: enabled 0
735 06:40:09.751939 GENERIC: 1.0: enabled 1
736 06:40:09.755439 PCI: 00:08.0: enabled 1
737 06:40:09.758360 PCI: 00:09.0: enabled 0
738 06:40:09.758449 PCI: 00:0a.0: enabled 0
739 06:40:09.762274 PCI: 00:0d.0: enabled 1
740 06:40:09.765303 USB0 port 0: enabled 1
741 06:40:09.768667 USB3 port 0: enabled 1
742 06:40:09.771872 USB3 port 1: enabled 1
743 06:40:09.771964 USB3 port 2: enabled 0
744 06:40:09.775432 USB3 port 3: enabled 0
745 06:40:09.778506 PCI: 00:0d.1: enabled 0
746 06:40:09.781660 PCI: 00:0d.2: enabled 0
747 06:40:09.785920 GENERIC: 0.0: enabled 1
748 06:40:09.786032 PCI: 00:0d.3: enabled 0
749 06:40:09.788400 PCI: 00:0e.0: enabled 0
750 06:40:09.792964 PCI: 00:10.2: enabled 1
751 06:40:09.795355 PCI: 00:10.6: enabled 0
752 06:40:09.798312 PCI: 00:10.7: enabled 0
753 06:40:09.798406 PCI: 00:12.0: enabled 0
754 06:40:09.801926 PCI: 00:12.6: enabled 0
755 06:40:09.805401 PCI: 00:13.0: enabled 0
756 06:40:09.808436 PCI: 00:14.0: enabled 1
757 06:40:09.811798 USB0 port 0: enabled 1
758 06:40:09.811884 USB2 port 0: enabled 0
759 06:40:09.814830 USB2 port 1: enabled 1
760 06:40:09.818912 USB2 port 2: enabled 1
761 06:40:09.821902 USB2 port 3: enabled 0
762 06:40:09.825204 USB2 port 4: enabled 1
763 06:40:09.828331 USB2 port 5: enabled 0
764 06:40:09.828417 USB2 port 6: enabled 0
765 06:40:09.831861 USB2 port 7: enabled 0
766 06:40:09.834965 USB2 port 8: enabled 0
767 06:40:09.838879 USB2 port 9: enabled 0
768 06:40:09.841926 USB3 port 0: enabled 0
769 06:40:09.845084 USB3 port 1: enabled 1
770 06:40:09.845172 USB3 port 2: enabled 0
771 06:40:09.848063 USB3 port 3: enabled 0
772 06:40:09.851580 PCI: 00:14.1: enabled 0
773 06:40:09.854956 PCI: 00:14.2: enabled 1
774 06:40:09.858269 PCI: 00:14.3: enabled 1
775 06:40:09.858358 GENERIC: 0.0: enabled 1
776 06:40:09.861850 PCI: 00:15.0: enabled 1
777 06:40:09.865130 I2C: 00:1a: enabled 1
778 06:40:09.868064 I2C: 00:31: enabled 1
779 06:40:09.868199 I2C: 00:32: enabled 1
780 06:40:09.871372 PCI: 00:15.1: enabled 1
781 06:40:09.874843 I2C: 00:10: enabled 1
782 06:40:09.878051 PCI: 00:15.2: enabled 1
783 06:40:09.881208 PCI: 00:15.3: enabled 1
784 06:40:09.881295 PCI: 00:16.0: enabled 1
785 06:40:09.884609 PCI: 00:16.1: enabled 0
786 06:40:09.888146 PCI: 00:16.2: enabled 0
787 06:40:09.891637 PCI: 00:16.3: enabled 0
788 06:40:09.894504 PCI: 00:16.4: enabled 0
789 06:40:09.894592 PCI: 00:16.5: enabled 0
790 06:40:09.898257 PCI: 00:17.0: enabled 1
791 06:40:09.901302 PCI: 00:19.0: enabled 0
792 06:40:09.905350 PCI: 00:19.1: enabled 1
793 06:40:09.905453 I2C: 00:15: enabled 1
794 06:40:09.909451 PCI: 00:19.2: enabled 0
795 06:40:09.912761 PCI: 00:1d.0: enabled 1
796 06:40:09.916364 GENERIC: 0.0: enabled 1
797 06:40:09.916481 PCI: 00:1e.0: enabled 1
798 06:40:09.920881 PCI: 00:1e.1: enabled 0
799 06:40:09.922580 PCI: 00:1e.2: enabled 1
800 06:40:09.926091 SPI: 00: enabled 1
801 06:40:09.926191 PCI: 00:1e.3: enabled 1
802 06:40:09.929476 SPI: 00: enabled 1
803 06:40:09.932830 PCI: 00:1f.0: enabled 1
804 06:40:09.977213 PNP: 0c09.0: enabled 1
805 06:40:09.977373 PCI: 00:1f.1: enabled 0
806 06:40:09.977485 PCI: 00:1f.2: enabled 1
807 06:40:09.977759 GENERIC: 0.0: enabled 1
808 06:40:09.977843 GENERIC: 0.0: enabled 1
809 06:40:09.977925 GENERIC: 1.0: enabled 1
810 06:40:09.978004 PCI: 00:1f.3: enabled 1
811 06:40:09.978097 PCI: 00:1f.4: enabled 0
812 06:40:09.978170 PCI: 00:1f.5: enabled 1
813 06:40:09.978265 PCI: 00:1f.6: enabled 0
814 06:40:09.978418 PCI: 00:1f.7: enabled 0
815 06:40:09.978514 CPU_CLUSTER: 0: enabled 1
816 06:40:09.978798 APIC: 00: enabled 1
817 06:40:09.978915 APIC: 01: enabled 1
818 06:40:09.979010 APIC: 05: enabled 1
819 06:40:09.979123 APIC: 07: enabled 1
820 06:40:09.979187 APIC: 02: enabled 1
821 06:40:09.979246 APIC: 04: enabled 1
822 06:40:09.981648 APIC: 06: enabled 1
823 06:40:09.981735 APIC: 03: enabled 1
824 06:40:09.985473 Root Device scanning...
825 06:40:09.988536 scan_static_bus for Root Device
826 06:40:09.992325 DOMAIN: 0000 enabled
827 06:40:09.995492 CPU_CLUSTER: 0 enabled
828 06:40:09.995600 DOMAIN: 0000 scanning...
829 06:40:09.998382 PCI: pci_scan_bus for bus 00
830 06:40:10.001684 PCI: 00:00.0 [8086/0000] ops
831 06:40:10.005373 PCI: 00:00.0 [8086/9a12] enabled
832 06:40:10.008462 PCI: 00:02.0 [8086/0000] bus ops
833 06:40:10.011927 PCI: 00:02.0 [8086/9a40] enabled
834 06:40:10.015771 PCI: 00:04.0 [8086/0000] bus ops
835 06:40:10.018353 PCI: 00:04.0 [8086/9a03] enabled
836 06:40:10.022004 PCI: 00:05.0 [8086/9a19] enabled
837 06:40:10.025162 PCI: 00:07.0 [0000/0000] hidden
838 06:40:10.028859 PCI: 00:08.0 [8086/9a11] enabled
839 06:40:10.031952 PCI: 00:0a.0 [8086/9a0d] disabled
840 06:40:10.035230 PCI: 00:0d.0 [8086/0000] bus ops
841 06:40:10.038702 PCI: 00:0d.0 [8086/9a13] enabled
842 06:40:10.041611 PCI: 00:14.0 [8086/0000] bus ops
843 06:40:10.044994 PCI: 00:14.0 [8086/a0ed] enabled
844 06:40:10.048892 PCI: 00:14.2 [8086/a0ef] enabled
845 06:40:10.051724 PCI: 00:14.3 [8086/0000] bus ops
846 06:40:10.055098 PCI: 00:14.3 [8086/a0f0] enabled
847 06:40:10.058293 PCI: 00:15.0 [8086/0000] bus ops
848 06:40:10.061678 PCI: 00:15.0 [8086/a0e8] enabled
849 06:40:10.065002 PCI: 00:15.1 [8086/0000] bus ops
850 06:40:10.068203 PCI: 00:15.1 [8086/a0e9] enabled
851 06:40:10.071744 PCI: 00:15.2 [8086/0000] bus ops
852 06:40:10.074966 PCI: 00:15.2 [8086/a0ea] enabled
853 06:40:10.078523 PCI: 00:15.3 [8086/0000] bus ops
854 06:40:10.081576 PCI: 00:15.3 [8086/a0eb] enabled
855 06:40:10.085451 PCI: 00:16.0 [8086/0000] ops
856 06:40:10.089245 PCI: 00:16.0 [8086/a0e0] enabled
857 06:40:10.094918 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 06:40:10.098648 PCI: 00:19.0 [8086/0000] bus ops
859 06:40:10.101719 PCI: 00:19.0 [8086/a0c5] disabled
860 06:40:10.104985 PCI: 00:19.1 [8086/0000] bus ops
861 06:40:10.108265 PCI: 00:19.1 [8086/a0c6] enabled
862 06:40:10.111638 PCI: 00:1d.0 [8086/0000] bus ops
863 06:40:10.114989 PCI: 00:1d.0 [8086/a0b0] enabled
864 06:40:10.118274 PCI: 00:1e.0 [8086/0000] ops
865 06:40:10.121918 PCI: 00:1e.0 [8086/a0a8] enabled
866 06:40:10.124759 PCI: 00:1e.2 [8086/0000] bus ops
867 06:40:10.128126 PCI: 00:1e.2 [8086/a0aa] enabled
868 06:40:10.131602 PCI: 00:1e.3 [8086/0000] bus ops
869 06:40:10.135126 PCI: 00:1e.3 [8086/a0ab] enabled
870 06:40:10.138597 PCI: 00:1f.0 [8086/0000] bus ops
871 06:40:10.141837 PCI: 00:1f.0 [8086/a087] enabled
872 06:40:10.141923 RTC Init
873 06:40:10.144861 Set power on after power failure.
874 06:40:10.148789 Disabling Deep S3
875 06:40:10.148900 Disabling Deep S3
876 06:40:10.151514 Disabling Deep S4
877 06:40:10.155956 Disabling Deep S4
878 06:40:10.156045 Disabling Deep S5
879 06:40:10.158231 Disabling Deep S5
880 06:40:10.161614 PCI: 00:1f.2 [0000/0000] hidden
881 06:40:10.165115 PCI: 00:1f.3 [8086/0000] bus ops
882 06:40:10.168243 PCI: 00:1f.3 [8086/a0c8] enabled
883 06:40:10.171674 PCI: 00:1f.5 [8086/0000] bus ops
884 06:40:10.175202 PCI: 00:1f.5 [8086/a0a4] enabled
885 06:40:10.178258 PCI: Leftover static devices:
886 06:40:10.178384 PCI: 00:10.2
887 06:40:10.178471 PCI: 00:10.6
888 06:40:10.182019 PCI: 00:10.7
889 06:40:10.182117 PCI: 00:06.0
890 06:40:10.184944 PCI: 00:07.1
891 06:40:10.185039 PCI: 00:07.2
892 06:40:10.185107 PCI: 00:07.3
893 06:40:10.188161 PCI: 00:09.0
894 06:40:10.188254 PCI: 00:0d.1
895 06:40:10.191785 PCI: 00:0d.2
896 06:40:10.191884 PCI: 00:0d.3
897 06:40:10.194825 PCI: 00:0e.0
898 06:40:10.194919 PCI: 00:12.0
899 06:40:10.194987 PCI: 00:12.6
900 06:40:10.198313 PCI: 00:13.0
901 06:40:10.198405 PCI: 00:14.1
902 06:40:10.201728 PCI: 00:16.1
903 06:40:10.201826 PCI: 00:16.2
904 06:40:10.201894 PCI: 00:16.3
905 06:40:10.204991 PCI: 00:16.4
906 06:40:10.205082 PCI: 00:16.5
907 06:40:10.208019 PCI: 00:17.0
908 06:40:10.208135 PCI: 00:19.2
909 06:40:10.208206 PCI: 00:1e.1
910 06:40:10.211992 PCI: 00:1f.1
911 06:40:10.212117 PCI: 00:1f.4
912 06:40:10.215332 PCI: 00:1f.6
913 06:40:10.215428 PCI: 00:1f.7
914 06:40:10.218827 PCI: Check your devicetree.cb.
915 06:40:10.221741 PCI: 00:02.0 scanning...
916 06:40:10.225045 scan_generic_bus for PCI: 00:02.0
917 06:40:10.228097 scan_generic_bus for PCI: 00:02.0 done
918 06:40:10.231987 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 06:40:10.235440 PCI: 00:04.0 scanning...
920 06:40:10.238415 scan_generic_bus for PCI: 00:04.0
921 06:40:10.241940 GENERIC: 0.0 enabled
922 06:40:10.248462 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 06:40:10.251700 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 06:40:10.255337 PCI: 00:0d.0 scanning...
925 06:40:10.258429 scan_static_bus for PCI: 00:0d.0
926 06:40:10.261441 USB0 port 0 enabled
927 06:40:10.261530 USB0 port 0 scanning...
928 06:40:10.265171 scan_static_bus for USB0 port 0
929 06:40:10.268058 USB3 port 0 enabled
930 06:40:10.271575 USB3 port 1 enabled
931 06:40:10.271660 USB3 port 2 disabled
932 06:40:10.275212 USB3 port 3 disabled
933 06:40:10.278301 USB3 port 0 scanning...
934 06:40:10.281712 scan_static_bus for USB3 port 0
935 06:40:10.285321 scan_static_bus for USB3 port 0 done
936 06:40:10.288293 scan_bus: bus USB3 port 0 finished in 6 msecs
937 06:40:10.291610 USB3 port 1 scanning...
938 06:40:10.294967 scan_static_bus for USB3 port 1
939 06:40:10.298307 scan_static_bus for USB3 port 1 done
940 06:40:10.304722 scan_bus: bus USB3 port 1 finished in 6 msecs
941 06:40:10.308381 scan_static_bus for USB0 port 0 done
942 06:40:10.311755 scan_bus: bus USB0 port 0 finished in 43 msecs
943 06:40:10.315198 scan_static_bus for PCI: 00:0d.0 done
944 06:40:10.321359 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 06:40:10.321468 PCI: 00:14.0 scanning...
946 06:40:10.324807 scan_static_bus for PCI: 00:14.0
947 06:40:10.328033 USB0 port 0 enabled
948 06:40:10.331274 USB0 port 0 scanning...
949 06:40:10.334717 scan_static_bus for USB0 port 0
950 06:40:10.338324 USB2 port 0 disabled
951 06:40:10.338409 USB2 port 1 enabled
952 06:40:10.341450 USB2 port 2 enabled
953 06:40:10.341532 USB2 port 3 disabled
954 06:40:10.344726 USB2 port 4 enabled
955 06:40:10.348028 USB2 port 5 disabled
956 06:40:10.348121 USB2 port 6 disabled
957 06:40:10.351436 USB2 port 7 disabled
958 06:40:10.354980 USB2 port 8 disabled
959 06:40:10.355067 USB2 port 9 disabled
960 06:40:10.358134 USB3 port 0 disabled
961 06:40:10.358221 USB3 port 1 enabled
962 06:40:10.362140 USB3 port 2 disabled
963 06:40:10.364747 USB3 port 3 disabled
964 06:40:10.368270 USB2 port 1 scanning...
965 06:40:10.371605 scan_static_bus for USB2 port 1
966 06:40:10.374883 scan_static_bus for USB2 port 1 done
967 06:40:10.378424 scan_bus: bus USB2 port 1 finished in 6 msecs
968 06:40:10.381264 USB2 port 2 scanning...
969 06:40:10.385206 scan_static_bus for USB2 port 2
970 06:40:10.388020 scan_static_bus for USB2 port 2 done
971 06:40:10.391366 scan_bus: bus USB2 port 2 finished in 6 msecs
972 06:40:10.394955 USB2 port 4 scanning...
973 06:40:10.397908 scan_static_bus for USB2 port 4
974 06:40:10.402014 scan_static_bus for USB2 port 4 done
975 06:40:10.408186 scan_bus: bus USB2 port 4 finished in 6 msecs
976 06:40:10.408305 USB3 port 1 scanning...
977 06:40:10.411139 scan_static_bus for USB3 port 1
978 06:40:10.418044 scan_static_bus for USB3 port 1 done
979 06:40:10.421275 scan_bus: bus USB3 port 1 finished in 6 msecs
980 06:40:10.424572 scan_static_bus for USB0 port 0 done
981 06:40:10.427918 scan_bus: bus USB0 port 0 finished in 93 msecs
982 06:40:10.434312 scan_static_bus for PCI: 00:14.0 done
983 06:40:10.437723 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 06:40:10.441373 PCI: 00:14.3 scanning...
985 06:40:10.444810 scan_static_bus for PCI: 00:14.3
986 06:40:10.447591 GENERIC: 0.0 enabled
987 06:40:10.451280 scan_static_bus for PCI: 00:14.3 done
988 06:40:10.454378 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 06:40:10.458130 PCI: 00:15.0 scanning...
990 06:40:10.460987 scan_static_bus for PCI: 00:15.0
991 06:40:10.464409 I2C: 00:1a enabled
992 06:40:10.464503 I2C: 00:31 enabled
993 06:40:10.467897 I2C: 00:32 enabled
994 06:40:10.470849 scan_static_bus for PCI: 00:15.0 done
995 06:40:10.474047 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 06:40:10.477723 PCI: 00:15.1 scanning...
997 06:40:10.481335 scan_static_bus for PCI: 00:15.1
998 06:40:10.484689 I2C: 00:10 enabled
999 06:40:10.488440 scan_static_bus for PCI: 00:15.1 done
1000 06:40:10.491877 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 06:40:10.495710 PCI: 00:15.2 scanning...
1002 06:40:10.498616 scan_static_bus for PCI: 00:15.2
1003 06:40:10.501887 scan_static_bus for PCI: 00:15.2 done
1004 06:40:10.505235 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 06:40:10.508551 PCI: 00:15.3 scanning...
1006 06:40:10.511872 scan_static_bus for PCI: 00:15.3
1007 06:40:10.515376 scan_static_bus for PCI: 00:15.3 done
1008 06:40:10.521691 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 06:40:10.525083 PCI: 00:19.1 scanning...
1010 06:40:10.528255 scan_static_bus for PCI: 00:19.1
1011 06:40:10.528392 I2C: 00:15 enabled
1012 06:40:10.531794 scan_static_bus for PCI: 00:19.1 done
1013 06:40:10.538685 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 06:40:10.538779 PCI: 00:1d.0 scanning...
1015 06:40:10.545250 do_pci_scan_bridge for PCI: 00:1d.0
1016 06:40:10.545338 PCI: pci_scan_bus for bus 01
1017 06:40:10.548711 PCI: 01:00.0 [1c5c/174a] enabled
1018 06:40:10.552121 GENERIC: 0.0 enabled
1019 06:40:10.555487 Enabling Common Clock Configuration
1020 06:40:10.562302 L1 Sub-State supported from root port 29
1021 06:40:10.562398 L1 Sub-State Support = 0xf
1022 06:40:10.565255 CommonModeRestoreTime = 0x28
1023 06:40:10.572063 Power On Value = 0x16, Power On Scale = 0x0
1024 06:40:10.572153 ASPM: Enabled L1
1025 06:40:10.575633 PCIe: Max_Payload_Size adjusted to 128
1026 06:40:10.582499 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 06:40:10.582596 PCI: 00:1e.2 scanning...
1028 06:40:10.589174 scan_generic_bus for PCI: 00:1e.2
1029 06:40:10.589262 SPI: 00 enabled
1030 06:40:10.595670 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 06:40:10.598919 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 06:40:10.602134 PCI: 00:1e.3 scanning...
1033 06:40:10.605852 scan_generic_bus for PCI: 00:1e.3
1034 06:40:10.608990 SPI: 00 enabled
1035 06:40:10.612177 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 06:40:10.618718 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 06:40:10.621941 PCI: 00:1f.0 scanning...
1038 06:40:10.625640 scan_static_bus for PCI: 00:1f.0
1039 06:40:10.625737 PNP: 0c09.0 enabled
1040 06:40:10.628732 PNP: 0c09.0 scanning...
1041 06:40:10.632217 scan_static_bus for PNP: 0c09.0
1042 06:40:10.636072 scan_static_bus for PNP: 0c09.0 done
1043 06:40:10.641776 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 06:40:10.645235 scan_static_bus for PCI: 00:1f.0 done
1045 06:40:10.648913 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 06:40:10.651829 PCI: 00:1f.2 scanning...
1047 06:40:10.655465 scan_static_bus for PCI: 00:1f.2
1048 06:40:10.658706 GENERIC: 0.0 enabled
1049 06:40:10.658792 GENERIC: 0.0 scanning...
1050 06:40:10.662242 scan_static_bus for GENERIC: 0.0
1051 06:40:10.665356 GENERIC: 0.0 enabled
1052 06:40:10.669257 GENERIC: 1.0 enabled
1053 06:40:10.672600 scan_static_bus for GENERIC: 0.0 done
1054 06:40:10.675721 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 06:40:10.679349 scan_static_bus for PCI: 00:1f.2 done
1056 06:40:10.685299 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 06:40:10.688903 PCI: 00:1f.3 scanning...
1058 06:40:10.692455 scan_static_bus for PCI: 00:1f.3
1059 06:40:10.695913 scan_static_bus for PCI: 00:1f.3 done
1060 06:40:10.698763 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 06:40:10.702471 PCI: 00:1f.5 scanning...
1062 06:40:10.705536 scan_generic_bus for PCI: 00:1f.5
1063 06:40:10.708650 scan_generic_bus for PCI: 00:1f.5 done
1064 06:40:10.715513 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 06:40:10.718587 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 06:40:10.721885 scan_static_bus for Root Device done
1067 06:40:10.728714 scan_bus: bus Root Device finished in 737 msecs
1068 06:40:10.728836 done
1069 06:40:10.735457 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 06:40:10.738714 Chrome EC: UHEPI supported
1071 06:40:10.744926 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 06:40:10.751639 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 06:40:10.755006 SPI flash protection: WPSW=0 SRP0=0
1074 06:40:10.758468 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 06:40:10.765333 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 06:40:10.768937 found VGA at PCI: 00:02.0
1077 06:40:10.771701 Setting up VGA for PCI: 00:02.0
1078 06:40:10.775568 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 06:40:10.781802 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 06:40:10.781911 Allocating resources...
1081 06:40:10.785013 Reading resources...
1082 06:40:10.788793 Root Device read_resources bus 0 link: 0
1083 06:40:10.795104 DOMAIN: 0000 read_resources bus 0 link: 0
1084 06:40:10.798492 PCI: 00:04.0 read_resources bus 1 link: 0
1085 06:40:10.804867 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 06:40:10.808584 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 06:40:10.814846 USB0 port 0 read_resources bus 0 link: 0
1088 06:40:10.818072 USB0 port 0 read_resources bus 0 link: 0 done
1089 06:40:10.826320 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 06:40:10.828349 PCI: 00:14.0 read_resources bus 0 link: 0
1091 06:40:10.831211 USB0 port 0 read_resources bus 0 link: 0
1092 06:40:10.838547 USB0 port 0 read_resources bus 0 link: 0 done
1093 06:40:10.842058 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 06:40:10.848709 PCI: 00:14.3 read_resources bus 0 link: 0
1095 06:40:10.852286 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 06:40:10.858911 PCI: 00:15.0 read_resources bus 0 link: 0
1097 06:40:10.862318 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 06:40:10.869011 PCI: 00:15.1 read_resources bus 0 link: 0
1099 06:40:10.872388 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 06:40:10.879145 PCI: 00:19.1 read_resources bus 0 link: 0
1101 06:40:10.883317 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 06:40:10.889612 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 06:40:10.892569 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 06:40:10.899709 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 06:40:10.902541 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 06:40:10.909771 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 06:40:10.912618 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 06:40:10.919438 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 06:40:10.922285 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 06:40:10.928748 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 06:40:10.932102 GENERIC: 0.0 read_resources bus 0 link: 0
1112 06:40:10.939351 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 06:40:10.942237 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 06:40:10.949120 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 06:40:10.952177 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 06:40:10.958576 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 06:40:10.962126 Root Device read_resources bus 0 link: 0 done
1118 06:40:10.965124 Done reading resources.
1119 06:40:10.971668 Show resources in subtree (Root Device)...After reading.
1120 06:40:10.975139 Root Device child on link 0 DOMAIN: 0000
1121 06:40:10.978579 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 06:40:10.988022 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 06:40:10.998283 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 06:40:10.998379 PCI: 00:00.0
1125 06:40:11.008417 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 06:40:11.017960 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 06:40:11.028197 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 06:40:11.038132 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 06:40:11.048274 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 06:40:11.057800 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 06:40:11.064302 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 06:40:11.074369 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 06:40:11.084303 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 06:40:11.094440 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 06:40:11.103889 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 06:40:11.114522 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 06:40:11.120577 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 06:40:11.130896 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 06:40:11.140356 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 06:40:11.150969 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 06:40:11.160763 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 06:40:11.170756 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 06:40:11.177029 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 06:40:11.187595 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 06:40:11.190673 PCI: 00:02.0
1146 06:40:11.200521 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 06:40:11.211046 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 06:40:11.221038 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 06:40:11.223999 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 06:40:11.233881 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 06:40:11.237463 GENERIC: 0.0
1152 06:40:11.237820 PCI: 00:05.0
1153 06:40:11.247547 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 06:40:11.250553 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 06:40:11.253634 GENERIC: 0.0
1156 06:40:11.253992 PCI: 00:08.0
1157 06:40:11.264173 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 06:40:11.267256 PCI: 00:0a.0
1159 06:40:11.270027 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 06:40:11.280689 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 06:40:11.286848 USB0 port 0 child on link 0 USB3 port 0
1162 06:40:11.287223 USB3 port 0
1163 06:40:11.290933 USB3 port 1
1164 06:40:11.291291 USB3 port 2
1165 06:40:11.293856 USB3 port 3
1166 06:40:11.296963 PCI: 00:14.0 child on link 0 USB0 port 0
1167 06:40:11.306916 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 06:40:11.310519 USB0 port 0 child on link 0 USB2 port 0
1169 06:40:11.313482 USB2 port 0
1170 06:40:11.317387 USB2 port 1
1171 06:40:11.317742 USB2 port 2
1172 06:40:11.320276 USB2 port 3
1173 06:40:11.320648 USB2 port 4
1174 06:40:11.323998 USB2 port 5
1175 06:40:11.324421 USB2 port 6
1176 06:40:11.326780 USB2 port 7
1177 06:40:11.327165 USB2 port 8
1178 06:40:11.330228 USB2 port 9
1179 06:40:11.330582 USB3 port 0
1180 06:40:11.334004 USB3 port 1
1181 06:40:11.334373 USB3 port 2
1182 06:40:11.337009 USB3 port 3
1183 06:40:11.337363 PCI: 00:14.2
1184 06:40:11.346854 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 06:40:11.356988 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 06:40:11.363919 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 06:40:11.373402 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 06:40:11.373776 GENERIC: 0.0
1189 06:40:11.380581 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 06:40:11.389711 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 06:40:11.390086 I2C: 00:1a
1192 06:40:11.393321 I2C: 00:31
1193 06:40:11.393838 I2C: 00:32
1194 06:40:11.396827 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 06:40:11.406695 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 06:40:11.410363 I2C: 00:10
1197 06:40:11.410717 PCI: 00:15.2
1198 06:40:11.420659 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 06:40:11.423024 PCI: 00:15.3
1200 06:40:11.433347 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 06:40:11.433962 PCI: 00:16.0
1202 06:40:11.443045 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 06:40:11.446910 PCI: 00:19.0
1204 06:40:11.450836 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 06:40:11.459827 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 06:40:11.460308 I2C: 00:15
1207 06:40:11.466620 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 06:40:11.472862 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 06:40:11.483211 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 06:40:11.492920 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 06:40:11.496645 GENERIC: 0.0
1212 06:40:11.497081 PCI: 01:00.0
1213 06:40:11.506598 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 06:40:11.515930 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 06:40:11.526288 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 06:40:11.526816 PCI: 00:1e.0
1217 06:40:11.539857 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 06:40:11.542937 PCI: 00:1e.2 child on link 0 SPI: 00
1219 06:40:11.552510 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 06:40:11.553039 SPI: 00
1221 06:40:11.556132 PCI: 00:1e.3 child on link 0 SPI: 00
1222 06:40:11.566166 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 06:40:11.569272 SPI: 00
1224 06:40:11.572528 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 06:40:11.582441 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 06:40:11.582806 PNP: 0c09.0
1227 06:40:11.592635 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 06:40:11.595985 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 06:40:11.605547 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 06:40:11.615739 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 06:40:11.619429 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 06:40:11.623140 GENERIC: 0.0
1233 06:40:11.623494 GENERIC: 1.0
1234 06:40:11.625534 PCI: 00:1f.3
1235 06:40:11.635620 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 06:40:11.645726 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 06:40:11.648745 PCI: 00:1f.5
1238 06:40:11.655550 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 06:40:11.662197 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 06:40:11.662568 APIC: 00
1241 06:40:11.662853 APIC: 01
1242 06:40:11.666054 APIC: 05
1243 06:40:11.666408 APIC: 07
1244 06:40:11.666694 APIC: 02
1245 06:40:11.669299 APIC: 04
1246 06:40:11.669653 APIC: 06
1247 06:40:11.672459 APIC: 03
1248 06:40:11.679049 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 06:40:11.685252 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 06:40:11.692143 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 06:40:11.695820 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 06:40:11.702175 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 06:40:11.705309 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 06:40:11.708957 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 06:40:11.715203 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 06:40:11.725504 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 06:40:11.732019 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 06:40:11.738571 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 06:40:11.744830 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 06:40:11.751528 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 06:40:11.758052 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 06:40:11.768204 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 06:40:11.771671 DOMAIN: 0000: Resource ranges:
1264 06:40:11.775044 * Base: 1000, Size: 800, Tag: 100
1265 06:40:11.778087 * Base: 1900, Size: e700, Tag: 100
1266 06:40:11.781354 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 06:40:11.787835 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 06:40:11.798011 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 06:40:11.805089 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 06:40:11.811409 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 06:40:11.821235 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 06:40:11.827949 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 06:40:11.834206 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 06:40:11.841152 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 06:40:11.851148 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 06:40:11.857463 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 06:40:11.864726 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 06:40:11.874059 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 06:40:11.880985 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 06:40:11.887789 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 06:40:11.897639 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 06:40:11.904276 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 06:40:11.910392 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 06:40:11.920932 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 06:40:11.927155 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 06:40:11.934410 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 06:40:11.943607 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 06:40:11.950514 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 06:40:11.956858 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 06:40:11.966946 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 06:40:11.971009 DOMAIN: 0000: Resource ranges:
1292 06:40:11.973585 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 06:40:11.977179 * Base: d0000000, Size: 28000000, Tag: 200
1294 06:40:11.983634 * Base: fa000000, Size: 1000000, Tag: 200
1295 06:40:11.986902 * Base: fb001000, Size: 2fff000, Tag: 200
1296 06:40:11.990145 * Base: fe010000, Size: 2e000, Tag: 200
1297 06:40:11.993718 * Base: fe03f000, Size: d41000, Tag: 200
1298 06:40:12.000526 * Base: fed88000, Size: 8000, Tag: 200
1299 06:40:12.004535 * Base: fed93000, Size: d000, Tag: 200
1300 06:40:12.007073 * Base: feda2000, Size: 1e000, Tag: 200
1301 06:40:12.010441 * Base: fede0000, Size: 1220000, Tag: 200
1302 06:40:12.016844 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 06:40:12.023742 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 06:40:12.030064 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 06:40:12.036790 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 06:40:12.043387 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 06:40:12.050482 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 06:40:12.057217 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 06:40:12.063992 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 06:40:12.070160 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 06:40:12.076772 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 06:40:12.083310 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 06:40:12.089974 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 06:40:12.096247 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 06:40:12.103043 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 06:40:12.109603 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 06:40:12.116176 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 06:40:12.123484 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 06:40:12.129632 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 06:40:12.136147 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 06:40:12.142669 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 06:40:12.150411 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 06:40:12.156242 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 06:40:12.162690 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 06:40:12.169272 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 06:40:12.179759 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 06:40:12.182498 PCI: 00:1d.0: Resource ranges:
1328 06:40:12.185839 * Base: 7fc00000, Size: 100000, Tag: 200
1329 06:40:12.192826 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 06:40:12.199737 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 06:40:12.205770 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 06:40:12.212882 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 06:40:12.222537 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 06:40:12.226573 Root Device assign_resources, bus 0 link: 0
1335 06:40:12.229393 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 06:40:12.239439 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 06:40:12.245822 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 06:40:12.255916 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 06:40:12.262518 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 06:40:12.269014 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 06:40:12.272358 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 06:40:12.278950 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 06:40:12.289521 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 06:40:12.295524 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 06:40:12.302273 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 06:40:12.305882 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 06:40:12.315170 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 06:40:12.318616 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 06:40:12.321757 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 06:40:12.331928 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 06:40:12.339594 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 06:40:12.348612 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 06:40:12.351685 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 06:40:12.358684 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 06:40:12.364963 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 06:40:12.368362 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 06:40:12.375142 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 06:40:12.382087 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 06:40:12.388551 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 06:40:12.391874 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 06:40:12.401470 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 06:40:12.408196 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 06:40:12.418290 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 06:40:12.425319 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 06:40:12.428374 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 06:40:12.435248 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 06:40:12.441566 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 06:40:12.452050 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 06:40:12.461804 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 06:40:12.465073 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 06:40:12.474861 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 06:40:12.481467 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 06:40:12.491424 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 06:40:12.494528 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 06:40:12.504693 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 06:40:12.507822 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 06:40:12.511307 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 06:40:12.521202 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 06:40:12.524266 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 06:40:12.530926 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 06:40:12.534334 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 06:40:12.540725 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 06:40:12.543951 LPC: Trying to open IO window from 800 size 1ff
1384 06:40:12.554544 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 06:40:12.560649 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 06:40:12.567672 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 06:40:12.574291 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 06:40:12.577601 Root Device assign_resources, bus 0 link: 0
1389 06:40:12.580893 Done setting resources.
1390 06:40:12.587009 Show resources in subtree (Root Device)...After assigning values.
1391 06:40:12.590561 Root Device child on link 0 DOMAIN: 0000
1392 06:40:12.597145 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 06:40:12.603870 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 06:40:12.614192 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 06:40:12.617532 PCI: 00:00.0
1396 06:40:12.627082 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 06:40:12.637558 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 06:40:12.643765 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 06:40:12.653846 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 06:40:12.664283 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 06:40:12.673685 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 06:40:12.683372 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 06:40:12.693769 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 06:40:12.700013 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 06:40:12.710084 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 06:40:12.720296 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 06:40:12.730210 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 06:40:12.740674 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 06:40:12.746560 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 06:40:12.756839 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 06:40:12.766785 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 06:40:12.776388 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 06:40:12.786488 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 06:40:12.796579 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 06:40:12.806410 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 06:40:12.806713 PCI: 00:02.0
1417 06:40:12.816823 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 06:40:12.829972 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 06:40:12.836156 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 06:40:12.843451 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 06:40:12.852844 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 06:40:12.853271 GENERIC: 0.0
1423 06:40:12.856349 PCI: 00:05.0
1424 06:40:12.866521 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 06:40:12.869653 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 06:40:12.872990 GENERIC: 0.0
1427 06:40:12.873410 PCI: 00:08.0
1428 06:40:12.886258 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 06:40:12.886926 PCI: 00:0a.0
1430 06:40:12.889547 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 06:40:12.903167 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 06:40:12.906829 USB0 port 0 child on link 0 USB3 port 0
1433 06:40:12.907295 USB3 port 0
1434 06:40:12.910005 USB3 port 1
1435 06:40:12.910509 USB3 port 2
1436 06:40:12.912565 USB3 port 3
1437 06:40:12.915960 PCI: 00:14.0 child on link 0 USB0 port 0
1438 06:40:12.925892 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 06:40:12.933697 USB0 port 0 child on link 0 USB2 port 0
1440 06:40:12.934141 USB2 port 0
1441 06:40:12.935985 USB2 port 1
1442 06:40:12.936631 USB2 port 2
1443 06:40:12.939527 USB2 port 3
1444 06:40:12.940041 USB2 port 4
1445 06:40:12.943533 USB2 port 5
1446 06:40:12.944178 USB2 port 6
1447 06:40:12.946207 USB2 port 7
1448 06:40:12.946690 USB2 port 8
1449 06:40:12.949771 USB2 port 9
1450 06:40:12.952719 USB3 port 0
1451 06:40:12.953233 USB3 port 1
1452 06:40:12.955894 USB3 port 2
1453 06:40:12.956526 USB3 port 3
1454 06:40:12.959574 PCI: 00:14.2
1455 06:40:12.969495 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 06:40:12.979828 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 06:40:12.982921 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 06:40:12.992306 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 06:40:12.995856 GENERIC: 0.0
1460 06:40:12.999306 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 06:40:13.009198 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 06:40:13.012599 I2C: 00:1a
1463 06:40:13.013060 I2C: 00:31
1464 06:40:13.016422 I2C: 00:32
1465 06:40:13.019348 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 06:40:13.029410 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 06:40:13.032535 I2C: 00:10
1468 06:40:13.033074 PCI: 00:15.2
1469 06:40:13.043304 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 06:40:13.045701 PCI: 00:15.3
1471 06:40:13.055838 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 06:40:13.056408 PCI: 00:16.0
1473 06:40:13.065486 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 06:40:13.068789 PCI: 00:19.0
1475 06:40:13.072174 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 06:40:13.082740 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 06:40:13.086016 I2C: 00:15
1478 06:40:13.088808 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 06:40:13.098907 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 06:40:13.109036 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 06:40:13.122264 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 06:40:13.122790 GENERIC: 0.0
1483 06:40:13.125366 PCI: 01:00.0
1484 06:40:13.135698 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 06:40:13.145363 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 06:40:13.155334 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 06:40:13.158525 PCI: 00:1e.0
1488 06:40:13.168672 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 06:40:13.172008 PCI: 00:1e.2 child on link 0 SPI: 00
1490 06:40:13.181808 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 06:40:13.185309 SPI: 00
1492 06:40:13.188449 PCI: 00:1e.3 child on link 0 SPI: 00
1493 06:40:13.199003 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 06:40:13.199420 SPI: 00
1495 06:40:13.204889 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 06:40:13.212157 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 06:40:13.215104 PNP: 0c09.0
1498 06:40:13.221713 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 06:40:13.228471 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 06:40:13.238511 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 06:40:13.244592 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 06:40:13.251505 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 06:40:13.251825 GENERIC: 0.0
1504 06:40:13.254628 GENERIC: 1.0
1505 06:40:13.254961 PCI: 00:1f.3
1506 06:40:13.268428 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 06:40:13.278213 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 06:40:13.278540 PCI: 00:1f.5
1509 06:40:13.287714 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 06:40:13.294193 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 06:40:13.294274 APIC: 00
1512 06:40:13.294338 APIC: 01
1513 06:40:13.297826 APIC: 05
1514 06:40:13.297905 APIC: 07
1515 06:40:13.301210 APIC: 02
1516 06:40:13.301290 APIC: 04
1517 06:40:13.301355 APIC: 06
1518 06:40:13.305222 APIC: 03
1519 06:40:13.307760 Done allocating resources.
1520 06:40:13.310833 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 06:40:13.317642 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 06:40:13.320957 Configure GPIOs for I2S audio on UP4.
1523 06:40:13.328460 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 06:40:13.331825 Enabling resources...
1525 06:40:13.335289 PCI: 00:00.0 subsystem <- 8086/9a12
1526 06:40:13.338415 PCI: 00:00.0 cmd <- 06
1527 06:40:13.341710 PCI: 00:02.0 subsystem <- 8086/9a40
1528 06:40:13.345838 PCI: 00:02.0 cmd <- 03
1529 06:40:13.348786 PCI: 00:04.0 subsystem <- 8086/9a03
1530 06:40:13.349217 PCI: 00:04.0 cmd <- 02
1531 06:40:13.355772 PCI: 00:05.0 subsystem <- 8086/9a19
1532 06:40:13.356236 PCI: 00:05.0 cmd <- 02
1533 06:40:13.359069 PCI: 00:08.0 subsystem <- 8086/9a11
1534 06:40:13.362277 PCI: 00:08.0 cmd <- 06
1535 06:40:13.365325 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 06:40:13.368647 PCI: 00:0d.0 cmd <- 02
1537 06:40:13.372707 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 06:40:13.375792 PCI: 00:14.0 cmd <- 02
1539 06:40:13.378850 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 06:40:13.382116 PCI: 00:14.2 cmd <- 02
1541 06:40:13.385892 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 06:40:13.388719 PCI: 00:14.3 cmd <- 02
1543 06:40:13.392023 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 06:40:13.395258 PCI: 00:15.0 cmd <- 02
1545 06:40:13.398777 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 06:40:13.399193 PCI: 00:15.1 cmd <- 02
1547 06:40:13.405130 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 06:40:13.405543 PCI: 00:15.2 cmd <- 02
1549 06:40:13.408579 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 06:40:13.412105 PCI: 00:15.3 cmd <- 02
1551 06:40:13.415559 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 06:40:13.418379 PCI: 00:16.0 cmd <- 02
1553 06:40:13.422137 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 06:40:13.425707 PCI: 00:19.1 cmd <- 02
1555 06:40:13.428332 PCI: 00:1d.0 bridge ctrl <- 0013
1556 06:40:13.431781 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 06:40:13.435057 PCI: 00:1d.0 cmd <- 06
1558 06:40:13.438131 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 06:40:13.441409 PCI: 00:1e.0 cmd <- 06
1560 06:40:13.445396 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 06:40:13.448688 PCI: 00:1e.2 cmd <- 06
1562 06:40:13.451642 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 06:40:13.452096 PCI: 00:1e.3 cmd <- 02
1564 06:40:13.458335 PCI: 00:1f.0 subsystem <- 8086/a087
1565 06:40:13.458416 PCI: 00:1f.0 cmd <- 407
1566 06:40:13.461469 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 06:40:13.464548 PCI: 00:1f.3 cmd <- 02
1568 06:40:13.468238 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 06:40:13.471370 PCI: 00:1f.5 cmd <- 406
1570 06:40:13.475726 PCI: 01:00.0 cmd <- 02
1571 06:40:13.480450 done.
1572 06:40:13.483532 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 06:40:13.487077 Initializing devices...
1574 06:40:13.490274 Root Device init
1575 06:40:13.493215 Chrome EC: Set SMI mask to 0x0000000000000000
1576 06:40:13.501057 Chrome EC: clear events_b mask to 0x0000000000000000
1577 06:40:13.506605 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 06:40:13.513566 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 06:40:13.516546 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 06:40:13.523644 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 06:40:13.530123 fw_config match found: DB_USB=USB3_ACTIVE
1582 06:40:13.533496 Configure Right Type-C port orientation for retimer
1583 06:40:13.536440 Root Device init finished in 44 msecs
1584 06:40:13.540582 PCI: 00:00.0 init
1585 06:40:13.543637 CPU TDP = 9 Watts
1586 06:40:13.543778 CPU PL1 = 9 Watts
1587 06:40:13.547182 CPU PL2 = 40 Watts
1588 06:40:13.550329 CPU PL4 = 83 Watts
1589 06:40:13.553945 PCI: 00:00.0 init finished in 8 msecs
1590 06:40:13.554123 PCI: 00:02.0 init
1591 06:40:13.557508 GMA: Found VBT in CBFS
1592 06:40:13.560619 GMA: Found valid VBT in CBFS
1593 06:40:13.567106 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 06:40:13.574377 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 06:40:13.577377 PCI: 00:02.0 init finished in 18 msecs
1596 06:40:13.580628 PCI: 00:05.0 init
1597 06:40:13.584018 PCI: 00:05.0 init finished in 0 msecs
1598 06:40:13.587025 PCI: 00:08.0 init
1599 06:40:13.590394 PCI: 00:08.0 init finished in 0 msecs
1600 06:40:13.594328 PCI: 00:14.0 init
1601 06:40:13.597394 PCI: 00:14.0 init finished in 0 msecs
1602 06:40:13.600445 PCI: 00:14.2 init
1603 06:40:13.604152 PCI: 00:14.2 init finished in 0 msecs
1604 06:40:13.607687 PCI: 00:15.0 init
1605 06:40:13.608039 I2C bus 0 version 0x3230302a
1606 06:40:13.614018 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 06:40:13.616906 PCI: 00:15.0 init finished in 6 msecs
1608 06:40:13.617198 PCI: 00:15.1 init
1609 06:40:13.620293 I2C bus 1 version 0x3230302a
1610 06:40:13.623710 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 06:40:13.630012 PCI: 00:15.1 init finished in 6 msecs
1612 06:40:13.630308 PCI: 00:15.2 init
1613 06:40:13.633543 I2C bus 2 version 0x3230302a
1614 06:40:13.636879 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 06:40:13.640441 PCI: 00:15.2 init finished in 6 msecs
1616 06:40:13.643576 PCI: 00:15.3 init
1617 06:40:13.646696 I2C bus 3 version 0x3230302a
1618 06:40:13.650115 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 06:40:13.653191 PCI: 00:15.3 init finished in 6 msecs
1620 06:40:13.657066 PCI: 00:16.0 init
1621 06:40:13.660073 PCI: 00:16.0 init finished in 0 msecs
1622 06:40:13.663500 PCI: 00:19.1 init
1623 06:40:13.666587 I2C bus 5 version 0x3230302a
1624 06:40:13.669732 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 06:40:13.673087 PCI: 00:19.1 init finished in 6 msecs
1626 06:40:13.676726 PCI: 00:1d.0 init
1627 06:40:13.677124 Initializing PCH PCIe bridge.
1628 06:40:13.683108 PCI: 00:1d.0 init finished in 3 msecs
1629 06:40:13.686821 PCI: 00:1f.0 init
1630 06:40:13.690493 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 06:40:13.692995 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 06:40:13.696353 IOAPIC: ID = 0x02
1633 06:40:13.700090 IOAPIC: Dumping registers
1634 06:40:13.700390 reg 0x0000: 0x02000000
1635 06:40:13.703317 reg 0x0001: 0x00770020
1636 06:40:13.707189 reg 0x0002: 0x00000000
1637 06:40:13.709754 PCI: 00:1f.0 init finished in 21 msecs
1638 06:40:13.713100 PCI: 00:1f.2 init
1639 06:40:13.716555 Disabling ACPI via APMC.
1640 06:40:13.716636 APMC done.
1641 06:40:13.719881 PCI: 00:1f.2 init finished in 5 msecs
1642 06:40:13.732929 PCI: 01:00.0 init
1643 06:40:13.736486 PCI: 01:00.0 init finished in 0 msecs
1644 06:40:13.739732 PNP: 0c09.0 init
1645 06:40:13.742834 Google Chrome EC uptime: 8.396 seconds
1646 06:40:13.750119 Google Chrome AP resets since EC boot: 1
1647 06:40:13.753731 Google Chrome most recent AP reset causes:
1648 06:40:13.756428 0.349: 32775 shutdown: entering G3
1649 06:40:13.763352 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 06:40:13.766581 PNP: 0c09.0 init finished in 22 msecs
1651 06:40:13.772130 Devices initialized
1652 06:40:13.775910 Show all devs... After init.
1653 06:40:13.778859 Root Device: enabled 1
1654 06:40:13.779274 DOMAIN: 0000: enabled 1
1655 06:40:13.781999 CPU_CLUSTER: 0: enabled 1
1656 06:40:13.785298 PCI: 00:00.0: enabled 1
1657 06:40:13.788866 PCI: 00:02.0: enabled 1
1658 06:40:13.789347 PCI: 00:04.0: enabled 1
1659 06:40:13.792953 PCI: 00:05.0: enabled 1
1660 06:40:13.795774 PCI: 00:06.0: enabled 0
1661 06:40:13.799385 PCI: 00:07.0: enabled 0
1662 06:40:13.799900 PCI: 00:07.1: enabled 0
1663 06:40:13.802324 PCI: 00:07.2: enabled 0
1664 06:40:13.806001 PCI: 00:07.3: enabled 0
1665 06:40:13.808933 PCI: 00:08.0: enabled 1
1666 06:40:13.809472 PCI: 00:09.0: enabled 0
1667 06:40:13.812295 PCI: 00:0a.0: enabled 0
1668 06:40:13.815785 PCI: 00:0d.0: enabled 1
1669 06:40:13.816313 PCI: 00:0d.1: enabled 0
1670 06:40:13.818765 PCI: 00:0d.2: enabled 0
1671 06:40:13.822213 PCI: 00:0d.3: enabled 0
1672 06:40:13.825144 PCI: 00:0e.0: enabled 0
1673 06:40:13.825605 PCI: 00:10.2: enabled 1
1674 06:40:13.828469 PCI: 00:10.6: enabled 0
1675 06:40:13.832014 PCI: 00:10.7: enabled 0
1676 06:40:13.835720 PCI: 00:12.0: enabled 0
1677 06:40:13.836232 PCI: 00:12.6: enabled 0
1678 06:40:13.838550 PCI: 00:13.0: enabled 0
1679 06:40:13.841939 PCI: 00:14.0: enabled 1
1680 06:40:13.845025 PCI: 00:14.1: enabled 0
1681 06:40:13.845319 PCI: 00:14.2: enabled 1
1682 06:40:13.848465 PCI: 00:14.3: enabled 1
1683 06:40:13.851635 PCI: 00:15.0: enabled 1
1684 06:40:13.855305 PCI: 00:15.1: enabled 1
1685 06:40:13.855695 PCI: 00:15.2: enabled 1
1686 06:40:13.858455 PCI: 00:15.3: enabled 1
1687 06:40:13.861392 PCI: 00:16.0: enabled 1
1688 06:40:13.864859 PCI: 00:16.1: enabled 0
1689 06:40:13.865287 PCI: 00:16.2: enabled 0
1690 06:40:13.868635 PCI: 00:16.3: enabled 0
1691 06:40:13.871864 PCI: 00:16.4: enabled 0
1692 06:40:13.872235 PCI: 00:16.5: enabled 0
1693 06:40:13.874821 PCI: 00:17.0: enabled 0
1694 06:40:13.878132 PCI: 00:19.0: enabled 0
1695 06:40:13.881752 PCI: 00:19.1: enabled 1
1696 06:40:13.882046 PCI: 00:19.2: enabled 0
1697 06:40:13.884908 PCI: 00:1c.0: enabled 1
1698 06:40:13.888432 PCI: 00:1c.1: enabled 0
1699 06:40:13.891808 PCI: 00:1c.2: enabled 0
1700 06:40:13.892229 PCI: 00:1c.3: enabled 0
1701 06:40:13.895014 PCI: 00:1c.4: enabled 0
1702 06:40:13.898573 PCI: 00:1c.5: enabled 0
1703 06:40:13.901829 PCI: 00:1c.6: enabled 1
1704 06:40:13.902158 PCI: 00:1c.7: enabled 0
1705 06:40:13.904881 PCI: 00:1d.0: enabled 1
1706 06:40:13.907877 PCI: 00:1d.1: enabled 0
1707 06:40:13.908173 PCI: 00:1d.2: enabled 1
1708 06:40:13.911426 PCI: 00:1d.3: enabled 0
1709 06:40:13.914696 PCI: 00:1e.0: enabled 1
1710 06:40:13.918325 PCI: 00:1e.1: enabled 0
1711 06:40:13.918679 PCI: 00:1e.2: enabled 1
1712 06:40:13.921694 PCI: 00:1e.3: enabled 1
1713 06:40:13.924540 PCI: 00:1f.0: enabled 1
1714 06:40:13.928028 PCI: 00:1f.1: enabled 0
1715 06:40:13.928376 PCI: 00:1f.2: enabled 1
1716 06:40:13.930972 PCI: 00:1f.3: enabled 1
1717 06:40:13.934758 PCI: 00:1f.4: enabled 0
1718 06:40:13.938909 PCI: 00:1f.5: enabled 1
1719 06:40:13.939404 PCI: 00:1f.6: enabled 0
1720 06:40:13.941189 PCI: 00:1f.7: enabled 0
1721 06:40:13.944315 APIC: 00: enabled 1
1722 06:40:13.944641 GENERIC: 0.0: enabled 1
1723 06:40:13.947532 GENERIC: 0.0: enabled 1
1724 06:40:13.951258 GENERIC: 1.0: enabled 1
1725 06:40:13.954563 GENERIC: 0.0: enabled 1
1726 06:40:13.954859 GENERIC: 1.0: enabled 1
1727 06:40:13.957889 USB0 port 0: enabled 1
1728 06:40:13.960934 GENERIC: 0.0: enabled 1
1729 06:40:13.964188 USB0 port 0: enabled 1
1730 06:40:13.964500 GENERIC: 0.0: enabled 1
1731 06:40:13.968623 I2C: 00:1a: enabled 1
1732 06:40:13.971132 I2C: 00:31: enabled 1
1733 06:40:13.971458 I2C: 00:32: enabled 1
1734 06:40:13.974065 I2C: 00:10: enabled 1
1735 06:40:13.977643 I2C: 00:15: enabled 1
1736 06:40:13.977996 GENERIC: 0.0: enabled 0
1737 06:40:13.981040 GENERIC: 1.0: enabled 0
1738 06:40:13.984081 GENERIC: 0.0: enabled 1
1739 06:40:13.984432 SPI: 00: enabled 1
1740 06:40:13.987528 SPI: 00: enabled 1
1741 06:40:13.991207 PNP: 0c09.0: enabled 1
1742 06:40:13.991616 GENERIC: 0.0: enabled 1
1743 06:40:13.994561 USB3 port 0: enabled 1
1744 06:40:13.997397 USB3 port 1: enabled 1
1745 06:40:14.000732 USB3 port 2: enabled 0
1746 06:40:14.001073 USB3 port 3: enabled 0
1747 06:40:14.004493 USB2 port 0: enabled 0
1748 06:40:14.007507 USB2 port 1: enabled 1
1749 06:40:14.007892 USB2 port 2: enabled 1
1750 06:40:14.011032 USB2 port 3: enabled 0
1751 06:40:14.014258 USB2 port 4: enabled 1
1752 06:40:14.017230 USB2 port 5: enabled 0
1753 06:40:14.017573 USB2 port 6: enabled 0
1754 06:40:14.020745 USB2 port 7: enabled 0
1755 06:40:14.025128 USB2 port 8: enabled 0
1756 06:40:14.025482 USB2 port 9: enabled 0
1757 06:40:14.027691 USB3 port 0: enabled 0
1758 06:40:14.030619 USB3 port 1: enabled 1
1759 06:40:14.034737 USB3 port 2: enabled 0
1760 06:40:14.035076 USB3 port 3: enabled 0
1761 06:40:14.037462 GENERIC: 0.0: enabled 1
1762 06:40:14.040581 GENERIC: 1.0: enabled 1
1763 06:40:14.040912 APIC: 01: enabled 1
1764 06:40:14.044751 APIC: 05: enabled 1
1765 06:40:14.047537 APIC: 07: enabled 1
1766 06:40:14.047934 APIC: 02: enabled 1
1767 06:40:14.050536 APIC: 04: enabled 1
1768 06:40:14.050934 APIC: 06: enabled 1
1769 06:40:14.053686 APIC: 03: enabled 1
1770 06:40:14.057200 PCI: 01:00.0: enabled 1
1771 06:40:14.061128 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1772 06:40:14.067699 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 06:40:14.070989 ELOG: NV offset 0xf30000 size 0x1000
1774 06:40:14.077203 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 06:40:14.084108 ELOG: Event(17) added with size 13 at 2023-12-11 06:40:14 UTC
1776 06:40:14.090513 ELOG: Event(92) added with size 9 at 2023-12-11 06:40:14 UTC
1777 06:40:14.097290 ELOG: Event(93) added with size 9 at 2023-12-11 06:40:14 UTC
1778 06:40:14.104117 ELOG: Event(9E) added with size 10 at 2023-12-11 06:40:14 UTC
1779 06:40:14.110504 ELOG: Event(9F) added with size 14 at 2023-12-11 06:40:14 UTC
1780 06:40:14.116930 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 06:40:14.123419 ELOG: Event(A1) added with size 10 at 2023-12-11 06:40:14 UTC
1782 06:40:14.130351 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1783 06:40:14.136756 ELOG: Event(A0) added with size 9 at 2023-12-11 06:40:14 UTC
1784 06:40:14.140004 elog_add_boot_reason: Logged dev mode boot
1785 06:40:14.147446 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1786 06:40:14.147593 Finalize devices...
1787 06:40:14.149646 Devices finalized
1788 06:40:14.156268 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1789 06:40:14.159929 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1790 06:40:14.166633 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1791 06:40:14.169667 ME: HFSTS1 : 0x80030055
1792 06:40:14.176540 ME: HFSTS2 : 0x30280116
1793 06:40:14.179689 ME: HFSTS3 : 0x00000050
1794 06:40:14.183364 ME: HFSTS4 : 0x00004000
1795 06:40:14.189776 ME: HFSTS5 : 0x00000000
1796 06:40:14.193290 ME: HFSTS6 : 0x00400006
1797 06:40:14.196556 ME: Manufacturing Mode : YES
1798 06:40:14.199995 ME: SPI Protection Mode Enabled : NO
1799 06:40:14.206448 ME: FW Partition Table : OK
1800 06:40:14.209801 ME: Bringup Loader Failure : NO
1801 06:40:14.212948 ME: Firmware Init Complete : NO
1802 06:40:14.216302 ME: Boot Options Present : NO
1803 06:40:14.220166 ME: Update In Progress : NO
1804 06:40:14.223106 ME: D0i3 Support : YES
1805 06:40:14.226235 ME: Low Power State Enabled : NO
1806 06:40:14.229638 ME: CPU Replaced : YES
1807 06:40:14.235996 ME: CPU Replacement Valid : YES
1808 06:40:14.239461 ME: Current Working State : 5
1809 06:40:14.242683 ME: Current Operation State : 1
1810 06:40:14.245921 ME: Current Operation Mode : 3
1811 06:40:14.249401 ME: Error Code : 0
1812 06:40:14.253497 ME: Enhanced Debug Mode : NO
1813 06:40:14.256580 ME: CPU Debug Disabled : YES
1814 06:40:14.259288 ME: TXT Support : NO
1815 06:40:14.265726 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1816 06:40:14.272563 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1817 06:40:14.275637 CBFS: 'fallback/slic' not found.
1818 06:40:14.282563 ACPI: Writing ACPI tables at 76b01000.
1819 06:40:14.282766 ACPI: * FACS
1820 06:40:14.286020 ACPI: * DSDT
1821 06:40:14.289305 Ramoops buffer: 0x100000@0x76a00000.
1822 06:40:14.292823 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1823 06:40:14.299405 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1824 06:40:14.302564 Google Chrome EC: version:
1825 06:40:14.306207 ro: voema_v2.0.7540-147f8d37d1
1826 06:40:14.309059 rw: voema_v2.0.7540-147f8d37d1
1827 06:40:14.309494 running image: 2
1828 06:40:14.315779 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1829 06:40:14.319998 ACPI: * FADT
1830 06:40:14.320500 SCI is IRQ9
1831 06:40:14.326702 ACPI: added table 1/32, length now 40
1832 06:40:14.327143 ACPI: * SSDT
1833 06:40:14.330278 Found 1 CPU(s) with 8 core(s) each.
1834 06:40:14.336539 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1835 06:40:14.340017 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1836 06:40:14.343498 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1837 06:40:14.346596 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1838 06:40:14.353830 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1839 06:40:14.359687 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1840 06:40:14.363222 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1841 06:40:14.369739 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1842 06:40:14.376628 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1843 06:40:14.380672 \_SB.PCI0.RP09: Added StorageD3Enable property
1844 06:40:14.382904 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1845 06:40:14.389408 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1846 06:40:14.396469 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1847 06:40:14.399813 PS2K: Passing 80 keymaps to kernel
1848 06:40:14.405873 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1849 06:40:14.412478 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1850 06:40:14.419532 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1851 06:40:14.427304 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1852 06:40:14.432459 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1853 06:40:14.439378 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1854 06:40:14.446286 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1855 06:40:14.452498 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1856 06:40:14.455700 ACPI: added table 2/32, length now 44
1857 06:40:14.455808 ACPI: * MCFG
1858 06:40:14.459560 ACPI: added table 3/32, length now 48
1859 06:40:14.462598 ACPI: * TPM2
1860 06:40:14.465748 TPM2 log created at 0x769f0000
1861 06:40:14.469098 ACPI: added table 4/32, length now 52
1862 06:40:14.472600 ACPI: * MADT
1863 06:40:14.472708 SCI is IRQ9
1864 06:40:14.475754 ACPI: added table 5/32, length now 56
1865 06:40:14.478922 current = 76b09850
1866 06:40:14.479000 ACPI: * DMAR
1867 06:40:14.482501 ACPI: added table 6/32, length now 60
1868 06:40:14.485557 ACPI: added table 7/32, length now 64
1869 06:40:14.489124 ACPI: * HPET
1870 06:40:14.492729 ACPI: added table 8/32, length now 68
1871 06:40:14.495649 ACPI: done.
1872 06:40:14.495742 ACPI tables: 35216 bytes.
1873 06:40:14.498999 smbios_write_tables: 769ef000
1874 06:40:14.502796 EC returned error result code 3
1875 06:40:14.506043 Couldn't obtain OEM name from CBI
1876 06:40:14.509750 Create SMBIOS type 16
1877 06:40:14.513153 Create SMBIOS type 17
1878 06:40:14.516572 GENERIC: 0.0 (WIFI Device)
1879 06:40:14.516654 SMBIOS tables: 1750 bytes.
1880 06:40:14.523450 Writing table forward entry at 0x00000500
1881 06:40:14.530107 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1882 06:40:14.533169 Writing coreboot table at 0x76b25000
1883 06:40:14.539735 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1884 06:40:14.544055 1. 0000000000001000-000000000009ffff: RAM
1885 06:40:14.546576 2. 00000000000a0000-00000000000fffff: RESERVED
1886 06:40:14.553321 3. 0000000000100000-00000000769eefff: RAM
1887 06:40:14.556291 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1888 06:40:14.562876 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1889 06:40:14.569865 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1890 06:40:14.573107 7. 0000000077000000-000000007fbfffff: RESERVED
1891 06:40:14.576530 8. 00000000c0000000-00000000cfffffff: RESERVED
1892 06:40:14.583678 9. 00000000f8000000-00000000f9ffffff: RESERVED
1893 06:40:14.586191 10. 00000000fb000000-00000000fb000fff: RESERVED
1894 06:40:14.592861 11. 00000000fe000000-00000000fe00ffff: RESERVED
1895 06:40:14.596350 12. 00000000fed80000-00000000fed87fff: RESERVED
1896 06:40:14.602521 13. 00000000fed90000-00000000fed92fff: RESERVED
1897 06:40:14.606342 14. 00000000feda0000-00000000feda1fff: RESERVED
1898 06:40:14.612872 15. 00000000fedc0000-00000000feddffff: RESERVED
1899 06:40:14.616045 16. 0000000100000000-00000002803fffff: RAM
1900 06:40:14.619562 Passing 4 GPIOs to payload:
1901 06:40:14.623619 NAME | PORT | POLARITY | VALUE
1902 06:40:14.629546 lid | undefined | high | high
1903 06:40:14.632729 power | undefined | high | low
1904 06:40:14.639749 oprom | undefined | high | low
1905 06:40:14.646303 EC in RW | 0x000000e5 | high | high
1906 06:40:14.652727 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum bf3b
1907 06:40:14.652839 coreboot table: 1576 bytes.
1908 06:40:14.659201 IMD ROOT 0. 0x76fff000 0x00001000
1909 06:40:14.662955 IMD SMALL 1. 0x76ffe000 0x00001000
1910 06:40:14.666594 FSP MEMORY 2. 0x76c4e000 0x003b0000
1911 06:40:14.670198 VPD 3. 0x76c4d000 0x00000367
1912 06:40:14.672746 RO MCACHE 4. 0x76c4c000 0x00000fdc
1913 06:40:14.676157 CONSOLE 5. 0x76c2c000 0x00020000
1914 06:40:14.679381 FMAP 6. 0x76c2b000 0x00000578
1915 06:40:14.683204 TIME STAMP 7. 0x76c2a000 0x00000910
1916 06:40:14.685950 VBOOT WORK 8. 0x76c16000 0x00014000
1917 06:40:14.693157 ROMSTG STCK 9. 0x76c15000 0x00001000
1918 06:40:14.696434 AFTER CAR 10. 0x76c0a000 0x0000b000
1919 06:40:14.699305 RAMSTAGE 11. 0x76b97000 0x00073000
1920 06:40:14.703344 REFCODE 12. 0x76b42000 0x00055000
1921 06:40:14.705813 SMM BACKUP 13. 0x76b32000 0x00010000
1922 06:40:14.709296 4f444749 14. 0x76b30000 0x00002000
1923 06:40:14.712570 EXT VBT15. 0x76b2d000 0x0000219f
1924 06:40:14.715840 COREBOOT 16. 0x76b25000 0x00008000
1925 06:40:14.719560 ACPI 17. 0x76b01000 0x00024000
1926 06:40:14.726023 ACPI GNVS 18. 0x76b00000 0x00001000
1927 06:40:14.729456 RAMOOPS 19. 0x76a00000 0x00100000
1928 06:40:14.732724 TPM2 TCGLOG20. 0x769f0000 0x00010000
1929 06:40:14.735949 SMBIOS 21. 0x769ef000 0x00000800
1930 06:40:14.736068 IMD small region:
1931 06:40:14.742691 IMD ROOT 0. 0x76ffec00 0x00000400
1932 06:40:14.745952 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1933 06:40:14.749297 POWER STATE 2. 0x76ffeb80 0x00000044
1934 06:40:14.753131 ROMSTAGE 3. 0x76ffeb60 0x00000004
1935 06:40:14.756480 MEM INFO 4. 0x76ffe980 0x000001e0
1936 06:40:14.762536 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1937 06:40:14.766058 MTRR: Physical address space:
1938 06:40:14.772669 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1939 06:40:14.779430 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1940 06:40:14.786352 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1941 06:40:14.789221 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1942 06:40:14.796364 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1943 06:40:14.802583 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1944 06:40:14.809217 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1945 06:40:14.812999 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 06:40:14.819718 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 06:40:14.823277 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 06:40:14.825767 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 06:40:14.829940 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 06:40:14.835644 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 06:40:14.839100 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 06:40:14.842339 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 06:40:14.845480 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 06:40:14.852688 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 06:40:14.855778 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 06:40:14.858739 call enable_fixed_mtrr()
1957 06:40:14.862587 CPU physical address size: 39 bits
1958 06:40:14.865950 MTRR: default type WB/UC MTRR counts: 6/6.
1959 06:40:14.868879 MTRR: UC selected as default type.
1960 06:40:14.875628 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1961 06:40:14.882073 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1962 06:40:14.888883 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1963 06:40:14.895320 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1964 06:40:14.902119 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1965 06:40:14.908860 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1966 06:40:14.908968
1967 06:40:14.909061 MTRR check
1968 06:40:14.911729 Fixed MTRRs : Enabled
1969 06:40:14.915595 Variable MTRRs: Enabled
1970 06:40:14.915698
1971 06:40:14.918579 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 06:40:14.921768 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 06:40:14.928398 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 06:40:14.931732 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 06:40:14.935377 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 06:40:14.938750 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 06:40:14.945107 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 06:40:14.948356 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 06:40:14.951709 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 06:40:14.955250 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 06:40:14.961770 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 06:40:14.968612 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1983 06:40:14.968693 call enable_fixed_mtrr()
1984 06:40:14.972788 Checking cr50 for pending updates
1985 06:40:14.976445 CPU physical address size: 39 bits
1986 06:40:14.979762 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 06:40:14.986365 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 06:40:14.989865 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 06:40:14.993449 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 06:40:14.996882 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 06:40:15.003372 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 06:40:15.006093 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 06:40:15.010195 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 06:40:15.012954 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 06:40:15.016472 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 06:40:15.023246 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 06:40:15.026377 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 06:40:15.029530 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 06:40:15.032977 call enable_fixed_mtrr()
2000 06:40:15.035911 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 06:40:15.042784 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 06:40:15.046778 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 06:40:15.049466 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 06:40:15.053464 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 06:40:15.059532 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 06:40:15.063734 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 06:40:15.066348 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 06:40:15.069210 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 06:40:15.073434 CPU physical address size: 39 bits
2010 06:40:15.080292 call enable_fixed_mtrr()
2011 06:40:15.083369 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 06:40:15.087127 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 06:40:15.089985 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 06:40:15.096672 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 06:40:15.100500 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 06:40:15.103717 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 06:40:15.106809 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 06:40:15.109997 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 06:40:15.116930 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 06:40:15.119967 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 06:40:15.123192 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 06:40:15.126623 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 06:40:15.134187 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 06:40:15.134286 call enable_fixed_mtrr()
2025 06:40:15.140580 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 06:40:15.144270 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 06:40:15.147389 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 06:40:15.150520 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 06:40:15.157264 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 06:40:15.160445 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 06:40:15.164386 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 06:40:15.167110 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 06:40:15.174288 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 06:40:15.177016 CPU physical address size: 39 bits
2035 06:40:15.180555 call enable_fixed_mtrr()
2036 06:40:15.183984 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 06:40:15.186998 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 06:40:15.193849 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 06:40:15.197856 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 06:40:15.200424 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 06:40:15.204621 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 06:40:15.210298 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 06:40:15.213745 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 06:40:15.216740 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 06:40:15.220477 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 06:40:15.227715 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 06:40:15.230203 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 06:40:15.233538 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 06:40:15.236653 call enable_fixed_mtrr()
2050 06:40:15.240456 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 06:40:15.246805 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 06:40:15.250048 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 06:40:15.253417 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 06:40:15.257177 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 06:40:15.263627 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 06:40:15.266528 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 06:40:15.270205 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 06:40:15.273260 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 06:40:15.277359 CPU physical address size: 39 bits
2060 06:40:15.283954 call enable_fixed_mtrr()
2061 06:40:15.287708 CPU physical address size: 39 bits
2062 06:40:15.287809 Reading cr50 TPM mode
2063 06:40:15.291041 CPU physical address size: 39 bits
2064 06:40:15.294536 CPU physical address size: 39 bits
2065 06:40:15.301414 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2066 06:40:15.308316 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2067 06:40:15.314893 Checking segment from ROM address 0xffc02b38
2068 06:40:15.317826 Checking segment from ROM address 0xffc02b54
2069 06:40:15.321424 Loading segment from ROM address 0xffc02b38
2070 06:40:15.325096 code (compression=0)
2071 06:40:15.334791 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2072 06:40:15.341423 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2073 06:40:15.344381 it's not compressed!
2074 06:40:15.483384 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2075 06:40:15.489929 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2076 06:40:15.496278 Loading segment from ROM address 0xffc02b54
2077 06:40:15.496381 Entry Point 0x30000000
2078 06:40:15.500400 Loaded segments
2079 06:40:15.506334 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2080 06:40:15.549224 Finalizing chipset.
2081 06:40:15.552864 Finalizing SMM.
2082 06:40:15.552966 APMC done.
2083 06:40:15.559230 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2084 06:40:15.562842 mp_park_aps done after 0 msecs.
2085 06:40:15.565618 Jumping to boot code at 0x30000000(0x76b25000)
2086 06:40:15.576037 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2087 06:40:15.576140
2088 06:40:15.576206
2089 06:40:15.576267
2090 06:40:15.578811 Starting depthcharge on Voema...
2091 06:40:15.578884
2092 06:40:15.579224 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2093 06:40:15.579349 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2094 06:40:15.579462 Setting prompt string to ['volteer:']
2095 06:40:15.579570 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2096 06:40:15.588917 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2097 06:40:15.589027
2098 06:40:15.596483 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2099 06:40:15.596596
2100 06:40:15.600064 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2101 06:40:15.602265
2102 06:40:15.605312 Failed to find eMMC card reader
2103 06:40:15.605385
2104 06:40:15.605448 Wipe memory regions:
2105 06:40:15.605507
2106 06:40:15.612197 [0x00000000001000, 0x000000000a0000)
2107 06:40:15.612279
2108 06:40:15.615490 [0x00000000100000, 0x00000030000000)
2109 06:40:15.640998
2110 06:40:15.643772 [0x00000032662db0, 0x000000769ef000)
2111 06:40:15.679616
2112 06:40:15.684016 [0x00000100000000, 0x00000280400000)
2113 06:40:15.885714
2114 06:40:15.888688 ec_init: CrosEC protocol v3 supported (256, 256)
2115 06:40:15.888773
2116 06:40:15.894990 update_port_state: port C0 state: usb enable 1 mux conn 0
2117 06:40:15.895095
2118 06:40:15.901763 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2119 06:40:15.906455
2120 06:40:15.909730 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2121 06:40:15.909808
2122 06:40:15.912978 send_conn_disc_msg: pmc_send_cmd succeeded
2123 06:40:16.345301
2124 06:40:16.345497 R8152: Initializing
2125 06:40:16.345608
2126 06:40:16.349488 Version 9 (ocp_data = 6010)
2127 06:40:16.349626
2128 06:40:16.351658 R8152: Done initializing
2129 06:40:16.351771
2130 06:40:16.354921 Adding net device
2131 06:40:16.658060
2132 06:40:16.661333 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2133 06:40:16.661434
2134 06:40:16.661499
2135 06:40:16.661560
2136 06:40:16.664625 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 06:40:16.765051 volteer: tftpboot 192.168.201.1 12243180/tftp-deploy-rw3w76uk/kernel/bzImage 12243180/tftp-deploy-rw3w76uk/kernel/cmdline 12243180/tftp-deploy-rw3w76uk/ramdisk/ramdisk.cpio.gz
2139 06:40:16.765242 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2140 06:40:16.765337 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2141 06:40:16.769554 tftpboot 192.168.201.1 12243180/tftp-deploy-rw3w76uk/kernel/bzIploy-rw3w76uk/kernel/cmdline 12243180/tftp-deploy-rw3w76uk/ramdisk/ramdisk.cpio.gz
2142 06:40:16.769672
2143 06:40:16.769773 Waiting for link
2144 06:40:16.974175
2145 06:40:16.974325 done.
2146 06:40:16.974396
2147 06:40:16.974457 MAC: 00:e0:4c:71:a6:42
2148 06:40:16.974518
2149 06:40:16.976612 Sending DHCP discover... done.
2150 06:40:16.976696
2151 06:40:16.980294 Waiting for reply... done.
2152 06:40:16.980377
2153 06:40:16.984361 Sending DHCP request... done.
2154 06:40:16.984444
2155 06:40:16.990125 Waiting for reply... done.
2156 06:40:16.990209
2157 06:40:16.990275 My ip is 192.168.201.18
2158 06:40:16.990337
2159 06:40:16.993506 The DHCP server ip is 192.168.201.1
2160 06:40:16.996872
2161 06:40:17.000416 TFTP server IP predefined by user: 192.168.201.1
2162 06:40:17.000500
2163 06:40:17.006870 Bootfile predefined by user: 12243180/tftp-deploy-rw3w76uk/kernel/bzImage
2164 06:40:17.006954
2165 06:40:17.009838 Sending tftp read request... done.
2166 06:40:17.009921
2167 06:40:17.013043 Waiting for the transfer...
2168 06:40:17.013127
2169 06:40:17.271616 00000000 ################################################################
2170 06:40:17.271768
2171 06:40:17.540338 00080000 ################################################################
2172 06:40:17.540490
2173 06:40:17.816106 00100000 ################################################################
2174 06:40:17.816250
2175 06:40:18.082354 00180000 ################################################################
2176 06:40:18.082525
2177 06:40:18.353783 00200000 ################################################################
2178 06:40:18.353929
2179 06:40:18.628135 00280000 ################################################################
2180 06:40:18.628279
2181 06:40:18.905189 00300000 ################################################################
2182 06:40:18.905335
2183 06:40:19.177090 00380000 ################################################################
2184 06:40:19.177236
2185 06:40:19.456092 00400000 ################################################################
2186 06:40:19.456246
2187 06:40:19.743610 00480000 ################################################################
2188 06:40:19.743757
2189 06:40:20.008388 00500000 ################################################################
2190 06:40:20.008530
2191 06:40:20.296283 00580000 ################################################################
2192 06:40:20.296433
2193 06:40:20.562001 00600000 ################################################################
2194 06:40:20.562147
2195 06:40:20.811889 00680000 ################################################################
2196 06:40:20.812063
2197 06:40:21.063187 00700000 ################################################################
2198 06:40:21.063334
2199 06:40:21.311365 00780000 ################################################################
2200 06:40:21.311510
2201 06:40:21.407870 00800000 ####################### done.
2202 06:40:21.407983
2203 06:40:21.411337 The bootfile was 8576912 bytes long.
2204 06:40:21.411423
2205 06:40:21.414886 Sending tftp read request... done.
2206 06:40:21.414969
2207 06:40:21.417831 Waiting for the transfer...
2208 06:40:21.417914
2209 06:40:21.687634 00000000 ################################################################
2210 06:40:21.687781
2211 06:40:21.963026 00080000 ################################################################
2212 06:40:21.963174
2213 06:40:22.248799 00100000 ################################################################
2214 06:40:22.248942
2215 06:40:22.508039 00180000 ################################################################
2216 06:40:22.508223
2217 06:40:22.761507 00200000 ################################################################
2218 06:40:22.761648
2219 06:40:23.011947 00280000 ################################################################
2220 06:40:23.012148
2221 06:40:23.261279 00300000 ################################################################
2222 06:40:23.261423
2223 06:40:23.519019 00380000 ################################################################
2224 06:40:23.519166
2225 06:40:23.787130 00400000 ################################################################
2226 06:40:23.787276
2227 06:40:24.049587 00480000 ################################################################
2228 06:40:24.049729
2229 06:40:24.309332 00500000 ################################################################
2230 06:40:24.309472
2231 06:40:24.577290 00580000 ################################################################
2232 06:40:24.577437
2233 06:40:24.831448 00600000 ################################################################
2234 06:40:24.831593
2235 06:40:25.078329 00680000 ################################################################
2236 06:40:25.078475
2237 06:40:25.330818 00700000 ################################################################
2238 06:40:25.330994
2239 06:40:25.585189 00780000 ################################################################
2240 06:40:25.585362
2241 06:40:25.807315 00800000 ##################################################### done.
2242 06:40:25.807466
2243 06:40:25.810565 Sending tftp read request... done.
2244 06:40:25.810653
2245 06:40:25.814198 Waiting for the transfer...
2246 06:40:25.814282
2247 06:40:25.814347 00000000 # done.
2248 06:40:25.814411
2249 06:40:25.824044 Command line loaded dynamically from TFTP file: 12243180/tftp-deploy-rw3w76uk/kernel/cmdline
2250 06:40:25.824160
2251 06:40:25.840587 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2252 06:40:25.843969
2253 06:40:25.847676 Shutting down all USB controllers.
2254 06:40:25.847759
2255 06:40:25.847825 Removing current net device
2256 06:40:25.847886
2257 06:40:25.850487 Finalizing coreboot
2258 06:40:25.850570
2259 06:40:25.856836 Exiting depthcharge with code 4 at timestamp: 18925139
2260 06:40:25.856961
2261 06:40:25.857063
2262 06:40:25.857164 Starting kernel ...
2263 06:40:25.857270
2264 06:40:25.857376
2265 06:40:25.857904 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2266 06:40:25.858051 start: 2.2.5 auto-login-action (timeout 00:04:34) [common]
2267 06:40:25.858169 Setting prompt string to ['Linux version [0-9]']
2268 06:40:25.858280 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2269 06:40:25.858392 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2271 06:44:59.858916 end: 2.2.5 auto-login-action (duration 00:04:34) [common]
2273 06:44:59.859920 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 274 seconds'
2275 06:44:59.860826 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2278 06:44:59.862386 end: 2 depthcharge-action (duration 00:05:00) [common]
2280 06:44:59.863606 Cleaning after the job
2281 06:44:59.864087 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243180/tftp-deploy-rw3w76uk/ramdisk
2282 06:44:59.872043 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243180/tftp-deploy-rw3w76uk/kernel
2283 06:44:59.878212 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243180/tftp-deploy-rw3w76uk/modules
2284 06:44:59.878753 start: 5.1 power-off (timeout 00:00:30) [common]
2285 06:44:59.878912 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2286 06:44:59.958986 >> Command sent successfully.
2287 06:44:59.964006 Returned 0 in 0 seconds
2288 06:45:00.065296 end: 5.1 power-off (duration 00:00:00) [common]
2290 06:45:00.066705 start: 5.2 read-feedback (timeout 00:10:00) [common]
2291 06:45:00.067929 Listened to connection for namespace 'common' for up to 1s
2292 06:45:01.068381 Finalising connection for namespace 'common'
2293 06:45:01.069027 Disconnecting from shell: Finalise
2294 06:45:01.069438
2295 06:45:01.170464 end: 5.2 read-feedback (duration 00:00:01) [common]
2296 06:45:01.171036 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12243180
2297 06:45:01.224565 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12243180
2298 06:45:01.224794 JobError: Your job cannot terminate cleanly.