Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 06:44:06.740733 lava-dispatcher, installed at version: 2023.10
2 06:44:06.740946 start: 0 validate
3 06:44:06.741079 Start time: 2023-12-11 06:44:06.741071+00:00 (UTC)
4 06:44:06.741202 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:44:06.741329 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 06:44:07.017489 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:44:07.018464 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1988-gdf21aeeacf3cd%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:44:07.283340 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:44:07.284082 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 06:44:07.537023 Using caching service: 'http://localhost/cache/?uri=%s'
11 06:44:07.537741 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1988-gdf21aeeacf3cd%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 06:44:07.805562 validate duration: 1.06
14 06:44:07.806909 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 06:44:07.807412 start: 1.1 download-retry (timeout 00:10:00) [common]
16 06:44:07.807852 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 06:44:07.808504 Not decompressing ramdisk as can be used compressed.
18 06:44:07.808946 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 06:44:07.809299 saving as /var/lib/lava/dispatcher/tmp/12243170/tftp-deploy-uq_fmhg9/ramdisk/initrd.cpio.gz
20 06:44:07.809634 total size: 5432480 (5 MB)
21 06:44:07.815072 progress 0 % (0 MB)
22 06:44:07.824720 progress 5 % (0 MB)
23 06:44:07.830735 progress 10 % (0 MB)
24 06:44:07.835299 progress 15 % (0 MB)
25 06:44:07.839255 progress 20 % (1 MB)
26 06:44:07.842801 progress 25 % (1 MB)
27 06:44:07.846024 progress 30 % (1 MB)
28 06:44:07.849013 progress 35 % (1 MB)
29 06:44:07.851403 progress 40 % (2 MB)
30 06:44:07.853566 progress 45 % (2 MB)
31 06:44:07.855946 progress 50 % (2 MB)
32 06:44:07.858329 progress 55 % (2 MB)
33 06:44:07.860171 progress 60 % (3 MB)
34 06:44:07.862248 progress 65 % (3 MB)
35 06:44:07.864138 progress 70 % (3 MB)
36 06:44:07.865739 progress 75 % (3 MB)
37 06:44:07.867312 progress 80 % (4 MB)
38 06:44:07.868782 progress 85 % (4 MB)
39 06:44:07.870370 progress 90 % (4 MB)
40 06:44:07.871795 progress 95 % (4 MB)
41 06:44:07.873290 progress 100 % (5 MB)
42 06:44:07.873504 5 MB downloaded in 0.06 s (81.09 MB/s)
43 06:44:07.873662 end: 1.1.1 http-download (duration 00:00:00) [common]
45 06:44:07.873904 end: 1.1 download-retry (duration 00:00:00) [common]
46 06:44:07.873989 start: 1.2 download-retry (timeout 00:10:00) [common]
47 06:44:07.874072 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 06:44:07.874210 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1988-gdf21aeeacf3cd/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 06:44:07.874284 saving as /var/lib/lava/dispatcher/tmp/12243170/tftp-deploy-uq_fmhg9/kernel/bzImage
50 06:44:07.874344 total size: 8576912 (8 MB)
51 06:44:07.874405 No compression specified
52 06:44:07.875601 progress 0 % (0 MB)
53 06:44:07.878267 progress 5 % (0 MB)
54 06:44:07.880587 progress 10 % (0 MB)
55 06:44:07.882886 progress 15 % (1 MB)
56 06:44:07.885301 progress 20 % (1 MB)
57 06:44:07.887671 progress 25 % (2 MB)
58 06:44:07.890022 progress 30 % (2 MB)
59 06:44:07.892280 progress 35 % (2 MB)
60 06:44:07.894695 progress 40 % (3 MB)
61 06:44:07.897004 progress 45 % (3 MB)
62 06:44:07.899231 progress 50 % (4 MB)
63 06:44:07.901504 progress 55 % (4 MB)
64 06:44:07.903876 progress 60 % (4 MB)
65 06:44:07.906161 progress 65 % (5 MB)
66 06:44:07.908413 progress 70 % (5 MB)
67 06:44:07.910619 progress 75 % (6 MB)
68 06:44:07.912938 progress 80 % (6 MB)
69 06:44:07.915138 progress 85 % (6 MB)
70 06:44:07.917407 progress 90 % (7 MB)
71 06:44:07.919630 progress 95 % (7 MB)
72 06:44:07.921907 progress 100 % (8 MB)
73 06:44:07.922114 8 MB downloaded in 0.05 s (171.24 MB/s)
74 06:44:07.922258 end: 1.2.1 http-download (duration 00:00:00) [common]
76 06:44:07.922489 end: 1.2 download-retry (duration 00:00:00) [common]
77 06:44:07.922580 start: 1.3 download-retry (timeout 00:10:00) [common]
78 06:44:07.922666 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 06:44:07.922844 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 06:44:07.922912 saving as /var/lib/lava/dispatcher/tmp/12243170/tftp-deploy-uq_fmhg9/nfsrootfs/full.rootfs.tar
81 06:44:07.922973 total size: 207157356 (197 MB)
82 06:44:07.923034 Using unxz to decompress xz
83 06:44:07.927551 progress 0 % (0 MB)
84 06:44:08.494585 progress 5 % (9 MB)
85 06:44:09.031103 progress 10 % (19 MB)
86 06:44:09.652211 progress 15 % (29 MB)
87 06:44:10.022386 progress 20 % (39 MB)
88 06:44:10.392828 progress 25 % (49 MB)
89 06:44:10.996018 progress 30 % (59 MB)
90 06:44:11.548952 progress 35 % (69 MB)
91 06:44:12.156794 progress 40 % (79 MB)
92 06:44:12.713624 progress 45 % (88 MB)
93 06:44:13.299277 progress 50 % (98 MB)
94 06:44:13.934681 progress 55 % (108 MB)
95 06:44:14.628139 progress 60 % (118 MB)
96 06:44:14.769793 progress 65 % (128 MB)
97 06:44:14.908676 progress 70 % (138 MB)
98 06:44:15.001649 progress 75 % (148 MB)
99 06:44:15.071681 progress 80 % (158 MB)
100 06:44:15.141424 progress 85 % (167 MB)
101 06:44:15.240635 progress 90 % (177 MB)
102 06:44:15.512206 progress 95 % (187 MB)
103 06:44:16.099916 progress 100 % (197 MB)
104 06:44:16.106366 197 MB downloaded in 8.18 s (24.14 MB/s)
105 06:44:16.106614 end: 1.3.1 http-download (duration 00:00:08) [common]
107 06:44:16.106877 end: 1.3 download-retry (duration 00:00:08) [common]
108 06:44:16.106970 start: 1.4 download-retry (timeout 00:09:52) [common]
109 06:44:16.107059 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 06:44:16.107219 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1988-gdf21aeeacf3cd/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 06:44:16.107306 saving as /var/lib/lava/dispatcher/tmp/12243170/tftp-deploy-uq_fmhg9/modules/modules.tar
112 06:44:16.107372 total size: 250896 (0 MB)
113 06:44:16.107475 Using unxz to decompress xz
114 06:44:16.112075 progress 13 % (0 MB)
115 06:44:16.112548 progress 26 % (0 MB)
116 06:44:16.112789 progress 39 % (0 MB)
117 06:44:16.114427 progress 52 % (0 MB)
118 06:44:16.116279 progress 65 % (0 MB)
119 06:44:16.118207 progress 78 % (0 MB)
120 06:44:16.119964 progress 91 % (0 MB)
121 06:44:16.121928 progress 100 % (0 MB)
122 06:44:16.127301 0 MB downloaded in 0.02 s (12.01 MB/s)
123 06:44:16.127538 end: 1.4.1 http-download (duration 00:00:00) [common]
125 06:44:16.127801 end: 1.4 download-retry (duration 00:00:00) [common]
126 06:44:16.127900 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 06:44:16.127999 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 06:44:19.725708 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12243170/extract-nfsrootfs-vwkojy4s
129 06:44:19.725915 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 06:44:19.726022 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 06:44:19.726194 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3
132 06:44:19.726329 makedir: /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin
133 06:44:19.726444 makedir: /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/tests
134 06:44:19.726582 makedir: /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/results
135 06:44:19.726688 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-add-keys
136 06:44:19.726838 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-add-sources
137 06:44:19.726973 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-background-process-start
138 06:44:19.727104 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-background-process-stop
139 06:44:19.727233 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-common-functions
140 06:44:19.727361 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-echo-ipv4
141 06:44:19.727491 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-install-packages
142 06:44:19.727619 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-installed-packages
143 06:44:19.727746 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-os-build
144 06:44:19.727876 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-probe-channel
145 06:44:19.728004 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-probe-ip
146 06:44:19.728136 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-target-ip
147 06:44:19.728263 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-target-mac
148 06:44:19.728736 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-target-storage
149 06:44:19.728871 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-test-case
150 06:44:19.729004 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-test-event
151 06:44:19.729132 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-test-feedback
152 06:44:19.729287 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-test-raise
153 06:44:19.729431 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-test-reference
154 06:44:19.729564 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-test-runner
155 06:44:19.729715 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-test-set
156 06:44:19.729844 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-test-shell
157 06:44:19.729978 Updating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-add-keys (debian)
158 06:44:19.730137 Updating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-add-sources (debian)
159 06:44:19.730290 Updating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-install-packages (debian)
160 06:44:19.730454 Updating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-installed-packages (debian)
161 06:44:19.730596 Updating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/bin/lava-os-build (debian)
162 06:44:19.730720 Creating /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/environment
163 06:44:19.730817 LAVA metadata
164 06:44:19.730887 - LAVA_JOB_ID=12243170
165 06:44:19.730951 - LAVA_DISPATCHER_IP=192.168.201.1
166 06:44:19.731053 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
167 06:44:19.731121 skipped lava-vland-overlay
168 06:44:19.731195 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 06:44:19.731274 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
170 06:44:19.731335 skipped lava-multinode-overlay
171 06:44:19.731408 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 06:44:19.731497 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
173 06:44:19.731572 Loading test definitions
174 06:44:19.731664 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
175 06:44:19.731736 Using /lava-12243170 at stage 0
176 06:44:19.732028 uuid=12243170_1.5.2.3.1 testdef=None
177 06:44:19.732118 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 06:44:19.732203 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
179 06:44:19.732709 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 06:44:19.732930 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
182 06:44:19.733499 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 06:44:19.733732 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
185 06:44:19.734289 runner path: /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/0/tests/0_timesync-off test_uuid 12243170_1.5.2.3.1
186 06:44:19.734446 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 06:44:19.734675 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
189 06:44:19.734748 Using /lava-12243170 at stage 0
190 06:44:19.734848 Fetching tests from https://github.com/kernelci/test-definitions.git
191 06:44:19.734927 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/0/tests/1_kselftest-futex'
192 06:44:26.853442 Running '/usr/bin/git checkout kernelci.org
193 06:44:27.001615 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
194 06:44:27.002359 uuid=12243170_1.5.2.3.5 testdef=None
195 06:44:27.002520 end: 1.5.2.3.5 git-repo-action (duration 00:00:07) [common]
197 06:44:27.002778 start: 1.5.2.3.6 test-overlay (timeout 00:09:41) [common]
198 06:44:27.003546 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 06:44:27.003779 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:41) [common]
201 06:44:27.004805 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 06:44:27.005041 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:41) [common]
204 06:44:27.006064 runner path: /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/0/tests/1_kselftest-futex test_uuid 12243170_1.5.2.3.5
205 06:44:27.006159 BOARD='asus-C436FA-Flip-hatch'
206 06:44:27.006225 BRANCH='cip'
207 06:44:27.006286 SKIPFILE='/dev/null'
208 06:44:27.006344 SKIP_INSTALL='True'
209 06:44:27.006401 TESTPROG_URL='None'
210 06:44:27.006460 TST_CASENAME=''
211 06:44:27.006515 TST_CMDFILES='futex'
212 06:44:27.006658 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 06:44:27.006860 Creating lava-test-runner.conf files
215 06:44:27.006926 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243170/lava-overlay-_9q4vsu3/lava-12243170/0 for stage 0
216 06:44:27.007021 - 0_timesync-off
217 06:44:27.007091 - 1_kselftest-futex
218 06:44:27.007191 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
219 06:44:27.007280 start: 1.5.2.4 compress-overlay (timeout 00:09:41) [common]
220 06:44:34.494477 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
221 06:44:34.494642 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
222 06:44:34.494736 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 06:44:34.494836 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
224 06:44:34.494930 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
225 06:44:34.635250 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 06:44:34.635643 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
227 06:44:34.635764 extracting modules file /var/lib/lava/dispatcher/tmp/12243170/tftp-deploy-uq_fmhg9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243170/extract-nfsrootfs-vwkojy4s
228 06:44:34.649266 extracting modules file /var/lib/lava/dispatcher/tmp/12243170/tftp-deploy-uq_fmhg9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243170/extract-overlay-ramdisk-giq2ty6a/ramdisk
229 06:44:34.662777 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 06:44:34.662900 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
231 06:44:34.662987 [common] Applying overlay to NFS
232 06:44:34.663063 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243170/compress-overlay-dylq7xyn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243170/extract-nfsrootfs-vwkojy4s
233 06:44:35.587096 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 06:44:35.587263 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
235 06:44:35.587359 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 06:44:35.587447 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
237 06:44:35.587532 Building ramdisk /var/lib/lava/dispatcher/tmp/12243170/extract-overlay-ramdisk-giq2ty6a/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243170/extract-overlay-ramdisk-giq2ty6a/ramdisk
238 06:44:35.658552 >> 26160 blocks
239 06:44:36.191104 rename /var/lib/lava/dispatcher/tmp/12243170/extract-overlay-ramdisk-giq2ty6a/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243170/tftp-deploy-uq_fmhg9/ramdisk/ramdisk.cpio.gz
240 06:44:36.191565 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 06:44:36.191690 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
242 06:44:36.191791 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
243 06:44:36.191890 No mkimage arch provided, not using FIT.
244 06:44:36.191977 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 06:44:36.192059 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 06:44:36.192164 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
247 06:44:36.192260 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
248 06:44:36.192385 No LXC device requested
249 06:44:36.192470 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 06:44:36.192560 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
251 06:44:36.192647 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 06:44:36.192724 Checking files for TFTP limit of 4294967296 bytes.
253 06:44:36.193141 end: 1 tftp-deploy (duration 00:00:28) [common]
254 06:44:36.193251 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 06:44:36.193342 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 06:44:36.193469 substitutions:
257 06:44:36.193542 - {DTB}: None
258 06:44:36.193607 - {INITRD}: 12243170/tftp-deploy-uq_fmhg9/ramdisk/ramdisk.cpio.gz
259 06:44:36.193667 - {KERNEL}: 12243170/tftp-deploy-uq_fmhg9/kernel/bzImage
260 06:44:36.193725 - {LAVA_MAC}: None
261 06:44:36.193782 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12243170/extract-nfsrootfs-vwkojy4s
262 06:44:36.193838 - {NFS_SERVER_IP}: 192.168.201.1
263 06:44:36.193894 - {PRESEED_CONFIG}: None
264 06:44:36.193949 - {PRESEED_LOCAL}: None
265 06:44:36.194005 - {RAMDISK}: 12243170/tftp-deploy-uq_fmhg9/ramdisk/ramdisk.cpio.gz
266 06:44:36.194059 - {ROOT_PART}: None
267 06:44:36.194114 - {ROOT}: None
268 06:44:36.194168 - {SERVER_IP}: 192.168.201.1
269 06:44:36.194223 - {TEE}: None
270 06:44:36.194277 Parsed boot commands:
271 06:44:36.194331 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 06:44:36.194507 Parsed boot commands: tftpboot 192.168.201.1 12243170/tftp-deploy-uq_fmhg9/kernel/bzImage 12243170/tftp-deploy-uq_fmhg9/kernel/cmdline 12243170/tftp-deploy-uq_fmhg9/ramdisk/ramdisk.cpio.gz
273 06:44:36.194599 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 06:44:36.194682 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 06:44:36.194775 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 06:44:36.194862 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 06:44:36.194936 Not connected, no need to disconnect.
278 06:44:36.195011 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 06:44:36.195094 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 06:44:36.195161 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
281 06:44:36.199231 Setting prompt string to ['lava-test: # ']
282 06:44:36.199592 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 06:44:36.199706 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 06:44:36.199803 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 06:44:36.199895 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 06:44:36.200118 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
287 06:44:41.336892 >> Command sent successfully.
288 06:44:41.340231 Returned 0 in 5 seconds
289 06:44:41.440724 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 06:44:41.441212 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 06:44:41.441354 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 06:44:41.441469 Setting prompt string to 'Starting depthcharge on Helios...'
294 06:44:41.441551 Changing prompt to 'Starting depthcharge on Helios...'
295 06:44:41.441629 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 06:44:41.441928 [Enter `^Ec?' for help]
297 06:44:42.062971
298 06:44:42.063743
299 06:44:42.073398 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 06:44:42.076790 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 06:44:42.084242 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 06:44:42.087676 CPU: AES supported, TXT NOT supported, VT supported
303 06:44:42.093546 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 06:44:42.097320 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 06:44:42.104141 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 06:44:42.107901 VBOOT: Loading verstage.
307 06:44:42.110891 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 06:44:42.117135 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 06:44:42.120756 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 06:44:42.124058 CBFS @ c08000 size 3f8000
311 06:44:42.131004 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 06:44:42.134058 CBFS: Locating 'fallback/verstage'
313 06:44:42.137124 CBFS: Found @ offset 10fb80 size 1072c
314 06:44:42.137607
315 06:44:42.137988
316 06:44:42.150960 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 06:44:42.165009 Probing TPM: . done!
318 06:44:42.167461 TPM ready after 0 ms
319 06:44:42.170544 Connected to device vid:did:rid of 1ae0:0028:00
320 06:44:42.180874 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 06:44:42.184872 Initialized TPM device CR50 revision 0
322 06:44:42.229032 tlcl_send_startup: Startup return code is 0
323 06:44:42.229603 TPM: setup succeeded
324 06:44:42.241694 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 06:44:42.245749 Chrome EC: UHEPI supported
326 06:44:42.248982 Phase 1
327 06:44:42.252155 FMAP: area GBB found @ c05000 (12288 bytes)
328 06:44:42.258866 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 06:44:42.261956 Phase 2
330 06:44:42.262436 Phase 3
331 06:44:42.265013 FMAP: area GBB found @ c05000 (12288 bytes)
332 06:44:42.271817 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 06:44:42.278982 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
334 06:44:42.282049 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
335 06:44:42.288483 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 06:44:42.304814 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
337 06:44:42.307886 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
338 06:44:42.314352 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 06:44:42.318545 Phase 4
340 06:44:42.321863 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
341 06:44:42.328673 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 06:44:42.507928 VB2:vb2_rsa_verify_digest() Digest check failed!
343 06:44:42.511154 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 06:44:42.514954 Saving nvdata
345 06:44:42.517718 Reboot requested (10020007)
346 06:44:42.521122 board_reset() called!
347 06:44:42.521601 full_reset() called!
348 06:44:47.029699
349 06:44:47.030086
350 06:44:47.039945 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 06:44:47.042500 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 06:44:47.049676 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 06:44:47.052874 CPU: AES supported, TXT NOT supported, VT supported
354 06:44:47.059129 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 06:44:47.062449 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 06:44:47.069420 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 06:44:47.072317 VBOOT: Loading verstage.
358 06:44:47.075633 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 06:44:47.082381 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 06:44:47.086078 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 06:44:47.088886 CBFS @ c08000 size 3f8000
362 06:44:47.095785 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 06:44:47.099410 CBFS: Locating 'fallback/verstage'
364 06:44:47.102030 CBFS: Found @ offset 10fb80 size 1072c
365 06:44:47.105932
366 06:44:47.106061
367 06:44:47.115871 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 06:44:47.130640 Probing TPM: . done!
369 06:44:47.134139 TPM ready after 0 ms
370 06:44:47.136914 Connected to device vid:did:rid of 1ae0:0028:00
371 06:44:47.147373 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
372 06:44:47.150577 Initialized TPM device CR50 revision 0
373 06:44:47.195513 tlcl_send_startup: Startup return code is 0
374 06:44:47.195711 TPM: setup succeeded
375 06:44:47.207787 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 06:44:47.212034 Chrome EC: UHEPI supported
377 06:44:47.215422 Phase 1
378 06:44:47.218253 FMAP: area GBB found @ c05000 (12288 bytes)
379 06:44:47.225179 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 06:44:47.231932 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 06:44:47.235061 Recovery requested (1009000e)
382 06:44:47.240410 Saving nvdata
383 06:44:47.247210 tlcl_extend: response is 0
384 06:44:47.255607 tlcl_extend: response is 0
385 06:44:47.262959 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 06:44:47.266119 CBFS @ c08000 size 3f8000
387 06:44:47.272922 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 06:44:47.276266 CBFS: Locating 'fallback/romstage'
389 06:44:47.279415 CBFS: Found @ offset 80 size 145fc
390 06:44:47.283028 Accumulated console time in verstage 98 ms
391 06:44:47.283459
392 06:44:47.283799
393 06:44:47.296124 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 06:44:47.302680 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 06:44:47.306156 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 06:44:47.309462 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 06:44:47.315581 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 06:44:47.319009 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 06:44:47.322473 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
400 06:44:47.325764 TCO_STS: 0000 0000
401 06:44:47.329547 GEN_PMCON: e0015238 00000200
402 06:44:47.332035 GBLRST_CAUSE: 00000000 00000000
403 06:44:47.332534 prev_sleep_state 5
404 06:44:47.336247 Boot Count incremented to 1916
405 06:44:47.342681 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 06:44:47.346160 CBFS @ c08000 size 3f8000
407 06:44:47.352478 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 06:44:47.352969 CBFS: Locating 'fspm.bin'
409 06:44:47.355967 CBFS: Found @ offset 5ffc0 size 71000
410 06:44:47.359988 Chrome EC: UHEPI supported
411 06:44:47.367156 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 06:44:47.372657 Probing TPM: done!
413 06:44:47.379314 Connected to device vid:did:rid of 1ae0:0028:00
414 06:44:47.389077 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
415 06:44:47.394867 Initialized TPM device CR50 revision 0
416 06:44:47.404027 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 06:44:47.410914 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 06:44:47.414252 MRC cache found, size 1948
419 06:44:47.417364 bootmode is set to: 2
420 06:44:47.420841 PRMRR disabled by config.
421 06:44:47.421274 SPD INDEX = 1
422 06:44:47.427283 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 06:44:47.430461 CBFS @ c08000 size 3f8000
424 06:44:47.437419 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 06:44:47.437850 CBFS: Locating 'spd.bin'
426 06:44:47.440764 CBFS: Found @ offset 5fb80 size 400
427 06:44:47.444022 SPD: module type is LPDDR3
428 06:44:47.447380 SPD: module part is
429 06:44:47.453708 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 06:44:47.457223 SPD: device width 4 bits, bus width 8 bits
431 06:44:47.460217 SPD: module size is 4096 MB (per channel)
432 06:44:47.463676 memory slot: 0 configuration done.
433 06:44:47.467389 memory slot: 2 configuration done.
434 06:44:47.518798 CBMEM:
435 06:44:47.522606 IMD: root @ 99fff000 254 entries.
436 06:44:47.525931 IMD: root @ 99ffec00 62 entries.
437 06:44:47.529149 External stage cache:
438 06:44:47.531923 IMD: root @ 9abff000 254 entries.
439 06:44:47.535633 IMD: root @ 9abfec00 62 entries.
440 06:44:47.538774 Chrome EC: clear events_b mask to 0x0000000020004000
441 06:44:47.554623 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 06:44:47.567753 tlcl_write: response is 0
443 06:44:47.577677 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 06:44:47.583529 MRC: TPM MRC hash updated successfully.
445 06:44:47.583963 2 DIMMs found
446 06:44:47.586910 SMM Memory Map
447 06:44:47.590511 SMRAM : 0x9a000000 0x1000000
448 06:44:47.593785 Subregion 0: 0x9a000000 0xa00000
449 06:44:47.597363 Subregion 1: 0x9aa00000 0x200000
450 06:44:47.600246 Subregion 2: 0x9ac00000 0x400000
451 06:44:47.603428 top_of_ram = 0x9a000000
452 06:44:47.606775 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 06:44:47.613866 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 06:44:47.617265 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 06:44:47.623333 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 06:44:47.626885 CBFS @ c08000 size 3f8000
457 06:44:47.630010 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 06:44:47.634001 CBFS: Locating 'fallback/postcar'
459 06:44:47.639945 CBFS: Found @ offset 107000 size 4b44
460 06:44:47.643661 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 06:44:47.655865 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 06:44:47.659471 Processing 180 relocs. Offset value of 0x97c0c000
463 06:44:47.667697 Accumulated console time in romstage 285 ms
464 06:44:47.668233
465 06:44:47.668697
466 06:44:47.677577 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 06:44:47.684380 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 06:44:47.687860 CBFS @ c08000 size 3f8000
469 06:44:47.690602 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 06:44:47.697257 CBFS: Locating 'fallback/ramstage'
471 06:44:47.700691 CBFS: Found @ offset 43380 size 1b9e8
472 06:44:47.707570 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 06:44:47.739267 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 06:44:47.742729 Processing 3976 relocs. Offset value of 0x98db0000
475 06:44:47.749488 Accumulated console time in postcar 52 ms
476 06:44:47.750022
477 06:44:47.750425
478 06:44:47.759543 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 06:44:47.766281 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 06:44:47.769281 WARNING: RO_VPD is uninitialized or empty.
481 06:44:47.772392 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 06:44:47.779275 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 06:44:47.779792 Normal boot.
484 06:44:47.785578 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 06:44:47.789598 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 06:44:47.792922 CBFS @ c08000 size 3f8000
487 06:44:47.798837 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 06:44:47.802211 CBFS: Locating 'cpu_microcode_blob.bin'
489 06:44:47.805578 CBFS: Found @ offset 14700 size 2ec00
490 06:44:47.808805 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 06:44:47.812250 Skip microcode update
492 06:44:47.819188 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 06:44:47.819621 CBFS @ c08000 size 3f8000
494 06:44:47.825795 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 06:44:47.829261 CBFS: Locating 'fsps.bin'
496 06:44:47.832148 CBFS: Found @ offset d1fc0 size 35000
497 06:44:47.857568 Detected 4 core, 8 thread CPU.
498 06:44:47.860807 Setting up SMI for CPU
499 06:44:47.863995 IED base = 0x9ac00000
500 06:44:47.864640 IED size = 0x00400000
501 06:44:47.867599 Will perform SMM setup.
502 06:44:47.874143 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 06:44:47.880665 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 06:44:47.884031 Processing 16 relocs. Offset value of 0x00030000
505 06:44:47.887669 Attempting to start 7 APs
506 06:44:47.891320 Waiting for 10ms after sending INIT.
507 06:44:47.907394 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
508 06:44:47.907934 done.
509 06:44:47.911015 AP: slot 6 apic_id 2.
510 06:44:47.914209 AP: slot 7 apic_id 3.
511 06:44:47.914747 AP: slot 4 apic_id 4.
512 06:44:47.917640 AP: slot 1 apic_id 5.
513 06:44:47.920840 Waiting for 2nd SIPI to complete...done.
514 06:44:47.923576 AP: slot 2 apic_id 6.
515 06:44:47.927231 AP: slot 5 apic_id 7.
516 06:44:47.933939 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 06:44:47.940777 Processing 13 relocs. Offset value of 0x00038000
518 06:44:47.943959 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 06:44:47.950338 Installing SMM handler to 0x9a000000
520 06:44:47.957144 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 06:44:47.960878 Processing 658 relocs. Offset value of 0x9a010000
522 06:44:47.970226 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 06:44:47.973356 Processing 13 relocs. Offset value of 0x9a008000
524 06:44:47.980204 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 06:44:47.986391 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 06:44:47.993245 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 06:44:47.996949 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 06:44:48.003030 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 06:44:48.009825 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 06:44:48.013402 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 06:44:48.019630 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 06:44:48.023259 Clearing SMI status registers
533 06:44:48.026949 SMI_STS: PM1
534 06:44:48.027484 PM1_STS: PWRBTN
535 06:44:48.029943 TCO_STS: SECOND_TO
536 06:44:48.033394 New SMBASE 0x9a000000
537 06:44:48.036829 In relocation handler: CPU 0
538 06:44:48.040182 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 06:44:48.043314 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 06:44:48.046320 Relocation complete.
541 06:44:48.049904 New SMBASE 0x99fff400
542 06:44:48.050493 In relocation handler: CPU 3
543 06:44:48.057092 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
544 06:44:48.060105 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 06:44:48.063225 Relocation complete.
546 06:44:48.066664 New SMBASE 0x99fff000
547 06:44:48.067206 In relocation handler: CPU 4
548 06:44:48.073237 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
549 06:44:48.076746 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 06:44:48.079959 Relocation complete.
551 06:44:48.080432 New SMBASE 0x99fff800
552 06:44:48.083312 In relocation handler: CPU 2
553 06:44:48.089714 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
554 06:44:48.093234 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 06:44:48.096714 Relocation complete.
556 06:44:48.097259 New SMBASE 0x99ffec00
557 06:44:48.100242 In relocation handler: CPU 5
558 06:44:48.103790 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
559 06:44:48.110053 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 06:44:48.113402 Relocation complete.
561 06:44:48.113939 New SMBASE 0x99fffc00
562 06:44:48.116898 In relocation handler: CPU 1
563 06:44:48.120053 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
564 06:44:48.126686 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 06:44:48.127223 Relocation complete.
566 06:44:48.129931 New SMBASE 0x99ffe800
567 06:44:48.133447 In relocation handler: CPU 6
568 06:44:48.136604 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
569 06:44:48.143130 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 06:44:48.143668 Relocation complete.
571 06:44:48.146700 New SMBASE 0x99ffe400
572 06:44:48.149696 In relocation handler: CPU 7
573 06:44:48.152956 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
574 06:44:48.159844 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 06:44:48.160425 Relocation complete.
576 06:44:48.162806 Initializing CPU #0
577 06:44:48.166969 CPU: vendor Intel device 806ec
578 06:44:48.170103 CPU: family 06, model 8e, stepping 0c
579 06:44:48.173261 Clearing out pending MCEs
580 06:44:48.176175 Setting up local APIC...
581 06:44:48.176640 apic_id: 0x00 done.
582 06:44:48.179769 Turbo is available but hidden
583 06:44:48.183271 Turbo is available and visible
584 06:44:48.186983 VMX status: enabled
585 06:44:48.190095 IA32_FEATURE_CONTROL status: locked
586 06:44:48.190630 Skip microcode update
587 06:44:48.193306 CPU #0 initialized
588 06:44:48.196813 Initializing CPU #3
589 06:44:48.197245 Initializing CPU #6
590 06:44:48.199560 Initializing CPU #7
591 06:44:48.203321 CPU: vendor Intel device 806ec
592 06:44:48.206477 CPU: family 06, model 8e, stepping 0c
593 06:44:48.210006 CPU: vendor Intel device 806ec
594 06:44:48.213002 CPU: family 06, model 8e, stepping 0c
595 06:44:48.216676 Clearing out pending MCEs
596 06:44:48.219992 Clearing out pending MCEs
597 06:44:48.220568 Setting up local APIC...
598 06:44:48.223113 Initializing CPU #2
599 06:44:48.226856 Initializing CPU #5
600 06:44:48.229851 CPU: vendor Intel device 806ec
601 06:44:48.233127 CPU: family 06, model 8e, stepping 0c
602 06:44:48.233563 apic_id: 0x02 done.
603 06:44:48.236468 Setting up local APIC...
604 06:44:48.240008 CPU: vendor Intel device 806ec
605 06:44:48.243045 CPU: family 06, model 8e, stepping 0c
606 06:44:48.246130 Clearing out pending MCEs
607 06:44:48.249782 Clearing out pending MCEs
608 06:44:48.253331 CPU: vendor Intel device 806ec
609 06:44:48.255978 CPU: family 06, model 8e, stepping 0c
610 06:44:48.259292 Setting up local APIC...
611 06:44:48.259766 apic_id: 0x03 done.
612 06:44:48.263375 VMX status: enabled
613 06:44:48.265747 VMX status: enabled
614 06:44:48.269570 IA32_FEATURE_CONTROL status: locked
615 06:44:48.272999 IA32_FEATURE_CONTROL status: locked
616 06:44:48.273574 Skip microcode update
617 06:44:48.276223 Skip microcode update
618 06:44:48.279357 CPU #6 initialized
619 06:44:48.279787 CPU #7 initialized
620 06:44:48.282694 Setting up local APIC...
621 06:44:48.285846 Initializing CPU #1
622 06:44:48.286280 Initializing CPU #4
623 06:44:48.289852 CPU: vendor Intel device 806ec
624 06:44:48.292530 CPU: family 06, model 8e, stepping 0c
625 06:44:48.295848 CPU: vendor Intel device 806ec
626 06:44:48.299425 CPU: family 06, model 8e, stepping 0c
627 06:44:48.302619 Clearing out pending MCEs
628 06:44:48.305935 Clearing out pending MCEs
629 06:44:48.309279 Setting up local APIC...
630 06:44:48.309727 apic_id: 0x01 done.
631 06:44:48.312761 apic_id: 0x06 done.
632 06:44:48.315530 Clearing out pending MCEs
633 06:44:48.315963 VMX status: enabled
634 06:44:48.319509 Setting up local APIC...
635 06:44:48.322398 Setting up local APIC...
636 06:44:48.325510 VMX status: enabled
637 06:44:48.325934 apic_id: 0x07 done.
638 06:44:48.328944 IA32_FEATURE_CONTROL status: locked
639 06:44:48.332489 VMX status: enabled
640 06:44:48.335106 Skip microcode update
641 06:44:48.338547 IA32_FEATURE_CONTROL status: locked
642 06:44:48.338703 CPU #2 initialized
643 06:44:48.341988 Skip microcode update
644 06:44:48.345382 apic_id: 0x05 done.
645 06:44:48.345516 apic_id: 0x04 done.
646 06:44:48.348811 VMX status: enabled
647 06:44:48.351834 VMX status: enabled
648 06:44:48.355155 IA32_FEATURE_CONTROL status: locked
649 06:44:48.358644 IA32_FEATURE_CONTROL status: locked
650 06:44:48.358739 Skip microcode update
651 06:44:48.361620 Skip microcode update
652 06:44:48.364873 CPU #1 initialized
653 06:44:48.364959 CPU #5 initialized
654 06:44:48.368236 CPU #4 initialized
655 06:44:48.371664 IA32_FEATURE_CONTROL status: locked
656 06:44:48.375074 Skip microcode update
657 06:44:48.375159 CPU #3 initialized
658 06:44:48.381567 bsp_do_flight_plan done after 457 msecs.
659 06:44:48.381669 CPU: frequency set to 4200 MHz
660 06:44:48.384568 Enabling SMIs.
661 06:44:48.384652 Locking SMM.
662 06:44:48.400773 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 06:44:48.404184 CBFS @ c08000 size 3f8000
664 06:44:48.410832 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 06:44:48.410921 CBFS: Locating 'vbt.bin'
666 06:44:48.414325 CBFS: Found @ offset 5f5c0 size 499
667 06:44:48.421075 Found a VBT of 4608 bytes after decompression
668 06:44:48.603327 Display FSP Version Info HOB
669 06:44:48.606165 Reference Code - CPU = 9.0.1e.30
670 06:44:48.609342 uCode Version = 0.0.0.ca
671 06:44:48.612608 TXT ACM version = ff.ff.ff.ffff
672 06:44:48.615923 Display FSP Version Info HOB
673 06:44:48.619754 Reference Code - ME = 9.0.1e.30
674 06:44:48.622829 MEBx version = 0.0.0.0
675 06:44:48.626210 ME Firmware Version = Consumer SKU
676 06:44:48.629677 Display FSP Version Info HOB
677 06:44:48.633122 Reference Code - CML PCH = 9.0.1e.30
678 06:44:48.635796 PCH-CRID Status = Disabled
679 06:44:48.639333 PCH-CRID Original Value = ff.ff.ff.ffff
680 06:44:48.642648 PCH-CRID New Value = ff.ff.ff.ffff
681 06:44:48.645986 OPROM - RST - RAID = ff.ff.ff.ffff
682 06:44:48.649316 ChipsetInit Base Version = ff.ff.ff.ffff
683 06:44:48.652267 ChipsetInit Oem Version = ff.ff.ff.ffff
684 06:44:48.656030 Display FSP Version Info HOB
685 06:44:48.662648 Reference Code - SA - System Agent = 9.0.1e.30
686 06:44:48.666006 Reference Code - MRC = 0.7.1.6c
687 06:44:48.666098 SA - PCIe Version = 9.0.1e.30
688 06:44:48.669399 SA-CRID Status = Disabled
689 06:44:48.672778 SA-CRID Original Value = 0.0.0.c
690 06:44:48.675596 SA-CRID New Value = 0.0.0.c
691 06:44:48.679008 OPROM - VBIOS = ff.ff.ff.ffff
692 06:44:48.682499 RTC Init
693 06:44:48.685625 Set power on after power failure.
694 06:44:48.685711 Disabling Deep S3
695 06:44:48.689188 Disabling Deep S3
696 06:44:48.689273 Disabling Deep S4
697 06:44:48.692839 Disabling Deep S4
698 06:44:48.692925 Disabling Deep S5
699 06:44:48.695532 Disabling Deep S5
700 06:44:48.702353 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
701 06:44:48.702450 Enumerating buses...
702 06:44:48.709003 Show all devs... Before device enumeration.
703 06:44:48.709093 Root Device: enabled 1
704 06:44:48.712229 CPU_CLUSTER: 0: enabled 1
705 06:44:48.715251 DOMAIN: 0000: enabled 1
706 06:44:48.718842 APIC: 00: enabled 1
707 06:44:48.718926 PCI: 00:00.0: enabled 1
708 06:44:48.722377 PCI: 00:02.0: enabled 1
709 06:44:48.725980 PCI: 00:04.0: enabled 0
710 06:44:48.729064 PCI: 00:05.0: enabled 0
711 06:44:48.729149 PCI: 00:12.0: enabled 1
712 06:44:48.732228 PCI: 00:12.5: enabled 0
713 06:44:48.735463 PCI: 00:12.6: enabled 0
714 06:44:48.738837 PCI: 00:14.0: enabled 1
715 06:44:48.738922 PCI: 00:14.1: enabled 0
716 06:44:48.742264 PCI: 00:14.3: enabled 1
717 06:44:48.745058 PCI: 00:14.5: enabled 0
718 06:44:48.745143 PCI: 00:15.0: enabled 1
719 06:44:48.748663 PCI: 00:15.1: enabled 1
720 06:44:48.752095 PCI: 00:15.2: enabled 0
721 06:44:48.755470 PCI: 00:15.3: enabled 0
722 06:44:48.755556 PCI: 00:16.0: enabled 1
723 06:44:48.758850 PCI: 00:16.1: enabled 0
724 06:44:48.761814 PCI: 00:16.2: enabled 0
725 06:44:48.765229 PCI: 00:16.3: enabled 0
726 06:44:48.765315 PCI: 00:16.4: enabled 0
727 06:44:48.768693 PCI: 00:16.5: enabled 0
728 06:44:48.771881 PCI: 00:17.0: enabled 1
729 06:44:48.775032 PCI: 00:19.0: enabled 1
730 06:44:48.775117 PCI: 00:19.1: enabled 0
731 06:44:48.778808 PCI: 00:19.2: enabled 0
732 06:44:48.782050 PCI: 00:1a.0: enabled 0
733 06:44:48.782135 PCI: 00:1c.0: enabled 0
734 06:44:48.784857 PCI: 00:1c.1: enabled 0
735 06:44:48.788434 PCI: 00:1c.2: enabled 0
736 06:44:48.791670 PCI: 00:1c.3: enabled 0
737 06:44:48.791755 PCI: 00:1c.4: enabled 0
738 06:44:48.794896 PCI: 00:1c.5: enabled 0
739 06:44:48.798182 PCI: 00:1c.6: enabled 0
740 06:44:48.801709 PCI: 00:1c.7: enabled 0
741 06:44:48.801794 PCI: 00:1d.0: enabled 1
742 06:44:48.805184 PCI: 00:1d.1: enabled 0
743 06:44:48.808125 PCI: 00:1d.2: enabled 0
744 06:44:48.811309 PCI: 00:1d.3: enabled 0
745 06:44:48.811394 PCI: 00:1d.4: enabled 0
746 06:44:48.814743 PCI: 00:1d.5: enabled 1
747 06:44:48.818190 PCI: 00:1e.0: enabled 1
748 06:44:48.821194 PCI: 00:1e.1: enabled 0
749 06:44:48.821279 PCI: 00:1e.2: enabled 1
750 06:44:48.824446 PCI: 00:1e.3: enabled 1
751 06:44:48.827865 PCI: 00:1f.0: enabled 1
752 06:44:48.827951 PCI: 00:1f.1: enabled 1
753 06:44:48.831128 PCI: 00:1f.2: enabled 1
754 06:44:48.834669 PCI: 00:1f.3: enabled 1
755 06:44:48.838262 PCI: 00:1f.4: enabled 1
756 06:44:48.838346 PCI: 00:1f.5: enabled 1
757 06:44:48.841525 PCI: 00:1f.6: enabled 0
758 06:44:48.844627 USB0 port 0: enabled 1
759 06:44:48.848031 I2C: 00:15: enabled 1
760 06:44:48.848116 I2C: 00:5d: enabled 1
761 06:44:48.851035 GENERIC: 0.0: enabled 1
762 06:44:48.854737 I2C: 00:1a: enabled 1
763 06:44:48.854821 I2C: 00:38: enabled 1
764 06:44:48.858116 I2C: 00:39: enabled 1
765 06:44:48.860926 I2C: 00:3a: enabled 1
766 06:44:48.861009 I2C: 00:3b: enabled 1
767 06:44:48.864465 PCI: 00:00.0: enabled 1
768 06:44:48.867916 SPI: 00: enabled 1
769 06:44:48.868000 SPI: 01: enabled 1
770 06:44:48.871346 PNP: 0c09.0: enabled 1
771 06:44:48.874093 USB2 port 0: enabled 1
772 06:44:48.874178 USB2 port 1: enabled 1
773 06:44:48.877562 USB2 port 2: enabled 0
774 06:44:48.880967 USB2 port 3: enabled 0
775 06:44:48.881051 USB2 port 5: enabled 0
776 06:44:48.884275 USB2 port 6: enabled 1
777 06:44:48.887676 USB2 port 9: enabled 1
778 06:44:48.891077 USB3 port 0: enabled 1
779 06:44:48.891161 USB3 port 1: enabled 1
780 06:44:48.894358 USB3 port 2: enabled 1
781 06:44:48.897795 USB3 port 3: enabled 1
782 06:44:48.897879 USB3 port 4: enabled 0
783 06:44:48.900811 APIC: 05: enabled 1
784 06:44:48.903936 APIC: 06: enabled 1
785 06:44:48.904020 APIC: 01: enabled 1
786 06:44:48.907810 APIC: 04: enabled 1
787 06:44:48.907899 APIC: 07: enabled 1
788 06:44:48.911010 APIC: 02: enabled 1
789 06:44:48.914055 APIC: 03: enabled 1
790 06:44:48.914139 Compare with tree...
791 06:44:48.917399 Root Device: enabled 1
792 06:44:48.920583 CPU_CLUSTER: 0: enabled 1
793 06:44:48.924088 APIC: 00: enabled 1
794 06:44:48.924217 APIC: 05: enabled 1
795 06:44:48.927575 APIC: 06: enabled 1
796 06:44:48.930551 APIC: 01: enabled 1
797 06:44:48.930636 APIC: 04: enabled 1
798 06:44:48.934041 APIC: 07: enabled 1
799 06:44:48.937496 APIC: 02: enabled 1
800 06:44:48.937580 APIC: 03: enabled 1
801 06:44:48.940530 DOMAIN: 0000: enabled 1
802 06:44:48.943897 PCI: 00:00.0: enabled 1
803 06:44:48.947204 PCI: 00:02.0: enabled 1
804 06:44:48.947287 PCI: 00:04.0: enabled 0
805 06:44:48.950693 PCI: 00:05.0: enabled 0
806 06:44:48.953753 PCI: 00:12.0: enabled 1
807 06:44:48.957637 PCI: 00:12.5: enabled 0
808 06:44:48.960943 PCI: 00:12.6: enabled 0
809 06:44:48.961027 PCI: 00:14.0: enabled 1
810 06:44:48.964183 USB0 port 0: enabled 1
811 06:44:48.967351 USB2 port 0: enabled 1
812 06:44:48.970716 USB2 port 1: enabled 1
813 06:44:48.973812 USB2 port 2: enabled 0
814 06:44:48.973896 USB2 port 3: enabled 0
815 06:44:48.977208 USB2 port 5: enabled 0
816 06:44:48.980490 USB2 port 6: enabled 1
817 06:44:48.984076 USB2 port 9: enabled 1
818 06:44:48.987265 USB3 port 0: enabled 1
819 06:44:48.990239 USB3 port 1: enabled 1
820 06:44:48.990324 USB3 port 2: enabled 1
821 06:44:48.993441 USB3 port 3: enabled 1
822 06:44:48.997028 USB3 port 4: enabled 0
823 06:44:49.000501 PCI: 00:14.1: enabled 0
824 06:44:49.003796 PCI: 00:14.3: enabled 1
825 06:44:49.003880 PCI: 00:14.5: enabled 0
826 06:44:49.007217 PCI: 00:15.0: enabled 1
827 06:44:49.010597 I2C: 00:15: enabled 1
828 06:44:49.013201 PCI: 00:15.1: enabled 1
829 06:44:49.016560 I2C: 00:5d: enabled 1
830 06:44:49.016647 GENERIC: 0.0: enabled 1
831 06:44:49.019854 PCI: 00:15.2: enabled 0
832 06:44:49.023067 PCI: 00:15.3: enabled 0
833 06:44:49.026801 PCI: 00:16.0: enabled 1
834 06:44:49.029964 PCI: 00:16.1: enabled 0
835 06:44:49.030053 PCI: 00:16.2: enabled 0
836 06:44:49.033229 PCI: 00:16.3: enabled 0
837 06:44:49.036400 PCI: 00:16.4: enabled 0
838 06:44:49.039914 PCI: 00:16.5: enabled 0
839 06:44:49.043069 PCI: 00:17.0: enabled 1
840 06:44:49.043156 PCI: 00:19.0: enabled 1
841 06:44:49.046829 I2C: 00:1a: enabled 1
842 06:44:49.049877 I2C: 00:38: enabled 1
843 06:44:49.053341 I2C: 00:39: enabled 1
844 06:44:49.053426 I2C: 00:3a: enabled 1
845 06:44:49.056622 I2C: 00:3b: enabled 1
846 06:44:49.059996 PCI: 00:19.1: enabled 0
847 06:44:49.063313 PCI: 00:19.2: enabled 0
848 06:44:49.066597 PCI: 00:1a.0: enabled 0
849 06:44:49.066683 PCI: 00:1c.0: enabled 0
850 06:44:49.069804 PCI: 00:1c.1: enabled 0
851 06:44:49.073056 PCI: 00:1c.2: enabled 0
852 06:44:49.076383 PCI: 00:1c.3: enabled 0
853 06:44:49.076469 PCI: 00:1c.4: enabled 0
854 06:44:49.079865 PCI: 00:1c.5: enabled 0
855 06:44:49.083503 PCI: 00:1c.6: enabled 0
856 06:44:49.086141 PCI: 00:1c.7: enabled 0
857 06:44:49.089712 PCI: 00:1d.0: enabled 1
858 06:44:49.089797 PCI: 00:1d.1: enabled 0
859 06:44:49.092865 PCI: 00:1d.2: enabled 0
860 06:44:49.096351 PCI: 00:1d.3: enabled 0
861 06:44:49.099776 PCI: 00:1d.4: enabled 0
862 06:44:49.102740 PCI: 00:1d.5: enabled 1
863 06:44:49.102825 PCI: 00:00.0: enabled 1
864 06:44:49.105997 PCI: 00:1e.0: enabled 1
865 06:44:49.109372 PCI: 00:1e.1: enabled 0
866 06:44:49.112838 PCI: 00:1e.2: enabled 1
867 06:44:49.112966 SPI: 00: enabled 1
868 06:44:49.116399 PCI: 00:1e.3: enabled 1
869 06:44:49.119749 SPI: 01: enabled 1
870 06:44:49.122472 PCI: 00:1f.0: enabled 1
871 06:44:49.125929 PNP: 0c09.0: enabled 1
872 06:44:49.126016 PCI: 00:1f.1: enabled 1
873 06:44:49.129318 PCI: 00:1f.2: enabled 1
874 06:44:49.132606 PCI: 00:1f.3: enabled 1
875 06:44:49.135968 PCI: 00:1f.4: enabled 1
876 06:44:49.136054 PCI: 00:1f.5: enabled 1
877 06:44:49.139358 PCI: 00:1f.6: enabled 0
878 06:44:49.142699 Root Device scanning...
879 06:44:49.146318 scan_static_bus for Root Device
880 06:44:49.149491 CPU_CLUSTER: 0 enabled
881 06:44:49.149576 DOMAIN: 0000 enabled
882 06:44:49.152772 DOMAIN: 0000 scanning...
883 06:44:49.155859 PCI: pci_scan_bus for bus 00
884 06:44:49.159728 PCI: 00:00.0 [8086/0000] ops
885 06:44:49.162973 PCI: 00:00.0 [8086/9b61] enabled
886 06:44:49.165706 PCI: 00:02.0 [8086/0000] bus ops
887 06:44:49.169241 PCI: 00:02.0 [8086/9b41] enabled
888 06:44:49.172519 PCI: 00:04.0 [8086/1903] disabled
889 06:44:49.175747 PCI: 00:08.0 [8086/1911] enabled
890 06:44:49.179127 PCI: 00:12.0 [8086/02f9] enabled
891 06:44:49.182597 PCI: 00:14.0 [8086/0000] bus ops
892 06:44:49.185991 PCI: 00:14.0 [8086/02ed] enabled
893 06:44:49.189466 PCI: 00:14.2 [8086/02ef] enabled
894 06:44:49.192545 PCI: 00:14.3 [8086/02f0] enabled
895 06:44:49.195848 PCI: 00:15.0 [8086/0000] bus ops
896 06:44:49.199165 PCI: 00:15.0 [8086/02e8] enabled
897 06:44:49.202753 PCI: 00:15.1 [8086/0000] bus ops
898 06:44:49.206130 PCI: 00:15.1 [8086/02e9] enabled
899 06:44:49.208916 PCI: 00:16.0 [8086/0000] ops
900 06:44:49.212265 PCI: 00:16.0 [8086/02e0] enabled
901 06:44:49.215526 PCI: 00:17.0 [8086/0000] ops
902 06:44:49.218938 PCI: 00:17.0 [8086/02d3] enabled
903 06:44:49.222368 PCI: 00:19.0 [8086/0000] bus ops
904 06:44:49.226078 PCI: 00:19.0 [8086/02c5] enabled
905 06:44:49.228838 PCI: 00:1d.0 [8086/0000] bus ops
906 06:44:49.232103 PCI: 00:1d.0 [8086/02b0] enabled
907 06:44:49.239009 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 06:44:49.242323 PCI: 00:1e.0 [8086/0000] ops
909 06:44:49.245840 PCI: 00:1e.0 [8086/02a8] enabled
910 06:44:49.249005 PCI: 00:1e.2 [8086/0000] bus ops
911 06:44:49.252251 PCI: 00:1e.2 [8086/02aa] enabled
912 06:44:49.255742 PCI: 00:1e.3 [8086/0000] bus ops
913 06:44:49.258742 PCI: 00:1e.3 [8086/02ab] enabled
914 06:44:49.262566 PCI: 00:1f.0 [8086/0000] bus ops
915 06:44:49.265619 PCI: 00:1f.0 [8086/0284] enabled
916 06:44:49.268862 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 06:44:49.275744 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 06:44:49.278948 PCI: 00:1f.3 [8086/0000] bus ops
919 06:44:49.282417 PCI: 00:1f.3 [8086/02c8] enabled
920 06:44:49.285601 PCI: 00:1f.4 [8086/0000] bus ops
921 06:44:49.289034 PCI: 00:1f.4 [8086/02a3] enabled
922 06:44:49.292257 PCI: 00:1f.5 [8086/0000] bus ops
923 06:44:49.295638 PCI: 00:1f.5 [8086/02a4] enabled
924 06:44:49.298407 PCI: Leftover static devices:
925 06:44:49.298492 PCI: 00:05.0
926 06:44:49.301758 PCI: 00:12.5
927 06:44:49.301843 PCI: 00:12.6
928 06:44:49.305170 PCI: 00:14.1
929 06:44:49.305255 PCI: 00:14.5
930 06:44:49.305321 PCI: 00:15.2
931 06:44:49.308730 PCI: 00:15.3
932 06:44:49.308815 PCI: 00:16.1
933 06:44:49.312147 PCI: 00:16.2
934 06:44:49.312231 PCI: 00:16.3
935 06:44:49.312327 PCI: 00:16.4
936 06:44:49.314864 PCI: 00:16.5
937 06:44:49.314948 PCI: 00:19.1
938 06:44:49.318247 PCI: 00:19.2
939 06:44:49.318331 PCI: 00:1a.0
940 06:44:49.318397 PCI: 00:1c.0
941 06:44:49.321591 PCI: 00:1c.1
942 06:44:49.321676 PCI: 00:1c.2
943 06:44:49.324980 PCI: 00:1c.3
944 06:44:49.325102 PCI: 00:1c.4
945 06:44:49.328452 PCI: 00:1c.5
946 06:44:49.328536 PCI: 00:1c.6
947 06:44:49.328602 PCI: 00:1c.7
948 06:44:49.331984 PCI: 00:1d.1
949 06:44:49.332068 PCI: 00:1d.2
950 06:44:49.335455 PCI: 00:1d.3
951 06:44:49.335538 PCI: 00:1d.4
952 06:44:49.335604 PCI: 00:1d.5
953 06:44:49.338296 PCI: 00:1e.1
954 06:44:49.338380 PCI: 00:1f.1
955 06:44:49.341745 PCI: 00:1f.2
956 06:44:49.341827 PCI: 00:1f.6
957 06:44:49.345030 PCI: Check your devicetree.cb.
958 06:44:49.348477 PCI: 00:02.0 scanning...
959 06:44:49.351943 scan_generic_bus for PCI: 00:02.0
960 06:44:49.355574 scan_generic_bus for PCI: 00:02.0 done
961 06:44:49.361609 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
962 06:44:49.361696 PCI: 00:14.0 scanning...
963 06:44:49.365095 scan_static_bus for PCI: 00:14.0
964 06:44:49.368487 USB0 port 0 enabled
965 06:44:49.371803 USB0 port 0 scanning...
966 06:44:49.375048 scan_static_bus for USB0 port 0
967 06:44:49.378381 USB2 port 0 enabled
968 06:44:49.378465 USB2 port 1 enabled
969 06:44:49.381672 USB2 port 2 disabled
970 06:44:49.381755 USB2 port 3 disabled
971 06:44:49.385019 USB2 port 5 disabled
972 06:44:49.388475 USB2 port 6 enabled
973 06:44:49.388559 USB2 port 9 enabled
974 06:44:49.391715 USB3 port 0 enabled
975 06:44:49.394888 USB3 port 1 enabled
976 06:44:49.394977 USB3 port 2 enabled
977 06:44:49.398166 USB3 port 3 enabled
978 06:44:49.398250 USB3 port 4 disabled
979 06:44:49.401305 USB2 port 0 scanning...
980 06:44:49.404817 scan_static_bus for USB2 port 0
981 06:44:49.407971 scan_static_bus for USB2 port 0 done
982 06:44:49.414648 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
983 06:44:49.418060 USB2 port 1 scanning...
984 06:44:49.421398 scan_static_bus for USB2 port 1
985 06:44:49.424803 scan_static_bus for USB2 port 1 done
986 06:44:49.428167 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
987 06:44:49.431880 USB2 port 6 scanning...
988 06:44:49.434558 scan_static_bus for USB2 port 6
989 06:44:49.437999 scan_static_bus for USB2 port 6 done
990 06:44:49.444860 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
991 06:44:49.448021 USB2 port 9 scanning...
992 06:44:49.451826 scan_static_bus for USB2 port 9
993 06:44:49.455020 scan_static_bus for USB2 port 9 done
994 06:44:49.461420 scan_bus: scanning of bus USB2 port 9 took 9707 usecs
995 06:44:49.461506 USB3 port 0 scanning...
996 06:44:49.464730 scan_static_bus for USB3 port 0
997 06:44:49.468128 scan_static_bus for USB3 port 0 done
998 06:44:49.475015 scan_bus: scanning of bus USB3 port 0 took 9705 usecs
999 06:44:49.477966 USB3 port 1 scanning...
1000 06:44:49.481114 scan_static_bus for USB3 port 1
1001 06:44:49.484364 scan_static_bus for USB3 port 1 done
1002 06:44:49.491003 scan_bus: scanning of bus USB3 port 1 took 9696 usecs
1003 06:44:49.491097 USB3 port 2 scanning...
1004 06:44:49.494371 scan_static_bus for USB3 port 2
1005 06:44:49.497861 scan_static_bus for USB3 port 2 done
1006 06:44:49.504626 scan_bus: scanning of bus USB3 port 2 took 9695 usecs
1007 06:44:49.508013 USB3 port 3 scanning...
1008 06:44:49.511279 scan_static_bus for USB3 port 3
1009 06:44:49.514657 scan_static_bus for USB3 port 3 done
1010 06:44:49.521325 scan_bus: scanning of bus USB3 port 3 took 9710 usecs
1011 06:44:49.524595 scan_static_bus for USB0 port 0 done
1012 06:44:49.527906 scan_bus: scanning of bus USB0 port 0 took 155355 usecs
1013 06:44:49.534031 scan_static_bus for PCI: 00:14.0 done
1014 06:44:49.537587 scan_bus: scanning of bus PCI: 00:14.0 took 172974 usecs
1015 06:44:49.540958 PCI: 00:15.0 scanning...
1016 06:44:49.544431 scan_generic_bus for PCI: 00:15.0
1017 06:44:49.547193 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 06:44:49.554006 scan_generic_bus for PCI: 00:15.0 done
1019 06:44:49.557479 scan_bus: scanning of bus PCI: 00:15.0 took 14302 usecs
1020 06:44:49.561125 PCI: 00:15.1 scanning...
1021 06:44:49.563803 scan_generic_bus for PCI: 00:15.1
1022 06:44:49.567202 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 06:44:49.573993 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 06:44:49.577426 scan_generic_bus for PCI: 00:15.1 done
1025 06:44:49.580918 scan_bus: scanning of bus PCI: 00:15.1 took 18613 usecs
1026 06:44:49.583705 PCI: 00:19.0 scanning...
1027 06:44:49.587126 scan_generic_bus for PCI: 00:19.0
1028 06:44:49.593959 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 06:44:49.597240 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 06:44:49.601277 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 06:44:49.603895 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 06:44:49.607152 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 06:44:49.614012 scan_generic_bus for PCI: 00:19.0 done
1034 06:44:49.617315 scan_bus: scanning of bus PCI: 00:19.0 took 30723 usecs
1035 06:44:49.620458 PCI: 00:1d.0 scanning...
1036 06:44:49.623742 do_pci_scan_bridge for PCI: 00:1d.0
1037 06:44:49.626952 PCI: pci_scan_bus for bus 01
1038 06:44:49.630948 PCI: 01:00.0 [1c5c/1327] enabled
1039 06:44:49.633949 Enabling Common Clock Configuration
1040 06:44:49.640468 L1 Sub-State supported from root port 29
1041 06:44:49.640555 L1 Sub-State Support = 0xf
1042 06:44:49.643801 CommonModeRestoreTime = 0x28
1043 06:44:49.650693 Power On Value = 0x16, Power On Scale = 0x0
1044 06:44:49.650778 ASPM: Enabled L1
1045 06:44:49.656984 scan_bus: scanning of bus PCI: 00:1d.0 took 32784 usecs
1046 06:44:49.660311 PCI: 00:1e.2 scanning...
1047 06:44:49.663786 scan_generic_bus for PCI: 00:1e.2
1048 06:44:49.666569 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 06:44:49.670154 scan_generic_bus for PCI: 00:1e.2 done
1050 06:44:49.676317 scan_bus: scanning of bus PCI: 00:1e.2 took 13996 usecs
1051 06:44:49.679995 PCI: 00:1e.3 scanning...
1052 06:44:49.683201 scan_generic_bus for PCI: 00:1e.3
1053 06:44:49.686778 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 06:44:49.689489 scan_generic_bus for PCI: 00:1e.3 done
1055 06:44:49.696218 scan_bus: scanning of bus PCI: 00:1e.3 took 13997 usecs
1056 06:44:49.696313 PCI: 00:1f.0 scanning...
1057 06:44:49.700207 scan_static_bus for PCI: 00:1f.0
1058 06:44:49.703609 PNP: 0c09.0 enabled
1059 06:44:49.706861 scan_static_bus for PCI: 00:1f.0 done
1060 06:44:49.713439 scan_bus: scanning of bus PCI: 00:1f.0 took 12046 usecs
1061 06:44:49.716162 PCI: 00:1f.3 scanning...
1062 06:44:49.719829 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1063 06:44:49.723125 PCI: 00:1f.4 scanning...
1064 06:44:49.726399 scan_generic_bus for PCI: 00:1f.4
1065 06:44:49.729983 scan_generic_bus for PCI: 00:1f.4 done
1066 06:44:49.736309 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1067 06:44:49.739673 PCI: 00:1f.5 scanning...
1068 06:44:49.742927 scan_generic_bus for PCI: 00:1f.5
1069 06:44:49.746590 scan_generic_bus for PCI: 00:1f.5 done
1070 06:44:49.752957 scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
1071 06:44:49.759067 scan_bus: scanning of bus DOMAIN: 0000 took 605042 usecs
1072 06:44:49.762540 scan_static_bus for Root Device done
1073 06:44:49.766021 scan_bus: scanning of bus Root Device took 624905 usecs
1074 06:44:49.769526 done
1075 06:44:49.772952 Chrome EC: UHEPI supported
1076 06:44:49.776227 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 06:44:49.782635 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 06:44:49.789457 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 06:44:49.795935 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 06:44:49.799627 SPI flash protection: WPSW=0 SRP0=0
1081 06:44:49.805773 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 06:44:49.809030 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1083 06:44:49.812468 found VGA at PCI: 00:02.0
1084 06:44:49.815665 Setting up VGA for PCI: 00:02.0
1085 06:44:49.822631 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 06:44:49.825771 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 06:44:49.829245 Allocating resources...
1088 06:44:49.832729 Reading resources...
1089 06:44:49.836073 Root Device read_resources bus 0 link: 0
1090 06:44:49.839181 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 06:44:49.846329 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 06:44:49.848930 DOMAIN: 0000 read_resources bus 0 link: 0
1093 06:44:49.855972 PCI: 00:14.0 read_resources bus 0 link: 0
1094 06:44:49.859182 USB0 port 0 read_resources bus 0 link: 0
1095 06:44:49.867295 USB0 port 0 read_resources bus 0 link: 0 done
1096 06:44:49.870735 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 06:44:49.878282 PCI: 00:15.0 read_resources bus 1 link: 0
1098 06:44:49.881036 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 06:44:49.887836 PCI: 00:15.1 read_resources bus 2 link: 0
1100 06:44:49.891256 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 06:44:49.898931 PCI: 00:19.0 read_resources bus 3 link: 0
1102 06:44:49.905580 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 06:44:49.909126 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 06:44:49.915172 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 06:44:49.918644 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 06:44:49.925356 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 06:44:49.928634 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 06:44:49.935256 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 06:44:49.938485 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 06:44:49.945202 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 06:44:49.952238 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 06:44:49.955123 Root Device read_resources bus 0 link: 0 done
1113 06:44:49.958662 Done reading resources.
1114 06:44:49.961961 Show resources in subtree (Root Device)...After reading.
1115 06:44:49.968638 Root Device child on link 0 CPU_CLUSTER: 0
1116 06:44:49.971739 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 06:44:49.971826 APIC: 00
1118 06:44:49.975244 APIC: 05
1119 06:44:49.975328 APIC: 06
1120 06:44:49.978326 APIC: 01
1121 06:44:49.978410 APIC: 04
1122 06:44:49.978476 APIC: 07
1123 06:44:49.982093 APIC: 02
1124 06:44:49.982177 APIC: 03
1125 06:44:49.985384 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 06:44:50.041642 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 06:44:50.042035 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 06:44:50.042113 PCI: 00:00.0
1129 06:44:50.042177 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 06:44:50.042262 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 06:44:50.042349 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 06:44:50.063467 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 06:44:50.064396 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 06:44:50.067006 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 06:44:50.073886 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 06:44:50.080169 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 06:44:50.090341 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 06:44:50.100226 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 06:44:50.110385 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 06:44:50.120206 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 06:44:50.129899 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 06:44:50.139982 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 06:44:50.146680 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 06:44:50.156577 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 06:44:50.159975 PCI: 00:02.0
1146 06:44:50.169444 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 06:44:50.179292 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 06:44:50.186178 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 06:44:50.189645 PCI: 00:04.0
1150 06:44:50.189730 PCI: 00:08.0
1151 06:44:50.199290 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 06:44:50.202616 PCI: 00:12.0
1153 06:44:50.212595 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 06:44:50.215819 PCI: 00:14.0 child on link 0 USB0 port 0
1155 06:44:50.225867 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 06:44:50.232567 USB0 port 0 child on link 0 USB2 port 0
1157 06:44:50.232665 USB2 port 0
1158 06:44:50.235576 USB2 port 1
1159 06:44:50.235659 USB2 port 2
1160 06:44:50.239171 USB2 port 3
1161 06:44:50.239257 USB2 port 5
1162 06:44:50.242460 USB2 port 6
1163 06:44:50.242543 USB2 port 9
1164 06:44:50.245727 USB3 port 0
1165 06:44:50.245810 USB3 port 1
1166 06:44:50.248891 USB3 port 2
1167 06:44:50.248974 USB3 port 3
1168 06:44:50.252074 USB3 port 4
1169 06:44:50.252181 PCI: 00:14.2
1170 06:44:50.262485 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 06:44:50.272325 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 06:44:50.275716 PCI: 00:14.3
1173 06:44:50.285633 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 06:44:50.288580 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 06:44:50.298987 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 06:44:50.301718 I2C: 01:15
1177 06:44:50.305028 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 06:44:50.315163 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 06:44:50.315256 I2C: 02:5d
1180 06:44:50.318327 GENERIC: 0.0
1181 06:44:50.318412 PCI: 00:16.0
1182 06:44:50.328882 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 06:44:50.331683 PCI: 00:17.0
1184 06:44:50.341779 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 06:44:50.348698 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 06:44:50.358531 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 06:44:50.364989 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 06:44:50.374823 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 06:44:50.384472 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 06:44:50.387891 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 06:44:50.398022 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 06:44:50.398116 I2C: 03:1a
1193 06:44:50.401427 I2C: 03:38
1194 06:44:50.401510 I2C: 03:39
1195 06:44:50.405132 I2C: 03:3a
1196 06:44:50.405215 I2C: 03:3b
1197 06:44:50.411284 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 06:44:50.418050 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 06:44:50.427848 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 06:44:50.437316 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 06:44:50.440894 PCI: 01:00.0
1202 06:44:50.450616 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 06:44:50.450709 PCI: 00:1e.0
1204 06:44:50.460985 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 06:44:50.471111 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 06:44:50.477243 PCI: 00:1e.2 child on link 0 SPI: 00
1207 06:44:50.487262 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 06:44:50.487352 SPI: 00
1209 06:44:50.490293 PCI: 00:1e.3 child on link 0 SPI: 01
1210 06:44:50.500357 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 06:44:50.503726 SPI: 01
1212 06:44:50.507200 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 06:44:50.516778 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 06:44:50.523672 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 06:44:50.527230 PNP: 0c09.0
1216 06:44:50.533350 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 06:44:50.536655 PCI: 00:1f.3
1218 06:44:50.546688 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 06:44:50.556314 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 06:44:50.556409 PCI: 00:1f.4
1221 06:44:50.566274 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 06:44:50.576739 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 06:44:50.579565 PCI: 00:1f.5
1224 06:44:50.586390 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 06:44:50.593166 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 06:44:50.599741 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 06:44:50.605869 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 06:44:50.609291 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 06:44:50.613049 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 06:44:50.619634 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 06:44:50.622486 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 06:44:50.629265 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 06:44:50.636254 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 06:44:50.642802 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 06:44:50.652793 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 06:44:50.659095 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 06:44:50.662630 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 06:44:50.669355 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 06:44:50.676019 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 06:44:50.678915 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 06:44:50.685785 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 06:44:50.689431 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 06:44:50.692635 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 06:44:50.698858 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 06:44:50.702482 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 06:44:50.709219 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 06:44:50.712022 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 06:44:50.718700 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 06:44:50.722229 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 06:44:50.728745 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 06:44:50.731733 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 06:44:50.738391 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 06:44:50.741932 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 06:44:50.748615 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 06:44:50.752084 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 06:44:50.758044 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 06:44:50.761617 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 06:44:50.768619 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 06:44:50.772018 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 06:44:50.774749 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 06:44:50.781287 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 06:44:50.788367 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 06:44:50.794916 avoid_fixed_resources: DOMAIN: 0000
1264 06:44:50.798324 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 06:44:50.804516 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 06:44:50.811573 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 06:44:50.821364 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 06:44:50.828173 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 06:44:50.834357 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 06:44:50.844465 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 06:44:50.851408 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 06:44:50.857629 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 06:44:50.867930 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 06:44:50.874108 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 06:44:50.880973 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 06:44:50.884567 Setting resources...
1277 06:44:50.890905 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 06:44:50.894169 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 06:44:50.897440 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 06:44:50.900599 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 06:44:50.904258 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 06:44:50.910573 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 06:44:50.917431 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 06:44:50.924217 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 06:44:50.930390 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 06:44:50.937392 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 06:44:50.940194 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 06:44:50.947162 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 06:44:50.950661 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 06:44:50.956722 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 06:44:50.959937 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 06:44:50.966764 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 06:44:50.970284 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 06:44:50.976907 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 06:44:50.980448 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 06:44:50.986631 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 06:44:50.990268 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 06:44:50.996914 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 06:44:51.000077 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 06:44:51.006762 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 06:44:51.009588 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 06:44:51.016210 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 06:44:51.019921 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 06:44:51.023349 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 06:44:51.029583 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 06:44:51.033231 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 06:44:51.039280 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 06:44:51.042590 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 06:44:51.053040 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 06:44:51.059270 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 06:44:51.066010 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 06:44:51.072821 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 06:44:51.078922 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 06:44:51.085883 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 06:44:51.089299 Root Device assign_resources, bus 0 link: 0
1316 06:44:51.096085 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 06:44:51.102631 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 06:44:51.112460 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 06:44:51.119041 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 06:44:51.128901 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 06:44:51.135437 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 06:44:51.145267 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 06:44:51.148611 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 06:44:51.152049 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 06:44:51.162379 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 06:44:51.169092 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 06:44:51.179299 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 06:44:51.185429 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 06:44:51.192282 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 06:44:51.195744 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 06:44:51.205383 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 06:44:51.208757 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 06:44:51.212133 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 06:44:51.222211 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 06:44:51.228280 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 06:44:51.238930 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 06:44:51.244945 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 06:44:51.252043 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 06:44:51.261558 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 06:44:51.268466 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 06:44:51.274965 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 06:44:51.281947 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 06:44:51.284723 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 06:44:51.295177 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 06:44:51.304919 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 06:44:51.311078 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 06:44:51.318077 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 06:44:51.324719 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 06:44:51.327984 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 06:44:51.338160 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 06:44:51.344529 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 06:44:51.351113 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 06:44:51.354878 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 06:44:51.364636 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 06:44:51.367903 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 06:44:51.371226 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 06:44:51.378337 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 06:44:51.381756 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 06:44:51.387949 LPC: Trying to open IO window from 800 size 1ff
1360 06:44:51.394678 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 06:44:51.404926 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 06:44:51.411177 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 06:44:51.421440 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 06:44:51.425019 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 06:44:51.431305 Root Device assign_resources, bus 0 link: 0
1366 06:44:51.431390 Done setting resources.
1367 06:44:51.437784 Show resources in subtree (Root Device)...After assigning values.
1368 06:44:51.444267 Root Device child on link 0 CPU_CLUSTER: 0
1369 06:44:51.447776 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 06:44:51.447859 APIC: 00
1371 06:44:51.451367 APIC: 05
1372 06:44:51.451449 APIC: 06
1373 06:44:51.451514 APIC: 01
1374 06:44:51.454062 APIC: 04
1375 06:44:51.454145 APIC: 07
1376 06:44:51.457521 APIC: 02
1377 06:44:51.457602 APIC: 03
1378 06:44:51.460872 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 06:44:51.470836 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 06:44:51.483976 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 06:44:51.484063 PCI: 00:00.0
1382 06:44:51.493460 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 06:44:51.503702 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 06:44:51.513537 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 06:44:51.519977 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 06:44:51.529749 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 06:44:51.540194 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 06:44:51.549790 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 06:44:51.559490 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 06:44:51.570037 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 06:44:51.576314 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 06:44:51.586181 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 06:44:51.595930 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 06:44:51.606313 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 06:44:51.615695 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 06:44:51.625947 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 06:44:51.635428 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 06:44:51.635525 PCI: 00:02.0
1399 06:44:51.645402 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 06:44:51.654996 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 06:44:51.665319 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 06:44:51.668318 PCI: 00:04.0
1403 06:44:51.668417 PCI: 00:08.0
1404 06:44:51.678788 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 06:44:51.681475 PCI: 00:12.0
1406 06:44:51.691659 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 06:44:51.694777 PCI: 00:14.0 child on link 0 USB0 port 0
1408 06:44:51.705047 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 06:44:51.710999 USB0 port 0 child on link 0 USB2 port 0
1410 06:44:51.711087 USB2 port 0
1411 06:44:51.714681 USB2 port 1
1412 06:44:51.714767 USB2 port 2
1413 06:44:51.718218 USB2 port 3
1414 06:44:51.718301 USB2 port 5
1415 06:44:51.720917 USB2 port 6
1416 06:44:51.724430 USB2 port 9
1417 06:44:51.724517 USB3 port 0
1418 06:44:51.727778 USB3 port 1
1419 06:44:51.727859 USB3 port 2
1420 06:44:51.731546 USB3 port 3
1421 06:44:51.731629 USB3 port 4
1422 06:44:51.734759 PCI: 00:14.2
1423 06:44:51.744682 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 06:44:51.754732 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 06:44:51.754818 PCI: 00:14.3
1426 06:44:51.767613 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 06:44:51.770961 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 06:44:51.780232 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 06:44:51.780372 I2C: 01:15
1430 06:44:51.787184 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 06:44:51.796939 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 06:44:51.797025 I2C: 02:5d
1433 06:44:51.800871 GENERIC: 0.0
1434 06:44:51.800954 PCI: 00:16.0
1435 06:44:51.810142 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 06:44:51.813964 PCI: 00:17.0
1437 06:44:51.823759 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 06:44:51.833483 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 06:44:51.843272 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 06:44:51.853415 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 06:44:51.860167 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 06:44:51.869696 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 06:44:51.876766 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 06:44:51.886382 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 06:44:51.886553 I2C: 03:1a
1446 06:44:51.889754 I2C: 03:38
1447 06:44:51.889851 I2C: 03:39
1448 06:44:51.892613 I2C: 03:3a
1449 06:44:51.892699 I2C: 03:3b
1450 06:44:51.899780 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 06:44:51.906452 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 06:44:51.915844 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 06:44:51.929343 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 06:44:51.929517 PCI: 01:00.0
1455 06:44:51.939149 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 06:44:51.942561 PCI: 00:1e.0
1457 06:44:51.952255 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 06:44:51.962118 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 06:44:51.969000 PCI: 00:1e.2 child on link 0 SPI: 00
1460 06:44:51.978399 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 06:44:51.978502 SPI: 00
1462 06:44:51.981664 PCI: 00:1e.3 child on link 0 SPI: 01
1463 06:44:51.991800 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 06:44:51.994972 SPI: 01
1465 06:44:51.998355 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 06:44:52.008016 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 06:44:52.015100 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 06:44:52.017867 PNP: 0c09.0
1469 06:44:52.028305 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 06:44:52.028428 PCI: 00:1f.3
1471 06:44:52.037826 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 06:44:52.048155 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 06:44:52.051352 PCI: 00:1f.4
1474 06:44:52.061141 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 06:44:52.070925 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 06:44:52.071023 PCI: 00:1f.5
1477 06:44:52.080993 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 06:44:52.084398 Done allocating resources.
1479 06:44:52.090834 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 06:44:52.093953 Enabling resources...
1481 06:44:52.097770 PCI: 00:00.0 subsystem <- 8086/9b61
1482 06:44:52.100582 PCI: 00:00.0 cmd <- 06
1483 06:44:52.104256 PCI: 00:02.0 subsystem <- 8086/9b41
1484 06:44:52.107543 PCI: 00:02.0 cmd <- 03
1485 06:44:52.107645 PCI: 00:08.0 cmd <- 06
1486 06:44:52.113923 PCI: 00:12.0 subsystem <- 8086/02f9
1487 06:44:52.114012 PCI: 00:12.0 cmd <- 02
1488 06:44:52.117412 PCI: 00:14.0 subsystem <- 8086/02ed
1489 06:44:52.121007 PCI: 00:14.0 cmd <- 02
1490 06:44:52.124020 PCI: 00:14.2 cmd <- 02
1491 06:44:52.127299 PCI: 00:14.3 subsystem <- 8086/02f0
1492 06:44:52.130662 PCI: 00:14.3 cmd <- 02
1493 06:44:52.134008 PCI: 00:15.0 subsystem <- 8086/02e8
1494 06:44:52.137593 PCI: 00:15.0 cmd <- 02
1495 06:44:52.140867 PCI: 00:15.1 subsystem <- 8086/02e9
1496 06:44:52.143597 PCI: 00:15.1 cmd <- 02
1497 06:44:52.147066 PCI: 00:16.0 subsystem <- 8086/02e0
1498 06:44:52.150347 PCI: 00:16.0 cmd <- 02
1499 06:44:52.153812 PCI: 00:17.0 subsystem <- 8086/02d3
1500 06:44:52.153898 PCI: 00:17.0 cmd <- 03
1501 06:44:52.160447 PCI: 00:19.0 subsystem <- 8086/02c5
1502 06:44:52.160604 PCI: 00:19.0 cmd <- 02
1503 06:44:52.164395 PCI: 00:1d.0 bridge ctrl <- 0013
1504 06:44:52.167454 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 06:44:52.170424 PCI: 00:1d.0 cmd <- 06
1506 06:44:52.173791 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 06:44:52.177196 PCI: 00:1e.0 cmd <- 06
1508 06:44:52.180569 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 06:44:52.183896 PCI: 00:1e.2 cmd <- 06
1510 06:44:52.186799 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 06:44:52.190193 PCI: 00:1e.3 cmd <- 02
1512 06:44:52.193810 PCI: 00:1f.0 subsystem <- 8086/0284
1513 06:44:52.197252 PCI: 00:1f.0 cmd <- 407
1514 06:44:52.200808 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 06:44:52.203314 PCI: 00:1f.3 cmd <- 02
1516 06:44:52.206742 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 06:44:52.209949 PCI: 00:1f.4 cmd <- 03
1518 06:44:52.213644 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 06:44:52.213729 PCI: 00:1f.5 cmd <- 406
1520 06:44:52.223949 PCI: 01:00.0 cmd <- 02
1521 06:44:52.229305 done.
1522 06:44:52.242527 ME: Version: 14.0.39.1367
1523 06:44:52.248512 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1524 06:44:52.251885 Initializing devices...
1525 06:44:52.251969 Root Device init ...
1526 06:44:52.258655 Chrome EC: Set SMI mask to 0x0000000000000000
1527 06:44:52.262195 Chrome EC: clear events_b mask to 0x0000000000000000
1528 06:44:52.268811 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 06:44:52.275241 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 06:44:52.281617 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 06:44:52.285186 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 06:44:52.288418 Root Device init finished in 35167 usecs
1533 06:44:52.291808 CPU_CLUSTER: 0 init ...
1534 06:44:52.298747 CPU_CLUSTER: 0 init finished in 2437 usecs
1535 06:44:52.302913 PCI: 00:00.0 init ...
1536 06:44:52.306246 CPU TDP: 15 Watts
1537 06:44:52.309655 CPU PL2 = 64 Watts
1538 06:44:52.312670 PCI: 00:00.0 init finished in 7081 usecs
1539 06:44:52.315943 PCI: 00:02.0 init ...
1540 06:44:52.319496 PCI: 00:02.0 init finished in 2254 usecs
1541 06:44:52.323002 PCI: 00:08.0 init ...
1542 06:44:52.325939 PCI: 00:08.0 init finished in 2253 usecs
1543 06:44:52.329355 PCI: 00:12.0 init ...
1544 06:44:52.332503 PCI: 00:12.0 init finished in 2244 usecs
1545 06:44:52.336172 PCI: 00:14.0 init ...
1546 06:44:52.339437 PCI: 00:14.0 init finished in 2254 usecs
1547 06:44:52.342583 PCI: 00:14.2 init ...
1548 06:44:52.345830 PCI: 00:14.2 init finished in 2243 usecs
1549 06:44:52.349151 PCI: 00:14.3 init ...
1550 06:44:52.352743 PCI: 00:14.3 init finished in 2270 usecs
1551 06:44:52.356216 PCI: 00:15.0 init ...
1552 06:44:52.358931 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 06:44:52.362140 PCI: 00:15.0 init finished in 5976 usecs
1554 06:44:52.365604 PCI: 00:15.1 init ...
1555 06:44:52.369204 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 06:44:52.375711 PCI: 00:15.1 init finished in 5979 usecs
1557 06:44:52.375796 PCI: 00:16.0 init ...
1558 06:44:52.382685 PCI: 00:16.0 init finished in 2243 usecs
1559 06:44:52.382769 PCI: 00:19.0 init ...
1560 06:44:52.388695 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 06:44:52.392195 PCI: 00:19.0 init finished in 5977 usecs
1562 06:44:52.395359 PCI: 00:1d.0 init ...
1563 06:44:52.398730 Initializing PCH PCIe bridge.
1564 06:44:52.402169 PCI: 00:1d.0 init finished in 5288 usecs
1565 06:44:52.405643 PCI: 00:1f.0 init ...
1566 06:44:52.408449 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 06:44:52.415269 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 06:44:52.415353 IOAPIC: ID = 0x02
1569 06:44:52.418625 IOAPIC: Dumping registers
1570 06:44:52.421895 reg 0x0000: 0x02000000
1571 06:44:52.425142 reg 0x0001: 0x00770020
1572 06:44:52.425225 reg 0x0002: 0x00000000
1573 06:44:52.432326 PCI: 00:1f.0 init finished in 23550 usecs
1574 06:44:52.435189 PCI: 00:1f.4 init ...
1575 06:44:52.438474 PCI: 00:1f.4 init finished in 2262 usecs
1576 06:44:52.449067 PCI: 01:00.0 init ...
1577 06:44:52.452534 PCI: 01:00.0 init finished in 2252 usecs
1578 06:44:52.456221 PNP: 0c09.0 init ...
1579 06:44:52.460011 Google Chrome EC uptime: 11.091 seconds
1580 06:44:52.466681 Google Chrome AP resets since EC boot: 0
1581 06:44:52.469937 Google Chrome most recent AP reset causes:
1582 06:44:52.476857 Google Chrome EC reset flags at last EC boot: reset-pin
1583 06:44:52.479619 PNP: 0c09.0 init finished in 20572 usecs
1584 06:44:52.482917 Devices initialized
1585 06:44:52.483002 Show all devs... After init.
1586 06:44:52.486303 Root Device: enabled 1
1587 06:44:52.489767 CPU_CLUSTER: 0: enabled 1
1588 06:44:52.492986 DOMAIN: 0000: enabled 1
1589 06:44:52.493072 APIC: 00: enabled 1
1590 06:44:52.496582 PCI: 00:00.0: enabled 1
1591 06:44:52.499918 PCI: 00:02.0: enabled 1
1592 06:44:52.503103 PCI: 00:04.0: enabled 0
1593 06:44:52.503188 PCI: 00:05.0: enabled 0
1594 06:44:52.505931 PCI: 00:12.0: enabled 1
1595 06:44:52.509204 PCI: 00:12.5: enabled 0
1596 06:44:52.512749 PCI: 00:12.6: enabled 0
1597 06:44:52.512837 PCI: 00:14.0: enabled 1
1598 06:44:52.516214 PCI: 00:14.1: enabled 0
1599 06:44:52.519137 PCI: 00:14.3: enabled 1
1600 06:44:52.519223 PCI: 00:14.5: enabled 0
1601 06:44:52.522568 PCI: 00:15.0: enabled 1
1602 06:44:52.526037 PCI: 00:15.1: enabled 1
1603 06:44:52.529272 PCI: 00:15.2: enabled 0
1604 06:44:52.529358 PCI: 00:15.3: enabled 0
1605 06:44:52.532529 PCI: 00:16.0: enabled 1
1606 06:44:52.535981 PCI: 00:16.1: enabled 0
1607 06:44:52.539380 PCI: 00:16.2: enabled 0
1608 06:44:52.539466 PCI: 00:16.3: enabled 0
1609 06:44:52.542936 PCI: 00:16.4: enabled 0
1610 06:44:52.545685 PCI: 00:16.5: enabled 0
1611 06:44:52.549015 PCI: 00:17.0: enabled 1
1612 06:44:52.549101 PCI: 00:19.0: enabled 1
1613 06:44:52.552426 PCI: 00:19.1: enabled 0
1614 06:44:52.555840 PCI: 00:19.2: enabled 0
1615 06:44:52.555926 PCI: 00:1a.0: enabled 0
1616 06:44:52.559284 PCI: 00:1c.0: enabled 0
1617 06:44:52.562798 PCI: 00:1c.1: enabled 0
1618 06:44:52.565922 PCI: 00:1c.2: enabled 0
1619 06:44:52.566007 PCI: 00:1c.3: enabled 0
1620 06:44:52.569092 PCI: 00:1c.4: enabled 0
1621 06:44:52.572422 PCI: 00:1c.5: enabled 0
1622 06:44:52.575552 PCI: 00:1c.6: enabled 0
1623 06:44:52.575634 PCI: 00:1c.7: enabled 0
1624 06:44:52.578598 PCI: 00:1d.0: enabled 1
1625 06:44:52.582248 PCI: 00:1d.1: enabled 0
1626 06:44:52.585704 PCI: 00:1d.2: enabled 0
1627 06:44:52.585787 PCI: 00:1d.3: enabled 0
1628 06:44:52.588941 PCI: 00:1d.4: enabled 0
1629 06:44:52.592427 PCI: 00:1d.5: enabled 0
1630 06:44:52.595786 PCI: 00:1e.0: enabled 1
1631 06:44:52.595869 PCI: 00:1e.1: enabled 0
1632 06:44:52.598602 PCI: 00:1e.2: enabled 1
1633 06:44:52.601999 PCI: 00:1e.3: enabled 1
1634 06:44:52.602082 PCI: 00:1f.0: enabled 1
1635 06:44:52.605222 PCI: 00:1f.1: enabled 0
1636 06:44:52.608716 PCI: 00:1f.2: enabled 0
1637 06:44:52.612032 PCI: 00:1f.3: enabled 1
1638 06:44:52.612141 PCI: 00:1f.4: enabled 1
1639 06:44:52.615575 PCI: 00:1f.5: enabled 1
1640 06:44:52.618318 PCI: 00:1f.6: enabled 0
1641 06:44:52.621770 USB0 port 0: enabled 1
1642 06:44:52.621853 I2C: 01:15: enabled 1
1643 06:44:52.625482 I2C: 02:5d: enabled 1
1644 06:44:52.628697 GENERIC: 0.0: enabled 1
1645 06:44:52.628780 I2C: 03:1a: enabled 1
1646 06:44:52.632076 I2C: 03:38: enabled 1
1647 06:44:52.635038 I2C: 03:39: enabled 1
1648 06:44:52.635121 I2C: 03:3a: enabled 1
1649 06:44:52.638307 I2C: 03:3b: enabled 1
1650 06:44:52.641740 PCI: 00:00.0: enabled 1
1651 06:44:52.641823 SPI: 00: enabled 1
1652 06:44:52.645249 SPI: 01: enabled 1
1653 06:44:52.648160 PNP: 0c09.0: enabled 1
1654 06:44:52.648269 USB2 port 0: enabled 1
1655 06:44:52.651671 USB2 port 1: enabled 1
1656 06:44:52.655077 USB2 port 2: enabled 0
1657 06:44:52.658419 USB2 port 3: enabled 0
1658 06:44:52.658502 USB2 port 5: enabled 0
1659 06:44:52.661295 USB2 port 6: enabled 1
1660 06:44:52.664774 USB2 port 9: enabled 1
1661 06:44:52.664856 USB3 port 0: enabled 1
1662 06:44:52.668211 USB3 port 1: enabled 1
1663 06:44:52.671643 USB3 port 2: enabled 1
1664 06:44:52.671726 USB3 port 3: enabled 1
1665 06:44:52.675209 USB3 port 4: enabled 0
1666 06:44:52.677930 APIC: 05: enabled 1
1667 06:44:52.678013 APIC: 06: enabled 1
1668 06:44:52.681296 APIC: 01: enabled 1
1669 06:44:52.684716 APIC: 04: enabled 1
1670 06:44:52.684799 APIC: 07: enabled 1
1671 06:44:52.688031 APIC: 02: enabled 1
1672 06:44:52.688114 APIC: 03: enabled 1
1673 06:44:52.691340 PCI: 00:08.0: enabled 1
1674 06:44:52.694581 PCI: 00:14.2: enabled 1
1675 06:44:52.697859 PCI: 01:00.0: enabled 1
1676 06:44:52.701739 Disabling ACPI via APMC:
1677 06:44:52.701821 done.
1678 06:44:52.708345 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 06:44:52.711228 ELOG: NV offset 0xaf0000 size 0x4000
1680 06:44:52.717814 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 06:44:52.724794 ELOG: Event(17) added with size 13 at 2023-12-11 06:42:20 UTC
1682 06:44:52.731266 ELOG: Event(92) added with size 9 at 2023-12-11 06:42:20 UTC
1683 06:44:52.738332 ELOG: Event(93) added with size 9 at 2023-12-11 06:42:20 UTC
1684 06:44:52.744507 ELOG: Event(9A) added with size 9 at 2023-12-11 06:42:20 UTC
1685 06:44:52.751737 ELOG: Event(9E) added with size 10 at 2023-12-11 06:42:20 UTC
1686 06:44:52.757934 ELOG: Event(9F) added with size 14 at 2023-12-11 06:42:20 UTC
1687 06:44:52.761576 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1688 06:44:52.768306 ELOG: Event(A1) added with size 10 at 2023-12-11 06:42:20 UTC
1689 06:44:52.778588 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 06:44:52.784680 ELOG: Event(A0) added with size 9 at 2023-12-11 06:42:20 UTC
1691 06:44:52.788296 elog_add_boot_reason: Logged dev mode boot
1692 06:44:52.791710 Finalize devices...
1693 06:44:52.791794 PCI: 00:17.0 final
1694 06:44:52.795189 Devices finalized
1695 06:44:52.798678 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 06:44:52.804895 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 06:44:52.808514 ME: HFSTS1 : 0x90000245
1698 06:44:52.811306 ME: HFSTS2 : 0x3B850126
1699 06:44:52.818235 ME: HFSTS3 : 0x00000020
1700 06:44:52.821398 ME: HFSTS4 : 0x00004800
1701 06:44:52.824498 ME: HFSTS5 : 0x00000000
1702 06:44:52.828216 ME: HFSTS6 : 0x40400006
1703 06:44:52.831418 ME: Manufacturing Mode : NO
1704 06:44:52.834493 ME: FW Partition Table : OK
1705 06:44:52.838045 ME: Bringup Loader Failure : NO
1706 06:44:52.840944 ME: Firmware Init Complete : YES
1707 06:44:52.844885 ME: Boot Options Present : NO
1708 06:44:52.847913 ME: Update In Progress : NO
1709 06:44:52.851104 ME: D0i3 Support : YES
1710 06:44:52.854669 ME: Low Power State Enabled : NO
1711 06:44:52.857626 ME: CPU Replaced : NO
1712 06:44:52.861154 ME: CPU Replacement Valid : YES
1713 06:44:52.864526 ME: Current Working State : 5
1714 06:44:52.868023 ME: Current Operation State : 1
1715 06:44:52.870805 ME: Current Operation Mode : 0
1716 06:44:52.874148 ME: Error Code : 0
1717 06:44:52.877415 ME: CPU Debug Disabled : YES
1718 06:44:52.880664 ME: TXT Support : NO
1719 06:44:52.887777 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 06:44:52.894284 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 06:44:52.894368 CBFS @ c08000 size 3f8000
1722 06:44:52.901113 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 06:44:52.903824 CBFS: Locating 'fallback/dsdt.aml'
1724 06:44:52.907754 CBFS: Found @ offset 10bb80 size 3fa5
1725 06:44:52.914053 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 06:44:52.917644 CBFS @ c08000 size 3f8000
1727 06:44:52.920619 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 06:44:52.923741 CBFS: Locating 'fallback/slic'
1729 06:44:52.929202 CBFS: 'fallback/slic' not found.
1730 06:44:52.935463 ACPI: Writing ACPI tables at 99b3e000.
1731 06:44:52.935549 ACPI: * FACS
1732 06:44:52.938960 ACPI: * DSDT
1733 06:44:52.942649 Ramoops buffer: 0x100000@0x99a3d000.
1734 06:44:52.945710 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 06:44:52.952504 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 06:44:52.955348 Google Chrome EC: version:
1737 06:44:52.958763 ro: helios_v2.0.2659-56403530b
1738 06:44:52.961816 rw: helios_v2.0.2849-c41de27e7d
1739 06:44:52.961899 running image: 1
1740 06:44:52.966515 ACPI: * FADT
1741 06:44:52.966599 SCI is IRQ9
1742 06:44:52.973154 ACPI: added table 1/32, length now 40
1743 06:44:52.973238 ACPI: * SSDT
1744 06:44:52.976027 Found 1 CPU(s) with 8 core(s) each.
1745 06:44:52.979250 Error: Could not locate 'wifi_sar' in VPD.
1746 06:44:52.986200 Checking CBFS for default SAR values
1747 06:44:52.989399 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 06:44:52.992872 CBFS @ c08000 size 3f8000
1749 06:44:52.999687 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 06:44:53.002468 CBFS: Locating 'wifi_sar_defaults.hex'
1751 06:44:53.005937 CBFS: Found @ offset 5fac0 size 77
1752 06:44:53.009273 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 06:44:53.016126 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 06:44:53.019466 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 06:44:53.025915 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 06:44:53.029320 failed to find key in VPD: dsm_calib_r0_0
1757 06:44:53.039253 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 06:44:53.042309 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 06:44:53.045524 failed to find key in VPD: dsm_calib_r0_1
1760 06:44:53.055335 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 06:44:53.062066 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 06:44:53.065489 failed to find key in VPD: dsm_calib_r0_2
1763 06:44:53.075632 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 06:44:53.078634 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 06:44:53.085348 failed to find key in VPD: dsm_calib_r0_3
1766 06:44:53.092297 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 06:44:53.098686 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 06:44:53.102102 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 06:44:53.105458 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 06:44:53.109433 EC returned error result code 1
1771 06:44:53.112812 EC returned error result code 1
1772 06:44:53.117022 EC returned error result code 1
1773 06:44:53.123329 PS2K: Bad resp from EC. Vivaldi disabled!
1774 06:44:53.126818 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 06:44:53.133338 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 06:44:53.139542 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 06:44:53.143534 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 06:44:53.149706 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 06:44:53.156546 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 06:44:53.163387 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 06:44:53.166246 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 06:44:53.173134 ACPI: added table 2/32, length now 44
1783 06:44:53.173219 ACPI: * MCFG
1784 06:44:53.176642 ACPI: added table 3/32, length now 48
1785 06:44:53.179466 ACPI: * TPM2
1786 06:44:53.183374 TPM2 log created at 99a2d000
1787 06:44:53.186020 ACPI: added table 4/32, length now 52
1788 06:44:53.186129 ACPI: * MADT
1789 06:44:53.189348 SCI is IRQ9
1790 06:44:53.192847 ACPI: added table 5/32, length now 56
1791 06:44:53.192930 current = 99b43ac0
1792 06:44:53.196433 ACPI: * DMAR
1793 06:44:53.199498 ACPI: added table 6/32, length now 60
1794 06:44:53.202650 ACPI: * IGD OpRegion
1795 06:44:53.202733 GMA: Found VBT in CBFS
1796 06:44:53.206086 GMA: Found valid VBT in CBFS
1797 06:44:53.209151 ACPI: added table 7/32, length now 64
1798 06:44:53.213254 ACPI: * HPET
1799 06:44:53.216032 ACPI: added table 8/32, length now 68
1800 06:44:53.216115 ACPI: done.
1801 06:44:53.219546 ACPI tables: 31744 bytes.
1802 06:44:53.222713 smbios_write_tables: 99a2c000
1803 06:44:53.226321 EC returned error result code 3
1804 06:44:53.229928 Couldn't obtain OEM name from CBI
1805 06:44:53.232823 Create SMBIOS type 17
1806 06:44:53.236427 PCI: 00:00.0 (Intel Cannonlake)
1807 06:44:53.239535 PCI: 00:14.3 (Intel WiFi)
1808 06:44:53.243122 SMBIOS tables: 939 bytes.
1809 06:44:53.246571 Writing table forward entry at 0x00000500
1810 06:44:53.252640 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 06:44:53.256024 Writing coreboot table at 0x99b62000
1812 06:44:53.262363 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 06:44:53.265735 1. 0000000000001000-000000000009ffff: RAM
1814 06:44:53.269179 2. 00000000000a0000-00000000000fffff: RESERVED
1815 06:44:53.276016 3. 0000000000100000-0000000099a2bfff: RAM
1816 06:44:53.279389 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 06:44:53.285677 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 06:44:53.292422 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 06:44:53.295780 7. 000000009a000000-000000009f7fffff: RESERVED
1820 06:44:53.302179 8. 00000000e0000000-00000000efffffff: RESERVED
1821 06:44:53.305511 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 06:44:53.308969 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 06:44:53.315817 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 06:44:53.318898 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 06:44:53.325288 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 06:44:53.328904 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 06:44:53.335537 15. 0000000100000000-000000045e7fffff: RAM
1828 06:44:53.338707 Graphics framebuffer located at 0xc0000000
1829 06:44:53.341832 Passing 5 GPIOs to payload:
1830 06:44:53.345541 NAME | PORT | POLARITY | VALUE
1831 06:44:53.351710 write protect | undefined | high | low
1832 06:44:53.355209 lid | undefined | high | high
1833 06:44:53.361974 power | undefined | high | low
1834 06:44:53.368808 oprom | undefined | high | low
1835 06:44:53.371617 EC in RW | 0x000000cb | high | low
1836 06:44:53.374927 Board ID: 4
1837 06:44:53.378340 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 06:44:53.381753 CBFS @ c08000 size 3f8000
1839 06:44:53.388171 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 06:44:53.395078 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1841 06:44:53.395162 coreboot table: 1492 bytes.
1842 06:44:53.398362 IMD ROOT 0. 99fff000 00001000
1843 06:44:53.401911 IMD SMALL 1. 99ffe000 00001000
1844 06:44:53.405210 FSP MEMORY 2. 99c4e000 003b0000
1845 06:44:53.408666 CONSOLE 3. 99c2e000 00020000
1846 06:44:53.411373 FMAP 4. 99c2d000 0000054e
1847 06:44:53.414824 TIME STAMP 5. 99c2c000 00000910
1848 06:44:53.418425 VBOOT WORK 6. 99c18000 00014000
1849 06:44:53.421919 MRC DATA 7. 99c16000 00001958
1850 06:44:53.425110 ROMSTG STCK 8. 99c15000 00001000
1851 06:44:53.428694 AFTER CAR 9. 99c0b000 0000a000
1852 06:44:53.431364 RAMSTAGE 10. 99baf000 0005c000
1853 06:44:53.434767 REFCODE 11. 99b7a000 00035000
1854 06:44:53.438036 SMM BACKUP 12. 99b6a000 00010000
1855 06:44:53.441443 COREBOOT 13. 99b62000 00008000
1856 06:44:53.444717 ACPI 14. 99b3e000 00024000
1857 06:44:53.448264 ACPI GNVS 15. 99b3d000 00001000
1858 06:44:53.451443 RAMOOPS 16. 99a3d000 00100000
1859 06:44:53.454815 TPM2 TCGLOG17. 99a2d000 00010000
1860 06:44:53.458234 SMBIOS 18. 99a2c000 00000800
1861 06:44:53.461838 IMD small region:
1862 06:44:53.464997 IMD ROOT 0. 99ffec00 00000400
1863 06:44:53.468587 FSP RUNTIME 1. 99ffebe0 00000004
1864 06:44:53.471627 EC HOSTEVENT 2. 99ffebc0 00000008
1865 06:44:53.474830 POWER STATE 3. 99ffeb80 00000040
1866 06:44:53.478484 ROMSTAGE 4. 99ffeb60 00000004
1867 06:44:53.481386 MEM INFO 5. 99ffe9a0 000001b9
1868 06:44:53.485115 VPD 6. 99ffe920 0000006c
1869 06:44:53.488265 MTRR: Physical address space:
1870 06:44:53.495015 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 06:44:53.501191 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 06:44:53.507625 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 06:44:53.514570 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 06:44:53.520833 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 06:44:53.527637 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 06:44:53.534613 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 06:44:53.537839 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 06:44:53.540944 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 06:44:53.544191 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 06:44:53.547832 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 06:44:53.554338 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 06:44:53.557503 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 06:44:53.560662 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 06:44:53.563888 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 06:44:53.570691 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 06:44:53.573716 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 06:44:53.577114 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 06:44:53.580386 call enable_fixed_mtrr()
1889 06:44:53.583894 CPU physical address size: 39 bits
1890 06:44:53.590540 MTRR: default type WB/UC MTRR counts: 6/8.
1891 06:44:53.593618 MTRR: WB selected as default type.
1892 06:44:53.596932 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 06:44:53.603861 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 06:44:53.610475 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 06:44:53.617044 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 06:44:53.623234 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 06:44:53.630382 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 06:44:53.633010 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 06:44:53.640003 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 06:44:53.643379 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 06:44:53.646148 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 06:44:53.649670 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 06:44:53.656675 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 06:44:53.659654 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 06:44:53.662878 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 06:44:53.666522 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 06:44:53.673120 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 06:44:53.675838 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 06:44:53.675921
1910 06:44:53.675987 MTRR check
1911 06:44:53.679217 Fixed MTRRs : Enabled
1912 06:44:53.682981 Variable MTRRs: Enabled
1913 06:44:53.683065
1914 06:44:53.686072 call enable_fixed_mtrr()
1915 06:44:53.689593 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1916 06:44:53.692690 CPU physical address size: 39 bits
1917 06:44:53.699390 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1918 06:44:53.702906 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 06:44:53.706396 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 06:44:53.713107 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 06:44:53.716306 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 06:44:53.719440 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 06:44:53.722749 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 06:44:53.729127 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 06:44:53.732870 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 06:44:53.736234 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 06:44:53.739049 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 06:44:53.742405 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 06:44:53.749194 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 06:44:53.752615 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 06:44:53.756205 call enable_fixed_mtrr()
1932 06:44:53.758891 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 06:44:53.762389 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 06:44:53.769385 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 06:44:53.772421 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 06:44:53.775914 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 06:44:53.778820 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 06:44:53.782445 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 06:44:53.789196 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 06:44:53.792514 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 06:44:53.795929 CPU physical address size: 39 bits
1942 06:44:53.799143 call enable_fixed_mtrr()
1943 06:44:53.802424 CBFS @ c08000 size 3f8000
1944 06:44:53.805862 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1945 06:44:53.812102 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 06:44:53.815403 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 06:44:53.818828 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 06:44:53.821733 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 06:44:53.828616 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 06:44:53.832098 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 06:44:53.835416 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 06:44:53.838534 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 06:44:53.844866 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 06:44:53.848530 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 06:44:53.851641 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 06:44:53.854795 MTRR: Fixed MSR 0x250 0x0606060606060606
1957 06:44:53.858275 call enable_fixed_mtrr()
1958 06:44:53.861461 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 06:44:53.868281 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 06:44:53.871787 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 06:44:53.875044 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 06:44:53.878402 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 06:44:53.885243 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 06:44:53.888015 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 06:44:53.891495 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 06:44:53.895010 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 06:44:53.901364 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 06:44:53.904832 CPU physical address size: 39 bits
1969 06:44:53.908406 call enable_fixed_mtrr()
1970 06:44:53.911671 CBFS: Locating 'fallback/payload'
1971 06:44:53.914648 CPU physical address size: 39 bits
1972 06:44:53.917808 CBFS: Found @ offset 1c96c0 size 3f798
1973 06:44:53.921162 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 06:44:53.924649 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 06:44:53.931397 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 06:44:53.934604 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 06:44:53.937879 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 06:44:53.941341 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 06:44:53.944893 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 06:44:53.951150 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 06:44:53.954299 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 06:44:53.957690 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 06:44:53.961046 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 06:44:53.967670 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 06:44:53.970990 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 06:44:53.974420 call enable_fixed_mtrr()
1987 06:44:53.977784 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 06:44:53.980649 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 06:44:53.984275 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 06:44:53.991278 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 06:44:53.993812 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 06:44:53.997324 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 06:44:54.000745 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 06:44:54.007084 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 06:44:54.010759 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 06:44:54.014043 CPU physical address size: 39 bits
1997 06:44:54.017492 call enable_fixed_mtrr()
1998 06:44:54.020382 CPU physical address size: 39 bits
1999 06:44:54.023729 Checking segment from ROM address 0xffdd16f8
2000 06:44:54.026999 CPU physical address size: 39 bits
2001 06:44:54.033542 Checking segment from ROM address 0xffdd1714
2002 06:44:54.036867 Loading segment from ROM address 0xffdd16f8
2003 06:44:54.040118 code (compression=0)
2004 06:44:54.047291 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 06:44:54.056799 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 06:44:54.059968 it's not compressed!
2007 06:44:54.150712 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 06:44:54.157793 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 06:44:54.160556 Loading segment from ROM address 0xffdd1714
2010 06:44:54.164443 Entry Point 0x30000000
2011 06:44:54.167780 Loaded segments
2012 06:44:54.173119 Finalizing chipset.
2013 06:44:54.176502 Finalizing SMM.
2014 06:44:54.179959 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2015 06:44:54.183375 mp_park_aps done after 0 msecs.
2016 06:44:54.189687 Jumping to boot code at 30000000(99b62000)
2017 06:44:54.196270 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 06:44:54.196406
2019 06:44:54.196474
2020 06:44:54.196536
2021 06:44:54.199350 Starting depthcharge on Helios...
2022 06:44:54.199456
2023 06:44:54.199856 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 06:44:54.199987 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 06:44:54.200101 Setting prompt string to ['hatch:']
2026 06:44:54.200212 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 06:44:54.209479 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 06:44:54.209631
2029 06:44:54.216526 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 06:44:54.216617
2031 06:44:54.222563 board_setup: Info: eMMC controller not present; skipping
2032 06:44:54.222668
2033 06:44:54.225991 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 06:44:54.226093
2035 06:44:54.232943 board_setup: Info: SDHCI controller not present; skipping
2036 06:44:54.233048
2037 06:44:54.239200 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 06:44:54.239317
2039 06:44:54.239411 Wipe memory regions:
2040 06:44:54.239501
2041 06:44:54.242714 [0x00000000001000, 0x000000000a0000)
2042 06:44:54.242814
2043 06:44:54.246152 [0x00000000100000, 0x00000030000000)
2044 06:44:54.311840
2045 06:44:54.314840 [0x00000030657430, 0x00000099a2c000)
2046 06:44:54.452114
2047 06:44:54.455564 [0x00000100000000, 0x0000045e800000)
2048 06:44:55.838115
2049 06:44:55.838267 R8152: Initializing
2050 06:44:55.838334
2051 06:44:55.841184 Version 9 (ocp_data = 6010)
2052 06:44:55.845908
2053 06:44:55.846014 R8152: Done initializing
2054 06:44:55.846080
2055 06:44:55.849240 Adding net device
2056 06:44:56.331965
2057 06:44:56.332117 R8152: Initializing
2058 06:44:56.332187
2059 06:44:56.335178 Version 6 (ocp_data = 5c30)
2060 06:44:56.335260
2061 06:44:56.338717 R8152: Done initializing
2062 06:44:56.338800
2063 06:44:56.341416 net_add_device: Attemp to include the same device
2064 06:44:56.345649
2065 06:44:56.352443 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 06:44:56.352525
2067 06:44:56.352589
2068 06:44:56.352649
2069 06:44:56.352928 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 06:44:56.453272 hatch: tftpboot 192.168.201.1 12243170/tftp-deploy-uq_fmhg9/kernel/bzImage 12243170/tftp-deploy-uq_fmhg9/kernel/cmdline 12243170/tftp-deploy-uq_fmhg9/ramdisk/ramdisk.cpio.gz
2072 06:44:56.453405 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 06:44:56.453510 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 06:44:56.458017 tftpboot 192.168.201.1 12243170/tftp-deploy-uq_fmhg9/kernel/bzImploy-uq_fmhg9/kernel/cmdline 12243170/tftp-deploy-uq_fmhg9/ramdisk/ramdisk.cpio.gz
2075 06:44:56.458102
2076 06:44:56.458165 Waiting for link
2077 06:44:56.659162
2078 06:44:56.659307 done.
2079 06:44:56.659376
2080 06:44:56.659437 MAC: 00:24:32:50:19:be
2081 06:44:56.659496
2082 06:44:56.662267 Sending DHCP discover... done.
2083 06:44:56.662351
2084 06:44:56.665313 Waiting for reply... done.
2085 06:44:56.665395
2086 06:44:56.668256 Sending DHCP request... done.
2087 06:44:56.668383
2088 06:44:56.675281 Waiting for reply... done.
2089 06:44:56.675364
2090 06:44:56.675428 My ip is 192.168.201.15
2091 06:44:56.675488
2092 06:44:56.678749 The DHCP server ip is 192.168.201.1
2093 06:44:56.678831
2094 06:44:56.684997 TFTP server IP predefined by user: 192.168.201.1
2095 06:44:56.685079
2096 06:44:56.691828 Bootfile predefined by user: 12243170/tftp-deploy-uq_fmhg9/kernel/bzImage
2097 06:44:56.691911
2098 06:44:56.695229 Sending tftp read request... done.
2099 06:44:56.695310
2100 06:44:56.698266 Waiting for the transfer...
2101 06:44:56.698348
2102 06:44:57.239832 00000000 ################################################################
2103 06:44:57.239985
2104 06:44:57.769806 00080000 ################################################################
2105 06:44:57.769983
2106 06:44:58.313116 00100000 ################################################################
2107 06:44:58.313285
2108 06:44:58.900164 00180000 ################################################################
2109 06:44:58.900663
2110 06:44:59.518903 00200000 ################################################################
2111 06:44:59.519355
2112 06:45:00.113098 00280000 ################################################################
2113 06:45:00.113248
2114 06:45:00.663339 00300000 ################################################################
2115 06:45:00.663486
2116 06:45:01.213352 00380000 ################################################################
2117 06:45:01.213489
2118 06:45:01.760100 00400000 ################################################################
2119 06:45:01.760238
2120 06:45:02.304885 00480000 ################################################################
2121 06:45:02.305020
2122 06:45:02.851115 00500000 ################################################################
2123 06:45:02.851256
2124 06:45:03.386826 00580000 ################################################################
2125 06:45:03.386970
2126 06:45:03.930548 00600000 ################################################################
2127 06:45:03.930685
2128 06:45:04.463293 00680000 ################################################################
2129 06:45:04.463427
2130 06:45:05.056603 00700000 ################################################################
2131 06:45:05.056743
2132 06:45:05.585937 00780000 ################################################################
2133 06:45:05.586076
2134 06:45:05.772577 00800000 ####################### done.
2135 06:45:05.772716
2136 06:45:05.775960 The bootfile was 8576912 bytes long.
2137 06:45:05.776044
2138 06:45:05.779311 Sending tftp read request... done.
2139 06:45:05.779395
2140 06:45:05.782811 Waiting for the transfer...
2141 06:45:05.782894
2142 06:45:06.337353 00000000 ################################################################
2143 06:45:06.337493
2144 06:45:06.897294 00080000 ################################################################
2145 06:45:06.897431
2146 06:45:07.439162 00100000 ################################################################
2147 06:45:07.439304
2148 06:45:07.978068 00180000 ################################################################
2149 06:45:07.978228
2150 06:45:08.531183 00200000 ################################################################
2151 06:45:08.531320
2152 06:45:09.077302 00280000 ################################################################
2153 06:45:09.077464
2154 06:45:09.641955 00300000 ################################################################
2155 06:45:09.642137
2156 06:45:10.204440 00380000 ################################################################
2157 06:45:10.204613
2158 06:45:10.748080 00400000 ################################################################
2159 06:45:10.748216
2160 06:45:11.332838 00480000 ################################################################
2161 06:45:11.333010
2162 06:45:11.951266 00500000 ############################################################### done.
2163 06:45:11.951703
2164 06:45:11.954362 Sending tftp read request... done.
2165 06:45:11.954723
2166 06:45:11.957406 Waiting for the transfer...
2167 06:45:11.957762
2168 06:45:11.958042 00000000 # done.
2169 06:45:11.958309
2170 06:45:11.967347 Command line loaded dynamically from TFTP file: 12243170/tftp-deploy-uq_fmhg9/kernel/cmdline
2171 06:45:11.967715
2172 06:45:11.997821 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12243170/extract-nfsrootfs-vwkojy4s,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2173 06:45:11.998199
2174 06:45:12.000643 ec_init(0): CrosEC protocol v3 supported (256, 256)
2175 06:45:12.006947
2176 06:45:12.010604 Shutting down all USB controllers.
2177 06:45:12.010972
2178 06:45:12.011260 Removing current net device
2179 06:45:12.014392
2180 06:45:12.014754 Finalizing coreboot
2181 06:45:12.015045
2182 06:45:12.020864 Exiting depthcharge with code 4 at timestamp: 25146802
2183 06:45:12.021244
2184 06:45:12.021557
2185 06:45:12.021855 Starting kernel ...
2186 06:45:12.022122
2187 06:45:12.022400
2188 06:45:12.023435 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2189 06:45:12.023878 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2190 06:45:12.024230 Setting prompt string to ['Linux version [0-9]']
2191 06:45:12.024622 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2192 06:45:12.025094 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2194 06:49:36.024154 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2196 06:49:36.024465 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2198 06:49:36.024637 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2201 06:49:36.024945 end: 2 depthcharge-action (duration 00:05:00) [common]
2203 06:49:36.025302 Cleaning after the job
2204 06:49:36.025431 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243170/tftp-deploy-uq_fmhg9/ramdisk
2205 06:49:36.026439 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243170/tftp-deploy-uq_fmhg9/kernel
2206 06:49:36.027956 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243170/tftp-deploy-uq_fmhg9/nfsrootfs
2207 06:49:36.124093 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243170/tftp-deploy-uq_fmhg9/modules
2208 06:49:36.124666 start: 4.1 power-off (timeout 00:00:30) [common]
2209 06:49:36.124839 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2210 06:49:36.202115 >> Command sent successfully.
2211 06:49:36.204683 Returned 0 in 0 seconds
2212 06:49:36.305082 end: 4.1 power-off (duration 00:00:00) [common]
2214 06:49:36.305418 start: 4.2 read-feedback (timeout 00:10:00) [common]
2215 06:49:36.305689 Listened to connection for namespace 'common' for up to 1s
2217 06:49:36.306065 Listened to connection for namespace 'common' for up to 1s
2218 06:49:37.306648 Finalising connection for namespace 'common'
2219 06:49:37.306824 Disconnecting from shell: Finalise
2220 06:49:37.306907
2221 06:49:37.407255 end: 4.2 read-feedback (duration 00:00:01) [common]
2222 06:49:37.407397 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12243170
2223 06:49:37.970469 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12243170
2224 06:49:37.970661 JobError: Your job cannot terminate cleanly.