Boot log: dell-latitude-5400-8665U-sarien
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 06:41:02.278401 lava-dispatcher, installed at version: 2023.10
2 06:41:02.278633 start: 0 validate
3 06:41:02.278783 Start time: 2023-12-11 06:41:02.278772+00:00 (UTC)
4 06:41:02.278927 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:41:02.279081 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 06:41:02.554257 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:41:02.554963 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1988-gdf21aeeacf3cd%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:41:02.807268 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:41:02.808021 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1988-gdf21aeeacf3cd%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 06:41:03.064945 validate duration: 0.79
12 06:41:03.065360 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:41:03.065501 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:41:03.065601 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:41:03.065758 Not decompressing ramdisk as can be used compressed.
16 06:41:03.065858 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 06:41:03.065934 saving as /var/lib/lava/dispatcher/tmp/12243183/tftp-deploy-ssfl5h43/ramdisk/rootfs.cpio.gz
18 06:41:03.066019 total size: 8418130 (8 MB)
19 06:41:03.067201 progress 0 % (0 MB)
20 06:41:03.069886 progress 5 % (0 MB)
21 06:41:03.072504 progress 10 % (0 MB)
22 06:41:03.075132 progress 15 % (1 MB)
23 06:41:03.077794 progress 20 % (1 MB)
24 06:41:03.080400 progress 25 % (2 MB)
25 06:41:03.083005 progress 30 % (2 MB)
26 06:41:03.085424 progress 35 % (2 MB)
27 06:41:03.088072 progress 40 % (3 MB)
28 06:41:03.090692 progress 45 % (3 MB)
29 06:41:03.093310 progress 50 % (4 MB)
30 06:41:03.095893 progress 55 % (4 MB)
31 06:41:03.098475 progress 60 % (4 MB)
32 06:41:03.100844 progress 65 % (5 MB)
33 06:41:03.103381 progress 70 % (5 MB)
34 06:41:03.105994 progress 75 % (6 MB)
35 06:41:03.108577 progress 80 % (6 MB)
36 06:41:03.111124 progress 85 % (6 MB)
37 06:41:03.113708 progress 90 % (7 MB)
38 06:41:03.116281 progress 95 % (7 MB)
39 06:41:03.118759 progress 100 % (8 MB)
40 06:41:03.119062 8 MB downloaded in 0.05 s (151.35 MB/s)
41 06:41:03.119285 end: 1.1.1 http-download (duration 00:00:00) [common]
43 06:41:03.119582 end: 1.1 download-retry (duration 00:00:00) [common]
44 06:41:03.119684 start: 1.2 download-retry (timeout 00:10:00) [common]
45 06:41:03.119783 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 06:41:03.119958 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1988-gdf21aeeacf3cd/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 06:41:03.120084 saving as /var/lib/lava/dispatcher/tmp/12243183/tftp-deploy-ssfl5h43/kernel/bzImage
48 06:41:03.120186 total size: 8576912 (8 MB)
49 06:41:03.120295 No compression specified
50 06:41:03.121519 progress 0 % (0 MB)
51 06:41:03.124283 progress 5 % (0 MB)
52 06:41:03.126944 progress 10 % (0 MB)
53 06:41:03.129664 progress 15 % (1 MB)
54 06:41:03.132303 progress 20 % (1 MB)
55 06:41:03.134914 progress 25 % (2 MB)
56 06:41:03.137589 progress 30 % (2 MB)
57 06:41:03.140145 progress 35 % (2 MB)
58 06:41:03.142715 progress 40 % (3 MB)
59 06:41:03.145291 progress 45 % (3 MB)
60 06:41:03.147809 progress 50 % (4 MB)
61 06:41:03.150352 progress 55 % (4 MB)
62 06:41:03.153054 progress 60 % (4 MB)
63 06:41:03.155531 progress 65 % (5 MB)
64 06:41:03.158025 progress 70 % (5 MB)
65 06:41:03.160551 progress 75 % (6 MB)
66 06:41:03.163024 progress 80 % (6 MB)
67 06:41:03.165541 progress 85 % (6 MB)
68 06:41:03.168040 progress 90 % (7 MB)
69 06:41:03.170593 progress 95 % (7 MB)
70 06:41:03.173129 progress 100 % (8 MB)
71 06:41:03.173362 8 MB downloaded in 0.05 s (153.83 MB/s)
72 06:41:03.173522 end: 1.2.1 http-download (duration 00:00:00) [common]
74 06:41:03.173772 end: 1.2 download-retry (duration 00:00:00) [common]
75 06:41:03.173877 start: 1.3 download-retry (timeout 00:10:00) [common]
76 06:41:03.173972 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 06:41:03.174125 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1988-gdf21aeeacf3cd/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 06:41:03.174202 saving as /var/lib/lava/dispatcher/tmp/12243183/tftp-deploy-ssfl5h43/modules/modules.tar
79 06:41:03.174275 total size: 250896 (0 MB)
80 06:41:03.174363 Using unxz to decompress xz
81 06:41:03.178736 progress 13 % (0 MB)
82 06:41:03.179199 progress 26 % (0 MB)
83 06:41:03.179484 progress 39 % (0 MB)
84 06:41:03.181293 progress 52 % (0 MB)
85 06:41:03.183422 progress 65 % (0 MB)
86 06:41:03.185598 progress 78 % (0 MB)
87 06:41:03.187548 progress 91 % (0 MB)
88 06:41:03.189712 progress 100 % (0 MB)
89 06:41:03.195716 0 MB downloaded in 0.02 s (11.16 MB/s)
90 06:41:03.195982 end: 1.3.1 http-download (duration 00:00:00) [common]
92 06:41:03.196363 end: 1.3 download-retry (duration 00:00:00) [common]
93 06:41:03.196476 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 06:41:03.196591 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 06:41:03.196700 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 06:41:03.196798 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 06:41:03.197043 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h
98 06:41:03.197198 makedir: /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin
99 06:41:03.197319 makedir: /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/tests
100 06:41:03.197428 makedir: /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/results
101 06:41:03.197558 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-add-keys
102 06:41:03.197721 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-add-sources
103 06:41:03.197879 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-background-process-start
104 06:41:03.198026 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-background-process-stop
105 06:41:03.198166 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-common-functions
106 06:41:03.198318 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-echo-ipv4
107 06:41:03.198461 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-install-packages
108 06:41:03.198603 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-installed-packages
109 06:41:03.198742 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-os-build
110 06:41:03.198900 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-probe-channel
111 06:41:03.199041 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-probe-ip
112 06:41:03.199187 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-target-ip
113 06:41:03.199327 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-target-mac
114 06:41:03.199484 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-target-storage
115 06:41:03.199625 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-test-case
116 06:41:03.199765 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-test-event
117 06:41:03.199914 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-test-feedback
118 06:41:03.200054 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-test-raise
119 06:41:03.200193 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-test-reference
120 06:41:03.200348 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-test-runner
121 06:41:03.200502 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-test-set
122 06:41:03.200646 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-test-shell
123 06:41:03.200791 Updating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-install-packages (oe)
124 06:41:03.200972 Updating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/bin/lava-installed-packages (oe)
125 06:41:03.201118 Creating /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/environment
126 06:41:03.201229 LAVA metadata
127 06:41:03.201314 - LAVA_JOB_ID=12243183
128 06:41:03.201387 - LAVA_DISPATCHER_IP=192.168.201.1
129 06:41:03.201511 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 06:41:03.201592 skipped lava-vland-overlay
131 06:41:03.201675 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 06:41:03.201762 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 06:41:03.201831 skipped lava-multinode-overlay
134 06:41:03.201911 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 06:41:03.202003 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 06:41:03.202104 Loading test definitions
137 06:41:03.202211 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 06:41:03.202306 Using /lava-12243183 at stage 0
139 06:41:03.202680 uuid=12243183_1.4.2.3.1 testdef=None
140 06:41:03.202779 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 06:41:03.202876 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 06:41:03.203483 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 06:41:03.203749 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 06:41:03.204503 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 06:41:03.204777 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 06:41:03.205483 runner path: /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/0/tests/0_dmesg test_uuid 12243183_1.4.2.3.1
149 06:41:03.205656 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 06:41:03.205933 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 06:41:03.206012 Using /lava-12243183 at stage 1
153 06:41:03.206386 uuid=12243183_1.4.2.3.5 testdef=None
154 06:41:03.206518 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 06:41:03.206627 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 06:41:03.207170 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 06:41:03.207431 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 06:41:03.208167 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 06:41:03.208442 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 06:41:03.209290 runner path: /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/1/tests/1_bootrr test_uuid 12243183_1.4.2.3.5
163 06:41:03.209505 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 06:41:03.209732 Creating lava-test-runner.conf files
166 06:41:03.209801 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/0 for stage 0
167 06:41:03.209901 - 0_dmesg
168 06:41:03.210009 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243183/lava-overlay-w4l_ld9h/lava-12243183/1 for stage 1
169 06:41:03.210154 - 1_bootrr
170 06:41:03.210263 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 06:41:03.210359 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 06:41:03.220516 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 06:41:03.220669 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 06:41:03.220766 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 06:41:03.220861 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 06:41:03.220956 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 06:41:03.507743 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 06:41:03.508173 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 06:41:03.508313 extracting modules file /var/lib/lava/dispatcher/tmp/12243183/tftp-deploy-ssfl5h43/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243183/extract-overlay-ramdisk-49osjha6/ramdisk
180 06:41:03.524131 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 06:41:03.524301 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 06:41:03.524411 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243183/compress-overlay-j35rpmzf/overlay-1.4.2.4.tar.gz to ramdisk
183 06:41:03.524492 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243183/compress-overlay-j35rpmzf/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243183/extract-overlay-ramdisk-49osjha6/ramdisk
184 06:41:03.534854 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 06:41:03.535047 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 06:41:03.535154 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 06:41:03.535258 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 06:41:03.535345 Building ramdisk /var/lib/lava/dispatcher/tmp/12243183/extract-overlay-ramdisk-49osjha6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243183/extract-overlay-ramdisk-49osjha6/ramdisk
189 06:41:03.684006 >> 49788 blocks
190 06:41:04.623912 rename /var/lib/lava/dispatcher/tmp/12243183/extract-overlay-ramdisk-49osjha6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243183/tftp-deploy-ssfl5h43/ramdisk/ramdisk.cpio.gz
191 06:41:04.624392 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 06:41:04.624526 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 06:41:04.624655 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 06:41:04.624761 No mkimage arch provided, not using FIT.
195 06:41:04.624861 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 06:41:04.624953 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 06:41:04.625080 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 06:41:04.625191 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 06:41:04.625285 No LXC device requested
200 06:41:04.625375 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 06:41:04.625472 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 06:41:04.625576 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 06:41:04.625660 Checking files for TFTP limit of 4294967296 bytes.
204 06:41:04.626101 end: 1 tftp-deploy (duration 00:00:02) [common]
205 06:41:04.626216 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 06:41:04.626314 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 06:41:04.626447 substitutions:
208 06:41:04.626519 - {DTB}: None
209 06:41:04.626589 - {INITRD}: 12243183/tftp-deploy-ssfl5h43/ramdisk/ramdisk.cpio.gz
210 06:41:04.626655 - {KERNEL}: 12243183/tftp-deploy-ssfl5h43/kernel/bzImage
211 06:41:04.626720 - {LAVA_MAC}: None
212 06:41:04.626782 - {PRESEED_CONFIG}: None
213 06:41:04.626844 - {PRESEED_LOCAL}: None
214 06:41:04.626904 - {RAMDISK}: 12243183/tftp-deploy-ssfl5h43/ramdisk/ramdisk.cpio.gz
215 06:41:04.626966 - {ROOT_PART}: None
216 06:41:04.627026 - {ROOT}: None
217 06:41:04.627085 - {SERVER_IP}: 192.168.201.1
218 06:41:04.627145 - {TEE}: None
219 06:41:04.627204 Parsed boot commands:
220 06:41:04.627264 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 06:41:04.627459 Parsed boot commands: tftpboot 192.168.201.1 12243183/tftp-deploy-ssfl5h43/kernel/bzImage 12243183/tftp-deploy-ssfl5h43/kernel/cmdline 12243183/tftp-deploy-ssfl5h43/ramdisk/ramdisk.cpio.gz
222 06:41:04.627582 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 06:41:04.627675 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 06:41:04.627780 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 06:41:04.627875 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 06:41:04.627955 Not connected, no need to disconnect.
227 06:41:04.628037 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 06:41:04.628130 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 06:41:04.628202 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-0'
230 06:41:04.632630 Setting prompt string to ['lava-test: # ']
231 06:41:04.633041 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 06:41:04.633163 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 06:41:04.633275 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 06:41:04.633379 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 06:41:04.633625 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=reboot'
236 06:41:21.541754 >> Command sent successfully.
237 06:41:21.544371 Returned 0 in 16 seconds
238 06:41:21.644779 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 06:41:21.645146 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 06:41:21.645263 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 06:41:21.645363 Setting prompt string to 'Starting depthcharge on sarien...'
243 06:41:21.645446 Changing prompt to 'Starting depthcharge on sarien...'
244 06:41:21.645522 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 06:41:21.645827 [Enter `^Ec?' for help]
246 06:41:21.645917
247 06:41:21.645995
248 06:41:21.646064 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 06:41:21.646135 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
250 06:41:21.646201 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 06:41:21.646263 CPU: AES supported, TXT supported, VT supported
252 06:41:21.646324 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
253 06:41:21.646385 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 06:41:21.646446 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
255 06:41:21.646507 VBOOT: Loading verstage.
256 06:41:21.646569 CBFS @ 1d00000 size 300000
257 06:41:21.646630 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 06:41:21.646690 CBFS: Locating 'fallback/verstage'
259 06:41:21.646751 CBFS: Found @ offset 10f6c0 size 1435c
260 06:41:21.646810
261 06:41:21.646869
262 06:41:21.646929 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 06:41:21.646989 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 06:41:21.647049 done! DID_VID 0x00281ae0
265 06:41:21.647109 TPM ready after 0 ms
266 06:41:21.647169 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 06:41:21.647229 tlcl_send_startup: Startup return code is 0
268 06:41:21.647288 TPM: setup succeeded
269 06:41:21.647348 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 06:41:21.647408 Checking cr50 for recovery request
271 06:41:21.647482 Phase 1
272 06:41:21.647543 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 06:41:21.647603 FMAP: base = fe000000 size = 2000000 #areas = 37
274 06:41:21.647664 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 06:41:21.647725 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 06:41:21.647821 Phase 2
277 06:41:21.647914 Phase 3
278 06:41:21.648013 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 06:41:21.648108 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 06:41:21.648202 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
281 06:41:21.648297 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
282 06:41:21.648361 VB2:vb2_verify_keyblock() Checking key block signature...
283 06:41:21.648422 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
284 06:41:21.648483 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
285 06:41:21.648553 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 06:41:21.648615 Phase 4
287 06:41:21.648675 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
288 06:41:21.648736 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 06:41:21.648801 VB2:vb2_rsa_verify_digest() Digest check failed!
290 06:41:21.648862 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 06:41:21.648922 Saving nvdata
292 06:41:21.648981 Reboot requested (10020007)
293 06:41:21.649046 board_reset() called!
294 06:41:21.649106 full_reset() called!
295 06:41:25.753121
296 06:41:25.753660
297 06:41:25.761851 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 06:41:25.766339 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
299 06:41:25.770985 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 06:41:25.775611 CPU: AES supported, TXT supported, VT supported
301 06:41:25.780933 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
302 06:41:25.785508 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 06:41:25.791235 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
304 06:41:25.795031 VBOOT: Loading verstage.
305 06:41:25.797278 CBFS @ 1d00000 size 300000
306 06:41:25.804201 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 06:41:25.807421 CBFS: Locating 'fallback/verstage'
308 06:41:25.811458 CBFS: Found @ offset 10f6c0 size 1435c
309 06:41:25.826347
310 06:41:25.826777
311 06:41:25.834730 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 06:41:25.841506 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 06:41:25.962193 .done! DID_VID 0x00281ae0
314 06:41:25.965688 TPM ready after 0 ms
315 06:41:25.968779 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 06:41:26.064088 tlcl_send_startup: Startup return code is 0
317 06:41:26.065920 TPM: setup succeeded
318 06:41:26.083293 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 06:41:26.087265 Checking cr50 for recovery request
320 06:41:26.096118 Phase 1
321 06:41:26.100774 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 06:41:26.105274 FMAP: base = fe000000 size = 2000000 #areas = 37
323 06:41:26.110209 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 06:41:26.117387 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 06:41:26.123619 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 06:41:26.126780 Recovery requested (1009000e)
327 06:41:26.128688 Saving nvdata
328 06:41:26.143987 tlcl_extend: response is 0
329 06:41:26.157433 tlcl_extend: response is 0
330 06:41:26.161194 CBFS @ 1d00000 size 300000
331 06:41:26.168297 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 06:41:26.171532 CBFS: Locating 'fallback/romstage'
333 06:41:26.174736 CBFS: Found @ offset 80 size 15b2c
334 06:41:26.176729
335 06:41:26.177288
336 06:41:26.185299 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 06:41:26.189818 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 06:41:26.193779 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 06:41:26.198969 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 06:41:26.202903 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 06:41:26.207449 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 06:41:26.209483 TCO_STS: 0000 0004
343 06:41:26.212073 GEN_PMCON: d0015209 00002200
344 06:41:26.215231 GBLRST_CAUSE: 00000000 00000000
345 06:41:26.217006 prev_sleep_state 5
346 06:41:26.221344 Boot Count incremented to 37378
347 06:41:26.223926 CBFS @ 1d00000 size 300000
348 06:41:26.230598 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 06:41:26.232894 CBFS: Locating 'fspm.bin'
350 06:41:26.236680 CBFS: Found @ offset 60fc0 size 70000
351 06:41:26.242455 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 06:41:26.247130 FMAP: base = fe000000 size = 2000000 #areas = 37
353 06:41:26.252540 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 06:41:26.258885 Probing TPM I2C: done! DID_VID 0x00281ae0
355 06:41:26.261408 Locality already claimed
356 06:41:26.265252 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 06:41:26.285008 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 06:41:26.291213 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 06:41:26.294505 MRC cache found, size 18e0
360 06:41:26.295948 bootmode is set to :2
361 06:41:44.135806 CBMEM:
362 06:41:44.139721 IMD: root @ 89fff000 254 entries.
363 06:41:44.142523 IMD: root @ 89ffec00 62 entries.
364 06:41:44.145559 External stage cache:
365 06:41:44.149465 IMD: root @ 8abff000 254 entries.
366 06:41:44.152623 IMD: root @ 8abfec00 62 entries.
367 06:41:44.158355 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 06:41:44.162135 creating vboot_handoff structure
369 06:41:44.183523 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 06:41:44.243067 tlcl_write: response is 0
371 06:41:44.263628 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 06:41:44.267921 MRC: TPM MRC hash updated successfully.
373 06:41:44.269136 1 DIMMs found
374 06:41:44.272396 top_of_ram = 0x8a000000
375 06:41:44.276984 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 06:41:44.282095 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 06:41:44.284830 CBFS @ 1d00000 size 300000
378 06:41:44.291110 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 06:41:44.294092 CBFS: Locating 'fallback/postcar'
380 06:41:44.297891 CBFS: Found @ offset 107000 size 41a4
381 06:41:44.304273 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 06:41:44.314408 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 06:41:44.319184 Processing 126 relocs. Offset value of 0x87cdd000
384 06:41:44.322501
385 06:41:44.322589
386 06:41:44.330943 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 06:41:44.334024 CBFS @ 1d00000 size 300000
388 06:41:44.339738 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 06:41:44.343594 CBFS: Locating 'fallback/ramstage'
390 06:41:44.346990 CBFS: Found @ offset 458c0 size 1a8a8
391 06:41:44.353912 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 06:41:44.381396 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 06:41:44.386927 Processing 3754 relocs. Offset value of 0x88e81000
394 06:41:44.393422
395 06:41:44.393515
396 06:41:44.401216 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 06:41:44.406329 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 06:41:44.410850 FMAP: base = fe000000 size = 2000000 #areas = 37
399 06:41:44.416008 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 06:41:44.420008 WARNING: RO_VPD is uninitialized or empty.
401 06:41:44.424588 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 06:41:44.429495 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 06:41:44.430723 Normal boot.
404 06:41:44.438202 BS: BS_PRE_DEVICE times (us): entry 0 run 56 exit 1165
405 06:41:44.440116 CBFS @ 1d00000 size 300000
406 06:41:44.446494 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 06:41:44.450930 CBFS: Locating 'cpu_microcode_blob.bin'
408 06:41:44.454770 CBFS: Found @ offset 15c40 size 2fc00
409 06:41:44.458718 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 06:41:44.461235 Skip microcode update
411 06:41:44.463754 CBFS @ 1d00000 size 300000
412 06:41:44.470328 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 06:41:44.472358 CBFS: Locating 'fsps.bin'
414 06:41:44.476239 CBFS: Found @ offset d1fc0 size 35000
415 06:41:44.507340 Detected 4 core, 8 thread CPU.
416 06:41:44.508713 Setting up SMI for CPU
417 06:41:44.511113 IED base = 0x8ac00000
418 06:41:44.513084 IED size = 0x00400000
419 06:41:44.517003 Will perform SMM setup.
420 06:41:44.521605 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
421 06:41:44.528810 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 06:41:44.533725 Processing 16 relocs. Offset value of 0x00030000
423 06:41:44.537376 Attempting to start 7 APs
424 06:41:44.541076 Waiting for 10ms after sending INIT.
425 06:41:44.556494 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
426 06:41:44.557051 done.
427 06:41:44.559283 AP: slot 7 apic_id 3.
428 06:41:44.561900 AP: slot 6 apic_id 2.
429 06:41:44.563484 AP: slot 5 apic_id 7.
430 06:41:44.565540 AP: slot 4 apic_id 6.
431 06:41:44.569800 Waiting for 2nd SIPI to complete...done.
432 06:41:44.572049 AP: slot 1 apic_id 5.
433 06:41:44.574014 AP: slot 3 apic_id 4.
434 06:41:44.581907 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
435 06:41:44.587324 Processing 13 relocs. Offset value of 0x00038000
436 06:41:44.593052 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
437 06:41:44.597348 Installing SMM handler to 0x8a000000
438 06:41:44.605171 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
439 06:41:44.610955 Processing 867 relocs. Offset value of 0x8a010000
440 06:41:44.619349 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
441 06:41:44.623938 Processing 13 relocs. Offset value of 0x8a008000
442 06:41:44.629250 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
443 06:41:44.635428 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
444 06:41:44.641399 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
445 06:41:44.647155 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
446 06:41:44.652995 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
447 06:41:44.658193 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
448 06:41:44.664496 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
449 06:41:44.670256 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
450 06:41:44.674219 Clearing SMI status registers
451 06:41:44.675181 SMI_STS: PM1
452 06:41:44.678000 PM1_STS: WAK PWRBTN TMROF
453 06:41:44.680239 TCO_STS: BOOT SECOND_TO
454 06:41:44.682271 GPE0 STD STS: eSPI
455 06:41:44.685165 New SMBASE 0x8a000000
456 06:41:44.687794 In relocation handler: CPU 0
457 06:41:44.692205 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
458 06:41:44.697146 Writing SMRR. base = 0x8a000006, mask=0xff000800
459 06:41:44.699752 Relocation complete.
460 06:41:44.700952 New SMBASE 0x89fff800
461 06:41:44.704679 In relocation handler: CPU 2
462 06:41:44.708257 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
463 06:41:44.712937 Writing SMRR. base = 0x8a000006, mask=0xff000800
464 06:41:44.715369 Relocation complete.
465 06:41:44.717186 New SMBASE 0x89fff000
466 06:41:44.720430 In relocation handler: CPU 4
467 06:41:44.724606 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
468 06:41:44.729340 Writing SMRR. base = 0x8a000006, mask=0xff000800
469 06:41:44.731380 Relocation complete.
470 06:41:44.734448 New SMBASE 0x89ffec00
471 06:41:44.737800 In relocation handler: CPU 5
472 06:41:44.741016 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
473 06:41:44.746148 Writing SMRR. base = 0x8a000006, mask=0xff000800
474 06:41:44.748093 Relocation complete.
475 06:41:44.750099 New SMBASE 0x89fffc00
476 06:41:44.753926 In relocation handler: CPU 1
477 06:41:44.757630 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
478 06:41:44.762789 Writing SMRR. base = 0x8a000006, mask=0xff000800
479 06:41:44.764740 Relocation complete.
480 06:41:44.766080 New SMBASE 0x89fff400
481 06:41:44.769879 In relocation handler: CPU 3
482 06:41:44.773777 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
483 06:41:44.778942 Writing SMRR. base = 0x8a000006, mask=0xff000800
484 06:41:44.780781 Relocation complete.
485 06:41:44.783165 New SMBASE 0x89ffe400
486 06:41:44.785946 In relocation handler: CPU 7
487 06:41:44.789704 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
488 06:41:44.795034 Writing SMRR. base = 0x8a000006, mask=0xff000800
489 06:41:44.796473 Relocation complete.
490 06:41:44.799262 New SMBASE 0x89ffe800
491 06:41:44.802387 In relocation handler: CPU 6
492 06:41:44.806284 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
493 06:41:44.810704 Writing SMRR. base = 0x8a000006, mask=0xff000800
494 06:41:44.813098 Relocation complete.
495 06:41:44.815264 Initializing CPU #0
496 06:41:44.818649 CPU: vendor Intel device 806ec
497 06:41:44.822342 CPU: family 06, model 8e, stepping 0c
498 06:41:44.824748 Clearing out pending MCEs
499 06:41:44.829347 Setting up local APIC... apic_id: 0x00 done.
500 06:41:44.832402 Turbo is available but hidden
501 06:41:44.834658 Turbo has been enabled
502 06:41:44.836818 VMX status: enabled
503 06:41:44.840192 IA32_FEATURE_CONTROL status: locked
504 06:41:44.842799 Skip microcode update
505 06:41:44.845410 CPU #0 initialized
506 06:41:44.847279 Initializing CPU #2
507 06:41:44.849260 Initializing CPU #3
508 06:41:44.852452 CPU: vendor Intel device 806ec
509 06:41:44.856362 CPU: family 06, model 8e, stepping 0c
510 06:41:44.858381 Clearing out pending MCEs
511 06:41:44.860835 Initializing CPU #7
512 06:41:44.862767 Initializing CPU #6
513 06:41:44.865870 CPU: vendor Intel device 806ec
514 06:41:44.869825 CPU: family 06, model 8e, stepping 0c
515 06:41:44.873093 CPU: vendor Intel device 806ec
516 06:41:44.876411 CPU: family 06, model 8e, stepping 0c
517 06:41:44.879050 Clearing out pending MCEs
518 06:41:44.880937 Clearing out pending MCEs
519 06:41:44.889471 Setting up local APIC...Setting up local APIC...CPU: vendor Intel device 806ec
520 06:41:44.893290 CPU: family 06, model 8e, stepping 0c
521 06:41:44.895204 Initializing CPU #1
522 06:41:44.898305 Clearing out pending MCEs
523 06:41:44.900768 CPU: vendor Intel device 806ec
524 06:41:44.904556 CPU: family 06, model 8e, stepping 0c
525 06:41:44.911628 Setting up local APIC...Setting up local APIC...Clearing out pending MCEs
526 06:41:44.914091 apic_id: 0x04 done.
527 06:41:44.919132 Setting up local APIC... apic_id: 0x01 done.
528 06:41:44.920897 VMX status: enabled
529 06:41:44.922856 apic_id: 0x05 done.
530 06:41:44.926313 IA32_FEATURE_CONTROL status: locked
531 06:41:44.928101 VMX status: enabled
532 06:41:44.931123 Skip microcode update
533 06:41:44.933823 IA32_FEATURE_CONTROL status: locked
534 06:41:44.935747 CPU #3 initialized
535 06:41:44.938640 Skip microcode update
536 06:41:44.940260 Initializing CPU #4
537 06:41:44.942701 Initializing CPU #5
538 06:41:44.944991 apic_id: 0x03 done.
539 06:41:44.947172 apic_id: 0x02 done.
540 06:41:44.948342 VMX status: enabled
541 06:41:44.951130 VMX status: enabled
542 06:41:44.954963 IA32_FEATURE_CONTROL status: locked
543 06:41:44.957841 IA32_FEATURE_CONTROL status: locked
544 06:41:44.959803 Skip microcode update
545 06:41:44.962501 Skip microcode update
546 06:41:44.964999 CPU #7 initialized
547 06:41:44.967049 CPU #6 initialized
548 06:41:44.968241 CPU #1 initialized
549 06:41:44.970255 VMX status: enabled
550 06:41:44.973418 CPU: vendor Intel device 806ec
551 06:41:44.977748 CPU: family 06, model 8e, stepping 0c
552 06:41:44.980501 CPU: vendor Intel device 806ec
553 06:41:44.984552 CPU: family 06, model 8e, stepping 0c
554 06:41:44.986594 Clearing out pending MCEs
555 06:41:44.989300 Clearing out pending MCEs
556 06:41:44.995324 Setting up local APIC...IA32_FEATURE_CONTROL status: locked
557 06:41:44.997645 apic_id: 0x07 done.
558 06:41:45.002088 Setting up local APIC...Skip microcode update
559 06:41:45.004735 VMX status: enabled
560 06:41:45.006740 apic_id: 0x06 done.
561 06:41:45.009835 IA32_FEATURE_CONTROL status: locked
562 06:41:45.011667 VMX status: enabled
563 06:41:45.013557 Skip microcode update
564 06:41:45.017350 IA32_FEATURE_CONTROL status: locked
565 06:41:45.019935 CPU #5 initialized
566 06:41:45.021981 Skip microcode update
567 06:41:45.023834 CPU #2 initialized
568 06:41:45.025685 CPU #4 initialized
569 06:41:45.030210 bsp_do_flight_plan done after 455 msecs.
570 06:41:45.033431 CPU: frequency set to 4800 MHz
571 06:41:45.034316 Enabling SMIs.
572 06:41:45.036056 Locking SMM.
573 06:41:45.039321 CBFS @ 1d00000 size 300000
574 06:41:45.045526 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
575 06:41:45.048024 CBFS: Locating 'vbt.bin'
576 06:41:45.052058 CBFS: Found @ offset 60a40 size 4a0
577 06:41:45.056006 Found a VBT of 4608 bytes after decompression
578 06:41:45.069405 FMAP: area GBB found @ 1c11000 (978944 bytes)
579 06:41:45.102241 Detected 4 core, 8 thread CPU.
580 06:41:45.105454 Detected 4 core, 8 thread CPU.
581 06:41:45.331548 Display FSP Version Info HOB
582 06:41:45.335382 Reference Code - CPU = 7.0.5e.40
583 06:41:45.337330 uCode Version = 0.0.0.b8
584 06:41:45.340235 Display FSP Version Info HOB
585 06:41:45.343554 Reference Code - ME = 7.0.5e.40
586 06:41:45.346496 MEBx version = 0.0.0.0
587 06:41:45.349873 ME Firmware Version = Consumer SKU
588 06:41:45.352528 Display FSP Version Info HOB
589 06:41:45.356442 Reference Code - CNL PCH = 7.0.5e.40
590 06:41:45.359061 PCH-CRID Status = Disabled
591 06:41:45.362909 CNL PCH H A0 Hsio Version = 2.0.0.0
592 06:41:45.365565 CNL PCH H Ax Hsio Version = 9.0.0.0
593 06:41:45.370139 CNL PCH H Bx Hsio Version = a.0.0.0
594 06:41:45.373315 CNL PCH LP B0 Hsio Version = 7.0.0.0
595 06:41:45.377316 CNL PCH LP Bx Hsio Version = 6.0.0.0
596 06:41:45.381163 CNL PCH LP Dx Hsio Version = 7.0.0.0
597 06:41:45.383829 Display FSP Version Info HOB
598 06:41:45.388940 Reference Code - SA - System Agent = 7.0.5e.40
599 06:41:45.392101 Reference Code - MRC = 0.7.1.68
600 06:41:45.394831 SA - PCIe Version = 7.0.5e.40
601 06:41:45.397499 SA-CRID Status = Disabled
602 06:41:45.400789 SA-CRID Original Value = 0.0.0.c
603 06:41:45.403301 SA-CRID New Value = 0.0.0.c
604 06:41:45.421990 RTC Init
605 06:41:45.425497 Set power off after power failure.
606 06:41:45.427204 Disabling Deep S3
607 06:41:45.428538 Disabling Deep S3
608 06:41:45.430950 Disabling Deep S4
609 06:41:45.432329 Disabling Deep S4
610 06:41:45.434556 Disabling Deep S5
611 06:41:45.436122 Disabling Deep S5
612 06:41:45.442911 BS: BS_DEV_INIT_CHIPS times (us): entry 598412 run 384216 exit 16217
613 06:41:45.445270 Enumerating buses...
614 06:41:45.449489 Show all devs... Before device enumeration.
615 06:41:45.451939 Root Device: enabled 1
616 06:41:45.454450 CPU_CLUSTER: 0: enabled 1
617 06:41:45.456678 DOMAIN: 0000: enabled 1
618 06:41:45.459078 APIC: 00: enabled 1
619 06:41:45.461260 PCI: 00:00.0: enabled 1
620 06:41:45.464198 PCI: 00:02.0: enabled 1
621 06:41:45.466683 PCI: 00:04.0: enabled 1
622 06:41:45.469416 PCI: 00:12.0: enabled 1
623 06:41:45.471362 PCI: 00:12.5: enabled 0
624 06:41:45.473369 PCI: 00:12.6: enabled 0
625 06:41:45.475933 PCI: 00:13.0: enabled 0
626 06:41:45.479087 PCI: 00:14.0: enabled 1
627 06:41:45.481574 PCI: 00:14.1: enabled 0
628 06:41:45.483999 PCI: 00:14.3: enabled 1
629 06:41:45.486222 PCI: 00:14.5: enabled 0
630 06:41:45.488484 PCI: 00:15.0: enabled 1
631 06:41:45.490427 PCI: 00:15.1: enabled 1
632 06:41:45.493732 PCI: 00:15.2: enabled 0
633 06:41:45.496102 PCI: 00:15.3: enabled 0
634 06:41:45.498090 PCI: 00:16.0: enabled 1
635 06:41:45.500657 PCI: 00:16.1: enabled 0
636 06:41:45.503332 PCI: 00:16.2: enabled 0
637 06:41:45.505893 PCI: 00:16.3: enabled 0
638 06:41:45.507858 PCI: 00:16.4: enabled 0
639 06:41:45.510901 PCI: 00:16.5: enabled 0
640 06:41:45.512767 PCI: 00:17.0: enabled 1
641 06:41:45.514758 PCI: 00:19.0: enabled 1
642 06:41:45.517919 PCI: 00:19.1: enabled 0
643 06:41:45.520521 PCI: 00:19.2: enabled 1
644 06:41:45.522468 PCI: 00:1a.0: enabled 0
645 06:41:45.524400 PCI: 00:1c.0: enabled 1
646 06:41:45.526955 PCI: 00:1c.1: enabled 0
647 06:41:45.530009 PCI: 00:1c.2: enabled 0
648 06:41:45.533049 PCI: 00:1c.3: enabled 0
649 06:41:45.534462 PCI: 00:1c.4: enabled 0
650 06:41:45.537056 PCI: 00:1c.5: enabled 0
651 06:41:45.539797 PCI: 00:1c.6: enabled 0
652 06:41:45.542368 PCI: 00:1c.7: enabled 1
653 06:41:45.544878 PCI: 00:1d.0: enabled 1
654 06:41:45.546749 PCI: 00:1d.1: enabled 1
655 06:41:45.549341 PCI: 00:1d.2: enabled 0
656 06:41:45.552006 PCI: 00:1d.3: enabled 0
657 06:41:45.554376 PCI: 00:1d.4: enabled 1
658 06:41:45.556600 PCI: 00:1e.0: enabled 0
659 06:41:45.558324 PCI: 00:1e.1: enabled 0
660 06:41:45.561578 PCI: 00:1e.2: enabled 0
661 06:41:45.564324 PCI: 00:1e.3: enabled 0
662 06:41:45.566114 PCI: 00:1f.0: enabled 1
663 06:41:45.568400 PCI: 00:1f.1: enabled 1
664 06:41:45.570666 PCI: 00:1f.2: enabled 1
665 06:41:45.573136 PCI: 00:1f.3: enabled 1
666 06:41:45.575829 PCI: 00:1f.4: enabled 1
667 06:41:45.578233 PCI: 00:1f.5: enabled 1
668 06:41:45.580459 PCI: 00:1f.6: enabled 1
669 06:41:45.583411 USB0 port 0: enabled 1
670 06:41:45.586124 I2C: 00:10: enabled 1
671 06:41:45.588126 I2C: 00:10: enabled 1
672 06:41:45.589469 I2C: 00:34: enabled 1
673 06:41:45.592405 I2C: 00:2c: enabled 1
674 06:41:45.594231 I2C: 00:50: enabled 1
675 06:41:45.597021 PNP: 0c09.0: enabled 1
676 06:41:45.599338 USB2 port 0: enabled 1
677 06:41:45.601058 USB2 port 1: enabled 1
678 06:41:45.603966 USB2 port 2: enabled 1
679 06:41:45.605782 USB2 port 4: enabled 1
680 06:41:45.607804 USB2 port 5: enabled 1
681 06:41:45.610686 USB2 port 6: enabled 1
682 06:41:45.613044 USB2 port 7: enabled 1
683 06:41:45.615596 USB2 port 8: enabled 1
684 06:41:45.618146 USB2 port 9: enabled 1
685 06:41:45.620705 USB3 port 0: enabled 1
686 06:41:45.622736 USB3 port 1: enabled 1
687 06:41:45.624756 USB3 port 2: enabled 1
688 06:41:45.627123 USB3 port 3: enabled 1
689 06:41:45.629301 USB3 port 4: enabled 1
690 06:41:45.631851 APIC: 05: enabled 1
691 06:41:45.633329 APIC: 01: enabled 1
692 06:41:45.635688 APIC: 04: enabled 1
693 06:41:45.637596 APIC: 06: enabled 1
694 06:41:45.640045 APIC: 07: enabled 1
695 06:41:45.641885 APIC: 02: enabled 1
696 06:41:45.643209 APIC: 03: enabled 1
697 06:41:45.645985 Compare with tree...
698 06:41:45.647946 Root Device: enabled 1
699 06:41:45.650338 CPU_CLUSTER: 0: enabled 1
700 06:41:45.653408 APIC: 00: enabled 1
701 06:41:45.655376 APIC: 05: enabled 1
702 06:41:45.657978 APIC: 01: enabled 1
703 06:41:45.660033 APIC: 04: enabled 1
704 06:41:45.662611 APIC: 06: enabled 1
705 06:41:45.664382 APIC: 07: enabled 1
706 06:41:45.666278 APIC: 02: enabled 1
707 06:41:45.668837 APIC: 03: enabled 1
708 06:41:45.671474 DOMAIN: 0000: enabled 1
709 06:41:45.674606 PCI: 00:00.0: enabled 1
710 06:41:45.675989 PCI: 00:02.0: enabled 1
711 06:41:45.678907 PCI: 00:04.0: enabled 1
712 06:41:45.681749 PCI: 00:12.0: enabled 1
713 06:41:45.684028 PCI: 00:12.5: enabled 0
714 06:41:45.686360 PCI: 00:12.6: enabled 0
715 06:41:45.689149 PCI: 00:13.0: enabled 0
716 06:41:45.691699 PCI: 00:14.0: enabled 1
717 06:41:45.694365 USB0 port 0: enabled 1
718 06:41:45.697302 USB2 port 0: enabled 1
719 06:41:45.700357 USB2 port 1: enabled 1
720 06:41:45.703358 USB2 port 2: enabled 1
721 06:41:45.705632 USB2 port 4: enabled 1
722 06:41:45.708608 USB2 port 5: enabled 1
723 06:41:45.711281 USB2 port 6: enabled 1
724 06:41:45.713981 USB2 port 7: enabled 1
725 06:41:45.716510 USB2 port 8: enabled 1
726 06:41:45.719798 USB2 port 9: enabled 1
727 06:41:45.722296 USB3 port 0: enabled 1
728 06:41:45.724230 USB3 port 1: enabled 1
729 06:41:45.727213 USB3 port 2: enabled 1
730 06:41:45.730375 USB3 port 3: enabled 1
731 06:41:45.732754 USB3 port 4: enabled 1
732 06:41:45.735397 PCI: 00:14.1: enabled 0
733 06:41:45.738480 PCI: 00:14.3: enabled 1
734 06:41:45.740531 PCI: 00:14.5: enabled 0
735 06:41:45.743917 PCI: 00:15.0: enabled 1
736 06:41:45.746418 I2C: 00:10: enabled 1
737 06:41:45.748980 I2C: 00:10: enabled 1
738 06:41:45.750847 I2C: 00:34: enabled 1
739 06:41:45.753734 PCI: 00:15.1: enabled 1
740 06:41:45.756624 I2C: 00:2c: enabled 1
741 06:41:45.758396 PCI: 00:15.2: enabled 0
742 06:41:45.761811 PCI: 00:15.3: enabled 0
743 06:41:45.764369 PCI: 00:16.0: enabled 1
744 06:41:45.766922 PCI: 00:16.1: enabled 0
745 06:41:45.769412 PCI: 00:16.2: enabled 0
746 06:41:45.771851 PCI: 00:16.3: enabled 0
747 06:41:45.774472 PCI: 00:16.4: enabled 0
748 06:41:45.777782 PCI: 00:16.5: enabled 0
749 06:41:45.780437 PCI: 00:17.0: enabled 1
750 06:41:45.782986 PCI: 00:19.0: enabled 1
751 06:41:45.784965 I2C: 00:50: enabled 1
752 06:41:45.787378 PCI: 00:19.1: enabled 0
753 06:41:45.790676 PCI: 00:19.2: enabled 1
754 06:41:45.792990 PCI: 00:1a.0: enabled 0
755 06:41:45.795384 PCI: 00:1c.0: enabled 1
756 06:41:45.797905 PCI: 00:1c.1: enabled 0
757 06:41:45.801182 PCI: 00:1c.2: enabled 0
758 06:41:45.803741 PCI: 00:1c.3: enabled 0
759 06:41:45.806164 PCI: 00:1c.4: enabled 0
760 06:41:45.808197 PCI: 00:1c.5: enabled 0
761 06:41:45.810951 PCI: 00:1c.6: enabled 0
762 06:41:45.813759 PCI: 00:1c.7: enabled 1
763 06:41:45.816646 PCI: 00:1d.0: enabled 1
764 06:41:45.819045 PCI: 00:1d.1: enabled 1
765 06:41:45.822036 PCI: 00:1d.2: enabled 0
766 06:41:45.824390 PCI: 00:1d.3: enabled 0
767 06:41:45.827292 PCI: 00:1d.4: enabled 1
768 06:41:45.829854 PCI: 00:1e.0: enabled 0
769 06:41:45.832270 PCI: 00:1e.1: enabled 0
770 06:41:45.834675 PCI: 00:1e.2: enabled 0
771 06:41:45.837855 PCI: 00:1e.3: enabled 0
772 06:41:45.839853 PCI: 00:1f.0: enabled 1
773 06:41:45.842398 PNP: 0c09.0: enabled 1
774 06:41:45.845716 PCI: 00:1f.1: enabled 1
775 06:41:45.848396 PCI: 00:1f.2: enabled 1
776 06:41:45.850959 PCI: 00:1f.3: enabled 1
777 06:41:45.853113 PCI: 00:1f.4: enabled 1
778 06:41:45.856153 PCI: 00:1f.5: enabled 1
779 06:41:45.858797 PCI: 00:1f.6: enabled 1
780 06:41:45.861182 Root Device scanning...
781 06:41:45.864780 root_dev_scan_bus for Root Device
782 06:41:45.866618 CPU_CLUSTER: 0 enabled
783 06:41:45.868994 DOMAIN: 0000 enabled
784 06:41:45.871548 DOMAIN: 0000 scanning...
785 06:41:45.875070 PCI: pci_scan_bus for bus 00
786 06:41:45.878224 PCI: 00:00.0 [8086/0000] ops
787 06:41:45.881524 PCI: 00:00.0 [8086/3e34] enabled
788 06:41:45.884036 PCI: 00:02.0 [8086/0000] ops
789 06:41:45.886835 PCI: 00:02.0 [8086/3ea0] enabled
790 06:41:45.891026 PCI: 00:04.0 [8086/1903] enabled
791 06:41:45.893454 PCI: 00:08.0 [8086/1911] enabled
792 06:41:45.897075 PCI: 00:12.0 [8086/9df9] enabled
793 06:41:45.900386 PCI: 00:14.0 [8086/0000] bus ops
794 06:41:45.904089 PCI: 00:14.0 [8086/9ded] enabled
795 06:41:45.907626 PCI: 00:14.2 [8086/9def] enabled
796 06:41:45.910679 PCI: 00:14.3 [8086/9df0] enabled
797 06:41:45.913422 PCI: 00:15.0 [8086/0000] bus ops
798 06:41:45.917232 PCI: 00:15.0 [8086/9de8] enabled
799 06:41:45.920406 PCI: 00:15.1 [8086/0000] bus ops
800 06:41:45.923758 PCI: 00:15.1 [8086/9de9] enabled
801 06:41:45.929482 PCI: Static device PCI: 00:16.0 not found, disabling it.
802 06:41:45.932241 PCI: 00:17.0 [8086/0000] ops
803 06:41:45.935851 PCI: 00:17.0 [8086/9dd3] enabled
804 06:41:45.939145 PCI: 00:19.0 [8086/0000] bus ops
805 06:41:45.942590 PCI: 00:19.0 [8086/9dc5] enabled
806 06:41:45.945614 PCI: 00:19.2 [8086/0000] ops
807 06:41:45.949278 PCI: 00:19.2 [8086/9dc7] enabled
808 06:41:45.952572 PCI: 00:1c.0 [8086/0000] bus ops
809 06:41:45.955237 PCI: 00:1c.0 [8086/9dbf] enabled
810 06:41:45.961571 PCI: Static device PCI: 00:1c.7 not found, disabling it.
811 06:41:45.964776 PCI: 00:1d.0 [8086/0000] bus ops
812 06:41:45.967420 PCI: 00:1d.0 [8086/9db4] enabled
813 06:41:45.973749 PCI: Static device PCI: 00:1d.1 not found, disabling it.
814 06:41:45.978508 PCI: Static device PCI: 00:1d.4 not found, disabling it.
815 06:41:45.982290 PCI: 00:1f.0 [8086/0000] bus ops
816 06:41:45.985854 PCI: 00:1f.0 [8086/9d84] enabled
817 06:41:45.991712 PCI: Static device PCI: 00:1f.1 not found, disabling it.
818 06:41:45.996777 PCI: Static device PCI: 00:1f.2 not found, disabling it.
819 06:41:46.000650 PCI: 00:1f.3 [8086/0000] bus ops
820 06:41:46.003929 PCI: 00:1f.3 [8086/9dc8] enabled
821 06:41:46.007139 PCI: 00:1f.4 [8086/0000] bus ops
822 06:41:46.009777 PCI: 00:1f.4 [8086/9da3] enabled
823 06:41:46.012985 PCI: 00:1f.5 [8086/0000] bus ops
824 06:41:46.016877 PCI: 00:1f.5 [8086/9da4] enabled
825 06:41:46.020046 PCI: 00:1f.6 [8086/15be] enabled
826 06:41:46.023264 PCI: Leftover static devices:
827 06:41:46.024097 PCI: 00:12.5
828 06:41:46.025802 PCI: 00:12.6
829 06:41:46.027656 PCI: 00:13.0
830 06:41:46.028555 PCI: 00:14.1
831 06:41:46.029650 PCI: 00:14.5
832 06:41:46.030812 PCI: 00:15.2
833 06:41:46.032066 PCI: 00:15.3
834 06:41:46.033839 PCI: 00:16.0
835 06:41:46.035763 PCI: 00:16.1
836 06:41:46.036905 PCI: 00:16.2
837 06:41:46.038114 PCI: 00:16.3
838 06:41:46.039855 PCI: 00:16.4
839 06:41:46.041009 PCI: 00:16.5
840 06:41:46.042408 PCI: 00:19.1
841 06:41:46.043512 PCI: 00:1a.0
842 06:41:46.045384 PCI: 00:1c.1
843 06:41:46.046685 PCI: 00:1c.2
844 06:41:46.047826 PCI: 00:1c.3
845 06:41:46.048987 PCI: 00:1c.4
846 06:41:46.050764 PCI: 00:1c.5
847 06:41:46.051944 PCI: 00:1c.6
848 06:41:46.052955 PCI: 00:1c.7
849 06:41:46.054780 PCI: 00:1d.1
850 06:41:46.055530 PCI: 00:1d.2
851 06:41:46.056703 PCI: 00:1d.3
852 06:41:46.058490 PCI: 00:1d.4
853 06:41:46.060279 PCI: 00:1e.0
854 06:41:46.061583 PCI: 00:1e.1
855 06:41:46.062950 PCI: 00:1e.2
856 06:41:46.064187 PCI: 00:1e.3
857 06:41:46.065494 PCI: 00:1f.1
858 06:41:46.066365 PCI: 00:1f.2
859 06:41:46.069445 PCI: Check your devicetree.cb.
860 06:41:46.072641 PCI: 00:14.0 scanning...
861 06:41:46.075270 scan_usb_bus for PCI: 00:14.0
862 06:41:46.077981 USB0 port 0 enabled
863 06:41:46.079960 USB0 port 0 scanning...
864 06:41:46.083729 scan_usb_bus for USB0 port 0
865 06:41:46.085703 USB2 port 0 enabled
866 06:41:46.087445 USB2 port 1 enabled
867 06:41:46.089561 USB2 port 2 enabled
868 06:41:46.091128 USB2 port 4 enabled
869 06:41:46.093526 USB2 port 5 enabled
870 06:41:46.096275 USB2 port 6 enabled
871 06:41:46.097868 USB2 port 7 enabled
872 06:41:46.099568 USB2 port 8 enabled
873 06:41:46.101341 USB2 port 9 enabled
874 06:41:46.104267 USB3 port 0 enabled
875 06:41:46.106051 USB3 port 1 enabled
876 06:41:46.108026 USB3 port 2 enabled
877 06:41:46.110004 USB3 port 3 enabled
878 06:41:46.112509 USB3 port 4 enabled
879 06:41:46.114463 USB2 port 0 scanning...
880 06:41:46.117788 scan_usb_bus for USB2 port 0
881 06:41:46.121392 scan_usb_bus for USB2 port 0 done
882 06:41:46.125874 scan_bus: scanning of bus USB2 port 0 took 9059 usecs
883 06:41:46.129200 USB2 port 1 scanning...
884 06:41:46.132455 scan_usb_bus for USB2 port 1
885 06:41:46.135140 scan_usb_bus for USB2 port 1 done
886 06:41:46.141271 scan_bus: scanning of bus USB2 port 1 took 9062 usecs
887 06:41:46.143698 USB2 port 2 scanning...
888 06:41:46.146217 scan_usb_bus for USB2 port 2
889 06:41:46.149267 scan_usb_bus for USB2 port 2 done
890 06:41:46.155589 scan_bus: scanning of bus USB2 port 2 took 9060 usecs
891 06:41:46.157929 USB2 port 4 scanning...
892 06:41:46.160815 scan_usb_bus for USB2 port 4
893 06:41:46.164358 scan_usb_bus for USB2 port 4 done
894 06:41:46.169242 scan_bus: scanning of bus USB2 port 4 took 9055 usecs
895 06:41:46.172387 USB2 port 5 scanning...
896 06:41:46.175429 scan_usb_bus for USB2 port 5
897 06:41:46.178379 scan_usb_bus for USB2 port 5 done
898 06:41:46.183471 scan_bus: scanning of bus USB2 port 5 took 9059 usecs
899 06:41:46.186772 USB2 port 6 scanning...
900 06:41:46.189955 scan_usb_bus for USB2 port 6
901 06:41:46.193235 scan_usb_bus for USB2 port 6 done
902 06:41:46.198372 scan_bus: scanning of bus USB2 port 6 took 9055 usecs
903 06:41:46.200952 USB2 port 7 scanning...
904 06:41:46.204163 scan_usb_bus for USB2 port 7
905 06:41:46.207420 scan_usb_bus for USB2 port 7 done
906 06:41:46.212932 scan_bus: scanning of bus USB2 port 7 took 9060 usecs
907 06:41:46.215668 USB2 port 8 scanning...
908 06:41:46.218363 scan_usb_bus for USB2 port 8
909 06:41:46.221362 scan_usb_bus for USB2 port 8 done
910 06:41:46.227489 scan_bus: scanning of bus USB2 port 8 took 9060 usecs
911 06:41:46.230316 USB2 port 9 scanning...
912 06:41:46.232672 scan_usb_bus for USB2 port 9
913 06:41:46.236579 scan_usb_bus for USB2 port 9 done
914 06:41:46.241144 scan_bus: scanning of bus USB2 port 9 took 9059 usecs
915 06:41:46.243794 USB3 port 0 scanning...
916 06:41:46.246861 scan_usb_bus for USB3 port 0
917 06:41:46.251061 scan_usb_bus for USB3 port 0 done
918 06:41:46.256093 scan_bus: scanning of bus USB3 port 0 took 9061 usecs
919 06:41:46.258834 USB3 port 1 scanning...
920 06:41:46.261989 scan_usb_bus for USB3 port 1
921 06:41:46.264559 scan_usb_bus for USB3 port 1 done
922 06:41:46.270664 scan_bus: scanning of bus USB3 port 1 took 9060 usecs
923 06:41:46.273040 USB3 port 2 scanning...
924 06:41:46.275923 scan_usb_bus for USB3 port 2
925 06:41:46.279622 scan_usb_bus for USB3 port 2 done
926 06:41:46.285351 scan_bus: scanning of bus USB3 port 2 took 9059 usecs
927 06:41:46.287444 USB3 port 3 scanning...
928 06:41:46.290024 scan_usb_bus for USB3 port 3
929 06:41:46.293871 scan_usb_bus for USB3 port 3 done
930 06:41:46.299851 scan_bus: scanning of bus USB3 port 3 took 9058 usecs
931 06:41:46.301279 USB3 port 4 scanning...
932 06:41:46.304495 scan_usb_bus for USB3 port 4
933 06:41:46.308400 scan_usb_bus for USB3 port 4 done
934 06:41:46.313059 scan_bus: scanning of bus USB3 port 4 took 9060 usecs
935 06:41:46.316650 scan_usb_bus for USB0 port 0 done
936 06:41:46.322380 scan_bus: scanning of bus USB0 port 0 took 239332 usecs
937 06:41:46.325885 scan_usb_bus for PCI: 00:14.0 done
938 06:41:46.332115 scan_bus: scanning of bus PCI: 00:14.0 took 256261 usecs
939 06:41:46.334305 PCI: 00:15.0 scanning...
940 06:41:46.338311 scan_generic_bus for PCI: 00:15.0
941 06:41:46.342162 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
942 06:41:46.345890 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
943 06:41:46.350254 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
944 06:41:46.353885 scan_generic_bus for PCI: 00:15.0 done
945 06:41:46.359451 scan_bus: scanning of bus PCI: 00:15.0 took 22377 usecs
946 06:41:46.362538 PCI: 00:15.1 scanning...
947 06:41:46.366259 scan_generic_bus for PCI: 00:15.1
948 06:41:46.369540 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
949 06:41:46.373482 scan_generic_bus for PCI: 00:15.1 done
950 06:41:46.379824 scan_bus: scanning of bus PCI: 00:15.1 took 14207 usecs
951 06:41:46.382111 PCI: 00:19.0 scanning...
952 06:41:46.385613 scan_generic_bus for PCI: 00:19.0
953 06:41:46.389786 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
954 06:41:46.393615 scan_generic_bus for PCI: 00:19.0 done
955 06:41:46.398869 scan_bus: scanning of bus PCI: 00:19.0 took 14207 usecs
956 06:41:46.401481 PCI: 00:1c.0 scanning...
957 06:41:46.405396 do_pci_scan_bridge for PCI: 00:1c.0
958 06:41:46.408533 PCI: pci_scan_bus for bus 01
959 06:41:46.412432 PCI: 01:00.0 [10ec/525a] enabled
960 06:41:46.415001 Capability: type 0x01 @ 0x80
961 06:41:46.418326 Capability: type 0x05 @ 0x90
962 06:41:46.420980 Capability: type 0x10 @ 0xb0
963 06:41:46.424082 Capability: type 0x10 @ 0x40
964 06:41:46.426812 Enabling Common Clock Configuration
965 06:41:46.431399 L1 Sub-State supported from root port 28
966 06:41:46.434237 L1 Sub-State Support = 0xf
967 06:41:46.436595 CommonModeRestoreTime = 0x3c
968 06:41:46.441254 Power On Value = 0x6, Power On Scale = 0x1
969 06:41:46.444377 ASPM: Enabled L0s and L1
970 06:41:46.446736 Capability: type 0x01 @ 0x80
971 06:41:46.449757 Capability: type 0x05 @ 0x90
972 06:41:46.452707 Capability: type 0x10 @ 0xb0
973 06:41:46.458251 scan_bus: scanning of bus PCI: 00:1c.0 took 53624 usecs
974 06:41:46.460515 PCI: 00:1d.0 scanning...
975 06:41:46.465210 do_pci_scan_bridge for PCI: 00:1d.0
976 06:41:46.467497 PCI: pci_scan_bus for bus 02
977 06:41:46.471279 PCI: 02:00.0 [1217/8620] enabled
978 06:41:46.473840 Capability: type 0x01 @ 0x6c
979 06:41:46.476677 Capability: type 0x05 @ 0x48
980 06:41:46.479601 Capability: type 0x10 @ 0x80
981 06:41:46.482921 Capability: type 0x10 @ 0x40
982 06:41:46.487099 L1 Sub-State supported from root port 29
983 06:41:46.489939 L1 Sub-State Support = 0xf
984 06:41:46.492583 CommonModeRestoreTime = 0x78
985 06:41:46.496955 Power On Value = 0x16, Power On Scale = 0x0
986 06:41:46.498200 ASPM: Enabled L1
987 06:41:46.503819 Capability: type 0x01 @ 0x6c
988 06:41:46.508385 Capability: type 0x05 @ 0x48
989 06:41:46.512350 Capability: type 0x10 @ 0x80
990 06:41:46.520161 scan_bus: scanning of bus PCI: 00:1d.0 took 56021 usecs
991 06:41:46.522826 PCI: 00:1f.0 scanning...
992 06:41:46.526025 scan_lpc_bus for PCI: 00:1f.0
993 06:41:46.527960 PNP: 0c09.0 enabled
994 06:41:46.531866 scan_lpc_bus for PCI: 00:1f.0 done
995 06:41:46.536466 scan_bus: scanning of bus PCI: 00:1f.0 took 11391 usecs
996 06:41:46.539538 PCI: 00:1f.3 scanning...
997 06:41:46.544483 scan_bus: scanning of bus PCI: 00:1f.3 took 2834 usecs
998 06:41:46.547813 PCI: 00:1f.4 scanning...
999 06:41:46.551641 scan_generic_bus for PCI: 00:1f.4
1000 06:41:46.555050 scan_generic_bus for PCI: 00:1f.4 done
1001 06:41:46.561146 scan_bus: scanning of bus PCI: 00:1f.4 took 10131 usecs
1002 06:41:46.563299 PCI: 00:1f.5 scanning...
1003 06:41:46.566793 scan_generic_bus for PCI: 00:1f.5
1004 06:41:46.571264 scan_generic_bus for PCI: 00:1f.5 done
1005 06:41:46.576392 scan_bus: scanning of bus PCI: 00:1f.5 took 10133 usecs
1006 06:41:46.581895 scan_bus: scanning of bus DOMAIN: 0000 took 707438 usecs
1007 06:41:46.585714 root_dev_scan_bus for Root Device done
1008 06:41:46.591936 scan_bus: scanning of bus Root Device took 727578 usecs
1009 06:41:46.592580 done
1010 06:41:46.597828 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1011 06:41:46.604026 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1012 06:41:46.612278 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1013 06:41:46.618307 MRC: cache data 'RECOVERY_MRC_CACHE' needs update.
1014 06:41:46.635192 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1015 06:41:46.639044 ELOG: NV offset 0x1bf0000 size 0x4000
1016 06:41:46.647127 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1017 06:41:46.652879 ELOG: Event(17) added with size 13 at 2023-12-11 06:41:17 UTC
1018 06:41:46.659985 ELOG: Event(AA) added with size 11 at 2023-12-11 06:41:17 UTC
1019 06:41:46.665323 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1020 06:41:46.668878 SPI flash protection: WPSW=0 SRP0=0
1021 06:41:46.673876 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1022 06:41:46.680705 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1149193 exit 75767
1023 06:41:46.682428 found VGA at PCI: 00:02.0
1024 06:41:46.686353 Setting up VGA for PCI: 00:02.0
1025 06:41:46.690736 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1026 06:41:46.696098 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1027 06:41:46.698941 Allocating resources...
1028 06:41:46.700772 Reading resources...
1029 06:41:46.704956 Root Device read_resources bus 0 link: 0
1030 06:41:46.710136 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1031 06:41:46.714840 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1032 06:41:46.719338 DOMAIN: 0000 read_resources bus 0 link: 0
1033 06:41:46.725183 PCI: 00:14.0 read_resources bus 0 link: 0
1034 06:41:46.729491 USB0 port 0 read_resources bus 0 link: 0
1035 06:41:46.738687 USB0 port 0 read_resources bus 0 link: 0 done
1036 06:41:46.743819 PCI: 00:14.0 read_resources bus 0 link: 0 done
1037 06:41:46.749730 PCI: 00:15.0 read_resources bus 1 link: 0
1038 06:41:46.755773 PCI: 00:15.0 read_resources bus 1 link: 0 done
1039 06:41:46.760228 PCI: 00:15.1 read_resources bus 2 link: 0
1040 06:41:46.765490 PCI: 00:15.1 read_resources bus 2 link: 0 done
1041 06:41:46.770576 PCI: 00:19.0 read_resources bus 3 link: 0
1042 06:41:46.775050 PCI: 00:19.0 read_resources bus 3 link: 0 done
1043 06:41:46.780182 PCI: 00:1c.0 read_resources bus 1 link: 0
1044 06:41:46.785242 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1045 06:41:46.789708 PCI: 00:1d.0 read_resources bus 2 link: 0
1046 06:41:46.797315 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1047 06:41:46.801733 PCI: 00:1f.0 read_resources bus 0 link: 0
1048 06:41:46.807080 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1049 06:41:46.813746 DOMAIN: 0000 read_resources bus 0 link: 0 done
1050 06:41:46.818859 Root Device read_resources bus 0 link: 0 done
1051 06:41:46.820928 Done reading resources.
1052 06:41:46.826309 Show resources in subtree (Root Device)...After reading.
1053 06:41:46.830489 Root Device child on link 0 CPU_CLUSTER: 0
1054 06:41:46.834820 CPU_CLUSTER: 0 child on link 0 APIC: 00
1055 06:41:46.836200 APIC: 00
1056 06:41:46.837372 APIC: 05
1057 06:41:46.838974 APIC: 01
1058 06:41:46.839993 APIC: 04
1059 06:41:46.840759 APIC: 06
1060 06:41:46.842383 APIC: 07
1061 06:41:46.843861 APIC: 02
1062 06:41:46.845520 APIC: 03
1063 06:41:46.849136 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1064 06:41:46.858672 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1065 06:41:46.868674 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1066 06:41:46.869879 PCI: 00:00.0
1067 06:41:46.879200 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1068 06:41:46.889627 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1069 06:41:46.898638 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1070 06:41:46.907358 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1071 06:41:46.916729 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1072 06:41:46.926409 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1073 06:41:46.936117 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1074 06:41:46.944556 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1075 06:41:46.953715 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1076 06:41:46.963492 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1077 06:41:46.973334 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1078 06:41:46.983366 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1079 06:41:46.991725 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1080 06:41:47.000873 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1081 06:41:47.003387 PCI: 00:02.0
1082 06:41:47.013311 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1083 06:41:47.024032 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1084 06:41:47.031799 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1085 06:41:47.033787 PCI: 00:04.0
1086 06:41:47.043535 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1087 06:41:47.045233 PCI: 00:08.0
1088 06:41:47.055535 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1089 06:41:47.056390 PCI: 00:12.0
1090 06:41:47.067055 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1091 06:41:47.070932 PCI: 00:14.0 child on link 0 USB0 port 0
1092 06:41:47.081399 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1093 06:41:47.085179 USB0 port 0 child on link 0 USB2 port 0
1094 06:41:47.087417 USB2 port 0
1095 06:41:47.088978 USB2 port 1
1096 06:41:47.091071 USB2 port 2
1097 06:41:47.092699 USB2 port 4
1098 06:41:47.094353 USB2 port 5
1099 06:41:47.095945 USB2 port 6
1100 06:41:47.097764 USB2 port 7
1101 06:41:47.099647 USB2 port 8
1102 06:41:47.101730 USB2 port 9
1103 06:41:47.102350 USB3 port 0
1104 06:41:47.104882 USB3 port 1
1105 06:41:47.106729 USB3 port 2
1106 06:41:47.108694 USB3 port 3
1107 06:41:47.110097 USB3 port 4
1108 06:41:47.111395 PCI: 00:14.2
1109 06:41:47.121237 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1110 06:41:47.131774 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1111 06:41:47.133352 PCI: 00:14.3
1112 06:41:47.143118 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1113 06:41:47.147717 PCI: 00:15.0 child on link 0 I2C: 01:10
1114 06:41:47.157368 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1115 06:41:47.159272 I2C: 01:10
1116 06:41:47.159876 I2C: 01:10
1117 06:41:47.162283 I2C: 01:34
1118 06:41:47.166721 PCI: 00:15.1 child on link 0 I2C: 02:2c
1119 06:41:47.176447 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1120 06:41:47.177314 I2C: 02:2c
1121 06:41:47.179606 PCI: 00:17.0
1122 06:41:47.188707 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1123 06:41:47.197078 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1124 06:41:47.205737 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1125 06:41:47.213718 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1126 06:41:47.221711 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1127 06:41:47.230801 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1128 06:41:47.235826 PCI: 00:19.0 child on link 0 I2C: 03:50
1129 06:41:47.245735 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 06:41:47.255235 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1131 06:41:47.257043 I2C: 03:50
1132 06:41:47.259067 PCI: 00:19.2
1133 06:41:47.270110 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1134 06:41:47.279259 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1135 06:41:47.283778 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1136 06:41:47.292156 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1137 06:41:47.302398 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1138 06:41:47.312180 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1139 06:41:47.313501 PCI: 01:00.0
1140 06:41:47.322418 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1141 06:41:47.327418 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1142 06:41:47.335924 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1143 06:41:47.346104 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1144 06:41:47.354972 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1145 06:41:47.356191 PCI: 02:00.0
1146 06:41:47.365060 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1147 06:41:47.375008 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1148 06:41:47.379485 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1149 06:41:47.387377 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1150 06:41:47.396782 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1151 06:41:47.398289 PNP: 0c09.0
1152 06:41:47.406604 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1153 06:41:47.415534 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1154 06:41:47.423472 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1155 06:41:47.425791 PCI: 00:1f.3
1156 06:41:47.435565 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1157 06:41:47.446150 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1158 06:41:47.447836 PCI: 00:1f.4
1159 06:41:47.456478 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1160 06:41:47.466497 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1161 06:41:47.467982 PCI: 00:1f.5
1162 06:41:47.476537 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1163 06:41:47.478257 PCI: 00:1f.6
1164 06:41:47.487304 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1165 06:41:47.493788 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1166 06:41:47.500806 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1167 06:41:47.508029 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1168 06:41:47.513256 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1169 06:41:47.520794 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1170 06:41:47.524061 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1171 06:41:47.527850 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1172 06:41:47.530928 PCI: 00:17.0 18 * [0x60 - 0x67] io
1173 06:41:47.534837 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1174 06:41:47.541359 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1175 06:41:47.548198 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1176 06:41:47.556355 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1177 06:41:47.564550 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1178 06:41:47.571573 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1179 06:41:47.575573 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1180 06:41:47.583177 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1181 06:41:47.591212 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1182 06:41:47.599571 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1183 06:41:47.606848 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1184 06:41:47.609887 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1185 06:41:47.614427 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1186 06:41:47.622192 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1187 06:41:47.626911 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1188 06:41:47.631412 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1189 06:41:47.637091 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1190 06:41:47.641538 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1191 06:41:47.646634 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1192 06:41:47.651043 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1193 06:41:47.656139 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1194 06:41:47.661323 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1195 06:41:47.665760 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1196 06:41:47.670877 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1197 06:41:47.675226 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1198 06:41:47.680348 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1199 06:41:47.685555 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1200 06:41:47.689872 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1201 06:41:47.695329 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1202 06:41:47.700296 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1203 06:41:47.704874 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1204 06:41:47.709574 PCI: 00:19.0 10 * [0x11349000 - 0x11349fff] mem
1205 06:41:47.714007 PCI: 00:19.0 18 * [0x1134a000 - 0x1134afff] mem
1206 06:41:47.719209 PCI: 00:19.2 18 * [0x1134b000 - 0x1134bfff] mem
1207 06:41:47.723583 PCI: 00:1f.5 10 * [0x1134c000 - 0x1134cfff] mem
1208 06:41:47.729393 PCI: 00:17.0 24 * [0x1134d000 - 0x1134d7ff] mem
1209 06:41:47.733967 PCI: 00:17.0 14 * [0x1134e000 - 0x1134e0ff] mem
1210 06:41:47.739102 PCI: 00:1f.4 10 * [0x1134f000 - 0x1134f0ff] mem
1211 06:41:47.747488 DOMAIN: 0000 mem: base: 1134f100 size: 1134f100 align: 28 gran: 0 limit: ffffffff done
1212 06:41:47.751392 avoid_fixed_resources: DOMAIN: 0000
1213 06:41:47.756345 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 06:41:47.762768 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 06:41:47.770357 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 06:41:47.778632 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1217 06:41:47.786235 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1218 06:41:47.793801 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1219 06:41:47.801303 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1220 06:41:47.808797 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 06:41:47.816653 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 06:41:47.824046 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 06:41:47.831010 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 06:41:47.837986 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 06:41:47.840177 Setting resources...
1226 06:41:47.846611 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 06:41:47.850576 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 06:41:47.854270 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 06:41:47.859230 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 06:41:47.863043 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 06:41:47.869464 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 06:41:47.875173 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 06:41:47.881661 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 06:41:47.888020 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1235 06:41:47.894451 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1236 06:41:47.902050 DOMAIN: 0000 mem: base:c0000000 size:1134f100 align:28 gran:0 limit:dfffffff
1237 06:41:47.906970 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1238 06:41:47.912024 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1239 06:41:47.916450 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1240 06:41:47.921295 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1241 06:41:47.926774 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1242 06:41:47.931273 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1243 06:41:47.936103 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1244 06:41:47.941055 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1245 06:41:47.945635 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1246 06:41:47.951036 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1247 06:41:47.955224 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1248 06:41:47.959998 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1249 06:41:47.965587 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1250 06:41:47.970654 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1251 06:41:47.974494 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1252 06:41:47.980052 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1253 06:41:47.985336 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1254 06:41:47.989323 PCI: 00:19.0 10 * [0xd1349000 - 0xd1349fff] mem
1255 06:41:47.994497 PCI: 00:19.0 18 * [0xd134a000 - 0xd134afff] mem
1256 06:41:47.999679 PCI: 00:19.2 18 * [0xd134b000 - 0xd134bfff] mem
1257 06:41:48.004773 PCI: 00:1f.5 10 * [0xd134c000 - 0xd134cfff] mem
1258 06:41:48.008798 PCI: 00:17.0 24 * [0xd134d000 - 0xd134d7ff] mem
1259 06:41:48.014406 PCI: 00:17.0 14 * [0xd134e000 - 0xd134e0ff] mem
1260 06:41:48.019267 PCI: 00:1f.4 10 * [0xd134f000 - 0xd134f0ff] mem
1261 06:41:48.025987 DOMAIN: 0000 mem: next_base: d134f100 size: 1134f100 align: 28 gran: 0 done
1262 06:41:48.033945 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1263 06:41:48.041459 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1264 06:41:48.048907 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1265 06:41:48.053483 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1266 06:41:48.060605 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1267 06:41:48.068002 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1268 06:41:48.075792 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1269 06:41:48.082660 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1270 06:41:48.087395 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1271 06:41:48.092743 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1272 06:41:48.099362 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1273 06:41:48.104336 Root Device assign_resources, bus 0 link: 0
1274 06:41:48.109372 DOMAIN: 0000 assign_resources, bus 0 link: 0
1275 06:41:48.118203 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1276 06:41:48.125880 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1277 06:41:48.133916 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1278 06:41:48.141981 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1279 06:41:48.150446 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1280 06:41:48.158871 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1281 06:41:48.167407 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1282 06:41:48.171738 PCI: 00:14.0 assign_resources, bus 0 link: 0
1283 06:41:48.176365 PCI: 00:14.0 assign_resources, bus 0 link: 0
1284 06:41:48.184758 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1285 06:41:48.192178 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1286 06:41:48.200767 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1287 06:41:48.208634 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1288 06:41:48.213024 PCI: 00:15.0 assign_resources, bus 1 link: 0
1289 06:41:48.217911 PCI: 00:15.0 assign_resources, bus 1 link: 0
1290 06:41:48.226470 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1291 06:41:48.231740 PCI: 00:15.1 assign_resources, bus 2 link: 0
1292 06:41:48.236266 PCI: 00:15.1 assign_resources, bus 2 link: 0
1293 06:41:48.243974 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1294 06:41:48.251303 PCI: 00:17.0 14 <- [0x00d134e000 - 0x00d134e0ff] size 0x00000100 gran 0x08 mem
1295 06:41:48.259578 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1296 06:41:48.267385 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1297 06:41:48.274904 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1298 06:41:48.282180 PCI: 00:17.0 24 <- [0x00d134d000 - 0x00d134d7ff] size 0x00000800 gran 0x0b mem
1299 06:41:48.291347 PCI: 00:19.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1300 06:41:48.298581 PCI: 00:19.0 18 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1301 06:41:48.302901 PCI: 00:19.0 assign_resources, bus 3 link: 0
1302 06:41:48.308153 PCI: 00:19.0 assign_resources, bus 3 link: 0
1303 06:41:48.316320 PCI: 00:19.2 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1304 06:41:48.325161 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1305 06:41:48.333589 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1306 06:41:48.342243 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1307 06:41:48.346501 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1308 06:41:48.355030 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1309 06:41:48.359605 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1310 06:41:48.368839 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1311 06:41:48.377279 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1312 06:41:48.384935 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1313 06:41:48.390732 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1314 06:41:48.400442 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1315 06:41:48.408877 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1316 06:41:48.416294 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1317 06:41:48.420872 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1318 06:41:48.426066 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1319 06:41:48.430525 LPC: Trying to open IO window from 930 size 8
1320 06:41:48.434814 LPC: Trying to open IO window from 940 size 8
1321 06:41:48.439777 LPC: Trying to open IO window from 950 size 10
1322 06:41:48.447284 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1323 06:41:48.455734 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1324 06:41:48.464090 PCI: 00:1f.4 10 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem64
1325 06:41:48.472480 PCI: 00:1f.5 10 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem
1326 06:41:48.480548 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1327 06:41:48.484764 DOMAIN: 0000 assign_resources, bus 0 link: 0
1328 06:41:48.489141 Root Device assign_resources, bus 0 link: 0
1329 06:41:48.492430 Done setting resources.
1330 06:41:48.498483 Show resources in subtree (Root Device)...After assigning values.
1331 06:41:48.503311 Root Device child on link 0 CPU_CLUSTER: 0
1332 06:41:48.506589 CPU_CLUSTER: 0 child on link 0 APIC: 00
1333 06:41:48.507850 APIC: 00
1334 06:41:48.509788 APIC: 05
1335 06:41:48.511183 APIC: 01
1336 06:41:48.512490 APIC: 04
1337 06:41:48.513797 APIC: 06
1338 06:41:48.515086 APIC: 07
1339 06:41:48.515695 APIC: 02
1340 06:41:48.517580 APIC: 03
1341 06:41:48.521434 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1342 06:41:48.531172 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1343 06:41:48.542896 DOMAIN: 0000 resource base c0000000 size 1134f100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1344 06:41:48.544240 PCI: 00:00.0
1345 06:41:48.553665 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1346 06:41:48.562999 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1347 06:41:48.572401 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1348 06:41:48.582005 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1349 06:41:48.590933 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1350 06:41:48.600357 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1351 06:41:48.609759 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1352 06:41:48.618612 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1353 06:41:48.628055 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1354 06:41:48.637974 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1355 06:41:48.647034 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1356 06:41:48.657119 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1357 06:41:48.665850 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1358 06:41:48.675380 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1359 06:41:48.676720 PCI: 00:02.0
1360 06:41:48.687289 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1361 06:41:48.698631 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1362 06:41:48.707434 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1363 06:41:48.709121 PCI: 00:04.0
1364 06:41:48.719584 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1365 06:41:48.721376 PCI: 00:08.0
1366 06:41:48.731592 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1367 06:41:48.732873 PCI: 00:12.0
1368 06:41:48.743259 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1369 06:41:48.748190 PCI: 00:14.0 child on link 0 USB0 port 0
1370 06:41:48.758452 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1371 06:41:48.762780 USB0 port 0 child on link 0 USB2 port 0
1372 06:41:48.764482 USB2 port 0
1373 06:41:48.765675 USB2 port 1
1374 06:41:48.767523 USB2 port 2
1375 06:41:48.769952 USB2 port 4
1376 06:41:48.771292 USB2 port 5
1377 06:41:48.772579 USB2 port 6
1378 06:41:48.775202 USB2 port 7
1379 06:41:48.776510 USB2 port 8
1380 06:41:48.778489 USB2 port 9
1381 06:41:48.780479 USB3 port 0
1382 06:41:48.781771 USB3 port 1
1383 06:41:48.783060 USB3 port 2
1384 06:41:48.785601 USB3 port 3
1385 06:41:48.786821 USB3 port 4
1386 06:41:48.788134 PCI: 00:14.2
1387 06:41:48.799138 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1388 06:41:48.808875 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1389 06:41:48.810944 PCI: 00:14.3
1390 06:41:48.820826 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1391 06:41:48.825511 PCI: 00:15.0 child on link 0 I2C: 01:10
1392 06:41:48.835609 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1393 06:41:48.837922 I2C: 01:10
1394 06:41:48.839010 I2C: 01:10
1395 06:41:48.840792 I2C: 01:34
1396 06:41:48.844528 PCI: 00:15.1 child on link 0 I2C: 02:2c
1397 06:41:48.855582 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1398 06:41:48.856899 I2C: 02:2c
1399 06:41:48.858884 PCI: 00:17.0
1400 06:41:48.868941 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1401 06:41:48.878352 PCI: 00:17.0 resource base d134e000 size 100 align 12 gran 8 limit d134e0ff flags 60000200 index 14
1402 06:41:48.888100 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1403 06:41:48.896626 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1404 06:41:48.905900 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1405 06:41:48.915541 PCI: 00:17.0 resource base d134d000 size 800 align 12 gran 11 limit d134d7ff flags 60000200 index 24
1406 06:41:48.920326 PCI: 00:19.0 child on link 0 I2C: 03:50
1407 06:41:48.930159 PCI: 00:19.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1408 06:41:48.941263 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 18
1409 06:41:48.942926 I2C: 03:50
1410 06:41:48.944200 PCI: 00:19.2
1411 06:41:48.955311 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1412 06:41:48.965592 PCI: 00:19.2 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1413 06:41:48.970434 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1414 06:41:48.979549 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1415 06:41:48.989871 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1416 06:41:49.000104 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1417 06:41:49.001459 PCI: 01:00.0
1418 06:41:49.011924 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1419 06:41:49.016413 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1420 06:41:49.025537 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1421 06:41:49.035969 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1422 06:41:49.046294 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1423 06:41:49.048030 PCI: 02:00.0
1424 06:41:49.057748 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1425 06:41:49.068480 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1426 06:41:49.073648 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1427 06:41:49.081857 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1428 06:41:49.090924 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1429 06:41:49.091733 PNP: 0c09.0
1430 06:41:49.101040 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1431 06:41:49.109523 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1432 06:41:49.117750 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1433 06:41:49.119751 PCI: 00:1f.3
1434 06:41:49.129923 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1435 06:41:49.140113 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1436 06:41:49.142798 PCI: 00:1f.4
1437 06:41:49.151469 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1438 06:41:49.161465 PCI: 00:1f.4 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000201 index 10
1439 06:41:49.162687 PCI: 00:1f.5
1440 06:41:49.173246 PCI: 00:1f.5 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000200 index 10
1441 06:41:49.175127 PCI: 00:1f.6
1442 06:41:49.185086 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1443 06:41:49.188589 Done allocating resources.
1444 06:41:49.194291 BS: BS_DEV_RESOURCES times (us): entry 0 run 2507756 exit 21
1445 06:41:49.196656 Enabling resources...
1446 06:41:49.201251 PCI: 00:00.0 subsystem <- 1028/3e34
1447 06:41:49.203613 PCI: 00:00.0 cmd <- 06
1448 06:41:49.207499 PCI: 00:02.0 subsystem <- 1028/3ea0
1449 06:41:49.210071 PCI: 00:02.0 cmd <- 03
1450 06:41:49.213376 PCI: 00:04.0 subsystem <- 1028/1903
1451 06:41:49.216445 PCI: 00:04.0 cmd <- 02
1452 06:41:49.218527 PCI: 00:08.0 cmd <- 06
1453 06:41:49.222877 PCI: 00:12.0 subsystem <- 1028/9df9
1454 06:41:49.224775 PCI: 00:12.0 cmd <- 02
1455 06:41:49.229399 PCI: 00:14.0 subsystem <- 1028/9ded
1456 06:41:49.231969 PCI: 00:14.0 cmd <- 02
1457 06:41:49.233847 PCI: 00:14.2 cmd <- 02
1458 06:41:49.238240 PCI: 00:14.3 subsystem <- 1028/9df0
1459 06:41:49.240108 PCI: 00:14.3 cmd <- 02
1460 06:41:49.244408 PCI: 00:15.0 subsystem <- 1028/9de8
1461 06:41:49.246423 PCI: 00:15.0 cmd <- 02
1462 06:41:49.250483 PCI: 00:15.1 subsystem <- 1028/9de9
1463 06:41:49.252626 PCI: 00:15.1 cmd <- 02
1464 06:41:49.257212 PCI: 00:17.0 subsystem <- 1028/9dd3
1465 06:41:49.258509 PCI: 00:17.0 cmd <- 03
1466 06:41:49.262966 PCI: 00:19.0 subsystem <- 1028/9dc5
1467 06:41:49.265424 PCI: 00:19.0 cmd <- 06
1468 06:41:49.269684 PCI: 00:19.2 subsystem <- 1028/9dc7
1469 06:41:49.271440 PCI: 00:19.2 cmd <- 06
1470 06:41:49.275359 PCI: 00:1c.0 bridge ctrl <- 0003
1471 06:41:49.278973 PCI: 00:1c.0 subsystem <- 1028/9dbf
1472 06:41:49.282023 Capability: type 0x10 @ 0x40
1473 06:41:49.283945 Capability: type 0x05 @ 0x80
1474 06:41:49.287206 Capability: type 0x0d @ 0x90
1475 06:41:49.290214 PCI: 00:1c.0 cmd <- 06
1476 06:41:49.293375 PCI: 00:1d.0 bridge ctrl <- 0003
1477 06:41:49.297070 PCI: 00:1d.0 subsystem <- 1028/9db4
1478 06:41:49.300310 Capability: type 0x10 @ 0x40
1479 06:41:49.303329 Capability: type 0x05 @ 0x80
1480 06:41:49.305862 Capability: type 0x0d @ 0x90
1481 06:41:49.308064 PCI: 00:1d.0 cmd <- 06
1482 06:41:49.311969 PCI: 00:1f.0 subsystem <- 1028/9d84
1483 06:41:49.314365 PCI: 00:1f.0 cmd <- 407
1484 06:41:49.318959 PCI: 00:1f.3 subsystem <- 1028/9dc8
1485 06:41:49.320284 PCI: 00:1f.3 cmd <- 02
1486 06:41:49.324208 PCI: 00:1f.4 subsystem <- 1028/9da3
1487 06:41:49.327357 PCI: 00:1f.4 cmd <- 03
1488 06:41:49.331210 PCI: 00:1f.5 subsystem <- 1028/9da4
1489 06:41:49.333322 PCI: 00:1f.5 cmd <- 406
1490 06:41:49.336975 PCI: 00:1f.6 subsystem <- 1028/15be
1491 06:41:49.339571 PCI: 00:1f.6 cmd <- 02
1492 06:41:49.349497 PCI: 01:00.0 cmd <- 02
1493 06:41:49.354691 PCI: 02:00.0 cmd <- 06
1494 06:41:49.358826 done.
1495 06:41:49.364956 BS: BS_DEV_ENABLE times (us): entry 405 run 164200 exit 0
1496 06:41:49.367370 Initializing devices...
1497 06:41:49.369448 Root Device init ...
1498 06:41:49.373195 Root Device init finished in 2138 usecs
1499 06:41:49.375467 CPU_CLUSTER: 0 init ...
1500 06:41:49.379976 CPU_CLUSTER: 0 init finished in 2429 usecs
1501 06:41:49.386169 PCI: 00:00.0 init ...
1502 06:41:49.389506 CPU TDP: 15 Watts
1503 06:41:49.391310 CPU PL2 = 51 Watts
1504 06:41:49.395466 PCI: 00:00.0 init finished in 7035 usecs
1505 06:41:49.398156 PCI: 00:02.0 init ...
1506 06:41:49.402396 PCI: 00:02.0 init finished in 2237 usecs
1507 06:41:49.404840 PCI: 00:04.0 init ...
1508 06:41:49.409309 PCI: 00:04.0 init finished in 2236 usecs
1509 06:41:49.411310 PCI: 00:08.0 init ...
1510 06:41:49.415896 PCI: 00:08.0 init finished in 2236 usecs
1511 06:41:49.418265 PCI: 00:12.0 init ...
1512 06:41:49.422300 PCI: 00:12.0 init finished in 2236 usecs
1513 06:41:49.424608 PCI: 00:14.0 init ...
1514 06:41:49.428860 PCI: 00:14.0 init finished in 2235 usecs
1515 06:41:49.431452 PCI: 00:14.2 init ...
1516 06:41:49.435334 PCI: 00:14.2 init finished in 2237 usecs
1517 06:41:49.438472 PCI: 00:14.3 init ...
1518 06:41:49.443063 PCI: 00:14.3 init finished in 2240 usecs
1519 06:41:49.445067 PCI: 00:15.0 init ...
1520 06:41:49.448891 DW I2C bus 0 at 0xd1347000 (400 KHz)
1521 06:41:49.452723 PCI: 00:15.0 init finished in 5935 usecs
1522 06:41:49.455924 PCI: 00:15.1 init ...
1523 06:41:49.458709 DW I2C bus 1 at 0xd1348000 (400 KHz)
1524 06:41:49.463432 PCI: 00:15.1 init finished in 5935 usecs
1525 06:41:49.466525 PCI: 00:19.0 init ...
1526 06:41:49.470202 DW I2C bus 4 at 0xd1349000 (400 KHz)
1527 06:41:49.473964 PCI: 00:19.0 init finished in 5923 usecs
1528 06:41:49.477032 PCI: 00:1c.0 init ...
1529 06:41:49.480287 Initializing PCH PCIe bridge.
1530 06:41:49.484087 PCI: 00:1c.0 init finished in 5250 usecs
1531 06:41:49.486694 PCI: 00:1d.0 init ...
1532 06:41:49.489924 Initializing PCH PCIe bridge.
1533 06:41:49.494254 PCI: 00:1d.0 init finished in 5248 usecs
1534 06:41:49.496513 PCI: 00:1f.0 init ...
1535 06:41:49.501036 IOAPIC: Initializing IOAPIC at 0xfec00000
1536 06:41:49.505288 IOAPIC: Bootstrap Processor Local APIC = 0x00
1537 06:41:49.507002 IOAPIC: ID = 0x02
1538 06:41:49.510261 IOAPIC: Dumping registers
1539 06:41:49.512382 reg 0x0000: 0x02000000
1540 06:41:49.515266 reg 0x0001: 0x00770020
1541 06:41:49.518175 reg 0x0002: 0x00000000
1542 06:41:49.523477 PCI: 00:1f.0 init finished in 25025 usecs
1543 06:41:49.525968 PCI: 00:1f.3 init ...
1544 06:41:49.531426 HDA: codec_mask = 05
1545 06:41:49.534855 HDA: Initializing codec #2
1546 06:41:49.536958 HDA: codec viddid: 8086280b
1547 06:41:49.539630 HDA: No verb table entry found
1548 06:41:49.542194 HDA: Initializing codec #0
1549 06:41:49.545698 HDA: codec viddid: 10ec0236
1550 06:41:49.552835 HDA: verb loaded.
1551 06:41:49.557283 PCI: 00:1f.3 init finished in 28838 usecs
1552 06:41:49.559908 PCI: 00:1f.4 init ...
1553 06:41:49.563692 PCI: 00:1f.4 init finished in 2245 usecs
1554 06:41:49.566316 PCI: 00:1f.6 init ...
1555 06:41:49.570336 PCI: 00:1f.6 init finished in 2236 usecs
1556 06:41:49.581747 PCI: 01:00.0 init ...
1557 06:41:49.585669 PCI: 01:00.0 init finished in 2236 usecs
1558 06:41:49.587679 PCI: 02:00.0 init ...
1559 06:41:49.592463 PCI: 02:00.0 init finished in 2236 usecs
1560 06:41:49.594888 PNP: 0c09.0 init ...
1561 06:41:49.598811 EC Label : 00.00.20
1562 06:41:49.602726 EC Revision : 9ca674bba
1563 06:41:49.605897 EC Model Num : 08B9
1564 06:41:49.610092 EC Build Date : 05/10/19
1565 06:41:49.618435 PNP: 0c09.0 init finished in 21741 usecs
1566 06:41:49.621383 Devices initialized
1567 06:41:49.624066 Show all devs... After init.
1568 06:41:49.627002 Root Device: enabled 1
1569 06:41:49.629250 CPU_CLUSTER: 0: enabled 1
1570 06:41:49.631266 DOMAIN: 0000: enabled 1
1571 06:41:49.633002 APIC: 00: enabled 1
1572 06:41:49.636068 PCI: 00:00.0: enabled 1
1573 06:41:49.638490 PCI: 00:02.0: enabled 1
1574 06:41:49.640966 PCI: 00:04.0: enabled 1
1575 06:41:49.643406 PCI: 00:12.0: enabled 1
1576 06:41:49.646301 PCI: 00:12.5: enabled 0
1577 06:41:49.647473 PCI: 00:12.6: enabled 0
1578 06:41:49.650527 PCI: 00:13.0: enabled 0
1579 06:41:49.652671 PCI: 00:14.0: enabled 1
1580 06:41:49.654946 PCI: 00:14.1: enabled 0
1581 06:41:49.657339 PCI: 00:14.3: enabled 1
1582 06:41:49.660375 PCI: 00:14.5: enabled 0
1583 06:41:49.662897 PCI: 00:15.0: enabled 1
1584 06:41:49.664877 PCI: 00:15.1: enabled 1
1585 06:41:49.667430 PCI: 00:15.2: enabled 0
1586 06:41:49.670107 PCI: 00:15.3: enabled 0
1587 06:41:49.672029 PCI: 00:16.0: enabled 0
1588 06:41:49.674127 PCI: 00:16.1: enabled 0
1589 06:41:49.677230 PCI: 00:16.2: enabled 0
1590 06:41:49.679832 PCI: 00:16.3: enabled 0
1591 06:41:49.681897 PCI: 00:16.4: enabled 0
1592 06:41:49.684388 PCI: 00:16.5: enabled 0
1593 06:41:49.686992 PCI: 00:17.0: enabled 1
1594 06:41:49.689507 PCI: 00:19.0: enabled 1
1595 06:41:49.691449 PCI: 00:19.1: enabled 0
1596 06:41:49.694685 PCI: 00:19.2: enabled 1
1597 06:41:49.696384 PCI: 00:1a.0: enabled 0
1598 06:41:49.698792 PCI: 00:1c.0: enabled 1
1599 06:41:49.700895 PCI: 00:1c.1: enabled 0
1600 06:41:49.703342 PCI: 00:1c.2: enabled 0
1601 06:41:49.706059 PCI: 00:1c.3: enabled 0
1602 06:41:49.708599 PCI: 00:1c.4: enabled 0
1603 06:41:49.711241 PCI: 00:1c.5: enabled 0
1604 06:41:49.713805 PCI: 00:1c.6: enabled 0
1605 06:41:49.715687 PCI: 00:1c.7: enabled 0
1606 06:41:49.718535 PCI: 00:1d.0: enabled 1
1607 06:41:49.720918 PCI: 00:1d.1: enabled 0
1608 06:41:49.723558 PCI: 00:1d.2: enabled 0
1609 06:41:49.726140 PCI: 00:1d.3: enabled 0
1610 06:41:49.728122 PCI: 00:1d.4: enabled 0
1611 06:41:49.730435 PCI: 00:1e.0: enabled 0
1612 06:41:49.732976 PCI: 00:1e.1: enabled 0
1613 06:41:49.735502 PCI: 00:1e.2: enabled 0
1614 06:41:49.737982 PCI: 00:1e.3: enabled 0
1615 06:41:49.740018 PCI: 00:1f.0: enabled 1
1616 06:41:49.742698 PCI: 00:1f.1: enabled 0
1617 06:41:49.745373 PCI: 00:1f.2: enabled 0
1618 06:41:49.747594 PCI: 00:1f.3: enabled 1
1619 06:41:49.750228 PCI: 00:1f.4: enabled 1
1620 06:41:49.751830 PCI: 00:1f.5: enabled 1
1621 06:41:49.754771 PCI: 00:1f.6: enabled 1
1622 06:41:49.757465 USB0 port 0: enabled 1
1623 06:41:49.759557 I2C: 01:10: enabled 1
1624 06:41:49.761726 I2C: 01:10: enabled 1
1625 06:41:49.763353 I2C: 01:34: enabled 1
1626 06:41:49.765974 I2C: 02:2c: enabled 1
1627 06:41:49.767718 I2C: 03:50: enabled 1
1628 06:41:49.770639 PNP: 0c09.0: enabled 1
1629 06:41:49.772746 USB2 port 0: enabled 1
1630 06:41:49.775138 USB2 port 1: enabled 1
1631 06:41:49.778183 USB2 port 2: enabled 1
1632 06:41:49.779656 USB2 port 4: enabled 1
1633 06:41:49.782732 USB2 port 5: enabled 1
1634 06:41:49.784132 USB2 port 6: enabled 1
1635 06:41:49.787309 USB2 port 7: enabled 1
1636 06:41:49.788839 USB2 port 8: enabled 1
1637 06:41:49.792008 USB2 port 9: enabled 1
1638 06:41:49.793558 USB3 port 0: enabled 1
1639 06:41:49.796411 USB3 port 1: enabled 1
1640 06:41:49.799026 USB3 port 2: enabled 1
1641 06:41:49.800957 USB3 port 3: enabled 1
1642 06:41:49.803619 USB3 port 4: enabled 1
1643 06:41:49.805577 APIC: 05: enabled 1
1644 06:41:49.807276 APIC: 01: enabled 1
1645 06:41:49.809135 APIC: 04: enabled 1
1646 06:41:49.811817 APIC: 06: enabled 1
1647 06:41:49.813219 APIC: 07: enabled 1
1648 06:41:49.815605 APIC: 02: enabled 1
1649 06:41:49.818196 APIC: 03: enabled 1
1650 06:41:49.820223 PCI: 00:08.0: enabled 1
1651 06:41:49.822838 PCI: 00:14.2: enabled 1
1652 06:41:49.825378 PCI: 01:00.0: enabled 1
1653 06:41:49.827700 PCI: 02:00.0: enabled 1
1654 06:41:49.832601 Disabling ACPI via APMC:
1655 06:41:49.835019 done.
1656 06:41:49.840836 ELOG: Event(92) added with size 9 at 2023-12-11 06:41:20 UTC
1657 06:41:49.847413 ELOG: Event(93) added with size 9 at 2023-12-11 06:41:20 UTC
1658 06:41:49.853463 ELOG: Event(9A) added with size 9 at 2023-12-11 06:41:20 UTC
1659 06:41:49.859324 ELOG: Event(9E) added with size 10 at 2023-12-11 06:41:20 UTC
1660 06:41:49.865582 ELOG: Event(9F) added with size 14 at 2023-12-11 06:41:20 UTC
1661 06:41:49.871879 BS: BS_DEV_INIT times (us): entry 0 run 462914 exit 38357
1662 06:41:49.878564 ELOG: Event(A1) added with size 10 at 2023-12-11 06:41:20 UTC
1663 06:41:49.885744 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1664 06:41:49.891940 ELOG: Event(A0) added with size 9 at 2023-12-11 06:41:20 UTC
1665 06:41:49.896476 elog_add_boot_reason: Logged dev mode boot
1666 06:41:49.899121 Finalize devices...
1667 06:41:49.899965 PCI: 00:17.0 final
1668 06:41:49.902341 Devices finalized
1669 06:41:49.908121 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1670 06:41:49.913982 BS: BS_POST_DEVICE times (us): entry 24778 run 5926 exit 5356
1671 06:41:49.919609 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1672 06:41:49.927873 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1673 06:41:49.931745 disable_unused_touchscreen: Disable ACPI0C50
1674 06:41:49.936571 disable_unused_touchscreen: Enable ELAN900C
1675 06:41:49.940041 CBFS @ 1d00000 size 300000
1676 06:41:49.946015 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1677 06:41:49.949863 CBFS: Locating 'fallback/dsdt.aml'
1678 06:41:49.953247 CBFS: Found @ offset 10b200 size 4448
1679 06:41:49.956349 CBFS @ 1d00000 size 300000
1680 06:41:49.962893 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1681 06:41:49.966100 CBFS: Locating 'fallback/slic'
1682 06:41:49.971257 CBFS: 'fallback/slic' not found.
1683 06:41:49.975140 ACPI: Writing ACPI tables at 89c0f000.
1684 06:41:49.976300 ACPI: * FACS
1685 06:41:49.978590 ACPI: * DSDT
1686 06:41:49.982033 Ramoops buffer: 0x100000@0x89b0e000.
1687 06:41:49.986715 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1688 06:41:49.991439 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1689 06:41:49.994743 ACPI: * FADT
1690 06:41:49.995979 SCI is IRQ9
1691 06:41:49.999571 ACPI: added table 1/32, length now 40
1692 06:41:50.001257 ACPI: * SSDT
1693 06:41:50.004772 Found 1 CPU(s) with 8 core(s) each.
1694 06:41:50.009508 Error: Could not locate 'wifi_sar' in VPD.
1695 06:41:50.014086 Error: failed from getting SAR limits!
1696 06:41:50.018108 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1697 06:41:50.021331 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1698 06:41:50.025827 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1699 06:41:50.029731 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1700 06:41:50.035040 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1701 06:41:50.040649 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1702 06:41:50.044999 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1703 06:41:50.049517 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1704 06:41:50.055296 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1705 06:41:50.061393 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1706 06:41:50.067205 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1707 06:41:50.072313 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1708 06:41:50.078092 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1709 06:41:50.082629 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1710 06:41:50.087127 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1711 06:41:50.091688 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1712 06:41:50.096725 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1713 06:41:50.103227 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1714 06:41:50.109226 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1715 06:41:50.113936 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1716 06:41:50.120584 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1717 06:41:50.124841 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1718 06:41:50.128957 ACPI: added table 2/32, length now 44
1719 06:41:50.130206 ACPI: * MCFG
1720 06:41:50.134745 ACPI: added table 3/32, length now 48
1721 06:41:50.136008 ACPI: * TPM2
1722 06:41:50.139236 TPM2 log created at 89afe000
1723 06:41:50.142322 ACPI: added table 4/32, length now 52
1724 06:41:50.144796 ACPI: * MADT
1725 06:41:50.145414 SCI is IRQ9
1726 06:41:50.148891 ACPI: added table 5/32, length now 56
1727 06:41:50.151725 current = 89c14bd0
1728 06:41:50.154127 ACPI: * IGD OpRegion
1729 06:41:50.156351 GMA: Found VBT in CBFS
1730 06:41:50.158488 GMA: Found valid VBT in CBFS
1731 06:41:50.163299 ACPI: added table 6/32, length now 60
1732 06:41:50.163930 ACPI: * HPET
1733 06:41:50.168966 ACPI: added table 7/32, length now 64
1734 06:41:50.169059 ACPI: done.
1735 06:41:50.172173 ACPI tables: 31872 bytes.
1736 06:41:50.175316 smbios_write_tables: 89afd000
1737 06:41:50.177285 recv_ec_data: 0x01
1738 06:41:50.179303 Create SMBIOS type 17
1739 06:41:50.182411 PCI: 00:14.3 (Intel WiFi)
1740 06:41:50.185055 SMBIOS tables: 708 bytes.
1741 06:41:50.189566 Writing table forward entry at 0x00000500
1742 06:41:50.194784 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1743 06:41:50.198791 Writing coreboot table at 0x89c33000
1744 06:41:50.205266 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1745 06:41:50.209203 1. 0000000000001000-000000000009ffff: RAM
1746 06:41:50.213761 2. 00000000000a0000-00000000000fffff: RESERVED
1747 06:41:50.218452 3. 0000000000100000-0000000089afcfff: RAM
1748 06:41:50.223742 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1749 06:41:50.228928 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1750 06:41:50.235292 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1751 06:41:50.239873 7. 000000008a000000-000000008f7fffff: RESERVED
1752 06:41:50.244543 8. 00000000e0000000-00000000efffffff: RESERVED
1753 06:41:50.248810 9. 00000000fc000000-00000000fc000fff: RESERVED
1754 06:41:50.253974 10. 00000000fe000000-00000000fe00ffff: RESERVED
1755 06:41:50.258092 11. 00000000fed10000-00000000fed17fff: RESERVED
1756 06:41:50.263612 12. 00000000fed80000-00000000fed83fff: RESERVED
1757 06:41:50.268005 13. 00000000feda0000-00000000feda1fff: RESERVED
1758 06:41:50.272219 14. 0000000100000000-000000026e7fffff: RAM
1759 06:41:50.276417 Graphics framebuffer located at 0xc0000000
1760 06:41:50.279827 Passing 6 GPIOs to payload:
1761 06:41:50.284403 NAME | PORT | POLARITY | VALUE
1762 06:41:50.290322 write protect | 0x000000dc | high | low
1763 06:41:50.295429 recovery | 0x000000d5 | low | high
1764 06:41:50.300686 lid | undefined | high | high
1765 06:41:50.305773 power | undefined | high | low
1766 06:41:50.311732 oprom | undefined | high | low
1767 06:41:50.316696 EC in RW | undefined | high | low
1768 06:41:50.318656 recv_ec_data: 0x01
1769 06:41:50.319789 SKU ID: 3
1770 06:41:50.322698 CBFS @ 1d00000 size 300000
1771 06:41:50.328476 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1772 06:41:50.334362 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 6744
1773 06:41:50.337601 coreboot table: 1484 bytes.
1774 06:41:50.340731 IMD ROOT 0. 89fff000 00001000
1775 06:41:50.343666 IMD SMALL 1. 89ffe000 00001000
1776 06:41:50.347883 FSP MEMORY 2. 89d0e000 002f0000
1777 06:41:50.351148 CONSOLE 3. 89cee000 00020000
1778 06:41:50.353766 TIME STAMP 4. 89ced000 00000910
1779 06:41:50.357508 VBOOT WORK 5. 89cea000 00003000
1780 06:41:50.360903 VBOOT 6. 89ce9000 00000c0c
1781 06:41:50.364207 MRC DATA 7. 89ce7000 000018f0
1782 06:41:50.367369 ROMSTG STCK 8. 89ce6000 00000400
1783 06:41:50.370641 AFTER CAR 9. 89cdc000 0000a000
1784 06:41:50.374449 RAMSTAGE 10. 89c80000 0005c000
1785 06:41:50.377480 REFCODE 11. 89c4b000 00035000
1786 06:41:50.381094 SMM BACKUP 12. 89c3b000 00010000
1787 06:41:50.384000 COREBOOT 13. 89c33000 00008000
1788 06:41:50.387475 ACPI 14. 89c0f000 00024000
1789 06:41:50.390298 ACPI GNVS 15. 89c0e000 00001000
1790 06:41:50.394154 RAMOOPS 16. 89b0e000 00100000
1791 06:41:50.397203 TPM2 TCGLOG17. 89afe000 00010000
1792 06:41:50.400414 SMBIOS 18. 89afd000 00000800
1793 06:41:50.402696 IMD small region:
1794 06:41:50.406451 IMD ROOT 0. 89ffec00 00000400
1795 06:41:50.408998 FSP RUNTIME 1. 89ffebe0 00000004
1796 06:41:50.413660 POWER STATE 2. 89ffeba0 00000040
1797 06:41:50.416868 ROMSTAGE 3. 89ffeb80 00000004
1798 06:41:50.419498 MEM INFO 4. 89ffe9c0 000001a9
1799 06:41:50.423358 VPD 5. 89ffe960 00000058
1800 06:41:50.427323 COREBOOTFWD 6. 89ffe920 00000028
1801 06:41:50.430403 MTRR: Physical address space:
1802 06:41:50.436516 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1803 06:41:50.441910 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1804 06:41:50.448986 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1805 06:41:50.454594 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1806 06:41:50.461234 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1807 06:41:50.467328 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1808 06:41:50.473839 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1809 06:41:50.477291 MTRR: Fixed MSR 0x250 0x0606060606060606
1810 06:41:50.481309 MTRR: Fixed MSR 0x258 0x0606060606060606
1811 06:41:50.486347 MTRR: Fixed MSR 0x259 0x0000000000000000
1812 06:41:50.490126 MTRR: Fixed MSR 0x268 0x0606060606060606
1813 06:41:50.493857 MTRR: Fixed MSR 0x269 0x0606060606060606
1814 06:41:50.497882 MTRR: Fixed MSR 0x26a 0x0606060606060606
1815 06:41:50.502509 MTRR: Fixed MSR 0x26b 0x0606060606060606
1816 06:41:50.506176 MTRR: Fixed MSR 0x26c 0x0606060606060606
1817 06:41:50.510684 MTRR: Fixed MSR 0x26d 0x0606060606060606
1818 06:41:50.514814 MTRR: Fixed MSR 0x26e 0x0606060606060606
1819 06:41:50.518610 MTRR: Fixed MSR 0x26f 0x0606060606060606
1820 06:41:50.522513 call enable_fixed_mtrr()
1821 06:41:50.525022 CPU physical address size: 39 bits
1822 06:41:50.529488 MTRR: default type WB/UC MTRR counts: 7/7.
1823 06:41:50.533336 MTRR: UC selected as default type.
1824 06:41:50.539745 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1825 06:41:50.545797 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1826 06:41:50.551385 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1827 06:41:50.558612 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1828 06:41:50.563765 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1829 06:41:50.570482 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1830 06:41:50.576748 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1831 06:41:50.577842
1832 06:41:50.578469 MTRR check
1833 06:41:50.581321 Fixed MTRRs : Enabled
1834 06:41:50.583718 Variable MTRRs: Enabled
1835 06:41:50.583810
1836 06:41:50.588227 MTRR: Fixed MSR 0x250 0x0606060606060606
1837 06:41:50.592600 MTRR: Fixed MSR 0x258 0x0606060606060606
1838 06:41:50.595899 MTRR: Fixed MSR 0x259 0x0000000000000000
1839 06:41:50.600362 MTRR: Fixed MSR 0x268 0x0606060606060606
1840 06:41:50.604512 MTRR: Fixed MSR 0x269 0x0606060606060606
1841 06:41:50.608985 MTRR: Fixed MSR 0x26a 0x0606060606060606
1842 06:41:50.612785 MTRR: Fixed MSR 0x26b 0x0606060606060606
1843 06:41:50.617328 MTRR: Fixed MSR 0x26c 0x0606060606060606
1844 06:41:50.620507 MTRR: Fixed MSR 0x26d 0x0606060606060606
1845 06:41:50.625320 MTRR: Fixed MSR 0x26e 0x0606060606060606
1846 06:41:50.629260 MTRR: Fixed MSR 0x26f 0x0606060606060606
1847 06:41:50.636421 BS: BS_WRITE_TABLES times (us): entry 17200 run 490234 exit 157203
1848 06:41:50.638887 call enable_fixed_mtrr()
1849 06:41:50.641504 CBFS @ 1d00000 size 300000
1850 06:41:50.644732 CPU physical address size: 39 bits
1851 06:41:50.651513 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1852 06:41:50.655735 MTRR: Fixed MSR 0x250 0x0606060606060606
1853 06:41:50.659336 MTRR: Fixed MSR 0x250 0x0606060606060606
1854 06:41:50.663406 MTRR: Fixed MSR 0x258 0x0606060606060606
1855 06:41:50.667962 MTRR: Fixed MSR 0x259 0x0000000000000000
1856 06:41:50.672610 MTRR: Fixed MSR 0x268 0x0606060606060606
1857 06:41:50.676135 MTRR: Fixed MSR 0x269 0x0606060606060606
1858 06:41:50.679875 MTRR: Fixed MSR 0x26a 0x0606060606060606
1859 06:41:50.684374 MTRR: Fixed MSR 0x26b 0x0606060606060606
1860 06:41:50.688177 MTRR: Fixed MSR 0x26c 0x0606060606060606
1861 06:41:50.692777 MTRR: Fixed MSR 0x26d 0x0606060606060606
1862 06:41:50.695895 MTRR: Fixed MSR 0x26e 0x0606060606060606
1863 06:41:50.700390 MTRR: Fixed MSR 0x26f 0x0606060606060606
1864 06:41:50.704965 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 06:41:50.706910 call enable_fixed_mtrr()
1866 06:41:50.711010 MTRR: Fixed MSR 0x259 0x0000000000000000
1867 06:41:50.714915 MTRR: Fixed MSR 0x268 0x0606060606060606
1868 06:41:50.719310 MTRR: Fixed MSR 0x269 0x0606060606060606
1869 06:41:50.723910 MTRR: Fixed MSR 0x26a 0x0606060606060606
1870 06:41:50.727665 MTRR: Fixed MSR 0x26b 0x0606060606060606
1871 06:41:50.731792 MTRR: Fixed MSR 0x26c 0x0606060606060606
1872 06:41:50.736165 MTRR: Fixed MSR 0x26d 0x0606060606060606
1873 06:41:50.739380 MTRR: Fixed MSR 0x26e 0x0606060606060606
1874 06:41:50.744474 MTRR: Fixed MSR 0x26f 0x0606060606060606
1875 06:41:50.747296 CPU physical address size: 39 bits
1876 06:41:50.750785 call enable_fixed_mtrr()
1877 06:41:50.754706 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 06:41:50.758300 CPU physical address size: 39 bits
1879 06:41:50.761868 CBFS: Locating 'fallback/payload'
1880 06:41:50.765523 MTRR: Fixed MSR 0x250 0x0606060606060606
1881 06:41:50.769889 MTRR: Fixed MSR 0x258 0x0606060606060606
1882 06:41:50.773883 MTRR: Fixed MSR 0x259 0x0000000000000000
1883 06:41:50.778311 MTRR: Fixed MSR 0x268 0x0606060606060606
1884 06:41:50.782165 MTRR: Fixed MSR 0x269 0x0606060606060606
1885 06:41:50.785749 MTRR: Fixed MSR 0x26a 0x0606060606060606
1886 06:41:50.789854 MTRR: Fixed MSR 0x26b 0x0606060606060606
1887 06:41:50.793952 MTRR: Fixed MSR 0x26c 0x0606060606060606
1888 06:41:50.798286 MTRR: Fixed MSR 0x26d 0x0606060606060606
1889 06:41:50.802555 MTRR: Fixed MSR 0x26e 0x0606060606060606
1890 06:41:50.806489 MTRR: Fixed MSR 0x26f 0x0606060606060606
1891 06:41:50.810993 MTRR: Fixed MSR 0x258 0x0606060606060606
1892 06:41:50.813616 call enable_fixed_mtrr()
1893 06:41:50.817765 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 06:41:50.822279 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 06:41:50.826041 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 06:41:50.829492 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 06:41:50.833440 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 06:41:50.838376 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 06:41:50.842327 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 06:41:50.846738 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 06:41:50.850054 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 06:41:50.853679 CPU physical address size: 39 bits
1903 06:41:50.856949 call enable_fixed_mtrr()
1904 06:41:50.861336 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 06:41:50.864949 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 06:41:50.869784 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 06:41:50.873210 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 06:41:50.877336 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 06:41:50.881957 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 06:41:50.885754 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 06:41:50.889760 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 06:41:50.893920 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 06:41:50.897502 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 06:41:50.901561 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 06:41:50.906490 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 06:41:50.910763 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 06:41:50.912791 call enable_fixed_mtrr()
1918 06:41:50.917255 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 06:41:50.921617 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 06:41:50.925053 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 06:41:50.929377 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 06:41:50.933404 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 06:41:50.937328 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 06:41:50.942170 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 06:41:50.946226 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 06:41:50.950005 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 06:41:50.953781 CPU physical address size: 39 bits
1928 06:41:50.956270 call enable_fixed_mtrr()
1929 06:41:50.960632 CBFS: Found @ offset 1cf4c0 size 3a954
1930 06:41:50.963249 CPU physical address size: 39 bits
1931 06:41:50.966859 CPU physical address size: 39 bits
1932 06:41:50.971655 Checking segment from ROM address 0xffecf4f8
1933 06:41:50.976617 Checking segment from ROM address 0xffecf514
1934 06:41:50.980785 Loading segment from ROM address 0xffecf4f8
1935 06:41:50.982926 code (compression=0)
1936 06:41:50.991261 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1937 06:41:51.000391 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1938 06:41:51.002108 it's not compressed!
1939 06:41:51.083990 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1940 06:41:51.091416 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1941 06:41:51.098538 Loading segment from ROM address 0xffecf514
1942 06:41:51.101651 Entry Point 0x30100018
1943 06:41:51.102949 Loaded segments
1944 06:41:51.106829 Finalizing chipset.
1945 06:41:51.108751 Finalizing SMM.
1946 06:41:51.114759 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466963 exit 5988
1947 06:41:51.117850 mp_park_aps done after 0 msecs.
1948 06:41:51.122854 Jumping to boot code at 30100018(89c33000)
1949 06:41:51.130621 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1950 06:41:51.131098
1951 06:41:51.131531
1952 06:41:51.131622
1953 06:41:51.134967 Starting depthcharge on sarien...
1954 06:41:51.135547 end: 2.2.3 depthcharge-start (duration 00:00:29) [common]
1955 06:41:51.135665 start: 2.2.4 bootloader-commands (timeout 00:04:13) [common]
1956 06:41:51.135757 Setting prompt string to ['sarien:']
1957 06:41:51.135840 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:13)
1958 06:41:51.136008
1959 06:41:51.141975 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1960 06:41:51.142068
1961 06:41:51.150420 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1962 06:41:51.150513
1963 06:41:51.158225 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1964 06:41:51.158317
1965 06:41:51.160202 BIOS MMAP details:
1966 06:41:51.160306
1967 06:41:51.162596 IFD Base Offset : 0x1000000
1968 06:41:51.162694
1969 06:41:51.165728 IFD End Offset : 0x2000000
1970 06:41:51.165822
1971 06:41:51.168354 MMAP Size : 0x1000000
1972 06:41:51.168447
1973 06:41:51.172048 MMAP Start : 0xff000000
1974 06:41:51.172713
1975 06:41:51.178294 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1976 06:41:51.182831
1977 06:41:51.187215 New NVMe Controller 0x3214e128 @ 00:1d:04
1978 06:41:51.187309
1979 06:41:51.190829 New NVMe Controller 0x3214e1f0 @ 00:1d:00
1980 06:41:51.191937
1981 06:41:51.197103 The GBB signature is at 0x30000014 and is: 24 47 42 42
1982 06:41:51.200775
1983 06:41:51.202325 Wipe memory regions:
1984 06:41:51.203100
1985 06:41:51.206577 [0x00000000001000, 0x000000000a0000)
1986 06:41:51.206696
1987 06:41:51.210651 [0x00000000100000, 0x00000030000000)
1988 06:41:51.292707
1989 06:41:51.296331 [0x00000032751910, 0x00000089afd000)
1990 06:41:51.446323
1991 06:41:51.450134 [0x00000100000000, 0x0000026e800000)
1992 06:41:52.461633
1993 06:41:52.463437 R8152: Initializing
1994 06:41:52.463869
1995 06:41:52.465614 Version 6 (ocp_data = 5c30)
1996 06:41:52.466959
1997 06:41:52.469788 R8152: Done initializing
1998 06:41:52.470230
1999 06:41:52.470865 Adding net device
2000 06:41:52.473304
2001 06:41:52.478594 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2002 06:41:52.479021
2003 06:41:52.479637
2004 06:41:52.480051
2005 06:41:52.480919 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2007 06:41:52.582160 sarien: tftpboot 192.168.201.1 12243183/tftp-deploy-ssfl5h43/kernel/bzImage 12243183/tftp-deploy-ssfl5h43/kernel/cmdline 12243183/tftp-deploy-ssfl5h43/ramdisk/ramdisk.cpio.gz
2008 06:41:52.582757 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2009 06:41:52.583280 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:12)
2010 06:41:52.624803 tftpboot 192.168.201.1 12243183/tftp-deploy-ssfl5h43/kernel/bzImage 12243183/tftp-deploy-ssfl5h43/kernel/cmdline 12243183/tftp-deploy-ssfl5h43/ramdisk/ramdisk.cpio.gz
2011 06:41:52.625329
2012 06:41:52.625678 Waiting for link
2013 06:41:52.786574
2014 06:41:52.787150 done.
2015 06:41:52.787812
2016 06:41:52.789539 MAC: 00:24:32:30:7b:ce
2017 06:41:52.790271
2018 06:41:52.792236 Sending DHCP discover... done.
2019 06:41:52.792704
2020 06:41:52.795211 Waiting for reply... done.
2021 06:41:52.795669
2022 06:41:52.798536 Sending DHCP request... done.
2023 06:41:52.798961
2024 06:41:52.804719 Waiting for reply... done.
2025 06:41:52.805461
2026 06:41:52.807256 My ip is 192.168.201.162
2027 06:41:52.808007
2028 06:41:52.810812 The DHCP server ip is 192.168.201.1
2029 06:41:52.811242
2030 06:41:52.815048 TFTP server IP predefined by user: 192.168.201.1
2031 06:41:52.815475
2032 06:41:52.822167 Bootfile predefined by user: 12243183/tftp-deploy-ssfl5h43/kernel/bzImage
2033 06:41:52.822937
2034 06:41:52.826264 Sending tftp read request... done.
2035 06:41:52.827032
2036 06:41:52.832732 Waiting for the transfer...
2037 06:41:52.833190
2038 06:41:53.564286 00000000 ################################################################
2039 06:41:53.565202
2040 06:41:54.294987 00080000 ################################################################
2041 06:41:54.295467
2042 06:41:55.021285 00100000 ################################################################
2043 06:41:55.021975
2044 06:41:55.744175 00180000 ################################################################
2045 06:41:55.745165
2046 06:41:56.472690 00200000 ################################################################
2047 06:41:56.473700
2048 06:41:57.205406 00280000 ################################################################
2049 06:41:57.206981
2050 06:41:57.924703 00300000 ################################################################
2051 06:41:57.925658
2052 06:41:58.607452 00380000 ################################################################
2053 06:41:58.608058
2054 06:41:59.289209 00400000 ################################################################
2055 06:41:59.290149
2056 06:42:00.008282 00480000 ################################################################
2057 06:42:00.009214
2058 06:42:00.723989 00500000 ################################################################
2059 06:42:00.725218
2060 06:42:01.450285 00580000 ################################################################
2061 06:42:01.450983
2062 06:42:02.169085 00600000 ################################################################
2063 06:42:02.170030
2064 06:42:02.881678 00680000 ################################################################
2065 06:42:02.882652
2066 06:42:03.582190 00700000 ################################################################
2067 06:42:03.582746
2068 06:42:04.299726 00780000 ################################################################
2069 06:42:04.300817
2070 06:42:04.563105 00800000 ####################### done.
2071 06:42:04.563773
2072 06:42:04.565912 The bootfile was 8576912 bytes long.
2073 06:42:04.566821
2074 06:42:04.569867 Sending tftp read request... done.
2075 06:42:04.570755
2076 06:42:04.573169 Waiting for the transfer...
2077 06:42:04.574549
2078 06:42:05.291930 00000000 ################################################################
2079 06:42:05.292491
2080 06:42:05.863647 00080000 ################################################################
2081 06:42:05.863802
2082 06:42:06.453876 00100000 ################################################################
2083 06:42:06.455132
2084 06:42:07.122530 00180000 ################################################################
2085 06:42:07.123538
2086 06:42:07.812374 00200000 ################################################################
2087 06:42:07.813622
2088 06:42:08.514573 00280000 ################################################################
2089 06:42:08.515754
2090 06:42:09.199171 00300000 ################################################################
2091 06:42:09.200354
2092 06:42:09.887993 00380000 ################################################################
2093 06:42:09.889108
2094 06:42:10.589885 00400000 ################################################################
2095 06:42:10.590380
2096 06:42:11.265967 00480000 ################################################################
2097 06:42:11.267475
2098 06:42:11.967431 00500000 ################################################################
2099 06:42:11.968592
2100 06:42:12.667553 00580000 ################################################################
2101 06:42:12.668849
2102 06:42:13.369099 00600000 ################################################################
2103 06:42:13.370251
2104 06:42:14.091308 00680000 ################################################################
2105 06:42:14.092639
2106 06:42:14.680776 00700000 ################################################################
2107 06:42:14.681195
2108 06:42:15.351396 00780000 ################################################################
2109 06:42:15.352634
2110 06:42:15.972405 00800000 ##################################################### done.
2111 06:42:15.972923
2112 06:42:15.975264 Sending tftp read request... done.
2113 06:42:15.975710
2114 06:42:15.979586 Waiting for the transfer...
2115 06:42:15.980149
2116 06:42:15.980728 00000000 # done.
2117 06:42:15.981282
2118 06:42:15.989636 Command line loaded dynamically from TFTP file: 12243183/tftp-deploy-ssfl5h43/kernel/cmdline
2119 06:42:15.990216
2120 06:42:16.009610 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2121 06:42:16.013520
2122 06:42:16.017243 Shutting down all USB controllers.
2123 06:42:16.018128
2124 06:42:16.020450 Removing current net device
2125 06:42:16.021378
2126 06:42:16.023693 EC: exit firmware mode
2127 06:42:16.024561
2128 06:42:16.026833 Finalizing coreboot
2129 06:42:16.027090
2130 06:42:16.031549 Exiting depthcharge with code 4 at timestamp: 50290370
2131 06:42:16.032387
2132 06:42:16.032567
2133 06:42:16.034702 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2134 06:42:16.034943 start: 2.2.5 auto-login-action (timeout 00:03:49) [common]
2135 06:42:16.035132 Setting prompt string to ['Linux version [0-9]']
2136 06:42:16.035308 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2137 06:42:16.035483 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2138 06:42:16.035925 Starting kernel ...
2139 06:42:16.036099
2140 06:42:16.036287
2142 06:46:05.035216 end: 2.2.5 auto-login-action (duration 00:03:49) [common]
2144 06:46:05.035445 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 229 seconds'
2146 06:46:05.035618 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2149 06:46:05.035931 end: 2 depthcharge-action (duration 00:05:00) [common]
2151 06:46:05.036216 Cleaning after the job
2152 06:46:05.036348 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243183/tftp-deploy-ssfl5h43/ramdisk
2153 06:46:05.037724 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243183/tftp-deploy-ssfl5h43/kernel
2154 06:46:05.039341 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243183/tftp-deploy-ssfl5h43/modules
2155 06:46:05.039720 start: 5.1 power-off (timeout 00:00:30) [common]
2156 06:46:05.039904 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=off'
2157 06:46:10.176675 >> Command sent successfully.
2158 06:46:10.179450 Returned 0 in 5 seconds
2159 06:46:10.279877 end: 5.1 power-off (duration 00:00:05) [common]
2161 06:46:10.280313 start: 5.2 read-feedback (timeout 00:09:55) [common]
2162 06:46:10.280604 Listened to connection for namespace 'common' for up to 1s
2163 06:46:11.281548 Finalising connection for namespace 'common'
2164 06:46:11.281737 Disconnecting from shell: Finalise
2165 06:46:11.281831
2166 06:46:11.382186 end: 5.2 read-feedback (duration 00:00:01) [common]
2167 06:46:11.382363 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12243183
2168 06:46:11.400448 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12243183
2169 06:46:11.400622 JobError: Your job cannot terminate cleanly.