Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 06:46:02.398988 lava-dispatcher, installed at version: 2023.10
2 06:46:02.399220 start: 0 validate
3 06:46:02.399368 Start time: 2023-12-11 06:46:02.399359+00:00 (UTC)
4 06:46:02.399508 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:46:02.399649 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 06:46:02.662859 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:46:02.663554 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1988-gdf21aeeacf3cd%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:46:02.919764 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:46:02.920599 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 06:46:03.174641 Using caching service: 'http://localhost/cache/?uri=%s'
11 06:46:03.175406 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-1988-gdf21aeeacf3cd%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 06:46:03.434120 validate duration: 1.03
14 06:46:03.434421 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 06:46:03.434525 start: 1.1 download-retry (timeout 00:10:00) [common]
16 06:46:03.434617 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 06:46:03.434755 Not decompressing ramdisk as can be used compressed.
18 06:46:03.434847 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 06:46:03.434920 saving as /var/lib/lava/dispatcher/tmp/12243178/tftp-deploy-75hi0lsf/ramdisk/initrd.cpio.gz
20 06:46:03.434992 total size: 5432480 (5 MB)
21 06:46:03.436351 progress 0 % (0 MB)
22 06:46:03.438318 progress 5 % (0 MB)
23 06:46:03.440009 progress 10 % (0 MB)
24 06:46:03.441705 progress 15 % (0 MB)
25 06:46:03.443625 progress 20 % (1 MB)
26 06:46:03.445343 progress 25 % (1 MB)
27 06:46:03.447018 progress 30 % (1 MB)
28 06:46:03.448868 progress 35 % (1 MB)
29 06:46:03.450505 progress 40 % (2 MB)
30 06:46:03.452150 progress 45 % (2 MB)
31 06:46:03.453810 progress 50 % (2 MB)
32 06:46:03.455638 progress 55 % (2 MB)
33 06:46:03.457279 progress 60 % (3 MB)
34 06:46:03.458910 progress 65 % (3 MB)
35 06:46:03.460785 progress 70 % (3 MB)
36 06:46:03.462432 progress 75 % (3 MB)
37 06:46:03.463953 progress 80 % (4 MB)
38 06:46:03.465478 progress 85 % (4 MB)
39 06:46:03.467258 progress 90 % (4 MB)
40 06:46:03.468845 progress 95 % (4 MB)
41 06:46:03.470386 progress 100 % (5 MB)
42 06:46:03.470616 5 MB downloaded in 0.04 s (145.43 MB/s)
43 06:46:03.470777 end: 1.1.1 http-download (duration 00:00:00) [common]
45 06:46:03.471035 end: 1.1 download-retry (duration 00:00:00) [common]
46 06:46:03.471127 start: 1.2 download-retry (timeout 00:10:00) [common]
47 06:46:03.471218 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 06:46:03.471360 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1988-gdf21aeeacf3cd/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 06:46:03.471438 saving as /var/lib/lava/dispatcher/tmp/12243178/tftp-deploy-75hi0lsf/kernel/bzImage
50 06:46:03.471503 total size: 8576912 (8 MB)
51 06:46:03.471583 No compression specified
52 06:46:03.472864 progress 0 % (0 MB)
53 06:46:03.475431 progress 5 % (0 MB)
54 06:46:03.477980 progress 10 % (0 MB)
55 06:46:03.480563 progress 15 % (1 MB)
56 06:46:03.483032 progress 20 % (1 MB)
57 06:46:03.485570 progress 25 % (2 MB)
58 06:46:03.488095 progress 30 % (2 MB)
59 06:46:03.490621 progress 35 % (2 MB)
60 06:46:03.493160 progress 40 % (3 MB)
61 06:46:03.495637 progress 45 % (3 MB)
62 06:46:03.498196 progress 50 % (4 MB)
63 06:46:03.500733 progress 55 % (4 MB)
64 06:46:03.503390 progress 60 % (4 MB)
65 06:46:03.505890 progress 65 % (5 MB)
66 06:46:03.508444 progress 70 % (5 MB)
67 06:46:03.510874 progress 75 % (6 MB)
68 06:46:03.513511 progress 80 % (6 MB)
69 06:46:03.515970 progress 85 % (6 MB)
70 06:46:03.518467 progress 90 % (7 MB)
71 06:46:03.521024 progress 95 % (7 MB)
72 06:46:03.523466 progress 100 % (8 MB)
73 06:46:03.523688 8 MB downloaded in 0.05 s (156.76 MB/s)
74 06:46:03.523844 end: 1.2.1 http-download (duration 00:00:00) [common]
76 06:46:03.524093 end: 1.2 download-retry (duration 00:00:00) [common]
77 06:46:03.524193 start: 1.3 download-retry (timeout 00:10:00) [common]
78 06:46:03.524298 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 06:46:03.524450 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 06:46:03.524525 saving as /var/lib/lava/dispatcher/tmp/12243178/tftp-deploy-75hi0lsf/nfsrootfs/full.rootfs.tar
81 06:46:03.524591 total size: 207157356 (197 MB)
82 06:46:03.524657 Using unxz to decompress xz
83 06:46:03.529305 progress 0 % (0 MB)
84 06:46:04.145941 progress 5 % (9 MB)
85 06:46:04.734301 progress 10 % (19 MB)
86 06:46:05.410765 progress 15 % (29 MB)
87 06:46:05.813517 progress 20 % (39 MB)
88 06:46:06.215329 progress 25 % (49 MB)
89 06:46:06.889622 progress 30 % (59 MB)
90 06:46:07.499076 progress 35 % (69 MB)
91 06:46:08.177450 progress 40 % (79 MB)
92 06:46:08.801589 progress 45 % (88 MB)
93 06:46:09.456094 progress 50 % (98 MB)
94 06:46:10.163918 progress 55 % (108 MB)
95 06:46:10.933135 progress 60 % (118 MB)
96 06:46:11.085929 progress 65 % (128 MB)
97 06:46:11.240284 progress 70 % (138 MB)
98 06:46:11.343715 progress 75 % (148 MB)
99 06:46:11.421550 progress 80 % (158 MB)
100 06:46:11.499345 progress 85 % (167 MB)
101 06:46:11.609935 progress 90 % (177 MB)
102 06:46:11.911745 progress 95 % (187 MB)
103 06:46:12.563240 progress 100 % (197 MB)
104 06:46:12.570146 197 MB downloaded in 9.05 s (21.84 MB/s)
105 06:46:12.570417 end: 1.3.1 http-download (duration 00:00:09) [common]
107 06:46:12.570700 end: 1.3 download-retry (duration 00:00:09) [common]
108 06:46:12.570797 start: 1.4 download-retry (timeout 00:09:51) [common]
109 06:46:12.570893 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 06:46:12.571052 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-1988-gdf21aeeacf3cd/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 06:46:12.571129 saving as /var/lib/lava/dispatcher/tmp/12243178/tftp-deploy-75hi0lsf/modules/modules.tar
112 06:46:12.571193 total size: 250896 (0 MB)
113 06:46:12.571261 Using unxz to decompress xz
114 06:46:12.575663 progress 13 % (0 MB)
115 06:46:12.576100 progress 26 % (0 MB)
116 06:46:12.576399 progress 39 % (0 MB)
117 06:46:12.578203 progress 52 % (0 MB)
118 06:46:12.580308 progress 65 % (0 MB)
119 06:46:12.582359 progress 78 % (0 MB)
120 06:46:12.584320 progress 91 % (0 MB)
121 06:46:12.586510 progress 100 % (0 MB)
122 06:46:12.592466 0 MB downloaded in 0.02 s (11.25 MB/s)
123 06:46:12.592713 end: 1.4.1 http-download (duration 00:00:00) [common]
125 06:46:12.593000 end: 1.4 download-retry (duration 00:00:00) [common]
126 06:46:12.593105 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 06:46:12.593287 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 06:46:16.540660 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12243178/extract-nfsrootfs-k60myfgo
129 06:46:16.540881 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 06:46:16.540990 start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
131 06:46:16.541176 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78
132 06:46:16.541324 makedir: /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin
133 06:46:16.541439 makedir: /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/tests
134 06:46:16.541551 makedir: /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/results
135 06:46:16.541664 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-add-keys
136 06:46:16.541826 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-add-sources
137 06:46:16.541975 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-background-process-start
138 06:46:16.542121 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-background-process-stop
139 06:46:16.542265 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-common-functions
140 06:46:16.542412 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-echo-ipv4
141 06:46:16.542559 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-install-packages
142 06:46:16.542699 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-installed-packages
143 06:46:16.542839 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-os-build
144 06:46:16.542979 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-probe-channel
145 06:46:16.543121 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-probe-ip
146 06:46:16.543263 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-target-ip
147 06:46:16.543405 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-target-mac
148 06:46:16.543545 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-target-storage
149 06:46:16.543688 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-test-case
150 06:46:16.543833 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-test-event
151 06:46:16.543974 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-test-feedback
152 06:46:16.544115 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-test-raise
153 06:46:16.544258 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-test-reference
154 06:46:16.544399 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-test-runner
155 06:46:16.544539 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-test-set
156 06:46:16.544680 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-test-shell
157 06:46:16.544822 Updating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-add-keys (debian)
158 06:46:16.544994 Updating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-add-sources (debian)
159 06:46:16.545153 Updating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-install-packages (debian)
160 06:46:16.545311 Updating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-installed-packages (debian)
161 06:46:16.545468 Updating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/bin/lava-os-build (debian)
162 06:46:16.545605 Creating /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/environment
163 06:46:16.545712 LAVA metadata
164 06:46:16.545791 - LAVA_JOB_ID=12243178
165 06:46:16.545861 - LAVA_DISPATCHER_IP=192.168.201.1
166 06:46:16.545985 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
167 06:46:16.546060 skipped lava-vland-overlay
168 06:46:16.546143 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 06:46:16.546232 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
170 06:46:16.546300 skipped lava-multinode-overlay
171 06:46:16.546381 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 06:46:16.546468 start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
173 06:46:16.546549 Loading test definitions
174 06:46:16.546649 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:47) [common]
175 06:46:16.546728 Using /lava-12243178 at stage 0
176 06:46:16.547047 uuid=12243178_1.5.2.3.1 testdef=None
177 06:46:16.547146 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 06:46:16.547239 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
179 06:46:16.547745 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 06:46:16.547991 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
182 06:46:16.548790 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 06:46:16.549054 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
185 06:46:16.549665 runner path: /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/0/tests/0_timesync-off test_uuid 12243178_1.5.2.3.1
186 06:46:16.549845 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 06:46:16.550096 start: 1.5.2.3.5 git-repo-action (timeout 00:09:47) [common]
189 06:46:16.550178 Using /lava-12243178 at stage 0
190 06:46:16.550286 Fetching tests from https://github.com/kernelci/test-definitions.git
191 06:46:16.550374 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/0/tests/1_kselftest-filesystems'
192 06:46:19.402283 Running '/usr/bin/git checkout kernelci.org
193 06:46:19.564943 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
194 06:46:19.565753 uuid=12243178_1.5.2.3.5 testdef=None
195 06:46:19.565922 end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
197 06:46:19.566227 start: 1.5.2.3.6 test-overlay (timeout 00:09:44) [common]
198 06:46:19.567077 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 06:46:19.567335 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:44) [common]
201 06:46:19.568505 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 06:46:19.568761 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
204 06:46:19.569773 runner path: /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/0/tests/1_kselftest-filesystems test_uuid 12243178_1.5.2.3.5
205 06:46:19.569875 BOARD='asus-C436FA-Flip-hatch'
206 06:46:19.569945 BRANCH='cip'
207 06:46:19.570041 SKIPFILE='/dev/null'
208 06:46:19.570104 SKIP_INSTALL='True'
209 06:46:19.570164 TESTPROG_URL='None'
210 06:46:19.570224 TST_CASENAME=''
211 06:46:19.570283 TST_CMDFILES='filesystems'
212 06:46:19.570439 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 06:46:19.570656 Creating lava-test-runner.conf files
215 06:46:19.570725 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12243178/lava-overlay-es1jse78/lava-12243178/0 for stage 0
216 06:46:19.570830 - 0_timesync-off
217 06:46:19.570905 - 1_kselftest-filesystems
218 06:46:19.571012 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
219 06:46:19.571107 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
220 06:46:27.915177 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
221 06:46:27.915348 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
222 06:46:27.915454 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 06:46:27.915567 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
224 06:46:27.915668 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
225 06:46:28.070077 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 06:46:28.070518 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
227 06:46:28.070659 extracting modules file /var/lib/lava/dispatcher/tmp/12243178/tftp-deploy-75hi0lsf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243178/extract-nfsrootfs-k60myfgo
228 06:46:28.085797 extracting modules file /var/lib/lava/dispatcher/tmp/12243178/tftp-deploy-75hi0lsf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12243178/extract-overlay-ramdisk-_p6xeffs/ramdisk
229 06:46:28.100942 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 06:46:28.101090 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
231 06:46:28.101193 [common] Applying overlay to NFS
232 06:46:28.101269 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12243178/compress-overlay-wvof_8kh/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12243178/extract-nfsrootfs-k60myfgo
233 06:46:29.138462 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 06:46:29.138652 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
235 06:46:29.138767 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 06:46:29.138869 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
237 06:46:29.138963 Building ramdisk /var/lib/lava/dispatcher/tmp/12243178/extract-overlay-ramdisk-_p6xeffs/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12243178/extract-overlay-ramdisk-_p6xeffs/ramdisk
238 06:46:29.217520 >> 26160 blocks
239 06:46:29.807183 rename /var/lib/lava/dispatcher/tmp/12243178/extract-overlay-ramdisk-_p6xeffs/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12243178/tftp-deploy-75hi0lsf/ramdisk/ramdisk.cpio.gz
240 06:46:29.807689 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 06:46:29.807832 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
242 06:46:29.807953 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
243 06:46:29.808065 No mkimage arch provided, not using FIT.
244 06:46:29.808161 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 06:46:29.808262 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 06:46:29.808382 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
247 06:46:29.808486 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
248 06:46:29.808589 No LXC device requested
249 06:46:29.808685 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 06:46:29.808785 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
251 06:46:29.808881 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 06:46:29.808967 Checking files for TFTP limit of 4294967296 bytes.
253 06:46:29.809419 end: 1 tftp-deploy (duration 00:00:26) [common]
254 06:46:29.809539 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 06:46:29.809639 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 06:46:29.809782 substitutions:
257 06:46:29.809860 - {DTB}: None
258 06:46:29.809930 - {INITRD}: 12243178/tftp-deploy-75hi0lsf/ramdisk/ramdisk.cpio.gz
259 06:46:29.809996 - {KERNEL}: 12243178/tftp-deploy-75hi0lsf/kernel/bzImage
260 06:46:29.810058 - {LAVA_MAC}: None
261 06:46:29.810121 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12243178/extract-nfsrootfs-k60myfgo
262 06:46:29.810184 - {NFS_SERVER_IP}: 192.168.201.1
263 06:46:29.810245 - {PRESEED_CONFIG}: None
264 06:46:29.810304 - {PRESEED_LOCAL}: None
265 06:46:29.810364 - {RAMDISK}: 12243178/tftp-deploy-75hi0lsf/ramdisk/ramdisk.cpio.gz
266 06:46:29.810423 - {ROOT_PART}: None
267 06:46:29.810483 - {ROOT}: None
268 06:46:29.810541 - {SERVER_IP}: 192.168.201.1
269 06:46:29.810601 - {TEE}: None
270 06:46:29.810659 Parsed boot commands:
271 06:46:29.810720 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 06:46:29.810917 Parsed boot commands: tftpboot 192.168.201.1 12243178/tftp-deploy-75hi0lsf/kernel/bzImage 12243178/tftp-deploy-75hi0lsf/kernel/cmdline 12243178/tftp-deploy-75hi0lsf/ramdisk/ramdisk.cpio.gz
273 06:46:29.811017 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 06:46:29.811106 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 06:46:29.811207 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 06:46:29.811306 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 06:46:29.811383 Not connected, no need to disconnect.
278 06:46:29.811464 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 06:46:29.811555 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 06:46:29.811626 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
281 06:46:29.816022 Setting prompt string to ['lava-test: # ']
282 06:46:29.816433 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 06:46:29.816557 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 06:46:29.816663 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 06:46:29.816768 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 06:46:29.816987 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
287 06:46:34.953352 >> Command sent successfully.
288 06:46:34.956061 Returned 0 in 5 seconds
289 06:46:35.056378 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 06:46:35.056724 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 06:46:35.056836 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 06:46:35.056942 Setting prompt string to 'Starting depthcharge on Helios...'
294 06:46:35.057019 Changing prompt to 'Starting depthcharge on Helios...'
295 06:46:35.057095 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 06:46:35.057390 [Enter `^Ec?' for help]
297 06:46:35.678863
298 06:46:35.679037
299 06:46:35.689411 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 06:46:35.692722 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 06:46:35.699681 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 06:46:35.702664 CPU: AES supported, TXT NOT supported, VT supported
303 06:46:35.710186 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 06:46:35.713207 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 06:46:35.719660 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 06:46:35.724023 VBOOT: Loading verstage.
307 06:46:35.727117 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 06:46:35.733071 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 06:46:35.736185 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 06:46:35.740089 CBFS @ c08000 size 3f8000
311 06:46:35.746441 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 06:46:35.749961 CBFS: Locating 'fallback/verstage'
313 06:46:35.753245 CBFS: Found @ offset 10fb80 size 1072c
314 06:46:35.753337
315 06:46:35.753411
316 06:46:35.766103 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 06:46:35.779972 Probing TPM: . done!
318 06:46:35.783623 TPM ready after 0 ms
319 06:46:35.787027 Connected to device vid:did:rid of 1ae0:0028:00
320 06:46:35.796946 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 06:46:35.800650 Initialized TPM device CR50 revision 0
322 06:46:35.847236 tlcl_send_startup: Startup return code is 0
323 06:46:35.847355 TPM: setup succeeded
324 06:46:35.859293 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 06:46:35.862645 Chrome EC: UHEPI supported
326 06:46:35.866046 Phase 1
327 06:46:35.869378 FMAP: area GBB found @ c05000 (12288 bytes)
328 06:46:35.875762 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 06:46:35.875888 Phase 2
330 06:46:35.879184 Phase 3
331 06:46:35.882812 FMAP: area GBB found @ c05000 (12288 bytes)
332 06:46:35.889339 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 06:46:35.896083 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
334 06:46:35.899928 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
335 06:46:35.906350 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 06:46:35.921377 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
337 06:46:35.924595 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
338 06:46:35.931240 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 06:46:35.935473 Phase 4
340 06:46:35.938949 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
341 06:46:35.945603 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 06:46:36.125318 VB2:vb2_rsa_verify_digest() Digest check failed!
343 06:46:36.132063 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 06:46:36.132160 Saving nvdata
345 06:46:36.135445 Reboot requested (10020007)
346 06:46:36.138435 board_reset() called!
347 06:46:36.138526 full_reset() called!
348 06:46:40.647163
349 06:46:40.647636
350 06:46:40.656979 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 06:46:40.660830 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 06:46:40.666624 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 06:46:40.670078 CPU: AES supported, TXT NOT supported, VT supported
354 06:46:40.676948 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 06:46:40.680339 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 06:46:40.687137 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 06:46:40.689935 VBOOT: Loading verstage.
358 06:46:40.694163 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 06:46:40.700434 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 06:46:40.703541 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 06:46:40.706770 CBFS @ c08000 size 3f8000
362 06:46:40.713261 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 06:46:40.716839 CBFS: Locating 'fallback/verstage'
364 06:46:40.719790 CBFS: Found @ offset 10fb80 size 1072c
365 06:46:40.723854
366 06:46:40.724280
367 06:46:40.733394 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 06:46:40.748426 Probing TPM: . done!
369 06:46:40.751783 TPM ready after 0 ms
370 06:46:40.754877 Connected to device vid:did:rid of 1ae0:0028:00
371 06:46:40.765133 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
372 06:46:40.768762 Initialized TPM device CR50 revision 0
373 06:46:40.815389 tlcl_send_startup: Startup return code is 0
374 06:46:40.815880 TPM: setup succeeded
375 06:46:40.827799 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 06:46:40.831821 Chrome EC: UHEPI supported
377 06:46:40.835213 Phase 1
378 06:46:40.838206 FMAP: area GBB found @ c05000 (12288 bytes)
379 06:46:40.845144 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 06:46:40.851488 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 06:46:40.855341 Recovery requested (1009000e)
382 06:46:40.860625 Saving nvdata
383 06:46:40.867074 tlcl_extend: response is 0
384 06:46:40.875998 tlcl_extend: response is 0
385 06:46:40.882970 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 06:46:40.885887 CBFS @ c08000 size 3f8000
387 06:46:40.892586 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 06:46:40.895787 CBFS: Locating 'fallback/romstage'
389 06:46:40.899426 CBFS: Found @ offset 80 size 145fc
390 06:46:40.903051 Accumulated console time in verstage 98 ms
391 06:46:40.903580
392 06:46:40.903895
393 06:46:40.916126 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 06:46:40.922043 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 06:46:40.925644 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 06:46:40.928822 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 06:46:40.935542 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 06:46:40.938803 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 06:46:40.941977 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
400 06:46:40.945859 TCO_STS: 0000 0000
401 06:46:40.948428 GEN_PMCON: e0015238 00000200
402 06:46:40.951791 GBLRST_CAUSE: 00000000 00000000
403 06:46:40.952176 prev_sleep_state 5
404 06:46:40.964534 Boot Count incremented to 66879
405 06:46:40.964942 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 06:46:40.965705 CBFS @ c08000 size 3f8000
407 06:46:40.971861 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 06:46:40.972288 CBFS: Locating 'fspm.bin'
409 06:46:40.978540 CBFS: Found @ offset 5ffc0 size 71000
410 06:46:40.981917 Chrome EC: UHEPI supported
411 06:46:40.988533 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 06:46:40.992299 Probing TPM: done!
413 06:46:40.999406 Connected to device vid:did:rid of 1ae0:0028:00
414 06:46:41.009343 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
415 06:46:41.015097 Initialized TPM device CR50 revision 0
416 06:46:41.023741 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 06:46:41.030568 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 06:46:41.033408 MRC cache found, size 1948
419 06:46:41.036783 bootmode is set to: 2
420 06:46:41.039911 PRMRR disabled by config.
421 06:46:41.040359 SPD INDEX = 1
422 06:46:41.047079 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 06:46:41.050277 CBFS @ c08000 size 3f8000
424 06:46:41.056574 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 06:46:41.056970 CBFS: Locating 'spd.bin'
426 06:46:41.060159 CBFS: Found @ offset 5fb80 size 400
427 06:46:41.063731 SPD: module type is LPDDR3
428 06:46:41.067095 SPD: module part is
429 06:46:41.073130 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 06:46:41.076502 SPD: device width 4 bits, bus width 8 bits
431 06:46:41.080009 SPD: module size is 4096 MB (per channel)
432 06:46:41.083577 memory slot: 0 configuration done.
433 06:46:41.086723 memory slot: 2 configuration done.
434 06:46:41.138176 CBMEM:
435 06:46:41.141957 IMD: root @ 99fff000 254 entries.
436 06:46:41.144832 IMD: root @ 99ffec00 62 entries.
437 06:46:41.148423 External stage cache:
438 06:46:41.151382 IMD: root @ 9abff000 254 entries.
439 06:46:41.155047 IMD: root @ 9abfec00 62 entries.
440 06:46:41.158021 Chrome EC: clear events_b mask to 0x0000000020004000
441 06:46:41.174499 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 06:46:41.187532 tlcl_write: response is 0
443 06:46:41.197112 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 06:46:41.203508 MRC: TPM MRC hash updated successfully.
445 06:46:41.203981 2 DIMMs found
446 06:46:41.206336 SMM Memory Map
447 06:46:41.209774 SMRAM : 0x9a000000 0x1000000
448 06:46:41.213196 Subregion 0: 0x9a000000 0xa00000
449 06:46:41.216814 Subregion 1: 0x9aa00000 0x200000
450 06:46:41.219999 Subregion 2: 0x9ac00000 0x400000
451 06:46:41.223090 top_of_ram = 0x9a000000
452 06:46:41.227030 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 06:46:41.233517 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 06:46:41.236316 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 06:46:41.242760 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 06:46:41.246383 CBFS @ c08000 size 3f8000
457 06:46:41.249496 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 06:46:41.253694 CBFS: Locating 'fallback/postcar'
459 06:46:41.256143 CBFS: Found @ offset 107000 size 4b44
460 06:46:41.262695 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 06:46:41.275543 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 06:46:41.278787 Processing 180 relocs. Offset value of 0x97c0c000
463 06:46:41.287255 Accumulated console time in romstage 286 ms
464 06:46:41.287861
465 06:46:41.288182
466 06:46:41.297165 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 06:46:41.303618 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 06:46:41.306648 CBFS @ c08000 size 3f8000
469 06:46:41.310216 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 06:46:41.316705 CBFS: Locating 'fallback/ramstage'
471 06:46:41.320299 CBFS: Found @ offset 43380 size 1b9e8
472 06:46:41.327063 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 06:46:41.358436 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 06:46:41.361821 Processing 3976 relocs. Offset value of 0x98db0000
475 06:46:41.368919 Accumulated console time in postcar 52 ms
476 06:46:41.369421
477 06:46:41.369748
478 06:46:41.378849 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 06:46:41.385375 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 06:46:41.389081 WARNING: RO_VPD is uninitialized or empty.
481 06:46:41.391682 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 06:46:41.398495 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 06:46:41.398987 Normal boot.
484 06:46:41.405140 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 06:46:41.408879 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 06:46:41.412205 CBFS @ c08000 size 3f8000
487 06:46:41.418336 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 06:46:41.421830 CBFS: Locating 'cpu_microcode_blob.bin'
489 06:46:41.424887 CBFS: Found @ offset 14700 size 2ec00
490 06:46:41.428683 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 06:46:41.431598 Skip microcode update
492 06:46:41.438607 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 06:46:41.439153 CBFS @ c08000 size 3f8000
494 06:46:41.445240 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 06:46:41.448846 CBFS: Locating 'fsps.bin'
496 06:46:41.451449 CBFS: Found @ offset d1fc0 size 35000
497 06:46:41.477291 Detected 4 core, 8 thread CPU.
498 06:46:41.480388 Setting up SMI for CPU
499 06:46:41.483528 IED base = 0x9ac00000
500 06:46:41.484005 IED size = 0x00400000
501 06:46:41.486876 Will perform SMM setup.
502 06:46:41.493478 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 06:46:41.500163 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 06:46:41.503366 Processing 16 relocs. Offset value of 0x00030000
505 06:46:41.506999 Attempting to start 7 APs
506 06:46:41.510179 Waiting for 10ms after sending INIT.
507 06:46:41.526756 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
508 06:46:41.527241 done.
509 06:46:41.530108 AP: slot 6 apic_id 5.
510 06:46:41.533279 AP: slot 5 apic_id 4.
511 06:46:41.536287 Waiting for 2nd SIPI to complete...done.
512 06:46:41.539459 AP: slot 4 apic_id 2.
513 06:46:41.539848 AP: slot 1 apic_id 3.
514 06:46:41.543053 AP: slot 7 apic_id 7.
515 06:46:41.546446 AP: slot 2 apic_id 6.
516 06:46:41.553170 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 06:46:41.559864 Processing 13 relocs. Offset value of 0x00038000
518 06:46:41.566052 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 06:46:41.569804 Installing SMM handler to 0x9a000000
520 06:46:41.576169 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 06:46:41.583621 Processing 658 relocs. Offset value of 0x9a010000
522 06:46:41.589672 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 06:46:41.592890 Processing 13 relocs. Offset value of 0x9a008000
524 06:46:41.599373 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 06:46:41.606211 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 06:46:41.612852 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 06:46:41.616005 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 06:46:41.622249 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 06:46:41.628895 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 06:46:41.635777 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 06:46:41.639164 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 06:46:41.642927 Clearing SMI status registers
533 06:46:41.646106 SMI_STS: PM1
534 06:46:41.646646 PM1_STS: PWRBTN
535 06:46:41.649661 TCO_STS: SECOND_TO
536 06:46:41.652832 New SMBASE 0x9a000000
537 06:46:41.655808 In relocation handler: CPU 0
538 06:46:41.659813 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 06:46:41.662872 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 06:46:41.665851 Relocation complete.
541 06:46:41.669694 New SMBASE 0x99fff400
542 06:46:41.670201 In relocation handler: CPU 3
543 06:46:41.675781 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
544 06:46:41.679848 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 06:46:41.682737 Relocation complete.
546 06:46:41.683128 New SMBASE 0x99fff000
547 06:46:41.686002 In relocation handler: CPU 4
548 06:46:41.692584 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
549 06:46:41.696531 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 06:46:41.699876 Relocation complete.
551 06:46:41.700408 New SMBASE 0x99fffc00
552 06:46:41.703059 In relocation handler: CPU 1
553 06:46:41.709017 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
554 06:46:41.712931 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 06:46:41.715847 Relocation complete.
556 06:46:41.716236 New SMBASE 0x99ffe400
557 06:46:41.719173 In relocation handler: CPU 7
558 06:46:41.722333 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
559 06:46:41.729180 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 06:46:41.732811 Relocation complete.
561 06:46:41.733170 New SMBASE 0x99fff800
562 06:46:41.735607 In relocation handler: CPU 2
563 06:46:41.739527 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
564 06:46:41.745767 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 06:46:41.746215 Relocation complete.
566 06:46:41.749357 New SMBASE 0x99ffec00
567 06:46:41.752676 In relocation handler: CPU 5
568 06:46:41.755832 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
569 06:46:41.762346 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 06:46:41.762923 Relocation complete.
571 06:46:41.765925 New SMBASE 0x99ffe800
572 06:46:41.769279 In relocation handler: CPU 6
573 06:46:41.772330 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
574 06:46:41.778667 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 06:46:41.779031 Relocation complete.
576 06:46:41.782009 Initializing CPU #0
577 06:46:41.785694 CPU: vendor Intel device 806ec
578 06:46:41.789223 CPU: family 06, model 8e, stepping 0c
579 06:46:41.792522 Clearing out pending MCEs
580 06:46:41.796306 Setting up local APIC...
581 06:46:41.796668 apic_id: 0x00 done.
582 06:46:41.798812 Turbo is available but hidden
583 06:46:41.802768 Turbo is available and visible
584 06:46:41.806242 VMX status: enabled
585 06:46:41.808901 IA32_FEATURE_CONTROL status: locked
586 06:46:41.812553 Skip microcode update
587 06:46:41.812913 CPU #0 initialized
588 06:46:41.815563 Initializing CPU #3
589 06:46:41.815951 Initializing CPU #5
590 06:46:41.819458 Initializing CPU #6
591 06:46:41.822671 CPU: vendor Intel device 806ec
592 06:46:41.825751 CPU: family 06, model 8e, stepping 0c
593 06:46:41.829007 CPU: vendor Intel device 806ec
594 06:46:41.832294 CPU: family 06, model 8e, stepping 0c
595 06:46:41.835812 Clearing out pending MCEs
596 06:46:41.838668 Initializing CPU #4
597 06:46:41.839057 Initializing CPU #1
598 06:46:41.842282 CPU: vendor Intel device 806ec
599 06:46:41.846242 CPU: family 06, model 8e, stepping 0c
600 06:46:41.848818 CPU: vendor Intel device 806ec
601 06:46:41.851905 CPU: family 06, model 8e, stepping 0c
602 06:46:41.855491 Clearing out pending MCEs
603 06:46:41.858731 Clearing out pending MCEs
604 06:46:41.862348 Setting up local APIC...
605 06:46:41.865338 CPU: vendor Intel device 806ec
606 06:46:41.868981 CPU: family 06, model 8e, stepping 0c
607 06:46:41.872020 Clearing out pending MCEs
608 06:46:41.872402 Clearing out pending MCEs
609 06:46:41.876017 Setting up local APIC...
610 06:46:41.878812 Setting up local APIC...
611 06:46:41.882353 Initializing CPU #2
612 06:46:41.882784 Initializing CPU #7
613 06:46:41.885329 CPU: vendor Intel device 806ec
614 06:46:41.888728 CPU: family 06, model 8e, stepping 0c
615 06:46:41.891636 apic_id: 0x05 done.
616 06:46:41.894926 Setting up local APIC...
617 06:46:41.895287 apic_id: 0x02 done.
618 06:46:41.898264 Setting up local APIC...
619 06:46:41.901645 apic_id: 0x01 done.
620 06:46:41.902007 apic_id: 0x03 done.
621 06:46:41.904827 VMX status: enabled
622 06:46:41.908490 VMX status: enabled
623 06:46:41.912564 IA32_FEATURE_CONTROL status: locked
624 06:46:41.914984 IA32_FEATURE_CONTROL status: locked
625 06:46:41.915346 Skip microcode update
626 06:46:41.918856 Skip microcode update
627 06:46:41.922469 CPU #4 initialized
628 06:46:41.922967 CPU #1 initialized
629 06:46:41.925151 Clearing out pending MCEs
630 06:46:41.928801 CPU: vendor Intel device 806ec
631 06:46:41.932148 CPU: family 06, model 8e, stepping 0c
632 06:46:41.935372 Setting up local APIC...
633 06:46:41.938386 apic_id: 0x04 done.
634 06:46:41.938775 VMX status: enabled
635 06:46:41.941927 VMX status: enabled
636 06:46:41.945631 IA32_FEATURE_CONTROL status: locked
637 06:46:41.946120 VMX status: enabled
638 06:46:41.948234 Clearing out pending MCEs
639 06:46:41.951670 apic_id: 0x06 done.
640 06:46:41.955498 Setting up local APIC...
641 06:46:41.958332 IA32_FEATURE_CONTROL status: locked
642 06:46:41.961675 IA32_FEATURE_CONTROL status: locked
643 06:46:41.964988 Skip microcode update
644 06:46:41.965377 Skip microcode update
645 06:46:41.967936 CPU #6 initialized
646 06:46:41.968362 CPU #5 initialized
647 06:46:41.971337 apic_id: 0x07 done.
648 06:46:41.975014 VMX status: enabled
649 06:46:41.975521 VMX status: enabled
650 06:46:41.978522 IA32_FEATURE_CONTROL status: locked
651 06:46:41.981809 IA32_FEATURE_CONTROL status: locked
652 06:46:41.984714 Skip microcode update
653 06:46:41.988034 Skip microcode update
654 06:46:41.988467 CPU #2 initialized
655 06:46:41.991733 CPU #7 initialized
656 06:46:41.995139 Skip microcode update
657 06:46:41.995595 CPU #3 initialized
658 06:46:42.001712 bsp_do_flight_plan done after 461 msecs.
659 06:46:42.002240 CPU: frequency set to 4200 MHz
660 06:46:42.004544 Enabling SMIs.
661 06:46:42.004927 Locking SMM.
662 06:46:42.020808 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 06:46:42.024362 CBFS @ c08000 size 3f8000
664 06:46:42.030934 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 06:46:42.031459 CBFS: Locating 'vbt.bin'
666 06:46:42.034696 CBFS: Found @ offset 5f5c0 size 499
667 06:46:42.041198 Found a VBT of 4608 bytes after decompression
668 06:46:42.223077 Display FSP Version Info HOB
669 06:46:42.225611 Reference Code - CPU = 9.0.1e.30
670 06:46:42.229178 uCode Version = 0.0.0.ca
671 06:46:42.232654 TXT ACM version = ff.ff.ff.ffff
672 06:46:42.236095 Display FSP Version Info HOB
673 06:46:42.239079 Reference Code - ME = 9.0.1e.30
674 06:46:42.242879 MEBx version = 0.0.0.0
675 06:46:42.245909 ME Firmware Version = Consumer SKU
676 06:46:42.249092 Display FSP Version Info HOB
677 06:46:42.252218 Reference Code - CML PCH = 9.0.1e.30
678 06:46:42.255883 PCH-CRID Status = Disabled
679 06:46:42.259104 PCH-CRID Original Value = ff.ff.ff.ffff
680 06:46:42.261981 PCH-CRID New Value = ff.ff.ff.ffff
681 06:46:42.265883 OPROM - RST - RAID = ff.ff.ff.ffff
682 06:46:42.268596 ChipsetInit Base Version = ff.ff.ff.ffff
683 06:46:42.272396 ChipsetInit Oem Version = ff.ff.ff.ffff
684 06:46:42.275682 Display FSP Version Info HOB
685 06:46:42.282802 Reference Code - SA - System Agent = 9.0.1e.30
686 06:46:42.285557 Reference Code - MRC = 0.7.1.6c
687 06:46:42.286018 SA - PCIe Version = 9.0.1e.30
688 06:46:42.288855 SA-CRID Status = Disabled
689 06:46:42.292764 SA-CRID Original Value = 0.0.0.c
690 06:46:42.295994 SA-CRID New Value = 0.0.0.c
691 06:46:42.298799 OPROM - VBIOS = ff.ff.ff.ffff
692 06:46:42.302495 RTC Init
693 06:46:42.305742 Set power on after power failure.
694 06:46:42.306260 Disabling Deep S3
695 06:46:42.309159 Disabling Deep S3
696 06:46:42.309584 Disabling Deep S4
697 06:46:42.312352 Disabling Deep S4
698 06:46:42.312738 Disabling Deep S5
699 06:46:42.315780 Disabling Deep S5
700 06:46:42.321950 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
701 06:46:42.322463 Enumerating buses...
702 06:46:42.328773 Show all devs... Before device enumeration.
703 06:46:42.329271 Root Device: enabled 1
704 06:46:42.332151 CPU_CLUSTER: 0: enabled 1
705 06:46:42.335918 DOMAIN: 0000: enabled 1
706 06:46:42.338814 APIC: 00: enabled 1
707 06:46:42.339195 PCI: 00:00.0: enabled 1
708 06:46:42.342107 PCI: 00:02.0: enabled 1
709 06:46:42.345363 PCI: 00:04.0: enabled 0
710 06:46:42.345750 PCI: 00:05.0: enabled 0
711 06:46:42.348931 PCI: 00:12.0: enabled 1
712 06:46:42.352346 PCI: 00:12.5: enabled 0
713 06:46:42.355323 PCI: 00:12.6: enabled 0
714 06:46:42.355709 PCI: 00:14.0: enabled 1
715 06:46:42.358720 PCI: 00:14.1: enabled 0
716 06:46:42.362054 PCI: 00:14.3: enabled 1
717 06:46:42.365499 PCI: 00:14.5: enabled 0
718 06:46:42.365882 PCI: 00:15.0: enabled 1
719 06:46:42.368581 PCI: 00:15.1: enabled 1
720 06:46:42.371690 PCI: 00:15.2: enabled 0
721 06:46:42.374919 PCI: 00:15.3: enabled 0
722 06:46:42.375304 PCI: 00:16.0: enabled 1
723 06:46:42.378706 PCI: 00:16.1: enabled 0
724 06:46:42.381895 PCI: 00:16.2: enabled 0
725 06:46:42.382377 PCI: 00:16.3: enabled 0
726 06:46:42.384869 PCI: 00:16.4: enabled 0
727 06:46:42.388198 PCI: 00:16.5: enabled 0
728 06:46:42.392065 PCI: 00:17.0: enabled 1
729 06:46:42.392614 PCI: 00:19.0: enabled 1
730 06:46:42.395561 PCI: 00:19.1: enabled 0
731 06:46:42.398916 PCI: 00:19.2: enabled 0
732 06:46:42.401837 PCI: 00:1a.0: enabled 0
733 06:46:42.402351 PCI: 00:1c.0: enabled 0
734 06:46:42.404858 PCI: 00:1c.1: enabled 0
735 06:46:42.408200 PCI: 00:1c.2: enabled 0
736 06:46:42.411806 PCI: 00:1c.3: enabled 0
737 06:46:42.412361 PCI: 00:1c.4: enabled 0
738 06:46:42.414943 PCI: 00:1c.5: enabled 0
739 06:46:42.418838 PCI: 00:1c.6: enabled 0
740 06:46:42.419322 PCI: 00:1c.7: enabled 0
741 06:46:42.421704 PCI: 00:1d.0: enabled 1
742 06:46:42.425038 PCI: 00:1d.1: enabled 0
743 06:46:42.428508 PCI: 00:1d.2: enabled 0
744 06:46:42.428890 PCI: 00:1d.3: enabled 0
745 06:46:42.431676 PCI: 00:1d.4: enabled 0
746 06:46:42.434600 PCI: 00:1d.5: enabled 1
747 06:46:42.438699 PCI: 00:1e.0: enabled 1
748 06:46:42.439181 PCI: 00:1e.1: enabled 0
749 06:46:42.441787 PCI: 00:1e.2: enabled 1
750 06:46:42.444980 PCI: 00:1e.3: enabled 1
751 06:46:42.445364 PCI: 00:1f.0: enabled 1
752 06:46:42.448665 PCI: 00:1f.1: enabled 1
753 06:46:42.451650 PCI: 00:1f.2: enabled 1
754 06:46:42.454703 PCI: 00:1f.3: enabled 1
755 06:46:42.455104 PCI: 00:1f.4: enabled 1
756 06:46:42.458297 PCI: 00:1f.5: enabled 1
757 06:46:42.461626 PCI: 00:1f.6: enabled 0
758 06:46:42.464792 USB0 port 0: enabled 1
759 06:46:42.465302 I2C: 00:15: enabled 1
760 06:46:42.467934 I2C: 00:5d: enabled 1
761 06:46:42.471194 GENERIC: 0.0: enabled 1
762 06:46:42.471578 I2C: 00:1a: enabled 1
763 06:46:42.474548 I2C: 00:38: enabled 1
764 06:46:42.477865 I2C: 00:39: enabled 1
765 06:46:42.478328 I2C: 00:3a: enabled 1
766 06:46:42.480984 I2C: 00:3b: enabled 1
767 06:46:42.484790 PCI: 00:00.0: enabled 1
768 06:46:42.485356 SPI: 00: enabled 1
769 06:46:42.487818 SPI: 01: enabled 1
770 06:46:42.491386 PNP: 0c09.0: enabled 1
771 06:46:42.491945 USB2 port 0: enabled 1
772 06:46:42.494398 USB2 port 1: enabled 1
773 06:46:42.497783 USB2 port 2: enabled 0
774 06:46:42.500966 USB2 port 3: enabled 0
775 06:46:42.501352 USB2 port 5: enabled 0
776 06:46:42.504710 USB2 port 6: enabled 1
777 06:46:42.507699 USB2 port 9: enabled 1
778 06:46:42.508082 USB3 port 0: enabled 1
779 06:46:42.511284 USB3 port 1: enabled 1
780 06:46:42.514786 USB3 port 2: enabled 1
781 06:46:42.515309 USB3 port 3: enabled 1
782 06:46:42.518153 USB3 port 4: enabled 0
783 06:46:42.521674 APIC: 03: enabled 1
784 06:46:42.522176 APIC: 06: enabled 1
785 06:46:42.524355 APIC: 01: enabled 1
786 06:46:42.528189 APIC: 02: enabled 1
787 06:46:42.528724 APIC: 04: enabled 1
788 06:46:42.531542 APIC: 05: enabled 1
789 06:46:42.531926 APIC: 07: enabled 1
790 06:46:42.534349 Compare with tree...
791 06:46:42.537732 Root Device: enabled 1
792 06:46:42.541097 CPU_CLUSTER: 0: enabled 1
793 06:46:42.541587 APIC: 00: enabled 1
794 06:46:42.544200 APIC: 03: enabled 1
795 06:46:42.548054 APIC: 06: enabled 1
796 06:46:42.548594 APIC: 01: enabled 1
797 06:46:42.551524 APIC: 02: enabled 1
798 06:46:42.554083 APIC: 04: enabled 1
799 06:46:42.554467 APIC: 05: enabled 1
800 06:46:42.557825 APIC: 07: enabled 1
801 06:46:42.560565 DOMAIN: 0000: enabled 1
802 06:46:42.564148 PCI: 00:00.0: enabled 1
803 06:46:42.564572 PCI: 00:02.0: enabled 1
804 06:46:42.567666 PCI: 00:04.0: enabled 0
805 06:46:42.570595 PCI: 00:05.0: enabled 0
806 06:46:42.574134 PCI: 00:12.0: enabled 1
807 06:46:42.577547 PCI: 00:12.5: enabled 0
808 06:46:42.578042 PCI: 00:12.6: enabled 0
809 06:46:42.580546 PCI: 00:14.0: enabled 1
810 06:46:42.583901 USB0 port 0: enabled 1
811 06:46:42.587706 USB2 port 0: enabled 1
812 06:46:42.590741 USB2 port 1: enabled 1
813 06:46:42.591123 USB2 port 2: enabled 0
814 06:46:42.594194 USB2 port 3: enabled 0
815 06:46:42.597907 USB2 port 5: enabled 0
816 06:46:42.600904 USB2 port 6: enabled 1
817 06:46:42.604238 USB2 port 9: enabled 1
818 06:46:42.607247 USB3 port 0: enabled 1
819 06:46:42.607733 USB3 port 1: enabled 1
820 06:46:42.610769 USB3 port 2: enabled 1
821 06:46:42.614073 USB3 port 3: enabled 1
822 06:46:42.617585 USB3 port 4: enabled 0
823 06:46:42.620493 PCI: 00:14.1: enabled 0
824 06:46:42.620883 PCI: 00:14.3: enabled 1
825 06:46:42.624300 PCI: 00:14.5: enabled 0
826 06:46:42.628143 PCI: 00:15.0: enabled 1
827 06:46:42.630810 I2C: 00:15: enabled 1
828 06:46:42.631196 PCI: 00:15.1: enabled 1
829 06:46:42.634183 I2C: 00:5d: enabled 1
830 06:46:42.637444 GENERIC: 0.0: enabled 1
831 06:46:42.640773 PCI: 00:15.2: enabled 0
832 06:46:42.643659 PCI: 00:15.3: enabled 0
833 06:46:42.644051 PCI: 00:16.0: enabled 1
834 06:46:42.647628 PCI: 00:16.1: enabled 0
835 06:46:42.650932 PCI: 00:16.2: enabled 0
836 06:46:42.654530 PCI: 00:16.3: enabled 0
837 06:46:42.658014 PCI: 00:16.4: enabled 0
838 06:46:42.658492 PCI: 00:16.5: enabled 0
839 06:46:42.660670 PCI: 00:17.0: enabled 1
840 06:46:42.663754 PCI: 00:19.0: enabled 1
841 06:46:42.667238 I2C: 00:1a: enabled 1
842 06:46:42.667621 I2C: 00:38: enabled 1
843 06:46:42.670486 I2C: 00:39: enabled 1
844 06:46:42.673966 I2C: 00:3a: enabled 1
845 06:46:42.676977 I2C: 00:3b: enabled 1
846 06:46:42.680742 PCI: 00:19.1: enabled 0
847 06:46:42.681229 PCI: 00:19.2: enabled 0
848 06:46:42.683689 PCI: 00:1a.0: enabled 0
849 06:46:42.687600 PCI: 00:1c.0: enabled 0
850 06:46:42.690147 PCI: 00:1c.1: enabled 0
851 06:46:42.693703 PCI: 00:1c.2: enabled 0
852 06:46:42.694099 PCI: 00:1c.3: enabled 0
853 06:46:42.696637 PCI: 00:1c.4: enabled 0
854 06:46:42.700606 PCI: 00:1c.5: enabled 0
855 06:46:42.703352 PCI: 00:1c.6: enabled 0
856 06:46:42.707302 PCI: 00:1c.7: enabled 0
857 06:46:42.707839 PCI: 00:1d.0: enabled 1
858 06:46:42.710258 PCI: 00:1d.1: enabled 0
859 06:46:42.713272 PCI: 00:1d.2: enabled 0
860 06:46:42.716968 PCI: 00:1d.3: enabled 0
861 06:46:42.717459 PCI: 00:1d.4: enabled 0
862 06:46:42.720202 PCI: 00:1d.5: enabled 1
863 06:46:42.723215 PCI: 00:00.0: enabled 1
864 06:46:42.726622 PCI: 00:1e.0: enabled 1
865 06:46:42.729980 PCI: 00:1e.1: enabled 0
866 06:46:42.730380 PCI: 00:1e.2: enabled 1
867 06:46:42.733551 SPI: 00: enabled 1
868 06:46:42.736905 PCI: 00:1e.3: enabled 1
869 06:46:42.740224 SPI: 01: enabled 1
870 06:46:42.740669 PCI: 00:1f.0: enabled 1
871 06:46:42.744041 PNP: 0c09.0: enabled 1
872 06:46:42.746601 PCI: 00:1f.1: enabled 1
873 06:46:42.749720 PCI: 00:1f.2: enabled 1
874 06:46:42.753161 PCI: 00:1f.3: enabled 1
875 06:46:42.753644 PCI: 00:1f.4: enabled 1
876 06:46:42.756613 PCI: 00:1f.5: enabled 1
877 06:46:42.759791 PCI: 00:1f.6: enabled 0
878 06:46:42.763330 Root Device scanning...
879 06:46:42.766725 scan_static_bus for Root Device
880 06:46:42.767124 CPU_CLUSTER: 0 enabled
881 06:46:42.769516 DOMAIN: 0000 enabled
882 06:46:42.772955 DOMAIN: 0000 scanning...
883 06:46:42.776694 PCI: pci_scan_bus for bus 00
884 06:46:42.780078 PCI: 00:00.0 [8086/0000] ops
885 06:46:42.783371 PCI: 00:00.0 [8086/9b61] enabled
886 06:46:42.786516 PCI: 00:02.0 [8086/0000] bus ops
887 06:46:42.789755 PCI: 00:02.0 [8086/9b41] enabled
888 06:46:42.793248 PCI: 00:04.0 [8086/1903] disabled
889 06:46:42.796541 PCI: 00:08.0 [8086/1911] enabled
890 06:46:42.799795 PCI: 00:12.0 [8086/02f9] enabled
891 06:46:42.803142 PCI: 00:14.0 [8086/0000] bus ops
892 06:46:42.806741 PCI: 00:14.0 [8086/02ed] enabled
893 06:46:42.809675 PCI: 00:14.2 [8086/02ef] enabled
894 06:46:42.813350 PCI: 00:14.3 [8086/02f0] enabled
895 06:46:42.816420 PCI: 00:15.0 [8086/0000] bus ops
896 06:46:42.820041 PCI: 00:15.0 [8086/02e8] enabled
897 06:46:42.823011 PCI: 00:15.1 [8086/0000] bus ops
898 06:46:42.826619 PCI: 00:15.1 [8086/02e9] enabled
899 06:46:42.830286 PCI: 00:16.0 [8086/0000] ops
900 06:46:42.832905 PCI: 00:16.0 [8086/02e0] enabled
901 06:46:42.833256 PCI: 00:17.0 [8086/0000] ops
902 06:46:42.836686 PCI: 00:17.0 [8086/02d3] enabled
903 06:46:42.839605 PCI: 00:19.0 [8086/0000] bus ops
904 06:46:42.843607 PCI: 00:19.0 [8086/02c5] enabled
905 06:46:42.846617 PCI: 00:1d.0 [8086/0000] bus ops
906 06:46:42.849885 PCI: 00:1d.0 [8086/02b0] enabled
907 06:46:42.856681 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 06:46:42.859892 PCI: 00:1e.0 [8086/0000] ops
909 06:46:42.862920 PCI: 00:1e.0 [8086/02a8] enabled
910 06:46:42.866575 PCI: 00:1e.2 [8086/0000] bus ops
911 06:46:42.869535 PCI: 00:1e.2 [8086/02aa] enabled
912 06:46:42.873436 PCI: 00:1e.3 [8086/0000] bus ops
913 06:46:42.876152 PCI: 00:1e.3 [8086/02ab] enabled
914 06:46:42.880133 PCI: 00:1f.0 [8086/0000] bus ops
915 06:46:42.882954 PCI: 00:1f.0 [8086/0284] enabled
916 06:46:42.889739 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 06:46:42.893312 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 06:46:42.896219 PCI: 00:1f.3 [8086/0000] bus ops
919 06:46:42.900122 PCI: 00:1f.3 [8086/02c8] enabled
920 06:46:42.903042 PCI: 00:1f.4 [8086/0000] bus ops
921 06:46:42.906612 PCI: 00:1f.4 [8086/02a3] enabled
922 06:46:42.910381 PCI: 00:1f.5 [8086/0000] bus ops
923 06:46:42.912951 PCI: 00:1f.5 [8086/02a4] enabled
924 06:46:42.916367 PCI: Leftover static devices:
925 06:46:42.919597 PCI: 00:05.0
926 06:46:42.919977 PCI: 00:12.5
927 06:46:42.923072 PCI: 00:12.6
928 06:46:42.923552 PCI: 00:14.1
929 06:46:42.923857 PCI: 00:14.5
930 06:46:42.926135 PCI: 00:15.2
931 06:46:42.926610 PCI: 00:15.3
932 06:46:42.929362 PCI: 00:16.1
933 06:46:42.929742 PCI: 00:16.2
934 06:46:42.932986 PCI: 00:16.3
935 06:46:42.933465 PCI: 00:16.4
936 06:46:42.933771 PCI: 00:16.5
937 06:46:42.936368 PCI: 00:19.1
938 06:46:42.936749 PCI: 00:19.2
939 06:46:42.939381 PCI: 00:1a.0
940 06:46:42.939760 PCI: 00:1c.0
941 06:46:42.940063 PCI: 00:1c.1
942 06:46:42.942787 PCI: 00:1c.2
943 06:46:42.943299 PCI: 00:1c.3
944 06:46:42.946158 PCI: 00:1c.4
945 06:46:42.946540 PCI: 00:1c.5
946 06:46:42.946841 PCI: 00:1c.6
947 06:46:42.949672 PCI: 00:1c.7
948 06:46:42.950051 PCI: 00:1d.1
949 06:46:42.952530 PCI: 00:1d.2
950 06:46:42.952910 PCI: 00:1d.3
951 06:46:42.953211 PCI: 00:1d.4
952 06:46:42.956021 PCI: 00:1d.5
953 06:46:42.956430 PCI: 00:1e.1
954 06:46:42.959447 PCI: 00:1f.1
955 06:46:42.959828 PCI: 00:1f.2
956 06:46:42.963119 PCI: 00:1f.6
957 06:46:42.963498 PCI: Check your devicetree.cb.
958 06:46:42.966277 PCI: 00:02.0 scanning...
959 06:46:42.970175 scan_generic_bus for PCI: 00:02.0
960 06:46:42.976035 scan_generic_bus for PCI: 00:02.0 done
961 06:46:42.979325 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
962 06:46:42.982809 PCI: 00:14.0 scanning...
963 06:46:42.986875 scan_static_bus for PCI: 00:14.0
964 06:46:42.989524 USB0 port 0 enabled
965 06:46:42.989910 USB0 port 0 scanning...
966 06:46:42.992455 scan_static_bus for USB0 port 0
967 06:46:42.996299 USB2 port 0 enabled
968 06:46:42.999436 USB2 port 1 enabled
969 06:46:42.999916 USB2 port 2 disabled
970 06:46:43.003154 USB2 port 3 disabled
971 06:46:43.006268 USB2 port 5 disabled
972 06:46:43.006763 USB2 port 6 enabled
973 06:46:43.009878 USB2 port 9 enabled
974 06:46:43.010360 USB3 port 0 enabled
975 06:46:43.012733 USB3 port 1 enabled
976 06:46:43.016348 USB3 port 2 enabled
977 06:46:43.016733 USB3 port 3 enabled
978 06:46:43.019556 USB3 port 4 disabled
979 06:46:43.022728 USB2 port 0 scanning...
980 06:46:43.025831 scan_static_bus for USB2 port 0
981 06:46:43.029637 scan_static_bus for USB2 port 0 done
982 06:46:43.033171 scan_bus: scanning of bus USB2 port 0 took 9695 usecs
983 06:46:43.036053 USB2 port 1 scanning...
984 06:46:43.039154 scan_static_bus for USB2 port 1
985 06:46:43.043002 scan_static_bus for USB2 port 1 done
986 06:46:43.049283 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
987 06:46:43.052937 USB2 port 6 scanning...
988 06:46:43.055797 scan_static_bus for USB2 port 6
989 06:46:43.059610 scan_static_bus for USB2 port 6 done
990 06:46:43.062609 scan_bus: scanning of bus USB2 port 6 took 9697 usecs
991 06:46:43.065747 USB2 port 9 scanning...
992 06:46:43.069793 scan_static_bus for USB2 port 9
993 06:46:43.072695 scan_static_bus for USB2 port 9 done
994 06:46:43.079355 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
995 06:46:43.083047 USB3 port 0 scanning...
996 06:46:43.086366 scan_static_bus for USB3 port 0
997 06:46:43.088807 scan_static_bus for USB3 port 0 done
998 06:46:43.092407 scan_bus: scanning of bus USB3 port 0 took 9696 usecs
999 06:46:43.096063 USB3 port 1 scanning...
1000 06:46:43.098861 scan_static_bus for USB3 port 1
1001 06:46:43.102618 scan_static_bus for USB3 port 1 done
1002 06:46:43.108909 scan_bus: scanning of bus USB3 port 1 took 9695 usecs
1003 06:46:43.112535 USB3 port 2 scanning...
1004 06:46:43.116058 scan_static_bus for USB3 port 2
1005 06:46:43.119237 scan_static_bus for USB3 port 2 done
1006 06:46:43.125552 scan_bus: scanning of bus USB3 port 2 took 9695 usecs
1007 06:46:43.126019 USB3 port 3 scanning...
1008 06:46:43.129323 scan_static_bus for USB3 port 3
1009 06:46:43.132195 scan_static_bus for USB3 port 3 done
1010 06:46:43.138557 scan_bus: scanning of bus USB3 port 3 took 9706 usecs
1011 06:46:43.142341 scan_static_bus for USB0 port 0 done
1012 06:46:43.149223 scan_bus: scanning of bus USB0 port 0 took 155328 usecs
1013 06:46:43.151980 scan_static_bus for PCI: 00:14.0 done
1014 06:46:43.158790 scan_bus: scanning of bus PCI: 00:14.0 took 172954 usecs
1015 06:46:43.159278 PCI: 00:15.0 scanning...
1016 06:46:43.165441 scan_generic_bus for PCI: 00:15.0
1017 06:46:43.168989 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 06:46:43.172336 scan_generic_bus for PCI: 00:15.0 done
1019 06:46:43.178956 scan_bus: scanning of bus PCI: 00:15.0 took 14288 usecs
1020 06:46:43.179353 PCI: 00:15.1 scanning...
1021 06:46:43.182175 scan_generic_bus for PCI: 00:15.1
1022 06:46:43.188611 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 06:46:43.191873 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 06:46:43.195564 scan_generic_bus for PCI: 00:15.1 done
1025 06:46:43.202568 scan_bus: scanning of bus PCI: 00:15.1 took 18603 usecs
1026 06:46:43.205402 PCI: 00:19.0 scanning...
1027 06:46:43.208750 scan_generic_bus for PCI: 00:19.0
1028 06:46:43.211944 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 06:46:43.216063 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 06:46:43.219166 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 06:46:43.225712 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 06:46:43.228871 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 06:46:43.231755 scan_generic_bus for PCI: 00:19.0 done
1034 06:46:43.238901 scan_bus: scanning of bus PCI: 00:19.0 took 30712 usecs
1035 06:46:43.239459 PCI: 00:1d.0 scanning...
1036 06:46:43.245765 do_pci_scan_bridge for PCI: 00:1d.0
1037 06:46:43.246275 PCI: pci_scan_bus for bus 01
1038 06:46:43.248605 PCI: 01:00.0 [1c5c/1327] enabled
1039 06:46:43.255895 Enabling Common Clock Configuration
1040 06:46:43.259311 L1 Sub-State supported from root port 29
1041 06:46:43.262890 L1 Sub-State Support = 0xf
1042 06:46:43.265726 CommonModeRestoreTime = 0x28
1043 06:46:43.268612 Power On Value = 0x16, Power On Scale = 0x0
1044 06:46:43.269037 ASPM: Enabled L1
1045 06:46:43.276102 scan_bus: scanning of bus PCI: 00:1d.0 took 32771 usecs
1046 06:46:43.278946 PCI: 00:1e.2 scanning...
1047 06:46:43.282627 scan_generic_bus for PCI: 00:1e.2
1048 06:46:43.285929 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 06:46:43.288766 scan_generic_bus for PCI: 00:1e.2 done
1050 06:46:43.295321 scan_bus: scanning of bus PCI: 00:1e.2 took 14000 usecs
1051 06:46:43.298993 PCI: 00:1e.3 scanning...
1052 06:46:43.302057 scan_generic_bus for PCI: 00:1e.3
1053 06:46:43.305065 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 06:46:43.308909 scan_generic_bus for PCI: 00:1e.3 done
1055 06:46:43.315465 scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
1056 06:46:43.319240 PCI: 00:1f.0 scanning...
1057 06:46:43.322360 scan_static_bus for PCI: 00:1f.0
1058 06:46:43.322744 PNP: 0c09.0 enabled
1059 06:46:43.325349 scan_static_bus for PCI: 00:1f.0 done
1060 06:46:43.331729 scan_bus: scanning of bus PCI: 00:1f.0 took 12025 usecs
1061 06:46:43.335808 PCI: 00:1f.3 scanning...
1062 06:46:43.342109 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1063 06:46:43.342515 PCI: 00:1f.4 scanning...
1064 06:46:43.345130 scan_generic_bus for PCI: 00:1f.4
1065 06:46:43.351960 scan_generic_bus for PCI: 00:1f.4 done
1066 06:46:43.355049 scan_bus: scanning of bus PCI: 00:1f.4 took 10174 usecs
1067 06:46:43.358628 PCI: 00:1f.5 scanning...
1068 06:46:43.361966 scan_generic_bus for PCI: 00:1f.5
1069 06:46:43.365026 scan_generic_bus for PCI: 00:1f.5 done
1070 06:46:43.372003 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1071 06:46:43.378974 scan_bus: scanning of bus DOMAIN: 0000 took 604864 usecs
1072 06:46:43.381776 scan_static_bus for Root Device done
1073 06:46:43.388038 scan_bus: scanning of bus Root Device took 624714 usecs
1074 06:46:43.388459 done
1075 06:46:43.391670 Chrome EC: UHEPI supported
1076 06:46:43.397954 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 06:46:43.401554 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 06:46:43.408430 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 06:46:43.415397 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 06:46:43.418182 SPI flash protection: WPSW=0 SRP0=0
1081 06:46:43.425856 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 06:46:43.428350 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1083 06:46:43.431673 found VGA at PCI: 00:02.0
1084 06:46:43.435105 Setting up VGA for PCI: 00:02.0
1085 06:46:43.441855 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 06:46:43.445059 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 06:46:43.448941 Allocating resources...
1088 06:46:43.451467 Reading resources...
1089 06:46:43.454969 Root Device read_resources bus 0 link: 0
1090 06:46:43.458172 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 06:46:43.464736 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 06:46:43.467881 DOMAIN: 0000 read_resources bus 0 link: 0
1093 06:46:43.475374 PCI: 00:14.0 read_resources bus 0 link: 0
1094 06:46:43.478453 USB0 port 0 read_resources bus 0 link: 0
1095 06:46:43.486636 USB0 port 0 read_resources bus 0 link: 0 done
1096 06:46:43.489905 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 06:46:43.497661 PCI: 00:15.0 read_resources bus 1 link: 0
1098 06:46:43.500515 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 06:46:43.506927 PCI: 00:15.1 read_resources bus 2 link: 0
1100 06:46:43.510700 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 06:46:43.517824 PCI: 00:19.0 read_resources bus 3 link: 0
1102 06:46:43.525122 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 06:46:43.528059 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 06:46:43.535073 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 06:46:43.538411 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 06:46:43.544480 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 06:46:43.547683 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 06:46:43.554489 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 06:46:43.558500 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 06:46:43.564740 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 06:46:43.567839 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 06:46:43.575032 Root Device read_resources bus 0 link: 0 done
1113 06:46:43.578526 Done reading resources.
1114 06:46:43.581308 Show resources in subtree (Root Device)...After reading.
1115 06:46:43.588189 Root Device child on link 0 CPU_CLUSTER: 0
1116 06:46:43.591463 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 06:46:43.591840 APIC: 00
1118 06:46:43.595011 APIC: 03
1119 06:46:43.595626 APIC: 06
1120 06:46:43.595961 APIC: 01
1121 06:46:43.598486 APIC: 02
1122 06:46:43.599016 APIC: 04
1123 06:46:43.601259 APIC: 05
1124 06:46:43.601669 APIC: 07
1125 06:46:43.604915 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 06:46:43.615320 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 06:46:43.662023 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 06:46:43.662618 PCI: 00:00.0
1129 06:46:43.663144 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 06:46:43.663477 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 06:46:43.663788 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 06:46:43.665656 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 06:46:43.672744 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 06:46:43.683060 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 06:46:43.692387 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 06:46:43.703014 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 06:46:43.708931 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 06:46:43.719206 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 06:46:43.728990 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 06:46:43.739146 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 06:46:43.749175 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 06:46:43.758868 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 06:46:43.765917 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 06:46:43.775438 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 06:46:43.778786 PCI: 00:02.0
1146 06:46:43.789158 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 06:46:43.798758 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 06:46:43.805312 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 06:46:43.808955 PCI: 00:04.0
1150 06:46:43.809435 PCI: 00:08.0
1151 06:46:43.818600 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 06:46:43.822179 PCI: 00:12.0
1153 06:46:43.831555 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 06:46:43.834781 PCI: 00:14.0 child on link 0 USB0 port 0
1155 06:46:43.845256 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 06:46:43.851747 USB0 port 0 child on link 0 USB2 port 0
1157 06:46:43.852125 USB2 port 0
1158 06:46:43.855161 USB2 port 1
1159 06:46:43.855662 USB2 port 2
1160 06:46:43.858507 USB2 port 3
1161 06:46:43.858885 USB2 port 5
1162 06:46:43.861586 USB2 port 6
1163 06:46:43.861961 USB2 port 9
1164 06:46:43.865188 USB3 port 0
1165 06:46:43.865581 USB3 port 1
1166 06:46:43.868216 USB3 port 2
1167 06:46:43.868801 USB3 port 3
1168 06:46:43.872375 USB3 port 4
1169 06:46:43.872855 PCI: 00:14.2
1170 06:46:43.881712 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 06:46:43.891653 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 06:46:43.895014 PCI: 00:14.3
1173 06:46:43.905056 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 06:46:43.908681 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 06:46:43.917959 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 06:46:43.921483 I2C: 01:15
1177 06:46:43.924951 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 06:46:43.935177 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 06:46:43.935695 I2C: 02:5d
1180 06:46:43.938509 GENERIC: 0.0
1181 06:46:43.938923 PCI: 00:16.0
1182 06:46:43.948142 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 06:46:43.951968 PCI: 00:17.0
1184 06:46:43.961484 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 06:46:43.967672 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 06:46:43.978747 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 06:46:43.985049 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 06:46:43.994527 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 06:46:44.004181 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 06:46:44.007766 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 06:46:44.017884 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 06:46:44.018387 I2C: 03:1a
1193 06:46:44.020827 I2C: 03:38
1194 06:46:44.021231 I2C: 03:39
1195 06:46:44.024794 I2C: 03:3a
1196 06:46:44.025363 I2C: 03:3b
1197 06:46:44.031341 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 06:46:44.037687 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 06:46:44.047339 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 06:46:44.057818 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 06:46:44.058206 PCI: 01:00.0
1202 06:46:44.067464 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 06:46:44.070538 PCI: 00:1e.0
1204 06:46:44.080400 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 06:46:44.090862 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 06:46:44.093601 PCI: 00:1e.2 child on link 0 SPI: 00
1207 06:46:44.103952 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 06:46:44.107095 SPI: 00
1209 06:46:44.110078 PCI: 00:1e.3 child on link 0 SPI: 01
1210 06:46:44.120199 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 06:46:44.120629 SPI: 01
1212 06:46:44.126708 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 06:46:44.133553 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 06:46:44.143240 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 06:46:44.147016 PNP: 0c09.0
1216 06:46:44.153262 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 06:46:44.156761 PCI: 00:1f.3
1218 06:46:44.166108 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 06:46:44.176466 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 06:46:44.177045 PCI: 00:1f.4
1221 06:46:44.186526 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 06:46:44.196838 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 06:46:44.197314 PCI: 00:1f.5
1224 06:46:44.206543 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 06:46:44.213666 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 06:46:44.219437 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 06:46:44.226098 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 06:46:44.229609 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 06:46:44.232910 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 06:46:44.236293 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 06:46:44.239666 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 06:46:44.246755 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 06:46:44.253380 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 06:46:44.263090 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 06:46:44.269528 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 06:46:44.276238 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 06:46:44.279756 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 06:46:44.289615 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 06:46:44.292928 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 06:46:44.299983 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 06:46:44.303231 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 06:46:44.309933 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 06:46:44.313396 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 06:46:44.320013 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 06:46:44.323037 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 06:46:44.326547 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 06:46:44.332705 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 06:46:44.336813 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 06:46:44.342657 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 06:46:44.346478 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 06:46:44.352789 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 06:46:44.355854 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 06:46:44.363189 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 06:46:44.365845 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 06:46:44.372927 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 06:46:44.376557 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 06:46:44.382711 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 06:46:44.386422 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 06:46:44.392551 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 06:46:44.396171 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 06:46:44.399096 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 06:46:44.409416 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 06:46:44.412193 avoid_fixed_resources: DOMAIN: 0000
1264 06:46:44.419196 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 06:46:44.426011 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 06:46:44.432213 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 06:46:44.438847 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 06:46:44.449195 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 06:46:44.455782 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 06:46:44.462053 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 06:46:44.471826 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 06:46:44.478669 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 06:46:44.485191 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 06:46:44.492070 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 06:46:44.498727 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 06:46:44.502111 Setting resources...
1277 06:46:44.508625 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 06:46:44.511903 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 06:46:44.515303 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 06:46:44.521681 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 06:46:44.525470 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 06:46:44.532104 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 06:46:44.538789 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 06:46:44.545290 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 06:46:44.552051 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 06:46:44.555280 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 06:46:44.561566 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 06:46:44.565057 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 06:46:44.571408 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 06:46:44.575361 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 06:46:44.581854 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 06:46:44.585131 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 06:46:44.591336 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 06:46:44.595153 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 06:46:44.601672 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 06:46:44.604953 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 06:46:44.608626 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 06:46:44.614738 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 06:46:44.618982 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 06:46:44.625209 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 06:46:44.628029 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 06:46:44.634884 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 06:46:44.638004 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 06:46:44.644561 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 06:46:44.648690 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 06:46:44.654497 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 06:46:44.658060 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 06:46:44.664356 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 06:46:44.670930 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 06:46:44.678094 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 06:46:44.684695 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 06:46:44.694464 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 06:46:44.697455 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 06:46:44.703909 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 06:46:44.710702 Root Device assign_resources, bus 0 link: 0
1316 06:46:44.714194 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 06:46:44.724081 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 06:46:44.731066 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 06:46:44.737224 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 06:46:44.747432 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 06:46:44.754562 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 06:46:44.764292 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 06:46:44.767494 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 06:46:44.774399 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 06:46:44.780850 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 06:46:44.790463 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 06:46:44.797465 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 06:46:44.807248 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 06:46:44.811162 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 06:46:44.814025 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 06:46:44.824135 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 06:46:44.827798 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 06:46:44.834382 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 06:46:44.840357 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 06:46:44.851183 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 06:46:44.857161 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 06:46:44.863963 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 06:46:44.873674 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 06:46:44.880276 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 06:46:44.886570 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 06:46:44.897236 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 06:46:44.900082 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 06:46:44.903447 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 06:46:44.914205 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 06:46:44.923647 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 06:46:44.930408 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 06:46:44.936748 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 06:46:44.943327 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 06:46:44.949727 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 06:46:44.956507 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 06:46:44.966518 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 06:46:44.969781 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 06:46:44.972748 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 06:46:44.983516 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 06:46:44.986746 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 06:46:44.992804 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 06:46:44.996544 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 06:46:45.003043 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 06:46:45.006214 LPC: Trying to open IO window from 800 size 1ff
1360 06:46:45.016031 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 06:46:45.023285 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 06:46:45.032635 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 06:46:45.039327 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 06:46:45.042643 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 06:46:45.049312 Root Device assign_resources, bus 0 link: 0
1366 06:46:45.052702 Done setting resources.
1367 06:46:45.059377 Show resources in subtree (Root Device)...After assigning values.
1368 06:46:45.062771 Root Device child on link 0 CPU_CLUSTER: 0
1369 06:46:45.065823 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 06:46:45.066400 APIC: 00
1371 06:46:45.069049 APIC: 03
1372 06:46:45.069644 APIC: 06
1373 06:46:45.072647 APIC: 01
1374 06:46:45.073059 APIC: 02
1375 06:46:45.073382 APIC: 04
1376 06:46:45.076019 APIC: 05
1377 06:46:45.076486 APIC: 07
1378 06:46:45.078945 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 06:46:45.088915 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 06:46:45.102106 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 06:46:45.102622 PCI: 00:00.0
1382 06:46:45.112150 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 06:46:45.122083 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 06:46:45.132218 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 06:46:45.141698 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 06:46:45.148866 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 06:46:45.158717 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 06:46:45.168415 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 06:46:45.178000 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 06:46:45.188512 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 06:46:45.195111 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 06:46:45.204524 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 06:46:45.214471 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 06:46:45.224655 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 06:46:45.234266 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 06:46:45.244629 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 06:46:45.254197 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 06:46:45.254770 PCI: 00:02.0
1399 06:46:45.264077 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 06:46:45.277585 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 06:46:45.284026 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 06:46:45.287606 PCI: 00:04.0
1403 06:46:45.287913 PCI: 00:08.0
1404 06:46:45.297284 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 06:46:45.300941 PCI: 00:12.0
1406 06:46:45.310309 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 06:46:45.313672 PCI: 00:14.0 child on link 0 USB0 port 0
1408 06:46:45.327436 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 06:46:45.330152 USB0 port 0 child on link 0 USB2 port 0
1410 06:46:45.330243 USB2 port 0
1411 06:46:45.334427 USB2 port 1
1412 06:46:45.334518 USB2 port 2
1413 06:46:45.337382 USB2 port 3
1414 06:46:45.337471 USB2 port 5
1415 06:46:45.340043 USB2 port 6
1416 06:46:45.343204 USB2 port 9
1417 06:46:45.343296 USB3 port 0
1418 06:46:45.346493 USB3 port 1
1419 06:46:45.346612 USB3 port 2
1420 06:46:45.350080 USB3 port 3
1421 06:46:45.350171 USB3 port 4
1422 06:46:45.353492 PCI: 00:14.2
1423 06:46:45.362886 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 06:46:45.373432 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 06:46:45.373525 PCI: 00:14.3
1426 06:46:45.386494 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 06:46:45.389741 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 06:46:45.399324 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 06:46:45.399416 I2C: 01:15
1430 06:46:45.406469 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 06:46:45.416324 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 06:46:45.416416 I2C: 02:5d
1433 06:46:45.419192 GENERIC: 0.0
1434 06:46:45.419282 PCI: 00:16.0
1435 06:46:45.429473 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 06:46:45.433292 PCI: 00:17.0
1437 06:46:45.443455 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 06:46:45.453259 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 06:46:45.462788 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 06:46:45.472502 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 06:46:45.478919 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 06:46:45.489208 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 06:46:45.495509 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 06:46:45.505556 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 06:46:45.505932 I2C: 03:1a
1446 06:46:45.509401 I2C: 03:38
1447 06:46:45.509882 I2C: 03:39
1448 06:46:45.512744 I2C: 03:3a
1449 06:46:45.513115 I2C: 03:3b
1450 06:46:45.519614 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 06:46:45.525731 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 06:46:45.535520 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 06:46:45.548770 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 06:46:45.549280 PCI: 01:00.0
1455 06:46:45.558533 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 06:46:45.561714 PCI: 00:1e.0
1457 06:46:45.571858 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 06:46:45.581914 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 06:46:45.585342 PCI: 00:1e.2 child on link 0 SPI: 00
1460 06:46:45.598523 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 06:46:45.599051 SPI: 00
1462 06:46:45.601628 PCI: 00:1e.3 child on link 0 SPI: 01
1463 06:46:45.611992 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 06:46:45.614759 SPI: 01
1465 06:46:45.618471 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 06:46:45.629114 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 06:46:45.634973 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 06:46:45.638241 PNP: 0c09.0
1469 06:46:45.645057 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 06:46:45.648161 PCI: 00:1f.3
1471 06:46:45.657792 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 06:46:45.667986 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 06:46:45.670922 PCI: 00:1f.4
1474 06:46:45.677503 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 06:46:45.691009 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 06:46:45.691507 PCI: 00:1f.5
1477 06:46:45.700692 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 06:46:45.704089 Done allocating resources.
1479 06:46:45.711520 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 06:46:45.712096 Enabling resources...
1481 06:46:45.718424 PCI: 00:00.0 subsystem <- 8086/9b61
1482 06:46:45.718933 PCI: 00:00.0 cmd <- 06
1483 06:46:45.721827 PCI: 00:02.0 subsystem <- 8086/9b41
1484 06:46:45.725111 PCI: 00:02.0 cmd <- 03
1485 06:46:45.728608 PCI: 00:08.0 cmd <- 06
1486 06:46:45.731698 PCI: 00:12.0 subsystem <- 8086/02f9
1487 06:46:45.734879 PCI: 00:12.0 cmd <- 02
1488 06:46:45.738604 PCI: 00:14.0 subsystem <- 8086/02ed
1489 06:46:45.741836 PCI: 00:14.0 cmd <- 02
1490 06:46:45.745169 PCI: 00:14.2 cmd <- 02
1491 06:46:45.748320 PCI: 00:14.3 subsystem <- 8086/02f0
1492 06:46:45.748733 PCI: 00:14.3 cmd <- 02
1493 06:46:45.755237 PCI: 00:15.0 subsystem <- 8086/02e8
1494 06:46:45.755748 PCI: 00:15.0 cmd <- 02
1495 06:46:45.758063 PCI: 00:15.1 subsystem <- 8086/02e9
1496 06:46:45.761358 PCI: 00:15.1 cmd <- 02
1497 06:46:45.764923 PCI: 00:16.0 subsystem <- 8086/02e0
1498 06:46:45.768136 PCI: 00:16.0 cmd <- 02
1499 06:46:45.771527 PCI: 00:17.0 subsystem <- 8086/02d3
1500 06:46:45.774780 PCI: 00:17.0 cmd <- 03
1501 06:46:45.778391 PCI: 00:19.0 subsystem <- 8086/02c5
1502 06:46:45.781344 PCI: 00:19.0 cmd <- 02
1503 06:46:45.784853 PCI: 00:1d.0 bridge ctrl <- 0013
1504 06:46:45.788204 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 06:46:45.791956 PCI: 00:1d.0 cmd <- 06
1506 06:46:45.794584 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 06:46:45.798348 PCI: 00:1e.0 cmd <- 06
1508 06:46:45.801067 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 06:46:45.801507 PCI: 00:1e.2 cmd <- 06
1510 06:46:45.808894 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 06:46:45.809423 PCI: 00:1e.3 cmd <- 02
1512 06:46:45.811556 PCI: 00:1f.0 subsystem <- 8086/0284
1513 06:46:45.815021 PCI: 00:1f.0 cmd <- 407
1514 06:46:45.818148 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 06:46:45.821450 PCI: 00:1f.3 cmd <- 02
1516 06:46:45.825094 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 06:46:45.828306 PCI: 00:1f.4 cmd <- 03
1518 06:46:45.831290 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 06:46:45.835469 PCI: 00:1f.5 cmd <- 406
1520 06:46:45.843618 PCI: 01:00.0 cmd <- 02
1521 06:46:45.848452 done.
1522 06:46:45.861408 ME: Version: 14.0.39.1367
1523 06:46:45.868093 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1524 06:46:45.871545 Initializing devices...
1525 06:46:45.872070 Root Device init ...
1526 06:46:45.877949 Chrome EC: Set SMI mask to 0x0000000000000000
1527 06:46:45.881165 Chrome EC: clear events_b mask to 0x0000000000000000
1528 06:46:45.888103 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 06:46:45.894509 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 06:46:45.901336 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 06:46:45.904909 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 06:46:45.907801 Root Device init finished in 35265 usecs
1533 06:46:45.911396 CPU_CLUSTER: 0 init ...
1534 06:46:45.917998 CPU_CLUSTER: 0 init finished in 2448 usecs
1535 06:46:45.921865 PCI: 00:00.0 init ...
1536 06:46:45.925836 CPU TDP: 15 Watts
1537 06:46:45.928978 CPU PL2 = 64 Watts
1538 06:46:45.932376 PCI: 00:00.0 init finished in 7082 usecs
1539 06:46:45.935803 PCI: 00:02.0 init ...
1540 06:46:45.939572 PCI: 00:02.0 init finished in 2253 usecs
1541 06:46:45.942816 PCI: 00:08.0 init ...
1542 06:46:45.945474 PCI: 00:08.0 init finished in 2253 usecs
1543 06:46:45.948897 PCI: 00:12.0 init ...
1544 06:46:45.952219 PCI: 00:12.0 init finished in 2252 usecs
1545 06:46:45.955938 PCI: 00:14.0 init ...
1546 06:46:45.959375 PCI: 00:14.0 init finished in 2252 usecs
1547 06:46:45.961922 PCI: 00:14.2 init ...
1548 06:46:45.965426 PCI: 00:14.2 init finished in 2252 usecs
1549 06:46:45.968957 PCI: 00:14.3 init ...
1550 06:46:45.971889 PCI: 00:14.3 init finished in 2271 usecs
1551 06:46:45.975193 PCI: 00:15.0 init ...
1552 06:46:45.979074 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 06:46:45.982409 PCI: 00:15.0 init finished in 5972 usecs
1554 06:46:45.985546 PCI: 00:15.1 init ...
1555 06:46:45.988641 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 06:46:45.991708 PCI: 00:15.1 init finished in 5979 usecs
1557 06:46:45.995681 PCI: 00:16.0 init ...
1558 06:46:45.998715 PCI: 00:16.0 init finished in 2252 usecs
1559 06:46:46.003083 PCI: 00:19.0 init ...
1560 06:46:46.006051 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 06:46:46.013090 PCI: 00:19.0 init finished in 5978 usecs
1562 06:46:46.013608 PCI: 00:1d.0 init ...
1563 06:46:46.015995 Initializing PCH PCIe bridge.
1564 06:46:46.019736 PCI: 00:1d.0 init finished in 5288 usecs
1565 06:46:46.024060 PCI: 00:1f.0 init ...
1566 06:46:46.027698 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 06:46:46.034609 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 06:46:46.035123 IOAPIC: ID = 0x02
1569 06:46:46.037162 IOAPIC: Dumping registers
1570 06:46:46.040818 reg 0x0000: 0x02000000
1571 06:46:46.043829 reg 0x0001: 0x00770020
1572 06:46:46.047413 reg 0x0002: 0x00000000
1573 06:46:46.051117 PCI: 00:1f.0 init finished in 23543 usecs
1574 06:46:46.054303 PCI: 00:1f.4 init ...
1575 06:46:46.056978 PCI: 00:1f.4 init finished in 2263 usecs
1576 06:46:46.068616 PCI: 01:00.0 init ...
1577 06:46:46.071763 PCI: 01:00.0 init finished in 2254 usecs
1578 06:46:46.076406 PNP: 0c09.0 init ...
1579 06:46:46.079818 Google Chrome EC uptime: 11.062 seconds
1580 06:46:46.086101 Google Chrome AP resets since EC boot: 0
1581 06:46:46.089339 Google Chrome most recent AP reset causes:
1582 06:46:46.096479 Google Chrome EC reset flags at last EC boot: reset-pin
1583 06:46:46.099010 PNP: 0c09.0 init finished in 20597 usecs
1584 06:46:46.102191 Devices initialized
1585 06:46:46.106051 Show all devs... After init.
1586 06:46:46.106558 Root Device: enabled 1
1587 06:46:46.108806 CPU_CLUSTER: 0: enabled 1
1588 06:46:46.112440 DOMAIN: 0000: enabled 1
1589 06:46:46.112951 APIC: 00: enabled 1
1590 06:46:46.115989 PCI: 00:00.0: enabled 1
1591 06:46:46.118746 PCI: 00:02.0: enabled 1
1592 06:46:46.122371 PCI: 00:04.0: enabled 0
1593 06:46:46.122883 PCI: 00:05.0: enabled 0
1594 06:46:46.126098 PCI: 00:12.0: enabled 1
1595 06:46:46.129310 PCI: 00:12.5: enabled 0
1596 06:46:46.132370 PCI: 00:12.6: enabled 0
1597 06:46:46.132787 PCI: 00:14.0: enabled 1
1598 06:46:46.135471 PCI: 00:14.1: enabled 0
1599 06:46:46.139302 PCI: 00:14.3: enabled 1
1600 06:46:46.139772 PCI: 00:14.5: enabled 0
1601 06:46:46.142154 PCI: 00:15.0: enabled 1
1602 06:46:46.145651 PCI: 00:15.1: enabled 1
1603 06:46:46.148862 PCI: 00:15.2: enabled 0
1604 06:46:46.149302 PCI: 00:15.3: enabled 0
1605 06:46:46.151918 PCI: 00:16.0: enabled 1
1606 06:46:46.155754 PCI: 00:16.1: enabled 0
1607 06:46:46.159342 PCI: 00:16.2: enabled 0
1608 06:46:46.159761 PCI: 00:16.3: enabled 0
1609 06:46:46.161996 PCI: 00:16.4: enabled 0
1610 06:46:46.165709 PCI: 00:16.5: enabled 0
1611 06:46:46.168613 PCI: 00:17.0: enabled 1
1612 06:46:46.169024 PCI: 00:19.0: enabled 1
1613 06:46:46.172289 PCI: 00:19.1: enabled 0
1614 06:46:46.175429 PCI: 00:19.2: enabled 0
1615 06:46:46.175971 PCI: 00:1a.0: enabled 0
1616 06:46:46.178775 PCI: 00:1c.0: enabled 0
1617 06:46:46.182167 PCI: 00:1c.1: enabled 0
1618 06:46:46.185568 PCI: 00:1c.2: enabled 0
1619 06:46:46.186075 PCI: 00:1c.3: enabled 0
1620 06:46:46.188732 PCI: 00:1c.4: enabled 0
1621 06:46:46.192395 PCI: 00:1c.5: enabled 0
1622 06:46:46.195274 PCI: 00:1c.6: enabled 0
1623 06:46:46.195787 PCI: 00:1c.7: enabled 0
1624 06:46:46.198292 PCI: 00:1d.0: enabled 1
1625 06:46:46.201765 PCI: 00:1d.1: enabled 0
1626 06:46:46.205453 PCI: 00:1d.2: enabled 0
1627 06:46:46.205960 PCI: 00:1d.3: enabled 0
1628 06:46:46.208556 PCI: 00:1d.4: enabled 0
1629 06:46:46.211513 PCI: 00:1d.5: enabled 0
1630 06:46:46.211923 PCI: 00:1e.0: enabled 1
1631 06:46:46.215017 PCI: 00:1e.1: enabled 0
1632 06:46:46.218076 PCI: 00:1e.2: enabled 1
1633 06:46:46.222068 PCI: 00:1e.3: enabled 1
1634 06:46:46.222574 PCI: 00:1f.0: enabled 1
1635 06:46:46.224980 PCI: 00:1f.1: enabled 0
1636 06:46:46.229169 PCI: 00:1f.2: enabled 0
1637 06:46:46.231695 PCI: 00:1f.3: enabled 1
1638 06:46:46.232202 PCI: 00:1f.4: enabled 1
1639 06:46:46.234629 PCI: 00:1f.5: enabled 1
1640 06:46:46.237860 PCI: 00:1f.6: enabled 0
1641 06:46:46.241235 USB0 port 0: enabled 1
1642 06:46:46.241727 I2C: 01:15: enabled 1
1643 06:46:46.244643 I2C: 02:5d: enabled 1
1644 06:46:46.247892 GENERIC: 0.0: enabled 1
1645 06:46:46.248436 I2C: 03:1a: enabled 1
1646 06:46:46.251709 I2C: 03:38: enabled 1
1647 06:46:46.254823 I2C: 03:39: enabled 1
1648 06:46:46.255330 I2C: 03:3a: enabled 1
1649 06:46:46.258131 I2C: 03:3b: enabled 1
1650 06:46:46.261041 PCI: 00:00.0: enabled 1
1651 06:46:46.261452 SPI: 00: enabled 1
1652 06:46:46.264381 SPI: 01: enabled 1
1653 06:46:46.267920 PNP: 0c09.0: enabled 1
1654 06:46:46.268359 USB2 port 0: enabled 1
1655 06:46:46.271150 USB2 port 1: enabled 1
1656 06:46:46.274854 USB2 port 2: enabled 0
1657 06:46:46.275267 USB2 port 3: enabled 0
1658 06:46:46.277728 USB2 port 5: enabled 0
1659 06:46:46.281470 USB2 port 6: enabled 1
1660 06:46:46.284333 USB2 port 9: enabled 1
1661 06:46:46.284709 USB3 port 0: enabled 1
1662 06:46:46.288167 USB3 port 1: enabled 1
1663 06:46:46.291168 USB3 port 2: enabled 1
1664 06:46:46.291673 USB3 port 3: enabled 1
1665 06:46:46.294965 USB3 port 4: enabled 0
1666 06:46:46.297671 APIC: 03: enabled 1
1667 06:46:46.298084 APIC: 06: enabled 1
1668 06:46:46.301414 APIC: 01: enabled 1
1669 06:46:46.304703 APIC: 02: enabled 1
1670 06:46:46.305212 APIC: 04: enabled 1
1671 06:46:46.307864 APIC: 05: enabled 1
1672 06:46:46.308301 APIC: 07: enabled 1
1673 06:46:46.311358 PCI: 00:08.0: enabled 1
1674 06:46:46.314694 PCI: 00:14.2: enabled 1
1675 06:46:46.317606 PCI: 01:00.0: enabled 1
1676 06:46:46.321873 Disabling ACPI via APMC:
1677 06:46:46.322379 done.
1678 06:46:46.328410 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 06:46:46.331369 ELOG: NV offset 0xaf0000 size 0x4000
1680 06:46:46.337615 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 06:46:46.344285 ELOG: Event(17) added with size 13 at 2023-12-11 06:46:17 UTC
1682 06:46:46.350771 ELOG: Event(92) added with size 9 at 2023-12-11 06:46:17 UTC
1683 06:46:46.357644 ELOG: Event(93) added with size 9 at 2023-12-11 06:46:17 UTC
1684 06:46:46.364642 ELOG: Event(9A) added with size 9 at 2023-12-11 06:46:17 UTC
1685 06:46:46.370523 ELOG: Event(9E) added with size 10 at 2023-12-11 06:46:17 UTC
1686 06:46:46.377373 ELOG: Event(9F) added with size 14 at 2023-12-11 06:46:17 UTC
1687 06:46:46.380777 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1688 06:46:46.387990 ELOG: Event(A1) added with size 10 at 2023-12-11 06:46:17 UTC
1689 06:46:46.397814 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 06:46:46.404328 ELOG: Event(A0) added with size 9 at 2023-12-11 06:46:17 UTC
1691 06:46:46.408317 elog_add_boot_reason: Logged dev mode boot
1692 06:46:46.408833 Finalize devices...
1693 06:46:46.410942 PCI: 00:17.0 final
1694 06:46:46.414878 Devices finalized
1695 06:46:46.418221 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 06:46:46.424199 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 06:46:46.427646 ME: HFSTS1 : 0x90000245
1698 06:46:46.431310 ME: HFSTS2 : 0x3B850126
1699 06:46:46.437602 ME: HFSTS3 : 0x00000020
1700 06:46:46.441204 ME: HFSTS4 : 0x00004800
1701 06:46:46.444322 ME: HFSTS5 : 0x00000000
1702 06:46:46.447976 ME: HFSTS6 : 0x40400006
1703 06:46:46.451289 ME: Manufacturing Mode : NO
1704 06:46:46.454425 ME: FW Partition Table : OK
1705 06:46:46.457760 ME: Bringup Loader Failure : NO
1706 06:46:46.460775 ME: Firmware Init Complete : YES
1707 06:46:46.464551 ME: Boot Options Present : NO
1708 06:46:46.467248 ME: Update In Progress : NO
1709 06:46:46.470917 ME: D0i3 Support : YES
1710 06:46:46.473786 ME: Low Power State Enabled : NO
1711 06:46:46.477340 ME: CPU Replaced : NO
1712 06:46:46.480650 ME: CPU Replacement Valid : YES
1713 06:46:46.484645 ME: Current Working State : 5
1714 06:46:46.487583 ME: Current Operation State : 1
1715 06:46:46.490594 ME: Current Operation Mode : 0
1716 06:46:46.494410 ME: Error Code : 0
1717 06:46:46.497116 ME: CPU Debug Disabled : YES
1718 06:46:46.500361 ME: TXT Support : NO
1719 06:46:46.507543 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 06:46:46.514249 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 06:46:46.514759 CBFS @ c08000 size 3f8000
1722 06:46:46.520136 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 06:46:46.523450 CBFS: Locating 'fallback/dsdt.aml'
1724 06:46:46.527206 CBFS: Found @ offset 10bb80 size 3fa5
1725 06:46:46.533665 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 06:46:46.537578 CBFS @ c08000 size 3f8000
1727 06:46:46.540156 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 06:46:46.543948 CBFS: Locating 'fallback/slic'
1729 06:46:46.548677 CBFS: 'fallback/slic' not found.
1730 06:46:46.555267 ACPI: Writing ACPI tables at 99b3e000.
1731 06:46:46.555771 ACPI: * FACS
1732 06:46:46.558508 ACPI: * DSDT
1733 06:46:46.561917 Ramoops buffer: 0x100000@0x99a3d000.
1734 06:46:46.565014 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 06:46:46.571588 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 06:46:46.575071 Google Chrome EC: version:
1737 06:46:46.578380 ro: helios_v2.0.2659-56403530b
1738 06:46:46.581521 rw: helios_v2.0.2849-c41de27e7d
1739 06:46:46.581992 running image: 1
1740 06:46:46.585584 ACPI: * FADT
1741 06:46:46.585992 SCI is IRQ9
1742 06:46:46.592447 ACPI: added table 1/32, length now 40
1743 06:46:46.592884 ACPI: * SSDT
1744 06:46:46.595987 Found 1 CPU(s) with 8 core(s) each.
1745 06:46:46.599294 Error: Could not locate 'wifi_sar' in VPD.
1746 06:46:46.605523 Checking CBFS for default SAR values
1747 06:46:46.609210 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 06:46:46.612696 CBFS @ c08000 size 3f8000
1749 06:46:46.619175 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 06:46:46.622619 CBFS: Locating 'wifi_sar_defaults.hex'
1751 06:46:46.625965 CBFS: Found @ offset 5fac0 size 77
1752 06:46:46.629209 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 06:46:46.635955 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 06:46:46.638746 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 06:46:46.645483 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 06:46:46.648710 failed to find key in VPD: dsm_calib_r0_0
1757 06:46:46.658562 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 06:46:46.662201 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 06:46:46.665332 failed to find key in VPD: dsm_calib_r0_1
1760 06:46:46.675429 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 06:46:46.681768 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 06:46:46.684991 failed to find key in VPD: dsm_calib_r0_2
1763 06:46:46.694887 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 06:46:46.697988 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 06:46:46.704697 failed to find key in VPD: dsm_calib_r0_3
1766 06:46:46.711271 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 06:46:46.717712 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 06:46:46.720846 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 06:46:46.724077 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 06:46:46.728178 EC returned error result code 1
1771 06:46:46.732034 EC returned error result code 1
1772 06:46:46.735619 EC returned error result code 1
1773 06:46:46.742271 PS2K: Bad resp from EC. Vivaldi disabled!
1774 06:46:46.745766 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 06:46:46.752232 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 06:46:46.758898 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 06:46:46.762349 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 06:46:46.769189 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 06:46:46.775375 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 06:46:46.781958 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 06:46:46.785429 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 06:46:46.791966 ACPI: added table 2/32, length now 44
1783 06:46:46.792065 ACPI: * MCFG
1784 06:46:46.795401 ACPI: added table 3/32, length now 48
1785 06:46:46.798897 ACPI: * TPM2
1786 06:46:46.802038 TPM2 log created at 99a2d000
1787 06:46:46.805210 ACPI: added table 4/32, length now 52
1788 06:46:46.805322 ACPI: * MADT
1789 06:46:46.808974 SCI is IRQ9
1790 06:46:46.812106 ACPI: added table 5/32, length now 56
1791 06:46:46.812216 current = 99b43ac0
1792 06:46:46.814923 ACPI: * DMAR
1793 06:46:46.818576 ACPI: added table 6/32, length now 60
1794 06:46:46.821896 ACPI: * IGD OpRegion
1795 06:46:46.822008 GMA: Found VBT in CBFS
1796 06:46:46.825373 GMA: Found valid VBT in CBFS
1797 06:46:46.828386 ACPI: added table 7/32, length now 64
1798 06:46:46.831707 ACPI: * HPET
1799 06:46:46.835495 ACPI: added table 8/32, length now 68
1800 06:46:46.835606 ACPI: done.
1801 06:46:46.838387 ACPI tables: 31744 bytes.
1802 06:46:46.842195 smbios_write_tables: 99a2c000
1803 06:46:46.845713 EC returned error result code 3
1804 06:46:46.848608 Couldn't obtain OEM name from CBI
1805 06:46:46.852372 Create SMBIOS type 17
1806 06:46:46.855398 PCI: 00:00.0 (Intel Cannonlake)
1807 06:46:46.858955 PCI: 00:14.3 (Intel WiFi)
1808 06:46:46.862342 SMBIOS tables: 939 bytes.
1809 06:46:46.865504 Writing table forward entry at 0x00000500
1810 06:46:46.871932 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 06:46:46.875503 Writing coreboot table at 0x99b62000
1812 06:46:46.881763 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 06:46:46.885197 1. 0000000000001000-000000000009ffff: RAM
1814 06:46:46.888716 2. 00000000000a0000-00000000000fffff: RESERVED
1815 06:46:46.895363 3. 0000000000100000-0000000099a2bfff: RAM
1816 06:46:46.898771 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 06:46:46.905261 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 06:46:46.911812 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 06:46:46.915402 7. 000000009a000000-000000009f7fffff: RESERVED
1820 06:46:46.922064 8. 00000000e0000000-00000000efffffff: RESERVED
1821 06:46:46.924920 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 06:46:46.928301 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 06:46:46.935036 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 06:46:46.938301 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 06:46:46.944785 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 06:46:46.948420 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 06:46:46.951646 15. 0000000100000000-000000045e7fffff: RAM
1828 06:46:46.957929 Graphics framebuffer located at 0xc0000000
1829 06:46:46.961670 Passing 5 GPIOs to payload:
1830 06:46:46.964714 NAME | PORT | POLARITY | VALUE
1831 06:46:46.971353 write protect | undefined | high | low
1832 06:46:46.974998 lid | undefined | high | high
1833 06:46:46.981443 power | undefined | high | low
1834 06:46:46.988095 oprom | undefined | high | low
1835 06:46:46.991289 EC in RW | 0x000000cb | high | low
1836 06:46:46.991385 Board ID: 4
1837 06:46:46.997910 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 06:46:47.001330 CBFS @ c08000 size 3f8000
1839 06:46:47.007663 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 06:46:47.011014 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1841 06:46:47.014543 coreboot table: 1492 bytes.
1842 06:46:47.017916 IMD ROOT 0. 99fff000 00001000
1843 06:46:47.020945 IMD SMALL 1. 99ffe000 00001000
1844 06:46:47.024620 FSP MEMORY 2. 99c4e000 003b0000
1845 06:46:47.028026 CONSOLE 3. 99c2e000 00020000
1846 06:46:47.030816 FMAP 4. 99c2d000 0000054e
1847 06:46:47.034343 TIME STAMP 5. 99c2c000 00000910
1848 06:46:47.037620 VBOOT WORK 6. 99c18000 00014000
1849 06:46:47.040778 MRC DATA 7. 99c16000 00001958
1850 06:46:47.044463 ROMSTG STCK 8. 99c15000 00001000
1851 06:46:47.047567 AFTER CAR 9. 99c0b000 0000a000
1852 06:46:47.051356 RAMSTAGE 10. 99baf000 0005c000
1853 06:46:47.054028 REFCODE 11. 99b7a000 00035000
1854 06:46:47.057803 SMM BACKUP 12. 99b6a000 00010000
1855 06:46:47.060997 COREBOOT 13. 99b62000 00008000
1856 06:46:47.063783 ACPI 14. 99b3e000 00024000
1857 06:46:47.067822 ACPI GNVS 15. 99b3d000 00001000
1858 06:46:47.070563 RAMOOPS 16. 99a3d000 00100000
1859 06:46:47.074013 TPM2 TCGLOG17. 99a2d000 00010000
1860 06:46:47.077246 SMBIOS 18. 99a2c000 00000800
1861 06:46:47.080614 IMD small region:
1862 06:46:47.084390 IMD ROOT 0. 99ffec00 00000400
1863 06:46:47.087428 FSP RUNTIME 1. 99ffebe0 00000004
1864 06:46:47.090873 EC HOSTEVENT 2. 99ffebc0 00000008
1865 06:46:47.093814 POWER STATE 3. 99ffeb80 00000040
1866 06:46:47.097251 ROMSTAGE 4. 99ffeb60 00000004
1867 06:46:47.100802 MEM INFO 5. 99ffe9a0 000001b9
1868 06:46:47.104018 VPD 6. 99ffe920 0000006c
1869 06:46:47.107830 MTRR: Physical address space:
1870 06:46:47.114929 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 06:46:47.120459 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 06:46:47.127479 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 06:46:47.133967 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 06:46:47.140647 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 06:46:47.146829 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 06:46:47.153457 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 06:46:47.157152 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 06:46:47.160551 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 06:46:47.163904 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 06:46:47.167195 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 06:46:47.173703 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 06:46:47.177235 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 06:46:47.180192 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 06:46:47.183852 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 06:46:47.190788 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 06:46:47.193504 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 06:46:47.196354 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 06:46:47.199978 call enable_fixed_mtrr()
1889 06:46:47.202833 CPU physical address size: 39 bits
1890 06:46:47.209969 MTRR: default type WB/UC MTRR counts: 6/8.
1891 06:46:47.213013 MTRR: WB selected as default type.
1892 06:46:47.219645 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 06:46:47.223196 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 06:46:47.229834 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 06:46:47.236920 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 06:46:47.243423 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 06:46:47.249934 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 06:46:47.252988 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 06:46:47.259639 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 06:46:47.262451 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 06:46:47.266607 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 06:46:47.268945 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 06:46:47.276047 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 06:46:47.279340 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 06:46:47.282436 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 06:46:47.285981 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 06:46:47.292729 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 06:46:47.295917 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 06:46:47.296500
1910 06:46:47.296841 MTRR check
1911 06:46:47.299085 Fixed MTRRs : Enabled
1912 06:46:47.302031 Variable MTRRs: Enabled
1913 06:46:47.302446
1914 06:46:47.305364 call enable_fixed_mtrr()
1915 06:46:47.308811 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1916 06:46:47.311955 CPU physical address size: 39 bits
1917 06:46:47.319533 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1918 06:46:47.322433 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 06:46:47.325585 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 06:46:47.332150 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 06:46:47.335816 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 06:46:47.338829 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 06:46:47.342801 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 06:46:47.345289 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 06:46:47.352922 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 06:46:47.356075 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 06:46:47.359125 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 06:46:47.362568 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 06:46:47.368946 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 06:46:47.372409 call enable_fixed_mtrr()
1931 06:46:47.376125 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 06:46:47.379104 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 06:46:47.382079 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 06:46:47.385638 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 06:46:47.392122 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 06:46:47.395438 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 06:46:47.398341 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 06:46:47.401834 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 06:46:47.408963 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 06:46:47.412393 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 06:46:47.415011 CPU physical address size: 39 bits
1942 06:46:47.419113 call enable_fixed_mtrr()
1943 06:46:47.421538 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 06:46:47.425032 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 06:46:47.431848 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 06:46:47.435622 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 06:46:47.438054 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 06:46:47.441340 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 06:46:47.448055 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 06:46:47.451340 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 06:46:47.455004 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 06:46:47.458275 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 06:46:47.461152 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 06:46:47.467945 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 06:46:47.471432 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 06:46:47.474688 call enable_fixed_mtrr()
1957 06:46:47.477817 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 06:46:47.481548 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 06:46:47.488369 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 06:46:47.491274 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 06:46:47.494998 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 06:46:47.497472 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 06:46:47.501184 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 06:46:47.508078 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 06:46:47.511084 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 06:46:47.514902 CPU physical address size: 39 bits
1967 06:46:47.517609 call enable_fixed_mtrr()
1968 06:46:47.521185 CBFS @ c08000 size 3f8000
1969 06:46:47.523976 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1970 06:46:47.531025 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 06:46:47.534725 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 06:46:47.537480 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 06:46:47.541225 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 06:46:47.547324 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 06:46:47.550952 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 06:46:47.553918 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 06:46:47.557480 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 06:46:47.564272 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 06:46:47.567740 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 06:46:47.570408 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 06:46:47.573661 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 06:46:47.580732 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 06:46:47.581258 call enable_fixed_mtrr()
1984 06:46:47.587076 MTRR: Fixed MSR 0x259 0x0000000000000000
1985 06:46:47.590973 MTRR: Fixed MSR 0x268 0x0606060606060606
1986 06:46:47.593628 MTRR: Fixed MSR 0x269 0x0606060606060606
1987 06:46:47.596767 MTRR: Fixed MSR 0x26a 0x0606060606060606
1988 06:46:47.603718 MTRR: Fixed MSR 0x26b 0x0606060606060606
1989 06:46:47.607102 MTRR: Fixed MSR 0x26c 0x0606060606060606
1990 06:46:47.610480 MTRR: Fixed MSR 0x26d 0x0606060606060606
1991 06:46:47.613861 MTRR: Fixed MSR 0x26e 0x0606060606060606
1992 06:46:47.616985 MTRR: Fixed MSR 0x26f 0x0606060606060606
1993 06:46:47.623895 CPU physical address size: 39 bits
1994 06:46:47.624458 call enable_fixed_mtrr()
1995 06:46:47.630206 CPU physical address size: 39 bits
1996 06:46:47.633666 CPU physical address size: 39 bits
1997 06:46:47.637097 CBFS: Locating 'fallback/payload'
1998 06:46:47.639942 CPU physical address size: 39 bits
1999 06:46:47.643551 CBFS: Found @ offset 1c96c0 size 3f798
2000 06:46:47.646927 Checking segment from ROM address 0xffdd16f8
2001 06:46:47.653566 Checking segment from ROM address 0xffdd1714
2002 06:46:47.656902 Loading segment from ROM address 0xffdd16f8
2003 06:46:47.660378 code (compression=0)
2004 06:46:47.666845 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 06:46:47.676413 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 06:46:47.676926 it's not compressed!
2007 06:46:47.770599 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 06:46:47.776632 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 06:46:47.780300 Loading segment from ROM address 0xffdd1714
2010 06:46:47.783678 Entry Point 0x30000000
2011 06:46:47.787032 Loaded segments
2012 06:46:47.792682 Finalizing chipset.
2013 06:46:47.795956 Finalizing SMM.
2014 06:46:47.798762 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2015 06:46:47.802597 mp_park_aps done after 0 msecs.
2016 06:46:47.809217 Jumping to boot code at 30000000(99b62000)
2017 06:46:47.815587 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 06:46:47.816161
2019 06:46:47.816629
2020 06:46:47.816947
2021 06:46:47.819517 Starting depthcharge on Helios...
2022 06:46:47.820020
2023 06:46:47.821147 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 06:46:47.821650 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 06:46:47.822062 Setting prompt string to ['hatch:']
2026 06:46:47.822462 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 06:46:47.828451 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 06:46:47.828867
2029 06:46:47.835447 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 06:46:47.835961
2031 06:46:47.841836 board_setup: Info: eMMC controller not present; skipping
2032 06:46:47.842341
2033 06:46:47.845642 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 06:46:47.846057
2035 06:46:47.851701 board_setup: Info: SDHCI controller not present; skipping
2036 06:46:47.852212
2037 06:46:47.855476 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 06:46:47.858903
2039 06:46:47.859432 Wipe memory regions:
2040 06:46:47.859755
2041 06:46:47.862399 [0x00000000001000, 0x000000000a0000)
2042 06:46:47.862904
2043 06:46:47.865572 [0x00000000100000, 0x00000030000000)
2044 06:46:47.931925
2045 06:46:47.934646 [0x00000030657430, 0x00000099a2c000)
2046 06:46:48.081395
2047 06:46:48.084474 [0x00000100000000, 0x0000045e800000)
2048 06:46:49.541044
2049 06:46:49.541560 R8152: Initializing
2050 06:46:49.541889
2051 06:46:49.544164 Version 9 (ocp_data = 6010)
2052 06:46:49.548443
2053 06:46:49.548947 R8152: Done initializing
2054 06:46:49.549275
2055 06:46:49.551616 Adding net device
2056 06:46:50.034237
2057 06:46:50.034739 R8152: Initializing
2058 06:46:50.035063
2059 06:46:50.037511 Version 6 (ocp_data = 5c30)
2060 06:46:50.037916
2061 06:46:50.040196 R8152: Done initializing
2062 06:46:50.040305
2063 06:46:50.043883 net_add_device: Attemp to include the same device
2064 06:46:50.047263
2065 06:46:50.054596 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 06:46:50.054738
2067 06:46:50.054821
2068 06:46:50.054894
2069 06:46:50.055198 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 06:46:50.155791 hatch: tftpboot 192.168.201.1 12243178/tftp-deploy-75hi0lsf/kernel/bzImage 12243178/tftp-deploy-75hi0lsf/kernel/cmdline 12243178/tftp-deploy-75hi0lsf/ramdisk/ramdisk.cpio.gz
2072 06:46:50.156435 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 06:46:50.156882 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 06:46:50.161670 tftpboot 192.168.201.1 12243178/tftp-deploy-75hi0lsf/kernel/bzImploy-75hi0lsf/kernel/cmdline 12243178/tftp-deploy-75hi0lsf/ramdisk/ramdisk.cpio.gz
2075 06:46:50.162107
2076 06:46:50.162425 Waiting for link
2077 06:46:50.362576
2078 06:46:50.363073 done.
2079 06:46:50.363395
2080 06:46:50.363693 MAC: 00:24:32:50:1a:59
2081 06:46:50.363985
2082 06:46:50.365990 Sending DHCP discover... done.
2083 06:46:50.366396
2084 06:46:50.369585 Waiting for reply... done.
2085 06:46:50.369992
2086 06:46:50.372635 Sending DHCP request... done.
2087 06:46:50.373136
2088 06:46:50.376028 Waiting for reply... done.
2089 06:46:50.376594
2090 06:46:50.379918 My ip is 192.168.201.14
2091 06:46:50.380511
2092 06:46:50.382803 The DHCP server ip is 192.168.201.1
2093 06:46:50.383210
2094 06:46:50.389147 TFTP server IP predefined by user: 192.168.201.1
2095 06:46:50.389665
2096 06:46:50.395967 Bootfile predefined by user: 12243178/tftp-deploy-75hi0lsf/kernel/bzImage
2097 06:46:50.396541
2098 06:46:50.399344 Sending tftp read request... done.
2099 06:46:50.399752
2100 06:46:50.406714 Waiting for the transfer...
2101 06:46:50.407122
2102 06:46:51.124617 00000000 ################################################################
2103 06:46:51.125104
2104 06:46:51.833727 00080000 ################################################################
2105 06:46:51.834182
2106 06:46:52.529180 00100000 ################################################################
2107 06:46:52.529709
2108 06:46:53.268513 00180000 ################################################################
2109 06:46:53.268971
2110 06:46:53.994630 00200000 ################################################################
2111 06:46:53.995103
2112 06:46:54.711573 00280000 ################################################################
2113 06:46:54.712039
2114 06:46:55.394685 00300000 ################################################################
2115 06:46:55.395223
2116 06:46:56.116362 00380000 ################################################################
2117 06:46:56.116850
2118 06:46:56.820110 00400000 ################################################################
2119 06:46:56.820670
2120 06:46:57.490943 00480000 ################################################################
2121 06:46:57.491428
2122 06:46:58.193861 00500000 ################################################################
2123 06:46:58.194315
2124 06:46:58.911265 00580000 ################################################################
2125 06:46:58.911826
2126 06:46:59.649791 00600000 ################################################################
2127 06:46:59.650337
2128 06:47:00.230596 00680000 ################################################################
2129 06:47:00.230750
2130 06:47:00.779859 00700000 ################################################################
2131 06:47:00.780014
2132 06:47:01.330506 00780000 ################################################################
2133 06:47:01.330661
2134 06:47:01.529289 00800000 ####################### done.
2135 06:47:01.529434
2136 06:47:01.532295 The bootfile was 8576912 bytes long.
2137 06:47:01.532386
2138 06:47:01.535772 Sending tftp read request... done.
2139 06:47:01.535864
2140 06:47:01.539104 Waiting for the transfer...
2141 06:47:01.539194
2142 06:47:02.082976 00000000 ################################################################
2143 06:47:02.083132
2144 06:47:02.625844 00080000 ################################################################
2145 06:47:02.626002
2146 06:47:03.157747 00100000 ################################################################
2147 06:47:03.157895
2148 06:47:03.693744 00180000 ################################################################
2149 06:47:03.693896
2150 06:47:04.236616 00200000 ################################################################
2151 06:47:04.236778
2152 06:47:04.777031 00280000 ################################################################
2153 06:47:04.777193
2154 06:47:05.327146 00300000 ################################################################
2155 06:47:05.327299
2156 06:47:05.878593 00380000 ################################################################
2157 06:47:05.878751
2158 06:47:06.424561 00400000 ################################################################
2159 06:47:06.424722
2160 06:47:06.977781 00480000 ################################################################
2161 06:47:06.977929
2162 06:47:07.521915 00500000 ############################################################### done.
2163 06:47:07.522065
2164 06:47:07.525358 Sending tftp read request... done.
2165 06:47:07.525444
2166 06:47:07.528180 Waiting for the transfer...
2167 06:47:07.528279
2168 06:47:07.528353 00000000 # done.
2169 06:47:07.528427
2170 06:47:07.538129 Command line loaded dynamically from TFTP file: 12243178/tftp-deploy-75hi0lsf/kernel/cmdline
2171 06:47:07.538217
2172 06:47:07.568230 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12243178/extract-nfsrootfs-k60myfgo,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2173 06:47:07.568332
2174 06:47:07.571354 ec_init(0): CrosEC protocol v3 supported (256, 256)
2175 06:47:07.577783
2176 06:47:07.580729 Shutting down all USB controllers.
2177 06:47:07.580812
2178 06:47:07.580880 Removing current net device
2179 06:47:07.585068
2180 06:47:07.585149 Finalizing coreboot
2181 06:47:07.585221
2182 06:47:07.591871 Exiting depthcharge with code 4 at timestamp: 27111964
2183 06:47:07.591954
2184 06:47:07.592022
2185 06:47:07.592091 Starting kernel ...
2186 06:47:07.592158
2187 06:47:07.592219
2188 06:47:07.592615 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2189 06:47:07.592721 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2190 06:47:07.592806 Setting prompt string to ['Linux version [0-9]']
2191 06:47:07.592879 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2192 06:47:07.592951 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2194 06:51:29.593558 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2196 06:51:29.594519 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2198 06:51:29.595306 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2201 06:51:29.596469 end: 2 depthcharge-action (duration 00:05:00) [common]
2203 06:51:29.596791 Cleaning after the job
2204 06:51:29.596906 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243178/tftp-deploy-75hi0lsf/ramdisk
2205 06:51:29.597880 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243178/tftp-deploy-75hi0lsf/kernel
2206 06:51:29.599315 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243178/tftp-deploy-75hi0lsf/nfsrootfs
2207 06:51:29.698291 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12243178/tftp-deploy-75hi0lsf/modules
2208 06:51:29.698773 start: 4.1 power-off (timeout 00:00:30) [common]
2209 06:51:29.698957 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2210 06:51:29.774717 >> Command sent successfully.
2211 06:51:29.784326 Returned 0 in 0 seconds
2212 06:51:29.885552 end: 4.1 power-off (duration 00:00:00) [common]
2214 06:51:29.886973 start: 4.2 read-feedback (timeout 00:10:00) [common]
2215 06:51:29.888209 Listened to connection for namespace 'common' for up to 1s
2217 06:51:29.889540 Listened to connection for namespace 'common' for up to 1s
2218 06:51:30.888712 Finalising connection for namespace 'common'
2219 06:51:30.889332 Disconnecting from shell: Finalise
2220 06:51:30.889720
2221 06:51:30.990913 end: 4.2 read-feedback (duration 00:00:01) [common]
2222 06:51:30.991484 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12243178
2223 06:51:31.614532 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12243178
2224 06:51:31.614734 JobError: Your job cannot terminate cleanly.