Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 06:46:18.505066 lava-dispatcher, installed at version: 2023.10
2 06:46:18.505303 start: 0 validate
3 06:46:18.505446 Start time: 2024-01-03 06:46:18.505437+00:00 (UTC)
4 06:46:18.505577 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:46:18.505715 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 06:46:18.773667 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:46:18.773936 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:46:18.775678 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:46:18.775872 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 06:46:18.779481 validate duration: 0.27
12 06:46:18.779902 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:46:18.780079 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:46:18.780232 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:46:18.780450 Not decompressing ramdisk as can be used compressed.
16 06:46:18.780593 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 06:46:18.780713 saving as /var/lib/lava/dispatcher/tmp/12434463/tftp-deploy-jga5zd70/ramdisk/rootfs.cpio.gz
18 06:46:18.780838 total size: 8418130 (8 MB)
19 06:46:18.782448 progress 0 % (0 MB)
20 06:46:18.784866 progress 5 % (0 MB)
21 06:46:18.787239 progress 10 % (0 MB)
22 06:46:18.789613 progress 15 % (1 MB)
23 06:46:18.791992 progress 20 % (1 MB)
24 06:46:18.795186 progress 25 % (2 MB)
25 06:46:18.797863 progress 30 % (2 MB)
26 06:46:18.800298 progress 35 % (2 MB)
27 06:46:18.803208 progress 40 % (3 MB)
28 06:46:18.806598 progress 45 % (3 MB)
29 06:46:18.809569 progress 50 % (4 MB)
30 06:46:18.812110 progress 55 % (4 MB)
31 06:46:18.815437 progress 60 % (4 MB)
32 06:46:18.818537 progress 65 % (5 MB)
33 06:46:18.821868 progress 70 % (5 MB)
34 06:46:18.825195 progress 75 % (6 MB)
35 06:46:18.828507 progress 80 % (6 MB)
36 06:46:18.831792 progress 85 % (6 MB)
37 06:46:18.835083 progress 90 % (7 MB)
38 06:46:18.838340 progress 95 % (7 MB)
39 06:46:18.841009 progress 100 % (8 MB)
40 06:46:18.841256 8 MB downloaded in 0.06 s (132.88 MB/s)
41 06:46:18.841439 end: 1.1.1 http-download (duration 00:00:00) [common]
43 06:46:18.841757 end: 1.1 download-retry (duration 00:00:00) [common]
44 06:46:18.841851 start: 1.2 download-retry (timeout 00:10:00) [common]
45 06:46:18.841939 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 06:46:18.842081 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 06:46:18.842157 saving as /var/lib/lava/dispatcher/tmp/12434463/tftp-deploy-jga5zd70/kernel/bzImage
48 06:46:18.842221 total size: 8576912 (8 MB)
49 06:46:18.842283 No compression specified
50 06:46:18.843483 progress 0 % (0 MB)
51 06:46:18.846104 progress 5 % (0 MB)
52 06:46:18.848668 progress 10 % (0 MB)
53 06:46:18.851128 progress 15 % (1 MB)
54 06:46:18.853644 progress 20 % (1 MB)
55 06:46:18.856206 progress 25 % (2 MB)
56 06:46:18.858704 progress 30 % (2 MB)
57 06:46:18.861316 progress 35 % (2 MB)
58 06:46:18.863755 progress 40 % (3 MB)
59 06:46:18.866314 progress 45 % (3 MB)
60 06:46:18.868774 progress 50 % (4 MB)
61 06:46:18.871307 progress 55 % (4 MB)
62 06:46:18.874000 progress 60 % (4 MB)
63 06:46:18.876357 progress 65 % (5 MB)
64 06:46:18.878759 progress 70 % (5 MB)
65 06:46:18.881242 progress 75 % (6 MB)
66 06:46:18.883642 progress 80 % (6 MB)
67 06:46:18.886057 progress 85 % (6 MB)
68 06:46:18.888543 progress 90 % (7 MB)
69 06:46:18.890804 progress 95 % (7 MB)
70 06:46:18.893150 progress 100 % (8 MB)
71 06:46:18.893369 8 MB downloaded in 0.05 s (159.94 MB/s)
72 06:46:18.893521 end: 1.2.1 http-download (duration 00:00:00) [common]
74 06:46:18.893751 end: 1.2 download-retry (duration 00:00:00) [common]
75 06:46:18.893844 start: 1.3 download-retry (timeout 00:10:00) [common]
76 06:46:18.893938 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 06:46:18.894083 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 06:46:18.894188 saving as /var/lib/lava/dispatcher/tmp/12434463/tftp-deploy-jga5zd70/modules/modules.tar
79 06:46:18.894271 total size: 250972 (0 MB)
80 06:46:18.894358 Using unxz to decompress xz
81 06:46:18.898851 progress 13 % (0 MB)
82 06:46:18.899311 progress 26 % (0 MB)
83 06:46:18.899680 progress 39 % (0 MB)
84 06:46:18.901312 progress 52 % (0 MB)
85 06:46:18.903455 progress 65 % (0 MB)
86 06:46:18.905586 progress 78 % (0 MB)
87 06:46:18.907542 progress 91 % (0 MB)
88 06:46:18.909702 progress 100 % (0 MB)
89 06:46:18.915453 0 MB downloaded in 0.02 s (11.30 MB/s)
90 06:46:18.915797 end: 1.3.1 http-download (duration 00:00:00) [common]
92 06:46:18.916116 end: 1.3 download-retry (duration 00:00:00) [common]
93 06:46:18.916224 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 06:46:18.916340 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 06:46:18.916429 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 06:46:18.916518 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 06:46:18.916746 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7
98 06:46:18.916884 makedir: /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin
99 06:46:18.916991 makedir: /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/tests
100 06:46:18.917091 makedir: /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/results
101 06:46:18.917206 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-add-keys
102 06:46:18.917358 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-add-sources
103 06:46:18.917495 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-background-process-start
104 06:46:18.917649 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-background-process-stop
105 06:46:18.917835 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-common-functions
106 06:46:18.917970 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-echo-ipv4
107 06:46:18.918101 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-install-packages
108 06:46:18.918266 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-installed-packages
109 06:46:18.918442 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-os-build
110 06:46:18.918575 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-probe-channel
111 06:46:18.918706 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-probe-ip
112 06:46:18.918848 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-target-ip
113 06:46:18.918979 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-target-mac
114 06:46:18.919108 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-target-storage
115 06:46:18.919243 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-test-case
116 06:46:18.919378 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-test-event
117 06:46:18.919507 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-test-feedback
118 06:46:18.919636 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-test-raise
119 06:46:18.919766 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-test-reference
120 06:46:18.919900 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-test-runner
121 06:46:18.920070 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-test-set
122 06:46:18.920233 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-test-shell
123 06:46:18.920397 Updating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-install-packages (oe)
124 06:46:18.920556 Updating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/bin/lava-installed-packages (oe)
125 06:46:18.920688 Creating /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/environment
126 06:46:18.920826 LAVA metadata
127 06:46:18.920911 - LAVA_JOB_ID=12434463
128 06:46:18.920998 - LAVA_DISPATCHER_IP=192.168.201.1
129 06:46:18.921134 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 06:46:18.921214 skipped lava-vland-overlay
131 06:46:18.921322 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 06:46:18.921429 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 06:46:18.921497 skipped lava-multinode-overlay
134 06:46:18.921571 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 06:46:18.921656 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 06:46:18.921733 Loading test definitions
137 06:46:18.921831 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 06:46:18.921910 Using /lava-12434463 at stage 0
139 06:46:18.922248 uuid=12434463_1.4.2.3.1 testdef=None
140 06:46:18.922341 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 06:46:18.922427 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 06:46:18.922974 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 06:46:18.923202 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 06:46:18.923929 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 06:46:18.924323 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 06:46:18.924990 runner path: /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/0/tests/0_dmesg test_uuid 12434463_1.4.2.3.1
149 06:46:18.925151 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 06:46:18.925376 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 06:46:18.925454 Using /lava-12434463 at stage 1
153 06:46:18.925805 uuid=12434463_1.4.2.3.5 testdef=None
154 06:46:18.925904 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 06:46:18.926007 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 06:46:18.926715 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 06:46:18.927083 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 06:46:18.928052 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 06:46:18.928397 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 06:46:18.929121 runner path: /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/1/tests/1_bootrr test_uuid 12434463_1.4.2.3.5
163 06:46:18.929328 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 06:46:18.929686 Creating lava-test-runner.conf files
166 06:46:18.929789 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/0 for stage 0
167 06:46:18.929937 - 0_dmesg
168 06:46:18.930071 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12434463/lava-overlay-vduh9dk7/lava-12434463/1 for stage 1
169 06:46:18.930216 - 1_bootrr
170 06:46:18.930357 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 06:46:18.930487 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 06:46:18.940348 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 06:46:18.940505 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 06:46:18.940625 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 06:46:18.940732 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 06:46:18.940839 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 06:46:19.236521 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 06:46:19.237037 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 06:46:19.237250 extracting modules file /var/lib/lava/dispatcher/tmp/12434463/tftp-deploy-jga5zd70/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12434463/extract-overlay-ramdisk-tqpiq4ky/ramdisk
180 06:46:19.258670 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 06:46:19.258876 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 06:46:19.259016 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12434463/compress-overlay-70vm6sl7/overlay-1.4.2.4.tar.gz to ramdisk
183 06:46:19.259118 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12434463/compress-overlay-70vm6sl7/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12434463/extract-overlay-ramdisk-tqpiq4ky/ramdisk
184 06:46:19.273308 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 06:46:19.273518 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 06:46:19.273680 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 06:46:19.273860 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 06:46:19.274037 Building ramdisk /var/lib/lava/dispatcher/tmp/12434463/extract-overlay-ramdisk-tqpiq4ky/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12434463/extract-overlay-ramdisk-tqpiq4ky/ramdisk
189 06:46:19.422685 >> 49788 blocks
190 06:46:20.384455 rename /var/lib/lava/dispatcher/tmp/12434463/extract-overlay-ramdisk-tqpiq4ky/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12434463/tftp-deploy-jga5zd70/ramdisk/ramdisk.cpio.gz
191 06:46:20.385036 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 06:46:20.385214 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 06:46:20.385359 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 06:46:20.385494 No mkimage arch provided, not using FIT.
195 06:46:20.385618 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 06:46:20.385742 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 06:46:20.385897 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 06:46:20.386027 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 06:46:20.386152 No LXC device requested
200 06:46:20.386273 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 06:46:20.386423 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 06:46:20.386554 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 06:46:20.386667 Checking files for TFTP limit of 4294967296 bytes.
204 06:46:20.387244 end: 1 tftp-deploy (duration 00:00:02) [common]
205 06:46:20.387388 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 06:46:20.387521 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 06:46:20.387694 substitutions:
208 06:46:20.387796 - {DTB}: None
209 06:46:20.387892 - {INITRD}: 12434463/tftp-deploy-jga5zd70/ramdisk/ramdisk.cpio.gz
210 06:46:20.387984 - {KERNEL}: 12434463/tftp-deploy-jga5zd70/kernel/bzImage
211 06:46:20.388075 - {LAVA_MAC}: None
212 06:46:20.388165 - {PRESEED_CONFIG}: None
213 06:46:20.388253 - {PRESEED_LOCAL}: None
214 06:46:20.388349 - {RAMDISK}: 12434463/tftp-deploy-jga5zd70/ramdisk/ramdisk.cpio.gz
215 06:46:20.388439 - {ROOT_PART}: None
216 06:46:20.388529 - {ROOT}: None
217 06:46:20.388618 - {SERVER_IP}: 192.168.201.1
218 06:46:20.388707 - {TEE}: None
219 06:46:20.388796 Parsed boot commands:
220 06:46:20.388884 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 06:46:20.389126 Parsed boot commands: tftpboot 192.168.201.1 12434463/tftp-deploy-jga5zd70/kernel/bzImage 12434463/tftp-deploy-jga5zd70/kernel/cmdline 12434463/tftp-deploy-jga5zd70/ramdisk/ramdisk.cpio.gz
222 06:46:20.389259 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 06:46:20.389385 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 06:46:20.389525 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 06:46:20.389658 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 06:46:20.389768 Not connected, no need to disconnect.
227 06:46:20.389882 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 06:46:20.390008 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 06:46:20.390111 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
230 06:46:20.394916 Setting prompt string to ['lava-test: # ']
231 06:46:20.395439 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 06:46:20.395595 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 06:46:20.395783 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 06:46:20.395923 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 06:46:20.396236 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
236 06:46:25.535127 >> Command sent successfully.
237 06:46:25.537813 Returned 0 in 5 seconds
238 06:46:25.638242 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 06:46:25.638573 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 06:46:25.638685 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 06:46:25.638826 Setting prompt string to 'Starting depthcharge on Helios...'
243 06:46:25.638947 Changing prompt to 'Starting depthcharge on Helios...'
244 06:46:25.639074 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 06:46:25.639510 [Enter `^Ec?' for help]
246 06:46:26.258806
247 06:46:26.259027
248 06:46:26.269411 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 06:46:26.272911 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 06:46:26.279862 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 06:46:26.282786 CPU: AES supported, TXT NOT supported, VT supported
252 06:46:26.289492 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 06:46:26.292854 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 06:46:26.299644 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 06:46:26.303121 VBOOT: Loading verstage.
256 06:46:26.306276 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 06:46:26.313105 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 06:46:26.316580 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 06:46:26.319710 CBFS @ c08000 size 3f8000
260 06:46:26.326167 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 06:46:26.329692 CBFS: Locating 'fallback/verstage'
262 06:46:26.333242 CBFS: Found @ offset 10fb80 size 1072c
263 06:46:26.333376
264 06:46:26.333485
265 06:46:26.346570 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 06:46:26.360166 Probing TPM: . done!
267 06:46:26.362985 TPM ready after 0 ms
268 06:46:26.366675 Connected to device vid:did:rid of 1ae0:0028:00
269 06:46:26.376510 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
270 06:46:26.379854 Initialized TPM device CR50 revision 0
271 06:46:26.425074 tlcl_send_startup: Startup return code is 0
272 06:46:26.425262 TPM: setup succeeded
273 06:46:26.438053 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 06:46:26.441188 Chrome EC: UHEPI supported
275 06:46:26.444769 Phase 1
276 06:46:26.447830 FMAP: area GBB found @ c05000 (12288 bytes)
277 06:46:26.454677 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 06:46:26.454835 Phase 2
279 06:46:26.458267 Phase 3
280 06:46:26.461836 FMAP: area GBB found @ c05000 (12288 bytes)
281 06:46:26.468034 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 06:46:26.474529 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
283 06:46:26.478384 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
284 06:46:26.484823 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 06:46:26.500172 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
286 06:46:26.503168 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
287 06:46:26.510365 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 06:46:26.514505 Phase 4
289 06:46:26.517398 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
290 06:46:26.524167 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 06:46:26.703802 VB2:vb2_rsa_verify_digest() Digest check failed!
292 06:46:26.710856 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 06:46:26.711060 Saving nvdata
294 06:46:26.713566 Reboot requested (10020007)
295 06:46:26.717033 board_reset() called!
296 06:46:26.717184 full_reset() called!
297 06:46:31.225595
298 06:46:31.225786
299 06:46:31.235799 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 06:46:31.238661 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 06:46:31.245884 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 06:46:31.249102 CPU: AES supported, TXT NOT supported, VT supported
303 06:46:31.255863 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 06:46:31.259302 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 06:46:31.265653 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 06:46:31.268569 VBOOT: Loading verstage.
307 06:46:31.272434 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 06:46:31.278604 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 06:46:31.285500 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 06:46:31.285585 CBFS @ c08000 size 3f8000
311 06:46:31.291817 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 06:46:31.295420 CBFS: Locating 'fallback/verstage'
313 06:46:31.298400 CBFS: Found @ offset 10fb80 size 1072c
314 06:46:31.302709
315 06:46:31.302792
316 06:46:31.312445 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 06:46:31.326929 Probing TPM: . done!
318 06:46:31.330401 TPM ready after 0 ms
319 06:46:31.333439 Connected to device vid:did:rid of 1ae0:0028:00
320 06:46:31.343932 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 06:46:31.347205 Initialized TPM device CR50 revision 0
322 06:46:31.391924 tlcl_send_startup: Startup return code is 0
323 06:46:31.392054 TPM: setup succeeded
324 06:46:31.405096 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 06:46:31.408801 Chrome EC: UHEPI supported
326 06:46:31.411786 Phase 1
327 06:46:31.414914 FMAP: area GBB found @ c05000 (12288 bytes)
328 06:46:31.421882 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 06:46:31.428101 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 06:46:31.431853 Recovery requested (1009000e)
331 06:46:31.437213 Saving nvdata
332 06:46:31.443631 tlcl_extend: response is 0
333 06:46:31.452022 tlcl_extend: response is 0
334 06:46:31.459298 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 06:46:31.463226 CBFS @ c08000 size 3f8000
336 06:46:31.469009 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 06:46:31.472729 CBFS: Locating 'fallback/romstage'
338 06:46:31.475933 CBFS: Found @ offset 80 size 145fc
339 06:46:31.479492 Accumulated console time in verstage 98 ms
340 06:46:31.479577
341 06:46:31.479643
342 06:46:31.492774 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 06:46:31.499098 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 06:46:31.502211 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 06:46:31.505321 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 06:46:31.512175 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
347 06:46:31.515268 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 06:46:31.519171 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
349 06:46:31.522296 TCO_STS: 0000 0000
350 06:46:31.525425 GEN_PMCON: e0015238 00000200
351 06:46:31.528510 GBLRST_CAUSE: 00000000 00000000
352 06:46:31.528639 prev_sleep_state 5
353 06:46:31.532503 Boot Count incremented to 3008
354 06:46:31.538706 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 06:46:31.542263 CBFS @ c08000 size 3f8000
356 06:46:31.548657 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 06:46:31.548741 CBFS: Locating 'fspm.bin'
358 06:46:31.555478 CBFS: Found @ offset 5ffc0 size 71000
359 06:46:31.558472 Chrome EC: UHEPI supported
360 06:46:31.565236 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 06:46:31.568793 Probing TPM: done!
362 06:46:31.575869 Connected to device vid:did:rid of 1ae0:0028:00
363 06:46:31.585447 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
364 06:46:31.591012 Initialized TPM device CR50 revision 0
365 06:46:31.600366 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 06:46:31.606956 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 06:46:31.610407 MRC cache found, size 1948
368 06:46:31.613288 bootmode is set to: 2
369 06:46:31.616863 PRMRR disabled by config.
370 06:46:31.616987 SPD INDEX = 1
371 06:46:31.623096 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 06:46:31.627041 CBFS @ c08000 size 3f8000
373 06:46:31.633506 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 06:46:31.633603 CBFS: Locating 'spd.bin'
375 06:46:31.636752 CBFS: Found @ offset 5fb80 size 400
376 06:46:31.639827 SPD: module type is LPDDR3
377 06:46:31.643381 SPD: module part is
378 06:46:31.650353 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 06:46:31.653340 SPD: device width 4 bits, bus width 8 bits
380 06:46:31.656299 SPD: module size is 4096 MB (per channel)
381 06:46:31.660214 memory slot: 0 configuration done.
382 06:46:31.662965 memory slot: 2 configuration done.
383 06:46:31.715256 CBMEM:
384 06:46:31.717949 IMD: root @ 99fff000 254 entries.
385 06:46:31.721061 IMD: root @ 99ffec00 62 entries.
386 06:46:31.724830 External stage cache:
387 06:46:31.728239 IMD: root @ 9abff000 254 entries.
388 06:46:31.731603 IMD: root @ 9abfec00 62 entries.
389 06:46:31.734466 Chrome EC: clear events_b mask to 0x0000000020004000
390 06:46:31.751216 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 06:46:31.764461 tlcl_write: response is 0
392 06:46:31.773652 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 06:46:31.779645 MRC: TPM MRC hash updated successfully.
394 06:46:31.779750 2 DIMMs found
395 06:46:31.783241 SMM Memory Map
396 06:46:31.786661 SMRAM : 0x9a000000 0x1000000
397 06:46:31.790001 Subregion 0: 0x9a000000 0xa00000
398 06:46:31.792827 Subregion 1: 0x9aa00000 0x200000
399 06:46:31.796417 Subregion 2: 0x9ac00000 0x400000
400 06:46:31.799478 top_of_ram = 0x9a000000
401 06:46:31.802955 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 06:46:31.809588 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 06:46:31.813073 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 06:46:31.819934 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 06:46:31.822943 CBFS @ c08000 size 3f8000
406 06:46:31.826441 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 06:46:31.829713 CBFS: Locating 'fallback/postcar'
408 06:46:31.836024 CBFS: Found @ offset 107000 size 4b44
409 06:46:31.839146 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 06:46:31.852543 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 06:46:31.855604 Processing 180 relocs. Offset value of 0x97c0c000
412 06:46:31.863473 Accumulated console time in romstage 285 ms
413 06:46:31.863565
414 06:46:31.863662
415 06:46:31.873699 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 06:46:31.880709 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 06:46:31.883774 CBFS @ c08000 size 3f8000
418 06:46:31.886869 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 06:46:31.893124 CBFS: Locating 'fallback/ramstage'
420 06:46:31.896680 CBFS: Found @ offset 43380 size 1b9e8
421 06:46:31.903388 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 06:46:31.935515 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 06:46:31.938657 Processing 3976 relocs. Offset value of 0x98db0000
424 06:46:31.945722 Accumulated console time in postcar 52 ms
425 06:46:31.945842
426 06:46:31.945911
427 06:46:31.955647 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 06:46:31.962099 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 06:46:31.965661 WARNING: RO_VPD is uninitialized or empty.
430 06:46:31.968462 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 06:46:31.976206 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 06:46:31.976336 Normal boot.
433 06:46:31.981808 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 06:46:31.985198 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 06:46:31.988301 CBFS @ c08000 size 3f8000
436 06:46:31.995429 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 06:46:31.998466 CBFS: Locating 'cpu_microcode_blob.bin'
438 06:46:32.001646 CBFS: Found @ offset 14700 size 2ec00
439 06:46:32.005362 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 06:46:32.008836 Skip microcode update
441 06:46:32.012003 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 06:46:32.014910 CBFS @ c08000 size 3f8000
443 06:46:32.021535 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 06:46:32.025110 CBFS: Locating 'fsps.bin'
445 06:46:32.028438 CBFS: Found @ offset d1fc0 size 35000
446 06:46:32.053592 Detected 4 core, 8 thread CPU.
447 06:46:32.056768 Setting up SMI for CPU
448 06:46:32.060194 IED base = 0x9ac00000
449 06:46:32.060316 IED size = 0x00400000
450 06:46:32.063688 Will perform SMM setup.
451 06:46:32.069970 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 06:46:32.076832 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 06:46:32.079909 Processing 16 relocs. Offset value of 0x00030000
454 06:46:32.083819 Attempting to start 7 APs
455 06:46:32.086777 Waiting for 10ms after sending INIT.
456 06:46:32.103423 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
457 06:46:32.103557 done.
458 06:46:32.106503 AP: slot 5 apic_id 5.
459 06:46:32.109711 AP: slot 6 apic_id 4.
460 06:46:32.109806 AP: slot 4 apic_id 2.
461 06:46:32.113160 AP: slot 1 apic_id 3.
462 06:46:32.116730 AP: slot 3 apic_id 7.
463 06:46:32.116817 AP: slot 7 apic_id 6.
464 06:46:32.123340 Waiting for 2nd SIPI to complete...done.
465 06:46:32.129925 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 06:46:32.136414 Processing 13 relocs. Offset value of 0x00038000
467 06:46:32.139760 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 06:46:32.146349 Installing SMM handler to 0x9a000000
469 06:46:32.152668 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 06:46:32.159597 Processing 658 relocs. Offset value of 0x9a010000
471 06:46:32.166155 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 06:46:32.169916 Processing 13 relocs. Offset value of 0x9a008000
473 06:46:32.175990 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 06:46:32.182683 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 06:46:32.189187 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 06:46:32.192796 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 06:46:32.199015 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 06:46:32.205989 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 06:46:32.209220 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 06:46:32.215936 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 06:46:32.219149 Clearing SMI status registers
482 06:46:32.223025 SMI_STS: PM1
483 06:46:32.223119 PM1_STS: PWRBTN
484 06:46:32.225943 TCO_STS: SECOND_TO
485 06:46:32.229410 New SMBASE 0x9a000000
486 06:46:32.233101 In relocation handler: CPU 0
487 06:46:32.235970 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 06:46:32.239222 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 06:46:32.242408 Relocation complete.
490 06:46:32.245987 New SMBASE 0x99fff800
491 06:46:32.246105 In relocation handler: CPU 2
492 06:46:32.252747 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
493 06:46:32.255924 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 06:46:32.259399 Relocation complete.
495 06:46:32.262713 New SMBASE 0x99ffe400
496 06:46:32.262846 In relocation handler: CPU 7
497 06:46:32.269124 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
498 06:46:32.272652 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 06:46:32.275712 Relocation complete.
500 06:46:32.275834 New SMBASE 0x99fff400
501 06:46:32.279530 In relocation handler: CPU 3
502 06:46:32.285808 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
503 06:46:32.289494 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 06:46:32.292509 Relocation complete.
505 06:46:32.292602 New SMBASE 0x99fff000
506 06:46:32.296430 In relocation handler: CPU 4
507 06:46:32.299489 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
508 06:46:32.305699 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 06:46:32.309664 Relocation complete.
510 06:46:32.309798 New SMBASE 0x99fffc00
511 06:46:32.312567 In relocation handler: CPU 1
512 06:46:32.315791 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
513 06:46:32.322331 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 06:46:32.325700 Relocation complete.
515 06:46:32.325789 New SMBASE 0x99ffe800
516 06:46:32.329248 In relocation handler: CPU 6
517 06:46:32.332622 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
518 06:46:32.339502 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 06:46:32.339615 Relocation complete.
520 06:46:32.342476 New SMBASE 0x99ffec00
521 06:46:32.345601 In relocation handler: CPU 5
522 06:46:32.349187 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
523 06:46:32.355484 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 06:46:32.355668 Relocation complete.
525 06:46:32.358816 Initializing CPU #0
526 06:46:32.362680 CPU: vendor Intel device 806ec
527 06:46:32.365892 CPU: family 06, model 8e, stepping 0c
528 06:46:32.368806 Clearing out pending MCEs
529 06:46:32.372282 Setting up local APIC...
530 06:46:32.372436 apic_id: 0x00 done.
531 06:46:32.375843 Turbo is available but hidden
532 06:46:32.378882 Turbo is available and visible
533 06:46:32.382699 VMX status: enabled
534 06:46:32.385681 IA32_FEATURE_CONTROL status: locked
535 06:46:32.388778 Skip microcode update
536 06:46:32.388881 CPU #0 initialized
537 06:46:32.392415 Initializing CPU #2
538 06:46:32.392556 Initializing CPU #4
539 06:46:32.395359 Initializing CPU #1
540 06:46:32.398913 CPU: vendor Intel device 806ec
541 06:46:32.401959 CPU: family 06, model 8e, stepping 0c
542 06:46:32.405620 CPU: vendor Intel device 806ec
543 06:46:32.408787 CPU: family 06, model 8e, stepping 0c
544 06:46:32.412391 Clearing out pending MCEs
545 06:46:32.415132 Clearing out pending MCEs
546 06:46:32.418872 Setting up local APIC...
547 06:46:32.419015 Initializing CPU #7
548 06:46:32.422441 CPU: vendor Intel device 806ec
549 06:46:32.425754 CPU: family 06, model 8e, stepping 0c
550 06:46:32.428660 Clearing out pending MCEs
551 06:46:32.431834 Initializing CPU #3
552 06:46:32.435166 CPU: vendor Intel device 806ec
553 06:46:32.438945 CPU: family 06, model 8e, stepping 0c
554 06:46:32.442111 CPU: vendor Intel device 806ec
555 06:46:32.445252 CPU: family 06, model 8e, stepping 0c
556 06:46:32.448503 Clearing out pending MCEs
557 06:46:32.448611 Clearing out pending MCEs
558 06:46:32.452333 Setting up local APIC...
559 06:46:32.455315 apic_id: 0x02 done.
560 06:46:32.458323 Setting up local APIC...
561 06:46:32.458437 apic_id: 0x06 done.
562 06:46:32.462007 Setting up local APIC...
563 06:46:32.464927 apic_id: 0x03 done.
564 06:46:32.465051 VMX status: enabled
565 06:46:32.468566 VMX status: enabled
566 06:46:32.471595 IA32_FEATURE_CONTROL status: locked
567 06:46:32.475223 IA32_FEATURE_CONTROL status: locked
568 06:46:32.478408 Skip microcode update
569 06:46:32.478507 Skip microcode update
570 06:46:32.481432 CPU #4 initialized
571 06:46:32.484955 CPU #1 initialized
572 06:46:32.485033 VMX status: enabled
573 06:46:32.488492 apic_id: 0x07 done.
574 06:46:32.491482 IA32_FEATURE_CONTROL status: locked
575 06:46:32.494893 VMX status: enabled
576 06:46:32.494981 Skip microcode update
577 06:46:32.498110 IA32_FEATURE_CONTROL status: locked
578 06:46:32.501647 CPU #7 initialized
579 06:46:32.504699 Skip microcode update
580 06:46:32.504811 Initializing CPU #6
581 06:46:32.508039 Initializing CPU #5
582 06:46:32.511381 CPU: vendor Intel device 806ec
583 06:46:32.514934 CPU: family 06, model 8e, stepping 0c
584 06:46:32.517973 CPU: vendor Intel device 806ec
585 06:46:32.521381 CPU: family 06, model 8e, stepping 0c
586 06:46:32.524497 Clearing out pending MCEs
587 06:46:32.528223 Clearing out pending MCEs
588 06:46:32.528316 Setting up local APIC...
589 06:46:32.531297 Setting up local APIC...
590 06:46:32.534825 CPU #3 initialized
591 06:46:32.534942 Setting up local APIC...
592 06:46:32.538147 apic_id: 0x01 done.
593 06:46:32.541213 apic_id: 0x04 done.
594 06:46:32.541300 apic_id: 0x05 done.
595 06:46:32.544327 VMX status: enabled
596 06:46:32.548131 VMX status: enabled
597 06:46:32.551556 IA32_FEATURE_CONTROL status: locked
598 06:46:32.554512 IA32_FEATURE_CONTROL status: locked
599 06:46:32.554588 Skip microcode update
600 06:46:32.557773 Skip microcode update
601 06:46:32.561030 CPU #6 initialized
602 06:46:32.561106 CPU #5 initialized
603 06:46:32.564642 VMX status: enabled
604 06:46:32.567655 IA32_FEATURE_CONTROL status: locked
605 06:46:32.571439 Skip microcode update
606 06:46:32.571557 CPU #2 initialized
607 06:46:32.577716 bsp_do_flight_plan done after 452 msecs.
608 06:46:32.581331 CPU: frequency set to 4200 MHz
609 06:46:32.581432 Enabling SMIs.
610 06:46:32.581501 Locking SMM.
611 06:46:32.597371 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 06:46:32.600796 CBFS @ c08000 size 3f8000
613 06:46:32.607333 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 06:46:32.607478 CBFS: Locating 'vbt.bin'
615 06:46:32.610633 CBFS: Found @ offset 5f5c0 size 499
616 06:46:32.617228 Found a VBT of 4608 bytes after decompression
617 06:46:32.798955 Display FSP Version Info HOB
618 06:46:32.802157 Reference Code - CPU = 9.0.1e.30
619 06:46:32.805517 uCode Version = 0.0.0.ca
620 06:46:32.809003 TXT ACM version = ff.ff.ff.ffff
621 06:46:32.812032 Display FSP Version Info HOB
622 06:46:32.815481 Reference Code - ME = 9.0.1e.30
623 06:46:32.818803 MEBx version = 0.0.0.0
624 06:46:32.822014 ME Firmware Version = Consumer SKU
625 06:46:32.825371 Display FSP Version Info HOB
626 06:46:32.828722 Reference Code - CML PCH = 9.0.1e.30
627 06:46:32.831949 PCH-CRID Status = Disabled
628 06:46:32.835511 PCH-CRID Original Value = ff.ff.ff.ffff
629 06:46:32.838807 PCH-CRID New Value = ff.ff.ff.ffff
630 06:46:32.841642 OPROM - RST - RAID = ff.ff.ff.ffff
631 06:46:32.845322 ChipsetInit Base Version = ff.ff.ff.ffff
632 06:46:32.848656 ChipsetInit Oem Version = ff.ff.ff.ffff
633 06:46:32.851646 Display FSP Version Info HOB
634 06:46:32.858212 Reference Code - SA - System Agent = 9.0.1e.30
635 06:46:32.861779 Reference Code - MRC = 0.7.1.6c
636 06:46:32.861871 SA - PCIe Version = 9.0.1e.30
637 06:46:32.864902 SA-CRID Status = Disabled
638 06:46:32.868375 SA-CRID Original Value = 0.0.0.c
639 06:46:32.871684 SA-CRID New Value = 0.0.0.c
640 06:46:32.874967 OPROM - VBIOS = ff.ff.ff.ffff
641 06:46:32.878168 RTC Init
642 06:46:32.881843 Set power on after power failure.
643 06:46:32.881969 Disabling Deep S3
644 06:46:32.884891 Disabling Deep S3
645 06:46:32.885020 Disabling Deep S4
646 06:46:32.887970 Disabling Deep S4
647 06:46:32.888094 Disabling Deep S5
648 06:46:32.891898 Disabling Deep S5
649 06:46:32.897822 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
650 06:46:32.897939 Enumerating buses...
651 06:46:32.904725 Show all devs... Before device enumeration.
652 06:46:32.904839 Root Device: enabled 1
653 06:46:32.908242 CPU_CLUSTER: 0: enabled 1
654 06:46:32.911318 DOMAIN: 0000: enabled 1
655 06:46:32.914717 APIC: 00: enabled 1
656 06:46:32.914834 PCI: 00:00.0: enabled 1
657 06:46:32.918125 PCI: 00:02.0: enabled 1
658 06:46:32.921289 PCI: 00:04.0: enabled 0
659 06:46:32.924885 PCI: 00:05.0: enabled 0
660 06:46:32.925006 PCI: 00:12.0: enabled 1
661 06:46:32.927882 PCI: 00:12.5: enabled 0
662 06:46:32.931154 PCI: 00:12.6: enabled 0
663 06:46:32.931309 PCI: 00:14.0: enabled 1
664 06:46:32.934731 PCI: 00:14.1: enabled 0
665 06:46:32.938082 PCI: 00:14.3: enabled 1
666 06:46:32.941469 PCI: 00:14.5: enabled 0
667 06:46:32.941617 PCI: 00:15.0: enabled 1
668 06:46:32.944556 PCI: 00:15.1: enabled 1
669 06:46:32.947655 PCI: 00:15.2: enabled 0
670 06:46:32.951512 PCI: 00:15.3: enabled 0
671 06:46:32.951659 PCI: 00:16.0: enabled 1
672 06:46:32.954599 PCI: 00:16.1: enabled 0
673 06:46:32.957745 PCI: 00:16.2: enabled 0
674 06:46:32.961215 PCI: 00:16.3: enabled 0
675 06:46:32.961361 PCI: 00:16.4: enabled 0
676 06:46:32.964170 PCI: 00:16.5: enabled 0
677 06:46:32.967817 PCI: 00:17.0: enabled 1
678 06:46:32.970877 PCI: 00:19.0: enabled 1
679 06:46:32.971020 PCI: 00:19.1: enabled 0
680 06:46:32.974803 PCI: 00:19.2: enabled 0
681 06:46:32.977627 PCI: 00:1a.0: enabled 0
682 06:46:32.977766 PCI: 00:1c.0: enabled 0
683 06:46:32.980708 PCI: 00:1c.1: enabled 0
684 06:46:32.984008 PCI: 00:1c.2: enabled 0
685 06:46:32.987266 PCI: 00:1c.3: enabled 0
686 06:46:32.987386 PCI: 00:1c.4: enabled 0
687 06:46:32.990563 PCI: 00:1c.5: enabled 0
688 06:46:32.993959 PCI: 00:1c.6: enabled 0
689 06:46:32.997394 PCI: 00:1c.7: enabled 0
690 06:46:32.997521 PCI: 00:1d.0: enabled 1
691 06:46:33.001032 PCI: 00:1d.1: enabled 0
692 06:46:33.004124 PCI: 00:1d.2: enabled 0
693 06:46:33.007337 PCI: 00:1d.3: enabled 0
694 06:46:33.007462 PCI: 00:1d.4: enabled 0
695 06:46:33.010916 PCI: 00:1d.5: enabled 1
696 06:46:33.013953 PCI: 00:1e.0: enabled 1
697 06:46:33.014077 PCI: 00:1e.1: enabled 0
698 06:46:33.016971 PCI: 00:1e.2: enabled 1
699 06:46:33.020563 PCI: 00:1e.3: enabled 1
700 06:46:33.023968 PCI: 00:1f.0: enabled 1
701 06:46:33.024079 PCI: 00:1f.1: enabled 1
702 06:46:33.027368 PCI: 00:1f.2: enabled 1
703 06:46:33.030696 PCI: 00:1f.3: enabled 1
704 06:46:33.033724 PCI: 00:1f.4: enabled 1
705 06:46:33.033818 PCI: 00:1f.5: enabled 1
706 06:46:33.036731 PCI: 00:1f.6: enabled 0
707 06:46:33.040473 USB0 port 0: enabled 1
708 06:46:33.043460 I2C: 00:15: enabled 1
709 06:46:33.043574 I2C: 00:5d: enabled 1
710 06:46:33.046821 GENERIC: 0.0: enabled 1
711 06:46:33.050203 I2C: 00:1a: enabled 1
712 06:46:33.050324 I2C: 00:38: enabled 1
713 06:46:33.053815 I2C: 00:39: enabled 1
714 06:46:33.057293 I2C: 00:3a: enabled 1
715 06:46:33.057393 I2C: 00:3b: enabled 1
716 06:46:33.060045 PCI: 00:00.0: enabled 1
717 06:46:33.063808 SPI: 00: enabled 1
718 06:46:33.063923 SPI: 01: enabled 1
719 06:46:33.066761 PNP: 0c09.0: enabled 1
720 06:46:33.070234 USB2 port 0: enabled 1
721 06:46:33.070340 USB2 port 1: enabled 1
722 06:46:33.073169 USB2 port 2: enabled 0
723 06:46:33.077189 USB2 port 3: enabled 0
724 06:46:33.077272 USB2 port 5: enabled 0
725 06:46:33.079964 USB2 port 6: enabled 1
726 06:46:33.083793 USB2 port 9: enabled 1
727 06:46:33.086898 USB3 port 0: enabled 1
728 06:46:33.087012 USB3 port 1: enabled 1
729 06:46:33.089986 USB3 port 2: enabled 1
730 06:46:33.093503 USB3 port 3: enabled 1
731 06:46:33.093624 USB3 port 4: enabled 0
732 06:46:33.097372 APIC: 03: enabled 1
733 06:46:33.100624 APIC: 01: enabled 1
734 06:46:33.100714 APIC: 07: enabled 1
735 06:46:33.103588 APIC: 02: enabled 1
736 06:46:33.103699 APIC: 05: enabled 1
737 06:46:33.106646 APIC: 04: enabled 1
738 06:46:33.110325 APIC: 06: enabled 1
739 06:46:33.110439 Compare with tree...
740 06:46:33.113436 Root Device: enabled 1
741 06:46:33.116793 CPU_CLUSTER: 0: enabled 1
742 06:46:33.119936 APIC: 00: enabled 1
743 06:46:33.120023 APIC: 03: enabled 1
744 06:46:33.123272 APIC: 01: enabled 1
745 06:46:33.126286 APIC: 07: enabled 1
746 06:46:33.126381 APIC: 02: enabled 1
747 06:46:33.129983 APIC: 05: enabled 1
748 06:46:33.133089 APIC: 04: enabled 1
749 06:46:33.133194 APIC: 06: enabled 1
750 06:46:33.136026 DOMAIN: 0000: enabled 1
751 06:46:33.139486 PCI: 00:00.0: enabled 1
752 06:46:33.142905 PCI: 00:02.0: enabled 1
753 06:46:33.143021 PCI: 00:04.0: enabled 0
754 06:46:33.146524 PCI: 00:05.0: enabled 0
755 06:46:33.149544 PCI: 00:12.0: enabled 1
756 06:46:33.152929 PCI: 00:12.5: enabled 0
757 06:46:33.156364 PCI: 00:12.6: enabled 0
758 06:46:33.156457 PCI: 00:14.0: enabled 1
759 06:46:33.159470 USB0 port 0: enabled 1
760 06:46:33.163050 USB2 port 0: enabled 1
761 06:46:33.166158 USB2 port 1: enabled 1
762 06:46:33.169312 USB2 port 2: enabled 0
763 06:46:33.173068 USB2 port 3: enabled 0
764 06:46:33.173159 USB2 port 5: enabled 0
765 06:46:33.175901 USB2 port 6: enabled 1
766 06:46:33.179306 USB2 port 9: enabled 1
767 06:46:33.182831 USB3 port 0: enabled 1
768 06:46:33.186312 USB3 port 1: enabled 1
769 06:46:33.186390 USB3 port 2: enabled 1
770 06:46:33.189316 USB3 port 3: enabled 1
771 06:46:33.192448 USB3 port 4: enabled 0
772 06:46:33.195632 PCI: 00:14.1: enabled 0
773 06:46:33.199262 PCI: 00:14.3: enabled 1
774 06:46:33.202443 PCI: 00:14.5: enabled 0
775 06:46:33.202526 PCI: 00:15.0: enabled 1
776 06:46:33.205556 I2C: 00:15: enabled 1
777 06:46:33.208998 PCI: 00:15.1: enabled 1
778 06:46:33.212029 I2C: 00:5d: enabled 1
779 06:46:33.212112 GENERIC: 0.0: enabled 1
780 06:46:33.215478 PCI: 00:15.2: enabled 0
781 06:46:33.218639 PCI: 00:15.3: enabled 0
782 06:46:33.222233 PCI: 00:16.0: enabled 1
783 06:46:33.225706 PCI: 00:16.1: enabled 0
784 06:46:33.225789 PCI: 00:16.2: enabled 0
785 06:46:33.228790 PCI: 00:16.3: enabled 0
786 06:46:33.232263 PCI: 00:16.4: enabled 0
787 06:46:33.235587 PCI: 00:16.5: enabled 0
788 06:46:33.238584 PCI: 00:17.0: enabled 1
789 06:46:33.238674 PCI: 00:19.0: enabled 1
790 06:46:33.242357 I2C: 00:1a: enabled 1
791 06:46:33.245492 I2C: 00:38: enabled 1
792 06:46:33.248994 I2C: 00:39: enabled 1
793 06:46:33.249082 I2C: 00:3a: enabled 1
794 06:46:33.251935 I2C: 00:3b: enabled 1
795 06:46:33.255447 PCI: 00:19.1: enabled 0
796 06:46:33.258944 PCI: 00:19.2: enabled 0
797 06:46:33.261993 PCI: 00:1a.0: enabled 0
798 06:46:33.262103 PCI: 00:1c.0: enabled 0
799 06:46:33.265398 PCI: 00:1c.1: enabled 0
800 06:46:33.268902 PCI: 00:1c.2: enabled 0
801 06:46:33.272358 PCI: 00:1c.3: enabled 0
802 06:46:33.275218 PCI: 00:1c.4: enabled 0
803 06:46:33.275302 PCI: 00:1c.5: enabled 0
804 06:46:33.278587 PCI: 00:1c.6: enabled 0
805 06:46:33.281655 PCI: 00:1c.7: enabled 0
806 06:46:33.285374 PCI: 00:1d.0: enabled 1
807 06:46:33.288557 PCI: 00:1d.1: enabled 0
808 06:46:33.288676 PCI: 00:1d.2: enabled 0
809 06:46:33.292253 PCI: 00:1d.3: enabled 0
810 06:46:33.295380 PCI: 00:1d.4: enabled 0
811 06:46:33.298663 PCI: 00:1d.5: enabled 1
812 06:46:33.301691 PCI: 00:00.0: enabled 1
813 06:46:33.301817 PCI: 00:1e.0: enabled 1
814 06:46:33.304949 PCI: 00:1e.1: enabled 0
815 06:46:33.308034 PCI: 00:1e.2: enabled 1
816 06:46:33.311980 SPI: 00: enabled 1
817 06:46:33.312093 PCI: 00:1e.3: enabled 1
818 06:46:33.314886 SPI: 01: enabled 1
819 06:46:33.318114 PCI: 00:1f.0: enabled 1
820 06:46:33.321627 PNP: 0c09.0: enabled 1
821 06:46:33.321735 PCI: 00:1f.1: enabled 1
822 06:46:33.324637 PCI: 00:1f.2: enabled 1
823 06:46:33.328160 PCI: 00:1f.3: enabled 1
824 06:46:33.331918 PCI: 00:1f.4: enabled 1
825 06:46:33.334594 PCI: 00:1f.5: enabled 1
826 06:46:33.334704 PCI: 00:1f.6: enabled 0
827 06:46:33.338269 Root Device scanning...
828 06:46:33.341647 scan_static_bus for Root Device
829 06:46:33.344696 CPU_CLUSTER: 0 enabled
830 06:46:33.347795 DOMAIN: 0000 enabled
831 06:46:33.347905 DOMAIN: 0000 scanning...
832 06:46:33.351502 PCI: pci_scan_bus for bus 00
833 06:46:33.354393 PCI: 00:00.0 [8086/0000] ops
834 06:46:33.358085 PCI: 00:00.0 [8086/9b61] enabled
835 06:46:33.361355 PCI: 00:02.0 [8086/0000] bus ops
836 06:46:33.364561 PCI: 00:02.0 [8086/9b41] enabled
837 06:46:33.368164 PCI: 00:04.0 [8086/1903] disabled
838 06:46:33.371602 PCI: 00:08.0 [8086/1911] enabled
839 06:46:33.374410 PCI: 00:12.0 [8086/02f9] enabled
840 06:46:33.378024 PCI: 00:14.0 [8086/0000] bus ops
841 06:46:33.381436 PCI: 00:14.0 [8086/02ed] enabled
842 06:46:33.384509 PCI: 00:14.2 [8086/02ef] enabled
843 06:46:33.387733 PCI: 00:14.3 [8086/02f0] enabled
844 06:46:33.391166 PCI: 00:15.0 [8086/0000] bus ops
845 06:46:33.394744 PCI: 00:15.0 [8086/02e8] enabled
846 06:46:33.397900 PCI: 00:15.1 [8086/0000] bus ops
847 06:46:33.401631 PCI: 00:15.1 [8086/02e9] enabled
848 06:46:33.404731 PCI: 00:16.0 [8086/0000] ops
849 06:46:33.407827 PCI: 00:16.0 [8086/02e0] enabled
850 06:46:33.411097 PCI: 00:17.0 [8086/0000] ops
851 06:46:33.414250 PCI: 00:17.0 [8086/02d3] enabled
852 06:46:33.418051 PCI: 00:19.0 [8086/0000] bus ops
853 06:46:33.421212 PCI: 00:19.0 [8086/02c5] enabled
854 06:46:33.424741 PCI: 00:1d.0 [8086/0000] bus ops
855 06:46:33.427750 PCI: 00:1d.0 [8086/02b0] enabled
856 06:46:33.434262 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 06:46:33.437681 PCI: 00:1e.0 [8086/0000] ops
858 06:46:33.441251 PCI: 00:1e.0 [8086/02a8] enabled
859 06:46:33.444213 PCI: 00:1e.2 [8086/0000] bus ops
860 06:46:33.447443 PCI: 00:1e.2 [8086/02aa] enabled
861 06:46:33.450759 PCI: 00:1e.3 [8086/0000] bus ops
862 06:46:33.454701 PCI: 00:1e.3 [8086/02ab] enabled
863 06:46:33.458163 PCI: 00:1f.0 [8086/0000] bus ops
864 06:46:33.461143 PCI: 00:1f.0 [8086/0284] enabled
865 06:46:33.464602 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 06:46:33.471207 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 06:46:33.474244 PCI: 00:1f.3 [8086/0000] bus ops
868 06:46:33.477521 PCI: 00:1f.3 [8086/02c8] enabled
869 06:46:33.480919 PCI: 00:1f.4 [8086/0000] bus ops
870 06:46:33.484053 PCI: 00:1f.4 [8086/02a3] enabled
871 06:46:33.487811 PCI: 00:1f.5 [8086/0000] bus ops
872 06:46:33.490622 PCI: 00:1f.5 [8086/02a4] enabled
873 06:46:33.494573 PCI: Leftover static devices:
874 06:46:33.494655 PCI: 00:05.0
875 06:46:33.497690 PCI: 00:12.5
876 06:46:33.497773 PCI: 00:12.6
877 06:46:33.500760 PCI: 00:14.1
878 06:46:33.500844 PCI: 00:14.5
879 06:46:33.500910 PCI: 00:15.2
880 06:46:33.504304 PCI: 00:15.3
881 06:46:33.504387 PCI: 00:16.1
882 06:46:33.507254 PCI: 00:16.2
883 06:46:33.507338 PCI: 00:16.3
884 06:46:33.507403 PCI: 00:16.4
885 06:46:33.510887 PCI: 00:16.5
886 06:46:33.510995 PCI: 00:19.1
887 06:46:33.514063 PCI: 00:19.2
888 06:46:33.514196 PCI: 00:1a.0
889 06:46:33.514298 PCI: 00:1c.0
890 06:46:33.517283 PCI: 00:1c.1
891 06:46:33.517365 PCI: 00:1c.2
892 06:46:33.520979 PCI: 00:1c.3
893 06:46:33.521091 PCI: 00:1c.4
894 06:46:33.524019 PCI: 00:1c.5
895 06:46:33.524157 PCI: 00:1c.6
896 06:46:33.524259 PCI: 00:1c.7
897 06:46:33.527449 PCI: 00:1d.1
898 06:46:33.527565 PCI: 00:1d.2
899 06:46:33.530567 PCI: 00:1d.3
900 06:46:33.530709 PCI: 00:1d.4
901 06:46:33.530818 PCI: 00:1d.5
902 06:46:33.534382 PCI: 00:1e.1
903 06:46:33.534517 PCI: 00:1f.1
904 06:46:33.537489 PCI: 00:1f.2
905 06:46:33.537584 PCI: 00:1f.6
906 06:46:33.540693 PCI: Check your devicetree.cb.
907 06:46:33.543679 PCI: 00:02.0 scanning...
908 06:46:33.547793 scan_generic_bus for PCI: 00:02.0
909 06:46:33.550742 scan_generic_bus for PCI: 00:02.0 done
910 06:46:33.557262 scan_bus: scanning of bus PCI: 00:02.0 took 10186 usecs
911 06:46:33.560422 PCI: 00:14.0 scanning...
912 06:46:33.563775 scan_static_bus for PCI: 00:14.0
913 06:46:33.563908 USB0 port 0 enabled
914 06:46:33.567159 USB0 port 0 scanning...
915 06:46:33.570454 scan_static_bus for USB0 port 0
916 06:46:33.573548 USB2 port 0 enabled
917 06:46:33.573672 USB2 port 1 enabled
918 06:46:33.577280 USB2 port 2 disabled
919 06:46:33.580308 USB2 port 3 disabled
920 06:46:33.580447 USB2 port 5 disabled
921 06:46:33.583402 USB2 port 6 enabled
922 06:46:33.583516 USB2 port 9 enabled
923 06:46:33.586966 USB3 port 0 enabled
924 06:46:33.590112 USB3 port 1 enabled
925 06:46:33.590240 USB3 port 2 enabled
926 06:46:33.593451 USB3 port 3 enabled
927 06:46:33.597127 USB3 port 4 disabled
928 06:46:33.597265 USB2 port 0 scanning...
929 06:46:33.600282 scan_static_bus for USB2 port 0
930 06:46:33.603406 scan_static_bus for USB2 port 0 done
931 06:46:33.610252 scan_bus: scanning of bus USB2 port 0 took 9705 usecs
932 06:46:33.613483 USB2 port 1 scanning...
933 06:46:33.616658 scan_static_bus for USB2 port 1
934 06:46:33.620486 scan_static_bus for USB2 port 1 done
935 06:46:33.626688 scan_bus: scanning of bus USB2 port 1 took 9707 usecs
936 06:46:33.626806 USB2 port 6 scanning...
937 06:46:33.630192 scan_static_bus for USB2 port 6
938 06:46:33.633441 scan_static_bus for USB2 port 6 done
939 06:46:33.640481 scan_bus: scanning of bus USB2 port 6 took 9711 usecs
940 06:46:33.643411 USB2 port 9 scanning...
941 06:46:33.646427 scan_static_bus for USB2 port 9
942 06:46:33.650201 scan_static_bus for USB2 port 9 done
943 06:46:33.657122 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
944 06:46:33.657216 USB3 port 0 scanning...
945 06:46:33.660102 scan_static_bus for USB3 port 0
946 06:46:33.666641 scan_static_bus for USB3 port 0 done
947 06:46:33.669825 scan_bus: scanning of bus USB3 port 0 took 9699 usecs
948 06:46:33.673384 USB3 port 1 scanning...
949 06:46:33.676702 scan_static_bus for USB3 port 1
950 06:46:33.679797 scan_static_bus for USB3 port 1 done
951 06:46:33.686651 scan_bus: scanning of bus USB3 port 1 took 9711 usecs
952 06:46:33.686786 USB3 port 2 scanning...
953 06:46:33.689638 scan_static_bus for USB3 port 2
954 06:46:33.696954 scan_static_bus for USB3 port 2 done
955 06:46:33.699926 scan_bus: scanning of bus USB3 port 2 took 9698 usecs
956 06:46:33.702971 USB3 port 3 scanning...
957 06:46:33.706198 scan_static_bus for USB3 port 3
958 06:46:33.709431 scan_static_bus for USB3 port 3 done
959 06:46:33.716291 scan_bus: scanning of bus USB3 port 3 took 9699 usecs
960 06:46:33.719443 scan_static_bus for USB0 port 0 done
961 06:46:33.726232 scan_bus: scanning of bus USB0 port 0 took 155354 usecs
962 06:46:33.729632 scan_static_bus for PCI: 00:14.0 done
963 06:46:33.732787 scan_bus: scanning of bus PCI: 00:14.0 took 172954 usecs
964 06:46:33.736386 PCI: 00:15.0 scanning...
965 06:46:33.739507 scan_generic_bus for PCI: 00:15.0
966 06:46:33.742633 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 06:46:33.749491 scan_generic_bus for PCI: 00:15.0 done
968 06:46:33.752538 scan_bus: scanning of bus PCI: 00:15.0 took 14300 usecs
969 06:46:33.756417 PCI: 00:15.1 scanning...
970 06:46:33.759500 scan_generic_bus for PCI: 00:15.1
971 06:46:33.762705 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 06:46:33.769070 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 06:46:33.772658 scan_generic_bus for PCI: 00:15.1 done
974 06:46:33.779137 scan_bus: scanning of bus PCI: 00:15.1 took 18607 usecs
975 06:46:33.779254 PCI: 00:19.0 scanning...
976 06:46:33.782843 scan_generic_bus for PCI: 00:19.0
977 06:46:33.789306 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 06:46:33.792408 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 06:46:33.796145 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 06:46:33.799161 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 06:46:33.805674 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 06:46:33.809259 scan_generic_bus for PCI: 00:19.0 done
983 06:46:33.812262 scan_bus: scanning of bus PCI: 00:19.0 took 30730 usecs
984 06:46:33.815955 PCI: 00:1d.0 scanning...
985 06:46:33.819270 do_pci_scan_bridge for PCI: 00:1d.0
986 06:46:33.822585 PCI: pci_scan_bus for bus 01
987 06:46:33.825754 PCI: 01:00.0 [1c5c/1327] enabled
988 06:46:33.829323 Enabling Common Clock Configuration
989 06:46:33.836016 L1 Sub-State supported from root port 29
990 06:46:33.839083 L1 Sub-State Support = 0xf
991 06:46:33.839173 CommonModeRestoreTime = 0x28
992 06:46:33.845713 Power On Value = 0x16, Power On Scale = 0x0
993 06:46:33.845801 ASPM: Enabled L1
994 06:46:33.852131 scan_bus: scanning of bus PCI: 00:1d.0 took 32776 usecs
995 06:46:33.855414 PCI: 00:1e.2 scanning...
996 06:46:33.858639 scan_generic_bus for PCI: 00:1e.2
997 06:46:33.862252 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 06:46:33.865378 scan_generic_bus for PCI: 00:1e.2 done
999 06:46:33.872476 scan_bus: scanning of bus PCI: 00:1e.2 took 14013 usecs
1000 06:46:33.875635 PCI: 00:1e.3 scanning...
1001 06:46:33.878676 scan_generic_bus for PCI: 00:1e.3
1002 06:46:33.882316 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 06:46:33.885200 scan_generic_bus for PCI: 00:1e.3 done
1004 06:46:33.892142 scan_bus: scanning of bus PCI: 00:1e.3 took 14013 usecs
1005 06:46:33.892251 PCI: 00:1f.0 scanning...
1006 06:46:33.895817 scan_static_bus for PCI: 00:1f.0
1007 06:46:33.899025 PNP: 0c09.0 enabled
1008 06:46:33.901979 scan_static_bus for PCI: 00:1f.0 done
1009 06:46:33.908809 scan_bus: scanning of bus PCI: 00:1f.0 took 12048 usecs
1010 06:46:33.912058 PCI: 00:1f.3 scanning...
1011 06:46:33.915918 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1012 06:46:33.918824 PCI: 00:1f.4 scanning...
1013 06:46:33.921978 scan_generic_bus for PCI: 00:1f.4
1014 06:46:33.925640 scan_generic_bus for PCI: 00:1f.4 done
1015 06:46:33.932259 scan_bus: scanning of bus PCI: 00:1f.4 took 10193 usecs
1016 06:46:33.935642 PCI: 00:1f.5 scanning...
1017 06:46:33.938499 scan_generic_bus for PCI: 00:1f.5
1018 06:46:33.942101 scan_generic_bus for PCI: 00:1f.5 done
1019 06:46:33.949083 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1020 06:46:33.955100 scan_bus: scanning of bus DOMAIN: 0000 took 605011 usecs
1021 06:46:33.958243 scan_static_bus for Root Device done
1022 06:46:33.961699 scan_bus: scanning of bus Root Device took 624877 usecs
1023 06:46:33.965442 done
1024 06:46:33.968567 Chrome EC: UHEPI supported
1025 06:46:33.971996 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 06:46:33.978559 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 06:46:33.984981 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 06:46:33.991740 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 06:46:33.994948 SPI flash protection: WPSW=0 SRP0=0
1030 06:46:34.001698 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 06:46:34.005384 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1032 06:46:34.008544 found VGA at PCI: 00:02.0
1033 06:46:34.011670 Setting up VGA for PCI: 00:02.0
1034 06:46:34.018571 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 06:46:34.021466 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 06:46:34.025163 Allocating resources...
1037 06:46:34.025246 Reading resources...
1038 06:46:34.031538 Root Device read_resources bus 0 link: 0
1039 06:46:34.035128 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 06:46:34.041596 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 06:46:34.044551 DOMAIN: 0000 read_resources bus 0 link: 0
1042 06:46:34.051986 PCI: 00:14.0 read_resources bus 0 link: 0
1043 06:46:34.055258 USB0 port 0 read_resources bus 0 link: 0
1044 06:46:34.063426 USB0 port 0 read_resources bus 0 link: 0 done
1045 06:46:34.066578 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 06:46:34.073792 PCI: 00:15.0 read_resources bus 1 link: 0
1047 06:46:34.077232 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 06:46:34.083937 PCI: 00:15.1 read_resources bus 2 link: 0
1049 06:46:34.087206 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 06:46:34.094594 PCI: 00:19.0 read_resources bus 3 link: 0
1051 06:46:34.101798 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 06:46:34.104779 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 06:46:34.111007 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 06:46:34.114798 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 06:46:34.121372 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 06:46:34.124246 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 06:46:34.131589 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 06:46:34.134284 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 06:46:34.141077 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 06:46:34.147755 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 06:46:34.151125 Root Device read_resources bus 0 link: 0 done
1062 06:46:34.154527 Done reading resources.
1063 06:46:34.157834 Show resources in subtree (Root Device)...After reading.
1064 06:46:34.164696 Root Device child on link 0 CPU_CLUSTER: 0
1065 06:46:34.167570 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 06:46:34.167654 APIC: 00
1067 06:46:34.170827 APIC: 03
1068 06:46:34.170909 APIC: 01
1069 06:46:34.174274 APIC: 07
1070 06:46:34.174391 APIC: 02
1071 06:46:34.174486 APIC: 05
1072 06:46:34.177479 APIC: 04
1073 06:46:34.177564 APIC: 06
1074 06:46:34.181529 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 06:46:34.191028 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 06:46:34.243818 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 06:46:34.244153 PCI: 00:00.0
1078 06:46:34.244230 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 06:46:34.244864 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 06:46:34.245133 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 06:46:34.245399 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 06:46:34.267964 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 06:46:34.268264 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 06:46:34.271431 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 06:46:34.277993 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 06:46:34.287944 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 06:46:34.294935 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 06:46:34.304453 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 06:46:34.314439 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 06:46:34.324604 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 06:46:34.334418 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 06:46:34.344129 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 06:46:34.354311 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 06:46:34.354452 PCI: 00:02.0
1095 06:46:34.364140 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 06:46:34.373868 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 06:46:34.384046 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 06:46:34.384177 PCI: 00:04.0
1099 06:46:34.387267 PCI: 00:08.0
1100 06:46:34.397598 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 06:46:34.397684 PCI: 00:12.0
1102 06:46:34.407046 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 06:46:34.414117 PCI: 00:14.0 child on link 0 USB0 port 0
1104 06:46:34.423333 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 06:46:34.427033 USB0 port 0 child on link 0 USB2 port 0
1106 06:46:34.430176 USB2 port 0
1107 06:46:34.430314 USB2 port 1
1108 06:46:34.433249 USB2 port 2
1109 06:46:34.433367 USB2 port 3
1110 06:46:34.436626 USB2 port 5
1111 06:46:34.436706 USB2 port 6
1112 06:46:34.440226 USB2 port 9
1113 06:46:34.440330 USB3 port 0
1114 06:46:34.443263 USB3 port 1
1115 06:46:34.443343 USB3 port 2
1116 06:46:34.446653 USB3 port 3
1117 06:46:34.446734 USB3 port 4
1118 06:46:34.450306 PCI: 00:14.2
1119 06:46:34.459793 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 06:46:34.470213 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 06:46:34.470317 PCI: 00:14.3
1122 06:46:34.479835 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 06:46:34.486673 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 06:46:34.496724 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 06:46:34.496817 I2C: 01:15
1126 06:46:34.499927 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 06:46:34.509597 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 06:46:34.513550 I2C: 02:5d
1129 06:46:34.513633 GENERIC: 0.0
1130 06:46:34.516580 PCI: 00:16.0
1131 06:46:34.526142 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 06:46:34.526229 PCI: 00:17.0
1133 06:46:34.536126 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 06:46:34.546152 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 06:46:34.552705 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 06:46:34.562661 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 06:46:34.569344 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 06:46:34.579793 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 06:46:34.582568 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 06:46:34.592604 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 06:46:34.596145 I2C: 03:1a
1142 06:46:34.596231 I2C: 03:38
1143 06:46:34.599524 I2C: 03:39
1144 06:46:34.599606 I2C: 03:3a
1145 06:46:34.602451 I2C: 03:3b
1146 06:46:34.606001 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 06:46:34.616005 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 06:46:34.625697 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 06:46:34.632353 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 06:46:34.635638 PCI: 01:00.0
1151 06:46:34.645738 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 06:46:34.645825 PCI: 00:1e.0
1153 06:46:34.659218 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 06:46:34.669025 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 06:46:34.672144 PCI: 00:1e.2 child on link 0 SPI: 00
1156 06:46:34.682129 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 06:46:34.682219 SPI: 00
1158 06:46:34.688522 PCI: 00:1e.3 child on link 0 SPI: 01
1159 06:46:34.699001 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 06:46:34.699096 SPI: 01
1161 06:46:34.702112 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 06:46:34.711593 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 06:46:34.721747 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 06:46:34.721868 PNP: 0c09.0
1165 06:46:34.731470 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 06:46:34.731561 PCI: 00:1f.3
1167 06:46:34.741506 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 06:46:34.751610 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 06:46:34.754741 PCI: 00:1f.4
1170 06:46:34.764623 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 06:46:34.771315 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 06:46:34.774856 PCI: 00:1f.5
1173 06:46:34.784700 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 06:46:34.791460 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 06:46:34.797741 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 06:46:34.804693 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 06:46:34.807579 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 06:46:34.811192 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 06:46:34.814206 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 06:46:34.818170 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 06:46:34.824631 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 06:46:34.831027 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 06:46:34.837726 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 06:46:34.847198 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 06:46:34.854066 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 06:46:34.857248 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 06:46:34.867529 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 06:46:34.870497 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 06:46:34.874002 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 06:46:34.880747 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 06:46:34.884358 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 06:46:34.890577 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 06:46:34.894161 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 06:46:34.900334 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 06:46:34.903897 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 06:46:34.910387 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 06:46:34.914024 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 06:46:34.920595 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 06:46:34.923598 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 06:46:34.930241 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 06:46:34.933474 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 06:46:34.937197 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 06:46:34.943727 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 06:46:34.946973 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 06:46:34.954004 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 06:46:34.956759 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 06:46:34.963481 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 06:46:34.966680 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 06:46:34.973267 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 06:46:34.976584 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 06:46:34.986780 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 06:46:34.990231 avoid_fixed_resources: DOMAIN: 0000
1213 06:46:34.996435 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 06:46:34.999926 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 06:46:35.009722 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 06:46:35.016215 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 06:46:35.022959 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 06:46:35.032644 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 06:46:35.039726 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 06:46:35.046399 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 06:46:35.055842 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 06:46:35.063286 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 06:46:35.069936 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 06:46:35.076408 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 06:46:35.079513 Setting resources...
1226 06:46:35.086265 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 06:46:35.089153 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 06:46:35.092820 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 06:46:35.095613 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 06:46:35.102359 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 06:46:35.109119 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 06:46:35.112628 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 06:46:35.119210 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 06:46:35.128834 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 06:46:35.132483 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 06:46:35.139140 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 06:46:35.141991 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 06:46:35.148914 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 06:46:35.152136 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 06:46:35.158532 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 06:46:35.161809 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 06:46:35.168580 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 06:46:35.171829 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 06:46:35.178546 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 06:46:35.181773 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 06:46:35.185145 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 06:46:35.191939 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 06:46:35.195001 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 06:46:35.201847 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 06:46:35.205090 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 06:46:35.211763 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 06:46:35.214774 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 06:46:35.221548 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 06:46:35.224552 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 06:46:35.231323 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 06:46:35.234868 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 06:46:35.241273 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 06:46:35.247760 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 06:46:35.254568 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 06:46:35.260925 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 06:46:35.271015 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 06:46:35.274335 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 06:46:35.281359 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 06:46:35.287551 Root Device assign_resources, bus 0 link: 0
1265 06:46:35.290845 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 06:46:35.300773 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 06:46:35.307415 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 06:46:35.317373 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 06:46:35.324023 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 06:46:35.333394 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 06:46:35.340466 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 06:46:35.343742 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 06:46:35.350191 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 06:46:35.356565 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 06:46:35.366551 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 06:46:35.373474 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 06:46:35.383671 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 06:46:35.386943 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 06:46:35.393010 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 06:46:35.400084 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 06:46:35.403273 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 06:46:35.409819 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 06:46:35.416653 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 06:46:35.426923 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 06:46:35.433039 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 06:46:35.439484 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 06:46:35.449694 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 06:46:35.456024 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 06:46:35.462769 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 06:46:35.473179 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 06:46:35.476209 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 06:46:35.482999 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 06:46:35.489312 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 06:46:35.499646 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 06:46:35.509556 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 06:46:35.512760 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 06:46:35.519401 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 06:46:35.525903 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 06:46:35.532607 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 06:46:35.542534 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 06:46:35.545854 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 06:46:35.552300 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 06:46:35.559317 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 06:46:35.562331 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 06:46:35.569792 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 06:46:35.572478 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 06:46:35.579054 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 06:46:35.582620 LPC: Trying to open IO window from 800 size 1ff
1309 06:46:35.592510 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 06:46:35.599362 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 06:46:35.609138 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 06:46:35.615895 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 06:46:35.622169 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 06:46:35.625590 Root Device assign_resources, bus 0 link: 0
1315 06:46:35.628843 Done setting resources.
1316 06:46:35.636017 Show resources in subtree (Root Device)...After assigning values.
1317 06:46:35.638779 Root Device child on link 0 CPU_CLUSTER: 0
1318 06:46:35.642011 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 06:46:35.645738 APIC: 00
1320 06:46:35.645867 APIC: 03
1321 06:46:35.645963 APIC: 01
1322 06:46:35.648834 APIC: 07
1323 06:46:35.648958 APIC: 02
1324 06:46:35.652373 APIC: 05
1325 06:46:35.652496 APIC: 04
1326 06:46:35.652593 APIC: 06
1327 06:46:35.658853 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 06:46:35.668525 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 06:46:35.678383 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 06:46:35.678538 PCI: 00:00.0
1331 06:46:35.688337 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 06:46:35.698264 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 06:46:35.708202 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 06:46:35.718643 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 06:46:35.728212 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 06:46:35.735198 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 06:46:35.744832 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 06:46:35.754728 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 06:46:35.764330 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 06:46:35.774628 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 06:46:35.781086 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 06:46:35.791056 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 06:46:35.800991 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 06:46:35.810777 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 06:46:35.820738 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 06:46:35.830786 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 06:46:35.830895 PCI: 00:02.0
1348 06:46:35.844222 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 06:46:35.853988 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 06:46:35.863667 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 06:46:35.863799 PCI: 00:04.0
1352 06:46:35.867184 PCI: 00:08.0
1353 06:46:35.876555 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 06:46:35.876673 PCI: 00:12.0
1355 06:46:35.886657 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 06:46:35.893337 PCI: 00:14.0 child on link 0 USB0 port 0
1357 06:46:35.903221 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 06:46:35.906412 USB0 port 0 child on link 0 USB2 port 0
1359 06:46:35.909718 USB2 port 0
1360 06:46:35.909805 USB2 port 1
1361 06:46:35.913136 USB2 port 2
1362 06:46:35.913263 USB2 port 3
1363 06:46:35.916452 USB2 port 5
1364 06:46:35.916548 USB2 port 6
1365 06:46:35.920004 USB2 port 9
1366 06:46:35.920099 USB3 port 0
1367 06:46:35.922850 USB3 port 1
1368 06:46:35.922932 USB3 port 2
1369 06:46:35.926585 USB3 port 3
1370 06:46:35.926668 USB3 port 4
1371 06:46:35.929650 PCI: 00:14.2
1372 06:46:35.939534 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 06:46:35.949835 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 06:46:35.952999 PCI: 00:14.3
1375 06:46:35.963066 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 06:46:35.965960 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 06:46:35.976147 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 06:46:35.979737 I2C: 01:15
1379 06:46:35.982638 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 06:46:35.992765 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 06:46:35.995801 I2C: 02:5d
1382 06:46:35.995938 GENERIC: 0.0
1383 06:46:35.999360 PCI: 00:16.0
1384 06:46:36.009549 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 06:46:36.009638 PCI: 00:17.0
1386 06:46:36.019454 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 06:46:36.028738 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 06:46:36.038854 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 06:46:36.048705 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 06:46:36.058638 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 06:46:36.068846 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 06:46:36.071752 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 06:46:36.081786 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 06:46:36.084797 I2C: 03:1a
1395 06:46:36.084915 I2C: 03:38
1396 06:46:36.088265 I2C: 03:39
1397 06:46:36.088360 I2C: 03:3a
1398 06:46:36.088425 I2C: 03:3b
1399 06:46:36.095250 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 06:46:36.105301 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 06:46:36.114854 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 06:46:36.125059 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 06:46:36.125144 PCI: 01:00.0
1404 06:46:36.134487 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 06:46:36.137996 PCI: 00:1e.0
1406 06:46:36.147867 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 06:46:36.157876 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 06:46:36.164090 PCI: 00:1e.2 child on link 0 SPI: 00
1409 06:46:36.174082 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 06:46:36.174165 SPI: 00
1411 06:46:36.177331 PCI: 00:1e.3 child on link 0 SPI: 01
1412 06:46:36.187279 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 06:46:36.190623 SPI: 01
1414 06:46:36.194396 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 06:46:36.203799 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 06:46:36.213949 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 06:46:36.214031 PNP: 0c09.0
1418 06:46:36.223968 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 06:46:36.224079 PCI: 00:1f.3
1420 06:46:36.233605 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 06:46:36.243969 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 06:46:36.247119 PCI: 00:1f.4
1423 06:46:36.257180 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 06:46:36.267159 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 06:46:36.267243 PCI: 00:1f.5
1426 06:46:36.277145 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 06:46:36.280176 Done allocating resources.
1428 06:46:36.286846 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 06:46:36.290100 Enabling resources...
1430 06:46:36.293407 PCI: 00:00.0 subsystem <- 8086/9b61
1431 06:46:36.296702 PCI: 00:00.0 cmd <- 06
1432 06:46:36.299839 PCI: 00:02.0 subsystem <- 8086/9b41
1433 06:46:36.302921 PCI: 00:02.0 cmd <- 03
1434 06:46:36.303008 PCI: 00:08.0 cmd <- 06
1435 06:46:36.310294 PCI: 00:12.0 subsystem <- 8086/02f9
1436 06:46:36.310374 PCI: 00:12.0 cmd <- 02
1437 06:46:36.313596 PCI: 00:14.0 subsystem <- 8086/02ed
1438 06:46:36.316456 PCI: 00:14.0 cmd <- 02
1439 06:46:36.320199 PCI: 00:14.2 cmd <- 02
1440 06:46:36.323347 PCI: 00:14.3 subsystem <- 8086/02f0
1441 06:46:36.326677 PCI: 00:14.3 cmd <- 02
1442 06:46:36.330186 PCI: 00:15.0 subsystem <- 8086/02e8
1443 06:46:36.333192 PCI: 00:15.0 cmd <- 02
1444 06:46:36.337034 PCI: 00:15.1 subsystem <- 8086/02e9
1445 06:46:36.339944 PCI: 00:15.1 cmd <- 02
1446 06:46:36.343272 PCI: 00:16.0 subsystem <- 8086/02e0
1447 06:46:36.346616 PCI: 00:16.0 cmd <- 02
1448 06:46:36.350151 PCI: 00:17.0 subsystem <- 8086/02d3
1449 06:46:36.350232 PCI: 00:17.0 cmd <- 03
1450 06:46:36.356812 PCI: 00:19.0 subsystem <- 8086/02c5
1451 06:46:36.356893 PCI: 00:19.0 cmd <- 02
1452 06:46:36.359951 PCI: 00:1d.0 bridge ctrl <- 0013
1453 06:46:36.362985 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 06:46:36.366658 PCI: 00:1d.0 cmd <- 06
1455 06:46:36.369724 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 06:46:36.373069 PCI: 00:1e.0 cmd <- 06
1457 06:46:36.376575 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 06:46:36.380035 PCI: 00:1e.2 cmd <- 06
1459 06:46:36.383464 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 06:46:36.386718 PCI: 00:1e.3 cmd <- 02
1461 06:46:36.389884 PCI: 00:1f.0 subsystem <- 8086/0284
1462 06:46:36.393357 PCI: 00:1f.0 cmd <- 407
1463 06:46:36.396510 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 06:46:36.399542 PCI: 00:1f.3 cmd <- 02
1465 06:46:36.403370 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 06:46:36.403451 PCI: 00:1f.4 cmd <- 03
1467 06:46:36.410171 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 06:46:36.410252 PCI: 00:1f.5 cmd <- 406
1469 06:46:36.420366 PCI: 01:00.0 cmd <- 02
1470 06:46:36.425194 done.
1471 06:46:36.438928 ME: Version: 14.0.39.1367
1472 06:46:36.445353 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1473 06:46:36.448577 Initializing devices...
1474 06:46:36.448660 Root Device init ...
1475 06:46:36.455265 Chrome EC: Set SMI mask to 0x0000000000000000
1476 06:46:36.458109 Chrome EC: clear events_b mask to 0x0000000000000000
1477 06:46:36.465307 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 06:46:36.471470 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 06:46:36.478565 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 06:46:36.481502 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 06:46:36.484692 Root Device init finished in 35161 usecs
1482 06:46:36.488225 CPU_CLUSTER: 0 init ...
1483 06:46:36.495053 CPU_CLUSTER: 0 init finished in 2448 usecs
1484 06:46:36.498897 PCI: 00:00.0 init ...
1485 06:46:36.502499 CPU TDP: 15 Watts
1486 06:46:36.505881 CPU PL2 = 64 Watts
1487 06:46:36.509669 PCI: 00:00.0 init finished in 7081 usecs
1488 06:46:36.512592 PCI: 00:02.0 init ...
1489 06:46:36.516163 PCI: 00:02.0 init finished in 2255 usecs
1490 06:46:36.519357 PCI: 00:08.0 init ...
1491 06:46:36.522419 PCI: 00:08.0 init finished in 2253 usecs
1492 06:46:36.525565 PCI: 00:12.0 init ...
1493 06:46:36.529278 PCI: 00:12.0 init finished in 2254 usecs
1494 06:46:36.532710 PCI: 00:14.0 init ...
1495 06:46:36.535713 PCI: 00:14.0 init finished in 2253 usecs
1496 06:46:36.539493 PCI: 00:14.2 init ...
1497 06:46:36.542743 PCI: 00:14.2 init finished in 2253 usecs
1498 06:46:36.546051 PCI: 00:14.3 init ...
1499 06:46:36.549096 PCI: 00:14.3 init finished in 2272 usecs
1500 06:46:36.552617 PCI: 00:15.0 init ...
1501 06:46:36.555737 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 06:46:36.558797 PCI: 00:15.0 init finished in 5980 usecs
1503 06:46:36.562575 PCI: 00:15.1 init ...
1504 06:46:36.565633 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 06:46:36.568734 PCI: 00:15.1 init finished in 5978 usecs
1506 06:46:36.572279 PCI: 00:16.0 init ...
1507 06:46:36.576058 PCI: 00:16.0 init finished in 2251 usecs
1508 06:46:36.579862 PCI: 00:19.0 init ...
1509 06:46:36.583056 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 06:46:36.589881 PCI: 00:19.0 init finished in 5979 usecs
1511 06:46:36.589964 PCI: 00:1d.0 init ...
1512 06:46:36.593034 Initializing PCH PCIe bridge.
1513 06:46:36.596280 PCI: 00:1d.0 init finished in 5285 usecs
1514 06:46:36.601051 PCI: 00:1f.0 init ...
1515 06:46:36.604753 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 06:46:36.611681 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 06:46:36.611764 IOAPIC: ID = 0x02
1518 06:46:36.614162 IOAPIC: Dumping registers
1519 06:46:36.617509 reg 0x0000: 0x02000000
1520 06:46:36.620860 reg 0x0001: 0x00770020
1521 06:46:36.620942 reg 0x0002: 0x00000000
1522 06:46:36.627939 PCI: 00:1f.0 init finished in 23547 usecs
1523 06:46:36.631049 PCI: 00:1f.4 init ...
1524 06:46:36.634901 PCI: 00:1f.4 init finished in 2263 usecs
1525 06:46:36.645635 PCI: 01:00.0 init ...
1526 06:46:36.648567 PCI: 01:00.0 init finished in 2244 usecs
1527 06:46:36.652840 PNP: 0c09.0 init ...
1528 06:46:36.656132 Google Chrome EC uptime: 11.091 seconds
1529 06:46:36.662782 Google Chrome AP resets since EC boot: 0
1530 06:46:36.666116 Google Chrome most recent AP reset causes:
1531 06:46:36.672691 Google Chrome EC reset flags at last EC boot: reset-pin
1532 06:46:36.675969 PNP: 0c09.0 init finished in 20572 usecs
1533 06:46:36.679206 Devices initialized
1534 06:46:36.679289 Show all devs... After init.
1535 06:46:36.683002 Root Device: enabled 1
1536 06:46:36.686186 CPU_CLUSTER: 0: enabled 1
1537 06:46:36.689289 DOMAIN: 0000: enabled 1
1538 06:46:36.689376 APIC: 00: enabled 1
1539 06:46:36.692524 PCI: 00:00.0: enabled 1
1540 06:46:36.696164 PCI: 00:02.0: enabled 1
1541 06:46:36.699307 PCI: 00:04.0: enabled 0
1542 06:46:36.699389 PCI: 00:05.0: enabled 0
1543 06:46:36.702498 PCI: 00:12.0: enabled 1
1544 06:46:36.705837 PCI: 00:12.5: enabled 0
1545 06:46:36.705919 PCI: 00:12.6: enabled 0
1546 06:46:36.709476 PCI: 00:14.0: enabled 1
1547 06:46:36.712437 PCI: 00:14.1: enabled 0
1548 06:46:36.715978 PCI: 00:14.3: enabled 1
1549 06:46:36.716060 PCI: 00:14.5: enabled 0
1550 06:46:36.719364 PCI: 00:15.0: enabled 1
1551 06:46:36.722738 PCI: 00:15.1: enabled 1
1552 06:46:36.725712 PCI: 00:15.2: enabled 0
1553 06:46:36.725792 PCI: 00:15.3: enabled 0
1554 06:46:36.729250 PCI: 00:16.0: enabled 1
1555 06:46:36.732787 PCI: 00:16.1: enabled 0
1556 06:46:36.735904 PCI: 00:16.2: enabled 0
1557 06:46:36.735999 PCI: 00:16.3: enabled 0
1558 06:46:36.738962 PCI: 00:16.4: enabled 0
1559 06:46:36.742581 PCI: 00:16.5: enabled 0
1560 06:46:36.742708 PCI: 00:17.0: enabled 1
1561 06:46:36.745816 PCI: 00:19.0: enabled 1
1562 06:46:36.748964 PCI: 00:19.1: enabled 0
1563 06:46:36.752568 PCI: 00:19.2: enabled 0
1564 06:46:36.752650 PCI: 00:1a.0: enabled 0
1565 06:46:36.755592 PCI: 00:1c.0: enabled 0
1566 06:46:36.759040 PCI: 00:1c.1: enabled 0
1567 06:46:36.762028 PCI: 00:1c.2: enabled 0
1568 06:46:36.762109 PCI: 00:1c.3: enabled 0
1569 06:46:36.765528 PCI: 00:1c.4: enabled 0
1570 06:46:36.768881 PCI: 00:1c.5: enabled 0
1571 06:46:36.771816 PCI: 00:1c.6: enabled 0
1572 06:46:36.771924 PCI: 00:1c.7: enabled 0
1573 06:46:36.775667 PCI: 00:1d.0: enabled 1
1574 06:46:36.778850 PCI: 00:1d.1: enabled 0
1575 06:46:36.781727 PCI: 00:1d.2: enabled 0
1576 06:46:36.781894 PCI: 00:1d.3: enabled 0
1577 06:46:36.785324 PCI: 00:1d.4: enabled 0
1578 06:46:36.788611 PCI: 00:1d.5: enabled 0
1579 06:46:36.788784 PCI: 00:1e.0: enabled 1
1580 06:46:36.792201 PCI: 00:1e.1: enabled 0
1581 06:46:36.795222 PCI: 00:1e.2: enabled 1
1582 06:46:36.798326 PCI: 00:1e.3: enabled 1
1583 06:46:36.798447 PCI: 00:1f.0: enabled 1
1584 06:46:36.802157 PCI: 00:1f.1: enabled 0
1585 06:46:36.805376 PCI: 00:1f.2: enabled 0
1586 06:46:36.808273 PCI: 00:1f.3: enabled 1
1587 06:46:36.808412 PCI: 00:1f.4: enabled 1
1588 06:46:36.812043 PCI: 00:1f.5: enabled 1
1589 06:46:36.815241 PCI: 00:1f.6: enabled 0
1590 06:46:36.818468 USB0 port 0: enabled 1
1591 06:46:36.818667 I2C: 01:15: enabled 1
1592 06:46:36.821705 I2C: 02:5d: enabled 1
1593 06:46:36.825216 GENERIC: 0.0: enabled 1
1594 06:46:36.825348 I2C: 03:1a: enabled 1
1595 06:46:36.828122 I2C: 03:38: enabled 1
1596 06:46:36.831685 I2C: 03:39: enabled 1
1597 06:46:36.831770 I2C: 03:3a: enabled 1
1598 06:46:36.834957 I2C: 03:3b: enabled 1
1599 06:46:36.838082 PCI: 00:00.0: enabled 1
1600 06:46:36.838163 SPI: 00: enabled 1
1601 06:46:36.841716 SPI: 01: enabled 1
1602 06:46:36.844772 PNP: 0c09.0: enabled 1
1603 06:46:36.844854 USB2 port 0: enabled 1
1604 06:46:36.848225 USB2 port 1: enabled 1
1605 06:46:36.851663 USB2 port 2: enabled 0
1606 06:46:36.851789 USB2 port 3: enabled 0
1607 06:46:36.854958 USB2 port 5: enabled 0
1608 06:46:36.858308 USB2 port 6: enabled 1
1609 06:46:36.861833 USB2 port 9: enabled 1
1610 06:46:36.861957 USB3 port 0: enabled 1
1611 06:46:36.864817 USB3 port 1: enabled 1
1612 06:46:36.867686 USB3 port 2: enabled 1
1613 06:46:36.867811 USB3 port 3: enabled 1
1614 06:46:36.870975 USB3 port 4: enabled 0
1615 06:46:36.874280 APIC: 03: enabled 1
1616 06:46:36.874400 APIC: 01: enabled 1
1617 06:46:36.877712 APIC: 07: enabled 1
1618 06:46:36.881192 APIC: 02: enabled 1
1619 06:46:36.881315 APIC: 05: enabled 1
1620 06:46:36.884500 APIC: 04: enabled 1
1621 06:46:36.884624 APIC: 06: enabled 1
1622 06:46:36.887408 PCI: 00:08.0: enabled 1
1623 06:46:36.891111 PCI: 00:14.2: enabled 1
1624 06:46:36.894546 PCI: 01:00.0: enabled 1
1625 06:46:36.898002 Disabling ACPI via APMC:
1626 06:46:36.898125 done.
1627 06:46:36.904861 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 06:46:36.907877 ELOG: NV offset 0xaf0000 size 0x4000
1629 06:46:36.915001 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 06:46:36.920999 ELOG: Event(17) added with size 13 at 2024-01-03 06:43:58 UTC
1631 06:46:36.928230 ELOG: Event(92) added with size 9 at 2024-01-03 06:43:58 UTC
1632 06:46:36.934627 ELOG: Event(93) added with size 9 at 2024-01-03 06:43:58 UTC
1633 06:46:36.940870 ELOG: Event(9A) added with size 9 at 2024-01-03 06:43:58 UTC
1634 06:46:36.948063 ELOG: Event(9E) added with size 10 at 2024-01-03 06:43:58 UTC
1635 06:46:36.954446 ELOG: Event(9F) added with size 14 at 2024-01-03 06:43:58 UTC
1636 06:46:36.957490 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1637 06:46:36.965208 ELOG: Event(A1) added with size 10 at 2024-01-03 06:43:58 UTC
1638 06:46:36.974943 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1639 06:46:36.981460 ELOG: Event(A0) added with size 9 at 2024-01-03 06:43:58 UTC
1640 06:46:36.984761 elog_add_boot_reason: Logged dev mode boot
1641 06:46:36.984845 Finalize devices...
1642 06:46:36.987961 PCI: 00:17.0 final
1643 06:46:36.991334 Devices finalized
1644 06:46:36.994809 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1645 06:46:37.001198 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1646 06:46:37.004931 ME: HFSTS1 : 0x90000245
1647 06:46:37.008205 ME: HFSTS2 : 0x3B850126
1648 06:46:37.014696 ME: HFSTS3 : 0x00000020
1649 06:46:37.017870 ME: HFSTS4 : 0x00004800
1650 06:46:37.021175 ME: HFSTS5 : 0x00000000
1651 06:46:37.024766 ME: HFSTS6 : 0x40400006
1652 06:46:37.028152 ME: Manufacturing Mode : NO
1653 06:46:37.031390 ME: FW Partition Table : OK
1654 06:46:37.034316 ME: Bringup Loader Failure : NO
1655 06:46:37.038212 ME: Firmware Init Complete : YES
1656 06:46:37.041358 ME: Boot Options Present : NO
1657 06:46:37.044581 ME: Update In Progress : NO
1658 06:46:37.047574 ME: D0i3 Support : YES
1659 06:46:37.050955 ME: Low Power State Enabled : NO
1660 06:46:37.054465 ME: CPU Replaced : NO
1661 06:46:37.057650 ME: CPU Replacement Valid : YES
1662 06:46:37.061406 ME: Current Working State : 5
1663 06:46:37.064501 ME: Current Operation State : 1
1664 06:46:37.067536 ME: Current Operation Mode : 0
1665 06:46:37.071179 ME: Error Code : 0
1666 06:46:37.074304 ME: CPU Debug Disabled : YES
1667 06:46:37.077415 ME: TXT Support : NO
1668 06:46:37.084274 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1669 06:46:37.090881 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1670 06:46:37.090993 CBFS @ c08000 size 3f8000
1671 06:46:37.097296 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1672 06:46:37.100752 CBFS: Locating 'fallback/dsdt.aml'
1673 06:46:37.104604 CBFS: Found @ offset 10bb80 size 3fa5
1674 06:46:37.110402 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1675 06:46:37.113699 CBFS @ c08000 size 3f8000
1676 06:46:37.117034 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1677 06:46:37.120390 CBFS: Locating 'fallback/slic'
1678 06:46:37.126062 CBFS: 'fallback/slic' not found.
1679 06:46:37.132025 ACPI: Writing ACPI tables at 99b3e000.
1680 06:46:37.132151 ACPI: * FACS
1681 06:46:37.135275 ACPI: * DSDT
1682 06:46:37.138552 Ramoops buffer: 0x100000@0x99a3d000.
1683 06:46:37.142068 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1684 06:46:37.148630 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1685 06:46:37.152206 Google Chrome EC: version:
1686 06:46:37.155523 ro: helios_v2.0.2659-56403530b
1687 06:46:37.158447 rw: helios_v2.0.2849-c41de27e7d
1688 06:46:37.158569 running image: 1
1689 06:46:37.162873 ACPI: * FADT
1690 06:46:37.162996 SCI is IRQ9
1691 06:46:37.169511 ACPI: added table 1/32, length now 40
1692 06:46:37.169614 ACPI: * SSDT
1693 06:46:37.173146 Found 1 CPU(s) with 8 core(s) each.
1694 06:46:37.176065 Error: Could not locate 'wifi_sar' in VPD.
1695 06:46:37.182690 Checking CBFS for default SAR values
1696 06:46:37.186340 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1697 06:46:37.189543 CBFS @ c08000 size 3f8000
1698 06:46:37.196243 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1699 06:46:37.199187 CBFS: Locating 'wifi_sar_defaults.hex'
1700 06:46:37.202846 CBFS: Found @ offset 5fac0 size 77
1701 06:46:37.205994 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1702 06:46:37.212224 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1703 06:46:37.215640 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1704 06:46:37.222448 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1705 06:46:37.225785 failed to find key in VPD: dsm_calib_r0_0
1706 06:46:37.235345 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1707 06:46:37.239152 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1708 06:46:37.242361 failed to find key in VPD: dsm_calib_r0_1
1709 06:46:37.252476 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1710 06:46:37.258580 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1711 06:46:37.262384 failed to find key in VPD: dsm_calib_r0_2
1712 06:46:37.271848 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1713 06:46:37.275254 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1714 06:46:37.282293 failed to find key in VPD: dsm_calib_r0_3
1715 06:46:37.288439 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1716 06:46:37.295251 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1717 06:46:37.298253 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1718 06:46:37.301618 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1719 06:46:37.305766 EC returned error result code 1
1720 06:46:37.309368 EC returned error result code 1
1721 06:46:37.313000 EC returned error result code 1
1722 06:46:37.320009 PS2K: Bad resp from EC. Vivaldi disabled!
1723 06:46:37.323239 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1724 06:46:37.330028 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1725 06:46:37.336598 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1726 06:46:37.340009 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1727 06:46:37.346478 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1728 06:46:37.353171 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1729 06:46:37.359471 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1730 06:46:37.363390 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1731 06:46:37.366303 ACPI: added table 2/32, length now 44
1732 06:46:37.369624 ACPI: * MCFG
1733 06:46:37.372925 ACPI: added table 3/32, length now 48
1734 06:46:37.375931 ACPI: * TPM2
1735 06:46:37.379680 TPM2 log created at 99a2d000
1736 06:46:37.382705 ACPI: added table 4/32, length now 52
1737 06:46:37.382790 ACPI: * MADT
1738 06:46:37.386290 SCI is IRQ9
1739 06:46:37.389340 ACPI: added table 5/32, length now 56
1740 06:46:37.389424 current = 99b43ac0
1741 06:46:37.392631 ACPI: * DMAR
1742 06:46:37.395880 ACPI: added table 6/32, length now 60
1743 06:46:37.399651 ACPI: * IGD OpRegion
1744 06:46:37.399735 GMA: Found VBT in CBFS
1745 06:46:37.402553 GMA: Found valid VBT in CBFS
1746 06:46:37.406130 ACPI: added table 7/32, length now 64
1747 06:46:37.409517 ACPI: * HPET
1748 06:46:37.412393 ACPI: added table 8/32, length now 68
1749 06:46:37.412478 ACPI: done.
1750 06:46:37.416109 ACPI tables: 31744 bytes.
1751 06:46:37.419618 smbios_write_tables: 99a2c000
1752 06:46:37.423346 EC returned error result code 3
1753 06:46:37.426154 Couldn't obtain OEM name from CBI
1754 06:46:37.429606 Create SMBIOS type 17
1755 06:46:37.433008 PCI: 00:00.0 (Intel Cannonlake)
1756 06:46:37.435747 PCI: 00:14.3 (Intel WiFi)
1757 06:46:37.439747 SMBIOS tables: 939 bytes.
1758 06:46:37.442482 Writing table forward entry at 0x00000500
1759 06:46:37.449342 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1760 06:46:37.452178 Writing coreboot table at 0x99b62000
1761 06:46:37.459250 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1762 06:46:37.462201 1. 0000000000001000-000000000009ffff: RAM
1763 06:46:37.465806 2. 00000000000a0000-00000000000fffff: RESERVED
1764 06:46:37.472093 3. 0000000000100000-0000000099a2bfff: RAM
1765 06:46:37.479223 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1766 06:46:37.482334 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1767 06:46:37.489116 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1768 06:46:37.492311 7. 000000009a000000-000000009f7fffff: RESERVED
1769 06:46:37.498652 8. 00000000e0000000-00000000efffffff: RESERVED
1770 06:46:37.502039 9. 00000000fc000000-00000000fc000fff: RESERVED
1771 06:46:37.508647 10. 00000000fe000000-00000000fe00ffff: RESERVED
1772 06:46:37.511812 11. 00000000fed10000-00000000fed17fff: RESERVED
1773 06:46:37.514833 12. 00000000fed80000-00000000fed83fff: RESERVED
1774 06:46:37.521556 13. 00000000fed90000-00000000fed91fff: RESERVED
1775 06:46:37.525008 14. 00000000feda0000-00000000feda1fff: RESERVED
1776 06:46:37.531906 15. 0000000100000000-000000045e7fffff: RAM
1777 06:46:37.534774 Graphics framebuffer located at 0xc0000000
1778 06:46:37.538066 Passing 5 GPIOs to payload:
1779 06:46:37.541413 NAME | PORT | POLARITY | VALUE
1780 06:46:37.548719 write protect | undefined | high | low
1781 06:46:37.554757 lid | undefined | high | high
1782 06:46:37.557913 power | undefined | high | low
1783 06:46:37.564499 oprom | undefined | high | low
1784 06:46:37.567959 EC in RW | 0x000000cb | high | low
1785 06:46:37.571169 Board ID: 4
1786 06:46:37.574544 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 06:46:37.578076 CBFS @ c08000 size 3f8000
1788 06:46:37.584554 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 06:46:37.591434 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1790 06:46:37.594405 coreboot table: 1492 bytes.
1791 06:46:37.597495 IMD ROOT 0. 99fff000 00001000
1792 06:46:37.601328 IMD SMALL 1. 99ffe000 00001000
1793 06:46:37.604629 FSP MEMORY 2. 99c4e000 003b0000
1794 06:46:37.607546 CONSOLE 3. 99c2e000 00020000
1795 06:46:37.611016 FMAP 4. 99c2d000 0000054e
1796 06:46:37.614494 TIME STAMP 5. 99c2c000 00000910
1797 06:46:37.617707 VBOOT WORK 6. 99c18000 00014000
1798 06:46:37.621054 MRC DATA 7. 99c16000 00001958
1799 06:46:37.624056 ROMSTG STCK 8. 99c15000 00001000
1800 06:46:37.627838 AFTER CAR 9. 99c0b000 0000a000
1801 06:46:37.630898 RAMSTAGE 10. 99baf000 0005c000
1802 06:46:37.634323 REFCODE 11. 99b7a000 00035000
1803 06:46:37.637568 SMM BACKUP 12. 99b6a000 00010000
1804 06:46:37.640630 COREBOOT 13. 99b62000 00008000
1805 06:46:37.644172 ACPI 14. 99b3e000 00024000
1806 06:46:37.647567 ACPI GNVS 15. 99b3d000 00001000
1807 06:46:37.651306 RAMOOPS 16. 99a3d000 00100000
1808 06:46:37.654441 TPM2 TCGLOG17. 99a2d000 00010000
1809 06:46:37.657792 SMBIOS 18. 99a2c000 00000800
1810 06:46:37.657875 IMD small region:
1811 06:46:37.660682 IMD ROOT 0. 99ffec00 00000400
1812 06:46:37.664045 FSP RUNTIME 1. 99ffebe0 00000004
1813 06:46:37.667868 EC HOSTEVENT 2. 99ffebc0 00000008
1814 06:46:37.670711 POWER STATE 3. 99ffeb80 00000040
1815 06:46:37.673890 ROMSTAGE 4. 99ffeb60 00000004
1816 06:46:37.677401 MEM INFO 5. 99ffe9a0 000001b9
1817 06:46:37.684083 VPD 6. 99ffe920 0000006c
1818 06:46:37.684208 MTRR: Physical address space:
1819 06:46:37.690896 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1820 06:46:37.697295 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1821 06:46:37.704091 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1822 06:46:37.710961 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1823 06:46:37.717234 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1824 06:46:37.723682 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1825 06:46:37.730810 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1826 06:46:37.733900 MTRR: Fixed MSR 0x250 0x0606060606060606
1827 06:46:37.736898 MTRR: Fixed MSR 0x258 0x0606060606060606
1828 06:46:37.740557 MTRR: Fixed MSR 0x259 0x0000000000000000
1829 06:46:37.746821 MTRR: Fixed MSR 0x268 0x0606060606060606
1830 06:46:37.750437 MTRR: Fixed MSR 0x269 0x0606060606060606
1831 06:46:37.753483 MTRR: Fixed MSR 0x26a 0x0606060606060606
1832 06:46:37.757274 MTRR: Fixed MSR 0x26b 0x0606060606060606
1833 06:46:37.763707 MTRR: Fixed MSR 0x26c 0x0606060606060606
1834 06:46:37.766978 MTRR: Fixed MSR 0x26d 0x0606060606060606
1835 06:46:37.769970 MTRR: Fixed MSR 0x26e 0x0606060606060606
1836 06:46:37.773711 MTRR: Fixed MSR 0x26f 0x0606060606060606
1837 06:46:37.776773 call enable_fixed_mtrr()
1838 06:46:37.780430 CPU physical address size: 39 bits
1839 06:46:37.786733 MTRR: default type WB/UC MTRR counts: 6/8.
1840 06:46:37.790331 MTRR: WB selected as default type.
1841 06:46:37.796577 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1842 06:46:37.799791 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1843 06:46:37.806876 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1844 06:46:37.813045 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1845 06:46:37.820053 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1846 06:46:37.826381 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1847 06:46:37.829967 MTRR: Fixed MSR 0x250 0x0606060606060606
1848 06:46:37.836114 MTRR: Fixed MSR 0x258 0x0606060606060606
1849 06:46:37.839538 MTRR: Fixed MSR 0x259 0x0000000000000000
1850 06:46:37.843115 MTRR: Fixed MSR 0x268 0x0606060606060606
1851 06:46:37.846527 MTRR: Fixed MSR 0x269 0x0606060606060606
1852 06:46:37.853122 MTRR: Fixed MSR 0x26a 0x0606060606060606
1853 06:46:37.856189 MTRR: Fixed MSR 0x26b 0x0606060606060606
1854 06:46:37.859218 MTRR: Fixed MSR 0x26c 0x0606060606060606
1855 06:46:37.862630 MTRR: Fixed MSR 0x26d 0x0606060606060606
1856 06:46:37.869413 MTRR: Fixed MSR 0x26e 0x0606060606060606
1857 06:46:37.873012 MTRR: Fixed MSR 0x26f 0x0606060606060606
1858 06:46:37.873095
1859 06:46:37.873161 MTRR check
1860 06:46:37.876149 Fixed MTRRs : Enabled
1861 06:46:37.879070 Variable MTRRs: Enabled
1862 06:46:37.879153
1863 06:46:37.882730 call enable_fixed_mtrr()
1864 06:46:37.886301 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3
1865 06:46:37.888967 CPU physical address size: 39 bits
1866 06:46:37.896474 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1867 06:46:37.899856 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 06:46:37.903026 MTRR: Fixed MSR 0x250 0x0606060606060606
1869 06:46:37.909536 MTRR: Fixed MSR 0x258 0x0606060606060606
1870 06:46:37.912602 MTRR: Fixed MSR 0x259 0x0000000000000000
1871 06:46:37.916141 MTRR: Fixed MSR 0x268 0x0606060606060606
1872 06:46:37.919297 MTRR: Fixed MSR 0x269 0x0606060606060606
1873 06:46:37.926397 MTRR: Fixed MSR 0x26a 0x0606060606060606
1874 06:46:37.929390 MTRR: Fixed MSR 0x26b 0x0606060606060606
1875 06:46:37.932700 MTRR: Fixed MSR 0x26c 0x0606060606060606
1876 06:46:37.936193 MTRR: Fixed MSR 0x26d 0x0606060606060606
1877 06:46:37.939082 MTRR: Fixed MSR 0x26e 0x0606060606060606
1878 06:46:37.945958 MTRR: Fixed MSR 0x26f 0x0606060606060606
1879 06:46:37.949089 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 06:46:37.952763 call enable_fixed_mtrr()
1881 06:46:37.955866 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 06:46:37.959547 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 06:46:37.965677 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 06:46:37.969419 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 06:46:37.972228 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 06:46:37.975977 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 06:46:37.979034 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 06:46:37.985781 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 06:46:37.988902 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 06:46:37.992389 CPU physical address size: 39 bits
1891 06:46:37.995341 call enable_fixed_mtrr()
1892 06:46:37.998930 CBFS @ c08000 size 3f8000
1893 06:46:38.002215 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1894 06:46:38.008803 CBFS: Locating 'fallback/payload'
1895 06:46:38.012386 MTRR: Fixed MSR 0x250 0x0606060606060606
1896 06:46:38.015644 MTRR: Fixed MSR 0x258 0x0606060606060606
1897 06:46:38.018497 MTRR: Fixed MSR 0x259 0x0000000000000000
1898 06:46:38.021962 MTRR: Fixed MSR 0x268 0x0606060606060606
1899 06:46:38.028407 MTRR: Fixed MSR 0x269 0x0606060606060606
1900 06:46:38.032221 MTRR: Fixed MSR 0x26a 0x0606060606060606
1901 06:46:38.035446 MTRR: Fixed MSR 0x26b 0x0606060606060606
1902 06:46:38.038706 MTRR: Fixed MSR 0x26c 0x0606060606060606
1903 06:46:38.044956 MTRR: Fixed MSR 0x26d 0x0606060606060606
1904 06:46:38.048780 MTRR: Fixed MSR 0x26e 0x0606060606060606
1905 06:46:38.051752 MTRR: Fixed MSR 0x26f 0x0606060606060606
1906 06:46:38.055362 MTRR: Fixed MSR 0x250 0x0606060606060606
1907 06:46:38.058223 call enable_fixed_mtrr()
1908 06:46:38.062039 MTRR: Fixed MSR 0x258 0x0606060606060606
1909 06:46:38.068105 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 06:46:38.071619 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 06:46:38.075478 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 06:46:38.078106 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 06:46:38.085034 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 06:46:38.088283 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 06:46:38.092104 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 06:46:38.095235 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 06:46:38.101302 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 06:46:38.104953 CPU physical address size: 39 bits
1919 06:46:38.108239 call enable_fixed_mtrr()
1920 06:46:38.111210 CBFS: Found @ offset 1c96c0 size 3f798
1921 06:46:38.114513 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 06:46:38.117766 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 06:46:38.121656 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 06:46:38.128112 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 06:46:38.131407 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 06:46:38.134271 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 06:46:38.138222 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 06:46:38.144448 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 06:46:38.148189 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 06:46:38.150738 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 06:46:38.154510 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 06:46:38.160813 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 06:46:38.164653 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 06:46:38.167702 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 06:46:38.171419 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 06:46:38.177469 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 06:46:38.180992 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 06:46:38.184292 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 06:46:38.187503 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 06:46:38.194173 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 06:46:38.197763 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 06:46:38.200676 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 06:46:38.204454 call enable_fixed_mtrr()
1944 06:46:38.207596 call enable_fixed_mtrr()
1945 06:46:38.210781 CPU physical address size: 39 bits
1946 06:46:38.213847 CPU physical address size: 39 bits
1947 06:46:38.217574 CPU physical address size: 39 bits
1948 06:46:38.220974 CPU physical address size: 39 bits
1949 06:46:38.223900 Checking segment from ROM address 0xffdd16f8
1950 06:46:38.230645 Checking segment from ROM address 0xffdd1714
1951 06:46:38.233712 Loading segment from ROM address 0xffdd16f8
1952 06:46:38.236899 code (compression=0)
1953 06:46:38.243726 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1954 06:46:38.253415 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1955 06:46:38.256708 it's not compressed!
1956 06:46:38.347970 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1957 06:46:38.354777 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1958 06:46:38.357733 Loading segment from ROM address 0xffdd1714
1959 06:46:38.361236 Entry Point 0x30000000
1960 06:46:38.364299 Loaded segments
1961 06:46:38.370067 Finalizing chipset.
1962 06:46:38.373323 Finalizing SMM.
1963 06:46:38.377067 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1964 06:46:38.380034 mp_park_aps done after 0 msecs.
1965 06:46:38.386933 Jumping to boot code at 30000000(99b62000)
1966 06:46:38.393234 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1967 06:46:38.393317
1968 06:46:38.393382
1969 06:46:38.393443
1970 06:46:38.396700 Starting depthcharge on Helios...
1971 06:46:38.396782
1972 06:46:38.397128 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1973 06:46:38.397227 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1974 06:46:38.397308 Setting prompt string to ['hatch:']
1975 06:46:38.397417 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1976 06:46:38.406923 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1977 06:46:38.407053
1978 06:46:38.413517 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1979 06:46:38.413639
1980 06:46:38.420279 board_setup: Info: eMMC controller not present; skipping
1981 06:46:38.420439
1982 06:46:38.423306 New NVMe Controller 0x30053ac0 @ 00:1d:00
1983 06:46:38.423428
1984 06:46:38.430020 board_setup: Info: SDHCI controller not present; skipping
1985 06:46:38.430141
1986 06:46:38.436571 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1987 06:46:38.436698
1988 06:46:38.436794 Wipe memory regions:
1989 06:46:38.436886
1990 06:46:38.440005 [0x00000000001000, 0x000000000a0000)
1991 06:46:38.440114
1992 06:46:38.442646 [0x00000000100000, 0x00000030000000)
1993 06:46:38.509619
1994 06:46:38.512692 [0x00000030657430, 0x00000099a2c000)
1995 06:46:38.650285
1996 06:46:38.653270 [0x00000100000000, 0x0000045e800000)
1997 06:46:40.036578
1998 06:46:40.036785 R8152: Initializing
1999 06:46:40.036919
2000 06:46:40.039473 Version 9 (ocp_data = 6010)
2001 06:46:40.043429
2002 06:46:40.043548 R8152: Done initializing
2003 06:46:40.043657
2004 06:46:40.047128 Adding net device
2005 06:46:40.529343
2006 06:46:40.529532 R8152: Initializing
2007 06:46:40.529650
2008 06:46:40.532949 Version 6 (ocp_data = 5c30)
2009 06:46:40.533072
2010 06:46:40.536357 R8152: Done initializing
2011 06:46:40.536479
2012 06:46:40.542862 net_add_device: Attemp to include the same device
2013 06:46:40.542957
2014 06:46:40.550385 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 06:46:40.550477
2016 06:46:40.550544
2017 06:46:40.550607
2018 06:46:40.550892 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2020 06:46:40.651294 hatch: tftpboot 192.168.201.1 12434463/tftp-deploy-jga5zd70/kernel/bzImage 12434463/tftp-deploy-jga5zd70/kernel/cmdline 12434463/tftp-deploy-jga5zd70/ramdisk/ramdisk.cpio.gz
2021 06:46:40.651471 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2022 06:46:40.651561 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2023 06:46:40.656093 tftpboot 192.168.201.1 12434463/tftp-deploy-jga5zd70/kernel/bzImploy-jga5zd70/kernel/cmdline 12434463/tftp-deploy-jga5zd70/ramdisk/ramdisk.cpio.gz
2024 06:46:40.656211
2025 06:46:40.656314 Waiting for link
2026 06:46:40.856766
2027 06:46:40.856950 done.
2028 06:46:40.857067
2029 06:46:40.857178 MAC: 00:24:32:50:19:be
2030 06:46:40.857293
2031 06:46:40.859911 Sending DHCP discover... done.
2032 06:46:40.860017
2033 06:46:40.863543 Waiting for reply... done.
2034 06:46:40.863626
2035 06:46:40.866929 Sending DHCP request... done.
2036 06:46:40.867060
2037 06:46:40.870119 Waiting for reply... done.
2038 06:46:40.870243
2039 06:46:40.873290 My ip is 192.168.201.15
2040 06:46:40.873392
2041 06:46:40.877016 The DHCP server ip is 192.168.201.1
2042 06:46:40.877099
2043 06:46:40.879800 TFTP server IP predefined by user: 192.168.201.1
2044 06:46:40.879910
2045 06:46:40.886776 Bootfile predefined by user: 12434463/tftp-deploy-jga5zd70/kernel/bzImage
2046 06:46:40.886863
2047 06:46:40.890058 Sending tftp read request... done.
2048 06:46:40.890157
2049 06:46:40.896830 Waiting for the transfer...
2050 06:46:40.896944
2051 06:46:41.450040 00000000 ################################################################
2052 06:46:41.450208
2053 06:46:41.991714 00080000 ################################################################
2054 06:46:41.991909
2055 06:46:42.543481 00100000 ################################################################
2056 06:46:42.543672
2057 06:46:43.092252 00180000 ################################################################
2058 06:46:43.092406
2059 06:46:43.626137 00200000 ################################################################
2060 06:46:43.626271
2061 06:46:44.143821 00280000 ################################################################
2062 06:46:44.143983
2063 06:46:44.703718 00300000 ################################################################
2064 06:46:44.703845
2065 06:46:45.256955 00380000 ################################################################
2066 06:46:45.257088
2067 06:46:45.802064 00400000 ################################################################
2068 06:46:45.802227
2069 06:46:46.339541 00480000 ################################################################
2070 06:46:46.339752
2071 06:46:46.863528 00500000 ################################################################
2072 06:46:46.863702
2073 06:46:47.390844 00580000 ################################################################
2074 06:46:47.391046
2075 06:46:47.911459 00600000 ################################################################
2076 06:46:47.911608
2077 06:46:48.439281 00680000 ################################################################
2078 06:46:48.439449
2079 06:46:48.955613 00700000 ################################################################
2080 06:46:48.955784
2081 06:46:49.471537 00780000 ################################################################
2082 06:46:49.471711
2083 06:46:49.651288 00800000 ####################### done.
2084 06:46:49.651486
2085 06:46:49.654270 The bootfile was 8576912 bytes long.
2086 06:46:49.654379
2087 06:46:49.658068 Sending tftp read request... done.
2088 06:46:49.658177
2089 06:46:49.661234 Waiting for the transfer...
2090 06:46:49.661323
2091 06:46:50.167977 00000000 ################################################################
2092 06:46:50.168153
2093 06:46:50.677161 00080000 ################################################################
2094 06:46:50.677311
2095 06:46:51.190271 00100000 ################################################################
2096 06:46:51.190434
2097 06:46:51.706920 00180000 ################################################################
2098 06:46:51.707089
2099 06:46:52.220929 00200000 ################################################################
2100 06:46:52.221060
2101 06:46:52.735364 00280000 ################################################################
2102 06:46:52.735531
2103 06:46:53.248296 00300000 ################################################################
2104 06:46:53.248430
2105 06:46:53.766639 00380000 ################################################################
2106 06:46:53.766829
2107 06:46:54.297221 00400000 ################################################################
2108 06:46:54.297362
2109 06:46:54.822418 00480000 ################################################################
2110 06:46:54.822582
2111 06:46:55.360298 00500000 ################################################################
2112 06:46:55.360430
2113 06:46:55.898427 00580000 ################################################################
2114 06:46:55.898567
2115 06:46:56.427851 00600000 ################################################################
2116 06:46:56.427987
2117 06:46:56.945293 00680000 ################################################################
2118 06:46:56.945468
2119 06:46:57.463126 00700000 ################################################################
2120 06:46:57.463257
2121 06:46:57.983251 00780000 ################################################################
2122 06:46:57.983381
2123 06:46:58.424539 00800000 ####################################################### done.
2124 06:46:58.424734
2125 06:46:58.428246 Sending tftp read request... done.
2126 06:46:58.428379
2127 06:46:58.431138 Waiting for the transfer...
2128 06:46:58.431261
2129 06:46:58.431374 00000000 # done.
2130 06:46:58.431487
2131 06:46:58.441281 Command line loaded dynamically from TFTP file: 12434463/tftp-deploy-jga5zd70/kernel/cmdline
2132 06:46:58.441412
2133 06:46:58.461447 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2134 06:46:58.461584
2135 06:46:58.467697 ec_init(0): CrosEC protocol v3 supported (256, 256)
2136 06:46:58.471573
2137 06:46:58.474963 Shutting down all USB controllers.
2138 06:46:58.475082
2139 06:46:58.475190 Removing current net device
2140 06:46:58.478564
2141 06:46:58.478686 Finalizing coreboot
2142 06:46:58.478797
2143 06:46:58.485043 Exiting depthcharge with code 4 at timestamp: 27428487
2144 06:46:58.485172
2145 06:46:58.485287
2146 06:46:58.485391 Starting kernel ...
2147 06:46:58.485501
2148 06:46:58.485610
2149 06:46:58.486181 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2150 06:46:58.486337 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2151 06:46:58.486466 Setting prompt string to ['Linux version [0-9]']
2152 06:46:58.486588 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2153 06:46:58.486711 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2155 06:51:20.486614 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2157 06:51:20.486820 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2159 06:51:20.486992 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2162 06:51:20.487243 end: 2 depthcharge-action (duration 00:05:00) [common]
2164 06:51:20.487502 Cleaning after the job
2165 06:51:20.487591 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434463/tftp-deploy-jga5zd70/ramdisk
2166 06:51:20.489157 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434463/tftp-deploy-jga5zd70/kernel
2167 06:51:20.490503 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434463/tftp-deploy-jga5zd70/modules
2168 06:51:20.490909 start: 5.1 power-off (timeout 00:00:30) [common]
2169 06:51:20.491063 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2170 06:51:20.569489 >> Command sent successfully.
2171 06:51:20.572812 Returned 0 in 0 seconds
2172 06:51:20.673265 end: 5.1 power-off (duration 00:00:00) [common]
2174 06:51:20.673604 start: 5.2 read-feedback (timeout 00:10:00) [common]
2175 06:51:20.673876 Listened to connection for namespace 'common' for up to 1s
2177 06:51:20.674251 Listened to connection for namespace 'common' for up to 1s
2178 06:51:21.674799 Finalising connection for namespace 'common'
2179 06:51:21.674976 Disconnecting from shell: Finalise
2180 06:51:21.675052
2181 06:51:21.775383 end: 5.2 read-feedback (duration 00:00:01) [common]
2182 06:51:21.775546 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12434463
2183 06:51:21.792825 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12434463
2184 06:51:21.792985 JobError: Your job cannot terminate cleanly.