Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 06:43:42.288317 lava-dispatcher, installed at version: 2023.10
2 06:43:42.288532 start: 0 validate
3 06:43:42.288663 Start time: 2024-01-03 06:43:42.288656+00:00 (UTC)
4 06:43:42.288789 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:43:42.288918 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 06:43:42.555882 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:43:42.556055 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:43:46.559643 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:43:46.560391 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 06:43:47.562159 validate duration: 5.27
12 06:43:47.562464 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:43:47.562574 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:43:47.562711 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:43:47.562865 Not decompressing ramdisk as can be used compressed.
16 06:43:47.562991 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 06:43:47.563098 saving as /var/lib/lava/dispatcher/tmp/12434487/tftp-deploy-2r_78mr3/ramdisk/rootfs.cpio.gz
18 06:43:47.563227 total size: 35760064 (34 MB)
19 06:43:47.564957 progress 0 % (0 MB)
20 06:43:47.575469 progress 5 % (1 MB)
21 06:43:47.585462 progress 10 % (3 MB)
22 06:43:47.596331 progress 15 % (5 MB)
23 06:43:47.606626 progress 20 % (6 MB)
24 06:43:47.616558 progress 25 % (8 MB)
25 06:43:47.626651 progress 30 % (10 MB)
26 06:43:47.636368 progress 35 % (11 MB)
27 06:43:47.646002 progress 40 % (13 MB)
28 06:43:47.655855 progress 45 % (15 MB)
29 06:43:47.665379 progress 50 % (17 MB)
30 06:43:47.674909 progress 55 % (18 MB)
31 06:43:47.684262 progress 60 % (20 MB)
32 06:43:47.693896 progress 65 % (22 MB)
33 06:43:47.703302 progress 70 % (23 MB)
34 06:43:47.712809 progress 75 % (25 MB)
35 06:43:47.722307 progress 80 % (27 MB)
36 06:43:47.731681 progress 85 % (29 MB)
37 06:43:47.741166 progress 90 % (30 MB)
38 06:43:47.750439 progress 95 % (32 MB)
39 06:43:47.759921 progress 100 % (34 MB)
40 06:43:47.760127 34 MB downloaded in 0.20 s (173.20 MB/s)
41 06:43:47.760299 end: 1.1.1 http-download (duration 00:00:00) [common]
43 06:43:47.760543 end: 1.1 download-retry (duration 00:00:00) [common]
44 06:43:47.760629 start: 1.2 download-retry (timeout 00:10:00) [common]
45 06:43:47.760712 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 06:43:47.760839 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 06:43:47.760909 saving as /var/lib/lava/dispatcher/tmp/12434487/tftp-deploy-2r_78mr3/kernel/bzImage
48 06:43:47.760970 total size: 8576912 (8 MB)
49 06:43:47.761029 No compression specified
50 06:43:47.762188 progress 0 % (0 MB)
51 06:43:47.764673 progress 5 % (0 MB)
52 06:43:47.766969 progress 10 % (0 MB)
53 06:43:47.769348 progress 15 % (1 MB)
54 06:43:47.771730 progress 20 % (1 MB)
55 06:43:47.774133 progress 25 % (2 MB)
56 06:43:47.776485 progress 30 % (2 MB)
57 06:43:47.778776 progress 35 % (2 MB)
58 06:43:47.781170 progress 40 % (3 MB)
59 06:43:47.783531 progress 45 % (3 MB)
60 06:43:47.785859 progress 50 % (4 MB)
61 06:43:47.788125 progress 55 % (4 MB)
62 06:43:47.790493 progress 60 % (4 MB)
63 06:43:47.793178 progress 65 % (5 MB)
64 06:43:47.795621 progress 70 % (5 MB)
65 06:43:47.797826 progress 75 % (6 MB)
66 06:43:47.800063 progress 80 % (6 MB)
67 06:43:47.802275 progress 85 % (6 MB)
68 06:43:47.804524 progress 90 % (7 MB)
69 06:43:47.806848 progress 95 % (7 MB)
70 06:43:47.809147 progress 100 % (8 MB)
71 06:43:47.809366 8 MB downloaded in 0.05 s (169.03 MB/s)
72 06:43:47.809532 end: 1.2.1 http-download (duration 00:00:00) [common]
74 06:43:47.809846 end: 1.2 download-retry (duration 00:00:00) [common]
75 06:43:47.809949 start: 1.3 download-retry (timeout 00:10:00) [common]
76 06:43:47.810058 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 06:43:47.810218 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 06:43:47.810310 saving as /var/lib/lava/dispatcher/tmp/12434487/tftp-deploy-2r_78mr3/modules/modules.tar
79 06:43:47.810412 total size: 250972 (0 MB)
80 06:43:47.810513 Using unxz to decompress xz
81 06:43:47.815474 progress 13 % (0 MB)
82 06:43:47.815917 progress 26 % (0 MB)
83 06:43:47.816198 progress 39 % (0 MB)
84 06:43:47.817798 progress 52 % (0 MB)
85 06:43:47.820099 progress 65 % (0 MB)
86 06:43:47.822434 progress 78 % (0 MB)
87 06:43:47.824327 progress 91 % (0 MB)
88 06:43:47.826318 progress 100 % (0 MB)
89 06:43:47.832125 0 MB downloaded in 0.02 s (11.03 MB/s)
90 06:43:47.832379 end: 1.3.1 http-download (duration 00:00:00) [common]
92 06:43:47.832683 end: 1.3 download-retry (duration 00:00:00) [common]
93 06:43:47.832797 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 06:43:47.832914 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 06:43:47.833008 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 06:43:47.833115 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 06:43:47.833352 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei
98 06:43:47.833570 makedir: /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin
99 06:43:47.833714 makedir: /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/tests
100 06:43:47.833857 makedir: /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/results
101 06:43:47.834000 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-add-keys
102 06:43:47.834181 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-add-sources
103 06:43:47.834349 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-background-process-start
104 06:43:47.834513 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-background-process-stop
105 06:43:47.834671 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-common-functions
106 06:43:47.834829 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-echo-ipv4
107 06:43:47.834987 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-install-packages
108 06:43:47.835144 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-installed-packages
109 06:43:47.835300 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-os-build
110 06:43:47.835491 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-probe-channel
111 06:43:47.835618 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-probe-ip
112 06:43:47.835744 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-target-ip
113 06:43:47.835893 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-target-mac
114 06:43:47.836020 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-target-storage
115 06:43:47.836168 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-test-case
116 06:43:47.836346 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-test-event
117 06:43:47.836591 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-test-feedback
118 06:43:47.836737 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-test-raise
119 06:43:47.836883 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-test-reference
120 06:43:47.837122 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-test-runner
121 06:43:47.837268 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-test-set
122 06:43:47.837412 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-test-shell
123 06:43:47.837564 Updating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-install-packages (oe)
124 06:43:47.837769 Updating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/bin/lava-installed-packages (oe)
125 06:43:47.837938 Creating /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/environment
126 06:43:47.838077 LAVA metadata
127 06:43:47.838184 - LAVA_JOB_ID=12434487
128 06:43:47.838289 - LAVA_DISPATCHER_IP=192.168.201.1
129 06:43:47.838438 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 06:43:47.838537 skipped lava-vland-overlay
131 06:43:47.838658 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 06:43:47.838782 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 06:43:47.838877 skipped lava-multinode-overlay
134 06:43:47.838995 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 06:43:47.839178 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 06:43:47.839330 Loading test definitions
137 06:43:47.839515 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 06:43:47.839650 Using /lava-12434487 at stage 0
139 06:43:47.840076 uuid=12434487_1.4.2.3.1 testdef=None
140 06:43:47.840178 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 06:43:47.840281 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 06:43:47.840830 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 06:43:47.841082 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 06:43:47.841746 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 06:43:47.842135 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 06:43:47.842997 runner path: /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/0/tests/0_cros-ec test_uuid 12434487_1.4.2.3.1
149 06:43:47.843192 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 06:43:47.843573 Creating lava-test-runner.conf files
152 06:43:47.843675 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12434487/lava-overlay-vcntb0ei/lava-12434487/0 for stage 0
153 06:43:47.843812 - 0_cros-ec
154 06:43:47.843953 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 06:43:47.844074 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 06:43:47.851158 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 06:43:47.851277 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 06:43:47.851442 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 06:43:47.851546 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 06:43:47.851645 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 06:43:48.925712 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 06:43:48.926230 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 06:43:48.926420 extracting modules file /var/lib/lava/dispatcher/tmp/12434487/tftp-deploy-2r_78mr3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12434487/extract-overlay-ramdisk-l9ranx6c/ramdisk
164 06:43:48.946879 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 06:43:48.947046 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 06:43:48.947141 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12434487/compress-overlay-w4b3520h/overlay-1.4.2.4.tar.gz to ramdisk
167 06:43:48.947264 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12434487/compress-overlay-w4b3520h/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12434487/extract-overlay-ramdisk-l9ranx6c/ramdisk
168 06:43:48.954838 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 06:43:48.954986 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 06:43:48.955079 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 06:43:48.955169 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 06:43:48.955249 Building ramdisk /var/lib/lava/dispatcher/tmp/12434487/extract-overlay-ramdisk-l9ranx6c/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12434487/extract-overlay-ramdisk-l9ranx6c/ramdisk
173 06:43:49.487526 >> 184082 blocks
174 06:43:53.026173 rename /var/lib/lava/dispatcher/tmp/12434487/extract-overlay-ramdisk-l9ranx6c/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12434487/tftp-deploy-2r_78mr3/ramdisk/ramdisk.cpio.gz
175 06:43:53.026624 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 06:43:53.026755 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 06:43:53.026855 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 06:43:53.026952 No mkimage arch provided, not using FIT.
179 06:43:53.027038 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 06:43:53.027118 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 06:43:53.027213 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 06:43:53.027300 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 06:43:53.027407 No LXC device requested
184 06:43:53.027501 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 06:43:53.027586 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 06:43:53.027669 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 06:43:53.027743 Checking files for TFTP limit of 4294967296 bytes.
188 06:43:53.028149 end: 1 tftp-deploy (duration 00:00:05) [common]
189 06:43:53.028252 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 06:43:53.028339 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 06:43:53.028456 substitutions:
192 06:43:53.028524 - {DTB}: None
193 06:43:53.028586 - {INITRD}: 12434487/tftp-deploy-2r_78mr3/ramdisk/ramdisk.cpio.gz
194 06:43:53.028644 - {KERNEL}: 12434487/tftp-deploy-2r_78mr3/kernel/bzImage
195 06:43:53.028700 - {LAVA_MAC}: None
196 06:43:53.028755 - {PRESEED_CONFIG}: None
197 06:43:53.028833 - {PRESEED_LOCAL}: None
198 06:43:53.028949 - {RAMDISK}: 12434487/tftp-deploy-2r_78mr3/ramdisk/ramdisk.cpio.gz
199 06:43:53.029029 - {ROOT_PART}: None
200 06:43:53.029100 - {ROOT}: None
201 06:43:53.029154 - {SERVER_IP}: 192.168.201.1
202 06:43:53.029207 - {TEE}: None
203 06:43:53.029260 Parsed boot commands:
204 06:43:53.029315 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 06:43:53.029494 Parsed boot commands: tftpboot 192.168.201.1 12434487/tftp-deploy-2r_78mr3/kernel/bzImage 12434487/tftp-deploy-2r_78mr3/kernel/cmdline 12434487/tftp-deploy-2r_78mr3/ramdisk/ramdisk.cpio.gz
206 06:43:53.029604 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 06:43:53.029719 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 06:43:53.029815 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 06:43:53.029906 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 06:43:53.029978 Not connected, no need to disconnect.
211 06:43:53.030053 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 06:43:53.030136 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 06:43:53.030199 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-5'
214 06:43:53.034261 Setting prompt string to ['lava-test: # ']
215 06:43:53.034638 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 06:43:53.034745 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 06:43:53.034834 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 06:43:53.034944 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 06:43:53.035433 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
220 06:43:58.186693 >> Command sent successfully.
221 06:43:58.197011 Returned 0 in 5 seconds
222 06:43:58.298210 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 06:43:58.300228 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 06:43:58.300951 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 06:43:58.301581 Setting prompt string to 'Starting depthcharge on Voema...'
227 06:43:58.302142 Changing prompt to 'Starting depthcharge on Voema...'
228 06:43:58.302701 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 06:43:58.304098 [Enter `^Ec?' for help]
230 06:43:59.923516
231 06:43:59.924132
232 06:43:59.933897 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 06:43:59.937013 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
234 06:43:59.943408 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 06:43:59.947129 CPU: AES supported, TXT NOT supported, VT supported
236 06:43:59.953256 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 06:43:59.957381 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 06:43:59.963655 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 06:43:59.967057 VBOOT: Loading verstage.
240 06:43:59.970539 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 06:43:59.977087 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 06:43:59.980093 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 06:43:59.990622 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 06:43:59.997636 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 06:43:59.998160
246 06:43:59.998521
247 06:44:00.010547 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 06:44:00.024243 Probing TPM: . done!
249 06:44:00.027397 TPM ready after 0 ms
250 06:44:00.031176 Connected to device vid:did:rid of 1ae0:0028:00
251 06:44:00.042266 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
252 06:44:00.048928 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 06:44:00.052283 Initialized TPM device CR50 revision 0
254 06:44:00.102684 tlcl_send_startup: Startup return code is 0
255 06:44:00.103182 TPM: setup succeeded
256 06:44:00.117156 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 06:44:00.131109 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 06:44:00.143946 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 06:44:00.153917 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 06:44:00.157475 Chrome EC: UHEPI supported
261 06:44:00.160559 Phase 1
262 06:44:00.164196 FMAP: area GBB found @ 1805000 (458752 bytes)
263 06:44:00.171318 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 06:44:00.181269 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 06:44:00.187901 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 06:44:00.194241 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 06:44:00.197525 Recovery requested (1009000e)
268 06:44:00.201076 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 06:44:00.212158 tlcl_extend: response is 0
270 06:44:00.219447 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 06:44:00.228827 tlcl_extend: response is 0
272 06:44:00.236207 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 06:44:00.242831 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 06:44:00.248957 BS: verstage times (exec / console): total (unknown) / 142 ms
275 06:44:00.249489
276 06:44:00.249836
277 06:44:00.262434 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 06:44:00.265775 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 06:44:00.272856 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 06:44:00.276371 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 06:44:00.279554 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 06:44:00.286184 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 06:44:00.289441 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 06:44:00.292662 TCO_STS: 0000 0000
285 06:44:00.295853 GEN_PMCON: d0015038 00002200
286 06:44:00.299259 GBLRST_CAUSE: 00000000 00000000
287 06:44:00.299723 HPR_CAUSE0: 00000000
288 06:44:00.302688 prev_sleep_state 5
289 06:44:00.306257 Boot Count incremented to 25794
290 06:44:00.312386 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 06:44:00.319805 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 06:44:00.325978 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 06:44:00.332570 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 06:44:00.337292 Chrome EC: UHEPI supported
295 06:44:00.343858 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 06:44:00.356674 Probing TPM: done!
297 06:44:00.364481 Connected to device vid:did:rid of 1ae0:0028:00
298 06:44:00.375222 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
299 06:44:00.381534 Initialized TPM device CR50 revision 0
300 06:44:00.392078 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 06:44:00.398826 MRC: Hash idx 0x100b comparison successful.
302 06:44:00.402100 MRC cache found, size faa8
303 06:44:00.402534 bootmode is set to: 2
304 06:44:00.405116 SPD index = 0
305 06:44:00.412059 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 06:44:00.415229 SPD: module type is LPDDR4X
307 06:44:00.418635 SPD: module part number is MT53E512M64D4NW-046
308 06:44:00.425193 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
309 06:44:00.428620 SPD: device width 16 bits, bus width 16 bits
310 06:44:00.435816 SPD: module size is 1024 MB (per channel)
311 06:44:00.865471 CBMEM:
312 06:44:00.868445 IMD: root @ 0x76fff000 254 entries.
313 06:44:00.872197 IMD: root @ 0x76ffec00 62 entries.
314 06:44:00.875256 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 06:44:00.881776 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 06:44:00.885268 External stage cache:
317 06:44:00.888611 IMD: root @ 0x7b3ff000 254 entries.
318 06:44:00.891635 IMD: root @ 0x7b3fec00 62 entries.
319 06:44:00.906870 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 06:44:00.913873 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 06:44:00.920251 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 06:44:00.934772 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 06:44:00.942120 cse_lite: Skip switching to RW in the recovery path
324 06:44:00.942663 8 DIMMs found
325 06:44:00.943021 SMM Memory Map
326 06:44:00.945933 SMRAM : 0x7b000000 0x800000
327 06:44:00.949185 Subregion 0: 0x7b000000 0x200000
328 06:44:00.952302 Subregion 1: 0x7b200000 0x200000
329 06:44:00.955907 Subregion 2: 0x7b400000 0x400000
330 06:44:00.959057 top_of_ram = 0x77000000
331 06:44:00.965906 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 06:44:00.969815 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 06:44:00.975851 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 06:44:00.979218 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 06:44:00.985885 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 06:44:00.992590 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 06:44:01.004246 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 06:44:01.007604 Processing 211 relocs. Offset value of 0x74c0b000
339 06:44:01.017189 BS: romstage times (exec / console): total (unknown) / 277 ms
340 06:44:01.023404
341 06:44:01.023900
342 06:44:01.033191 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 06:44:01.036496 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 06:44:01.046890 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 06:44:01.053679 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 06:44:01.060376 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 06:44:01.066210 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 06:44:01.113705 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 06:44:01.120284 Processing 5008 relocs. Offset value of 0x75d98000
350 06:44:01.123948 BS: postcar times (exec / console): total (unknown) / 59 ms
351 06:44:01.124484
352 06:44:01.127047
353 06:44:01.137842 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 06:44:01.138389 Normal boot
355 06:44:01.140661 FW_CONFIG value is 0x804c02
356 06:44:01.144313 PCI: 00:07.0 disabled by fw_config
357 06:44:01.147535 PCI: 00:07.1 disabled by fw_config
358 06:44:01.150660 PCI: 00:0d.2 disabled by fw_config
359 06:44:01.154429 PCI: 00:1c.7 disabled by fw_config
360 06:44:01.160971 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 06:44:01.167529 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 06:44:01.171429 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 06:44:01.174822 GENERIC: 0.0 disabled by fw_config
364 06:44:01.177819 GENERIC: 1.0 disabled by fw_config
365 06:44:01.184793 fw_config match found: DB_USB=USB3_ACTIVE
366 06:44:01.188139 fw_config match found: DB_USB=USB3_ACTIVE
367 06:44:01.191505 fw_config match found: DB_USB=USB3_ACTIVE
368 06:44:01.195026 fw_config match found: DB_USB=USB3_ACTIVE
369 06:44:01.201392 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 06:44:01.207630 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 06:44:01.214131 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 06:44:01.224629 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 06:44:01.227602 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 06:44:01.231486 microcode: Update skipped, already up-to-date
375 06:44:01.237690 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 06:44:01.267518 Detected 4 core, 8 thread CPU.
377 06:44:01.270659 Setting up SMI for CPU
378 06:44:01.273928 IED base = 0x7b400000
379 06:44:01.274460 IED size = 0x00400000
380 06:44:01.277135 Will perform SMM setup.
381 06:44:01.284062 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
382 06:44:01.290620 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 06:44:01.297522 Processing 16 relocs. Offset value of 0x00030000
384 06:44:01.300402 Attempting to start 7 APs
385 06:44:01.303925 Waiting for 10ms after sending INIT.
386 06:44:01.319258 Waiting for 1st SIPI to complete...done.
387 06:44:01.319775 AP: slot 5 apic_id 4.
388 06:44:01.322571 AP: slot 2 apic_id 5.
389 06:44:01.326273 AP: slot 1 apic_id 1.
390 06:44:01.329456 Waiting for 2nd SIPI to complete...done.
391 06:44:01.333068 AP: slot 3 apic_id 7.
392 06:44:01.333613 AP: slot 6 apic_id 6.
393 06:44:01.335733 AP: slot 4 apic_id 2.
394 06:44:01.339416 AP: slot 7 apic_id 3.
395 06:44:01.346287 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 06:44:01.352661 Processing 13 relocs. Offset value of 0x00038000
397 06:44:01.353156 Unable to locate Global NVS
398 06:44:01.363203 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 06:44:01.365788 Installing permanent SMM handler to 0x7b000000
400 06:44:01.372851 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 06:44:01.379533 Processing 794 relocs. Offset value of 0x7b010000
402 06:44:01.385859 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 06:44:01.392757 Processing 13 relocs. Offset value of 0x7b008000
404 06:44:01.399261 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 06:44:01.402889 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 06:44:01.409144 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 06:44:01.416025 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 06:44:01.422522 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 06:44:01.429344 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 06:44:01.432931 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 06:44:01.435927 Unable to locate Global NVS
412 06:44:01.442170 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 06:44:01.447306 Clearing SMI status registers
414 06:44:01.450370 SMI_STS: PM1
415 06:44:01.450929 PM1_STS: PWRBTN
416 06:44:01.460403 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 06:44:01.460997 In relocation handler: CPU 0
418 06:44:01.467192 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 06:44:01.470227 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 06:44:01.474076 Relocation complete.
421 06:44:01.480335 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 06:44:01.483892 In relocation handler: CPU 1
423 06:44:01.487129 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 06:44:01.490541 Relocation complete.
425 06:44:01.497972 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
426 06:44:01.500555 In relocation handler: CPU 5
427 06:44:01.503477 New SMBASE=0x7affec00 IEDBASE=0x7b400000
428 06:44:01.510621 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 06:44:01.511213 Relocation complete.
430 06:44:01.517262 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
431 06:44:01.520478 In relocation handler: CPU 2
432 06:44:01.523661 New SMBASE=0x7afff800 IEDBASE=0x7b400000
433 06:44:01.526898 Relocation complete.
434 06:44:01.534170 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
435 06:44:01.536956 In relocation handler: CPU 6
436 06:44:01.540544 New SMBASE=0x7affe800 IEDBASE=0x7b400000
437 06:44:01.546962 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 06:44:01.550528 Relocation complete.
439 06:44:01.557155 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
440 06:44:01.560591 In relocation handler: CPU 3
441 06:44:01.563997 New SMBASE=0x7afff400 IEDBASE=0x7b400000
442 06:44:01.567172 Relocation complete.
443 06:44:01.573710 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
444 06:44:01.577142 In relocation handler: CPU 4
445 06:44:01.580253 New SMBASE=0x7afff000 IEDBASE=0x7b400000
446 06:44:01.583870 Writing SMRR. base = 0x7b000006, mask=0xff800c00
447 06:44:01.586440 Relocation complete.
448 06:44:01.593794 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
449 06:44:01.597526 In relocation handler: CPU 7
450 06:44:01.600190 New SMBASE=0x7affe400 IEDBASE=0x7b400000
451 06:44:01.603957 Relocation complete.
452 06:44:01.604383 Initializing CPU #0
453 06:44:01.607592 CPU: vendor Intel device 806c1
454 06:44:01.611423 CPU: family 06, model 8c, stepping 01
455 06:44:01.614789 Clearing out pending MCEs
456 06:44:01.618043 Setting up local APIC...
457 06:44:01.618464 apic_id: 0x00 done.
458 06:44:01.621916 Turbo is available but hidden
459 06:44:01.624878 Turbo is available and visible
460 06:44:01.631568 microcode: Update skipped, already up-to-date
461 06:44:01.632083 CPU #0 initialized
462 06:44:01.634553 Initializing CPU #6
463 06:44:01.638179 Initializing CPU #3
464 06:44:01.641376 CPU: vendor Intel device 806c1
465 06:44:01.645192 CPU: family 06, model 8c, stepping 01
466 06:44:01.648089 CPU: vendor Intel device 806c1
467 06:44:01.651561 CPU: family 06, model 8c, stepping 01
468 06:44:01.655157 Clearing out pending MCEs
469 06:44:01.655738 Clearing out pending MCEs
470 06:44:01.658343 Setting up local APIC...
471 06:44:01.661415 Initializing CPU #7
472 06:44:01.661840 Initializing CPU #4
473 06:44:01.665115 CPU: vendor Intel device 806c1
474 06:44:01.668074 CPU: family 06, model 8c, stepping 01
475 06:44:01.671599 CPU: vendor Intel device 806c1
476 06:44:01.675327 CPU: family 06, model 8c, stepping 01
477 06:44:01.678835 Clearing out pending MCEs
478 06:44:01.681937 Clearing out pending MCEs
479 06:44:01.685319 Setting up local APIC...
480 06:44:01.685847 Initializing CPU #5
481 06:44:01.688085 Initializing CPU #2
482 06:44:01.692030 CPU: vendor Intel device 806c1
483 06:44:01.695138 CPU: family 06, model 8c, stepping 01
484 06:44:01.698478 CPU: vendor Intel device 806c1
485 06:44:01.701994 CPU: family 06, model 8c, stepping 01
486 06:44:01.705668 Clearing out pending MCEs
487 06:44:01.708819 apic_id: 0x03 done.
488 06:44:01.709360 Setting up local APIC...
489 06:44:01.711499 Setting up local APIC...
490 06:44:01.714854 Setting up local APIC...
491 06:44:01.718208 Initializing CPU #1
492 06:44:01.718629 Clearing out pending MCEs
493 06:44:01.722191 apic_id: 0x04 done.
494 06:44:01.724711 apic_id: 0x06 done.
495 06:44:01.725145 apic_id: 0x02 done.
496 06:44:01.731354 microcode: Update skipped, already up-to-date
497 06:44:01.734931 microcode: Update skipped, already up-to-date
498 06:44:01.738150 CPU #7 initialized
499 06:44:01.741515 CPU: vendor Intel device 806c1
500 06:44:01.745095 CPU: family 06, model 8c, stepping 01
501 06:44:01.745673 Setting up local APIC...
502 06:44:01.751941 microcode: Update skipped, already up-to-date
503 06:44:01.752369 apic_id: 0x05 done.
504 06:44:01.754791 CPU #5 initialized
505 06:44:01.758020 microcode: Update skipped, already up-to-date
506 06:44:01.761446 Clearing out pending MCEs
507 06:44:01.764916 CPU #2 initialized
508 06:44:01.765357 CPU #4 initialized
509 06:44:01.768330 apic_id: 0x07 done.
510 06:44:01.771502 microcode: Update skipped, already up-to-date
511 06:44:01.778067 microcode: Update skipped, already up-to-date
512 06:44:01.778577 CPU #6 initialized
513 06:44:01.781362 CPU #3 initialized
514 06:44:01.785069 Setting up local APIC...
515 06:44:01.785514 apic_id: 0x01 done.
516 06:44:01.791875 microcode: Update skipped, already up-to-date
517 06:44:01.792412 CPU #1 initialized
518 06:44:01.798826 bsp_do_flight_plan done after 464 msecs.
519 06:44:01.801592 CPU: frequency set to 4000 MHz
520 06:44:01.802035 Enabling SMIs.
521 06:44:01.807989 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 06:44:01.824504 SATAXPCIE1 indicates PCIe NVMe is present
523 06:44:01.827927 Probing TPM: done!
524 06:44:01.831290 Connected to device vid:did:rid of 1ae0:0028:00
525 06:44:01.841809 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
526 06:44:01.845093 Initialized TPM device CR50 revision 0
527 06:44:01.848176 Enabling S0i3.4
528 06:44:01.855044 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 06:44:01.858824 Found a VBT of 8704 bytes after decompression
530 06:44:01.864875 cse_lite: CSE RO boot. HybridStorageMode disabled
531 06:44:01.871746 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 06:44:01.946463 FSPS returned 0
533 06:44:01.950034 Executing Phase 1 of FspMultiPhaseSiInit
534 06:44:01.960048 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 06:44:01.963510 port C0 DISC req: usage 1 usb3 1 usb2 5
536 06:44:01.966757 Raw Buffer output 0 00000511
537 06:44:01.970102 Raw Buffer output 1 00000000
538 06:44:01.973345 pmc_send_ipc_cmd succeeded
539 06:44:01.980242 port C1 DISC req: usage 1 usb3 2 usb2 3
540 06:44:01.980878 Raw Buffer output 0 00000321
541 06:44:01.983185 Raw Buffer output 1 00000000
542 06:44:01.987397 pmc_send_ipc_cmd succeeded
543 06:44:01.992615 Detected 4 core, 8 thread CPU.
544 06:44:01.995930 Detected 4 core, 8 thread CPU.
545 06:44:02.229906 Display FSP Version Info HOB
546 06:44:02.233396 Reference Code - CPU = a.0.4c.31
547 06:44:02.236781 uCode Version = 0.0.0.86
548 06:44:02.240071 TXT ACM version = ff.ff.ff.ffff
549 06:44:02.243198 Reference Code - ME = a.0.4c.31
550 06:44:02.246492 MEBx version = 0.0.0.0
551 06:44:02.250071 ME Firmware Version = Consumer SKU
552 06:44:02.253167 Reference Code - PCH = a.0.4c.31
553 06:44:02.256631 PCH-CRID Status = Disabled
554 06:44:02.259421 PCH-CRID Original Value = ff.ff.ff.ffff
555 06:44:02.263111 PCH-CRID New Value = ff.ff.ff.ffff
556 06:44:02.266277 OPROM - RST - RAID = ff.ff.ff.ffff
557 06:44:02.269660 PCH Hsio Version = 4.0.0.0
558 06:44:02.273205 Reference Code - SA - System Agent = a.0.4c.31
559 06:44:02.276467 Reference Code - MRC = 2.0.0.1
560 06:44:02.279935 SA - PCIe Version = a.0.4c.31
561 06:44:02.283105 SA-CRID Status = Disabled
562 06:44:02.286402 SA-CRID Original Value = 0.0.0.1
563 06:44:02.290187 SA-CRID New Value = 0.0.0.1
564 06:44:02.293049 OPROM - VBIOS = ff.ff.ff.ffff
565 06:44:02.296823 IO Manageability Engine FW Version = 11.1.4.0
566 06:44:02.300271 PHY Build Version = 0.0.0.e0
567 06:44:02.303116 Thunderbolt(TM) FW Version = 0.0.0.0
568 06:44:02.309652 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 06:44:02.313420 ITSS IRQ Polarities Before:
570 06:44:02.314039 IPC0: 0xffffffff
571 06:44:02.316607 IPC1: 0xffffffff
572 06:44:02.317098 IPC2: 0xffffffff
573 06:44:02.319605 IPC3: 0xffffffff
574 06:44:02.323295 ITSS IRQ Polarities After:
575 06:44:02.323762 IPC0: 0xffffffff
576 06:44:02.326900 IPC1: 0xffffffff
577 06:44:02.327479 IPC2: 0xffffffff
578 06:44:02.330314 IPC3: 0xffffffff
579 06:44:02.332999 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 06:44:02.343486 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 06:44:02.356721 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 06:44:02.370046 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 06:44:02.377107 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
584 06:44:02.377866 Enumerating buses...
585 06:44:02.383549 Show all devs... Before device enumeration.
586 06:44:02.384021 Root Device: enabled 1
587 06:44:02.386588 DOMAIN: 0000: enabled 1
588 06:44:02.390483 CPU_CLUSTER: 0: enabled 1
589 06:44:02.393351 PCI: 00:00.0: enabled 1
590 06:44:02.393994 PCI: 00:02.0: enabled 1
591 06:44:02.396906 PCI: 00:04.0: enabled 1
592 06:44:02.399894 PCI: 00:05.0: enabled 1
593 06:44:02.400421 PCI: 00:06.0: enabled 0
594 06:44:02.402975 PCI: 00:07.0: enabled 0
595 06:44:02.406298 PCI: 00:07.1: enabled 0
596 06:44:02.409912 PCI: 00:07.2: enabled 0
597 06:44:02.410349 PCI: 00:07.3: enabled 0
598 06:44:02.413128 PCI: 00:08.0: enabled 1
599 06:44:02.416376 PCI: 00:09.0: enabled 0
600 06:44:02.419886 PCI: 00:0a.0: enabled 0
601 06:44:02.420324 PCI: 00:0d.0: enabled 1
602 06:44:02.423195 PCI: 00:0d.1: enabled 0
603 06:44:02.426830 PCI: 00:0d.2: enabled 0
604 06:44:02.429685 PCI: 00:0d.3: enabled 0
605 06:44:02.430114 PCI: 00:0e.0: enabled 0
606 06:44:02.433279 PCI: 00:10.2: enabled 1
607 06:44:02.436556 PCI: 00:10.6: enabled 0
608 06:44:02.437128 PCI: 00:10.7: enabled 0
609 06:44:02.439818 PCI: 00:12.0: enabled 0
610 06:44:02.443284 PCI: 00:12.6: enabled 0
611 06:44:02.446902 PCI: 00:13.0: enabled 0
612 06:44:02.447321 PCI: 00:14.0: enabled 1
613 06:44:02.450149 PCI: 00:14.1: enabled 0
614 06:44:02.453502 PCI: 00:14.2: enabled 1
615 06:44:02.456917 PCI: 00:14.3: enabled 1
616 06:44:02.457443 PCI: 00:15.0: enabled 1
617 06:44:02.459974 PCI: 00:15.1: enabled 1
618 06:44:02.463465 PCI: 00:15.2: enabled 1
619 06:44:02.466689 PCI: 00:15.3: enabled 1
620 06:44:02.467225 PCI: 00:16.0: enabled 1
621 06:44:02.470219 PCI: 00:16.1: enabled 0
622 06:44:02.473706 PCI: 00:16.2: enabled 0
623 06:44:02.474223 PCI: 00:16.3: enabled 0
624 06:44:02.476724 PCI: 00:16.4: enabled 0
625 06:44:02.479951 PCI: 00:16.5: enabled 0
626 06:44:02.483437 PCI: 00:17.0: enabled 1
627 06:44:02.483869 PCI: 00:19.0: enabled 0
628 06:44:02.486706 PCI: 00:19.1: enabled 1
629 06:44:02.489824 PCI: 00:19.2: enabled 0
630 06:44:02.493424 PCI: 00:1c.0: enabled 1
631 06:44:02.493927 PCI: 00:1c.1: enabled 0
632 06:44:02.496755 PCI: 00:1c.2: enabled 0
633 06:44:02.499734 PCI: 00:1c.3: enabled 0
634 06:44:02.503092 PCI: 00:1c.4: enabled 0
635 06:44:02.503629 PCI: 00:1c.5: enabled 0
636 06:44:02.506419 PCI: 00:1c.6: enabled 1
637 06:44:02.509816 PCI: 00:1c.7: enabled 0
638 06:44:02.510247 PCI: 00:1d.0: enabled 1
639 06:44:02.513236 PCI: 00:1d.1: enabled 0
640 06:44:02.516698 PCI: 00:1d.2: enabled 1
641 06:44:02.519818 PCI: 00:1d.3: enabled 0
642 06:44:02.520428 PCI: 00:1e.0: enabled 1
643 06:44:02.523808 PCI: 00:1e.1: enabled 0
644 06:44:02.526770 PCI: 00:1e.2: enabled 1
645 06:44:02.529601 PCI: 00:1e.3: enabled 1
646 06:44:02.530029 PCI: 00:1f.0: enabled 1
647 06:44:02.533212 PCI: 00:1f.1: enabled 0
648 06:44:02.536238 PCI: 00:1f.2: enabled 1
649 06:44:02.539962 PCI: 00:1f.3: enabled 1
650 06:44:02.540383 PCI: 00:1f.4: enabled 0
651 06:44:02.543174 PCI: 00:1f.5: enabled 1
652 06:44:02.546288 PCI: 00:1f.6: enabled 0
653 06:44:02.546706 PCI: 00:1f.7: enabled 0
654 06:44:02.549779 APIC: 00: enabled 1
655 06:44:02.553423 GENERIC: 0.0: enabled 1
656 06:44:02.556188 GENERIC: 0.0: enabled 1
657 06:44:02.556611 GENERIC: 1.0: enabled 1
658 06:44:02.560170 GENERIC: 0.0: enabled 1
659 06:44:02.563067 GENERIC: 1.0: enabled 1
660 06:44:02.563545 USB0 port 0: enabled 1
661 06:44:02.566608 GENERIC: 0.0: enabled 1
662 06:44:02.569929 USB0 port 0: enabled 1
663 06:44:02.573172 GENERIC: 0.0: enabled 1
664 06:44:02.573819 I2C: 00:1a: enabled 1
665 06:44:02.576303 I2C: 00:31: enabled 1
666 06:44:02.580057 I2C: 00:32: enabled 1
667 06:44:02.580600 I2C: 00:10: enabled 1
668 06:44:02.583213 I2C: 00:15: enabled 1
669 06:44:02.586675 GENERIC: 0.0: enabled 0
670 06:44:02.587098 GENERIC: 1.0: enabled 0
671 06:44:02.590001 GENERIC: 0.0: enabled 1
672 06:44:02.593115 SPI: 00: enabled 1
673 06:44:02.593675 SPI: 00: enabled 1
674 06:44:02.596380 PNP: 0c09.0: enabled 1
675 06:44:02.600287 GENERIC: 0.0: enabled 1
676 06:44:02.600711 USB3 port 0: enabled 1
677 06:44:02.603445 USB3 port 1: enabled 1
678 06:44:02.606810 USB3 port 2: enabled 0
679 06:44:02.609973 USB3 port 3: enabled 0
680 06:44:02.610396 USB2 port 0: enabled 0
681 06:44:02.613410 USB2 port 1: enabled 1
682 06:44:02.616350 USB2 port 2: enabled 1
683 06:44:02.616910 USB2 port 3: enabled 0
684 06:44:02.619554 USB2 port 4: enabled 1
685 06:44:02.623341 USB2 port 5: enabled 0
686 06:44:02.626574 USB2 port 6: enabled 0
687 06:44:02.627001 USB2 port 7: enabled 0
688 06:44:02.629884 USB2 port 8: enabled 0
689 06:44:02.633123 USB2 port 9: enabled 0
690 06:44:02.633661 USB3 port 0: enabled 0
691 06:44:02.636448 USB3 port 1: enabled 1
692 06:44:02.639960 USB3 port 2: enabled 0
693 06:44:02.640388 USB3 port 3: enabled 0
694 06:44:02.643015 GENERIC: 0.0: enabled 1
695 06:44:02.646382 GENERIC: 1.0: enabled 1
696 06:44:02.649719 APIC: 01: enabled 1
697 06:44:02.650213 APIC: 05: enabled 1
698 06:44:02.652963 APIC: 07: enabled 1
699 06:44:02.653396 APIC: 02: enabled 1
700 06:44:02.656521 APIC: 04: enabled 1
701 06:44:02.659944 APIC: 06: enabled 1
702 06:44:02.660370 APIC: 03: enabled 1
703 06:44:02.663281 Compare with tree...
704 06:44:02.666570 Root Device: enabled 1
705 06:44:02.667080 DOMAIN: 0000: enabled 1
706 06:44:02.670181 PCI: 00:00.0: enabled 1
707 06:44:02.673238 PCI: 00:02.0: enabled 1
708 06:44:02.677081 PCI: 00:04.0: enabled 1
709 06:44:02.680388 GENERIC: 0.0: enabled 1
710 06:44:02.680811 PCI: 00:05.0: enabled 1
711 06:44:02.683213 PCI: 00:06.0: enabled 0
712 06:44:02.686882 PCI: 00:07.0: enabled 0
713 06:44:02.689658 GENERIC: 0.0: enabled 1
714 06:44:02.693055 PCI: 00:07.1: enabled 0
715 06:44:02.693474 GENERIC: 1.0: enabled 1
716 06:44:02.696411 PCI: 00:07.2: enabled 0
717 06:44:02.699905 GENERIC: 0.0: enabled 1
718 06:44:02.703029 PCI: 00:07.3: enabled 0
719 06:44:02.706678 GENERIC: 1.0: enabled 1
720 06:44:02.707099 PCI: 00:08.0: enabled 1
721 06:44:02.709733 PCI: 00:09.0: enabled 0
722 06:44:02.713745 PCI: 00:0a.0: enabled 0
723 06:44:02.716785 PCI: 00:0d.0: enabled 1
724 06:44:02.719535 USB0 port 0: enabled 1
725 06:44:02.719961 USB3 port 0: enabled 1
726 06:44:02.723054 USB3 port 1: enabled 1
727 06:44:02.726417 USB3 port 2: enabled 0
728 06:44:02.729768 USB3 port 3: enabled 0
729 06:44:02.733341 PCI: 00:0d.1: enabled 0
730 06:44:02.733764 PCI: 00:0d.2: enabled 0
731 06:44:02.736349 GENERIC: 0.0: enabled 1
732 06:44:02.739820 PCI: 00:0d.3: enabled 0
733 06:44:02.743295 PCI: 00:0e.0: enabled 0
734 06:44:02.746295 PCI: 00:10.2: enabled 1
735 06:44:02.746743 PCI: 00:10.6: enabled 0
736 06:44:02.749999 PCI: 00:10.7: enabled 0
737 06:44:02.753270 PCI: 00:12.0: enabled 0
738 06:44:02.757099 PCI: 00:12.6: enabled 0
739 06:44:02.759656 PCI: 00:13.0: enabled 0
740 06:44:02.760086 PCI: 00:14.0: enabled 1
741 06:44:02.763237 USB0 port 0: enabled 1
742 06:44:02.766439 USB2 port 0: enabled 0
743 06:44:02.769696 USB2 port 1: enabled 1
744 06:44:02.773184 USB2 port 2: enabled 1
745 06:44:02.773623 USB2 port 3: enabled 0
746 06:44:02.776542 USB2 port 4: enabled 1
747 06:44:02.779858 USB2 port 5: enabled 0
748 06:44:02.783602 USB2 port 6: enabled 0
749 06:44:02.787186 USB2 port 7: enabled 0
750 06:44:02.790275 USB2 port 8: enabled 0
751 06:44:02.790723 USB2 port 9: enabled 0
752 06:44:02.793502 USB3 port 0: enabled 0
753 06:44:02.796640 USB3 port 1: enabled 1
754 06:44:02.800189 USB3 port 2: enabled 0
755 06:44:02.803118 USB3 port 3: enabled 0
756 06:44:02.803756 PCI: 00:14.1: enabled 0
757 06:44:02.806407 PCI: 00:14.2: enabled 1
758 06:44:02.809791 PCI: 00:14.3: enabled 1
759 06:44:02.812918 GENERIC: 0.0: enabled 1
760 06:44:02.816314 PCI: 00:15.0: enabled 1
761 06:44:02.816773 I2C: 00:1a: enabled 1
762 06:44:02.819580 I2C: 00:31: enabled 1
763 06:44:02.823405 I2C: 00:32: enabled 1
764 06:44:02.826310 PCI: 00:15.1: enabled 1
765 06:44:02.826847 I2C: 00:10: enabled 1
766 06:44:02.830036 PCI: 00:15.2: enabled 1
767 06:44:02.833065 PCI: 00:15.3: enabled 1
768 06:44:02.836265 PCI: 00:16.0: enabled 1
769 06:44:02.840027 PCI: 00:16.1: enabled 0
770 06:44:02.840585 PCI: 00:16.2: enabled 0
771 06:44:02.843216 PCI: 00:16.3: enabled 0
772 06:44:02.846311 PCI: 00:16.4: enabled 0
773 06:44:02.850347 PCI: 00:16.5: enabled 0
774 06:44:02.850877 PCI: 00:17.0: enabled 1
775 06:44:02.854330 PCI: 00:19.0: enabled 0
776 06:44:02.857777 PCI: 00:19.1: enabled 1
777 06:44:02.861255 I2C: 00:15: enabled 1
778 06:44:02.861692 PCI: 00:19.2: enabled 0
779 06:44:02.865017 PCI: 00:1d.0: enabled 1
780 06:44:02.867659 GENERIC: 0.0: enabled 1
781 06:44:02.871044 PCI: 00:1e.0: enabled 1
782 06:44:02.871530 PCI: 00:1e.1: enabled 0
783 06:44:02.874603 PCI: 00:1e.2: enabled 1
784 06:44:02.878185 SPI: 00: enabled 1
785 06:44:02.881584 PCI: 00:1e.3: enabled 1
786 06:44:02.882225 SPI: 00: enabled 1
787 06:44:02.884907 PCI: 00:1f.0: enabled 1
788 06:44:02.887906 PNP: 0c09.0: enabled 1
789 06:44:02.891720 PCI: 00:1f.1: enabled 0
790 06:44:02.894681 PCI: 00:1f.2: enabled 1
791 06:44:02.895253 GENERIC: 0.0: enabled 1
792 06:44:02.898274 GENERIC: 0.0: enabled 1
793 06:44:02.901324 GENERIC: 1.0: enabled 1
794 06:44:02.953800 PCI: 00:1f.3: enabled 1
795 06:44:02.954335 PCI: 00:1f.4: enabled 0
796 06:44:02.954775 PCI: 00:1f.5: enabled 1
797 06:44:02.955242 PCI: 00:1f.6: enabled 0
798 06:44:02.955686 PCI: 00:1f.7: enabled 0
799 06:44:02.956027 CPU_CLUSTER: 0: enabled 1
800 06:44:02.956327 APIC: 00: enabled 1
801 06:44:02.956975 APIC: 01: enabled 1
802 06:44:02.957297 APIC: 05: enabled 1
803 06:44:02.957589 APIC: 07: enabled 1
804 06:44:02.957870 APIC: 02: enabled 1
805 06:44:02.958150 APIC: 04: enabled 1
806 06:44:02.958428 APIC: 06: enabled 1
807 06:44:02.958772 APIC: 03: enabled 1
808 06:44:02.959190 Root Device scanning...
809 06:44:02.959688 scan_static_bus for Root Device
810 06:44:02.960093 DOMAIN: 0000 enabled
811 06:44:02.960480 CPU_CLUSTER: 0 enabled
812 06:44:02.960867 DOMAIN: 0000 scanning...
813 06:44:02.961260 PCI: pci_scan_bus for bus 00
814 06:44:02.961770 PCI: 00:00.0 [8086/0000] ops
815 06:44:02.962135 PCI: 00:00.0 [8086/9a12] enabled
816 06:44:02.963187 PCI: 00:02.0 [8086/0000] bus ops
817 06:44:02.966860 PCI: 00:02.0 [8086/9a40] enabled
818 06:44:02.970734 PCI: 00:04.0 [8086/0000] bus ops
819 06:44:02.973948 PCI: 00:04.0 [8086/9a03] enabled
820 06:44:02.976954 PCI: 00:05.0 [8086/9a19] enabled
821 06:44:02.980120 PCI: 00:07.0 [0000/0000] hidden
822 06:44:02.983769 PCI: 00:08.0 [8086/9a11] enabled
823 06:44:02.986629 PCI: 00:0a.0 [8086/9a0d] disabled
824 06:44:02.989920 PCI: 00:0d.0 [8086/0000] bus ops
825 06:44:02.993658 PCI: 00:0d.0 [8086/9a13] enabled
826 06:44:02.996806 PCI: 00:14.0 [8086/0000] bus ops
827 06:44:03.000110 PCI: 00:14.0 [8086/a0ed] enabled
828 06:44:03.003426 PCI: 00:14.2 [8086/a0ef] enabled
829 06:44:03.006678 PCI: 00:14.3 [8086/0000] bus ops
830 06:44:03.010093 PCI: 00:14.3 [8086/a0f0] enabled
831 06:44:03.013197 PCI: 00:15.0 [8086/0000] bus ops
832 06:44:03.016911 PCI: 00:15.0 [8086/a0e8] enabled
833 06:44:03.020261 PCI: 00:15.1 [8086/0000] bus ops
834 06:44:03.023740 PCI: 00:15.1 [8086/a0e9] enabled
835 06:44:03.026602 PCI: 00:15.2 [8086/0000] bus ops
836 06:44:03.030572 PCI: 00:15.2 [8086/a0ea] enabled
837 06:44:03.033662 PCI: 00:15.3 [8086/0000] bus ops
838 06:44:03.036465 PCI: 00:15.3 [8086/a0eb] enabled
839 06:44:03.040250 PCI: 00:16.0 [8086/0000] ops
840 06:44:03.043579 PCI: 00:16.0 [8086/a0e0] enabled
841 06:44:03.047027 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 06:44:03.049947 PCI: 00:19.0 [8086/0000] bus ops
843 06:44:03.054048 PCI: 00:19.0 [8086/a0c5] disabled
844 06:44:03.056932 PCI: 00:19.1 [8086/0000] bus ops
845 06:44:03.060280 PCI: 00:19.1 [8086/a0c6] enabled
846 06:44:03.063897 PCI: 00:1d.0 [8086/0000] bus ops
847 06:44:03.067564 PCI: 00:1d.0 [8086/a0b0] enabled
848 06:44:03.070671 PCI: 00:1e.0 [8086/0000] ops
849 06:44:03.074041 PCI: 00:1e.0 [8086/a0a8] enabled
850 06:44:03.077414 PCI: 00:1e.2 [8086/0000] bus ops
851 06:44:03.080117 PCI: 00:1e.2 [8086/a0aa] enabled
852 06:44:03.083798 PCI: 00:1e.3 [8086/0000] bus ops
853 06:44:03.086668 PCI: 00:1e.3 [8086/a0ab] enabled
854 06:44:03.090337 PCI: 00:1f.0 [8086/0000] bus ops
855 06:44:03.093866 PCI: 00:1f.0 [8086/a087] enabled
856 06:44:03.097172 RTC Init
857 06:44:03.100177 Set power on after power failure.
858 06:44:03.100610 Disabling Deep S3
859 06:44:03.103738 Disabling Deep S3
860 06:44:03.104156 Disabling Deep S4
861 06:44:03.107080 Disabling Deep S4
862 06:44:03.107642 Disabling Deep S5
863 06:44:03.110285 Disabling Deep S5
864 06:44:03.113551 PCI: 00:1f.2 [0000/0000] hidden
865 06:44:03.116985 PCI: 00:1f.3 [8086/0000] bus ops
866 06:44:03.120118 PCI: 00:1f.3 [8086/a0c8] enabled
867 06:44:03.123761 PCI: 00:1f.5 [8086/0000] bus ops
868 06:44:03.126946 PCI: 00:1f.5 [8086/a0a4] enabled
869 06:44:03.130447 PCI: Leftover static devices:
870 06:44:03.130915 PCI: 00:10.2
871 06:44:03.133731 PCI: 00:10.6
872 06:44:03.134347 PCI: 00:10.7
873 06:44:03.137007 PCI: 00:06.0
874 06:44:03.137469 PCI: 00:07.1
875 06:44:03.137883 PCI: 00:07.2
876 06:44:03.140169 PCI: 00:07.3
877 06:44:03.140602 PCI: 00:09.0
878 06:44:03.144077 PCI: 00:0d.1
879 06:44:03.144560 PCI: 00:0d.2
880 06:44:03.144899 PCI: 00:0d.3
881 06:44:03.147649 PCI: 00:0e.0
882 06:44:03.148072 PCI: 00:12.0
883 06:44:03.150000 PCI: 00:12.6
884 06:44:03.150418 PCI: 00:13.0
885 06:44:03.150751 PCI: 00:14.1
886 06:44:03.153773 PCI: 00:16.1
887 06:44:03.154345 PCI: 00:16.2
888 06:44:03.157027 PCI: 00:16.3
889 06:44:03.157558 PCI: 00:16.4
890 06:44:03.160362 PCI: 00:16.5
891 06:44:03.160907 PCI: 00:17.0
892 06:44:03.161247 PCI: 00:19.2
893 06:44:03.163560 PCI: 00:1e.1
894 06:44:03.164073 PCI: 00:1f.1
895 06:44:03.167009 PCI: 00:1f.4
896 06:44:03.167607 PCI: 00:1f.6
897 06:44:03.167954 PCI: 00:1f.7
898 06:44:03.170333 PCI: Check your devicetree.cb.
899 06:44:03.173946 PCI: 00:02.0 scanning...
900 06:44:03.177218 scan_generic_bus for PCI: 00:02.0
901 06:44:03.180658 scan_generic_bus for PCI: 00:02.0 done
902 06:44:03.187453 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 06:44:03.190332 PCI: 00:04.0 scanning...
904 06:44:03.194097 scan_generic_bus for PCI: 00:04.0
905 06:44:03.194519 GENERIC: 0.0 enabled
906 06:44:03.200152 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 06:44:03.207830 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 06:44:03.208260 PCI: 00:0d.0 scanning...
909 06:44:03.210607 scan_static_bus for PCI: 00:0d.0
910 06:44:03.213645 USB0 port 0 enabled
911 06:44:03.217012 USB0 port 0 scanning...
912 06:44:03.220471 scan_static_bus for USB0 port 0
913 06:44:03.220983 USB3 port 0 enabled
914 06:44:03.223798 USB3 port 1 enabled
915 06:44:03.227223 USB3 port 2 disabled
916 06:44:03.227705 USB3 port 3 disabled
917 06:44:03.230705 USB3 port 0 scanning...
918 06:44:03.233675 scan_static_bus for USB3 port 0
919 06:44:03.237452 scan_static_bus for USB3 port 0 done
920 06:44:03.243817 scan_bus: bus USB3 port 0 finished in 6 msecs
921 06:44:03.244263 USB3 port 1 scanning...
922 06:44:03.246934 scan_static_bus for USB3 port 1
923 06:44:03.250164 scan_static_bus for USB3 port 1 done
924 06:44:03.256890 scan_bus: bus USB3 port 1 finished in 6 msecs
925 06:44:03.260142 scan_static_bus for USB0 port 0 done
926 06:44:03.263951 scan_bus: bus USB0 port 0 finished in 43 msecs
927 06:44:03.267020 scan_static_bus for PCI: 00:0d.0 done
928 06:44:03.273839 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 06:44:03.276971 PCI: 00:14.0 scanning...
930 06:44:03.280413 scan_static_bus for PCI: 00:14.0
931 06:44:03.280941 USB0 port 0 enabled
932 06:44:03.283492 USB0 port 0 scanning...
933 06:44:03.286855 scan_static_bus for USB0 port 0
934 06:44:03.290742 USB2 port 0 disabled
935 06:44:03.291343 USB2 port 1 enabled
936 06:44:03.293781 USB2 port 2 enabled
937 06:44:03.296916 USB2 port 3 disabled
938 06:44:03.297469 USB2 port 4 enabled
939 06:44:03.300477 USB2 port 5 disabled
940 06:44:03.303691 USB2 port 6 disabled
941 06:44:03.304235 USB2 port 7 disabled
942 06:44:03.306841 USB2 port 8 disabled
943 06:44:03.307258 USB2 port 9 disabled
944 06:44:03.310583 USB3 port 0 disabled
945 06:44:03.313486 USB3 port 1 enabled
946 06:44:03.313907 USB3 port 2 disabled
947 06:44:03.316778 USB3 port 3 disabled
948 06:44:03.320276 USB2 port 1 scanning...
949 06:44:03.324134 scan_static_bus for USB2 port 1
950 06:44:03.327080 scan_static_bus for USB2 port 1 done
951 06:44:03.330303 scan_bus: bus USB2 port 1 finished in 6 msecs
952 06:44:03.333660 USB2 port 2 scanning...
953 06:44:03.337236 scan_static_bus for USB2 port 2
954 06:44:03.340331 scan_static_bus for USB2 port 2 done
955 06:44:03.346891 scan_bus: bus USB2 port 2 finished in 6 msecs
956 06:44:03.347481 USB2 port 4 scanning...
957 06:44:03.350424 scan_static_bus for USB2 port 4
958 06:44:03.353883 scan_static_bus for USB2 port 4 done
959 06:44:03.360468 scan_bus: bus USB2 port 4 finished in 6 msecs
960 06:44:03.363650 USB3 port 1 scanning...
961 06:44:03.366935 scan_static_bus for USB3 port 1
962 06:44:03.370186 scan_static_bus for USB3 port 1 done
963 06:44:03.374065 scan_bus: bus USB3 port 1 finished in 6 msecs
964 06:44:03.377200 scan_static_bus for USB0 port 0 done
965 06:44:03.384022 scan_bus: bus USB0 port 0 finished in 93 msecs
966 06:44:03.387123 scan_static_bus for PCI: 00:14.0 done
967 06:44:03.390644 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
968 06:44:03.393791 PCI: 00:14.3 scanning...
969 06:44:03.397373 scan_static_bus for PCI: 00:14.3
970 06:44:03.400633 GENERIC: 0.0 enabled
971 06:44:03.403870 scan_static_bus for PCI: 00:14.3 done
972 06:44:03.407074 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 06:44:03.410615 PCI: 00:15.0 scanning...
974 06:44:03.414112 scan_static_bus for PCI: 00:15.0
975 06:44:03.417608 I2C: 00:1a enabled
976 06:44:03.418028 I2C: 00:31 enabled
977 06:44:03.420273 I2C: 00:32 enabled
978 06:44:03.423551 scan_static_bus for PCI: 00:15.0 done
979 06:44:03.427760 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
980 06:44:03.431836 PCI: 00:15.1 scanning...
981 06:44:03.435046 scan_static_bus for PCI: 00:15.1
982 06:44:03.435510 I2C: 00:10 enabled
983 06:44:03.442132 scan_static_bus for PCI: 00:15.1 done
984 06:44:03.445524 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 06:44:03.448696 PCI: 00:15.2 scanning...
986 06:44:03.452013 scan_static_bus for PCI: 00:15.2
987 06:44:03.455498 scan_static_bus for PCI: 00:15.2 done
988 06:44:03.458669 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 06:44:03.462410 PCI: 00:15.3 scanning...
990 06:44:03.465434 scan_static_bus for PCI: 00:15.3
991 06:44:03.468759 scan_static_bus for PCI: 00:15.3 done
992 06:44:03.475255 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 06:44:03.475816 PCI: 00:19.1 scanning...
994 06:44:03.478312 scan_static_bus for PCI: 00:19.1
995 06:44:03.481649 I2C: 00:15 enabled
996 06:44:03.485929 scan_static_bus for PCI: 00:19.1 done
997 06:44:03.492670 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 06:44:03.493189 PCI: 00:1d.0 scanning...
999 06:44:03.499069 do_pci_scan_bridge for PCI: 00:1d.0
1000 06:44:03.499630 PCI: pci_scan_bus for bus 01
1001 06:44:03.502259 PCI: 01:00.0 [1c5c/174a] enabled
1002 06:44:03.505709 GENERIC: 0.0 enabled
1003 06:44:03.509365 Enabling Common Clock Configuration
1004 06:44:03.511785 L1 Sub-State supported from root port 29
1005 06:44:03.515342 L1 Sub-State Support = 0xf
1006 06:44:03.518546 CommonModeRestoreTime = 0x28
1007 06:44:03.525440 Power On Value = 0x16, Power On Scale = 0x0
1008 06:44:03.525965 ASPM: Enabled L1
1009 06:44:03.528355 PCIe: Max_Payload_Size adjusted to 128
1010 06:44:03.535183 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 06:44:03.535664 PCI: 00:1e.2 scanning...
1012 06:44:03.542111 scan_generic_bus for PCI: 00:1e.2
1013 06:44:03.542643 SPI: 00 enabled
1014 06:44:03.548825 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 06:44:03.551998 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 06:44:03.555262 PCI: 00:1e.3 scanning...
1017 06:44:03.559030 scan_generic_bus for PCI: 00:1e.3
1018 06:44:03.561961 SPI: 00 enabled
1019 06:44:03.565531 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 06:44:03.572089 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 06:44:03.575455 PCI: 00:1f.0 scanning...
1022 06:44:03.579154 scan_static_bus for PCI: 00:1f.0
1023 06:44:03.579871 PNP: 0c09.0 enabled
1024 06:44:03.582258 PNP: 0c09.0 scanning...
1025 06:44:03.585322 scan_static_bus for PNP: 0c09.0
1026 06:44:03.588459 scan_static_bus for PNP: 0c09.0 done
1027 06:44:03.595666 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 06:44:03.598950 scan_static_bus for PCI: 00:1f.0 done
1029 06:44:03.601891 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 06:44:03.605177 PCI: 00:1f.2 scanning...
1031 06:44:03.608787 scan_static_bus for PCI: 00:1f.2
1032 06:44:03.611782 GENERIC: 0.0 enabled
1033 06:44:03.612373 GENERIC: 0.0 scanning...
1034 06:44:03.615955 scan_static_bus for GENERIC: 0.0
1035 06:44:03.618644 GENERIC: 0.0 enabled
1036 06:44:03.621910 GENERIC: 1.0 enabled
1037 06:44:03.625435 scan_static_bus for GENERIC: 0.0 done
1038 06:44:03.628702 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 06:44:03.632065 scan_static_bus for PCI: 00:1f.2 done
1040 06:44:03.638790 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 06:44:03.642179 PCI: 00:1f.3 scanning...
1042 06:44:03.645278 scan_static_bus for PCI: 00:1f.3
1043 06:44:03.648965 scan_static_bus for PCI: 00:1f.3 done
1044 06:44:03.652541 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 06:44:03.655453 PCI: 00:1f.5 scanning...
1046 06:44:03.658877 scan_generic_bus for PCI: 00:1f.5
1047 06:44:03.662046 scan_generic_bus for PCI: 00:1f.5 done
1048 06:44:03.668856 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 06:44:03.672261 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1050 06:44:03.675531 scan_static_bus for Root Device done
1051 06:44:03.682308 scan_bus: bus Root Device finished in 737 msecs
1052 06:44:03.682817 done
1053 06:44:03.688889 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1054 06:44:03.692679 Chrome EC: UHEPI supported
1055 06:44:03.698639 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 06:44:03.702506 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 06:44:03.705876 SPI flash protection: WPSW=0 SRP0=0
1058 06:44:03.712623 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 06:44:03.718845 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 06:44:03.719435 found VGA at PCI: 00:02.0
1061 06:44:03.722542 Setting up VGA for PCI: 00:02.0
1062 06:44:03.728968 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 06:44:03.732759 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 06:44:03.735819 Allocating resources...
1065 06:44:03.738783 Reading resources...
1066 06:44:03.742483 Root Device read_resources bus 0 link: 0
1067 06:44:03.745993 DOMAIN: 0000 read_resources bus 0 link: 0
1068 06:44:03.753099 PCI: 00:04.0 read_resources bus 1 link: 0
1069 06:44:03.755854 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 06:44:03.763174 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 06:44:03.766519 USB0 port 0 read_resources bus 0 link: 0
1072 06:44:03.772993 USB0 port 0 read_resources bus 0 link: 0 done
1073 06:44:03.776809 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 06:44:03.779958 PCI: 00:14.0 read_resources bus 0 link: 0
1075 06:44:03.786943 USB0 port 0 read_resources bus 0 link: 0
1076 06:44:03.790037 USB0 port 0 read_resources bus 0 link: 0 done
1077 06:44:03.797167 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 06:44:03.799936 PCI: 00:14.3 read_resources bus 0 link: 0
1079 06:44:03.806832 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 06:44:03.809865 PCI: 00:15.0 read_resources bus 0 link: 0
1081 06:44:03.816568 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 06:44:03.820394 PCI: 00:15.1 read_resources bus 0 link: 0
1083 06:44:03.826862 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 06:44:03.830876 PCI: 00:19.1 read_resources bus 0 link: 0
1085 06:44:03.837105 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 06:44:03.840544 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 06:44:03.847297 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 06:44:03.850575 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 06:44:03.857292 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 06:44:03.860100 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 06:44:03.867737 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 06:44:03.870532 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 06:44:03.876758 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 06:44:03.880226 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 06:44:03.883593 GENERIC: 0.0 read_resources bus 0 link: 0
1096 06:44:03.890300 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 06:44:03.893957 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 06:44:03.901236 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 06:44:03.904853 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 06:44:03.911214 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 06:44:03.915160 Root Device read_resources bus 0 link: 0 done
1102 06:44:03.917638 Done reading resources.
1103 06:44:03.924543 Show resources in subtree (Root Device)...After reading.
1104 06:44:03.927925 Root Device child on link 0 DOMAIN: 0000
1105 06:44:03.931006 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 06:44:03.941295 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 06:44:03.951125 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 06:44:03.951608 PCI: 00:00.0
1109 06:44:03.961530 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 06:44:03.971339 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 06:44:03.981594 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 06:44:03.991886 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 06:44:04.001699 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 06:44:04.008242 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 06:44:04.017968 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 06:44:04.028472 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 06:44:04.038384 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 06:44:04.048339 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 06:44:04.055260 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 06:44:04.064649 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 06:44:04.075582 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 06:44:04.085174 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 06:44:04.091780 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 06:44:04.101672 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 06:44:04.111962 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 06:44:04.121774 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 06:44:04.131459 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 06:44:04.141662 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 06:44:04.142109 PCI: 00:02.0
1130 06:44:04.151739 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 06:44:04.164759 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 06:44:04.171830 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 06:44:04.177917 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 06:44:04.188373 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 06:44:04.188940 GENERIC: 0.0
1136 06:44:04.191649 PCI: 00:05.0
1137 06:44:04.200924 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 06:44:04.204676 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 06:44:04.207854 GENERIC: 0.0
1140 06:44:04.208416 PCI: 00:08.0
1141 06:44:04.217940 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 06:44:04.221070 PCI: 00:0a.0
1143 06:44:04.224398 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 06:44:04.234281 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 06:44:04.238189 USB0 port 0 child on link 0 USB3 port 0
1146 06:44:04.241285 USB3 port 0
1147 06:44:04.241699 USB3 port 1
1148 06:44:04.243958 USB3 port 2
1149 06:44:04.244372 USB3 port 3
1150 06:44:04.251250 PCI: 00:14.0 child on link 0 USB0 port 0
1151 06:44:04.260910 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 06:44:04.264270 USB0 port 0 child on link 0 USB2 port 0
1153 06:44:04.267759 USB2 port 0
1154 06:44:04.268294 USB2 port 1
1155 06:44:04.271585 USB2 port 2
1156 06:44:04.272136 USB2 port 3
1157 06:44:04.274564 USB2 port 4
1158 06:44:04.275126 USB2 port 5
1159 06:44:04.278196 USB2 port 6
1160 06:44:04.278780 USB2 port 7
1161 06:44:04.281290 USB2 port 8
1162 06:44:04.281849 USB2 port 9
1163 06:44:04.284637 USB3 port 0
1164 06:44:04.285100 USB3 port 1
1165 06:44:04.288118 USB3 port 2
1166 06:44:04.288717 USB3 port 3
1167 06:44:04.291266 PCI: 00:14.2
1168 06:44:04.301160 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 06:44:04.311145 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 06:44:04.314589 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 06:44:04.324269 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 06:44:04.327463 GENERIC: 0.0
1173 06:44:04.330803 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 06:44:04.340885 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 06:44:04.344262 I2C: 00:1a
1176 06:44:04.344694 I2C: 00:31
1177 06:44:04.347824 I2C: 00:32
1178 06:44:04.350655 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 06:44:04.360784 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 06:44:04.361386 I2C: 00:10
1181 06:44:04.364902 PCI: 00:15.2
1182 06:44:04.375138 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 06:44:04.375759 PCI: 00:15.3
1184 06:44:04.384540 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 06:44:04.387531 PCI: 00:16.0
1186 06:44:04.397661 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 06:44:04.398219 PCI: 00:19.0
1188 06:44:04.403798 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 06:44:04.414092 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 06:44:04.414664 I2C: 00:15
1191 06:44:04.417385 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 06:44:04.428016 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 06:44:04.437283 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 06:44:04.447674 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 06:44:04.448204 GENERIC: 0.0
1196 06:44:04.450817 PCI: 01:00.0
1197 06:44:04.460415 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 06:44:04.470447 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1199 06:44:04.477271 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1200 06:44:04.480314 PCI: 00:1e.0
1201 06:44:04.490411 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1202 06:44:04.493666 PCI: 00:1e.2 child on link 0 SPI: 00
1203 06:44:04.503621 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 06:44:04.507143 SPI: 00
1205 06:44:04.511053 PCI: 00:1e.3 child on link 0 SPI: 00
1206 06:44:04.520191 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 06:44:04.520944 SPI: 00
1208 06:44:04.527021 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1209 06:44:04.533825 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1210 06:44:04.537256 PNP: 0c09.0
1211 06:44:04.543982 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1212 06:44:04.550575 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1213 06:44:04.560287 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1214 06:44:04.567065 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1215 06:44:04.573432 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1216 06:44:04.573987 GENERIC: 0.0
1217 06:44:04.576652 GENERIC: 1.0
1218 06:44:04.577106 PCI: 00:1f.3
1219 06:44:04.586727 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 06:44:04.596470 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1221 06:44:04.599991 PCI: 00:1f.5
1222 06:44:04.610486 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1223 06:44:04.613804 CPU_CLUSTER: 0 child on link 0 APIC: 00
1224 06:44:04.614405 APIC: 00
1225 06:44:04.616769 APIC: 01
1226 06:44:04.617230 APIC: 05
1227 06:44:04.620612 APIC: 07
1228 06:44:04.621277 APIC: 02
1229 06:44:04.621677 APIC: 04
1230 06:44:04.623315 APIC: 06
1231 06:44:04.623828 APIC: 03
1232 06:44:04.630386 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1233 06:44:04.636837 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1234 06:44:04.643848 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1235 06:44:04.650069 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1236 06:44:04.654035 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1237 06:44:04.656732 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1238 06:44:04.660319 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1239 06:44:04.670515 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1240 06:44:04.676615 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1241 06:44:04.683534 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1242 06:44:04.690529 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1243 06:44:04.697303 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1244 06:44:04.703846 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 06:44:04.714145 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1246 06:44:04.720225 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1247 06:44:04.723634 DOMAIN: 0000: Resource ranges:
1248 06:44:04.726814 * Base: 1000, Size: 800, Tag: 100
1249 06:44:04.730631 * Base: 1900, Size: e700, Tag: 100
1250 06:44:04.736923 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1251 06:44:04.743561 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1252 06:44:04.750949 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1253 06:44:04.756965 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1254 06:44:04.763903 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1255 06:44:04.773649 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1256 06:44:04.780754 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1257 06:44:04.787557 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1258 06:44:04.794339 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1259 06:44:04.804270 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1260 06:44:04.810619 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1261 06:44:04.817391 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1262 06:44:04.827074 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1263 06:44:04.833877 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1264 06:44:04.840517 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1265 06:44:04.850345 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1266 06:44:04.857691 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1267 06:44:04.863796 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1268 06:44:04.873771 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1269 06:44:04.880733 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1270 06:44:04.887042 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1271 06:44:04.897090 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1272 06:44:04.903669 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1273 06:44:04.910185 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1274 06:44:04.916840 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1275 06:44:04.920190 DOMAIN: 0000: Resource ranges:
1276 06:44:04.926659 * Base: 7fc00000, Size: 40400000, Tag: 200
1277 06:44:04.930149 * Base: d0000000, Size: 28000000, Tag: 200
1278 06:44:04.933867 * Base: fa000000, Size: 1000000, Tag: 200
1279 06:44:04.940357 * Base: fb001000, Size: 2fff000, Tag: 200
1280 06:44:04.943869 * Base: fe010000, Size: 2e000, Tag: 200
1281 06:44:04.947025 * Base: fe03f000, Size: d41000, Tag: 200
1282 06:44:04.950492 * Base: fed88000, Size: 8000, Tag: 200
1283 06:44:04.957102 * Base: fed93000, Size: d000, Tag: 200
1284 06:44:04.960670 * Base: feda2000, Size: 1e000, Tag: 200
1285 06:44:04.963818 * Base: fede0000, Size: 1220000, Tag: 200
1286 06:44:04.969972 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1287 06:44:04.976651 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1288 06:44:04.983968 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1289 06:44:04.990399 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1290 06:44:04.996935 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1291 06:44:05.003516 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1292 06:44:05.010332 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1293 06:44:05.017041 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1294 06:44:05.023708 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1295 06:44:05.030345 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1296 06:44:05.036838 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1297 06:44:05.043766 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1298 06:44:05.050057 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1299 06:44:05.057090 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1300 06:44:05.063511 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1301 06:44:05.070492 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1302 06:44:05.076949 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1303 06:44:05.080559 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1304 06:44:05.087110 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1305 06:44:05.093760 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1306 06:44:05.100525 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1307 06:44:05.106753 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1308 06:44:05.113852 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1309 06:44:05.123643 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1310 06:44:05.130081 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1311 06:44:05.133770 PCI: 00:1d.0: Resource ranges:
1312 06:44:05.136855 * Base: 7fc00000, Size: 100000, Tag: 200
1313 06:44:05.143700 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1314 06:44:05.150338 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1315 06:44:05.156648 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1316 06:44:05.166790 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1317 06:44:05.173773 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1318 06:44:05.177072 Root Device assign_resources, bus 0 link: 0
1319 06:44:05.183763 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 06:44:05.190273 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1321 06:44:05.200220 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1322 06:44:05.206889 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1323 06:44:05.216958 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1324 06:44:05.220231 PCI: 00:04.0 assign_resources, bus 1 link: 0
1325 06:44:05.223522 PCI: 00:04.0 assign_resources, bus 1 link: 0
1326 06:44:05.233669 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1327 06:44:05.240290 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1328 06:44:05.250859 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1329 06:44:05.254028 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1330 06:44:05.256997 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1331 06:44:05.267666 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1332 06:44:05.270206 PCI: 00:14.0 assign_resources, bus 0 link: 0
1333 06:44:05.277331 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 06:44:05.283715 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1335 06:44:05.293425 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1336 06:44:05.300353 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1337 06:44:05.303521 PCI: 00:14.3 assign_resources, bus 0 link: 0
1338 06:44:05.310281 PCI: 00:14.3 assign_resources, bus 0 link: 0
1339 06:44:05.317077 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1340 06:44:05.324172 PCI: 00:15.0 assign_resources, bus 0 link: 0
1341 06:44:05.327123 PCI: 00:15.0 assign_resources, bus 0 link: 0
1342 06:44:05.334040 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1343 06:44:05.340402 PCI: 00:15.1 assign_resources, bus 0 link: 0
1344 06:44:05.343839 PCI: 00:15.1 assign_resources, bus 0 link: 0
1345 06:44:05.353645 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1346 06:44:05.361208 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1347 06:44:05.370397 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1348 06:44:05.376909 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1349 06:44:05.383845 PCI: 00:19.1 assign_resources, bus 0 link: 0
1350 06:44:05.387141 PCI: 00:19.1 assign_resources, bus 0 link: 0
1351 06:44:05.397116 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1352 06:44:05.407293 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 06:44:05.413758 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1354 06:44:05.420223 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 06:44:05.426876 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1356 06:44:05.433740 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1357 06:44:05.443194 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1358 06:44:05.446715 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 06:44:05.456424 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1360 06:44:05.460200 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1361 06:44:05.463708 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1362 06:44:05.473181 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1363 06:44:05.476613 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1364 06:44:05.483372 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1365 06:44:05.486476 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 06:44:05.493218 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1367 06:44:05.496449 LPC: Trying to open IO window from 800 size 1ff
1368 06:44:05.506930 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1369 06:44:05.513342 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1370 06:44:05.520254 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1371 06:44:05.527093 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 06:44:05.529854 Root Device assign_resources, bus 0 link: 0
1373 06:44:05.533344 Done setting resources.
1374 06:44:05.540326 Show resources in subtree (Root Device)...After assigning values.
1375 06:44:05.543612 Root Device child on link 0 DOMAIN: 0000
1376 06:44:05.546707 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1377 06:44:05.556917 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1378 06:44:05.567318 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1379 06:44:05.570026 PCI: 00:00.0
1380 06:44:05.580383 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1381 06:44:05.586975 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1382 06:44:05.596709 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1383 06:44:05.606885 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1384 06:44:05.616907 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1385 06:44:05.627094 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1386 06:44:05.633806 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1387 06:44:05.643546 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1388 06:44:05.653475 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1389 06:44:05.663357 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1390 06:44:05.673447 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1391 06:44:05.682929 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1392 06:44:05.690087 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1393 06:44:05.699964 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1394 06:44:05.710245 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1395 06:44:05.719672 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1396 06:44:05.729911 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1397 06:44:05.739603 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1398 06:44:05.746756 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1399 06:44:05.756233 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1400 06:44:05.759949 PCI: 00:02.0
1401 06:44:05.769615 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1402 06:44:05.779822 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1403 06:44:05.789784 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1404 06:44:05.792963 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1405 06:44:05.803057 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1406 06:44:05.806608 GENERIC: 0.0
1407 06:44:05.806690 PCI: 00:05.0
1408 06:44:05.820292 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1409 06:44:05.823093 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1410 06:44:05.823174 GENERIC: 0.0
1411 06:44:05.827195 PCI: 00:08.0
1412 06:44:05.836667 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1413 06:44:05.839586 PCI: 00:0a.0
1414 06:44:05.843214 PCI: 00:0d.0 child on link 0 USB0 port 0
1415 06:44:05.853292 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1416 06:44:05.856636 USB0 port 0 child on link 0 USB3 port 0
1417 06:44:05.859837 USB3 port 0
1418 06:44:05.859919 USB3 port 1
1419 06:44:05.863009 USB3 port 2
1420 06:44:05.863089 USB3 port 3
1421 06:44:05.870145 PCI: 00:14.0 child on link 0 USB0 port 0
1422 06:44:05.879782 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1423 06:44:05.883399 USB0 port 0 child on link 0 USB2 port 0
1424 06:44:05.886653 USB2 port 0
1425 06:44:05.886733 USB2 port 1
1426 06:44:05.890153 USB2 port 2
1427 06:44:05.890231 USB2 port 3
1428 06:44:05.893453 USB2 port 4
1429 06:44:05.893534 USB2 port 5
1430 06:44:05.896589 USB2 port 6
1431 06:44:05.896661 USB2 port 7
1432 06:44:05.900250 USB2 port 8
1433 06:44:05.903574 USB2 port 9
1434 06:44:05.903647 USB3 port 0
1435 06:44:05.906484 USB3 port 1
1436 06:44:05.906556 USB3 port 2
1437 06:44:05.910040 USB3 port 3
1438 06:44:05.910121 PCI: 00:14.2
1439 06:44:05.920097 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1440 06:44:05.929680 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1441 06:44:05.936764 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1442 06:44:05.946245 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1443 06:44:05.946356 GENERIC: 0.0
1444 06:44:05.953364 PCI: 00:15.0 child on link 0 I2C: 00:1a
1445 06:44:05.963028 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1446 06:44:05.963106 I2C: 00:1a
1447 06:44:05.966762 I2C: 00:31
1448 06:44:05.966837 I2C: 00:32
1449 06:44:05.969766 PCI: 00:15.1 child on link 0 I2C: 00:10
1450 06:44:05.983173 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1451 06:44:05.983283 I2C: 00:10
1452 06:44:05.986568 PCI: 00:15.2
1453 06:44:05.996540 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1454 06:44:05.996616 PCI: 00:15.3
1455 06:44:06.006605 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1456 06:44:06.009922 PCI: 00:16.0
1457 06:44:06.019673 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1458 06:44:06.019789 PCI: 00:19.0
1459 06:44:06.026442 PCI: 00:19.1 child on link 0 I2C: 00:15
1460 06:44:06.036375 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1461 06:44:06.036459 I2C: 00:15
1462 06:44:06.043073 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1463 06:44:06.049562 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1464 06:44:06.062958 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1465 06:44:06.073173 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1466 06:44:06.073252 GENERIC: 0.0
1467 06:44:06.077071 PCI: 01:00.0
1468 06:44:06.086654 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1469 06:44:06.096397 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1470 06:44:06.106379 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1471 06:44:06.110181 PCI: 00:1e.0
1472 06:44:06.120124 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1473 06:44:06.123432 PCI: 00:1e.2 child on link 0 SPI: 00
1474 06:44:06.133247 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1475 06:44:06.136693 SPI: 00
1476 06:44:06.140009 PCI: 00:1e.3 child on link 0 SPI: 00
1477 06:44:06.150098 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1478 06:44:06.153224 SPI: 00
1479 06:44:06.157223 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1480 06:44:06.163459 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1481 06:44:06.167197 PNP: 0c09.0
1482 06:44:06.176826 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1483 06:44:06.180031 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1484 06:44:06.190060 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 06:44:06.199909 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1486 06:44:06.203126 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1487 06:44:06.203200 GENERIC: 0.0
1488 06:44:06.206529 GENERIC: 1.0
1489 06:44:06.210205 PCI: 00:1f.3
1490 06:44:06.220487 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1491 06:44:06.230534 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1492 06:44:06.230626 PCI: 00:1f.5
1493 06:44:06.240111 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1494 06:44:06.246953 CPU_CLUSTER: 0 child on link 0 APIC: 00
1495 06:44:06.247055 APIC: 00
1496 06:44:06.247153 APIC: 01
1497 06:44:06.250443 APIC: 05
1498 06:44:06.250522 APIC: 07
1499 06:44:06.250583 APIC: 02
1500 06:44:06.253537 APIC: 04
1501 06:44:06.253639 APIC: 06
1502 06:44:06.256901 APIC: 03
1503 06:44:06.256974 Done allocating resources.
1504 06:44:06.263633 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1505 06:44:06.270214 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1506 06:44:06.273599 Configure GPIOs for I2S audio on UP4.
1507 06:44:06.281107 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1508 06:44:06.284504 Enabling resources...
1509 06:44:06.287447 PCI: 00:00.0 subsystem <- 8086/9a12
1510 06:44:06.291220 PCI: 00:00.0 cmd <- 06
1511 06:44:06.294044 PCI: 00:02.0 subsystem <- 8086/9a40
1512 06:44:06.298101 PCI: 00:02.0 cmd <- 03
1513 06:44:06.300941 PCI: 00:04.0 subsystem <- 8086/9a03
1514 06:44:06.301014 PCI: 00:04.0 cmd <- 02
1515 06:44:06.307898 PCI: 00:05.0 subsystem <- 8086/9a19
1516 06:44:06.307982 PCI: 00:05.0 cmd <- 02
1517 06:44:06.311455 PCI: 00:08.0 subsystem <- 8086/9a11
1518 06:44:06.314572 PCI: 00:08.0 cmd <- 06
1519 06:44:06.318053 PCI: 00:0d.0 subsystem <- 8086/9a13
1520 06:44:06.320928 PCI: 00:0d.0 cmd <- 02
1521 06:44:06.324799 PCI: 00:14.0 subsystem <- 8086/a0ed
1522 06:44:06.327664 PCI: 00:14.0 cmd <- 02
1523 06:44:06.331183 PCI: 00:14.2 subsystem <- 8086/a0ef
1524 06:44:06.334685 PCI: 00:14.2 cmd <- 02
1525 06:44:06.338294 PCI: 00:14.3 subsystem <- 8086/a0f0
1526 06:44:06.341218 PCI: 00:14.3 cmd <- 02
1527 06:44:06.344459 PCI: 00:15.0 subsystem <- 8086/a0e8
1528 06:44:06.344536 PCI: 00:15.0 cmd <- 02
1529 06:44:06.351263 PCI: 00:15.1 subsystem <- 8086/a0e9
1530 06:44:06.351338 PCI: 00:15.1 cmd <- 02
1531 06:44:06.354571 PCI: 00:15.2 subsystem <- 8086/a0ea
1532 06:44:06.357663 PCI: 00:15.2 cmd <- 02
1533 06:44:06.361034 PCI: 00:15.3 subsystem <- 8086/a0eb
1534 06:44:06.364867 PCI: 00:15.3 cmd <- 02
1535 06:44:06.367838 PCI: 00:16.0 subsystem <- 8086/a0e0
1536 06:44:06.371212 PCI: 00:16.0 cmd <- 02
1537 06:44:06.374775 PCI: 00:19.1 subsystem <- 8086/a0c6
1538 06:44:06.377980 PCI: 00:19.1 cmd <- 02
1539 06:44:06.381212 PCI: 00:1d.0 bridge ctrl <- 0013
1540 06:44:06.384918 PCI: 00:1d.0 subsystem <- 8086/a0b0
1541 06:44:06.387658 PCI: 00:1d.0 cmd <- 06
1542 06:44:06.391331 PCI: 00:1e.0 subsystem <- 8086/a0a8
1543 06:44:06.391460 PCI: 00:1e.0 cmd <- 06
1544 06:44:06.397815 PCI: 00:1e.2 subsystem <- 8086/a0aa
1545 06:44:06.397891 PCI: 00:1e.2 cmd <- 06
1546 06:44:06.401147 PCI: 00:1e.3 subsystem <- 8086/a0ab
1547 06:44:06.404394 PCI: 00:1e.3 cmd <- 02
1548 06:44:06.408165 PCI: 00:1f.0 subsystem <- 8086/a087
1549 06:44:06.411543 PCI: 00:1f.0 cmd <- 407
1550 06:44:06.414820 PCI: 00:1f.3 subsystem <- 8086/a0c8
1551 06:44:06.418448 PCI: 00:1f.3 cmd <- 02
1552 06:44:06.421289 PCI: 00:1f.5 subsystem <- 8086/a0a4
1553 06:44:06.424718 PCI: 00:1f.5 cmd <- 406
1554 06:44:06.428038 PCI: 01:00.0 cmd <- 02
1555 06:44:06.432568 done.
1556 06:44:06.436198 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1557 06:44:06.440004 Initializing devices...
1558 06:44:06.442788 Root Device init
1559 06:44:06.446151 Chrome EC: Set SMI mask to 0x0000000000000000
1560 06:44:06.453093 Chrome EC: clear events_b mask to 0x0000000000000000
1561 06:44:06.459842 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1562 06:44:06.466153 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1563 06:44:06.469561 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1564 06:44:06.477035 Chrome EC: Set WAKE mask to 0x0000000000000000
1565 06:44:06.483503 fw_config match found: DB_USB=USB3_ACTIVE
1566 06:44:06.486576 Configure Right Type-C port orientation for retimer
1567 06:44:06.489916 Root Device init finished in 45 msecs
1568 06:44:06.493966 PCI: 00:00.0 init
1569 06:44:06.496943 CPU TDP = 9 Watts
1570 06:44:06.497017 CPU PL1 = 9 Watts
1571 06:44:06.500351 CPU PL2 = 40 Watts
1572 06:44:06.503984 CPU PL4 = 83 Watts
1573 06:44:06.507114 PCI: 00:00.0 init finished in 8 msecs
1574 06:44:06.507192 PCI: 00:02.0 init
1575 06:44:06.510639 GMA: Found VBT in CBFS
1576 06:44:06.513851 GMA: Found valid VBT in CBFS
1577 06:44:06.520850 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1578 06:44:06.527574 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1579 06:44:06.530348 PCI: 00:02.0 init finished in 18 msecs
1580 06:44:06.533824 PCI: 00:05.0 init
1581 06:44:06.537301 PCI: 00:05.0 init finished in 0 msecs
1582 06:44:06.540433 PCI: 00:08.0 init
1583 06:44:06.543723 PCI: 00:08.0 init finished in 0 msecs
1584 06:44:06.547638 PCI: 00:14.0 init
1585 06:44:06.550419 PCI: 00:14.0 init finished in 0 msecs
1586 06:44:06.554091 PCI: 00:14.2 init
1587 06:44:06.557469 PCI: 00:14.2 init finished in 0 msecs
1588 06:44:06.557549 PCI: 00:15.0 init
1589 06:44:06.560811 I2C bus 0 version 0x3230302a
1590 06:44:06.564052 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1591 06:44:06.570570 PCI: 00:15.0 init finished in 6 msecs
1592 06:44:06.570646 PCI: 00:15.1 init
1593 06:44:06.573813 I2C bus 1 version 0x3230302a
1594 06:44:06.577055 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1595 06:44:06.580659 PCI: 00:15.1 init finished in 6 msecs
1596 06:44:06.583905 PCI: 00:15.2 init
1597 06:44:06.587339 I2C bus 2 version 0x3230302a
1598 06:44:06.590860 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1599 06:44:06.594068 PCI: 00:15.2 init finished in 6 msecs
1600 06:44:06.597456 PCI: 00:15.3 init
1601 06:44:06.600519 I2C bus 3 version 0x3230302a
1602 06:44:06.603836 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1603 06:44:06.607315 PCI: 00:15.3 init finished in 6 msecs
1604 06:44:06.610889 PCI: 00:16.0 init
1605 06:44:06.614335 PCI: 00:16.0 init finished in 0 msecs
1606 06:44:06.614408 PCI: 00:19.1 init
1607 06:44:06.617366 I2C bus 5 version 0x3230302a
1608 06:44:06.620745 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1609 06:44:06.627418 PCI: 00:19.1 init finished in 6 msecs
1610 06:44:06.627500 PCI: 00:1d.0 init
1611 06:44:06.630726 Initializing PCH PCIe bridge.
1612 06:44:06.634054 PCI: 00:1d.0 init finished in 3 msecs
1613 06:44:06.638022 PCI: 00:1f.0 init
1614 06:44:06.641607 IOAPIC: Initializing IOAPIC at 0xfec00000
1615 06:44:06.648345 IOAPIC: Bootstrap Processor Local APIC = 0x00
1616 06:44:06.648417 IOAPIC: ID = 0x02
1617 06:44:06.651283 IOAPIC: Dumping registers
1618 06:44:06.654755 reg 0x0000: 0x02000000
1619 06:44:06.657973 reg 0x0001: 0x00770020
1620 06:44:06.658048 reg 0x0002: 0x00000000
1621 06:44:06.664615 PCI: 00:1f.0 init finished in 21 msecs
1622 06:44:06.664703 PCI: 00:1f.2 init
1623 06:44:06.668027 Disabling ACPI via APMC.
1624 06:44:06.671760 APMC done.
1625 06:44:06.675320 PCI: 00:1f.2 init finished in 5 msecs
1626 06:44:06.686149 PCI: 01:00.0 init
1627 06:44:06.690044 PCI: 01:00.0 init finished in 0 msecs
1628 06:44:06.692905 PNP: 0c09.0 init
1629 06:44:06.696200 Google Chrome EC uptime: 8.442 seconds
1630 06:44:06.702957 Google Chrome AP resets since EC boot: 1
1631 06:44:06.706279 Google Chrome most recent AP reset causes:
1632 06:44:06.709476 0.381: 32775 shutdown: entering G3
1633 06:44:06.716551 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1634 06:44:06.720013 PNP: 0c09.0 init finished in 22 msecs
1635 06:44:06.725504 Devices initialized
1636 06:44:06.728281 Show all devs... After init.
1637 06:44:06.731752 Root Device: enabled 1
1638 06:44:06.731836 DOMAIN: 0000: enabled 1
1639 06:44:06.735088 CPU_CLUSTER: 0: enabled 1
1640 06:44:06.738689 PCI: 00:00.0: enabled 1
1641 06:44:06.742094 PCI: 00:02.0: enabled 1
1642 06:44:06.742175 PCI: 00:04.0: enabled 1
1643 06:44:06.745410 PCI: 00:05.0: enabled 1
1644 06:44:06.748355 PCI: 00:06.0: enabled 0
1645 06:44:06.751978 PCI: 00:07.0: enabled 0
1646 06:44:06.752060 PCI: 00:07.1: enabled 0
1647 06:44:06.755243 PCI: 00:07.2: enabled 0
1648 06:44:06.758323 PCI: 00:07.3: enabled 0
1649 06:44:06.761823 PCI: 00:08.0: enabled 1
1650 06:44:06.761904 PCI: 00:09.0: enabled 0
1651 06:44:06.764995 PCI: 00:0a.0: enabled 0
1652 06:44:06.768588 PCI: 00:0d.0: enabled 1
1653 06:44:06.768668 PCI: 00:0d.1: enabled 0
1654 06:44:06.771797 PCI: 00:0d.2: enabled 0
1655 06:44:06.774860 PCI: 00:0d.3: enabled 0
1656 06:44:06.778467 PCI: 00:0e.0: enabled 0
1657 06:44:06.778542 PCI: 00:10.2: enabled 1
1658 06:44:06.782045 PCI: 00:10.6: enabled 0
1659 06:44:06.785149 PCI: 00:10.7: enabled 0
1660 06:44:06.788565 PCI: 00:12.0: enabled 0
1661 06:44:06.788646 PCI: 00:12.6: enabled 0
1662 06:44:06.792043 PCI: 00:13.0: enabled 0
1663 06:44:06.795181 PCI: 00:14.0: enabled 1
1664 06:44:06.798463 PCI: 00:14.1: enabled 0
1665 06:44:06.798544 PCI: 00:14.2: enabled 1
1666 06:44:06.802009 PCI: 00:14.3: enabled 1
1667 06:44:06.805290 PCI: 00:15.0: enabled 1
1668 06:44:06.805371 PCI: 00:15.1: enabled 1
1669 06:44:06.808469 PCI: 00:15.2: enabled 1
1670 06:44:06.812025 PCI: 00:15.3: enabled 1
1671 06:44:06.815063 PCI: 00:16.0: enabled 1
1672 06:44:06.815144 PCI: 00:16.1: enabled 0
1673 06:44:06.818229 PCI: 00:16.2: enabled 0
1674 06:44:06.821790 PCI: 00:16.3: enabled 0
1675 06:44:06.824904 PCI: 00:16.4: enabled 0
1676 06:44:06.824989 PCI: 00:16.5: enabled 0
1677 06:44:06.827969 PCI: 00:17.0: enabled 0
1678 06:44:06.831582 PCI: 00:19.0: enabled 0
1679 06:44:06.834785 PCI: 00:19.1: enabled 1
1680 06:44:06.834864 PCI: 00:19.2: enabled 0
1681 06:44:06.838088 PCI: 00:1c.0: enabled 1
1682 06:44:06.841619 PCI: 00:1c.1: enabled 0
1683 06:44:06.841694 PCI: 00:1c.2: enabled 0
1684 06:44:06.844828 PCI: 00:1c.3: enabled 0
1685 06:44:06.848219 PCI: 00:1c.4: enabled 0
1686 06:44:06.852082 PCI: 00:1c.5: enabled 0
1687 06:44:06.852164 PCI: 00:1c.6: enabled 1
1688 06:44:06.855437 PCI: 00:1c.7: enabled 0
1689 06:44:06.858294 PCI: 00:1d.0: enabled 1
1690 06:44:06.861564 PCI: 00:1d.1: enabled 0
1691 06:44:06.861630 PCI: 00:1d.2: enabled 1
1692 06:44:06.865235 PCI: 00:1d.3: enabled 0
1693 06:44:06.868628 PCI: 00:1e.0: enabled 1
1694 06:44:06.868694 PCI: 00:1e.1: enabled 0
1695 06:44:06.871712 PCI: 00:1e.2: enabled 1
1696 06:44:06.874930 PCI: 00:1e.3: enabled 1
1697 06:44:06.878444 PCI: 00:1f.0: enabled 1
1698 06:44:06.878533 PCI: 00:1f.1: enabled 0
1699 06:44:06.881885 PCI: 00:1f.2: enabled 1
1700 06:44:06.885158 PCI: 00:1f.3: enabled 1
1701 06:44:06.888068 PCI: 00:1f.4: enabled 0
1702 06:44:06.888147 PCI: 00:1f.5: enabled 1
1703 06:44:06.892007 PCI: 00:1f.6: enabled 0
1704 06:44:06.894999 PCI: 00:1f.7: enabled 0
1705 06:44:06.895073 APIC: 00: enabled 1
1706 06:44:06.898638 GENERIC: 0.0: enabled 1
1707 06:44:06.901413 GENERIC: 0.0: enabled 1
1708 06:44:06.904953 GENERIC: 1.0: enabled 1
1709 06:44:06.905030 GENERIC: 0.0: enabled 1
1710 06:44:06.908384 GENERIC: 1.0: enabled 1
1711 06:44:06.911569 USB0 port 0: enabled 1
1712 06:44:06.915277 GENERIC: 0.0: enabled 1
1713 06:44:06.915403 USB0 port 0: enabled 1
1714 06:44:06.918311 GENERIC: 0.0: enabled 1
1715 06:44:06.921622 I2C: 00:1a: enabled 1
1716 06:44:06.921696 I2C: 00:31: enabled 1
1717 06:44:06.924509 I2C: 00:32: enabled 1
1718 06:44:06.928529 I2C: 00:10: enabled 1
1719 06:44:06.928629 I2C: 00:15: enabled 1
1720 06:44:06.931133 GENERIC: 0.0: enabled 0
1721 06:44:06.935289 GENERIC: 1.0: enabled 0
1722 06:44:06.938327 GENERIC: 0.0: enabled 1
1723 06:44:06.938428 SPI: 00: enabled 1
1724 06:44:06.941679 SPI: 00: enabled 1
1725 06:44:06.944453 PNP: 0c09.0: enabled 1
1726 06:44:06.944530 GENERIC: 0.0: enabled 1
1727 06:44:06.948002 USB3 port 0: enabled 1
1728 06:44:06.951295 USB3 port 1: enabled 1
1729 06:44:06.951432 USB3 port 2: enabled 0
1730 06:44:06.954545 USB3 port 3: enabled 0
1731 06:44:06.957852 USB2 port 0: enabled 0
1732 06:44:06.957930 USB2 port 1: enabled 1
1733 06:44:06.961296 USB2 port 2: enabled 1
1734 06:44:06.965036 USB2 port 3: enabled 0
1735 06:44:06.967846 USB2 port 4: enabled 1
1736 06:44:06.967921 USB2 port 5: enabled 0
1737 06:44:06.971469 USB2 port 6: enabled 0
1738 06:44:06.974420 USB2 port 7: enabled 0
1739 06:44:06.974495 USB2 port 8: enabled 0
1740 06:44:06.978397 USB2 port 9: enabled 0
1741 06:44:06.981279 USB3 port 0: enabled 0
1742 06:44:06.984387 USB3 port 1: enabled 1
1743 06:44:06.984477 USB3 port 2: enabled 0
1744 06:44:06.987778 USB3 port 3: enabled 0
1745 06:44:06.991160 GENERIC: 0.0: enabled 1
1746 06:44:06.991260 GENERIC: 1.0: enabled 1
1747 06:44:06.994216 APIC: 01: enabled 1
1748 06:44:06.998058 APIC: 05: enabled 1
1749 06:44:06.998136 APIC: 07: enabled 1
1750 06:44:07.001541 APIC: 02: enabled 1
1751 06:44:07.004569 APIC: 04: enabled 1
1752 06:44:07.004672 APIC: 06: enabled 1
1753 06:44:07.007847 APIC: 03: enabled 1
1754 06:44:07.007921 PCI: 01:00.0: enabled 1
1755 06:44:07.014344 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1756 06:44:07.020888 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1757 06:44:07.024676 ELOG: NV offset 0xf30000 size 0x1000
1758 06:44:07.031532 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1759 06:44:07.037966 ELOG: Event(17) added with size 13 at 2024-01-03 06:44:07 UTC
1760 06:44:07.044847 ELOG: Event(92) added with size 9 at 2024-01-03 06:44:07 UTC
1761 06:44:07.050773 ELOG: Event(93) added with size 9 at 2024-01-03 06:44:07 UTC
1762 06:44:07.057724 ELOG: Event(9E) added with size 10 at 2024-01-03 06:44:07 UTC
1763 06:44:07.064569 ELOG: Event(9F) added with size 14 at 2024-01-03 06:44:07 UTC
1764 06:44:07.067655 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1765 06:44:07.074404 ELOG: Event(A1) added with size 10 at 2024-01-03 06:44:07 UTC
1766 06:44:07.081338 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1767 06:44:07.088086 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1768 06:44:07.088162 Finalize devices...
1769 06:44:07.091112 Devices finalized
1770 06:44:07.097819 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1771 06:44:07.101257 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1772 06:44:07.108402 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1773 06:44:07.111389 ME: HFSTS1 : 0x80030055
1774 06:44:07.117904 ME: HFSTS2 : 0x30280116
1775 06:44:07.121479 ME: HFSTS3 : 0x00000050
1776 06:44:07.124624 ME: HFSTS4 : 0x00004000
1777 06:44:07.131352 ME: HFSTS5 : 0x00000000
1778 06:44:07.134307 ME: HFSTS6 : 0x00400006
1779 06:44:07.138265 ME: Manufacturing Mode : YES
1780 06:44:07.140901 ME: SPI Protection Mode Enabled : NO
1781 06:44:07.144592 ME: FW Partition Table : OK
1782 06:44:07.147808 ME: Bringup Loader Failure : NO
1783 06:44:07.154193 ME: Firmware Init Complete : NO
1784 06:44:07.157772 ME: Boot Options Present : NO
1785 06:44:07.161429 ME: Update In Progress : NO
1786 06:44:07.164280 ME: D0i3 Support : YES
1787 06:44:07.167760 ME: Low Power State Enabled : NO
1788 06:44:07.171221 ME: CPU Replaced : YES
1789 06:44:07.174593 ME: CPU Replacement Valid : YES
1790 06:44:07.177766 ME: Current Working State : 5
1791 06:44:07.184338 ME: Current Operation State : 1
1792 06:44:07.187873 ME: Current Operation Mode : 3
1793 06:44:07.190943 ME: Error Code : 0
1794 06:44:07.194563 ME: Enhanced Debug Mode : NO
1795 06:44:07.197849 ME: CPU Debug Disabled : YES
1796 06:44:07.201189 ME: TXT Support : NO
1797 06:44:07.207747 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1798 06:44:07.214399 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1799 06:44:07.217977 CBFS: 'fallback/slic' not found.
1800 06:44:07.221252 ACPI: Writing ACPI tables at 76b01000.
1801 06:44:07.224571 ACPI: * FACS
1802 06:44:07.224678 ACPI: * DSDT
1803 06:44:07.227612 Ramoops buffer: 0x100000@0x76a00000.
1804 06:44:07.234735 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1805 06:44:07.237632 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1806 06:44:07.242365 Google Chrome EC: version:
1807 06:44:07.245687 ro: voema_v2.0.7540-147f8d37d1
1808 06:44:07.249453 rw: voema_v2.0.7540-147f8d37d1
1809 06:44:07.252231 running image: 2
1810 06:44:07.259191 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1811 06:44:07.262311 ACPI: * FADT
1812 06:44:07.262416 SCI is IRQ9
1813 06:44:07.265545 ACPI: added table 1/32, length now 40
1814 06:44:07.269152 ACPI: * SSDT
1815 06:44:07.272529 Found 1 CPU(s) with 8 core(s) each.
1816 06:44:07.275401 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1817 06:44:07.282588 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1818 06:44:07.285612 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1819 06:44:07.288875 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1820 06:44:07.295609 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1821 06:44:07.302469 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1822 06:44:07.305922 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1823 06:44:07.312718 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1824 06:44:07.318843 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1825 06:44:07.322348 \_SB.PCI0.RP09: Added StorageD3Enable property
1826 06:44:07.325696 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1827 06:44:07.332575 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1828 06:44:07.336032 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1829 06:44:07.339281 PS2K: Passing 80 keymaps to kernel
1830 06:44:07.345988 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1831 06:44:07.352707 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1832 06:44:07.358816 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1833 06:44:07.365471 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1834 06:44:07.372370 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1835 06:44:07.378908 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1836 06:44:07.385904 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1837 06:44:07.392096 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1838 06:44:07.395718 ACPI: added table 2/32, length now 44
1839 06:44:07.398932 ACPI: * MCFG
1840 06:44:07.402525 ACPI: added table 3/32, length now 48
1841 06:44:07.402601 ACPI: * TPM2
1842 06:44:07.406006 TPM2 log created at 0x769f0000
1843 06:44:07.412381 ACPI: added table 4/32, length now 52
1844 06:44:07.412460 ACPI: * MADT
1845 06:44:07.412523 SCI is IRQ9
1846 06:44:07.419359 ACPI: added table 5/32, length now 56
1847 06:44:07.419498 current = 76b09850
1848 06:44:07.422799 ACPI: * DMAR
1849 06:44:07.425618 ACPI: added table 6/32, length now 60
1850 06:44:07.429174 ACPI: added table 7/32, length now 64
1851 06:44:07.429277 ACPI: * HPET
1852 06:44:07.435704 ACPI: added table 8/32, length now 68
1853 06:44:07.435782 ACPI: done.
1854 06:44:07.438836 ACPI tables: 35216 bytes.
1855 06:44:07.442583 smbios_write_tables: 769ef000
1856 06:44:07.445689 EC returned error result code 3
1857 06:44:07.449155 Couldn't obtain OEM name from CBI
1858 06:44:07.452422 Create SMBIOS type 16
1859 06:44:07.452499 Create SMBIOS type 17
1860 06:44:07.455852 GENERIC: 0.0 (WIFI Device)
1861 06:44:07.459321 SMBIOS tables: 1750 bytes.
1862 06:44:07.463063 Writing table forward entry at 0x00000500
1863 06:44:07.469520 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1864 06:44:07.472589 Writing coreboot table at 0x76b25000
1865 06:44:07.479590 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1866 06:44:07.482601 1. 0000000000001000-000000000009ffff: RAM
1867 06:44:07.489804 2. 00000000000a0000-00000000000fffff: RESERVED
1868 06:44:07.492787 3. 0000000000100000-00000000769eefff: RAM
1869 06:44:07.499151 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1870 06:44:07.502930 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1871 06:44:07.509500 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1872 06:44:07.512819 7. 0000000077000000-000000007fbfffff: RESERVED
1873 06:44:07.519714 8. 00000000c0000000-00000000cfffffff: RESERVED
1874 06:44:07.522932 9. 00000000f8000000-00000000f9ffffff: RESERVED
1875 06:44:07.529610 10. 00000000fb000000-00000000fb000fff: RESERVED
1876 06:44:07.532782 11. 00000000fe000000-00000000fe00ffff: RESERVED
1877 06:44:07.539069 12. 00000000fed80000-00000000fed87fff: RESERVED
1878 06:44:07.542608 13. 00000000fed90000-00000000fed92fff: RESERVED
1879 06:44:07.545725 14. 00000000feda0000-00000000feda1fff: RESERVED
1880 06:44:07.552528 15. 00000000fedc0000-00000000feddffff: RESERVED
1881 06:44:07.556024 16. 0000000100000000-00000002803fffff: RAM
1882 06:44:07.559151 Passing 4 GPIOs to payload:
1883 06:44:07.565884 NAME | PORT | POLARITY | VALUE
1884 06:44:07.569418 lid | undefined | high | high
1885 06:44:07.575730 power | undefined | high | low
1886 06:44:07.579033 oprom | undefined | high | low
1887 06:44:07.585991 EC in RW | 0x000000e5 | high | high
1888 06:44:07.593117 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7951
1889 06:44:07.596286 coreboot table: 1576 bytes.
1890 06:44:07.599119 IMD ROOT 0. 0x76fff000 0x00001000
1891 06:44:07.602601 IMD SMALL 1. 0x76ffe000 0x00001000
1892 06:44:07.606126 FSP MEMORY 2. 0x76c4e000 0x003b0000
1893 06:44:07.609033 VPD 3. 0x76c4d000 0x00000367
1894 06:44:07.612756 RO MCACHE 4. 0x76c4c000 0x00000fdc
1895 06:44:07.616093 CONSOLE 5. 0x76c2c000 0x00020000
1896 06:44:07.622466 FMAP 6. 0x76c2b000 0x00000578
1897 06:44:07.625663 TIME STAMP 7. 0x76c2a000 0x00000910
1898 06:44:07.629072 VBOOT WORK 8. 0x76c16000 0x00014000
1899 06:44:07.633209 ROMSTG STCK 9. 0x76c15000 0x00001000
1900 06:44:07.635943 AFTER CAR 10. 0x76c0a000 0x0000b000
1901 06:44:07.639234 RAMSTAGE 11. 0x76b97000 0x00073000
1902 06:44:07.642413 REFCODE 12. 0x76b42000 0x00055000
1903 06:44:07.645614 SMM BACKUP 13. 0x76b32000 0x00010000
1904 06:44:07.652410 4f444749 14. 0x76b30000 0x00002000
1905 06:44:07.655786 EXT VBT15. 0x76b2d000 0x0000219f
1906 06:44:07.659358 COREBOOT 16. 0x76b25000 0x00008000
1907 06:44:07.662284 ACPI 17. 0x76b01000 0x00024000
1908 06:44:07.665872 ACPI GNVS 18. 0x76b00000 0x00001000
1909 06:44:07.669580 RAMOOPS 19. 0x76a00000 0x00100000
1910 06:44:07.672404 TPM2 TCGLOG20. 0x769f0000 0x00010000
1911 06:44:07.675950 SMBIOS 21. 0x769ef000 0x00000800
1912 06:44:07.679122 IMD small region:
1913 06:44:07.682380 IMD ROOT 0. 0x76ffec00 0x00000400
1914 06:44:07.685775 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1915 06:44:07.688978 POWER STATE 2. 0x76ffeb80 0x00000044
1916 06:44:07.692476 ROMSTAGE 3. 0x76ffeb60 0x00000004
1917 06:44:07.699139 MEM INFO 4. 0x76ffe980 0x000001e0
1918 06:44:07.702454 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1919 06:44:07.705860 MTRR: Physical address space:
1920 06:44:07.712370 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1921 06:44:07.719325 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1922 06:44:07.725687 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1923 06:44:07.732511 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1924 06:44:07.739389 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1925 06:44:07.745658 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1926 06:44:07.749326 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1927 06:44:07.755802 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 06:44:07.759664 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 06:44:07.762317 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 06:44:07.765683 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 06:44:07.772370 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 06:44:07.775912 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 06:44:07.779154 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 06:44:07.782723 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 06:44:07.785774 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 06:44:07.793193 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 06:44:07.795817 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 06:44:07.799575 call enable_fixed_mtrr()
1939 06:44:07.802452 CPU physical address size: 39 bits
1940 06:44:07.805825 MTRR: default type WB/UC MTRR counts: 6/6.
1941 06:44:07.812831 MTRR: UC selected as default type.
1942 06:44:07.815752 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1943 06:44:07.822967 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1944 06:44:07.829750 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1945 06:44:07.835858 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1946 06:44:07.842536 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1947 06:44:07.849436 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1948 06:44:07.849526
1949 06:44:07.852769 MTRR check
1950 06:44:07.852858 Fixed MTRRs : Enabled
1951 06:44:07.855997 Variable MTRRs: Enabled
1952 06:44:07.856067
1953 06:44:07.859467 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 06:44:07.865989 MTRR: Fixed MSR 0x258 0x0606060606060606
1955 06:44:07.869380 MTRR: Fixed MSR 0x259 0x0000000000000000
1956 06:44:07.872989 MTRR: Fixed MSR 0x268 0x0606060606060606
1957 06:44:07.875919 MTRR: Fixed MSR 0x269 0x0606060606060606
1958 06:44:07.879632 MTRR: Fixed MSR 0x26a 0x0606060606060606
1959 06:44:07.886119 MTRR: Fixed MSR 0x26b 0x0606060606060606
1960 06:44:07.889246 MTRR: Fixed MSR 0x26c 0x0606060606060606
1961 06:44:07.892699 MTRR: Fixed MSR 0x26d 0x0606060606060606
1962 06:44:07.896116 MTRR: Fixed MSR 0x26e 0x0606060606060606
1963 06:44:07.902780 MTRR: Fixed MSR 0x26f 0x0606060606060606
1964 06:44:07.909673 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1965 06:44:07.909757 call enable_fixed_mtrr()
1966 06:44:07.913203 Checking cr50 for pending updates
1967 06:44:07.916622 CPU physical address size: 39 bits
1968 06:44:07.923337 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 06:44:07.926618 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 06:44:07.929602 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 06:44:07.933463 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 06:44:07.939937 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 06:44:07.943413 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 06:44:07.946520 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 06:44:07.950029 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 06:44:07.953382 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 06:44:07.960062 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 06:44:07.963467 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 06:44:07.966461 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 06:44:07.973186 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 06:44:07.976905 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 06:44:07.980587 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 06:44:07.983658 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 06:44:07.990282 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 06:44:07.993068 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 06:44:07.996674 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 06:44:08.000227 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 06:44:08.003772 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 06:44:08.010259 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 06:44:08.014184 call enable_fixed_mtrr()
1991 06:44:08.016690 call enable_fixed_mtrr()
1992 06:44:08.020244 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 06:44:08.023598 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 06:44:08.026559 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 06:44:08.030128 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 06:44:08.036883 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 06:44:08.039996 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 06:44:08.043241 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 06:44:08.046416 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 06:44:08.053545 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 06:44:08.056499 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 06:44:08.060388 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 06:44:08.063581 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 06:44:08.070553 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 06:44:08.070655 call enable_fixed_mtrr()
2006 06:44:08.077033 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 06:44:08.080954 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 06:44:08.084412 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 06:44:08.087299 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 06:44:08.090643 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 06:44:08.097555 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 06:44:08.100781 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 06:44:08.104066 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 06:44:08.107264 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 06:44:08.113753 CPU physical address size: 39 bits
2016 06:44:08.117248 call enable_fixed_mtrr()
2017 06:44:08.120864 CPU physical address size: 39 bits
2018 06:44:08.124004 CPU physical address size: 39 bits
2019 06:44:08.127497 CPU physical address size: 39 bits
2020 06:44:08.134089 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 06:44:08.137587 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 06:44:08.140637 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 06:44:08.144074 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 06:44:08.151055 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 06:44:08.153938 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 06:44:08.157122 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 06:44:08.160738 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 06:44:08.163933 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 06:44:08.171051 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 06:44:08.173911 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 06:44:08.177044 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 06:44:08.184058 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 06:44:08.184141 call enable_fixed_mtrr()
2034 06:44:08.190860 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 06:44:08.193880 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 06:44:08.197473 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 06:44:08.200633 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 06:44:08.207767 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 06:44:08.211039 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 06:44:08.214187 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 06:44:08.217662 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 06:44:08.221056 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 06:44:08.227897 CPU physical address size: 39 bits
2044 06:44:08.230817 call enable_fixed_mtrr()
2045 06:44:08.235039 Reading cr50 TPM mode
2046 06:44:08.235148 CPU physical address size: 39 bits
2047 06:44:08.242929 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2048 06:44:08.252909 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2049 06:44:08.256349 Checking segment from ROM address 0xffc02b38
2050 06:44:08.259555 Checking segment from ROM address 0xffc02b54
2051 06:44:08.266473 Loading segment from ROM address 0xffc02b38
2052 06:44:08.266556 code (compression=0)
2053 06:44:08.276231 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2054 06:44:08.283252 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2055 06:44:08.286437 it's not compressed!
2056 06:44:08.425389 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2057 06:44:08.432037 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2058 06:44:08.438713 Loading segment from ROM address 0xffc02b54
2059 06:44:08.438797 Entry Point 0x30000000
2060 06:44:08.442555 Loaded segments
2061 06:44:08.448827 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2062 06:44:08.492739 Finalizing chipset.
2063 06:44:08.495611 Finalizing SMM.
2064 06:44:08.495693 APMC done.
2065 06:44:08.502243 BS: BS_PAYLOAD_LOAD exit times (exec / console): 43 / 5 ms
2066 06:44:08.505495 mp_park_aps done after 0 msecs.
2067 06:44:08.509090 Jumping to boot code at 0x30000000(0x76b25000)
2068 06:44:08.519019 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2069 06:44:08.519101
2070 06:44:08.519165
2071 06:44:08.519224
2072 06:44:08.522612 Starting depthcharge on Voema...
2073 06:44:08.522746
2074 06:44:08.523087 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2075 06:44:08.523182 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2076 06:44:08.523296 Setting prompt string to ['volteer:']
2077 06:44:08.523435 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2078 06:44:08.532208 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2079 06:44:08.532296
2080 06:44:08.538861 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2081 06:44:08.538968
2082 06:44:08.541910 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2083 06:44:08.546328
2084 06:44:08.546415 Failed to find eMMC card reader
2085 06:44:08.546486
2086 06:44:08.549810 Wipe memory regions:
2087 06:44:08.549916
2088 06:44:08.553911 [0x00000000001000, 0x000000000a0000)
2089 06:44:08.554000
2090 06:44:08.556145 [0x00000000100000, 0x00000030000000)
2091 06:44:08.583724
2092 06:44:08.586848 [0x00000032662db0, 0x000000769ef000)
2093 06:44:08.623324
2094 06:44:08.626291 [0x00000100000000, 0x00000280400000)
2095 06:44:08.827517
2096 06:44:08.831250 ec_init: CrosEC protocol v3 supported (256, 256)
2097 06:44:08.831401
2098 06:44:08.837514 update_port_state: port C0 state: usb enable 1 mux conn 0
2099 06:44:08.837600
2100 06:44:08.847551 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2101 06:44:08.847639
2102 06:44:08.851234 pmc_check_ipc_sts: STS_BUSY done after 1614 us
2103 06:44:08.854669
2104 06:44:08.857666 send_conn_disc_msg: pmc_send_cmd succeeded
2105 06:44:09.291318
2106 06:44:09.291466 R8152: Initializing
2107 06:44:09.291557
2108 06:44:09.294246 Version 6 (ocp_data = 5c30)
2109 06:44:09.294330
2110 06:44:09.297788 R8152: Done initializing
2111 06:44:09.297896
2112 06:44:09.300977 Adding net device
2113 06:44:09.602644
2114 06:44:09.605774 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2115 06:44:09.605862
2116 06:44:09.605952
2117 06:44:09.606031
2118 06:44:09.609296 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2120 06:44:09.709631 volteer: tftpboot 192.168.201.1 12434487/tftp-deploy-2r_78mr3/kernel/bzImage 12434487/tftp-deploy-2r_78mr3/kernel/cmdline 12434487/tftp-deploy-2r_78mr3/ramdisk/ramdisk.cpio.gz
2121 06:44:09.709810 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2122 06:44:09.709920 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2123 06:44:09.713829 tftpboot 192.168.201.1 12434487/tftp-deploy-2r_78mr3/kernel/bzImloy-2r_78mr3/kernel/cmdline 12434487/tftp-deploy-2r_78mr3/ramdisk/ramdisk.cpio.gz
2124 06:44:09.713951
2125 06:44:09.714035 Waiting for link
2126 06:44:09.918586
2127 06:44:09.918721 done.
2128 06:44:09.918817
2129 06:44:09.918897 MAC: 00:24:32:30:7d:bc
2130 06:44:09.918981
2131 06:44:09.921920 Sending DHCP discover... done.
2132 06:44:09.922007
2133 06:44:09.925610 Waiting for reply... done.
2134 06:44:09.925691
2135 06:44:09.928894 Sending DHCP request... done.
2136 06:44:09.928987
2137 06:44:09.932235 Waiting for reply... done.
2138 06:44:09.932317
2139 06:44:09.935528 My ip is 192.168.201.22
2140 06:44:09.935605
2141 06:44:09.938836 The DHCP server ip is 192.168.201.1
2142 06:44:09.938912
2143 06:44:09.941717 TFTP server IP predefined by user: 192.168.201.1
2144 06:44:09.941792
2145 06:44:09.948446 Bootfile predefined by user: 12434487/tftp-deploy-2r_78mr3/kernel/bzImage
2146 06:44:09.948531
2147 06:44:09.951937 Sending tftp read request... done.
2148 06:44:09.952015
2149 06:44:09.958733 Waiting for the transfer...
2150 06:44:09.958817
2151 06:44:10.483215 00000000 ################################################################
2152 06:44:10.483428
2153 06:44:11.029182 00080000 ################################################################
2154 06:44:11.029319
2155 06:44:11.564981 00100000 ################################################################
2156 06:44:11.565120
2157 06:44:12.106729 00180000 ################################################################
2158 06:44:12.106866
2159 06:44:12.651015 00200000 ################################################################
2160 06:44:12.651180
2161 06:44:13.192537 00280000 ################################################################
2162 06:44:13.192677
2163 06:44:13.730551 00300000 ################################################################
2164 06:44:13.730692
2165 06:44:14.318160 00380000 ################################################################
2166 06:44:14.318304
2167 06:44:14.881682 00400000 ################################################################
2168 06:44:14.881815
2169 06:44:15.449044 00480000 ################################################################
2170 06:44:15.449185
2171 06:44:16.012892 00500000 ################################################################
2172 06:44:16.013023
2173 06:44:16.567019 00580000 ################################################################
2174 06:44:16.567164
2175 06:44:17.142457 00600000 ################################################################
2176 06:44:17.142590
2177 06:44:17.712299 00680000 ################################################################
2178 06:44:17.712450
2179 06:44:18.269989 00700000 ################################################################
2180 06:44:18.270135
2181 06:44:18.858536 00780000 ################################################################
2182 06:44:18.858695
2183 06:44:19.065244 00800000 ####################### done.
2184 06:44:19.065389
2185 06:44:19.068675 The bootfile was 8576912 bytes long.
2186 06:44:19.068758
2187 06:44:19.071847 Sending tftp read request... done.
2188 06:44:19.071929
2189 06:44:19.074689 Waiting for the transfer...
2190 06:44:19.074770
2191 06:44:19.630130 00000000 ################################################################
2192 06:44:19.630274
2193 06:44:20.193939 00080000 ################################################################
2194 06:44:20.194110
2195 06:44:20.781741 00100000 ################################################################
2196 06:44:20.781892
2197 06:44:21.370174 00180000 ################################################################
2198 06:44:21.370345
2199 06:44:21.949370 00200000 ################################################################
2200 06:44:21.949514
2201 06:44:22.515201 00280000 ################################################################
2202 06:44:22.515351
2203 06:44:23.117815 00300000 ################################################################
2204 06:44:23.117961
2205 06:44:23.713536 00380000 ################################################################
2206 06:44:23.713680
2207 06:44:24.302957 00400000 ################################################################
2208 06:44:24.303136
2209 06:44:24.889315 00480000 ################################################################
2210 06:44:24.889463
2211 06:44:25.472072 00500000 ################################################################
2212 06:44:25.472213
2213 06:44:26.052873 00580000 ################################################################
2214 06:44:26.053041
2215 06:44:26.611316 00600000 ################################################################
2216 06:44:26.611499
2217 06:44:27.185550 00680000 ################################################################
2218 06:44:27.185696
2219 06:44:27.782465 00700000 ################################################################
2220 06:44:27.782607
2221 06:44:28.367710 00780000 ################################################################
2222 06:44:28.367856
2223 06:44:28.989690 00800000 ################################################################
2224 06:44:28.989836
2225 06:44:29.627351 00880000 ################################################################
2226 06:44:29.627918
2227 06:44:30.174825 00900000 ################################################################
2228 06:44:30.175054
2229 06:44:30.779422 00980000 ################################################################
2230 06:44:30.779911
2231 06:44:31.482891 00a00000 ################################################################
2232 06:44:31.483422
2233 06:44:32.157106 00a80000 ################################################################
2234 06:44:32.157644
2235 06:44:32.830181 00b00000 ################################################################
2236 06:44:32.830690
2237 06:44:33.465611 00b80000 ################################################################
2238 06:44:33.466119
2239 06:44:34.145602 00c00000 ################################################################
2240 06:44:34.146122
2241 06:44:34.830052 00c80000 ################################################################
2242 06:44:34.830544
2243 06:44:35.504692 00d00000 ################################################################
2244 06:44:35.505213
2245 06:44:36.194930 00d80000 ################################################################
2246 06:44:36.195584
2247 06:44:36.778671 00e00000 ################################################################
2248 06:44:36.778820
2249 06:44:37.327559 00e80000 ################################################################
2250 06:44:37.327708
2251 06:44:37.873272 00f00000 ################################################################
2252 06:44:37.873422
2253 06:44:38.446197 00f80000 ################################################################
2254 06:44:38.446356
2255 06:44:39.009313 01000000 ################################################################
2256 06:44:39.009466
2257 06:44:39.557677 01080000 ################################################################
2258 06:44:39.557831
2259 06:44:40.090678 01100000 ################################################################
2260 06:44:40.090828
2261 06:44:40.637007 01180000 ################################################################
2262 06:44:40.637154
2263 06:44:41.169653 01200000 ################################################################
2264 06:44:41.169802
2265 06:44:41.723774 01280000 ################################################################
2266 06:44:41.723924
2267 06:44:42.268693 01300000 ################################################################
2268 06:44:42.268838
2269 06:44:42.818173 01380000 ################################################################
2270 06:44:42.818351
2271 06:44:43.450648 01400000 ################################################################
2272 06:44:43.451297
2273 06:44:44.039500 01480000 ################################################################
2274 06:44:44.039645
2275 06:44:44.593609 01500000 ################################################################
2276 06:44:44.593757
2277 06:44:45.170384 01580000 ################################################################
2278 06:44:45.170527
2279 06:44:45.715677 01600000 ################################################################
2280 06:44:45.715822
2281 06:44:46.295801 01680000 ################################################################
2282 06:44:46.295945
2283 06:44:46.921553 01700000 ################################################################
2284 06:44:46.921725
2285 06:44:47.490953 01780000 ################################################################
2286 06:44:47.491125
2287 06:44:48.081694 01800000 ################################################################
2288 06:44:48.081843
2289 06:44:48.690601 01880000 ################################################################
2290 06:44:48.690751
2291 06:44:49.293467 01900000 ################################################################
2292 06:44:49.293612
2293 06:44:49.963493 01980000 ################################################################
2294 06:44:49.963999
2295 06:44:50.637375 01a00000 ################################################################
2296 06:44:50.637887
2297 06:44:51.319393 01a80000 ################################################################
2298 06:44:51.319904
2299 06:44:51.985019 01b00000 ################################################################
2300 06:44:51.985533
2301 06:44:52.661707 01b80000 ################################################################
2302 06:44:52.662210
2303 06:44:53.334621 01c00000 ################################################################
2304 06:44:53.335131
2305 06:44:54.020436 01c80000 ################################################################
2306 06:44:54.020939
2307 06:44:54.683957 01d00000 ################################################################
2308 06:44:54.684469
2309 06:44:55.363061 01d80000 ################################################################
2310 06:44:55.363617
2311 06:44:56.036232 01e00000 ################################################################
2312 06:44:56.036738
2313 06:44:56.705097 01e80000 ################################################################
2314 06:44:56.705615
2315 06:44:57.365827 01f00000 ################################################################
2316 06:44:57.366386
2317 06:44:58.053349 01f80000 ################################################################
2318 06:44:58.053896
2319 06:44:58.742019 02000000 ################################################################
2320 06:44:58.742654
2321 06:44:59.432998 02080000 ################################################################
2322 06:44:59.433507
2323 06:45:00.116833 02100000 ################################################################
2324 06:45:00.117348
2325 06:45:00.805110 02180000 ################################################################
2326 06:45:00.805608
2327 06:45:01.346420 02200000 #################################################### done.
2328 06:45:01.346931
2329 06:45:01.349920 Sending tftp read request... done.
2330 06:45:01.350338
2331 06:45:01.353367 Waiting for the transfer...
2332 06:45:01.353788
2333 06:45:01.354117 00000000 # done.
2334 06:45:01.354437
2335 06:45:01.363042 Command line loaded dynamically from TFTP file: 12434487/tftp-deploy-2r_78mr3/kernel/cmdline
2336 06:45:01.363501
2337 06:45:01.380232 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2338 06:45:01.385998
2339 06:45:01.389245 Shutting down all USB controllers.
2340 06:45:01.389680
2341 06:45:01.390014 Removing current net device
2342 06:45:01.390328
2343 06:45:01.392671 Finalizing coreboot
2344 06:45:01.393093
2345 06:45:01.399331 Exiting depthcharge with code 4 at timestamp: 61529641
2346 06:45:01.399789
2347 06:45:01.400130
2348 06:45:01.400490 Starting kernel ...
2349 06:45:01.400797
2350 06:45:01.401093
2351 06:45:01.402831 end: 2.2.4 bootloader-commands (duration 00:00:53) [common]
2352 06:45:01.403294 start: 2.2.5 auto-login-action (timeout 00:03:52) [common]
2353 06:45:01.403713 Setting prompt string to ['Linux version [0-9]']
2354 06:45:01.404058 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2355 06:45:01.404396 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2357 06:48:53.403715 end: 2.2.5 auto-login-action (duration 00:03:52) [common]
2359 06:48:53.404126 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 232 seconds'
2361 06:48:53.404440 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2364 06:48:53.404959 end: 2 depthcharge-action (duration 00:05:00) [common]
2366 06:48:53.405404 Cleaning after the job
2367 06:48:53.405649 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434487/tftp-deploy-2r_78mr3/ramdisk
2368 06:48:53.412736 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434487/tftp-deploy-2r_78mr3/kernel
2369 06:48:53.414105 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434487/tftp-deploy-2r_78mr3/modules
2370 06:48:53.414447 start: 4.1 power-off (timeout 00:00:30) [common]
2371 06:48:53.414601 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2372 06:48:53.490646 >> Command sent successfully.
2373 06:48:53.493041 Returned 0 in 0 seconds
2374 06:48:53.593800 end: 4.1 power-off (duration 00:00:00) [common]
2376 06:48:53.595219 start: 4.2 read-feedback (timeout 00:10:00) [common]
2377 06:48:53.596450 Listened to connection for namespace 'common' for up to 1s
2378 06:48:54.597151 Finalising connection for namespace 'common'
2379 06:48:54.597808 Disconnecting from shell: Finalise
2380 06:48:54.598183
2381 06:48:54.699103 end: 4.2 read-feedback (duration 00:00:01) [common]
2382 06:48:54.699681 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12434487
2383 06:48:54.791575 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12434487
2384 06:48:54.791777 JobError: Your job cannot terminate cleanly.