Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Errors: 2
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
1 06:44:13.891785 lava-dispatcher, installed at version: 2023.10
2 06:44:13.892010 start: 0 validate
3 06:44:13.892153 Start time: 2024-01-03 06:44:13.892143+00:00 (UTC)
4 06:44:13.892301 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:44:13.892447 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 06:44:14.152385 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:44:14.152572 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:44:14.153782 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:44:14.153927 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 06:44:14.419559 Using caching service: 'http://localhost/cache/?uri=%s'
11 06:44:14.419750 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st%2Fv4.4-st20-2023-g7107c2a794ba%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 06:44:14.422312 validate duration: 0.53
14 06:44:14.422578 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 06:44:14.422687 start: 1.1 download-retry (timeout 00:10:00) [common]
16 06:44:14.422783 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 06:44:14.422915 Not decompressing ramdisk as can be used compressed.
18 06:44:14.423011 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 06:44:14.423087 saving as /var/lib/lava/dispatcher/tmp/12434441/tftp-deploy-x53ld7q8/ramdisk/initrd.cpio.gz
20 06:44:14.423158 total size: 5432480 (5 MB)
21 06:44:14.424262 progress 0 % (0 MB)
22 06:44:14.426113 progress 5 % (0 MB)
23 06:44:14.427755 progress 10 % (0 MB)
24 06:44:14.429422 progress 15 % (0 MB)
25 06:44:14.431267 progress 20 % (1 MB)
26 06:44:14.432942 progress 25 % (1 MB)
27 06:44:14.434525 progress 30 % (1 MB)
28 06:44:14.436292 progress 35 % (1 MB)
29 06:44:14.437861 progress 40 % (2 MB)
30 06:44:14.439426 progress 45 % (2 MB)
31 06:44:14.441017 progress 50 % (2 MB)
32 06:44:14.442759 progress 55 % (2 MB)
33 06:44:14.444335 progress 60 % (3 MB)
34 06:44:14.445909 progress 65 % (3 MB)
35 06:44:14.447688 progress 70 % (3 MB)
36 06:44:14.449260 progress 75 % (3 MB)
37 06:44:14.450821 progress 80 % (4 MB)
38 06:44:14.452392 progress 85 % (4 MB)
39 06:44:14.454131 progress 90 % (4 MB)
40 06:44:14.455703 progress 95 % (4 MB)
41 06:44:14.457317 progress 100 % (5 MB)
42 06:44:14.457559 5 MB downloaded in 0.03 s (150.61 MB/s)
43 06:44:14.457734 end: 1.1.1 http-download (duration 00:00:00) [common]
45 06:44:14.458005 end: 1.1 download-retry (duration 00:00:00) [common]
46 06:44:14.458105 start: 1.2 download-retry (timeout 00:10:00) [common]
47 06:44:14.458199 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 06:44:14.458359 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 06:44:14.458454 saving as /var/lib/lava/dispatcher/tmp/12434441/tftp-deploy-x53ld7q8/kernel/bzImage
50 06:44:14.458524 total size: 8576912 (8 MB)
51 06:44:14.458592 No compression specified
52 06:44:14.459829 progress 0 % (0 MB)
53 06:44:14.462525 progress 5 % (0 MB)
54 06:44:14.465096 progress 10 % (0 MB)
55 06:44:14.467662 progress 15 % (1 MB)
56 06:44:14.470200 progress 20 % (1 MB)
57 06:44:14.472762 progress 25 % (2 MB)
58 06:44:14.475331 progress 30 % (2 MB)
59 06:44:14.477881 progress 35 % (2 MB)
60 06:44:14.480468 progress 40 % (3 MB)
61 06:44:14.483040 progress 45 % (3 MB)
62 06:44:14.485676 progress 50 % (4 MB)
63 06:44:14.488342 progress 55 % (4 MB)
64 06:44:14.491037 progress 60 % (4 MB)
65 06:44:14.493536 progress 65 % (5 MB)
66 06:44:14.496099 progress 70 % (5 MB)
67 06:44:14.498662 progress 75 % (6 MB)
68 06:44:14.501176 progress 80 % (6 MB)
69 06:44:14.503673 progress 85 % (6 MB)
70 06:44:14.506231 progress 90 % (7 MB)
71 06:44:14.508769 progress 95 % (7 MB)
72 06:44:14.511283 progress 100 % (8 MB)
73 06:44:14.511522 8 MB downloaded in 0.05 s (154.35 MB/s)
74 06:44:14.511683 end: 1.2.1 http-download (duration 00:00:00) [common]
76 06:44:14.511934 end: 1.2 download-retry (duration 00:00:00) [common]
77 06:44:14.512038 start: 1.3 download-retry (timeout 00:10:00) [common]
78 06:44:14.512133 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 06:44:14.512290 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 06:44:14.512369 saving as /var/lib/lava/dispatcher/tmp/12434441/tftp-deploy-x53ld7q8/nfsrootfs/full.rootfs.tar
81 06:44:14.512437 total size: 207157356 (197 MB)
82 06:44:14.512506 Using unxz to decompress xz
83 06:44:14.517019 progress 0 % (0 MB)
84 06:44:15.149961 progress 5 % (9 MB)
85 06:44:15.750922 progress 10 % (19 MB)
86 06:44:16.447844 progress 15 % (29 MB)
87 06:44:16.861608 progress 20 % (39 MB)
88 06:44:17.282405 progress 25 % (49 MB)
89 06:44:17.987670 progress 30 % (59 MB)
90 06:44:18.621813 progress 35 % (69 MB)
91 06:44:19.306773 progress 40 % (79 MB)
92 06:44:19.962266 progress 45 % (88 MB)
93 06:44:20.646912 progress 50 % (98 MB)
94 06:44:21.395373 progress 55 % (108 MB)
95 06:44:22.202724 progress 60 % (118 MB)
96 06:44:22.366570 progress 65 % (128 MB)
97 06:44:22.532616 progress 70 % (138 MB)
98 06:44:22.647459 progress 75 % (148 MB)
99 06:44:22.733655 progress 80 % (158 MB)
100 06:44:22.811929 progress 85 % (167 MB)
101 06:44:22.925598 progress 90 % (177 MB)
102 06:44:23.250014 progress 95 % (187 MB)
103 06:44:23.929672 progress 100 % (197 MB)
104 06:44:23.936771 197 MB downloaded in 9.42 s (20.96 MB/s)
105 06:44:23.937075 end: 1.3.1 http-download (duration 00:00:09) [common]
107 06:44:23.937368 end: 1.3 download-retry (duration 00:00:09) [common]
108 06:44:23.937470 start: 1.4 download-retry (timeout 00:09:50) [common]
109 06:44:23.937569 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 06:44:23.937733 downloading http://storage.kernelci.org/cip/linux-4.4.y-st/v4.4-st20-2023-g7107c2a794ba/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 06:44:23.937812 saving as /var/lib/lava/dispatcher/tmp/12434441/tftp-deploy-x53ld7q8/modules/modules.tar
112 06:44:23.937879 total size: 250972 (0 MB)
113 06:44:23.937950 Using unxz to decompress xz
114 06:44:23.942408 progress 13 % (0 MB)
115 06:44:23.942900 progress 26 % (0 MB)
116 06:44:23.943167 progress 39 % (0 MB)
117 06:44:23.945040 progress 52 % (0 MB)
118 06:44:23.947172 progress 65 % (0 MB)
119 06:44:23.949273 progress 78 % (0 MB)
120 06:44:23.951238 progress 91 % (0 MB)
121 06:44:23.953440 progress 100 % (0 MB)
122 06:44:23.959459 0 MB downloaded in 0.02 s (11.10 MB/s)
123 06:44:23.959853 end: 1.4.1 http-download (duration 00:00:00) [common]
125 06:44:23.960361 end: 1.4 download-retry (duration 00:00:00) [common]
126 06:44:23.960534 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
127 06:44:23.960707 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
128 06:44:28.023778 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12434441/extract-nfsrootfs-cay7y_uw
129 06:44:28.024003 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 06:44:28.024116 start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
131 06:44:28.024329 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb
132 06:44:28.024568 makedir: /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin
133 06:44:28.024696 makedir: /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/tests
134 06:44:28.024813 makedir: /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/results
135 06:44:28.024926 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-add-keys
136 06:44:28.025097 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-add-sources
137 06:44:28.025251 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-background-process-start
138 06:44:28.025396 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-background-process-stop
139 06:44:28.025546 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-common-functions
140 06:44:28.025690 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-echo-ipv4
141 06:44:28.025838 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-install-packages
142 06:44:28.025980 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-installed-packages
143 06:44:28.026131 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-os-build
144 06:44:28.026273 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-probe-channel
145 06:44:28.026419 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-probe-ip
146 06:44:28.026560 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-target-ip
147 06:44:28.026709 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-target-mac
148 06:44:28.026861 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-target-storage
149 06:44:28.027009 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-test-case
150 06:44:28.027155 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-test-event
151 06:44:28.027303 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-test-feedback
152 06:44:28.027448 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-test-raise
153 06:44:28.027591 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-test-reference
154 06:44:28.027739 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-test-runner
155 06:44:28.027881 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-test-set
156 06:44:28.028029 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-test-shell
157 06:44:28.028173 Updating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-add-keys (debian)
158 06:44:28.028361 Updating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-add-sources (debian)
159 06:44:28.028524 Updating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-install-packages (debian)
160 06:44:28.028681 Updating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-installed-packages (debian)
161 06:44:28.028843 Updating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/bin/lava-os-build (debian)
162 06:44:28.028979 Creating /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/environment
163 06:44:28.029090 LAVA metadata
164 06:44:28.029168 - LAVA_JOB_ID=12434441
165 06:44:28.029251 - LAVA_DISPATCHER_IP=192.168.201.1
166 06:44:28.029370 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
167 06:44:28.029445 skipped lava-vland-overlay
168 06:44:28.029529 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 06:44:28.029622 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
170 06:44:28.029690 skipped lava-multinode-overlay
171 06:44:28.029772 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 06:44:28.029863 start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
173 06:44:28.029946 Loading test definitions
174 06:44:28.030048 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:46) [common]
175 06:44:28.030129 Using /lava-12434441 at stage 0
176 06:44:28.030465 uuid=12434441_1.5.2.3.1 testdef=None
177 06:44:28.030564 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 06:44:28.030662 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
179 06:44:28.031199 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 06:44:28.031450 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
182 06:44:28.032110 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 06:44:28.032390 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
185 06:44:28.033031 runner path: /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/0/tests/0_timesync-off test_uuid 12434441_1.5.2.3.1
186 06:44:28.033212 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 06:44:28.033465 start: 1.5.2.3.5 git-repo-action (timeout 00:09:46) [common]
189 06:44:28.033549 Using /lava-12434441 at stage 0
190 06:44:28.033676 Fetching tests from https://github.com/kernelci/test-definitions.git
191 06:44:28.033765 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/0/tests/1_kselftest-rtc'
192 06:44:32.247630 Running '/usr/bin/git checkout kernelci.org
193 06:44:32.403936 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
194 06:44:32.404797 uuid=12434441_1.5.2.3.5 testdef=None
195 06:44:32.404990 end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
197 06:44:32.405289 start: 1.5.2.3.6 test-overlay (timeout 00:09:42) [common]
198 06:44:32.406170 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 06:44:32.406451 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:42) [common]
201 06:44:32.407596 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 06:44:32.407874 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
204 06:44:32.408973 runner path: /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/0/tests/1_kselftest-rtc test_uuid 12434441_1.5.2.3.5
205 06:44:32.409086 BOARD='asus-C436FA-Flip-hatch'
206 06:44:32.409160 BRANCH='cip'
207 06:44:32.409228 SKIPFILE='/dev/null'
208 06:44:32.409300 SKIP_INSTALL='True'
209 06:44:32.409364 TESTPROG_URL='None'
210 06:44:32.409428 TST_CASENAME=''
211 06:44:32.409490 TST_CMDFILES='rtc'
212 06:44:32.409657 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 06:44:32.409896 Creating lava-test-runner.conf files
215 06:44:32.409970 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12434441/lava-overlay-zhioqhcb/lava-12434441/0 for stage 0
216 06:44:32.410083 - 0_timesync-off
217 06:44:32.410164 - 1_kselftest-rtc
218 06:44:32.410278 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
219 06:44:32.410385 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
220 06:44:41.032994 end: 1.5.2.4 compress-overlay (duration 00:00:09) [common]
221 06:44:41.033192 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
222 06:44:41.033350 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 06:44:41.033513 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
224 06:44:41.033663 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
225 06:44:41.197040 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 06:44:41.197476 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
227 06:44:41.197649 extracting modules file /var/lib/lava/dispatcher/tmp/12434441/tftp-deploy-x53ld7q8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12434441/extract-nfsrootfs-cay7y_uw
228 06:44:41.218979 extracting modules file /var/lib/lava/dispatcher/tmp/12434441/tftp-deploy-x53ld7q8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12434441/extract-overlay-ramdisk-kqodds_g/ramdisk
229 06:44:41.240743 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 06:44:41.240905 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
231 06:44:41.241018 [common] Applying overlay to NFS
232 06:44:41.241099 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12434441/compress-overlay-a67vp1ur/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12434441/extract-nfsrootfs-cay7y_uw
233 06:44:42.525246 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 06:44:42.525449 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
235 06:44:42.525604 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 06:44:42.525710 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
237 06:44:42.525822 Building ramdisk /var/lib/lava/dispatcher/tmp/12434441/extract-overlay-ramdisk-kqodds_g/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12434441/extract-overlay-ramdisk-kqodds_g/ramdisk
238 06:44:42.605830 >> 26160 blocks
239 06:44:43.209207 rename /var/lib/lava/dispatcher/tmp/12434441/extract-overlay-ramdisk-kqodds_g/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12434441/tftp-deploy-x53ld7q8/ramdisk/ramdisk.cpio.gz
240 06:44:43.209718 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 06:44:43.209859 start: 1.5.8 prepare-kernel (timeout 00:09:31) [common]
242 06:44:43.209995 start: 1.5.8.1 prepare-fit (timeout 00:09:31) [common]
243 06:44:43.210112 No mkimage arch provided, not using FIT.
244 06:44:43.210218 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 06:44:43.210319 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 06:44:43.210446 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
247 06:44:43.210547 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
248 06:44:43.210649 No LXC device requested
249 06:44:43.210758 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 06:44:43.210903 start: 1.7 deploy-device-env (timeout 00:09:31) [common]
251 06:44:43.211003 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 06:44:43.211133 Checking files for TFTP limit of 4294967296 bytes.
253 06:44:43.211618 end: 1 tftp-deploy (duration 00:00:29) [common]
254 06:44:43.211737 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 06:44:43.211892 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 06:44:43.212096 substitutions:
257 06:44:43.212220 - {DTB}: None
258 06:44:43.212313 - {INITRD}: 12434441/tftp-deploy-x53ld7q8/ramdisk/ramdisk.cpio.gz
259 06:44:43.212382 - {KERNEL}: 12434441/tftp-deploy-x53ld7q8/kernel/bzImage
260 06:44:43.212507 - {LAVA_MAC}: None
261 06:44:43.212608 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12434441/extract-nfsrootfs-cay7y_uw
262 06:44:43.212715 - {NFS_SERVER_IP}: 192.168.201.1
263 06:44:43.212787 - {PRESEED_CONFIG}: None
264 06:44:43.212852 - {PRESEED_LOCAL}: None
265 06:44:43.212916 - {RAMDISK}: 12434441/tftp-deploy-x53ld7q8/ramdisk/ramdisk.cpio.gz
266 06:44:43.213002 - {ROOT_PART}: None
267 06:44:43.213112 - {ROOT}: None
268 06:44:43.213215 - {SERVER_IP}: 192.168.201.1
269 06:44:43.213299 - {TEE}: None
270 06:44:43.213367 Parsed boot commands:
271 06:44:43.213428 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 06:44:43.213665 Parsed boot commands: tftpboot 192.168.201.1 12434441/tftp-deploy-x53ld7q8/kernel/bzImage 12434441/tftp-deploy-x53ld7q8/kernel/cmdline 12434441/tftp-deploy-x53ld7q8/ramdisk/ramdisk.cpio.gz
273 06:44:43.213815 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 06:44:43.213956 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 06:44:43.214069 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 06:44:43.214176 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 06:44:43.214282 Not connected, no need to disconnect.
278 06:44:43.214422 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 06:44:43.214591 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 06:44:43.214709 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
281 06:44:43.219311 Setting prompt string to ['lava-test: # ']
282 06:44:43.219806 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 06:44:43.220001 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 06:44:43.220156 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 06:44:43.220315 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 06:44:43.220540 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
287 06:44:48.365440 >> Command sent successfully.
288 06:44:48.368374 Returned 0 in 5 seconds
289 06:44:48.468760 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 06:44:48.469113 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 06:44:48.469228 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 06:44:48.469330 Setting prompt string to 'Starting depthcharge on Helios...'
294 06:44:48.469419 Changing prompt to 'Starting depthcharge on Helios...'
295 06:44:48.469520 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 06:44:48.469808 [Enter `^Ec?' for help]
297 06:44:49.090995
298 06:44:49.091164
299 06:44:49.100660 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 06:44:49.104069 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 06:44:49.111182 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 06:44:49.114308 CPU: AES supported, TXT NOT supported, VT supported
303 06:44:49.120955 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 06:44:49.124165 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 06:44:49.131684 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 06:44:49.134857 VBOOT: Loading verstage.
307 06:44:49.137543 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 06:44:49.144264 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 06:44:49.147674 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 06:44:49.151049 CBFS @ c08000 size 3f8000
311 06:44:49.157588 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 06:44:49.160870 CBFS: Locating 'fallback/verstage'
313 06:44:49.164685 CBFS: Found @ offset 10fb80 size 1072c
314 06:44:49.164767
315 06:44:49.164836
316 06:44:49.177557 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 06:44:49.191752 Probing TPM: . done!
318 06:44:49.195186 TPM ready after 0 ms
319 06:44:49.198347 Connected to device vid:did:rid of 1ae0:0028:00
320 06:44:49.208744 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 06:44:49.212046 Initialized TPM device CR50 revision 0
322 06:44:49.257311 tlcl_send_startup: Startup return code is 0
323 06:44:49.257446 TPM: setup succeeded
324 06:44:49.270004 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 06:44:49.273879 Chrome EC: UHEPI supported
326 06:44:49.277271 Phase 1
327 06:44:49.280913 FMAP: area GBB found @ c05000 (12288 bytes)
328 06:44:49.287587 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 06:44:49.287732 Phase 2
330 06:44:49.291022 Phase 3
331 06:44:49.294495 FMAP: area GBB found @ c05000 (12288 bytes)
332 06:44:49.300579 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 06:44:49.307467 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
334 06:44:49.310805 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
335 06:44:49.317614 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 06:44:49.332641 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
337 06:44:49.336147 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
338 06:44:49.342438 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 06:44:49.346969 Phase 4
340 06:44:49.350264 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
341 06:44:49.356723 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 06:44:49.536762 VB2:vb2_rsa_verify_digest() Digest check failed!
343 06:44:49.539863 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 06:44:49.543154 Saving nvdata
345 06:44:49.546679 Reboot requested (10020007)
346 06:44:49.549795 board_reset() called!
347 06:44:49.550030 full_reset() called!
348 06:44:54.057759
349 06:44:54.058314
350 06:44:54.067558 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 06:44:54.070590 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 06:44:54.077406 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 06:44:54.080925 CPU: AES supported, TXT NOT supported, VT supported
354 06:44:54.087380 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 06:44:54.090697 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 06:44:54.097723 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 06:44:54.100834 VBOOT: Loading verstage.
358 06:44:54.104112 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 06:44:54.110524 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 06:44:54.114379 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 06:44:54.117678 CBFS @ c08000 size 3f8000
362 06:44:54.124318 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 06:44:54.127588 CBFS: Locating 'fallback/verstage'
364 06:44:54.130992 CBFS: Found @ offset 10fb80 size 1072c
365 06:44:54.133831
366 06:44:54.133921
367 06:44:54.144145 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 06:44:54.158371 Probing TPM: . done!
369 06:44:54.161703 TPM ready after 0 ms
370 06:44:54.164771 Connected to device vid:did:rid of 1ae0:0028:00
371 06:44:54.175351 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
372 06:44:54.178955 Initialized TPM device CR50 revision 0
373 06:44:54.224328 tlcl_send_startup: Startup return code is 0
374 06:44:54.224432 TPM: setup succeeded
375 06:44:54.236689 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 06:44:54.240693 Chrome EC: UHEPI supported
377 06:44:54.243916 Phase 1
378 06:44:54.247325 FMAP: area GBB found @ c05000 (12288 bytes)
379 06:44:54.254528 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 06:44:54.260754 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 06:44:54.264425 Recovery requested (1009000e)
382 06:44:54.269813 Saving nvdata
383 06:44:54.276078 tlcl_extend: response is 0
384 06:44:54.284750 tlcl_extend: response is 0
385 06:44:54.291514 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 06:44:54.295271 CBFS @ c08000 size 3f8000
387 06:44:54.302101 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 06:44:54.305496 CBFS: Locating 'fallback/romstage'
389 06:44:54.308202 CBFS: Found @ offset 80 size 145fc
390 06:44:54.311858 Accumulated console time in verstage 98 ms
391 06:44:54.311962
392 06:44:54.312066
393 06:44:54.325072 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 06:44:54.331658 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 06:44:54.335675 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 06:44:54.338334 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 06:44:54.345545 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 06:44:54.349034 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 06:44:54.352104 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
400 06:44:54.355405 TCO_STS: 0000 0000
401 06:44:54.358610 GEN_PMCON: e0015238 00000200
402 06:44:54.361866 GBLRST_CAUSE: 00000000 00000000
403 06:44:54.362295 prev_sleep_state 5
404 06:44:54.365316 Boot Count incremented to 67989
405 06:44:54.372582 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 06:44:54.375525 CBFS @ c08000 size 3f8000
407 06:44:54.378658 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 06:44:54.382295 CBFS: Locating 'fspm.bin'
409 06:44:54.385297 CBFS: Found @ offset 5ffc0 size 71000
410 06:44:54.389183 Chrome EC: UHEPI supported
411 06:44:54.396455 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 06:44:54.402138 Probing TPM: done!
413 06:44:54.408539 Connected to device vid:did:rid of 1ae0:0028:00
414 06:44:54.418926 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
415 06:44:54.424047 Initialized TPM device CR50 revision 0
416 06:44:54.433354 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 06:44:54.440022 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 06:44:54.443365 MRC cache found, size 1948
419 06:44:54.446746 bootmode is set to: 2
420 06:44:54.450005 PRMRR disabled by config.
421 06:44:54.450452 SPD INDEX = 1
422 06:44:54.456505 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 06:44:54.459663 CBFS @ c08000 size 3f8000
424 06:44:54.466883 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 06:44:54.467421 CBFS: Locating 'spd.bin'
426 06:44:54.470122 CBFS: Found @ offset 5fb80 size 400
427 06:44:54.473435 SPD: module type is LPDDR3
428 06:44:54.476699 SPD: module part is
429 06:44:54.483261 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 06:44:54.486361 SPD: device width 4 bits, bus width 8 bits
431 06:44:54.489534 SPD: module size is 4096 MB (per channel)
432 06:44:54.493115 memory slot: 0 configuration done.
433 06:44:54.496105 memory slot: 2 configuration done.
434 06:44:54.548369 CBMEM:
435 06:44:54.551338 IMD: root @ 99fff000 254 entries.
436 06:44:54.554700 IMD: root @ 99ffec00 62 entries.
437 06:44:54.558420 External stage cache:
438 06:44:54.561653 IMD: root @ 9abff000 254 entries.
439 06:44:54.565199 IMD: root @ 9abfec00 62 entries.
440 06:44:54.568398 Chrome EC: clear events_b mask to 0x0000000020004000
441 06:44:54.584213 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 06:44:54.597425 tlcl_write: response is 0
443 06:44:54.606100 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 06:44:54.612768 MRC: TPM MRC hash updated successfully.
445 06:44:54.613192 2 DIMMs found
446 06:44:54.616124 SMM Memory Map
447 06:44:54.619510 SMRAM : 0x9a000000 0x1000000
448 06:44:54.622835 Subregion 0: 0x9a000000 0xa00000
449 06:44:54.626603 Subregion 1: 0x9aa00000 0x200000
450 06:44:54.629764 Subregion 2: 0x9ac00000 0x400000
451 06:44:54.633114 top_of_ram = 0x9a000000
452 06:44:54.636214 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 06:44:54.642894 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 06:44:54.646318 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 06:44:54.652653 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 06:44:54.656735 CBFS @ c08000 size 3f8000
457 06:44:54.659375 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 06:44:54.662684 CBFS: Locating 'fallback/postcar'
459 06:44:54.665908 CBFS: Found @ offset 107000 size 4b44
460 06:44:54.672511 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 06:44:54.684745 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 06:44:54.687936 Processing 180 relocs. Offset value of 0x97c0c000
463 06:44:54.696627 Accumulated console time in romstage 286 ms
464 06:44:54.697227
465 06:44:54.697744
466 06:44:54.706922 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 06:44:54.713201 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 06:44:54.716596 CBFS @ c08000 size 3f8000
469 06:44:54.719703 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 06:44:54.722911 CBFS: Locating 'fallback/ramstage'
471 06:44:54.730120 CBFS: Found @ offset 43380 size 1b9e8
472 06:44:54.736334 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 06:44:54.767848 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 06:44:54.771141 Processing 3976 relocs. Offset value of 0x98db0000
475 06:44:54.778448 Accumulated console time in postcar 52 ms
476 06:44:54.779180
477 06:44:54.779555
478 06:44:54.787985 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 06:44:54.791649 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 06:44:54.798268 WARNING: RO_VPD is uninitialized or empty.
481 06:44:54.801651 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 06:44:54.807925 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 06:44:54.808437 Normal boot.
484 06:44:54.815095 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 06:44:54.818482 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 06:44:54.821605 CBFS @ c08000 size 3f8000
487 06:44:54.828272 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 06:44:54.831631 CBFS: Locating 'cpu_microcode_blob.bin'
489 06:44:54.834624 CBFS: Found @ offset 14700 size 2ec00
490 06:44:54.838004 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 06:44:54.841188 Skip microcode update
492 06:44:54.844613 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 06:44:54.847691 CBFS @ c08000 size 3f8000
494 06:44:54.854374 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 06:44:54.857774 CBFS: Locating 'fsps.bin'
496 06:44:54.860888 CBFS: Found @ offset d1fc0 size 35000
497 06:44:54.886384 Detected 4 core, 8 thread CPU.
498 06:44:54.889680 Setting up SMI for CPU
499 06:44:54.892965 IED base = 0x9ac00000
500 06:44:54.893390 IED size = 0x00400000
501 06:44:54.896198 Will perform SMM setup.
502 06:44:54.903153 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 06:44:54.909442 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 06:44:54.912710 Processing 16 relocs. Offset value of 0x00030000
505 06:44:54.916541 Attempting to start 7 APs
506 06:44:54.919679 Waiting for 10ms after sending INIT.
507 06:44:54.936022 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
508 06:44:54.936496 done.
509 06:44:54.939714 AP: slot 2 apic_id 5.
510 06:44:54.943135 AP: slot 5 apic_id 4.
511 06:44:54.946467 Waiting for 2nd SIPI to complete...done.
512 06:44:54.949414 AP: slot 1 apic_id 2.
513 06:44:54.949876 AP: slot 4 apic_id 3.
514 06:44:54.952778 AP: slot 7 apic_id 7.
515 06:44:54.956192 AP: slot 6 apic_id 6.
516 06:44:54.962543 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 06:44:54.965851 Processing 13 relocs. Offset value of 0x00038000
518 06:44:54.972296 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 06:44:54.979805 Installing SMM handler to 0x9a000000
520 06:44:54.986043 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 06:44:54.989095 Processing 658 relocs. Offset value of 0x9a010000
522 06:44:54.999131 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 06:44:55.002276 Processing 13 relocs. Offset value of 0x9a008000
524 06:44:55.009328 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 06:44:55.015670 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 06:44:55.018760 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 06:44:55.025871 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 06:44:55.032306 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 06:44:55.038894 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 06:44:55.042439 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 06:44:55.049063 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 06:44:55.052364 Clearing SMI status registers
533 06:44:55.055342 SMI_STS: PM1
534 06:44:55.055767 PM1_STS: PWRBTN
535 06:44:55.058680 TCO_STS: SECOND_TO
536 06:44:55.062028 New SMBASE 0x9a000000
537 06:44:55.065207 In relocation handler: CPU 0
538 06:44:55.068431 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 06:44:55.072381 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 06:44:55.075752 Relocation complete.
541 06:44:55.078945 New SMBASE 0x99fff400
542 06:44:55.079372 In relocation handler: CPU 3
543 06:44:55.085527 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
544 06:44:55.088804 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 06:44:55.092079 Relocation complete.
546 06:44:55.092550 New SMBASE 0x99fff800
547 06:44:55.095453 In relocation handler: CPU 2
548 06:44:55.102106 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
549 06:44:55.105766 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 06:44:55.108576 Relocation complete.
551 06:44:55.109000 New SMBASE 0x99ffec00
552 06:44:55.112015 In relocation handler: CPU 5
553 06:44:55.115800 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
554 06:44:55.122014 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 06:44:55.125233 Relocation complete.
556 06:44:55.125660 New SMBASE 0x99fffc00
557 06:44:55.128887 In relocation handler: CPU 1
558 06:44:55.131934 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
559 06:44:55.138672 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 06:44:55.141762 Relocation complete.
561 06:44:55.142284 New SMBASE 0x99fff000
562 06:44:55.145225 In relocation handler: CPU 4
563 06:44:55.148602 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
564 06:44:55.155245 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 06:44:55.158522 Relocation complete.
566 06:44:55.159005 New SMBASE 0x99ffe800
567 06:44:55.161902 In relocation handler: CPU 6
568 06:44:55.165170 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
569 06:44:55.171957 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 06:44:55.172436 Relocation complete.
571 06:44:55.175471 New SMBASE 0x99ffe400
572 06:44:55.178670 In relocation handler: CPU 7
573 06:44:55.181985 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
574 06:44:55.188490 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 06:44:55.189102 Relocation complete.
576 06:44:55.191724 Initializing CPU #0
577 06:44:55.195045 CPU: vendor Intel device 806ec
578 06:44:55.198285 CPU: family 06, model 8e, stepping 0c
579 06:44:55.201388 Clearing out pending MCEs
580 06:44:55.205100 Setting up local APIC...
581 06:44:55.205619 apic_id: 0x00 done.
582 06:44:55.208313 Turbo is available but hidden
583 06:44:55.211576 Turbo is available and visible
584 06:44:55.215157 VMX status: enabled
585 06:44:55.218438 IA32_FEATURE_CONTROL status: locked
586 06:44:55.221572 Skip microcode update
587 06:44:55.221999 CPU #0 initialized
588 06:44:55.224822 Initializing CPU #3
589 06:44:55.225248 Initializing CPU #4
590 06:44:55.228676 CPU: vendor Intel device 806ec
591 06:44:55.231797 CPU: family 06, model 8e, stepping 0c
592 06:44:55.234910 Clearing out pending MCEs
593 06:44:55.238252 Initializing CPU #6
594 06:44:55.238697 Initializing CPU #7
595 06:44:55.241692 CPU: vendor Intel device 806ec
596 06:44:55.248081 CPU: family 06, model 8e, stepping 0c
597 06:44:55.248563 CPU: vendor Intel device 806ec
598 06:44:55.254752 CPU: family 06, model 8e, stepping 0c
599 06:44:55.255187 Clearing out pending MCEs
600 06:44:55.258472 Clearing out pending MCEs
601 06:44:55.261536 Setting up local APIC...
602 06:44:55.264717 CPU: vendor Intel device 806ec
603 06:44:55.268184 CPU: family 06, model 8e, stepping 0c
604 06:44:55.271704 Initializing CPU #1
605 06:44:55.272127 Clearing out pending MCEs
606 06:44:55.275155 CPU: vendor Intel device 806ec
607 06:44:55.281558 CPU: family 06, model 8e, stepping 0c
608 06:44:55.281992 Setting up local APIC...
609 06:44:55.284733 Initializing CPU #5
610 06:44:55.288333 Initializing CPU #2
611 06:44:55.288773 CPU: vendor Intel device 806ec
612 06:44:55.294595 CPU: family 06, model 8e, stepping 0c
613 06:44:55.295092 Setting up local APIC...
614 06:44:55.298492 apic_id: 0x03 done.
615 06:44:55.301188 Clearing out pending MCEs
616 06:44:55.301646 VMX status: enabled
617 06:44:55.304886 Setting up local APIC...
618 06:44:55.308083 apic_id: 0x01 done.
619 06:44:55.308665 apic_id: 0x02 done.
620 06:44:55.314440 IA32_FEATURE_CONTROL status: locked
621 06:44:55.314914 VMX status: enabled
622 06:44:55.317702 Skip microcode update
623 06:44:55.321691 IA32_FEATURE_CONTROL status: locked
624 06:44:55.324601 CPU #4 initialized
625 06:44:55.325136 Skip microcode update
626 06:44:55.327692 Setting up local APIC...
627 06:44:55.330849 VMX status: enabled
628 06:44:55.331244 CPU #1 initialized
629 06:44:55.334509 apic_id: 0x07 done.
630 06:44:55.334933 apic_id: 0x06 done.
631 06:44:55.337693 VMX status: enabled
632 06:44:55.340748 VMX status: enabled
633 06:44:55.344631 IA32_FEATURE_CONTROL status: locked
634 06:44:55.347762 IA32_FEATURE_CONTROL status: locked
635 06:44:55.351201 Skip microcode update
636 06:44:55.351339 Skip microcode update
637 06:44:55.354356 CPU #7 initialized
638 06:44:55.354491 CPU #6 initialized
639 06:44:55.357347 Clearing out pending MCEs
640 06:44:55.361075 CPU: vendor Intel device 806ec
641 06:44:55.364228 CPU: family 06, model 8e, stepping 0c
642 06:44:55.367482 Clearing out pending MCEs
643 06:44:55.370636 Setting up local APIC...
644 06:44:55.374538 IA32_FEATURE_CONTROL status: locked
645 06:44:55.377666 Setting up local APIC...
646 06:44:55.377774 Skip microcode update
647 06:44:55.380705 apic_id: 0x04 done.
648 06:44:55.384302 apic_id: 0x05 done.
649 06:44:55.384476 VMX status: enabled
650 06:44:55.387190 VMX status: enabled
651 06:44:55.390483 IA32_FEATURE_CONTROL status: locked
652 06:44:55.394148 IA32_FEATURE_CONTROL status: locked
653 06:44:55.397583 Skip microcode update
654 06:44:55.397690 Skip microcode update
655 06:44:55.400784 CPU #5 initialized
656 06:44:55.400883 CPU #2 initialized
657 06:44:55.404049 CPU #3 initialized
658 06:44:55.407285 bsp_do_flight_plan done after 461 msecs.
659 06:44:55.410720 CPU: frequency set to 4200 MHz
660 06:44:55.413714 Enabling SMIs.
661 06:44:55.413821 Locking SMM.
662 06:44:55.429154 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 06:44:55.432692 CBFS @ c08000 size 3f8000
664 06:44:55.439395 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 06:44:55.439560 CBFS: Locating 'vbt.bin'
666 06:44:55.442474 CBFS: Found @ offset 5f5c0 size 499
667 06:44:55.449351 Found a VBT of 4608 bytes after decompression
668 06:44:55.631642 Display FSP Version Info HOB
669 06:44:55.634921 Reference Code - CPU = 9.0.1e.30
670 06:44:55.638251 uCode Version = 0.0.0.ca
671 06:44:55.641647 TXT ACM version = ff.ff.ff.ffff
672 06:44:55.644823 Display FSP Version Info HOB
673 06:44:55.648327 Reference Code - ME = 9.0.1e.30
674 06:44:55.651482 MEBx version = 0.0.0.0
675 06:44:55.654919 ME Firmware Version = Consumer SKU
676 06:44:55.658274 Display FSP Version Info HOB
677 06:44:55.661286 Reference Code - CML PCH = 9.0.1e.30
678 06:44:55.664789 PCH-CRID Status = Disabled
679 06:44:55.668439 PCH-CRID Original Value = ff.ff.ff.ffff
680 06:44:55.671924 PCH-CRID New Value = ff.ff.ff.ffff
681 06:44:55.675100 OPROM - RST - RAID = ff.ff.ff.ffff
682 06:44:55.678454 ChipsetInit Base Version = ff.ff.ff.ffff
683 06:44:55.681655 ChipsetInit Oem Version = ff.ff.ff.ffff
684 06:44:55.684607 Display FSP Version Info HOB
685 06:44:55.691579 Reference Code - SA - System Agent = 9.0.1e.30
686 06:44:55.694801 Reference Code - MRC = 0.7.1.6c
687 06:44:55.695050 SA - PCIe Version = 9.0.1e.30
688 06:44:55.698056 SA-CRID Status = Disabled
689 06:44:55.701703 SA-CRID Original Value = 0.0.0.c
690 06:44:55.704693 SA-CRID New Value = 0.0.0.c
691 06:44:55.708494 OPROM - VBIOS = ff.ff.ff.ffff
692 06:44:55.708639 RTC Init
693 06:44:55.714875 Set power on after power failure.
694 06:44:55.715034 Disabling Deep S3
695 06:44:55.718641 Disabling Deep S3
696 06:44:55.718786 Disabling Deep S4
697 06:44:55.721520 Disabling Deep S4
698 06:44:55.721608 Disabling Deep S5
699 06:44:55.725201 Disabling Deep S5
700 06:44:55.731846 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
701 06:44:55.731953 Enumerating buses...
702 06:44:55.738334 Show all devs... Before device enumeration.
703 06:44:55.738439 Root Device: enabled 1
704 06:44:55.741663 CPU_CLUSTER: 0: enabled 1
705 06:44:55.744796 DOMAIN: 0000: enabled 1
706 06:44:55.744877 APIC: 00: enabled 1
707 06:44:55.747978 PCI: 00:00.0: enabled 1
708 06:44:55.751325 PCI: 00:02.0: enabled 1
709 06:44:55.754770 PCI: 00:04.0: enabled 0
710 06:44:55.754853 PCI: 00:05.0: enabled 0
711 06:44:55.757912 PCI: 00:12.0: enabled 1
712 06:44:55.761613 PCI: 00:12.5: enabled 0
713 06:44:55.764837 PCI: 00:12.6: enabled 0
714 06:44:55.764919 PCI: 00:14.0: enabled 1
715 06:44:55.767696 PCI: 00:14.1: enabled 0
716 06:44:55.771713 PCI: 00:14.3: enabled 1
717 06:44:55.774349 PCI: 00:14.5: enabled 0
718 06:44:55.774438 PCI: 00:15.0: enabled 1
719 06:44:55.778227 PCI: 00:15.1: enabled 1
720 06:44:55.781692 PCI: 00:15.2: enabled 0
721 06:44:55.781824 PCI: 00:15.3: enabled 0
722 06:44:55.784955 PCI: 00:16.0: enabled 1
723 06:44:55.787989 PCI: 00:16.1: enabled 0
724 06:44:55.791498 PCI: 00:16.2: enabled 0
725 06:44:55.791653 PCI: 00:16.3: enabled 0
726 06:44:55.794349 PCI: 00:16.4: enabled 0
727 06:44:55.798044 PCI: 00:16.5: enabled 0
728 06:44:55.801328 PCI: 00:17.0: enabled 1
729 06:44:55.801458 PCI: 00:19.0: enabled 1
730 06:44:55.804648 PCI: 00:19.1: enabled 0
731 06:44:55.807712 PCI: 00:19.2: enabled 0
732 06:44:55.811295 PCI: 00:1a.0: enabled 0
733 06:44:55.811496 PCI: 00:1c.0: enabled 0
734 06:44:55.814517 PCI: 00:1c.1: enabled 0
735 06:44:55.818009 PCI: 00:1c.2: enabled 0
736 06:44:55.818233 PCI: 00:1c.3: enabled 0
737 06:44:55.821292 PCI: 00:1c.4: enabled 0
738 06:44:55.824860 PCI: 00:1c.5: enabled 0
739 06:44:55.827742 PCI: 00:1c.6: enabled 0
740 06:44:55.828117 PCI: 00:1c.7: enabled 0
741 06:44:55.831201 PCI: 00:1d.0: enabled 1
742 06:44:55.834731 PCI: 00:1d.1: enabled 0
743 06:44:55.837595 PCI: 00:1d.2: enabled 0
744 06:44:55.837958 PCI: 00:1d.3: enabled 0
745 06:44:55.840848 PCI: 00:1d.4: enabled 0
746 06:44:55.844760 PCI: 00:1d.5: enabled 1
747 06:44:55.847894 PCI: 00:1e.0: enabled 1
748 06:44:55.848106 PCI: 00:1e.1: enabled 0
749 06:44:55.851300 PCI: 00:1e.2: enabled 1
750 06:44:55.854732 PCI: 00:1e.3: enabled 1
751 06:44:55.854907 PCI: 00:1f.0: enabled 1
752 06:44:55.857858 PCI: 00:1f.1: enabled 1
753 06:44:55.861037 PCI: 00:1f.2: enabled 1
754 06:44:55.864227 PCI: 00:1f.3: enabled 1
755 06:44:55.864366 PCI: 00:1f.4: enabled 1
756 06:44:55.867398 PCI: 00:1f.5: enabled 1
757 06:44:55.870737 PCI: 00:1f.6: enabled 0
758 06:44:55.874385 USB0 port 0: enabled 1
759 06:44:55.874496 I2C: 00:15: enabled 1
760 06:44:55.877483 I2C: 00:5d: enabled 1
761 06:44:55.880697 GENERIC: 0.0: enabled 1
762 06:44:55.880830 I2C: 00:1a: enabled 1
763 06:44:55.884085 I2C: 00:38: enabled 1
764 06:44:55.887539 I2C: 00:39: enabled 1
765 06:44:55.887630 I2C: 00:3a: enabled 1
766 06:44:55.890680 I2C: 00:3b: enabled 1
767 06:44:55.894020 PCI: 00:00.0: enabled 1
768 06:44:55.894131 SPI: 00: enabled 1
769 06:44:55.897323 SPI: 01: enabled 1
770 06:44:55.900459 PNP: 0c09.0: enabled 1
771 06:44:55.900544 USB2 port 0: enabled 1
772 06:44:55.904135 USB2 port 1: enabled 1
773 06:44:55.907555 USB2 port 2: enabled 0
774 06:44:55.907646 USB2 port 3: enabled 0
775 06:44:55.910656 USB2 port 5: enabled 0
776 06:44:55.913821 USB2 port 6: enabled 1
777 06:44:55.917121 USB2 port 9: enabled 1
778 06:44:55.917204 USB3 port 0: enabled 1
779 06:44:55.921072 USB3 port 1: enabled 1
780 06:44:55.924062 USB3 port 2: enabled 1
781 06:44:55.924144 USB3 port 3: enabled 1
782 06:44:55.927746 USB3 port 4: enabled 0
783 06:44:55.930813 APIC: 02: enabled 1
784 06:44:55.930900 APIC: 05: enabled 1
785 06:44:55.933954 APIC: 01: enabled 1
786 06:44:55.934050 APIC: 03: enabled 1
787 06:44:55.937657 APIC: 04: enabled 1
788 06:44:55.940557 APIC: 06: enabled 1
789 06:44:55.940641 APIC: 07: enabled 1
790 06:44:55.944106 Compare with tree...
791 06:44:55.947703 Root Device: enabled 1
792 06:44:55.950573 CPU_CLUSTER: 0: enabled 1
793 06:44:55.950659 APIC: 00: enabled 1
794 06:44:55.953751 APIC: 02: enabled 1
795 06:44:55.957134 APIC: 05: enabled 1
796 06:44:55.957216 APIC: 01: enabled 1
797 06:44:55.960428 APIC: 03: enabled 1
798 06:44:55.963794 APIC: 04: enabled 1
799 06:44:55.963875 APIC: 06: enabled 1
800 06:44:55.967381 APIC: 07: enabled 1
801 06:44:55.970385 DOMAIN: 0000: enabled 1
802 06:44:55.970466 PCI: 00:00.0: enabled 1
803 06:44:55.973662 PCI: 00:02.0: enabled 1
804 06:44:55.977069 PCI: 00:04.0: enabled 0
805 06:44:55.980784 PCI: 00:05.0: enabled 0
806 06:44:55.984067 PCI: 00:12.0: enabled 1
807 06:44:55.984160 PCI: 00:12.5: enabled 0
808 06:44:55.987336 PCI: 00:12.6: enabled 0
809 06:44:55.990779 PCI: 00:14.0: enabled 1
810 06:44:55.993811 USB0 port 0: enabled 1
811 06:44:55.997179 USB2 port 0: enabled 1
812 06:44:55.997262 USB2 port 1: enabled 1
813 06:44:56.000585 USB2 port 2: enabled 0
814 06:44:56.003730 USB2 port 3: enabled 0
815 06:44:56.006852 USB2 port 5: enabled 0
816 06:44:56.010537 USB2 port 6: enabled 1
817 06:44:56.013776 USB2 port 9: enabled 1
818 06:44:56.013874 USB3 port 0: enabled 1
819 06:44:56.017032 USB3 port 1: enabled 1
820 06:44:56.020834 USB3 port 2: enabled 1
821 06:44:56.023944 USB3 port 3: enabled 1
822 06:44:56.027150 USB3 port 4: enabled 0
823 06:44:56.027238 PCI: 00:14.1: enabled 0
824 06:44:56.030575 PCI: 00:14.3: enabled 1
825 06:44:56.033611 PCI: 00:14.5: enabled 0
826 06:44:56.036771 PCI: 00:15.0: enabled 1
827 06:44:56.040589 I2C: 00:15: enabled 1
828 06:44:56.040670 PCI: 00:15.1: enabled 1
829 06:44:56.043422 I2C: 00:5d: enabled 1
830 06:44:56.047224 GENERIC: 0.0: enabled 1
831 06:44:56.050596 PCI: 00:15.2: enabled 0
832 06:44:56.053602 PCI: 00:15.3: enabled 0
833 06:44:56.053683 PCI: 00:16.0: enabled 1
834 06:44:56.057121 PCI: 00:16.1: enabled 0
835 06:44:56.060627 PCI: 00:16.2: enabled 0
836 06:44:56.063496 PCI: 00:16.3: enabled 0
837 06:44:56.063589 PCI: 00:16.4: enabled 0
838 06:44:56.066838 PCI: 00:16.5: enabled 0
839 06:44:56.069945 PCI: 00:17.0: enabled 1
840 06:44:56.073952 PCI: 00:19.0: enabled 1
841 06:44:56.076877 I2C: 00:1a: enabled 1
842 06:44:56.076977 I2C: 00:38: enabled 1
843 06:44:56.080050 I2C: 00:39: enabled 1
844 06:44:56.083371 I2C: 00:3a: enabled 1
845 06:44:56.087034 I2C: 00:3b: enabled 1
846 06:44:56.087118 PCI: 00:19.1: enabled 0
847 06:44:56.090257 PCI: 00:19.2: enabled 0
848 06:44:56.093326 PCI: 00:1a.0: enabled 0
849 06:44:56.097280 PCI: 00:1c.0: enabled 0
850 06:44:56.099957 PCI: 00:1c.1: enabled 0
851 06:44:56.100039 PCI: 00:1c.2: enabled 0
852 06:44:56.103273 PCI: 00:1c.3: enabled 0
853 06:44:56.107201 PCI: 00:1c.4: enabled 0
854 06:44:56.109980 PCI: 00:1c.5: enabled 0
855 06:44:56.113911 PCI: 00:1c.6: enabled 0
856 06:44:56.114011 PCI: 00:1c.7: enabled 0
857 06:44:56.116865 PCI: 00:1d.0: enabled 1
858 06:44:56.119773 PCI: 00:1d.1: enabled 0
859 06:44:56.123547 PCI: 00:1d.2: enabled 0
860 06:44:56.123645 PCI: 00:1d.3: enabled 0
861 06:44:56.126863 PCI: 00:1d.4: enabled 0
862 06:44:56.130036 PCI: 00:1d.5: enabled 1
863 06:44:56.133306 PCI: 00:00.0: enabled 1
864 06:44:56.136580 PCI: 00:1e.0: enabled 1
865 06:44:56.136688 PCI: 00:1e.1: enabled 0
866 06:44:56.139904 PCI: 00:1e.2: enabled 1
867 06:44:56.143219 SPI: 00: enabled 1
868 06:44:56.147036 PCI: 00:1e.3: enabled 1
869 06:44:56.147119 SPI: 01: enabled 1
870 06:44:56.150165 PCI: 00:1f.0: enabled 1
871 06:44:56.153269 PNP: 0c09.0: enabled 1
872 06:44:56.156649 PCI: 00:1f.1: enabled 1
873 06:44:56.159825 PCI: 00:1f.2: enabled 1
874 06:44:56.159911 PCI: 00:1f.3: enabled 1
875 06:44:56.163024 PCI: 00:1f.4: enabled 1
876 06:44:56.166809 PCI: 00:1f.5: enabled 1
877 06:44:56.169697 PCI: 00:1f.6: enabled 0
878 06:44:56.169787 Root Device scanning...
879 06:44:56.173580 scan_static_bus for Root Device
880 06:44:56.176626 CPU_CLUSTER: 0 enabled
881 06:44:56.180193 DOMAIN: 0000 enabled
882 06:44:56.183253 DOMAIN: 0000 scanning...
883 06:44:56.186680 PCI: pci_scan_bus for bus 00
884 06:44:56.186764 PCI: 00:00.0 [8086/0000] ops
885 06:44:56.189758 PCI: 00:00.0 [8086/9b61] enabled
886 06:44:56.193702 PCI: 00:02.0 [8086/0000] bus ops
887 06:44:56.196554 PCI: 00:02.0 [8086/9b41] enabled
888 06:44:56.199802 PCI: 00:04.0 [8086/1903] disabled
889 06:44:56.203791 PCI: 00:08.0 [8086/1911] enabled
890 06:44:56.207166 PCI: 00:12.0 [8086/02f9] enabled
891 06:44:56.210493 PCI: 00:14.0 [8086/0000] bus ops
892 06:44:56.213215 PCI: 00:14.0 [8086/02ed] enabled
893 06:44:56.217048 PCI: 00:14.2 [8086/02ef] enabled
894 06:44:56.220201 PCI: 00:14.3 [8086/02f0] enabled
895 06:44:56.223320 PCI: 00:15.0 [8086/0000] bus ops
896 06:44:56.227007 PCI: 00:15.0 [8086/02e8] enabled
897 06:44:56.229885 PCI: 00:15.1 [8086/0000] bus ops
898 06:44:56.236977 PCI: 00:15.1 [8086/02e9] enabled
899 06:44:56.237141 PCI: 00:16.0 [8086/0000] ops
900 06:44:56.240316 PCI: 00:16.0 [8086/02e0] enabled
901 06:44:56.243412 PCI: 00:17.0 [8086/0000] ops
902 06:44:56.246639 PCI: 00:17.0 [8086/02d3] enabled
903 06:44:56.249999 PCI: 00:19.0 [8086/0000] bus ops
904 06:44:56.253794 PCI: 00:19.0 [8086/02c5] enabled
905 06:44:56.257022 PCI: 00:1d.0 [8086/0000] bus ops
906 06:44:56.260149 PCI: 00:1d.0 [8086/02b0] enabled
907 06:44:56.266388 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 06:44:56.269966 PCI: 00:1e.0 [8086/0000] ops
909 06:44:56.273022 PCI: 00:1e.0 [8086/02a8] enabled
910 06:44:56.276845 PCI: 00:1e.2 [8086/0000] bus ops
911 06:44:56.279937 PCI: 00:1e.2 [8086/02aa] enabled
912 06:44:56.283424 PCI: 00:1e.3 [8086/0000] bus ops
913 06:44:56.286790 PCI: 00:1e.3 [8086/02ab] enabled
914 06:44:56.289808 PCI: 00:1f.0 [8086/0000] bus ops
915 06:44:56.293458 PCI: 00:1f.0 [8086/0284] enabled
916 06:44:56.299746 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 06:44:56.303394 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 06:44:56.306345 PCI: 00:1f.3 [8086/0000] bus ops
919 06:44:56.309403 PCI: 00:1f.3 [8086/02c8] enabled
920 06:44:56.312814 PCI: 00:1f.4 [8086/0000] bus ops
921 06:44:56.316777 PCI: 00:1f.4 [8086/02a3] enabled
922 06:44:56.320045 PCI: 00:1f.5 [8086/0000] bus ops
923 06:44:56.323222 PCI: 00:1f.5 [8086/02a4] enabled
924 06:44:56.326031 PCI: Leftover static devices:
925 06:44:56.329942 PCI: 00:05.0
926 06:44:56.330357 PCI: 00:12.5
927 06:44:56.333064 PCI: 00:12.6
928 06:44:56.333499 PCI: 00:14.1
929 06:44:56.333853 PCI: 00:14.5
930 06:44:56.336149 PCI: 00:15.2
931 06:44:56.336622 PCI: 00:15.3
932 06:44:56.339256 PCI: 00:16.1
933 06:44:56.339674 PCI: 00:16.2
934 06:44:56.340006 PCI: 00:16.3
935 06:44:56.342840 PCI: 00:16.4
936 06:44:56.343269 PCI: 00:16.5
937 06:44:56.346028 PCI: 00:19.1
938 06:44:56.346443 PCI: 00:19.2
939 06:44:56.346772 PCI: 00:1a.0
940 06:44:56.349100 PCI: 00:1c.0
941 06:44:56.349514 PCI: 00:1c.1
942 06:44:56.352980 PCI: 00:1c.2
943 06:44:56.353395 PCI: 00:1c.3
944 06:44:56.356342 PCI: 00:1c.4
945 06:44:56.356762 PCI: 00:1c.5
946 06:44:56.357090 PCI: 00:1c.6
947 06:44:56.359524 PCI: 00:1c.7
948 06:44:56.359939 PCI: 00:1d.1
949 06:44:56.362743 PCI: 00:1d.2
950 06:44:56.363160 PCI: 00:1d.3
951 06:44:56.363493 PCI: 00:1d.4
952 06:44:56.365932 PCI: 00:1d.5
953 06:44:56.366351 PCI: 00:1e.1
954 06:44:56.369501 PCI: 00:1f.1
955 06:44:56.369919 PCI: 00:1f.2
956 06:44:56.370253 PCI: 00:1f.6
957 06:44:56.372945 PCI: Check your devicetree.cb.
958 06:44:56.376228 PCI: 00:02.0 scanning...
959 06:44:56.379412 scan_generic_bus for PCI: 00:02.0
960 06:44:56.382976 scan_generic_bus for PCI: 00:02.0 done
961 06:44:56.389410 scan_bus: scanning of bus PCI: 00:02.0 took 10189 usecs
962 06:44:56.392446 PCI: 00:14.0 scanning...
963 06:44:56.396153 scan_static_bus for PCI: 00:14.0
964 06:44:56.398922 USB0 port 0 enabled
965 06:44:56.399348 USB0 port 0 scanning...
966 06:44:56.402357 scan_static_bus for USB0 port 0
967 06:44:56.405871 USB2 port 0 enabled
968 06:44:56.408937 USB2 port 1 enabled
969 06:44:56.409388 USB2 port 2 disabled
970 06:44:56.412636 USB2 port 3 disabled
971 06:44:56.415740 USB2 port 5 disabled
972 06:44:56.416236 USB2 port 6 enabled
973 06:44:56.419340 USB2 port 9 enabled
974 06:44:56.419786 USB3 port 0 enabled
975 06:44:56.422428 USB3 port 1 enabled
976 06:44:56.425879 USB3 port 2 enabled
977 06:44:56.426303 USB3 port 3 enabled
978 06:44:56.429271 USB3 port 4 disabled
979 06:44:56.432594 USB2 port 0 scanning...
980 06:44:56.435882 scan_static_bus for USB2 port 0
981 06:44:56.439259 scan_static_bus for USB2 port 0 done
982 06:44:56.442528 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
983 06:44:56.446064 USB2 port 1 scanning...
984 06:44:56.449141 scan_static_bus for USB2 port 1
985 06:44:56.452747 scan_static_bus for USB2 port 1 done
986 06:44:56.459496 scan_bus: scanning of bus USB2 port 1 took 9712 usecs
987 06:44:56.462960 USB2 port 6 scanning...
988 06:44:56.466212 scan_static_bus for USB2 port 6
989 06:44:56.469355 scan_static_bus for USB2 port 6 done
990 06:44:56.472664 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
991 06:44:56.475677 USB2 port 9 scanning...
992 06:44:56.478890 scan_static_bus for USB2 port 9
993 06:44:56.482393 scan_static_bus for USB2 port 9 done
994 06:44:56.489597 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
995 06:44:56.492233 USB3 port 0 scanning...
996 06:44:56.496091 scan_static_bus for USB3 port 0
997 06:44:56.498961 scan_static_bus for USB3 port 0 done
998 06:44:56.502758 scan_bus: scanning of bus USB3 port 0 took 9700 usecs
999 06:44:56.505828 USB3 port 1 scanning...
1000 06:44:56.509161 scan_static_bus for USB3 port 1
1001 06:44:56.512456 scan_static_bus for USB3 port 1 done
1002 06:44:56.519207 scan_bus: scanning of bus USB3 port 1 took 9709 usecs
1003 06:44:56.522193 USB3 port 2 scanning...
1004 06:44:56.525831 scan_static_bus for USB3 port 2
1005 06:44:56.529238 scan_static_bus for USB3 port 2 done
1006 06:44:56.532288 scan_bus: scanning of bus USB3 port 2 took 9712 usecs
1007 06:44:56.535856 USB3 port 3 scanning...
1008 06:44:56.538857 scan_static_bus for USB3 port 3
1009 06:44:56.542225 scan_static_bus for USB3 port 3 done
1010 06:44:56.549008 scan_bus: scanning of bus USB3 port 3 took 9708 usecs
1011 06:44:56.552695 scan_static_bus for USB0 port 0 done
1012 06:44:56.558967 scan_bus: scanning of bus USB0 port 0 took 155444 usecs
1013 06:44:56.562601 scan_static_bus for PCI: 00:14.0 done
1014 06:44:56.569079 scan_bus: scanning of bus PCI: 00:14.0 took 173069 usecs
1015 06:44:56.569509 PCI: 00:15.0 scanning...
1016 06:44:56.572342 scan_generic_bus for PCI: 00:15.0
1017 06:44:56.578880 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 06:44:56.582909 scan_generic_bus for PCI: 00:15.0 done
1019 06:44:56.585507 scan_bus: scanning of bus PCI: 00:15.0 took 14304 usecs
1020 06:44:56.589154 PCI: 00:15.1 scanning...
1021 06:44:56.592518 scan_generic_bus for PCI: 00:15.1
1022 06:44:56.599159 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 06:44:56.602640 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 06:44:56.605734 scan_generic_bus for PCI: 00:15.1 done
1025 06:44:56.612342 scan_bus: scanning of bus PCI: 00:15.1 took 18609 usecs
1026 06:44:56.612783 PCI: 00:19.0 scanning...
1027 06:44:56.618956 scan_generic_bus for PCI: 00:19.0
1028 06:44:56.622615 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 06:44:56.626018 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 06:44:56.629189 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 06:44:56.632596 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 06:44:56.639477 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 06:44:56.642968 scan_generic_bus for PCI: 00:19.0 done
1034 06:44:56.645811 scan_bus: scanning of bus PCI: 00:19.0 took 30751 usecs
1035 06:44:56.649263 PCI: 00:1d.0 scanning...
1036 06:44:56.652514 do_pci_scan_bridge for PCI: 00:1d.0
1037 06:44:56.655769 PCI: pci_scan_bus for bus 01
1038 06:44:56.659332 PCI: 01:00.0 [1c5c/1327] enabled
1039 06:44:56.662578 Enabling Common Clock Configuration
1040 06:44:56.668965 L1 Sub-State supported from root port 29
1041 06:44:56.672792 L1 Sub-State Support = 0xf
1042 06:44:56.673351 CommonModeRestoreTime = 0x28
1043 06:44:56.678977 Power On Value = 0x16, Power On Scale = 0x0
1044 06:44:56.679400 ASPM: Enabled L1
1045 06:44:56.686179 scan_bus: scanning of bus PCI: 00:1d.0 took 32786 usecs
1046 06:44:56.688924 PCI: 00:1e.2 scanning...
1047 06:44:56.692201 scan_generic_bus for PCI: 00:1e.2
1048 06:44:56.696071 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 06:44:56.699124 scan_generic_bus for PCI: 00:1e.2 done
1050 06:44:56.705837 scan_bus: scanning of bus PCI: 00:1e.2 took 14021 usecs
1051 06:44:56.709170 PCI: 00:1e.3 scanning...
1052 06:44:56.712426 scan_generic_bus for PCI: 00:1e.3
1053 06:44:56.715705 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 06:44:56.718885 scan_generic_bus for PCI: 00:1e.3 done
1055 06:44:56.725475 scan_bus: scanning of bus PCI: 00:1e.3 took 14020 usecs
1056 06:44:56.725892 PCI: 00:1f.0 scanning...
1057 06:44:56.729352 scan_static_bus for PCI: 00:1f.0
1058 06:44:56.732515 PNP: 0c09.0 enabled
1059 06:44:56.735861 scan_static_bus for PCI: 00:1f.0 done
1060 06:44:56.742379 scan_bus: scanning of bus PCI: 00:1f.0 took 12047 usecs
1061 06:44:56.745751 PCI: 00:1f.3 scanning...
1062 06:44:56.748991 scan_bus: scanning of bus PCI: 00:1f.3 took 2853 usecs
1063 06:44:56.752208 PCI: 00:1f.4 scanning...
1064 06:44:56.756155 scan_generic_bus for PCI: 00:1f.4
1065 06:44:56.759251 scan_generic_bus for PCI: 00:1f.4 done
1066 06:44:56.765375 scan_bus: scanning of bus PCI: 00:1f.4 took 10199 usecs
1067 06:44:56.769449 PCI: 00:1f.5 scanning...
1068 06:44:56.772599 scan_generic_bus for PCI: 00:1f.5
1069 06:44:56.775940 scan_generic_bus for PCI: 00:1f.5 done
1070 06:44:56.782442 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1071 06:44:56.789180 scan_bus: scanning of bus DOMAIN: 0000 took 605252 usecs
1072 06:44:56.792102 scan_static_bus for Root Device done
1073 06:44:56.795829 scan_bus: scanning of bus Root Device took 625126 usecs
1074 06:44:56.798805 done
1075 06:44:56.799225 Chrome EC: UHEPI supported
1076 06:44:56.805825 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 06:44:56.812717 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 06:44:56.819282 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 06:44:56.825654 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 06:44:56.829392 SPI flash protection: WPSW=0 SRP0=0
1081 06:44:56.832628 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 06:44:56.838935 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1083 06:44:56.842184 found VGA at PCI: 00:02.0
1084 06:44:56.846095 Setting up VGA for PCI: 00:02.0
1085 06:44:56.849443 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 06:44:56.855718 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 06:44:56.859242 Allocating resources...
1088 06:44:56.859661 Reading resources...
1089 06:44:56.865921 Root Device read_resources bus 0 link: 0
1090 06:44:56.868995 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 06:44:56.875326 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 06:44:56.878680 DOMAIN: 0000 read_resources bus 0 link: 0
1093 06:44:56.885970 PCI: 00:14.0 read_resources bus 0 link: 0
1094 06:44:56.889181 USB0 port 0 read_resources bus 0 link: 0
1095 06:44:56.897115 USB0 port 0 read_resources bus 0 link: 0 done
1096 06:44:56.900312 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 06:44:56.907638 PCI: 00:15.0 read_resources bus 1 link: 0
1098 06:44:56.910760 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 06:44:56.917244 PCI: 00:15.1 read_resources bus 2 link: 0
1100 06:44:56.920863 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 06:44:56.927948 PCI: 00:19.0 read_resources bus 3 link: 0
1102 06:44:56.934900 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 06:44:56.938345 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 06:44:56.944552 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 06:44:56.947948 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 06:44:56.955110 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 06:44:56.958451 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 06:44:56.964720 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 06:44:56.968435 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 06:44:56.975339 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 06:44:56.978090 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 06:44:56.985193 Root Device read_resources bus 0 link: 0 done
1113 06:44:56.988499 Done reading resources.
1114 06:44:56.991580 Show resources in subtree (Root Device)...After reading.
1115 06:44:56.998428 Root Device child on link 0 CPU_CLUSTER: 0
1116 06:44:57.001505 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 06:44:57.001925 APIC: 00
1118 06:44:57.004715 APIC: 02
1119 06:44:57.005149 APIC: 05
1120 06:44:57.005514 APIC: 01
1121 06:44:57.008049 APIC: 03
1122 06:44:57.008513 APIC: 04
1123 06:44:57.011884 APIC: 06
1124 06:44:57.012336 APIC: 07
1125 06:44:57.015097 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 06:44:57.024751 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 06:44:57.081019 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 06:44:57.081516 PCI: 00:00.0
1129 06:44:57.082217 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 06:44:57.083075 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 06:44:57.083454 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 06:44:57.083887 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 06:44:57.124068 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 06:44:57.124954 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 06:44:57.125538 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 06:44:57.126012 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 06:44:57.126410 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 06:44:57.128769 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 06:44:57.138986 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 06:44:57.148968 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 06:44:57.158528 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 06:44:57.168669 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 06:44:57.178622 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 06:44:57.185630 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 06:44:57.188609 PCI: 00:02.0
1146 06:44:57.198816 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 06:44:57.208932 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 06:44:57.218719 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 06:44:57.219206 PCI: 00:04.0
1150 06:44:57.221690 PCI: 00:08.0
1151 06:44:57.231598 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 06:44:57.232017 PCI: 00:12.0
1153 06:44:57.242357 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 06:44:57.245495 PCI: 00:14.0 child on link 0 USB0 port 0
1155 06:44:57.255116 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 06:44:57.261449 USB0 port 0 child on link 0 USB2 port 0
1157 06:44:57.261887 USB2 port 0
1158 06:44:57.264718 USB2 port 1
1159 06:44:57.265182 USB2 port 2
1160 06:44:57.267969 USB2 port 3
1161 06:44:57.268488 USB2 port 5
1162 06:44:57.271414 USB2 port 6
1163 06:44:57.271827 USB2 port 9
1164 06:44:57.274643 USB3 port 0
1165 06:44:57.278442 USB3 port 1
1166 06:44:57.278902 USB3 port 2
1167 06:44:57.281657 USB3 port 3
1168 06:44:57.282179 USB3 port 4
1169 06:44:57.284899 PCI: 00:14.2
1170 06:44:57.295401 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 06:44:57.304545 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 06:44:57.304976 PCI: 00:14.3
1173 06:44:57.315186 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 06:44:57.318035 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 06:44:57.328092 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 06:44:57.331431 I2C: 01:15
1177 06:44:57.334846 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 06:44:57.344869 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 06:44:57.348164 I2C: 02:5d
1180 06:44:57.348687 GENERIC: 0.0
1181 06:44:57.351353 PCI: 00:16.0
1182 06:44:57.361819 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 06:44:57.362240 PCI: 00:17.0
1184 06:44:57.371370 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 06:44:57.378212 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 06:44:57.388370 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 06:44:57.395046 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 06:44:57.404991 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 06:44:57.414954 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 06:44:57.417908 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 06:44:57.427940 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 06:44:57.428406 I2C: 03:1a
1193 06:44:57.431152 I2C: 03:38
1194 06:44:57.431568 I2C: 03:39
1195 06:44:57.434844 I2C: 03:3a
1196 06:44:57.435264 I2C: 03:3b
1197 06:44:57.441555 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 06:44:57.448311 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 06:44:57.457806 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 06:44:57.467729 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 06:44:57.468148 PCI: 01:00.0
1202 06:44:57.478106 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 06:44:57.481392 PCI: 00:1e.0
1204 06:44:57.491083 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 06:44:57.501132 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 06:44:57.504323 PCI: 00:1e.2 child on link 0 SPI: 00
1207 06:44:57.514556 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 06:44:57.517999 SPI: 00
1209 06:44:57.521107 PCI: 00:1e.3 child on link 0 SPI: 01
1210 06:44:57.531277 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 06:44:57.531703 SPI: 01
1212 06:44:57.537400 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 06:44:57.544372 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 06:44:57.554259 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 06:44:57.557290 PNP: 0c09.0
1216 06:44:57.563966 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 06:44:57.567340 PCI: 00:1f.3
1218 06:44:57.577208 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 06:44:57.587064 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 06:44:57.587491 PCI: 00:1f.4
1221 06:44:57.597463 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 06:44:57.607030 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 06:44:57.607613 PCI: 00:1f.5
1224 06:44:57.617497 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 06:44:57.623985 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 06:44:57.630550 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 06:44:57.637112 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 06:44:57.640371 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 06:44:57.643873 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 06:44:57.647364 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 06:44:57.650448 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 06:44:57.657485 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 06:44:57.663711 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 06:44:57.673826 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 06:44:57.680237 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 06:44:57.687464 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 06:44:57.693564 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 06:44:57.700395 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 06:44:57.703447 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 06:44:57.710122 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 06:44:57.713347 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 06:44:57.720065 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 06:44:57.723726 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 06:44:57.730282 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 06:44:57.733535 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 06:44:57.739764 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 06:44:57.743751 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 06:44:57.749780 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 06:44:57.752981 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 06:44:57.756523 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 06:44:57.763375 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 06:44:57.766423 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 06:44:57.773124 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 06:44:57.776381 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 06:44:57.783336 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 06:44:57.786575 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 06:44:57.793477 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 06:44:57.796619 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 06:44:57.803505 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 06:44:57.806622 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 06:44:57.813128 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 06:44:57.819569 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 06:44:57.823343 avoid_fixed_resources: DOMAIN: 0000
1264 06:44:57.829559 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 06:44:57.836334 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 06:44:57.843432 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 06:44:57.850247 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 06:44:57.860141 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 06:44:57.866492 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 06:44:57.872987 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 06:44:57.883290 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 06:44:57.889911 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 06:44:57.896576 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 06:44:57.903071 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 06:44:57.909825 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 06:44:57.913471 Setting resources...
1277 06:44:57.919552 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 06:44:57.923118 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 06:44:57.926288 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 06:44:57.933291 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 06:44:57.936589 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 06:44:57.942981 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 06:44:57.949975 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 06:44:57.956332 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 06:44:57.963165 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 06:44:57.966231 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 06:44:57.973123 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 06:44:57.976387 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 06:44:57.982869 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 06:44:57.986127 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 06:44:57.992663 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 06:44:57.995782 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 06:44:58.002450 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 06:44:58.006233 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 06:44:58.013021 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 06:44:58.015850 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 06:44:58.022611 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 06:44:58.026032 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 06:44:58.029028 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 06:44:58.036065 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 06:44:58.039147 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 06:44:58.045986 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 06:44:58.049356 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 06:44:58.055796 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 06:44:58.059057 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 06:44:58.066169 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 06:44:58.069281 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 06:44:58.075901 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 06:44:58.082946 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 06:44:58.089398 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 06:44:58.095768 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 06:44:58.102986 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 06:44:58.109562 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 06:44:58.115694 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 06:44:58.119293 Root Device assign_resources, bus 0 link: 0
1316 06:44:58.125866 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 06:44:58.133031 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 06:44:58.142576 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 06:44:58.149535 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 06:44:58.159447 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 06:44:58.166053 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 06:44:58.175624 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 06:44:58.178976 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 06:44:58.185931 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 06:44:58.192373 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 06:44:58.199015 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 06:44:58.209030 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 06:44:58.216226 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 06:44:58.222481 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 06:44:58.226018 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 06:44:58.236033 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 06:44:58.239192 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 06:44:58.242424 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 06:44:58.252532 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 06:44:58.259258 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 06:44:58.268820 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 06:44:58.275857 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 06:44:58.282048 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 06:44:58.292330 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 06:44:58.299155 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 06:44:58.305586 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 06:44:58.311998 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 06:44:58.315498 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 06:44:58.325437 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 06:44:58.335301 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 06:44:58.341897 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 06:44:58.348830 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 06:44:58.355185 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 06:44:58.358688 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 06:44:58.368960 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 06:44:58.375387 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 06:44:58.382030 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 06:44:58.385229 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 06:44:58.395103 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 06:44:58.398245 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 06:44:58.401679 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 06:44:58.408618 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 06:44:58.411670 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 06:44:58.418478 LPC: Trying to open IO window from 800 size 1ff
1360 06:44:58.425592 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 06:44:58.435768 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 06:44:58.441337 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 06:44:58.451485 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 06:44:58.454612 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 06:44:58.461610 Root Device assign_resources, bus 0 link: 0
1366 06:44:58.461703 Done setting resources.
1367 06:44:58.468045 Show resources in subtree (Root Device)...After assigning values.
1368 06:44:58.474577 Root Device child on link 0 CPU_CLUSTER: 0
1369 06:44:58.478213 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 06:44:58.478296 APIC: 00
1371 06:44:58.481074 APIC: 02
1372 06:44:58.481154 APIC: 05
1373 06:44:58.481228 APIC: 01
1374 06:44:58.485042 APIC: 03
1375 06:44:58.485141 APIC: 04
1376 06:44:58.485211 APIC: 06
1377 06:44:58.488065 APIC: 07
1378 06:44:58.491344 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 06:44:58.501281 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 06:44:58.510953 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 06:44:58.514642 PCI: 00:00.0
1382 06:44:58.524384 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 06:44:58.534162 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 06:44:58.544235 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 06:44:58.550703 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 06:44:58.561064 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 06:44:58.570956 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 06:44:58.580634 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 06:44:58.590491 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 06:44:58.597132 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 06:44:58.607185 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 06:44:58.617135 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 06:44:58.627034 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 06:44:58.636966 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 06:44:58.647007 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 06:44:58.656983 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 06:44:58.663499 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 06:44:58.667422 PCI: 00:02.0
1399 06:44:58.677027 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 06:44:58.686820 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 06:44:58.697223 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 06:44:58.697646 PCI: 00:04.0
1403 06:44:58.700310 PCI: 00:08.0
1404 06:44:58.710409 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 06:44:58.714648 PCI: 00:12.0
1406 06:44:58.723421 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 06:44:58.726640 PCI: 00:14.0 child on link 0 USB0 port 0
1408 06:44:58.736348 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 06:44:58.743237 USB0 port 0 child on link 0 USB2 port 0
1410 06:44:58.743657 USB2 port 0
1411 06:44:58.746720 USB2 port 1
1412 06:44:58.747135 USB2 port 2
1413 06:44:58.750011 USB2 port 3
1414 06:44:58.750427 USB2 port 5
1415 06:44:58.753386 USB2 port 6
1416 06:44:58.753795 USB2 port 9
1417 06:44:58.756503 USB3 port 0
1418 06:44:58.756916 USB3 port 1
1419 06:44:58.759623 USB3 port 2
1420 06:44:58.760036 USB3 port 3
1421 06:44:58.762852 USB3 port 4
1422 06:44:58.763264 PCI: 00:14.2
1423 06:44:58.772846 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 06:44:58.786172 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 06:44:58.786780 PCI: 00:14.3
1426 06:44:58.796174 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 06:44:58.803117 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 06:44:58.813106 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 06:44:58.813608 I2C: 01:15
1430 06:44:58.816360 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 06:44:58.825792 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 06:44:58.829850 I2C: 02:5d
1433 06:44:58.830263 GENERIC: 0.0
1434 06:44:58.832949 PCI: 00:16.0
1435 06:44:58.842568 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 06:44:58.846143 PCI: 00:17.0
1437 06:44:58.855956 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 06:44:58.865825 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 06:44:58.875565 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 06:44:58.882397 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 06:44:58.892466 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 06:44:58.902321 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 06:44:58.905342 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 06:44:58.915416 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 06:44:58.918694 I2C: 03:1a
1446 06:44:58.919145 I2C: 03:38
1447 06:44:58.922014 I2C: 03:39
1448 06:44:58.922469 I2C: 03:3a
1449 06:44:58.925146 I2C: 03:3b
1450 06:44:58.929264 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 06:44:58.938754 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 06:44:58.948735 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 06:44:58.958623 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 06:44:58.962250 PCI: 01:00.0
1455 06:44:58.971467 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 06:44:58.971903 PCI: 00:1e.0
1457 06:44:58.985223 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 06:44:58.994784 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 06:44:58.998158 PCI: 00:1e.2 child on link 0 SPI: 00
1460 06:44:59.008536 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 06:44:59.011555 SPI: 00
1462 06:44:59.014829 PCI: 00:1e.3 child on link 0 SPI: 01
1463 06:44:59.024620 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 06:44:59.025077 SPI: 01
1465 06:44:59.031147 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 06:44:59.038014 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 06:44:59.047672 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 06:44:59.048155 PNP: 0c09.0
1469 06:44:59.057987 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 06:44:59.061162 PCI: 00:1f.3
1471 06:44:59.070813 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 06:44:59.080774 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 06:44:59.081194 PCI: 00:1f.4
1474 06:44:59.090922 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 06:44:59.100957 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 06:44:59.103871 PCI: 00:1f.5
1477 06:44:59.114187 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 06:44:59.117237 Done allocating resources.
1479 06:44:59.120321 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 06:44:59.123925 Enabling resources...
1481 06:44:59.127314 PCI: 00:00.0 subsystem <- 8086/9b61
1482 06:44:59.130639 PCI: 00:00.0 cmd <- 06
1483 06:44:59.133806 PCI: 00:02.0 subsystem <- 8086/9b41
1484 06:44:59.137177 PCI: 00:02.0 cmd <- 03
1485 06:44:59.140980 PCI: 00:08.0 cmd <- 06
1486 06:44:59.144166 PCI: 00:12.0 subsystem <- 8086/02f9
1487 06:44:59.147273 PCI: 00:12.0 cmd <- 02
1488 06:44:59.150692 PCI: 00:14.0 subsystem <- 8086/02ed
1489 06:44:59.153971 PCI: 00:14.0 cmd <- 02
1490 06:44:59.154404 PCI: 00:14.2 cmd <- 02
1491 06:44:59.160745 PCI: 00:14.3 subsystem <- 8086/02f0
1492 06:44:59.161174 PCI: 00:14.3 cmd <- 02
1493 06:44:59.163952 PCI: 00:15.0 subsystem <- 8086/02e8
1494 06:44:59.167275 PCI: 00:15.0 cmd <- 02
1495 06:44:59.170555 PCI: 00:15.1 subsystem <- 8086/02e9
1496 06:44:59.173633 PCI: 00:15.1 cmd <- 02
1497 06:44:59.176916 PCI: 00:16.0 subsystem <- 8086/02e0
1498 06:44:59.180547 PCI: 00:16.0 cmd <- 02
1499 06:44:59.183621 PCI: 00:17.0 subsystem <- 8086/02d3
1500 06:44:59.186689 PCI: 00:17.0 cmd <- 03
1501 06:44:59.190047 PCI: 00:19.0 subsystem <- 8086/02c5
1502 06:44:59.193785 PCI: 00:19.0 cmd <- 02
1503 06:44:59.197034 PCI: 00:1d.0 bridge ctrl <- 0013
1504 06:44:59.200146 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 06:44:59.203174 PCI: 00:1d.0 cmd <- 06
1506 06:44:59.207024 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 06:44:59.207442 PCI: 00:1e.0 cmd <- 06
1508 06:44:59.213593 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 06:44:59.214010 PCI: 00:1e.2 cmd <- 06
1510 06:44:59.216770 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 06:44:59.220562 PCI: 00:1e.3 cmd <- 02
1512 06:44:59.223782 PCI: 00:1f.0 subsystem <- 8086/0284
1513 06:44:59.227420 PCI: 00:1f.0 cmd <- 407
1514 06:44:59.230351 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 06:44:59.233776 PCI: 00:1f.3 cmd <- 02
1516 06:44:59.237028 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 06:44:59.240128 PCI: 00:1f.4 cmd <- 03
1518 06:44:59.243756 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 06:44:59.246843 PCI: 00:1f.5 cmd <- 406
1520 06:44:59.255235 PCI: 01:00.0 cmd <- 02
1521 06:44:59.260529 done.
1522 06:44:59.272237 ME: Version: 14.0.39.1367
1523 06:44:59.278765 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1524 06:44:59.281954 Initializing devices...
1525 06:44:59.282416 Root Device init ...
1526 06:44:59.288651 Chrome EC: Set SMI mask to 0x0000000000000000
1527 06:44:59.291861 Chrome EC: clear events_b mask to 0x0000000000000000
1528 06:44:59.298211 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 06:44:59.305359 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 06:44:59.311745 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 06:44:59.315053 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 06:44:59.318318 Root Device init finished in 35209 usecs
1533 06:44:59.322277 CPU_CLUSTER: 0 init ...
1534 06:44:59.328420 CPU_CLUSTER: 0 init finished in 2448 usecs
1535 06:44:59.333043 PCI: 00:00.0 init ...
1536 06:44:59.335618 CPU TDP: 15 Watts
1537 06:44:59.339620 CPU PL2 = 64 Watts
1538 06:44:59.342770 PCI: 00:00.0 init finished in 7079 usecs
1539 06:44:59.346284 PCI: 00:02.0 init ...
1540 06:44:59.349566 PCI: 00:02.0 init finished in 2252 usecs
1541 06:44:59.352555 PCI: 00:08.0 init ...
1542 06:44:59.356155 PCI: 00:08.0 init finished in 2251 usecs
1543 06:44:59.359163 PCI: 00:12.0 init ...
1544 06:44:59.362531 PCI: 00:12.0 init finished in 2243 usecs
1545 06:44:59.366225 PCI: 00:14.0 init ...
1546 06:44:59.369295 PCI: 00:14.0 init finished in 2243 usecs
1547 06:44:59.372558 PCI: 00:14.2 init ...
1548 06:44:59.375979 PCI: 00:14.2 init finished in 2253 usecs
1549 06:44:59.379074 PCI: 00:14.3 init ...
1550 06:44:59.382437 PCI: 00:14.3 init finished in 2271 usecs
1551 06:44:59.385656 PCI: 00:15.0 init ...
1552 06:44:59.388996 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 06:44:59.392382 PCI: 00:15.0 init finished in 5981 usecs
1554 06:44:59.395801 PCI: 00:15.1 init ...
1555 06:44:59.399006 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 06:44:59.402481 PCI: 00:15.1 init finished in 5967 usecs
1557 06:44:59.406174 PCI: 00:16.0 init ...
1558 06:44:59.409282 PCI: 00:16.0 init finished in 2253 usecs
1559 06:44:59.413097 PCI: 00:19.0 init ...
1560 06:44:59.416287 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 06:44:59.422769 PCI: 00:19.0 init finished in 5979 usecs
1562 06:44:59.423208 PCI: 00:1d.0 init ...
1563 06:44:59.426510 Initializing PCH PCIe bridge.
1564 06:44:59.429836 PCI: 00:1d.0 init finished in 5285 usecs
1565 06:44:59.434470 PCI: 00:1f.0 init ...
1566 06:44:59.438009 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 06:44:59.444460 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 06:44:59.444868 IOAPIC: ID = 0x02
1569 06:44:59.447601 IOAPIC: Dumping registers
1570 06:44:59.451033 reg 0x0000: 0x02000000
1571 06:44:59.454180 reg 0x0001: 0x00770020
1572 06:44:59.454591 reg 0x0002: 0x00000000
1573 06:44:59.461129 PCI: 00:1f.0 init finished in 23533 usecs
1574 06:44:59.464665 PCI: 00:1f.4 init ...
1575 06:44:59.467635 PCI: 00:1f.4 init finished in 2263 usecs
1576 06:44:59.478701 PCI: 01:00.0 init ...
1577 06:44:59.481852 PCI: 01:00.0 init finished in 2252 usecs
1578 06:44:59.486499 PNP: 0c09.0 init ...
1579 06:44:59.489278 Google Chrome EC uptime: 11.047 seconds
1580 06:44:59.496305 Google Chrome AP resets since EC boot: 0
1581 06:44:59.499789 Google Chrome most recent AP reset causes:
1582 06:44:59.506218 Google Chrome EC reset flags at last EC boot: reset-pin
1583 06:44:59.509570 PNP: 0c09.0 init finished in 20561 usecs
1584 06:44:59.512958 Devices initialized
1585 06:44:59.513372 Show all devs... After init.
1586 06:44:59.515685 Root Device: enabled 1
1587 06:44:59.519365 CPU_CLUSTER: 0: enabled 1
1588 06:44:59.522398 DOMAIN: 0000: enabled 1
1589 06:44:59.522840 APIC: 00: enabled 1
1590 06:44:59.526199 PCI: 00:00.0: enabled 1
1591 06:44:59.529340 PCI: 00:02.0: enabled 1
1592 06:44:59.532925 PCI: 00:04.0: enabled 0
1593 06:44:59.533343 PCI: 00:05.0: enabled 0
1594 06:44:59.535846 PCI: 00:12.0: enabled 1
1595 06:44:59.539325 PCI: 00:12.5: enabled 0
1596 06:44:59.539827 PCI: 00:12.6: enabled 0
1597 06:44:59.542433 PCI: 00:14.0: enabled 1
1598 06:44:59.545866 PCI: 00:14.1: enabled 0
1599 06:44:59.549107 PCI: 00:14.3: enabled 1
1600 06:44:59.549531 PCI: 00:14.5: enabled 0
1601 06:44:59.552347 PCI: 00:15.0: enabled 1
1602 06:44:59.555452 PCI: 00:15.1: enabled 1
1603 06:44:59.558882 PCI: 00:15.2: enabled 0
1604 06:44:59.559298 PCI: 00:15.3: enabled 0
1605 06:44:59.562226 PCI: 00:16.0: enabled 1
1606 06:44:59.566113 PCI: 00:16.1: enabled 0
1607 06:44:59.568772 PCI: 00:16.2: enabled 0
1608 06:44:59.569189 PCI: 00:16.3: enabled 0
1609 06:44:59.572380 PCI: 00:16.4: enabled 0
1610 06:44:59.575468 PCI: 00:16.5: enabled 0
1611 06:44:59.579058 PCI: 00:17.0: enabled 1
1612 06:44:59.579542 PCI: 00:19.0: enabled 1
1613 06:44:59.582152 PCI: 00:19.1: enabled 0
1614 06:44:59.585971 PCI: 00:19.2: enabled 0
1615 06:44:59.586385 PCI: 00:1a.0: enabled 0
1616 06:44:59.589087 PCI: 00:1c.0: enabled 0
1617 06:44:59.592290 PCI: 00:1c.1: enabled 0
1618 06:44:59.595662 PCI: 00:1c.2: enabled 0
1619 06:44:59.596077 PCI: 00:1c.3: enabled 0
1620 06:44:59.598871 PCI: 00:1c.4: enabled 0
1621 06:44:59.601967 PCI: 00:1c.5: enabled 0
1622 06:44:59.605791 PCI: 00:1c.6: enabled 0
1623 06:44:59.606207 PCI: 00:1c.7: enabled 0
1624 06:44:59.608755 PCI: 00:1d.0: enabled 1
1625 06:44:59.611906 PCI: 00:1d.1: enabled 0
1626 06:44:59.615248 PCI: 00:1d.2: enabled 0
1627 06:44:59.615667 PCI: 00:1d.3: enabled 0
1628 06:44:59.618819 PCI: 00:1d.4: enabled 0
1629 06:44:59.621765 PCI: 00:1d.5: enabled 0
1630 06:44:59.622177 PCI: 00:1e.0: enabled 1
1631 06:44:59.625360 PCI: 00:1e.1: enabled 0
1632 06:44:59.628735 PCI: 00:1e.2: enabled 1
1633 06:44:59.631788 PCI: 00:1e.3: enabled 1
1634 06:44:59.632233 PCI: 00:1f.0: enabled 1
1635 06:44:59.635033 PCI: 00:1f.1: enabled 0
1636 06:44:59.638336 PCI: 00:1f.2: enabled 0
1637 06:44:59.641803 PCI: 00:1f.3: enabled 1
1638 06:44:59.642254 PCI: 00:1f.4: enabled 1
1639 06:44:59.645082 PCI: 00:1f.5: enabled 1
1640 06:44:59.648066 PCI: 00:1f.6: enabled 0
1641 06:44:59.651531 USB0 port 0: enabled 1
1642 06:44:59.651976 I2C: 01:15: enabled 1
1643 06:44:59.654881 I2C: 02:5d: enabled 1
1644 06:44:59.658230 GENERIC: 0.0: enabled 1
1645 06:44:59.658676 I2C: 03:1a: enabled 1
1646 06:44:59.661919 I2C: 03:38: enabled 1
1647 06:44:59.665185 I2C: 03:39: enabled 1
1648 06:44:59.665595 I2C: 03:3a: enabled 1
1649 06:44:59.668480 I2C: 03:3b: enabled 1
1650 06:44:59.671807 PCI: 00:00.0: enabled 1
1651 06:44:59.672297 SPI: 00: enabled 1
1652 06:44:59.674902 SPI: 01: enabled 1
1653 06:44:59.678293 PNP: 0c09.0: enabled 1
1654 06:44:59.678747 USB2 port 0: enabled 1
1655 06:44:59.681471 USB2 port 1: enabled 1
1656 06:44:59.684492 USB2 port 2: enabled 0
1657 06:44:59.685048 USB2 port 3: enabled 0
1658 06:44:59.688503 USB2 port 5: enabled 0
1659 06:44:59.691438 USB2 port 6: enabled 1
1660 06:44:59.694537 USB2 port 9: enabled 1
1661 06:44:59.695050 USB3 port 0: enabled 1
1662 06:44:59.698109 USB3 port 1: enabled 1
1663 06:44:59.701431 USB3 port 2: enabled 1
1664 06:44:59.701880 USB3 port 3: enabled 1
1665 06:44:59.704590 USB3 port 4: enabled 0
1666 06:44:59.708048 APIC: 02: enabled 1
1667 06:44:59.708595 APIC: 05: enabled 1
1668 06:44:59.711382 APIC: 01: enabled 1
1669 06:44:59.714537 APIC: 03: enabled 1
1670 06:44:59.715007 APIC: 04: enabled 1
1671 06:44:59.717830 APIC: 06: enabled 1
1672 06:44:59.718275 APIC: 07: enabled 1
1673 06:44:59.721278 PCI: 00:08.0: enabled 1
1674 06:44:59.724649 PCI: 00:14.2: enabled 1
1675 06:44:59.728094 PCI: 01:00.0: enabled 1
1676 06:44:59.731616 Disabling ACPI via APMC:
1677 06:44:59.732029 done.
1678 06:44:59.738184 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 06:44:59.741455 ELOG: NV offset 0xaf0000 size 0x4000
1680 06:44:59.747868 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 06:44:59.754591 ELOG: Event(17) added with size 13 at 2024-01-03 06:44:27 UTC
1682 06:44:59.761773 ELOG: Event(92) added with size 9 at 2024-01-03 06:44:27 UTC
1683 06:44:59.768515 ELOG: Event(93) added with size 9 at 2024-01-03 06:44:27 UTC
1684 06:44:59.774735 ELOG: Event(9A) added with size 9 at 2024-01-03 06:44:27 UTC
1685 06:44:59.781164 ELOG: Event(9E) added with size 10 at 2024-01-03 06:44:27 UTC
1686 06:44:59.787688 ELOG: Event(9F) added with size 14 at 2024-01-03 06:44:27 UTC
1687 06:44:59.791463 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1688 06:44:59.797814 ELOG: Event(A1) added with size 10 at 2024-01-03 06:44:27 UTC
1689 06:44:59.807947 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 06:44:59.814536 ELOG: Event(A0) added with size 9 at 2024-01-03 06:44:27 UTC
1691 06:44:59.817865 elog_add_boot_reason: Logged dev mode boot
1692 06:44:59.818376 Finalize devices...
1693 06:44:59.821206 PCI: 00:17.0 final
1694 06:44:59.824398 Devices finalized
1695 06:44:59.827588 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 06:44:59.834594 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 06:44:59.837749 ME: HFSTS1 : 0x90000245
1698 06:44:59.841061 ME: HFSTS2 : 0x3B850126
1699 06:44:59.847960 ME: HFSTS3 : 0x00000020
1700 06:44:59.851261 ME: HFSTS4 : 0x00004800
1701 06:44:59.853932 ME: HFSTS5 : 0x00000000
1702 06:44:59.857480 ME: HFSTS6 : 0x40400006
1703 06:44:59.860730 ME: Manufacturing Mode : NO
1704 06:44:59.864334 ME: FW Partition Table : OK
1705 06:44:59.867590 ME: Bringup Loader Failure : NO
1706 06:44:59.870859 ME: Firmware Init Complete : YES
1707 06:44:59.874090 ME: Boot Options Present : NO
1708 06:44:59.877749 ME: Update In Progress : NO
1709 06:44:59.881020 ME: D0i3 Support : YES
1710 06:44:59.884134 ME: Low Power State Enabled : NO
1711 06:44:59.887272 ME: CPU Replaced : NO
1712 06:44:59.890680 ME: CPU Replacement Valid : YES
1713 06:44:59.894168 ME: Current Working State : 5
1714 06:44:59.897464 ME: Current Operation State : 1
1715 06:44:59.900882 ME: Current Operation Mode : 0
1716 06:44:59.903911 ME: Error Code : 0
1717 06:44:59.907116 ME: CPU Debug Disabled : YES
1718 06:44:59.910843 ME: TXT Support : NO
1719 06:44:59.917100 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 06:44:59.923655 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 06:44:59.924073 CBFS @ c08000 size 3f8000
1722 06:44:59.930257 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 06:44:59.933646 CBFS: Locating 'fallback/dsdt.aml'
1724 06:44:59.937193 CBFS: Found @ offset 10bb80 size 3fa5
1725 06:44:59.943858 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 06:44:59.947009 CBFS @ c08000 size 3f8000
1727 06:44:59.950639 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 06:44:59.953711 CBFS: Locating 'fallback/slic'
1729 06:44:59.958663 CBFS: 'fallback/slic' not found.
1730 06:44:59.965118 ACPI: Writing ACPI tables at 99b3e000.
1731 06:44:59.965534 ACPI: * FACS
1732 06:44:59.968069 ACPI: * DSDT
1733 06:44:59.971658 Ramoops buffer: 0x100000@0x99a3d000.
1734 06:44:59.975053 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 06:44:59.981285 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 06:44:59.984722 Google Chrome EC: version:
1737 06:44:59.988021 ro: helios_v2.0.2659-56403530b
1738 06:44:59.991610 rw: helios_v2.0.2849-c41de27e7d
1739 06:44:59.992028 running image: 1
1740 06:44:59.996333 ACPI: * FADT
1741 06:44:59.996819 SCI is IRQ9
1742 06:45:00.002648 ACPI: added table 1/32, length now 40
1743 06:45:00.003239 ACPI: * SSDT
1744 06:45:00.005841 Found 1 CPU(s) with 8 core(s) each.
1745 06:45:00.009447 Error: Could not locate 'wifi_sar' in VPD.
1746 06:45:00.016202 Checking CBFS for default SAR values
1747 06:45:00.019331 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 06:45:00.022369 CBFS @ c08000 size 3f8000
1749 06:45:00.029047 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 06:45:00.032451 CBFS: Locating 'wifi_sar_defaults.hex'
1751 06:45:00.035627 CBFS: Found @ offset 5fac0 size 77
1752 06:45:00.039053 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 06:45:00.045537 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 06:45:00.049038 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 06:45:00.055308 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 06:45:00.058585 failed to find key in VPD: dsm_calib_r0_0
1757 06:45:00.069136 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 06:45:00.072501 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 06:45:00.075177 failed to find key in VPD: dsm_calib_r0_1
1760 06:45:00.085518 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 06:45:00.091675 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 06:45:00.095315 failed to find key in VPD: dsm_calib_r0_2
1763 06:45:00.105302 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 06:45:00.108547 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 06:45:00.115089 failed to find key in VPD: dsm_calib_r0_3
1766 06:45:00.121507 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 06:45:00.128594 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 06:45:00.131998 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 06:45:00.134697 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 06:45:00.138644 EC returned error result code 1
1771 06:45:00.142453 EC returned error result code 1
1772 06:45:00.146676 EC returned error result code 1
1773 06:45:00.152968 PS2K: Bad resp from EC. Vivaldi disabled!
1774 06:45:00.156060 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 06:45:00.163082 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 06:45:00.169526 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 06:45:00.172616 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 06:45:00.179212 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 06:45:00.185677 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 06:45:00.192739 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 06:45:00.196114 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 06:45:00.202433 ACPI: added table 2/32, length now 44
1783 06:45:00.202857 ACPI: * MCFG
1784 06:45:00.205781 ACPI: added table 3/32, length now 48
1785 06:45:00.209082 ACPI: * TPM2
1786 06:45:00.212677 TPM2 log created at 99a2d000
1787 06:45:00.215631 ACPI: added table 4/32, length now 52
1788 06:45:00.216059 ACPI: * MADT
1789 06:45:00.218857 SCI is IRQ9
1790 06:45:00.222286 ACPI: added table 5/32, length now 56
1791 06:45:00.222883 current = 99b43ac0
1792 06:45:00.226031 ACPI: * DMAR
1793 06:45:00.228936 ACPI: added table 6/32, length now 60
1794 06:45:00.232147 ACPI: * IGD OpRegion
1795 06:45:00.232634 GMA: Found VBT in CBFS
1796 06:45:00.235908 GMA: Found valid VBT in CBFS
1797 06:45:00.238801 ACPI: added table 7/32, length now 64
1798 06:45:00.242758 ACPI: * HPET
1799 06:45:00.245433 ACPI: added table 8/32, length now 68
1800 06:45:00.245972 ACPI: done.
1801 06:45:00.248613 ACPI tables: 31744 bytes.
1802 06:45:00.252359 smbios_write_tables: 99a2c000
1803 06:45:00.255865 EC returned error result code 3
1804 06:45:00.258938 Couldn't obtain OEM name from CBI
1805 06:45:00.262508 Create SMBIOS type 17
1806 06:45:00.265677 PCI: 00:00.0 (Intel Cannonlake)
1807 06:45:00.269251 PCI: 00:14.3 (Intel WiFi)
1808 06:45:00.272590 SMBIOS tables: 939 bytes.
1809 06:45:00.275608 Writing table forward entry at 0x00000500
1810 06:45:00.282439 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 06:45:00.285313 Writing coreboot table at 0x99b62000
1812 06:45:00.292653 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 06:45:00.295613 1. 0000000000001000-000000000009ffff: RAM
1814 06:45:00.298747 2. 00000000000a0000-00000000000fffff: RESERVED
1815 06:45:00.305263 3. 0000000000100000-0000000099a2bfff: RAM
1816 06:45:00.308484 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 06:45:00.315065 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 06:45:00.322210 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 06:45:00.325339 7. 000000009a000000-000000009f7fffff: RESERVED
1820 06:45:00.331523 8. 00000000e0000000-00000000efffffff: RESERVED
1821 06:45:00.334967 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 06:45:00.338929 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 06:45:00.344961 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 06:45:00.348697 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 06:45:00.354857 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 06:45:00.358138 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 06:45:00.361900 15. 0000000100000000-000000045e7fffff: RAM
1828 06:45:00.368361 Graphics framebuffer located at 0xc0000000
1829 06:45:00.371705 Passing 5 GPIOs to payload:
1830 06:45:00.375226 NAME | PORT | POLARITY | VALUE
1831 06:45:00.381661 write protect | undefined | high | low
1832 06:45:00.384880 lid | undefined | high | high
1833 06:45:00.391586 power | undefined | high | low
1834 06:45:00.398188 oprom | undefined | high | low
1835 06:45:00.401424 EC in RW | 0x000000cb | high | low
1836 06:45:00.404587 Board ID: 4
1837 06:45:00.408044 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 06:45:00.412056 CBFS @ c08000 size 3f8000
1839 06:45:00.417826 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 06:45:00.421117 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1841 06:45:00.425113 coreboot table: 1492 bytes.
1842 06:45:00.428316 IMD ROOT 0. 99fff000 00001000
1843 06:45:00.431446 IMD SMALL 1. 99ffe000 00001000
1844 06:45:00.434455 FSP MEMORY 2. 99c4e000 003b0000
1845 06:45:00.438407 CONSOLE 3. 99c2e000 00020000
1846 06:45:00.441411 FMAP 4. 99c2d000 0000054e
1847 06:45:00.444790 TIME STAMP 5. 99c2c000 00000910
1848 06:45:00.448010 VBOOT WORK 6. 99c18000 00014000
1849 06:45:00.451158 MRC DATA 7. 99c16000 00001958
1850 06:45:00.454493 ROMSTG STCK 8. 99c15000 00001000
1851 06:45:00.457753 AFTER CAR 9. 99c0b000 0000a000
1852 06:45:00.460939 RAMSTAGE 10. 99baf000 0005c000
1853 06:45:00.464541 REFCODE 11. 99b7a000 00035000
1854 06:45:00.467716 SMM BACKUP 12. 99b6a000 00010000
1855 06:45:00.471286 COREBOOT 13. 99b62000 00008000
1856 06:45:00.474812 ACPI 14. 99b3e000 00024000
1857 06:45:00.477599 ACPI GNVS 15. 99b3d000 00001000
1858 06:45:00.481181 RAMOOPS 16. 99a3d000 00100000
1859 06:45:00.484455 TPM2 TCGLOG17. 99a2d000 00010000
1860 06:45:00.487947 SMBIOS 18. 99a2c000 00000800
1861 06:45:00.491032 IMD small region:
1862 06:45:00.494329 IMD ROOT 0. 99ffec00 00000400
1863 06:45:00.497384 FSP RUNTIME 1. 99ffebe0 00000004
1864 06:45:00.500965 EC HOSTEVENT 2. 99ffebc0 00000008
1865 06:45:00.504117 POWER STATE 3. 99ffeb80 00000040
1866 06:45:00.507611 ROMSTAGE 4. 99ffeb60 00000004
1867 06:45:00.510659 MEM INFO 5. 99ffe9a0 000001b9
1868 06:45:00.514036 VPD 6. 99ffe920 0000006c
1869 06:45:00.517353 MTRR: Physical address space:
1870 06:45:00.523917 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 06:45:00.531040 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 06:45:00.537408 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 06:45:00.544197 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 06:45:00.550737 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 06:45:00.557248 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 06:45:00.560358 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 06:45:00.566907 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 06:45:00.570721 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 06:45:00.573911 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 06:45:00.577160 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 06:45:00.583615 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 06:45:00.587262 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 06:45:00.590504 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 06:45:00.593666 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 06:45:00.599834 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 06:45:00.603586 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 06:45:00.606484 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 06:45:00.610834 call enable_fixed_mtrr()
1889 06:45:00.613053 CPU physical address size: 39 bits
1890 06:45:00.616559 MTRR: default type WB/UC MTRR counts: 6/8.
1891 06:45:00.623195 MTRR: WB selected as default type.
1892 06:45:00.626786 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 06:45:00.633138 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 06:45:00.640313 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 06:45:00.646606 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 06:45:00.653559 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 06:45:00.660199 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 06:45:00.662741 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 06:45:00.669809 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 06:45:00.673075 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 06:45:00.676416 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 06:45:00.679460 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 06:45:00.682599 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 06:45:00.689607 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 06:45:00.692856 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 06:45:00.696156 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 06:45:00.699360 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 06:45:00.705823 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 06:45:00.706277
1910 06:45:00.706609 MTRR check
1911 06:45:00.709214 Fixed MTRRs : Enabled
1912 06:45:00.713095 Variable MTRRs: Enabled
1913 06:45:00.713506
1914 06:45:00.713871 call enable_fixed_mtrr()
1915 06:45:00.719248 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1916 06:45:00.722533 CPU physical address size: 39 bits
1917 06:45:00.729391 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1918 06:45:00.732869 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 06:45:00.735839 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 06:45:00.739443 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 06:45:00.745589 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 06:45:00.748831 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 06:45:00.752311 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 06:45:00.755921 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 06:45:00.762222 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 06:45:00.765508 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 06:45:00.768645 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 06:45:00.772026 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 06:45:00.779117 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 06:45:00.779665 call enable_fixed_mtrr()
1931 06:45:00.786029 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 06:45:00.789353 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 06:45:00.792548 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 06:45:00.795626 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 06:45:00.802510 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 06:45:00.805879 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 06:45:00.808912 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 06:45:00.812304 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 06:45:00.815564 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 06:45:00.822193 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 06:45:00.825467 CPU physical address size: 39 bits
1942 06:45:00.829153 call enable_fixed_mtrr()
1943 06:45:00.832402 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 06:45:00.835394 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 06:45:00.838714 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 06:45:00.845275 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 06:45:00.849366 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 06:45:00.852212 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 06:45:00.855291 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 06:45:00.862150 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 06:45:00.865095 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 06:45:00.868909 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 06:45:00.872241 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 06:45:00.878903 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 06:45:00.879328 call enable_fixed_mtrr()
1956 06:45:00.885387 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 06:45:00.888415 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 06:45:00.891820 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 06:45:00.895185 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 06:45:00.898410 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 06:45:00.904906 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 06:45:00.908982 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 06:45:00.912100 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 06:45:00.915429 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 06:45:00.921973 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 06:45:00.925422 CPU physical address size: 39 bits
1967 06:45:00.928666 call enable_fixed_mtrr()
1968 06:45:00.932124 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 06:45:00.935331 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 06:45:00.938398 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 06:45:00.944675 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 06:45:00.948336 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 06:45:00.951643 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 06:45:00.954897 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 06:45:00.961351 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 06:45:00.965290 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 06:45:00.968006 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 06:45:00.971557 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 06:45:00.974906 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 06:45:00.981834 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 06:45:00.985109 call enable_fixed_mtrr()
1982 06:45:00.987832 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 06:45:00.991034 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 06:45:00.994956 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 06:45:01.001208 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 06:45:01.004381 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 06:45:01.007640 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 06:45:01.010927 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 06:45:01.014403 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 06:45:01.020803 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 06:45:01.024158 CPU physical address size: 39 bits
1992 06:45:01.027470 call enable_fixed_mtrr()
1993 06:45:01.027890 CBFS @ c08000 size 3f8000
1994 06:45:01.034174 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1995 06:45:01.037284 CBFS: Locating 'fallback/payload'
1996 06:45:01.040736 CPU physical address size: 39 bits
1997 06:45:01.044096 CBFS: Found @ offset 1c96c0 size 3f798
1998 06:45:01.050568 CPU physical address size: 39 bits
1999 06:45:01.053869 Checking segment from ROM address 0xffdd16f8
2000 06:45:01.057257 CPU physical address size: 39 bits
2001 06:45:01.060805 Checking segment from ROM address 0xffdd1714
2002 06:45:01.067477 Loading segment from ROM address 0xffdd16f8
2003 06:45:01.067899 code (compression=0)
2004 06:45:01.077284 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 06:45:01.083818 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 06:45:01.087178 it's not compressed!
2007 06:45:01.180349 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 06:45:01.186881 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 06:45:01.190233 Loading segment from ROM address 0xffdd1714
2010 06:45:01.193033 Entry Point 0x30000000
2011 06:45:01.196579 Loaded segments
2012 06:45:01.202196 Finalizing chipset.
2013 06:45:01.205542 Finalizing SMM.
2014 06:45:01.208664 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2015 06:45:01.211682 mp_park_aps done after 0 msecs.
2016 06:45:01.218615 Jumping to boot code at 30000000(99b62000)
2017 06:45:01.225004 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 06:45:01.225246
2019 06:45:01.225427
2020 06:45:01.225580
2021 06:45:01.228281 Starting depthcharge on Helios...
2022 06:45:01.228469
2023 06:45:01.229047 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 06:45:01.229270 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 06:45:01.229444 Setting prompt string to ['hatch:']
2026 06:45:01.229619 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 06:45:01.237959 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 06:45:01.238120
2029 06:45:01.244561 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 06:45:01.244709
2031 06:45:01.250882 board_setup: Info: eMMC controller not present; skipping
2032 06:45:01.250984
2033 06:45:01.254962 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 06:45:01.255054
2035 06:45:01.261411 board_setup: Info: SDHCI controller not present; skipping
2036 06:45:01.261532
2037 06:45:01.264743 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 06:45:01.267996
2039 06:45:01.268091 Wipe memory regions:
2040 06:45:01.268166
2041 06:45:01.271232 [0x00000000001000, 0x000000000a0000)
2042 06:45:01.271316
2043 06:45:01.274433 [0x00000000100000, 0x00000030000000)
2044 06:45:01.340780
2045 06:45:01.343698 [0x00000030657430, 0x00000099a2c000)
2046 06:45:01.490873
2047 06:45:01.493882 [0x00000100000000, 0x0000045e800000)
2048 06:45:02.950445
2049 06:45:02.951008 R8152: Initializing
2050 06:45:02.951544
2051 06:45:02.953679 Version 9 (ocp_data = 6010)
2052 06:45:02.957681
2053 06:45:02.958174 R8152: Done initializing
2054 06:45:02.958521
2055 06:45:02.960899 Adding net device
2056 06:45:03.443659
2057 06:45:03.444156 R8152: Initializing
2058 06:45:03.444573
2059 06:45:03.446843 Version 6 (ocp_data = 5c30)
2060 06:45:03.447200
2061 06:45:03.450095 R8152: Done initializing
2062 06:45:03.450529
2063 06:45:03.453929 net_add_device: Attemp to include the same device
2064 06:45:03.457234
2065 06:45:03.464591 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 06:45:03.465037
2067 06:45:03.465369
2068 06:45:03.465705
2069 06:45:03.466443 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 06:45:03.567575 hatch: tftpboot 192.168.201.1 12434441/tftp-deploy-x53ld7q8/kernel/bzImage 12434441/tftp-deploy-x53ld7q8/kernel/cmdline 12434441/tftp-deploy-x53ld7q8/ramdisk/ramdisk.cpio.gz
2072 06:45:03.568143 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 06:45:03.568624 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 06:45:03.573122 tftpboot 192.168.201.1 12434441/tftp-deploy-x53ld7q8/kernel/bzIploy-x53ld7q8/kernel/cmdline 12434441/tftp-deploy-x53ld7q8/ramdisk/ramdisk.cpio.gz
2075 06:45:03.573583
2076 06:45:03.573971 Waiting for link
2077 06:45:03.773656
2078 06:45:03.774213 done.
2079 06:45:03.774640
2080 06:45:03.774959 MAC: 00:24:32:50:1a:59
2081 06:45:03.775478
2082 06:45:03.776771 Sending DHCP discover... done.
2083 06:45:03.777276
2084 06:45:03.780083 Waiting for reply... done.
2085 06:45:03.780609
2086 06:45:03.783496 Sending DHCP request... done.
2087 06:45:03.783929
2088 06:45:03.787160 Waiting for reply... done.
2089 06:45:03.787659
2090 06:45:03.790498 My ip is 192.168.201.14
2091 06:45:03.790957
2092 06:45:03.793553 The DHCP server ip is 192.168.201.1
2093 06:45:03.794117
2094 06:45:03.796790 TFTP server IP predefined by user: 192.168.201.1
2095 06:45:03.797302
2096 06:45:03.807118 Bootfile predefined by user: 12434441/tftp-deploy-x53ld7q8/kernel/bzImage
2097 06:45:03.807606
2098 06:45:03.810165 Sending tftp read request... done.
2099 06:45:03.810661
2100 06:45:03.817248 Waiting for the transfer...
2101 06:45:03.817671
2102 06:45:04.417618 00000000 ################################################################
2103 06:45:04.417803
2104 06:45:04.943878 00080000 ################################################################
2105 06:45:04.944050
2106 06:45:05.473053 00100000 ################################################################
2107 06:45:05.473196
2108 06:45:06.017280 00180000 ################################################################
2109 06:45:06.017455
2110 06:45:06.574159 00200000 ################################################################
2111 06:45:06.574309
2112 06:45:07.104881 00280000 ################################################################
2113 06:45:07.105029
2114 06:45:07.630972 00300000 ################################################################
2115 06:45:07.631114
2116 06:45:08.194579 00380000 ################################################################
2117 06:45:08.194740
2118 06:45:08.813914 00400000 ################################################################
2119 06:45:08.814436
2120 06:45:09.436831 00480000 ################################################################
2121 06:45:09.436978
2122 06:45:10.000332 00500000 ################################################################
2123 06:45:10.000474
2124 06:45:10.648812 00580000 ################################################################
2125 06:45:10.649326
2126 06:45:11.309286 00600000 ################################################################
2127 06:45:11.309851
2128 06:45:11.968355 00680000 ################################################################
2129 06:45:11.968870
2130 06:45:12.606023 00700000 ################################################################
2131 06:45:12.606193
2132 06:45:13.208200 00780000 ################################################################
2133 06:45:13.208355
2134 06:45:13.420285 00800000 ####################### done.
2135 06:45:13.420451
2136 06:45:13.423309 The bootfile was 8576912 bytes long.
2137 06:45:13.423411
2138 06:45:13.426693 Sending tftp read request... done.
2139 06:45:13.426803
2140 06:45:13.429762 Waiting for the transfer...
2141 06:45:13.429871
2142 06:45:14.027710 00000000 ################################################################
2143 06:45:14.027867
2144 06:45:14.610657 00080000 ################################################################
2145 06:45:14.610803
2146 06:45:15.178491 00100000 ################################################################
2147 06:45:15.178636
2148 06:45:15.741405 00180000 ################################################################
2149 06:45:15.741560
2150 06:45:16.303978 00200000 ################################################################
2151 06:45:16.304124
2152 06:45:16.905120 00280000 ################################################################
2153 06:45:16.905710
2154 06:45:17.562508 00300000 ################################################################
2155 06:45:17.563043
2156 06:45:18.247533 00380000 ################################################################
2157 06:45:18.248038
2158 06:45:18.902770 00400000 ################################################################
2159 06:45:18.903287
2160 06:45:19.552784 00480000 ################################################################
2161 06:45:19.553298
2162 06:45:20.204393 00500000 ############################################################### done.
2163 06:45:20.204880
2164 06:45:20.207962 Sending tftp read request... done.
2165 06:45:20.208483
2166 06:45:20.211252 Waiting for the transfer...
2167 06:45:20.211861
2168 06:45:20.212408 00000000 # done.
2169 06:45:20.212750
2170 06:45:20.221018 Command line loaded dynamically from TFTP file: 12434441/tftp-deploy-x53ld7q8/kernel/cmdline
2171 06:45:20.221437
2172 06:45:20.251115 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12434441/extract-nfsrootfs-cay7y_uw,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2173 06:45:20.251648
2174 06:45:20.254499 ec_init(0): CrosEC protocol v3 supported (256, 256)
2175 06:45:20.260975
2176 06:45:20.264193 Shutting down all USB controllers.
2177 06:45:20.264758
2178 06:45:20.265091 Removing current net device
2179 06:45:20.268046
2180 06:45:20.268663 Finalizing coreboot
2181 06:45:20.269125
2182 06:45:20.274186 Exiting depthcharge with code 4 at timestamp: 26379972
2183 06:45:20.274626
2184 06:45:20.275070
2185 06:45:20.275596 Starting kernel ...
2186 06:45:20.276013
2187 06:45:20.276481
2188 06:45:20.277739 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2189 06:45:20.278296 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2190 06:45:20.278710 Setting prompt string to ['Linux version [0-9]']
2191 06:45:20.279146 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2192 06:45:20.279585 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2194 06:49:43.279182 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2196 06:49:43.280844 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2198 06:49:43.282107 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2201 06:49:43.283689 end: 2 depthcharge-action (duration 00:05:00) [common]
2203 06:49:43.283937 Cleaning after the job
2204 06:49:43.284038 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434441/tftp-deploy-x53ld7q8/ramdisk
2205 06:49:43.285024 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434441/tftp-deploy-x53ld7q8/kernel
2206 06:49:43.286450 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434441/tftp-deploy-x53ld7q8/nfsrootfs
2207 06:49:43.384686 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12434441/tftp-deploy-x53ld7q8/modules
2208 06:49:43.385195 start: 4.1 power-off (timeout 00:00:30) [common]
2209 06:49:43.385383 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2210 06:49:43.464349 >> Command sent successfully.
2211 06:49:43.470568 Returned 0 in 0 seconds
2212 06:49:43.571665 end: 4.1 power-off (duration 00:00:00) [common]
2214 06:49:43.573140 start: 4.2 read-feedback (timeout 00:10:00) [common]
2215 06:49:43.574324 Listened to connection for namespace 'common' for up to 1s
2217 06:49:43.575574 Listened to connection for namespace 'common' for up to 1s
2218 06:49:44.575029 Finalising connection for namespace 'common'
2219 06:49:44.575897 Disconnecting from shell: Finalise
2220 06:49:44.576328
2221 06:49:44.677342 end: 4.2 read-feedback (duration 00:00:01) [common]
2222 06:49:44.677895 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12434441
2223 06:49:45.345245 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12434441
2224 06:49:45.345457 JobError: Your job cannot terminate cleanly.