Boot log: mt8192-asurada-spherion-r0
- Errors: 0
- Kernel Errors: 32
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 24
1 23:00:31.351675 lava-dispatcher, installed at version: 2023.05.1
2 23:00:31.351876 start: 0 validate
3 23:00:31.352004 Start time: 2023-06-05 23:00:31.351997+00:00 (UTC)
4 23:00:31.352122 Using caching service: 'http://localhost/cache/?uri=%s'
5 23:00:31.352252 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-igt%2F20230527.0%2Farm64%2Frootfs.cpio.gz exists
6 23:00:31.649003 Using caching service: 'http://localhost/cache/?uri=%s'
7 23:00:31.649752 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.26-1314-g1ab0ac1d7e2e3%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 23:00:31.942418 Using caching service: 'http://localhost/cache/?uri=%s'
9 23:00:31.943208 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.26-1314-g1ab0ac1d7e2e3%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8192-asurada-spherion-r0.dtb exists
10 23:00:32.238764 Using caching service: 'http://localhost/cache/?uri=%s'
11 23:00:32.239476 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.26-1314-g1ab0ac1d7e2e3%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 23:00:32.544761 validate duration: 1.19
14 23:00:32.545958 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 23:00:32.546470 start: 1.1 download-retry (timeout 00:10:00) [common]
16 23:00:32.546904 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 23:00:32.547476 Not decompressing ramdisk as can be used compressed.
18 23:00:32.547928 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-igt/20230527.0/arm64/rootfs.cpio.gz
19 23:00:32.548272 saving as /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/ramdisk/rootfs.cpio.gz
20 23:00:32.548587 total size: 43394293 (41MB)
21 23:00:32.553921 progress 0% (0MB)
22 23:00:32.585447 progress 5% (2MB)
23 23:00:32.600023 progress 10% (4MB)
24 23:00:32.611339 progress 15% (6MB)
25 23:00:32.622315 progress 20% (8MB)
26 23:00:32.633264 progress 25% (10MB)
27 23:00:32.644154 progress 30% (12MB)
28 23:00:32.654994 progress 35% (14MB)
29 23:00:32.665879 progress 40% (16MB)
30 23:00:32.676660 progress 45% (18MB)
31 23:00:32.687649 progress 50% (20MB)
32 23:00:32.698397 progress 55% (22MB)
33 23:00:32.709297 progress 60% (24MB)
34 23:00:32.720486 progress 65% (26MB)
35 23:00:32.731565 progress 70% (29MB)
36 23:00:32.742668 progress 75% (31MB)
37 23:00:32.753881 progress 80% (33MB)
38 23:00:32.764878 progress 85% (35MB)
39 23:00:32.775670 progress 90% (37MB)
40 23:00:32.786781 progress 95% (39MB)
41 23:00:32.797646 progress 100% (41MB)
42 23:00:32.797800 41MB downloaded in 0.25s (166.06MB/s)
43 23:00:32.798016 end: 1.1.1 http-download (duration 00:00:00) [common]
45 23:00:32.798325 end: 1.1 download-retry (duration 00:00:00) [common]
46 23:00:32.798432 start: 1.2 download-retry (timeout 00:10:00) [common]
47 23:00:32.798576 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 23:00:32.798739 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 23:00:32.798815 saving as /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/kernel/Image
50 23:00:32.798879 total size: 45746688 (43MB)
51 23:00:32.798944 No compression specified
52 23:00:32.800193 progress 0% (0MB)
53 23:00:32.811991 progress 5% (2MB)
54 23:00:32.823488 progress 10% (4MB)
55 23:00:32.834984 progress 15% (6MB)
56 23:00:32.846753 progress 20% (8MB)
57 23:00:32.858551 progress 25% (10MB)
58 23:00:32.870165 progress 30% (13MB)
59 23:00:32.882028 progress 35% (15MB)
60 23:00:32.893662 progress 40% (17MB)
61 23:00:32.905337 progress 45% (19MB)
62 23:00:32.916990 progress 50% (21MB)
63 23:00:32.928440 progress 55% (24MB)
64 23:00:32.940197 progress 60% (26MB)
65 23:00:32.951864 progress 65% (28MB)
66 23:00:32.963861 progress 70% (30MB)
67 23:00:32.976053 progress 75% (32MB)
68 23:00:32.987586 progress 80% (34MB)
69 23:00:32.999234 progress 85% (37MB)
70 23:00:33.010806 progress 90% (39MB)
71 23:00:33.022577 progress 95% (41MB)
72 23:00:33.034110 progress 100% (43MB)
73 23:00:33.034240 43MB downloaded in 0.24s (185.37MB/s)
74 23:00:33.034400 end: 1.2.1 http-download (duration 00:00:00) [common]
76 23:00:33.034698 end: 1.2 download-retry (duration 00:00:00) [common]
77 23:00:33.034787 start: 1.3 download-retry (timeout 00:10:00) [common]
78 23:00:33.034878 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 23:00:33.035017 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8192-asurada-spherion-r0.dtb
80 23:00:33.035095 saving as /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/dtb/mt8192-asurada-spherion-r0.dtb
81 23:00:33.035158 total size: 46924 (0MB)
82 23:00:33.035220 No compression specified
83 23:00:33.036294 progress 69% (0MB)
84 23:00:33.036567 progress 100% (0MB)
85 23:00:33.036721 0MB downloaded in 0.00s (28.68MB/s)
86 23:00:33.036851 end: 1.3.1 http-download (duration 00:00:00) [common]
88 23:00:33.037079 end: 1.3 download-retry (duration 00:00:00) [common]
89 23:00:33.037165 start: 1.4 download-retry (timeout 00:10:00) [common]
90 23:00:33.037250 start: 1.4.1 http-download (timeout 00:10:00) [common]
91 23:00:33.037362 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 23:00:33.037432 saving as /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/modules/modules.tar
93 23:00:33.037494 total size: 8552396 (8MB)
94 23:00:33.037556 Using unxz to decompress xz
95 23:00:33.041088 progress 0% (0MB)
96 23:00:33.062197 progress 5% (0MB)
97 23:00:33.086206 progress 10% (0MB)
98 23:00:33.117405 progress 15% (1MB)
99 23:00:33.144173 progress 20% (1MB)
100 23:00:33.169600 progress 25% (2MB)
101 23:00:33.194261 progress 30% (2MB)
102 23:00:33.222793 progress 35% (2MB)
103 23:00:33.249883 progress 40% (3MB)
104 23:00:33.278421 progress 45% (3MB)
105 23:00:33.306969 progress 50% (4MB)
106 23:00:33.336973 progress 55% (4MB)
107 23:00:33.364614 progress 60% (4MB)
108 23:00:33.392488 progress 65% (5MB)
109 23:00:33.418714 progress 70% (5MB)
110 23:00:33.444393 progress 75% (6MB)
111 23:00:33.471002 progress 80% (6MB)
112 23:00:33.496426 progress 85% (6MB)
113 23:00:33.521459 progress 90% (7MB)
114 23:00:33.545235 progress 95% (7MB)
115 23:00:33.569974 progress 100% (8MB)
116 23:00:33.576583 8MB downloaded in 0.54s (15.13MB/s)
117 23:00:33.576877 end: 1.4.1 http-download (duration 00:00:01) [common]
119 23:00:33.577149 end: 1.4 download-retry (duration 00:00:01) [common]
120 23:00:33.577245 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 23:00:33.577358 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 23:00:33.577460 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 23:00:33.577552 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 23:00:33.577784 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr
125 23:00:33.577922 makedir: /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin
126 23:00:33.578033 makedir: /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/tests
127 23:00:33.578135 makedir: /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/results
128 23:00:33.578253 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-add-keys
129 23:00:33.578427 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-add-sources
130 23:00:33.578559 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-background-process-start
131 23:00:33.578691 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-background-process-stop
132 23:00:33.578849 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-common-functions
133 23:00:33.578987 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-echo-ipv4
134 23:00:33.579116 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-install-packages
135 23:00:33.579242 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-installed-packages
136 23:00:33.579367 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-os-build
137 23:00:33.579491 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-probe-channel
138 23:00:33.579617 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-probe-ip
139 23:00:33.579765 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-target-ip
140 23:00:33.579890 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-target-mac
141 23:00:33.580013 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-target-storage
142 23:00:33.580145 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-test-case
143 23:00:33.580314 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-test-event
144 23:00:33.580475 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-test-feedback
145 23:00:33.580635 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-test-raise
146 23:00:33.580805 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-test-reference
147 23:00:33.580966 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-test-runner
148 23:00:33.581126 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-test-set
149 23:00:33.581294 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-test-shell
150 23:00:33.581457 Updating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-install-packages (oe)
151 23:00:33.581648 Updating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/bin/lava-installed-packages (oe)
152 23:00:33.581808 Creating /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/environment
153 23:00:33.581943 LAVA metadata
154 23:00:33.582048 - LAVA_JOB_ID=10597706
155 23:00:33.582156 - LAVA_DISPATCHER_IP=192.168.201.1
156 23:00:33.582304 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 23:00:33.582402 skipped lava-vland-overlay
158 23:00:33.582510 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 23:00:33.582616 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 23:00:33.582683 skipped lava-multinode-overlay
161 23:00:33.582762 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 23:00:33.582848 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 23:00:33.582949 Loading test definitions
164 23:00:33.583063 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 23:00:33.583145 Using /lava-10597706 at stage 0
166 23:00:33.583464 uuid=10597706_1.5.2.3.1 testdef=None
167 23:00:33.583556 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 23:00:33.583646 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 23:00:33.584186 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 23:00:33.584450 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 23:00:33.585146 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 23:00:33.585401 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 23:00:33.586031 runner path: /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/0/tests/0_igt-kms-mediatek test_uuid 10597706_1.5.2.3.1
176 23:00:33.586205 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 23:00:33.586421 Creating lava-test-runner.conf files
179 23:00:33.586487 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10597706/lava-overlay-gmylanyr/lava-10597706/0 for stage 0
180 23:00:33.586582 - 0_igt-kms-mediatek
181 23:00:33.586699 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 23:00:33.586788 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 23:00:33.593875 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 23:00:33.593984 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 23:00:33.594074 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 23:00:33.594163 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 23:00:33.594276 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 23:00:34.907996 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 23:00:34.908345 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 23:00:34.908466 extracting modules file /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10597706/extract-overlay-ramdisk-9fuwt0q3/ramdisk
191 23:00:35.123157 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 23:00:35.123318 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 23:00:35.123419 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10597706/compress-overlay-wsa35q5n/overlay-1.5.2.4.tar.gz to ramdisk
194 23:00:35.123493 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10597706/compress-overlay-wsa35q5n/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10597706/extract-overlay-ramdisk-9fuwt0q3/ramdisk
195 23:00:35.129973 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 23:00:35.130090 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 23:00:35.130183 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 23:00:35.130273 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 23:00:35.130355 Building ramdisk /var/lib/lava/dispatcher/tmp/10597706/extract-overlay-ramdisk-9fuwt0q3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10597706/extract-overlay-ramdisk-9fuwt0q3/ramdisk
200 23:00:35.963993 >> 369045 blocks
201 23:00:42.031826 rename /var/lib/lava/dispatcher/tmp/10597706/extract-overlay-ramdisk-9fuwt0q3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/ramdisk/ramdisk.cpio.gz
202 23:00:42.032229 end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
203 23:00:42.032364 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
204 23:00:42.032471 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
205 23:00:42.032579 Calling: 'lzma' '--keep' '/var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/kernel/Image'
206 23:00:53.813851 Returned 0 in 11 seconds
207 23:00:53.914425 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/dtb/mt8192-asurada-spherion-r0.dtb -i /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/kernel/image.itb
208 23:00:54.627622 output: FIT description: Kernel Image image with one or more FDT blobs
209 23:00:54.627986 output: Created: Tue Jun 6 00:00:54 2023
210 23:00:54.628063 output: Image 0 (kernel-1)
211 23:00:54.628130 output: Description:
212 23:00:54.628193 output: Created: Tue Jun 6 00:00:54 2023
213 23:00:54.628287 output: Type: Kernel Image
214 23:00:54.628379 output: Compression: lzma compressed
215 23:00:54.628457 output: Data Size: 10085945 Bytes = 9849.56 KiB = 9.62 MiB
216 23:00:54.628521 output: Architecture: AArch64
217 23:00:54.628582 output: OS: Linux
218 23:00:54.628652 output: Load Address: 0x00000000
219 23:00:54.628745 output: Entry Point: 0x00000000
220 23:00:54.628901 output: Hash algo: crc32
221 23:00:54.628988 output: Hash value: b2943ff2
222 23:00:54.629078 output: Image 1 (fdt-1)
223 23:00:54.629164 output: Description: mt8192-asurada-spherion-r0
224 23:00:54.629257 output: Created: Tue Jun 6 00:00:54 2023
225 23:00:54.629344 output: Type: Flat Device Tree
226 23:00:54.629436 output: Compression: uncompressed
227 23:00:54.629523 output: Data Size: 46924 Bytes = 45.82 KiB = 0.04 MiB
228 23:00:54.629613 output: Architecture: AArch64
229 23:00:54.629692 output: Hash algo: crc32
230 23:00:54.629777 output: Hash value: 1df858fa
231 23:00:54.629861 output: Image 2 (ramdisk-1)
232 23:00:54.629919 output: Description: unavailable
233 23:00:54.629974 output: Created: Tue Jun 6 00:00:54 2023
234 23:00:54.630029 output: Type: RAMDisk Image
235 23:00:54.630084 output: Compression: Unknown Compression
236 23:00:54.630139 output: Data Size: 56395264 Bytes = 55073.50 KiB = 53.78 MiB
237 23:00:54.630205 output: Architecture: AArch64
238 23:00:54.630291 output: OS: Linux
239 23:00:54.630382 output: Load Address: unavailable
240 23:00:54.630441 output: Entry Point: unavailable
241 23:00:54.630497 output: Hash algo: crc32
242 23:00:54.630551 output: Hash value: 3d557017
243 23:00:54.630637 output: Default Configuration: 'conf-1'
244 23:00:54.630722 output: Configuration 0 (conf-1)
245 23:00:54.630796 output: Description: mt8192-asurada-spherion-r0
246 23:00:54.630852 output: Kernel: kernel-1
247 23:00:54.630908 output: Init Ramdisk: ramdisk-1
248 23:00:54.630962 output: FDT: fdt-1
249 23:00:54.631026 output: Loadables: kernel-1
250 23:00:54.631112 output:
251 23:00:54.631333 end: 1.5.8.1 prepare-fit (duration 00:00:13) [common]
252 23:00:54.631435 end: 1.5.8 prepare-kernel (duration 00:00:13) [common]
253 23:00:54.631562 end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
254 23:00:54.631694 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
255 23:00:54.631807 No LXC device requested
256 23:00:54.631926 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 23:00:54.632052 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
258 23:00:54.632166 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 23:00:54.632268 Checking files for TFTP limit of 4294967296 bytes.
260 23:00:54.632984 end: 1 tftp-deploy (duration 00:00:22) [common]
261 23:00:54.633128 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 23:00:54.633253 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 23:00:54.633427 substitutions:
264 23:00:54.633505 - {DTB}: 10597706/tftp-deploy-cs7imoij/dtb/mt8192-asurada-spherion-r0.dtb
265 23:00:54.633573 - {INITRD}: 10597706/tftp-deploy-cs7imoij/ramdisk/ramdisk.cpio.gz
266 23:00:54.633634 - {KERNEL}: 10597706/tftp-deploy-cs7imoij/kernel/Image
267 23:00:54.633694 - {LAVA_MAC}: None
268 23:00:54.633779 - {PRESEED_CONFIG}: None
269 23:00:54.633868 - {PRESEED_LOCAL}: None
270 23:00:54.633960 - {RAMDISK}: 10597706/tftp-deploy-cs7imoij/ramdisk/ramdisk.cpio.gz
271 23:00:54.634048 - {ROOT_PART}: None
272 23:00:54.634141 - {ROOT}: None
273 23:00:54.634233 - {SERVER_IP}: 192.168.201.1
274 23:00:54.634325 - {TEE}: None
275 23:00:54.634418 Parsed boot commands:
276 23:00:54.634479 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 23:00:54.634684 Parsed boot commands: tftpboot 192.168.201.1 10597706/tftp-deploy-cs7imoij/kernel/image.itb 10597706/tftp-deploy-cs7imoij/kernel/cmdline
278 23:00:54.634809 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 23:00:54.634929 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 23:00:54.635027 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 23:00:54.635118 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 23:00:54.635207 Not connected, no need to disconnect.
283 23:00:54.635316 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 23:00:54.635418 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 23:00:54.635489 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost mt8192-asurada-spherion-r0-cbg-1'
286 23:00:54.638931 Setting prompt string to ['lava-test: # ']
287 23:00:54.639326 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 23:00:54.639469 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 23:00:54.639626 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 23:00:54.639795 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 23:00:54.640142 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-1' '--port=1' '--command=reboot'
292 23:00:59.775820 >> Command sent successfully.
293 23:00:59.778131 Returned 0 in 5 seconds
294 23:00:59.878512 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
296 23:00:59.879067 end: 2.2.2 reset-device (duration 00:00:05) [common]
297 23:00:59.879167 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
298 23:00:59.879256 Setting prompt string to 'Starting depthcharge on Spherion...'
299 23:00:59.879322 Changing prompt to 'Starting depthcharge on Spherion...'
300 23:00:59.879392 depthcharge-start: Wait for prompt Starting depthcharge on Spherion... (timeout 00:05:00)
301 23:00:59.879655 [Enter `^Ec?' for help]
302 23:01:00.052506
303 23:01:00.052644
304 23:01:00.052733 F0: 102B 0000
305 23:01:00.052821
306 23:01:00.052884 F3: 1001 0000 [0200]
307 23:01:00.056580
308 23:01:00.056688 F3: 1001 0000
309 23:01:00.056814
310 23:01:00.056898 F7: 102D 0000
311 23:01:00.056978
312 23:01:00.057056 F1: 0000 0000
313 23:01:00.060308
314 23:01:00.060453 V0: 0000 0000 [0001]
315 23:01:00.060552
316 23:01:00.060647 00: 0007 8000
317 23:01:00.060743
318 23:01:00.063471 01: 0000 0000
319 23:01:00.063543
320 23:01:00.063605 BP: 0C00 0209 [0000]
321 23:01:00.063665
322 23:01:00.067745 G0: 1182 0000
323 23:01:00.067834
324 23:01:00.067909 EC: 0000 0021 [4000]
325 23:01:00.067988
326 23:01:00.070599 S7: 0000 0000 [0000]
327 23:01:00.070690
328 23:01:00.070767 CC: 0000 0000 [0001]
329 23:01:00.070831
330 23:01:00.074336 T0: 0000 0040 [010F]
331 23:01:00.074425
332 23:01:00.074510 Jump to BL
333 23:01:00.074574
334 23:01:00.099063
335 23:01:00.099181
336 23:01:00.099291
337 23:01:00.106517 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 bootblock starting (log level: 8)...
338 23:01:00.110011 ARM64: Exception handlers installed.
339 23:01:00.113056 ARM64: Testing exception
340 23:01:00.116576 ARM64: Done test exception
341 23:01:00.124180 Backing address range [0x00000000:0x1000000000000) with new page table @0x0010d000
342 23:01:00.134887 Mapping address range [0x00000000:0x200000000) as cacheable | read-write | secure | device
343 23:01:00.141581 Backing address range [0x00000000:0x8000000000) with new page table @0x0010e000
344 23:01:00.151783 Mapping address range [0x00100000:0x00120000) as cacheable | read-write | secure | normal
345 23:01:00.158472 Backing address range [0x00000000:0x40000000) with new page table @0x0010f000
346 23:01:00.165028 Backing address range [0x00000000:0x00200000) with new page table @0x00110000
347 23:01:00.176181 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | normal
348 23:01:00.183178 Backing address range [0x00200000:0x00400000) with new page table @0x00111000
349 23:01:00.202206 Mapping address range [0x00114000:0x00115000) as non-cacheable | read-write | secure | normal
350 23:01:00.205784 WDT: Last reset was cold boot
351 23:01:00.209070 SPI1(PAD0) initialized at 2873684 Hz
352 23:01:00.212411 SPI5(PAD0) initialized at 992727 Hz
353 23:01:00.215954 VBOOT: Loading verstage.
354 23:01:00.222730 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
355 23:01:00.225633 FMAP: Found "FLASH" version 1.1 at 0x20000.
356 23:01:00.229287 FMAP: base = 0x0 size = 0x800000 #areas = 25
357 23:01:00.232239 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
358 23:01:00.239819 CBFS: mcache @0x00107c00 built for 77 files, used 0x1104 of 0x1800 bytes
359 23:01:00.246321 CBFS: Found 'fallback/verstage' @0x75500 size 0xa1eb in mcache @0x00108150
360 23:01:00.257491 read SPI 0x96554 0xa1eb: 4591 us, 9028 KB/s, 72.224 Mbps
361 23:01:00.257782
362 23:01:00.258030
363 23:01:00.267390 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 verstage starting (log level: 8)...
364 23:01:00.270785 ARM64: Exception handlers installed.
365 23:01:00.274039 ARM64: Testing exception
366 23:01:00.274602 ARM64: Done test exception
367 23:01:00.280496 FMAP: area RW_NVRAM found @ 57b000 (8192 bytes)
368 23:01:00.284016 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
369 23:01:00.298695 Probing TPM: . done!
370 23:01:00.299120 TPM ready after 0 ms
371 23:01:00.305513 Connected to device vid:did:rid of 1ae0:0028:00
372 23:01:00.312683 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.30/cr50_v1.9308_B.954-4f0f77dec8
373 23:01:00.315855 Initialized TPM device CR50 revision 0
374 23:01:00.381560 tlcl_send_startup: Startup return code is 0
375 23:01:00.382078 TPM: setup succeeded
376 23:01:00.392963 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
377 23:01:00.401789 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
378 23:01:00.411628 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
379 23:01:00.421023 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
380 23:01:00.424745 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
381 23:01:00.431330 in-header: 03 07 00 00 08 00 00 00
382 23:01:00.434610 in-data: aa e4 47 04 13 02 00 00
383 23:01:00.437976 Chrome EC: UHEPI supported
384 23:01:00.444888 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
385 23:01:00.448564 in-header: 03 ad 00 00 08 00 00 00
386 23:01:00.452136 in-data: 00 20 20 08 00 00 00 00
387 23:01:00.452541 Phase 1
388 23:01:00.455539 FMAP: area GBB found @ 3f5000 (12032 bytes)
389 23:01:00.463259 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
390 23:01:00.470559 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
391 23:01:00.470646 Recovery requested (1009000e)
392 23:01:00.480811 TPM: Extending digest for VBOOT: boot mode into PCR 0
393 23:01:00.487065 tlcl_extend: response is 0
394 23:01:00.496652 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
395 23:01:00.502920 tlcl_extend: response is 0
396 23:01:00.509575 CBFS: Found 'fallback/romstage' @0x80 size 0x2173b in mcache @0x00107c2c
397 23:01:00.530516 read SPI 0x210d4 0x2173b: 15137 us, 9051 KB/s, 72.408 Mbps
398 23:01:00.537484 BS: bootblock times (exec / console): total (unknown) / 148 ms
399 23:01:00.537578
400 23:01:00.537651
401 23:01:00.547903 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 romstage starting (log level: 8)...
402 23:01:00.551493 ARM64: Exception handlers installed.
403 23:01:00.551688 ARM64: Testing exception
404 23:01:00.554671 ARM64: Done test exception
405 23:01:00.575898 pmic_efuse_setting: Set efuses in 11 msecs
406 23:01:00.579137 pmwrap_interface_init: Select PMIF_VLD_RDY
407 23:01:00.585910 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c9a
408 23:01:00.589470 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M01: 0x1c070c9a
409 23:01:00.596067 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070c9a
410 23:01:00.599378 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M03: 0x1c070c9a
411 23:01:00.603080 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M04: 0x1c070c9a
412 23:01:00.610032 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M05: 0x1c070c9a
413 23:01:00.613656 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M06: 0x1c070c9a
414 23:01:00.620602 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c9a
415 23:01:00.624123 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M08: 0xc9c
416 23:01:00.627462 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M09: 0x1c070c9a
417 23:01:00.635029 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M10: 0x1c070c9a
418 23:01:00.638063 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M11: 0xc9c
419 23:01:00.641812 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M12: 0xc9c
420 23:01:00.648207 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M01 FPM SWITCH: 0x1c070c8a
421 23:01:00.654563 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M02 FPM SWITCH: 0x1c070c8a
422 23:01:00.658602 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M03 FPM SWITCH: 0x1c070c8a
423 23:01:00.665656 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M04 FPM SWITCH: 0x1c070c8a
424 23:01:00.669202 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M05 FPM SWITCH: 0x1c070c8a
425 23:01:00.675844 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M06 FPM SWITCH: 0x1c070c8a
426 23:01:00.682615 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M07 FPM SWITCH: 0x1c070c8a
427 23:01:00.686178 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M08 FPM SWITCH: 0xc8c
428 23:01:00.693153 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M09 FPM SWITCH: 0x1c070c8a
429 23:01:00.699738 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M10 FPM SWITCH: 0x1c070c8a
430 23:01:00.703212 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M11 FPM SWITCH: 0xc8c
431 23:01:00.709887 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M12 FPM SWITCH: 0xc8c
432 23:01:00.716627 [SRCLKEN_RC]__rc_ctrl_bblpm_switch,193: M02 BBLPM SWITCH: 0x1c070caa
433 23:01:00.720056 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c92
434 23:01:00.726477 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070ca2
435 23:01:00.730058 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c82
436 23:01:00.733094 [SRCLKEN_RC]rc_dump_reg_info,132: SRCLKEN_RC_CFG:0x10
437 23:01:00.739714 [SRCLKEN_RC]rc_dump_reg_info,133: RC_CENTRAL_CFG1:0x401425
438 23:01:00.743369 [SRCLKEN_RC]rc_dump_reg_info,134: RC_CENTRAL_CFG2:0x1010
439 23:01:00.749671 [SRCLKEN_RC]rc_dump_reg_info,135: RC_CENTRAL_CFG3:0x400f
440 23:01:00.756148 [SRCLKEN_RC]rc_dump_reg_info,136: RC_CENTRAL_CFG4:0x20000
441 23:01:00.759631 [SRCLKEN_RC]rc_dump_reg_info,137: RC_DCXO_FPM_CFG:0x8
442 23:01:00.766336 [SRCLKEN_RC]rc_dump_reg_info,138: SUBSYS_INTF_CFG:0x1041efb
443 23:01:00.770125 [SRCLKEN_RC]rc_dump_reg_info,139: RC_SPI_STA_0:0x40010698
444 23:01:00.776129 [SRCLKEN_RC]rc_dump_reg_info,140: RC_PI_PO_STA:0xd15c3
445 23:01:00.779702 [SRCLKEN_RC]rc_dump_reg_info,144: M00: 0x1c070c92
446 23:01:00.782727 [SRCLKEN_RC]rc_dump_reg_info,144: M01: 0x1c070c8a
447 23:01:00.789835 [SRCLKEN_RC]rc_dump_reg_info,144: M02: 0x1c070ca2
448 23:01:00.792668 [SRCLKEN_RC]rc_dump_reg_info,144: M03: 0x1c070c8a
449 23:01:00.796529 [SRCLKEN_RC]rc_dump_reg_info,144: M04: 0x1c070c8a
450 23:01:00.800027 [SRCLKEN_RC]rc_dump_reg_info,144: M05: 0x1c070c8a
451 23:01:00.807307 [SRCLKEN_RC]rc_dump_reg_info,144: M06: 0x1c070c8a
452 23:01:00.810359 [SRCLKEN_RC]rc_dump_reg_info,144: M07: 0x1c070c82
453 23:01:00.813678 [SRCLKEN_RC]rc_dump_reg_info,144: M08: 0xc8c
454 23:01:00.817052 [SRCLKEN_RC]rc_dump_reg_info,144: M09: 0x1c070c8a
455 23:01:00.823613 [SRCLKEN_RC]rc_dump_reg_info,144: M10: 0x1c070c8a
456 23:01:00.826646 [SRCLKEN_RC]rc_dump_reg_info,144: M11: 0xc8c
457 23:01:00.830391 [SRCLKEN_RC]rc_dump_reg_info,144: M12: 0xc8c
458 23:01:00.836913 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x624d 0x53f0 0x8100 0x4c 0xf0f 0x9248
459 23:01:00.846608 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x1 0x1
460 23:01:00.849862 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
461 23:01:00.860342 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x4005 0x1f0 0x8100 0x4c 0xf0f 0x9248
462 23:01:00.866528 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x0 0x0
463 23:01:00.873118 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
464 23:01:00.876590 [RTC]rtc_boot,324: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
465 23:01:00.880263 [RTC]rtc_boot,327: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
466 23:01:00.888404 [RTC]rtc_enable_dcxo,68: con=0x486, osc32con=0xde70, sec=0x7
467 23:01:00.895003 [RTC]rtc_check_state,173: con=486, pwrkey1=a357, pwrkey2=67d2
468 23:01:00.898300 [RTC]rtc_osc_init,62: osc32con val = 0xde70
469 23:01:00.904984 [RTC]rtc_eosc_cali,20: PMIC_RG_FQMTR_CKSEL=0x4a
470 23:01:00.913022 [RTC]rtc_get_frequency_meter,154: input=15, output=772
471 23:01:00.922119 [RTC]rtc_get_frequency_meter,154: input=23, output=956
472 23:01:00.931663 [RTC]rtc_get_frequency_meter,154: input=19, output=864
473 23:01:00.941085 [RTC]rtc_get_frequency_meter,154: input=17, output=817
474 23:01:00.951078 [RTC]rtc_get_frequency_meter,154: input=16, output=794
475 23:01:00.954155 [RTC]rtc_osc_init,66: EOSC32 cali val = 0xde70
476 23:01:00.960478 [RTC]rtc_boot_common,202: RTC_STATE_REBOOT
477 23:01:00.963883 [RTC]rtc_boot_common,220: irqsta=0, bbpu=81, con=486
478 23:01:00.967407 [RTC]rtc_bbpu_power_on,298: rtc_write_trigger=1
479 23:01:00.970385 [RTC]rtc_bbpu_power_on,300: done BBPU=0x81
480 23:01:00.974102 ADC[4]: Raw value=902876 ID=7
481 23:01:00.977259 ADC[3]: Raw value=213179 ID=1
482 23:01:00.980876 RAM Code: 0x71
483 23:01:00.983977 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
484 23:01:00.987539 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
485 23:01:00.998221 CBFS: Found 'sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE' @0x75280 size 0x8 in mcache @0x00108014
486 23:01:01.005711 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE
487 23:01:01.005797 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
488 23:01:01.009774 in-header: 03 07 00 00 08 00 00 00
489 23:01:01.013468 in-data: aa e4 47 04 13 02 00 00
490 23:01:01.017562 Chrome EC: UHEPI supported
491 23:01:01.024430 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
492 23:01:01.028488 in-header: 03 ed 00 00 08 00 00 00
493 23:01:01.028656 in-data: 80 20 60 08 00 00 00 00
494 23:01:01.032140 MRC: failed to locate region type 0.
495 23:01:01.039774 DRAM-K: Invalid data in flash (size: 0xffffffffffffffff, expected: 0xcf0)
496 23:01:01.043231 DRAM-K: Running full calibration
497 23:01:01.050642 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE
498 23:01:01.050771 header.status = 0x0
499 23:01:01.053628 header.version = 0x6 (expected: 0x6)
500 23:01:01.057226 header.size = 0xd00 (expected: 0xd00)
501 23:01:01.060324 header.flags = 0x0
502 23:01:01.063833 CBFS: Found 'fallback/dram' @0x51540 size 0x1c583 in mcache @0x00107e40
503 23:01:01.082576 read SPI 0x72590 0x1c583: 12499 us, 9288 KB/s, 74.304 Mbps
504 23:01:01.089563 dram_init: MediaTek DRAM firmware version: 1.6.3, accepting param version 6
505 23:01:01.092549 dram_init: ddr_geometry: 2
506 23:01:01.096113 [EMI] MDL number = 2
507 23:01:01.096201 [EMI] Get MDL freq = 0
508 23:01:01.099647 dram_init: ddr_type: 0
509 23:01:01.099734 is_discrete_lpddr4: 1
510 23:01:01.102704 [Set_DRAM_Pinmux_Sel] DRAMPinmux = 0
511 23:01:01.102791
512 23:01:01.106181
513 23:01:01.106268 [Bian_co] ETT version 0.0.0.1
514 23:01:01.113109 dram_type 6, R0 cbt_mode 1, R1 cbt_mode 1 VENDOR=6
515 23:01:01.113216
516 23:01:01.116694 dramc_set_vcore_voltage set vcore to 650000
517 23:01:01.116787 Read voltage for 800, 4
518 23:01:01.120231 Vio18 = 0
519 23:01:01.120318 Vcore = 650000
520 23:01:01.120405 Vdram = 0
521 23:01:01.120487 Vddq = 0
522 23:01:01.124103 Vmddr = 0
523 23:01:01.124190 dram_init: config_dvfs: 1
524 23:01:01.131860 [FAST_K] DramcSave_Time_For_Cal_Init SHU6, femmc_Ready=0
525 23:01:01.135178 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
526 23:01:01.138362 [SwImpedanceCal] DRVP=10, DRVN=17, ODTN=9
527 23:01:01.141471 freq_region=0, Reg: DRVP=10, DRVN=17, ODTN=9
528 23:01:01.148166 [SwImpedanceCal] DRVP=16, DRVN=24, ODTN=9
529 23:01:01.151653 freq_region=1, Reg: DRVP=16, DRVN=24, ODTN=9
530 23:01:01.151776 MEM_TYPE=3, freq_sel=18
531 23:01:01.154930 sv_algorithm_assistance_LP4_1600
532 23:01:01.161457 ============ PULL DRAM RESETB DOWN ============
533 23:01:01.164929 ========== PULL DRAM RESETB DOWN end =========
534 23:01:01.168498 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
535 23:01:01.171519 ===================================
536 23:01:01.174995 LPDDR4 DRAM CONFIGURATION
537 23:01:01.178009 ===================================
538 23:01:01.181633 EX_ROW_EN[0] = 0x0
539 23:01:01.181720 EX_ROW_EN[1] = 0x0
540 23:01:01.184684 LP4Y_EN = 0x0
541 23:01:01.184833 WORK_FSP = 0x0
542 23:01:01.188342 WL = 0x2
543 23:01:01.188455 RL = 0x2
544 23:01:01.191481 BL = 0x2
545 23:01:01.191594 RPST = 0x0
546 23:01:01.195065 RD_PRE = 0x0
547 23:01:01.195166 WR_PRE = 0x1
548 23:01:01.198126 WR_PST = 0x0
549 23:01:01.198241 DBI_WR = 0x0
550 23:01:01.201193 DBI_RD = 0x0
551 23:01:01.201342 OTF = 0x1
552 23:01:01.204749 ===================================
553 23:01:01.207811 ===================================
554 23:01:01.211318 ANA top config
555 23:01:01.214720 ===================================
556 23:01:01.217751 DLL_ASYNC_EN = 0
557 23:01:01.217855 ALL_SLAVE_EN = 1
558 23:01:01.221385 NEW_RANK_MODE = 1
559 23:01:01.224426 DLL_IDLE_MODE = 1
560 23:01:01.228121 LP45_APHY_COMB_EN = 1
561 23:01:01.228207 TX_ODT_DIS = 1
562 23:01:01.231082 NEW_8X_MODE = 1
563 23:01:01.234445 ===================================
564 23:01:01.238121 ===================================
565 23:01:01.241396 data_rate = 1600
566 23:01:01.244637 CKR = 1
567 23:01:01.247801 DQ_P2S_RATIO = 8
568 23:01:01.251259 ===================================
569 23:01:01.254430 CA_P2S_RATIO = 8
570 23:01:01.254515 DQ_CA_OPEN = 0
571 23:01:01.257811 DQ_SEMI_OPEN = 0
572 23:01:01.261341 CA_SEMI_OPEN = 0
573 23:01:01.264562 CA_FULL_RATE = 0
574 23:01:01.267522 DQ_CKDIV4_EN = 1
575 23:01:01.270882 CA_CKDIV4_EN = 1
576 23:01:01.270969 CA_PREDIV_EN = 0
577 23:01:01.274504 PH8_DLY = 0
578 23:01:01.277882 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
579 23:01:01.281054 DQ_AAMCK_DIV = 4
580 23:01:01.284534 CA_AAMCK_DIV = 4
581 23:01:01.287490 CA_ADMCK_DIV = 4
582 23:01:01.287583 DQ_TRACK_CA_EN = 0
583 23:01:01.291094 CA_PICK = 800
584 23:01:01.294263 CA_MCKIO = 800
585 23:01:01.297749 MCKIO_SEMI = 0
586 23:01:01.300893 PLL_FREQ = 3068
587 23:01:01.304369 DQ_UI_PI_RATIO = 32
588 23:01:01.307469 CA_UI_PI_RATIO = 0
589 23:01:01.311001 ===================================
590 23:01:01.314311 ===================================
591 23:01:01.314423 memory_type:LPDDR4
592 23:01:01.317474 GP_NUM : 10
593 23:01:01.317574 SRAM_EN : 1
594 23:01:01.321076 MD32_EN : 0
595 23:01:01.324457 ===================================
596 23:01:01.328064 [ANA_INIT] >>>>>>>>>>>>>>
597 23:01:01.331528 <<<<<< [CONFIGURE PHASE]: ANA_TX
598 23:01:01.335564 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
599 23:01:01.335669 ===================================
600 23:01:01.339014 data_rate = 1600,PCW = 0X7600
601 23:01:01.343112 ===================================
602 23:01:01.346559 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
603 23:01:01.349823 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
604 23:01:01.357358 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
605 23:01:01.361182 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
606 23:01:01.364642 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
607 23:01:01.367860 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
608 23:01:01.371146 [ANA_INIT] flow start
609 23:01:01.371265 [ANA_INIT] PLL >>>>>>>>
610 23:01:01.374293 [ANA_INIT] PLL <<<<<<<<
611 23:01:01.377890 [ANA_INIT] MIDPI >>>>>>>>
612 23:01:01.381295 [ANA_INIT] MIDPI <<<<<<<<
613 23:01:01.381383 [ANA_INIT] DLL >>>>>>>>
614 23:01:01.385465 [ANA_INIT] flow end
615 23:01:01.389025 ============ LP4 DIFF to SE enter ============
616 23:01:01.392613 ============ LP4 DIFF to SE exit ============
617 23:01:01.396147 [ANA_INIT] <<<<<<<<<<<<<
618 23:01:01.399505 [Flow] Enable top DCM control >>>>>
619 23:01:01.399620 [Flow] Enable top DCM control <<<<<
620 23:01:01.403017 Enable DLL master slave shuffle
621 23:01:01.410223 ==============================================================
622 23:01:01.410344 Gating Mode config
623 23:01:01.417650 ==============================================================
624 23:01:01.417766 Config description:
625 23:01:01.428725 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
626 23:01:01.435954 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
627 23:01:01.439290 SELPH_MODE 0: By rank 1: By Phase
628 23:01:01.447074 ==============================================================
629 23:01:01.447187 GAT_TRACK_EN = 1
630 23:01:01.450502 RX_GATING_MODE = 2
631 23:01:01.454144 RX_GATING_TRACK_MODE = 2
632 23:01:01.457887 SELPH_MODE = 1
633 23:01:01.461647 PICG_EARLY_EN = 1
634 23:01:01.465397 VALID_LAT_VALUE = 1
635 23:01:01.469128 ==============================================================
636 23:01:01.472532 Enter into Gating configuration >>>>
637 23:01:01.476110 Exit from Gating configuration <<<<
638 23:01:01.480229 Enter into DVFS_PRE_config >>>>>
639 23:01:01.491544 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
640 23:01:01.491644 Exit from DVFS_PRE_config <<<<<
641 23:01:01.495049 Enter into PICG configuration >>>>
642 23:01:01.499010 Exit from PICG configuration <<<<
643 23:01:01.502527 [RX_INPUT] configuration >>>>>
644 23:01:01.506114 [RX_INPUT] configuration <<<<<
645 23:01:01.509715 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
646 23:01:01.517333 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
647 23:01:01.520882 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
648 23:01:01.528418 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
649 23:01:01.535471 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
650 23:01:01.539068 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
651 23:01:01.542664 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
652 23:01:01.546801 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
653 23:01:01.553981 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
654 23:01:01.557966 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
655 23:01:01.561410 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
656 23:01:01.565013 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
657 23:01:01.569046 ===================================
658 23:01:01.572328 LPDDR4 DRAM CONFIGURATION
659 23:01:01.572453 ===================================
660 23:01:01.575988 EX_ROW_EN[0] = 0x0
661 23:01:01.580002 EX_ROW_EN[1] = 0x0
662 23:01:01.580102 LP4Y_EN = 0x0
663 23:01:01.580226 WORK_FSP = 0x0
664 23:01:01.583345 WL = 0x2
665 23:01:01.583477 RL = 0x2
666 23:01:01.587374 BL = 0x2
667 23:01:01.587521 RPST = 0x0
668 23:01:01.590863 RD_PRE = 0x0
669 23:01:01.590990 WR_PRE = 0x1
670 23:01:01.594391 WR_PST = 0x0
671 23:01:01.594504 DBI_WR = 0x0
672 23:01:01.598423 DBI_RD = 0x0
673 23:01:01.598543 OTF = 0x1
674 23:01:01.601793 ===================================
675 23:01:01.605463 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
676 23:01:01.609085 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
677 23:01:01.613129 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
678 23:01:01.616590 ===================================
679 23:01:01.620660 LPDDR4 DRAM CONFIGURATION
680 23:01:01.624184 ===================================
681 23:01:01.624299 EX_ROW_EN[0] = 0x10
682 23:01:01.628074 EX_ROW_EN[1] = 0x0
683 23:01:01.628201 LP4Y_EN = 0x0
684 23:01:01.631664 WORK_FSP = 0x0
685 23:01:01.631765 WL = 0x2
686 23:01:01.635601 RL = 0x2
687 23:01:01.635751 BL = 0x2
688 23:01:01.638730 RPST = 0x0
689 23:01:01.638815 RD_PRE = 0x0
690 23:01:01.642397 WR_PRE = 0x1
691 23:01:01.642471 WR_PST = 0x0
692 23:01:01.645976 DBI_WR = 0x0
693 23:01:01.646048 DBI_RD = 0x0
694 23:01:01.650010 OTF = 0x1
695 23:01:01.650121 ===================================
696 23:01:01.656711 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
697 23:01:01.661810 nWR fixed to 40
698 23:01:01.664821 [ModeRegInit_LP4] CH0 RK0
699 23:01:01.664970 [ModeRegInit_LP4] CH0 RK1
700 23:01:01.668643 [ModeRegInit_LP4] CH1 RK0
701 23:01:01.671986 [ModeRegInit_LP4] CH1 RK1
702 23:01:01.672079 match AC timing 13
703 23:01:01.675588 dramType 5, freq 800, readDBI 0, DivMode 1, cbtMode 1
704 23:01:01.679382 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
705 23:01:01.686706 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
706 23:01:01.690007 [TX_path_calculate] data rate=1600, WL=8, DQS_TotalUI=17
707 23:01:01.693687 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
708 23:01:01.696974 [EMI DOE] emi_dcm 0
709 23:01:01.700161 [UpdateDFSTbltoDDR3200] Get Highest Freq is 1600
710 23:01:01.700275 ==
711 23:01:01.703742 Dram Type= 6, Freq= 0, CH_0, rank 0
712 23:01:01.706762 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
713 23:01:01.706876 ==
714 23:01:01.713404 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
715 23:01:01.719979 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
716 23:01:01.728925 [CA 0] Center 38 (7~69) winsize 63
717 23:01:01.732213 [CA 1] Center 38 (7~69) winsize 63
718 23:01:01.735756 [CA 2] Center 35 (5~66) winsize 62
719 23:01:01.738774 [CA 3] Center 35 (4~66) winsize 63
720 23:01:01.742340 [CA 4] Center 34 (4~65) winsize 62
721 23:01:01.745354 [CA 5] Center 33 (3~64) winsize 62
722 23:01:01.745441
723 23:01:01.748816 [CmdBusTrainingLP45] Vref(ca) range 1: 34
724 23:01:01.748903
725 23:01:01.752441 [CATrainingPosCal] consider 1 rank data
726 23:01:01.755473 u2DelayCellTimex100 = 270/100 ps
727 23:01:01.759034 CA0 delay=38 (7~69),Diff = 5 PI (36 cell)
728 23:01:01.761928 CA1 delay=38 (7~69),Diff = 5 PI (36 cell)
729 23:01:01.768857 CA2 delay=35 (5~66),Diff = 2 PI (14 cell)
730 23:01:01.772210 CA3 delay=35 (4~66),Diff = 2 PI (14 cell)
731 23:01:01.775297 CA4 delay=34 (4~65),Diff = 1 PI (7 cell)
732 23:01:01.778622 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
733 23:01:01.778738
734 23:01:01.781920 CA PerBit enable=1, Macro0, CA PI delay=33
735 23:01:01.782025
736 23:01:01.785209 [CBTSetCACLKResult] CA Dly = 33
737 23:01:01.788483 CS Dly: 5 (0~36)
738 23:01:01.788598 ==
739 23:01:01.792094 Dram Type= 6, Freq= 0, CH_0, rank 1
740 23:01:01.795302 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
741 23:01:01.795390 ==
742 23:01:01.801846 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
743 23:01:01.805041 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
744 23:01:01.815350 [CA 0] Center 38 (7~69) winsize 63
745 23:01:01.818526 [CA 1] Center 38 (7~69) winsize 63
746 23:01:01.822052 [CA 2] Center 36 (6~67) winsize 62
747 23:01:01.825233 [CA 3] Center 35 (5~66) winsize 62
748 23:01:01.828740 [CA 4] Center 35 (4~66) winsize 63
749 23:01:01.831824 [CA 5] Center 34 (4~65) winsize 62
750 23:01:01.831917
751 23:01:01.835507 [CmdBusTrainingLP45] Vref(ca) range 1: 32
752 23:01:01.835621
753 23:01:01.838699 [CATrainingPosCal] consider 2 rank data
754 23:01:01.842193 u2DelayCellTimex100 = 270/100 ps
755 23:01:01.845194 CA0 delay=38 (7~69),Diff = 4 PI (28 cell)
756 23:01:01.848689 CA1 delay=38 (7~69),Diff = 4 PI (28 cell)
757 23:01:01.855437 CA2 delay=36 (6~66),Diff = 2 PI (14 cell)
758 23:01:01.858489 CA3 delay=35 (5~66),Diff = 1 PI (7 cell)
759 23:01:01.861872 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
760 23:01:01.865495 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
761 23:01:01.865582
762 23:01:01.868506 CA PerBit enable=1, Macro0, CA PI delay=34
763 23:01:01.868609
764 23:01:01.871973 [CBTSetCACLKResult] CA Dly = 34
765 23:01:01.872059 CS Dly: 6 (0~38)
766 23:01:01.872128
767 23:01:01.875310 ----->DramcWriteLeveling(PI) begin...
768 23:01:01.878579 ==
769 23:01:01.881916 Dram Type= 6, Freq= 0, CH_0, rank 0
770 23:01:01.885186 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
771 23:01:01.885292 ==
772 23:01:01.888782 Write leveling (Byte 0): 29 => 29
773 23:01:01.892056 Write leveling (Byte 1): 28 => 28
774 23:01:01.895326 DramcWriteLeveling(PI) end<-----
775 23:01:01.895413
776 23:01:01.895482 ==
777 23:01:01.898680 Dram Type= 6, Freq= 0, CH_0, rank 0
778 23:01:01.902011 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
779 23:01:01.902105 ==
780 23:01:01.905357 [Gating] SW mode calibration
781 23:01:01.912299 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
782 23:01:01.916326 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
783 23:01:01.920012 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
784 23:01:01.926945 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
785 23:01:01.929991 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
786 23:01:01.933533 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
787 23:01:01.940319 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
788 23:01:01.943830 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
789 23:01:01.947461 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
790 23:01:01.950437 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
791 23:01:01.957026 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
792 23:01:01.960586 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
793 23:01:01.963976 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
794 23:01:01.970500 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
795 23:01:01.973908 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
796 23:01:01.977021 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
797 23:01:01.983957 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
798 23:01:01.987317 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
799 23:01:01.990340 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 1)
800 23:01:01.997287 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 1)
801 23:01:02.000693 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
802 23:01:02.003622 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
803 23:01:02.010372 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
804 23:01:02.013960 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
805 23:01:02.017368 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
806 23:01:02.024008 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
807 23:01:02.027339 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
808 23:01:02.030329 0 9 4 | B1->B0 | 2323 2828 | 0 0 | (0 0) (0 0)
809 23:01:02.033871 0 9 8 | B1->B0 | 2323 3434 | 0 1 | (0 0) (1 1)
810 23:01:02.040572 0 9 12 | B1->B0 | 3333 3434 | 1 1 | (1 1) (1 1)
811 23:01:02.043803 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
812 23:01:02.047229 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
813 23:01:02.053990 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
814 23:01:02.056969 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
815 23:01:02.060408 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
816 23:01:02.067071 0 10 4 | B1->B0 | 3434 3131 | 1 1 | (1 1) (1 1)
817 23:01:02.070145 0 10 8 | B1->B0 | 3030 2323 | 0 0 | (0 0) (0 0)
818 23:01:02.073707 0 10 12 | B1->B0 | 2727 2323 | 0 0 | (1 1) (0 0)
819 23:01:02.080135 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
820 23:01:02.083403 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
821 23:01:02.086506 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
822 23:01:02.093364 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
823 23:01:02.096971 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
824 23:01:02.099917 0 11 4 | B1->B0 | 2323 3535 | 0 1 | (0 0) (0 0)
825 23:01:02.106673 0 11 8 | B1->B0 | 2626 4646 | 0 0 | (0 0) (0 0)
826 23:01:02.109959 0 11 12 | B1->B0 | 3f3f 4646 | 0 0 | (0 0) (0 0)
827 23:01:02.113681 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
828 23:01:02.119928 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
829 23:01:02.123193 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
830 23:01:02.126537 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
831 23:01:02.133445 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
832 23:01:02.136930 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
833 23:01:02.139897 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
834 23:01:02.146845 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
835 23:01:02.150079 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
836 23:01:02.153246 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
837 23:01:02.160020 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
838 23:01:02.163474 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
839 23:01:02.166584 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
840 23:01:02.170096 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
841 23:01:02.176532 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
842 23:01:02.179989 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
843 23:01:02.183502 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
844 23:01:02.189835 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
845 23:01:02.193399 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
846 23:01:02.196707 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
847 23:01:02.203472 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
848 23:01:02.206835 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
849 23:01:02.210228 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
850 23:01:02.213153 Total UI for P1: 0, mck2ui 16
851 23:01:02.216456 best dqsien dly found for B0: ( 0, 14, 4)
852 23:01:02.220218 Total UI for P1: 0, mck2ui 16
853 23:01:02.223359 best dqsien dly found for B1: ( 0, 14, 6)
854 23:01:02.226712 best DQS0 dly(MCK, UI, PI) = (0, 14, 4)
855 23:01:02.229704 best DQS1 dly(MCK, UI, PI) = (0, 14, 6)
856 23:01:02.229812
857 23:01:02.236672 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 4)
858 23:01:02.239804 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 6)
859 23:01:02.239916 [Gating] SW calibration Done
860 23:01:02.242797 ==
861 23:01:02.246470 Dram Type= 6, Freq= 0, CH_0, rank 0
862 23:01:02.249971 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
863 23:01:02.250048 ==
864 23:01:02.250120 RX Vref Scan: 0
865 23:01:02.250186
866 23:01:02.253152 RX Vref 0 -> 0, step: 1
867 23:01:02.253255
868 23:01:02.256160 RX Delay -130 -> 252, step: 16
869 23:01:02.259673 iDelay=222, Bit 0, Center 93 (-18 ~ 205) 224
870 23:01:02.263158 iDelay=222, Bit 1, Center 93 (-18 ~ 205) 224
871 23:01:02.269667 iDelay=222, Bit 2, Center 85 (-34 ~ 205) 240
872 23:01:02.272757 iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240
873 23:01:02.276397 iDelay=222, Bit 4, Center 93 (-18 ~ 205) 224
874 23:01:02.279405 iDelay=222, Bit 5, Center 77 (-34 ~ 189) 224
875 23:01:02.282986 iDelay=222, Bit 6, Center 101 (-18 ~ 221) 240
876 23:01:02.289847 iDelay=222, Bit 7, Center 101 (-18 ~ 221) 240
877 23:01:02.293248 iDelay=222, Bit 8, Center 77 (-34 ~ 189) 224
878 23:01:02.296402 iDelay=222, Bit 9, Center 61 (-50 ~ 173) 224
879 23:01:02.299839 iDelay=222, Bit 10, Center 77 (-34 ~ 189) 224
880 23:01:02.302757 iDelay=222, Bit 11, Center 77 (-34 ~ 189) 224
881 23:01:02.309445 iDelay=222, Bit 12, Center 85 (-18 ~ 189) 208
882 23:01:02.312821 iDelay=222, Bit 13, Center 85 (-18 ~ 189) 208
883 23:01:02.316306 iDelay=222, Bit 14, Center 93 (-18 ~ 205) 224
884 23:01:02.319335 iDelay=222, Bit 15, Center 85 (-18 ~ 189) 208
885 23:01:02.319471 ==
886 23:01:02.322627 Dram Type= 6, Freq= 0, CH_0, rank 0
887 23:01:02.329321 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
888 23:01:02.329409 ==
889 23:01:02.329479 DQS Delay:
890 23:01:02.329544 DQS0 = 0, DQS1 = 0
891 23:01:02.332685 DQM Delay:
892 23:01:02.332788 DQM0 = 91, DQM1 = 80
893 23:01:02.336265 DQ Delay:
894 23:01:02.339271 DQ0 =93, DQ1 =93, DQ2 =85, DQ3 =85
895 23:01:02.343146 DQ4 =93, DQ5 =77, DQ6 =101, DQ7 =101
896 23:01:02.346297 DQ8 =77, DQ9 =61, DQ10 =77, DQ11 =77
897 23:01:02.349514 DQ12 =85, DQ13 =85, DQ14 =93, DQ15 =85
898 23:01:02.349615
899 23:01:02.349684
900 23:01:02.349775 ==
901 23:01:02.353108 Dram Type= 6, Freq= 0, CH_0, rank 0
902 23:01:02.356397 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
903 23:01:02.356484 ==
904 23:01:02.356554
905 23:01:02.356618
906 23:01:02.359652 TX Vref Scan disable
907 23:01:02.359740 == TX Byte 0 ==
908 23:01:02.365954 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
909 23:01:02.369415 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
910 23:01:02.369502 == TX Byte 1 ==
911 23:01:02.376126 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
912 23:01:02.379235 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
913 23:01:02.379322 ==
914 23:01:02.382881 Dram Type= 6, Freq= 0, CH_0, rank 0
915 23:01:02.385871 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
916 23:01:02.385959 ==
917 23:01:02.399769 TX Vref=22, minBit 5, minWin=27, winSum=442
918 23:01:02.403361 TX Vref=24, minBit 5, minWin=27, winSum=446
919 23:01:02.406706 TX Vref=26, minBit 8, minWin=27, winSum=447
920 23:01:02.409719 TX Vref=28, minBit 13, minWin=27, winSum=452
921 23:01:02.413401 TX Vref=30, minBit 11, minWin=27, winSum=451
922 23:01:02.419806 TX Vref=32, minBit 8, minWin=27, winSum=454
923 23:01:02.423121 [TxChooseVref] Worse bit 8, Min win 27, Win sum 454, Final Vref 32
924 23:01:02.423233
925 23:01:02.426460 Final TX Range 1 Vref 32
926 23:01:02.426573
927 23:01:02.426671 ==
928 23:01:02.429853 Dram Type= 6, Freq= 0, CH_0, rank 0
929 23:01:02.436326 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
930 23:01:02.436405 ==
931 23:01:02.436472
932 23:01:02.436534
933 23:01:02.436625 TX Vref Scan disable
934 23:01:02.439971 == TX Byte 0 ==
935 23:01:02.443348 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
936 23:01:02.446596 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
937 23:01:02.450131 == TX Byte 1 ==
938 23:01:02.453309 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
939 23:01:02.456641 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
940 23:01:02.460092
941 23:01:02.460178 [DATLAT]
942 23:01:02.460246 Freq=800, CH0 RK0
943 23:01:02.460312
944 23:01:02.463365 DATLAT Default: 0xa
945 23:01:02.463450 0, 0xFFFF, sum = 0
946 23:01:02.466937 1, 0xFFFF, sum = 0
947 23:01:02.467024 2, 0xFFFF, sum = 0
948 23:01:02.470025 3, 0xFFFF, sum = 0
949 23:01:02.470112 4, 0xFFFF, sum = 0
950 23:01:02.473534 5, 0xFFFF, sum = 0
951 23:01:02.473621 6, 0xFFFF, sum = 0
952 23:01:02.476648 7, 0xFFFF, sum = 0
953 23:01:02.480181 8, 0xFFFF, sum = 0
954 23:01:02.480268 9, 0x0, sum = 1
955 23:01:02.480337 10, 0x0, sum = 2
956 23:01:02.483247 11, 0x0, sum = 3
957 23:01:02.483333 12, 0x0, sum = 4
958 23:01:02.486749 best_step = 10
959 23:01:02.486835
960 23:01:02.486903 ==
961 23:01:02.489889 Dram Type= 6, Freq= 0, CH_0, rank 0
962 23:01:02.493455 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
963 23:01:02.493541 ==
964 23:01:02.496442 RX Vref Scan: 1
965 23:01:02.496533
966 23:01:02.496614 Set Vref Range= 32 -> 127
967 23:01:02.499796
968 23:01:02.499908 RX Vref 32 -> 127, step: 1
969 23:01:02.500010
970 23:01:02.503317 RX Delay -95 -> 252, step: 8
971 23:01:02.503420
972 23:01:02.506336 Set Vref, RX VrefLevel [Byte0]: 32
973 23:01:02.509716 [Byte1]: 32
974 23:01:02.509796
975 23:01:02.513324 Set Vref, RX VrefLevel [Byte0]: 33
976 23:01:02.516333 [Byte1]: 33
977 23:01:02.520412
978 23:01:02.520489 Set Vref, RX VrefLevel [Byte0]: 34
979 23:01:02.524022 [Byte1]: 34
980 23:01:02.527748
981 23:01:02.527828 Set Vref, RX VrefLevel [Byte0]: 35
982 23:01:02.531223 [Byte1]: 35
983 23:01:02.535375
984 23:01:02.535483 Set Vref, RX VrefLevel [Byte0]: 36
985 23:01:02.538806 [Byte1]: 36
986 23:01:02.543143
987 23:01:02.543224 Set Vref, RX VrefLevel [Byte0]: 37
988 23:01:02.546324 [Byte1]: 37
989 23:01:02.550973
990 23:01:02.551060 Set Vref, RX VrefLevel [Byte0]: 38
991 23:01:02.554020 [Byte1]: 38
992 23:01:02.558364
993 23:01:02.558454 Set Vref, RX VrefLevel [Byte0]: 39
994 23:01:02.561469 [Byte1]: 39
995 23:01:02.565754
996 23:01:02.565836 Set Vref, RX VrefLevel [Byte0]: 40
997 23:01:02.569210 [Byte1]: 40
998 23:01:02.574140
999 23:01:02.574243 Set Vref, RX VrefLevel [Byte0]: 41
1000 23:01:02.577340 [Byte1]: 41
1001 23:01:02.581493
1002 23:01:02.581572 Set Vref, RX VrefLevel [Byte0]: 42
1003 23:01:02.584586 [Byte1]: 42
1004 23:01:02.589269
1005 23:01:02.589351 Set Vref, RX VrefLevel [Byte0]: 43
1006 23:01:02.592406 [Byte1]: 43
1007 23:01:02.596538
1008 23:01:02.596653 Set Vref, RX VrefLevel [Byte0]: 44
1009 23:01:02.599600 [Byte1]: 44
1010 23:01:02.604410
1011 23:01:02.604523 Set Vref, RX VrefLevel [Byte0]: 45
1012 23:01:02.608034 [Byte1]: 45
1013 23:01:02.611391
1014 23:01:02.611500 Set Vref, RX VrefLevel [Byte0]: 46
1015 23:01:02.614694 [Byte1]: 46
1016 23:01:02.618851
1017 23:01:02.618942 Set Vref, RX VrefLevel [Byte0]: 47
1018 23:01:02.622480 [Byte1]: 47
1019 23:01:02.626511
1020 23:01:02.626599 Set Vref, RX VrefLevel [Byte0]: 48
1021 23:01:02.629937 [Byte1]: 48
1022 23:01:02.634235
1023 23:01:02.634347 Set Vref, RX VrefLevel [Byte0]: 49
1024 23:01:02.637566 [Byte1]: 49
1025 23:01:02.642057
1026 23:01:02.642148 Set Vref, RX VrefLevel [Byte0]: 50
1027 23:01:02.644956 [Byte1]: 50
1028 23:01:02.649472
1029 23:01:02.649567 Set Vref, RX VrefLevel [Byte0]: 51
1030 23:01:02.653024 [Byte1]: 51
1031 23:01:02.657332
1032 23:01:02.657417 Set Vref, RX VrefLevel [Byte0]: 52
1033 23:01:02.660448 [Byte1]: 52
1034 23:01:02.664746
1035 23:01:02.664856 Set Vref, RX VrefLevel [Byte0]: 53
1036 23:01:02.667792 [Byte1]: 53
1037 23:01:02.672181
1038 23:01:02.672269 Set Vref, RX VrefLevel [Byte0]: 54
1039 23:01:02.675855 [Byte1]: 54
1040 23:01:02.679682
1041 23:01:02.679790 Set Vref, RX VrefLevel [Byte0]: 55
1042 23:01:02.683208 [Byte1]: 55
1043 23:01:02.687336
1044 23:01:02.687453 Set Vref, RX VrefLevel [Byte0]: 56
1045 23:01:02.691038 [Byte1]: 56
1046 23:01:02.694921
1047 23:01:02.695005 Set Vref, RX VrefLevel [Byte0]: 57
1048 23:01:02.698403 [Byte1]: 57
1049 23:01:02.702377
1050 23:01:02.702486 Set Vref, RX VrefLevel [Byte0]: 58
1051 23:01:02.705859 [Byte1]: 58
1052 23:01:02.710147
1053 23:01:02.710228 Set Vref, RX VrefLevel [Byte0]: 59
1054 23:01:02.713857 [Byte1]: 59
1055 23:01:02.718053
1056 23:01:02.718164 Set Vref, RX VrefLevel [Byte0]: 60
1057 23:01:02.721523 [Byte1]: 60
1058 23:01:02.725514
1059 23:01:02.725620 Set Vref, RX VrefLevel [Byte0]: 61
1060 23:01:02.728590 [Byte1]: 61
1061 23:01:02.733231
1062 23:01:02.733342 Set Vref, RX VrefLevel [Byte0]: 62
1063 23:01:02.736308 [Byte1]: 62
1064 23:01:02.740624
1065 23:01:02.740737 Set Vref, RX VrefLevel [Byte0]: 63
1066 23:01:02.744015 [Byte1]: 63
1067 23:01:02.748079
1068 23:01:02.748193 Set Vref, RX VrefLevel [Byte0]: 64
1069 23:01:02.751416 [Byte1]: 64
1070 23:01:02.755791
1071 23:01:02.755900 Set Vref, RX VrefLevel [Byte0]: 65
1072 23:01:02.759037 [Byte1]: 65
1073 23:01:02.763813
1074 23:01:02.763898 Set Vref, RX VrefLevel [Byte0]: 66
1075 23:01:02.766650 [Byte1]: 66
1076 23:01:02.770967
1077 23:01:02.771079 Set Vref, RX VrefLevel [Byte0]: 67
1078 23:01:02.774322 [Byte1]: 67
1079 23:01:02.778532
1080 23:01:02.778659 Set Vref, RX VrefLevel [Byte0]: 68
1081 23:01:02.782005 [Byte1]: 68
1082 23:01:02.786489
1083 23:01:02.786575 Set Vref, RX VrefLevel [Byte0]: 69
1084 23:01:02.789561 [Byte1]: 69
1085 23:01:02.793748
1086 23:01:02.793834 Set Vref, RX VrefLevel [Byte0]: 70
1087 23:01:02.800457 [Byte1]: 70
1088 23:01:02.800543
1089 23:01:02.803547 Set Vref, RX VrefLevel [Byte0]: 71
1090 23:01:02.807037 [Byte1]: 71
1091 23:01:02.807123
1092 23:01:02.810369 Set Vref, RX VrefLevel [Byte0]: 72
1093 23:01:02.813800 [Byte1]: 72
1094 23:01:02.813886
1095 23:01:02.816905 Set Vref, RX VrefLevel [Byte0]: 73
1096 23:01:02.820427 [Byte1]: 73
1097 23:01:02.824242
1098 23:01:02.824362 Set Vref, RX VrefLevel [Byte0]: 74
1099 23:01:02.827561 [Byte1]: 74
1100 23:01:02.832083
1101 23:01:02.832205 Set Vref, RX VrefLevel [Byte0]: 75
1102 23:01:02.835470 [Byte1]: 75
1103 23:01:02.839520
1104 23:01:02.839633 Set Vref, RX VrefLevel [Byte0]: 76
1105 23:01:02.842778 [Byte1]: 76
1106 23:01:02.847128
1107 23:01:02.847240 Set Vref, RX VrefLevel [Byte0]: 77
1108 23:01:02.850310 [Byte1]: 77
1109 23:01:02.854399
1110 23:01:02.854488 Final RX Vref Byte 0 = 60 to rank0
1111 23:01:02.857724 Final RX Vref Byte 1 = 62 to rank0
1112 23:01:02.860993 Final RX Vref Byte 0 = 60 to rank1
1113 23:01:02.864705 Final RX Vref Byte 1 = 62 to rank1==
1114 23:01:02.867999 Dram Type= 6, Freq= 0, CH_0, rank 0
1115 23:01:02.874541 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1116 23:01:02.874628 ==
1117 23:01:02.874697 DQS Delay:
1118 23:01:02.874766 DQS0 = 0, DQS1 = 0
1119 23:01:02.878189 DQM Delay:
1120 23:01:02.878287 DQM0 = 93, DQM1 = 83
1121 23:01:02.881582 DQ Delay:
1122 23:01:02.884449 DQ0 =92, DQ1 =96, DQ2 =88, DQ3 =88
1123 23:01:02.887984 DQ4 =92, DQ5 =80, DQ6 =104, DQ7 =104
1124 23:01:02.891468 DQ8 =72, DQ9 =72, DQ10 =84, DQ11 =80
1125 23:01:02.894453 DQ12 =88, DQ13 =88, DQ14 =92, DQ15 =92
1126 23:01:02.894607
1127 23:01:02.894702
1128 23:01:02.901124 [DQSOSCAuto] RK0, (LSB)MR18= 0x3632, (MSB)MR19= 0x606, tDQSOscB0 = 397 ps tDQSOscB1 = 396 ps
1129 23:01:02.904671 CH0 RK0: MR19=606, MR18=3632
1130 23:01:02.911300 CH0_RK0: MR19=0x606, MR18=0x3632, DQSOSC=396, MR23=63, INC=94, DEC=62
1131 23:01:02.911378
1132 23:01:02.914464 ----->DramcWriteLeveling(PI) begin...
1133 23:01:02.914538 ==
1134 23:01:02.917822 Dram Type= 6, Freq= 0, CH_0, rank 1
1135 23:01:02.921324 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1136 23:01:02.921409 ==
1137 23:01:02.924664 Write leveling (Byte 0): 33 => 33
1138 23:01:02.928098 Write leveling (Byte 1): 28 => 28
1139 23:01:02.931098 DramcWriteLeveling(PI) end<-----
1140 23:01:02.931181
1141 23:01:02.931246 ==
1142 23:01:02.934788 Dram Type= 6, Freq= 0, CH_0, rank 1
1143 23:01:02.937786 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1144 23:01:02.937886 ==
1145 23:01:02.941182 [Gating] SW mode calibration
1146 23:01:02.947750 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1147 23:01:02.954391 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1148 23:01:02.957859 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1149 23:01:02.961136 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1150 23:01:02.968045 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
1151 23:01:02.971363 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1152 23:01:02.974592 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1153 23:01:03.021915 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1154 23:01:03.022020 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1155 23:01:03.022271 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1156 23:01:03.022340 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1157 23:01:03.022415 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1158 23:01:03.022662 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1159 23:01:03.022731 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1160 23:01:03.022803 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1161 23:01:03.023484 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1162 23:01:03.023749 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1163 23:01:03.065916 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1164 23:01:03.066005 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1165 23:01:03.066253 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 1) (1 0)
1166 23:01:03.066323 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1167 23:01:03.066399 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1168 23:01:03.067024 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1169 23:01:03.067110 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1170 23:01:03.067359 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1171 23:01:03.067441 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1172 23:01:03.068052 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1173 23:01:03.085802 0 9 4 | B1->B0 | 2323 2625 | 0 1 | (0 0) (1 1)
1174 23:01:03.085949 0 9 8 | B1->B0 | 2a2a 3434 | 1 1 | (1 1) (1 1)
1175 23:01:03.086196 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1176 23:01:03.086267 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1177 23:01:03.089258 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1178 23:01:03.092556 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1179 23:01:03.095818 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1180 23:01:03.099479 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1181 23:01:03.102480 0 10 4 | B1->B0 | 3434 2f2f | 1 0 | (1 1) (0 0)
1182 23:01:03.109164 0 10 8 | B1->B0 | 2f2f 2323 | 0 0 | (0 0) (0 0)
1183 23:01:03.112708 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1184 23:01:03.115740 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1185 23:01:03.122423 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1186 23:01:03.125889 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1187 23:01:03.128872 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1188 23:01:03.132417 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1189 23:01:03.138998 0 11 4 | B1->B0 | 2424 2f2f | 0 0 | (0 0) (0 0)
1190 23:01:03.142045 0 11 8 | B1->B0 | 3838 4545 | 0 0 | (0 0) (0 0)
1191 23:01:03.145778 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1192 23:01:03.152404 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1193 23:01:03.155934 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1194 23:01:03.159612 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1195 23:01:03.163069 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1196 23:01:03.169814 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1197 23:01:03.173404 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1198 23:01:03.176811 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
1199 23:01:03.183469 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1200 23:01:03.186366 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1201 23:01:03.190009 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1202 23:01:03.196378 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1203 23:01:03.199940 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1204 23:01:03.203142 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1205 23:01:03.209775 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1206 23:01:03.213338 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1207 23:01:03.216418 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1208 23:01:03.223007 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1209 23:01:03.225990 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1210 23:01:03.229355 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1211 23:01:03.236043 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1212 23:01:03.239383 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1213 23:01:03.242840 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1214 23:01:03.249236 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1215 23:01:03.252692 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1216 23:01:03.255772 Total UI for P1: 0, mck2ui 16
1217 23:01:03.259313 best dqsien dly found for B0: ( 0, 14, 6)
1218 23:01:03.262817 Total UI for P1: 0, mck2ui 16
1219 23:01:03.266008 best dqsien dly found for B1: ( 0, 14, 6)
1220 23:01:03.269371 best DQS0 dly(MCK, UI, PI) = (0, 14, 6)
1221 23:01:03.272485 best DQS1 dly(MCK, UI, PI) = (0, 14, 6)
1222 23:01:03.272569
1223 23:01:03.275945 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 6)
1224 23:01:03.279063 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 6)
1225 23:01:03.282479 [Gating] SW calibration Done
1226 23:01:03.282553 ==
1227 23:01:03.286174 Dram Type= 6, Freq= 0, CH_0, rank 1
1228 23:01:03.289182 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1229 23:01:03.289269 ==
1230 23:01:03.292502 RX Vref Scan: 0
1231 23:01:03.292587
1232 23:01:03.295905 RX Vref 0 -> 0, step: 1
1233 23:01:03.295992
1234 23:01:03.299249 RX Delay -130 -> 252, step: 16
1235 23:01:03.302322 iDelay=222, Bit 0, Center 93 (-18 ~ 205) 224
1236 23:01:03.305854 iDelay=222, Bit 1, Center 93 (-18 ~ 205) 224
1237 23:01:03.309066 iDelay=222, Bit 2, Center 93 (-18 ~ 205) 224
1238 23:01:03.312121 iDelay=222, Bit 3, Center 77 (-34 ~ 189) 224
1239 23:01:03.318727 iDelay=222, Bit 4, Center 93 (-18 ~ 205) 224
1240 23:01:03.322488 iDelay=222, Bit 5, Center 77 (-34 ~ 189) 224
1241 23:01:03.325493 iDelay=222, Bit 6, Center 101 (-18 ~ 221) 240
1242 23:01:03.329008 iDelay=222, Bit 7, Center 101 (-18 ~ 221) 240
1243 23:01:03.332250 iDelay=222, Bit 8, Center 69 (-34 ~ 173) 208
1244 23:01:03.338989 iDelay=222, Bit 9, Center 61 (-50 ~ 173) 224
1245 23:01:03.341897 iDelay=222, Bit 10, Center 77 (-34 ~ 189) 224
1246 23:01:03.345347 iDelay=222, Bit 11, Center 77 (-34 ~ 189) 224
1247 23:01:03.348871 iDelay=222, Bit 12, Center 77 (-34 ~ 189) 224
1248 23:01:03.351937 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
1249 23:01:03.358697 iDelay=222, Bit 14, Center 93 (-18 ~ 205) 224
1250 23:01:03.362011 iDelay=222, Bit 15, Center 93 (-18 ~ 205) 224
1251 23:01:03.362113 ==
1252 23:01:03.365135 Dram Type= 6, Freq= 0, CH_0, rank 1
1253 23:01:03.368663 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1254 23:01:03.368773 ==
1255 23:01:03.371992 DQS Delay:
1256 23:01:03.372069 DQS0 = 0, DQS1 = 0
1257 23:01:03.372153 DQM Delay:
1258 23:01:03.375189 DQM0 = 91, DQM1 = 79
1259 23:01:03.375262 DQ Delay:
1260 23:01:03.378819 DQ0 =93, DQ1 =93, DQ2 =93, DQ3 =77
1261 23:01:03.381846 DQ4 =93, DQ5 =77, DQ6 =101, DQ7 =101
1262 23:01:03.385435 DQ8 =69, DQ9 =61, DQ10 =77, DQ11 =77
1263 23:01:03.388564 DQ12 =77, DQ13 =85, DQ14 =93, DQ15 =93
1264 23:01:03.388638
1265 23:01:03.388741
1266 23:01:03.388844 ==
1267 23:01:03.392347 Dram Type= 6, Freq= 0, CH_0, rank 1
1268 23:01:03.398332 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1269 23:01:03.398443 ==
1270 23:01:03.398550
1271 23:01:03.398643
1272 23:01:03.398731 TX Vref Scan disable
1273 23:01:03.402373 == TX Byte 0 ==
1274 23:01:03.405874 Update DQ dly =584 (2 ,1, 40) DQ OEN =(1 ,6)
1275 23:01:03.412418 Update DQM dly =584 (2 ,1, 40) DQM OEN =(1 ,6)
1276 23:01:03.412526 == TX Byte 1 ==
1277 23:01:03.415709 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
1278 23:01:03.422108 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
1279 23:01:03.422190 ==
1280 23:01:03.425431 Dram Type= 6, Freq= 0, CH_0, rank 1
1281 23:01:03.428969 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1282 23:01:03.429046 ==
1283 23:01:03.441937 TX Vref=22, minBit 3, minWin=27, winSum=447
1284 23:01:03.445364 TX Vref=24, minBit 1, minWin=27, winSum=450
1285 23:01:03.448879 TX Vref=26, minBit 8, minWin=27, winSum=452
1286 23:01:03.451891 TX Vref=28, minBit 8, minWin=27, winSum=453
1287 23:01:03.455488 TX Vref=30, minBit 8, minWin=28, winSum=461
1288 23:01:03.461640 TX Vref=32, minBit 6, minWin=28, winSum=460
1289 23:01:03.465249 [TxChooseVref] Worse bit 8, Min win 28, Win sum 461, Final Vref 30
1290 23:01:03.465328
1291 23:01:03.468654 Final TX Range 1 Vref 30
1292 23:01:03.468779
1293 23:01:03.468845 ==
1294 23:01:03.471784 Dram Type= 6, Freq= 0, CH_0, rank 1
1295 23:01:03.475312 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1296 23:01:03.475438 ==
1297 23:01:03.478645
1298 23:01:03.478728
1299 23:01:03.478792 TX Vref Scan disable
1300 23:01:03.482088 == TX Byte 0 ==
1301 23:01:03.485154 Update DQ dly =584 (2 ,1, 40) DQ OEN =(1 ,6)
1302 23:01:03.492106 Update DQM dly =584 (2 ,1, 40) DQM OEN =(1 ,6)
1303 23:01:03.492191 == TX Byte 1 ==
1304 23:01:03.495055 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
1305 23:01:03.501985 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
1306 23:01:03.502069
1307 23:01:03.502134 [DATLAT]
1308 23:01:03.502226 Freq=800, CH0 RK1
1309 23:01:03.502309
1310 23:01:03.505385 DATLAT Default: 0xa
1311 23:01:03.505466 0, 0xFFFF, sum = 0
1312 23:01:03.508461 1, 0xFFFF, sum = 0
1313 23:01:03.508571 2, 0xFFFF, sum = 0
1314 23:01:03.511835 3, 0xFFFF, sum = 0
1315 23:01:03.515047 4, 0xFFFF, sum = 0
1316 23:01:03.515154 5, 0xFFFF, sum = 0
1317 23:01:03.518363 6, 0xFFFF, sum = 0
1318 23:01:03.518447 7, 0xFFFF, sum = 0
1319 23:01:03.521882 8, 0xFFFF, sum = 0
1320 23:01:03.521966 9, 0x0, sum = 1
1321 23:01:03.524876 10, 0x0, sum = 2
1322 23:01:03.524958 11, 0x0, sum = 3
1323 23:01:03.525025 12, 0x0, sum = 4
1324 23:01:03.528758 best_step = 10
1325 23:01:03.528879
1326 23:01:03.528943 ==
1327 23:01:03.531511 Dram Type= 6, Freq= 0, CH_0, rank 1
1328 23:01:03.535142 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1329 23:01:03.535224 ==
1330 23:01:03.538696 RX Vref Scan: 0
1331 23:01:03.538777
1332 23:01:03.538842 RX Vref 0 -> 0, step: 1
1333 23:01:03.541451
1334 23:01:03.541532 RX Delay -95 -> 252, step: 8
1335 23:01:03.548489 iDelay=209, Bit 0, Center 88 (-23 ~ 200) 224
1336 23:01:03.551842 iDelay=209, Bit 1, Center 92 (-15 ~ 200) 216
1337 23:01:03.555278 iDelay=209, Bit 2, Center 88 (-23 ~ 200) 224
1338 23:01:03.558805 iDelay=209, Bit 3, Center 84 (-23 ~ 192) 216
1339 23:01:03.561905 iDelay=209, Bit 4, Center 92 (-15 ~ 200) 216
1340 23:01:03.568501 iDelay=209, Bit 5, Center 80 (-31 ~ 192) 224
1341 23:01:03.572184 iDelay=209, Bit 6, Center 100 (-7 ~ 208) 216
1342 23:01:03.575264 iDelay=209, Bit 7, Center 100 (-7 ~ 208) 216
1343 23:01:03.578653 iDelay=209, Bit 8, Center 72 (-31 ~ 176) 208
1344 23:01:03.582035 iDelay=209, Bit 9, Center 72 (-31 ~ 176) 208
1345 23:01:03.588736 iDelay=209, Bit 10, Center 80 (-23 ~ 184) 208
1346 23:01:03.591850 iDelay=209, Bit 11, Center 76 (-23 ~ 176) 200
1347 23:01:03.595422 iDelay=209, Bit 12, Center 84 (-23 ~ 192) 216
1348 23:01:03.598394 iDelay=209, Bit 13, Center 84 (-23 ~ 192) 216
1349 23:01:03.601918 iDelay=209, Bit 14, Center 92 (-15 ~ 200) 216
1350 23:01:03.608889 iDelay=209, Bit 15, Center 92 (-15 ~ 200) 216
1351 23:01:03.608999 ==
1352 23:01:03.611795 Dram Type= 6, Freq= 0, CH_0, rank 1
1353 23:01:03.615194 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1354 23:01:03.615297 ==
1355 23:01:03.615395 DQS Delay:
1356 23:01:03.618607 DQS0 = 0, DQS1 = 0
1357 23:01:03.618678 DQM Delay:
1358 23:01:03.621836 DQM0 = 90, DQM1 = 81
1359 23:01:03.621918 DQ Delay:
1360 23:01:03.625586 DQ0 =88, DQ1 =92, DQ2 =88, DQ3 =84
1361 23:01:03.628676 DQ4 =92, DQ5 =80, DQ6 =100, DQ7 =100
1362 23:01:03.631805 DQ8 =72, DQ9 =72, DQ10 =80, DQ11 =76
1363 23:01:03.635231 DQ12 =84, DQ13 =84, DQ14 =92, DQ15 =92
1364 23:01:03.635306
1365 23:01:03.635378
1366 23:01:03.645131 [DQSOSCAuto] RK1, (LSB)MR18= 0x3c18, (MSB)MR19= 0x606, tDQSOscB0 = 403 ps tDQSOscB1 = 394 ps
1367 23:01:03.645210 CH0 RK1: MR19=606, MR18=3C18
1368 23:01:03.652114 CH0_RK1: MR19=0x606, MR18=0x3C18, DQSOSC=394, MR23=63, INC=95, DEC=63
1369 23:01:03.655068 [RxdqsGatingPostProcess] freq 800
1370 23:01:03.662026 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
1371 23:01:03.665211 Pre-setting of DQS Precalculation
1372 23:01:03.668647 [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10
1373 23:01:03.668717 ==
1374 23:01:03.671885 Dram Type= 6, Freq= 0, CH_1, rank 0
1375 23:01:03.675572 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1376 23:01:03.678570 ==
1377 23:01:03.682066 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1378 23:01:03.688461 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1379 23:01:03.696998 [CA 0] Center 36 (6~67) winsize 62
1380 23:01:03.700448 [CA 1] Center 37 (6~68) winsize 63
1381 23:01:03.703826 [CA 2] Center 35 (5~65) winsize 61
1382 23:01:03.707487 [CA 3] Center 34 (3~65) winsize 63
1383 23:01:03.710510 [CA 4] Center 34 (4~65) winsize 62
1384 23:01:03.714010 [CA 5] Center 34 (4~64) winsize 61
1385 23:01:03.714095
1386 23:01:03.717205 [CmdBusTrainingLP45] Vref(ca) range 1: 32
1387 23:01:03.717289
1388 23:01:03.720508 [CATrainingPosCal] consider 1 rank data
1389 23:01:03.723497 u2DelayCellTimex100 = 270/100 ps
1390 23:01:03.726926 CA0 delay=36 (6~67),Diff = 2 PI (14 cell)
1391 23:01:03.733927 CA1 delay=37 (6~68),Diff = 3 PI (21 cell)
1392 23:01:03.737151 CA2 delay=35 (5~65),Diff = 1 PI (7 cell)
1393 23:01:03.740075 CA3 delay=34 (3~65),Diff = 0 PI (0 cell)
1394 23:01:03.743447 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
1395 23:01:03.746933 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
1396 23:01:03.747011
1397 23:01:03.750345 CA PerBit enable=1, Macro0, CA PI delay=34
1398 23:01:03.750423
1399 23:01:03.753402 [CBTSetCACLKResult] CA Dly = 34
1400 23:01:03.753472 CS Dly: 5 (0~36)
1401 23:01:03.757000 ==
1402 23:01:03.760057 Dram Type= 6, Freq= 0, CH_1, rank 1
1403 23:01:03.763418 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1404 23:01:03.763496 ==
1405 23:01:03.766968 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1406 23:01:03.773523 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1407 23:01:03.783242 [CA 0] Center 37 (7~67) winsize 61
1408 23:01:03.786691 [CA 1] Center 37 (6~68) winsize 63
1409 23:01:03.790086 [CA 2] Center 35 (5~66) winsize 62
1410 23:01:03.793146 [CA 3] Center 34 (4~65) winsize 62
1411 23:01:03.796578 [CA 4] Center 34 (4~65) winsize 62
1412 23:01:03.800162 [CA 5] Center 34 (4~65) winsize 62
1413 23:01:03.800231
1414 23:01:03.803234 [CmdBusTrainingLP45] Vref(ca) range 1: 34
1415 23:01:03.803302
1416 23:01:03.806298 [CATrainingPosCal] consider 2 rank data
1417 23:01:03.809782 u2DelayCellTimex100 = 270/100 ps
1418 23:01:03.812909 CA0 delay=37 (7~67),Diff = 3 PI (21 cell)
1419 23:01:03.819612 CA1 delay=37 (6~68),Diff = 3 PI (21 cell)
1420 23:01:03.823218 CA2 delay=35 (5~65),Diff = 1 PI (7 cell)
1421 23:01:03.827272 CA3 delay=34 (4~65),Diff = 0 PI (0 cell)
1422 23:01:03.831066 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
1423 23:01:03.831187 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
1424 23:01:03.834775
1425 23:01:03.838511 CA PerBit enable=1, Macro0, CA PI delay=34
1426 23:01:03.838595
1427 23:01:03.838660 [CBTSetCACLKResult] CA Dly = 34
1428 23:01:03.842427 CS Dly: 5 (0~37)
1429 23:01:03.842568
1430 23:01:03.845855 ----->DramcWriteLeveling(PI) begin...
1431 23:01:03.845940 ==
1432 23:01:03.849698 Dram Type= 6, Freq= 0, CH_1, rank 0
1433 23:01:03.852971 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1434 23:01:03.853055 ==
1435 23:01:03.856976 Write leveling (Byte 0): 27 => 27
1436 23:01:03.860088 Write leveling (Byte 1): 29 => 29
1437 23:01:03.860172 DramcWriteLeveling(PI) end<-----
1438 23:01:03.860237
1439 23:01:03.863535 ==
1440 23:01:03.866940 Dram Type= 6, Freq= 0, CH_1, rank 0
1441 23:01:03.870442 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1442 23:01:03.870526 ==
1443 23:01:03.873534 [Gating] SW mode calibration
1444 23:01:03.880072 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1445 23:01:03.883766 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1446 23:01:03.890488 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1447 23:01:03.893408 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1448 23:01:03.896733 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
1449 23:01:03.903490 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1450 23:01:03.907114 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1451 23:01:03.910130 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1452 23:01:03.917024 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1453 23:01:03.920049 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1454 23:01:03.923372 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1455 23:01:03.929973 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1456 23:01:03.933666 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1457 23:01:03.936665 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1458 23:01:03.943683 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1459 23:01:03.946537 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1460 23:01:03.949909 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1461 23:01:03.956464 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1462 23:01:03.959809 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 1) (0 1)
1463 23:01:03.963292 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1464 23:01:03.966863 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1465 23:01:03.973408 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1466 23:01:03.976487 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1467 23:01:03.979975 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1468 23:01:03.986499 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1469 23:01:03.989511 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1470 23:01:03.993053 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1471 23:01:03.999809 0 9 4 | B1->B0 | 2323 2424 | 1 0 | (1 1) (0 0)
1472 23:01:04.002994 0 9 8 | B1->B0 | 3434 3434 | 0 1 | (0 0) (1 1)
1473 23:01:04.006574 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1474 23:01:04.013225 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1475 23:01:04.016782 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1476 23:01:04.019583 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1477 23:01:04.026499 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1478 23:01:04.029614 0 10 0 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 0)
1479 23:01:04.033234 0 10 4 | B1->B0 | 3131 2f2f | 0 1 | (0 1) (1 0)
1480 23:01:04.039688 0 10 8 | B1->B0 | 2424 2323 | 0 0 | (1 1) (0 0)
1481 23:01:04.042971 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1482 23:01:04.046209 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1483 23:01:04.052606 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1484 23:01:04.056175 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1485 23:01:04.059499 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1486 23:01:04.066197 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1487 23:01:04.069195 0 11 4 | B1->B0 | 3333 3737 | 0 1 | (0 0) (0 0)
1488 23:01:04.072520 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1489 23:01:04.079516 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1490 23:01:04.082509 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1491 23:01:04.086081 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1492 23:01:04.092648 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1493 23:01:04.095692 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1494 23:01:04.099347 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
1495 23:01:04.105829 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1496 23:01:04.108975 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1497 23:01:04.112422 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1498 23:01:04.119275 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1499 23:01:04.122670 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1500 23:01:04.125701 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1501 23:01:04.132386 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1502 23:01:04.135911 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1503 23:01:04.139049 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1504 23:01:04.142626 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1505 23:01:04.149143 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1506 23:01:04.152557 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1507 23:01:04.155692 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1508 23:01:04.162302 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1509 23:01:04.165775 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1510 23:01:04.168958 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1511 23:01:04.175763 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
1512 23:01:04.178598 Total UI for P1: 0, mck2ui 16
1513 23:01:04.182345 best dqsien dly found for B0: ( 0, 14, 0)
1514 23:01:04.185362 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1515 23:01:04.188869 Total UI for P1: 0, mck2ui 16
1516 23:01:04.191904 best dqsien dly found for B1: ( 0, 14, 2)
1517 23:01:04.195388 best DQS0 dly(MCK, UI, PI) = (0, 14, 0)
1518 23:01:04.198985 best DQS1 dly(MCK, UI, PI) = (0, 14, 2)
1519 23:01:04.199087
1520 23:01:04.202070 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 0)
1521 23:01:04.205330 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 2)
1522 23:01:04.208836 [Gating] SW calibration Done
1523 23:01:04.208942 ==
1524 23:01:04.212039 Dram Type= 6, Freq= 0, CH_1, rank 0
1525 23:01:04.215452 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1526 23:01:04.218957 ==
1527 23:01:04.219069 RX Vref Scan: 0
1528 23:01:04.219166
1529 23:01:04.222008 RX Vref 0 -> 0, step: 1
1530 23:01:04.222109
1531 23:01:04.225372 RX Delay -130 -> 252, step: 16
1532 23:01:04.228437 iDelay=222, Bit 0, Center 93 (-18 ~ 205) 224
1533 23:01:04.232040 iDelay=222, Bit 1, Center 85 (-18 ~ 189) 208
1534 23:01:04.235459 iDelay=222, Bit 2, Center 77 (-34 ~ 189) 224
1535 23:01:04.238462 iDelay=222, Bit 3, Center 93 (-18 ~ 205) 224
1536 23:01:04.245131 iDelay=222, Bit 4, Center 93 (-18 ~ 205) 224
1537 23:01:04.248623 iDelay=222, Bit 5, Center 101 (-2 ~ 205) 208
1538 23:01:04.251994 iDelay=222, Bit 6, Center 101 (-18 ~ 221) 240
1539 23:01:04.255397 iDelay=222, Bit 7, Center 93 (-18 ~ 205) 224
1540 23:01:04.258571 iDelay=222, Bit 8, Center 69 (-50 ~ 189) 240
1541 23:01:04.265203 iDelay=222, Bit 9, Center 69 (-50 ~ 189) 240
1542 23:01:04.268530 iDelay=222, Bit 10, Center 85 (-34 ~ 205) 240
1543 23:01:04.271693 iDelay=222, Bit 11, Center 77 (-34 ~ 189) 224
1544 23:01:04.275124 iDelay=222, Bit 12, Center 85 (-34 ~ 205) 240
1545 23:01:04.278286 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
1546 23:01:04.285337 iDelay=222, Bit 14, Center 85 (-34 ~ 205) 240
1547 23:01:04.288409 iDelay=222, Bit 15, Center 85 (-34 ~ 205) 240
1548 23:01:04.288516 ==
1549 23:01:04.291865 Dram Type= 6, Freq= 0, CH_1, rank 0
1550 23:01:04.294940 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1551 23:01:04.295048 ==
1552 23:01:04.298406 DQS Delay:
1553 23:01:04.298521 DQS0 = 0, DQS1 = 0
1554 23:01:04.298619 DQM Delay:
1555 23:01:04.301494 DQM0 = 92, DQM1 = 80
1556 23:01:04.301606 DQ Delay:
1557 23:01:04.305014 DQ0 =93, DQ1 =85, DQ2 =77, DQ3 =93
1558 23:01:04.308450 DQ4 =93, DQ5 =101, DQ6 =101, DQ7 =93
1559 23:01:04.311935 DQ8 =69, DQ9 =69, DQ10 =85, DQ11 =77
1560 23:01:04.314853 DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85
1561 23:01:04.314964
1562 23:01:04.315060
1563 23:01:04.315152 ==
1564 23:01:04.318430 Dram Type= 6, Freq= 0, CH_1, rank 0
1565 23:01:04.324743 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1566 23:01:04.324862 ==
1567 23:01:04.324959
1568 23:01:04.325051
1569 23:01:04.325141 TX Vref Scan disable
1570 23:01:04.328670 == TX Byte 0 ==
1571 23:01:04.331966 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1572 23:01:04.338584 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1573 23:01:04.338670 == TX Byte 1 ==
1574 23:01:04.342119 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1575 23:01:04.348257 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1576 23:01:04.348344 ==
1577 23:01:04.351834 Dram Type= 6, Freq= 0, CH_1, rank 0
1578 23:01:04.355295 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1579 23:01:04.355383 ==
1580 23:01:04.368057 TX Vref=22, minBit 8, minWin=27, winSum=446
1581 23:01:04.371456 TX Vref=24, minBit 8, minWin=27, winSum=449
1582 23:01:04.374533 TX Vref=26, minBit 8, minWin=27, winSum=454
1583 23:01:04.377648 TX Vref=28, minBit 15, minWin=27, winSum=456
1584 23:01:04.381107 TX Vref=30, minBit 9, minWin=27, winSum=456
1585 23:01:04.384333 TX Vref=32, minBit 8, minWin=27, winSum=455
1586 23:01:04.391363 [TxChooseVref] Worse bit 15, Min win 27, Win sum 456, Final Vref 28
1587 23:01:04.391447
1588 23:01:04.394503 Final TX Range 1 Vref 28
1589 23:01:04.394589
1590 23:01:04.394656 ==
1591 23:01:04.398090 Dram Type= 6, Freq= 0, CH_1, rank 0
1592 23:01:04.401193 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1593 23:01:04.401278 ==
1594 23:01:04.404592
1595 23:01:04.404675
1596 23:01:04.404742 TX Vref Scan disable
1597 23:01:04.408238 == TX Byte 0 ==
1598 23:01:04.411315 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
1599 23:01:04.417650 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
1600 23:01:04.417735 == TX Byte 1 ==
1601 23:01:04.421246 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1602 23:01:04.424758 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1603 23:01:04.427939
1604 23:01:04.428023 [DATLAT]
1605 23:01:04.428089 Freq=800, CH1 RK0
1606 23:01:04.428183
1607 23:01:04.431032 DATLAT Default: 0xa
1608 23:01:04.431115 0, 0xFFFF, sum = 0
1609 23:01:04.434438 1, 0xFFFF, sum = 0
1610 23:01:04.434524 2, 0xFFFF, sum = 0
1611 23:01:04.437994 3, 0xFFFF, sum = 0
1612 23:01:04.438081 4, 0xFFFF, sum = 0
1613 23:01:04.441428 5, 0xFFFF, sum = 0
1614 23:01:04.444451 6, 0xFFFF, sum = 0
1615 23:01:04.444537 7, 0xFFFF, sum = 0
1616 23:01:04.447835 8, 0xFFFF, sum = 0
1617 23:01:04.447920 9, 0x0, sum = 1
1618 23:01:04.447989 10, 0x0, sum = 2
1619 23:01:04.450948 11, 0x0, sum = 3
1620 23:01:04.451033 12, 0x0, sum = 4
1621 23:01:04.454491 best_step = 10
1622 23:01:04.454575
1623 23:01:04.454653 ==
1624 23:01:04.458081 Dram Type= 6, Freq= 0, CH_1, rank 0
1625 23:01:04.460976 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1626 23:01:04.461060 ==
1627 23:01:04.464414 RX Vref Scan: 1
1628 23:01:04.464500
1629 23:01:04.464567 Set Vref Range= 32 -> 127
1630 23:01:04.467931
1631 23:01:04.468015 RX Vref 32 -> 127, step: 1
1632 23:01:04.468082
1633 23:01:04.470797 RX Delay -95 -> 252, step: 8
1634 23:01:04.470884
1635 23:01:04.474355 Set Vref, RX VrefLevel [Byte0]: 32
1636 23:01:04.477754 [Byte1]: 32
1637 23:01:04.477859
1638 23:01:04.480984 Set Vref, RX VrefLevel [Byte0]: 33
1639 23:01:04.484494 [Byte1]: 33
1640 23:01:04.488480
1641 23:01:04.488563 Set Vref, RX VrefLevel [Byte0]: 34
1642 23:01:04.491413 [Byte1]: 34
1643 23:01:04.496030
1644 23:01:04.496114 Set Vref, RX VrefLevel [Byte0]: 35
1645 23:01:04.498981 [Byte1]: 35
1646 23:01:04.503194
1647 23:01:04.503318 Set Vref, RX VrefLevel [Byte0]: 36
1648 23:01:04.506753 [Byte1]: 36
1649 23:01:04.510668
1650 23:01:04.514343 Set Vref, RX VrefLevel [Byte0]: 37
1651 23:01:04.514427 [Byte1]: 37
1652 23:01:04.518677
1653 23:01:04.518759 Set Vref, RX VrefLevel [Byte0]: 38
1654 23:01:04.522065 [Byte1]: 38
1655 23:01:04.526033
1656 23:01:04.526115 Set Vref, RX VrefLevel [Byte0]: 39
1657 23:01:04.529561 [Byte1]: 39
1658 23:01:04.533737
1659 23:01:04.533819 Set Vref, RX VrefLevel [Byte0]: 40
1660 23:01:04.536817 [Byte1]: 40
1661 23:01:04.541218
1662 23:01:04.541319 Set Vref, RX VrefLevel [Byte0]: 41
1663 23:01:04.547836 [Byte1]: 41
1664 23:01:04.547919
1665 23:01:04.550959 Set Vref, RX VrefLevel [Byte0]: 42
1666 23:01:04.554398 [Byte1]: 42
1667 23:01:04.554480
1668 23:01:04.558095 Set Vref, RX VrefLevel [Byte0]: 43
1669 23:01:04.561067 [Byte1]: 43
1670 23:01:04.561150
1671 23:01:04.564678 Set Vref, RX VrefLevel [Byte0]: 44
1672 23:01:04.567721 [Byte1]: 44
1673 23:01:04.571581
1674 23:01:04.571696 Set Vref, RX VrefLevel [Byte0]: 45
1675 23:01:04.575106 [Byte1]: 45
1676 23:01:04.579084
1677 23:01:04.579169 Set Vref, RX VrefLevel [Byte0]: 46
1678 23:01:04.582717 [Byte1]: 46
1679 23:01:04.587024
1680 23:01:04.587118 Set Vref, RX VrefLevel [Byte0]: 47
1681 23:01:04.590243 [Byte1]: 47
1682 23:01:04.594621
1683 23:01:04.594701 Set Vref, RX VrefLevel [Byte0]: 48
1684 23:01:04.597921 [Byte1]: 48
1685 23:01:04.602079
1686 23:01:04.602159 Set Vref, RX VrefLevel [Byte0]: 49
1687 23:01:04.605524 [Byte1]: 49
1688 23:01:04.609774
1689 23:01:04.609864 Set Vref, RX VrefLevel [Byte0]: 50
1690 23:01:04.613150 [Byte1]: 50
1691 23:01:04.617508
1692 23:01:04.617592 Set Vref, RX VrefLevel [Byte0]: 51
1693 23:01:04.620975 [Byte1]: 51
1694 23:01:04.624773
1695 23:01:04.624872 Set Vref, RX VrefLevel [Byte0]: 52
1696 23:01:04.628416 [Byte1]: 52
1697 23:01:04.632458
1698 23:01:04.632542 Set Vref, RX VrefLevel [Byte0]: 53
1699 23:01:04.635887 [Byte1]: 53
1700 23:01:04.640406
1701 23:01:04.640512 Set Vref, RX VrefLevel [Byte0]: 54
1702 23:01:04.646609 [Byte1]: 54
1703 23:01:04.646703
1704 23:01:04.649946 Set Vref, RX VrefLevel [Byte0]: 55
1705 23:01:04.653404 [Byte1]: 55
1706 23:01:04.653497
1707 23:01:04.656788 Set Vref, RX VrefLevel [Byte0]: 56
1708 23:01:04.660436 [Byte1]: 56
1709 23:01:04.660526
1710 23:01:04.663415 Set Vref, RX VrefLevel [Byte0]: 57
1711 23:01:04.666508 [Byte1]: 57
1712 23:01:04.670776
1713 23:01:04.670865 Set Vref, RX VrefLevel [Byte0]: 58
1714 23:01:04.673861 [Byte1]: 58
1715 23:01:04.678354
1716 23:01:04.678439 Set Vref, RX VrefLevel [Byte0]: 59
1717 23:01:04.681520 [Byte1]: 59
1718 23:01:04.685603
1719 23:01:04.685700 Set Vref, RX VrefLevel [Byte0]: 60
1720 23:01:04.688787 [Byte1]: 60
1721 23:01:04.693633
1722 23:01:04.694103 Set Vref, RX VrefLevel [Byte0]: 61
1723 23:01:04.697112 [Byte1]: 61
1724 23:01:04.701541
1725 23:01:04.701994 Set Vref, RX VrefLevel [Byte0]: 62
1726 23:01:04.704715 [Byte1]: 62
1727 23:01:04.708907
1728 23:01:04.709444 Set Vref, RX VrefLevel [Byte0]: 63
1729 23:01:04.712363 [Byte1]: 63
1730 23:01:04.716401
1731 23:01:04.716989 Set Vref, RX VrefLevel [Byte0]: 64
1732 23:01:04.719795 [Byte1]: 64
1733 23:01:04.724099
1734 23:01:04.724668 Set Vref, RX VrefLevel [Byte0]: 65
1735 23:01:04.727533 [Byte1]: 65
1736 23:01:04.731645
1737 23:01:04.732202 Set Vref, RX VrefLevel [Byte0]: 66
1738 23:01:04.735274 [Byte1]: 66
1739 23:01:04.739606
1740 23:01:04.740048 Set Vref, RX VrefLevel [Byte0]: 67
1741 23:01:04.742433 [Byte1]: 67
1742 23:01:04.746695
1743 23:01:04.747139 Set Vref, RX VrefLevel [Byte0]: 68
1744 23:01:04.749947 [Byte1]: 68
1745 23:01:04.754379
1746 23:01:04.754852 Set Vref, RX VrefLevel [Byte0]: 69
1747 23:01:04.757841 [Byte1]: 69
1748 23:01:04.762360
1749 23:01:04.762835 Set Vref, RX VrefLevel [Byte0]: 70
1750 23:01:04.765263 [Byte1]: 70
1751 23:01:04.769637
1752 23:01:04.770067 Set Vref, RX VrefLevel [Byte0]: 71
1753 23:01:04.773145 [Byte1]: 71
1754 23:01:04.777143
1755 23:01:04.777589 Set Vref, RX VrefLevel [Byte0]: 72
1756 23:01:04.780658 [Byte1]: 72
1757 23:01:04.785166
1758 23:01:04.785606 Set Vref, RX VrefLevel [Byte0]: 73
1759 23:01:04.788421 [Byte1]: 73
1760 23:01:04.792367
1761 23:01:04.792861 Set Vref, RX VrefLevel [Byte0]: 74
1762 23:01:04.795551 [Byte1]: 74
1763 23:01:04.800503
1764 23:01:04.801191 Set Vref, RX VrefLevel [Byte0]: 75
1765 23:01:04.803645 [Byte1]: 75
1766 23:01:04.807725
1767 23:01:04.808316 Set Vref, RX VrefLevel [Byte0]: 76
1768 23:01:04.810835 [Byte1]: 76
1769 23:01:04.815465
1770 23:01:04.816070 Final RX Vref Byte 0 = 52 to rank0
1771 23:01:04.818978 Final RX Vref Byte 1 = 62 to rank0
1772 23:01:04.822208 Final RX Vref Byte 0 = 52 to rank1
1773 23:01:04.825423 Final RX Vref Byte 1 = 62 to rank1==
1774 23:01:04.828814 Dram Type= 6, Freq= 0, CH_1, rank 0
1775 23:01:04.835865 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1776 23:01:04.836461 ==
1777 23:01:04.836875 DQS Delay:
1778 23:01:04.837229 DQS0 = 0, DQS1 = 0
1779 23:01:04.838414 DQM Delay:
1780 23:01:04.838879 DQM0 = 93, DQM1 = 83
1781 23:01:04.842046 DQ Delay:
1782 23:01:04.845344 DQ0 =96, DQ1 =88, DQ2 =84, DQ3 =88
1783 23:01:04.848323 DQ4 =92, DQ5 =108, DQ6 =100, DQ7 =88
1784 23:01:04.851635 DQ8 =72, DQ9 =72, DQ10 =88, DQ11 =76
1785 23:01:04.854861 DQ12 =96, DQ13 =88, DQ14 =88, DQ15 =88
1786 23:01:04.855476
1787 23:01:04.856005
1788 23:01:04.862050 [DQSOSCAuto] RK0, (LSB)MR18= 0x2f4c, (MSB)MR19= 0x606, tDQSOscB0 = 390 ps tDQSOscB1 = 397 ps
1789 23:01:04.865082 CH1 RK0: MR19=606, MR18=2F4C
1790 23:01:04.871388 CH1_RK0: MR19=0x606, MR18=0x2F4C, DQSOSC=390, MR23=63, INC=97, DEC=64
1791 23:01:04.871941
1792 23:01:04.874889 ----->DramcWriteLeveling(PI) begin...
1793 23:01:04.875514 ==
1794 23:01:04.878422 Dram Type= 6, Freq= 0, CH_1, rank 1
1795 23:01:04.881777 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1796 23:01:04.882281 ==
1797 23:01:04.884670 Write leveling (Byte 0): 26 => 26
1798 23:01:04.888236 Write leveling (Byte 1): 31 => 31
1799 23:01:04.891486 DramcWriteLeveling(PI) end<-----
1800 23:01:04.892002
1801 23:01:04.892386 ==
1802 23:01:04.894667 Dram Type= 6, Freq= 0, CH_1, rank 1
1803 23:01:04.898347 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1804 23:01:04.898833 ==
1805 23:01:04.901360 [Gating] SW mode calibration
1806 23:01:04.908155 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1807 23:01:04.915072 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1808 23:01:04.918435 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1809 23:01:04.925413 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
1810 23:01:04.928291 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1811 23:01:04.931601 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1812 23:01:04.935257 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1813 23:01:04.941574 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1814 23:01:04.945003 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1815 23:01:04.948506 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1816 23:01:04.954852 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1817 23:01:04.958017 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1818 23:01:04.961533 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1819 23:01:04.967765 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1820 23:01:04.971139 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1821 23:01:04.974537 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1822 23:01:04.981023 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1823 23:01:04.984483 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1824 23:01:04.987436 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 1) (0 1)
1825 23:01:04.994250 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 1)
1826 23:01:04.997531 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1827 23:01:05.001198 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1828 23:01:05.007609 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1829 23:01:05.010854 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1830 23:01:05.014112 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1831 23:01:05.020863 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1832 23:01:05.023982 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1833 23:01:05.027875 0 9 4 | B1->B0 | 2828 2323 | 1 1 | (0 0) (0 0)
1834 23:01:05.034370 0 9 8 | B1->B0 | 3434 3232 | 1 1 | (1 1) (1 1)
1835 23:01:05.037598 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1836 23:01:05.041062 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1837 23:01:05.047948 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1838 23:01:05.051378 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1839 23:01:05.054316 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1840 23:01:05.060933 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1841 23:01:05.064242 0 10 4 | B1->B0 | 2e2e 3030 | 0 0 | (1 1) (1 1)
1842 23:01:05.067840 0 10 8 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)
1843 23:01:05.074114 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1844 23:01:05.077543 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1845 23:01:05.081126 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1846 23:01:05.087637 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1847 23:01:05.091199 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1848 23:01:05.093833 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1849 23:01:05.100963 0 11 4 | B1->B0 | 3434 2f2f | 0 0 | (0 0) (0 0)
1850 23:01:05.104130 0 11 8 | B1->B0 | 4646 3b3b | 0 0 | (0 0) (0 0)
1851 23:01:05.107351 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1852 23:01:05.113867 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1853 23:01:05.117427 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1854 23:01:05.120752 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1855 23:01:05.123815 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1856 23:01:05.130502 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1857 23:01:05.134150 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1858 23:01:05.137057 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1859 23:01:05.144292 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1860 23:01:05.147113 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1861 23:01:05.150894 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1862 23:01:05.157180 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1863 23:01:05.160819 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1864 23:01:05.164122 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1865 23:01:05.170795 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1866 23:01:05.173490 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1867 23:01:05.177175 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1868 23:01:05.183924 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1869 23:01:05.187063 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1870 23:01:05.190506 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1871 23:01:05.197226 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1872 23:01:05.200300 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
1873 23:01:05.203671 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1874 23:01:05.210022 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1875 23:01:05.210592 Total UI for P1: 0, mck2ui 16
1876 23:01:05.216739 best dqsien dly found for B0: ( 0, 14, 4)
1877 23:01:05.217230 Total UI for P1: 0, mck2ui 16
1878 23:01:05.219780 best dqsien dly found for B1: ( 0, 14, 2)
1879 23:01:05.226630 best DQS0 dly(MCK, UI, PI) = (0, 14, 4)
1880 23:01:05.229974 best DQS1 dly(MCK, UI, PI) = (0, 14, 2)
1881 23:01:05.230432
1882 23:01:05.233533 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 4)
1883 23:01:05.236555 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 2)
1884 23:01:05.239647 [Gating] SW calibration Done
1885 23:01:05.240090 ==
1886 23:01:05.243350 Dram Type= 6, Freq= 0, CH_1, rank 1
1887 23:01:05.246604 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1888 23:01:05.247080 ==
1889 23:01:05.249962 RX Vref Scan: 0
1890 23:01:05.250392
1891 23:01:05.250735 RX Vref 0 -> 0, step: 1
1892 23:01:05.251060
1893 23:01:05.253200 RX Delay -130 -> 252, step: 16
1894 23:01:05.256624 iDelay=206, Bit 0, Center 93 (-18 ~ 205) 224
1895 23:01:05.263469 iDelay=206, Bit 1, Center 85 (-18 ~ 189) 208
1896 23:01:05.266909 iDelay=206, Bit 2, Center 77 (-34 ~ 189) 224
1897 23:01:05.269878 iDelay=206, Bit 3, Center 93 (-18 ~ 205) 224
1898 23:01:05.273071 iDelay=206, Bit 4, Center 93 (-18 ~ 205) 224
1899 23:01:05.276552 iDelay=206, Bit 5, Center 101 (-2 ~ 205) 208
1900 23:01:05.279847 iDelay=206, Bit 6, Center 93 (-18 ~ 205) 224
1901 23:01:05.287182 iDelay=206, Bit 7, Center 85 (-18 ~ 189) 208
1902 23:01:05.289920 iDelay=206, Bit 8, Center 61 (-50 ~ 173) 224
1903 23:01:05.293381 iDelay=206, Bit 9, Center 77 (-34 ~ 189) 224
1904 23:01:05.296685 iDelay=206, Bit 10, Center 85 (-34 ~ 205) 240
1905 23:01:05.300438 iDelay=206, Bit 11, Center 77 (-34 ~ 189) 224
1906 23:01:05.306622 iDelay=206, Bit 12, Center 93 (-18 ~ 205) 224
1907 23:01:05.309861 iDelay=206, Bit 13, Center 93 (-18 ~ 205) 224
1908 23:01:05.313213 iDelay=206, Bit 14, Center 85 (-34 ~ 205) 240
1909 23:01:05.316914 iDelay=206, Bit 15, Center 93 (-18 ~ 205) 224
1910 23:01:05.320198 ==
1911 23:01:05.320835 Dram Type= 6, Freq= 0, CH_1, rank 1
1912 23:01:05.326354 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1913 23:01:05.326939 ==
1914 23:01:05.327323 DQS Delay:
1915 23:01:05.329843 DQS0 = 0, DQS1 = 0
1916 23:01:05.330318 DQM Delay:
1917 23:01:05.333012 DQM0 = 90, DQM1 = 83
1918 23:01:05.333487 DQ Delay:
1919 23:01:05.336149 DQ0 =93, DQ1 =85, DQ2 =77, DQ3 =93
1920 23:01:05.339483 DQ4 =93, DQ5 =101, DQ6 =93, DQ7 =85
1921 23:01:05.342832 DQ8 =61, DQ9 =77, DQ10 =85, DQ11 =77
1922 23:01:05.345911 DQ12 =93, DQ13 =93, DQ14 =85, DQ15 =93
1923 23:01:05.346562
1924 23:01:05.347101
1925 23:01:05.347654 ==
1926 23:01:05.349214 Dram Type= 6, Freq= 0, CH_1, rank 1
1927 23:01:05.352993 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1928 23:01:05.353473 ==
1929 23:01:05.353854
1930 23:01:05.354205
1931 23:01:05.356277 TX Vref Scan disable
1932 23:01:05.359623 == TX Byte 0 ==
1933 23:01:05.362719 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
1934 23:01:05.366053 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
1935 23:01:05.369331 == TX Byte 1 ==
1936 23:01:05.372867 Update DQ dly =582 (2 ,1, 38) DQ OEN =(1 ,6)
1937 23:01:05.375936 Update DQM dly =582 (2 ,1, 38) DQM OEN =(1 ,6)
1938 23:01:05.376410 ==
1939 23:01:05.379193 Dram Type= 6, Freq= 0, CH_1, rank 1
1940 23:01:05.383024 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1941 23:01:05.386366 ==
1942 23:01:05.397643 TX Vref=22, minBit 13, minWin=27, winSum=452
1943 23:01:05.401324 TX Vref=24, minBit 8, minWin=27, winSum=454
1944 23:01:05.404449 TX Vref=26, minBit 8, minWin=27, winSum=456
1945 23:01:05.408183 TX Vref=28, minBit 8, minWin=28, winSum=462
1946 23:01:05.411402 TX Vref=30, minBit 8, minWin=28, winSum=461
1947 23:01:05.418029 TX Vref=32, minBit 8, minWin=28, winSum=462
1948 23:01:05.421395 [TxChooseVref] Worse bit 8, Min win 28, Win sum 462, Final Vref 28
1949 23:01:05.421998
1950 23:01:05.424703 Final TX Range 1 Vref 28
1951 23:01:05.425333
1952 23:01:05.425717 ==
1953 23:01:05.427729 Dram Type= 6, Freq= 0, CH_1, rank 1
1954 23:01:05.431016 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1955 23:01:05.431561 ==
1956 23:01:05.434497
1957 23:01:05.435141
1958 23:01:05.435533 TX Vref Scan disable
1959 23:01:05.437963 == TX Byte 0 ==
1960 23:01:05.441070 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
1961 23:01:05.447797 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
1962 23:01:05.448371 == TX Byte 1 ==
1963 23:01:05.451383 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
1964 23:01:05.457650 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
1965 23:01:05.458147
1966 23:01:05.458524 [DATLAT]
1967 23:01:05.458873 Freq=800, CH1 RK1
1968 23:01:05.459226
1969 23:01:05.460875 DATLAT Default: 0xa
1970 23:01:05.461305 0, 0xFFFF, sum = 0
1971 23:01:05.464227 1, 0xFFFF, sum = 0
1972 23:01:05.464676 2, 0xFFFF, sum = 0
1973 23:01:05.467739 3, 0xFFFF, sum = 0
1974 23:01:05.471044 4, 0xFFFF, sum = 0
1975 23:01:05.471535 5, 0xFFFF, sum = 0
1976 23:01:05.474406 6, 0xFFFF, sum = 0
1977 23:01:05.474914 7, 0xFFFF, sum = 0
1978 23:01:05.477894 8, 0xFFFF, sum = 0
1979 23:01:05.478559 9, 0x0, sum = 1
1980 23:01:05.479073 10, 0x0, sum = 2
1981 23:01:05.481047 11, 0x0, sum = 3
1982 23:01:05.481501 12, 0x0, sum = 4
1983 23:01:05.484375 best_step = 10
1984 23:01:05.484951
1985 23:01:05.485322 ==
1986 23:01:05.487709 Dram Type= 6, Freq= 0, CH_1, rank 1
1987 23:01:05.491252 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1988 23:01:05.491827 ==
1989 23:01:05.494292 RX Vref Scan: 0
1990 23:01:05.494819
1991 23:01:05.495375 RX Vref 0 -> 0, step: 1
1992 23:01:05.495896
1993 23:01:05.497647 RX Delay -95 -> 252, step: 8
1994 23:01:05.504458 iDelay=209, Bit 0, Center 96 (-7 ~ 200) 208
1995 23:01:05.507270 iDelay=209, Bit 1, Center 88 (-15 ~ 192) 208
1996 23:01:05.510865 iDelay=209, Bit 2, Center 80 (-23 ~ 184) 208
1997 23:01:05.514430 iDelay=209, Bit 3, Center 88 (-15 ~ 192) 208
1998 23:01:05.517278 iDelay=209, Bit 4, Center 96 (-7 ~ 200) 208
1999 23:01:05.524112 iDelay=209, Bit 5, Center 108 (9 ~ 208) 200
2000 23:01:05.527612 iDelay=209, Bit 6, Center 96 (-7 ~ 200) 208
2001 23:01:05.530959 iDelay=209, Bit 7, Center 88 (-15 ~ 192) 208
2002 23:01:05.534047 iDelay=209, Bit 8, Center 68 (-39 ~ 176) 216
2003 23:01:05.537333 iDelay=209, Bit 9, Center 76 (-31 ~ 184) 216
2004 23:01:05.544245 iDelay=209, Bit 10, Center 84 (-23 ~ 192) 216
2005 23:01:05.547244 iDelay=209, Bit 11, Center 80 (-31 ~ 192) 224
2006 23:01:05.550541 iDelay=209, Bit 12, Center 92 (-15 ~ 200) 216
2007 23:01:05.553808 iDelay=209, Bit 13, Center 92 (-15 ~ 200) 216
2008 23:01:05.557334 iDelay=209, Bit 14, Center 88 (-23 ~ 200) 224
2009 23:01:05.563778 iDelay=209, Bit 15, Center 96 (-15 ~ 208) 224
2010 23:01:05.563861 ==
2011 23:01:05.567144 Dram Type= 6, Freq= 0, CH_1, rank 1
2012 23:01:05.570550 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2013 23:01:05.570634 ==
2014 23:01:05.570700 DQS Delay:
2015 23:01:05.573422 DQS0 = 0, DQS1 = 0
2016 23:01:05.573504 DQM Delay:
2017 23:01:05.576990 DQM0 = 92, DQM1 = 84
2018 23:01:05.577072 DQ Delay:
2019 23:01:05.580428 DQ0 =96, DQ1 =88, DQ2 =80, DQ3 =88
2020 23:01:05.583762 DQ4 =96, DQ5 =108, DQ6 =96, DQ7 =88
2021 23:01:05.587086 DQ8 =68, DQ9 =76, DQ10 =84, DQ11 =80
2022 23:01:05.590462 DQ12 =92, DQ13 =92, DQ14 =88, DQ15 =96
2023 23:01:05.590546
2024 23:01:05.590612
2025 23:01:05.600228 [DQSOSCAuto] RK1, (LSB)MR18= 0x3b11, (MSB)MR19= 0x606, tDQSOscB0 = 405 ps tDQSOscB1 = 394 ps
2026 23:01:05.600314 CH1 RK1: MR19=606, MR18=3B11
2027 23:01:05.606649 CH1_RK1: MR19=0x606, MR18=0x3B11, DQSOSC=394, MR23=63, INC=95, DEC=63
2028 23:01:05.610098 [RxdqsGatingPostProcess] freq 800
2029 23:01:05.616953 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
2030 23:01:05.619869 Pre-setting of DQS Precalculation
2031 23:01:05.623253 [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10
2032 23:01:05.630165 sync_frequency_calibration_params sync calibration params of frequency 800 to shu:4
2033 23:01:05.640070 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
2034 23:01:05.640155
2035 23:01:05.640220
2036 23:01:05.640281 [Calibration Summary] 1600 Mbps
2037 23:01:05.643370 CH 0, Rank 0
2038 23:01:05.643454 SW Impedance : PASS
2039 23:01:05.646826 DUTY Scan : NO K
2040 23:01:05.649872 ZQ Calibration : PASS
2041 23:01:05.649955 Jitter Meter : NO K
2042 23:01:05.653188 CBT Training : PASS
2043 23:01:05.656441 Write leveling : PASS
2044 23:01:05.656524 RX DQS gating : PASS
2045 23:01:05.660068 RX DQ/DQS(RDDQC) : PASS
2046 23:01:05.663221 TX DQ/DQS : PASS
2047 23:01:05.663306 RX DATLAT : PASS
2048 23:01:05.666417 RX DQ/DQS(Engine): PASS
2049 23:01:05.669829 TX OE : NO K
2050 23:01:05.669913 All Pass.
2051 23:01:05.669979
2052 23:01:05.670040 CH 0, Rank 1
2053 23:01:05.673044 SW Impedance : PASS
2054 23:01:05.676389 DUTY Scan : NO K
2055 23:01:05.676472 ZQ Calibration : PASS
2056 23:01:05.679450 Jitter Meter : NO K
2057 23:01:05.682840 CBT Training : PASS
2058 23:01:05.682922 Write leveling : PASS
2059 23:01:05.686317 RX DQS gating : PASS
2060 23:01:05.689553 RX DQ/DQS(RDDQC) : PASS
2061 23:01:05.689637 TX DQ/DQS : PASS
2062 23:01:05.693012 RX DATLAT : PASS
2063 23:01:05.693096 RX DQ/DQS(Engine): PASS
2064 23:01:05.696368 TX OE : NO K
2065 23:01:05.696452 All Pass.
2066 23:01:05.696518
2067 23:01:05.699864 CH 1, Rank 0
2068 23:01:05.699948 SW Impedance : PASS
2069 23:01:05.702851 DUTY Scan : NO K
2070 23:01:05.706216 ZQ Calibration : PASS
2071 23:01:05.706300 Jitter Meter : NO K
2072 23:01:05.709525 CBT Training : PASS
2073 23:01:05.712871 Write leveling : PASS
2074 23:01:05.712954 RX DQS gating : PASS
2075 23:01:05.716340 RX DQ/DQS(RDDQC) : PASS
2076 23:01:05.719353 TX DQ/DQS : PASS
2077 23:01:05.719437 RX DATLAT : PASS
2078 23:01:05.722736 RX DQ/DQS(Engine): PASS
2079 23:01:05.726151 TX OE : NO K
2080 23:01:05.726235 All Pass.
2081 23:01:05.726301
2082 23:01:05.726363 CH 1, Rank 1
2083 23:01:05.729514 SW Impedance : PASS
2084 23:01:05.732913 DUTY Scan : NO K
2085 23:01:05.732997 ZQ Calibration : PASS
2086 23:01:05.736038 Jitter Meter : NO K
2087 23:01:05.739379 CBT Training : PASS
2088 23:01:05.739463 Write leveling : PASS
2089 23:01:05.742739 RX DQS gating : PASS
2090 23:01:05.745895 RX DQ/DQS(RDDQC) : PASS
2091 23:01:05.745978 TX DQ/DQS : PASS
2092 23:01:05.749157 RX DATLAT : PASS
2093 23:01:05.752352 RX DQ/DQS(Engine): PASS
2094 23:01:05.752436 TX OE : NO K
2095 23:01:05.752502 All Pass.
2096 23:01:05.752563
2097 23:01:05.755889 DramC Write-DBI off
2098 23:01:05.759155 PER_BANK_REFRESH: Hybrid Mode
2099 23:01:05.759239 TX_TRACKING: ON
2100 23:01:05.762622 [GetDramInforAfterCalByMRR] Vendor 6.
2101 23:01:05.766011 [GetDramInforAfterCalByMRR] Revision 606.
2102 23:01:05.780036 [GetDramInforAfterCalByMRR] Revision 2 0.
2103 23:01:05.780143 MR0 0x3b3b
2104 23:01:05.780227 MR8 0x5151
2105 23:01:05.780305 RK0, DieNum 2, Density 16Gb, RKsize 32Gb.
2106 23:01:05.780382
2107 23:01:05.780455 MR0 0x3b3b
2108 23:01:05.780527 MR8 0x5151
2109 23:01:05.782193 RK1, DieNum 2, Density 16Gb, RKsize 32Gb.
2110 23:01:05.782298
2111 23:01:05.792194 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
2112 23:01:05.795774 [FAST_K] Save calibration result to emmc
2113 23:01:05.799165 [FAST_K] Save calibration result to emmc
2114 23:01:05.802869 dram_init: config_dvfs: 1
2115 23:01:05.805819 dramc_set_vcore_voltage set vcore to 662500
2116 23:01:05.809170 Read voltage for 1200, 2
2117 23:01:05.809353 Vio18 = 0
2118 23:01:05.809494 Vcore = 662500
2119 23:01:05.812689 Vdram = 0
2120 23:01:05.812916 Vddq = 0
2121 23:01:05.813083 Vmddr = 0
2122 23:01:05.819116 [FAST_K] DramcSave_Time_For_Cal_Init SHU5, femmc_Ready=0
2123 23:01:05.822489 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
2124 23:01:05.825763 MEM_TYPE=3, freq_sel=15
2125 23:01:05.829239 sv_algorithm_assistance_LP4_1600
2126 23:01:05.832456 ============ PULL DRAM RESETB DOWN ============
2127 23:01:05.835924 ========== PULL DRAM RESETB DOWN end =========
2128 23:01:05.842324 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2129 23:01:05.845671 ===================================
2130 23:01:05.846185 LPDDR4 DRAM CONFIGURATION
2131 23:01:05.848989 ===================================
2132 23:01:05.852406 EX_ROW_EN[0] = 0x0
2133 23:01:05.855569 EX_ROW_EN[1] = 0x0
2134 23:01:05.856081 LP4Y_EN = 0x0
2135 23:01:05.859068 WORK_FSP = 0x0
2136 23:01:05.859494 WL = 0x4
2137 23:01:05.862181 RL = 0x4
2138 23:01:05.862607 BL = 0x2
2139 23:01:05.866061 RPST = 0x0
2140 23:01:05.866489 RD_PRE = 0x0
2141 23:01:05.868873 WR_PRE = 0x1
2142 23:01:05.869353 WR_PST = 0x0
2143 23:01:05.872225 DBI_WR = 0x0
2144 23:01:05.872660 DBI_RD = 0x0
2145 23:01:05.875719 OTF = 0x1
2146 23:01:05.878948 ===================================
2147 23:01:05.882084 ===================================
2148 23:01:05.882515 ANA top config
2149 23:01:05.885513 ===================================
2150 23:01:05.888703 DLL_ASYNC_EN = 0
2151 23:01:05.892271 ALL_SLAVE_EN = 0
2152 23:01:05.892697 NEW_RANK_MODE = 1
2153 23:01:05.895572 DLL_IDLE_MODE = 1
2154 23:01:05.898930 LP45_APHY_COMB_EN = 1
2155 23:01:05.902065 TX_ODT_DIS = 1
2156 23:01:05.905400 NEW_8X_MODE = 1
2157 23:01:05.908668 ===================================
2158 23:01:05.911907 ===================================
2159 23:01:05.912096 data_rate = 2400
2160 23:01:05.915169 CKR = 1
2161 23:01:05.918454 DQ_P2S_RATIO = 8
2162 23:01:05.921732 ===================================
2163 23:01:05.925150 CA_P2S_RATIO = 8
2164 23:01:05.928436 DQ_CA_OPEN = 0
2165 23:01:05.931829 DQ_SEMI_OPEN = 0
2166 23:01:05.931935 CA_SEMI_OPEN = 0
2167 23:01:05.935176 CA_FULL_RATE = 0
2168 23:01:05.938034 DQ_CKDIV4_EN = 0
2169 23:01:05.941417 CA_CKDIV4_EN = 0
2170 23:01:05.944725 CA_PREDIV_EN = 0
2171 23:01:05.948002 PH8_DLY = 17
2172 23:01:05.948086 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
2173 23:01:05.951420 DQ_AAMCK_DIV = 4
2174 23:01:05.955140 CA_AAMCK_DIV = 4
2175 23:01:05.958299 CA_ADMCK_DIV = 4
2176 23:01:05.961523 DQ_TRACK_CA_EN = 0
2177 23:01:05.965211 CA_PICK = 1200
2178 23:01:05.968120 CA_MCKIO = 1200
2179 23:01:05.968205 MCKIO_SEMI = 0
2180 23:01:05.971288 PLL_FREQ = 2366
2181 23:01:05.975048 DQ_UI_PI_RATIO = 32
2182 23:01:05.978185 CA_UI_PI_RATIO = 0
2183 23:01:05.981278 ===================================
2184 23:01:05.984787 ===================================
2185 23:01:05.988029 memory_type:LPDDR4
2186 23:01:05.988114 GP_NUM : 10
2187 23:01:05.991093 SRAM_EN : 1
2188 23:01:05.994700 MD32_EN : 0
2189 23:01:05.998066 ===================================
2190 23:01:05.998153 [ANA_INIT] >>>>>>>>>>>>>>
2191 23:01:06.001412 <<<<<< [CONFIGURE PHASE]: ANA_TX
2192 23:01:06.004654 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
2193 23:01:06.007938 ===================================
2194 23:01:06.011317 data_rate = 2400,PCW = 0X5b00
2195 23:01:06.014672 ===================================
2196 23:01:06.018022 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
2197 23:01:06.024701 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2198 23:01:06.028057 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2199 23:01:06.034503 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
2200 23:01:06.037778 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
2201 23:01:06.041077 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
2202 23:01:06.041276 [ANA_INIT] flow start
2203 23:01:06.044423 [ANA_INIT] PLL >>>>>>>>
2204 23:01:06.047788 [ANA_INIT] PLL <<<<<<<<
2205 23:01:06.051147 [ANA_INIT] MIDPI >>>>>>>>
2206 23:01:06.051355 [ANA_INIT] MIDPI <<<<<<<<
2207 23:01:06.054733 [ANA_INIT] DLL >>>>>>>>
2208 23:01:06.057967 [ANA_INIT] DLL <<<<<<<<
2209 23:01:06.058257 [ANA_INIT] flow end
2210 23:01:06.061489 ============ LP4 DIFF to SE enter ============
2211 23:01:06.068111 ============ LP4 DIFF to SE exit ============
2212 23:01:06.068639 [ANA_INIT] <<<<<<<<<<<<<
2213 23:01:06.071345 [Flow] Enable top DCM control >>>>>
2214 23:01:06.074753 [Flow] Enable top DCM control <<<<<
2215 23:01:06.077842 Enable DLL master slave shuffle
2216 23:01:06.084476 ==============================================================
2217 23:01:06.084961 Gating Mode config
2218 23:01:06.091510 ==============================================================
2219 23:01:06.094527 Config description:
2220 23:01:06.104857 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
2221 23:01:06.111598 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
2222 23:01:06.114797 SELPH_MODE 0: By rank 1: By Phase
2223 23:01:06.120937 ==============================================================
2224 23:01:06.124209 GAT_TRACK_EN = 1
2225 23:01:06.127585 RX_GATING_MODE = 2
2226 23:01:06.128027 RX_GATING_TRACK_MODE = 2
2227 23:01:06.130912 SELPH_MODE = 1
2228 23:01:06.134324 PICG_EARLY_EN = 1
2229 23:01:06.137733 VALID_LAT_VALUE = 1
2230 23:01:06.144332 ==============================================================
2231 23:01:06.147613 Enter into Gating configuration >>>>
2232 23:01:06.151020 Exit from Gating configuration <<<<
2233 23:01:06.154284 Enter into DVFS_PRE_config >>>>>
2234 23:01:06.164458 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
2235 23:01:06.167635 Exit from DVFS_PRE_config <<<<<
2236 23:01:06.171321 Enter into PICG configuration >>>>
2237 23:01:06.174107 Exit from PICG configuration <<<<
2238 23:01:06.177364 [RX_INPUT] configuration >>>>>
2239 23:01:06.180846 [RX_INPUT] configuration <<<<<
2240 23:01:06.184271 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
2241 23:01:06.191223 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
2242 23:01:06.196921 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
2243 23:01:06.203678 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
2244 23:01:06.206765 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
2245 23:01:06.213701 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
2246 23:01:06.216943 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
2247 23:01:06.223570 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
2248 23:01:06.227003 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
2249 23:01:06.229990 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
2250 23:01:06.233450 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
2251 23:01:06.240296 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2252 23:01:06.243636 ===================================
2253 23:01:06.243826 LPDDR4 DRAM CONFIGURATION
2254 23:01:06.247141 ===================================
2255 23:01:06.250389 EX_ROW_EN[0] = 0x0
2256 23:01:06.253878 EX_ROW_EN[1] = 0x0
2257 23:01:06.254065 LP4Y_EN = 0x0
2258 23:01:06.257370 WORK_FSP = 0x0
2259 23:01:06.257556 WL = 0x4
2260 23:01:06.260276 RL = 0x4
2261 23:01:06.260474 BL = 0x2
2262 23:01:06.264195 RPST = 0x0
2263 23:01:06.264403 RD_PRE = 0x0
2264 23:01:06.267408 WR_PRE = 0x1
2265 23:01:06.267619 WR_PST = 0x0
2266 23:01:06.270377 DBI_WR = 0x0
2267 23:01:06.270606 DBI_RD = 0x0
2268 23:01:06.273727 OTF = 0x1
2269 23:01:06.276860 ===================================
2270 23:01:06.280193 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
2271 23:01:06.283228 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
2272 23:01:06.290479 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2273 23:01:06.293398 ===================================
2274 23:01:06.293886 LPDDR4 DRAM CONFIGURATION
2275 23:01:06.297047 ===================================
2276 23:01:06.300085 EX_ROW_EN[0] = 0x10
2277 23:01:06.303494 EX_ROW_EN[1] = 0x0
2278 23:01:06.304085 LP4Y_EN = 0x0
2279 23:01:06.307049 WORK_FSP = 0x0
2280 23:01:06.307631 WL = 0x4
2281 23:01:06.310211 RL = 0x4
2282 23:01:06.310695 BL = 0x2
2283 23:01:06.313515 RPST = 0x0
2284 23:01:06.314000 RD_PRE = 0x0
2285 23:01:06.316796 WR_PRE = 0x1
2286 23:01:06.317284 WR_PST = 0x0
2287 23:01:06.320276 DBI_WR = 0x0
2288 23:01:06.320901 DBI_RD = 0x0
2289 23:01:06.323466 OTF = 0x1
2290 23:01:06.326832 ===================================
2291 23:01:06.333317 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
2292 23:01:06.333884 ==
2293 23:01:06.336695 Dram Type= 6, Freq= 0, CH_0, rank 0
2294 23:01:06.339887 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2295 23:01:06.340404 ==
2296 23:01:06.343282 [Duty_Offset_Calibration]
2297 23:01:06.343775 B0:2 B1:0 CA:1
2298 23:01:06.344219
2299 23:01:06.346602 [DutyScan_Calibration_Flow] k_type=0
2300 23:01:06.355980
2301 23:01:06.356368 ==CLK 0==
2302 23:01:06.359204 Final CLK duty delay cell = -4
2303 23:01:06.362677 [-4] MAX Duty = 5031%(X100), DQS PI = 26
2304 23:01:06.365905 [-4] MIN Duty = 4875%(X100), DQS PI = 0
2305 23:01:06.369165 [-4] AVG Duty = 4953%(X100)
2306 23:01:06.369246
2307 23:01:06.372612 CH0 CLK Duty spec in!! Max-Min= 156%
2308 23:01:06.375984 [DutyScan_Calibration_Flow] ====Done====
2309 23:01:06.376066
2310 23:01:06.379423 [DutyScan_Calibration_Flow] k_type=1
2311 23:01:06.394850
2312 23:01:06.394945 ==DQS 0 ==
2313 23:01:06.397929 Final DQS duty delay cell = 0
2314 23:01:06.401280 [0] MAX Duty = 5187%(X100), DQS PI = 30
2315 23:01:06.404330 [0] MIN Duty = 4938%(X100), DQS PI = 0
2316 23:01:06.407669 [0] AVG Duty = 5062%(X100)
2317 23:01:06.407779
2318 23:01:06.407865 ==DQS 1 ==
2319 23:01:06.411313 Final DQS duty delay cell = -4
2320 23:01:06.414472 [-4] MAX Duty = 5124%(X100), DQS PI = 32
2321 23:01:06.417939 [-4] MIN Duty = 4938%(X100), DQS PI = 6
2322 23:01:06.421788 [-4] AVG Duty = 5031%(X100)
2323 23:01:06.422023
2324 23:01:06.424736 CH0 DQS 0 Duty spec in!! Max-Min= 249%
2325 23:01:06.424986
2326 23:01:06.427936 CH0 DQS 1 Duty spec in!! Max-Min= 186%
2327 23:01:06.431416 [DutyScan_Calibration_Flow] ====Done====
2328 23:01:06.431704
2329 23:01:06.434591 [DutyScan_Calibration_Flow] k_type=3
2330 23:01:06.451078
2331 23:01:06.451592 ==DQM 0 ==
2332 23:01:06.454617 Final DQM duty delay cell = 0
2333 23:01:06.457257 [0] MAX Duty = 5062%(X100), DQS PI = 24
2334 23:01:06.461086 [0] MIN Duty = 4875%(X100), DQS PI = 0
2335 23:01:06.461504 [0] AVG Duty = 4968%(X100)
2336 23:01:06.463992
2337 23:01:06.464405 ==DQM 1 ==
2338 23:01:06.467888 Final DQM duty delay cell = -4
2339 23:01:06.471300 [-4] MAX Duty = 5000%(X100), DQS PI = 32
2340 23:01:06.474648 [-4] MIN Duty = 4813%(X100), DQS PI = 12
2341 23:01:06.477293 [-4] AVG Duty = 4906%(X100)
2342 23:01:06.477712
2343 23:01:06.481335 CH0 DQM 0 Duty spec in!! Max-Min= 187%
2344 23:01:06.481867
2345 23:01:06.483911 CH0 DQM 1 Duty spec in!! Max-Min= 187%
2346 23:01:06.487377 [DutyScan_Calibration_Flow] ====Done====
2347 23:01:06.487837
2348 23:01:06.490615 [DutyScan_Calibration_Flow] k_type=2
2349 23:01:06.507285
2350 23:01:06.507432 ==DQ 0 ==
2351 23:01:06.511192 Final DQ duty delay cell = -4
2352 23:01:06.514054 [-4] MAX Duty = 5031%(X100), DQS PI = 32
2353 23:01:06.517588 [-4] MIN Duty = 4875%(X100), DQS PI = 14
2354 23:01:06.521094 [-4] AVG Duty = 4953%(X100)
2355 23:01:06.521284
2356 23:01:06.521410 ==DQ 1 ==
2357 23:01:06.524008 Final DQ duty delay cell = 4
2358 23:01:06.527618 [4] MAX Duty = 5093%(X100), DQS PI = 4
2359 23:01:06.530725 [4] MIN Duty = 5031%(X100), DQS PI = 16
2360 23:01:06.530923 [4] AVG Duty = 5062%(X100)
2361 23:01:06.534381
2362 23:01:06.537679 CH0 DQ 0 Duty spec in!! Max-Min= 156%
2363 23:01:06.537899
2364 23:01:06.541073 CH0 DQ 1 Duty spec in!! Max-Min= 62%
2365 23:01:06.544431 [DutyScan_Calibration_Flow] ====Done====
2366 23:01:06.544658 ==
2367 23:01:06.547848 Dram Type= 6, Freq= 0, CH_1, rank 0
2368 23:01:06.551104 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2369 23:01:06.551362 ==
2370 23:01:06.554133 [Duty_Offset_Calibration]
2371 23:01:06.554483 B0:0 B1:-1 CA:2
2372 23:01:06.554754
2373 23:01:06.557379 [DutyScan_Calibration_Flow] k_type=0
2374 23:01:06.567870
2375 23:01:06.567962 ==CLK 0==
2376 23:01:06.571262 Final CLK duty delay cell = 0
2377 23:01:06.574469 [0] MAX Duty = 5156%(X100), DQS PI = 16
2378 23:01:06.577679 [0] MIN Duty = 4938%(X100), DQS PI = 44
2379 23:01:06.577833 [0] AVG Duty = 5047%(X100)
2380 23:01:06.581031
2381 23:01:06.584460 CH1 CLK Duty spec in!! Max-Min= 218%
2382 23:01:06.587770 [DutyScan_Calibration_Flow] ====Done====
2383 23:01:06.587980
2384 23:01:06.591018 [DutyScan_Calibration_Flow] k_type=1
2385 23:01:06.607486
2386 23:01:06.607782 ==DQS 0 ==
2387 23:01:06.610502 Final DQS duty delay cell = 0
2388 23:01:06.613620 [0] MAX Duty = 5093%(X100), DQS PI = 24
2389 23:01:06.616881 [0] MIN Duty = 4969%(X100), DQS PI = 0
2390 23:01:06.620340 [0] AVG Duty = 5031%(X100)
2391 23:01:06.620653
2392 23:01:06.620988 ==DQS 1 ==
2393 23:01:06.623604 Final DQS duty delay cell = 0
2394 23:01:06.627084 [0] MAX Duty = 5156%(X100), DQS PI = 0
2395 23:01:06.630401 [0] MIN Duty = 4813%(X100), DQS PI = 36
2396 23:01:06.630857 [0] AVG Duty = 4984%(X100)
2397 23:01:06.633807
2398 23:01:06.637383 CH1 DQS 0 Duty spec in!! Max-Min= 124%
2399 23:01:06.637807
2400 23:01:06.640487 CH1 DQS 1 Duty spec in!! Max-Min= 343%
2401 23:01:06.643865 [DutyScan_Calibration_Flow] ====Done====
2402 23:01:06.644289
2403 23:01:06.647253 [DutyScan_Calibration_Flow] k_type=3
2404 23:01:06.664916
2405 23:01:06.665440 ==DQM 0 ==
2406 23:01:06.667914 Final DQM duty delay cell = 4
2407 23:01:06.671267 [4] MAX Duty = 5093%(X100), DQS PI = 6
2408 23:01:06.674609 [4] MIN Duty = 4969%(X100), DQS PI = 28
2409 23:01:06.677530 [4] AVG Duty = 5031%(X100)
2410 23:01:06.677971
2411 23:01:06.678305 ==DQM 1 ==
2412 23:01:06.680971 Final DQM duty delay cell = 0
2413 23:01:06.684290 [0] MAX Duty = 5249%(X100), DQS PI = 0
2414 23:01:06.687925 [0] MIN Duty = 4875%(X100), DQS PI = 36
2415 23:01:06.691182 [0] AVG Duty = 5062%(X100)
2416 23:01:06.691837
2417 23:01:06.694593 CH1 DQM 0 Duty spec in!! Max-Min= 124%
2418 23:01:06.695185
2419 23:01:06.697623 CH1 DQM 1 Duty spec in!! Max-Min= 374%
2420 23:01:06.700888 [DutyScan_Calibration_Flow] ====Done====
2421 23:01:06.701365
2422 23:01:06.704213 [DutyScan_Calibration_Flow] k_type=2
2423 23:01:06.721407
2424 23:01:06.721981 ==DQ 0 ==
2425 23:01:06.724583 Final DQ duty delay cell = 0
2426 23:01:06.728093 [0] MAX Duty = 5062%(X100), DQS PI = 18
2427 23:01:06.731055 [0] MIN Duty = 4938%(X100), DQS PI = 46
2428 23:01:06.733937 [0] AVG Duty = 5000%(X100)
2429 23:01:06.734368
2430 23:01:06.734739 ==DQ 1 ==
2431 23:01:06.737569 Final DQ duty delay cell = 0
2432 23:01:06.741005 [0] MAX Duty = 5031%(X100), DQS PI = 2
2433 23:01:06.744154 [0] MIN Duty = 4813%(X100), DQS PI = 34
2434 23:01:06.744592 [0] AVG Duty = 4922%(X100)
2435 23:01:06.747363
2436 23:01:06.750634 CH1 DQ 0 Duty spec in!! Max-Min= 124%
2437 23:01:06.751192
2438 23:01:06.754283 CH1 DQ 1 Duty spec in!! Max-Min= 218%
2439 23:01:06.757520 [DutyScan_Calibration_Flow] ====Done====
2440 23:01:06.761115 nWR fixed to 30
2441 23:01:06.761696 [ModeRegInit_LP4] CH0 RK0
2442 23:01:06.764089 [ModeRegInit_LP4] CH0 RK1
2443 23:01:06.767845 [ModeRegInit_LP4] CH1 RK0
2444 23:01:06.771137 [ModeRegInit_LP4] CH1 RK1
2445 23:01:06.771713 match AC timing 7
2446 23:01:06.777189 dramType 5, freq 1200, readDBI 0, DivMode 1, cbtMode 1
2447 23:01:06.780893 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
2448 23:01:06.783863 [WriteLatency GET] Version:0-MR_RL_field_value:4-WL:12
2449 23:01:06.790715 [TX_path_calculate] data rate=2400, WL=12, DQS_TotalUI=25
2450 23:01:06.794071 [TX_path_calculate] DQS = (3,1) DQS_OE = (2,6)
2451 23:01:06.794645 ==
2452 23:01:06.797490 Dram Type= 6, Freq= 0, CH_0, rank 0
2453 23:01:06.800836 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2454 23:01:06.801421 ==
2455 23:01:06.807153 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2456 23:01:06.813986 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
2457 23:01:06.821101 [CA 0] Center 38 (7~69) winsize 63
2458 23:01:06.824315 [CA 1] Center 38 (7~69) winsize 63
2459 23:01:06.827918 [CA 2] Center 35 (5~66) winsize 62
2460 23:01:06.831016 [CA 3] Center 35 (4~66) winsize 63
2461 23:01:06.834147 [CA 4] Center 34 (4~65) winsize 62
2462 23:01:06.837457 [CA 5] Center 33 (3~63) winsize 61
2463 23:01:06.837885
2464 23:01:06.841024 [CmdBusTrainingLP45] Vref(ca) range 1: 35
2465 23:01:06.841549
2466 23:01:06.844288 [CATrainingPosCal] consider 1 rank data
2467 23:01:06.848179 u2DelayCellTimex100 = 270/100 ps
2468 23:01:06.850921 CA0 delay=38 (7~69),Diff = 5 PI (24 cell)
2469 23:01:06.854409 CA1 delay=38 (7~69),Diff = 5 PI (24 cell)
2470 23:01:06.860745 CA2 delay=35 (5~66),Diff = 2 PI (9 cell)
2471 23:01:06.864453 CA3 delay=35 (4~66),Diff = 2 PI (9 cell)
2472 23:01:06.867767 CA4 delay=34 (4~65),Diff = 1 PI (4 cell)
2473 23:01:06.871118 CA5 delay=33 (3~63),Diff = 0 PI (0 cell)
2474 23:01:06.871651
2475 23:01:06.874485 CA PerBit enable=1, Macro0, CA PI delay=33
2476 23:01:06.875015
2477 23:01:06.877857 [CBTSetCACLKResult] CA Dly = 33
2478 23:01:06.878433 CS Dly: 6 (0~37)
2479 23:01:06.881004 ==
2480 23:01:06.881474 Dram Type= 6, Freq= 0, CH_0, rank 1
2481 23:01:06.887430 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2482 23:01:06.887971 ==
2483 23:01:06.890712 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2484 23:01:06.897668 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=27, u1VrefScanEnd=37
2485 23:01:06.906673 [CA 0] Center 39 (8~70) winsize 63
2486 23:01:06.909904 [CA 1] Center 38 (8~69) winsize 62
2487 23:01:06.913426 [CA 2] Center 35 (5~66) winsize 62
2488 23:01:06.916847 [CA 3] Center 35 (5~66) winsize 62
2489 23:01:06.920140 [CA 4] Center 34 (4~65) winsize 62
2490 23:01:06.923544 [CA 5] Center 34 (4~64) winsize 61
2491 23:01:06.924151
2492 23:01:06.927015 [CmdBusTrainingLP45] Vref(ca) range 1: 33
2493 23:01:06.927594
2494 23:01:06.929807 [CATrainingPosCal] consider 2 rank data
2495 23:01:06.933272 u2DelayCellTimex100 = 270/100 ps
2496 23:01:06.936840 CA0 delay=38 (8~69),Diff = 5 PI (24 cell)
2497 23:01:06.943324 CA1 delay=38 (8~69),Diff = 5 PI (24 cell)
2498 23:01:06.946563 CA2 delay=35 (5~66),Diff = 2 PI (9 cell)
2499 23:01:06.949856 CA3 delay=35 (5~66),Diff = 2 PI (9 cell)
2500 23:01:06.953332 CA4 delay=34 (4~65),Diff = 1 PI (4 cell)
2501 23:01:06.956591 CA5 delay=33 (4~63),Diff = 0 PI (0 cell)
2502 23:01:06.957269
2503 23:01:06.960292 CA PerBit enable=1, Macro0, CA PI delay=33
2504 23:01:06.960904
2505 23:01:06.963549 [CBTSetCACLKResult] CA Dly = 33
2506 23:01:06.964089 CS Dly: 7 (0~39)
2507 23:01:06.964438
2508 23:01:06.966863 ----->DramcWriteLeveling(PI) begin...
2509 23:01:06.970187 ==
2510 23:01:06.973264 Dram Type= 6, Freq= 0, CH_0, rank 0
2511 23:01:06.976886 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2512 23:01:06.977514 ==
2513 23:01:06.980176 Write leveling (Byte 0): 34 => 34
2514 23:01:06.983563 Write leveling (Byte 1): 32 => 32
2515 23:01:06.986657 DramcWriteLeveling(PI) end<-----
2516 23:01:06.987089
2517 23:01:06.987428 ==
2518 23:01:06.990104 Dram Type= 6, Freq= 0, CH_0, rank 0
2519 23:01:06.993292 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2520 23:01:06.993728 ==
2521 23:01:06.996834 [Gating] SW mode calibration
2522 23:01:07.003200 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2523 23:01:07.010037 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
2524 23:01:07.013297 0 15 0 | B1->B0 | 2323 3434 | 0 1 | (0 0) (1 1)
2525 23:01:07.016104 0 15 4 | B1->B0 | 2d2d 3434 | 1 1 | (0 0) (1 1)
2526 23:01:07.022673 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2527 23:01:07.026434 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2528 23:01:07.029570 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2529 23:01:07.035976 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2530 23:01:07.039292 0 15 24 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 0)
2531 23:01:07.042830 0 15 28 | B1->B0 | 3434 2323 | 1 0 | (1 0) (0 0)
2532 23:01:07.046552 1 0 0 | B1->B0 | 2e2e 2323 | 1 0 | (1 0) (0 0)
2533 23:01:07.052825 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2534 23:01:07.055819 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2535 23:01:07.059146 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2536 23:01:07.066092 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2537 23:01:07.069431 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2538 23:01:07.072835 1 0 24 | B1->B0 | 2323 3030 | 0 0 | (0 0) (0 0)
2539 23:01:07.079646 1 0 28 | B1->B0 | 2323 4646 | 0 0 | (0 0) (0 0)
2540 23:01:07.082754 1 1 0 | B1->B0 | 2e2e 4646 | 0 0 | (0 0) (0 0)
2541 23:01:07.086066 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2542 23:01:07.092992 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2543 23:01:07.096054 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2544 23:01:07.099130 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2545 23:01:07.105797 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2546 23:01:07.109140 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2547 23:01:07.112517 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
2548 23:01:07.119398 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
2549 23:01:07.122397 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2550 23:01:07.125785 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2551 23:01:07.132281 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2552 23:01:07.135533 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2553 23:01:07.139007 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2554 23:01:07.145436 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2555 23:01:07.149078 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2556 23:01:07.152103 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2557 23:01:07.159034 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2558 23:01:07.162527 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2559 23:01:07.165628 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2560 23:01:07.172125 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2561 23:01:07.175310 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2562 23:01:07.178610 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2563 23:01:07.185321 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
2564 23:01:07.188692 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2565 23:01:07.192047 Total UI for P1: 0, mck2ui 16
2566 23:01:07.195334 best dqsien dly found for B0: ( 1, 3, 28)
2567 23:01:07.198712 1 4 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2568 23:01:07.201826 Total UI for P1: 0, mck2ui 16
2569 23:01:07.205196 best dqsien dly found for B1: ( 1, 3, 30)
2570 23:01:07.208554 best DQS0 dly(MCK, UI, PI) = (1, 3, 28)
2571 23:01:07.211829 best DQS1 dly(MCK, UI, PI) = (1, 3, 30)
2572 23:01:07.212013
2573 23:01:07.215128 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 28)
2574 23:01:07.221660 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 30)
2575 23:01:07.221797 [Gating] SW calibration Done
2576 23:01:07.221902 ==
2577 23:01:07.224883 Dram Type= 6, Freq= 0, CH_0, rank 0
2578 23:01:07.231558 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2579 23:01:07.231666 ==
2580 23:01:07.231750 RX Vref Scan: 0
2581 23:01:07.231826
2582 23:01:07.235237 RX Vref 0 -> 0, step: 1
2583 23:01:07.235564
2584 23:01:07.238654 RX Delay -40 -> 252, step: 8
2585 23:01:07.241784 iDelay=200, Bit 0, Center 123 (56 ~ 191) 136
2586 23:01:07.244720 iDelay=200, Bit 1, Center 119 (48 ~ 191) 144
2587 23:01:07.248454 iDelay=200, Bit 2, Center 119 (48 ~ 191) 144
2588 23:01:07.255127 iDelay=200, Bit 3, Center 119 (48 ~ 191) 144
2589 23:01:07.258565 iDelay=200, Bit 4, Center 127 (56 ~ 199) 144
2590 23:01:07.261706 iDelay=200, Bit 5, Center 115 (48 ~ 183) 136
2591 23:01:07.265122 iDelay=200, Bit 6, Center 127 (56 ~ 199) 144
2592 23:01:07.268152 iDelay=200, Bit 7, Center 127 (56 ~ 199) 144
2593 23:01:07.274942 iDelay=200, Bit 8, Center 99 (32 ~ 167) 136
2594 23:01:07.277939 iDelay=200, Bit 9, Center 99 (32 ~ 167) 136
2595 23:01:07.281555 iDelay=200, Bit 10, Center 107 (40 ~ 175) 136
2596 23:01:07.284845 iDelay=200, Bit 11, Center 111 (48 ~ 175) 128
2597 23:01:07.288447 iDelay=200, Bit 12, Center 115 (48 ~ 183) 136
2598 23:01:07.294971 iDelay=200, Bit 13, Center 115 (48 ~ 183) 136
2599 23:01:07.298411 iDelay=200, Bit 14, Center 123 (56 ~ 191) 136
2600 23:01:07.301560 iDelay=200, Bit 15, Center 115 (48 ~ 183) 136
2601 23:01:07.302013 ==
2602 23:01:07.304812 Dram Type= 6, Freq= 0, CH_0, rank 0
2603 23:01:07.308129 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2604 23:01:07.308555 ==
2605 23:01:07.311423 DQS Delay:
2606 23:01:07.311911 DQS0 = 0, DQS1 = 0
2607 23:01:07.314831 DQM Delay:
2608 23:01:07.315252 DQM0 = 122, DQM1 = 110
2609 23:01:07.315678 DQ Delay:
2610 23:01:07.318306 DQ0 =123, DQ1 =119, DQ2 =119, DQ3 =119
2611 23:01:07.325105 DQ4 =127, DQ5 =115, DQ6 =127, DQ7 =127
2612 23:01:07.328260 DQ8 =99, DQ9 =99, DQ10 =107, DQ11 =111
2613 23:01:07.331855 DQ12 =115, DQ13 =115, DQ14 =123, DQ15 =115
2614 23:01:07.332392
2615 23:01:07.332736
2616 23:01:07.333086 ==
2617 23:01:07.335033 Dram Type= 6, Freq= 0, CH_0, rank 0
2618 23:01:07.338532 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2619 23:01:07.339073 ==
2620 23:01:07.339414
2621 23:01:07.339730
2622 23:01:07.341647 TX Vref Scan disable
2623 23:01:07.344990 == TX Byte 0 ==
2624 23:01:07.348117 Update DQ dly =852 (3 ,2, 20) DQ OEN =(2 ,7)
2625 23:01:07.351119 Update DQM dly =852 (3 ,2, 20) DQM OEN =(2 ,7)
2626 23:01:07.354945 == TX Byte 1 ==
2627 23:01:07.357933 Update DQ dly =849 (3 ,2, 17) DQ OEN =(2 ,7)
2628 23:01:07.361595 Update DQM dly =849 (3 ,2, 17) DQM OEN =(2 ,7)
2629 23:01:07.362110 ==
2630 23:01:07.364654 Dram Type= 6, Freq= 0, CH_0, rank 0
2631 23:01:07.368168 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2632 23:01:07.368598 ==
2633 23:01:07.381269 TX Vref=22, minBit 7, minWin=23, winSum=405
2634 23:01:07.384226 TX Vref=24, minBit 4, minWin=24, winSum=409
2635 23:01:07.387775 TX Vref=26, minBit 7, minWin=24, winSum=410
2636 23:01:07.391195 TX Vref=28, minBit 0, minWin=25, winSum=417
2637 23:01:07.394625 TX Vref=30, minBit 5, minWin=25, winSum=420
2638 23:01:07.397984 TX Vref=32, minBit 3, minWin=25, winSum=417
2639 23:01:07.404128 [TxChooseVref] Worse bit 5, Min win 25, Win sum 420, Final Vref 30
2640 23:01:07.404701
2641 23:01:07.407405 Final TX Range 1 Vref 30
2642 23:01:07.407984
2643 23:01:07.408469 ==
2644 23:01:07.410861 Dram Type= 6, Freq= 0, CH_0, rank 0
2645 23:01:07.414141 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2646 23:01:07.414649 ==
2647 23:01:07.417578
2648 23:01:07.418008
2649 23:01:07.418351 TX Vref Scan disable
2650 23:01:07.420883 == TX Byte 0 ==
2651 23:01:07.424145 Update DQ dly =852 (3 ,2, 20) DQ OEN =(2 ,7)
2652 23:01:07.427628 Update DQM dly =852 (3 ,2, 20) DQM OEN =(2 ,7)
2653 23:01:07.430841 == TX Byte 1 ==
2654 23:01:07.434206 Update DQ dly =849 (3 ,2, 17) DQ OEN =(2 ,7)
2655 23:01:07.437553 Update DQM dly =849 (3 ,2, 17) DQM OEN =(2 ,7)
2656 23:01:07.437986
2657 23:01:07.440890 [DATLAT]
2658 23:01:07.441319 Freq=1200, CH0 RK0
2659 23:01:07.441669
2660 23:01:07.444306 DATLAT Default: 0xd
2661 23:01:07.444756 0, 0xFFFF, sum = 0
2662 23:01:07.447711 1, 0xFFFF, sum = 0
2663 23:01:07.448149 2, 0xFFFF, sum = 0
2664 23:01:07.451039 3, 0xFFFF, sum = 0
2665 23:01:07.451479 4, 0xFFFF, sum = 0
2666 23:01:07.454210 5, 0xFFFF, sum = 0
2667 23:01:07.457701 6, 0xFFFF, sum = 0
2668 23:01:07.458139 7, 0xFFFF, sum = 0
2669 23:01:07.460829 8, 0xFFFF, sum = 0
2670 23:01:07.461266 9, 0xFFFF, sum = 0
2671 23:01:07.463803 10, 0xFFFF, sum = 0
2672 23:01:07.464263 11, 0xFFFF, sum = 0
2673 23:01:07.467357 12, 0x0, sum = 1
2674 23:01:07.467798 13, 0x0, sum = 2
2675 23:01:07.470517 14, 0x0, sum = 3
2676 23:01:07.470959 15, 0x0, sum = 4
2677 23:01:07.471305 best_step = 13
2678 23:01:07.474294
2679 23:01:07.474884 ==
2680 23:01:07.477201 Dram Type= 6, Freq= 0, CH_0, rank 0
2681 23:01:07.480833 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2682 23:01:07.481269 ==
2683 23:01:07.481653 RX Vref Scan: 1
2684 23:01:07.481988
2685 23:01:07.483781 Set Vref Range= 32 -> 127
2686 23:01:07.484211
2687 23:01:07.487428 RX Vref 32 -> 127, step: 1
2688 23:01:07.487862
2689 23:01:07.490566 RX Delay -13 -> 252, step: 4
2690 23:01:07.491001
2691 23:01:07.494005 Set Vref, RX VrefLevel [Byte0]: 32
2692 23:01:07.497363 [Byte1]: 32
2693 23:01:07.497798
2694 23:01:07.500167 Set Vref, RX VrefLevel [Byte0]: 33
2695 23:01:07.503393 [Byte1]: 33
2696 23:01:07.506767
2697 23:01:07.507013 Set Vref, RX VrefLevel [Byte0]: 34
2698 23:01:07.509997 [Byte1]: 34
2699 23:01:07.514647
2700 23:01:07.514820 Set Vref, RX VrefLevel [Byte0]: 35
2701 23:01:07.518090 [Byte1]: 35
2702 23:01:07.522802
2703 23:01:07.522937 Set Vref, RX VrefLevel [Byte0]: 36
2704 23:01:07.525646 [Byte1]: 36
2705 23:01:07.530518
2706 23:01:07.530626 Set Vref, RX VrefLevel [Byte0]: 37
2707 23:01:07.533545 [Byte1]: 37
2708 23:01:07.538391
2709 23:01:07.538485 Set Vref, RX VrefLevel [Byte0]: 38
2710 23:01:07.541794 [Byte1]: 38
2711 23:01:07.546528
2712 23:01:07.546669 Set Vref, RX VrefLevel [Byte0]: 39
2713 23:01:07.549683 [Byte1]: 39
2714 23:01:07.554142
2715 23:01:07.554227 Set Vref, RX VrefLevel [Byte0]: 40
2716 23:01:07.560611 [Byte1]: 40
2717 23:01:07.560697
2718 23:01:07.564125 Set Vref, RX VrefLevel [Byte0]: 41
2719 23:01:07.567270 [Byte1]: 41
2720 23:01:07.567441
2721 23:01:07.570707 Set Vref, RX VrefLevel [Byte0]: 42
2722 23:01:07.574282 [Byte1]: 42
2723 23:01:07.577908
2724 23:01:07.578008 Set Vref, RX VrefLevel [Byte0]: 43
2725 23:01:07.581117 [Byte1]: 43
2726 23:01:07.585988
2727 23:01:07.586073 Set Vref, RX VrefLevel [Byte0]: 44
2728 23:01:07.589009 [Byte1]: 44
2729 23:01:07.593325
2730 23:01:07.593410 Set Vref, RX VrefLevel [Byte0]: 45
2731 23:01:07.596988 [Byte1]: 45
2732 23:01:07.601254
2733 23:01:07.601344 Set Vref, RX VrefLevel [Byte0]: 46
2734 23:01:07.604573 [Byte1]: 46
2735 23:01:07.609312
2736 23:01:07.609422 Set Vref, RX VrefLevel [Byte0]: 47
2737 23:01:07.612566 [Byte1]: 47
2738 23:01:07.617418
2739 23:01:07.617508 Set Vref, RX VrefLevel [Byte0]: 48
2740 23:01:07.620657 [Byte1]: 48
2741 23:01:07.624995
2742 23:01:07.625085 Set Vref, RX VrefLevel [Byte0]: 49
2743 23:01:07.628432 [Byte1]: 49
2744 23:01:07.633188
2745 23:01:07.633285 Set Vref, RX VrefLevel [Byte0]: 50
2746 23:01:07.636621 [Byte1]: 50
2747 23:01:07.641203
2748 23:01:07.641402 Set Vref, RX VrefLevel [Byte0]: 51
2749 23:01:07.644488 [Byte1]: 51
2750 23:01:07.649100
2751 23:01:07.649286 Set Vref, RX VrefLevel [Byte0]: 52
2752 23:01:07.652482 [Byte1]: 52
2753 23:01:07.656911
2754 23:01:07.660260 Set Vref, RX VrefLevel [Byte0]: 53
2755 23:01:07.660554 [Byte1]: 53
2756 23:01:07.664535
2757 23:01:07.664844 Set Vref, RX VrefLevel [Byte0]: 54
2758 23:01:07.668312 [Byte1]: 54
2759 23:01:07.672601
2760 23:01:07.672978 Set Vref, RX VrefLevel [Byte0]: 55
2761 23:01:07.675961 [Byte1]: 55
2762 23:01:07.680790
2763 23:01:07.681275 Set Vref, RX VrefLevel [Byte0]: 56
2764 23:01:07.683884 [Byte1]: 56
2765 23:01:07.688425
2766 23:01:07.689091 Set Vref, RX VrefLevel [Byte0]: 57
2767 23:01:07.691730 [Byte1]: 57
2768 23:01:07.696235
2769 23:01:07.696865 Set Vref, RX VrefLevel [Byte0]: 58
2770 23:01:07.699762 [Byte1]: 58
2771 23:01:07.704326
2772 23:01:07.704893 Set Vref, RX VrefLevel [Byte0]: 59
2773 23:01:07.707501 [Byte1]: 59
2774 23:01:07.712381
2775 23:01:07.713047 Set Vref, RX VrefLevel [Byte0]: 60
2776 23:01:07.715588 [Byte1]: 60
2777 23:01:07.719838
2778 23:01:07.720374 Set Vref, RX VrefLevel [Byte0]: 61
2779 23:01:07.723699 [Byte1]: 61
2780 23:01:07.727934
2781 23:01:07.728357 Set Vref, RX VrefLevel [Byte0]: 62
2782 23:01:07.731422 [Byte1]: 62
2783 23:01:07.736164
2784 23:01:07.736591 Set Vref, RX VrefLevel [Byte0]: 63
2785 23:01:07.739078 [Byte1]: 63
2786 23:01:07.743854
2787 23:01:07.744280 Set Vref, RX VrefLevel [Byte0]: 64
2788 23:01:07.747219 [Byte1]: 64
2789 23:01:07.752040
2790 23:01:07.752588 Set Vref, RX VrefLevel [Byte0]: 65
2791 23:01:07.755290 [Byte1]: 65
2792 23:01:07.759710
2793 23:01:07.760135 Set Vref, RX VrefLevel [Byte0]: 66
2794 23:01:07.762987 [Byte1]: 66
2795 23:01:07.767476
2796 23:01:07.767901 Set Vref, RX VrefLevel [Byte0]: 67
2797 23:01:07.770825 [Byte1]: 67
2798 23:01:07.775248
2799 23:01:07.775688 Set Vref, RX VrefLevel [Byte0]: 68
2800 23:01:07.778839 [Byte1]: 68
2801 23:01:07.783077
2802 23:01:07.783508 Set Vref, RX VrefLevel [Byte0]: 69
2803 23:01:07.786522 [Byte1]: 69
2804 23:01:07.791349
2805 23:01:07.791794 Set Vref, RX VrefLevel [Byte0]: 70
2806 23:01:07.794373 [Byte1]: 70
2807 23:01:07.798998
2808 23:01:07.799423 Set Vref, RX VrefLevel [Byte0]: 71
2809 23:01:07.802333 [Byte1]: 71
2810 23:01:07.806396
2811 23:01:07.806479 Final RX Vref Byte 0 = 60 to rank0
2812 23:01:07.809889 Final RX Vref Byte 1 = 50 to rank0
2813 23:01:07.813587 Final RX Vref Byte 0 = 60 to rank1
2814 23:01:07.816638 Final RX Vref Byte 1 = 50 to rank1==
2815 23:01:07.820456 Dram Type= 6, Freq= 0, CH_0, rank 0
2816 23:01:07.827010 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2817 23:01:07.827439 ==
2818 23:01:07.827779 DQS Delay:
2819 23:01:07.828096 DQS0 = 0, DQS1 = 0
2820 23:01:07.829943 DQM Delay:
2821 23:01:07.830368 DQM0 = 122, DQM1 = 109
2822 23:01:07.833761 DQ Delay:
2823 23:01:07.837098 DQ0 =122, DQ1 =122, DQ2 =118, DQ3 =120
2824 23:01:07.840333 DQ4 =126, DQ5 =116, DQ6 =130, DQ7 =128
2825 23:01:07.843322 DQ8 =102, DQ9 =94, DQ10 =110, DQ11 =106
2826 23:01:07.846709 DQ12 =116, DQ13 =110, DQ14 =122, DQ15 =116
2827 23:01:07.847135
2828 23:01:07.847470
2829 23:01:07.853283 [DQSOSCAuto] RK0, (LSB)MR18= 0xb08, (MSB)MR19= 0x404, tDQSOscB0 = 406 ps tDQSOscB1 = 405 ps
2830 23:01:07.856669 CH0 RK0: MR19=404, MR18=B08
2831 23:01:07.863373 CH0_RK0: MR19=0x404, MR18=0xB08, DQSOSC=405, MR23=63, INC=39, DEC=26
2832 23:01:07.863805
2833 23:01:07.866759 ----->DramcWriteLeveling(PI) begin...
2834 23:01:07.867192 ==
2835 23:01:07.870395 Dram Type= 6, Freq= 0, CH_0, rank 1
2836 23:01:07.873629 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2837 23:01:07.876729 ==
2838 23:01:07.877201 Write leveling (Byte 0): 34 => 34
2839 23:01:07.880077 Write leveling (Byte 1): 31 => 31
2840 23:01:07.883352 DramcWriteLeveling(PI) end<-----
2841 23:01:07.883902
2842 23:01:07.884255 ==
2843 23:01:07.886723 Dram Type= 6, Freq= 0, CH_0, rank 1
2844 23:01:07.893555 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2845 23:01:07.893988 ==
2846 23:01:07.894348 [Gating] SW mode calibration
2847 23:01:07.903493 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2848 23:01:07.906745 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
2849 23:01:07.913263 0 15 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2850 23:01:07.916306 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2851 23:01:07.919820 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2852 23:01:07.922841 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2853 23:01:07.929608 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2854 23:01:07.933420 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2855 23:01:07.936279 0 15 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2856 23:01:07.943374 0 15 28 | B1->B0 | 2f2f 2d2d | 0 1 | (0 0) (1 0)
2857 23:01:07.946722 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
2858 23:01:07.950049 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2859 23:01:07.956616 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2860 23:01:07.959392 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2861 23:01:07.962747 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2862 23:01:07.969696 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2863 23:01:07.973269 1 0 24 | B1->B0 | 2424 2727 | 0 1 | (0 0) (0 0)
2864 23:01:07.976281 1 0 28 | B1->B0 | 3a3a 4242 | 0 0 | (0 0) (0 0)
2865 23:01:07.982934 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2866 23:01:07.986105 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2867 23:01:07.989242 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2868 23:01:07.995833 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2869 23:01:07.999696 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2870 23:01:08.002787 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2871 23:01:08.009371 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2872 23:01:08.012807 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2873 23:01:08.016412 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2874 23:01:08.022750 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2875 23:01:08.025919 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2876 23:01:08.029703 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2877 23:01:08.036592 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2878 23:01:08.039458 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2879 23:01:08.043291 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2880 23:01:08.049306 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2881 23:01:08.053390 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2882 23:01:08.056215 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2883 23:01:08.062920 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2884 23:01:08.066201 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2885 23:01:08.069578 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2886 23:01:08.072952 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2887 23:01:08.079583 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2888 23:01:08.082928 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
2889 23:01:08.085956 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
2890 23:01:08.089362 Total UI for P1: 0, mck2ui 16
2891 23:01:08.093006 best dqsien dly found for B1: ( 1, 3, 28)
2892 23:01:08.099228 1 4 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2893 23:01:08.099787 Total UI for P1: 0, mck2ui 16
2894 23:01:08.106177 best dqsien dly found for B0: ( 1, 3, 30)
2895 23:01:08.109293 best DQS0 dly(MCK, UI, PI) = (1, 3, 30)
2896 23:01:08.112622 best DQS1 dly(MCK, UI, PI) = (1, 3, 28)
2897 23:01:08.113162
2898 23:01:08.115959 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 30)
2899 23:01:08.119252 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 28)
2900 23:01:08.122534 [Gating] SW calibration Done
2901 23:01:08.123006 ==
2902 23:01:08.125929 Dram Type= 6, Freq= 0, CH_0, rank 1
2903 23:01:08.129321 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2904 23:01:08.129755 ==
2905 23:01:08.132373 RX Vref Scan: 0
2906 23:01:08.132891
2907 23:01:08.133241 RX Vref 0 -> 0, step: 1
2908 23:01:08.133565
2909 23:01:08.135851 RX Delay -40 -> 252, step: 8
2910 23:01:08.139189 iDelay=200, Bit 0, Center 119 (48 ~ 191) 144
2911 23:01:08.145910 iDelay=200, Bit 1, Center 119 (48 ~ 191) 144
2912 23:01:08.149324 iDelay=200, Bit 2, Center 119 (48 ~ 191) 144
2913 23:01:08.153070 iDelay=200, Bit 3, Center 115 (48 ~ 183) 136
2914 23:01:08.155651 iDelay=200, Bit 4, Center 119 (48 ~ 191) 144
2915 23:01:08.159014 iDelay=200, Bit 5, Center 115 (48 ~ 183) 136
2916 23:01:08.165751 iDelay=200, Bit 6, Center 127 (56 ~ 199) 144
2917 23:01:08.169177 iDelay=200, Bit 7, Center 127 (56 ~ 199) 144
2918 23:01:08.172508 iDelay=200, Bit 8, Center 99 (32 ~ 167) 136
2919 23:01:08.175970 iDelay=200, Bit 9, Center 95 (24 ~ 167) 144
2920 23:01:08.179274 iDelay=200, Bit 10, Center 107 (40 ~ 175) 136
2921 23:01:08.186365 iDelay=200, Bit 11, Center 107 (40 ~ 175) 136
2922 23:01:08.189700 iDelay=200, Bit 12, Center 111 (40 ~ 183) 144
2923 23:01:08.192994 iDelay=200, Bit 13, Center 115 (48 ~ 183) 136
2924 23:01:08.195656 iDelay=200, Bit 14, Center 119 (48 ~ 191) 144
2925 23:01:08.199315 iDelay=200, Bit 15, Center 115 (48 ~ 183) 136
2926 23:01:08.202836 ==
2927 23:01:08.205731 Dram Type= 6, Freq= 0, CH_0, rank 1
2928 23:01:08.209216 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2929 23:01:08.209755 ==
2930 23:01:08.210308 DQS Delay:
2931 23:01:08.212576 DQS0 = 0, DQS1 = 0
2932 23:01:08.213077 DQM Delay:
2933 23:01:08.215887 DQM0 = 120, DQM1 = 108
2934 23:01:08.216362 DQ Delay:
2935 23:01:08.219292 DQ0 =119, DQ1 =119, DQ2 =119, DQ3 =115
2936 23:01:08.222451 DQ4 =119, DQ5 =115, DQ6 =127, DQ7 =127
2937 23:01:08.226051 DQ8 =99, DQ9 =95, DQ10 =107, DQ11 =107
2938 23:01:08.229339 DQ12 =111, DQ13 =115, DQ14 =119, DQ15 =115
2939 23:01:08.229835
2940 23:01:08.230211
2941 23:01:08.230577 ==
2942 23:01:08.232404 Dram Type= 6, Freq= 0, CH_0, rank 1
2943 23:01:08.239141 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2944 23:01:08.239726 ==
2945 23:01:08.240108
2946 23:01:08.240456
2947 23:01:08.240834 TX Vref Scan disable
2948 23:01:08.242257 == TX Byte 0 ==
2949 23:01:08.245617 Update DQ dly =853 (3 ,2, 21) DQ OEN =(2 ,7)
2950 23:01:08.249001 Update DQM dly =853 (3 ,2, 21) DQM OEN =(2 ,7)
2951 23:01:08.252630 == TX Byte 1 ==
2952 23:01:08.256045 Update DQ dly =847 (3 ,2, 15) DQ OEN =(2 ,7)
2953 23:01:08.262239 Update DQM dly =847 (3 ,2, 15) DQM OEN =(2 ,7)
2954 23:01:08.262859 ==
2955 23:01:08.265704 Dram Type= 6, Freq= 0, CH_0, rank 1
2956 23:01:08.269303 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2957 23:01:08.269888 ==
2958 23:01:08.280665 TX Vref=22, minBit 0, minWin=24, winSum=408
2959 23:01:08.284015 TX Vref=24, minBit 2, minWin=24, winSum=416
2960 23:01:08.287292 TX Vref=26, minBit 1, minWin=24, winSum=418
2961 23:01:08.291053 TX Vref=28, minBit 1, minWin=24, winSum=419
2962 23:01:08.293759 TX Vref=30, minBit 1, minWin=25, winSum=424
2963 23:01:08.300368 TX Vref=32, minBit 3, minWin=25, winSum=421
2964 23:01:08.303818 [TxChooseVref] Worse bit 1, Min win 25, Win sum 424, Final Vref 30
2965 23:01:08.304473
2966 23:01:08.306656 Final TX Range 1 Vref 30
2967 23:01:08.307324
2968 23:01:08.307901 ==
2969 23:01:08.310105 Dram Type= 6, Freq= 0, CH_0, rank 1
2970 23:01:08.313296 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2971 23:01:08.313882 ==
2972 23:01:08.316863
2973 23:01:08.317336
2974 23:01:08.317714 TX Vref Scan disable
2975 23:01:08.320030 == TX Byte 0 ==
2976 23:01:08.323714 Update DQ dly =853 (3 ,2, 21) DQ OEN =(2 ,7)
2977 23:01:08.326913 Update DQM dly =853 (3 ,2, 21) DQM OEN =(2 ,7)
2978 23:01:08.330028 == TX Byte 1 ==
2979 23:01:08.333382 Update DQ dly =847 (3 ,2, 15) DQ OEN =(2 ,7)
2980 23:01:08.336854 Update DQM dly =847 (3 ,2, 15) DQM OEN =(2 ,7)
2981 23:01:08.340745
2982 23:01:08.341356 [DATLAT]
2983 23:01:08.341705 Freq=1200, CH0 RK1
2984 23:01:08.342029
2985 23:01:08.343410 DATLAT Default: 0xd
2986 23:01:08.343835 0, 0xFFFF, sum = 0
2987 23:01:08.346528 1, 0xFFFF, sum = 0
2988 23:01:08.346995 2, 0xFFFF, sum = 0
2989 23:01:08.350098 3, 0xFFFF, sum = 0
2990 23:01:08.353263 4, 0xFFFF, sum = 0
2991 23:01:08.353718 5, 0xFFFF, sum = 0
2992 23:01:08.356726 6, 0xFFFF, sum = 0
2993 23:01:08.357212 7, 0xFFFF, sum = 0
2994 23:01:08.359985 8, 0xFFFF, sum = 0
2995 23:01:08.360435 9, 0xFFFF, sum = 0
2996 23:01:08.363374 10, 0xFFFF, sum = 0
2997 23:01:08.363827 11, 0xFFFF, sum = 0
2998 23:01:08.366725 12, 0x0, sum = 1
2999 23:01:08.367173 13, 0x0, sum = 2
3000 23:01:08.370073 14, 0x0, sum = 3
3001 23:01:08.370522 15, 0x0, sum = 4
3002 23:01:08.370968 best_step = 13
3003 23:01:08.373443
3004 23:01:08.373884 ==
3005 23:01:08.376449 Dram Type= 6, Freq= 0, CH_0, rank 1
3006 23:01:08.379828 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3007 23:01:08.379915 ==
3008 23:01:08.380001 RX Vref Scan: 0
3009 23:01:08.380083
3010 23:01:08.383198 RX Vref 0 -> 0, step: 1
3011 23:01:08.383322
3012 23:01:08.386442 RX Delay -21 -> 252, step: 4
3013 23:01:08.389497 iDelay=199, Bit 0, Center 118 (51 ~ 186) 136
3014 23:01:08.396405 iDelay=199, Bit 1, Center 122 (55 ~ 190) 136
3015 23:01:08.399681 iDelay=199, Bit 2, Center 116 (51 ~ 182) 132
3016 23:01:08.403087 iDelay=199, Bit 3, Center 114 (47 ~ 182) 136
3017 23:01:08.406451 iDelay=199, Bit 4, Center 122 (55 ~ 190) 136
3018 23:01:08.409727 iDelay=199, Bit 5, Center 114 (51 ~ 178) 128
3019 23:01:08.416184 iDelay=199, Bit 6, Center 128 (59 ~ 198) 140
3020 23:01:08.419381 iDelay=199, Bit 7, Center 124 (55 ~ 194) 140
3021 23:01:08.422824 iDelay=199, Bit 8, Center 98 (35 ~ 162) 128
3022 23:01:08.426402 iDelay=199, Bit 9, Center 94 (31 ~ 158) 128
3023 23:01:08.429634 iDelay=199, Bit 10, Center 110 (47 ~ 174) 128
3024 23:01:08.432982 iDelay=199, Bit 11, Center 106 (43 ~ 170) 128
3025 23:01:08.439609 iDelay=199, Bit 12, Center 112 (47 ~ 178) 132
3026 23:01:08.442967 iDelay=199, Bit 13, Center 110 (47 ~ 174) 128
3027 23:01:08.446409 iDelay=199, Bit 14, Center 118 (55 ~ 182) 128
3028 23:01:08.449591 iDelay=199, Bit 15, Center 114 (51 ~ 178) 128
3029 23:01:08.449678 ==
3030 23:01:08.453064 Dram Type= 6, Freq= 0, CH_0, rank 1
3031 23:01:08.459443 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3032 23:01:08.459534 ==
3033 23:01:08.459622 DQS Delay:
3034 23:01:08.462904 DQS0 = 0, DQS1 = 0
3035 23:01:08.462991 DQM Delay:
3036 23:01:08.466313 DQM0 = 119, DQM1 = 107
3037 23:01:08.466398 DQ Delay:
3038 23:01:08.469148 DQ0 =118, DQ1 =122, DQ2 =116, DQ3 =114
3039 23:01:08.472892 DQ4 =122, DQ5 =114, DQ6 =128, DQ7 =124
3040 23:01:08.476187 DQ8 =98, DQ9 =94, DQ10 =110, DQ11 =106
3041 23:01:08.479488 DQ12 =112, DQ13 =110, DQ14 =118, DQ15 =114
3042 23:01:08.479575
3043 23:01:08.479660
3044 23:01:08.489191 [DQSOSCAuto] RK1, (LSB)MR18= 0xcf4, (MSB)MR19= 0x403, tDQSOscB0 = 415 ps tDQSOscB1 = 405 ps
3045 23:01:08.489279 CH0 RK1: MR19=403, MR18=CF4
3046 23:01:08.495881 CH0_RK1: MR19=0x403, MR18=0xCF4, DQSOSC=405, MR23=63, INC=39, DEC=26
3047 23:01:08.499092 [RxdqsGatingPostProcess] freq 1200
3048 23:01:08.505660 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
3049 23:01:08.509083 best DQS0 dly(2T, 0.5T) = (0, 11)
3050 23:01:08.512482 best DQS1 dly(2T, 0.5T) = (0, 11)
3051 23:01:08.515829 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3052 23:01:08.519484 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3053 23:01:08.519571 best DQS0 dly(2T, 0.5T) = (0, 11)
3054 23:01:08.522605 best DQS1 dly(2T, 0.5T) = (0, 11)
3055 23:01:08.526173 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3056 23:01:08.529254 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3057 23:01:08.532607 Pre-setting of DQS Precalculation
3058 23:01:08.539345 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
3059 23:01:08.539432 ==
3060 23:01:08.542659 Dram Type= 6, Freq= 0, CH_1, rank 0
3061 23:01:08.546170 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3062 23:01:08.546256 ==
3063 23:01:08.552534 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3064 23:01:08.559218 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=27, u1VrefScanEnd=37
3065 23:01:08.566345 [CA 0] Center 37 (7~68) winsize 62
3066 23:01:08.569930 [CA 1] Center 37 (7~68) winsize 62
3067 23:01:08.573355 [CA 2] Center 35 (5~65) winsize 61
3068 23:01:08.576442 [CA 3] Center 34 (4~65) winsize 62
3069 23:01:08.579683 [CA 4] Center 34 (4~65) winsize 62
3070 23:01:08.582865 [CA 5] Center 33 (3~64) winsize 62
3071 23:01:08.583399
3072 23:01:08.586530 [CmdBusTrainingLP45] Vref(ca) range 1: 31
3073 23:01:08.586978
3074 23:01:08.589949 [CATrainingPosCal] consider 1 rank data
3075 23:01:08.593333 u2DelayCellTimex100 = 270/100 ps
3076 23:01:08.596239 CA0 delay=37 (7~68),Diff = 4 PI (19 cell)
3077 23:01:08.599729 CA1 delay=37 (7~68),Diff = 4 PI (19 cell)
3078 23:01:08.606288 CA2 delay=35 (5~65),Diff = 2 PI (9 cell)
3079 23:01:08.609601 CA3 delay=34 (4~65),Diff = 1 PI (4 cell)
3080 23:01:08.612862 CA4 delay=34 (4~65),Diff = 1 PI (4 cell)
3081 23:01:08.616125 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
3082 23:01:08.616553
3083 23:01:08.619520 CA PerBit enable=1, Macro0, CA PI delay=33
3084 23:01:08.619949
3085 23:01:08.622868 [CBTSetCACLKResult] CA Dly = 33
3086 23:01:08.623297 CS Dly: 5 (0~36)
3087 23:01:08.626077 ==
3088 23:01:08.626506 Dram Type= 6, Freq= 0, CH_1, rank 1
3089 23:01:08.632861 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3090 23:01:08.633293 ==
3091 23:01:08.635903 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3092 23:01:08.642727 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
3093 23:01:08.651817 [CA 0] Center 38 (8~68) winsize 61
3094 23:01:08.655381 [CA 1] Center 38 (7~69) winsize 63
3095 23:01:08.658754 [CA 2] Center 35 (5~66) winsize 62
3096 23:01:08.661796 [CA 3] Center 35 (5~65) winsize 61
3097 23:01:08.665303 [CA 4] Center 35 (5~65) winsize 61
3098 23:01:08.668588 [CA 5] Center 34 (4~64) winsize 61
3099 23:01:08.669058
3100 23:01:08.671719 [CmdBusTrainingLP45] Vref(ca) range 1: 35
3101 23:01:08.672145
3102 23:01:08.675169 [CATrainingPosCal] consider 2 rank data
3103 23:01:08.678499 u2DelayCellTimex100 = 270/100 ps
3104 23:01:08.681825 CA0 delay=38 (8~68),Diff = 4 PI (19 cell)
3105 23:01:08.685196 CA1 delay=37 (7~68),Diff = 3 PI (14 cell)
3106 23:01:08.691933 CA2 delay=35 (5~65),Diff = 1 PI (4 cell)
3107 23:01:08.695277 CA3 delay=35 (5~65),Diff = 1 PI (4 cell)
3108 23:01:08.698639 CA4 delay=35 (5~65),Diff = 1 PI (4 cell)
3109 23:01:08.702018 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
3110 23:01:08.702472
3111 23:01:08.705341 CA PerBit enable=1, Macro0, CA PI delay=34
3112 23:01:08.705769
3113 23:01:08.708763 [CBTSetCACLKResult] CA Dly = 34
3114 23:01:08.709258 CS Dly: 6 (0~39)
3115 23:01:08.709596
3116 23:01:08.712083 ----->DramcWriteLeveling(PI) begin...
3117 23:01:08.715273 ==
3118 23:01:08.715697 Dram Type= 6, Freq= 0, CH_1, rank 0
3119 23:01:08.722022 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3120 23:01:08.722638 ==
3121 23:01:08.725383 Write leveling (Byte 0): 24 => 24
3122 23:01:08.728603 Write leveling (Byte 1): 27 => 27
3123 23:01:08.731871 DramcWriteLeveling(PI) end<-----
3124 23:01:08.732309
3125 23:01:08.732746 ==
3126 23:01:08.735590 Dram Type= 6, Freq= 0, CH_1, rank 0
3127 23:01:08.738740 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3128 23:01:08.739215 ==
3129 23:01:08.741877 [Gating] SW mode calibration
3130 23:01:08.748703 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
3131 23:01:08.751305 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
3132 23:01:08.757979 0 15 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3133 23:01:08.761471 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3134 23:01:08.764960 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3135 23:01:08.771304 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3136 23:01:08.774766 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3137 23:01:08.777972 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
3138 23:01:08.784571 0 15 24 | B1->B0 | 2c2c 2626 | 0 0 | (0 1) (1 0)
3139 23:01:08.787855 0 15 28 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
3140 23:01:08.791163 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3141 23:01:08.797747 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3142 23:01:08.801185 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3143 23:01:08.804544 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3144 23:01:08.811149 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3145 23:01:08.814646 1 0 20 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
3146 23:01:08.817973 1 0 24 | B1->B0 | 3e3e 4545 | 0 0 | (0 0) (0 0)
3147 23:01:08.824671 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3148 23:01:08.827966 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3149 23:01:08.831276 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3150 23:01:08.838063 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3151 23:01:08.841143 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3152 23:01:08.844707 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3153 23:01:08.851064 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3154 23:01:08.854386 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3155 23:01:08.857705 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
3156 23:01:08.864453 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3157 23:01:08.867648 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3158 23:01:08.870933 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3159 23:01:08.877815 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3160 23:01:08.880901 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3161 23:01:08.884467 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3162 23:01:08.887990 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3163 23:01:08.894555 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3164 23:01:08.897854 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3165 23:01:08.901201 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3166 23:01:08.907753 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3167 23:01:08.911034 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3168 23:01:08.913924 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3169 23:01:08.921066 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3170 23:01:08.923953 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3171 23:01:08.927255 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3172 23:01:08.930619 Total UI for P1: 0, mck2ui 16
3173 23:01:08.933980 best dqsien dly found for B0: ( 1, 3, 24)
3174 23:01:08.937338 Total UI for P1: 0, mck2ui 16
3175 23:01:08.940633 best dqsien dly found for B1: ( 1, 3, 24)
3176 23:01:08.943953 best DQS0 dly(MCK, UI, PI) = (1, 3, 24)
3177 23:01:08.947665 best DQS1 dly(MCK, UI, PI) = (1, 3, 24)
3178 23:01:08.947751
3179 23:01:08.954501 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 24)
3180 23:01:08.957882 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 24)
3181 23:01:08.961004 [Gating] SW calibration Done
3182 23:01:08.961431 ==
3183 23:01:08.964130 Dram Type= 6, Freq= 0, CH_1, rank 0
3184 23:01:08.967875 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3185 23:01:08.968349 ==
3186 23:01:08.968695 RX Vref Scan: 0
3187 23:01:08.969085
3188 23:01:08.971166 RX Vref 0 -> 0, step: 1
3189 23:01:08.971638
3190 23:01:08.974239 RX Delay -40 -> 252, step: 8
3191 23:01:08.977779 iDelay=200, Bit 0, Center 123 (56 ~ 191) 136
3192 23:01:08.981114 iDelay=200, Bit 1, Center 115 (48 ~ 183) 136
3193 23:01:08.987658 iDelay=200, Bit 2, Center 107 (40 ~ 175) 136
3194 23:01:08.991155 iDelay=200, Bit 3, Center 123 (56 ~ 191) 136
3195 23:01:08.994098 iDelay=200, Bit 4, Center 119 (56 ~ 183) 128
3196 23:01:08.998026 iDelay=200, Bit 5, Center 127 (64 ~ 191) 128
3197 23:01:09.000902 iDelay=200, Bit 6, Center 127 (56 ~ 199) 144
3198 23:01:09.007570 iDelay=200, Bit 7, Center 123 (56 ~ 191) 136
3199 23:01:09.010961 iDelay=200, Bit 8, Center 99 (32 ~ 167) 136
3200 23:01:09.014151 iDelay=200, Bit 9, Center 99 (32 ~ 167) 136
3201 23:01:09.017510 iDelay=200, Bit 10, Center 115 (48 ~ 183) 136
3202 23:01:09.020905 iDelay=200, Bit 11, Center 107 (40 ~ 175) 136
3203 23:01:09.024325 iDelay=200, Bit 12, Center 123 (56 ~ 191) 136
3204 23:01:09.030964 iDelay=200, Bit 13, Center 119 (48 ~ 191) 144
3205 23:01:09.034356 iDelay=200, Bit 14, Center 119 (48 ~ 191) 144
3206 23:01:09.037732 iDelay=200, Bit 15, Center 119 (48 ~ 191) 144
3207 23:01:09.038166 ==
3208 23:01:09.040959 Dram Type= 6, Freq= 0, CH_1, rank 0
3209 23:01:09.044303 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3210 23:01:09.047720 ==
3211 23:01:09.048151 DQS Delay:
3212 23:01:09.048513 DQS0 = 0, DQS1 = 0
3213 23:01:09.051004 DQM Delay:
3214 23:01:09.051436 DQM0 = 120, DQM1 = 112
3215 23:01:09.054319 DQ Delay:
3216 23:01:09.057739 DQ0 =123, DQ1 =115, DQ2 =107, DQ3 =123
3217 23:01:09.060865 DQ4 =119, DQ5 =127, DQ6 =127, DQ7 =123
3218 23:01:09.064245 DQ8 =99, DQ9 =99, DQ10 =115, DQ11 =107
3219 23:01:09.067674 DQ12 =123, DQ13 =119, DQ14 =119, DQ15 =119
3220 23:01:09.068125
3221 23:01:09.068477
3222 23:01:09.068951 ==
3223 23:01:09.070873 Dram Type= 6, Freq= 0, CH_1, rank 0
3224 23:01:09.074016 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3225 23:01:09.074479 ==
3226 23:01:09.074827
3227 23:01:09.077615
3228 23:01:09.078046 TX Vref Scan disable
3229 23:01:09.080814 == TX Byte 0 ==
3230 23:01:09.083920 Update DQ dly =842 (3 ,2, 10) DQ OEN =(2 ,7)
3231 23:01:09.087173 Update DQM dly =842 (3 ,2, 10) DQM OEN =(2 ,7)
3232 23:01:09.091003 == TX Byte 1 ==
3233 23:01:09.094059 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3234 23:01:09.097176 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3235 23:01:09.097777 ==
3236 23:01:09.100638 Dram Type= 6, Freq= 0, CH_1, rank 0
3237 23:01:09.107623 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3238 23:01:09.108155 ==
3239 23:01:09.117551 TX Vref=22, minBit 1, minWin=24, winSum=403
3240 23:01:09.120725 TX Vref=24, minBit 1, minWin=25, winSum=407
3241 23:01:09.124086 TX Vref=26, minBit 1, minWin=25, winSum=412
3242 23:01:09.127492 TX Vref=28, minBit 10, minWin=25, winSum=422
3243 23:01:09.130495 TX Vref=30, minBit 11, minWin=25, winSum=423
3244 23:01:09.137708 TX Vref=32, minBit 9, minWin=25, winSum=420
3245 23:01:09.140919 [TxChooseVref] Worse bit 11, Min win 25, Win sum 423, Final Vref 30
3246 23:01:09.141444
3247 23:01:09.144315 Final TX Range 1 Vref 30
3248 23:01:09.144912
3249 23:01:09.145276 ==
3250 23:01:09.147145 Dram Type= 6, Freq= 0, CH_1, rank 0
3251 23:01:09.150534 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3252 23:01:09.153807 ==
3253 23:01:09.154278
3254 23:01:09.154629
3255 23:01:09.154973 TX Vref Scan disable
3256 23:01:09.157454 == TX Byte 0 ==
3257 23:01:09.160818 Update DQ dly =842 (3 ,2, 10) DQ OEN =(2 ,7)
3258 23:01:09.164209 Update DQM dly =842 (3 ,2, 10) DQM OEN =(2 ,7)
3259 23:01:09.167452 == TX Byte 1 ==
3260 23:01:09.171024 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3261 23:01:09.174115 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3262 23:01:09.177346
3263 23:01:09.177892 [DATLAT]
3264 23:01:09.178264 Freq=1200, CH1 RK0
3265 23:01:09.178775
3266 23:01:09.181203 DATLAT Default: 0xd
3267 23:01:09.181647 0, 0xFFFF, sum = 0
3268 23:01:09.184404 1, 0xFFFF, sum = 0
3269 23:01:09.184887 2, 0xFFFF, sum = 0
3270 23:01:09.187454 3, 0xFFFF, sum = 0
3271 23:01:09.190920 4, 0xFFFF, sum = 0
3272 23:01:09.191359 5, 0xFFFF, sum = 0
3273 23:01:09.194481 6, 0xFFFF, sum = 0
3274 23:01:09.195148 7, 0xFFFF, sum = 0
3275 23:01:09.197371 8, 0xFFFF, sum = 0
3276 23:01:09.197813 9, 0xFFFF, sum = 0
3277 23:01:09.201084 10, 0xFFFF, sum = 0
3278 23:01:09.201805 11, 0xFFFF, sum = 0
3279 23:01:09.204521 12, 0x0, sum = 1
3280 23:01:09.205165 13, 0x0, sum = 2
3281 23:01:09.207782 14, 0x0, sum = 3
3282 23:01:09.208325 15, 0x0, sum = 4
3283 23:01:09.208904 best_step = 13
3284 23:01:09.209428
3285 23:01:09.210698 ==
3286 23:01:09.214089 Dram Type= 6, Freq= 0, CH_1, rank 0
3287 23:01:09.217416 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3288 23:01:09.217843 ==
3289 23:01:09.218180 RX Vref Scan: 1
3290 23:01:09.218555
3291 23:01:09.220748 Set Vref Range= 32 -> 127
3292 23:01:09.221214
3293 23:01:09.224112 RX Vref 32 -> 127, step: 1
3294 23:01:09.224529
3295 23:01:09.227430 RX Delay -13 -> 252, step: 4
3296 23:01:09.227846
3297 23:01:09.230735 Set Vref, RX VrefLevel [Byte0]: 32
3298 23:01:09.234131 [Byte1]: 32
3299 23:01:09.234549
3300 23:01:09.237386 Set Vref, RX VrefLevel [Byte0]: 33
3301 23:01:09.240714 [Byte1]: 33
3302 23:01:09.244280
3303 23:01:09.244695 Set Vref, RX VrefLevel [Byte0]: 34
3304 23:01:09.248000 [Byte1]: 34
3305 23:01:09.251917
3306 23:01:09.252431 Set Vref, RX VrefLevel [Byte0]: 35
3307 23:01:09.255324 [Byte1]: 35
3308 23:01:09.260068
3309 23:01:09.260585 Set Vref, RX VrefLevel [Byte0]: 36
3310 23:01:09.263126 [Byte1]: 36
3311 23:01:09.267406
3312 23:01:09.267819 Set Vref, RX VrefLevel [Byte0]: 37
3313 23:01:09.270876 [Byte1]: 37
3314 23:01:09.275418
3315 23:01:09.275834 Set Vref, RX VrefLevel [Byte0]: 38
3316 23:01:09.279180 [Byte1]: 38
3317 23:01:09.283149
3318 23:01:09.283569 Set Vref, RX VrefLevel [Byte0]: 39
3319 23:01:09.286855 [Byte1]: 39
3320 23:01:09.291178
3321 23:01:09.291600 Set Vref, RX VrefLevel [Byte0]: 40
3322 23:01:09.294582 [Byte1]: 40
3323 23:01:09.298802
3324 23:01:09.299244 Set Vref, RX VrefLevel [Byte0]: 41
3325 23:01:09.302279 [Byte1]: 41
3326 23:01:09.306671
3327 23:01:09.307087 Set Vref, RX VrefLevel [Byte0]: 42
3328 23:01:09.309861 [Byte1]: 42
3329 23:01:09.314618
3330 23:01:09.314701 Set Vref, RX VrefLevel [Byte0]: 43
3331 23:01:09.317789 [Byte1]: 43
3332 23:01:09.322219
3333 23:01:09.322328 Set Vref, RX VrefLevel [Byte0]: 44
3334 23:01:09.325536 [Byte1]: 44
3335 23:01:09.330328
3336 23:01:09.330411 Set Vref, RX VrefLevel [Byte0]: 45
3337 23:01:09.333738 [Byte1]: 45
3338 23:01:09.338429
3339 23:01:09.338511 Set Vref, RX VrefLevel [Byte0]: 46
3340 23:01:09.341341 [Byte1]: 46
3341 23:01:09.346261
3342 23:01:09.346341 Set Vref, RX VrefLevel [Byte0]: 47
3343 23:01:09.349146 [Byte1]: 47
3344 23:01:09.353851
3345 23:01:09.353932 Set Vref, RX VrefLevel [Byte0]: 48
3346 23:01:09.357142 [Byte1]: 48
3347 23:01:09.361968
3348 23:01:09.362049 Set Vref, RX VrefLevel [Byte0]: 49
3349 23:01:09.364927 [Byte1]: 49
3350 23:01:09.369794
3351 23:01:09.369875 Set Vref, RX VrefLevel [Byte0]: 50
3352 23:01:09.373002 [Byte1]: 50
3353 23:01:09.377426
3354 23:01:09.377510 Set Vref, RX VrefLevel [Byte0]: 51
3355 23:01:09.381055 [Byte1]: 51
3356 23:01:09.385562
3357 23:01:09.385646 Set Vref, RX VrefLevel [Byte0]: 52
3358 23:01:09.389049 [Byte1]: 52
3359 23:01:09.393236
3360 23:01:09.393320 Set Vref, RX VrefLevel [Byte0]: 53
3361 23:01:09.397055 [Byte1]: 53
3362 23:01:09.401473
3363 23:01:09.401556 Set Vref, RX VrefLevel [Byte0]: 54
3364 23:01:09.404513 [Byte1]: 54
3365 23:01:09.409180
3366 23:01:09.409264 Set Vref, RX VrefLevel [Byte0]: 55
3367 23:01:09.412342 [Byte1]: 55
3368 23:01:09.416746
3369 23:01:09.416855 Set Vref, RX VrefLevel [Byte0]: 56
3370 23:01:09.420241 [Byte1]: 56
3371 23:01:09.424977
3372 23:01:09.425061 Set Vref, RX VrefLevel [Byte0]: 57
3373 23:01:09.428354 [Byte1]: 57
3374 23:01:09.433101
3375 23:01:09.433189 Set Vref, RX VrefLevel [Byte0]: 58
3376 23:01:09.436403 [Byte1]: 58
3377 23:01:09.440868
3378 23:01:09.440963 Set Vref, RX VrefLevel [Byte0]: 59
3379 23:01:09.444127 [Byte1]: 59
3380 23:01:09.448706
3381 23:01:09.448829 Set Vref, RX VrefLevel [Byte0]: 60
3382 23:01:09.452032 [Byte1]: 60
3383 23:01:09.456509
3384 23:01:09.456610 Set Vref, RX VrefLevel [Byte0]: 61
3385 23:01:09.460124 [Byte1]: 61
3386 23:01:09.464517
3387 23:01:09.464725 Set Vref, RX VrefLevel [Byte0]: 62
3388 23:01:09.467677 [Byte1]: 62
3389 23:01:09.472343
3390 23:01:09.472495 Set Vref, RX VrefLevel [Byte0]: 63
3391 23:01:09.475775 [Byte1]: 63
3392 23:01:09.480386
3393 23:01:09.480590 Set Vref, RX VrefLevel [Byte0]: 64
3394 23:01:09.483570 [Byte1]: 64
3395 23:01:09.488181
3396 23:01:09.488399 Set Vref, RX VrefLevel [Byte0]: 65
3397 23:01:09.491387 [Byte1]: 65
3398 23:01:09.496098
3399 23:01:09.496272 Set Vref, RX VrefLevel [Byte0]: 66
3400 23:01:09.499344 [Byte1]: 66
3401 23:01:09.503886
3402 23:01:09.504161 Set Vref, RX VrefLevel [Byte0]: 67
3403 23:01:09.507126 [Byte1]: 67
3404 23:01:09.512038
3405 23:01:09.512338 Set Vref, RX VrefLevel [Byte0]: 68
3406 23:01:09.515082 [Byte1]: 68
3407 23:01:09.519877
3408 23:01:09.520484 Final RX Vref Byte 0 = 51 to rank0
3409 23:01:09.523572 Final RX Vref Byte 1 = 52 to rank0
3410 23:01:09.526820 Final RX Vref Byte 0 = 51 to rank1
3411 23:01:09.529545 Final RX Vref Byte 1 = 52 to rank1==
3412 23:01:09.533312 Dram Type= 6, Freq= 0, CH_1, rank 0
3413 23:01:09.540017 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3414 23:01:09.540446 ==
3415 23:01:09.540810 DQS Delay:
3416 23:01:09.541131 DQS0 = 0, DQS1 = 0
3417 23:01:09.543411 DQM Delay:
3418 23:01:09.543833 DQM0 = 119, DQM1 = 112
3419 23:01:09.546301 DQ Delay:
3420 23:01:09.549730 DQ0 =120, DQ1 =112, DQ2 =112, DQ3 =118
3421 23:01:09.553030 DQ4 =118, DQ5 =128, DQ6 =130, DQ7 =116
3422 23:01:09.556268 DQ8 =102, DQ9 =100, DQ10 =114, DQ11 =106
3423 23:01:09.559664 DQ12 =122, DQ13 =118, DQ14 =122, DQ15 =118
3424 23:01:09.560089
3425 23:01:09.560428
3426 23:01:09.569753 [DQSOSCAuto] RK0, (LSB)MR18= 0x114, (MSB)MR19= 0x404, tDQSOscB0 = 402 ps tDQSOscB1 = 409 ps
3427 23:01:09.570181 CH1 RK0: MR19=404, MR18=114
3428 23:01:09.576434 CH1_RK0: MR19=0x404, MR18=0x114, DQSOSC=402, MR23=63, INC=40, DEC=27
3429 23:01:09.576891
3430 23:01:09.579805 ----->DramcWriteLeveling(PI) begin...
3431 23:01:09.580234 ==
3432 23:01:09.583114 Dram Type= 6, Freq= 0, CH_1, rank 1
3433 23:01:09.586549 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3434 23:01:09.589388 ==
3435 23:01:09.593051 Write leveling (Byte 0): 26 => 26
3436 23:01:09.593493 Write leveling (Byte 1): 30 => 30
3437 23:01:09.596318 DramcWriteLeveling(PI) end<-----
3438 23:01:09.596885
3439 23:01:09.597369 ==
3440 23:01:09.599888 Dram Type= 6, Freq= 0, CH_1, rank 1
3441 23:01:09.605952 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3442 23:01:09.606472 ==
3443 23:01:09.609546 [Gating] SW mode calibration
3444 23:01:09.616032 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
3445 23:01:09.619574 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
3446 23:01:09.626053 0 15 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3447 23:01:09.629605 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3448 23:01:09.632939 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3449 23:01:09.639228 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3450 23:01:09.642589 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3451 23:01:09.646192 0 15 20 | B1->B0 | 3434 3434 | 0 1 | (0 0) (1 0)
3452 23:01:09.653037 0 15 24 | B1->B0 | 2828 3434 | 1 0 | (1 0) (0 1)
3453 23:01:09.656359 0 15 28 | B1->B0 | 2323 2b2b | 0 0 | (0 0) (0 0)
3454 23:01:09.659744 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3455 23:01:09.663023 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3456 23:01:09.669280 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3457 23:01:09.672599 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3458 23:01:09.676143 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3459 23:01:09.682598 1 0 20 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
3460 23:01:09.685957 1 0 24 | B1->B0 | 3737 2626 | 0 0 | (0 0) (0 0)
3461 23:01:09.689244 1 0 28 | B1->B0 | 4646 3d3d | 0 0 | (0 0) (1 1)
3462 23:01:09.696002 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3463 23:01:09.699119 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3464 23:01:09.702551 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3465 23:01:09.709031 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3466 23:01:09.712222 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3467 23:01:09.715457 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3468 23:01:09.722269 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3469 23:01:09.725501 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3470 23:01:09.728998 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3471 23:01:09.735606 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3472 23:01:09.738450 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3473 23:01:09.742230 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3474 23:01:09.748811 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3475 23:01:09.752084 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3476 23:01:09.755533 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3477 23:01:09.762305 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3478 23:01:09.765617 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3479 23:01:09.768842 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3480 23:01:09.775435 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3481 23:01:09.778708 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3482 23:01:09.782043 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3483 23:01:09.788205 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
3484 23:01:09.791652 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3485 23:01:09.794935 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3486 23:01:09.801584 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3487 23:01:09.802025 Total UI for P1: 0, mck2ui 16
3488 23:01:09.807916 best dqsien dly found for B0: ( 1, 3, 26)
3489 23:01:09.808351 Total UI for P1: 0, mck2ui 16
3490 23:01:09.814760 best dqsien dly found for B1: ( 1, 3, 24)
3491 23:01:09.818134 best DQS0 dly(MCK, UI, PI) = (1, 3, 26)
3492 23:01:09.821594 best DQS1 dly(MCK, UI, PI) = (1, 3, 24)
3493 23:01:09.822028
3494 23:01:09.824549 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 26)
3495 23:01:09.828295 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 24)
3496 23:01:09.831368 [Gating] SW calibration Done
3497 23:01:09.831953 ==
3498 23:01:09.834408 Dram Type= 6, Freq= 0, CH_1, rank 1
3499 23:01:09.837815 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3500 23:01:09.838282 ==
3501 23:01:09.841018 RX Vref Scan: 0
3502 23:01:09.841452
3503 23:01:09.841797 RX Vref 0 -> 0, step: 1
3504 23:01:09.842120
3505 23:01:09.844504 RX Delay -40 -> 252, step: 8
3506 23:01:09.851146 iDelay=200, Bit 0, Center 123 (64 ~ 183) 120
3507 23:01:09.854314 iDelay=200, Bit 1, Center 111 (48 ~ 175) 128
3508 23:01:09.857206 iDelay=200, Bit 2, Center 111 (48 ~ 175) 128
3509 23:01:09.860455 iDelay=200, Bit 3, Center 119 (48 ~ 191) 144
3510 23:01:09.863757 iDelay=200, Bit 4, Center 123 (56 ~ 191) 136
3511 23:01:09.870481 iDelay=200, Bit 5, Center 131 (64 ~ 199) 136
3512 23:01:09.873901 iDelay=200, Bit 6, Center 127 (64 ~ 191) 128
3513 23:01:09.877318 iDelay=200, Bit 7, Center 115 (48 ~ 183) 136
3514 23:01:09.880409 iDelay=200, Bit 8, Center 99 (32 ~ 167) 136
3515 23:01:09.883889 iDelay=200, Bit 9, Center 103 (40 ~ 167) 128
3516 23:01:09.890500 iDelay=200, Bit 10, Center 115 (48 ~ 183) 136
3517 23:01:09.893992 iDelay=200, Bit 11, Center 107 (40 ~ 175) 136
3518 23:01:09.897337 iDelay=200, Bit 12, Center 119 (48 ~ 191) 144
3519 23:01:09.900635 iDelay=200, Bit 13, Center 119 (48 ~ 191) 144
3520 23:01:09.904053 iDelay=200, Bit 14, Center 119 (48 ~ 191) 144
3521 23:01:09.910788 iDelay=200, Bit 15, Center 123 (48 ~ 199) 152
3522 23:01:09.910985 ==
3523 23:01:09.913550 Dram Type= 6, Freq= 0, CH_1, rank 1
3524 23:01:09.917009 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3525 23:01:09.917168 ==
3526 23:01:09.917274 DQS Delay:
3527 23:01:09.920267 DQS0 = 0, DQS1 = 0
3528 23:01:09.920407 DQM Delay:
3529 23:01:09.923783 DQM0 = 120, DQM1 = 113
3530 23:01:09.924080 DQ Delay:
3531 23:01:09.927099 DQ0 =123, DQ1 =111, DQ2 =111, DQ3 =119
3532 23:01:09.930433 DQ4 =123, DQ5 =131, DQ6 =127, DQ7 =115
3533 23:01:09.933607 DQ8 =99, DQ9 =103, DQ10 =115, DQ11 =107
3534 23:01:09.936974 DQ12 =119, DQ13 =119, DQ14 =119, DQ15 =123
3535 23:01:09.937259
3536 23:01:09.939959
3537 23:01:09.940212 ==
3538 23:01:09.943917 Dram Type= 6, Freq= 0, CH_1, rank 1
3539 23:01:09.946663 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3540 23:01:09.946988 ==
3541 23:01:09.947235
3542 23:01:09.947467
3543 23:01:09.949864 TX Vref Scan disable
3544 23:01:09.950281 == TX Byte 0 ==
3545 23:01:09.956479 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
3546 23:01:09.960293 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
3547 23:01:09.960861 == TX Byte 1 ==
3548 23:01:09.966918 Update DQ dly =846 (3 ,2, 14) DQ OEN =(2 ,7)
3549 23:01:09.970209 Update DQM dly =846 (3 ,2, 14) DQM OEN =(2 ,7)
3550 23:01:09.970796 ==
3551 23:01:09.973605 Dram Type= 6, Freq= 0, CH_1, rank 1
3552 23:01:09.976575 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3553 23:01:09.977098 ==
3554 23:01:09.989153 TX Vref=22, minBit 1, minWin=25, winSum=417
3555 23:01:09.992438 TX Vref=24, minBit 1, minWin=25, winSum=421
3556 23:01:09.995985 TX Vref=26, minBit 1, minWin=26, winSum=429
3557 23:01:09.999153 TX Vref=28, minBit 8, minWin=26, winSum=432
3558 23:01:10.002408 TX Vref=30, minBit 13, minWin=26, winSum=434
3559 23:01:10.008762 TX Vref=32, minBit 1, minWin=26, winSum=430
3560 23:01:10.012109 [TxChooseVref] Worse bit 13, Min win 26, Win sum 434, Final Vref 30
3561 23:01:10.012543
3562 23:01:10.015321 Final TX Range 1 Vref 30
3563 23:01:10.015758
3564 23:01:10.016103 ==
3565 23:01:10.018671 Dram Type= 6, Freq= 0, CH_1, rank 1
3566 23:01:10.025375 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3567 23:01:10.025810 ==
3568 23:01:10.026203
3569 23:01:10.026538
3570 23:01:10.026848 TX Vref Scan disable
3571 23:01:10.028737 == TX Byte 0 ==
3572 23:01:10.032184 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
3573 23:01:10.038747 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
3574 23:01:10.039185 == TX Byte 1 ==
3575 23:01:10.042086 Update DQ dly =847 (3 ,2, 15) DQ OEN =(2 ,7)
3576 23:01:10.048617 Update DQM dly =847 (3 ,2, 15) DQM OEN =(2 ,7)
3577 23:01:10.049113
3578 23:01:10.049466 [DATLAT]
3579 23:01:10.049791 Freq=1200, CH1 RK1
3580 23:01:10.050114
3581 23:01:10.052257 DATLAT Default: 0xd
3582 23:01:10.052708 0, 0xFFFF, sum = 0
3583 23:01:10.055542 1, 0xFFFF, sum = 0
3584 23:01:10.058772 2, 0xFFFF, sum = 0
3585 23:01:10.059211 3, 0xFFFF, sum = 0
3586 23:01:10.061561 4, 0xFFFF, sum = 0
3587 23:01:10.061646 5, 0xFFFF, sum = 0
3588 23:01:10.065038 6, 0xFFFF, sum = 0
3589 23:01:10.065124 7, 0xFFFF, sum = 0
3590 23:01:10.068318 8, 0xFFFF, sum = 0
3591 23:01:10.068403 9, 0xFFFF, sum = 0
3592 23:01:10.071685 10, 0xFFFF, sum = 0
3593 23:01:10.071771 11, 0xFFFF, sum = 0
3594 23:01:10.075076 12, 0x0, sum = 1
3595 23:01:10.075162 13, 0x0, sum = 2
3596 23:01:10.077953 14, 0x0, sum = 3
3597 23:01:10.078039 15, 0x0, sum = 4
3598 23:01:10.081519 best_step = 13
3599 23:01:10.081603
3600 23:01:10.081669 ==
3601 23:01:10.084895 Dram Type= 6, Freq= 0, CH_1, rank 1
3602 23:01:10.088228 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3603 23:01:10.088312 ==
3604 23:01:10.091560 RX Vref Scan: 0
3605 23:01:10.091645
3606 23:01:10.091712 RX Vref 0 -> 0, step: 1
3607 23:01:10.091775
3608 23:01:10.094924 RX Delay -13 -> 252, step: 4
3609 23:01:10.101169 iDelay=195, Bit 0, Center 122 (63 ~ 182) 120
3610 23:01:10.104504 iDelay=195, Bit 1, Center 114 (55 ~ 174) 120
3611 23:01:10.107778 iDelay=195, Bit 2, Center 108 (51 ~ 166) 116
3612 23:01:10.111265 iDelay=195, Bit 3, Center 116 (55 ~ 178) 124
3613 23:01:10.114539 iDelay=195, Bit 4, Center 122 (63 ~ 182) 120
3614 23:01:10.120954 iDelay=195, Bit 5, Center 130 (67 ~ 194) 128
3615 23:01:10.124283 iDelay=195, Bit 6, Center 126 (67 ~ 186) 120
3616 23:01:10.127664 iDelay=195, Bit 7, Center 116 (55 ~ 178) 124
3617 23:01:10.130974 iDelay=195, Bit 8, Center 100 (39 ~ 162) 124
3618 23:01:10.134207 iDelay=195, Bit 9, Center 102 (39 ~ 166) 128
3619 23:01:10.140818 iDelay=195, Bit 10, Center 112 (47 ~ 178) 132
3620 23:01:10.143997 iDelay=195, Bit 11, Center 108 (43 ~ 174) 132
3621 23:01:10.147499 iDelay=195, Bit 12, Center 122 (59 ~ 186) 128
3622 23:01:10.150719 iDelay=195, Bit 13, Center 118 (55 ~ 182) 128
3623 23:01:10.154340 iDelay=195, Bit 14, Center 122 (59 ~ 186) 128
3624 23:01:10.160961 iDelay=195, Bit 15, Center 124 (59 ~ 190) 132
3625 23:01:10.161046 ==
3626 23:01:10.164222 Dram Type= 6, Freq= 0, CH_1, rank 1
3627 23:01:10.167186 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3628 23:01:10.167270 ==
3629 23:01:10.167338 DQS Delay:
3630 23:01:10.170631 DQS0 = 0, DQS1 = 0
3631 23:01:10.170716 DQM Delay:
3632 23:01:10.173982 DQM0 = 119, DQM1 = 113
3633 23:01:10.174066 DQ Delay:
3634 23:01:10.177524 DQ0 =122, DQ1 =114, DQ2 =108, DQ3 =116
3635 23:01:10.180863 DQ4 =122, DQ5 =130, DQ6 =126, DQ7 =116
3636 23:01:10.184264 DQ8 =100, DQ9 =102, DQ10 =112, DQ11 =108
3637 23:01:10.187683 DQ12 =122, DQ13 =118, DQ14 =122, DQ15 =124
3638 23:01:10.191213
3639 23:01:10.191386
3640 23:01:10.197255 [DQSOSCAuto] RK1, (LSB)MR18= 0xaef, (MSB)MR19= 0x403, tDQSOscB0 = 417 ps tDQSOscB1 = 406 ps
3641 23:01:10.200848 CH1 RK1: MR19=403, MR18=AEF
3642 23:01:10.207424 CH1_RK1: MR19=0x403, MR18=0xAEF, DQSOSC=406, MR23=63, INC=39, DEC=26
3643 23:01:10.211143 [RxdqsGatingPostProcess] freq 1200
3644 23:01:10.214228 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
3645 23:01:10.217239 best DQS0 dly(2T, 0.5T) = (0, 11)
3646 23:01:10.220667 best DQS1 dly(2T, 0.5T) = (0, 11)
3647 23:01:10.224148 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3648 23:01:10.227535 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3649 23:01:10.230647 best DQS0 dly(2T, 0.5T) = (0, 11)
3650 23:01:10.233573 best DQS1 dly(2T, 0.5T) = (0, 11)
3651 23:01:10.237329 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3652 23:01:10.240633 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3653 23:01:10.243878 Pre-setting of DQS Precalculation
3654 23:01:10.246977 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
3655 23:01:10.253801 sync_frequency_calibration_params sync calibration params of frequency 1200 to shu:2
3656 23:01:10.263646 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
3657 23:01:10.264081
3658 23:01:10.264419
3659 23:01:10.267186 [Calibration Summary] 2400 Mbps
3660 23:01:10.267615 CH 0, Rank 0
3661 23:01:10.270276 SW Impedance : PASS
3662 23:01:10.270703 DUTY Scan : NO K
3663 23:01:10.273576 ZQ Calibration : PASS
3664 23:01:10.277101 Jitter Meter : NO K
3665 23:01:10.277629 CBT Training : PASS
3666 23:01:10.280229 Write leveling : PASS
3667 23:01:10.283308 RX DQS gating : PASS
3668 23:01:10.283737 RX DQ/DQS(RDDQC) : PASS
3669 23:01:10.286793 TX DQ/DQS : PASS
3670 23:01:10.290140 RX DATLAT : PASS
3671 23:01:10.290568 RX DQ/DQS(Engine): PASS
3672 23:01:10.293476 TX OE : NO K
3673 23:01:10.293902 All Pass.
3674 23:01:10.294244
3675 23:01:10.296899 CH 0, Rank 1
3676 23:01:10.297426 SW Impedance : PASS
3677 23:01:10.300094 DUTY Scan : NO K
3678 23:01:10.303628 ZQ Calibration : PASS
3679 23:01:10.304163 Jitter Meter : NO K
3680 23:01:10.306910 CBT Training : PASS
3681 23:01:10.307337 Write leveling : PASS
3682 23:01:10.309793 RX DQS gating : PASS
3683 23:01:10.313075 RX DQ/DQS(RDDQC) : PASS
3684 23:01:10.313503 TX DQ/DQS : PASS
3685 23:01:10.316428 RX DATLAT : PASS
3686 23:01:10.319833 RX DQ/DQS(Engine): PASS
3687 23:01:10.320262 TX OE : NO K
3688 23:01:10.323349 All Pass.
3689 23:01:10.323775
3690 23:01:10.324112 CH 1, Rank 0
3691 23:01:10.326523 SW Impedance : PASS
3692 23:01:10.326950 DUTY Scan : NO K
3693 23:01:10.329932 ZQ Calibration : PASS
3694 23:01:10.333069 Jitter Meter : NO K
3695 23:01:10.333490 CBT Training : PASS
3696 23:01:10.336468 Write leveling : PASS
3697 23:01:10.339699 RX DQS gating : PASS
3698 23:01:10.340259 RX DQ/DQS(RDDQC) : PASS
3699 23:01:10.343280 TX DQ/DQS : PASS
3700 23:01:10.346707 RX DATLAT : PASS
3701 23:01:10.347234 RX DQ/DQS(Engine): PASS
3702 23:01:10.349864 TX OE : NO K
3703 23:01:10.350323 All Pass.
3704 23:01:10.350688
3705 23:01:10.352860 CH 1, Rank 1
3706 23:01:10.353284 SW Impedance : PASS
3707 23:01:10.356497 DUTY Scan : NO K
3708 23:01:10.359685 ZQ Calibration : PASS
3709 23:01:10.360108 Jitter Meter : NO K
3710 23:01:10.362915 CBT Training : PASS
3711 23:01:10.363357 Write leveling : PASS
3712 23:01:10.366032 RX DQS gating : PASS
3713 23:01:10.369449 RX DQ/DQS(RDDQC) : PASS
3714 23:01:10.369873 TX DQ/DQS : PASS
3715 23:01:10.372801 RX DATLAT : PASS
3716 23:01:10.376216 RX DQ/DQS(Engine): PASS
3717 23:01:10.376754 TX OE : NO K
3718 23:01:10.379393 All Pass.
3719 23:01:10.379819
3720 23:01:10.380155 DramC Write-DBI off
3721 23:01:10.382454 PER_BANK_REFRESH: Hybrid Mode
3722 23:01:10.385939 TX_TRACKING: ON
3723 23:01:10.392427 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 72, TRFC_05T 1, TXREFCNT 87, TRFCpb 30, TRFCpb_05T 1
3724 23:01:10.395821 [FAST_K] Save calibration result to emmc
3725 23:01:10.399110 dramc_set_vcore_voltage set vcore to 650000
3726 23:01:10.402491 Read voltage for 600, 5
3727 23:01:10.403032 Vio18 = 0
3728 23:01:10.405972 Vcore = 650000
3729 23:01:10.406509 Vdram = 0
3730 23:01:10.406858 Vddq = 0
3731 23:01:10.409148 Vmddr = 0
3732 23:01:10.412418 [FAST_K] DramcSave_Time_For_Cal_Init SHU4, femmc_Ready=0
3733 23:01:10.419170 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
3734 23:01:10.422333 MEM_TYPE=3, freq_sel=19
3735 23:01:10.422770 sv_algorithm_assistance_LP4_1600
3736 23:01:10.428979 ============ PULL DRAM RESETB DOWN ============
3737 23:01:10.432223 ========== PULL DRAM RESETB DOWN end =========
3738 23:01:10.435677 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3739 23:01:10.438834 ===================================
3740 23:01:10.441813 LPDDR4 DRAM CONFIGURATION
3741 23:01:10.445201 ===================================
3742 23:01:10.448748 EX_ROW_EN[0] = 0x0
3743 23:01:10.449290 EX_ROW_EN[1] = 0x0
3744 23:01:10.452056 LP4Y_EN = 0x0
3745 23:01:10.452583 WORK_FSP = 0x0
3746 23:01:10.455413 WL = 0x2
3747 23:01:10.455844 RL = 0x2
3748 23:01:10.458727 BL = 0x2
3749 23:01:10.459386 RPST = 0x0
3750 23:01:10.461609 RD_PRE = 0x0
3751 23:01:10.462042 WR_PRE = 0x1
3752 23:01:10.465270 WR_PST = 0x0
3753 23:01:10.465703 DBI_WR = 0x0
3754 23:01:10.468687 DBI_RD = 0x0
3755 23:01:10.471455 OTF = 0x1
3756 23:01:10.474814 ===================================
3757 23:01:10.475252 ===================================
3758 23:01:10.478610 ANA top config
3759 23:01:10.481709 ===================================
3760 23:01:10.484871 DLL_ASYNC_EN = 0
3761 23:01:10.485378 ALL_SLAVE_EN = 1
3762 23:01:10.488283 NEW_RANK_MODE = 1
3763 23:01:10.491776 DLL_IDLE_MODE = 1
3764 23:01:10.494653 LP45_APHY_COMB_EN = 1
3765 23:01:10.498176 TX_ODT_DIS = 1
3766 23:01:10.498639 NEW_8X_MODE = 1
3767 23:01:10.501512 ===================================
3768 23:01:10.504898 ===================================
3769 23:01:10.508089 data_rate = 1200
3770 23:01:10.511442 CKR = 1
3771 23:01:10.514762 DQ_P2S_RATIO = 8
3772 23:01:10.517904 ===================================
3773 23:01:10.521127 CA_P2S_RATIO = 8
3774 23:01:10.524413 DQ_CA_OPEN = 0
3775 23:01:10.524872 DQ_SEMI_OPEN = 0
3776 23:01:10.527813 CA_SEMI_OPEN = 0
3777 23:01:10.531052 CA_FULL_RATE = 0
3778 23:01:10.534361 DQ_CKDIV4_EN = 1
3779 23:01:10.537740 CA_CKDIV4_EN = 1
3780 23:01:10.541252 CA_PREDIV_EN = 0
3781 23:01:10.541711 PH8_DLY = 0
3782 23:01:10.544645 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
3783 23:01:10.547934 DQ_AAMCK_DIV = 4
3784 23:01:10.551067 CA_AAMCK_DIV = 4
3785 23:01:10.554408 CA_ADMCK_DIV = 4
3786 23:01:10.557799 DQ_TRACK_CA_EN = 0
3787 23:01:10.560683 CA_PICK = 600
3788 23:01:10.561185 CA_MCKIO = 600
3789 23:01:10.564121 MCKIO_SEMI = 0
3790 23:01:10.567256 PLL_FREQ = 2288
3791 23:01:10.570864 DQ_UI_PI_RATIO = 32
3792 23:01:10.574291 CA_UI_PI_RATIO = 0
3793 23:01:10.577455 ===================================
3794 23:01:10.580598 ===================================
3795 23:01:10.583935 memory_type:LPDDR4
3796 23:01:10.584367 GP_NUM : 10
3797 23:01:10.587164 SRAM_EN : 1
3798 23:01:10.587622 MD32_EN : 0
3799 23:01:10.590622 ===================================
3800 23:01:10.594060 [ANA_INIT] >>>>>>>>>>>>>>
3801 23:01:10.597260 <<<<<< [CONFIGURE PHASE]: ANA_TX
3802 23:01:10.600330 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
3803 23:01:10.604077 ===================================
3804 23:01:10.607198 data_rate = 1200,PCW = 0X5800
3805 23:01:10.610834 ===================================
3806 23:01:10.614182 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
3807 23:01:10.620460 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3808 23:01:10.623996 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3809 23:01:10.630338 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
3810 23:01:10.633415 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
3811 23:01:10.636907 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
3812 23:01:10.637449 [ANA_INIT] flow start
3813 23:01:10.640306 [ANA_INIT] PLL >>>>>>>>
3814 23:01:10.643701 [ANA_INIT] PLL <<<<<<<<
3815 23:01:10.644325 [ANA_INIT] MIDPI >>>>>>>>
3816 23:01:10.646840 [ANA_INIT] MIDPI <<<<<<<<
3817 23:01:10.650053 [ANA_INIT] DLL >>>>>>>>
3818 23:01:10.650533 [ANA_INIT] flow end
3819 23:01:10.656879 ============ LP4 DIFF to SE enter ============
3820 23:01:10.660308 ============ LP4 DIFF to SE exit ============
3821 23:01:10.663815 [ANA_INIT] <<<<<<<<<<<<<
3822 23:01:10.666539 [Flow] Enable top DCM control >>>>>
3823 23:01:10.670069 [Flow] Enable top DCM control <<<<<
3824 23:01:10.670614 Enable DLL master slave shuffle
3825 23:01:10.677034 ==============================================================
3826 23:01:10.680171 Gating Mode config
3827 23:01:10.683292 ==============================================================
3828 23:01:10.686716 Config description:
3829 23:01:10.696425 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
3830 23:01:10.703035 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
3831 23:01:10.706248 SELPH_MODE 0: By rank 1: By Phase
3832 23:01:10.713069 ==============================================================
3833 23:01:10.716115 GAT_TRACK_EN = 1
3834 23:01:10.719823 RX_GATING_MODE = 2
3835 23:01:10.723114 RX_GATING_TRACK_MODE = 2
3836 23:01:10.726014 SELPH_MODE = 1
3837 23:01:10.729216 PICG_EARLY_EN = 1
3838 23:01:10.729650 VALID_LAT_VALUE = 1
3839 23:01:10.735912 ==============================================================
3840 23:01:10.739655 Enter into Gating configuration >>>>
3841 23:01:10.742531 Exit from Gating configuration <<<<
3842 23:01:10.745741 Enter into DVFS_PRE_config >>>>>
3843 23:01:10.756009 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
3844 23:01:10.759340 Exit from DVFS_PRE_config <<<<<
3845 23:01:10.763030 Enter into PICG configuration >>>>
3846 23:01:10.765660 Exit from PICG configuration <<<<
3847 23:01:10.769328 [RX_INPUT] configuration >>>>>
3848 23:01:10.772710 [RX_INPUT] configuration <<<<<
3849 23:01:10.779484 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
3850 23:01:10.782427 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
3851 23:01:10.788973 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
3852 23:01:10.795896 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
3853 23:01:10.802843 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
3854 23:01:10.808728 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
3855 23:01:10.812448 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
3856 23:01:10.815507 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
3857 23:01:10.818765 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
3858 23:01:10.825154 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
3859 23:01:10.828430 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
3860 23:01:10.832074 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3861 23:01:10.835507 ===================================
3862 23:01:10.838879 LPDDR4 DRAM CONFIGURATION
3863 23:01:10.842008 ===================================
3864 23:01:10.842545 EX_ROW_EN[0] = 0x0
3865 23:01:10.845409 EX_ROW_EN[1] = 0x0
3866 23:01:10.848984 LP4Y_EN = 0x0
3867 23:01:10.849554 WORK_FSP = 0x0
3868 23:01:10.851896 WL = 0x2
3869 23:01:10.852361 RL = 0x2
3870 23:01:10.855228 BL = 0x2
3871 23:01:10.855805 RPST = 0x0
3872 23:01:10.858697 RD_PRE = 0x0
3873 23:01:10.859275 WR_PRE = 0x1
3874 23:01:10.861871 WR_PST = 0x0
3875 23:01:10.862446 DBI_WR = 0x0
3876 23:01:10.865120 DBI_RD = 0x0
3877 23:01:10.865692 OTF = 0x1
3878 23:01:10.868454 ===================================
3879 23:01:10.871683 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
3880 23:01:10.878215 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
3881 23:01:10.881928 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3882 23:01:10.885103 ===================================
3883 23:01:10.888706 LPDDR4 DRAM CONFIGURATION
3884 23:01:10.891469 ===================================
3885 23:01:10.892054 EX_ROW_EN[0] = 0x10
3886 23:01:10.894879 EX_ROW_EN[1] = 0x0
3887 23:01:10.898087 LP4Y_EN = 0x0
3888 23:01:10.898563 WORK_FSP = 0x0
3889 23:01:10.901367 WL = 0x2
3890 23:01:10.901841 RL = 0x2
3891 23:01:10.905087 BL = 0x2
3892 23:01:10.905663 RPST = 0x0
3893 23:01:10.908044 RD_PRE = 0x0
3894 23:01:10.908517 WR_PRE = 0x1
3895 23:01:10.911478 WR_PST = 0x0
3896 23:01:10.912225 DBI_WR = 0x0
3897 23:01:10.914581 DBI_RD = 0x0
3898 23:01:10.915101 OTF = 0x1
3899 23:01:10.917892 ===================================
3900 23:01:10.924525 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
3901 23:01:10.928687 nWR fixed to 30
3902 23:01:10.932333 [ModeRegInit_LP4] CH0 RK0
3903 23:01:10.932958 [ModeRegInit_LP4] CH0 RK1
3904 23:01:10.935590 [ModeRegInit_LP4] CH1 RK0
3905 23:01:10.938851 [ModeRegInit_LP4] CH1 RK1
3906 23:01:10.939438 match AC timing 17
3907 23:01:10.945391 dramType 5, freq 600, readDBI 0, DivMode 1, cbtMode 1
3908 23:01:10.948736 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3909 23:01:10.952250 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
3910 23:01:10.958392 [TX_path_calculate] data rate=1200, WL=8, DQS_TotalUI=17
3911 23:01:10.961832 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
3912 23:01:10.962376 ==
3913 23:01:10.965183 Dram Type= 6, Freq= 0, CH_0, rank 0
3914 23:01:10.968555 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3915 23:01:10.969149 ==
3916 23:01:10.974924 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3917 23:01:10.981627 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
3918 23:01:10.984902 [CA 0] Center 36 (6~67) winsize 62
3919 23:01:10.988092 [CA 1] Center 36 (6~67) winsize 62
3920 23:01:10.991368 [CA 2] Center 34 (4~65) winsize 62
3921 23:01:10.994673 [CA 3] Center 34 (3~65) winsize 63
3922 23:01:10.998031 [CA 4] Center 34 (3~65) winsize 63
3923 23:01:11.001303 [CA 5] Center 33 (3~64) winsize 62
3924 23:01:11.001728
3925 23:01:11.004657 [CmdBusTrainingLP45] Vref(ca) range 1: 35
3926 23:01:11.005161
3927 23:01:11.008042 [CATrainingPosCal] consider 1 rank data
3928 23:01:11.011461 u2DelayCellTimex100 = 270/100 ps
3929 23:01:11.014386 CA0 delay=36 (6~67),Diff = 3 PI (28 cell)
3930 23:01:11.017748 CA1 delay=36 (6~67),Diff = 3 PI (28 cell)
3931 23:01:11.021256 CA2 delay=34 (4~65),Diff = 1 PI (9 cell)
3932 23:01:11.024332 CA3 delay=34 (3~65),Diff = 1 PI (9 cell)
3933 23:01:11.031026 CA4 delay=34 (3~65),Diff = 1 PI (9 cell)
3934 23:01:11.034475 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
3935 23:01:11.034953
3936 23:01:11.037874 CA PerBit enable=1, Macro0, CA PI delay=33
3937 23:01:11.038334
3938 23:01:11.041148 [CBTSetCACLKResult] CA Dly = 33
3939 23:01:11.041576 CS Dly: 5 (0~36)
3940 23:01:11.041936 ==
3941 23:01:11.044368 Dram Type= 6, Freq= 0, CH_0, rank 1
3942 23:01:11.051261 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3943 23:01:11.051689 ==
3944 23:01:11.054174 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3945 23:01:11.061205 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
3946 23:01:11.064546 [CA 0] Center 36 (6~67) winsize 62
3947 23:01:11.067816 [CA 1] Center 36 (6~67) winsize 62
3948 23:01:11.071275 [CA 2] Center 35 (5~66) winsize 62
3949 23:01:11.074341 [CA 3] Center 35 (4~66) winsize 63
3950 23:01:11.077568 [CA 4] Center 34 (3~65) winsize 63
3951 23:01:11.080862 [CA 5] Center 34 (3~65) winsize 63
3952 23:01:11.081290
3953 23:01:11.084358 [CmdBusTrainingLP45] Vref(ca) range 1: 33
3954 23:01:11.084867
3955 23:01:11.087498 [CATrainingPosCal] consider 2 rank data
3956 23:01:11.090735 u2DelayCellTimex100 = 270/100 ps
3957 23:01:11.093976 CA0 delay=36 (6~67),Diff = 3 PI (28 cell)
3958 23:01:11.097343 CA1 delay=36 (6~67),Diff = 3 PI (28 cell)
3959 23:01:11.104080 CA2 delay=35 (5~65),Diff = 2 PI (19 cell)
3960 23:01:11.107344 CA3 delay=34 (4~65),Diff = 1 PI (9 cell)
3961 23:01:11.110636 CA4 delay=34 (3~65),Diff = 1 PI (9 cell)
3962 23:01:11.114089 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
3963 23:01:11.114514
3964 23:01:11.117309 CA PerBit enable=1, Macro0, CA PI delay=33
3965 23:01:11.117751
3966 23:01:11.120556 [CBTSetCACLKResult] CA Dly = 33
3967 23:01:11.120885 CS Dly: 5 (0~36)
3968 23:01:11.121130
3969 23:01:11.126903 ----->DramcWriteLeveling(PI) begin...
3970 23:01:11.127210 ==
3971 23:01:11.130492 Dram Type= 6, Freq= 0, CH_0, rank 0
3972 23:01:11.133784 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3973 23:01:11.134090 ==
3974 23:01:11.137126 Write leveling (Byte 0): 34 => 34
3975 23:01:11.140126 Write leveling (Byte 1): 30 => 30
3976 23:01:11.143554 DramcWriteLeveling(PI) end<-----
3977 23:01:11.143856
3978 23:01:11.144097 ==
3979 23:01:11.146975 Dram Type= 6, Freq= 0, CH_0, rank 0
3980 23:01:11.150420 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3981 23:01:11.150725 ==
3982 23:01:11.153401 [Gating] SW mode calibration
3983 23:01:11.160561 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
3984 23:01:11.166691 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
3985 23:01:11.170197 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3986 23:01:11.173507 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3987 23:01:11.180048 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3988 23:01:11.183309 0 9 12 | B1->B0 | 3232 2f2f | 0 1 | (0 0) (1 1)
3989 23:01:11.186689 0 9 16 | B1->B0 | 2d2d 2323 | 0 0 | (0 0) (0 0)
3990 23:01:11.193359 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3991 23:01:11.196648 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3992 23:01:11.199943 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3993 23:01:11.206585 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3994 23:01:11.209435 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3995 23:01:11.212745 0 10 8 | B1->B0 | 2323 2727 | 0 0 | (0 0) (0 0)
3996 23:01:11.219444 0 10 12 | B1->B0 | 2a2a 3838 | 0 0 | (0 0) (0 0)
3997 23:01:11.223073 0 10 16 | B1->B0 | 3a3a 4646 | 0 0 | (1 1) (0 0)
3998 23:01:11.226785 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3999 23:01:11.233118 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4000 23:01:11.236536 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4001 23:01:11.239519 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4002 23:01:11.246308 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4003 23:01:11.249322 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4004 23:01:11.252502 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
4005 23:01:11.259641 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
4006 23:01:11.263259 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4007 23:01:11.266590 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4008 23:01:11.272930 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4009 23:01:11.276592 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4010 23:01:11.279713 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4011 23:01:11.282960 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4012 23:01:11.289224 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4013 23:01:11.292684 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4014 23:01:11.296120 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4015 23:01:11.302818 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4016 23:01:11.305983 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4017 23:01:11.309291 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4018 23:01:11.316034 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4019 23:01:11.319722 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4020 23:01:11.322207 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4021 23:01:11.329384 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
4022 23:01:11.332225 Total UI for P1: 0, mck2ui 16
4023 23:01:11.335681 best dqsien dly found for B0: ( 0, 13, 14)
4024 23:01:11.338978 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4025 23:01:11.342662 Total UI for P1: 0, mck2ui 16
4026 23:01:11.345821 best dqsien dly found for B1: ( 0, 13, 16)
4027 23:01:11.349033 best DQS0 dly(MCK, UI, PI) = (0, 13, 14)
4028 23:01:11.352453 best DQS1 dly(MCK, UI, PI) = (0, 13, 16)
4029 23:01:11.352913
4030 23:01:11.355911 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 14)
4031 23:01:11.358713 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 16)
4032 23:01:11.362115 [Gating] SW calibration Done
4033 23:01:11.362543 ==
4034 23:01:11.365656 Dram Type= 6, Freq= 0, CH_0, rank 0
4035 23:01:11.372036 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4036 23:01:11.372517 ==
4037 23:01:11.372890 RX Vref Scan: 0
4038 23:01:11.373216
4039 23:01:11.375320 RX Vref 0 -> 0, step: 1
4040 23:01:11.375746
4041 23:01:11.378566 RX Delay -230 -> 252, step: 16
4042 23:01:11.381982 iDelay=218, Bit 0, Center 41 (-118 ~ 201) 320
4043 23:01:11.385245 iDelay=218, Bit 1, Center 57 (-102 ~ 217) 320
4044 23:01:11.388859 iDelay=218, Bit 2, Center 41 (-118 ~ 201) 320
4045 23:01:11.395224 iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320
4046 23:01:11.398606 iDelay=218, Bit 4, Center 57 (-102 ~ 217) 320
4047 23:01:11.401955 iDelay=218, Bit 5, Center 41 (-118 ~ 201) 320
4048 23:01:11.405014 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4049 23:01:11.411949 iDelay=218, Bit 7, Center 57 (-102 ~ 217) 320
4050 23:01:11.415186 iDelay=218, Bit 8, Center 25 (-134 ~ 185) 320
4051 23:01:11.418436 iDelay=218, Bit 9, Center 25 (-134 ~ 185) 320
4052 23:01:11.421772 iDelay=218, Bit 10, Center 41 (-118 ~ 201) 320
4053 23:01:11.428045 iDelay=218, Bit 11, Center 33 (-118 ~ 185) 304
4054 23:01:11.431376 iDelay=218, Bit 12, Center 41 (-118 ~ 201) 320
4055 23:01:11.435086 iDelay=218, Bit 13, Center 49 (-102 ~ 201) 304
4056 23:01:11.438079 iDelay=218, Bit 14, Center 57 (-102 ~ 217) 320
4057 23:01:11.444514 iDelay=218, Bit 15, Center 49 (-102 ~ 201) 304
4058 23:01:11.444981 ==
4059 23:01:11.448166 Dram Type= 6, Freq= 0, CH_0, rank 0
4060 23:01:11.451262 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4061 23:01:11.451713 ==
4062 23:01:11.452054 DQS Delay:
4063 23:01:11.454635 DQS0 = 0, DQS1 = 0
4064 23:01:11.455061 DQM Delay:
4065 23:01:11.457892 DQM0 = 49, DQM1 = 40
4066 23:01:11.458320 DQ Delay:
4067 23:01:11.461366 DQ0 =41, DQ1 =57, DQ2 =41, DQ3 =41
4068 23:01:11.464576 DQ4 =57, DQ5 =41, DQ6 =57, DQ7 =57
4069 23:01:11.467897 DQ8 =25, DQ9 =25, DQ10 =41, DQ11 =33
4070 23:01:11.471373 DQ12 =41, DQ13 =49, DQ14 =57, DQ15 =49
4071 23:01:11.471824
4072 23:01:11.472165
4073 23:01:11.472482 ==
4074 23:01:11.474480 Dram Type= 6, Freq= 0, CH_0, rank 0
4075 23:01:11.477680 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4076 23:01:11.478114 ==
4077 23:01:11.478455
4078 23:01:11.481049
4079 23:01:11.481478 TX Vref Scan disable
4080 23:01:11.484597 == TX Byte 0 ==
4081 23:01:11.487588 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
4082 23:01:11.490832 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
4083 23:01:11.494045 == TX Byte 1 ==
4084 23:01:11.497453 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4085 23:01:11.501116 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4086 23:01:11.501550 ==
4087 23:01:11.504116 Dram Type= 6, Freq= 0, CH_0, rank 0
4088 23:01:11.510807 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4089 23:01:11.511247 ==
4090 23:01:11.511591
4091 23:01:11.511909
4092 23:01:11.514252 TX Vref Scan disable
4093 23:01:11.514679 == TX Byte 0 ==
4094 23:01:11.520734 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
4095 23:01:11.524173 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
4096 23:01:11.524604 == TX Byte 1 ==
4097 23:01:11.530488 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4098 23:01:11.533684 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4099 23:01:11.534113
4100 23:01:11.534453 [DATLAT]
4101 23:01:11.537077 Freq=600, CH0 RK0
4102 23:01:11.537511
4103 23:01:11.537854 DATLAT Default: 0x9
4104 23:01:11.540284 0, 0xFFFF, sum = 0
4105 23:01:11.540973 1, 0xFFFF, sum = 0
4106 23:01:11.543568 2, 0xFFFF, sum = 0
4107 23:01:11.546945 3, 0xFFFF, sum = 0
4108 23:01:11.547645 4, 0xFFFF, sum = 0
4109 23:01:11.550446 5, 0xFFFF, sum = 0
4110 23:01:11.550974 6, 0xFFFF, sum = 0
4111 23:01:11.553697 7, 0xFFFF, sum = 0
4112 23:01:11.554134 8, 0x0, sum = 1
4113 23:01:11.557221 9, 0x0, sum = 2
4114 23:01:11.557656 10, 0x0, sum = 3
4115 23:01:11.558003 11, 0x0, sum = 4
4116 23:01:11.560135 best_step = 9
4117 23:01:11.560561
4118 23:01:11.560937 ==
4119 23:01:11.563353 Dram Type= 6, Freq= 0, CH_0, rank 0
4120 23:01:11.566914 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4121 23:01:11.567345 ==
4122 23:01:11.570398 RX Vref Scan: 1
4123 23:01:11.570930
4124 23:01:11.571282 RX Vref 0 -> 0, step: 1
4125 23:01:11.573265
4126 23:01:11.573695 RX Delay -179 -> 252, step: 8
4127 23:01:11.574038
4128 23:01:11.576757 Set Vref, RX VrefLevel [Byte0]: 60
4129 23:01:11.579910 [Byte1]: 50
4130 23:01:11.584450
4131 23:01:11.584913 Final RX Vref Byte 0 = 60 to rank0
4132 23:01:11.587454 Final RX Vref Byte 1 = 50 to rank0
4133 23:01:11.590920 Final RX Vref Byte 0 = 60 to rank1
4134 23:01:11.594115 Final RX Vref Byte 1 = 50 to rank1==
4135 23:01:11.597165 Dram Type= 6, Freq= 0, CH_0, rank 0
4136 23:01:11.603664 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4137 23:01:11.603747 ==
4138 23:01:11.603812 DQS Delay:
4139 23:01:11.607212 DQS0 = 0, DQS1 = 0
4140 23:01:11.607300 DQM Delay:
4141 23:01:11.607370 DQM0 = 47, DQM1 = 41
4142 23:01:11.610631 DQ Delay:
4143 23:01:11.613718 DQ0 =44, DQ1 =44, DQ2 =44, DQ3 =44
4144 23:01:11.616956 DQ4 =48, DQ5 =40, DQ6 =60, DQ7 =56
4145 23:01:11.620294 DQ8 =36, DQ9 =28, DQ10 =36, DQ11 =36
4146 23:01:11.623657 DQ12 =48, DQ13 =44, DQ14 =52, DQ15 =48
4147 23:01:11.623777
4148 23:01:11.623867
4149 23:01:11.630376 [DQSOSCAuto] RK0, (LSB)MR18= 0x5650, (MSB)MR19= 0x808, tDQSOscB0 = 394 ps tDQSOscB1 = 393 ps
4150 23:01:11.633661 CH0 RK0: MR19=808, MR18=5650
4151 23:01:11.640209 CH0_RK0: MR19=0x808, MR18=0x5650, DQSOSC=393, MR23=63, INC=169, DEC=113
4152 23:01:11.640447
4153 23:01:11.643474 ----->DramcWriteLeveling(PI) begin...
4154 23:01:11.643754 ==
4155 23:01:11.647038 Dram Type= 6, Freq= 0, CH_0, rank 1
4156 23:01:11.650105 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4157 23:01:11.650351 ==
4158 23:01:11.653602 Write leveling (Byte 0): 31 => 31
4159 23:01:11.657138 Write leveling (Byte 1): 30 => 30
4160 23:01:11.660117 DramcWriteLeveling(PI) end<-----
4161 23:01:11.660600
4162 23:01:11.660998 ==
4163 23:01:11.663376 Dram Type= 6, Freq= 0, CH_0, rank 1
4164 23:01:11.669951 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4165 23:01:11.670529 ==
4166 23:01:11.670912 [Gating] SW mode calibration
4167 23:01:11.680052 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4168 23:01:11.683367 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4169 23:01:11.686488 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4170 23:01:11.693073 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4171 23:01:11.696569 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
4172 23:01:11.702887 0 9 12 | B1->B0 | 3232 3131 | 1 1 | (1 1) (1 0)
4173 23:01:11.706211 0 9 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
4174 23:01:11.709540 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4175 23:01:11.712964 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4176 23:01:11.719537 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4177 23:01:11.722759 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4178 23:01:11.726146 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4179 23:01:11.733102 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4180 23:01:11.735762 0 10 12 | B1->B0 | 2c2c 2f2f | 0 0 | (1 1) (0 0)
4181 23:01:11.739272 0 10 16 | B1->B0 | 4343 4646 | 0 0 | (0 0) (0 0)
4182 23:01:11.745621 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4183 23:01:11.749246 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4184 23:01:11.752737 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4185 23:01:11.758830 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4186 23:01:11.762286 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4187 23:01:11.765935 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4188 23:01:11.772521 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
4189 23:01:11.775761 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4190 23:01:11.779134 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4191 23:01:11.785492 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4192 23:01:11.788709 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4193 23:01:11.792345 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4194 23:01:11.798612 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4195 23:01:11.801806 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4196 23:01:11.805364 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4197 23:01:11.811972 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4198 23:01:11.815004 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4199 23:01:11.818282 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4200 23:01:11.825311 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4201 23:01:11.828611 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4202 23:01:11.831792 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4203 23:01:11.837754 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4204 23:01:11.841152 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4205 23:01:11.844425 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4206 23:01:11.847729 Total UI for P1: 0, mck2ui 16
4207 23:01:11.851015 best dqsien dly found for B0: ( 0, 13, 14)
4208 23:01:11.854466 Total UI for P1: 0, mck2ui 16
4209 23:01:11.857779 best dqsien dly found for B1: ( 0, 13, 14)
4210 23:01:11.861048 best DQS0 dly(MCK, UI, PI) = (0, 13, 14)
4211 23:01:11.864418 best DQS1 dly(MCK, UI, PI) = (0, 13, 14)
4212 23:01:11.867699
4213 23:01:11.870860 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 14)
4214 23:01:11.874308 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 14)
4215 23:01:11.877654 [Gating] SW calibration Done
4216 23:01:11.877726 ==
4217 23:01:11.880935 Dram Type= 6, Freq= 0, CH_0, rank 1
4218 23:01:11.884272 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4219 23:01:11.884343 ==
4220 23:01:11.884404 RX Vref Scan: 0
4221 23:01:11.887517
4222 23:01:11.887586 RX Vref 0 -> 0, step: 1
4223 23:01:11.887646
4224 23:01:11.890760 RX Delay -230 -> 252, step: 16
4225 23:01:11.893951 iDelay=218, Bit 0, Center 49 (-102 ~ 201) 304
4226 23:01:11.900740 iDelay=218, Bit 1, Center 57 (-102 ~ 217) 320
4227 23:01:11.903817 iDelay=218, Bit 2, Center 41 (-118 ~ 201) 320
4228 23:01:11.907142 iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320
4229 23:01:11.910627 iDelay=218, Bit 4, Center 49 (-102 ~ 201) 304
4230 23:01:11.913857 iDelay=218, Bit 5, Center 41 (-118 ~ 201) 320
4231 23:01:11.920471 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4232 23:01:11.923668 iDelay=218, Bit 7, Center 57 (-102 ~ 217) 320
4233 23:01:11.926784 iDelay=218, Bit 8, Center 25 (-134 ~ 185) 320
4234 23:01:11.930259 iDelay=218, Bit 9, Center 25 (-134 ~ 185) 320
4235 23:01:11.936793 iDelay=218, Bit 10, Center 41 (-118 ~ 201) 320
4236 23:01:11.940246 iDelay=218, Bit 11, Center 41 (-118 ~ 201) 320
4237 23:01:11.943539 iDelay=218, Bit 12, Center 41 (-118 ~ 201) 320
4238 23:01:11.946808 iDelay=218, Bit 13, Center 49 (-102 ~ 201) 304
4239 23:01:11.953492 iDelay=218, Bit 14, Center 57 (-102 ~ 217) 320
4240 23:01:11.956411 iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320
4241 23:01:11.956507 ==
4242 23:01:11.959775 Dram Type= 6, Freq= 0, CH_0, rank 1
4243 23:01:11.963108 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4244 23:01:11.963204 ==
4245 23:01:11.966499 DQS Delay:
4246 23:01:11.966569 DQS0 = 0, DQS1 = 0
4247 23:01:11.969925 DQM Delay:
4248 23:01:11.969997 DQM0 = 49, DQM1 = 40
4249 23:01:11.970056 DQ Delay:
4250 23:01:11.973174 DQ0 =49, DQ1 =57, DQ2 =41, DQ3 =41
4251 23:01:11.976348 DQ4 =49, DQ5 =41, DQ6 =57, DQ7 =57
4252 23:01:11.979697 DQ8 =25, DQ9 =25, DQ10 =41, DQ11 =41
4253 23:01:11.982994 DQ12 =41, DQ13 =49, DQ14 =57, DQ15 =41
4254 23:01:11.983089
4255 23:01:11.983177
4256 23:01:11.986331 ==
4257 23:01:11.989634 Dram Type= 6, Freq= 0, CH_0, rank 1
4258 23:01:11.992991 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4259 23:01:11.993067 ==
4260 23:01:11.993128
4261 23:01:11.993186
4262 23:01:11.996107 TX Vref Scan disable
4263 23:01:11.996174 == TX Byte 0 ==
4264 23:01:11.999441 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4265 23:01:12.006232 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4266 23:01:12.006309 == TX Byte 1 ==
4267 23:01:12.009531 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4268 23:01:12.016062 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4269 23:01:12.016144 ==
4270 23:01:12.019447 Dram Type= 6, Freq= 0, CH_0, rank 1
4271 23:01:12.023158 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4272 23:01:12.023268 ==
4273 23:01:12.023363
4274 23:01:12.023452
4275 23:01:12.025968 TX Vref Scan disable
4276 23:01:12.029432 == TX Byte 0 ==
4277 23:01:12.032798 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4278 23:01:12.036071 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4279 23:01:12.039495 == TX Byte 1 ==
4280 23:01:12.042821 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4281 23:01:12.046185 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4282 23:01:12.046268
4283 23:01:12.049054 [DATLAT]
4284 23:01:12.049136 Freq=600, CH0 RK1
4285 23:01:12.049202
4286 23:01:12.052245 DATLAT Default: 0x9
4287 23:01:12.052327 0, 0xFFFF, sum = 0
4288 23:01:12.056023 1, 0xFFFF, sum = 0
4289 23:01:12.056108 2, 0xFFFF, sum = 0
4290 23:01:12.058873 3, 0xFFFF, sum = 0
4291 23:01:12.058957 4, 0xFFFF, sum = 0
4292 23:01:12.062264 5, 0xFFFF, sum = 0
4293 23:01:12.062348 6, 0xFFFF, sum = 0
4294 23:01:12.065667 7, 0xFFFF, sum = 0
4295 23:01:12.065755 8, 0x0, sum = 1
4296 23:01:12.068922 9, 0x0, sum = 2
4297 23:01:12.069010 10, 0x0, sum = 3
4298 23:01:12.072467 11, 0x0, sum = 4
4299 23:01:12.072560 best_step = 9
4300 23:01:12.072633
4301 23:01:12.072702 ==
4302 23:01:12.075709 Dram Type= 6, Freq= 0, CH_0, rank 1
4303 23:01:12.082209 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4304 23:01:12.082291 ==
4305 23:01:12.082354 RX Vref Scan: 0
4306 23:01:12.082413
4307 23:01:12.085668 RX Vref 0 -> 0, step: 1
4308 23:01:12.085749
4309 23:01:12.088624 RX Delay -179 -> 252, step: 8
4310 23:01:12.092010 iDelay=205, Bit 0, Center 48 (-99 ~ 196) 296
4311 23:01:12.098907 iDelay=205, Bit 1, Center 48 (-99 ~ 196) 296
4312 23:01:12.102186 iDelay=205, Bit 2, Center 44 (-99 ~ 188) 288
4313 23:01:12.105501 iDelay=205, Bit 3, Center 44 (-99 ~ 188) 288
4314 23:01:12.108944 iDelay=205, Bit 4, Center 48 (-99 ~ 196) 296
4315 23:01:12.111691 iDelay=205, Bit 5, Center 40 (-107 ~ 188) 296
4316 23:01:12.118475 iDelay=205, Bit 6, Center 60 (-83 ~ 204) 288
4317 23:01:12.121975 iDelay=205, Bit 7, Center 56 (-91 ~ 204) 296
4318 23:01:12.125481 iDelay=205, Bit 8, Center 32 (-115 ~ 180) 296
4319 23:01:12.128334 iDelay=205, Bit 9, Center 28 (-115 ~ 172) 288
4320 23:01:12.131845 iDelay=205, Bit 10, Center 40 (-107 ~ 188) 296
4321 23:01:12.138421 iDelay=205, Bit 11, Center 36 (-107 ~ 180) 288
4322 23:01:12.141424 iDelay=205, Bit 12, Center 44 (-107 ~ 196) 304
4323 23:01:12.144898 iDelay=205, Bit 13, Center 44 (-99 ~ 188) 288
4324 23:01:12.148149 iDelay=205, Bit 14, Center 48 (-99 ~ 196) 296
4325 23:01:12.155250 iDelay=205, Bit 15, Center 48 (-99 ~ 196) 296
4326 23:01:12.155332 ==
4327 23:01:12.158177 Dram Type= 6, Freq= 0, CH_0, rank 1
4328 23:01:12.161425 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4329 23:01:12.161508 ==
4330 23:01:12.161573 DQS Delay:
4331 23:01:12.164695 DQS0 = 0, DQS1 = 0
4332 23:01:12.164782 DQM Delay:
4333 23:01:12.168068 DQM0 = 48, DQM1 = 40
4334 23:01:12.168151 DQ Delay:
4335 23:01:12.171507 DQ0 =48, DQ1 =48, DQ2 =44, DQ3 =44
4336 23:01:12.174775 DQ4 =48, DQ5 =40, DQ6 =60, DQ7 =56
4337 23:01:12.178133 DQ8 =32, DQ9 =28, DQ10 =40, DQ11 =36
4338 23:01:12.181366 DQ12 =44, DQ13 =44, DQ14 =48, DQ15 =48
4339 23:01:12.181447
4340 23:01:12.181512
4341 23:01:12.191328 [DQSOSCAuto] RK1, (LSB)MR18= 0x6734, (MSB)MR19= 0x808, tDQSOscB0 = 400 ps tDQSOscB1 = 390 ps
4342 23:01:12.191411 CH0 RK1: MR19=808, MR18=6734
4343 23:01:12.198034 CH0_RK1: MR19=0x808, MR18=0x6734, DQSOSC=390, MR23=63, INC=172, DEC=114
4344 23:01:12.201315 [RxdqsGatingPostProcess] freq 600
4345 23:01:12.208001 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4346 23:01:12.211272 Pre-setting of DQS Precalculation
4347 23:01:12.214691 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
4348 23:01:12.214773 ==
4349 23:01:12.218017 Dram Type= 6, Freq= 0, CH_1, rank 0
4350 23:01:12.220983 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4351 23:01:12.221065 ==
4352 23:01:12.227560 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4353 23:01:12.234128 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=31, u1VrefScanEnd=31
4354 23:01:12.237496 [CA 0] Center 35 (5~66) winsize 62
4355 23:01:12.240852 [CA 1] Center 35 (5~66) winsize 62
4356 23:01:12.243922 [CA 2] Center 34 (3~65) winsize 63
4357 23:01:12.247328 [CA 3] Center 33 (3~64) winsize 62
4358 23:01:12.250423 [CA 4] Center 33 (3~64) winsize 62
4359 23:01:12.253734 [CA 5] Center 33 (3~64) winsize 62
4360 23:01:12.253815
4361 23:01:12.257150 [CmdBusTrainingLP45] Vref(ca) range 1: 31
4362 23:01:12.257230
4363 23:01:12.260472 [CATrainingPosCal] consider 1 rank data
4364 23:01:12.263926 u2DelayCellTimex100 = 270/100 ps
4365 23:01:12.267288 CA0 delay=35 (5~66),Diff = 2 PI (19 cell)
4366 23:01:12.270307 CA1 delay=35 (5~66),Diff = 2 PI (19 cell)
4367 23:01:12.273765 CA2 delay=34 (3~65),Diff = 1 PI (9 cell)
4368 23:01:12.280366 CA3 delay=33 (3~64),Diff = 0 PI (0 cell)
4369 23:01:12.283670 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
4370 23:01:12.286976 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
4371 23:01:12.287057
4372 23:01:12.290238 CA PerBit enable=1, Macro0, CA PI delay=33
4373 23:01:12.290318
4374 23:01:12.293536 [CBTSetCACLKResult] CA Dly = 33
4375 23:01:12.293617 CS Dly: 4 (0~35)
4376 23:01:12.293681 ==
4377 23:01:12.296467 Dram Type= 6, Freq= 0, CH_1, rank 1
4378 23:01:12.303163 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4379 23:01:12.303248 ==
4380 23:01:12.306458 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4381 23:01:12.313319 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
4382 23:01:12.316640 [CA 0] Center 35 (5~66) winsize 62
4383 23:01:12.319933 [CA 1] Center 35 (5~66) winsize 62
4384 23:01:12.323323 [CA 2] Center 34 (4~65) winsize 62
4385 23:01:12.326612 [CA 3] Center 34 (4~65) winsize 62
4386 23:01:12.330169 [CA 4] Center 34 (4~65) winsize 62
4387 23:01:12.333571 [CA 5] Center 33 (3~64) winsize 62
4388 23:01:12.333654
4389 23:01:12.336834 [CmdBusTrainingLP45] Vref(ca) range 1: 35
4390 23:01:12.336917
4391 23:01:12.339790 [CATrainingPosCal] consider 2 rank data
4392 23:01:12.343495 u2DelayCellTimex100 = 270/100 ps
4393 23:01:12.346751 CA0 delay=35 (5~66),Diff = 2 PI (19 cell)
4394 23:01:12.353019 CA1 delay=35 (5~66),Diff = 2 PI (19 cell)
4395 23:01:12.356397 CA2 delay=34 (4~65),Diff = 1 PI (9 cell)
4396 23:01:12.359650 CA3 delay=34 (4~64),Diff = 1 PI (9 cell)
4397 23:01:12.363053 CA4 delay=34 (4~64),Diff = 1 PI (9 cell)
4398 23:01:12.366393 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
4399 23:01:12.366476
4400 23:01:12.369774 CA PerBit enable=1, Macro0, CA PI delay=33
4401 23:01:12.369856
4402 23:01:12.373117 [CBTSetCACLKResult] CA Dly = 33
4403 23:01:12.376431 CS Dly: 5 (0~37)
4404 23:01:12.376513
4405 23:01:12.379788 ----->DramcWriteLeveling(PI) begin...
4406 23:01:12.379871 ==
4407 23:01:12.382684 Dram Type= 6, Freq= 0, CH_1, rank 0
4408 23:01:12.386070 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4409 23:01:12.386153 ==
4410 23:01:12.389396 Write leveling (Byte 0): 31 => 31
4411 23:01:12.393013 Write leveling (Byte 1): 32 => 32
4412 23:01:12.396322 DramcWriteLeveling(PI) end<-----
4413 23:01:12.396404
4414 23:01:12.396471 ==
4415 23:01:12.399642 Dram Type= 6, Freq= 0, CH_1, rank 0
4416 23:01:12.403006 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4417 23:01:12.403088 ==
4418 23:01:12.406420 [Gating] SW mode calibration
4419 23:01:12.412810 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4420 23:01:12.419434 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4421 23:01:12.422761 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4422 23:01:12.426086 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4423 23:01:12.432724 0 9 8 | B1->B0 | 3434 3232 | 1 1 | (1 1) (1 1)
4424 23:01:12.435898 0 9 12 | B1->B0 | 2b2b 2828 | 1 0 | (1 0) (1 1)
4425 23:01:12.439118 0 9 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4426 23:01:12.445581 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4427 23:01:12.449135 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4428 23:01:12.452525 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4429 23:01:12.459060 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4430 23:01:12.462468 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4431 23:01:12.465593 0 10 8 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
4432 23:01:12.472346 0 10 12 | B1->B0 | 4242 3e3e | 0 0 | (0 0) (0 0)
4433 23:01:12.475694 0 10 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4434 23:01:12.479085 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4435 23:01:12.485349 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4436 23:01:12.488684 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4437 23:01:12.492145 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4438 23:01:12.498904 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4439 23:01:12.502070 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4440 23:01:12.505681 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
4441 23:01:12.512249 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4442 23:01:12.515677 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4443 23:01:12.518670 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4444 23:01:12.525570 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4445 23:01:12.528919 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4446 23:01:12.532600 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4447 23:01:12.539241 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4448 23:01:12.542338 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4449 23:01:12.545412 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4450 23:01:12.552207 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4451 23:01:12.555517 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4452 23:01:12.558881 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4453 23:01:12.565507 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4454 23:01:12.568737 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4455 23:01:12.572117 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4456 23:01:12.578605 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
4457 23:01:12.579093 Total UI for P1: 0, mck2ui 16
4458 23:01:12.581948 best dqsien dly found for B0: ( 0, 13, 10)
4459 23:01:12.588195 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4460 23:01:12.591581 Total UI for P1: 0, mck2ui 16
4461 23:01:12.594932 best dqsien dly found for B1: ( 0, 13, 12)
4462 23:01:12.598251 best DQS0 dly(MCK, UI, PI) = (0, 13, 10)
4463 23:01:12.601420 best DQS1 dly(MCK, UI, PI) = (0, 13, 12)
4464 23:01:12.601846
4465 23:01:12.604739 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 10)
4466 23:01:12.608716 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 12)
4467 23:01:12.611752 [Gating] SW calibration Done
4468 23:01:12.612282 ==
4469 23:01:12.615272 Dram Type= 6, Freq= 0, CH_1, rank 0
4470 23:01:12.618550 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4471 23:01:12.619154 ==
4472 23:01:12.621534 RX Vref Scan: 0
4473 23:01:12.622006
4474 23:01:12.624586 RX Vref 0 -> 0, step: 1
4475 23:01:12.625120
4476 23:01:12.627944 RX Delay -230 -> 252, step: 16
4477 23:01:12.631771 iDelay=218, Bit 0, Center 57 (-86 ~ 201) 288
4478 23:01:12.634738 iDelay=218, Bit 1, Center 49 (-102 ~ 201) 304
4479 23:01:12.638311 iDelay=218, Bit 2, Center 41 (-118 ~ 201) 320
4480 23:01:12.641518 iDelay=218, Bit 3, Center 49 (-102 ~ 201) 304
4481 23:01:12.648033 iDelay=218, Bit 4, Center 49 (-102 ~ 201) 304
4482 23:01:12.651558 iDelay=218, Bit 5, Center 65 (-86 ~ 217) 304
4483 23:01:12.654723 iDelay=218, Bit 6, Center 65 (-86 ~ 217) 304
4484 23:01:12.657802 iDelay=218, Bit 7, Center 49 (-102 ~ 201) 304
4485 23:01:12.664623 iDelay=218, Bit 8, Center 25 (-134 ~ 185) 320
4486 23:01:12.667786 iDelay=218, Bit 9, Center 33 (-118 ~ 185) 304
4487 23:01:12.670747 iDelay=218, Bit 10, Center 41 (-118 ~ 201) 320
4488 23:01:12.674666 iDelay=218, Bit 11, Center 41 (-118 ~ 201) 320
4489 23:01:12.680908 iDelay=218, Bit 12, Center 57 (-102 ~ 217) 320
4490 23:01:12.684225 iDelay=218, Bit 13, Center 57 (-102 ~ 217) 320
4491 23:01:12.687869 iDelay=218, Bit 14, Center 49 (-102 ~ 201) 304
4492 23:01:12.690924 iDelay=218, Bit 15, Center 57 (-102 ~ 217) 320
4493 23:01:12.691511 ==
4494 23:01:12.694386 Dram Type= 6, Freq= 0, CH_1, rank 0
4495 23:01:12.700635 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4496 23:01:12.701266 ==
4497 23:01:12.701792 DQS Delay:
4498 23:01:12.703747 DQS0 = 0, DQS1 = 0
4499 23:01:12.704232 DQM Delay:
4500 23:01:12.704708 DQM0 = 53, DQM1 = 45
4501 23:01:12.707743 DQ Delay:
4502 23:01:12.710658 DQ0 =57, DQ1 =49, DQ2 =41, DQ3 =49
4503 23:01:12.713947 DQ4 =49, DQ5 =65, DQ6 =65, DQ7 =49
4504 23:01:12.717141 DQ8 =25, DQ9 =33, DQ10 =41, DQ11 =41
4505 23:01:12.720449 DQ12 =57, DQ13 =57, DQ14 =49, DQ15 =57
4506 23:01:12.720957
4507 23:01:12.721433
4508 23:01:12.721881 ==
4509 23:01:12.723706 Dram Type= 6, Freq= 0, CH_1, rank 0
4510 23:01:12.727345 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4511 23:01:12.727833 ==
4512 23:01:12.728309
4513 23:01:12.728889
4514 23:01:12.730963 TX Vref Scan disable
4515 23:01:12.733964 == TX Byte 0 ==
4516 23:01:12.737471 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4517 23:01:12.740634 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4518 23:01:12.744166 == TX Byte 1 ==
4519 23:01:12.747419 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4520 23:01:12.750655 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4521 23:01:12.751231 ==
4522 23:01:12.753841 Dram Type= 6, Freq= 0, CH_1, rank 0
4523 23:01:12.757084 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4524 23:01:12.757561 ==
4525 23:01:12.760129
4526 23:01:12.760747
4527 23:01:12.761263 TX Vref Scan disable
4528 23:01:12.763894 == TX Byte 0 ==
4529 23:01:12.767491 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4530 23:01:12.773715 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4531 23:01:12.774310 == TX Byte 1 ==
4532 23:01:12.777048 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4533 23:01:12.784291 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4534 23:01:12.784917
4535 23:01:12.785304 [DATLAT]
4536 23:01:12.785652 Freq=600, CH1 RK0
4537 23:01:12.786034
4538 23:01:12.786889 DATLAT Default: 0x9
4539 23:01:12.790241 0, 0xFFFF, sum = 0
4540 23:01:12.790716 1, 0xFFFF, sum = 0
4541 23:01:12.793409 2, 0xFFFF, sum = 0
4542 23:01:12.793884 3, 0xFFFF, sum = 0
4543 23:01:12.796664 4, 0xFFFF, sum = 0
4544 23:01:12.797172 5, 0xFFFF, sum = 0
4545 23:01:12.799839 6, 0xFFFF, sum = 0
4546 23:01:12.800268 7, 0xFFFF, sum = 0
4547 23:01:12.803337 8, 0x0, sum = 1
4548 23:01:12.803832 9, 0x0, sum = 2
4549 23:01:12.806670 10, 0x0, sum = 3
4550 23:01:12.807100 11, 0x0, sum = 4
4551 23:01:12.807446 best_step = 9
4552 23:01:12.807760
4553 23:01:12.810049 ==
4554 23:01:12.813076 Dram Type= 6, Freq= 0, CH_1, rank 0
4555 23:01:12.816586 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4556 23:01:12.817167 ==
4557 23:01:12.817515 RX Vref Scan: 1
4558 23:01:12.817839
4559 23:01:12.819791 RX Vref 0 -> 0, step: 1
4560 23:01:12.820217
4561 23:01:12.823182 RX Delay -179 -> 252, step: 8
4562 23:01:12.823609
4563 23:01:12.826492 Set Vref, RX VrefLevel [Byte0]: 51
4564 23:01:12.829788 [Byte1]: 52
4565 23:01:12.830260
4566 23:01:12.832962 Final RX Vref Byte 0 = 51 to rank0
4567 23:01:12.836665 Final RX Vref Byte 1 = 52 to rank0
4568 23:01:12.839758 Final RX Vref Byte 0 = 51 to rank1
4569 23:01:12.843048 Final RX Vref Byte 1 = 52 to rank1==
4570 23:01:12.846049 Dram Type= 6, Freq= 0, CH_1, rank 0
4571 23:01:12.849560 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4572 23:01:12.852610 ==
4573 23:01:12.853201 DQS Delay:
4574 23:01:12.853593 DQS0 = 0, DQS1 = 0
4575 23:01:12.856433 DQM Delay:
4576 23:01:12.856929 DQM0 = 49, DQM1 = 41
4577 23:01:12.859311 DQ Delay:
4578 23:01:12.862902 DQ0 =56, DQ1 =44, DQ2 =36, DQ3 =44
4579 23:01:12.863484 DQ4 =48, DQ5 =60, DQ6 =60, DQ7 =44
4580 23:01:12.866209 DQ8 =28, DQ9 =28, DQ10 =44, DQ11 =36
4581 23:01:12.869557 DQ12 =52, DQ13 =48, DQ14 =48, DQ15 =48
4582 23:01:12.872951
4583 23:01:12.873376
4584 23:01:12.879736 [DQSOSCAuto] RK0, (LSB)MR18= 0x446b, (MSB)MR19= 0x808, tDQSOscB0 = 389 ps tDQSOscB1 = 396 ps
4585 23:01:12.882927 CH1 RK0: MR19=808, MR18=446B
4586 23:01:12.889979 CH1_RK0: MR19=0x808, MR18=0x446B, DQSOSC=389, MR23=63, INC=173, DEC=115
4587 23:01:12.890420
4588 23:01:12.892660 ----->DramcWriteLeveling(PI) begin...
4589 23:01:12.893254 ==
4590 23:01:12.895849 Dram Type= 6, Freq= 0, CH_1, rank 1
4591 23:01:12.899294 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4592 23:01:12.899726 ==
4593 23:01:12.902585 Write leveling (Byte 0): 30 => 30
4594 23:01:12.906385 Write leveling (Byte 1): 30 => 30
4595 23:01:12.909311 DramcWriteLeveling(PI) end<-----
4596 23:01:12.909844
4597 23:01:12.910186 ==
4598 23:01:12.912793 Dram Type= 6, Freq= 0, CH_1, rank 1
4599 23:01:12.916246 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4600 23:01:12.916812 ==
4601 23:01:12.919330 [Gating] SW mode calibration
4602 23:01:12.925817 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4603 23:01:12.932312 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4604 23:01:12.935651 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4605 23:01:12.942412 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4606 23:01:12.945458 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4607 23:01:12.949027 0 9 12 | B1->B0 | 2d2d 3030 | 0 1 | (0 0) (1 0)
4608 23:01:12.955476 0 9 16 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
4609 23:01:12.958511 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4610 23:01:12.961836 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4611 23:01:12.968612 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4612 23:01:12.971846 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4613 23:01:12.975112 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4614 23:01:12.981726 0 10 8 | B1->B0 | 2727 2323 | 0 0 | (0 0) (0 0)
4615 23:01:12.985195 0 10 12 | B1->B0 | 3b3b 2c2c | 0 0 | (0 0) (0 0)
4616 23:01:12.988002 0 10 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4617 23:01:12.994434 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4618 23:01:12.998221 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4619 23:01:13.001111 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4620 23:01:13.008090 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4621 23:01:13.011271 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4622 23:01:13.014296 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
4623 23:01:13.021053 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
4624 23:01:13.024277 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4625 23:01:13.027597 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4626 23:01:13.034498 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4627 23:01:13.037463 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4628 23:01:13.040835 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4629 23:01:13.047242 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4630 23:01:13.050689 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4631 23:01:13.054017 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4632 23:01:13.060868 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4633 23:01:13.064253 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4634 23:01:13.067773 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4635 23:01:13.073844 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4636 23:01:13.077216 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4637 23:01:13.080534 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4638 23:01:13.087139 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
4639 23:01:13.090537 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4640 23:01:13.093853 Total UI for P1: 0, mck2ui 16
4641 23:01:13.097225 best dqsien dly found for B0: ( 0, 13, 8)
4642 23:01:13.100177 Total UI for P1: 0, mck2ui 16
4643 23:01:13.103621 best dqsien dly found for B1: ( 0, 13, 10)
4644 23:01:13.107165 best DQS0 dly(MCK, UI, PI) = (0, 13, 8)
4645 23:01:13.110396 best DQS1 dly(MCK, UI, PI) = (0, 13, 10)
4646 23:01:13.110969
4647 23:01:13.113579 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 8)
4648 23:01:13.116937 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 10)
4649 23:01:13.120046 [Gating] SW calibration Done
4650 23:01:13.120520 ==
4651 23:01:13.123621 Dram Type= 6, Freq= 0, CH_1, rank 1
4652 23:01:13.126559 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4653 23:01:13.127102 ==
4654 23:01:13.129920 RX Vref Scan: 0
4655 23:01:13.130500
4656 23:01:13.133659 RX Vref 0 -> 0, step: 1
4657 23:01:13.134164
4658 23:01:13.134556 RX Delay -230 -> 252, step: 16
4659 23:01:13.139925 iDelay=218, Bit 0, Center 65 (-70 ~ 201) 272
4660 23:01:13.143643 iDelay=218, Bit 1, Center 49 (-102 ~ 201) 304
4661 23:01:13.146744 iDelay=218, Bit 2, Center 41 (-102 ~ 185) 288
4662 23:01:13.150077 iDelay=218, Bit 3, Center 49 (-102 ~ 201) 304
4663 23:01:13.156614 iDelay=218, Bit 4, Center 49 (-102 ~ 201) 304
4664 23:01:13.159878 iDelay=218, Bit 5, Center 65 (-86 ~ 217) 304
4665 23:01:13.163225 iDelay=218, Bit 6, Center 49 (-102 ~ 201) 304
4666 23:01:13.166842 iDelay=218, Bit 7, Center 49 (-102 ~ 201) 304
4667 23:01:13.170169 iDelay=218, Bit 8, Center 33 (-118 ~ 185) 304
4668 23:01:13.176831 iDelay=218, Bit 9, Center 41 (-102 ~ 185) 288
4669 23:01:13.179689 iDelay=218, Bit 10, Center 49 (-102 ~ 201) 304
4670 23:01:13.183167 iDelay=218, Bit 11, Center 41 (-118 ~ 201) 320
4671 23:01:13.186575 iDelay=218, Bit 12, Center 57 (-102 ~ 217) 320
4672 23:01:13.193238 iDelay=218, Bit 13, Center 49 (-102 ~ 201) 304
4673 23:01:13.196180 iDelay=218, Bit 14, Center 49 (-102 ~ 201) 304
4674 23:01:13.199463 iDelay=218, Bit 15, Center 57 (-102 ~ 217) 320
4675 23:01:13.200033 ==
4676 23:01:13.203341 Dram Type= 6, Freq= 0, CH_1, rank 1
4677 23:01:13.209590 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4678 23:01:13.210220 ==
4679 23:01:13.210778 DQS Delay:
4680 23:01:13.211308 DQS0 = 0, DQS1 = 0
4681 23:01:13.213179 DQM Delay:
4682 23:01:13.213809 DQM0 = 52, DQM1 = 47
4683 23:01:13.216072 DQ Delay:
4684 23:01:13.219690 DQ0 =65, DQ1 =49, DQ2 =41, DQ3 =49
4685 23:01:13.220296 DQ4 =49, DQ5 =65, DQ6 =49, DQ7 =49
4686 23:01:13.222805 DQ8 =33, DQ9 =41, DQ10 =49, DQ11 =41
4687 23:01:13.229242 DQ12 =57, DQ13 =49, DQ14 =49, DQ15 =57
4688 23:01:13.229918
4689 23:01:13.230561
4690 23:01:13.231204 ==
4691 23:01:13.232978 Dram Type= 6, Freq= 0, CH_1, rank 1
4692 23:01:13.236273 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4693 23:01:13.237011 ==
4694 23:01:13.237648
4695 23:01:13.238281
4696 23:01:13.239670 TX Vref Scan disable
4697 23:01:13.240306 == TX Byte 0 ==
4698 23:01:13.245828 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4699 23:01:13.249352 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4700 23:01:13.249792 == TX Byte 1 ==
4701 23:01:13.255940 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4702 23:01:13.259226 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4703 23:01:13.259648 ==
4704 23:01:13.262144 Dram Type= 6, Freq= 0, CH_1, rank 1
4705 23:01:13.265932 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4706 23:01:13.266369 ==
4707 23:01:13.266766
4708 23:01:13.268701
4709 23:01:13.269097 TX Vref Scan disable
4710 23:01:13.272255 == TX Byte 0 ==
4711 23:01:13.275509 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4712 23:01:13.282185 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4713 23:01:13.282621 == TX Byte 1 ==
4714 23:01:13.285515 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4715 23:01:13.292144 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4716 23:01:13.292570
4717 23:01:13.292965 [DATLAT]
4718 23:01:13.293254 Freq=600, CH1 RK1
4719 23:01:13.293534
4720 23:01:13.295418 DATLAT Default: 0x9
4721 23:01:13.295779 0, 0xFFFF, sum = 0
4722 23:01:13.298768 1, 0xFFFF, sum = 0
4723 23:01:13.302141 2, 0xFFFF, sum = 0
4724 23:01:13.302476 3, 0xFFFF, sum = 0
4725 23:01:13.305357 4, 0xFFFF, sum = 0
4726 23:01:13.305701 5, 0xFFFF, sum = 0
4727 23:01:13.308673 6, 0xFFFF, sum = 0
4728 23:01:13.309053 7, 0xFFFF, sum = 0
4729 23:01:13.311899 8, 0x0, sum = 1
4730 23:01:13.312213 9, 0x0, sum = 2
4731 23:01:13.312507 10, 0x0, sum = 3
4732 23:01:13.315108 11, 0x0, sum = 4
4733 23:01:13.315500 best_step = 9
4734 23:01:13.315769
4735 23:01:13.318462 ==
4736 23:01:13.318847 Dram Type= 6, Freq= 0, CH_1, rank 1
4737 23:01:13.325112 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4738 23:01:13.325427 ==
4739 23:01:13.325788 RX Vref Scan: 0
4740 23:01:13.326164
4741 23:01:13.328762 RX Vref 0 -> 0, step: 1
4742 23:01:13.329216
4743 23:01:13.331857 RX Delay -163 -> 252, step: 8
4744 23:01:13.335369 iDelay=205, Bit 0, Center 56 (-83 ~ 196) 280
4745 23:01:13.341473 iDelay=205, Bit 1, Center 40 (-99 ~ 180) 280
4746 23:01:13.345107 iDelay=205, Bit 2, Center 40 (-99 ~ 180) 280
4747 23:01:13.348526 iDelay=205, Bit 3, Center 48 (-91 ~ 188) 280
4748 23:01:13.351673 iDelay=205, Bit 4, Center 48 (-91 ~ 188) 280
4749 23:01:13.354943 iDelay=205, Bit 5, Center 60 (-83 ~ 204) 288
4750 23:01:13.361484 iDelay=205, Bit 6, Center 56 (-83 ~ 196) 280
4751 23:01:13.364830 iDelay=205, Bit 7, Center 48 (-91 ~ 188) 280
4752 23:01:13.368230 iDelay=205, Bit 8, Center 32 (-115 ~ 180) 296
4753 23:01:13.371549 iDelay=205, Bit 9, Center 36 (-107 ~ 180) 288
4754 23:01:13.374771 iDelay=205, Bit 10, Center 44 (-99 ~ 188) 288
4755 23:01:13.381839 iDelay=205, Bit 11, Center 36 (-107 ~ 180) 288
4756 23:01:13.384684 iDelay=205, Bit 12, Center 48 (-99 ~ 196) 296
4757 23:01:13.388270 iDelay=205, Bit 13, Center 48 (-99 ~ 196) 296
4758 23:01:13.391193 iDelay=205, Bit 14, Center 48 (-99 ~ 196) 296
4759 23:01:13.398347 iDelay=205, Bit 15, Center 52 (-99 ~ 204) 304
4760 23:01:13.398775 ==
4761 23:01:13.401229 Dram Type= 6, Freq= 0, CH_1, rank 1
4762 23:01:13.404916 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4763 23:01:13.405265 ==
4764 23:01:13.405672 DQS Delay:
4765 23:01:13.408312 DQS0 = 0, DQS1 = 0
4766 23:01:13.408746 DQM Delay:
4767 23:01:13.411531 DQM0 = 49, DQM1 = 43
4768 23:01:13.411937 DQ Delay:
4769 23:01:13.414811 DQ0 =56, DQ1 =40, DQ2 =40, DQ3 =48
4770 23:01:13.417891 DQ4 =48, DQ5 =60, DQ6 =56, DQ7 =48
4771 23:01:13.421191 DQ8 =32, DQ9 =36, DQ10 =44, DQ11 =36
4772 23:01:13.424466 DQ12 =48, DQ13 =48, DQ14 =48, DQ15 =52
4773 23:01:13.424826
4774 23:01:13.425101
4775 23:01:13.434556 [DQSOSCAuto] RK1, (LSB)MR18= 0x5a20, (MSB)MR19= 0x808, tDQSOscB0 = 403 ps tDQSOscB1 = 392 ps
4776 23:01:13.434868 CH1 RK1: MR19=808, MR18=5A20
4777 23:01:13.440953 CH1_RK1: MR19=0x808, MR18=0x5A20, DQSOSC=392, MR23=63, INC=170, DEC=113
4778 23:01:13.444227 [RxdqsGatingPostProcess] freq 600
4779 23:01:13.450947 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4780 23:01:13.453951 Pre-setting of DQS Precalculation
4781 23:01:13.457457 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
4782 23:01:13.463956 sync_frequency_calibration_params sync calibration params of frequency 600 to shu:5
4783 23:01:13.473601 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
4784 23:01:13.473690
4785 23:01:13.473764
4786 23:01:13.473827 [Calibration Summary] 1200 Mbps
4787 23:01:13.477310 CH 0, Rank 0
4788 23:01:13.480439 SW Impedance : PASS
4789 23:01:13.480542 DUTY Scan : NO K
4790 23:01:13.483769 ZQ Calibration : PASS
4791 23:01:13.483855 Jitter Meter : NO K
4792 23:01:13.487113 CBT Training : PASS
4793 23:01:13.490352 Write leveling : PASS
4794 23:01:13.490433 RX DQS gating : PASS
4795 23:01:13.493519 RX DQ/DQS(RDDQC) : PASS
4796 23:01:13.496828 TX DQ/DQS : PASS
4797 23:01:13.496902 RX DATLAT : PASS
4798 23:01:13.500224 RX DQ/DQS(Engine): PASS
4799 23:01:13.503125 TX OE : NO K
4800 23:01:13.503206 All Pass.
4801 23:01:13.503271
4802 23:01:13.503332 CH 0, Rank 1
4803 23:01:13.506474 SW Impedance : PASS
4804 23:01:13.509935 DUTY Scan : NO K
4805 23:01:13.510020 ZQ Calibration : PASS
4806 23:01:13.513279 Jitter Meter : NO K
4807 23:01:13.516664 CBT Training : PASS
4808 23:01:13.516736 Write leveling : PASS
4809 23:01:13.519846 RX DQS gating : PASS
4810 23:01:13.522996 RX DQ/DQS(RDDQC) : PASS
4811 23:01:13.523090 TX DQ/DQS : PASS
4812 23:01:13.526343 RX DATLAT : PASS
4813 23:01:13.529751 RX DQ/DQS(Engine): PASS
4814 23:01:13.529842 TX OE : NO K
4815 23:01:13.533033 All Pass.
4816 23:01:13.533119
4817 23:01:13.533203 CH 1, Rank 0
4818 23:01:13.536204 SW Impedance : PASS
4819 23:01:13.536305 DUTY Scan : NO K
4820 23:01:13.539761 ZQ Calibration : PASS
4821 23:01:13.543090 Jitter Meter : NO K
4822 23:01:13.543193 CBT Training : PASS
4823 23:01:13.546601 Write leveling : PASS
4824 23:01:13.549679 RX DQS gating : PASS
4825 23:01:13.549811 RX DQ/DQS(RDDQC) : PASS
4826 23:01:13.553164 TX DQ/DQS : PASS
4827 23:01:13.553312 RX DATLAT : PASS
4828 23:01:13.556356 RX DQ/DQS(Engine): PASS
4829 23:01:13.559670 TX OE : NO K
4830 23:01:13.559858 All Pass.
4831 23:01:13.559997
4832 23:01:13.560110 CH 1, Rank 1
4833 23:01:13.562847 SW Impedance : PASS
4834 23:01:13.566239 DUTY Scan : NO K
4835 23:01:13.566438 ZQ Calibration : PASS
4836 23:01:13.569479 Jitter Meter : NO K
4837 23:01:13.572921 CBT Training : PASS
4838 23:01:13.573062 Write leveling : PASS
4839 23:01:13.576401 RX DQS gating : PASS
4840 23:01:13.579654 RX DQ/DQS(RDDQC) : PASS
4841 23:01:13.579903 TX DQ/DQS : PASS
4842 23:01:13.582964 RX DATLAT : PASS
4843 23:01:13.586156 RX DQ/DQS(Engine): PASS
4844 23:01:13.586427 TX OE : NO K
4845 23:01:13.589301 All Pass.
4846 23:01:13.589513
4847 23:01:13.589721 DramC Write-DBI off
4848 23:01:13.592702 PER_BANK_REFRESH: Hybrid Mode
4849 23:01:13.592975 TX_TRACKING: ON
4850 23:01:13.602980 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 30, TRFC_05T 1, TXREFCNT 44, TRFCpb 9, TRFCpb_05T 1
4851 23:01:13.605960 [FAST_K] Save calibration result to emmc
4852 23:01:13.610013 dramc_set_vcore_voltage set vcore to 662500
4853 23:01:13.612690 Read voltage for 933, 3
4854 23:01:13.613234 Vio18 = 0
4855 23:01:13.616024 Vcore = 662500
4856 23:01:13.616501 Vdram = 0
4857 23:01:13.617056 Vddq = 0
4858 23:01:13.619317 Vmddr = 0
4859 23:01:13.622735 [FAST_K] DramcSave_Time_For_Cal_Init SHU3, femmc_Ready=0
4860 23:01:13.629646 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
4861 23:01:13.630172 MEM_TYPE=3, freq_sel=17
4862 23:01:13.632550 sv_algorithm_assistance_LP4_1600
4863 23:01:13.639096 ============ PULL DRAM RESETB DOWN ============
4864 23:01:13.642796 ========== PULL DRAM RESETB DOWN end =========
4865 23:01:13.646187 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4866 23:01:13.649428 ===================================
4867 23:01:13.652559 LPDDR4 DRAM CONFIGURATION
4868 23:01:13.656013 ===================================
4869 23:01:13.656568 EX_ROW_EN[0] = 0x0
4870 23:01:13.659536 EX_ROW_EN[1] = 0x0
4871 23:01:13.662586 LP4Y_EN = 0x0
4872 23:01:13.663060 WORK_FSP = 0x0
4873 23:01:13.666025 WL = 0x3
4874 23:01:13.666624 RL = 0x3
4875 23:01:13.669130 BL = 0x2
4876 23:01:13.669610 RPST = 0x0
4877 23:01:13.672395 RD_PRE = 0x0
4878 23:01:13.672912 WR_PRE = 0x1
4879 23:01:13.675854 WR_PST = 0x0
4880 23:01:13.676334 DBI_WR = 0x0
4881 23:01:13.678689 DBI_RD = 0x0
4882 23:01:13.679162 OTF = 0x1
4883 23:01:13.682623 ===================================
4884 23:01:13.685256 ===================================
4885 23:01:13.689033 ANA top config
4886 23:01:13.692374 ===================================
4887 23:01:13.695538 DLL_ASYNC_EN = 0
4888 23:01:13.696201 ALL_SLAVE_EN = 1
4889 23:01:13.698764 NEW_RANK_MODE = 1
4890 23:01:13.702034 DLL_IDLE_MODE = 1
4891 23:01:13.705404 LP45_APHY_COMB_EN = 1
4892 23:01:13.705877 TX_ODT_DIS = 1
4893 23:01:13.708851 NEW_8X_MODE = 1
4894 23:01:13.712068 ===================================
4895 23:01:13.715508 ===================================
4896 23:01:13.718705 data_rate = 1866
4897 23:01:13.722503 CKR = 1
4898 23:01:13.725412 DQ_P2S_RATIO = 8
4899 23:01:13.728841 ===================================
4900 23:01:13.732025 CA_P2S_RATIO = 8
4901 23:01:13.732501 DQ_CA_OPEN = 0
4902 23:01:13.735397 DQ_SEMI_OPEN = 0
4903 23:01:13.739085 CA_SEMI_OPEN = 0
4904 23:01:13.741830 CA_FULL_RATE = 0
4905 23:01:13.745332 DQ_CKDIV4_EN = 1
4906 23:01:13.748359 CA_CKDIV4_EN = 1
4907 23:01:13.748929 CA_PREDIV_EN = 0
4908 23:01:13.752154 PH8_DLY = 0
4909 23:01:13.755426 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
4910 23:01:13.758448 DQ_AAMCK_DIV = 4
4911 23:01:13.761526 CA_AAMCK_DIV = 4
4912 23:01:13.764922 CA_ADMCK_DIV = 4
4913 23:01:13.765399 DQ_TRACK_CA_EN = 0
4914 23:01:13.768395 CA_PICK = 933
4915 23:01:13.771609 CA_MCKIO = 933
4916 23:01:13.775472 MCKIO_SEMI = 0
4917 23:01:13.777908 PLL_FREQ = 3732
4918 23:01:13.781223 DQ_UI_PI_RATIO = 32
4919 23:01:13.785025 CA_UI_PI_RATIO = 0
4920 23:01:13.788080 ===================================
4921 23:01:13.791542 ===================================
4922 23:01:13.792129 memory_type:LPDDR4
4923 23:01:13.795001 GP_NUM : 10
4924 23:01:13.798054 SRAM_EN : 1
4925 23:01:13.798624 MD32_EN : 0
4926 23:01:13.801448 ===================================
4927 23:01:13.804614 [ANA_INIT] >>>>>>>>>>>>>>
4928 23:01:13.808224 <<<<<< [CONFIGURE PHASE]: ANA_TX
4929 23:01:13.811469 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
4930 23:01:13.814616 ===================================
4931 23:01:13.818023 data_rate = 1866,PCW = 0X8f00
4932 23:01:13.821151 ===================================
4933 23:01:13.824876 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
4934 23:01:13.827439 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4935 23:01:13.834207 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4936 23:01:13.837429 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
4937 23:01:13.841125 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
4938 23:01:13.844424 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
4939 23:01:13.847565 [ANA_INIT] flow start
4940 23:01:13.851119 [ANA_INIT] PLL >>>>>>>>
4941 23:01:13.851698 [ANA_INIT] PLL <<<<<<<<
4942 23:01:13.854344 [ANA_INIT] MIDPI >>>>>>>>
4943 23:01:13.857675 [ANA_INIT] MIDPI <<<<<<<<
4944 23:01:13.860888 [ANA_INIT] DLL >>>>>>>>
4945 23:01:13.861384 [ANA_INIT] flow end
4946 23:01:13.863923 ============ LP4 DIFF to SE enter ============
4947 23:01:13.870669 ============ LP4 DIFF to SE exit ============
4948 23:01:13.871141 [ANA_INIT] <<<<<<<<<<<<<
4949 23:01:13.873754 [Flow] Enable top DCM control >>>>>
4950 23:01:13.877664 [Flow] Enable top DCM control <<<<<
4951 23:01:13.880711 Enable DLL master slave shuffle
4952 23:01:13.887064 ==============================================================
4953 23:01:13.890596 Gating Mode config
4954 23:01:13.893673 ==============================================================
4955 23:01:13.896758 Config description:
4956 23:01:13.906918 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
4957 23:01:13.913732 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
4958 23:01:13.916879 SELPH_MODE 0: By rank 1: By Phase
4959 23:01:13.923558 ==============================================================
4960 23:01:13.926481 GAT_TRACK_EN = 1
4961 23:01:13.929917 RX_GATING_MODE = 2
4962 23:01:13.933457 RX_GATING_TRACK_MODE = 2
4963 23:01:13.933925 SELPH_MODE = 1
4964 23:01:13.936633 PICG_EARLY_EN = 1
4965 23:01:13.940050 VALID_LAT_VALUE = 1
4966 23:01:13.946540 ==============================================================
4967 23:01:13.950029 Enter into Gating configuration >>>>
4968 23:01:13.953229 Exit from Gating configuration <<<<
4969 23:01:13.956523 Enter into DVFS_PRE_config >>>>>
4970 23:01:13.966364 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
4971 23:01:13.969606 Exit from DVFS_PRE_config <<<<<
4972 23:01:13.973093 Enter into PICG configuration >>>>
4973 23:01:13.976395 Exit from PICG configuration <<<<
4974 23:01:13.979267 [RX_INPUT] configuration >>>>>
4975 23:01:13.983070 [RX_INPUT] configuration <<<<<
4976 23:01:13.986263 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
4977 23:01:13.992722 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
4978 23:01:13.999465 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
4979 23:01:14.005993 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
4980 23:01:14.012606 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
4981 23:01:14.016076 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
4982 23:01:14.022742 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
4983 23:01:14.026056 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
4984 23:01:14.029533 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
4985 23:01:14.032843 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
4986 23:01:14.039015 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
4987 23:01:14.042259 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4988 23:01:14.045971 ===================================
4989 23:01:14.049237 LPDDR4 DRAM CONFIGURATION
4990 23:01:14.052536 ===================================
4991 23:01:14.053162 EX_ROW_EN[0] = 0x0
4992 23:01:14.055433 EX_ROW_EN[1] = 0x0
4993 23:01:14.056039 LP4Y_EN = 0x0
4994 23:01:14.058612 WORK_FSP = 0x0
4995 23:01:14.059172 WL = 0x3
4996 23:01:14.062127 RL = 0x3
4997 23:01:14.065455 BL = 0x2
4998 23:01:14.065883 RPST = 0x0
4999 23:01:14.068860 RD_PRE = 0x0
5000 23:01:14.069291 WR_PRE = 0x1
5001 23:01:14.072114 WR_PST = 0x0
5002 23:01:14.072630 DBI_WR = 0x0
5003 23:01:14.075059 DBI_RD = 0x0
5004 23:01:14.075571 OTF = 0x1
5005 23:01:14.078436 ===================================
5006 23:01:14.081958 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
5007 23:01:14.088638 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
5008 23:01:14.091687 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
5009 23:01:14.095001 ===================================
5010 23:01:14.099009 LPDDR4 DRAM CONFIGURATION
5011 23:01:14.102363 ===================================
5012 23:01:14.102932 EX_ROW_EN[0] = 0x10
5013 23:01:14.105233 EX_ROW_EN[1] = 0x0
5014 23:01:14.105798 LP4Y_EN = 0x0
5015 23:01:14.108329 WORK_FSP = 0x0
5016 23:01:14.108846 WL = 0x3
5017 23:01:14.111744 RL = 0x3
5018 23:01:14.112175 BL = 0x2
5019 23:01:14.114918 RPST = 0x0
5020 23:01:14.118200 RD_PRE = 0x0
5021 23:01:14.118285 WR_PRE = 0x1
5022 23:01:14.121528 WR_PST = 0x0
5023 23:01:14.121612 DBI_WR = 0x0
5024 23:01:14.124902 DBI_RD = 0x0
5025 23:01:14.124987 OTF = 0x1
5026 23:01:14.128263 ===================================
5027 23:01:14.134329 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
5028 23:01:14.138820 nWR fixed to 30
5029 23:01:14.142021 [ModeRegInit_LP4] CH0 RK0
5030 23:01:14.142174 [ModeRegInit_LP4] CH0 RK1
5031 23:01:14.144954 [ModeRegInit_LP4] CH1 RK0
5032 23:01:14.148256 [ModeRegInit_LP4] CH1 RK1
5033 23:01:14.148424 match AC timing 9
5034 23:01:14.154948 dramType 5, freq 933, readDBI 0, DivMode 1, cbtMode 1
5035 23:01:14.158352 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
5036 23:01:14.161527 [WriteLatency GET] Version:0-MR_RL_field_value:3-WL:10
5037 23:01:14.168150 [TX_path_calculate] data rate=1866, WL=10, DQS_TotalUI=21
5038 23:01:14.171813 [TX_path_calculate] DQS = (2,5) DQS_OE = (2,2)
5039 23:01:14.172022 ==
5040 23:01:14.175091 Dram Type= 6, Freq= 0, CH_0, rank 0
5041 23:01:14.178859 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5042 23:01:14.179109 ==
5043 23:01:14.184870 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5044 23:01:14.191841 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
5045 23:01:14.195136 [CA 0] Center 38 (7~69) winsize 63
5046 23:01:14.198307 [CA 1] Center 38 (8~69) winsize 62
5047 23:01:14.201405 [CA 2] Center 35 (5~66) winsize 62
5048 23:01:14.204742 [CA 3] Center 35 (4~66) winsize 63
5049 23:01:14.208082 [CA 4] Center 34 (4~65) winsize 62
5050 23:01:14.211491 [CA 5] Center 33 (3~64) winsize 62
5051 23:01:14.212024
5052 23:01:14.214694 [CmdBusTrainingLP45] Vref(ca) range 1: 35
5053 23:01:14.215222
5054 23:01:14.218658 [CATrainingPosCal] consider 1 rank data
5055 23:01:14.221298 u2DelayCellTimex100 = 270/100 ps
5056 23:01:14.224703 CA0 delay=38 (7~69),Diff = 5 PI (31 cell)
5057 23:01:14.228053 CA1 delay=38 (8~69),Diff = 5 PI (31 cell)
5058 23:01:14.231209 CA2 delay=35 (5~66),Diff = 2 PI (12 cell)
5059 23:01:14.234599 CA3 delay=35 (4~66),Diff = 2 PI (12 cell)
5060 23:01:14.241101 CA4 delay=34 (4~65),Diff = 1 PI (6 cell)
5061 23:01:14.244395 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
5062 23:01:14.244963
5063 23:01:14.247843 CA PerBit enable=1, Macro0, CA PI delay=33
5064 23:01:14.248285
5065 23:01:14.251179 [CBTSetCACLKResult] CA Dly = 33
5066 23:01:14.251612 CS Dly: 6 (0~37)
5067 23:01:14.251954 ==
5068 23:01:14.254183 Dram Type= 6, Freq= 0, CH_0, rank 1
5069 23:01:14.260955 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5070 23:01:14.261439 ==
5071 23:01:14.264460 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5072 23:01:14.271348 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
5073 23:01:14.274886 [CA 0] Center 38 (8~69) winsize 62
5074 23:01:14.277483 [CA 1] Center 38 (8~69) winsize 62
5075 23:01:14.281116 [CA 2] Center 36 (6~66) winsize 61
5076 23:01:14.284575 [CA 3] Center 35 (5~66) winsize 62
5077 23:01:14.287681 [CA 4] Center 35 (4~66) winsize 63
5078 23:01:14.290941 [CA 5] Center 34 (4~65) winsize 62
5079 23:01:14.291397
5080 23:01:14.293897 [CmdBusTrainingLP45] Vref(ca) range 1: 33
5081 23:01:14.294440
5082 23:01:14.297706 [CATrainingPosCal] consider 2 rank data
5083 23:01:14.300830 u2DelayCellTimex100 = 270/100 ps
5084 23:01:14.304034 CA0 delay=38 (8~69),Diff = 4 PI (24 cell)
5085 23:01:14.307440 CA1 delay=38 (8~69),Diff = 4 PI (24 cell)
5086 23:01:14.314144 CA2 delay=36 (6~66),Diff = 2 PI (12 cell)
5087 23:01:14.317123 CA3 delay=35 (5~66),Diff = 1 PI (6 cell)
5088 23:01:14.320761 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
5089 23:01:14.324141 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
5090 23:01:14.324675
5091 23:01:14.327245 CA PerBit enable=1, Macro0, CA PI delay=34
5092 23:01:14.327676
5093 23:01:14.330323 [CBTSetCACLKResult] CA Dly = 34
5094 23:01:14.330760 CS Dly: 7 (0~39)
5095 23:01:14.333515
5096 23:01:14.337219 ----->DramcWriteLeveling(PI) begin...
5097 23:01:14.337756 ==
5098 23:01:14.339957 Dram Type= 6, Freq= 0, CH_0, rank 0
5099 23:01:14.343366 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5100 23:01:14.343886 ==
5101 23:01:14.346961 Write leveling (Byte 0): 33 => 33
5102 23:01:14.349980 Write leveling (Byte 1): 28 => 28
5103 23:01:14.353696 DramcWriteLeveling(PI) end<-----
5104 23:01:14.354231
5105 23:01:14.354578 ==
5106 23:01:14.356688 Dram Type= 6, Freq= 0, CH_0, rank 0
5107 23:01:14.360204 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5108 23:01:14.360741 ==
5109 23:01:14.363540 [Gating] SW mode calibration
5110 23:01:14.370337 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5111 23:01:14.376640 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5112 23:01:14.380142 0 14 0 | B1->B0 | 2e2e 3434 | 1 1 | (1 1) (1 1)
5113 23:01:14.383341 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5114 23:01:14.389654 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5115 23:01:14.393203 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5116 23:01:14.396078 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5117 23:01:14.403018 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5118 23:01:14.406185 0 14 24 | B1->B0 | 3434 3030 | 1 1 | (1 1) (1 1)
5119 23:01:14.409229 0 14 28 | B1->B0 | 3232 2424 | 0 0 | (1 0) (0 0)
5120 23:01:14.416075 0 15 0 | B1->B0 | 2828 2323 | 0 0 | (0 0) (0 0)
5121 23:01:14.419645 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5122 23:01:14.422718 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5123 23:01:14.429227 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5124 23:01:14.432396 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5125 23:01:14.435909 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5126 23:01:14.442615 0 15 24 | B1->B0 | 2323 2f2f | 0 0 | (0 0) (0 0)
5127 23:01:14.446197 0 15 28 | B1->B0 | 2b2b 4646 | 1 0 | (0 0) (0 0)
5128 23:01:14.448992 1 0 0 | B1->B0 | 4242 4646 | 0 0 | (0 0) (0 0)
5129 23:01:14.456219 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5130 23:01:14.458835 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5131 23:01:14.462636 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5132 23:01:14.469124 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5133 23:01:14.472716 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5134 23:01:14.475776 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5135 23:01:14.482785 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
5136 23:01:14.485366 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5137 23:01:14.489048 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5138 23:01:14.495957 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5139 23:01:14.498858 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5140 23:01:14.502380 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5141 23:01:14.508439 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5142 23:01:14.511884 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5143 23:01:14.515236 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5144 23:01:14.522059 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5145 23:01:14.525291 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5146 23:01:14.528493 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5147 23:01:14.535125 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5148 23:01:14.538507 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5149 23:01:14.541778 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5150 23:01:14.548126 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5151 23:01:14.551739 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5152 23:01:14.554906 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5153 23:01:14.561500 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5154 23:01:14.562115 Total UI for P1: 0, mck2ui 16
5155 23:01:14.568036 best dqsien dly found for B0: ( 1, 2, 28)
5156 23:01:14.568572 Total UI for P1: 0, mck2ui 16
5157 23:01:14.574847 best dqsien dly found for B1: ( 1, 3, 0)
5158 23:01:14.578209 best DQS0 dly(MCK, UI, PI) = (1, 2, 28)
5159 23:01:14.581103 best DQS1 dly(MCK, UI, PI) = (1, 3, 0)
5160 23:01:14.581540
5161 23:01:14.584716 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 28)
5162 23:01:14.588100 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 0)
5163 23:01:14.591088 [Gating] SW calibration Done
5164 23:01:14.591578 ==
5165 23:01:14.594557 Dram Type= 6, Freq= 0, CH_0, rank 0
5166 23:01:14.597807 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5167 23:01:14.598251 ==
5168 23:01:14.601176 RX Vref Scan: 0
5169 23:01:14.601615
5170 23:01:14.602061 RX Vref 0 -> 0, step: 1
5171 23:01:14.602481
5172 23:01:14.604082 RX Delay -80 -> 252, step: 8
5173 23:01:14.607611 iDelay=208, Bit 0, Center 107 (16 ~ 199) 184
5174 23:01:14.614025 iDelay=208, Bit 1, Center 107 (16 ~ 199) 184
5175 23:01:14.617564 iDelay=208, Bit 2, Center 103 (16 ~ 191) 176
5176 23:01:14.620859 iDelay=208, Bit 3, Center 103 (16 ~ 191) 176
5177 23:01:14.623966 iDelay=208, Bit 4, Center 107 (16 ~ 199) 184
5178 23:01:14.627211 iDelay=208, Bit 5, Center 99 (8 ~ 191) 184
5179 23:01:14.633895 iDelay=208, Bit 6, Center 115 (24 ~ 207) 184
5180 23:01:14.637215 iDelay=208, Bit 7, Center 115 (24 ~ 207) 184
5181 23:01:14.640524 iDelay=208, Bit 8, Center 83 (-8 ~ 175) 184
5182 23:01:14.644158 iDelay=208, Bit 9, Center 79 (-8 ~ 167) 176
5183 23:01:14.647492 iDelay=208, Bit 10, Center 91 (0 ~ 183) 184
5184 23:01:14.650615 iDelay=208, Bit 11, Center 87 (0 ~ 175) 176
5185 23:01:14.657430 iDelay=208, Bit 12, Center 95 (8 ~ 183) 176
5186 23:01:14.660703 iDelay=208, Bit 13, Center 91 (0 ~ 183) 184
5187 23:01:14.663990 iDelay=208, Bit 14, Center 99 (8 ~ 191) 184
5188 23:01:14.667521 iDelay=208, Bit 15, Center 99 (8 ~ 191) 184
5189 23:01:14.668097 ==
5190 23:01:14.670478 Dram Type= 6, Freq= 0, CH_0, rank 0
5191 23:01:14.673651 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5192 23:01:14.677221 ==
5193 23:01:14.677794 DQS Delay:
5194 23:01:14.678170 DQS0 = 0, DQS1 = 0
5195 23:01:14.680505 DQM Delay:
5196 23:01:14.681123 DQM0 = 107, DQM1 = 90
5197 23:01:14.684146 DQ Delay:
5198 23:01:14.687431 DQ0 =107, DQ1 =107, DQ2 =103, DQ3 =103
5199 23:01:14.690419 DQ4 =107, DQ5 =99, DQ6 =115, DQ7 =115
5200 23:01:14.693758 DQ8 =83, DQ9 =79, DQ10 =91, DQ11 =87
5201 23:01:14.697053 DQ12 =95, DQ13 =91, DQ14 =99, DQ15 =99
5202 23:01:14.697524
5203 23:01:14.697897
5204 23:01:14.698243 ==
5205 23:01:14.700494 Dram Type= 6, Freq= 0, CH_0, rank 0
5206 23:01:14.703595 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5207 23:01:14.704174 ==
5208 23:01:14.704552
5209 23:01:14.704950
5210 23:01:14.706846 TX Vref Scan disable
5211 23:01:14.710090 == TX Byte 0 ==
5212 23:01:14.713139 Update DQ dly =715 (2 ,6, 11) DQ OEN =(2 ,3)
5213 23:01:14.716558 Update DQM dly =715 (2 ,6, 11) DQM OEN =(2 ,3)
5214 23:01:14.720103 == TX Byte 1 ==
5215 23:01:14.723401 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5216 23:01:14.726958 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5217 23:01:14.727427 ==
5218 23:01:14.729952 Dram Type= 6, Freq= 0, CH_0, rank 0
5219 23:01:14.733352 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5220 23:01:14.736264 ==
5221 23:01:14.736739
5222 23:01:14.737176
5223 23:01:14.737549 TX Vref Scan disable
5224 23:01:14.739923 == TX Byte 0 ==
5225 23:01:14.743671 Update DQ dly =716 (2 ,6, 12) DQ OEN =(2 ,3)
5226 23:01:14.749844 Update DQM dly =716 (2 ,6, 12) DQM OEN =(2 ,3)
5227 23:01:14.750276 == TX Byte 1 ==
5228 23:01:14.753137 Update DQ dly =709 (2 ,5, 37) DQ OEN =(2 ,2)
5229 23:01:14.759822 Update DQM dly =709 (2 ,5, 37) DQM OEN =(2 ,2)
5230 23:01:14.760255
5231 23:01:14.760596 [DATLAT]
5232 23:01:14.760971 Freq=933, CH0 RK0
5233 23:01:14.761296
5234 23:01:14.763226 DATLAT Default: 0xd
5235 23:01:14.766824 0, 0xFFFF, sum = 0
5236 23:01:14.767361 1, 0xFFFF, sum = 0
5237 23:01:14.769956 2, 0xFFFF, sum = 0
5238 23:01:14.770394 3, 0xFFFF, sum = 0
5239 23:01:14.772906 4, 0xFFFF, sum = 0
5240 23:01:14.773568 5, 0xFFFF, sum = 0
5241 23:01:14.776437 6, 0xFFFF, sum = 0
5242 23:01:14.776911 7, 0xFFFF, sum = 0
5243 23:01:14.779661 8, 0xFFFF, sum = 0
5244 23:01:14.780100 9, 0xFFFF, sum = 0
5245 23:01:14.783021 10, 0x0, sum = 1
5246 23:01:14.783459 11, 0x0, sum = 2
5247 23:01:14.786635 12, 0x0, sum = 3
5248 23:01:14.787168 13, 0x0, sum = 4
5249 23:01:14.787523 best_step = 11
5250 23:01:14.789759
5251 23:01:14.790189 ==
5252 23:01:14.793059 Dram Type= 6, Freq= 0, CH_0, rank 0
5253 23:01:14.796632 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5254 23:01:14.797202 ==
5255 23:01:14.797554 RX Vref Scan: 1
5256 23:01:14.797882
5257 23:01:14.799882 RX Vref 0 -> 0, step: 1
5258 23:01:14.800416
5259 23:01:14.803504 RX Delay -53 -> 252, step: 4
5260 23:01:14.804032
5261 23:01:14.806315 Set Vref, RX VrefLevel [Byte0]: 60
5262 23:01:14.809273 [Byte1]: 50
5263 23:01:14.812722
5264 23:01:14.813301 Final RX Vref Byte 0 = 60 to rank0
5265 23:01:14.815808 Final RX Vref Byte 1 = 50 to rank0
5266 23:01:14.818800 Final RX Vref Byte 0 = 60 to rank1
5267 23:01:14.822342 Final RX Vref Byte 1 = 50 to rank1==
5268 23:01:14.825401 Dram Type= 6, Freq= 0, CH_0, rank 0
5269 23:01:14.832252 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5270 23:01:14.832338 ==
5271 23:01:14.832407 DQS Delay:
5272 23:01:14.832470 DQS0 = 0, DQS1 = 0
5273 23:01:14.835294 DQM Delay:
5274 23:01:14.835379 DQM0 = 107, DQM1 = 92
5275 23:01:14.839015 DQ Delay:
5276 23:01:14.842103 DQ0 =106, DQ1 =106, DQ2 =104, DQ3 =106
5277 23:01:14.845537 DQ4 =108, DQ5 =98, DQ6 =120, DQ7 =114
5278 23:01:14.848494 DQ8 =84, DQ9 =78, DQ10 =92, DQ11 =90
5279 23:01:14.851822 DQ12 =98, DQ13 =94, DQ14 =104, DQ15 =100
5280 23:01:14.851912
5281 23:01:14.851985
5282 23:01:14.858916 [DQSOSCAuto] RK0, (LSB)MR18= 0x2723, (MSB)MR19= 0x505, tDQSOscB0 = 410 ps tDQSOscB1 = 409 ps
5283 23:01:14.862344 CH0 RK0: MR19=505, MR18=2723
5284 23:01:14.868432 CH0_RK0: MR19=0x505, MR18=0x2723, DQSOSC=409, MR23=63, INC=64, DEC=43
5285 23:01:14.868671
5286 23:01:14.871945 ----->DramcWriteLeveling(PI) begin...
5287 23:01:14.872398 ==
5288 23:01:14.875635 Dram Type= 6, Freq= 0, CH_0, rank 1
5289 23:01:14.878960 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5290 23:01:14.882200 ==
5291 23:01:14.882677 Write leveling (Byte 0): 30 => 30
5292 23:01:14.885156 Write leveling (Byte 1): 28 => 28
5293 23:01:14.888475 DramcWriteLeveling(PI) end<-----
5294 23:01:14.888936
5295 23:01:14.889279 ==
5296 23:01:14.891877 Dram Type= 6, Freq= 0, CH_0, rank 1
5297 23:01:14.898492 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5298 23:01:14.898917 ==
5299 23:01:14.901861 [Gating] SW mode calibration
5300 23:01:14.908516 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5301 23:01:14.912134 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5302 23:01:14.918440 0 14 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5303 23:01:14.921309 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5304 23:01:14.924881 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5305 23:01:14.931783 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5306 23:01:14.934814 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5307 23:01:14.938155 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5308 23:01:14.944757 0 14 24 | B1->B0 | 3434 2f2f | 1 1 | (1 1) (1 1)
5309 23:01:14.947744 0 14 28 | B1->B0 | 2f2f 2323 | 0 0 | (0 1) (0 0)
5310 23:01:14.951372 0 15 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5311 23:01:14.957711 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5312 23:01:14.961314 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5313 23:01:14.964747 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5314 23:01:14.971063 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5315 23:01:14.974271 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5316 23:01:14.977595 0 15 24 | B1->B0 | 2424 2b2b | 0 0 | (0 0) (0 0)
5317 23:01:14.984171 0 15 28 | B1->B0 | 4545 4343 | 0 0 | (0 0) (1 1)
5318 23:01:14.987713 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5319 23:01:14.991117 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5320 23:01:14.998027 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5321 23:01:15.000744 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5322 23:01:15.004178 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5323 23:01:15.010865 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5324 23:01:15.014188 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5325 23:01:15.016957 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
5326 23:01:15.023926 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5327 23:01:15.026975 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5328 23:01:15.030520 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5329 23:01:15.037198 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5330 23:01:15.040172 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5331 23:01:15.043340 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5332 23:01:15.050125 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5333 23:01:15.054082 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5334 23:01:15.056872 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5335 23:01:15.063207 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5336 23:01:15.066752 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5337 23:01:15.070114 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5338 23:01:15.076867 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5339 23:01:15.080616 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5340 23:01:15.083291 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5341 23:01:15.086849 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5342 23:01:15.089967 Total UI for P1: 0, mck2ui 16
5343 23:01:15.093292 best dqsien dly found for B0: ( 1, 2, 24)
5344 23:01:15.096707 Total UI for P1: 0, mck2ui 16
5345 23:01:15.100352 best dqsien dly found for B1: ( 1, 2, 26)
5346 23:01:15.106671 best DQS0 dly(MCK, UI, PI) = (1, 2, 24)
5347 23:01:15.109678 best DQS1 dly(MCK, UI, PI) = (1, 2, 26)
5348 23:01:15.110112
5349 23:01:15.113005 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 24)
5350 23:01:15.116672 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 26)
5351 23:01:15.119732 [Gating] SW calibration Done
5352 23:01:15.120168 ==
5353 23:01:15.123426 Dram Type= 6, Freq= 0, CH_0, rank 1
5354 23:01:15.126654 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5355 23:01:15.127233 ==
5356 23:01:15.129235 RX Vref Scan: 0
5357 23:01:15.129891
5358 23:01:15.130283 RX Vref 0 -> 0, step: 1
5359 23:01:15.130613
5360 23:01:15.132886 RX Delay -80 -> 252, step: 8
5361 23:01:15.136206 iDelay=208, Bit 0, Center 103 (8 ~ 199) 192
5362 23:01:15.143227 iDelay=208, Bit 1, Center 107 (16 ~ 199) 184
5363 23:01:15.146017 iDelay=208, Bit 2, Center 99 (8 ~ 191) 184
5364 23:01:15.148963 iDelay=208, Bit 3, Center 99 (8 ~ 191) 184
5365 23:01:15.152396 iDelay=208, Bit 4, Center 107 (16 ~ 199) 184
5366 23:01:15.155862 iDelay=208, Bit 5, Center 99 (8 ~ 191) 184
5367 23:01:15.159199 iDelay=208, Bit 6, Center 115 (24 ~ 207) 184
5368 23:01:15.165722 iDelay=208, Bit 7, Center 111 (16 ~ 207) 192
5369 23:01:15.169219 iDelay=208, Bit 8, Center 83 (-8 ~ 175) 184
5370 23:01:15.172181 iDelay=208, Bit 9, Center 79 (-8 ~ 167) 176
5371 23:01:15.175610 iDelay=208, Bit 10, Center 91 (0 ~ 183) 184
5372 23:01:15.179009 iDelay=208, Bit 11, Center 87 (0 ~ 175) 176
5373 23:01:15.185781 iDelay=208, Bit 12, Center 95 (0 ~ 191) 192
5374 23:01:15.189219 iDelay=208, Bit 13, Center 91 (0 ~ 183) 184
5375 23:01:15.191860 iDelay=208, Bit 14, Center 99 (8 ~ 191) 184
5376 23:01:15.195511 iDelay=208, Bit 15, Center 99 (8 ~ 191) 184
5377 23:01:15.196085 ==
5378 23:01:15.199066 Dram Type= 6, Freq= 0, CH_0, rank 1
5379 23:01:15.202104 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5380 23:01:15.205675 ==
5381 23:01:15.206247 DQS Delay:
5382 23:01:15.206629 DQS0 = 0, DQS1 = 0
5383 23:01:15.208977 DQM Delay:
5384 23:01:15.209557 DQM0 = 105, DQM1 = 90
5385 23:01:15.212219 DQ Delay:
5386 23:01:15.215584 DQ0 =103, DQ1 =107, DQ2 =99, DQ3 =99
5387 23:01:15.218931 DQ4 =107, DQ5 =99, DQ6 =115, DQ7 =111
5388 23:01:15.222089 DQ8 =83, DQ9 =79, DQ10 =91, DQ11 =87
5389 23:01:15.225221 DQ12 =95, DQ13 =91, DQ14 =99, DQ15 =99
5390 23:01:15.225700
5391 23:01:15.226078
5392 23:01:15.226433 ==
5393 23:01:15.228637 Dram Type= 6, Freq= 0, CH_0, rank 1
5394 23:01:15.231484 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5395 23:01:15.231963 ==
5396 23:01:15.232340
5397 23:01:15.232711
5398 23:01:15.235185 TX Vref Scan disable
5399 23:01:15.235687 == TX Byte 0 ==
5400 23:01:15.241308 Update DQ dly =714 (2 ,6, 10) DQ OEN =(2 ,3)
5401 23:01:15.244928 Update DQM dly =714 (2 ,6, 10) DQM OEN =(2 ,3)
5402 23:01:15.245517 == TX Byte 1 ==
5403 23:01:15.251309 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5404 23:01:15.254656 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5405 23:01:15.255131 ==
5406 23:01:15.257858 Dram Type= 6, Freq= 0, CH_0, rank 1
5407 23:01:15.261380 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5408 23:01:15.261870 ==
5409 23:01:15.264573
5410 23:01:15.265029
5411 23:01:15.265405 TX Vref Scan disable
5412 23:01:15.267951 == TX Byte 0 ==
5413 23:01:15.271389 Update DQ dly =714 (2 ,6, 10) DQ OEN =(2 ,3)
5414 23:01:15.278068 Update DQM dly =714 (2 ,6, 10) DQM OEN =(2 ,3)
5415 23:01:15.278503 == TX Byte 1 ==
5416 23:01:15.281210 Update DQ dly =709 (2 ,5, 37) DQ OEN =(2 ,2)
5417 23:01:15.288210 Update DQM dly =709 (2 ,5, 37) DQM OEN =(2 ,2)
5418 23:01:15.288743
5419 23:01:15.289133 [DATLAT]
5420 23:01:15.289455 Freq=933, CH0 RK1
5421 23:01:15.289771
5422 23:01:15.291210 DATLAT Default: 0xb
5423 23:01:15.291636 0, 0xFFFF, sum = 0
5424 23:01:15.294894 1, 0xFFFF, sum = 0
5425 23:01:15.295467 2, 0xFFFF, sum = 0
5426 23:01:15.298213 3, 0xFFFF, sum = 0
5427 23:01:15.301071 4, 0xFFFF, sum = 0
5428 23:01:15.301508 5, 0xFFFF, sum = 0
5429 23:01:15.305113 6, 0xFFFF, sum = 0
5430 23:01:15.305697 7, 0xFFFF, sum = 0
5431 23:01:15.308162 8, 0xFFFF, sum = 0
5432 23:01:15.308804 9, 0xFFFF, sum = 0
5433 23:01:15.310996 10, 0x0, sum = 1
5434 23:01:15.311476 11, 0x0, sum = 2
5435 23:01:15.314706 12, 0x0, sum = 3
5436 23:01:15.315286 13, 0x0, sum = 4
5437 23:01:15.315669 best_step = 11
5438 23:01:15.316020
5439 23:01:15.317934 ==
5440 23:01:15.321067 Dram Type= 6, Freq= 0, CH_0, rank 1
5441 23:01:15.324679 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5442 23:01:15.325283 ==
5443 23:01:15.325661 RX Vref Scan: 0
5444 23:01:15.326019
5445 23:01:15.327780 RX Vref 0 -> 0, step: 1
5446 23:01:15.328250
5447 23:01:15.330749 RX Delay -53 -> 252, step: 4
5448 23:01:15.337391 iDelay=203, Bit 0, Center 104 (19 ~ 190) 172
5449 23:01:15.340815 iDelay=203, Bit 1, Center 106 (19 ~ 194) 176
5450 23:01:15.344451 iDelay=203, Bit 2, Center 102 (15 ~ 190) 176
5451 23:01:15.347685 iDelay=203, Bit 3, Center 100 (15 ~ 186) 172
5452 23:01:15.350557 iDelay=203, Bit 4, Center 106 (19 ~ 194) 176
5453 23:01:15.357165 iDelay=203, Bit 5, Center 96 (11 ~ 182) 172
5454 23:01:15.360675 iDelay=203, Bit 6, Center 116 (31 ~ 202) 172
5455 23:01:15.363590 iDelay=203, Bit 7, Center 112 (27 ~ 198) 172
5456 23:01:15.366990 iDelay=203, Bit 8, Center 86 (3 ~ 170) 168
5457 23:01:15.370488 iDelay=203, Bit 9, Center 80 (-1 ~ 162) 164
5458 23:01:15.373625 iDelay=203, Bit 10, Center 94 (11 ~ 178) 168
5459 23:01:15.380099 iDelay=203, Bit 11, Center 90 (7 ~ 174) 168
5460 23:01:15.383484 iDelay=203, Bit 12, Center 98 (11 ~ 186) 176
5461 23:01:15.386858 iDelay=203, Bit 13, Center 94 (11 ~ 178) 168
5462 23:01:15.390115 iDelay=203, Bit 14, Center 102 (15 ~ 190) 176
5463 23:01:15.393352 iDelay=203, Bit 15, Center 98 (15 ~ 182) 168
5464 23:01:15.396924 ==
5465 23:01:15.400353 Dram Type= 6, Freq= 0, CH_0, rank 1
5466 23:01:15.403746 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5467 23:01:15.404278 ==
5468 23:01:15.404625 DQS Delay:
5469 23:01:15.407109 DQS0 = 0, DQS1 = 0
5470 23:01:15.407678 DQM Delay:
5471 23:01:15.410117 DQM0 = 105, DQM1 = 92
5472 23:01:15.410569 DQ Delay:
5473 23:01:15.413728 DQ0 =104, DQ1 =106, DQ2 =102, DQ3 =100
5474 23:01:15.417105 DQ4 =106, DQ5 =96, DQ6 =116, DQ7 =112
5475 23:01:15.420591 DQ8 =86, DQ9 =80, DQ10 =94, DQ11 =90
5476 23:01:15.424023 DQ12 =98, DQ13 =94, DQ14 =102, DQ15 =98
5477 23:01:15.424597
5478 23:01:15.425012
5479 23:01:15.433331 [DQSOSCAuto] RK1, (LSB)MR18= 0x2507, (MSB)MR19= 0x505, tDQSOscB0 = 419 ps tDQSOscB1 = 410 ps
5480 23:01:15.433940 CH0 RK1: MR19=505, MR18=2507
5481 23:01:15.440070 CH0_RK1: MR19=0x505, MR18=0x2507, DQSOSC=410, MR23=63, INC=64, DEC=42
5482 23:01:15.443361 [RxdqsGatingPostProcess] freq 933
5483 23:01:15.449648 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
5484 23:01:15.452965 best DQS0 dly(2T, 0.5T) = (0, 10)
5485 23:01:15.456204 best DQS1 dly(2T, 0.5T) = (0, 11)
5486 23:01:15.459645 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5487 23:01:15.463565 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
5488 23:01:15.464131 best DQS0 dly(2T, 0.5T) = (0, 10)
5489 23:01:15.466533 best DQS1 dly(2T, 0.5T) = (0, 10)
5490 23:01:15.469758 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5491 23:01:15.473148 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5492 23:01:15.476466 Pre-setting of DQS Precalculation
5493 23:01:15.482949 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5494 23:01:15.483531 ==
5495 23:01:15.486113 Dram Type= 6, Freq= 0, CH_1, rank 0
5496 23:01:15.489504 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5497 23:01:15.489937 ==
5498 23:01:15.496140 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5499 23:01:15.502802 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=31, u1VrefScanEnd=31
5500 23:01:15.506101 [CA 0] Center 37 (7~68) winsize 62
5501 23:01:15.509202 [CA 1] Center 37 (7~68) winsize 62
5502 23:01:15.512572 [CA 2] Center 36 (6~66) winsize 61
5503 23:01:15.515999 [CA 3] Center 34 (4~65) winsize 62
5504 23:01:15.519305 [CA 4] Center 35 (5~65) winsize 61
5505 23:01:15.522689 [CA 5] Center 34 (4~65) winsize 62
5506 23:01:15.523150
5507 23:01:15.526017 [CmdBusTrainingLP45] Vref(ca) range 1: 31
5508 23:01:15.526464
5509 23:01:15.529339 [CATrainingPosCal] consider 1 rank data
5510 23:01:15.532825 u2DelayCellTimex100 = 270/100 ps
5511 23:01:15.535632 CA0 delay=37 (7~68),Diff = 3 PI (18 cell)
5512 23:01:15.538635 CA1 delay=37 (7~68),Diff = 3 PI (18 cell)
5513 23:01:15.541900 CA2 delay=36 (6~66),Diff = 2 PI (12 cell)
5514 23:01:15.545349 CA3 delay=34 (4~65),Diff = 0 PI (0 cell)
5515 23:01:15.548660 CA4 delay=35 (5~65),Diff = 1 PI (6 cell)
5516 23:01:15.551977 CA5 delay=34 (4~65),Diff = 0 PI (0 cell)
5517 23:01:15.552050
5518 23:01:15.558680 CA PerBit enable=1, Macro0, CA PI delay=34
5519 23:01:15.558751
5520 23:01:15.558815 [CBTSetCACLKResult] CA Dly = 34
5521 23:01:15.561877 CS Dly: 6 (0~37)
5522 23:01:15.561946 ==
5523 23:01:15.565361 Dram Type= 6, Freq= 0, CH_1, rank 1
5524 23:01:15.568574 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5525 23:01:15.568646 ==
5526 23:01:15.575390 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5527 23:01:15.582151 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
5528 23:01:15.584880 [CA 0] Center 38 (8~69) winsize 62
5529 23:01:15.588233 [CA 1] Center 38 (8~69) winsize 62
5530 23:01:15.591681 [CA 2] Center 36 (6~66) winsize 61
5531 23:01:15.595060 [CA 3] Center 35 (5~65) winsize 61
5532 23:01:15.598482 [CA 4] Center 35 (5~65) winsize 61
5533 23:01:15.601782 [CA 5] Center 35 (5~65) winsize 61
5534 23:01:15.601852
5535 23:01:15.605195 [CmdBusTrainingLP45] Vref(ca) range 1: 35
5536 23:01:15.605263
5537 23:01:15.608105 [CATrainingPosCal] consider 2 rank data
5538 23:01:15.611789 u2DelayCellTimex100 = 270/100 ps
5539 23:01:15.615042 CA0 delay=38 (8~68),Diff = 3 PI (18 cell)
5540 23:01:15.618430 CA1 delay=38 (8~68),Diff = 3 PI (18 cell)
5541 23:01:15.621606 CA2 delay=36 (6~66),Diff = 1 PI (6 cell)
5542 23:01:15.625017 CA3 delay=35 (5~65),Diff = 0 PI (0 cell)
5543 23:01:15.628289 CA4 delay=35 (5~65),Diff = 0 PI (0 cell)
5544 23:01:15.631634 CA5 delay=35 (5~65),Diff = 0 PI (0 cell)
5545 23:01:15.634986
5546 23:01:15.637959 CA PerBit enable=1, Macro0, CA PI delay=35
5547 23:01:15.638069
5548 23:01:15.641649 [CBTSetCACLKResult] CA Dly = 35
5549 23:01:15.641753 CS Dly: 7 (0~39)
5550 23:01:15.641847
5551 23:01:15.644527 ----->DramcWriteLeveling(PI) begin...
5552 23:01:15.644629 ==
5553 23:01:15.647919 Dram Type= 6, Freq= 0, CH_1, rank 0
5554 23:01:15.651177 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5555 23:01:15.654578 ==
5556 23:01:15.654680 Write leveling (Byte 0): 24 => 24
5557 23:01:15.657951 Write leveling (Byte 1): 26 => 26
5558 23:01:15.661283 DramcWriteLeveling(PI) end<-----
5559 23:01:15.661386
5560 23:01:15.661478 ==
5561 23:01:15.664660 Dram Type= 6, Freq= 0, CH_1, rank 0
5562 23:01:15.671019 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5563 23:01:15.671139 ==
5564 23:01:15.674409 [Gating] SW mode calibration
5565 23:01:15.680892 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5566 23:01:15.684446 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5567 23:01:15.691172 0 14 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5568 23:01:15.694250 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5569 23:01:15.697740 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5570 23:01:15.704311 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5571 23:01:15.707310 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5572 23:01:15.710674 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5573 23:01:15.717632 0 14 24 | B1->B0 | 3030 2f2f | 1 1 | (1 1) (1 0)
5574 23:01:15.721020 0 14 28 | B1->B0 | 2626 2323 | 0 0 | (0 0) (0 0)
5575 23:01:15.724377 0 15 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5576 23:01:15.730586 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5577 23:01:15.733937 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5578 23:01:15.737249 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5579 23:01:15.743973 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5580 23:01:15.747395 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5581 23:01:15.750652 0 15 24 | B1->B0 | 2626 2c2c | 0 0 | (0 0) (1 1)
5582 23:01:15.754007 0 15 28 | B1->B0 | 3f3f 4646 | 0 0 | (0 0) (0 0)
5583 23:01:15.760750 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5584 23:01:15.763668 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5585 23:01:15.767075 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5586 23:01:15.773636 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5587 23:01:15.777129 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5588 23:01:15.780581 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5589 23:01:15.786911 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
5590 23:01:15.790450 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5591 23:01:15.793465 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5592 23:01:15.800024 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5593 23:01:15.803406 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5594 23:01:15.806888 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5595 23:01:15.813407 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5596 23:01:15.816741 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5597 23:01:15.820075 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5598 23:01:15.826812 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5599 23:01:15.830088 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5600 23:01:15.833429 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5601 23:01:15.840081 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5602 23:01:15.843444 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5603 23:01:15.846770 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5604 23:01:15.852842 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5605 23:01:15.856151 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5606 23:01:15.859462 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5607 23:01:15.862894 Total UI for P1: 0, mck2ui 16
5608 23:01:15.866272 best dqsien dly found for B0: ( 1, 2, 22)
5609 23:01:15.870058 Total UI for P1: 0, mck2ui 16
5610 23:01:15.873201 best dqsien dly found for B1: ( 1, 2, 24)
5611 23:01:15.876401 best DQS0 dly(MCK, UI, PI) = (1, 2, 22)
5612 23:01:15.879852 best DQS1 dly(MCK, UI, PI) = (1, 2, 24)
5613 23:01:15.883570
5614 23:01:15.886319 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 22)
5615 23:01:15.889832 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 24)
5616 23:01:15.893273 [Gating] SW calibration Done
5617 23:01:15.893695 ==
5618 23:01:15.896577 Dram Type= 6, Freq= 0, CH_1, rank 0
5619 23:01:15.899540 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5620 23:01:15.899964 ==
5621 23:01:15.900304 RX Vref Scan: 0
5622 23:01:15.902761
5623 23:01:15.903211 RX Vref 0 -> 0, step: 1
5624 23:01:15.903553
5625 23:01:15.906696 RX Delay -80 -> 252, step: 8
5626 23:01:15.909886 iDelay=208, Bit 0, Center 103 (16 ~ 191) 176
5627 23:01:15.912972 iDelay=208, Bit 1, Center 95 (8 ~ 183) 176
5628 23:01:15.919673 iDelay=208, Bit 2, Center 91 (0 ~ 183) 184
5629 23:01:15.922840 iDelay=208, Bit 3, Center 103 (16 ~ 191) 176
5630 23:01:15.926120 iDelay=208, Bit 4, Center 103 (16 ~ 191) 176
5631 23:01:15.929381 iDelay=208, Bit 5, Center 111 (24 ~ 199) 176
5632 23:01:15.932698 iDelay=208, Bit 6, Center 111 (16 ~ 207) 192
5633 23:01:15.939597 iDelay=208, Bit 7, Center 99 (8 ~ 191) 184
5634 23:01:15.942645 iDelay=208, Bit 8, Center 83 (-8 ~ 175) 184
5635 23:01:15.945829 iDelay=208, Bit 9, Center 83 (-8 ~ 175) 184
5636 23:01:15.949349 iDelay=208, Bit 10, Center 99 (8 ~ 191) 184
5637 23:01:15.952639 iDelay=208, Bit 11, Center 91 (0 ~ 183) 184
5638 23:01:15.955566 iDelay=208, Bit 12, Center 103 (8 ~ 199) 192
5639 23:01:15.962318 iDelay=208, Bit 13, Center 103 (8 ~ 199) 192
5640 23:01:15.965634 iDelay=208, Bit 14, Center 103 (8 ~ 199) 192
5641 23:01:15.968869 iDelay=208, Bit 15, Center 99 (8 ~ 191) 184
5642 23:01:15.969306 ==
5643 23:01:15.972191 Dram Type= 6, Freq= 0, CH_1, rank 0
5644 23:01:15.975527 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5645 23:01:15.976063 ==
5646 23:01:15.978874 DQS Delay:
5647 23:01:15.979312 DQS0 = 0, DQS1 = 0
5648 23:01:15.982208 DQM Delay:
5649 23:01:15.982644 DQM0 = 102, DQM1 = 95
5650 23:01:15.983079 DQ Delay:
5651 23:01:15.985565 DQ0 =103, DQ1 =95, DQ2 =91, DQ3 =103
5652 23:01:15.988744 DQ4 =103, DQ5 =111, DQ6 =111, DQ7 =99
5653 23:01:15.992389 DQ8 =83, DQ9 =83, DQ10 =99, DQ11 =91
5654 23:01:15.998931 DQ12 =103, DQ13 =103, DQ14 =103, DQ15 =99
5655 23:01:15.999532
5656 23:01:15.999902
5657 23:01:16.000229 ==
5658 23:01:16.001978 Dram Type= 6, Freq= 0, CH_1, rank 0
5659 23:01:16.005532 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5660 23:01:16.006019 ==
5661 23:01:16.006386
5662 23:01:16.006710
5663 23:01:16.008560 TX Vref Scan disable
5664 23:01:16.009077 == TX Byte 0 ==
5665 23:01:16.015450 Update DQ dly =708 (2 ,5, 36) DQ OEN =(2 ,2)
5666 23:01:16.018634 Update DQM dly =708 (2 ,5, 36) DQM OEN =(2 ,2)
5667 23:01:16.019071 == TX Byte 1 ==
5668 23:01:16.025057 Update DQ dly =709 (2 ,5, 37) DQ OEN =(2 ,2)
5669 23:01:16.028639 Update DQM dly =709 (2 ,5, 37) DQM OEN =(2 ,2)
5670 23:01:16.029101 ==
5671 23:01:16.031662 Dram Type= 6, Freq= 0, CH_1, rank 0
5672 23:01:16.035268 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5673 23:01:16.035697 ==
5674 23:01:16.036039
5675 23:01:16.038505
5676 23:01:16.038932 TX Vref Scan disable
5677 23:01:16.041869 == TX Byte 0 ==
5678 23:01:16.045182 Update DQ dly =708 (2 ,5, 36) DQ OEN =(2 ,2)
5679 23:01:16.051487 Update DQM dly =708 (2 ,5, 36) DQM OEN =(2 ,2)
5680 23:01:16.051915 == TX Byte 1 ==
5681 23:01:16.054874 Update DQ dly =708 (2 ,5, 36) DQ OEN =(2 ,2)
5682 23:01:16.061433 Update DQM dly =708 (2 ,5, 36) DQM OEN =(2 ,2)
5683 23:01:16.061857
5684 23:01:16.062193 [DATLAT]
5685 23:01:16.062511 Freq=933, CH1 RK0
5686 23:01:16.062823
5687 23:01:16.064725 DATLAT Default: 0xd
5688 23:01:16.065184 0, 0xFFFF, sum = 0
5689 23:01:16.068092 1, 0xFFFF, sum = 0
5690 23:01:16.068525 2, 0xFFFF, sum = 0
5691 23:01:16.071440 3, 0xFFFF, sum = 0
5692 23:01:16.074752 4, 0xFFFF, sum = 0
5693 23:01:16.075196 5, 0xFFFF, sum = 0
5694 23:01:16.078205 6, 0xFFFF, sum = 0
5695 23:01:16.078636 7, 0xFFFF, sum = 0
5696 23:01:16.081667 8, 0xFFFF, sum = 0
5697 23:01:16.082121 9, 0xFFFF, sum = 0
5698 23:01:16.084891 10, 0x0, sum = 1
5699 23:01:16.085322 11, 0x0, sum = 2
5700 23:01:16.088066 12, 0x0, sum = 3
5701 23:01:16.088499 13, 0x0, sum = 4
5702 23:01:16.088887 best_step = 11
5703 23:01:16.089210
5704 23:01:16.091522 ==
5705 23:01:16.094792 Dram Type= 6, Freq= 0, CH_1, rank 0
5706 23:01:16.097993 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5707 23:01:16.098422 ==
5708 23:01:16.098758 RX Vref Scan: 1
5709 23:01:16.099078
5710 23:01:16.101272 RX Vref 0 -> 0, step: 1
5711 23:01:16.101695
5712 23:01:16.104508 RX Delay -53 -> 252, step: 4
5713 23:01:16.104956
5714 23:01:16.107470 Set Vref, RX VrefLevel [Byte0]: 51
5715 23:01:16.110955 [Byte1]: 52
5716 23:01:16.111647
5717 23:01:16.114164 Final RX Vref Byte 0 = 51 to rank0
5718 23:01:16.117717 Final RX Vref Byte 1 = 52 to rank0
5719 23:01:16.120849 Final RX Vref Byte 0 = 51 to rank1
5720 23:01:16.124412 Final RX Vref Byte 1 = 52 to rank1==
5721 23:01:16.127616 Dram Type= 6, Freq= 0, CH_1, rank 0
5722 23:01:16.131169 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5723 23:01:16.134253 ==
5724 23:01:16.134827 DQS Delay:
5725 23:01:16.135385 DQS0 = 0, DQS1 = 0
5726 23:01:16.137561 DQM Delay:
5727 23:01:16.138011 DQM0 = 104, DQM1 = 98
5728 23:01:16.140685 DQ Delay:
5729 23:01:16.143928 DQ0 =108, DQ1 =98, DQ2 =96, DQ3 =102
5730 23:01:16.147176 DQ4 =104, DQ5 =112, DQ6 =114, DQ7 =100
5731 23:01:16.150741 DQ8 =88, DQ9 =86, DQ10 =102, DQ11 =94
5732 23:01:16.154139 DQ12 =108, DQ13 =102, DQ14 =106, DQ15 =102
5733 23:01:16.154649
5734 23:01:16.154993
5735 23:01:16.160505 [DQSOSCAuto] RK0, (LSB)MR18= 0x162e, (MSB)MR19= 0x505, tDQSOscB0 = 407 ps tDQSOscB1 = 414 ps
5736 23:01:16.163773 CH1 RK0: MR19=505, MR18=162E
5737 23:01:16.170555 CH1_RK0: MR19=0x505, MR18=0x162E, DQSOSC=407, MR23=63, INC=65, DEC=43
5738 23:01:16.171144
5739 23:01:16.173814 ----->DramcWriteLeveling(PI) begin...
5740 23:01:16.174334 ==
5741 23:01:16.176599 Dram Type= 6, Freq= 0, CH_1, rank 1
5742 23:01:16.180034 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5743 23:01:16.183422 ==
5744 23:01:16.183950 Write leveling (Byte 0): 27 => 27
5745 23:01:16.186878 Write leveling (Byte 1): 27 => 27
5746 23:01:16.190124 DramcWriteLeveling(PI) end<-----
5747 23:01:16.190832
5748 23:01:16.191440 ==
5749 23:01:16.193606 Dram Type= 6, Freq= 0, CH_1, rank 1
5750 23:01:16.200120 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5751 23:01:16.200655 ==
5752 23:01:16.203327 [Gating] SW mode calibration
5753 23:01:16.210045 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5754 23:01:16.213150 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5755 23:01:16.219680 0 14 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5756 23:01:16.223085 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5757 23:01:16.226583 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5758 23:01:16.232894 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5759 23:01:16.236203 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5760 23:01:16.239570 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5761 23:01:16.246481 0 14 24 | B1->B0 | 3030 3434 | 1 1 | (1 0) (1 0)
5762 23:01:16.249384 0 14 28 | B1->B0 | 2323 2e2e | 0 1 | (0 0) (1 0)
5763 23:01:16.253024 0 15 0 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)
5764 23:01:16.259178 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5765 23:01:16.262694 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5766 23:01:16.266047 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5767 23:01:16.272586 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5768 23:01:16.276095 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5769 23:01:16.279055 0 15 24 | B1->B0 | 2d2d 2525 | 0 0 | (0 0) (0 0)
5770 23:01:16.285833 0 15 28 | B1->B0 | 4040 3636 | 0 1 | (0 0) (0 0)
5771 23:01:16.289268 1 0 0 | B1->B0 | 4646 4545 | 0 0 | (0 0) (0 0)
5772 23:01:16.292372 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5773 23:01:16.299147 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5774 23:01:16.302483 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5775 23:01:16.306154 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5776 23:01:16.312240 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5777 23:01:16.315710 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
5778 23:01:16.319089 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
5779 23:01:16.325171 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5780 23:01:16.328510 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5781 23:01:16.331997 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5782 23:01:16.338451 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5783 23:01:16.341996 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5784 23:01:16.345161 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5785 23:01:16.351519 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5786 23:01:16.354850 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5787 23:01:16.358571 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5788 23:01:16.365633 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5789 23:01:16.368223 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5790 23:01:16.371525 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5791 23:01:16.378609 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5792 23:01:16.381699 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5793 23:01:16.385110 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5794 23:01:16.391663 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
5795 23:01:16.392089 Total UI for P1: 0, mck2ui 16
5796 23:01:16.394595 best dqsien dly found for B1: ( 1, 2, 26)
5797 23:01:16.401272 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5798 23:01:16.404791 Total UI for P1: 0, mck2ui 16
5799 23:01:16.408140 best dqsien dly found for B0: ( 1, 2, 28)
5800 23:01:16.411333 best DQS0 dly(MCK, UI, PI) = (1, 2, 28)
5801 23:01:16.414588 best DQS1 dly(MCK, UI, PI) = (1, 2, 26)
5802 23:01:16.415023
5803 23:01:16.418174 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 28)
5804 23:01:16.420996 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 26)
5805 23:01:16.424416 [Gating] SW calibration Done
5806 23:01:16.425066 ==
5807 23:01:16.427588 Dram Type= 6, Freq= 0, CH_1, rank 1
5808 23:01:16.431163 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5809 23:01:16.431793 ==
5810 23:01:16.434399 RX Vref Scan: 0
5811 23:01:16.435032
5812 23:01:16.437721 RX Vref 0 -> 0, step: 1
5813 23:01:16.438153
5814 23:01:16.438497 RX Delay -80 -> 252, step: 8
5815 23:01:16.444263 iDelay=200, Bit 0, Center 107 (24 ~ 191) 168
5816 23:01:16.447578 iDelay=200, Bit 1, Center 99 (16 ~ 183) 168
5817 23:01:16.451111 iDelay=200, Bit 2, Center 91 (8 ~ 175) 168
5818 23:01:16.454651 iDelay=200, Bit 3, Center 103 (16 ~ 191) 176
5819 23:01:16.457656 iDelay=200, Bit 4, Center 103 (16 ~ 191) 176
5820 23:01:16.464404 iDelay=200, Bit 5, Center 111 (24 ~ 199) 176
5821 23:01:16.467766 iDelay=200, Bit 6, Center 107 (16 ~ 199) 184
5822 23:01:16.471466 iDelay=200, Bit 7, Center 103 (16 ~ 191) 176
5823 23:01:16.474066 iDelay=200, Bit 8, Center 83 (-8 ~ 175) 184
5824 23:01:16.477475 iDelay=200, Bit 9, Center 87 (0 ~ 175) 176
5825 23:01:16.484059 iDelay=200, Bit 10, Center 99 (8 ~ 191) 184
5826 23:01:16.487739 iDelay=200, Bit 11, Center 91 (0 ~ 183) 184
5827 23:01:16.490578 iDelay=200, Bit 12, Center 103 (8 ~ 199) 192
5828 23:01:16.493623 iDelay=200, Bit 13, Center 103 (8 ~ 199) 192
5829 23:01:16.496920 iDelay=200, Bit 14, Center 103 (8 ~ 199) 192
5830 23:01:16.503578 iDelay=200, Bit 15, Center 107 (16 ~ 199) 184
5831 23:01:16.504204 ==
5832 23:01:16.506996 Dram Type= 6, Freq= 0, CH_1, rank 1
5833 23:01:16.510302 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5834 23:01:16.510738 ==
5835 23:01:16.511084 DQS Delay:
5836 23:01:16.513874 DQS0 = 0, DQS1 = 0
5837 23:01:16.514406 DQM Delay:
5838 23:01:16.516959 DQM0 = 103, DQM1 = 97
5839 23:01:16.517484 DQ Delay:
5840 23:01:16.520239 DQ0 =107, DQ1 =99, DQ2 =91, DQ3 =103
5841 23:01:16.523576 DQ4 =103, DQ5 =111, DQ6 =107, DQ7 =103
5842 23:01:16.526976 DQ8 =83, DQ9 =87, DQ10 =99, DQ11 =91
5843 23:01:16.530261 DQ12 =103, DQ13 =103, DQ14 =103, DQ15 =107
5844 23:01:16.530853
5845 23:01:16.531221
5846 23:01:16.531737 ==
5847 23:01:16.533202 Dram Type= 6, Freq= 0, CH_1, rank 1
5848 23:01:16.540115 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5849 23:01:16.540551 ==
5850 23:01:16.541212
5851 23:01:16.541614
5852 23:01:16.541957 TX Vref Scan disable
5853 23:01:16.543433 == TX Byte 0 ==
5854 23:01:16.546950 Update DQ dly =712 (2 ,5, 40) DQ OEN =(2 ,2)
5855 23:01:16.553340 Update DQM dly =712 (2 ,5, 40) DQM OEN =(2 ,2)
5856 23:01:16.553775 == TX Byte 1 ==
5857 23:01:16.556907 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5858 23:01:16.563601 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5859 23:01:16.564160 ==
5860 23:01:16.566513 Dram Type= 6, Freq= 0, CH_1, rank 1
5861 23:01:16.570277 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5862 23:01:16.571025 ==
5863 23:01:16.571537
5864 23:01:16.572027
5865 23:01:16.573280 TX Vref Scan disable
5866 23:01:16.573714 == TX Byte 0 ==
5867 23:01:16.580119 Update DQ dly =711 (2 ,5, 39) DQ OEN =(2 ,2)
5868 23:01:16.583098 Update DQM dly =711 (2 ,5, 39) DQM OEN =(2 ,2)
5869 23:01:16.586320 == TX Byte 1 ==
5870 23:01:16.589618 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5871 23:01:16.593410 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5872 23:01:16.593886
5873 23:01:16.594287 [DATLAT]
5874 23:01:16.596138 Freq=933, CH1 RK1
5875 23:01:16.596645
5876 23:01:16.597214 DATLAT Default: 0xb
5877 23:01:16.599649 0, 0xFFFF, sum = 0
5878 23:01:16.602793 1, 0xFFFF, sum = 0
5879 23:01:16.603232 2, 0xFFFF, sum = 0
5880 23:01:16.606465 3, 0xFFFF, sum = 0
5881 23:01:16.607031 4, 0xFFFF, sum = 0
5882 23:01:16.609518 5, 0xFFFF, sum = 0
5883 23:01:16.609959 6, 0xFFFF, sum = 0
5884 23:01:16.613048 7, 0xFFFF, sum = 0
5885 23:01:16.613589 8, 0xFFFF, sum = 0
5886 23:01:16.616257 9, 0xFFFF, sum = 0
5887 23:01:16.616845 10, 0x0, sum = 1
5888 23:01:16.619310 11, 0x0, sum = 2
5889 23:01:16.619847 12, 0x0, sum = 3
5890 23:01:16.623008 13, 0x0, sum = 4
5891 23:01:16.623552 best_step = 11
5892 23:01:16.623900
5893 23:01:16.624249 ==
5894 23:01:16.626393 Dram Type= 6, Freq= 0, CH_1, rank 1
5895 23:01:16.629136 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5896 23:01:16.629600 ==
5897 23:01:16.632590 RX Vref Scan: 0
5898 23:01:16.633126
5899 23:01:16.635728 RX Vref 0 -> 0, step: 1
5900 23:01:16.636192
5901 23:01:16.636698 RX Delay -53 -> 252, step: 4
5902 23:01:16.643885 iDelay=199, Bit 0, Center 110 (35 ~ 186) 152
5903 23:01:16.647078 iDelay=199, Bit 1, Center 98 (19 ~ 178) 160
5904 23:01:16.650416 iDelay=199, Bit 2, Center 94 (15 ~ 174) 160
5905 23:01:16.654021 iDelay=199, Bit 3, Center 104 (23 ~ 186) 164
5906 23:01:16.657323 iDelay=199, Bit 4, Center 108 (27 ~ 190) 164
5907 23:01:16.663945 iDelay=199, Bit 5, Center 116 (35 ~ 198) 164
5908 23:01:16.667282 iDelay=199, Bit 6, Center 112 (31 ~ 194) 164
5909 23:01:16.670441 iDelay=199, Bit 7, Center 102 (23 ~ 182) 160
5910 23:01:16.673723 iDelay=199, Bit 8, Center 84 (-1 ~ 170) 172
5911 23:01:16.676742 iDelay=199, Bit 9, Center 88 (3 ~ 174) 172
5912 23:01:16.683448 iDelay=199, Bit 10, Center 96 (11 ~ 182) 172
5913 23:01:16.686837 iDelay=199, Bit 11, Center 92 (7 ~ 178) 172
5914 23:01:16.690500 iDelay=199, Bit 12, Center 106 (19 ~ 194) 176
5915 23:01:16.693525 iDelay=199, Bit 13, Center 104 (19 ~ 190) 172
5916 23:01:16.696762 iDelay=199, Bit 14, Center 104 (15 ~ 194) 180
5917 23:01:16.703847 iDelay=199, Bit 15, Center 108 (23 ~ 194) 172
5918 23:01:16.704398 ==
5919 23:01:16.706912 Dram Type= 6, Freq= 0, CH_1, rank 1
5920 23:01:16.710172 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5921 23:01:16.710738 ==
5922 23:01:16.711228 DQS Delay:
5923 23:01:16.713685 DQS0 = 0, DQS1 = 0
5924 23:01:16.714121 DQM Delay:
5925 23:01:16.716706 DQM0 = 105, DQM1 = 97
5926 23:01:16.717181 DQ Delay:
5927 23:01:16.720129 DQ0 =110, DQ1 =98, DQ2 =94, DQ3 =104
5928 23:01:16.723601 DQ4 =108, DQ5 =116, DQ6 =112, DQ7 =102
5929 23:01:16.726714 DQ8 =84, DQ9 =88, DQ10 =96, DQ11 =92
5930 23:01:16.729714 DQ12 =106, DQ13 =104, DQ14 =104, DQ15 =108
5931 23:01:16.730183
5932 23:01:16.730604
5933 23:01:16.739675 [DQSOSCAuto] RK1, (LSB)MR18= 0x21fe, (MSB)MR19= 0x504, tDQSOscB0 = 422 ps tDQSOscB1 = 411 ps
5934 23:01:16.742973 CH1 RK1: MR19=504, MR18=21FE
5935 23:01:16.746473 CH1_RK1: MR19=0x504, MR18=0x21FE, DQSOSC=411, MR23=63, INC=64, DEC=42
5936 23:01:16.749681 [RxdqsGatingPostProcess] freq 933
5937 23:01:16.756366 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
5938 23:01:16.759411 best DQS0 dly(2T, 0.5T) = (0, 10)
5939 23:01:16.762837 best DQS1 dly(2T, 0.5T) = (0, 10)
5940 23:01:16.766336 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5941 23:01:16.769310 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5942 23:01:16.772733 best DQS0 dly(2T, 0.5T) = (0, 10)
5943 23:01:16.776213 best DQS1 dly(2T, 0.5T) = (0, 10)
5944 23:01:16.779428 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5945 23:01:16.782843 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5946 23:01:16.786194 Pre-setting of DQS Precalculation
5947 23:01:16.789350 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5948 23:01:16.795859 sync_frequency_calibration_params sync calibration params of frequency 933 to shu:3
5949 23:01:16.802403 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
5950 23:01:16.805913
5951 23:01:16.806459
5952 23:01:16.806808 [Calibration Summary] 1866 Mbps
5953 23:01:16.809227 CH 0, Rank 0
5954 23:01:16.809650 SW Impedance : PASS
5955 23:01:16.812652 DUTY Scan : NO K
5956 23:01:16.815477 ZQ Calibration : PASS
5957 23:01:16.815904 Jitter Meter : NO K
5958 23:01:16.819016 CBT Training : PASS
5959 23:01:16.822057 Write leveling : PASS
5960 23:01:16.822485 RX DQS gating : PASS
5961 23:01:16.825473 RX DQ/DQS(RDDQC) : PASS
5962 23:01:16.828707 TX DQ/DQS : PASS
5963 23:01:16.829177 RX DATLAT : PASS
5964 23:01:16.832061 RX DQ/DQS(Engine): PASS
5965 23:01:16.835496 TX OE : NO K
5966 23:01:16.835944 All Pass.
5967 23:01:16.836280
5968 23:01:16.836592 CH 0, Rank 1
5969 23:01:16.839036 SW Impedance : PASS
5970 23:01:16.842237 DUTY Scan : NO K
5971 23:01:16.842695 ZQ Calibration : PASS
5972 23:01:16.845114 Jitter Meter : NO K
5973 23:01:16.848542 CBT Training : PASS
5974 23:01:16.849131 Write leveling : PASS
5975 23:01:16.852352 RX DQS gating : PASS
5976 23:01:16.855326 RX DQ/DQS(RDDQC) : PASS
5977 23:01:16.855909 TX DQ/DQS : PASS
5978 23:01:16.858651 RX DATLAT : PASS
5979 23:01:16.861696 RX DQ/DQS(Engine): PASS
5980 23:01:16.862255 TX OE : NO K
5981 23:01:16.862694 All Pass.
5982 23:01:16.864952
5983 23:01:16.865426 CH 1, Rank 0
5984 23:01:16.868438 SW Impedance : PASS
5985 23:01:16.869052 DUTY Scan : NO K
5986 23:01:16.871854 ZQ Calibration : PASS
5987 23:01:16.875026 Jitter Meter : NO K
5988 23:01:16.875503 CBT Training : PASS
5989 23:01:16.878727 Write leveling : PASS
5990 23:01:16.879301 RX DQS gating : PASS
5991 23:01:16.881770 RX DQ/DQS(RDDQC) : PASS
5992 23:01:16.885288 TX DQ/DQS : PASS
5993 23:01:16.885771 RX DATLAT : PASS
5994 23:01:16.888460 RX DQ/DQS(Engine): PASS
5995 23:01:16.891573 TX OE : NO K
5996 23:01:16.892077 All Pass.
5997 23:01:16.892461
5998 23:01:16.892867 CH 1, Rank 1
5999 23:01:16.894710 SW Impedance : PASS
6000 23:01:16.897937 DUTY Scan : NO K
6001 23:01:16.898581 ZQ Calibration : PASS
6002 23:01:16.901325 Jitter Meter : NO K
6003 23:01:16.904402 CBT Training : PASS
6004 23:01:16.904930 Write leveling : PASS
6005 23:01:16.907944 RX DQS gating : PASS
6006 23:01:16.911305 RX DQ/DQS(RDDQC) : PASS
6007 23:01:16.911762 TX DQ/DQS : PASS
6008 23:01:16.914887 RX DATLAT : PASS
6009 23:01:16.917586 RX DQ/DQS(Engine): PASS
6010 23:01:16.918069 TX OE : NO K
6011 23:01:16.920999 All Pass.
6012 23:01:16.921490
6013 23:01:16.921658 DramC Write-DBI off
6014 23:01:16.924092 PER_BANK_REFRESH: Hybrid Mode
6015 23:01:16.924177 TX_TRACKING: ON
6016 23:01:16.933967 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 53, TRFC_05T 1, TXREFCNT 68, TRFCpb 21, TRFCpb_05T 0
6017 23:01:16.937217 [FAST_K] Save calibration result to emmc
6018 23:01:16.940549 dramc_set_vcore_voltage set vcore to 650000
6019 23:01:16.943910 Read voltage for 400, 6
6020 23:01:16.943996 Vio18 = 0
6021 23:01:16.947272 Vcore = 650000
6022 23:01:16.947357 Vdram = 0
6023 23:01:16.947424 Vddq = 0
6024 23:01:16.950682 Vmddr = 0
6025 23:01:16.953953 [FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=0
6026 23:01:16.960134 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
6027 23:01:16.960219 MEM_TYPE=3, freq_sel=20
6028 23:01:16.963792 sv_algorithm_assistance_LP4_800
6029 23:01:16.970472 ============ PULL DRAM RESETB DOWN ============
6030 23:01:16.973502 ========== PULL DRAM RESETB DOWN end =========
6031 23:01:16.977045 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6032 23:01:16.980361 ===================================
6033 23:01:16.983767 LPDDR4 DRAM CONFIGURATION
6034 23:01:16.986700 ===================================
6035 23:01:16.986813 EX_ROW_EN[0] = 0x0
6036 23:01:16.989881 EX_ROW_EN[1] = 0x0
6037 23:01:16.993523 LP4Y_EN = 0x0
6038 23:01:16.993640 WORK_FSP = 0x0
6039 23:01:16.996965 WL = 0x2
6040 23:01:16.997076 RL = 0x2
6041 23:01:16.999928 BL = 0x2
6042 23:01:17.000042 RPST = 0x0
6043 23:01:17.003431 RD_PRE = 0x0
6044 23:01:17.003543 WR_PRE = 0x1
6045 23:01:17.006492 WR_PST = 0x0
6046 23:01:17.006586 DBI_WR = 0x0
6047 23:01:17.009777 DBI_RD = 0x0
6048 23:01:17.009897 OTF = 0x1
6049 23:01:17.013108 ===================================
6050 23:01:17.016553 ===================================
6051 23:01:17.019887 ANA top config
6052 23:01:17.023205 ===================================
6053 23:01:17.026588 DLL_ASYNC_EN = 0
6054 23:01:17.026701 ALL_SLAVE_EN = 1
6055 23:01:17.029904 NEW_RANK_MODE = 1
6056 23:01:17.033280 DLL_IDLE_MODE = 1
6057 23:01:17.036482 LP45_APHY_COMB_EN = 1
6058 23:01:17.036593 TX_ODT_DIS = 1
6059 23:01:17.039678 NEW_8X_MODE = 1
6060 23:01:17.043015 ===================================
6061 23:01:17.046390 ===================================
6062 23:01:17.049278 data_rate = 800
6063 23:01:17.053067 CKR = 1
6064 23:01:17.055865 DQ_P2S_RATIO = 4
6065 23:01:17.059236 ===================================
6066 23:01:17.062544 CA_P2S_RATIO = 4
6067 23:01:17.062655 DQ_CA_OPEN = 0
6068 23:01:17.065816 DQ_SEMI_OPEN = 1
6069 23:01:17.069333 CA_SEMI_OPEN = 1
6070 23:01:17.072670 CA_FULL_RATE = 0
6071 23:01:17.076043 DQ_CKDIV4_EN = 0
6072 23:01:17.079224 CA_CKDIV4_EN = 1
6073 23:01:17.079336 CA_PREDIV_EN = 0
6074 23:01:17.082512 PH8_DLY = 0
6075 23:01:17.085889 SEMI_OPEN_CA_PICK_MCK_RATIO= 4
6076 23:01:17.089294 DQ_AAMCK_DIV = 0
6077 23:01:17.092614 CA_AAMCK_DIV = 0
6078 23:01:17.095649 CA_ADMCK_DIV = 4
6079 23:01:17.095765 DQ_TRACK_CA_EN = 0
6080 23:01:17.098955 CA_PICK = 800
6081 23:01:17.102460 CA_MCKIO = 400
6082 23:01:17.105856 MCKIO_SEMI = 400
6083 23:01:17.108762 PLL_FREQ = 3016
6084 23:01:17.112329 DQ_UI_PI_RATIO = 32
6085 23:01:17.115406 CA_UI_PI_RATIO = 32
6086 23:01:17.118686 ===================================
6087 23:01:17.122245 ===================================
6088 23:01:17.125567 memory_type:LPDDR4
6089 23:01:17.125652 GP_NUM : 10
6090 23:01:17.128932 SRAM_EN : 1
6091 23:01:17.129016 MD32_EN : 0
6092 23:01:17.132285 ===================================
6093 23:01:17.135191 [ANA_INIT] >>>>>>>>>>>>>>
6094 23:01:17.138649 <<<<<< [CONFIGURE PHASE]: ANA_TX
6095 23:01:17.141864 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
6096 23:01:17.145343 ===================================
6097 23:01:17.148568 data_rate = 800,PCW = 0X7400
6098 23:01:17.151896 ===================================
6099 23:01:17.154806 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
6100 23:01:17.158264 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6101 23:01:17.171765 WARN: tr->DQ_AAMCK_DIV= 0, Because of DQ_SEMI_OPEN, It's don't care.<<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6102 23:01:17.174664 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
6103 23:01:17.178014 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
6104 23:01:17.181489 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
6105 23:01:17.184742 [ANA_INIT] flow start
6106 23:01:17.188024 [ANA_INIT] PLL >>>>>>>>
6107 23:01:17.188141 [ANA_INIT] PLL <<<<<<<<
6108 23:01:17.191424 [ANA_INIT] MIDPI >>>>>>>>
6109 23:01:17.194545 [ANA_INIT] MIDPI <<<<<<<<
6110 23:01:17.198171 [ANA_INIT] DLL >>>>>>>>
6111 23:01:17.198281 [ANA_INIT] flow end
6112 23:01:17.201225 ============ LP4 DIFF to SE enter ============
6113 23:01:17.207863 ============ LP4 DIFF to SE exit ============
6114 23:01:17.207974 [ANA_INIT] <<<<<<<<<<<<<
6115 23:01:17.211396 [Flow] Enable top DCM control >>>>>
6116 23:01:17.214277 [Flow] Enable top DCM control <<<<<
6117 23:01:17.217719 Enable DLL master slave shuffle
6118 23:01:17.224428 ==============================================================
6119 23:01:17.224543 Gating Mode config
6120 23:01:17.230736 ==============================================================
6121 23:01:17.234098 Config description:
6122 23:01:17.244195 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
6123 23:01:17.250744 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
6124 23:01:17.254219 SELPH_MODE 0: By rank 1: By Phase
6125 23:01:17.260465 ==============================================================
6126 23:01:17.263861 GAT_TRACK_EN = 0
6127 23:01:17.267157 RX_GATING_MODE = 2
6128 23:01:17.270506 RX_GATING_TRACK_MODE = 2
6129 23:01:17.270619 SELPH_MODE = 1
6130 23:01:17.273913 PICG_EARLY_EN = 1
6131 23:01:17.277296 VALID_LAT_VALUE = 1
6132 23:01:17.284017 ==============================================================
6133 23:01:17.287424 Enter into Gating configuration >>>>
6134 23:01:17.290728 Exit from Gating configuration <<<<
6135 23:01:17.294123 Enter into DVFS_PRE_config >>>>>
6136 23:01:17.303718 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
6137 23:01:17.307125 Exit from DVFS_PRE_config <<<<<
6138 23:01:17.310737 Enter into PICG configuration >>>>
6139 23:01:17.313599 Exit from PICG configuration <<<<
6140 23:01:17.316925 [RX_INPUT] configuration >>>>>
6141 23:01:17.320101 [RX_INPUT] configuration <<<<<
6142 23:01:17.323836 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
6143 23:01:17.330303 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
6144 23:01:17.337157 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
6145 23:01:17.343186 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
6146 23:01:17.349837 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
6147 23:01:17.353162 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
6148 23:01:17.359871 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
6149 23:01:17.363303 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
6150 23:01:17.366727 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
6151 23:01:17.370015 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
6152 23:01:17.376635 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
6153 23:01:17.379697 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6154 23:01:17.382927 ===================================
6155 23:01:17.386321 LPDDR4 DRAM CONFIGURATION
6156 23:01:17.389641 ===================================
6157 23:01:17.389729 EX_ROW_EN[0] = 0x0
6158 23:01:17.392991 EX_ROW_EN[1] = 0x0
6159 23:01:17.393076 LP4Y_EN = 0x0
6160 23:01:17.396316 WORK_FSP = 0x0
6161 23:01:17.396401 WL = 0x2
6162 23:01:17.399645 RL = 0x2
6163 23:01:17.399728 BL = 0x2
6164 23:01:17.402969 RPST = 0x0
6165 23:01:17.403053 RD_PRE = 0x0
6166 23:01:17.406201 WR_PRE = 0x1
6167 23:01:17.406285 WR_PST = 0x0
6168 23:01:17.409854 DBI_WR = 0x0
6169 23:01:17.412886 DBI_RD = 0x0
6170 23:01:17.413003 OTF = 0x1
6171 23:01:17.416161 ===================================
6172 23:01:17.419364 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
6173 23:01:17.426033 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
6174 23:01:17.429500 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6175 23:01:17.432463 ===================================
6176 23:01:17.435954 LPDDR4 DRAM CONFIGURATION
6177 23:01:17.439062 ===================================
6178 23:01:17.439200 EX_ROW_EN[0] = 0x10
6179 23:01:17.442604 EX_ROW_EN[1] = 0x0
6180 23:01:17.442759 LP4Y_EN = 0x0
6181 23:01:17.445883 WORK_FSP = 0x0
6182 23:01:17.446060 WL = 0x2
6183 23:01:17.449321 RL = 0x2
6184 23:01:17.449496 BL = 0x2
6185 23:01:17.452705 RPST = 0x0
6186 23:01:17.452931 RD_PRE = 0x0
6187 23:01:17.456020 WR_PRE = 0x1
6188 23:01:17.459683 WR_PST = 0x0
6189 23:01:17.460024 DBI_WR = 0x0
6190 23:01:17.462808 DBI_RD = 0x0
6191 23:01:17.463115 OTF = 0x1
6192 23:01:17.466299 ===================================
6193 23:01:17.472723 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
6194 23:01:17.476173 nWR fixed to 30
6195 23:01:17.479624 [ModeRegInit_LP4] CH0 RK0
6196 23:01:17.480049 [ModeRegInit_LP4] CH0 RK1
6197 23:01:17.482862 [ModeRegInit_LP4] CH1 RK0
6198 23:01:17.486466 [ModeRegInit_LP4] CH1 RK1
6199 23:01:17.487001 match AC timing 19
6200 23:01:17.492874 dramType 5, freq 400, readDBI 0, DivMode 2, cbtMode 1
6201 23:01:17.496139 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
6202 23:01:17.499323 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
6203 23:01:17.505925 [TX_path_calculate] data rate=800, WL=8, DQS_TotalUI=17
6204 23:01:17.509274 [TX_path_calculate] DQS = (4,1) DQS_OE = (3,2)
6205 23:01:17.509717 ==
6206 23:01:17.512379 Dram Type= 6, Freq= 0, CH_0, rank 0
6207 23:01:17.516042 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6208 23:01:17.516490 ==
6209 23:01:17.522533 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6210 23:01:17.529261 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
6211 23:01:17.532736 [CA 0] Center 36 (8~64) winsize 57
6212 23:01:17.535697 [CA 1] Center 36 (8~64) winsize 57
6213 23:01:17.539103 [CA 2] Center 36 (8~64) winsize 57
6214 23:01:17.542615 [CA 3] Center 36 (8~64) winsize 57
6215 23:01:17.545808 [CA 4] Center 36 (8~64) winsize 57
6216 23:01:17.546385 [CA 5] Center 36 (8~64) winsize 57
6217 23:01:17.549052
6218 23:01:17.552348 [CmdBusTrainingLP45] Vref(ca) range 1: 35
6219 23:01:17.552887
6220 23:01:17.556030 [CATrainingPosCal] consider 1 rank data
6221 23:01:17.558814 u2DelayCellTimex100 = 270/100 ps
6222 23:01:17.562418 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6223 23:01:17.565684 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6224 23:01:17.568560 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6225 23:01:17.572357 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6226 23:01:17.575200 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6227 23:01:17.578618 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6228 23:01:17.579049
6229 23:01:17.582308 CA PerBit enable=1, Macro0, CA PI delay=36
6230 23:01:17.585411
6231 23:01:17.585837 [CBTSetCACLKResult] CA Dly = 36
6232 23:01:17.588417 CS Dly: 1 (0~32)
6233 23:01:17.588863 ==
6234 23:01:17.592117 Dram Type= 6, Freq= 0, CH_0, rank 1
6235 23:01:17.595035 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6236 23:01:17.595468 ==
6237 23:01:17.602073 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6238 23:01:17.608438 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33
6239 23:01:17.612052 [CA 0] Center 36 (8~64) winsize 57
6240 23:01:17.615020 [CA 1] Center 36 (8~64) winsize 57
6241 23:01:17.618643 [CA 2] Center 36 (8~64) winsize 57
6242 23:01:17.619172 [CA 3] Center 36 (8~64) winsize 57
6243 23:01:17.621399 [CA 4] Center 36 (8~64) winsize 57
6244 23:01:17.625041 [CA 5] Center 36 (8~64) winsize 57
6245 23:01:17.625509
6246 23:01:17.631656 [CmdBusTrainingLP45] Vref(ca) range 1: 33
6247 23:01:17.632254
6248 23:01:17.634934 [CATrainingPosCal] consider 2 rank data
6249 23:01:17.638390 u2DelayCellTimex100 = 270/100 ps
6250 23:01:17.641477 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6251 23:01:17.644514 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6252 23:01:17.647978 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6253 23:01:17.651438 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6254 23:01:17.654914 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6255 23:01:17.657810 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6256 23:01:17.658283
6257 23:01:17.661143 CA PerBit enable=1, Macro0, CA PI delay=36
6258 23:01:17.661615
6259 23:01:17.664422 [CBTSetCACLKResult] CA Dly = 36
6260 23:01:17.667997 CS Dly: 1 (0~32)
6261 23:01:17.668570
6262 23:01:17.671019 ----->DramcWriteLeveling(PI) begin...
6263 23:01:17.671495 ==
6264 23:01:17.674848 Dram Type= 6, Freq= 0, CH_0, rank 0
6265 23:01:17.677911 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6266 23:01:17.678406 ==
6267 23:01:17.681307 Write leveling (Byte 0): 40 => 8
6268 23:01:17.684631 Write leveling (Byte 1): 32 => 0
6269 23:01:17.688071 DramcWriteLeveling(PI) end<-----
6270 23:01:17.688652
6271 23:01:17.689071 ==
6272 23:01:17.691363 Dram Type= 6, Freq= 0, CH_0, rank 0
6273 23:01:17.694691 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6274 23:01:17.695338 ==
6275 23:01:17.697423 [Gating] SW mode calibration
6276 23:01:17.704162 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6277 23:01:17.711235 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6278 23:01:17.714296 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6279 23:01:17.720901 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6280 23:01:17.723994 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6281 23:01:17.726838 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6282 23:01:17.733566 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6283 23:01:17.736951 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6284 23:01:17.740263 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6285 23:01:17.743589 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6286 23:01:17.750243 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6287 23:01:17.753792 Total UI for P1: 0, mck2ui 16
6288 23:01:17.757165 best dqsien dly found for B0: ( 0, 14, 24)
6289 23:01:17.760204 Total UI for P1: 0, mck2ui 16
6290 23:01:17.763553 best dqsien dly found for B1: ( 0, 14, 24)
6291 23:01:17.766969 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6292 23:01:17.769945 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6293 23:01:17.770507
6294 23:01:17.773742 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6295 23:01:17.777024 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6296 23:01:17.780335 [Gating] SW calibration Done
6297 23:01:17.781077 ==
6298 23:01:17.783638 Dram Type= 6, Freq= 0, CH_0, rank 0
6299 23:01:17.786569 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6300 23:01:17.787233 ==
6301 23:01:17.790289 RX Vref Scan: 0
6302 23:01:17.790934
6303 23:01:17.793248 RX Vref 0 -> 0, step: 1
6304 23:01:17.793893
6305 23:01:17.794499 RX Delay -410 -> 252, step: 16
6306 23:01:17.799838 iDelay=230, Bit 0, Center -19 (-250 ~ 213) 464
6307 23:01:17.803356 iDelay=230, Bit 1, Center -11 (-250 ~ 229) 480
6308 23:01:17.806698 iDelay=230, Bit 2, Center -19 (-250 ~ 213) 464
6309 23:01:17.809911 iDelay=230, Bit 3, Center -19 (-250 ~ 213) 464
6310 23:01:17.816595 iDelay=230, Bit 4, Center -11 (-250 ~ 229) 480
6311 23:01:17.819625 iDelay=230, Bit 5, Center -27 (-266 ~ 213) 480
6312 23:01:17.822919 iDelay=230, Bit 6, Center -11 (-250 ~ 229) 480
6313 23:01:17.829681 iDelay=230, Bit 7, Center -3 (-234 ~ 229) 464
6314 23:01:17.832901 iDelay=230, Bit 8, Center -43 (-282 ~ 197) 480
6315 23:01:17.836654 iDelay=230, Bit 9, Center -43 (-282 ~ 197) 480
6316 23:01:17.839946 iDelay=230, Bit 10, Center -27 (-266 ~ 213) 480
6317 23:01:17.846724 iDelay=230, Bit 11, Center -35 (-266 ~ 197) 464
6318 23:01:17.850008 iDelay=230, Bit 12, Center -27 (-266 ~ 213) 480
6319 23:01:17.852878 iDelay=230, Bit 13, Center -27 (-266 ~ 213) 480
6320 23:01:17.856507 iDelay=230, Bit 14, Center -19 (-250 ~ 213) 464
6321 23:01:17.862970 iDelay=230, Bit 15, Center -27 (-266 ~ 213) 480
6322 23:01:17.863431 ==
6323 23:01:17.866227 Dram Type= 6, Freq= 0, CH_0, rank 0
6324 23:01:17.869447 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6325 23:01:17.869902 ==
6326 23:01:17.870252 DQS Delay:
6327 23:01:17.872995 DQS0 = 27, DQS1 = 43
6328 23:01:17.873418 DQM Delay:
6329 23:01:17.876203 DQM0 = 12, DQM1 = 12
6330 23:01:17.876727 DQ Delay:
6331 23:01:17.879475 DQ0 =8, DQ1 =16, DQ2 =8, DQ3 =8
6332 23:01:17.883048 DQ4 =16, DQ5 =0, DQ6 =16, DQ7 =24
6333 23:01:17.886174 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =8
6334 23:01:17.889077 DQ12 =16, DQ13 =16, DQ14 =24, DQ15 =16
6335 23:01:17.889504
6336 23:01:17.889837
6337 23:01:17.890151 ==
6338 23:01:17.892820 Dram Type= 6, Freq= 0, CH_0, rank 0
6339 23:01:17.895720 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6340 23:01:17.896250 ==
6341 23:01:17.896598
6342 23:01:17.899066
6343 23:01:17.899658 TX Vref Scan disable
6344 23:01:17.902336 == TX Byte 0 ==
6345 23:01:17.905839 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6346 23:01:17.909184 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6347 23:01:17.912474 == TX Byte 1 ==
6348 23:01:17.915777 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6349 23:01:17.919170 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6350 23:01:17.919760 ==
6351 23:01:17.922660 Dram Type= 6, Freq= 0, CH_0, rank 0
6352 23:01:17.926127 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6353 23:01:17.928866 ==
6354 23:01:17.929349
6355 23:01:17.929706
6356 23:01:17.930095 TX Vref Scan disable
6357 23:01:17.932254 == TX Byte 0 ==
6358 23:01:17.935686 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6359 23:01:17.938872 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6360 23:01:17.942270 == TX Byte 1 ==
6361 23:01:17.945506 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6362 23:01:17.948887 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6363 23:01:17.949385
6364 23:01:17.951975 [DATLAT]
6365 23:01:17.952503 Freq=400, CH0 RK0
6366 23:01:17.952978
6367 23:01:17.955540 DATLAT Default: 0xf
6368 23:01:17.956086 0, 0xFFFF, sum = 0
6369 23:01:17.958572 1, 0xFFFF, sum = 0
6370 23:01:17.959192 2, 0xFFFF, sum = 0
6371 23:01:17.962208 3, 0xFFFF, sum = 0
6372 23:01:17.962809 4, 0xFFFF, sum = 0
6373 23:01:17.965432 5, 0xFFFF, sum = 0
6374 23:01:17.965963 6, 0xFFFF, sum = 0
6375 23:01:17.968832 7, 0xFFFF, sum = 0
6376 23:01:17.969290 8, 0xFFFF, sum = 0
6377 23:01:17.972168 9, 0xFFFF, sum = 0
6378 23:01:17.972682 10, 0xFFFF, sum = 0
6379 23:01:17.975378 11, 0xFFFF, sum = 0
6380 23:01:17.978769 12, 0xFFFF, sum = 0
6381 23:01:17.979289 13, 0x0, sum = 1
6382 23:01:17.979653 14, 0x0, sum = 2
6383 23:01:17.982391 15, 0x0, sum = 3
6384 23:01:17.982831 16, 0x0, sum = 4
6385 23:01:17.985979 best_step = 14
6386 23:01:17.986513
6387 23:01:17.986862 ==
6388 23:01:17.988880 Dram Type= 6, Freq= 0, CH_0, rank 0
6389 23:01:17.992184 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6390 23:01:17.992720 ==
6391 23:01:17.995900 RX Vref Scan: 1
6392 23:01:17.996424
6393 23:01:17.996805 RX Vref 0 -> 0, step: 1
6394 23:01:17.997168
6395 23:01:17.998442 RX Delay -327 -> 252, step: 8
6396 23:01:17.998874
6397 23:01:18.002050 Set Vref, RX VrefLevel [Byte0]: 60
6398 23:01:18.005219 [Byte1]: 50
6399 23:01:18.010340
6400 23:01:18.010771 Final RX Vref Byte 0 = 60 to rank0
6401 23:01:18.013199 Final RX Vref Byte 1 = 50 to rank0
6402 23:01:18.017196 Final RX Vref Byte 0 = 60 to rank1
6403 23:01:18.020068 Final RX Vref Byte 1 = 50 to rank1==
6404 23:01:18.023346 Dram Type= 6, Freq= 0, CH_0, rank 0
6405 23:01:18.029906 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6406 23:01:18.030441 ==
6407 23:01:18.030795 DQS Delay:
6408 23:01:18.033466 DQS0 = 24, DQS1 = 48
6409 23:01:18.033994 DQM Delay:
6410 23:01:18.034345 DQM0 = 9, DQM1 = 15
6411 23:01:18.036601 DQ Delay:
6412 23:01:18.039816 DQ0 =8, DQ1 =12, DQ2 =4, DQ3 =4
6413 23:01:18.040306 DQ4 =8, DQ5 =0, DQ6 =20, DQ7 =16
6414 23:01:18.043038 DQ8 =4, DQ9 =0, DQ10 =16, DQ11 =12
6415 23:01:18.046448 DQ12 =20, DQ13 =16, DQ14 =28, DQ15 =24
6416 23:01:18.049636
6417 23:01:18.050067
6418 23:01:18.056231 [DQSOSCAuto] RK0, (LSB)MR18= 0xaba3, (MSB)MR19= 0xc0c, tDQSOscB0 = 389 ps tDQSOscB1 = 388 ps
6419 23:01:18.059370 CH0 RK0: MR19=C0C, MR18=ABA3
6420 23:01:18.066483 CH0_RK0: MR19=0xC0C, MR18=0xABA3, DQSOSC=388, MR23=63, INC=392, DEC=261
6421 23:01:18.067018 ==
6422 23:01:18.069419 Dram Type= 6, Freq= 0, CH_0, rank 1
6423 23:01:18.072901 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6424 23:01:18.073342 ==
6425 23:01:18.076164 [Gating] SW mode calibration
6426 23:01:18.082929 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6427 23:01:18.089689 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6428 23:01:18.092837 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6429 23:01:18.096108 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6430 23:01:18.102544 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6431 23:01:18.105967 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6432 23:01:18.109249 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6433 23:01:18.115729 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6434 23:01:18.119076 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6435 23:01:18.122635 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6436 23:01:18.129165 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6437 23:01:18.129647 Total UI for P1: 0, mck2ui 16
6438 23:01:18.135902 best dqsien dly found for B0: ( 0, 14, 24)
6439 23:01:18.136336 Total UI for P1: 0, mck2ui 16
6440 23:01:18.142227 best dqsien dly found for B1: ( 0, 14, 24)
6441 23:01:18.145732 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6442 23:01:18.148502 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6443 23:01:18.149114
6444 23:01:18.152153 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6445 23:01:18.155053 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6446 23:01:18.158749 [Gating] SW calibration Done
6447 23:01:18.159178 ==
6448 23:01:18.161801 Dram Type= 6, Freq= 0, CH_0, rank 1
6449 23:01:18.165408 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6450 23:01:18.165932 ==
6451 23:01:18.168445 RX Vref Scan: 0
6452 23:01:18.168864
6453 23:01:18.169201 RX Vref 0 -> 0, step: 1
6454 23:01:18.169581
6455 23:01:18.172296 RX Delay -410 -> 252, step: 16
6456 23:01:18.178209 iDelay=230, Bit 0, Center -19 (-250 ~ 213) 464
6457 23:01:18.181515 iDelay=230, Bit 1, Center -19 (-250 ~ 213) 464
6458 23:01:18.185102 iDelay=230, Bit 2, Center -19 (-250 ~ 213) 464
6459 23:01:18.188572 iDelay=230, Bit 3, Center -19 (-250 ~ 213) 464
6460 23:01:18.195185 iDelay=230, Bit 4, Center -19 (-250 ~ 213) 464
6461 23:01:18.198461 iDelay=230, Bit 5, Center -27 (-266 ~ 213) 480
6462 23:01:18.201403 iDelay=230, Bit 6, Center -11 (-250 ~ 229) 480
6463 23:01:18.204688 iDelay=230, Bit 7, Center -11 (-250 ~ 229) 480
6464 23:01:18.211449 iDelay=230, Bit 8, Center -35 (-266 ~ 197) 464
6465 23:01:18.214749 iDelay=230, Bit 9, Center -43 (-282 ~ 197) 480
6466 23:01:18.218393 iDelay=230, Bit 10, Center -27 (-266 ~ 213) 480
6467 23:01:18.221534 iDelay=230, Bit 11, Center -35 (-266 ~ 197) 464
6468 23:01:18.228383 iDelay=230, Bit 12, Center -27 (-266 ~ 213) 480
6469 23:01:18.231796 iDelay=230, Bit 13, Center -19 (-250 ~ 213) 464
6470 23:01:18.234948 iDelay=230, Bit 14, Center -19 (-250 ~ 213) 464
6471 23:01:18.241342 iDelay=230, Bit 15, Center -19 (-250 ~ 213) 464
6472 23:01:18.241824 ==
6473 23:01:18.244825 Dram Type= 6, Freq= 0, CH_0, rank 1
6474 23:01:18.247580 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6475 23:01:18.248073 ==
6476 23:01:18.248474 DQS Delay:
6477 23:01:18.250892 DQS0 = 27, DQS1 = 43
6478 23:01:18.251392 DQM Delay:
6479 23:01:18.254211 DQM0 = 9, DQM1 = 15
6480 23:01:18.254725 DQ Delay:
6481 23:01:18.257981 DQ0 =8, DQ1 =8, DQ2 =8, DQ3 =8
6482 23:01:18.261126 DQ4 =8, DQ5 =0, DQ6 =16, DQ7 =16
6483 23:01:18.264596 DQ8 =8, DQ9 =0, DQ10 =16, DQ11 =8
6484 23:01:18.267618 DQ12 =16, DQ13 =24, DQ14 =24, DQ15 =24
6485 23:01:18.268050
6486 23:01:18.268392
6487 23:01:18.268715 ==
6488 23:01:18.271097 Dram Type= 6, Freq= 0, CH_0, rank 1
6489 23:01:18.274205 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6490 23:01:18.274644 ==
6491 23:01:18.274989
6492 23:01:18.275342
6493 23:01:18.277525 TX Vref Scan disable
6494 23:01:18.277981 == TX Byte 0 ==
6495 23:01:18.284034 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6496 23:01:18.287567 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6497 23:01:18.288001 == TX Byte 1 ==
6498 23:01:18.294018 Update DQ dly =579 (4 ,2, 3) DQ OEN =(3 ,3)
6499 23:01:18.297371 Update DQM dly =579 (4 ,2, 3) DQM OEN =(3 ,3)
6500 23:01:18.297944 ==
6501 23:01:18.301122 Dram Type= 6, Freq= 0, CH_0, rank 1
6502 23:01:18.304397 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6503 23:01:18.304990 ==
6504 23:01:18.305353
6505 23:01:18.305681
6506 23:01:18.307819 TX Vref Scan disable
6507 23:01:18.311099 == TX Byte 0 ==
6508 23:01:18.314480 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6509 23:01:18.317100 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6510 23:01:18.317539 == TX Byte 1 ==
6511 23:01:18.323997 Update DQ dly =579 (4 ,2, 3) DQ OEN =(3 ,3)
6512 23:01:18.327234 Update DQM dly =579 (4 ,2, 3) DQM OEN =(3 ,3)
6513 23:01:18.327780
6514 23:01:18.328132 [DATLAT]
6515 23:01:18.330650 Freq=400, CH0 RK1
6516 23:01:18.331413
6517 23:01:18.331992 DATLAT Default: 0xe
6518 23:01:18.333619 0, 0xFFFF, sum = 0
6519 23:01:18.334252 1, 0xFFFF, sum = 0
6520 23:01:18.336958 2, 0xFFFF, sum = 0
6521 23:01:18.340333 3, 0xFFFF, sum = 0
6522 23:01:18.340799 4, 0xFFFF, sum = 0
6523 23:01:18.343859 5, 0xFFFF, sum = 0
6524 23:01:18.344300 6, 0xFFFF, sum = 0
6525 23:01:18.346741 7, 0xFFFF, sum = 0
6526 23:01:18.347182 8, 0xFFFF, sum = 0
6527 23:01:18.350195 9, 0xFFFF, sum = 0
6528 23:01:18.350636 10, 0xFFFF, sum = 0
6529 23:01:18.353700 11, 0xFFFF, sum = 0
6530 23:01:18.354177 12, 0xFFFF, sum = 0
6531 23:01:18.356809 13, 0x0, sum = 1
6532 23:01:18.357288 14, 0x0, sum = 2
6533 23:01:18.359775 15, 0x0, sum = 3
6534 23:01:18.360214 16, 0x0, sum = 4
6535 23:01:18.363349 best_step = 14
6536 23:01:18.363905
6537 23:01:18.364259 ==
6538 23:01:18.366610 Dram Type= 6, Freq= 0, CH_0, rank 1
6539 23:01:18.370010 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6540 23:01:18.370447 ==
6541 23:01:18.373060 RX Vref Scan: 0
6542 23:01:18.373493
6543 23:01:18.373841 RX Vref 0 -> 0, step: 1
6544 23:01:18.374168
6545 23:01:18.376609 RX Delay -327 -> 252, step: 8
6546 23:01:18.383996 iDelay=217, Bit 0, Center -20 (-247 ~ 208) 456
6547 23:01:18.387617 iDelay=217, Bit 1, Center -16 (-239 ~ 208) 448
6548 23:01:18.390868 iDelay=217, Bit 2, Center -24 (-247 ~ 200) 448
6549 23:01:18.396948 iDelay=217, Bit 3, Center -24 (-247 ~ 200) 448
6550 23:01:18.400454 iDelay=217, Bit 4, Center -16 (-239 ~ 208) 448
6551 23:01:18.403840 iDelay=217, Bit 5, Center -28 (-255 ~ 200) 456
6552 23:01:18.407427 iDelay=217, Bit 6, Center -8 (-231 ~ 216) 448
6553 23:01:18.410736 iDelay=217, Bit 7, Center -8 (-231 ~ 216) 448
6554 23:01:18.416915 iDelay=217, Bit 8, Center -36 (-263 ~ 192) 456
6555 23:01:18.420317 iDelay=217, Bit 9, Center -40 (-263 ~ 184) 448
6556 23:01:18.423590 iDelay=217, Bit 10, Center -28 (-255 ~ 200) 456
6557 23:01:18.430171 iDelay=217, Bit 11, Center -32 (-255 ~ 192) 448
6558 23:01:18.433598 iDelay=217, Bit 12, Center -24 (-247 ~ 200) 448
6559 23:01:18.436871 iDelay=217, Bit 13, Center -24 (-247 ~ 200) 448
6560 23:01:18.440322 iDelay=217, Bit 14, Center -16 (-239 ~ 208) 448
6561 23:01:18.447419 iDelay=217, Bit 15, Center -20 (-239 ~ 200) 440
6562 23:01:18.448090 ==
6563 23:01:18.450035 Dram Type= 6, Freq= 0, CH_0, rank 1
6564 23:01:18.453380 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6565 23:01:18.453874 ==
6566 23:01:18.454255 DQS Delay:
6567 23:01:18.457160 DQS0 = 28, DQS1 = 40
6568 23:01:18.457735 DQM Delay:
6569 23:01:18.460459 DQM0 = 10, DQM1 = 12
6570 23:01:18.461083 DQ Delay:
6571 23:01:18.463850 DQ0 =8, DQ1 =12, DQ2 =4, DQ3 =4
6572 23:01:18.467169 DQ4 =12, DQ5 =0, DQ6 =20, DQ7 =20
6573 23:01:18.470145 DQ8 =4, DQ9 =0, DQ10 =12, DQ11 =8
6574 23:01:18.473332 DQ12 =16, DQ13 =16, DQ14 =24, DQ15 =20
6575 23:01:18.473818
6576 23:01:18.474193
6577 23:01:18.480175 [DQSOSCAuto] RK1, (LSB)MR18= 0xb569, (MSB)MR19= 0xc0c, tDQSOscB0 = 396 ps tDQSOscB1 = 387 ps
6578 23:01:18.483533 CH0 RK1: MR19=C0C, MR18=B569
6579 23:01:18.489868 CH0_RK1: MR19=0xC0C, MR18=0xB569, DQSOSC=387, MR23=63, INC=394, DEC=262
6580 23:01:18.493223 [RxdqsGatingPostProcess] freq 400
6581 23:01:18.499874 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
6582 23:01:18.502986 best DQS0 dly(2T, 0.5T) = (0, 10)
6583 23:01:18.506509 best DQS1 dly(2T, 0.5T) = (0, 10)
6584 23:01:18.506985 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6585 23:01:18.509538 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6586 23:01:18.512905 best DQS0 dly(2T, 0.5T) = (0, 10)
6587 23:01:18.516517 best DQS1 dly(2T, 0.5T) = (0, 10)
6588 23:01:18.519741 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6589 23:01:18.523075 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6590 23:01:18.526022 Pre-setting of DQS Precalculation
6591 23:01:18.533018 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
6592 23:01:18.533599 ==
6593 23:01:18.536477 Dram Type= 6, Freq= 0, CH_1, rank 0
6594 23:01:18.539364 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6595 23:01:18.539950 ==
6596 23:01:18.546055 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6597 23:01:18.552443 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=31, u1VrefScanEnd=31
6598 23:01:18.555811 [CA 0] Center 36 (8~64) winsize 57
6599 23:01:18.556288 [CA 1] Center 36 (8~64) winsize 57
6600 23:01:18.559549 [CA 2] Center 36 (8~64) winsize 57
6601 23:01:18.562405 [CA 3] Center 36 (8~64) winsize 57
6602 23:01:18.565671 [CA 4] Center 36 (8~64) winsize 57
6603 23:01:18.568930 [CA 5] Center 36 (8~64) winsize 57
6604 23:01:18.569504
6605 23:01:18.572169 [CmdBusTrainingLP45] Vref(ca) range 1: 31
6606 23:01:18.572644
6607 23:01:18.575891 [CATrainingPosCal] consider 1 rank data
6608 23:01:18.579487 u2DelayCellTimex100 = 270/100 ps
6609 23:01:18.582561 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6610 23:01:18.588932 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6611 23:01:18.592498 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6612 23:01:18.595506 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6613 23:01:18.598766 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6614 23:01:18.602068 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6615 23:01:18.602547
6616 23:01:18.605527 CA PerBit enable=1, Macro0, CA PI delay=36
6617 23:01:18.605978
6618 23:01:18.608580 [CBTSetCACLKResult] CA Dly = 36
6619 23:01:18.612210 CS Dly: 1 (0~32)
6620 23:01:18.612759 ==
6621 23:01:18.615503 Dram Type= 6, Freq= 0, CH_1, rank 1
6622 23:01:18.618981 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6623 23:01:18.619569 ==
6624 23:01:18.625421 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6625 23:01:18.628618 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
6626 23:01:18.632115 [CA 0] Center 36 (8~64) winsize 57
6627 23:01:18.635189 [CA 1] Center 36 (8~64) winsize 57
6628 23:01:18.638419 [CA 2] Center 36 (8~64) winsize 57
6629 23:01:18.642050 [CA 3] Center 36 (8~64) winsize 57
6630 23:01:18.644708 [CA 4] Center 36 (8~64) winsize 57
6631 23:01:18.648117 [CA 5] Center 36 (8~64) winsize 57
6632 23:01:18.648592
6633 23:01:18.651434 [CmdBusTrainingLP45] Vref(ca) range 1: 35
6634 23:01:18.651915
6635 23:01:18.654866 [CATrainingPosCal] consider 2 rank data
6636 23:01:18.658457 u2DelayCellTimex100 = 270/100 ps
6637 23:01:18.661518 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6638 23:01:18.665041 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6639 23:01:18.671489 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6640 23:01:18.674923 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6641 23:01:18.677968 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6642 23:01:18.681413 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6643 23:01:18.682000
6644 23:01:18.684212 CA PerBit enable=1, Macro0, CA PI delay=36
6645 23:01:18.684693
6646 23:01:18.687516 [CBTSetCACLKResult] CA Dly = 36
6647 23:01:18.690859 CS Dly: 1 (0~32)
6648 23:01:18.691341
6649 23:01:18.694051 ----->DramcWriteLeveling(PI) begin...
6650 23:01:18.694538 ==
6651 23:01:18.697339 Dram Type= 6, Freq= 0, CH_1, rank 0
6652 23:01:18.700478 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6653 23:01:18.701003 ==
6654 23:01:18.703763 Write leveling (Byte 0): 40 => 8
6655 23:01:18.707319 Write leveling (Byte 1): 32 => 0
6656 23:01:18.710546 DramcWriteLeveling(PI) end<-----
6657 23:01:18.710977
6658 23:01:18.711323 ==
6659 23:01:18.713674 Dram Type= 6, Freq= 0, CH_1, rank 0
6660 23:01:18.717035 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6661 23:01:18.717476 ==
6662 23:01:18.720561 [Gating] SW mode calibration
6663 23:01:18.727254 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6664 23:01:18.733934 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6665 23:01:18.737149 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6666 23:01:18.740334 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6667 23:01:18.747303 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6668 23:01:18.750182 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6669 23:01:18.753436 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6670 23:01:18.760449 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6671 23:01:18.763889 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6672 23:01:18.767223 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6673 23:01:18.773647 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6674 23:01:18.774215 Total UI for P1: 0, mck2ui 16
6675 23:01:18.779975 best dqsien dly found for B0: ( 0, 14, 24)
6676 23:01:18.780453 Total UI for P1: 0, mck2ui 16
6677 23:01:18.786718 best dqsien dly found for B1: ( 0, 14, 24)
6678 23:01:18.789728 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6679 23:01:18.793192 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6680 23:01:18.793769
6681 23:01:18.796508 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6682 23:01:18.799860 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6683 23:01:18.803165 [Gating] SW calibration Done
6684 23:01:18.803735 ==
6685 23:01:18.806610 Dram Type= 6, Freq= 0, CH_1, rank 0
6686 23:01:18.809836 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6687 23:01:18.810312 ==
6688 23:01:18.812927 RX Vref Scan: 0
6689 23:01:18.813490
6690 23:01:18.813872 RX Vref 0 -> 0, step: 1
6691 23:01:18.816513
6692 23:01:18.817065 RX Delay -410 -> 252, step: 16
6693 23:01:18.822670 iDelay=230, Bit 0, Center -19 (-250 ~ 213) 464
6694 23:01:18.826493 iDelay=230, Bit 1, Center -27 (-266 ~ 213) 480
6695 23:01:18.829415 iDelay=230, Bit 2, Center -27 (-266 ~ 213) 480
6696 23:01:18.832860 iDelay=230, Bit 3, Center -27 (-266 ~ 213) 480
6697 23:01:18.839561 iDelay=230, Bit 4, Center -19 (-250 ~ 213) 464
6698 23:01:18.843142 iDelay=230, Bit 5, Center -11 (-250 ~ 229) 480
6699 23:01:18.846503 iDelay=230, Bit 6, Center -11 (-250 ~ 229) 480
6700 23:01:18.849225 iDelay=230, Bit 7, Center -27 (-266 ~ 213) 480
6701 23:01:18.855766 iDelay=230, Bit 8, Center -43 (-282 ~ 197) 480
6702 23:01:18.859393 iDelay=230, Bit 9, Center -43 (-282 ~ 197) 480
6703 23:01:18.862804 iDelay=230, Bit 10, Center -27 (-266 ~ 213) 480
6704 23:01:18.869230 iDelay=230, Bit 11, Center -27 (-266 ~ 213) 480
6705 23:01:18.872828 iDelay=230, Bit 12, Center -11 (-250 ~ 229) 480
6706 23:01:18.875719 iDelay=230, Bit 13, Center -27 (-266 ~ 213) 480
6707 23:01:18.879104 iDelay=230, Bit 14, Center -27 (-266 ~ 213) 480
6708 23:01:18.885598 iDelay=230, Bit 15, Center -19 (-266 ~ 229) 496
6709 23:01:18.886173 ==
6710 23:01:18.888796 Dram Type= 6, Freq= 0, CH_1, rank 0
6711 23:01:18.892449 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6712 23:01:18.893063 ==
6713 23:01:18.893448 DQS Delay:
6714 23:01:18.895828 DQS0 = 27, DQS1 = 43
6715 23:01:18.896403 DQM Delay:
6716 23:01:18.898871 DQM0 = 6, DQM1 = 15
6717 23:01:18.899348 DQ Delay:
6718 23:01:18.902246 DQ0 =8, DQ1 =0, DQ2 =0, DQ3 =0
6719 23:01:18.905496 DQ4 =8, DQ5 =16, DQ6 =16, DQ7 =0
6720 23:01:18.909116 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =16
6721 23:01:18.911846 DQ12 =32, DQ13 =16, DQ14 =16, DQ15 =24
6722 23:01:18.912319
6723 23:01:18.912695
6724 23:01:18.913069 ==
6725 23:01:18.915423 Dram Type= 6, Freq= 0, CH_1, rank 0
6726 23:01:18.919108 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6727 23:01:18.919707 ==
6728 23:01:18.920092
6729 23:01:18.920444
6730 23:01:18.922005 TX Vref Scan disable
6731 23:01:18.925254 == TX Byte 0 ==
6732 23:01:18.928501 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6733 23:01:18.932040 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6734 23:01:18.934907 == TX Byte 1 ==
6735 23:01:18.938366 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6736 23:01:18.941792 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6737 23:01:18.942269 ==
6738 23:01:18.945162 Dram Type= 6, Freq= 0, CH_1, rank 0
6739 23:01:18.948513 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6740 23:01:18.951727 ==
6741 23:01:18.952199
6742 23:01:18.952580
6743 23:01:18.953037 TX Vref Scan disable
6744 23:01:18.955016 == TX Byte 0 ==
6745 23:01:18.958359 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6746 23:01:18.961565 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6747 23:01:18.964674 == TX Byte 1 ==
6748 23:01:18.968003 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6749 23:01:18.971407 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6750 23:01:18.972008
6751 23:01:18.974826 [DATLAT]
6752 23:01:18.975398 Freq=400, CH1 RK0
6753 23:01:18.975783
6754 23:01:18.978002 DATLAT Default: 0xf
6755 23:01:18.978479 0, 0xFFFF, sum = 0
6756 23:01:18.981127 1, 0xFFFF, sum = 0
6757 23:01:18.981608 2, 0xFFFF, sum = 0
6758 23:01:18.984833 3, 0xFFFF, sum = 0
6759 23:01:18.985429 4, 0xFFFF, sum = 0
6760 23:01:18.988014 5, 0xFFFF, sum = 0
6761 23:01:18.988597 6, 0xFFFF, sum = 0
6762 23:01:18.991070 7, 0xFFFF, sum = 0
6763 23:01:18.991647 8, 0xFFFF, sum = 0
6764 23:01:18.994405 9, 0xFFFF, sum = 0
6765 23:01:18.994989 10, 0xFFFF, sum = 0
6766 23:01:18.997467 11, 0xFFFF, sum = 0
6767 23:01:19.000878 12, 0xFFFF, sum = 0
6768 23:01:19.001364 13, 0x0, sum = 1
6769 23:01:19.004338 14, 0x0, sum = 2
6770 23:01:19.004970 15, 0x0, sum = 3
6771 23:01:19.005370 16, 0x0, sum = 4
6772 23:01:19.007899 best_step = 14
6773 23:01:19.008373
6774 23:01:19.008856 ==
6775 23:01:19.010989 Dram Type= 6, Freq= 0, CH_1, rank 0
6776 23:01:19.014589 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6777 23:01:19.015182 ==
6778 23:01:19.017823 RX Vref Scan: 1
6779 23:01:19.018302
6780 23:01:19.018680 RX Vref 0 -> 0, step: 1
6781 23:01:19.019039
6782 23:01:19.020950 RX Delay -327 -> 252, step: 8
6783 23:01:19.021425
6784 23:01:19.024339 Set Vref, RX VrefLevel [Byte0]: 51
6785 23:01:19.027675 [Byte1]: 52
6786 23:01:19.032666
6787 23:01:19.033138 Final RX Vref Byte 0 = 51 to rank0
6788 23:01:19.035919 Final RX Vref Byte 1 = 52 to rank0
6789 23:01:19.039179 Final RX Vref Byte 0 = 51 to rank1
6790 23:01:19.042356 Final RX Vref Byte 1 = 52 to rank1==
6791 23:01:19.045921 Dram Type= 6, Freq= 0, CH_1, rank 0
6792 23:01:19.052345 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6793 23:01:19.052865 ==
6794 23:01:19.053253 DQS Delay:
6795 23:01:19.055706 DQS0 = 32, DQS1 = 40
6796 23:01:19.056181 DQM Delay:
6797 23:01:19.056563 DQM0 = 12, DQM1 = 12
6798 23:01:19.059348 DQ Delay:
6799 23:01:19.062230 DQ0 =20, DQ1 =4, DQ2 =0, DQ3 =8
6800 23:01:19.065948 DQ4 =12, DQ5 =24, DQ6 =20, DQ7 =8
6801 23:01:19.066537 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =4
6802 23:01:19.068697 DQ12 =24, DQ13 =20, DQ14 =16, DQ15 =20
6803 23:01:19.069214
6804 23:01:19.072405
6805 23:01:19.078898 [DQSOSCAuto] RK0, (LSB)MR18= 0x94cd, (MSB)MR19= 0xc0c, tDQSOscB0 = 384 ps tDQSOscB1 = 391 ps
6806 23:01:19.082471 CH1 RK0: MR19=C0C, MR18=94CD
6807 23:01:19.089273 CH1_RK0: MR19=0xC0C, MR18=0x94CD, DQSOSC=384, MR23=63, INC=400, DEC=267
6808 23:01:19.089864 ==
6809 23:01:19.092618 Dram Type= 6, Freq= 0, CH_1, rank 1
6810 23:01:19.095442 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6811 23:01:19.096030 ==
6812 23:01:19.098487 [Gating] SW mode calibration
6813 23:01:19.105449 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6814 23:01:19.112042 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6815 23:01:19.115276 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6816 23:01:19.118635 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6817 23:01:19.124757 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6818 23:01:19.128223 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6819 23:01:19.131575 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6820 23:01:19.138175 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6821 23:01:19.141443 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6822 23:01:19.144418 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6823 23:01:19.151275 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6824 23:01:19.152052 Total UI for P1: 0, mck2ui 16
6825 23:01:19.157720 best dqsien dly found for B0: ( 0, 14, 24)
6826 23:01:19.158406 Total UI for P1: 0, mck2ui 16
6827 23:01:19.164345 best dqsien dly found for B1: ( 0, 14, 24)
6828 23:01:19.167549 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6829 23:01:19.171142 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6830 23:01:19.171577
6831 23:01:19.174063 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6832 23:01:19.177454 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6833 23:01:19.180804 [Gating] SW calibration Done
6834 23:01:19.181238 ==
6835 23:01:19.184164 Dram Type= 6, Freq= 0, CH_1, rank 1
6836 23:01:19.187559 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6837 23:01:19.187995 ==
6838 23:01:19.191189 RX Vref Scan: 0
6839 23:01:19.191718
6840 23:01:19.192120 RX Vref 0 -> 0, step: 1
6841 23:01:19.194132
6842 23:01:19.194664 RX Delay -410 -> 252, step: 16
6843 23:01:19.200620 iDelay=230, Bit 0, Center -19 (-250 ~ 213) 464
6844 23:01:19.204063 iDelay=230, Bit 1, Center -19 (-250 ~ 213) 464
6845 23:01:19.207250 iDelay=230, Bit 2, Center -35 (-266 ~ 197) 464
6846 23:01:19.210888 iDelay=230, Bit 3, Center -19 (-250 ~ 213) 464
6847 23:01:19.217580 iDelay=230, Bit 4, Center -19 (-250 ~ 213) 464
6848 23:01:19.220791 iDelay=230, Bit 5, Center -11 (-250 ~ 229) 480
6849 23:01:19.224079 iDelay=230, Bit 6, Center -11 (-250 ~ 229) 480
6850 23:01:19.226992 iDelay=230, Bit 7, Center -19 (-250 ~ 213) 464
6851 23:01:19.233755 iDelay=230, Bit 8, Center -43 (-282 ~ 197) 480
6852 23:01:19.237126 iDelay=230, Bit 9, Center -35 (-266 ~ 197) 464
6853 23:01:19.240515 iDelay=230, Bit 10, Center -19 (-250 ~ 213) 464
6854 23:01:19.247008 iDelay=230, Bit 11, Center -27 (-266 ~ 213) 480
6855 23:01:19.250331 iDelay=230, Bit 12, Center -11 (-250 ~ 229) 480
6856 23:01:19.253781 iDelay=230, Bit 13, Center -19 (-250 ~ 213) 464
6857 23:01:19.256740 iDelay=230, Bit 14, Center -19 (-250 ~ 213) 464
6858 23:01:19.263585 iDelay=230, Bit 15, Center -11 (-250 ~ 229) 480
6859 23:01:19.264047 ==
6860 23:01:19.266774 Dram Type= 6, Freq= 0, CH_1, rank 1
6861 23:01:19.270192 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6862 23:01:19.270654 ==
6863 23:01:19.271011 DQS Delay:
6864 23:01:19.273669 DQS0 = 35, DQS1 = 43
6865 23:01:19.274128 DQM Delay:
6866 23:01:19.276802 DQM0 = 16, DQM1 = 20
6867 23:01:19.277242 DQ Delay:
6868 23:01:19.280291 DQ0 =16, DQ1 =16, DQ2 =0, DQ3 =16
6869 23:01:19.283833 DQ4 =16, DQ5 =24, DQ6 =24, DQ7 =16
6870 23:01:19.286770 DQ8 =0, DQ9 =8, DQ10 =24, DQ11 =16
6871 23:01:19.290292 DQ12 =32, DQ13 =24, DQ14 =24, DQ15 =32
6872 23:01:19.290858
6873 23:01:19.291207
6874 23:01:19.291532 ==
6875 23:01:19.293457 Dram Type= 6, Freq= 0, CH_1, rank 1
6876 23:01:19.296690 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6877 23:01:19.297205 ==
6878 23:01:19.299911
6879 23:01:19.300340
6880 23:01:19.300684 TX Vref Scan disable
6881 23:01:19.303243 == TX Byte 0 ==
6882 23:01:19.306504 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6883 23:01:19.309856 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6884 23:01:19.313198 == TX Byte 1 ==
6885 23:01:19.316686 Update DQ dly =579 (4 ,2, 3) DQ OEN =(3 ,3)
6886 23:01:19.319579 Update DQM dly =579 (4 ,2, 3) DQM OEN =(3 ,3)
6887 23:01:19.320011 ==
6888 23:01:19.322929 Dram Type= 6, Freq= 0, CH_1, rank 1
6889 23:01:19.326341 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6890 23:01:19.329455 ==
6891 23:01:19.329885
6892 23:01:19.330223
6893 23:01:19.330640 TX Vref Scan disable
6894 23:01:19.332964 == TX Byte 0 ==
6895 23:01:19.336171 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6896 23:01:19.339411 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6897 23:01:19.342962 == TX Byte 1 ==
6898 23:01:19.346038 Update DQ dly =579 (4 ,2, 3) DQ OEN =(3 ,3)
6899 23:01:19.349651 Update DQM dly =579 (4 ,2, 3) DQM OEN =(3 ,3)
6900 23:01:19.350214
6901 23:01:19.352715 [DATLAT]
6902 23:01:19.353366 Freq=400, CH1 RK1
6903 23:01:19.353732
6904 23:01:19.356155 DATLAT Default: 0xe
6905 23:01:19.356723 0, 0xFFFF, sum = 0
6906 23:01:19.359651 1, 0xFFFF, sum = 0
6907 23:01:19.360189 2, 0xFFFF, sum = 0
6908 23:01:19.362499 3, 0xFFFF, sum = 0
6909 23:01:19.362939 4, 0xFFFF, sum = 0
6910 23:01:19.366252 5, 0xFFFF, sum = 0
6911 23:01:19.366981 6, 0xFFFF, sum = 0
6912 23:01:19.369161 7, 0xFFFF, sum = 0
6913 23:01:19.369604 8, 0xFFFF, sum = 0
6914 23:01:19.372839 9, 0xFFFF, sum = 0
6915 23:01:19.373286 10, 0xFFFF, sum = 0
6916 23:01:19.375689 11, 0xFFFF, sum = 0
6917 23:01:19.376175 12, 0xFFFF, sum = 0
6918 23:01:19.379012 13, 0x0, sum = 1
6919 23:01:19.379482 14, 0x0, sum = 2
6920 23:01:19.382324 15, 0x0, sum = 3
6921 23:01:19.382764 16, 0x0, sum = 4
6922 23:01:19.385684 best_step = 14
6923 23:01:19.386159
6924 23:01:19.386508 ==
6925 23:01:19.389124 Dram Type= 6, Freq= 0, CH_1, rank 1
6926 23:01:19.392468 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6927 23:01:19.392934 ==
6928 23:01:19.396022 RX Vref Scan: 0
6929 23:01:19.396563
6930 23:01:19.396955 RX Vref 0 -> 0, step: 1
6931 23:01:19.397291
6932 23:01:19.399154 RX Delay -327 -> 252, step: 8
6933 23:01:19.406914 iDelay=217, Bit 0, Center -16 (-231 ~ 200) 432
6934 23:01:19.410401 iDelay=217, Bit 1, Center -28 (-247 ~ 192) 440
6935 23:01:19.413761 iDelay=217, Bit 2, Center -32 (-255 ~ 192) 448
6936 23:01:19.420344 iDelay=217, Bit 3, Center -20 (-239 ~ 200) 440
6937 23:01:19.423676 iDelay=217, Bit 4, Center -16 (-239 ~ 208) 448
6938 23:01:19.427328 iDelay=217, Bit 5, Center -12 (-239 ~ 216) 456
6939 23:01:19.430151 iDelay=217, Bit 6, Center -12 (-231 ~ 208) 440
6940 23:01:19.436901 iDelay=217, Bit 7, Center -24 (-247 ~ 200) 448
6941 23:01:19.439863 iDelay=217, Bit 8, Center -36 (-263 ~ 192) 456
6942 23:01:19.443795 iDelay=217, Bit 9, Center -36 (-263 ~ 192) 456
6943 23:01:19.446424 iDelay=217, Bit 10, Center -24 (-247 ~ 200) 448
6944 23:01:19.453296 iDelay=217, Bit 11, Center -28 (-255 ~ 200) 456
6945 23:01:19.456544 iDelay=217, Bit 12, Center -20 (-247 ~ 208) 456
6946 23:01:19.460156 iDelay=217, Bit 13, Center -20 (-247 ~ 208) 456
6947 23:01:19.463171 iDelay=217, Bit 14, Center -20 (-247 ~ 208) 456
6948 23:01:19.469650 iDelay=217, Bit 15, Center -16 (-247 ~ 216) 464
6949 23:01:19.470088 ==
6950 23:01:19.472993 Dram Type= 6, Freq= 0, CH_1, rank 1
6951 23:01:19.476482 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6952 23:01:19.476969 ==
6953 23:01:19.477363 DQS Delay:
6954 23:01:19.479705 DQS0 = 32, DQS1 = 36
6955 23:01:19.480218 DQM Delay:
6956 23:01:19.483048 DQM0 = 12, DQM1 = 11
6957 23:01:19.483503 DQ Delay:
6958 23:01:19.486315 DQ0 =16, DQ1 =4, DQ2 =0, DQ3 =12
6959 23:01:19.489732 DQ4 =16, DQ5 =20, DQ6 =20, DQ7 =8
6960 23:01:19.493072 DQ8 =0, DQ9 =0, DQ10 =12, DQ11 =8
6961 23:01:19.496016 DQ12 =16, DQ13 =16, DQ14 =16, DQ15 =20
6962 23:01:19.496450
6963 23:01:19.496815
6964 23:01:19.502665 [DQSOSCAuto] RK1, (LSB)MR18= 0xab54, (MSB)MR19= 0xc0c, tDQSOscB0 = 399 ps tDQSOscB1 = 388 ps
6965 23:01:19.505950 CH1 RK1: MR19=C0C, MR18=AB54
6966 23:01:19.512840 CH1_RK1: MR19=0xC0C, MR18=0xAB54, DQSOSC=388, MR23=63, INC=392, DEC=261
6967 23:01:19.516384 [RxdqsGatingPostProcess] freq 400
6968 23:01:19.522965 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
6969 23:01:19.526295 best DQS0 dly(2T, 0.5T) = (0, 10)
6970 23:01:19.529293 best DQS1 dly(2T, 0.5T) = (0, 10)
6971 23:01:19.532685 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6972 23:01:19.535638 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6973 23:01:19.535748 best DQS0 dly(2T, 0.5T) = (0, 10)
6974 23:01:19.538935 best DQS1 dly(2T, 0.5T) = (0, 10)
6975 23:01:19.542205 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6976 23:01:19.545447 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6977 23:01:19.549028 Pre-setting of DQS Precalculation
6978 23:01:19.555661 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
6979 23:01:19.561778 sync_frequency_calibration_params sync calibration params of frequency 400 to shu:6
6980 23:01:19.568454 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
6981 23:01:19.568567
6982 23:01:19.568678
6983 23:01:19.571799 [Calibration Summary] 800 Mbps
6984 23:01:19.571910 CH 0, Rank 0
6985 23:01:19.575009 SW Impedance : PASS
6986 23:01:19.578549 DUTY Scan : NO K
6987 23:01:19.578634 ZQ Calibration : PASS
6988 23:01:19.581714 Jitter Meter : NO K
6989 23:01:19.584885 CBT Training : PASS
6990 23:01:19.584969 Write leveling : PASS
6991 23:01:19.588304 RX DQS gating : PASS
6992 23:01:19.591608 RX DQ/DQS(RDDQC) : PASS
6993 23:01:19.591695 TX DQ/DQS : PASS
6994 23:01:19.594974 RX DATLAT : PASS
6995 23:01:19.598339 RX DQ/DQS(Engine): PASS
6996 23:01:19.598424 TX OE : NO K
6997 23:01:19.601747 All Pass.
6998 23:01:19.601832
6999 23:01:19.601903 CH 0, Rank 1
7000 23:01:19.605054 SW Impedance : PASS
7001 23:01:19.605165 DUTY Scan : NO K
7002 23:01:19.608052 ZQ Calibration : PASS
7003 23:01:19.611253 Jitter Meter : NO K
7004 23:01:19.611337 CBT Training : PASS
7005 23:01:19.614700 Write leveling : NO K
7006 23:01:19.618050 RX DQS gating : PASS
7007 23:01:19.618135 RX DQ/DQS(RDDQC) : PASS
7008 23:01:19.621496 TX DQ/DQS : PASS
7009 23:01:19.624874 RX DATLAT : PASS
7010 23:01:19.624958 RX DQ/DQS(Engine): PASS
7011 23:01:19.628175 TX OE : NO K
7012 23:01:19.628263 All Pass.
7013 23:01:19.628335
7014 23:01:19.631450 CH 1, Rank 0
7015 23:01:19.631560 SW Impedance : PASS
7016 23:01:19.634387 DUTY Scan : NO K
7017 23:01:19.637658 ZQ Calibration : PASS
7018 23:01:19.637743 Jitter Meter : NO K
7019 23:01:19.641001 CBT Training : PASS
7020 23:01:19.641086 Write leveling : PASS
7021 23:01:19.644379 RX DQS gating : PASS
7022 23:01:19.647649 RX DQ/DQS(RDDQC) : PASS
7023 23:01:19.647733 TX DQ/DQS : PASS
7024 23:01:19.650790 RX DATLAT : PASS
7025 23:01:19.654329 RX DQ/DQS(Engine): PASS
7026 23:01:19.654413 TX OE : NO K
7027 23:01:19.657417 All Pass.
7028 23:01:19.657500
7029 23:01:19.657567 CH 1, Rank 1
7030 23:01:19.660879 SW Impedance : PASS
7031 23:01:19.660963 DUTY Scan : NO K
7032 23:01:19.664141 ZQ Calibration : PASS
7033 23:01:19.667563 Jitter Meter : NO K
7034 23:01:19.667675 CBT Training : PASS
7035 23:01:19.670498 Write leveling : NO K
7036 23:01:19.673734 RX DQS gating : PASS
7037 23:01:19.673837 RX DQ/DQS(RDDQC) : PASS
7038 23:01:19.677112 TX DQ/DQS : PASS
7039 23:01:19.680620 RX DATLAT : PASS
7040 23:01:19.680748 RX DQ/DQS(Engine): PASS
7041 23:01:19.683837 TX OE : NO K
7042 23:01:19.683935 All Pass.
7043 23:01:19.684002
7044 23:01:19.687155 DramC Write-DBI off
7045 23:01:19.690361 PER_BANK_REFRESH: Hybrid Mode
7046 23:01:19.690470 TX_TRACKING: ON
7047 23:01:19.700454 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
7048 23:01:19.703946 [FAST_K] Save calibration result to emmc
7049 23:01:19.706821 dramc_set_vcore_voltage set vcore to 725000
7050 23:01:19.710231 Read voltage for 1600, 0
7051 23:01:19.710337 Vio18 = 0
7052 23:01:19.710409 Vcore = 725000
7053 23:01:19.713643 Vdram = 0
7054 23:01:19.713820 Vddq = 0
7055 23:01:19.713918 Vmddr = 0
7056 23:01:19.720287 [FAST_K] DramcSave_Time_For_Cal_Init SHU1, femmc_Ready=0
7057 23:01:19.723825 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
7058 23:01:19.727101 MEM_TYPE=3, freq_sel=13
7059 23:01:19.730249 sv_algorithm_assistance_LP4_3733
7060 23:01:19.733634 ============ PULL DRAM RESETB DOWN ============
7061 23:01:19.740648 ========== PULL DRAM RESETB DOWN end =========
7062 23:01:19.743841 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7063 23:01:19.747427 ===================================
7064 23:01:19.750234 LPDDR4 DRAM CONFIGURATION
7065 23:01:19.753419 ===================================
7066 23:01:19.753881 EX_ROW_EN[0] = 0x0
7067 23:01:19.757057 EX_ROW_EN[1] = 0x0
7068 23:01:19.757531 LP4Y_EN = 0x0
7069 23:01:19.760463 WORK_FSP = 0x1
7070 23:01:19.761082 WL = 0x5
7071 23:01:19.763670 RL = 0x5
7072 23:01:19.764143 BL = 0x2
7073 23:01:19.766782 RPST = 0x0
7074 23:01:19.767299 RD_PRE = 0x0
7075 23:01:19.770228 WR_PRE = 0x1
7076 23:01:19.773460 WR_PST = 0x1
7077 23:01:19.773887 DBI_WR = 0x0
7078 23:01:19.776807 DBI_RD = 0x0
7079 23:01:19.777235 OTF = 0x1
7080 23:01:19.779940 ===================================
7081 23:01:19.783398 ===================================
7082 23:01:19.783829 ANA top config
7083 23:01:19.786898 ===================================
7084 23:01:19.789959 DLL_ASYNC_EN = 0
7085 23:01:19.793349 ALL_SLAVE_EN = 0
7086 23:01:19.796443 NEW_RANK_MODE = 1
7087 23:01:19.799673 DLL_IDLE_MODE = 1
7088 23:01:19.800101 LP45_APHY_COMB_EN = 1
7089 23:01:19.803006 TX_ODT_DIS = 0
7090 23:01:19.806491 NEW_8X_MODE = 1
7091 23:01:19.809645 ===================================
7092 23:01:19.813149 ===================================
7093 23:01:19.816650 data_rate = 3200
7094 23:01:19.819715 CKR = 1
7095 23:01:19.823170 DQ_P2S_RATIO = 8
7096 23:01:19.826626 ===================================
7097 23:01:19.827218 CA_P2S_RATIO = 8
7098 23:01:19.829756 DQ_CA_OPEN = 0
7099 23:01:19.832923 DQ_SEMI_OPEN = 0
7100 23:01:19.836290 CA_SEMI_OPEN = 0
7101 23:01:19.839674 CA_FULL_RATE = 0
7102 23:01:19.842663 DQ_CKDIV4_EN = 0
7103 23:01:19.843091 CA_CKDIV4_EN = 0
7104 23:01:19.846231 CA_PREDIV_EN = 0
7105 23:01:19.849401 PH8_DLY = 12
7106 23:01:19.852868 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
7107 23:01:19.855669 DQ_AAMCK_DIV = 4
7108 23:01:19.859452 CA_AAMCK_DIV = 4
7109 23:01:19.860036 CA_ADMCK_DIV = 4
7110 23:01:19.862508 DQ_TRACK_CA_EN = 0
7111 23:01:19.865571 CA_PICK = 1600
7112 23:01:19.869243 CA_MCKIO = 1600
7113 23:01:19.872196 MCKIO_SEMI = 0
7114 23:01:19.875788 PLL_FREQ = 3068
7115 23:01:19.879501 DQ_UI_PI_RATIO = 32
7116 23:01:19.882164 CA_UI_PI_RATIO = 0
7117 23:01:19.885883 ===================================
7118 23:01:19.886426 ===================================
7119 23:01:19.888882 memory_type:LPDDR4
7120 23:01:19.892285 GP_NUM : 10
7121 23:01:19.892760 SRAM_EN : 1
7122 23:01:19.895740 MD32_EN : 0
7123 23:01:19.898765 ===================================
7124 23:01:19.902277 [ANA_INIT] >>>>>>>>>>>>>>
7125 23:01:19.905490 <<<<<< [CONFIGURE PHASE]: ANA_TX
7126 23:01:19.908783 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
7127 23:01:19.912144 ===================================
7128 23:01:19.912575 data_rate = 3200,PCW = 0X7600
7129 23:01:19.915751 ===================================
7130 23:01:19.921955 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
7131 23:01:19.925332 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
7132 23:01:19.932452 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
7133 23:01:19.935752 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
7134 23:01:19.939071 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
7135 23:01:19.942000 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
7136 23:01:19.945502 [ANA_INIT] flow start
7137 23:01:19.948622 [ANA_INIT] PLL >>>>>>>>
7138 23:01:19.949128 [ANA_INIT] PLL <<<<<<<<
7139 23:01:19.952121 [ANA_INIT] MIDPI >>>>>>>>
7140 23:01:19.955384 [ANA_INIT] MIDPI <<<<<<<<
7141 23:01:19.956127 [ANA_INIT] DLL >>>>>>>>
7142 23:01:19.958734 [ANA_INIT] DLL <<<<<<<<
7143 23:01:19.961628 [ANA_INIT] flow end
7144 23:01:19.965038 ============ LP4 DIFF to SE enter ============
7145 23:01:19.968225 ============ LP4 DIFF to SE exit ============
7146 23:01:19.971758 [ANA_INIT] <<<<<<<<<<<<<
7147 23:01:19.974852 [Flow] Enable top DCM control >>>>>
7148 23:01:19.978551 [Flow] Enable top DCM control <<<<<
7149 23:01:19.981694 Enable DLL master slave shuffle
7150 23:01:19.984977 ==============================================================
7151 23:01:19.988418 Gating Mode config
7152 23:01:19.994549 ==============================================================
7153 23:01:19.995035 Config description:
7154 23:01:20.005002 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
7155 23:01:20.011369 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
7156 23:01:20.018360 SELPH_MODE 0: By rank 1: By Phase
7157 23:01:20.021040 ==============================================================
7158 23:01:20.024579 GAT_TRACK_EN = 1
7159 23:01:20.028058 RX_GATING_MODE = 2
7160 23:01:20.031256 RX_GATING_TRACK_MODE = 2
7161 23:01:20.034412 SELPH_MODE = 1
7162 23:01:20.037947 PICG_EARLY_EN = 1
7163 23:01:20.041224 VALID_LAT_VALUE = 1
7164 23:01:20.044486 ==============================================================
7165 23:01:20.047978 Enter into Gating configuration >>>>
7166 23:01:20.051517 Exit from Gating configuration <<<<
7167 23:01:20.054021 Enter into DVFS_PRE_config >>>>>
7168 23:01:20.067724 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
7169 23:01:20.071143 Exit from DVFS_PRE_config <<<<<
7170 23:01:20.074124 Enter into PICG configuration >>>>
7171 23:01:20.077205 Exit from PICG configuration <<<<
7172 23:01:20.077738 [RX_INPUT] configuration >>>>>
7173 23:01:20.080817 [RX_INPUT] configuration <<<<<
7174 23:01:20.087321 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
7175 23:01:20.090724 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
7176 23:01:20.097429 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
7177 23:01:20.103920 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
7178 23:01:20.110375 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
7179 23:01:20.117271 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
7180 23:01:20.120501 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
7181 23:01:20.123824 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
7182 23:01:20.130370 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
7183 23:01:20.133697 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
7184 23:01:20.136854 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
7185 23:01:20.143664 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7186 23:01:20.147160 ===================================
7187 23:01:20.147767 LPDDR4 DRAM CONFIGURATION
7188 23:01:20.150404 ===================================
7189 23:01:20.153709 EX_ROW_EN[0] = 0x0
7190 23:01:20.154291 EX_ROW_EN[1] = 0x0
7191 23:01:20.156883 LP4Y_EN = 0x0
7192 23:01:20.157444 WORK_FSP = 0x1
7193 23:01:20.160027 WL = 0x5
7194 23:01:20.163117 RL = 0x5
7195 23:01:20.163616 BL = 0x2
7196 23:01:20.166933 RPST = 0x0
7197 23:01:20.167409 RD_PRE = 0x0
7198 23:01:20.170018 WR_PRE = 0x1
7199 23:01:20.170603 WR_PST = 0x1
7200 23:01:20.173101 DBI_WR = 0x0
7201 23:01:20.173576 DBI_RD = 0x0
7202 23:01:20.176542 OTF = 0x1
7203 23:01:20.179925 ===================================
7204 23:01:20.183064 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
7205 23:01:20.186656 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
7206 23:01:20.193024 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7207 23:01:20.196221 ===================================
7208 23:01:20.196700 LPDDR4 DRAM CONFIGURATION
7209 23:01:20.199922 ===================================
7210 23:01:20.202905 EX_ROW_EN[0] = 0x10
7211 23:01:20.203383 EX_ROW_EN[1] = 0x0
7212 23:01:20.206174 LP4Y_EN = 0x0
7213 23:01:20.206653 WORK_FSP = 0x1
7214 23:01:20.209623 WL = 0x5
7215 23:01:20.212634 RL = 0x5
7216 23:01:20.213162 BL = 0x2
7217 23:01:20.216084 RPST = 0x0
7218 23:01:20.216541 RD_PRE = 0x0
7219 23:01:20.219119 WR_PRE = 0x1
7220 23:01:20.219601 WR_PST = 0x1
7221 23:01:20.222671 DBI_WR = 0x0
7222 23:01:20.223214 DBI_RD = 0x0
7223 23:01:20.226241 OTF = 0x1
7224 23:01:20.229366 ===================================
7225 23:01:20.235617 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
7226 23:01:20.236065 ==
7227 23:01:20.239068 Dram Type= 6, Freq= 0, CH_0, rank 0
7228 23:01:20.242635 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7229 23:01:20.243223 ==
7230 23:01:20.245741 [Duty_Offset_Calibration]
7231 23:01:20.246174 B0:2 B1:0 CA:1
7232 23:01:20.246522
7233 23:01:20.249261 [DutyScan_Calibration_Flow] k_type=0
7234 23:01:20.258715
7235 23:01:20.259243 ==CLK 0==
7236 23:01:20.262203 Final CLK duty delay cell = -4
7237 23:01:20.264873 [-4] MAX Duty = 5031%(X100), DQS PI = 30
7238 23:01:20.268516 [-4] MIN Duty = 4813%(X100), DQS PI = 0
7239 23:01:20.271741 [-4] AVG Duty = 4922%(X100)
7240 23:01:20.272312
7241 23:01:20.274905 CH0 CLK Duty spec in!! Max-Min= 218%
7242 23:01:20.278406 [DutyScan_Calibration_Flow] ====Done====
7243 23:01:20.278956
7244 23:01:20.281526 [DutyScan_Calibration_Flow] k_type=1
7245 23:01:20.298070
7246 23:01:20.298648 ==DQS 0 ==
7247 23:01:20.301405 Final DQS duty delay cell = 0
7248 23:01:20.304822 [0] MAX Duty = 5249%(X100), DQS PI = 32
7249 23:01:20.307682 [0] MIN Duty = 4969%(X100), DQS PI = 0
7250 23:01:20.311057 [0] AVG Duty = 5109%(X100)
7251 23:01:20.311683
7252 23:01:20.312087 ==DQS 1 ==
7253 23:01:20.314562 Final DQS duty delay cell = -4
7254 23:01:20.317426 [-4] MAX Duty = 5125%(X100), DQS PI = 30
7255 23:01:20.320857 [-4] MIN Duty = 4875%(X100), DQS PI = 4
7256 23:01:20.324057 [-4] AVG Duty = 5000%(X100)
7257 23:01:20.324529
7258 23:01:20.327519 CH0 DQS 0 Duty spec in!! Max-Min= 280%
7259 23:01:20.327996
7260 23:01:20.330718 CH0 DQS 1 Duty spec in!! Max-Min= 250%
7261 23:01:20.334020 [DutyScan_Calibration_Flow] ====Done====
7262 23:01:20.334619
7263 23:01:20.337134 [DutyScan_Calibration_Flow] k_type=3
7264 23:01:20.354470
7265 23:01:20.355045 ==DQM 0 ==
7266 23:01:20.357659 Final DQM duty delay cell = 0
7267 23:01:20.361057 [0] MAX Duty = 5093%(X100), DQS PI = 26
7268 23:01:20.364662 [0] MIN Duty = 4844%(X100), DQS PI = 2
7269 23:01:20.368022 [0] AVG Duty = 4968%(X100)
7270 23:01:20.368606
7271 23:01:20.369047 ==DQM 1 ==
7272 23:01:20.371546 Final DQM duty delay cell = -4
7273 23:01:20.374176 [-4] MAX Duty = 5000%(X100), DQS PI = 28
7274 23:01:20.377685 [-4] MIN Duty = 4751%(X100), DQS PI = 10
7275 23:01:20.380912 [-4] AVG Duty = 4875%(X100)
7276 23:01:20.381395
7277 23:01:20.384554 CH0 DQM 0 Duty spec in!! Max-Min= 249%
7278 23:01:20.385198
7279 23:01:20.387711 CH0 DQM 1 Duty spec in!! Max-Min= 249%
7280 23:01:20.391411 [DutyScan_Calibration_Flow] ====Done====
7281 23:01:20.392022
7282 23:01:20.394326 [DutyScan_Calibration_Flow] k_type=2
7283 23:01:20.412094
7284 23:01:20.412698 ==DQ 0 ==
7285 23:01:20.415586 Final DQ duty delay cell = 0
7286 23:01:20.419029 [0] MAX Duty = 5124%(X100), DQS PI = 32
7287 23:01:20.421942 [0] MIN Duty = 5000%(X100), DQS PI = 0
7288 23:01:20.422445 [0] AVG Duty = 5062%(X100)
7289 23:01:20.425308
7290 23:01:20.425904 ==DQ 1 ==
7291 23:01:20.428355 Final DQ duty delay cell = 0
7292 23:01:20.431808 [0] MAX Duty = 4969%(X100), DQS PI = 4
7293 23:01:20.435031 [0] MIN Duty = 4875%(X100), DQS PI = 10
7294 23:01:20.435498 [0] AVG Duty = 4922%(X100)
7295 23:01:20.435868
7296 23:01:20.438714 CH0 DQ 0 Duty spec in!! Max-Min= 124%
7297 23:01:20.441540
7298 23:01:20.445027 CH0 DQ 1 Duty spec in!! Max-Min= 94%
7299 23:01:20.448336 [DutyScan_Calibration_Flow] ====Done====
7300 23:01:20.448845 ==
7301 23:01:20.451907 Dram Type= 6, Freq= 0, CH_1, rank 0
7302 23:01:20.455194 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7303 23:01:20.455630 ==
7304 23:01:20.458231 [Duty_Offset_Calibration]
7305 23:01:20.458558 B0:0 B1:-1 CA:2
7306 23:01:20.458819
7307 23:01:20.461921 [DutyScan_Calibration_Flow] k_type=0
7308 23:01:20.472399
7309 23:01:20.472895 ==CLK 0==
7310 23:01:20.475305 Final CLK duty delay cell = 0
7311 23:01:20.478899 [0] MAX Duty = 5187%(X100), DQS PI = 16
7312 23:01:20.481956 [0] MIN Duty = 4906%(X100), DQS PI = 46
7313 23:01:20.485404 [0] AVG Duty = 5046%(X100)
7314 23:01:20.485826
7315 23:01:20.488724 CH1 CLK Duty spec in!! Max-Min= 281%
7316 23:01:20.492204 [DutyScan_Calibration_Flow] ====Done====
7317 23:01:20.492621
7318 23:01:20.495182 [DutyScan_Calibration_Flow] k_type=1
7319 23:01:20.511651
7320 23:01:20.512216 ==DQS 0 ==
7321 23:01:20.515022 Final DQS duty delay cell = 0
7322 23:01:20.518172 [0] MAX Duty = 5124%(X100), DQS PI = 26
7323 23:01:20.521506 [0] MIN Duty = 4969%(X100), DQS PI = 0
7324 23:01:20.524922 [0] AVG Duty = 5046%(X100)
7325 23:01:20.525434
7326 23:01:20.525799 ==DQS 1 ==
7327 23:01:20.528281 Final DQS duty delay cell = 0
7328 23:01:20.532051 [0] MAX Duty = 5187%(X100), DQS PI = 0
7329 23:01:20.534815 [0] MIN Duty = 4844%(X100), DQS PI = 32
7330 23:01:20.538370 [0] AVG Duty = 5015%(X100)
7331 23:01:20.538928
7332 23:01:20.541141 CH1 DQS 0 Duty spec in!! Max-Min= 155%
7333 23:01:20.541713
7334 23:01:20.544862 CH1 DQS 1 Duty spec in!! Max-Min= 343%
7335 23:01:20.548375 [DutyScan_Calibration_Flow] ====Done====
7336 23:01:20.549211
7337 23:01:20.551026 [DutyScan_Calibration_Flow] k_type=3
7338 23:01:20.569693
7339 23:01:20.570252 ==DQM 0 ==
7340 23:01:20.572665 Final DQM duty delay cell = 4
7341 23:01:20.576219 [4] MAX Duty = 5125%(X100), DQS PI = 6
7342 23:01:20.579550 [4] MIN Duty = 5000%(X100), DQS PI = 34
7343 23:01:20.582784 [4] AVG Duty = 5062%(X100)
7344 23:01:20.583348
7345 23:01:20.583718 ==DQM 1 ==
7346 23:01:20.586265 Final DQM duty delay cell = 0
7347 23:01:20.589480 [0] MAX Duty = 5281%(X100), DQS PI = 60
7348 23:01:20.592939 [0] MIN Duty = 4876%(X100), DQS PI = 34
7349 23:01:20.595994 [0] AVG Duty = 5078%(X100)
7350 23:01:20.596489
7351 23:01:20.598882 CH1 DQM 0 Duty spec in!! Max-Min= 125%
7352 23:01:20.599375
7353 23:01:20.602928 CH1 DQM 1 Duty spec in!! Max-Min= 405%
7354 23:01:20.605641 [DutyScan_Calibration_Flow] ====Done====
7355 23:01:20.606106
7356 23:01:20.609008 [DutyScan_Calibration_Flow] k_type=2
7357 23:01:20.626219
7358 23:01:20.626799 ==DQ 0 ==
7359 23:01:20.629827 Final DQ duty delay cell = 0
7360 23:01:20.632664 [0] MAX Duty = 5093%(X100), DQS PI = 18
7361 23:01:20.636299 [0] MIN Duty = 4969%(X100), DQS PI = 46
7362 23:01:20.637017 [0] AVG Duty = 5031%(X100)
7363 23:01:20.639545
7364 23:01:20.640007 ==DQ 1 ==
7365 23:01:20.642993 Final DQ duty delay cell = 0
7366 23:01:20.646173 [0] MAX Duty = 5062%(X100), DQS PI = 2
7367 23:01:20.649538 [0] MIN Duty = 4844%(X100), DQS PI = 32
7368 23:01:20.650006 [0] AVG Duty = 4953%(X100)
7369 23:01:20.650452
7370 23:01:20.652601 CH1 DQ 0 Duty spec in!! Max-Min= 124%
7371 23:01:20.656333
7372 23:01:20.659118 CH1 DQ 1 Duty spec in!! Max-Min= 218%
7373 23:01:20.662581 [DutyScan_Calibration_Flow] ====Done====
7374 23:01:20.665877 nWR fixed to 30
7375 23:01:20.666341 [ModeRegInit_LP4] CH0 RK0
7376 23:01:20.669241 [ModeRegInit_LP4] CH0 RK1
7377 23:01:20.672056 [ModeRegInit_LP4] CH1 RK0
7378 23:01:20.675428 [ModeRegInit_LP4] CH1 RK1
7379 23:01:20.675851 match AC timing 5
7380 23:01:20.682059 dramType 5, freq 1600, readDBI 0, DivMode 1, cbtMode 1
7381 23:01:20.685310 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
7382 23:01:20.688704 [WriteLatency GET] Version:0-MR_RL_field_value:5-WL:14
7383 23:01:20.695493 [TX_path_calculate] data rate=3200, WL=14, DQS_TotalUI=29
7384 23:01:20.698558 [TX_path_calculate] DQS = (3,5) DQS_OE = (3,2)
7385 23:01:20.698641 [MiockJmeterHQA]
7386 23:01:20.698708
7387 23:01:20.701674 [DramcMiockJmeter] u1RxGatingPI = 0
7388 23:01:20.705139 0 : 4255, 4029
7389 23:01:20.705224 4 : 4252, 4027
7390 23:01:20.708415 8 : 4363, 4137
7391 23:01:20.708527 12 : 4252, 4027
7392 23:01:20.708626 16 : 4252, 4027
7393 23:01:20.711844 20 : 4252, 4027
7394 23:01:20.711966 24 : 4365, 4139
7395 23:01:20.715132 28 : 4363, 4137
7396 23:01:20.715229 32 : 4255, 4030
7397 23:01:20.718244 36 : 4255, 4029
7398 23:01:20.718340 40 : 4363, 4137
7399 23:01:20.721718 44 : 4252, 4027
7400 23:01:20.721819 48 : 4363, 4140
7401 23:01:20.721911 52 : 4252, 4027
7402 23:01:20.724815 56 : 4250, 4027
7403 23:01:20.724906 60 : 4250, 4027
7404 23:01:20.727980 64 : 4249, 4027
7405 23:01:20.728079 68 : 4255, 4029
7406 23:01:20.731740 72 : 4250, 4027
7407 23:01:20.731842 76 : 4363, 4140
7408 23:01:20.734941 80 : 4363, 4140
7409 23:01:20.735043 84 : 4252, 4030
7410 23:01:20.735138 88 : 4252, 3253
7411 23:01:20.738177 92 : 4360, 0
7412 23:01:20.738274 96 : 4363, 0
7413 23:01:20.741194 100 : 4250, 0
7414 23:01:20.741290 104 : 4361, 0
7415 23:01:20.741383 108 : 4360, 0
7416 23:01:20.744663 112 : 4361, 0
7417 23:01:20.744752 116 : 4363, 0
7418 23:01:20.748025 120 : 4250, 0
7419 23:01:20.748111 124 : 4363, 0
7420 23:01:20.748180 128 : 4250, 0
7421 23:01:20.751151 132 : 4249, 0
7422 23:01:20.751236 136 : 4250, 0
7423 23:01:20.751305 140 : 4250, 0
7424 23:01:20.754532 144 : 4252, 0
7425 23:01:20.754617 148 : 4250, 0
7426 23:01:20.757701 152 : 4252, 0
7427 23:01:20.757787 156 : 4255, 0
7428 23:01:20.757856 160 : 4363, 0
7429 23:01:20.761002 164 : 4250, 0
7430 23:01:20.761089 168 : 4250, 0
7431 23:01:20.764297 172 : 4249, 0
7432 23:01:20.764382 176 : 4361, 0
7433 23:01:20.764450 180 : 4250, 0
7434 23:01:20.767660 184 : 4249, 0
7435 23:01:20.767745 188 : 4250, 0
7436 23:01:20.770984 192 : 4250, 0
7437 23:01:20.771070 196 : 4252, 0
7438 23:01:20.771139 200 : 4250, 8
7439 23:01:20.774295 204 : 4250, 2295
7440 23:01:20.774381 208 : 4250, 4027
7441 23:01:20.777753 212 : 4250, 4027
7442 23:01:20.777839 216 : 4252, 4030
7443 23:01:20.781124 220 : 4250, 4027
7444 23:01:20.781210 224 : 4363, 4140
7445 23:01:20.784351 228 : 4250, 4027
7446 23:01:20.784436 232 : 4253, 4029
7447 23:01:20.787758 236 : 4250, 4027
7448 23:01:20.787843 240 : 4363, 4140
7449 23:01:20.791087 244 : 4361, 4137
7450 23:01:20.791173 248 : 4250, 4027
7451 23:01:20.791242 252 : 4250, 4027
7452 23:01:20.793992 256 : 4252, 4030
7453 23:01:20.794078 260 : 4250, 4027
7454 23:01:20.797290 264 : 4255, 4030
7455 23:01:20.797375 268 : 4252, 4029
7456 23:01:20.800612 272 : 4252, 4029
7457 23:01:20.800697 276 : 4363, 4140
7458 23:01:20.803899 280 : 4255, 4029
7459 23:01:20.803986 284 : 4250, 4027
7460 23:01:20.807275 288 : 4250, 4027
7461 23:01:20.807381 292 : 4363, 4140
7462 23:01:20.810564 296 : 4363, 4137
7463 23:01:20.810640 300 : 4247, 4024
7464 23:01:20.813890 304 : 4365, 4140
7465 23:01:20.813974 308 : 4252, 4029
7466 23:01:20.817258 312 : 4250, 3883
7467 23:01:20.817339 316 : 4252, 2205
7468 23:01:20.817405 320 : 4252, 3
7469 23:01:20.817467
7470 23:01:20.820311 MIOCK jitter meter ch=0
7471 23:01:20.820390
7472 23:01:20.823840 1T = (320-92) = 228 dly cells
7473 23:01:20.830334 Clock freq = 1534 MHz, period = 651 ps, 1 dly cell = 285/100 ps
7474 23:01:20.830445 ==
7475 23:01:20.833857 Dram Type= 6, Freq= 0, CH_0, rank 0
7476 23:01:20.836903 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7477 23:01:20.836988 ==
7478 23:01:20.843576 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7479 23:01:20.847076 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7480 23:01:20.850114 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7481 23:01:20.856684 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7482 23:01:20.865825 [CA 0] Center 43 (13~73) winsize 61
7483 23:01:20.869250 [CA 1] Center 42 (12~73) winsize 62
7484 23:01:20.872519 [CA 2] Center 38 (8~68) winsize 61
7485 23:01:20.875829 [CA 3] Center 37 (8~67) winsize 60
7486 23:01:20.879188 [CA 4] Center 36 (6~66) winsize 61
7487 23:01:20.882143 [CA 5] Center 35 (5~65) winsize 61
7488 23:01:20.882218
7489 23:01:20.885480 [CmdBusTrainingLP45] Vref(ca) range 0: 32
7490 23:01:20.885557
7491 23:01:20.892274 [CATrainingPosCal] consider 1 rank data
7492 23:01:20.892353 u2DelayCellTimex100 = 285/100 ps
7493 23:01:20.898941 CA0 delay=43 (13~73),Diff = 8 PI (27 cell)
7494 23:01:20.901827 CA1 delay=42 (12~73),Diff = 7 PI (23 cell)
7495 23:01:20.905142 CA2 delay=38 (8~68),Diff = 3 PI (10 cell)
7496 23:01:20.908868 CA3 delay=37 (8~67),Diff = 2 PI (6 cell)
7497 23:01:20.912212 CA4 delay=36 (6~66),Diff = 1 PI (3 cell)
7498 23:01:20.915483 CA5 delay=35 (5~65),Diff = 0 PI (0 cell)
7499 23:01:20.915561
7500 23:01:20.918348 CA PerBit enable=1, Macro0, CA PI delay=35
7501 23:01:20.918422
7502 23:01:20.922158 [CBTSetCACLKResult] CA Dly = 35
7503 23:01:20.925103 CS Dly: 10 (0~41)
7504 23:01:20.928335 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7505 23:01:20.931829 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7506 23:01:20.931905 ==
7507 23:01:20.935145 Dram Type= 6, Freq= 0, CH_0, rank 1
7508 23:01:20.941730 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7509 23:01:20.941842 ==
7510 23:01:20.944947 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7511 23:01:20.951683 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7512 23:01:20.954831 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7513 23:01:20.961317 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7514 23:01:20.969229 [CA 0] Center 43 (13~73) winsize 61
7515 23:01:20.972417 [CA 1] Center 43 (13~73) winsize 61
7516 23:01:20.975737 [CA 2] Center 38 (9~67) winsize 59
7517 23:01:20.979071 [CA 3] Center 38 (8~68) winsize 61
7518 23:01:20.982566 [CA 4] Center 37 (7~67) winsize 61
7519 23:01:20.985958 [CA 5] Center 36 (6~66) winsize 61
7520 23:01:20.986042
7521 23:01:20.989296 [CmdBusTrainingLP45] Vref(ca) range 0: 32
7522 23:01:20.989379
7523 23:01:20.992225 [CATrainingPosCal] consider 2 rank data
7524 23:01:20.995529 u2DelayCellTimex100 = 285/100 ps
7525 23:01:20.998897 CA0 delay=43 (13~73),Diff = 8 PI (27 cell)
7526 23:01:21.005556 CA1 delay=43 (13~73),Diff = 8 PI (27 cell)
7527 23:01:21.008979 CA2 delay=38 (9~67),Diff = 3 PI (10 cell)
7528 23:01:21.012301 CA3 delay=37 (8~67),Diff = 2 PI (6 cell)
7529 23:01:21.015241 CA4 delay=36 (7~66),Diff = 1 PI (3 cell)
7530 23:01:21.018576 CA5 delay=35 (6~65),Diff = 0 PI (0 cell)
7531 23:01:21.018660
7532 23:01:21.022018 CA PerBit enable=1, Macro0, CA PI delay=35
7533 23:01:21.022101
7534 23:01:21.025319 [CBTSetCACLKResult] CA Dly = 35
7535 23:01:21.028644 CS Dly: 11 (0~43)
7536 23:01:21.032030 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7537 23:01:21.035223 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7538 23:01:21.035307
7539 23:01:21.038990 ----->DramcWriteLeveling(PI) begin...
7540 23:01:21.039076 ==
7541 23:01:21.041927 Dram Type= 6, Freq= 0, CH_0, rank 0
7542 23:01:21.048376 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7543 23:01:21.048461 ==
7544 23:01:21.051866 Write leveling (Byte 0): 36 => 36
7545 23:01:21.055372 Write leveling (Byte 1): 31 => 31
7546 23:01:21.055456 DramcWriteLeveling(PI) end<-----
7547 23:01:21.055522
7548 23:01:21.058395 ==
7549 23:01:21.061839 Dram Type= 6, Freq= 0, CH_0, rank 0
7550 23:01:21.064915 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7551 23:01:21.065020 ==
7552 23:01:21.068219 [Gating] SW mode calibration
7553 23:01:21.074838 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
7554 23:01:21.078342 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
7555 23:01:21.084896 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7556 23:01:21.088361 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7557 23:01:21.091314 1 4 8 | B1->B0 | 2323 2929 | 0 0 | (0 0) (1 1)
7558 23:01:21.098080 1 4 12 | B1->B0 | 2323 3434 | 0 1 | (0 0) (1 1)
7559 23:01:21.101402 1 4 16 | B1->B0 | 2323 3434 | 0 1 | (1 1) (1 1)
7560 23:01:21.104708 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7561 23:01:21.111440 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7562 23:01:21.114851 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7563 23:01:21.117681 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7564 23:01:21.124417 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7565 23:01:21.127860 1 5 8 | B1->B0 | 3434 3030 | 1 1 | (1 1) (1 0)
7566 23:01:21.131188 1 5 12 | B1->B0 | 3434 2323 | 1 0 | (1 1) (0 0)
7567 23:01:21.137774 1 5 16 | B1->B0 | 3333 2323 | 1 0 | (1 1) (0 0)
7568 23:01:21.141197 1 5 20 | B1->B0 | 2b2b 2323 | 0 0 | (1 0) (0 0)
7569 23:01:21.144347 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7570 23:01:21.151145 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7571 23:01:21.154476 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7572 23:01:21.157446 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7573 23:01:21.164260 1 6 8 | B1->B0 | 2323 3d3d | 0 0 | (0 0) (1 1)
7574 23:01:21.167266 1 6 12 | B1->B0 | 2323 4646 | 0 0 | (0 0) (0 0)
7575 23:01:21.170803 1 6 16 | B1->B0 | 2d2d 4646 | 0 0 | (0 0) (0 0)
7576 23:01:21.177424 1 6 20 | B1->B0 | 4444 4646 | 0 0 | (0 0) (0 0)
7577 23:01:21.180707 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7578 23:01:21.183803 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7579 23:01:21.190531 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7580 23:01:21.193887 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7581 23:01:21.197193 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7582 23:01:21.204129 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7583 23:01:21.207019 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7584 23:01:21.210630 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
7585 23:01:21.217114 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7586 23:01:21.220240 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7587 23:01:21.223935 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7588 23:01:21.230586 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7589 23:01:21.233816 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7590 23:01:21.237109 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7591 23:01:21.243540 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7592 23:01:21.247071 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7593 23:01:21.250712 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7594 23:01:21.257422 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7595 23:01:21.260289 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7596 23:01:21.263870 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7597 23:01:21.270417 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7598 23:01:21.273856 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7599 23:01:21.276935 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 0)
7600 23:01:21.280211 Total UI for P1: 0, mck2ui 16
7601 23:01:21.283544 best dqsien dly found for B0: ( 1, 9, 12)
7602 23:01:21.290348 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
7603 23:01:21.293388 1 9 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
7604 23:01:21.296884 1 9 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7605 23:01:21.300198 Total UI for P1: 0, mck2ui 16
7606 23:01:21.303667 best dqsien dly found for B1: ( 1, 9, 22)
7607 23:01:21.306998 best DQS0 dly(MCK, UI, PI) = (1, 9, 12)
7608 23:01:21.310250 best DQS1 dly(MCK, UI, PI) = (1, 9, 22)
7609 23:01:21.310840
7610 23:01:21.317165 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 12)
7611 23:01:21.320384 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 22)
7612 23:01:21.321022 [Gating] SW calibration Done
7613 23:01:21.323655 ==
7614 23:01:21.326583 Dram Type= 6, Freq= 0, CH_0, rank 0
7615 23:01:21.330210 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7616 23:01:21.330799 ==
7617 23:01:21.331177 RX Vref Scan: 0
7618 23:01:21.331528
7619 23:01:21.333015 RX Vref 0 -> 0, step: 1
7620 23:01:21.333484
7621 23:01:21.336422 RX Delay 0 -> 252, step: 8
7622 23:01:21.339584 iDelay=200, Bit 0, Center 139 (88 ~ 191) 104
7623 23:01:21.342856 iDelay=200, Bit 1, Center 139 (88 ~ 191) 104
7624 23:01:21.346263 iDelay=200, Bit 2, Center 135 (88 ~ 183) 96
7625 23:01:21.352990 iDelay=200, Bit 3, Center 135 (88 ~ 183) 96
7626 23:01:21.356140 iDelay=200, Bit 4, Center 139 (88 ~ 191) 104
7627 23:01:21.359820 iDelay=200, Bit 5, Center 127 (72 ~ 183) 112
7628 23:01:21.363057 iDelay=200, Bit 6, Center 147 (96 ~ 199) 104
7629 23:01:21.366300 iDelay=200, Bit 7, Center 147 (96 ~ 199) 104
7630 23:01:21.372592 iDelay=200, Bit 8, Center 119 (64 ~ 175) 112
7631 23:01:21.376192 iDelay=200, Bit 9, Center 115 (64 ~ 167) 104
7632 23:01:21.379781 iDelay=200, Bit 10, Center 123 (72 ~ 175) 104
7633 23:01:21.382881 iDelay=200, Bit 11, Center 127 (72 ~ 183) 112
7634 23:01:21.386001 iDelay=200, Bit 12, Center 131 (80 ~ 183) 104
7635 23:01:21.392945 iDelay=200, Bit 13, Center 131 (88 ~ 175) 88
7636 23:01:21.395896 iDelay=200, Bit 14, Center 139 (88 ~ 191) 104
7637 23:01:21.399200 iDelay=200, Bit 15, Center 135 (88 ~ 183) 96
7638 23:01:21.399676 ==
7639 23:01:21.402636 Dram Type= 6, Freq= 0, CH_0, rank 0
7640 23:01:21.405736 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7641 23:01:21.409134 ==
7642 23:01:21.409608 DQS Delay:
7643 23:01:21.409985 DQS0 = 0, DQS1 = 0
7644 23:01:21.412536 DQM Delay:
7645 23:01:21.413062 DQM0 = 138, DQM1 = 127
7646 23:01:21.416120 DQ Delay:
7647 23:01:21.419481 DQ0 =139, DQ1 =139, DQ2 =135, DQ3 =135
7648 23:01:21.422180 DQ4 =139, DQ5 =127, DQ6 =147, DQ7 =147
7649 23:01:21.425904 DQ8 =119, DQ9 =115, DQ10 =123, DQ11 =127
7650 23:01:21.428962 DQ12 =131, DQ13 =131, DQ14 =139, DQ15 =135
7651 23:01:21.429442
7652 23:01:21.429825
7653 23:01:21.430177 ==
7654 23:01:21.432339 Dram Type= 6, Freq= 0, CH_0, rank 0
7655 23:01:21.435742 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7656 23:01:21.436329 ==
7657 23:01:21.439044
7658 23:01:21.439515
7659 23:01:21.439886 TX Vref Scan disable
7660 23:01:21.442313 == TX Byte 0 ==
7661 23:01:21.445163 Update DQ dly =991 (3 ,6, 31) DQ OEN =(3 ,3)
7662 23:01:21.448500 Update DQM dly =991 (3 ,6, 31) DQM OEN =(3 ,3)
7663 23:01:21.451948 == TX Byte 1 ==
7664 23:01:21.455207 Update DQ dly =986 (3 ,6, 26) DQ OEN =(3 ,3)
7665 23:01:21.458499 Update DQM dly =986 (3 ,6, 26) DQM OEN =(3 ,3)
7666 23:01:21.459093 ==
7667 23:01:21.461664 Dram Type= 6, Freq= 0, CH_0, rank 0
7668 23:01:21.468230 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7669 23:01:21.468847 ==
7670 23:01:21.480394
7671 23:01:21.483719 TX Vref early break, caculate TX vref
7672 23:01:21.487101 TX Vref=16, minBit 7, minWin=22, winSum=373
7673 23:01:21.490324 TX Vref=18, minBit 11, minWin=23, winSum=386
7674 23:01:21.493816 TX Vref=20, minBit 12, minWin=23, winSum=393
7675 23:01:21.496874 TX Vref=22, minBit 0, minWin=24, winSum=403
7676 23:01:21.503438 TX Vref=24, minBit 4, minWin=25, winSum=416
7677 23:01:21.506854 TX Vref=26, minBit 2, minWin=25, winSum=427
7678 23:01:21.510303 TX Vref=28, minBit 0, minWin=26, winSum=432
7679 23:01:21.513250 TX Vref=30, minBit 0, minWin=25, winSum=423
7680 23:01:21.517035 TX Vref=32, minBit 0, minWin=25, winSum=414
7681 23:01:21.519809 TX Vref=34, minBit 7, minWin=24, winSum=409
7682 23:01:21.526662 [TxChooseVref] Worse bit 0, Min win 26, Win sum 432, Final Vref 28
7683 23:01:21.527098
7684 23:01:21.530132 Final TX Range 0 Vref 28
7685 23:01:21.530674
7686 23:01:21.531020 ==
7687 23:01:21.533310 Dram Type= 6, Freq= 0, CH_0, rank 0
7688 23:01:21.536567 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7689 23:01:21.537043 ==
7690 23:01:21.537394
7691 23:01:21.537715
7692 23:01:21.539864 TX Vref Scan disable
7693 23:01:21.546667 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =285/100 ps
7694 23:01:21.547148 == TX Byte 0 ==
7695 23:01:21.550037 u2DelayCellOfst[0]=13 cells (4 PI)
7696 23:01:21.553309 u2DelayCellOfst[1]=17 cells (5 PI)
7697 23:01:21.556560 u2DelayCellOfst[2]=10 cells (3 PI)
7698 23:01:21.559802 u2DelayCellOfst[3]=13 cells (4 PI)
7699 23:01:21.563211 u2DelayCellOfst[4]=6 cells (2 PI)
7700 23:01:21.566316 u2DelayCellOfst[5]=0 cells (0 PI)
7701 23:01:21.569761 u2DelayCellOfst[6]=17 cells (5 PI)
7702 23:01:21.573105 u2DelayCellOfst[7]=13 cells (4 PI)
7703 23:01:21.576419 Update DQ dly =989 (3 ,6, 29) DQ OEN =(3 ,3)
7704 23:01:21.579673 Update DQM dly =991 (3 ,6, 31) DQM OEN =(3 ,3)
7705 23:01:21.582910 == TX Byte 1 ==
7706 23:01:21.586573 u2DelayCellOfst[8]=0 cells (0 PI)
7707 23:01:21.589656 u2DelayCellOfst[9]=0 cells (0 PI)
7708 23:01:21.592751 u2DelayCellOfst[10]=10 cells (3 PI)
7709 23:01:21.593214 u2DelayCellOfst[11]=3 cells (1 PI)
7710 23:01:21.596200 u2DelayCellOfst[12]=10 cells (3 PI)
7711 23:01:21.599536 u2DelayCellOfst[13]=13 cells (4 PI)
7712 23:01:21.603047 u2DelayCellOfst[14]=13 cells (4 PI)
7713 23:01:21.606438 u2DelayCellOfst[15]=10 cells (3 PI)
7714 23:01:21.612654 Update DQ dly =984 (3 ,6, 24) DQ OEN =(3 ,3)
7715 23:01:21.616169 Update DQM dly =986 (3 ,6, 26) DQM OEN =(3 ,3)
7716 23:01:21.616603 DramC Write-DBI on
7717 23:01:21.616980 ==
7718 23:01:21.619574 Dram Type= 6, Freq= 0, CH_0, rank 0
7719 23:01:21.626522 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7720 23:01:21.627112 ==
7721 23:01:21.627507
7722 23:01:21.627826
7723 23:01:21.629102 TX Vref Scan disable
7724 23:01:21.629626 == TX Byte 0 ==
7725 23:01:21.635770 Update DQM dly =735 (2 ,6, 31) DQM OEN =(3 ,3)
7726 23:01:21.636200 == TX Byte 1 ==
7727 23:01:21.638934 Update DQM dly =727 (2 ,6, 23) DQM OEN =(3 ,3)
7728 23:01:21.642393 DramC Write-DBI off
7729 23:01:21.642821
7730 23:01:21.643159 [DATLAT]
7731 23:01:21.645775 Freq=1600, CH0 RK0
7732 23:01:21.646203
7733 23:01:21.646585 DATLAT Default: 0xf
7734 23:01:21.649127 0, 0xFFFF, sum = 0
7735 23:01:21.649559 1, 0xFFFF, sum = 0
7736 23:01:21.652510 2, 0xFFFF, sum = 0
7737 23:01:21.652976 3, 0xFFFF, sum = 0
7738 23:01:21.655898 4, 0xFFFF, sum = 0
7739 23:01:21.656328 5, 0xFFFF, sum = 0
7740 23:01:21.659397 6, 0xFFFF, sum = 0
7741 23:01:21.659852 7, 0xFFFF, sum = 0
7742 23:01:21.662228 8, 0xFFFF, sum = 0
7743 23:01:21.662846 9, 0xFFFF, sum = 0
7744 23:01:21.665638 10, 0xFFFF, sum = 0
7745 23:01:21.668992 11, 0xFFFF, sum = 0
7746 23:01:21.669425 12, 0xFFFF, sum = 0
7747 23:01:21.672412 13, 0xFFFF, sum = 0
7748 23:01:21.672994 14, 0x0, sum = 1
7749 23:01:21.675948 15, 0x0, sum = 2
7750 23:01:21.676489 16, 0x0, sum = 3
7751 23:01:21.679297 17, 0x0, sum = 4
7752 23:01:21.679833 best_step = 15
7753 23:01:21.680172
7754 23:01:21.680491 ==
7755 23:01:21.682543 Dram Type= 6, Freq= 0, CH_0, rank 0
7756 23:01:21.685792 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7757 23:01:21.686224 ==
7758 23:01:21.689253 RX Vref Scan: 1
7759 23:01:21.689797
7760 23:01:21.692261 Set Vref Range= 24 -> 127
7761 23:01:21.692690
7762 23:01:21.693076 RX Vref 24 -> 127, step: 1
7763 23:01:21.695440
7764 23:01:21.695966 RX Delay 19 -> 252, step: 4
7765 23:01:21.696322
7766 23:01:21.698778 Set Vref, RX VrefLevel [Byte0]: 24
7767 23:01:21.701932 [Byte1]: 24
7768 23:01:21.705686
7769 23:01:21.706113 Set Vref, RX VrefLevel [Byte0]: 25
7770 23:01:21.709014 [Byte1]: 25
7771 23:01:21.713060
7772 23:01:21.713481 Set Vref, RX VrefLevel [Byte0]: 26
7773 23:01:21.716249 [Byte1]: 26
7774 23:01:21.720889
7775 23:01:21.721451 Set Vref, RX VrefLevel [Byte0]: 27
7776 23:01:21.723764 [Byte1]: 27
7777 23:01:21.728262
7778 23:01:21.728997 Set Vref, RX VrefLevel [Byte0]: 28
7779 23:01:21.731638 [Byte1]: 28
7780 23:01:21.735831
7781 23:01:21.736297 Set Vref, RX VrefLevel [Byte0]: 29
7782 23:01:21.739127 [Byte1]: 29
7783 23:01:21.743423
7784 23:01:21.743850 Set Vref, RX VrefLevel [Byte0]: 30
7785 23:01:21.746831 [Byte1]: 30
7786 23:01:21.751139
7787 23:01:21.751603 Set Vref, RX VrefLevel [Byte0]: 31
7788 23:01:21.754005 [Byte1]: 31
7789 23:01:21.758307
7790 23:01:21.758727 Set Vref, RX VrefLevel [Byte0]: 32
7791 23:01:21.761948 [Byte1]: 32
7792 23:01:21.765941
7793 23:01:21.766440 Set Vref, RX VrefLevel [Byte0]: 33
7794 23:01:21.769306 [Byte1]: 33
7795 23:01:21.773637
7796 23:01:21.774066 Set Vref, RX VrefLevel [Byte0]: 34
7797 23:01:21.776740 [Byte1]: 34
7798 23:01:21.781267
7799 23:01:21.781697 Set Vref, RX VrefLevel [Byte0]: 35
7800 23:01:21.784634 [Byte1]: 35
7801 23:01:21.788960
7802 23:01:21.789495 Set Vref, RX VrefLevel [Byte0]: 36
7803 23:01:21.792256 [Byte1]: 36
7804 23:01:21.796684
7805 23:01:21.797331 Set Vref, RX VrefLevel [Byte0]: 37
7806 23:01:21.799811 [Byte1]: 37
7807 23:01:21.803662
7808 23:01:21.804137 Set Vref, RX VrefLevel [Byte0]: 38
7809 23:01:21.807126 [Byte1]: 38
7810 23:01:21.811337
7811 23:01:21.811763 Set Vref, RX VrefLevel [Byte0]: 39
7812 23:01:21.815128 [Byte1]: 39
7813 23:01:21.819081
7814 23:01:21.819530 Set Vref, RX VrefLevel [Byte0]: 40
7815 23:01:21.822552 [Byte1]: 40
7816 23:01:21.826640
7817 23:01:21.827116 Set Vref, RX VrefLevel [Byte0]: 41
7818 23:01:21.829824 [Byte1]: 41
7819 23:01:21.834247
7820 23:01:21.834759 Set Vref, RX VrefLevel [Byte0]: 42
7821 23:01:21.837706 [Byte1]: 42
7822 23:01:21.841703
7823 23:01:21.844866 Set Vref, RX VrefLevel [Byte0]: 43
7824 23:01:21.848342 [Byte1]: 43
7825 23:01:21.848798
7826 23:01:21.851711 Set Vref, RX VrefLevel [Byte0]: 44
7827 23:01:21.854900 [Byte1]: 44
7828 23:01:21.855436
7829 23:01:21.858343 Set Vref, RX VrefLevel [Byte0]: 45
7830 23:01:21.861446 [Byte1]: 45
7831 23:01:21.861871
7832 23:01:21.864608 Set Vref, RX VrefLevel [Byte0]: 46
7833 23:01:21.867952 [Byte1]: 46
7834 23:01:21.872373
7835 23:01:21.872825 Set Vref, RX VrefLevel [Byte0]: 47
7836 23:01:21.875476 [Byte1]: 47
7837 23:01:21.879916
7838 23:01:21.880509 Set Vref, RX VrefLevel [Byte0]: 48
7839 23:01:21.883383 [Byte1]: 48
7840 23:01:21.887652
7841 23:01:21.888193 Set Vref, RX VrefLevel [Byte0]: 49
7842 23:01:21.890985 [Byte1]: 49
7843 23:01:21.895084
7844 23:01:21.895634 Set Vref, RX VrefLevel [Byte0]: 50
7845 23:01:21.898410 [Byte1]: 50
7846 23:01:21.902610
7847 23:01:21.903048 Set Vref, RX VrefLevel [Byte0]: 51
7848 23:01:21.905764 [Byte1]: 51
7849 23:01:21.909690
7850 23:01:21.910195 Set Vref, RX VrefLevel [Byte0]: 52
7851 23:01:21.912888 [Byte1]: 52
7852 23:01:21.917250
7853 23:01:21.917743 Set Vref, RX VrefLevel [Byte0]: 53
7854 23:01:21.920559 [Byte1]: 53
7855 23:01:21.925005
7856 23:01:21.925537 Set Vref, RX VrefLevel [Byte0]: 54
7857 23:01:21.928337 [Byte1]: 54
7858 23:01:21.932374
7859 23:01:21.932830 Set Vref, RX VrefLevel [Byte0]: 55
7860 23:01:21.935789 [Byte1]: 55
7861 23:01:21.940040
7862 23:01:21.940460 Set Vref, RX VrefLevel [Byte0]: 56
7863 23:01:21.943481 [Byte1]: 56
7864 23:01:21.947787
7865 23:01:21.948339 Set Vref, RX VrefLevel [Byte0]: 57
7866 23:01:21.951434 [Byte1]: 57
7867 23:01:21.955517
7868 23:01:21.956079 Set Vref, RX VrefLevel [Byte0]: 58
7869 23:01:21.958774 [Byte1]: 58
7870 23:01:21.962804
7871 23:01:21.963336 Set Vref, RX VrefLevel [Byte0]: 59
7872 23:01:21.966120 [Byte1]: 59
7873 23:01:21.970381
7874 23:01:21.970875 Set Vref, RX VrefLevel [Byte0]: 60
7875 23:01:21.977347 [Byte1]: 60
7876 23:01:21.977936
7877 23:01:21.980399 Set Vref, RX VrefLevel [Byte0]: 61
7878 23:01:21.983674 [Byte1]: 61
7879 23:01:21.984446
7880 23:01:21.986937 Set Vref, RX VrefLevel [Byte0]: 62
7881 23:01:21.990405 [Byte1]: 62
7882 23:01:21.993428
7883 23:01:21.993907 Set Vref, RX VrefLevel [Byte0]: 63
7884 23:01:21.996653 [Byte1]: 63
7885 23:01:22.000988
7886 23:01:22.001457 Set Vref, RX VrefLevel [Byte0]: 64
7887 23:01:22.004328 [Byte1]: 64
7888 23:01:22.008299
7889 23:01:22.008742 Set Vref, RX VrefLevel [Byte0]: 65
7890 23:01:22.011549 [Byte1]: 65
7891 23:01:22.016360
7892 23:01:22.016984 Set Vref, RX VrefLevel [Byte0]: 66
7893 23:01:22.019269 [Byte1]: 66
7894 23:01:22.023627
7895 23:01:22.024181 Set Vref, RX VrefLevel [Byte0]: 67
7896 23:01:22.027109 [Byte1]: 67
7897 23:01:22.031237
7898 23:01:22.031810 Set Vref, RX VrefLevel [Byte0]: 68
7899 23:01:22.034449 [Byte1]: 68
7900 23:01:22.038523
7901 23:01:22.039196 Set Vref, RX VrefLevel [Byte0]: 69
7902 23:01:22.042149 [Byte1]: 69
7903 23:01:22.046094
7904 23:01:22.046712 Set Vref, RX VrefLevel [Byte0]: 70
7905 23:01:22.049448 [Byte1]: 70
7906 23:01:22.053669
7907 23:01:22.054135 Set Vref, RX VrefLevel [Byte0]: 71
7908 23:01:22.057013 [Byte1]: 71
7909 23:01:22.061238
7910 23:01:22.061838 Set Vref, RX VrefLevel [Byte0]: 72
7911 23:01:22.064615 [Byte1]: 72
7912 23:01:22.069038
7913 23:01:22.069510 Set Vref, RX VrefLevel [Byte0]: 73
7914 23:01:22.072346 [Byte1]: 73
7915 23:01:22.076176
7916 23:01:22.076599 Set Vref, RX VrefLevel [Byte0]: 74
7917 23:01:22.079663 [Byte1]: 74
7918 23:01:22.083976
7919 23:01:22.084402 Set Vref, RX VrefLevel [Byte0]: 75
7920 23:01:22.087208 [Byte1]: 75
7921 23:01:22.091372
7922 23:01:22.091798 Set Vref, RX VrefLevel [Byte0]: 76
7923 23:01:22.095077 [Byte1]: 76
7924 23:01:22.099397
7925 23:01:22.099823 Set Vref, RX VrefLevel [Byte0]: 77
7926 23:01:22.102210 [Byte1]: 77
7927 23:01:22.106627
7928 23:01:22.106710 Set Vref, RX VrefLevel [Byte0]: 78
7929 23:01:22.109518 [Byte1]: 78
7930 23:01:22.113852
7931 23:01:22.113934 Set Vref, RX VrefLevel [Byte0]: 79
7932 23:01:22.117246 [Byte1]: 79
7933 23:01:22.121779
7934 23:01:22.121861 Set Vref, RX VrefLevel [Byte0]: 80
7935 23:01:22.124907 [Byte1]: 80
7936 23:01:22.128878
7937 23:01:22.128961 Final RX Vref Byte 0 = 57 to rank0
7938 23:01:22.132257 Final RX Vref Byte 1 = 62 to rank0
7939 23:01:22.135708 Final RX Vref Byte 0 = 57 to rank1
7940 23:01:22.138917 Final RX Vref Byte 1 = 62 to rank1==
7941 23:01:22.142419 Dram Type= 6, Freq= 0, CH_0, rank 0
7942 23:01:22.148659 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7943 23:01:22.148747 ==
7944 23:01:22.148839 DQS Delay:
7945 23:01:22.152078 DQS0 = 0, DQS1 = 0
7946 23:01:22.152161 DQM Delay:
7947 23:01:22.152228 DQM0 = 136, DQM1 = 125
7948 23:01:22.155380 DQ Delay:
7949 23:01:22.158859 DQ0 =136, DQ1 =140, DQ2 =132, DQ3 =132
7950 23:01:22.161993 DQ4 =140, DQ5 =124, DQ6 =142, DQ7 =144
7951 23:01:22.165378 DQ8 =116, DQ9 =112, DQ10 =126, DQ11 =120
7952 23:01:22.168749 DQ12 =128, DQ13 =128, DQ14 =136, DQ15 =134
7953 23:01:22.168870
7954 23:01:22.168937
7955 23:01:22.168999
7956 23:01:22.171680 [DramC_TX_OE_Calibration] TA2
7957 23:01:22.175008 Original DQ_B0 (3 6) =30, OEN = 27
7958 23:01:22.178302 Original DQ_B1 (3 6) =30, OEN = 27
7959 23:01:22.181705 24, 0x0, End_B0=24 End_B1=24
7960 23:01:22.181789 25, 0x0, End_B0=25 End_B1=25
7961 23:01:22.184953 26, 0x0, End_B0=26 End_B1=26
7962 23:01:22.188293 27, 0x0, End_B0=27 End_B1=27
7963 23:01:22.191582 28, 0x0, End_B0=28 End_B1=28
7964 23:01:22.194844 29, 0x0, End_B0=29 End_B1=29
7965 23:01:22.194929 30, 0x0, End_B0=30 End_B1=30
7966 23:01:22.198181 31, 0x4141, End_B0=30 End_B1=30
7967 23:01:22.201487 Byte0 end_step=30 best_step=27
7968 23:01:22.204849 Byte1 end_step=30 best_step=27
7969 23:01:22.208260 Byte0 TX OE(2T, 0.5T) = (3, 3)
7970 23:01:22.211205 Byte1 TX OE(2T, 0.5T) = (3, 3)
7971 23:01:22.211289
7972 23:01:22.211355
7973 23:01:22.217896 [DQSOSCAuto] RK0, (LSB)MR18= 0x1e1c, (MSB)MR19= 0x303, tDQSOscB0 = 395 ps tDQSOscB1 = 394 ps
7974 23:01:22.221282 CH0 RK0: MR19=303, MR18=1E1C
7975 23:01:22.228096 CH0_RK0: MR19=0x303, MR18=0x1E1C, DQSOSC=394, MR23=63, INC=23, DEC=15
7976 23:01:22.228181
7977 23:01:22.231391 ----->DramcWriteLeveling(PI) begin...
7978 23:01:22.231475 ==
7979 23:01:22.234660 Dram Type= 6, Freq= 0, CH_0, rank 1
7980 23:01:22.237713 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7981 23:01:22.237798 ==
7982 23:01:22.240825 Write leveling (Byte 0): 38 => 38
7983 23:01:22.244397 Write leveling (Byte 1): 29 => 29
7984 23:01:22.247578 DramcWriteLeveling(PI) end<-----
7985 23:01:22.247685
7986 23:01:22.247782 ==
7987 23:01:22.250956 Dram Type= 6, Freq= 0, CH_0, rank 1
7988 23:01:22.257537 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7989 23:01:22.257648 ==
7990 23:01:22.257744 [Gating] SW mode calibration
7991 23:01:22.267151 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
7992 23:01:22.270613 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
7993 23:01:22.277484 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7994 23:01:22.280401 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7995 23:01:22.283870 1 4 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7996 23:01:22.290459 1 4 12 | B1->B0 | 2626 2c2c | 1 0 | (0 0) (0 0)
7997 23:01:22.293771 1 4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7998 23:01:22.297002 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7999 23:01:22.303732 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8000 23:01:22.307352 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8001 23:01:22.310260 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8002 23:01:22.316759 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8003 23:01:22.320080 1 5 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
8004 23:01:22.323639 1 5 12 | B1->B0 | 3232 2727 | 1 0 | (1 0) (1 0)
8005 23:01:22.330631 1 5 16 | B1->B0 | 2e2e 2323 | 0 0 | (1 0) (0 0)
8006 23:01:22.333995 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8007 23:01:22.336751 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8008 23:01:22.343769 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8009 23:01:22.347079 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8010 23:01:22.349964 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8011 23:01:22.356575 1 6 8 | B1->B0 | 2323 2e2e | 0 0 | (0 0) (0 0)
8012 23:01:22.359936 1 6 12 | B1->B0 | 2b2b 4343 | 0 1 | (0 0) (0 0)
8013 23:01:22.363277 1 6 16 | B1->B0 | 4343 4646 | 1 0 | (0 0) (0 0)
8014 23:01:22.369800 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8015 23:01:22.373044 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8016 23:01:22.376119 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8017 23:01:22.382821 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8018 23:01:22.386081 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8019 23:01:22.389377 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8020 23:01:22.396116 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
8021 23:01:22.399493 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8022 23:01:22.402409 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8023 23:01:22.409233 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8024 23:01:22.412447 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8025 23:01:22.415869 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8026 23:01:22.422476 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8027 23:01:22.425846 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8028 23:01:22.429292 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8029 23:01:22.435594 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8030 23:01:22.438864 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8031 23:01:22.441830 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8032 23:01:22.445562 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8033 23:01:22.451951 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8034 23:01:22.455435 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8035 23:01:22.458606 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
8036 23:01:22.465301 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8037 23:01:22.468681 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
8038 23:01:22.471663 Total UI for P1: 0, mck2ui 16
8039 23:01:22.475068 best dqsien dly found for B0: ( 1, 9, 10)
8040 23:01:22.478469 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8041 23:01:22.481533 Total UI for P1: 0, mck2ui 16
8042 23:01:22.484955 best dqsien dly found for B1: ( 1, 9, 14)
8043 23:01:22.488077 best DQS0 dly(MCK, UI, PI) = (1, 9, 10)
8044 23:01:22.494695 best DQS1 dly(MCK, UI, PI) = (1, 9, 14)
8045 23:01:22.494814
8046 23:01:22.498231 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 10)
8047 23:01:22.501704 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 14)
8048 23:01:22.504867 [Gating] SW calibration Done
8049 23:01:22.504973 ==
8050 23:01:22.508023 Dram Type= 6, Freq= 0, CH_0, rank 1
8051 23:01:22.511314 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8052 23:01:22.511425 ==
8053 23:01:22.514625 RX Vref Scan: 0
8054 23:01:22.514730
8055 23:01:22.514825 RX Vref 0 -> 0, step: 1
8056 23:01:22.514928
8057 23:01:22.518127 RX Delay 0 -> 252, step: 8
8058 23:01:22.521030 iDelay=200, Bit 0, Center 135 (80 ~ 191) 112
8059 23:01:22.527688 iDelay=200, Bit 1, Center 139 (88 ~ 191) 104
8060 23:01:22.531012 iDelay=200, Bit 2, Center 135 (80 ~ 191) 112
8061 23:01:22.534286 iDelay=200, Bit 3, Center 131 (80 ~ 183) 104
8062 23:01:22.537661 iDelay=200, Bit 4, Center 139 (88 ~ 191) 104
8063 23:01:22.541072 iDelay=200, Bit 5, Center 127 (72 ~ 183) 112
8064 23:01:22.548008 iDelay=200, Bit 6, Center 143 (88 ~ 199) 112
8065 23:01:22.551249 iDelay=200, Bit 7, Center 143 (88 ~ 199) 112
8066 23:01:22.554652 iDelay=200, Bit 8, Center 119 (64 ~ 175) 112
8067 23:01:22.557994 iDelay=200, Bit 9, Center 115 (64 ~ 167) 104
8068 23:01:22.561015 iDelay=200, Bit 10, Center 123 (72 ~ 175) 104
8069 23:01:22.567582 iDelay=200, Bit 11, Center 123 (72 ~ 175) 104
8070 23:01:22.571210 iDelay=200, Bit 12, Center 127 (72 ~ 183) 112
8071 23:01:22.574297 iDelay=200, Bit 13, Center 131 (80 ~ 183) 104
8072 23:01:22.577527 iDelay=200, Bit 14, Center 135 (80 ~ 191) 112
8073 23:01:22.584339 iDelay=200, Bit 15, Center 135 (80 ~ 191) 112
8074 23:01:22.584942 ==
8075 23:01:22.587344 Dram Type= 6, Freq= 0, CH_0, rank 1
8076 23:01:22.591123 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8077 23:01:22.591705 ==
8078 23:01:22.592087 DQS Delay:
8079 23:01:22.593966 DQS0 = 0, DQS1 = 0
8080 23:01:22.594439 DQM Delay:
8081 23:01:22.597343 DQM0 = 136, DQM1 = 126
8082 23:01:22.597819 DQ Delay:
8083 23:01:22.601073 DQ0 =135, DQ1 =139, DQ2 =135, DQ3 =131
8084 23:01:22.604114 DQ4 =139, DQ5 =127, DQ6 =143, DQ7 =143
8085 23:01:22.607692 DQ8 =119, DQ9 =115, DQ10 =123, DQ11 =123
8086 23:01:22.610747 DQ12 =127, DQ13 =131, DQ14 =135, DQ15 =135
8087 23:01:22.611267
8088 23:01:22.611675
8089 23:01:22.614246 ==
8090 23:01:22.617390 Dram Type= 6, Freq= 0, CH_0, rank 1
8091 23:01:22.620958 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8092 23:01:22.621530 ==
8093 23:01:22.621912
8094 23:01:22.622264
8095 23:01:22.624011 TX Vref Scan disable
8096 23:01:22.624489 == TX Byte 0 ==
8097 23:01:22.627138 Update DQ dly =994 (3 ,6, 34) DQ OEN =(3 ,3)
8098 23:01:22.634214 Update DQM dly =994 (3 ,6, 34) DQM OEN =(3 ,3)
8099 23:01:22.634790 == TX Byte 1 ==
8100 23:01:22.640242 Update DQ dly =983 (3 ,6, 23) DQ OEN =(3 ,3)
8101 23:01:22.643532 Update DQM dly =983 (3 ,6, 23) DQM OEN =(3 ,3)
8102 23:01:22.644159 ==
8103 23:01:22.646850 Dram Type= 6, Freq= 0, CH_0, rank 1
8104 23:01:22.650259 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8105 23:01:22.650974 ==
8106 23:01:22.664621
8107 23:01:22.668097 TX Vref early break, caculate TX vref
8108 23:01:22.671145 TX Vref=16, minBit 0, minWin=23, winSum=387
8109 23:01:22.674997 TX Vref=18, minBit 3, minWin=24, winSum=400
8110 23:01:22.677751 TX Vref=20, minBit 8, minWin=24, winSum=403
8111 23:01:22.681530 TX Vref=22, minBit 8, minWin=24, winSum=413
8112 23:01:22.684570 TX Vref=24, minBit 0, minWin=26, winSum=421
8113 23:01:22.690997 TX Vref=26, minBit 0, minWin=26, winSum=430
8114 23:01:22.694398 TX Vref=28, minBit 0, minWin=26, winSum=431
8115 23:01:22.697469 TX Vref=30, minBit 1, minWin=26, winSum=431
8116 23:01:22.700537 TX Vref=32, minBit 0, minWin=26, winSum=425
8117 23:01:22.703828 TX Vref=34, minBit 2, minWin=24, winSum=408
8118 23:01:22.710398 [TxChooseVref] Worse bit 0, Min win 26, Win sum 431, Final Vref 28
8119 23:01:22.710537
8120 23:01:22.713621 Final TX Range 0 Vref 28
8121 23:01:22.713697
8122 23:01:22.713769 ==
8123 23:01:22.716828 Dram Type= 6, Freq= 0, CH_0, rank 1
8124 23:01:22.720398 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8125 23:01:22.720506 ==
8126 23:01:22.720603
8127 23:01:22.720713
8128 23:01:22.723717 TX Vref Scan disable
8129 23:01:22.730503 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =285/100 ps
8130 23:01:22.730596 == TX Byte 0 ==
8131 23:01:22.733914 u2DelayCellOfst[0]=17 cells (5 PI)
8132 23:01:22.736849 u2DelayCellOfst[1]=20 cells (6 PI)
8133 23:01:22.740191 u2DelayCellOfst[2]=13 cells (4 PI)
8134 23:01:22.743635 u2DelayCellOfst[3]=13 cells (4 PI)
8135 23:01:22.747093 u2DelayCellOfst[4]=10 cells (3 PI)
8136 23:01:22.750043 u2DelayCellOfst[5]=0 cells (0 PI)
8137 23:01:22.753394 u2DelayCellOfst[6]=20 cells (6 PI)
8138 23:01:22.757015 u2DelayCellOfst[7]=20 cells (6 PI)
8139 23:01:22.760343 Update DQ dly =991 (3 ,6, 31) DQ OEN =(3 ,3)
8140 23:01:22.763598 Update DQM dly =994 (3 ,6, 34) DQM OEN =(3 ,3)
8141 23:01:22.766741 == TX Byte 1 ==
8142 23:01:22.770382 u2DelayCellOfst[8]=0 cells (0 PI)
8143 23:01:22.773541 u2DelayCellOfst[9]=0 cells (0 PI)
8144 23:01:22.773942 u2DelayCellOfst[10]=6 cells (2 PI)
8145 23:01:22.777096 u2DelayCellOfst[11]=0 cells (0 PI)
8146 23:01:22.780273 u2DelayCellOfst[12]=10 cells (3 PI)
8147 23:01:22.783794 u2DelayCellOfst[13]=10 cells (3 PI)
8148 23:01:22.786929 u2DelayCellOfst[14]=10 cells (3 PI)
8149 23:01:22.789915 u2DelayCellOfst[15]=6 cells (2 PI)
8150 23:01:22.796480 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
8151 23:01:22.799848 Update DQM dly =983 (3 ,6, 23) DQM OEN =(3 ,3)
8152 23:01:22.800356 DramC Write-DBI on
8153 23:01:22.800914 ==
8154 23:01:22.803644 Dram Type= 6, Freq= 0, CH_0, rank 1
8155 23:01:22.809862 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8156 23:01:22.810292 ==
8157 23:01:22.810632
8158 23:01:22.810948
8159 23:01:22.811253 TX Vref Scan disable
8160 23:01:22.814390 == TX Byte 0 ==
8161 23:01:22.817586 Update DQM dly =737 (2 ,6, 33) DQM OEN =(3 ,3)
8162 23:01:22.820811 == TX Byte 1 ==
8163 23:01:22.824154 Update DQM dly =725 (2 ,6, 21) DQM OEN =(3 ,3)
8164 23:01:22.827562 DramC Write-DBI off
8165 23:01:22.827990
8166 23:01:22.828329 [DATLAT]
8167 23:01:22.828645 Freq=1600, CH0 RK1
8168 23:01:22.829000
8169 23:01:22.830933 DATLAT Default: 0xf
8170 23:01:22.831358 0, 0xFFFF, sum = 0
8171 23:01:22.834228 1, 0xFFFF, sum = 0
8172 23:01:22.837194 2, 0xFFFF, sum = 0
8173 23:01:22.837627 3, 0xFFFF, sum = 0
8174 23:01:22.840505 4, 0xFFFF, sum = 0
8175 23:01:22.840964 5, 0xFFFF, sum = 0
8176 23:01:22.844130 6, 0xFFFF, sum = 0
8177 23:01:22.844663 7, 0xFFFF, sum = 0
8178 23:01:22.847301 8, 0xFFFF, sum = 0
8179 23:01:22.847733 9, 0xFFFF, sum = 0
8180 23:01:22.851038 10, 0xFFFF, sum = 0
8181 23:01:22.851636 11, 0xFFFF, sum = 0
8182 23:01:22.854391 12, 0xFFFF, sum = 0
8183 23:01:22.855022 13, 0xFFFF, sum = 0
8184 23:01:22.857210 14, 0x0, sum = 1
8185 23:01:22.857688 15, 0x0, sum = 2
8186 23:01:22.860424 16, 0x0, sum = 3
8187 23:01:22.860932 17, 0x0, sum = 4
8188 23:01:22.863769 best_step = 15
8189 23:01:22.864237
8190 23:01:22.864608 ==
8191 23:01:22.867073 Dram Type= 6, Freq= 0, CH_0, rank 1
8192 23:01:22.870373 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8193 23:01:22.870851 ==
8194 23:01:22.873807 RX Vref Scan: 0
8195 23:01:22.874389
8196 23:01:22.874766 RX Vref 0 -> 0, step: 1
8197 23:01:22.875116
8198 23:01:22.877060 RX Delay 19 -> 252, step: 4
8199 23:01:22.883961 iDelay=191, Bit 0, Center 132 (83 ~ 182) 100
8200 23:01:22.886914 iDelay=191, Bit 1, Center 136 (87 ~ 186) 100
8201 23:01:22.890528 iDelay=191, Bit 2, Center 130 (83 ~ 178) 96
8202 23:01:22.893739 iDelay=191, Bit 3, Center 130 (83 ~ 178) 96
8203 23:01:22.896877 iDelay=191, Bit 4, Center 134 (87 ~ 182) 96
8204 23:01:22.900505 iDelay=191, Bit 5, Center 124 (75 ~ 174) 100
8205 23:01:22.906743 iDelay=191, Bit 6, Center 140 (91 ~ 190) 100
8206 23:01:22.910028 iDelay=191, Bit 7, Center 140 (91 ~ 190) 100
8207 23:01:22.913516 iDelay=191, Bit 8, Center 116 (67 ~ 166) 100
8208 23:01:22.916753 iDelay=191, Bit 9, Center 110 (59 ~ 162) 104
8209 23:01:22.920139 iDelay=191, Bit 10, Center 124 (75 ~ 174) 100
8210 23:01:22.926595 iDelay=191, Bit 11, Center 120 (71 ~ 170) 100
8211 23:01:22.930125 iDelay=191, Bit 12, Center 126 (75 ~ 178) 104
8212 23:01:22.933253 iDelay=191, Bit 13, Center 128 (79 ~ 178) 100
8213 23:01:22.936904 iDelay=191, Bit 14, Center 132 (79 ~ 186) 108
8214 23:01:22.943350 iDelay=191, Bit 15, Center 128 (75 ~ 182) 108
8215 23:01:22.943827 ==
8216 23:01:22.946675 Dram Type= 6, Freq= 0, CH_0, rank 1
8217 23:01:22.950035 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8218 23:01:22.950509 ==
8219 23:01:22.950888 DQS Delay:
8220 23:01:22.953348 DQS0 = 0, DQS1 = 0
8221 23:01:22.953821 DQM Delay:
8222 23:01:22.957047 DQM0 = 133, DQM1 = 123
8223 23:01:22.957620 DQ Delay:
8224 23:01:22.959891 DQ0 =132, DQ1 =136, DQ2 =130, DQ3 =130
8225 23:01:22.963028 DQ4 =134, DQ5 =124, DQ6 =140, DQ7 =140
8226 23:01:22.966589 DQ8 =116, DQ9 =110, DQ10 =124, DQ11 =120
8227 23:01:22.969772 DQ12 =126, DQ13 =128, DQ14 =132, DQ15 =128
8228 23:01:22.970246
8229 23:01:22.970618
8230 23:01:22.970967
8231 23:01:22.973142 [DramC_TX_OE_Calibration] TA2
8232 23:01:22.976473 Original DQ_B0 (3 6) =30, OEN = 27
8233 23:01:22.979878 Original DQ_B1 (3 6) =30, OEN = 27
8234 23:01:22.982937 24, 0x0, End_B0=24 End_B1=24
8235 23:01:22.986550 25, 0x0, End_B0=25 End_B1=25
8236 23:01:22.989581 26, 0x0, End_B0=26 End_B1=26
8237 23:01:22.990062 27, 0x0, End_B0=27 End_B1=27
8238 23:01:22.993199 28, 0x0, End_B0=28 End_B1=28
8239 23:01:22.995885 29, 0x0, End_B0=29 End_B1=29
8240 23:01:22.999287 30, 0x0, End_B0=30 End_B1=30
8241 23:01:23.002563 31, 0x4545, End_B0=30 End_B1=30
8242 23:01:23.003041 Byte0 end_step=30 best_step=27
8243 23:01:23.006086 Byte1 end_step=30 best_step=27
8244 23:01:23.009050 Byte0 TX OE(2T, 0.5T) = (3, 3)
8245 23:01:23.012587 Byte1 TX OE(2T, 0.5T) = (3, 3)
8246 23:01:23.013205
8247 23:01:23.013585
8248 23:01:23.022252 [DQSOSCAuto] RK1, (LSB)MR18= 0x200e, (MSB)MR19= 0x303, tDQSOscB0 = 402 ps tDQSOscB1 = 393 ps
8249 23:01:23.022817 CH0 RK1: MR19=303, MR18=200E
8250 23:01:23.029160 CH0_RK1: MR19=0x303, MR18=0x200E, DQSOSC=393, MR23=63, INC=23, DEC=15
8251 23:01:23.032571 [RxdqsGatingPostProcess] freq 1600
8252 23:01:23.039129 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
8253 23:01:23.042299 best DQS0 dly(2T, 0.5T) = (1, 1)
8254 23:01:23.045695 best DQS1 dly(2T, 0.5T) = (1, 1)
8255 23:01:23.046270 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8256 23:01:23.048833 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8257 23:01:23.052405 best DQS0 dly(2T, 0.5T) = (1, 1)
8258 23:01:23.055777 best DQS1 dly(2T, 0.5T) = (1, 1)
8259 23:01:23.059161 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8260 23:01:23.062166 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8261 23:01:23.065582 Pre-setting of DQS Precalculation
8262 23:01:23.072209 [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15
8263 23:01:23.072800 ==
8264 23:01:23.075829 Dram Type= 6, Freq= 0, CH_1, rank 0
8265 23:01:23.079088 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8266 23:01:23.079665 ==
8267 23:01:23.085715 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
8268 23:01:23.088517 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
8269 23:01:23.092027 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
8270 23:01:23.098352 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
8271 23:01:23.107128 [CA 0] Center 40 (11~70) winsize 60
8272 23:01:23.110220 [CA 1] Center 41 (11~71) winsize 61
8273 23:01:23.113711 [CA 2] Center 37 (8~67) winsize 60
8274 23:01:23.116650 [CA 3] Center 36 (7~66) winsize 60
8275 23:01:23.120064 [CA 4] Center 36 (7~66) winsize 60
8276 23:01:23.123612 [CA 5] Center 36 (6~66) winsize 61
8277 23:01:23.124082
8278 23:01:23.126604 [CmdBusTrainingLP45] Vref(ca) range 0: 30
8279 23:01:23.127083
8280 23:01:23.130231 [CATrainingPosCal] consider 1 rank data
8281 23:01:23.133416 u2DelayCellTimex100 = 285/100 ps
8282 23:01:23.136945 CA0 delay=40 (11~70),Diff = 4 PI (13 cell)
8283 23:01:23.143432 CA1 delay=41 (11~71),Diff = 5 PI (17 cell)
8284 23:01:23.146471 CA2 delay=37 (8~67),Diff = 1 PI (3 cell)
8285 23:01:23.150170 CA3 delay=36 (7~66),Diff = 0 PI (0 cell)
8286 23:01:23.153702 CA4 delay=36 (7~66),Diff = 0 PI (0 cell)
8287 23:01:23.157005 CA5 delay=36 (6~66),Diff = 0 PI (0 cell)
8288 23:01:23.157575
8289 23:01:23.160180 CA PerBit enable=1, Macro0, CA PI delay=36
8290 23:01:23.160753
8291 23:01:23.163441 [CBTSetCACLKResult] CA Dly = 36
8292 23:01:23.166473 CS Dly: 8 (0~39)
8293 23:01:23.169765 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8294 23:01:23.173027 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8295 23:01:23.173490 ==
8296 23:01:23.176330 Dram Type= 6, Freq= 0, CH_1, rank 1
8297 23:01:23.179711 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8298 23:01:23.183047 ==
8299 23:01:23.186372 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
8300 23:01:23.189673 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
8301 23:01:23.196371 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
8302 23:01:23.202832 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
8303 23:01:23.210180 [CA 0] Center 41 (12~71) winsize 60
8304 23:01:23.213165 [CA 1] Center 41 (12~71) winsize 60
8305 23:01:23.216522 [CA 2] Center 38 (9~67) winsize 59
8306 23:01:23.219776 [CA 3] Center 37 (8~67) winsize 60
8307 23:01:23.223491 [CA 4] Center 37 (8~67) winsize 60
8308 23:01:23.226660 [CA 5] Center 37 (7~67) winsize 61
8309 23:01:23.227149
8310 23:01:23.229798 [CmdBusTrainingLP45] Vref(ca) range 0: 30
8311 23:01:23.230262
8312 23:01:23.236403 [CATrainingPosCal] consider 2 rank data
8313 23:01:23.236899 u2DelayCellTimex100 = 285/100 ps
8314 23:01:23.242944 CA0 delay=41 (12~70),Diff = 5 PI (17 cell)
8315 23:01:23.246259 CA1 delay=41 (12~71),Diff = 5 PI (17 cell)
8316 23:01:23.249656 CA2 delay=38 (9~67),Diff = 2 PI (6 cell)
8317 23:01:23.253211 CA3 delay=37 (8~66),Diff = 1 PI (3 cell)
8318 23:01:23.256426 CA4 delay=37 (8~66),Diff = 1 PI (3 cell)
8319 23:01:23.259902 CA5 delay=36 (7~66),Diff = 0 PI (0 cell)
8320 23:01:23.260460
8321 23:01:23.262988 CA PerBit enable=1, Macro0, CA PI delay=36
8322 23:01:23.263449
8323 23:01:23.266301 [CBTSetCACLKResult] CA Dly = 36
8324 23:01:23.269224 CS Dly: 9 (0~42)
8325 23:01:23.272704 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8326 23:01:23.276278 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8327 23:01:23.276882
8328 23:01:23.279601 ----->DramcWriteLeveling(PI) begin...
8329 23:01:23.280164 ==
8330 23:01:23.282979 Dram Type= 6, Freq= 0, CH_1, rank 0
8331 23:01:23.289510 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8332 23:01:23.290082 ==
8333 23:01:23.292986 Write leveling (Byte 0): 23 => 23
8334 23:01:23.296270 Write leveling (Byte 1): 27 => 27
8335 23:01:23.296867 DramcWriteLeveling(PI) end<-----
8336 23:01:23.297246
8337 23:01:23.299558 ==
8338 23:01:23.302534 Dram Type= 6, Freq= 0, CH_1, rank 0
8339 23:01:23.305597 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8340 23:01:23.306158 ==
8341 23:01:23.309378 [Gating] SW mode calibration
8342 23:01:23.316073 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8343 23:01:23.319009 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
8344 23:01:23.325742 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8345 23:01:23.328707 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8346 23:01:23.332145 1 4 8 | B1->B0 | 2525 2a2a | 1 1 | (1 1) (1 1)
8347 23:01:23.338817 1 4 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8348 23:01:23.342160 1 4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8349 23:01:23.345669 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8350 23:01:23.351919 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8351 23:01:23.355394 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8352 23:01:23.358948 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8353 23:01:23.365328 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
8354 23:01:23.368931 1 5 8 | B1->B0 | 2d2d 2828 | 0 1 | (0 0) (1 0)
8355 23:01:23.372004 1 5 12 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
8356 23:01:23.379045 1 5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8357 23:01:23.382409 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8358 23:01:23.385731 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8359 23:01:23.391718 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8360 23:01:23.395382 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8361 23:01:23.398591 1 6 4 | B1->B0 | 2323 2525 | 0 0 | (0 0) (0 0)
8362 23:01:23.405315 1 6 8 | B1->B0 | 3c3c 4545 | 0 0 | (0 0) (0 0)
8363 23:01:23.408381 1 6 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8364 23:01:23.411381 1 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8365 23:01:23.418224 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8366 23:01:23.421975 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8367 23:01:23.424868 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8368 23:01:23.431413 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8369 23:01:23.434630 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8370 23:01:23.437919 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
8371 23:01:23.444574 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
8372 23:01:23.447944 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8373 23:01:23.451012 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8374 23:01:23.457941 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8375 23:01:23.460995 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8376 23:01:23.464126 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8377 23:01:23.470737 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8378 23:01:23.474264 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8379 23:01:23.477326 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8380 23:01:23.484339 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8381 23:01:23.487518 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8382 23:01:23.490484 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8383 23:01:23.497068 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8384 23:01:23.500467 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8385 23:01:23.504192 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
8386 23:01:23.510551 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8387 23:01:23.514014 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8388 23:01:23.517091 Total UI for P1: 0, mck2ui 16
8389 23:01:23.520623 best dqsien dly found for B0: ( 1, 9, 6)
8390 23:01:23.523686 Total UI for P1: 0, mck2ui 16
8391 23:01:23.527167 best dqsien dly found for B1: ( 1, 9, 8)
8392 23:01:23.530024 best DQS0 dly(MCK, UI, PI) = (1, 9, 6)
8393 23:01:23.533593 best DQS1 dly(MCK, UI, PI) = (1, 9, 8)
8394 23:01:23.534071
8395 23:01:23.536872 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 6)
8396 23:01:23.540510 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 8)
8397 23:01:23.543899 [Gating] SW calibration Done
8398 23:01:23.544560 ==
8399 23:01:23.546697 Dram Type= 6, Freq= 0, CH_1, rank 0
8400 23:01:23.549889 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8401 23:01:23.553387 ==
8402 23:01:23.553857 RX Vref Scan: 0
8403 23:01:23.554229
8404 23:01:23.556922 RX Vref 0 -> 0, step: 1
8405 23:01:23.557396
8406 23:01:23.557861 RX Delay 0 -> 252, step: 8
8407 23:01:23.563414 iDelay=200, Bit 0, Center 143 (96 ~ 191) 96
8408 23:01:23.566832 iDelay=200, Bit 1, Center 135 (88 ~ 183) 96
8409 23:01:23.570234 iDelay=200, Bit 2, Center 127 (80 ~ 175) 96
8410 23:01:23.573094 iDelay=200, Bit 3, Center 139 (88 ~ 191) 104
8411 23:01:23.576869 iDelay=200, Bit 4, Center 135 (80 ~ 191) 112
8412 23:01:23.583247 iDelay=200, Bit 5, Center 147 (96 ~ 199) 104
8413 23:01:23.586560 iDelay=200, Bit 6, Center 147 (96 ~ 199) 104
8414 23:01:23.589824 iDelay=200, Bit 7, Center 135 (88 ~ 183) 96
8415 23:01:23.592814 iDelay=200, Bit 8, Center 119 (64 ~ 175) 112
8416 23:01:23.596170 iDelay=200, Bit 9, Center 119 (72 ~ 167) 96
8417 23:01:23.603094 iDelay=200, Bit 10, Center 131 (80 ~ 183) 104
8418 23:01:23.606018 iDelay=200, Bit 11, Center 127 (80 ~ 175) 96
8419 23:01:23.609391 iDelay=200, Bit 12, Center 139 (88 ~ 191) 104
8420 23:01:23.613083 iDelay=200, Bit 13, Center 135 (80 ~ 191) 112
8421 23:01:23.619706 iDelay=200, Bit 14, Center 139 (88 ~ 191) 104
8422 23:01:23.622704 iDelay=200, Bit 15, Center 139 (88 ~ 191) 104
8423 23:01:23.623179 ==
8424 23:01:23.625843 Dram Type= 6, Freq= 0, CH_1, rank 0
8425 23:01:23.629411 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8426 23:01:23.629997 ==
8427 23:01:23.632403 DQS Delay:
8428 23:01:23.632891 DQS0 = 0, DQS1 = 0
8429 23:01:23.633266 DQM Delay:
8430 23:01:23.636199 DQM0 = 138, DQM1 = 131
8431 23:01:23.636825 DQ Delay:
8432 23:01:23.639290 DQ0 =143, DQ1 =135, DQ2 =127, DQ3 =139
8433 23:01:23.642515 DQ4 =135, DQ5 =147, DQ6 =147, DQ7 =135
8434 23:01:23.645943 DQ8 =119, DQ9 =119, DQ10 =131, DQ11 =127
8435 23:01:23.652425 DQ12 =139, DQ13 =135, DQ14 =139, DQ15 =139
8436 23:01:23.652933
8437 23:01:23.653308
8438 23:01:23.653654 ==
8439 23:01:23.655369 Dram Type= 6, Freq= 0, CH_1, rank 0
8440 23:01:23.658404 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8441 23:01:23.658877 ==
8442 23:01:23.659252
8443 23:01:23.659543
8444 23:01:23.661710 TX Vref Scan disable
8445 23:01:23.661793 == TX Byte 0 ==
8446 23:01:23.667938 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
8447 23:01:23.671299 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
8448 23:01:23.674636 == TX Byte 1 ==
8449 23:01:23.678050 Update DQ dly =981 (3 ,6, 21) DQ OEN =(3 ,3)
8450 23:01:23.681397 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8451 23:01:23.681480 ==
8452 23:01:23.684703 Dram Type= 6, Freq= 0, CH_1, rank 0
8453 23:01:23.687709 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8454 23:01:23.691071 ==
8455 23:01:23.701912
8456 23:01:23.705256 TX Vref early break, caculate TX vref
8457 23:01:23.708711 TX Vref=16, minBit 10, minWin=22, winSum=374
8458 23:01:23.711982 TX Vref=18, minBit 10, minWin=22, winSum=382
8459 23:01:23.715292 TX Vref=20, minBit 15, minWin=23, winSum=391
8460 23:01:23.718342 TX Vref=22, minBit 9, minWin=24, winSum=400
8461 23:01:23.725162 TX Vref=24, minBit 1, minWin=25, winSum=411
8462 23:01:23.728285 TX Vref=26, minBit 1, minWin=25, winSum=417
8463 23:01:23.731777 TX Vref=28, minBit 15, minWin=25, winSum=424
8464 23:01:23.735027 TX Vref=30, minBit 8, minWin=25, winSum=419
8465 23:01:23.738051 TX Vref=32, minBit 9, minWin=24, winSum=412
8466 23:01:23.741623 TX Vref=34, minBit 8, minWin=24, winSum=399
8467 23:01:23.748530 [TxChooseVref] Worse bit 15, Min win 25, Win sum 424, Final Vref 28
8468 23:01:23.748614
8469 23:01:23.751483 Final TX Range 0 Vref 28
8470 23:01:23.751566
8471 23:01:23.751632 ==
8472 23:01:23.754653 Dram Type= 6, Freq= 0, CH_1, rank 0
8473 23:01:23.758106 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8474 23:01:23.758190 ==
8475 23:01:23.758256
8476 23:01:23.761153
8477 23:01:23.761235 TX Vref Scan disable
8478 23:01:23.768149 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =285/100 ps
8479 23:01:23.768232 == TX Byte 0 ==
8480 23:01:23.771425 u2DelayCellOfst[0]=17 cells (5 PI)
8481 23:01:23.774713 u2DelayCellOfst[1]=10 cells (3 PI)
8482 23:01:23.778079 u2DelayCellOfst[2]=0 cells (0 PI)
8483 23:01:23.781002 u2DelayCellOfst[3]=3 cells (1 PI)
8484 23:01:23.784330 u2DelayCellOfst[4]=6 cells (2 PI)
8485 23:01:23.787896 u2DelayCellOfst[5]=17 cells (5 PI)
8486 23:01:23.790899 u2DelayCellOfst[6]=17 cells (5 PI)
8487 23:01:23.794292 u2DelayCellOfst[7]=6 cells (2 PI)
8488 23:01:23.797856 Update DQ dly =977 (3 ,6, 17) DQ OEN =(3 ,3)
8489 23:01:23.801330 Update DQM dly =979 (3 ,6, 19) DQM OEN =(3 ,3)
8490 23:01:23.804674 == TX Byte 1 ==
8491 23:01:23.807879 u2DelayCellOfst[8]=0 cells (0 PI)
8492 23:01:23.811292 u2DelayCellOfst[9]=3 cells (1 PI)
8493 23:01:23.814644 u2DelayCellOfst[10]=10 cells (3 PI)
8494 23:01:23.815070 u2DelayCellOfst[11]=3 cells (1 PI)
8495 23:01:23.818023 u2DelayCellOfst[12]=13 cells (4 PI)
8496 23:01:23.821456 u2DelayCellOfst[13]=17 cells (5 PI)
8497 23:01:23.824313 u2DelayCellOfst[14]=20 cells (6 PI)
8498 23:01:23.827684 u2DelayCellOfst[15]=17 cells (5 PI)
8499 23:01:23.834336 Update DQ dly =978 (3 ,6, 18) DQ OEN =(3 ,3)
8500 23:01:23.837474 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8501 23:01:23.837904 DramC Write-DBI on
8502 23:01:23.840877 ==
8503 23:01:23.841297 Dram Type= 6, Freq= 0, CH_1, rank 0
8504 23:01:23.847509 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8505 23:01:23.847937 ==
8506 23:01:23.848275
8507 23:01:23.848610
8508 23:01:23.851296 TX Vref Scan disable
8509 23:01:23.851718 == TX Byte 0 ==
8510 23:01:23.857262 Update DQM dly =720 (2 ,6, 16) DQM OEN =(3 ,3)
8511 23:01:23.857693 == TX Byte 1 ==
8512 23:01:23.860800 Update DQM dly =722 (2 ,6, 18) DQM OEN =(3 ,3)
8513 23:01:23.864127 DramC Write-DBI off
8514 23:01:23.864553
8515 23:01:23.864934 [DATLAT]
8516 23:01:23.867560 Freq=1600, CH1 RK0
8517 23:01:23.867988
8518 23:01:23.868326 DATLAT Default: 0xf
8519 23:01:23.870821 0, 0xFFFF, sum = 0
8520 23:01:23.871257 1, 0xFFFF, sum = 0
8521 23:01:23.873820 2, 0xFFFF, sum = 0
8522 23:01:23.874255 3, 0xFFFF, sum = 0
8523 23:01:23.877379 4, 0xFFFF, sum = 0
8524 23:01:23.877811 5, 0xFFFF, sum = 0
8525 23:01:23.880924 6, 0xFFFF, sum = 0
8526 23:01:23.881489 7, 0xFFFF, sum = 0
8527 23:01:23.883989 8, 0xFFFF, sum = 0
8528 23:01:23.887215 9, 0xFFFF, sum = 0
8529 23:01:23.887650 10, 0xFFFF, sum = 0
8530 23:01:23.890656 11, 0xFFFF, sum = 0
8531 23:01:23.891094 12, 0xFFFF, sum = 0
8532 23:01:23.893565 13, 0xFFFF, sum = 0
8533 23:01:23.893996 14, 0x0, sum = 1
8534 23:01:23.896912 15, 0x0, sum = 2
8535 23:01:23.897348 16, 0x0, sum = 3
8536 23:01:23.900417 17, 0x0, sum = 4
8537 23:01:23.900984 best_step = 15
8538 23:01:23.901330
8539 23:01:23.901647 ==
8540 23:01:23.903848 Dram Type= 6, Freq= 0, CH_1, rank 0
8541 23:01:23.907070 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8542 23:01:23.907501 ==
8543 23:01:23.910354 RX Vref Scan: 1
8544 23:01:23.910780
8545 23:01:23.913728 Set Vref Range= 24 -> 127
8546 23:01:23.914156
8547 23:01:23.914497 RX Vref 24 -> 127, step: 1
8548 23:01:23.917075
8549 23:01:23.917498 RX Delay 19 -> 252, step: 4
8550 23:01:23.917836
8551 23:01:23.920402 Set Vref, RX VrefLevel [Byte0]: 24
8552 23:01:23.923378 [Byte1]: 24
8553 23:01:23.927501
8554 23:01:23.928041 Set Vref, RX VrefLevel [Byte0]: 25
8555 23:01:23.930866 [Byte1]: 25
8556 23:01:23.934668
8557 23:01:23.935205 Set Vref, RX VrefLevel [Byte0]: 26
8558 23:01:23.937829 [Byte1]: 26
8559 23:01:23.942417
8560 23:01:23.942844 Set Vref, RX VrefLevel [Byte0]: 27
8561 23:01:23.945443 [Byte1]: 27
8562 23:01:23.949941
8563 23:01:23.950380 Set Vref, RX VrefLevel [Byte0]: 28
8564 23:01:23.953183 [Byte1]: 28
8565 23:01:23.957364
8566 23:01:23.957789 Set Vref, RX VrefLevel [Byte0]: 29
8567 23:01:23.960945 [Byte1]: 29
8568 23:01:23.964827
8569 23:01:23.965387 Set Vref, RX VrefLevel [Byte0]: 30
8570 23:01:23.968384 [Byte1]: 30
8571 23:01:23.972538
8572 23:01:23.973265 Set Vref, RX VrefLevel [Byte0]: 31
8573 23:01:23.975856 [Byte1]: 31
8574 23:01:23.980334
8575 23:01:23.980761 Set Vref, RX VrefLevel [Byte0]: 32
8576 23:01:23.983494 [Byte1]: 32
8577 23:01:23.988205
8578 23:01:23.988742 Set Vref, RX VrefLevel [Byte0]: 33
8579 23:01:23.991340 [Byte1]: 33
8580 23:01:23.995270
8581 23:01:23.995848 Set Vref, RX VrefLevel [Byte0]: 34
8582 23:01:23.998661 [Byte1]: 34
8583 23:01:24.003099
8584 23:01:24.003635 Set Vref, RX VrefLevel [Byte0]: 35
8585 23:01:24.006165 [Byte1]: 35
8586 23:01:24.010400
8587 23:01:24.010823 Set Vref, RX VrefLevel [Byte0]: 36
8588 23:01:24.013818 [Byte1]: 36
8589 23:01:24.018205
8590 23:01:24.018791 Set Vref, RX VrefLevel [Byte0]: 37
8591 23:01:24.021681 [Byte1]: 37
8592 23:01:24.025430
8593 23:01:24.025902 Set Vref, RX VrefLevel [Byte0]: 38
8594 23:01:24.028789 [Byte1]: 38
8595 23:01:24.033320
8596 23:01:24.033787 Set Vref, RX VrefLevel [Byte0]: 39
8597 23:01:24.036465 [Byte1]: 39
8598 23:01:24.041150
8599 23:01:24.041725 Set Vref, RX VrefLevel [Byte0]: 40
8600 23:01:24.044267 [Byte1]: 40
8601 23:01:24.048280
8602 23:01:24.048753 Set Vref, RX VrefLevel [Byte0]: 41
8603 23:01:24.051495 [Byte1]: 41
8604 23:01:24.056175
8605 23:01:24.056757 Set Vref, RX VrefLevel [Byte0]: 42
8606 23:01:24.059398 [Byte1]: 42
8607 23:01:24.063646
8608 23:01:24.064260 Set Vref, RX VrefLevel [Byte0]: 43
8609 23:01:24.066687 [Byte1]: 43
8610 23:01:24.071180
8611 23:01:24.071709 Set Vref, RX VrefLevel [Byte0]: 44
8612 23:01:24.074260 [Byte1]: 44
8613 23:01:24.078511
8614 23:01:24.079002 Set Vref, RX VrefLevel [Byte0]: 45
8615 23:01:24.082100 [Byte1]: 45
8616 23:01:24.086401
8617 23:01:24.086876 Set Vref, RX VrefLevel [Byte0]: 46
8618 23:01:24.089430 [Byte1]: 46
8619 23:01:24.093645
8620 23:01:24.094169 Set Vref, RX VrefLevel [Byte0]: 47
8621 23:01:24.096972 [Byte1]: 47
8622 23:01:24.101277
8623 23:01:24.101750 Set Vref, RX VrefLevel [Byte0]: 48
8624 23:01:24.104584 [Byte1]: 48
8625 23:01:24.108910
8626 23:01:24.109426 Set Vref, RX VrefLevel [Byte0]: 49
8627 23:01:24.112372 [Byte1]: 49
8628 23:01:24.116552
8629 23:01:24.117080 Set Vref, RX VrefLevel [Byte0]: 50
8630 23:01:24.119845 [Byte1]: 50
8631 23:01:24.124268
8632 23:01:24.124888 Set Vref, RX VrefLevel [Byte0]: 51
8633 23:01:24.127639 [Byte1]: 51
8634 23:01:24.132032
8635 23:01:24.132605 Set Vref, RX VrefLevel [Byte0]: 52
8636 23:01:24.135334 [Byte1]: 52
8637 23:01:24.139637
8638 23:01:24.140208 Set Vref, RX VrefLevel [Byte0]: 53
8639 23:01:24.142474 [Byte1]: 53
8640 23:01:24.146825
8641 23:01:24.147399 Set Vref, RX VrefLevel [Byte0]: 54
8642 23:01:24.149979 [Byte1]: 54
8643 23:01:24.154295
8644 23:01:24.157565 Set Vref, RX VrefLevel [Byte0]: 55
8645 23:01:24.160969 [Byte1]: 55
8646 23:01:24.161444
8647 23:01:24.164163 Set Vref, RX VrefLevel [Byte0]: 56
8648 23:01:24.167509 [Byte1]: 56
8649 23:01:24.167985
8650 23:01:24.170511 Set Vref, RX VrefLevel [Byte0]: 57
8651 23:01:24.173871 [Byte1]: 57
8652 23:01:24.174460
8653 23:01:24.177082 Set Vref, RX VrefLevel [Byte0]: 58
8654 23:01:24.180739 [Byte1]: 58
8655 23:01:24.184837
8656 23:01:24.185417 Set Vref, RX VrefLevel [Byte0]: 59
8657 23:01:24.187690 [Byte1]: 59
8658 23:01:24.192113
8659 23:01:24.192581 Set Vref, RX VrefLevel [Byte0]: 60
8660 23:01:24.195601 [Byte1]: 60
8661 23:01:24.199956
8662 23:01:24.200529 Set Vref, RX VrefLevel [Byte0]: 61
8663 23:01:24.203456 [Byte1]: 61
8664 23:01:24.207546
8665 23:01:24.208017 Set Vref, RX VrefLevel [Byte0]: 62
8666 23:01:24.210468 [Byte1]: 62
8667 23:01:24.214911
8668 23:01:24.215480 Set Vref, RX VrefLevel [Byte0]: 63
8669 23:01:24.218340 [Byte1]: 63
8670 23:01:24.222927
8671 23:01:24.223498 Set Vref, RX VrefLevel [Byte0]: 64
8672 23:01:24.225578 [Byte1]: 64
8673 23:01:24.230419
8674 23:01:24.231008 Set Vref, RX VrefLevel [Byte0]: 65
8675 23:01:24.233788 [Byte1]: 65
8676 23:01:24.237661
8677 23:01:24.238228 Set Vref, RX VrefLevel [Byte0]: 66
8678 23:01:24.240686 [Byte1]: 66
8679 23:01:24.245016
8680 23:01:24.245490 Set Vref, RX VrefLevel [Byte0]: 67
8681 23:01:24.248294 [Byte1]: 67
8682 23:01:24.252724
8683 23:01:24.253240 Set Vref, RX VrefLevel [Byte0]: 68
8684 23:01:24.256090 [Byte1]: 68
8685 23:01:24.260437
8686 23:01:24.261032 Set Vref, RX VrefLevel [Byte0]: 69
8687 23:01:24.263586 [Byte1]: 69
8688 23:01:24.267896
8689 23:01:24.268322 Set Vref, RX VrefLevel [Byte0]: 70
8690 23:01:24.271544 [Byte1]: 70
8691 23:01:24.275161
8692 23:01:24.275602 Set Vref, RX VrefLevel [Byte0]: 71
8693 23:01:24.279042 [Byte1]: 71
8694 23:01:24.282934
8695 23:01:24.283403 Set Vref, RX VrefLevel [Byte0]: 72
8696 23:01:24.286652 [Byte1]: 72
8697 23:01:24.290549
8698 23:01:24.290975 Set Vref, RX VrefLevel [Byte0]: 73
8699 23:01:24.293770 [Byte1]: 73
8700 23:01:24.298492
8701 23:01:24.298937 Final RX Vref Byte 0 = 53 to rank0
8702 23:01:24.301424 Final RX Vref Byte 1 = 62 to rank0
8703 23:01:24.304749 Final RX Vref Byte 0 = 53 to rank1
8704 23:01:24.308023 Final RX Vref Byte 1 = 62 to rank1==
8705 23:01:24.311683 Dram Type= 6, Freq= 0, CH_1, rank 0
8706 23:01:24.318307 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8707 23:01:24.318882 ==
8708 23:01:24.319261 DQS Delay:
8709 23:01:24.321639 DQS0 = 0, DQS1 = 0
8710 23:01:24.322211 DQM Delay:
8711 23:01:24.322590 DQM0 = 133, DQM1 = 129
8712 23:01:24.324864 DQ Delay:
8713 23:01:24.327612 DQ0 =136, DQ1 =130, DQ2 =122, DQ3 =132
8714 23:01:24.330596 DQ4 =132, DQ5 =144, DQ6 =144, DQ7 =130
8715 23:01:24.333944 DQ8 =116, DQ9 =120, DQ10 =134, DQ11 =122
8716 23:01:24.337245 DQ12 =140, DQ13 =134, DQ14 =136, DQ15 =136
8717 23:01:24.337328
8718 23:01:24.337394
8719 23:01:24.337453
8720 23:01:24.340715 [DramC_TX_OE_Calibration] TA2
8721 23:01:24.344478 Original DQ_B0 (3 6) =30, OEN = 27
8722 23:01:24.348010 Original DQ_B1 (3 6) =30, OEN = 27
8723 23:01:24.350834 24, 0x0, End_B0=24 End_B1=24
8724 23:01:24.351326 25, 0x0, End_B0=25 End_B1=25
8725 23:01:24.354454 26, 0x0, End_B0=26 End_B1=26
8726 23:01:24.357686 27, 0x0, End_B0=27 End_B1=27
8727 23:01:24.361152 28, 0x0, End_B0=28 End_B1=28
8728 23:01:24.364664 29, 0x0, End_B0=29 End_B1=29
8729 23:01:24.365307 30, 0x0, End_B0=30 End_B1=30
8730 23:01:24.367847 31, 0x4141, End_B0=30 End_B1=30
8731 23:01:24.371213 Byte0 end_step=30 best_step=27
8732 23:01:24.374358 Byte1 end_step=30 best_step=27
8733 23:01:24.377398 Byte0 TX OE(2T, 0.5T) = (3, 3)
8734 23:01:24.380580 Byte1 TX OE(2T, 0.5T) = (3, 3)
8735 23:01:24.381200
8736 23:01:24.381586
8737 23:01:24.387400 [DQSOSCAuto] RK0, (LSB)MR18= 0x1624, (MSB)MR19= 0x303, tDQSOscB0 = 391 ps tDQSOscB1 = 398 ps
8738 23:01:24.390633 CH1 RK0: MR19=303, MR18=1624
8739 23:01:24.397559 CH1_RK0: MR19=0x303, MR18=0x1624, DQSOSC=391, MR23=63, INC=24, DEC=16
8740 23:01:24.398133
8741 23:01:24.400488 ----->DramcWriteLeveling(PI) begin...
8742 23:01:24.401014 ==
8743 23:01:24.403983 Dram Type= 6, Freq= 0, CH_1, rank 1
8744 23:01:24.407148 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8745 23:01:24.407623 ==
8746 23:01:24.410937 Write leveling (Byte 0): 24 => 24
8747 23:01:24.413971 Write leveling (Byte 1): 28 => 28
8748 23:01:24.417342 DramcWriteLeveling(PI) end<-----
8749 23:01:24.417818
8750 23:01:24.418190 ==
8751 23:01:24.420610 Dram Type= 6, Freq= 0, CH_1, rank 1
8752 23:01:24.423609 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8753 23:01:24.427336 ==
8754 23:01:24.427908 [Gating] SW mode calibration
8755 23:01:24.433795 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8756 23:01:24.440616 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
8757 23:01:24.443991 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8758 23:01:24.449939 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8759 23:01:24.453473 1 4 8 | B1->B0 | 3030 2323 | 1 0 | (1 1) (0 0)
8760 23:01:24.456842 1 4 12 | B1->B0 | 3434 2e2e | 1 0 | (1 1) (0 0)
8761 23:01:24.463436 1 4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8762 23:01:24.466814 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8763 23:01:24.470086 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8764 23:01:24.476661 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8765 23:01:24.479786 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8766 23:01:24.483339 1 5 4 | B1->B0 | 3232 3434 | 0 1 | (0 0) (1 1)
8767 23:01:24.490029 1 5 8 | B1->B0 | 2424 3434 | 0 1 | (0 0) (1 0)
8768 23:01:24.493213 1 5 12 | B1->B0 | 2323 3030 | 0 1 | (0 0) (1 0)
8769 23:01:24.496278 1 5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8770 23:01:24.503307 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8771 23:01:24.506330 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8772 23:01:24.509918 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8773 23:01:24.516402 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8774 23:01:24.519792 1 6 4 | B1->B0 | 2525 2323 | 0 0 | (0 0) (0 0)
8775 23:01:24.523413 1 6 8 | B1->B0 | 4242 2525 | 0 0 | (0 0) (0 0)
8776 23:01:24.529909 1 6 12 | B1->B0 | 4646 3e3e | 0 0 | (0 0) (0 0)
8777 23:01:24.533306 1 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8778 23:01:24.536040 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8779 23:01:24.542885 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8780 23:01:24.546315 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8781 23:01:24.549635 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8782 23:01:24.556088 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8783 23:01:24.559709 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
8784 23:01:24.563004 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
8785 23:01:24.569629 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8786 23:01:24.572554 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8787 23:01:24.575814 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8788 23:01:24.582352 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8789 23:01:24.585835 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8790 23:01:24.588854 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8791 23:01:24.595550 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8792 23:01:24.598972 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8793 23:01:24.602378 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8794 23:01:24.608958 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8795 23:01:24.612527 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8796 23:01:24.615722 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8797 23:01:24.622345 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8798 23:01:24.625283 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8799 23:01:24.628409 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8800 23:01:24.635387 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8801 23:01:24.635969 Total UI for P1: 0, mck2ui 16
8802 23:01:24.638647 best dqsien dly found for B0: ( 1, 9, 6)
8803 23:01:24.642039 Total UI for P1: 0, mck2ui 16
8804 23:01:24.645097 best dqsien dly found for B1: ( 1, 9, 6)
8805 23:01:24.648270 best DQS0 dly(MCK, UI, PI) = (1, 9, 6)
8806 23:01:24.655094 best DQS1 dly(MCK, UI, PI) = (1, 9, 6)
8807 23:01:24.655564
8808 23:01:24.657933 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 6)
8809 23:01:24.661280 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 6)
8810 23:01:24.664633 [Gating] SW calibration Done
8811 23:01:24.665139 ==
8812 23:01:24.668013 Dram Type= 6, Freq= 0, CH_1, rank 1
8813 23:01:24.671250 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8814 23:01:24.671750 ==
8815 23:01:24.674591 RX Vref Scan: 0
8816 23:01:24.675176
8817 23:01:24.675676 RX Vref 0 -> 0, step: 1
8818 23:01:24.676177
8819 23:01:24.677910 RX Delay 0 -> 252, step: 8
8820 23:01:24.681261 iDelay=200, Bit 0, Center 139 (96 ~ 183) 88
8821 23:01:24.684591 iDelay=200, Bit 1, Center 131 (80 ~ 183) 104
8822 23:01:24.691197 iDelay=200, Bit 2, Center 123 (72 ~ 175) 104
8823 23:01:24.694221 iDelay=200, Bit 3, Center 135 (80 ~ 191) 112
8824 23:01:24.697861 iDelay=200, Bit 4, Center 139 (88 ~ 191) 104
8825 23:01:24.701252 iDelay=200, Bit 5, Center 147 (96 ~ 199) 104
8826 23:01:24.704197 iDelay=200, Bit 6, Center 143 (96 ~ 191) 96
8827 23:01:24.710834 iDelay=200, Bit 7, Center 139 (88 ~ 191) 104
8828 23:01:24.714477 iDelay=200, Bit 8, Center 115 (64 ~ 167) 104
8829 23:01:24.717816 iDelay=200, Bit 9, Center 119 (64 ~ 175) 112
8830 23:01:24.720844 iDelay=200, Bit 10, Center 135 (80 ~ 191) 112
8831 23:01:24.724420 iDelay=200, Bit 11, Center 127 (72 ~ 183) 112
8832 23:01:24.730938 iDelay=200, Bit 12, Center 143 (88 ~ 199) 112
8833 23:01:24.734132 iDelay=200, Bit 13, Center 143 (88 ~ 199) 112
8834 23:01:24.737557 iDelay=200, Bit 14, Center 139 (88 ~ 191) 104
8835 23:01:24.740868 iDelay=200, Bit 15, Center 143 (88 ~ 199) 112
8836 23:01:24.741373 ==
8837 23:01:24.744268 Dram Type= 6, Freq= 0, CH_1, rank 1
8838 23:01:24.751055 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8839 23:01:24.751492 ==
8840 23:01:24.751836 DQS Delay:
8841 23:01:24.754011 DQS0 = 0, DQS1 = 0
8842 23:01:24.754443 DQM Delay:
8843 23:01:24.754785 DQM0 = 137, DQM1 = 133
8844 23:01:24.757382 DQ Delay:
8845 23:01:24.760643 DQ0 =139, DQ1 =131, DQ2 =123, DQ3 =135
8846 23:01:24.764061 DQ4 =139, DQ5 =147, DQ6 =143, DQ7 =139
8847 23:01:24.767519 DQ8 =115, DQ9 =119, DQ10 =135, DQ11 =127
8848 23:01:24.770732 DQ12 =143, DQ13 =143, DQ14 =139, DQ15 =143
8849 23:01:24.771161
8850 23:01:24.771499
8851 23:01:24.771815 ==
8852 23:01:24.774190 Dram Type= 6, Freq= 0, CH_1, rank 1
8853 23:01:24.780441 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8854 23:01:24.781057 ==
8855 23:01:24.781473
8856 23:01:24.781874
8857 23:01:24.782223 TX Vref Scan disable
8858 23:01:24.783669 == TX Byte 0 ==
8859 23:01:24.787190 Update DQ dly =981 (3 ,6, 21) DQ OEN =(3 ,3)
8860 23:01:24.793822 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8861 23:01:24.794290 == TX Byte 1 ==
8862 23:01:24.796997 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
8863 23:01:24.803598 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8864 23:01:24.804045 ==
8865 23:01:24.806749 Dram Type= 6, Freq= 0, CH_1, rank 1
8866 23:01:24.810454 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8867 23:01:24.810890 ==
8868 23:01:24.822868
8869 23:01:24.825820 TX Vref early break, caculate TX vref
8870 23:01:24.829306 TX Vref=16, minBit 9, minWin=21, winSum=377
8871 23:01:24.832473 TX Vref=18, minBit 12, minWin=22, winSum=389
8872 23:01:24.836121 TX Vref=20, minBit 9, minWin=23, winSum=396
8873 23:01:24.839107 TX Vref=22, minBit 9, minWin=23, winSum=408
8874 23:01:24.842431 TX Vref=24, minBit 10, minWin=24, winSum=414
8875 23:01:24.849218 TX Vref=26, minBit 9, minWin=25, winSum=420
8876 23:01:24.852521 TX Vref=28, minBit 9, minWin=25, winSum=423
8877 23:01:24.855902 TX Vref=30, minBit 10, minWin=24, winSum=418
8878 23:01:24.859248 TX Vref=32, minBit 10, minWin=24, winSum=410
8879 23:01:24.862118 TX Vref=34, minBit 9, minWin=23, winSum=399
8880 23:01:24.868900 [TxChooseVref] Worse bit 9, Min win 25, Win sum 423, Final Vref 28
8881 23:01:24.869360
8882 23:01:24.872288 Final TX Range 0 Vref 28
8883 23:01:24.872746
8884 23:01:24.873152 ==
8885 23:01:24.875542 Dram Type= 6, Freq= 0, CH_1, rank 1
8886 23:01:24.878935 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8887 23:01:24.879524 ==
8888 23:01:24.880005
8889 23:01:24.880362
8890 23:01:24.882427 TX Vref Scan disable
8891 23:01:24.889004 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =285/100 ps
8892 23:01:24.889449 == TX Byte 0 ==
8893 23:01:24.891984 u2DelayCellOfst[0]=13 cells (4 PI)
8894 23:01:24.895231 u2DelayCellOfst[1]=10 cells (3 PI)
8895 23:01:24.898557 u2DelayCellOfst[2]=0 cells (0 PI)
8896 23:01:24.901852 u2DelayCellOfst[3]=3 cells (1 PI)
8897 23:01:24.905537 u2DelayCellOfst[4]=6 cells (2 PI)
8898 23:01:24.908490 u2DelayCellOfst[5]=17 cells (5 PI)
8899 23:01:24.911670 u2DelayCellOfst[6]=17 cells (5 PI)
8900 23:01:24.915147 u2DelayCellOfst[7]=3 cells (1 PI)
8901 23:01:24.918505 Update DQ dly =979 (3 ,6, 19) DQ OEN =(3 ,3)
8902 23:01:24.921990 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8903 23:01:24.925189 == TX Byte 1 ==
8904 23:01:24.928270 u2DelayCellOfst[8]=0 cells (0 PI)
8905 23:01:24.931595 u2DelayCellOfst[9]=3 cells (1 PI)
8906 23:01:24.935084 u2DelayCellOfst[10]=13 cells (4 PI)
8907 23:01:24.935530 u2DelayCellOfst[11]=3 cells (1 PI)
8908 23:01:24.938164 u2DelayCellOfst[12]=13 cells (4 PI)
8909 23:01:24.941672 u2DelayCellOfst[13]=20 cells (6 PI)
8910 23:01:24.944863 u2DelayCellOfst[14]=20 cells (6 PI)
8911 23:01:24.948248 u2DelayCellOfst[15]=20 cells (6 PI)
8912 23:01:24.954460 Update DQ dly =979 (3 ,6, 19) DQ OEN =(3 ,3)
8913 23:01:24.957756 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8914 23:01:24.958229 DramC Write-DBI on
8915 23:01:24.961176 ==
8916 23:01:24.964442 Dram Type= 6, Freq= 0, CH_1, rank 1
8917 23:01:24.967632 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8918 23:01:24.968120 ==
8919 23:01:24.968468
8920 23:01:24.968921
8921 23:01:24.971202 TX Vref Scan disable
8922 23:01:24.971633 == TX Byte 0 ==
8923 23:01:24.977836 Update DQM dly =722 (2 ,6, 18) DQM OEN =(3 ,3)
8924 23:01:24.978439 == TX Byte 1 ==
8925 23:01:24.980736 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
8926 23:01:24.984105 DramC Write-DBI off
8927 23:01:24.984530
8928 23:01:24.984910 [DATLAT]
8929 23:01:24.987621 Freq=1600, CH1 RK1
8930 23:01:24.988050
8931 23:01:24.988391 DATLAT Default: 0xf
8932 23:01:24.991199 0, 0xFFFF, sum = 0
8933 23:01:24.991633 1, 0xFFFF, sum = 0
8934 23:01:24.994102 2, 0xFFFF, sum = 0
8935 23:01:24.994537 3, 0xFFFF, sum = 0
8936 23:01:24.997635 4, 0xFFFF, sum = 0
8937 23:01:24.998071 5, 0xFFFF, sum = 0
8938 23:01:25.000739 6, 0xFFFF, sum = 0
8939 23:01:25.003815 7, 0xFFFF, sum = 0
8940 23:01:25.003900 8, 0xFFFF, sum = 0
8941 23:01:25.007098 9, 0xFFFF, sum = 0
8942 23:01:25.007182 10, 0xFFFF, sum = 0
8943 23:01:25.010280 11, 0xFFFF, sum = 0
8944 23:01:25.010365 12, 0xFFFF, sum = 0
8945 23:01:25.013845 13, 0xFFFF, sum = 0
8946 23:01:25.013929 14, 0x0, sum = 1
8947 23:01:25.017016 15, 0x0, sum = 2
8948 23:01:25.017100 16, 0x0, sum = 3
8949 23:01:25.020051 17, 0x0, sum = 4
8950 23:01:25.020135 best_step = 15
8951 23:01:25.020201
8952 23:01:25.020261 ==
8953 23:01:25.023490 Dram Type= 6, Freq= 0, CH_1, rank 1
8954 23:01:25.027125 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8955 23:01:25.030193 ==
8956 23:01:25.030302 RX Vref Scan: 0
8957 23:01:25.030395
8958 23:01:25.033249 RX Vref 0 -> 0, step: 1
8959 23:01:25.033332
8960 23:01:25.036690 RX Delay 19 -> 252, step: 4
8961 23:01:25.040263 iDelay=195, Bit 0, Center 138 (95 ~ 182) 88
8962 23:01:25.043432 iDelay=195, Bit 1, Center 128 (83 ~ 174) 92
8963 23:01:25.046840 iDelay=195, Bit 2, Center 120 (71 ~ 170) 100
8964 23:01:25.049931 iDelay=195, Bit 3, Center 130 (83 ~ 178) 96
8965 23:01:25.056603 iDelay=195, Bit 4, Center 134 (87 ~ 182) 96
8966 23:01:25.059933 iDelay=195, Bit 5, Center 146 (99 ~ 194) 96
8967 23:01:25.063301 iDelay=195, Bit 6, Center 140 (91 ~ 190) 100
8968 23:01:25.066238 iDelay=195, Bit 7, Center 130 (83 ~ 178) 96
8969 23:01:25.069973 iDelay=195, Bit 8, Center 112 (63 ~ 162) 100
8970 23:01:25.076464 iDelay=195, Bit 9, Center 118 (67 ~ 170) 104
8971 23:01:25.079941 iDelay=195, Bit 10, Center 130 (79 ~ 182) 104
8972 23:01:25.083413 iDelay=195, Bit 11, Center 126 (75 ~ 178) 104
8973 23:01:25.086753 iDelay=195, Bit 12, Center 140 (91 ~ 190) 100
8974 23:01:25.093257 iDelay=195, Bit 13, Center 138 (87 ~ 190) 104
8975 23:01:25.096746 iDelay=195, Bit 14, Center 138 (91 ~ 186) 96
8976 23:01:25.100069 iDelay=195, Bit 15, Center 140 (87 ~ 194) 108
8977 23:01:25.100309 ==
8978 23:01:25.103383 Dram Type= 6, Freq= 0, CH_1, rank 1
8979 23:01:25.106699 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8980 23:01:25.106967 ==
8981 23:01:25.109451 DQS Delay:
8982 23:01:25.109659 DQS0 = 0, DQS1 = 0
8983 23:01:25.109819 DQM Delay:
8984 23:01:25.112812 DQM0 = 133, DQM1 = 130
8985 23:01:25.113018 DQ Delay:
8986 23:01:25.116572 DQ0 =138, DQ1 =128, DQ2 =120, DQ3 =130
8987 23:01:25.122947 DQ4 =134, DQ5 =146, DQ6 =140, DQ7 =130
8988 23:01:25.126545 DQ8 =112, DQ9 =118, DQ10 =130, DQ11 =126
8989 23:01:25.129729 DQ12 =140, DQ13 =138, DQ14 =138, DQ15 =140
8990 23:01:25.130359
8991 23:01:25.130825
8992 23:01:25.131195
8993 23:01:25.133099 [DramC_TX_OE_Calibration] TA2
8994 23:01:25.136233 Original DQ_B0 (3 6) =30, OEN = 27
8995 23:01:25.139439 Original DQ_B1 (3 6) =30, OEN = 27
8996 23:01:25.139911 24, 0x0, End_B0=24 End_B1=24
8997 23:01:25.142978 25, 0x0, End_B0=25 End_B1=25
8998 23:01:25.145982 26, 0x0, End_B0=26 End_B1=26
8999 23:01:25.149437 27, 0x0, End_B0=27 End_B1=27
9000 23:01:25.152551 28, 0x0, End_B0=28 End_B1=28
9001 23:01:25.153078 29, 0x0, End_B0=29 End_B1=29
9002 23:01:25.155983 30, 0x0, End_B0=30 End_B1=30
9003 23:01:25.159346 31, 0x4141, End_B0=30 End_B1=30
9004 23:01:25.162689 Byte0 end_step=30 best_step=27
9005 23:01:25.165971 Byte1 end_step=30 best_step=27
9006 23:01:25.169233 Byte0 TX OE(2T, 0.5T) = (3, 3)
9007 23:01:25.169706 Byte1 TX OE(2T, 0.5T) = (3, 3)
9008 23:01:25.170078
9009 23:01:25.170424
9010 23:01:25.178925 [DQSOSCAuto] RK1, (LSB)MR18= 0x1a05, (MSB)MR19= 0x303, tDQSOscB0 = 407 ps tDQSOscB1 = 396 ps
9011 23:01:25.182436 CH1 RK1: MR19=303, MR18=1A05
9012 23:01:25.189006 CH1_RK1: MR19=0x303, MR18=0x1A05, DQSOSC=396, MR23=63, INC=23, DEC=15
9013 23:01:25.192548 [RxdqsGatingPostProcess] freq 1600
9014 23:01:25.195895 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
9015 23:01:25.198832 best DQS0 dly(2T, 0.5T) = (1, 1)
9016 23:01:25.201909 best DQS1 dly(2T, 0.5T) = (1, 1)
9017 23:01:25.205710 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
9018 23:01:25.208599 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
9019 23:01:25.211954 best DQS0 dly(2T, 0.5T) = (1, 1)
9020 23:01:25.215384 best DQS1 dly(2T, 0.5T) = (1, 1)
9021 23:01:25.218642 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
9022 23:01:25.221736 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
9023 23:01:25.225398 Pre-setting of DQS Precalculation
9024 23:01:25.228448 [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15
9025 23:01:25.235124 sync_frequency_calibration_params sync calibration params of frequency 1600 to shu:0
9026 23:01:25.241839 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
9027 23:01:25.245146
9028 23:01:25.245620
9029 23:01:25.245993 [Calibration Summary] 3200 Mbps
9030 23:01:25.248051 CH 0, Rank 0
9031 23:01:25.248523 SW Impedance : PASS
9032 23:01:25.251453 DUTY Scan : NO K
9033 23:01:25.255021 ZQ Calibration : PASS
9034 23:01:25.255513 Jitter Meter : NO K
9035 23:01:25.258201 CBT Training : PASS
9036 23:01:25.261377 Write leveling : PASS
9037 23:01:25.261866 RX DQS gating : PASS
9038 23:01:25.265216 RX DQ/DQS(RDDQC) : PASS
9039 23:01:25.268390 TX DQ/DQS : PASS
9040 23:01:25.268947 RX DATLAT : PASS
9041 23:01:25.271552 RX DQ/DQS(Engine): PASS
9042 23:01:25.274654 TX OE : PASS
9043 23:01:25.275145 All Pass.
9044 23:01:25.275648
9045 23:01:25.276106 CH 0, Rank 1
9046 23:01:25.278014 SW Impedance : PASS
9047 23:01:25.281325 DUTY Scan : NO K
9048 23:01:25.281813 ZQ Calibration : PASS
9049 23:01:25.285059 Jitter Meter : NO K
9050 23:01:25.288398 CBT Training : PASS
9051 23:01:25.289056 Write leveling : PASS
9052 23:01:25.291632 RX DQS gating : PASS
9053 23:01:25.294312 RX DQ/DQS(RDDQC) : PASS
9054 23:01:25.294803 TX DQ/DQS : PASS
9055 23:01:25.297672 RX DATLAT : PASS
9056 23:01:25.298220 RX DQ/DQS(Engine): PASS
9057 23:01:25.301009 TX OE : PASS
9058 23:01:25.301503 All Pass.
9059 23:01:25.301991
9060 23:01:25.304469 CH 1, Rank 0
9061 23:01:25.305027 SW Impedance : PASS
9062 23:01:25.308127 DUTY Scan : NO K
9063 23:01:25.311213 ZQ Calibration : PASS
9064 23:01:25.311703 Jitter Meter : NO K
9065 23:01:25.314552 CBT Training : PASS
9066 23:01:25.318114 Write leveling : PASS
9067 23:01:25.318918 RX DQS gating : PASS
9068 23:01:25.320879 RX DQ/DQS(RDDQC) : PASS
9069 23:01:25.324412 TX DQ/DQS : PASS
9070 23:01:25.325031 RX DATLAT : PASS
9071 23:01:25.328057 RX DQ/DQS(Engine): PASS
9072 23:01:25.330923 TX OE : PASS
9073 23:01:25.331412 All Pass.
9074 23:01:25.331984
9075 23:01:25.332446 CH 1, Rank 1
9076 23:01:25.334694 SW Impedance : PASS
9077 23:01:25.337684 DUTY Scan : NO K
9078 23:01:25.338175 ZQ Calibration : PASS
9079 23:01:25.341339 Jitter Meter : NO K
9080 23:01:25.344133 CBT Training : PASS
9081 23:01:25.344622 Write leveling : PASS
9082 23:01:25.347883 RX DQS gating : PASS
9083 23:01:25.350964 RX DQ/DQS(RDDQC) : PASS
9084 23:01:25.351460 TX DQ/DQS : PASS
9085 23:01:25.354017 RX DATLAT : PASS
9086 23:01:25.357325 RX DQ/DQS(Engine): PASS
9087 23:01:25.357812 TX OE : PASS
9088 23:01:25.358300 All Pass.
9089 23:01:25.358757
9090 23:01:25.360720 DramC Write-DBI on
9091 23:01:25.364245 PER_BANK_REFRESH: Hybrid Mode
9092 23:01:25.364950 TX_TRACKING: ON
9093 23:01:25.374026 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 115, TRFCpb 44, TRFCpb_05T 0
9094 23:01:25.380454 sync_frequency_calibration_params_to_shu sync calibration params of frequency 1600 to shu:1
9095 23:01:25.390489 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
9096 23:01:25.393529 [FAST_K] Save calibration result to emmc
9097 23:01:25.397193 sync common calibartion params.
9098 23:01:25.397764 sync cbt_mode0:1, 1:1
9099 23:01:25.400237 dram_init: ddr_geometry: 2
9100 23:01:25.403909 dram_init: ddr_geometry: 2
9101 23:01:25.404513 dram_init: ddr_geometry: 2
9102 23:01:25.406874 0:dram_rank_size:100000000
9103 23:01:25.410262 1:dram_rank_size:100000000
9104 23:01:25.416922 sync rank num:2, rank0_size:0x100000000, rank1_size:0x100000000
9105 23:01:25.417494 DFS_SHUFFLE_HW_MODE: ON
9106 23:01:25.420053 dramc_set_vcore_voltage set vcore to 725000
9107 23:01:25.423600 Read voltage for 1600, 0
9108 23:01:25.424172 Vio18 = 0
9109 23:01:25.426878 Vcore = 725000
9110 23:01:25.427448 Vdram = 0
9111 23:01:25.427822 Vddq = 0
9112 23:01:25.430027 Vmddr = 0
9113 23:01:25.430493 switch to 3200 Mbps bootup
9114 23:01:25.433289 [DramcRunTimeConfig]
9115 23:01:25.433755 PHYPLL
9116 23:01:25.436551 DPM_CONTROL_AFTERK: ON
9117 23:01:25.437074 PER_BANK_REFRESH: ON
9118 23:01:25.440138 REFRESH_OVERHEAD_REDUCTION: ON
9119 23:01:25.443329 CMD_PICG_NEW_MODE: OFF
9120 23:01:25.443897 XRTWTW_NEW_MODE: ON
9121 23:01:25.446618 XRTRTR_NEW_MODE: ON
9122 23:01:25.447131 TX_TRACKING: ON
9123 23:01:25.450162 RDSEL_TRACKING: OFF
9124 23:01:25.453093 DQS Precalculation for DVFS: ON
9125 23:01:25.453768 RX_TRACKING: OFF
9126 23:01:25.456392 HW_GATING DBG: ON
9127 23:01:25.456897 ZQCS_ENABLE_LP4: ON
9128 23:01:25.459936 RX_PICG_NEW_MODE: ON
9129 23:01:25.460402 TX_PICG_NEW_MODE: ON
9130 23:01:25.462883 ENABLE_RX_DCM_DPHY: ON
9131 23:01:25.466237 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
9132 23:01:25.469850 DUMMY_READ_FOR_TRACKING: OFF
9133 23:01:25.470318 !!! SPM_CONTROL_AFTERK: OFF
9134 23:01:25.472936 !!! SPM could not control APHY
9135 23:01:25.476521 IMPEDANCE_TRACKING: ON
9136 23:01:25.476978 TEMP_SENSOR: ON
9137 23:01:25.479684 HW_SAVE_FOR_SR: OFF
9138 23:01:25.482908 CLK_FREE_FUN_FOR_DRAMC_PSEL: OFF
9139 23:01:25.486409 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: OFF
9140 23:01:25.486950 Read ODT Tracking: ON
9141 23:01:25.489449 Refresh Rate DeBounce: ON
9142 23:01:25.492861 DFS_NO_QUEUE_FLUSH: ON
9143 23:01:25.496156 DFS_NO_QUEUE_FLUSH_LATENCY_CNT: OFF
9144 23:01:25.499671 ENABLE_DFS_RUNTIME_MRW: OFF
9145 23:01:25.500247 DDR_RESERVE_NEW_MODE: ON
9146 23:01:25.502456 MR_CBT_SWITCH_FREQ: ON
9147 23:01:25.505983 =========================
9148 23:01:25.523776 [MEM] 1st complex R/W mem test pass (start addr:0x4c400000)
9149 23:01:25.526886 dram_init: ddr_geometry: 2
9150 23:01:25.545274 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
9151 23:01:25.548189 dram_init: dram init end (result: 0)
9152 23:01:25.554706 DRAM-K: Full calibration passed in 24500 msecs
9153 23:01:25.558751 MRC: failed to locate region type 0.
9154 23:01:25.559323 DRAM rank0 size:0x100000000,
9155 23:01:25.561454 DRAM rank1 size=0x100000000
9156 23:01:25.571318 Mapping address range [0x40000000:0x240000000) as cacheable | read-write | non-secure | normal
9157 23:01:25.577875 Mapping address range [0x40000000:0x40100000) as non-cacheable | read-write | non-secure | normal
9158 23:01:25.584390 Backing address range [0x40000000:0x80000000) with new page table @0x00112000
9159 23:01:25.594292 Backing address range [0x40000000:0x40200000) with new page table @0x00113000
9160 23:01:25.594730 DRAM rank0 size:0x100000000,
9161 23:01:25.598019 DRAM rank1 size=0x100000000
9162 23:01:25.598570 CBMEM:
9163 23:01:25.601229 IMD: root @ 0xfffff000 254 entries.
9164 23:01:25.604159 IMD: root @ 0xffffec00 62 entries.
9165 23:01:25.607618 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
9166 23:01:25.614564 WARNING: RO_VPD is uninitialized or empty.
9167 23:01:25.617646 FMAP: area RW_VPD found @ 577000 (16384 bytes)
9168 23:01:25.625310 CBFS: Found 'fallback/ramstage' @0x21840 size 0xe01e in mcache @0x00107c80
9169 23:01:25.638043 read SPI 0x42894 0xe01e: 6226 us, 9215 KB/s, 73.720 Mbps
9170 23:01:25.649444 BS: romstage times (exec / console): total (unknown) / 23998 ms
9171 23:01:25.650019
9172 23:01:25.650390
9173 23:01:25.659389 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 ramstage starting (log level: 8)...
9174 23:01:25.662131 ARM64: Exception handlers installed.
9175 23:01:25.665387 ARM64: Testing exception
9176 23:01:25.668870 ARM64: Done test exception
9177 23:01:25.669299 Enumerating buses...
9178 23:01:25.672233 Show all devs... Before device enumeration.
9179 23:01:25.675167 Root Device: enabled 1
9180 23:01:25.678436 CPU_CLUSTER: 0: enabled 1
9181 23:01:25.678901 CPU: 00: enabled 1
9182 23:01:25.681982 Compare with tree...
9183 23:01:25.682487 Root Device: enabled 1
9184 23:01:25.685195 CPU_CLUSTER: 0: enabled 1
9185 23:01:25.688609 CPU: 00: enabled 1
9186 23:01:25.689075 Root Device scanning...
9187 23:01:25.692013 scan_static_bus for Root Device
9188 23:01:25.695314 CPU_CLUSTER: 0 enabled
9189 23:01:25.698913 scan_static_bus for Root Device done
9190 23:01:25.702008 scan_bus: bus Root Device finished in 8 msecs
9191 23:01:25.702484 done
9192 23:01:25.708568 BS: BS_DEV_ENUMERATE run times (exec / console): 0 / 35 ms
9193 23:01:25.711943 FMAP: area RW_MRC_CACHE found @ 57d000 (8192 bytes)
9194 23:01:25.718520 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
9195 23:01:25.721744 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 10 ms
9196 23:01:25.725165 Allocating resources...
9197 23:01:25.728582 Reading resources...
9198 23:01:25.731824 Root Device read_resources bus 0 link: 0
9199 23:01:25.735158 DRAM rank0 size:0x100000000,
9200 23:01:25.735753 DRAM rank1 size=0x100000000
9201 23:01:25.738511 CPU_CLUSTER: 0 read_resources bus 0 link: 0
9202 23:01:25.741852 CPU: 00 missing read_resources
9203 23:01:25.748306 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
9204 23:01:25.751650 Root Device read_resources bus 0 link: 0 done
9205 23:01:25.752234 Done reading resources.
9206 23:01:25.758186 Show resources in subtree (Root Device)...After reading.
9207 23:01:25.761497 Root Device child on link 0 CPU_CLUSTER: 0
9208 23:01:25.764558 CPU_CLUSTER: 0 child on link 0 CPU: 00
9209 23:01:25.774587 CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0
9210 23:01:25.775072 CPU: 00
9211 23:01:25.777778 Root Device assign_resources, bus 0 link: 0
9212 23:01:25.781181 CPU_CLUSTER: 0 missing set_resources
9213 23:01:25.787983 Root Device assign_resources, bus 0 link: 0 done
9214 23:01:25.788463 Done setting resources.
9215 23:01:25.794386 Show resources in subtree (Root Device)...After assigning values.
9216 23:01:25.797695 Root Device child on link 0 CPU_CLUSTER: 0
9217 23:01:25.800845 CPU_CLUSTER: 0 child on link 0 CPU: 00
9218 23:01:25.810958 CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0
9219 23:01:25.811544 CPU: 00
9220 23:01:25.814556 Done allocating resources.
9221 23:01:25.821333 BS: BS_DEV_RESOURCES run times (exec / console): 0 / 91 ms
9222 23:01:25.821918 Enabling resources...
9223 23:01:25.822300 done.
9224 23:01:25.827504 BS: BS_DEV_ENABLE run times (exec / console): 0 / 3 ms
9225 23:01:25.830909 Initializing devices...
9226 23:01:25.831497 Root Device init
9227 23:01:25.833920 init hardware done!
9228 23:01:25.834393 0x00000018: ctrlr->caps
9229 23:01:25.837341 52.000 MHz: ctrlr->f_max
9230 23:01:25.840911 0.400 MHz: ctrlr->f_min
9231 23:01:25.841494 0x40ff8080: ctrlr->voltages
9232 23:01:25.844284 sclk: 390625
9233 23:01:25.844931 Bus Width = 1
9234 23:01:25.847360 sclk: 390625
9235 23:01:25.847833 Bus Width = 1
9236 23:01:25.850947 Early init status = 3
9237 23:01:25.853955 out: cmd=0x12e: 03 c9 2e 01 00 00 04 00 01 00 00 00
9238 23:01:25.856882 in-header: 03 fc 00 00 01 00 00 00
9239 23:01:25.860628 in-data: 00
9240 23:01:25.863614 out: cmd=0x12d: 03 c8 2d 01 00 00 05 00 01 00 00 00 01
9241 23:01:25.867943 in-header: 03 fd 00 00 00 00 00 00
9242 23:01:25.871331 in-data:
9243 23:01:25.874523 out: cmd=0x12e: 03 ca 2e 01 00 00 04 00 00 00 00 00
9244 23:01:25.878200 in-header: 03 fc 00 00 01 00 00 00
9245 23:01:25.881502 in-data: 00
9246 23:01:25.884904 out: cmd=0x12d: 03 c9 2d 01 00 00 05 00 00 00 00 00 01
9247 23:01:25.889902 in-header: 03 fd 00 00 00 00 00 00
9248 23:01:25.893219 in-data:
9249 23:01:25.896900 [SSUSB] Setting up USB HOST controller...
9250 23:01:25.900044 [SSUSB] u3phy_ports_enable u2p:1, u3p:1
9251 23:01:25.903134 [SSUSB] phy power-on done.
9252 23:01:25.906724 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
9253 23:01:25.913340 CBFS: Found 'dpm.dm' @0x2fe00 size 0x20 in mcache @0xffffc13c
9254 23:01:25.916388 mtk_init_mcu: Loaded (and reset) dpm.dm in 9 msecs (40 bytes)
9255 23:01:25.923109 CBFS: Found 'dpm.pm' @0x2fe80 size 0x2ad3 in mcache @0xffffc16c
9256 23:01:25.929490 read SPI 0x50eb0 0x2ad3: 1174 us, 9338 KB/s, 74.704 Mbps
9257 23:01:25.936268 mtk_init_mcu: Loaded (and reset) dpm.pm in 13 msecs (14004 bytes)
9258 23:01:25.942836 CBFS: Found 'spm_firmware.bin' @0x4f580 size 0x1f6a in mcache @0xffffc204
9259 23:01:25.949189 read SPI 0x705bc 0x1f6a: 924 us, 8703 KB/s, 69.624 Mbps
9260 23:01:25.952535 SPM: binary array size = 0x9dc
9261 23:01:25.956078 SPM: spmfw (version pcm_suspend_v1.45_20201028_mtcmosapi_align16)
9262 23:01:25.962862 spm_kick_im_to_fetch: ptr = 0x80000010, pmem/dmem words = 0x9c4/0x18
9263 23:01:25.968887 mtk_init_mcu: Loaded (and reset) spm_firmware.bin in 27 msecs (10173 bytes)
9264 23:01:25.975599 SPM: spm_init done in 34 msecs, spm pc = 0x3f4
9265 23:01:25.978696 configure_display: Starting display init
9266 23:01:26.013250 anx7625_power_on_init: Init interface.
9267 23:01:26.016683 anx7625_disable_pd_protocol: Disabled PD feature.
9268 23:01:26.020044 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
9269 23:01:26.047699 anx7625_start_dp_work: Secure OCM version=00
9270 23:01:26.051028 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
9271 23:01:26.065787 sp_tx_get_edid_block: EDID Block = 1
9272 23:01:26.168231 Extracted contents:
9273 23:01:26.171566 header: 00 ff ff ff ff ff ff 00
9274 23:01:26.175209 serial number: 26 cf 7d 05 00 00 00 00 00 1e
9275 23:01:26.178599 version: 01 04
9276 23:01:26.181772 basic params: 95 1f 11 78 0a
9277 23:01:26.184950 chroma info: 76 90 94 55 54 90 27 21 50 54
9278 23:01:26.187915 established: 00 00 00
9279 23:01:26.194672 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
9280 23:01:26.198077 descriptor 1: 38 36 80 a0 70 38 20 40 18 30 3c 00 35 ae 10 00 00 19
9281 23:01:26.204415 descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9282 23:01:26.211318 descriptor 3: 00 00 00 fe 00 49 6e 66 6f 56 69 73 69 6f 6e 0a 20 20
9283 23:01:26.217981 descriptor 4: 00 00 00 fe 00 52 31 34 30 4e 57 46 35 20 52 48 20 0a
9284 23:01:26.221125 extensions: 00
9285 23:01:26.221702 checksum: fb
9286 23:01:26.222082
9287 23:01:26.224464 Manufacturer: IVO Model 57d Serial Number 0
9288 23:01:26.228040 Made week 0 of 2020
9289 23:01:26.228636 EDID version: 1.4
9290 23:01:26.231093 Digital display
9291 23:01:26.234407 6 bits per primary color channel
9292 23:01:26.234941 DisplayPort interface
9293 23:01:26.237273 Maximum image size: 31 cm x 17 cm
9294 23:01:26.241127 Gamma: 220%
9295 23:01:26.241587 Check DPMS levels
9296 23:01:26.243937 Supported color formats: RGB 4:4:4, YCrCb 4:2:2
9297 23:01:26.250636 First detailed timing is preferred timing
9298 23:01:26.251063 Established timings supported:
9299 23:01:26.253996 Standard timings supported:
9300 23:01:26.257364 Detailed timings
9301 23:01:26.260756 Hex of detail: 383680a07038204018303c0035ae10000019
9302 23:01:26.267482 Detailed mode (IN HEX): Clock 138800 KHz, 135 mm x ae mm
9303 23:01:26.270730 0780 0798 07c8 0820 hborder 0
9304 23:01:26.274288 0438 043b 0447 0458 vborder 0
9305 23:01:26.277349 -hsync -vsync
9306 23:01:26.277772 Did detailed timing
9307 23:01:26.284179 Hex of detail: 000000000000000000000000000000000000
9308 23:01:26.287105 Manufacturer-specified data, tag 0
9309 23:01:26.290147 Hex of detail: 000000fe00496e666f566973696f6e0a2020
9310 23:01:26.293798 ASCII string: InfoVision
9311 23:01:26.297176 Hex of detail: 000000fe00523134304e574635205248200a
9312 23:01:26.300518 ASCII string: R140NWF5 RH
9313 23:01:26.301167 Checksum
9314 23:01:26.303893 Checksum: 0xfb (valid)
9315 23:01:26.307384 configure_display: 'IVO R140NWF5 RH ' 1920x1080@0Hz
9316 23:01:26.310275 DSI data_rate: 832800000 bps
9317 23:01:26.316558 anx7625_parse_edid: detected IVO panel, use k value 0x3b
9318 23:01:26.319901 anx7625_parse_edid: pixelclock(138800).
9319 23:01:26.323367 hactive(1920), hsync(48), hfp(24), hbp(88)
9320 23:01:26.326634 vactive(1080), vsync(12), vfp(3), vbp(17)
9321 23:01:26.329936 anx7625_dsi_config: config dsi.
9322 23:01:26.336466 anx7625_dsi_video_config: compute M(11370496), N(552960), divider(4).
9323 23:01:26.350490 anx7625_dsi_config: success to config DSI
9324 23:01:26.353691 anx7625_dp_start: MIPI phy setup OK.
9325 23:01:26.357039 mtk_ddp_mode_set display resolution: 1920x1080@0 bpp 4
9326 23:01:26.360158 mtk_ddp_mode_set invalid vrefresh 60
9327 23:01:26.363508 main_disp_path_setup
9328 23:01:26.364128 ovl_layer_smi_id_en
9329 23:01:26.366992 ovl_layer_smi_id_en
9330 23:01:26.367567 ccorr_config
9331 23:01:26.367951 aal_config
9332 23:01:26.370386 gamma_config
9333 23:01:26.371013 postmask_config
9334 23:01:26.373292 dither_config
9335 23:01:26.377021 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
9336 23:01:26.383289 x_res x y_res: 1920 x 1080, size: 8294400 at 0x0
9337 23:01:26.386342 Root Device init finished in 552 msecs
9338 23:01:26.389940 CPU_CLUSTER: 0 init
9339 23:01:26.396617 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | device
9340 23:01:26.403319 INFRA2APU_SRAM_PROT_EN 0x10001e98 = 0x3fffffff
9341 23:01:26.404040 APU_MBOX 0x190000b0 = 0x10001
9342 23:01:26.406091 APU_MBOX 0x190001b0 = 0x10001
9343 23:01:26.409565 APU_MBOX 0x190005b0 = 0x10001
9344 23:01:26.412916 APU_MBOX 0x190006b0 = 0x10001
9345 23:01:26.419428 CBFS: Found 'mcupm.bin' @0x329c0 size 0xe237 in mcache @0xffffc19c
9346 23:01:26.429180 read SPI 0x539f4 0xe237: 6248 us, 9268 KB/s, 74.144 Mbps
9347 23:01:26.441623 mtk_init_mcu: Loaded (and reset) mcupm.bin in 24 msecs (117884 bytes)
9348 23:01:26.448387 CBFS: Found 'sspm.bin' @0x40c40 size 0xe8ef in mcache @0xffffc1d0
9349 23:01:26.459940 read SPI 0x61c74 0xe8ef: 6410 us, 9302 KB/s, 74.416 Mbps
9350 23:01:26.469144 mtk_init_mcu: Loaded (and reset) sspm.bin in 21 msecs (137228 bytes)
9351 23:01:26.472669 CPU_CLUSTER: 0 init finished in 81 msecs
9352 23:01:26.475686 Devices initialized
9353 23:01:26.479196 Show all devs... After init.
9354 23:01:26.479677 Root Device: enabled 1
9355 23:01:26.482490 CPU_CLUSTER: 0: enabled 1
9356 23:01:26.485685 CPU: 00: enabled 1
9357 23:01:26.488945 BS: BS_DEV_INIT run times (exec / console): 210 / 447 ms
9358 23:01:26.492165 FMAP: area RW_ELOG found @ 57f000 (4096 bytes)
9359 23:01:26.495103 ELOG: NV offset 0x57f000 size 0x1000
9360 23:01:26.502246 read SPI 0x57f000 0x1000: 487 us, 8410 KB/s, 67.280 Mbps
9361 23:01:26.508877 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
9362 23:01:26.512003 ELOG: Event(17) added with size 13 at 2023-06-05 23:01:23 UTC
9363 23:01:26.518547 out: cmd=0x121: 03 db 21 01 00 00 00 00
9364 23:01:26.521750 in-header: 03 31 00 00 2c 00 00 00
9365 23:01:26.531957 in-data: 2e 68 00 00 00 00 00 00 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9366 23:01:26.538201 ELOG: Event(A1) added with size 10 at 2023-06-05 23:01:23 UTC
9367 23:01:26.544914 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
9368 23:01:26.551680 ELOG: Event(A0) added with size 9 at 2023-06-05 23:01:23 UTC
9369 23:01:26.554749 elog_add_boot_reason: Logged dev mode boot
9370 23:01:26.561460 BS: BS_POST_DEVICE entry times (exec / console): 2 / 64 ms
9371 23:01:26.561896 Finalize devices...
9372 23:01:26.564681 Devices finalized
9373 23:01:26.568384 BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
9374 23:01:26.571380 Writing coreboot table at 0xffe64000
9375 23:01:26.574575 0. 000000000010a000-0000000000113fff: RAMSTAGE
9376 23:01:26.581352 1. 0000000040000000-00000000400fffff: RAM
9377 23:01:26.584746 2. 0000000040100000-000000004032afff: RAMSTAGE
9378 23:01:26.587889 3. 000000004032b000-00000000545fffff: RAM
9379 23:01:26.591276 4. 0000000054600000-000000005465ffff: BL31
9380 23:01:26.594540 5. 0000000054660000-00000000ffe63fff: RAM
9381 23:01:26.601513 6. 00000000ffe64000-00000000ffffffff: CONFIGURATION TABLES
9382 23:01:26.604553 7. 0000000100000000-000000023fffffff: RAM
9383 23:01:26.607446 Passing 5 GPIOs to payload:
9384 23:01:26.611173 NAME | PORT | POLARITY | VALUE
9385 23:01:26.617292 EC in RW | 0x000000aa | low | undefined
9386 23:01:26.620919 EC interrupt | 0x00000005 | low | undefined
9387 23:01:26.624384 TPM interrupt | 0x000000ab | high | undefined
9388 23:01:26.631002 SD card detect | 0x00000011 | high | undefined
9389 23:01:26.634184 speaker enable | 0x00000093 | high | undefined
9390 23:01:26.637123 out: cmd=0x6: 03 f7 06 00 00 00 00 00
9391 23:01:26.640878 in-header: 03 f9 00 00 02 00 00 00
9392 23:01:26.643936 in-data: 02 00
9393 23:01:26.647716 ADC[4]: Raw value=901032 ID=7
9394 23:01:26.648333 ADC[3]: Raw value=213179 ID=1
9395 23:01:26.650396 RAM Code: 0x71
9396 23:01:26.653969 ADC[6]: Raw value=74502 ID=0
9397 23:01:26.657166 ADC[5]: Raw value=212072 ID=1
9398 23:01:26.657670 SKU Code: 0x1
9399 23:01:26.663615 Wrote coreboot table at: 0xffe64000, 0x3ac bytes, checksum 4bb3
9400 23:01:26.664196 coreboot table: 964 bytes.
9401 23:01:26.667095 IMD ROOT 0. 0xfffff000 0x00001000
9402 23:01:26.670247 IMD SMALL 1. 0xffffe000 0x00001000
9403 23:01:26.673500 RO MCACHE 2. 0xffffc000 0x00001104
9404 23:01:26.677144 CONSOLE 3. 0xfff7c000 0x00080000
9405 23:01:26.680294 FMAP 4. 0xfff7b000 0x00000452
9406 23:01:26.683926 TIME STAMP 5. 0xfff7a000 0x00000910
9407 23:01:26.686581 VBOOT WORK 6. 0xfff66000 0x00014000
9408 23:01:26.690041 RAMOOPS 7. 0xffe66000 0x00100000
9409 23:01:26.693153 COREBOOT 8. 0xffe64000 0x00002000
9410 23:01:26.696879 IMD small region:
9411 23:01:26.700160 IMD ROOT 0. 0xffffec00 0x00000400
9412 23:01:26.703354 VPD 1. 0xffffeba0 0x0000004c
9413 23:01:26.706411 MMC STATUS 2. 0xffffeb80 0x00000004
9414 23:01:26.713038 BS: BS_WRITE_TABLES run times (exec / console): 1 / 137 ms
9415 23:01:26.713624 Probing TPM: done!
9416 23:01:26.719842 Connected to device vid:did:rid of 1ae0:0028:00
9417 23:01:26.726530 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.30/cr50_v1.9308_B.954-4f0f77dec8
9418 23:01:26.729648 Initialized TPM device CR50 revision 0
9419 23:01:26.733537 Checking cr50 for pending updates
9420 23:01:26.739007 Reading cr50 TPM mode
9421 23:01:26.747455 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 22 ms
9422 23:01:26.754093 CBFS: Found 'fallback/payload' @0x3780c0 size 0x4f1b0 in mcache @0xffffd098
9423 23:01:26.793835 read SPI 0x3990ec 0x4f1b0: 34850 us, 9297 KB/s, 74.376 Mbps
9424 23:01:26.797134 Checking segment from ROM address 0x40100000
9425 23:01:26.800468 Checking segment from ROM address 0x4010001c
9426 23:01:26.807023 Loading segment from ROM address 0x40100000
9427 23:01:26.807504 code (compression=0)
9428 23:01:26.817285 New segment dstaddr 0x80000000 memsize 0x21a7280 srcaddr 0x40100038 filesize 0x4f178
9429 23:01:26.823952 Loading Segment: addr: 0x80000000 memsz: 0x00000000021a7280 filesz: 0x000000000004f178
9430 23:01:26.824452 it's not compressed!
9431 23:01:26.830183 [ 0x80000000, 8004f178, 0x821a7280) <- 40100038
9432 23:01:26.836535 Clearing Segment: addr: 0x000000008004f178 memsz: 0x0000000002158108
9433 23:01:26.854439 Loading segment from ROM address 0x4010001c
9434 23:01:26.855022 Entry Point 0x80000000
9435 23:01:26.857287 Loaded segments
9436 23:01:26.860903 BS: BS_PAYLOAD_LOAD run times (exec / console): 48 / 61 ms
9437 23:01:26.867459 Jumping to boot code at 0x80000000(0xffe64000)
9438 23:01:26.874371 CPU0: stack: 0x0010a000 - 0x0010d000, lowest used address 0x0010c500, stack used: 2816 bytes
9439 23:01:26.880746 CBFS: Found 'fallback/bl31' @0x6db40 size 0x74a8 in mcache @0xffffc290
9440 23:01:26.888710 read SPI 0x8eb68 0x74a8: 3223 us, 9265 KB/s, 74.120 Mbps
9441 23:01:26.892097 Checking segment from ROM address 0x40100000
9442 23:01:26.895737 Checking segment from ROM address 0x4010001c
9443 23:01:26.902050 Loading segment from ROM address 0x40100000
9444 23:01:26.902623 code (compression=1)
9445 23:01:26.908847 New segment dstaddr 0x54600000 memsize 0x2e000 srcaddr 0x40100038 filesize 0x7470
9446 23:01:26.918291 Loading Segment: addr: 0x54600000 memsz: 0x000000000002e000 filesz: 0x0000000000007470
9447 23:01:26.918867 using LZMA
9448 23:01:26.927511 [ 0x54600000, 54614abc, 0x5462e000) <- 40100038
9449 23:01:26.933925 Clearing Segment: addr: 0x0000000054614abc memsz: 0x0000000000019544
9450 23:01:26.936801 Loading segment from ROM address 0x4010001c
9451 23:01:26.937288 Entry Point 0x54601000
9452 23:01:26.940422 Loaded segments
9453 23:01:26.943528 NOTICE: MT8192 bl31_setup
9454 23:01:26.950888 NOTICE: BL31: v2.4(debug):v2.4-448-gce3ebc861
9455 23:01:26.954025 NOTICE: BL31: Built : Sat Sep 11 09:59:37 UTC 2021
9456 23:01:26.957611 WARNING: region 0:
9457 23:01:26.960568 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9458 23:01:26.961139 WARNING: region 1:
9459 23:01:26.967801 WARNING: sa:0x8000, ea:0x83ff, apc0: 0x80b6db40 apc1: 0xb6db6d
9460 23:01:26.970734 WARNING: region 2:
9461 23:01:26.973847 WARNING: sa:0x1000, ea:0x113f, apc0: 0x80b6d168 apc1: 0xb6db6d
9462 23:01:26.977490 WARNING: region 3:
9463 23:01:26.980807 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9464 23:01:26.984384 WARNING: region 4:
9465 23:01:26.991055 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9466 23:01:26.991649 WARNING: region 5:
9467 23:01:26.994186 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9468 23:01:26.997406 WARNING: region 6:
9469 23:01:27.001087 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9470 23:01:27.004524 WARNING: region 7:
9471 23:01:27.007554 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9472 23:01:27.013791 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_0: 0x14000000
9473 23:01:27.017348 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_1: 0x0
9474 23:01:27.020588 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_0: 0xffffffff
9475 23:01:27.027234 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_1: 0xfff
9476 23:01:27.030646 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_0: 0xffffffff
9477 23:01:27.034063 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_1: 0x3f00
9478 23:01:27.040799 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_0: 0xffffffff
9479 23:01:27.044097 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_1: 0x3fff
9480 23:01:27.050819 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_0: 0xffffffff
9481 23:01:27.054113 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_1: 0x3fff
9482 23:01:27.057345 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_0: 0xffffffff
9483 23:01:27.064111 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_1: 0x3fff
9484 23:01:27.067467 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_0: 0xffffffff
9485 23:01:27.070302 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_1: 0x3fff
9486 23:01:27.077461 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_0: 0xffffffff
9487 23:01:27.080851 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_1: 0x3fff
9488 23:01:27.087652 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_0: 0xffffffff
9489 23:01:27.090434 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_1: 0x3fff
9490 23:01:27.093682 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_0: 0xffffffff
9491 23:01:27.100488 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_1: 0x3fff
9492 23:01:27.104015 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_0: 0xffffffff
9493 23:01:27.107243 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_1: 0x3fff
9494 23:01:27.113961 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_0: 0xffffffff
9495 23:01:27.117350 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_1: 0x3fff
9496 23:01:27.124093 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_0: 0xffffffff
9497 23:01:27.126842 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_1: 0x3fff
9498 23:01:27.130458 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_0: 0xffffffff
9499 23:01:27.137069 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_1: 0x3fff
9500 23:01:27.140324 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_0: 0xffffffff
9501 23:01:27.147131 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_1: 0x3fff
9502 23:01:27.150077 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_0: 0xffffffff
9503 23:01:27.153784 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_1: 0x3fff
9504 23:01:27.160326 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_0: 0x0
9505 23:01:27.163455 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_1: 0x0
9506 23:01:27.166549 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_2: 0x0
9507 23:01:27.170090 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_3: 0x0
9508 23:01:27.176881 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_4: 0x0
9509 23:01:27.179996 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_5: 0x0
9510 23:01:27.183089 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_6: 0x0
9511 23:01:27.186888 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_7: 0x0
9512 23:01:27.193868 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_8: 0x0
9513 23:01:27.196714 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_9: 0x0
9514 23:01:27.200122 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_10: 0x0
9515 23:01:27.203325 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_11: 0x0
9516 23:01:27.209629 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_12: 0x0
9517 23:01:27.212916 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_13: 0x0
9518 23:01:27.216514 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_14: 0x0
9519 23:01:27.223606 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_15: 0x0
9520 23:01:27.226685 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_0: 0xffffffff
9521 23:01:27.229778 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_1: 0xffffffff
9522 23:01:27.236688 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_2: 0xffffffff
9523 23:01:27.240000 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_3: 0xffffffff
9524 23:01:27.246535 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_4: 0xffffffff
9525 23:01:27.249980 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_5: 0xffffffff
9526 23:01:27.256370 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_6: 0xffffffff
9527 23:01:27.259879 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_7: 0xffffffff
9528 23:01:27.263342 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_8: 0xffffffff
9529 23:01:27.270161 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_9: 0xffffffff
9530 23:01:27.273072 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_10: 0xffffffff
9531 23:01:27.279516 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_11: 0xffffffff
9532 23:01:27.282810 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_12: 0xffffffff
9533 23:01:27.289335 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_13: 0xffffffff
9534 23:01:27.292868 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_14: 0xffffffff
9535 23:01:27.299354 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_15: 0xffffffff
9536 23:01:27.302881 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_0: 0xffffffff
9537 23:01:27.306246 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_1: 0xffffffff
9538 23:01:27.312899 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_2: 0xffffffff
9539 23:01:27.316287 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_3: 0xffffffff
9540 23:01:27.323054 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_4: 0xffffffff
9541 23:01:27.326210 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_5: 0xffffffff
9542 23:01:27.333296 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_6: 0xffffffff
9543 23:01:27.335877 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_7: 0xffffffff
9544 23:01:27.339525 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_8: 0xffffffff
9545 23:01:27.346263 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_9: 0xffffffff
9546 23:01:27.349456 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_10: 0xffffffff
9547 23:01:27.355948 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_11: 0xffffffff
9548 23:01:27.358934 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_12: 0xffffffff
9549 23:01:27.365866 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_13: 0xffffffff
9550 23:01:27.369442 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_14: 0xffffffff
9551 23:01:27.375756 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_15: 0xffffffff
9552 23:01:27.379009 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_0: 0xffffffff
9553 23:01:27.382732 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_1: 0xffffffff
9554 23:01:27.388989 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_2: 0xffffffff
9555 23:01:27.392394 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_3: 0xffffffff
9556 23:01:27.398924 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_4: 0xffffffff
9557 23:01:27.402584 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_5: 0xcfff30ff
9558 23:01:27.409138 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_6: 0xffffffff
9559 23:01:27.412528 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_7: 0xffffffff
9560 23:01:27.415521 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_8: 0xffffffff
9561 23:01:27.422110 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_9: 0xffffffff
9562 23:01:27.425474 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_10: 0xffffffff
9563 23:01:27.432464 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_11: 0xffffffff
9564 23:01:27.435459 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_12: 0xffffffff
9565 23:01:27.441894 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_13: 0xffffffff
9566 23:01:27.445267 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_14: 0xffffffff
9567 23:01:27.451574 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_15: 0xffffffff
9568 23:01:27.454908 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_0: 0x0
9569 23:01:27.458212 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_1: 0x0
9570 23:01:27.461588 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_2: 0x0
9571 23:01:27.468496 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_3: 0x0
9572 23:01:27.471454 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_4: 0x0
9573 23:01:27.474954 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_0: 0xffffffff
9574 23:01:27.481810 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_1: 0xffffffff
9575 23:01:27.484858 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_2: 0xffffffff
9576 23:01:27.491236 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_3: 0xffffffff
9577 23:01:27.494689 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_4: 0xfff
9578 23:01:27.498028 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_0: 0xffffffff
9579 23:01:27.504682 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_1: 0xffffffff
9580 23:01:27.508298 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_2: 0xffffffff
9581 23:01:27.514737 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_3: 0xffffffff
9582 23:01:27.517973 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_4: 0xfff
9583 23:01:27.521167 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_0: 0xffffffff
9584 23:01:27.527980 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_1: 0xffffffff
9585 23:01:27.531226 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_2: 0xffffffff
9586 23:01:27.537880 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_3: 0xffffffff
9587 23:01:27.541532 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_4: 0xfff
9588 23:01:27.545024 INFO: [DEVAPC] (INFRA_AO)MAS_SEC_0: 0x18
9589 23:01:27.551253 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_0: 0x10000000
9590 23:01:27.554603 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_1: 0x1000004
9591 23:01:27.557887 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_2: 0x0
9592 23:01:27.561023 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_3: 0x0
9593 23:01:27.567648 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_4: 0x0
9594 23:01:27.570979 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_5: 0x0
9595 23:01:27.574229 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_6: 0x10000
9596 23:01:27.581008 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_0: 0xffffffff
9597 23:01:27.584663 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_1: 0xffffffff
9598 23:01:27.587499 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_2: 0xffffffff
9599 23:01:27.594328 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_3: 0x3fffffff
9600 23:01:27.597455 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_4: 0xffffffff
9601 23:01:27.604054 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_5: 0xffffffff
9602 23:01:27.607559 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_6: 0x3ffff
9603 23:01:27.610652 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_0: 0xfffc03fc
9604 23:01:27.617838 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_1: 0xfff3ffff
9605 23:01:27.620748 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_2: 0xfffcfccf
9606 23:01:27.627650 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_3: 0xff3fffff
9607 23:01:27.630869 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_4: 0xffff3ffc
9608 23:01:27.634106 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_5: 0xffffffff
9609 23:01:27.640637 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_6: 0x3ffff
9610 23:01:27.643880 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_0: 0xff3f33ff
9611 23:01:27.647297 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_1: 0xffffffff
9612 23:01:27.654080 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_2: 0xffffffff
9613 23:01:27.657289 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_3: 0xffffffff
9614 23:01:27.664129 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_4: 0xffffffff
9615 23:01:27.667207 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_5: 0xffffffff
9616 23:01:27.670451 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_6: 0x3ffff
9617 23:01:27.677537 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_0: 0xffffffff
9618 23:01:27.680424 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_1: 0xffffffff
9619 23:01:27.687108 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_2: 0xffffffff
9620 23:01:27.690247 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_3: 0xffffffff
9621 23:01:27.693587 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_4: 0xffffffff
9622 23:01:27.700479 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_5: 0xffffffff
9623 23:01:27.703772 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_6: 0x3ffff
9624 23:01:27.710326 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_0: 0xffffffff
9625 23:01:27.713378 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_1: 0xffffffff
9626 23:01:27.716862 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_2: 0xffffffff
9627 23:01:27.723622 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_3: 0xffffffff
9628 23:01:27.726829 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_4: 0xffffffff
9629 23:01:27.733821 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_5: 0xffffffff
9630 23:01:27.736995 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_6: 0x3ffff
9631 23:01:27.740175 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_0: 0xffffffff
9632 23:01:27.746761 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_1: 0xffffffff
9633 23:01:27.750005 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_2: 0xffffffff
9634 23:01:27.756933 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_3: 0xffffffff
9635 23:01:27.760130 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_4: 0xffffffff
9636 23:01:27.763596 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_5: 0xffffffff
9637 23:01:27.769806 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_6: 0x3ffff
9638 23:01:27.772976 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_0: 0xffffffff
9639 23:01:27.779863 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_1: 0xffffffff
9640 23:01:27.782859 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_2: 0xffffffff
9641 23:01:27.786473 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_3: 0xffffffff
9642 23:01:27.793007 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_4: 0xffffffff
9643 23:01:27.796230 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_5: 0xffffffff
9644 23:01:27.799618 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_6: 0x3ffff
9645 23:01:27.806190 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_0: 0xfffff3ff
9646 23:01:27.809241 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_1: 0xffffffff
9647 23:01:27.815796 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_2: 0xffffffff
9648 23:01:27.819289 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_3: 0xffffffff
9649 23:01:27.825930 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_4: 0xffffffff
9650 23:01:27.829179 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_5: 0xffffffff
9651 23:01:27.832409 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_6: 0x3ffff
9652 23:01:27.839352 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_0: 0xffffffff
9653 23:01:27.842733 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_1: 0xffffffff
9654 23:01:27.848712 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_2: 0xffffffff
9655 23:01:27.852172 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_3: 0xffffffff
9656 23:01:27.855685 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_4: 0xffffffff
9657 23:01:27.861967 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_5: 0xffffffff
9658 23:01:27.865302 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_6: 0x3ffff
9659 23:01:27.871967 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_0: 0xffffffff
9660 23:01:27.875500 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_1: 0xffffffff
9661 23:01:27.878935 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_2: 0xffffffff
9662 23:01:27.885132 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_3: 0xffffffff
9663 23:01:27.888573 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_4: 0xffffffff
9664 23:01:27.895238 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_5: 0xffffffff
9665 23:01:27.898610 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_6: 0x3ffff
9666 23:01:27.901758 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_0: 0xffffffff
9667 23:01:27.908493 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_1: 0xffffffff
9668 23:01:27.911845 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_2: 0xffffffff
9669 23:01:27.918316 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_3: 0xffffffff
9670 23:01:27.921289 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_4: 0xffffffff
9671 23:01:27.928138 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_5: 0xffffffff
9672 23:01:27.931735 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_6: 0x3ffff
9673 23:01:27.934857 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_0: 0xffffffff
9674 23:01:27.941737 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_1: 0xffffffff
9675 23:01:27.944863 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_2: 0xffffffff
9676 23:01:27.951630 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_3: 0xffffffff
9677 23:01:27.954939 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_4: 0xffffffff
9678 23:01:27.960986 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_5: 0xffffffff
9679 23:01:27.964349 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_6: 0x3ffff
9680 23:01:27.967919 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_0: 0xffffffff
9681 23:01:27.974520 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_1: 0xffffffff
9682 23:01:27.978012 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_2: 0xffffffff
9683 23:01:27.984211 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_3: 0xffffffff
9684 23:01:27.987213 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_4: 0xffffffff
9685 23:01:27.993913 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_5: 0xffffffff
9686 23:01:27.997316 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_6: 0x3ffff
9687 23:01:28.000537 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_0: 0xffffffff
9688 23:01:28.007157 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_1: 0xffffffff
9689 23:01:28.010629 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_2: 0xffffffff
9690 23:01:28.016930 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_3: 0xffffffff
9691 23:01:28.020414 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_4: 0xffffffff
9692 23:01:28.026912 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_5: 0xffffffff
9693 23:01:28.030521 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_6: 0x3ffff
9694 23:01:28.033772 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_0: 0xffffffff
9695 23:01:28.040424 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_1: 0xffffffff
9696 23:01:28.043602 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_2: 0xffffffff
9697 23:01:28.050547 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_3: 0xffffffff
9698 23:01:28.053894 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_4: 0xffffffff
9699 23:01:28.060211 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_5: 0xffffffff
9700 23:01:28.063894 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_6: 0x3ffff
9701 23:01:28.067255 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_0: 0x0
9702 23:01:28.070605 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_1: 0x0
9703 23:01:28.076692 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_2: 0x0
9704 23:01:28.080485 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_3: 0x0
9705 23:01:28.083729 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_4: 0x0
9706 23:01:28.087033 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_0: 0xffffffff
9707 23:01:28.093726 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_1: 0xffffffff
9708 23:01:28.096893 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_2: 0xffffffff
9709 23:01:28.103770 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_3: 0xffffffff
9710 23:01:28.106806 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_4: 0xf
9711 23:01:28.110253 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_0: 0xffffffff
9712 23:01:28.116404 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_1: 0xffffffff
9713 23:01:28.119885 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_2: 0xffffffff
9714 23:01:28.126545 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_3: 0xffffffff
9715 23:01:28.129858 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_4: 0xf
9716 23:01:28.133059 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_0: 0xffffffff
9717 23:01:28.139526 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_1: 0xffffffff
9718 23:01:28.143037 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_2: 0xffffffff
9719 23:01:28.146299 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_3: 0xffffffff
9720 23:01:28.153166 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_4: 0xf
9721 23:01:28.156138 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_0: 0xffffffff
9722 23:01:28.158997 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_1: 0xffffffff
9723 23:01:28.166106 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_2: 0xffffffff
9724 23:01:28.169118 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_3: 0xffffffff
9725 23:01:28.172316 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_4: 0xf
9726 23:01:28.179065 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_0: 0xffffffff
9727 23:01:28.182502 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_1: 0xffffffff
9728 23:01:28.188892 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_2: 0xffffffff
9729 23:01:28.192054 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_3: 0xffffffff
9730 23:01:28.195460 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_4: 0xf
9731 23:01:28.202257 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_0: 0xffffffff
9732 23:01:28.205346 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_1: 0xffffffff
9733 23:01:28.211949 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_2: 0xffffffff
9734 23:01:28.215199 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_3: 0xffffffff
9735 23:01:28.218786 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_4: 0xf
9736 23:01:28.225502 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_0: 0xffffffff
9737 23:01:28.228403 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_1: 0xffffffff
9738 23:01:28.231946 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_2: 0xffffffff
9739 23:01:28.238202 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_3: 0xffffffff
9740 23:01:28.241561 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_4: 0xf
9741 23:01:28.245341 INFO: [DEVAPC] (PERI_AO_SYS2)D0_APC_0: 0x0
9742 23:01:28.251788 INFO: [DEVAPC] (PERI_AO_SYS2)D1_APC_0: 0x3
9743 23:01:28.254907 INFO: [DEVAPC] (PERI_AO_SYS2)D2_APC_0: 0x3
9744 23:01:28.257879 INFO: [DEVAPC] (PERI_AO_SYS2)D3_APC_0: 0x3
9745 23:01:28.261186 INFO: [DEVAPC] (PERI_AO)MAS_SEC_0: 0x0
9746 23:01:28.268015 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_0: 0x400400
9747 23:01:28.271438 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_1: 0x0
9748 23:01:28.274749 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_2: 0x0
9749 23:01:28.277970 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_3: 0x0
9750 23:01:28.284316 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_4: 0x0
9751 23:01:28.287914 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_5: 0x0
9752 23:01:28.291351 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_6: 0x140000
9753 23:01:28.294487 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_7: 0x0
9754 23:01:28.301100 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_0: 0xffffffff
9755 23:01:28.304604 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_1: 0xffffffff
9756 23:01:28.311163 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_2: 0xffffffff
9757 23:01:28.314435 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_3: 0xffffffff
9758 23:01:28.321061 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_4: 0xffffffff
9759 23:01:28.324458 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_5: 0xffffffff
9760 23:01:28.327582 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_6: 0xffffffff
9761 23:01:28.334206 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_7: 0x3f
9762 23:01:28.337930 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_0: 0xfffffff3
9763 23:01:28.344029 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_1: 0xffffefff
9764 23:01:28.347309 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_2: 0xffffffff
9765 23:01:28.353989 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_3: 0xffffffff
9766 23:01:28.357174 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_4: 0xffffffff
9767 23:01:28.360536 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_5: 0xcfffffff
9768 23:01:28.367396 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_6: 0xf3fcffff
9769 23:01:28.370687 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_7: 0x3f
9770 23:01:28.377064 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_0: 0xffffffff
9771 23:01:28.380441 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_1: 0xffffffff
9772 23:01:28.383693 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_2: 0xffffffff
9773 23:01:28.390388 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_3: 0xffffffff
9774 23:01:28.393779 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_4: 0xffffffff
9775 23:01:28.400417 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_5: 0xffffffff
9776 23:01:28.403323 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_6: 0xffffffff
9777 23:01:28.406686 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_7: 0x3f
9778 23:01:28.413330 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_0: 0xffffffff
9779 23:01:28.416682 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_1: 0xffffffff
9780 23:01:28.423078 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_2: 0xffffffff
9781 23:01:28.426771 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_3: 0xffffffff
9782 23:01:28.433075 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_4: 0xffffffff
9783 23:01:28.436676 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_5: 0xffffffff
9784 23:01:28.439515 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_6: 0xffffffff
9785 23:01:28.446419 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_7: 0x3f
9786 23:01:28.449786 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_0: 0xffffffff
9787 23:01:28.456417 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_1: 0xffffffff
9788 23:01:28.459877 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_2: 0xffffffff
9789 23:01:28.465734 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_3: 0xffffffff
9790 23:01:28.469349 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_4: 0xffffffff
9791 23:01:28.472798 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_5: 0xffffffff
9792 23:01:28.479537 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_6: 0xffffffff
9793 23:01:28.483175 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_7: 0x3f
9794 23:01:28.489224 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_0: 0xffffffff
9795 23:01:28.492359 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_1: 0xffffffff
9796 23:01:28.495798 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_2: 0xffffffff
9797 23:01:28.503010 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_3: 0xffffffff
9798 23:01:28.505623 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_4: 0xffffffff
9799 23:01:28.512662 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_5: 0xffffffff
9800 23:01:28.515780 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_6: 0xffffffff
9801 23:01:28.518767 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_7: 0x3f
9802 23:01:28.525471 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_0: 0xffffffff
9803 23:01:28.529020 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_1: 0xffffffff
9804 23:01:28.535329 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_2: 0xffffffff
9805 23:01:28.538549 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_3: 0xffffffff
9806 23:01:28.545371 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_4: 0xffffffff
9807 23:01:28.548409 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_5: 0xffffffff
9808 23:01:28.551756 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_6: 0xffffffff
9809 23:01:28.558435 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_7: 0x3f
9810 23:01:28.561797 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_0: 0xffffffff
9811 23:01:28.568558 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_1: 0xffffffff
9812 23:01:28.571770 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_2: 0xffffffff
9813 23:01:28.574811 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_3: 0xffffffff
9814 23:01:28.581749 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_4: 0xffffffff
9815 23:01:28.584623 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_5: 0xffffffff
9816 23:01:28.591597 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_6: 0xffffffff
9817 23:01:28.594990 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_7: 0x3f
9818 23:01:28.601401 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_0: 0xffffffff
9819 23:01:28.605123 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_1: 0xffffffff
9820 23:01:28.608112 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_2: 0xffffffff
9821 23:01:28.614655 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_3: 0xffffffff
9822 23:01:28.618114 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_4: 0xffffffff
9823 23:01:28.624519 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_5: 0xffffffff
9824 23:01:28.627469 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_6: 0xffffffff
9825 23:01:28.630839 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_7: 0x3f
9826 23:01:28.637567 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_0: 0xffffffff
9827 23:01:28.640937 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_1: 0xffffffff
9828 23:01:28.647752 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_2: 0xffffffff
9829 23:01:28.651052 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_3: 0xffffffff
9830 23:01:28.657600 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_4: 0xffffffff
9831 23:01:28.660757 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_5: 0xffffffff
9832 23:01:28.667223 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_6: 0xffffffff
9833 23:01:28.670760 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_7: 0x3f
9834 23:01:28.673905 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_0: 0xffffffff
9835 23:01:28.680644 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_1: 0xffffffff
9836 23:01:28.683708 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_2: 0xffffffff
9837 23:01:28.690334 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_3: 0xffffffff
9838 23:01:28.693859 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_4: 0xffffffff
9839 23:01:28.700072 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_5: 0xffffffff
9840 23:01:28.703395 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_6: 0xffffffff
9841 23:01:28.710348 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_7: 0x3f
9842 23:01:28.713425 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_0: 0xffffffff
9843 23:01:28.716990 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_1: 0xffffffff
9844 23:01:28.723443 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_2: 0xffffffff
9845 23:01:28.726766 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_3: 0xffffffff
9846 23:01:28.733471 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_4: 0xffffffff
9847 23:01:28.736983 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_5: 0xffffffff
9848 23:01:28.743554 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_6: 0xffffffff
9849 23:01:28.746424 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_7: 0x3f
9850 23:01:28.753029 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_0: 0xffffffff
9851 23:01:28.756461 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_1: 0xffffffff
9852 23:01:28.762871 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_2: 0xffffffff
9853 23:01:28.766358 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_3: 0xffffffff
9854 23:01:28.769365 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_4: 0xffffffff
9855 23:01:28.775812 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_5: 0xffffffff
9856 23:01:28.779085 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_6: 0xffffffff
9857 23:01:28.785637 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_7: 0x3f
9858 23:01:28.789024 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_0: 0xffffffff
9859 23:01:28.795998 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_1: 0xffffffff
9860 23:01:28.798733 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_2: 0xffffffff
9861 23:01:28.805676 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_3: 0xffffffff
9862 23:01:28.808830 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_4: 0xffffffff
9863 23:01:28.815430 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_5: 0xffffffff
9864 23:01:28.818714 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_6: 0xffffffff
9865 23:01:28.821985 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_7: 0x3f
9866 23:01:28.828986 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_0: 0xffffffff
9867 23:01:28.831900 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_1: 0xffffffff
9868 23:01:28.838554 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_2: 0xffffffff
9869 23:01:28.841720 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_3: 0xffffffff
9870 23:01:28.848539 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_4: 0xffffffff
9871 23:01:28.851946 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_5: 0xffffffff
9872 23:01:28.858080 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_6: 0xffffffff
9873 23:01:28.861621 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_7: 0x3f
9874 23:01:28.864691 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_0: 0x0
9875 23:01:28.871801 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_1: 0x10000
9876 23:01:28.874723 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_0: 0xffffffff
9877 23:01:28.881362 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_1: 0x3fffff
9878 23:01:28.884380 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_0: 0xffffcff3
9879 23:01:28.890804 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_1: 0x3fcfff
9880 23:01:28.894270 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_0: 0xffffffff
9881 23:01:28.900878 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_1: 0x3fffff
9882 23:01:28.904069 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_0: 0xffffffff
9883 23:01:28.911028 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_1: 0x3fffff
9884 23:01:28.914480 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_0: 0xffffffff
9885 23:01:28.921130 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_1: 0x3fffff
9886 23:01:28.924486 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_0: 0xffffffff
9887 23:01:28.927958 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_1: 0x3fffff
9888 23:01:28.934230 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_0: 0xffffffff
9889 23:01:28.937658 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_1: 0x3fffff
9890 23:01:28.944356 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_0: 0xffffffff
9891 23:01:28.947647 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_1: 0x3fffff
9892 23:01:28.954347 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_0: 0xffffffff
9893 23:01:28.957517 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_1: 0x3fffff
9894 23:01:28.964159 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_0: 0xffffffff
9895 23:01:28.967288 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_1: 0x3fffff
9896 23:01:28.973838 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_0: 0xffffffff
9897 23:01:28.977511 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_1: 0x3fffff
9898 23:01:28.983645 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_0: 0xffffffff
9899 23:01:28.986827 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_1: 0x3fffff
9900 23:01:28.993465 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_0: 0xffffffff
9901 23:01:28.997024 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_1: 0x3fffff
9902 23:01:29.003736 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_0: 0xffffffff
9903 23:01:29.010093 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_1: 0x3fffff
9904 23:01:29.013585 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_0: 0xffffffff
9905 23:01:29.020034 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_1: 0x3fffff
9906 23:01:29.023230 INFO: [DEVAPC] (PERI_PAR_AO)MAS_SEC_0: 0x0
9907 23:01:29.023803 INFO: [APUAPC] vio 0
9908 23:01:29.030555 INFO: [APUAPC] set_apusys_ao_apc - SUCCESS!
9909 23:01:29.034213 INFO: [APUAPC] set_apusys_noc_dapc - SUCCESS!
9910 23:01:29.037428 INFO: [APUAPC] D0_APC_0: 0x400510
9911 23:01:29.040761 INFO: [APUAPC] D0_APC_1: 0x0
9912 23:01:29.043908 INFO: [APUAPC] D0_APC_2: 0x1540
9913 23:01:29.047314 INFO: [APUAPC] D0_APC_3: 0x0
9914 23:01:29.050800 INFO: [APUAPC] D1_APC_0: 0xffffffff
9915 23:01:29.054105 INFO: [APUAPC] D1_APC_1: 0xffffffff
9916 23:01:29.057547 INFO: [APUAPC] D1_APC_2: 0x3fffff
9917 23:01:29.060564 INFO: [APUAPC] D1_APC_3: 0x0
9918 23:01:29.063666 INFO: [APUAPC] D2_APC_0: 0xffffffff
9919 23:01:29.067250 INFO: [APUAPC] D2_APC_1: 0xffffffff
9920 23:01:29.070230 INFO: [APUAPC] D2_APC_2: 0x3fffff
9921 23:01:29.073881 INFO: [APUAPC] D2_APC_3: 0x0
9922 23:01:29.076847 INFO: [APUAPC] D3_APC_0: 0xffffffff
9923 23:01:29.080252 INFO: [APUAPC] D3_APC_1: 0xffffffff
9924 23:01:29.083621 INFO: [APUAPC] D3_APC_2: 0x3fffff
9925 23:01:29.087001 INFO: [APUAPC] D3_APC_3: 0x0
9926 23:01:29.090050 INFO: [APUAPC] D4_APC_0: 0xffffffff
9927 23:01:29.093439 INFO: [APUAPC] D4_APC_1: 0xffffffff
9928 23:01:29.096851 INFO: [APUAPC] D4_APC_2: 0x3fffff
9929 23:01:29.100275 INFO: [APUAPC] D4_APC_3: 0x0
9930 23:01:29.103461 INFO: [APUAPC] D5_APC_0: 0xffffffff
9931 23:01:29.106602 INFO: [APUAPC] D5_APC_1: 0xffffffff
9932 23:01:29.110053 INFO: [APUAPC] D5_APC_2: 0x3fffff
9933 23:01:29.110535 INFO: [APUAPC] D5_APC_3: 0x0
9934 23:01:29.116553 INFO: [APUAPC] D6_APC_0: 0xffffffff
9935 23:01:29.119978 INFO: [APUAPC] D6_APC_1: 0xffffffff
9936 23:01:29.123304 INFO: [APUAPC] D6_APC_2: 0x3fffff
9937 23:01:29.123885 INFO: [APUAPC] D6_APC_3: 0x0
9938 23:01:29.126581 INFO: [APUAPC] D7_APC_0: 0xffffffff
9939 23:01:29.130233 INFO: [APUAPC] D7_APC_1: 0xffffffff
9940 23:01:29.133326 INFO: [APUAPC] D7_APC_2: 0x3fffff
9941 23:01:29.136821 INFO: [APUAPC] D7_APC_3: 0x0
9942 23:01:29.140393 INFO: [APUAPC] D8_APC_0: 0xffffffff
9943 23:01:29.143484 INFO: [APUAPC] D8_APC_1: 0xffffffff
9944 23:01:29.146511 INFO: [APUAPC] D8_APC_2: 0x3fffff
9945 23:01:29.149670 INFO: [APUAPC] D8_APC_3: 0x0
9946 23:01:29.153125 INFO: [APUAPC] D9_APC_0: 0xffffffff
9947 23:01:29.156890 INFO: [APUAPC] D9_APC_1: 0xffffffff
9948 23:01:29.159593 INFO: [APUAPC] D9_APC_2: 0x3fffff
9949 23:01:29.162845 INFO: [APUAPC] D9_APC_3: 0x0
9950 23:01:29.166362 INFO: [APUAPC] D10_APC_0: 0xffffffff
9951 23:01:29.169601 INFO: [APUAPC] D10_APC_1: 0xffffffff
9952 23:01:29.173222 INFO: [APUAPC] D10_APC_2: 0x3fffff
9953 23:01:29.176529 INFO: [APUAPC] D10_APC_3: 0x0
9954 23:01:29.179536 INFO: [APUAPC] D11_APC_0: 0xffffffff
9955 23:01:29.182507 INFO: [APUAPC] D11_APC_1: 0xffffffff
9956 23:01:29.186109 INFO: [APUAPC] D11_APC_2: 0x3fffff
9957 23:01:29.189099 INFO: [APUAPC] D11_APC_3: 0x0
9958 23:01:29.192629 INFO: [APUAPC] D12_APC_0: 0xffffffff
9959 23:01:29.195624 INFO: [APUAPC] D12_APC_1: 0xffffffff
9960 23:01:29.199203 INFO: [APUAPC] D12_APC_2: 0x3fffff
9961 23:01:29.202535 INFO: [APUAPC] D12_APC_3: 0x0
9962 23:01:29.205643 INFO: [APUAPC] D13_APC_0: 0xffffffff
9963 23:01:29.212159 INFO: [APUAPC] D13_APC_1: 0xffffffff
9964 23:01:29.215549 INFO: [APUAPC] D13_APC_2: 0x3fffff
9965 23:01:29.216034 INFO: [APUAPC] D13_APC_3: 0x0
9966 23:01:29.221931 INFO: [APUAPC] D14_APC_0: 0xffffffff
9967 23:01:29.225331 INFO: [APUAPC] D14_APC_1: 0xffffffff
9968 23:01:29.228801 INFO: [APUAPC] D14_APC_2: 0x3fffff
9969 23:01:29.232064 INFO: [APUAPC] D14_APC_3: 0x0
9970 23:01:29.235532 INFO: [APUAPC] D15_APC_0: 0xffffffff
9971 23:01:29.238638 INFO: [APUAPC] D15_APC_1: 0xffffffff
9972 23:01:29.241964 INFO: [APUAPC] D15_APC_2: 0x3fffff
9973 23:01:29.245201 INFO: [APUAPC] D15_APC_3: 0x0
9974 23:01:29.245678 INFO: [APUAPC] APC_CON: 0x4
9975 23:01:29.248286 INFO: [NOCDAPC] D0_APC_0: 0x0
9976 23:01:29.251976 INFO: [NOCDAPC] D0_APC_1: 0x0
9977 23:01:29.255162 INFO: [NOCDAPC] D1_APC_0: 0x0
9978 23:01:29.258571 INFO: [NOCDAPC] D1_APC_1: 0xfff
9979 23:01:29.261804 INFO: [NOCDAPC] D2_APC_0: 0x0
9980 23:01:29.265122 INFO: [NOCDAPC] D2_APC_1: 0xfff
9981 23:01:29.268510 INFO: [NOCDAPC] D3_APC_0: 0x0
9982 23:01:29.272001 INFO: [NOCDAPC] D3_APC_1: 0xfff
9983 23:01:29.272529 INFO: [NOCDAPC] D4_APC_0: 0x0
9984 23:01:29.275483 INFO: [NOCDAPC] D4_APC_1: 0xfff
9985 23:01:29.278388 INFO: [NOCDAPC] D5_APC_0: 0x0
9986 23:01:29.281543 INFO: [NOCDAPC] D5_APC_1: 0xfff
9987 23:01:29.285405 INFO: [NOCDAPC] D6_APC_0: 0x0
9988 23:01:29.288378 INFO: [NOCDAPC] D6_APC_1: 0xfff
9989 23:01:29.291460 INFO: [NOCDAPC] D7_APC_0: 0x0
9990 23:01:29.294916 INFO: [NOCDAPC] D7_APC_1: 0xfff
9991 23:01:29.298301 INFO: [NOCDAPC] D8_APC_0: 0x0
9992 23:01:29.301328 INFO: [NOCDAPC] D8_APC_1: 0xfff
9993 23:01:29.304565 INFO: [NOCDAPC] D9_APC_0: 0x0
9994 23:01:29.308117 INFO: [NOCDAPC] D9_APC_1: 0xfff
9995 23:01:29.308588 INFO: [NOCDAPC] D10_APC_0: 0x0
9996 23:01:29.311767 INFO: [NOCDAPC] D10_APC_1: 0xfff
9997 23:01:29.314488 INFO: [NOCDAPC] D11_APC_0: 0x0
9998 23:01:29.318140 INFO: [NOCDAPC] D11_APC_1: 0xfff
9999 23:01:29.321184 INFO: [NOCDAPC] D12_APC_0: 0x0
10000 23:01:29.324608 INFO: [NOCDAPC] D12_APC_1: 0xfff
10001 23:01:29.327559 INFO: [NOCDAPC] D13_APC_0: 0x0
10002 23:01:29.331102 INFO: [NOCDAPC] D13_APC_1: 0xfff
10003 23:01:29.334467 INFO: [NOCDAPC] D14_APC_0: 0x0
10004 23:01:29.337764 INFO: [NOCDAPC] D14_APC_1: 0xfff
10005 23:01:29.341194 INFO: [NOCDAPC] D15_APC_0: 0x0
10006 23:01:29.344334 INFO: [NOCDAPC] D15_APC_1: 0xfff
10007 23:01:29.347619 INFO: [NOCDAPC] APC_CON: 0x4
10008 23:01:29.351023 INFO: [APUAPC] set_apusys_apc done
10009 23:01:29.354642 INFO: [DEVAPC] devapc_init done
10010 23:01:29.357902 INFO: GICv3 without legacy support detected.
10011 23:01:29.360823 INFO: ARM GICv3 driver initialized in EL3
10012 23:01:29.364002 INFO: Maximum SPI INTID supported: 639
10013 23:01:29.370786 INFO: BL31: Initializing runtime services
10014 23:01:29.374043 WARNING: BL31: cortex_a55: CPU workaround for 1530923 was missing!
10015 23:01:29.377436 INFO: SPM: enable CPC mode
10016 23:01:29.383898 INFO: mcdi ready for mcusys-off-idle and system suspend
10017 23:01:29.387240 INFO: BL31: Preparing for EL3 exit to normal world
10018 23:01:29.390584 INFO: Entry point address = 0x80000000
10019 23:01:29.393527 INFO: SPSR = 0x8
10020 23:01:29.398943
10021 23:01:29.399519
10022 23:01:29.399905
10023 23:01:29.401767 Starting depthcharge on Spherion...
10024 23:01:29.402435
10025 23:01:29.402836 Wipe memory regions:
10026 23:01:29.403184
10027 23:01:29.405758 end: 2.2.3 depthcharge-start (duration 00:00:30) [common]
10028 23:01:29.406422 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
10029 23:01:29.406871 Setting prompt string to ['asurada:']
10030 23:01:29.407300 bootloader-commands: Wait for prompt ['asurada:'] (timeout 00:04:25)
10031 23:01:29.408067 [0x00000040000000, 0x00000054600000)
10032 23:01:29.527676
10033 23:01:29.528252 [0x00000054660000, 0x00000080000000)
10034 23:01:29.788530
10035 23:01:29.789139 [0x000000821a7280, 0x000000ffe64000)
10036 23:01:30.533027
10037 23:01:30.533553 [0x00000100000000, 0x00000240000000)
10038 23:01:32.423113
10039 23:01:32.426207 Initializing XHCI USB controller at 0x11200000.
10040 23:01:33.464141
10041 23:01:33.467327 [firmware-asurada-13885.B-collabora] Dec 7 2021 09:38:38
10042 23:01:33.467416
10043 23:01:33.467481
10044 23:01:33.467543
10045 23:01:33.467814 Setting prompt string to ['asurada:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10047 23:01:33.568176 asurada: tftpboot 192.168.201.1 10597706/tftp-deploy-cs7imoij/kernel/image.itb 10597706/tftp-deploy-cs7imoij/kernel/cmdline
10048 23:01:33.568345 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10049 23:01:33.568453 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:21)
10050 23:01:33.572749 tftpboot 192.168.201.1 10597706/tftp-deploy-cs7imoij/kernel/image.ittp-deploy-cs7imoij/kernel/cmdline
10051 23:01:33.572872
10052 23:01:33.572939 Waiting for link
10053 23:01:33.732954
10054 23:01:33.733092 R8152: Initializing
10055 23:01:33.733161
10056 23:01:33.736310 Version 9 (ocp_data = 6010)
10057 23:01:33.736394
10058 23:01:33.739808 R8152: Done initializing
10059 23:01:33.739892
10060 23:01:33.739958 Adding net device
10061 23:01:35.612224
10062 23:01:35.612381 done.
10063 23:01:35.612449
10064 23:01:35.612511 MAC: 00:e0:4c:72:2d:d6
10065 23:01:35.612572
10066 23:01:35.615642 Sending DHCP discover... done.
10067 23:01:35.615729
10068 23:01:35.618778 Waiting for reply... done.
10069 23:01:35.618862
10070 23:01:35.621975 Sending DHCP request... done.
10071 23:01:35.622063
10072 23:01:35.625744 Waiting for reply... done.
10073 23:01:35.625830
10074 23:01:35.625940 My ip is 192.168.201.21
10075 23:01:35.626040
10076 23:01:35.629101 The DHCP server ip is 192.168.201.1
10077 23:01:35.629187
10078 23:01:35.631996 TFTP server IP predefined by user: 192.168.201.1
10079 23:01:35.632083
10080 23:01:35.638642 Bootfile predefined by user: 10597706/tftp-deploy-cs7imoij/kernel/image.itb
10081 23:01:35.642034
10082 23:01:35.642120 Sending tftp read request... done.
10083 23:01:35.642205
10084 23:01:35.645017 Waiting for the transfer...
10085 23:01:35.645106
10086 23:01:35.916628 00000000 ################################################################
10087 23:01:35.916790
10088 23:01:36.170474 00080000 ################################################################
10089 23:01:36.170629
10090 23:01:36.435117 00100000 ################################################################
10091 23:01:36.435269
10092 23:01:36.708880 00180000 ################################################################
10093 23:01:36.709028
10094 23:01:36.957921 00200000 ################################################################
10095 23:01:36.958094
10096 23:01:37.207778 00280000 ################################################################
10097 23:01:37.207918
10098 23:01:37.466966 00300000 ################################################################
10099 23:01:37.467115
10100 23:01:37.716039 00380000 ################################################################
10101 23:01:37.716188
10102 23:01:38.000084 00400000 ################################################################
10103 23:01:38.000237
10104 23:01:38.247900 00480000 ################################################################
10105 23:01:38.248060
10106 23:01:38.503228 00500000 ################################################################
10107 23:01:38.503377
10108 23:01:38.781143 00580000 ################################################################
10109 23:01:38.781297
10110 23:01:39.089961 00600000 ################################################################
10111 23:01:39.090118
10112 23:01:39.345096 00680000 ################################################################
10113 23:01:39.345249
10114 23:01:39.599033 00700000 ################################################################
10115 23:01:39.599180
10116 23:01:39.858542 00780000 ################################################################
10117 23:01:39.858717
10118 23:01:40.124662 00800000 ################################################################
10119 23:01:40.124829
10120 23:01:40.399198 00880000 ################################################################
10121 23:01:40.399352
10122 23:01:40.673456 00900000 ################################################################
10123 23:01:40.673607
10124 23:01:40.946889 00980000 ################################################################
10125 23:01:40.947044
10126 23:01:41.212032 00a00000 ################################################################
10127 23:01:41.212211
10128 23:01:41.464279 00a80000 ################################################################
10129 23:01:41.464424
10130 23:01:41.720428 00b00000 ################################################################
10131 23:01:41.720605
10132 23:01:41.999576 00b80000 ################################################################
10133 23:01:41.999732
10134 23:01:42.253706 00c00000 ################################################################
10135 23:01:42.253870
10136 23:01:42.509589 00c80000 ################################################################
10137 23:01:42.509739
10138 23:01:42.761494 00d00000 ################################################################
10139 23:01:42.761675
10140 23:01:43.010725 00d80000 ################################################################
10141 23:01:43.010912
10142 23:01:43.258341 00e00000 ################################################################
10143 23:01:43.258489
10144 23:01:43.511382 00e80000 ################################################################
10145 23:01:43.511529
10146 23:01:43.766784 00f00000 ################################################################
10147 23:01:43.766932
10148 23:01:44.034231 00f80000 ################################################################
10149 23:01:44.034410
10150 23:01:44.292022 01000000 ################################################################
10151 23:01:44.292197
10152 23:01:44.551611 01080000 ################################################################
10153 23:01:44.551774
10154 23:01:44.799905 01100000 ################################################################
10155 23:01:44.800061
10156 23:01:45.062461 01180000 ################################################################
10157 23:01:45.062613
10158 23:01:45.321623 01200000 ################################################################
10159 23:01:45.321779
10160 23:01:45.587512 01280000 ################################################################
10161 23:01:45.587674
10162 23:01:45.868636 01300000 ################################################################
10163 23:01:45.868832
10164 23:01:46.138349 01380000 ################################################################
10165 23:01:46.138495
10166 23:01:46.410079 01400000 ################################################################
10167 23:01:46.410233
10168 23:01:46.666437 01480000 ################################################################
10169 23:01:46.666590
10170 23:01:46.928641 01500000 ################################################################
10171 23:01:46.928834
10172 23:01:47.180978 01580000 ################################################################
10173 23:01:47.181177
10174 23:01:47.429809 01600000 ################################################################
10175 23:01:47.429961
10176 23:01:47.694938 01680000 ################################################################
10177 23:01:47.695120
10178 23:01:47.945504 01700000 ################################################################
10179 23:01:47.945666
10180 23:01:48.205250 01780000 ################################################################
10181 23:01:48.205407
10182 23:01:48.518824 01800000 ################################################################
10183 23:01:48.518975
10184 23:01:48.767626 01880000 ################################################################
10185 23:01:48.767780
10186 23:01:49.039050 01900000 ################################################################
10187 23:01:49.039210
10188 23:01:49.287401 01980000 ################################################################
10189 23:01:49.287585
10190 23:01:49.567916 01a00000 ################################################################
10191 23:01:49.568067
10192 23:01:49.860959 01a80000 ################################################################
10193 23:01:49.861109
10194 23:01:50.155094 01b00000 ################################################################
10195 23:01:50.155244
10196 23:01:50.449746 01b80000 ################################################################
10197 23:01:50.449895
10198 23:01:50.737632 01c00000 ################################################################
10199 23:01:50.737780
10200 23:01:51.015768 01c80000 ################################################################
10201 23:01:51.015914
10202 23:01:51.294187 01d00000 ################################################################
10203 23:01:51.294335
10204 23:01:51.563369 01d80000 ################################################################
10205 23:01:51.563548
10206 23:01:51.812129 01e00000 ################################################################
10207 23:01:51.812286
10208 23:01:52.060385 01e80000 ################################################################
10209 23:01:52.060530
10210 23:01:52.310214 01f00000 ################################################################
10211 23:01:52.310360
10212 23:01:52.601222 01f80000 ################################################################
10213 23:01:52.601372
10214 23:01:52.871530 02000000 ################################################################
10215 23:01:52.871697
10216 23:01:53.126918 02080000 ################################################################
10217 23:01:53.127065
10218 23:01:53.390731 02100000 ################################################################
10219 23:01:53.390889
10220 23:01:53.675093 02180000 ################################################################
10221 23:01:53.675242
10222 23:01:53.954652 02200000 ################################################################
10223 23:01:53.954834
10224 23:01:54.206552 02280000 ################################################################
10225 23:01:54.206704
10226 23:01:54.454724 02300000 ################################################################
10227 23:01:54.454871
10228 23:01:54.709964 02380000 ################################################################
10229 23:01:54.710112
10230 23:01:54.980623 02400000 ################################################################
10231 23:01:54.980793
10232 23:01:55.259840 02480000 ################################################################
10233 23:01:55.259989
10234 23:01:55.551649 02500000 ################################################################
10235 23:01:55.551799
10236 23:01:55.847007 02580000 ################################################################
10237 23:01:55.847149
10238 23:01:56.141081 02600000 ################################################################
10239 23:01:56.141238
10240 23:01:56.425350 02680000 ################################################################
10241 23:01:56.425561
10242 23:01:56.704651 02700000 ################################################################
10243 23:01:56.704883
10244 23:01:56.988276 02780000 ################################################################
10245 23:01:56.988481
10246 23:01:57.278811 02800000 ################################################################
10247 23:01:57.279006
10248 23:01:57.552191 02880000 ################################################################
10249 23:01:57.552353
10250 23:01:57.801407 02900000 ################################################################
10251 23:01:57.801550
10252 23:01:58.048205 02980000 ################################################################
10253 23:01:58.048357
10254 23:01:58.296769 02a00000 ################################################################
10255 23:01:58.296935
10256 23:01:58.560960 02a80000 ################################################################
10257 23:01:58.561111
10258 23:01:58.855974 02b00000 ################################################################
10259 23:01:58.856122
10260 23:01:59.149849 02b80000 ################################################################
10261 23:01:59.149999
10262 23:01:59.443186 02c00000 ################################################################
10263 23:01:59.443335
10264 23:01:59.732100 02c80000 ################################################################
10265 23:01:59.732285
10266 23:01:59.998281 02d00000 ################################################################
10267 23:01:59.998478
10268 23:02:00.269064 02d80000 ################################################################
10269 23:02:00.269226
10270 23:02:00.576760 02e00000 ################################################################
10271 23:02:00.576957
10272 23:02:00.924601 02e80000 ################################################################
10273 23:02:00.924792
10274 23:02:01.269670 02f00000 ################################################################
10275 23:02:01.269841
10276 23:02:01.612741 02f80000 ################################################################
10277 23:02:01.612969
10278 23:02:01.928828 03000000 ################################################################
10279 23:02:01.929014
10280 23:02:02.214362 03080000 ################################################################
10281 23:02:02.214527
10282 23:02:02.504612 03100000 ################################################################
10283 23:02:02.504778
10284 23:02:02.792101 03180000 ################################################################
10285 23:02:02.792262
10286 23:02:03.065017 03200000 ################################################################
10287 23:02:03.065186
10288 23:02:03.334627 03280000 ################################################################
10289 23:02:03.334789
10290 23:02:03.614933 03300000 ################################################################
10291 23:02:03.615094
10292 23:02:03.882157 03380000 ################################################################
10293 23:02:03.882313
10294 23:02:04.122948 03400000 ################################################################
10295 23:02:04.123164
10296 23:02:04.364792 03480000 ################################################################
10297 23:02:04.364964
10298 23:02:04.641869 03500000 ################################################################
10299 23:02:04.642028
10300 23:02:04.922235 03580000 ################################################################
10301 23:02:04.922428
10302 23:02:05.187212 03600000 ################################################################
10303 23:02:05.187369
10304 23:02:05.448067 03680000 ################################################################
10305 23:02:05.448228
10306 23:02:05.714972 03700000 ################################################################
10307 23:02:05.715127
10308 23:02:05.971504 03780000 ################################################################
10309 23:02:05.971699
10310 23:02:06.228368 03800000 ################################################################
10311 23:02:06.228522
10312 23:02:06.482885 03880000 ################################################################
10313 23:02:06.483074
10314 23:02:06.737402 03900000 ################################################################
10315 23:02:06.737555
10316 23:02:06.988230 03980000 ################################################################
10317 23:02:06.988387
10318 23:02:07.245919 03a00000 ################################################################
10319 23:02:07.246087
10320 23:02:07.503403 03a80000 ################################################################
10321 23:02:07.503557
10322 23:02:07.762858 03b00000 ################################################################
10323 23:02:07.763015
10324 23:02:08.017606 03b80000 ################################################################
10325 23:02:08.017769
10326 23:02:08.265800 03c00000 ################################################################
10327 23:02:08.265973
10328 23:02:08.526610 03c80000 ################################################################
10329 23:02:08.526767
10330 23:02:08.784497 03d00000 ################################################################
10331 23:02:08.784654
10332 23:02:09.056281 03d80000 ################################################################
10333 23:02:09.056469
10334 23:02:09.326907 03e00000 ################################################################
10335 23:02:09.327065
10336 23:02:09.604602 03e80000 ################################################################
10337 23:02:09.604815
10338 23:02:09.856447 03f00000 ########################################################## done.
10339 23:02:09.856598
10340 23:02:09.859285 The bootfile was 66530166 bytes long.
10341 23:02:09.859374
10342 23:02:09.862693 Sending tftp read request... done.
10343 23:02:09.862780
10344 23:02:09.866088 Waiting for the transfer...
10345 23:02:09.866185
10346 23:02:09.866255 00000000 # done.
10347 23:02:09.866321
10348 23:02:09.875905 Command line loaded dynamically from TFTP file: 10597706/tftp-deploy-cs7imoij/kernel/cmdline
10349 23:02:09.875996
10350 23:02:09.885836 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10351 23:02:09.885937
10352 23:02:09.889176 Loading FIT.
10353 23:02:09.889262
10354 23:02:09.892463 Image ramdisk-1 has 56395264 bytes.
10355 23:02:09.892550
10356 23:02:09.892630 Image fdt-1 has 46924 bytes.
10357 23:02:09.892694
10358 23:02:09.895947 Image kernel-1 has 10085945 bytes.
10359 23:02:09.896033
10360 23:02:09.905529 Compat preference: google,spherion-rev2-sku1 google,spherion-rev2 google,spherion-sku1 google,spherion
10361 23:02:09.905617
10362 23:02:09.922037 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,spherion-rev3 google,spherion-rev2 (match) google,spherion-rev1 google,spherion-rev0 google,spherion mediatek,mt8192
10363 23:02:09.922137
10364 23:02:09.928653 Choosing best match conf-1 for compat google,spherion-rev2.
10365 23:02:09.932557
10366 23:02:09.936635 Connected to device vid:did:rid of 1ae0:0028:00
10367 23:02:09.943774
10368 23:02:09.947230 tpm_get_response: command 0x17b, return code 0x0
10369 23:02:09.947318
10370 23:02:09.953918 ec_init: CrosEC protocol v3 supported (256, 248)
10371 23:02:09.954004
10372 23:02:09.957027 tpm_cleanup: add release locality here.
10373 23:02:09.957114
10374 23:02:09.960335 Shutting down all USB controllers.
10375 23:02:09.960421
10376 23:02:09.963654 Removing current net device
10377 23:02:09.963740
10378 23:02:09.966932 Exiting depthcharge with code 4 at timestamp: 69866934
10379 23:02:09.970605
10380 23:02:09.973782 LZMA decompressing kernel-1 to 0x821a6718
10381 23:02:09.973869
10382 23:02:09.976998 LZMA decompressing kernel-1 to 0x40000000
10383 23:02:11.243296
10384 23:02:11.243448 jumping to kernel
10385 23:02:11.243883 end: 2.2.4 bootloader-commands (duration 00:00:42) [common]
10386 23:02:11.243999 start: 2.2.5 auto-login-action (timeout 00:03:43) [common]
10387 23:02:11.244092 Setting prompt string to ['Linux version [0-9]']
10388 23:02:11.244162 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10389 23:02:11.244234 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
10390 23:02:11.325041
10391 23:02:11.328347 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050]
10392 23:02:11.331804 start: 2.2.5.1 login-action (timeout 00:03:43) [common]
10393 23:02:11.331898 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
10394 23:02:11.331989 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
10395 23:02:11.332068 Using line separator: #'\n'#
10396 23:02:11.332132 No login prompt set.
10397 23:02:11.332197 Parsing kernel messages
10398 23:02:11.332255 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
10399 23:02:11.332360 [login-action] Waiting for messages, (timeout 00:03:43)
10400 23:02:11.351404 [ 0.000000] Linux version 6.1.31 (KernelCI@build-j1612582-arm64-gcc-10-defconfig-arm64-chromebook-7xwc5) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Mon Jun 5 22:41:02 UTC 2023
10401 23:02:11.354815 [ 0.000000] random: crng init done
10402 23:02:11.361525 [ 0.000000] Machine model: Google Spherion (rev0 - 3)
10403 23:02:11.364568 [ 0.000000] efi: UEFI not found.
10404 23:02:11.371750 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
10405 23:02:11.378095 [ 0.000000] OF: reserved mem: initialized node scp@50000000, compatible id shared-dma-pool
10406 23:02:11.387726 [ 0.000000] software IO TLB: Reserved memory: created restricted DMA pool at 0x00000000c0000000, size 64 MiB
10407 23:02:11.398205 [ 0.000000] OF: reserved mem: initialized node wifi@c0000000, compatible id restricted-dma-pool
10408 23:02:11.404811 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
10409 23:02:11.410941 [ 0.000000] printk: bootconsole [mtk8250] enabled
10410 23:02:11.417679 [ 0.000000] NUMA: No NUMA configuration found
10411 23:02:11.424123 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000023fffffff]
10412 23:02:11.427949 [ 0.000000] NUMA: NODE_DATA [mem 0x23efcda00-0x23efcffff]
10413 23:02:11.431004 [ 0.000000] Zone ranges:
10414 23:02:11.437375 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
10415 23:02:11.441037 [ 0.000000] DMA32 empty
10416 23:02:11.447589 [ 0.000000] Normal [mem 0x0000000100000000-0x000000023fffffff]
10417 23:02:11.450701 [ 0.000000] Movable zone start for each node
10418 23:02:11.453738 [ 0.000000] Early memory node ranges
10419 23:02:11.460363 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
10420 23:02:11.466981 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
10421 23:02:11.473434 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
10422 23:02:11.480309 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
10423 23:02:11.486528 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000023fffffff]
10424 23:02:11.493208 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000023fffffff]
10425 23:02:11.549379 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
10426 23:02:11.555935 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
10427 23:02:11.562447 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
10428 23:02:11.565682 [ 0.000000] psci: probing for conduit method from DT.
10429 23:02:11.572477 [ 0.000000] psci: PSCIv1.1 detected in firmware.
10430 23:02:11.575881 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
10431 23:02:11.582363 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
10432 23:02:11.585938 [ 0.000000] psci: SMC Calling Convention v1.2
10433 23:02:11.592227 [ 0.000000] percpu: Embedded 21 pages/cpu s45224 r8192 d32600 u86016
10434 23:02:11.595694 [ 0.000000] Detected VIPT I-cache on CPU0
10435 23:02:11.602350 [ 0.000000] CPU features: detected: GIC system register CPU interface
10436 23:02:11.608864 [ 0.000000] CPU features: detected: Virtualization Host Extensions
10437 23:02:11.615555 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
10438 23:02:11.621817 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
10439 23:02:11.631903 [ 0.000000] CPU features: detected: Qualcomm erratum 1009, or ARM erratum 1286807, 2441009
10440 23:02:11.638551 [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
10441 23:02:11.641926 [ 0.000000] alternatives: applying boot alternatives
10442 23:02:11.648628 [ 0.000000] Fallback order for Node 0: 0
10443 23:02:11.655061 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2063616
10444 23:02:11.658431 [ 0.000000] Policy zone: Normal
10445 23:02:11.668052 [ 0.000000] Kernel command line: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10446 23:02:11.681170 <5>[ 0.000000] Unknown kernel command line parameters "tftpserverip=192.168.201.1", will be passed to user space.
10447 23:02:11.691222 <6>[ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
10448 23:02:11.701591 <6>[ 0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
10449 23:02:11.707808 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
10450 23:02:11.711027 <6>[ 0.000000] software IO TLB: area num 8.
10451 23:02:11.768015 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
10452 23:02:11.916951 <6>[ 0.000000] Memory: 7917868K/8385536K available (17984K kernel code, 4098K rwdata, 14068K rodata, 8384K init, 615K bss, 434900K reserved, 32768K cma-reserved)
10453 23:02:11.923705 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
10454 23:02:11.930619 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
10455 23:02:11.933569 <6>[ 0.000000] rcu: RCU event tracing is enabled.
10456 23:02:11.939885 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
10457 23:02:11.946352 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
10458 23:02:11.950218 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
10459 23:02:11.960042 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
10460 23:02:11.966229 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
10461 23:02:11.972977 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
10462 23:02:11.979697 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
10463 23:02:11.983002 <6>[ 0.000000] GICv3: 608 SPIs implemented
10464 23:02:11.986407 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
10465 23:02:11.992984 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
10466 23:02:11.996145 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
10467 23:02:12.002702 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c040000
10468 23:02:12.016119 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@100[1] /cpus/cpu@200[2] /cpus/cpu@300[3] }
10469 23:02:12.029214 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@400[4] /cpus/cpu@500[5] /cpus/cpu@600[6] /cpus/cpu@700[7] }
10470 23:02:12.035574 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
10471 23:02:12.044164 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
10472 23:02:12.056893 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
10473 23:02:12.063053 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
10474 23:02:12.070501 <6>[ 0.009227] Console: colour dummy device 80x25
10475 23:02:12.080429 <6>[ 0.013982] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
10476 23:02:12.086876 <6>[ 0.024424] pid_max: default: 32768 minimum: 301
10477 23:02:12.090413 <6>[ 0.029328] LSM: Security Framework initializing
10478 23:02:12.096588 <6>[ 0.034226] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
10479 23:02:12.106487 <6>[ 0.042039] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
10480 23:02:12.113192 <6>[ 0.051401] cblist_init_generic: Setting adjustable number of callback queues.
10481 23:02:12.119765 <6>[ 0.058857] cblist_init_generic: Setting shift to 3 and lim to 1.
10482 23:02:12.126841 <6>[ 0.065197] cblist_init_generic: Setting shift to 3 and lim to 1.
10483 23:02:12.133507 <6>[ 0.071644] rcu: Hierarchical SRCU implementation.
10484 23:02:12.139836 <6>[ 0.076689] rcu: Max phase no-delay instances is 1000.
10485 23:02:12.142866 <6>[ 0.083712] EFI services will not be available.
10486 23:02:12.150065 <6>[ 0.088684] smp: Bringing up secondary CPUs ...
10487 23:02:12.157560 <6>[ 0.093740] Detected VIPT I-cache on CPU1
10488 23:02:12.164065 <6>[ 0.093811] GICv3: CPU1: found redistributor 100 region 0:0x000000000c060000
10489 23:02:12.170656 <6>[ 0.093840] CPU1: Booted secondary processor 0x0000000100 [0x412fd050]
10490 23:02:12.173836 <6>[ 0.094174] Detected VIPT I-cache on CPU2
10491 23:02:12.183319 <6>[ 0.094230] GICv3: CPU2: found redistributor 200 region 0:0x000000000c080000
10492 23:02:12.190313 <6>[ 0.094248] CPU2: Booted secondary processor 0x0000000200 [0x412fd050]
10493 23:02:12.193468 <6>[ 0.094506] Detected VIPT I-cache on CPU3
10494 23:02:12.200360 <6>[ 0.094553] GICv3: CPU3: found redistributor 300 region 0:0x000000000c0a0000
10495 23:02:12.206915 <6>[ 0.094567] CPU3: Booted secondary processor 0x0000000300 [0x412fd050]
10496 23:02:12.213278 <6>[ 0.094876] CPU features: detected: Spectre-v4
10497 23:02:12.216310 <6>[ 0.094882] CPU features: detected: Spectre-BHB
10498 23:02:12.219897 <6>[ 0.094888] Detected PIPT I-cache on CPU4
10499 23:02:12.226609 <6>[ 0.094947] GICv3: CPU4: found redistributor 400 region 0:0x000000000c0c0000
10500 23:02:12.236741 <6>[ 0.094963] CPU4: Booted secondary processor 0x0000000400 [0x414fd0b0]
10501 23:02:12.239808 <6>[ 0.095260] Detected PIPT I-cache on CPU5
10502 23:02:12.246205 <6>[ 0.095323] GICv3: CPU5: found redistributor 500 region 0:0x000000000c0e0000
10503 23:02:12.252663 <6>[ 0.095340] CPU5: Booted secondary processor 0x0000000500 [0x414fd0b0]
10504 23:02:12.256153 <6>[ 0.095624] Detected PIPT I-cache on CPU6
10505 23:02:12.266149 <6>[ 0.095688] GICv3: CPU6: found redistributor 600 region 0:0x000000000c100000
10506 23:02:12.272708 <6>[ 0.095705] CPU6: Booted secondary processor 0x0000000600 [0x414fd0b0]
10507 23:02:12.276232 <6>[ 0.096013] Detected PIPT I-cache on CPU7
10508 23:02:12.282300 <6>[ 0.096079] GICv3: CPU7: found redistributor 700 region 0:0x000000000c120000
10509 23:02:12.288981 <6>[ 0.096095] CPU7: Booted secondary processor 0x0000000700 [0x414fd0b0]
10510 23:02:12.292353 <6>[ 0.096142] smp: Brought up 1 node, 8 CPUs
10511 23:02:12.298746 <6>[ 0.237588] SMP: Total of 8 processors activated.
10512 23:02:12.305363 <6>[ 0.242509] CPU features: detected: 32-bit EL0 Support
10513 23:02:12.311946 <6>[ 0.247873] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
10514 23:02:12.318624 <6>[ 0.256673] CPU features: detected: Common not Private translations
10515 23:02:12.325273 <6>[ 0.263149] CPU features: detected: CRC32 instructions
10516 23:02:12.332019 <6>[ 0.268500] CPU features: detected: RCpc load-acquire (LDAPR)
10517 23:02:12.335422 <6>[ 0.274460] CPU features: detected: LSE atomic instructions
10518 23:02:12.341979 <6>[ 0.280277] CPU features: detected: Privileged Access Never
10519 23:02:12.348578 <6>[ 0.286057] CPU features: detected: RAS Extension Support
10520 23:02:12.355376 <6>[ 0.291665] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
10521 23:02:12.358734 <6>[ 0.298884] CPU: All CPU(s) started at EL2
10522 23:02:12.364850 <6>[ 0.303200] alternatives: applying system-wide alternatives
10523 23:02:12.374947 <6>[ 0.313932] devtmpfs: initialized
10524 23:02:12.390383 <6>[ 0.322656] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
10525 23:02:12.397368 <6>[ 0.332619] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
10526 23:02:12.403924 <6>[ 0.340630] pinctrl core: initialized pinctrl subsystem
10527 23:02:12.407298 <6>[ 0.347255] DMI not present or invalid.
10528 23:02:12.413741 <6>[ 0.351663] NET: Registered PF_NETLINK/PF_ROUTE protocol family
10529 23:02:12.423154 <6>[ 0.358508] DMA: preallocated 1024 KiB GFP_KERNEL pool for atomic allocations
10530 23:02:12.429893 <6>[ 0.366082] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
10531 23:02:12.440211 <6>[ 0.374297] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
10532 23:02:12.443360 <6>[ 0.382538] audit: initializing netlink subsys (disabled)
10533 23:02:12.453118 <5>[ 0.388233] audit: type=2000 audit(0.276:1): state=initialized audit_enabled=0 res=1
10534 23:02:12.459729 <6>[ 0.388935] thermal_sys: Registered thermal governor 'step_wise'
10535 23:02:12.466826 <6>[ 0.396197] thermal_sys: Registered thermal governor 'power_allocator'
10536 23:02:12.469488 <6>[ 0.402451] cpuidle: using governor menu
10537 23:02:12.476528 <6>[ 0.413410] NET: Registered PF_QIPCRTR protocol family
10538 23:02:12.482697 <6>[ 0.418885] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
10539 23:02:12.489417 <6>[ 0.425988] ASID allocator initialised with 32768 entries
10540 23:02:12.492832 <6>[ 0.432547] Serial: AMBA PL011 UART driver
10541 23:02:12.502687 <4>[ 0.441141] Trying to register duplicate clock ID: 134
10542 23:02:12.555329 <6>[ 0.498137] KASLR enabled
10543 23:02:12.569855 <6>[ 0.505853] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
10544 23:02:12.576684 <6>[ 0.512864] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
10545 23:02:12.582950 <6>[ 0.519355] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
10546 23:02:12.589312 <6>[ 0.526360] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
10547 23:02:12.596100 <6>[ 0.532847] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
10548 23:02:12.602530 <6>[ 0.539851] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
10549 23:02:12.609102 <6>[ 0.546338] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
10550 23:02:12.615517 <6>[ 0.553341] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
10551 23:02:12.618957 <6>[ 0.560841] ACPI: Interpreter disabled.
10552 23:02:12.627806 <6>[ 0.567221] iommu: Default domain type: Translated
10553 23:02:12.634677 <6>[ 0.572334] iommu: DMA domain TLB invalidation policy: strict mode
10554 23:02:12.637870 <5>[ 0.578988] SCSI subsystem initialized
10555 23:02:12.644400 <6>[ 0.583154] usbcore: registered new interface driver usbfs
10556 23:02:12.650768 <6>[ 0.588889] usbcore: registered new interface driver hub
10557 23:02:12.653841 <6>[ 0.594442] usbcore: registered new device driver usb
10558 23:02:12.661073 <6>[ 0.600529] pps_core: LinuxPPS API ver. 1 registered
10559 23:02:12.671078 <6>[ 0.605722] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
10560 23:02:12.674528 <6>[ 0.615070] PTP clock support registered
10561 23:02:12.677377 <6>[ 0.619312] EDAC MC: Ver: 3.0.0
10562 23:02:12.685215 <6>[ 0.624441] FPGA manager framework
10563 23:02:12.691507 <6>[ 0.628122] Advanced Linux Sound Architecture Driver Initialized.
10564 23:02:12.694772 <6>[ 0.634882] vgaarb: loaded
10565 23:02:12.701166 <6>[ 0.638051] clocksource: Switched to clocksource arch_sys_counter
10566 23:02:12.704562 <5>[ 0.644492] VFS: Disk quotas dquot_6.6.0
10567 23:02:12.711445 <6>[ 0.648674] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
10568 23:02:12.714355 <6>[ 0.655859] pnp: PnP ACPI: disabled
10569 23:02:12.722844 <6>[ 0.662584] NET: Registered PF_INET protocol family
10570 23:02:12.732665 <6>[ 0.668177] IP idents hash table entries: 131072 (order: 8, 1048576 bytes, linear)
10571 23:02:12.744445 <6>[ 0.680484] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes, linear)
10572 23:02:12.753925 <6>[ 0.689300] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
10573 23:02:12.760751 <6>[ 0.697269] TCP established hash table entries: 65536 (order: 7, 524288 bytes, linear)
10574 23:02:12.770974 <6>[ 0.705966] TCP bind hash table entries: 65536 (order: 9, 2097152 bytes, linear)
10575 23:02:12.777833 <6>[ 0.715712] TCP: Hash tables configured (established 65536 bind 65536)
10576 23:02:12.784963 <6>[ 0.722569] UDP hash table entries: 4096 (order: 5, 131072 bytes, linear)
10577 23:02:12.794426 <6>[ 0.729766] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes, linear)
10578 23:02:12.800630 <6>[ 0.737469] NET: Registered PF_UNIX/PF_LOCAL protocol family
10579 23:02:12.807687 <6>[ 0.743635] RPC: Registered named UNIX socket transport module.
10580 23:02:12.810445 <6>[ 0.749791] RPC: Registered udp transport module.
10581 23:02:12.817371 <6>[ 0.754726] RPC: Registered tcp transport module.
10582 23:02:12.823699 <6>[ 0.759657] RPC: Registered tcp NFSv4.1 backchannel transport module.
10583 23:02:12.827220 <6>[ 0.766323] PCI: CLS 0 bytes, default 64
10584 23:02:12.830116 <6>[ 0.770665] Unpacking initramfs...
10585 23:02:12.840330 <6>[ 0.774780] hw perfevents: enabled with armv8_cortex_a55 PMU driver, 7 counters available
10586 23:02:12.846699 <6>[ 0.783412] hw perfevents: enabled with armv8_cortex_a76 PMU driver, 7 counters available
10587 23:02:12.853255 <6>[ 0.792250] kvm [1]: IPA Size Limit: 40 bits
10588 23:02:12.856811 <6>[ 0.796772] kvm [1]: GICv3: no GICV resource entry
10589 23:02:12.863134 <6>[ 0.801791] kvm [1]: disabling GICv2 emulation
10590 23:02:12.870092 <6>[ 0.806476] kvm [1]: GIC system register CPU interface enabled
10591 23:02:12.873342 <6>[ 0.812632] kvm [1]: vgic interrupt IRQ18
10592 23:02:12.879828 <6>[ 0.817000] kvm [1]: VHE mode initialized successfully
10593 23:02:12.883107 <5>[ 0.823385] Initialise system trusted keyrings
10594 23:02:12.889681 <6>[ 0.828186] workingset: timestamp_bits=42 max_order=21 bucket_order=0
10595 23:02:12.899186 <6>[ 0.838199] squashfs: version 4.0 (2009/01/31) Phillip Lougher
10596 23:02:12.905999 <5>[ 0.844574] NFS: Registering the id_resolver key type
10597 23:02:12.909389 <5>[ 0.849876] Key type id_resolver registered
10598 23:02:12.915704 <5>[ 0.854291] Key type id_legacy registered
10599 23:02:12.922694 <6>[ 0.858583] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
10600 23:02:12.928796 <6>[ 0.865507] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
10601 23:02:12.935242 <6>[ 0.873210] 9p: Installing v9fs 9p2000 file system support
10602 23:02:12.972164 <5>[ 0.911042] Key type asymmetric registered
10603 23:02:12.975253 <5>[ 0.915376] Asymmetric key parser 'x509' registered
10604 23:02:12.985034 <6>[ 0.920537] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
10605 23:02:12.988220 <6>[ 0.928148] io scheduler mq-deadline registered
10606 23:02:12.991460 <6>[ 0.932909] io scheduler kyber registered
10607 23:02:13.010455 <6>[ 0.949683] EINJ: ACPI disabled.
10608 23:02:13.042974 <4>[ 0.975461] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10609 23:02:13.053052 <4>[ 0.986147] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10610 23:02:13.067773 <6>[ 1.006872] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
10611 23:02:13.075579 <6>[ 1.014836] printk: console [ttyS0] disabled
10612 23:02:13.103879 <6>[ 1.039483] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 255, base_baud = 1625000) is a ST16650V2
10613 23:02:13.110364 <6>[ 1.048951] printk: console [ttyS0] enabled
10614 23:02:13.113617 <6>[ 1.048951] printk: console [ttyS0] enabled
10615 23:02:13.120612 <6>[ 1.057843] printk: bootconsole [mtk8250] disabled
10616 23:02:13.123536 <6>[ 1.057843] printk: bootconsole [mtk8250] disabled
10617 23:02:13.130281 <6>[ 1.068848] SuperH (H)SCI(F) driver initialized
10618 23:02:13.133520 <6>[ 1.074112] msm_serial: driver initialized
10619 23:02:13.147677 <6>[ 1.082942] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14005000
10620 23:02:13.157459 <6>[ 1.091485] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14006000
10621 23:02:13.163942 <6>[ 1.100026] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14007000
10622 23:02:13.173448 <6>[ 1.108654] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@14009000
10623 23:02:13.183327 <6>[ 1.117359] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400a000
10624 23:02:13.190181 <6>[ 1.126071] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@1400b000
10625 23:02:13.200000 <6>[ 1.134611] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@1400c000
10626 23:02:13.206566 <6>[ 1.143423] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14014000
10627 23:02:13.216685 <6>[ 1.151966] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14015000
10628 23:02:13.228120 <6>[ 1.167252] loop: module loaded
10629 23:02:13.234706 <6>[ 1.173207] vgpu11_sshub: Bringing 400000uV into 575000-575000uV
10630 23:02:13.257018 <4>[ 1.196323] mtk-pmic-keys: Failed to locate of_node [id: -1]
10631 23:02:13.263481 <6>[ 1.203010] megasas: 07.719.03.00-rc1
10632 23:02:13.273129 <6>[ 1.212465] spi-nor spi2.0: w25q64jwm (8192 Kbytes)
10633 23:02:13.282186 <6>[ 1.221434] tpm_tis_spi spi1.0: TPM ready IRQ confirmed on attempt 2
10634 23:02:13.298619 <6>[ 1.238058] tpm_tis_spi spi1.0: 2.0 TPM (device-id 0x28, rev-id 0)
10635 23:02:13.359449 <6>[ 1.292228] tpm_tis_spi spi1.0: Cr50 firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.30/cr50_v1.9308_B.954-4f0f7
10636 23:02:15.271434 <6>[ 3.210863] Freeing initrd memory: 55068K
10637 23:02:15.281743 <6>[ 3.221348] mtk-spi-nor 11234000.spi: spi frequency: 52000000 Hz
10638 23:02:15.293211 <6>[ 3.232509] tun: Universal TUN/TAP device driver, 1.6
10639 23:02:15.296647 <6>[ 3.238586] thunder_xcv, ver 1.0
10640 23:02:15.300392 <6>[ 3.242094] thunder_bgx, ver 1.0
10641 23:02:15.303341 <6>[ 3.245583] nicpf, ver 1.0
10642 23:02:15.313868 <6>[ 3.249606] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
10643 23:02:15.316867 <6>[ 3.257081] hns3: Copyright (c) 2017 Huawei Corporation.
10644 23:02:15.323731 <6>[ 3.262669] hclge is initializing
10645 23:02:15.327343 <6>[ 3.266248] e1000: Intel(R) PRO/1000 Network Driver
10646 23:02:15.333347 <6>[ 3.271377] e1000: Copyright (c) 1999-2006 Intel Corporation.
10647 23:02:15.336849 <6>[ 3.277390] e1000e: Intel(R) PRO/1000 Network Driver
10648 23:02:15.343152 <6>[ 3.282606] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
10649 23:02:15.350053 <6>[ 3.288792] igb: Intel(R) Gigabit Ethernet Network Driver
10650 23:02:15.356903 <6>[ 3.294441] igb: Copyright (c) 2007-2014 Intel Corporation.
10651 23:02:15.363742 <6>[ 3.300283] igbvf: Intel(R) Gigabit Virtual Function Network Driver
10652 23:02:15.369697 <6>[ 3.306800] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
10653 23:02:15.373205 <6>[ 3.313259] sky2: driver version 1.30
10654 23:02:15.379805 <6>[ 3.318266] VFIO - User Level meta-driver version: 0.3
10655 23:02:15.387159 <6>[ 3.326512] usbcore: registered new interface driver usb-storage
10656 23:02:15.393835 <6>[ 3.332960] usbcore: registered new device driver onboard-usb-hub
10657 23:02:15.402956 <6>[ 3.342082] mt6397-rtc mt6359-rtc: registered as rtc0
10658 23:02:15.412882 <6>[ 3.347544] mt6397-rtc mt6359-rtc: setting system clock to 2023-06-05T23:02:12 UTC (1686006132)
10659 23:02:15.415780 <6>[ 3.357111] i2c_dev: i2c /dev entries driver
10660 23:02:15.432836 <6>[ 3.368860] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
10661 23:02:15.440264 <6>[ 3.379107] sdhci: Secure Digital Host Controller Interface driver
10662 23:02:15.446301 <6>[ 3.385543] sdhci: Copyright(c) Pierre Ossman
10663 23:02:15.453175 <6>[ 3.390938] Synopsys Designware Multimedia Card Interface Driver
10664 23:02:15.456363 <6>[ 3.397543] mmc0: CQHCI version 5.10
10665 23:02:15.463003 <6>[ 3.398089] sdhci-pltfm: SDHCI platform and OF driver helper
10666 23:02:15.469920 <6>[ 3.409401] ledtrig-cpu: registered to indicate activity on CPUs
10667 23:02:15.480339 <6>[ 3.416701] SMCCC: SOC_ID: ID = jep106:0426:8192 Revision = 0x00000000
10668 23:02:15.487013 <6>[ 3.424084] usbcore: registered new interface driver usbhid
10669 23:02:15.490627 <6>[ 3.429918] usbhid: USB HID core driver
10670 23:02:15.497094 <6>[ 3.434182] spi_master spi0: will run message pump with realtime priority
10671 23:02:15.543050 <6>[ 3.475273] input: cros_ec as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input0
10672 23:02:15.562454 <6>[ 3.491002] input: cros_ec_buttons as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input1
10673 23:02:15.565267 <6>[ 3.504591] mmc0: Command Queue Engine enabled
10674 23:02:15.572491 <6>[ 3.505873] cros-ec-spi spi0.0: Chrome EC device registered
10675 23:02:15.579100 <6>[ 3.509348] mmc0: new HS400 Enhanced strobe MMC card at address 0001
10676 23:02:15.582274 <6>[ 3.522488] mmcblk0: mmc0:0001 DA4128 116 GiB
10677 23:02:15.596494 <6>[ 3.532406] mt6359-sound mt6359-sound: mt6359_parse_dt() failed to read mic-type-1, use default (0)
10678 23:02:15.603153 <6>[ 3.536039] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
10679 23:02:15.609472 <6>[ 3.543850] NET: Registered PF_PACKET protocol family
10680 23:02:15.613049 <6>[ 3.549081] mmcblk0boot0: mmc0:0001 DA4128 4.00 MiB
10681 23:02:15.619935 <6>[ 3.553067] 9pnet: Installing 9P2000 support
10682 23:02:15.622378 <6>[ 3.558896] mmcblk0boot1: mmc0:0001 DA4128 4.00 MiB
10683 23:02:15.629361 <5>[ 3.562742] Key type dns_resolver registered
10684 23:02:15.635996 <6>[ 3.568583] mmcblk0rpmb: mmc0:0001 DA4128 16.0 MiB, chardev (507:0)
10685 23:02:15.638989 <6>[ 3.573068] registered taskstats version 1
10686 23:02:15.642663 <5>[ 3.583359] Loading compiled-in X.509 certificates
10687 23:02:15.678260 <4>[ 3.611046] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10688 23:02:15.687745 <4>[ 3.621763] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10689 23:02:15.698677 <3>[ 3.634886] mediatek-mutex 14001000.mutex: error -2 can't parse gce-client-reg property (0)
10690 23:02:15.710904 <6>[ 3.650323] xhci-mtk 11200000.usb: uwk - reg:0x420, version:102
10691 23:02:15.718074 <6>[ 3.657283] xhci-mtk 11200000.usb: xHCI Host Controller
10692 23:02:15.724495 <6>[ 3.662802] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
10693 23:02:15.734644 <6>[ 3.670655] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
10694 23:02:15.741104 <6>[ 3.680102] xhci-mtk 11200000.usb: irq 271, io mem 0x11200000
10695 23:02:15.747874 <6>[ 3.686206] xhci-mtk 11200000.usb: xHCI Host Controller
10696 23:02:15.754230 <6>[ 3.691688] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
10697 23:02:15.761131 <6>[ 3.699342] xhci-mtk 11200000.usb: Host supports USB 3.1 Enhanced SuperSpeed
10698 23:02:15.767724 <6>[ 3.707055] hub 1-0:1.0: USB hub found
10699 23:02:15.770792 <6>[ 3.711077] hub 1-0:1.0: 1 port detected
10700 23:02:15.780982 <6>[ 3.715424] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
10701 23:02:15.784313 <6>[ 3.724027] hub 2-0:1.0: USB hub found
10702 23:02:15.787449 <6>[ 3.728042] hub 2-0:1.0: 1 port detected
10703 23:02:15.796086 <6>[ 3.735317] mtk-msdc 11f70000.mmc: Got CD GPIO
10704 23:02:15.813805 <6>[ 3.749768] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_resume()
10705 23:02:15.820561 <6>[ 3.757830] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_enable_clock()
10706 23:02:15.830312 <4>[ 3.765823] mt8192-audio 11210000.syscon:mt8192-afe-pcm: No cache defaults, reading back from HW
10707 23:02:15.840560 <6>[ 3.775489] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_suspend()
10708 23:02:15.846871 <6>[ 3.783574] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_disable_clock()
10709 23:02:15.857280 <6>[ 3.791595] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_adda_register()
10710 23:02:15.863394 <6>[ 3.799510] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_pcm_register()
10711 23:02:15.869993 <6>[ 3.807332] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_tdm_register()
10712 23:02:15.880169 <6>[ 3.815154] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 39
10713 23:02:15.890250 <6>[ 3.825847] mtk-iommu 1401d000.m4u: bound 14003000.larb (ops mtk_smi_larb_component_ops)
10714 23:02:15.899929 <6>[ 3.834227] mtk-iommu 1401d000.m4u: bound 14004000.larb (ops mtk_smi_larb_component_ops)
10715 23:02:15.906580 <6>[ 3.842580] mtk-iommu 1401d000.m4u: bound 1f002000.larb (ops mtk_smi_larb_component_ops)
10716 23:02:15.916362 <6>[ 3.850923] mtk-iommu 1401d000.m4u: bound 1602e000.larb (ops mtk_smi_larb_component_ops)
10717 23:02:15.923112 <6>[ 3.859266] mtk-iommu 1401d000.m4u: bound 1600d000.larb (ops mtk_smi_larb_component_ops)
10718 23:02:15.932848 <6>[ 3.867608] mtk-iommu 1401d000.m4u: bound 17010000.larb (ops mtk_smi_larb_component_ops)
10719 23:02:15.939465 <6>[ 3.875950] mtk-iommu 1401d000.m4u: bound 1502e000.larb (ops mtk_smi_larb_component_ops)
10720 23:02:15.949256 <6>[ 3.884328] mtk-iommu 1401d000.m4u: bound 1582e000.larb (ops mtk_smi_larb_component_ops)
10721 23:02:15.956159 <6>[ 3.892673] mtk-iommu 1401d000.m4u: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
10722 23:02:15.966133 <6>[ 3.901021] mtk-iommu 1401d000.m4u: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
10723 23:02:15.972295 <6>[ 3.909368] mtk-iommu 1401d000.m4u: bound 1a00f000.larb (ops mtk_smi_larb_component_ops)
10724 23:02:15.982487 <6>[ 3.917714] mtk-iommu 1401d000.m4u: bound 1a010000.larb (ops mtk_smi_larb_component_ops)
10725 23:02:15.988974 <6>[ 3.926058] mtk-iommu 1401d000.m4u: bound 1a011000.larb (ops mtk_smi_larb_component_ops)
10726 23:02:15.998874 <6>[ 3.934401] mtk-iommu 1401d000.m4u: bound 1b10f000.larb (ops mtk_smi_larb_component_ops)
10727 23:02:16.005431 <6>[ 3.942744] mtk-iommu 1401d000.m4u: bound 1b00f000.larb (ops mtk_smi_larb_component_ops)
10728 23:02:16.012501 <6>[ 3.951636] mediatek-disp-ovl 14005000.ovl: Adding to iommu group 0
10729 23:02:16.019347 <6>[ 3.959036] mediatek-disp-ovl 14006000.ovl: Adding to iommu group 0
10730 23:02:16.026718 <6>[ 3.966080] mediatek-disp-ovl 14014000.ovl: Adding to iommu group 0
10731 23:02:16.037209 <6>[ 3.973170] mediatek-disp-rdma 14007000.rdma: Adding to iommu group 0
10732 23:02:16.043855 <6>[ 3.980451] mediatek-disp-rdma 14015000.rdma: Adding to iommu group 0
10733 23:02:16.053813 <6>[ 3.987357] mediatek-drm mediatek-drm.1.auto: bound 14005000.ovl (ops mtk_disp_ovl_component_ops)
10734 23:02:16.060488 <6>[ 3.996504] mediatek-drm mediatek-drm.1.auto: bound 14006000.ovl (ops mtk_disp_ovl_component_ops)
10735 23:02:16.070668 <6>[ 4.005632] mediatek-drm mediatek-drm.1.auto: bound 14007000.rdma (ops mtk_disp_rdma_component_ops)
10736 23:02:16.080635 <6>[ 4.014935] mediatek-drm mediatek-drm.1.auto: bound 14009000.color (ops mtk_disp_color_component_ops)
10737 23:02:16.090441 <6>[ 4.024413] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ccorr (ops mtk_disp_ccorr_component_ops)
10738 23:02:16.099856 <6>[ 4.033887] mediatek-drm mediatek-drm.1.auto: bound 1400b000.aal (ops mtk_disp_aal_component_ops)
10739 23:02:16.106590 <6>[ 4.043014] mediatek-drm mediatek-drm.1.auto: bound 1400c000.gamma (ops mtk_disp_gamma_component_ops)
10740 23:02:16.116401 <6>[ 4.052488] mediatek-drm mediatek-drm.1.auto: bound 14014000.ovl (ops mtk_disp_ovl_component_ops)
10741 23:02:16.126224 <6>[ 4.061615] mediatek-drm mediatek-drm.1.auto: bound 14015000.rdma (ops mtk_disp_rdma_component_ops)
10742 23:02:16.136186 <6>[ 4.070917] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 14 is disabled or missing
10743 23:02:16.145887 <6>[ 4.081083] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 10 is disabled or missing
10744 23:02:16.156542 <6>[ 4.092909] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 0
10745 23:02:16.178150 <6>[ 4.114289] usb 2-1: new SuperSpeed USB device number 2 using xhci-mtk
10746 23:02:16.205329 <6>[ 4.144766] hub 2-1:1.0: USB hub found
10747 23:02:16.208592 <6>[ 4.149175] hub 2-1:1.0: 3 ports detected
10748 23:02:16.330194 <6>[ 4.266321] usb 1-1: new high-speed USB device number 2 using xhci-mtk
10749 23:02:16.484545 <6>[ 4.423844] hub 1-1:1.0: USB hub found
10750 23:02:16.487494 <6>[ 4.428239] hub 1-1:1.0: 4 ports detected
10751 23:02:16.566522 <6>[ 4.502572] usb 2-1.3: new SuperSpeed USB device number 3 using xhci-mtk
10752 23:02:16.810287 <6>[ 4.746324] usb 1-1.4: new high-speed USB device number 3 using xhci-mtk
10753 23:02:16.943094 <6>[ 4.882614] hub 1-1.4:1.0: USB hub found
10754 23:02:16.946069 <6>[ 4.887274] hub 1-1.4:1.0: 2 ports detected
10755 23:02:17.242049 <6>[ 5.178323] usb 1-1.4.1: new high-speed USB device number 4 using xhci-mtk
10756 23:02:17.433862 <6>[ 5.370322] usb 1-1.4.2: new high-speed USB device number 5 using xhci-mtk
10757 23:02:28.450289 <6>[ 16.394950] ALSA device list:
10758 23:02:28.456591 <6>[ 16.398204] No soundcards found.
10759 23:02:28.469611 <6>[ 16.410629] Freeing unused kernel memory: 8384K
10760 23:02:28.472800 <6>[ 16.415540] Run /init as init process
10761 23:02:28.503285 <6>[ 16.444433] NET: Registered PF_INET6 protocol family
10762 23:02:28.509731 <6>[ 16.451185] Segment Routing with IPv6
10763 23:02:28.513141 <6>[ 16.455160] In-situ OAM (IOAM) with IPv6
10764 23:02:28.548455 <30>[ 16.470032] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
10765 23:02:28.551801 <30>[ 16.493893] systemd[1]: Detected architecture arm64.
10766 23:02:28.551887
10767 23:02:28.558218 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
10768 23:02:28.558303
10769 23:02:28.573268 <30>[ 16.514440] systemd[1]: Set hostname to <debian-bullseye-arm64>.
10770 23:02:28.696049 <30>[ 16.634114] systemd[1]: Queued start job for default target Graphical Interface.
10771 23:02:28.742315 <30>[ 16.683750] systemd[1]: Created slice system-getty.slice.
10772 23:02:28.748808 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
10773 23:02:28.765461 <30>[ 16.706908] systemd[1]: Created slice system-modprobe.slice.
10774 23:02:28.772234 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
10775 23:02:28.790143 <30>[ 16.731461] systemd[1]: Created slice system-serial\x2dgetty.slice.
10776 23:02:28.800065 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
10777 23:02:28.813424 <30>[ 16.754796] systemd[1]: Created slice User and Session Slice.
10778 23:02:28.820471 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
10779 23:02:28.840709 <30>[ 16.778893] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
10780 23:02:28.850935 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
10781 23:02:28.868688 <30>[ 16.806496] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
10782 23:02:28.874791 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
10783 23:02:28.895438 <30>[ 16.830396] systemd[1]: Condition check resulted in Arbitrary Executable File Formats File System Automount Point being skipped.
10784 23:02:28.902209 <30>[ 16.842429] systemd[1]: Reached target Local Encrypted Volumes.
10785 23:02:28.908482 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
10786 23:02:28.925427 <30>[ 16.866674] systemd[1]: Reached target Paths.
10787 23:02:28.928390 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
10788 23:02:28.945294 <30>[ 16.886366] systemd[1]: Reached target Remote File Systems.
10789 23:02:28.951811 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
10790 23:02:28.965203 <30>[ 16.906409] systemd[1]: Reached target Slices.
10791 23:02:28.968117 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
10792 23:02:28.984907 <30>[ 16.926308] systemd[1]: Reached target Swap.
10793 23:02:28.988062 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
10794 23:02:29.008641 <30>[ 16.946653] systemd[1]: Listening on initctl Compatibility Named Pipe.
10795 23:02:29.015072 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
10796 23:02:29.021901 <30>[ 16.961372] systemd[1]: Listening on Journal Audit Socket.
10797 23:02:29.028225 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
10798 23:02:29.040927 <30>[ 16.982557] systemd[1]: Listening on Journal Socket (/dev/log).
10799 23:02:29.047875 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
10800 23:02:29.065486 <30>[ 17.006642] systemd[1]: Listening on Journal Socket.
10801 23:02:29.071827 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
10802 23:02:29.085424 <30>[ 17.026570] systemd[1]: Listening on udev Control Socket.
10803 23:02:29.091691 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
10804 23:02:29.105356 <30>[ 17.046502] systemd[1]: Listening on udev Kernel Socket.
10805 23:02:29.111688 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
10806 23:02:29.149331 <30>[ 17.090467] systemd[1]: Mounting Huge Pages File System...
10807 23:02:29.155719 Mounting [0;1;39mHuge Pages File System[0m...
10808 23:02:29.170907 <30>[ 17.112271] systemd[1]: Mounting POSIX Message Queue File System...
10809 23:02:29.177408 Mounting [0;1;39mPOSIX Message Queue File System[0m...
10810 23:02:29.241288 <30>[ 17.182486] systemd[1]: Mounting Kernel Debug File System...
10811 23:02:29.247588 Mounting [0;1;39mKernel Debug File System[0m...
10812 23:02:29.264282 <30>[ 17.202537] systemd[1]: Condition check resulted in Kernel Trace File System being skipped.
10813 23:02:29.275576 <30>[ 17.213372] systemd[1]: Starting Create list of static device nodes for the current kernel...
10814 23:02:29.281968 Starting [0;1;39mCreate list of st…odes for the current kernel[0m...
10815 23:02:29.299514 <30>[ 17.240635] systemd[1]: Starting Load Kernel Module configfs...
10816 23:02:29.305714 Starting [0;1;39mLoad Kernel Module configfs[0m...
10817 23:02:29.322857 <30>[ 17.264467] systemd[1]: Starting Load Kernel Module drm...
10818 23:02:29.329487 Starting [0;1;39mLoad Kernel Module drm[0m...
10819 23:02:29.348278 <30>[ 17.286520] systemd[1]: Condition check resulted in Set Up Additional Binary Formats being skipped.
10820 23:02:29.358520 <30>[ 17.300076] systemd[1]: Starting Journal Service...
10821 23:02:29.361980 Starting [0;1;39mJournal Service[0m...
10822 23:02:29.379439 <30>[ 17.320903] systemd[1]: Starting Load Kernel Modules...
10823 23:02:29.386394 Starting [0;1;39mLoad Kernel Modules[0m...
10824 23:02:29.407142 <30>[ 17.345260] systemd[1]: Starting Remount Root and Kernel File Systems...
10825 23:02:29.413711 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
10826 23:02:29.431248 <30>[ 17.372805] systemd[1]: Starting Coldplug All udev Devices...
10827 23:02:29.437857 Starting [0;1;39mColdplug All udev Devices[0m...
10828 23:02:29.455656 <30>[ 17.397180] systemd[1]: Mounted Huge Pages File System.
10829 23:02:29.462473 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
10830 23:02:29.477320 <30>[ 17.418752] systemd[1]: Started Journal Service.
10831 23:02:29.483771 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
10832 23:02:29.498806 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
10833 23:02:29.513719 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
10834 23:02:29.533633 [[0;32m OK [0m] Finished [0;1;39mCreate list of st… nodes for the current kernel[0m.
10835 23:02:29.550625 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
10836 23:02:29.566702 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
10837 23:02:29.582415 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
10838 23:02:29.602026 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
10839 23:02:29.617283 See 'systemctl status systemd-remount-fs.service' for details.
10840 23:02:29.677789 Mounting [0;1;39mKernel Configuration File System[0m...
10841 23:02:29.695453 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
10842 23:02:29.712548 <46>[ 17.650886] systemd-journald[181]: Received client request to flush runtime journal.
10843 23:02:29.721313 Starting [0;1;39mLoad/Save Random Seed[0m...
10844 23:02:29.740145 Starting [0;1;39mApply Kernel Variables[0m...
10845 23:02:29.760106 Starting [0;1;39mCreate System Users[0m...
10846 23:02:29.778590 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
10847 23:02:29.797711 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
10848 23:02:29.810100 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
10849 23:02:29.825796 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
10850 23:02:29.842531 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
10851 23:02:29.862072 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
10852 23:02:29.917648 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
10853 23:02:29.941408 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
10854 23:02:29.953363 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
10855 23:02:29.969284 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
10856 23:02:30.001588 Starting [0;1;39mCreate Volatile Files and Directories[0m...
10857 23:02:30.029175 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
10858 23:02:30.050118 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
10859 23:02:30.069484 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
10860 23:02:30.122186 Starting [0;1;39mNetwork Time Synchronization[0m...
10861 23:02:30.142868 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
10862 23:02:30.177820 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
10863 23:02:30.231744 [[0;32m OK [0m] Created slice [0;1;39msystem-systemd\x2dbacklight.slice[0m.
10864 23:02:30.249169 <6>[ 18.187420] mtk-scp 10500000.scp: assigned reserved memory node scp@50000000
10865 23:02:30.255928 <3>[ 18.190973] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10866 23:02:30.265956 <3>[ 18.204422] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10867 23:02:30.272732 <3>[ 18.212638] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10868 23:02:30.279549 <6>[ 18.214624] remoteproc remoteproc0: scp is available
10869 23:02:30.289369 <4>[ 18.226469] remoteproc remoteproc0: Direct firmware load for mediatek/mt8192/scp.img failed with error -2
10870 23:02:30.296240 <6>[ 18.236384] remoteproc remoteproc0: powering up scp
10871 23:02:30.306210 <4>[ 18.236417] remoteproc remoteproc0: Direct firmware load for mediatek/mt8192/scp.img failed with error -2
10872 23:02:30.312604 <3>[ 18.236423] remoteproc remoteproc0: request_firmware failed: -2
10873 23:02:30.319490 <3>[ 18.252460] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10874 23:02:30.329345 Startin<3>[ 18.266481] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10875 23:02:30.339200 g [0;1;39mLoad/<3>[ 18.275621] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10876 23:02:30.348884 Save Screen …o<3>[ 18.285099] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10877 23:02:30.355783 f leds:white:kbd<6>[ 18.286971] mtk-pcie-gen3 11230000.pcie: host bridge /soc/pcie@11230000 ranges:
10878 23:02:30.365673 _backlight[0m..<3>[ 18.294515] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10879 23:02:30.365781 .
10880 23:02:30.375482 <6>[ 18.313493] mtk-pcie-gen3 11230000.pcie: MEM 0x0012000000..0x00127fffff -> 0x0012000000
10881 23:02:30.382167 <3>[ 18.314962] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10882 23:02:30.392158 <6>[ 18.322362] mtk-pcie-gen3 11230000.pcie: IO 0x0012800000..0x0012ffffff -> 0x0012800000
10883 23:02:30.402273 <3>[ 18.334468] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10884 23:02:30.408545 <3>[ 18.347249] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10885 23:02:30.415071 <6>[ 18.352414] usbcore: registered new interface driver r8152
10886 23:02:30.422124 <3>[ 18.355400] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10887 23:02:30.428565 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
10888 23:02:30.438370 <3>[ 18.375465] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10889 23:02:30.445384 <4>[ 18.379821] elants_i2c 4-0010: supply vcc33 not found, using dummy regulator
10890 23:02:30.451611 <6>[ 18.379827] sbs-battery 5-000b: sbs-battery: battery gas gauge device registered
10891 23:02:30.461751 <3>[ 18.386078] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10892 23:02:30.468475 <4>[ 18.396633] elants_i2c 4-0010: supply vccio not found, using dummy regulator
10893 23:02:30.474769 <3>[ 18.398669] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10894 23:02:30.481205 <6>[ 18.407311] mc: Linux media interface: v0.10
10895 23:02:30.487858 <3>[ 18.414161] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10896 23:02:30.497761 <3>[ 18.435041] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10897 23:02:30.511138 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Screen …s of l<3>[ 18.448821] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10898 23:02:30.520802 eds:white:kbd_ba<4>[ 18.449046] sbs-battery 5-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
10899 23:02:30.524196 <4>[ 18.449046] Fallback method does not support PEC.
10900 23:02:30.527710 cklight[0m.
10901 23:02:30.531203 <6>[ 18.456472] videodev: Linux video capture interface: v2.00
10902 23:02:30.540982 <6>[ 18.466987] mtk-pcie-gen3 11230000.pcie: PCI host bridge to bus 0000:00
10903 23:02:30.547703 <6>[ 18.483629] usb 2-1.3: reset SuperSpeed USB device number 3 using xhci-mtk
10904 23:02:30.551182 <6>[ 18.486232] pci_bus 0000:00: root bus resource [bus 00-ff]
10905 23:02:30.561183 <3>[ 18.494322] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10906 23:02:30.567620 <6>[ 18.499066] pci_bus 0000:00: root bus resource [mem 0x12000000-0x127fffff]
10907 23:02:30.577775 <6>[ 18.514993] pci_bus 0000:00: root bus resource [io 0x0000-0x7fffff] (bus address [0x12800000-0x12ffffff])
10908 23:02:30.587591 <4>[ 18.517800] r8152 2-1.3:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
10909 23:02:30.594245 [[0;32m OK [<6>[ 18.525585] pci 0000:00:00.0: [14c3:6786] type 01 class 0x060400
10910 23:02:30.604000 0m] Found device<3>[ 18.526394] elants_i2c 4-0010: invalid 'hello' packet: ff ff ff ff
10911 23:02:30.610751 <4>[ 18.534465] r8152 2-1.3:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
10912 23:02:30.620575 [0;1;39m/dev/t<6>[ 18.542005] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit pref]
10913 23:02:30.620680 tyS0[0m.
10914 23:02:30.630299 <6>[ 18.542737] elan_i2c 3-0015: Elan Touchpad: Module ID: 0x0128, Firmware: 0x0001, Sample: 0x0001, IAP: 0x0003
10915 23:02:30.640199 <6>[ 18.544652] input: Elan Touchpad as /devices/platform/soc/11d21000.i2c/i2c-3/3-0015/input/input2
10916 23:02:30.643640 <6>[ 18.586906] pci 0000:00:00.0: supports D1 D2
10917 23:02:30.650530 <6>[ 18.591758] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
10918 23:02:30.662443 <6>[ 18.600647] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
10919 23:02:30.672358 <3>[ 18.605325] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10920 23:02:30.675843 <6>[ 18.609088] pci 0000:01:00.0: [14c3:7961] type 00 class 0x028000
10921 23:02:30.682157 <6>[ 18.617865] r8152 2-1.3:1.0 eth0: v1.12.13
10922 23:02:30.689065 <3>[ 18.618131] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -6
10923 23:02:30.699421 <6>[ 18.623980] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit pref]
10924 23:02:30.702645 <3>[ 18.626485] elants_i2c 4-0010: invalid 'hello' packet: ff ff ff ff
10925 23:02:30.712629 <3>[ 18.644162] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10926 23:02:30.719821 <6>[ 18.644571] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x00003fff 64bit pref]
10927 23:02:30.726795 <6>[ 18.667240] pci 0000:01:00.0: reg 0x20: [mem 0x00000000-0x00000fff 64bit pref]
10928 23:02:30.736612 <3>[ 18.671384] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10929 23:02:30.740040 <6>[ 18.674824] pci 0000:01:00.0: supports D1 D2
10930 23:02:30.746712 <6>[ 18.688013] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
10931 23:02:30.767576 <3>[ 18.705797] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10932 23:02:30.773925 <6>[ 18.706235] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
10933 23:02:30.784302 <6>[ 18.721473] pci 0000:00:00.0: BAR 15: assigned [mem 0x12000000-0x121fffff 64bit pref]
10934 23:02:30.791183 <3>[ 18.726452] elants_i2c 4-0010: invalid 'hello' packet: ff ff ff ff
10935 23:02:30.797782 <6>[ 18.729562] pci 0000:00:00.0: BAR 0: assigned [mem 0x12200000-0x12203fff 64bit pref]
10936 23:02:30.804473 <3>[ 18.735675] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10937 23:02:30.811473 <3>[ 18.736323] elants_i2c 4-0010: (read fw id) unexpected response: ff ff
10938 23:02:30.821307 <6>[ 18.743986] pci 0000:01:00.0: BAR 0: assigned [mem 0x12000000-0x120fffff 64bit pref]
10939 23:02:30.831526 <6>[ 18.752882] input: Elan Touchscreen as /devices/platform/soc/11f00000.i2c/i2c-4/4-0010/input/input3
10940 23:02:30.838401 <3>[ 18.758461] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10941 23:02:30.848132 <6>[ 18.759546] pci 0000:01:00.0: BAR 2: assigned [mem 0x12100000-0x12103fff 64bit pref]
10942 23:02:30.855057 <6>[ 18.777236] usbcore: registered new interface driver cdc_ether
10943 23:02:30.861888 <6>[ 18.785638] pci 0000:01:00.0: BAR 4: assigned [mem 0x12104000-0x12104fff 64bit pref]
10944 23:02:30.868895 <3>[ 18.793537] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10945 23:02:30.879164 <3>[ 18.794458] power_supply sbs-5-000b: driver failed to report `health' property: -6
10946 23:02:30.882345 <6>[ 18.794949] Bluetooth: Core ver 2.22
10947 23:02:30.889114 <6>[ 18.795357] NET: Registered PF_BLUETOOTH protocol family
10948 23:02:30.892019 <6>[ 18.795360] Bluetooth: HCI device and connection manager initialized
10949 23:02:30.898732 <6>[ 18.795382] Bluetooth: HCI socket layer initialized
10950 23:02:30.905611 <6>[ 18.795389] Bluetooth: L2CAP socket layer initialized
10951 23:02:30.908731 <6>[ 18.795407] Bluetooth: SCO socket layer initialized
10952 23:02:30.915253 <6>[ 18.799768] pci 0000:00:00.0: PCI bridge to [bus 01]
10953 23:02:30.922127 <6>[ 18.799783] pci 0000:00:00.0: bridge window [mem 0x12000000-0x121fffff 64bit pref]
10954 23:02:30.928909 <6>[ 18.800491] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
10955 23:02:30.935815 <6>[ 18.800571] usbcore: registered new interface driver r8153_ecm
10956 23:02:30.942570 <6>[ 18.812482] r8152 2-1.3:1.0 enx00e04c722dd6: renamed from eth0
10957 23:02:30.945896 <6>[ 18.817842] pcieport 0000:00:00.0: PME: Signaling with IRQ 282
10958 23:02:30.953208 <6>[ 18.835666] usb 1-1.4.1: Found UVC 1.10 device HD User Facing (04f2:b741)
10959 23:02:30.959480 <6>[ 18.835866] usbcore: registered new interface driver btusb
10960 23:02:30.969719 <4>[ 18.836832] bluetooth hci0: Direct firmware load for mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin failed with error -2
10961 23:02:30.976364 <3>[ 18.836844] Bluetooth: hci0: Failed to load firmware file (-2)
10962 23:02:30.982732 <3>[ 18.836849] Bluetooth: hci0: Failed to set up firmware (-2)
10963 23:02:30.992599 <4>[ 18.836854] Bluetooth: hci0: HCI Enhanced Setup Synchronous Connection command is advertised, but not supported.
10964 23:02:30.999020 <6>[ 18.840801] pcieport 0000:00:00.0: AER: enabled with IRQ 282
10965 23:02:31.012418 <6>[ 18.848340] input: HD User Facing: HD User Facing as /devices/platform/soc/11200000.usb/usb1/1-1/1-1.4/1-1.4.1/1-1.4.1:1.0/input/input4
10966 23:02:31.019214 <6>[ 18.852454] mtk-vcodec-enc 17020000.vcodec: Adding to iommu group 0
10967 23:02:31.025569 <6>[ 18.856950] usbcore: registered new interface driver uvcvideo
10968 23:02:31.032419 <5>[ 18.865406] cfg80211: Loading compiled-in X.509 certificates for regulatory database
10969 23:02:31.035620 <6>[ 18.867806] remoteproc remoteproc0: powering up scp
10970 23:02:31.045537 <4>[ 18.867858] remoteproc remoteproc0: Direct firmware load for mediatek/mt8192/scp.img failed with error -2
10971 23:02:31.051947 <3>[ 18.867867] remoteproc remoteproc0: request_firmware failed: -2
10972 23:02:31.062306 <3>[ 18.867870] fops_vcodec_open(),166: [MTK_V4L2][ERROR] vpu_load_firmware failed!
10973 23:02:31.068562 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
10974 23:02:31.079827 <5>[ 19.018190] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
10975 23:02:31.086629 <4>[ 19.025109] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
10976 23:02:31.092952 <6>[ 19.034005] cfg80211: failed to load regulatory.db
10977 23:02:31.099866 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
10978 23:02:31.121115 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
10979 23:02:31.141824 <6>[ 19.080265] mt7921e 0000:01:00.0: assigned reserved memory node wifi@c0000000
10980 23:02:31.148372 <6>[ 19.087841] mt7921e 0000:01:00.0: enabling device (0000 -> 0002)
10981 23:02:31.155153 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
10982 23:02:31.172714 [[0;32m OK [0m] Started [0;1;39mDiscard unu<6>[ 19.114705] mt7921e 0000:01:00.0: ASIC revision: 79610010
10983 23:02:31.176167 sed blocks once a week[0m.
10984 23:02:31.192800 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
10985 23:02:31.212170 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
10986 23:02:31.224872 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
10987 23:02:31.240732 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
10988 23:02:31.260680 [[0;32m OK [0m] Listening on [0;1;39mLoad/Save RF …itch Status /dev/rfkill Watch[0m.
10989 23:02:31.279151 <4>[ 19.214148] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10990 23:02:31.313655 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
10991 23:02:31.343819 Starting [0;1;39mUser Login Management[0m...
10992 23:02:31.358996 Starting [0;1;39mPermit User Sessions[0m...
10993 23:02:31.385225 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
10994 23:02:31.398975 <4>[ 19.333951] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10995 23:02:31.405374 [[0;32m OK [0m] Reached target [0;1;39mBluetooth[0m.
10996 23:02:31.425599 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
10997 23:02:31.443901 [[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyS0[0m.
10998 23:02:31.465603 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
10999 23:02:31.483099 Starting [0;1;39mLoad/Save RF Kill Switch Status[0m...
11000 23:02:31.506263 [[0;32m OK [0m] Started [0;1;39mLoad/Save RF Kill Switch Status[0m.
11001 23:02:31.522552 <4>[ 19.457515] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11002 23:02:31.532264 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
11003 23:02:31.540798 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
11004 23:02:31.557421 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
11005 23:02:31.612638 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
11006 23:02:31.647024 <4>[ 19.582358] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11007 23:02:31.653848 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
11008 23:02:31.671556
11009 23:02:31.671640
11010 23:02:31.674759 Debian GNU/Linux 11 debian-bullseye-arm64 ttyS0
11011 23:02:31.674843
11012 23:02:31.677835 debian-bullseye-arm64 login: root (automatic login)
11013 23:02:31.677918
11014 23:02:31.677984
11015 23:02:31.694187 Linux debian-bullseye-arm64 6.1.31 #1 SMP PREEMPT Mon Jun 5 22:41:02 UTC 2023 aarch64
11016 23:02:31.694271
11017 23:02:31.700545 The programs included with the Debian GNU/Linux system are free software;
11018 23:02:31.707667 the exact distribution terms for each program are described in the
11019 23:02:31.710616 individual files in /usr/share/doc/*/copyright.
11020 23:02:31.710700
11021 23:02:31.717518 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
11022 23:02:31.717602 permitted by applicable law.
11023 23:02:31.720730 Matched prompt #10: / #
11025 23:02:31.720991 Setting prompt string to ['/ #']
11026 23:02:31.721086 end: 2.2.5.1 login-action (duration 00:00:20) [common]
11028 23:02:31.721281 end: 2.2.5 auto-login-action (duration 00:00:20) [common]
11029 23:02:31.721367 start: 2.2.6 expect-shell-connection (timeout 00:03:23) [common]
11030 23:02:31.721440 Setting prompt string to ['/ #']
11031 23:02:31.721506 Forcing a shell prompt, looking for ['/ #']
11033 23:02:31.771725 / #
11034 23:02:31.771835 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
11035 23:02:31.771915 Waiting using forced prompt support (timeout 00:02:30)
11036 23:02:31.772012 <4>[ 19.700777] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11037 23:02:31.777012
11038 23:02:31.821017 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
11039 23:02:31.821125 start: 2.2.7 export-device-env (timeout 00:03:23) [common]
11040 23:02:31.821220 end: 2.2.7 export-device-env (duration 00:00:00) [common]
11041 23:02:31.821307 end: 2.2 depthcharge-retry (duration 00:01:37) [common]
11042 23:02:31.821391 end: 2 depthcharge-action (duration 00:01:37) [common]
11043 23:02:31.821480 start: 3 lava-test-retry (timeout 00:08:01) [common]
11044 23:02:31.821566 start: 3.1 lava-test-shell (timeout 00:08:01) [common]
11045 23:02:31.821639 Using namespace: common
11047 23:02:31.921936 / # #
11048 23:02:31.922056 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
11049 23:02:31.922163 <4>[ 19.820673] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11050 23:02:31.926632 #
11051 23:02:31.926894 Using /lava-10597706
11053 23:02:32.027221 / # export SHELL=/bin/sh
11054 23:02:32.027371 export SHELL=/bin/sh<4>[ 19.940385] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11055 23:02:32.032264
11057 23:02:32.132755 / # . /lava-10597706/environment
11058 23:02:32.132958 . /lava-10597706/environment<4>[ 20.059991] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11059 23:02:32.137997
11061 23:02:32.238482 / # /lava-10597706/bin/lava-test-runner /lava-10597706/0
11062 23:02:32.238597 Test shell timeout: 10s (minimum of the action and connection timeout)
11063 23:02:32.241164 /lava-10597706/bin/lava-test-runner /lava-10597706/0<4>[ 20.176522] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11064 23:02:32.241248
11065 23:02:32.284889 + export TESTRUN_ID=0_igt-kms-me<8>[ 20.217884] <LAVA_SIGNAL_STARTRUN 0_igt-kms-mediatek 10597706_1.5.2.3.1>
11066 23:02:32.284983 diatek
11067 23:02:32.285050 + cd /lava-10597706/0/tests/0_igt-kms-mediatek
11068 23:02:32.285113 + cat uuid
11069 23:02:32.285349 Received signal: <STARTRUN> 0_igt-kms-mediatek 10597706_1.5.2.3.1
11070 23:02:32.285419 Starting test lava.0_igt-kms-mediatek (10597706_1.5.2.3.1)
11071 23:02:32.285502 Skipping test definition patterns.
11072 23:02:32.287796 + UUID=10597706_1.5.2.3.1
11073 23:02:32.287881 + set +x
11074 23:02:32.307736 + IGT_FORCE_DRIVER=mediatek /usr/bin/igt-parser.sh core_auth core_getclient core_getstats core_getversion core_setmaster_vs_auth drm_read kms_addfb_basic kms_atomic km<8>[ 20.248605] <LAVA_SIGNAL_TESTSET START core_auth>
11075 23:02:32.307994 Received signal: <TESTSET> START core_auth
11076 23:02:32.308069 Starting test_set core_auth
11077 23:02:32.314180 s_flip_event_leak kms_prop_blob kms_setmode kms_vblank
11078 23:02:32.330763 <14>[ 20.272503] [IGT] core_auth: executing
11079 23:02:32.337569 IGT-Version: 1.2<14>[ 20.276914] [IGT] core_auth: starting subtest getclient-simple
11080 23:02:32.343785 7.1-g766edf9 (aarch64) (Linux: 6<14>[ 20.285918] [IGT] core_auth: exiting, ret=0
11081 23:02:32.347326 .1.31 aarch64)
11082 23:02:32.350707 Starting subtest: getclient-simple
11083 23:02:32.360670 Opened devic<4>[ 20.297329] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11084 23:02:32.370260 <8>[ 20.300039] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-simple RESULT=pass>
11085 23:02:32.370345 e: /dev/dri/card0
11086 23:02:32.370583 Received signal: <TESTCASE> TEST_CASE_ID=getclient-simple RESULT=pass
11088 23:02:32.376721 [1mSubtest getclient-simple: SUCCESS (0.000s)[0m
11089 23:02:32.396903 <14>[ 20.338698] [IGT] core_auth: executing
11090 23:02:32.403556 IGT-Version: 1.2<14>[ 20.343076] [IGT] core_auth: starting subtest getclient-master-drop
11091 23:02:32.409996 7.1-g766edf9 (aa<14>[ 20.351347] [IGT] core_auth: exiting, ret=0
11092 23:02:32.413330 rch64) (Linux: 6.1.31 aarch64)
11093 23:02:32.416552 Starting subtest: getclient-master-drop
11094 23:02:32.423396 Opened <8>[ 20.363022] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-master-drop RESULT=pass>
11095 23:02:32.423652 Received signal: <TESTCASE> TEST_CASE_ID=getclient-master-drop RESULT=pass
11097 23:02:32.426664 device: /dev/dri/card0
11098 23:02:32.433246 [1mSubtest getclient-master-drop: SUCCESS (0.000s)[0m
11099 23:02:32.447088 <14>[ 20.388902] [IGT] core_auth: executing
11100 23:02:32.453771 IGT-Version: 1.2<14>[ 20.393350] [IGT] core_auth: starting subtest basic-auth
11101 23:02:32.460299 7.1-g766edf9 (aa<14>[ 20.400401] [IGT] core_auth: exiting, ret=0
11102 23:02:32.463622 rch64) (Linux: 6.1.31 aarch64)
11103 23:02:32.463705 Opened device: /dev/dri/card0
11104 23:02:32.467134 Starting subtest: basic-auth
11105 23:02:32.476905 [1mSubtest basic-auth: SUCCESS (0.<3>[ 20.416084] mt7921e 0000:01:00.0: hardware init failed
11106 23:02:32.483286 <8>[ 20.418551] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-auth RESULT=pass>
11107 23:02:32.483371 000s)[0m
11108 23:02:32.483639 Received signal: <TESTCASE> TEST_CASE_ID=basic-auth RESULT=pass
11110 23:02:32.506274 <14>[ 20.447835] [IGT] core_auth: executing
11111 23:02:32.512821 IGT-Version: 1.2<14>[ 20.452494] [IGT] core_auth: starting subtest many-magics
11112 23:02:32.516222 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11113 23:02:32.519420 Opened device: /dev/dri/card0
11114 23:02:32.522753 Starting subtest: many-magics
11115 23:02:32.525984 Reopening device failed after 1020 opens
11116 23:02:32.532690 [1mSubtest many<14>[ 20.472758] [IGT] core_auth: exiting, ret=0
11117 23:02:32.536141 -magics: SUCCESS (0.013s)[0m
11118 23:02:32.546240 <8>[ 20.485000] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=many-magics RESULT=pass>
11119 23:02:32.546498 Received signal: <TESTCASE> TEST_CASE_ID=many-magics RESULT=pass
11121 23:02:32.549724 <8>[ 20.493554] <LAVA_SIGNAL_TESTSET STOP>
11122 23:02:32.549978 Received signal: <TESTSET> STOP
11123 23:02:32.550053 Closing test_set core_auth
11124 23:02:32.592876 <14>[ 20.534609] [IGT] core_getclient: executing
11125 23:02:32.599107 IGT-Version: 1.2<14>[ 20.539517] [IGT] core_getclient: exiting, ret=0
11126 23:02:32.602487 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11127 23:02:32.606185 Opened device: /dev/dri/card0
11128 23:02:32.612496 S<8>[ 20.552131] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getclient RESULT=pass>
11129 23:02:32.612782 Received signal: <TESTCASE> TEST_CASE_ID=core_getclient RESULT=pass
11131 23:02:32.615792 UCCESS (0.006s)
11132 23:02:32.653767 <14>[ 20.595597] [IGT] core_getstats: executing
11133 23:02:32.660570 IGT-Version: 1.2<14>[ 20.600455] [IGT] core_getstats: exiting, ret=0
11134 23:02:32.663528 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11135 23:02:32.666953 Opened device: /dev/dri/card0
11136 23:02:32.673784 S<8>[ 20.612604] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getstats RESULT=pass>
11137 23:02:32.674038 Received signal: <TESTCASE> TEST_CASE_ID=core_getstats RESULT=pass
11139 23:02:32.676696 UCCESS (0.006s)
11140 23:02:32.714808 <14>[ 20.656655] [IGT] core_getversion: executing
11141 23:02:32.721680 IGT-Version: 1.2<14>[ 20.661719] [IGT] core_getversion: exiting, ret=0
11142 23:02:32.724543 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11143 23:02:32.728185 Opened device: /dev/dri/card0
11144 23:02:32.734812 S<8>[ 20.674426] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getversion RESULT=pass>
11145 23:02:32.735066 Received signal: <TESTCASE> TEST_CASE_ID=core_getversion RESULT=pass
11147 23:02:32.738179 UCCESS (0.006s)
11148 23:02:32.776537 <14>[ 20.718555] [IGT] core_setmaster_vs_auth: executing
11149 23:02:32.783378 IGT-Version: 1.2<14>[ 20.724200] [IGT] core_setmaster_vs_auth: exiting, ret=0
11150 23:02:32.789835 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11151 23:02:32.789921 Opened device: /dev/dri/card0
11152 23:02:32.799779 S<8>[ 20.737669] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass>
11153 23:02:32.799864 UCCESS (0.007s)
11154 23:02:32.800103 Received signal: <TESTCASE> TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass
11156 23:02:32.825233 <8>[ 20.766934] <LAVA_SIGNAL_TESTSET START drm_read>
11157 23:02:32.825489 Received signal: <TESTSET> START drm_read
11158 23:02:32.825562 Starting test_set drm_read
11159 23:02:32.847449 <14>[ 20.789347] [IGT] drm_read: executing
11160 23:02:32.854088 IGT-Version: 1.2<14>[ 20.794036] [IGT] drm_read: exiting, ret=77
11161 23:02:32.857754 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11162 23:02:32.860416 Opened device: /dev/dri/card0
11163 23:02:32.867213 N<8>[ 20.805577] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-buffer RESULT=skip>
11164 23:02:32.867476 Received signal: <TESTCASE> TEST_CASE_ID=invalid-buffer RESULT=skip
11166 23:02:32.870578 o KMS driver or no outputs, pipes: 8, outputs: 0
11167 23:02:32.873951 [1mSubtest invalid-buffer: SKIP (0.000s)[0m
11168 23:02:32.888754 <14>[ 20.830588] [IGT] drm_read: executing
11169 23:02:32.895336 IGT-Version: 1.2<14>[ 20.835228] [IGT] drm_read: exiting, ret=77
11170 23:02:32.898716 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11171 23:02:32.902046 Opened device: /dev/dri/card0
11172 23:02:32.908641 N<8>[ 20.847051] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=fault-buffer RESULT=skip>
11173 23:02:32.908897 Received signal: <TESTCASE> TEST_CASE_ID=fault-buffer RESULT=skip
11175 23:02:32.912184 o KMS driver or no outputs, pipes: 8, outputs: 0
11176 23:02:32.915085 [1mSubtest fault-buffer: SKIP (0.000s)[0m
11177 23:02:32.930988 <14>[ 20.872816] [IGT] drm_read: executing
11178 23:02:32.937670 IGT-Version: 1.2<14>[ 20.877353] [IGT] drm_read: exiting, ret=77
11179 23:02:32.940967 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11180 23:02:32.943938 Opened device: /dev/dri/card0
11181 23:02:32.950668 N<8>[ 20.889295] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-block RESULT=skip>
11182 23:02:32.950925 Received signal: <TESTCASE> TEST_CASE_ID=empty-block RESULT=skip
11184 23:02:32.953839 o KMS driver or no outputs, pipes: 8, outputs: 0
11185 23:02:32.957517 [1mSubtest empty-block: SKIP (0.000s)[0m
11186 23:02:32.972539 <14>[ 20.914202] [IGT] drm_read: executing
11187 23:02:32.979116 IGT-Version: 1.2<14>[ 20.918784] [IGT] drm_read: exiting, ret=77
11188 23:02:32.982566 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11189 23:02:32.985538 Opened device: /dev/dri/card0
11190 23:02:32.992426 N<8>[ 20.930617] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-nonblock RESULT=skip>
11191 23:02:32.992717 Received signal: <TESTCASE> TEST_CASE_ID=empty-nonblock RESULT=skip
11193 23:02:32.995382 o KMS driver or no outputs, pipes: 8, outputs: 0
11194 23:02:32.998810 [1mSubtest empty-nonblock: SKIP (0.000s)[0m
11195 23:02:33.014426 <14>[ 20.956345] [IGT] drm_read: executing
11196 23:02:33.021029 IGT-Version: 1.2<14>[ 20.960895] [IGT] drm_read: exiting, ret=77
11197 23:02:33.024357 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11198 23:02:33.027702 Opened device: /dev/dri/card0
11199 23:02:33.034226 N<8>[ 20.972881] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-block RESULT=skip>
11200 23:02:33.034491 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-block RESULT=skip
11202 23:02:33.037559 o KMS driver or no outputs, pipes: 8, outputs: 0
11203 23:02:33.043969 [1mSubtest short-buffer-block: SKIP (0.000s)[0m
11204 23:02:33.056342 <14>[ 20.998270] [IGT] drm_read: executing
11205 23:02:33.062975 IGT-Version: 1.2<14>[ 21.002918] [IGT] drm_read: exiting, ret=77
11206 23:02:33.066442 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11207 23:02:33.069652 Opened device: /dev/dri/card0
11208 23:02:33.076238 N<8>[ 21.014718] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-nonblock RESULT=skip>
11209 23:02:33.076497 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-nonblock RESULT=skip
11211 23:02:33.079769 o KMS driver or no outputs, pipes: 8, outputs: 0
11212 23:02:33.086425 [1mSubtest short-buffer-nonblock: SKIP (0.000s)[0m
11213 23:02:33.098732 <14>[ 21.040361] [IGT] drm_read: executing
11214 23:02:33.105174 IGT-Version: 1.2<14>[ 21.045065] [IGT] drm_read: exiting, ret=77
11215 23:02:33.108611 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11216 23:02:33.112087 Opened device: /dev/dri/card0
11217 23:02:33.118181 N<8>[ 21.056657] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-wakeup RESULT=skip>
11218 23:02:33.118438 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-wakeup RESULT=skip
11220 23:02:33.124812 o KMS driver or no outputs, pipe<8>[ 21.066808] <LAVA_SIGNAL_TESTSET STOP>
11221 23:02:33.125068 Received signal: <TESTSET> STOP
11222 23:02:33.125143 Closing test_set drm_read
11223 23:02:33.128485 s: 8, outputs: 0
11224 23:02:33.131519 [1mSubtest short-buffer-wakeup: SKIP (0.000s)[0m
11225 23:02:33.150820 <8>[ 21.092777] <LAVA_SIGNAL_TESTSET START kms_addfb_basic>
11226 23:02:33.151126 Received signal: <TESTSET> START kms_addfb_basic
11227 23:02:33.151227 Starting test_set kms_addfb_basic
11228 23:02:33.173810 <14>[ 21.115510] [IGT] kms_addfb_basic: executing
11229 23:02:33.180405 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11230 23:02:33.187093 <14>[ 21.125007] [IGT] kms_addfb_basic: starting subtest unused-handle
11231 23:02:33.187177 Opened device: /dev/dri/card0
11232 23:02:33.190286 Starting subtest: unused-handle
11233 23:02:33.196926 [1mSubtest unused-handle: SUCCESS (0.000s)[0m
11234 23:02:33.200392 Test requiremen<14>[ 21.142601] [IGT] kms_addfb_basic: exiting, ret=0
11235 23:02:33.206785 t not met in function igt_require_i915, file ../lib/drmtest.c:721:
11236 23:02:33.217047 Test require<8>[ 21.155131] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-handle RESULT=pass>
11237 23:02:33.217133 ment: is_i915_device(fd)
11238 23:02:33.217371 Received signal: <TESTCASE> TEST_CASE_ID=unused-handle RESULT=pass
11240 23:02:33.226711 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11241 23:02:33.229795 Test requirement: is_i915_device(fd)
11242 23:02:33.233279 No KMS driver or no outputs, pipes: 8, outputs: 0
11243 23:02:33.236236 <14>[ 21.180001] [IGT] kms_addfb_basic: executing
11244 23:02:33.242943 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11245 23:02:33.249661 <14>[ 21.189480] [IGT] kms_addfb_basic: starting subtest unused-pitches
11246 23:02:33.253020 Opened device: /dev/dri/card0
11247 23:02:33.255989 Starting subtest: unused-pitches
11248 23:02:33.259451 [1mSubtest unused-pitches: SUCCESS (0.000s)[0m
11249 23:02:33.266283 Test requirement<14>[ 21.207308] [IGT] kms_addfb_basic: exiting, ret=0
11250 23:02:33.272498 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11251 23:02:33.279203 Test requirem<8>[ 21.219868] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-pitches RESULT=pass>
11252 23:02:33.279462 Received signal: <TESTCASE> TEST_CASE_ID=unused-pitches RESULT=pass
11254 23:02:33.282487 ent: is_i915_device(fd)
11255 23:02:33.289164 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11256 23:02:33.292288 Test requirement: is_i915_device(fd)
11257 23:02:33.298924 No KMS driver or no outputs, pipes: 8, outputs: 0
11258 23:02:33.302333 <14>[ 21.245724] [IGT] kms_addfb_basic: executing
11259 23:02:33.308737 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11260 23:02:33.315654 <14>[ 21.255135] [IGT] kms_addfb_basic: starting subtest unused-offsets
11261 23:02:33.318627 Opened device: /dev/dri/card0
11262 23:02:33.321973 Starting subtest: unused-offsets
11263 23:02:33.325225 [1mSubtest unused-offsets: SUCCESS (0.000s)[0m
11264 23:02:33.331937 Test requirement<14>[ 21.272661] [IGT] kms_addfb_basic: exiting, ret=0
11265 23:02:33.338670 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11266 23:02:33.345092 Test requirem<8>[ 21.285417] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-offsets RESULT=pass>
11267 23:02:33.345349 Received signal: <TESTCASE> TEST_CASE_ID=unused-offsets RESULT=pass
11269 23:02:33.348459 ent: is_i915_device(fd)
11270 23:02:33.355179 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11271 23:02:33.358149 Test requirement: is_i915_device(fd)
11272 23:02:33.364613 No KMS driver or no outputs, pipes: 8, outputs: 0
11273 23:02:33.368078 <14>[ 21.310672] [IGT] kms_addfb_basic: executing
11274 23:02:33.374415 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11275 23:02:33.381025 <14>[ 21.320115] [IGT] kms_addfb_basic: starting subtest unused-modifier
11276 23:02:33.384611 Opened device: /dev/dri/card0
11277 23:02:33.387980 Starting subtest: unused-modifier
11278 23:02:33.391368 [1mSubtest unused-modifier: SUCCESS (0.000s)[0m
11279 23:02:33.397787 Test requir<14>[ 21.337872] [IGT] kms_addfb_basic: exiting, ret=0
11280 23:02:33.404203 ement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11281 23:02:33.410854 Test req<8>[ 21.350197] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-modifier RESULT=pass>
11282 23:02:33.411113 Received signal: <TESTCASE> TEST_CASE_ID=unused-modifier RESULT=pass
11284 23:02:33.414242 uirement: is_i915_device(fd)
11285 23:02:33.420504 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11286 23:02:33.423962 Test requirement: is_i915_device(fd)
11287 23:02:33.427297 No KMS driver or no outputs, pipes: 8, outputs: 0
11288 23:02:33.434009 <14>[ 21.375768] [IGT] kms_addfb_basic: executing
11289 23:02:33.440230 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11290 23:02:33.447241 <14>[ 21.385160] [IGT] kms_addfb_basic: starting subtest clobberred-modifier
11291 23:02:33.450505 Opened device: /dev/dri/card0
11292 23:02:33.453677 Starting subtest: clobberred-modifier
11293 23:02:33.463572 Test requirement not met in function igt_require_i915, fil<14>[ 21.403254] [IGT] kms_addfb_basic: exiting, ret=77
11294 23:02:33.463657 e ../lib/drmtest.c:721:
11295 23:02:33.466580 Test requirement: is_i915_device(fd)
11296 23:02:33.476444 [1mSubtest clobb<8>[ 21.415985] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clobberred-modifier RESULT=skip>
11297 23:02:33.476699 Received signal: <TESTCASE> TEST_CASE_ID=clobberred-modifier RESULT=skip
11299 23:02:33.479914 erred-modifier: SKIP (0.000s)[0m
11300 23:02:33.486544 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11301 23:02:33.489856 Test requirement: is_i915_device(fd)
11302 23:02:33.499706 Test requirement not met in function igt_require_i91<14>[ 21.441481] [IGT] kms_addfb_basic: executing
11303 23:02:33.502852 5, file ../lib/drmtest.c:721:
11304 23:02:33.513041 Test requirement: is_i915_device(<14>[ 21.451372] [IGT] kms_addfb_basic: starting subtest invalid-smem-bo-on-discrete
11305 23:02:33.513125 fd)
11306 23:02:33.519545 No KMS driver or no outputs, pipes: 8, outputs: 0
11307 23:02:33.522915 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11308 23:02:33.529307 Opened d<14>[ 21.469787] [IGT] kms_addfb_basic: exiting, ret=77
11309 23:02:33.532551 evice: /dev/dri/card0
11310 23:02:33.536001 Starting subtest: invalid-smem-bo-on-discrete
11311 23:02:33.545900 Test requi<8>[ 21.482638] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip>
11312 23:02:33.546154 Received signal: <TESTCASE> TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip
11314 23:02:33.552270 rement not met in function igt_require_intel, file ../lib/drmtest.c:716:
11315 23:02:33.555726 Test requirement: is_intel_device(fd)
11316 23:02:33.558952 [1mSubtest invalid-smem-bo-on-discrete: SKIP (0.000s)[0m
11317 23:02:33.565713 Test requirement not met in functio<14>[ 21.508653] [IGT] kms_addfb_basic: executing
11318 23:02:33.572199 n igt_require_i915, file ../lib/drmtest.c:721:
11319 23:02:33.578747 Test requirement<14>[ 21.518871] [IGT] kms_addfb_basic: starting subtest legacy-format
11320 23:02:33.582378 : is_i915_device(fd)
11321 23:02:33.589054 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11322 23:02:33.592335 Test requirement: is_i915_device(fd)
11323 23:02:33.595705 No KMS driver or no outputs, pipes: 8, outputs: 0
11324 23:02:33.602071 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11325 23:02:33.608542 Opened device:<14>[ 21.548823] [IGT] kms_addfb_basic: exiting, ret=0
11326 23:02:33.608624 /dev/dri/card0
11327 23:02:33.612167 Starting subtest: legacy-format
11328 23:02:33.621930 Successfully fuzzed 10000 {bpp<8>[ 21.561104] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=legacy-format RESULT=pass>
11329 23:02:33.622183 Received signal: <TESTCASE> TEST_CASE_ID=legacy-format RESULT=pass
11331 23:02:33.625323 , depth} variations
11332 23:02:33.628312 [1mSubtest legacy-format: SUCCESS (0.013s)[0m
11333 23:02:33.635145 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11334 23:02:33.638455 Test requirement: is_i915_device(fd)
11335 23:02:33.644613 Test requirement <14>[ 21.586253] [IGT] kms_addfb_basic: executing
11336 23:02:33.651253 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11337 23:02:33.658217 Test requirement: is_i915_devi<14>[ 21.598817] [IGT] kms_addfb_basic: starting subtest no-handle
11338 23:02:33.661096 ce(fd)
11339 23:02:33.664432 No KMS driver or no outputs, pipes: 8, outputs: 0
11340 23:02:33.671402 IGT-Version: 1.27.1-g766edf9 (aarch64<14>[ 21.613469] [IGT] kms_addfb_basic: exiting, ret=0
11341 23:02:33.674664 ) (Linux: 6.1.31 aarch64)
11342 23:02:33.677656 Opened device: /dev/dri/card0
11343 23:02:33.684533 Starting subtest: no-h<8>[ 21.625943] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=no-handle RESULT=pass>
11344 23:02:33.684818 Received signal: <TESTCASE> TEST_CASE_ID=no-handle RESULT=pass
11346 23:02:33.687957 andle
11347 23:02:33.690856 [1mSubtest no-handle: SUCCESS (0.000s)[0m
11348 23:02:33.697812 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11349 23:02:33.700904 Test requirement: is_i915_device(fd)
11350 23:02:33.707788 Test requirement not met in functio<14>[ 21.649960] [IGT] kms_addfb_basic: executing
11351 23:02:33.714372 n igt_require_i915, file ../lib/drmtest.c:721:
11352 23:02:33.717682 Test requirement: is_i915_device(fd)
11353 23:02:33.723978 No KMS dri<14>[ 21.663095] [IGT] kms_addfb_basic: starting subtest basic
11354 23:02:33.727205 ver or no outputs, pipes: 8, outputs: 0
11355 23:02:33.737028 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 a<14>[ 21.677123] [IGT] kms_addfb_basic: exiting, ret=0
11356 23:02:33.737110 arch64)
11357 23:02:33.740697 Opened device: /dev/dri/card0
11358 23:02:33.740820 Starting subtest: basic
11359 23:02:33.750488 [1mSubtest bas<8>[ 21.689745] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
11360 23:02:33.750574 ic: SUCCESS (0.000s)[0m
11361 23:02:33.750811 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11363 23:02:33.760213 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11364 23:02:33.763585 Test requirement: is_i915_device(fd)
11365 23:02:33.773734 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:<14>[ 21.714746] [IGT] kms_addfb_basic: executing
11366 23:02:33.773820 721:
11367 23:02:33.776759 Test requirement: is_i915_device(fd)
11368 23:02:33.783129 No KMS driver or no outputs, pipes: 8, outputs: 0
11369 23:02:33.786626 I<14>[ 21.728261] [IGT] kms_addfb_basic: starting subtest bad-pitch-0
11370 23:02:33.793438 GT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11371 23:02:33.796797 Opened device: /dev/dri/card0
11372 23:02:33.803271 St<14>[ 21.742553] [IGT] kms_addfb_basic: exiting, ret=0
11373 23:02:33.803355 arting subtest: bad-pitch-0
11374 23:02:33.809771 [1mSubtest bad-pitch-0: SUCCESS (0.000s)[0m
11375 23:02:33.816330 Test<8>[ 21.755056] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-0 RESULT=pass>
11376 23:02:33.816610 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-0 RESULT=pass
11378 23:02:33.823329 requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11379 23:02:33.826652 Test requirement: is_i915_device(fd)
11380 23:02:33.833258 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11381 23:02:33.839761 Test req<14>[ 21.779753] [IGT] kms_addfb_basic: executing
11382 23:02:33.839845 uirement: is_i915_device(fd)
11383 23:02:33.846372 No KMS driver or no outputs, pipes: 8, outputs: 0
11384 23:02:33.852711 IGT-Version: 1.<14>[ 21.792671] [IGT] kms_addfb_basic: starting subtest bad-pitch-32
11385 23:02:33.856061 27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11386 23:02:33.859497 Opened device: /dev/dri/card0
11387 23:02:33.865880 Starting subtest<14>[ 21.807241] [IGT] kms_addfb_basic: exiting, ret=0
11388 23:02:33.869208 : bad-pitch-32
11389 23:02:33.872472 [1mSubtest bad-pitch-32: SUCCESS (0.000s)[0m
11390 23:02:33.879329 Test requirement<8>[ 21.819726] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-32 RESULT=pass>
11391 23:02:33.879584 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-32 RESULT=pass
11393 23:02:33.885657 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11394 23:02:33.889095 Test requirement: is_i915_device(fd)
11395 23:02:33.895393 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11396 23:02:33.902222 Test requirement: is<14>[ 21.844406] [IGT] kms_addfb_basic: executing
11397 23:02:33.905575 _i915_device(fd)
11398 23:02:33.908774 No KMS driver or no outputs, pipes: 8, outputs: 0
11399 23:02:33.919110 IGT-Version: 1.27.1-g766edf<14>[ 21.857269] [IGT] kms_addfb_basic: starting subtest bad-pitch-63
11400 23:02:33.921796 9 (aarch64) (Linux: 6.1.31 aarch64)
11401 23:02:33.921881 Opened device: /dev/dri/card0
11402 23:02:33.932299 Starting subtest: bad-pitch-<14>[ 21.872056] [IGT] kms_addfb_basic: exiting, ret=0
11403 23:02:33.932383 63
11404 23:02:33.935305 [1mSubtest bad-pitch-63: SUCCESS (0.000s)[0m
11405 23:02:33.945389 Test requirement not met in <8>[ 21.884721] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-63 RESULT=pass>
11406 23:02:33.945644 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-63 RESULT=pass
11408 23:02:33.948661 function igt_require_i915, file ../lib/drmtest.c:721:
11409 23:02:33.951930 Test requirement: is_i915_device(fd)
11410 23:02:33.961903 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11411 23:02:33.968324 Test requirement: is_i915_device<14>[ 21.909162] [IGT] kms_addfb_basic: executing
11412 23:02:33.968407 (fd)
11413 23:02:33.971665 No KMS driver or no outputs, pipes: 8, outputs: 0
11414 23:02:33.981726 IGT-Version: 1.27.1-g766edf9 (aarch64) <14>[ 21.922011] [IGT] kms_addfb_basic: starting subtest bad-pitch-128
11415 23:02:33.984557 (Linux: 6.1.31 aarch64)
11416 23:02:33.987995 Opened device: /dev/dri/card0
11417 23:02:33.991460 Starting subtest: bad-pitch-128
11418 23:02:33.994877 [1mSub<14>[ 21.936922] [IGT] kms_addfb_basic: exiting, ret=0
11419 23:02:33.998310 test bad-pitch-128: SUCCESS (0.000s)[0m
11420 23:02:34.011309 Test requirement not met in function i<8>[ 21.949428] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-128 RESULT=pass>
11421 23:02:34.011563 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-128 RESULT=pass
11423 23:02:34.014410 gt_require_i915, file ../lib/drmtest.c:721:
11424 23:02:34.017733 Test requirement: is_i915_device(fd)
11425 23:02:34.024316 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11426 23:02:34.027542 Test requirement: is_i915_device(fd)
11427 23:02:34.031138 No K<14>[ 21.973915] [IGT] kms_addfb_basic: executing
11428 23:02:34.037718 MS driver or no outputs, pipes: 8, outputs: 0
11429 23:02:34.047468 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.<14>[ 21.987050] [IGT] kms_addfb_basic: starting subtest bad-pitch-256
11430 23:02:34.047558 1.31 aarch64)
11431 23:02:34.050799 Opened device: /dev/dri/card0
11432 23:02:34.054016 Starting subtest: bad-pitch-256
11433 23:02:34.060883 [1mSubtest bad-p<14>[ 22.001922] [IGT] kms_addfb_basic: exiting, ret=0
11434 23:02:34.064096 itch-256: SUCCESS (0.000s)[0m
11435 23:02:34.074013 Test requirement not met in function igt_require<8>[ 22.014105] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-256 RESULT=pass>
11436 23:02:34.074272 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-256 RESULT=pass
11438 23:02:34.077308 _i915, file ../lib/drmtest.c:721:
11439 23:02:34.080613 Test requirement: is_i915_device(fd)
11440 23:02:34.087363 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11441 23:02:34.090791 Test requirement: is_i915_device(fd)
11442 23:02:34.097244 No KMS driver <14>[ 22.039087] [IGT] kms_addfb_basic: executing
11443 23:02:34.100711 or no outputs, pipes: 8, outputs: 0
11444 23:02:34.113899 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch<14>[ 22.051867] [IGT] kms_addfb_basic: starting subtest bad-pitch-1024
11445 23:02:34.113983 64)
11446 23:02:34.116819 Opened device: /dev/dri/card0
11447 23:02:34.116903 Starting subtest: bad-pitch-1024
11448 23:02:34.127079 [1mSubtest bad-pitch-1024<14>[ 22.066767] [IGT] kms_addfb_basic: exiting, ret=0
11449 23:02:34.127163 : SUCCESS (0.000s)[0m
11450 23:02:34.140125 Test requirement not met in function igt_require_i915, f<8>[ 22.079527] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-1024 RESULT=pass>
11451 23:02:34.140382 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-1024 RESULT=pass
11453 23:02:34.143278 ile ../lib/drmtest.c:721:
11454 23:02:34.146506 Test requirement: is_i915_device(fd)
11455 23:02:34.153156 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11456 23:02:34.156403 Test requirement: is_i915_device(fd)
11457 23:02:34.163205 No KMS driver or no ou<14>[ 22.103954] [IGT] kms_addfb_basic: executing
11458 23:02:34.166417 tputs, pipes: 8, outputs: 0
11459 23:02:34.169877 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11460 23:02:34.176705 Ope<14>[ 22.116973] [IGT] kms_addfb_basic: starting subtest bad-pitch-999
11461 23:02:34.179710 ned device: /dev/dri/card0
11462 23:02:34.182972 Starting subtest: bad-pitch-999
11463 23:02:34.189817 [1mSubtest bad-pitch-999: SUCCESS <14>[ 22.131856] [IGT] kms_addfb_basic: exiting, ret=0
11464 23:02:34.192802 (0.000s)[0m
11465 23:02:34.206027 Test requirement not met in function igt_require_i915, file ../lib<8>[ 22.144494] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-999 RESULT=pass>
11466 23:02:34.206115 /drmtest.c:721:
11467 23:02:34.206354 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-999 RESULT=pass
11469 23:02:34.209516 Test requirement: is_i915_device(fd)
11470 23:02:34.215862 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11471 23:02:34.219400 Test requirement: is_i915_device(fd)
11472 23:02:34.226058 No KMS driver or no outputs, pip<14>[ 22.169023] [IGT] kms_addfb_basic: executing
11473 23:02:34.229493 es: 8, outputs: 0
11474 23:02:34.235857 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11475 23:02:34.242432 Opened device<14>[ 22.181912] [IGT] kms_addfb_basic: starting subtest bad-pitch-65536
11476 23:02:34.242517 : /dev/dri/card0
11477 23:02:34.245630 Starting subtest: bad-pitch-65536
11478 23:02:34.255702 [1mSubtest bad-pitch-65536: SUCCESS (0.000<14>[ 22.196948] [IGT] kms_addfb_basic: exiting, ret=0
11479 23:02:34.255788 s)[0m
11480 23:02:34.269157 Test requirement not met in function igt_require_i915, file ../lib/drmte<8>[ 22.209489] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-65536 RESULT=pass>
11481 23:02:34.269416 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-65536 RESULT=pass
11483 23:02:34.272454 st.c:721:
11484 23:02:34.275426 Test requirement: is_i915_device(fd)
11485 23:02:34.282162 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11486 23:02:34.285410 Test requirement: is_i915_device(fd)
11487 23:02:34.292124 No KMS driver or no outputs, pipes: 8,<14>[ 22.234335] [IGT] kms_addfb_basic: executing
11488 23:02:34.295455 outputs: 0
11489 23:02:34.298449 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11490 23:02:34.301816 Opened device: /dev/dri/card0
11491 23:02:34.308673 <14>[ 22.249350] [IGT] kms_addfb_basic: starting subtest invalid-get-prop-any
11492 23:02:34.311991 Starting subtest: invalid-get-prop-any
11493 23:02:34.321832 [1mSubtest invalid-get-<14>[ 22.261553] [IGT] kms_addfb_basic: exiting, ret=0
11494 23:02:34.321915 prop-any: SUCCESS (0.000s)[0m
11495 23:02:34.335040 Test requirement not met in function igt_require<8>[ 22.273583] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
11496 23:02:34.335327 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
11498 23:02:34.338480 _i915, file ../lib/drmtest.c:721:
11499 23:02:34.341585 Test requirement: is_i915_device(fd)
11500 23:02:34.348018 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11501 23:02:34.351171 Test requirement: is_i915_device(fd)
11502 23:02:34.358150 No KMS driver <14>[ 22.299066] [IGT] kms_addfb_basic: executing
11503 23:02:34.361329 or no outputs, pipes: 8, outputs: 0
11504 23:02:34.367966 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11505 23:02:34.374576 Opened device: /dev/dri/car<14>[ 22.314226] [IGT] kms_addfb_basic: starting subtest invalid-get-prop
11506 23:02:34.374660 d0
11507 23:02:34.377930 Starting subtest: invalid-get-prop
11508 23:02:34.387619 [1mSubtest invalid-get-prop<14>[ 22.327733] [IGT] kms_addfb_basic: exiting, ret=0
11509 23:02:34.387703 : SUCCESS (0.000s)[0m
11510 23:02:34.400543 Test requirement not met in function igt_require_i915, f<8>[ 22.339806] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
11511 23:02:34.400789 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
11513 23:02:34.403990 ile ../lib/drmtest.c:721:
11514 23:02:34.407454 Test requirement: is_i915_device(fd)
11515 23:02:34.414288 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11516 23:02:34.417204 Test requirement: is_i915_device(fd)
11517 23:02:34.424097 No KMS driver or no ou<14>[ 22.364901] [IGT] kms_addfb_basic: executing
11518 23:02:34.427006 tputs, pipes: 8, outputs: 0
11519 23:02:34.430464 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11520 23:02:34.433832 Opened device: /dev/dri/card0
11521 23:02:34.440446 <14>[ 22.380115] [IGT] kms_addfb_basic: starting subtest invalid-set-prop-any
11522 23:02:34.443944 Starting subtest: invalid-set-prop-any
11523 23:02:34.453614 [1mSubtest invalid-set-<14>[ 22.393369] [IGT] kms_addfb_basic: exiting, ret=0
11524 23:02:34.453700 prop-any: SUCCESS (0.000s)[0m
11525 23:02:34.466973 Test requirement not met in function igt_require<8>[ 22.405536] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
11526 23:02:34.467232 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
11528 23:02:34.470115 _i915, file ../lib/drmtest.c:721:
11529 23:02:34.473472 Test requirement: is_i915_device(fd)
11530 23:02:34.480062 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11531 23:02:34.483404 Test requirement: is_i915_device(fd)
11532 23:02:34.489770 No KMS driver <14>[ 22.430956] [IGT] kms_addfb_basic: executing
11533 23:02:34.493117 or no outputs, pipes: 8, outputs: 0
11534 23:02:34.496425 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11535 23:02:34.506637 Opened device: /dev/dri/car<14>[ 22.446152] [IGT] kms_addfb_basic: starting subtest invalid-set-prop
11536 23:02:34.506723 d0
11537 23:02:34.509457 Starting subtest: invalid-set-prop
11538 23:02:34.519665 [1mSubtest invalid-set-prop<14>[ 22.459431] [IGT] kms_addfb_basic: exiting, ret=0
11539 23:02:34.519749 : SUCCESS (0.000s)[0m
11540 23:02:34.533070 Test requirement not met in function igt_require_i915, f<8>[ 22.471681] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
11541 23:02:34.533325 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
11543 23:02:34.535871 ile ../lib/drmtest.c:721:
11544 23:02:34.539296 Test requirement: is_i915_device(fd)
11545 23:02:34.545911 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11546 23:02:34.549178 Test requirement: is_i915_device(fd)
11547 23:02:34.555660 No KMS driver or no ou<14>[ 22.496788] [IGT] kms_addfb_basic: executing
11548 23:02:34.558899 tputs, pipes: 8, outputs: 0
11549 23:02:34.562561 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11550 23:02:34.565665 Opened device: /dev/dri/card0
11551 23:02:34.572463 <14>[ 22.514361] [IGT] kms_addfb_basic: starting subtest master-rmfb
11552 23:02:34.575520 Starting subtest: master-rmfb
11553 23:02:34.582460 [1mSubtest maste<14>[ 22.523589] [IGT] kms_addfb_basic: exiting, ret=0
11554 23:02:34.585765 r-rmfb: SUCCESS (0.000s)[0m
11555 23:02:34.595613 Test requirement not met in function igt_require_i<8>[ 22.536627] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=master-rmfb RESULT=pass>
11556 23:02:34.595861 Received signal: <TESTCASE> TEST_CASE_ID=master-rmfb RESULT=pass
11558 23:02:34.598841 915, file ../lib/drmtest.c:721:
11559 23:02:34.602242 Test requirement: is_i915_device(fd)
11560 23:02:34.608705 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11561 23:02:34.612053 Test requirement: is_i915_device(fd)
11562 23:02:34.618291 No KMS driver or<14>[ 22.561055] [IGT] kms_addfb_basic: executing
11563 23:02:34.621730 no outputs, pipes: 8, outputs: 0
11564 23:02:34.628128 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11565 23:02:34.631585 Opened device: /dev/dri/card0
11566 23:02:34.642014 <14>[ 22.580948] [IGT] kms_addfb_basic: starting subtest addfb25-modifier-no-flag
11567 23:02:34.648796 Starting subtest<14>[ 22.588995] [IGT] kms_addfb_basic: exiting, ret=0
11568 23:02:34.652053 : addfb25-modifier-no-flag
11569 23:02:34.661804 [1mSubtest addfb25-modifier-no-flag: SUCCESS (0.000<8>[ 22.601556] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass>
11570 23:02:34.662084 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass
11572 23:02:34.664972 s)[0m
11573 23:02:34.671833 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11574 23:02:34.675075 Test requirement: is_i915_device(fd)
11575 23:02:34.681713 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11576 23:02:34.688193 Test require<14>[ 22.628308] [IGT] kms_addfb_basic: executing
11577 23:02:34.688293 ment: is_i915_device(fd)
11578 23:02:34.695068 No KMS driver or no outputs, pipes: 8, outputs: 0
11579 23:02:34.698576 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11580 23:02:34.701518 Opened device: /dev/dri/card0
11581 23:02:34.708334 <14>[ 22.648390] [IGT] kms_addfb_basic: starting subtest addfb25-bad-modifier
11582 23:02:34.711326 Starting subtest: addfb25-bad-modifier
11583 23:02:34.724782 (kms_addfb_basic:433) CRITICAL: Test assertion failure function addfb25_<14>[ 22.665820] [IGT] kms_addfb_basic: exiting, ret=98
11584 23:02:34.728179 tests, file ../tests/kms_addfb_basic.c:662:
11585 23:02:34.737847 (kms_addfb_basic:433) CRITICAL: Fai<8>[ 22.677623] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-bad-modifier RESULT=fail>
11586 23:02:34.738131 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-bad-modifier RESULT=fail
11588 23:02:34.754403 led assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1
11589 23:02:34.761031 (kms_addfb_basic:433) CRITICAL: error<14>[ 22.702947] [IGT] kms_addfb_basic: executing
11590 23:02:34.761144 : 0 != -1
11591 23:02:34.764368 Stack trace:
11592 23:02:34.767720 #0 ../lib/igt_core.c:1963 __igt_fail_assert()
11593 23:02:34.770815 #1 [<unknown>+0xb24447e0]
11594 23:02:34.774343 #2 [<unknown>+0xb2446278]
11595 23:02:34.774452 #3 [<unknown>+0xb244167c]
11596 23:02:34.780712 #4 [__libc_st<14>[ 22.723153] [IGT] kms_addfb_basic: exiting, ret=77
11597 23:02:34.784016 art_main+0xe8]
11598 23:02:34.784117 #5 [<unknown>+0xb24416b4]
11599 23:02:34.787623 #6 [<unknown>+0xb24416b4]
11600 23:02:34.797330 Subtes<8>[ 22.735618] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip>
11601 23:02:34.797585 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip
11603 23:02:34.800688 t addfb25-bad-modifier failed.
11604 23:02:34.800806 **** DEBUG ****
11605 23:02:34.810730 (kms_addfb_basic:433) ioctl_wrappers-DEBUG: Test requirement passed: igt_has_fb_modifiers(fd)
11606 23:02:34.820656 (kms_addfb_basic:433) CRITICAL: Test assertion failure function addfb25_tests, f<14>[ 22.762996] [IGT] kms_addfb_basic: executing
11607 23:02:34.824127 ile ../tests/kms_addfb_basic.c:662:
11608 23:02:34.840267 (kms_addfb_basic:433) CRITICAL: Failed assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0xB8)) << 0) | ((<14>[ 22.783250] [IGT] kms_addfb_basic: exiting, ret=77
11609 23:02:34.847026 ((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1
11610 23:02:34.856746 (kms_addfb_ba<8>[ 22.795442] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip>
11611 23:02:34.857027 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip
11613 23:02:34.860233 sic:433) CRITICAL: error: 0 != -1
11614 23:02:34.863609 (kms_addfb_basic:433) igt_core-INFO: Stack trace:
11615 23:02:34.870136 (kms_addfb_basic:433) igt_core-INFO: #0 ../lib/igt_core.c:1963 __igt_fail_assert()
11616 23:02:34.879853 (kms_addfb_basic:433) igt_core-INFO:<14>[ 22.821157] [IGT] kms_addfb_basic: executing
11617 23:02:34.883366 #1 [<unknown>+0xb24447e0]
11618 23:02:34.886465 (kms_addfb_basic:433) igt_core-INFO: #2 [<unknown>+0xb2446278]
11619 23:02:34.892987 (kms_addfb_basic:433) igt_core-INFO: #3 [<unknown>+0xb244167c]
11620 23:02:34.899914 (kms_addfb_bas<14>[ 22.841275] [IGT] kms_addfb_basic: exiting, ret=77
11621 23:02:34.903299 ic:433) igt_core-INFO: #4 [__libc_start_main+0xe8]
11622 23:02:34.916229 (kms_addfb_basic:433) igt_<8>[ 22.853486] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip>
11623 23:02:34.916482 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip
11625 23:02:34.919688 core-INFO: #5 [<unknown>+0xb24416b4]
11626 23:02:34.926149 (kms_addfb_basic:433) igt_core-INFO: #6 [<unknown>+0xb24416b4]
11627 23:02:34.926222 **** END ****
11628 23:02:34.929539 [1mSubtest addfb25-bad-modifier: FAIL (0.009s)[0m
11629 23:02:34.939319 Test requirement not met in func<14>[ 22.879945] [IGT] kms_addfb_basic: executing
11630 23:02:34.942687 tion igt_require_i915, file ../lib/drmtest.c:721:
11631 23:02:34.946084 Test requirement: is_i915_device(fd)
11632 23:02:34.952687 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11633 23:02:34.959126 Test<14>[ 22.900133] [IGT] kms_addfb_basic: exiting, ret=77
11634 23:02:34.962537 requirement: is_i915_device(fd)
11635 23:02:34.972468 No KMS driver or no outputs, pipes: 8, outputs<8>[ 22.912082] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip>
11636 23:02:34.972552 : 0
11637 23:02:34.972822 Received signal: <TESTCASE> TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip
11639 23:02:34.979353 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11640 23:02:34.982245 Opened device: /dev/dri/card0
11641 23:02:34.988654 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11642 23:02:34.995412 Test requirement: is_i915<14>[ 22.937572] [IGT] kms_addfb_basic: executing
11643 23:02:34.995492 _device(fd)
11644 23:02:35.002008 [1mSubtest addfb25-x-tiled-mismatch-legacy: SKIP (0.000s)[0m
11645 23:02:35.008875 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11646 23:02:35.015350 Test requirement<14>[ 22.957530] [IGT] kms_addfb_basic: exiting, ret=77
11647 23:02:35.018652 : is_i915_device(fd)
11648 23:02:35.022063 No KMS driver or no outputs, pipes: 8, outputs: 0
11649 23:02:35.031801 IGT-Ver<8>[ 22.969999] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip>
11650 23:02:35.032049 Received signal: <TESTCASE> TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip
11652 23:02:35.035280 sion: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11653 23:02:35.038647 Opened device: /dev/dri/card0
11654 23:02:35.045143 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11655 23:02:35.048696 Test requirement: is_i915_device(fd)
11656 23:02:35.055169 <14>[ 22.995841] [IGT] kms_addfb_basic: executing
11657 23:02:35.055250
11658 23:02:35.058164 [1mSubtest addfb25-x-tiled-legacy: SKIP (0.000s)[0m
11659 23:02:35.065012 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11660 23:02:35.068413 Test requirement: is_i915_device(fd)
11661 23:02:35.074654 <14>[ 23.015950] [IGT] kms_addfb_basic: exiting, ret=77
11662 23:02:35.074726
11663 23:02:35.078282 No KMS driver or no outputs, pipes: 8, outputs: 0
11664 23:02:35.088085 IGT-Version: 1.27.1-g766edf9<8>[ 23.028163] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tile-pitch-mismatch RESULT=skip>
11665 23:02:35.088342 Received signal: <TESTCASE> TEST_CASE_ID=tile-pitch-mismatch RESULT=skip
11667 23:02:35.091317 (aarch64) (Linux: 6.1.31 aarch64)
11668 23:02:35.094391 Opened device: /dev/dri/card0
11669 23:02:35.101075 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11670 23:02:35.104387 Test requirement: is_i915_device(fd)
11671 23:02:35.110854 [1mSubtest addfb25-<14>[ 23.053491] [IGT] kms_addfb_basic: executing
11672 23:02:35.114625 framebuffer-vs-set-tiling: SKIP (0.000s)[0m
11673 23:02:35.124279 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11674 23:02:35.127739 Test requirement: is_i915_device(fd)
11675 23:02:35.131286 No KMS dr<14>[ 23.073648] [IGT] kms_addfb_basic: exiting, ret=77
11676 23:02:35.134152 iver or no outputs, pipes: 8, outputs: 0
11677 23:02:35.147561 IGT-Version: 1.27.1-g766edf9 (aarch64)<8>[ 23.085819] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip>
11678 23:02:35.147814 Received signal: <TESTCASE> TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip
11680 23:02:35.151038 (Linux: 6.1.31 aarch64)
11681 23:02:35.151116 Opened device: /dev/dri/card0
11682 23:02:35.160697 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11683 23:02:35.164341 Test requirement: is_i915_device(fd)
11684 23:02:35.170671 Test requirement not met in fu<14>[ 23.111566] [IGT] kms_addfb_basic: executing
11685 23:02:35.174199 nction igt_require_i915, file ../lib/drmtest.c:721:
11686 23:02:35.177162 Test requirement: is_i915_device(fd)
11687 23:02:35.183881 [1mSubtest basic-x-tiled-legacy: SKIP (0.000s)[0m
11688 23:02:35.190404 No KMS driver or no outputs, pip<14>[ 23.131533] [IGT] kms_addfb_basic: exiting, ret=77
11689 23:02:35.190557 es: 8, outputs: 0
11690 23:02:35.203859 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64<8>[ 23.143747] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=size-max RESULT=skip>
11691 23:02:35.203943 )
11692 23:02:35.204180 Received signal: <TESTCASE> TEST_CASE_ID=size-max RESULT=skip
11694 23:02:35.207178 Opened device: /dev/dri/card0
11695 23:02:35.213480 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11696 23:02:35.216991 Test requirement: is_i915_device(fd)
11697 23:02:35.226951 Test requirement not met in function igt_require_i915<14>[ 23.168006] [IGT] kms_addfb_basic: executing
11698 23:02:35.230401 , file ../lib/drmtest.c:721:
11699 23:02:35.233292 Test requirement: is_i915_device(fd)
11700 23:02:35.236703 [1mSubtest framebuffer-vs-set-tiling: SKIP (0.000s)[0m
11701 23:02:35.243559 No KMS driver or no outputs, pipes: 8, outputs: 0
11702 23:02:35.246534 <14>[ 23.188347] [IGT] kms_addfb_basic: exiting, ret=77
11703 23:02:35.246603
11704 23:02:35.253556 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11705 23:02:35.259959 Opened device: <8>[ 23.200378] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-wide RESULT=skip>
11706 23:02:35.260209 Received signal: <TESTCASE> TEST_CASE_ID=too-wide RESULT=skip
11708 23:02:35.263494 /dev/dri/card0
11709 23:02:35.269758 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11710 23:02:35.273236 Test requirement: is_i915_device(fd)
11711 23:02:35.282851 Test requirement not met in function igt_require_i915, file ../lib/drmt<14>[ 23.224944] [IGT] kms_addfb_basic: executing
11712 23:02:35.282930 est.c:721:
11713 23:02:35.286162 Test requirement: is_i915_device(fd)
11714 23:02:35.293265 [1mSubtest tile-pitch-mismatch: SKIP (0.000s)[0m
11715 23:02:35.296012 No KMS driver or no outputs, pipes: 8, outputs: 0
11716 23:02:35.303001 IGT-Version: 1.27.1-g76<14>[ 23.244967] [IGT] kms_addfb_basic: exiting, ret=77
11717 23:02:35.306046 6edf9 (aarch64) (Linux: 6.1.31 aarch64)
11718 23:02:35.309582 Opened device: /dev/dri/card0
11719 23:02:35.316134 Test req<8>[ 23.257119] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-high RESULT=skip>
11720 23:02:35.316381 Received signal: <TESTCASE> TEST_CASE_ID=too-high RESULT=skip
11722 23:02:35.322789 uirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11723 23:02:35.326034 Test requirement: is_i915_device(fd)
11724 23:02:35.332723 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11725 23:02:35.339237 Test require<14>[ 23.281501] [IGT] kms_addfb_basic: executing
11726 23:02:35.342689 ment: is_i915_device(fd)
11727 23:02:35.346084 [1mSubtest basic-y-tiled-legacy: SKIP (0.000s)[0m
11728 23:02:35.352468 No KMS driver or no outputs, pipes: 8, outputs: 0
11729 23:02:35.359390 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux:<14>[ 23.301815] [IGT] kms_addfb_basic: exiting, ret=77
11730 23:02:35.362808 6.1.31 aarch64)
11731 23:02:35.365691 Opened device: /dev/dri/card0
11732 23:02:35.372885 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small RESULT=skip
11734 23:02:35.375837 Test requirement not met in fun<8>[ 23.313787] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small RESULT=skip>
11735 23:02:35.379275 ction igt_require_i915, file ../lib/drmtest.c:721:
11736 23:02:35.382284 Test requirement: is_i915_device(fd)
11737 23:02:35.389065 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11738 23:02:35.395555 Test requirement: is_i915_device(fd<14>[ 23.338699] [IGT] kms_addfb_basic: executing
11739 23:02:35.399124 )
11740 23:02:35.402488 No KMS driver or no outputs, pipes: 8, outputs: 0
11741 23:02:35.405886 [1mSubtest size-max: SKIP (0.000s)[0m
11742 23:02:35.412086 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11743 23:02:35.418572 Opened device: /d<14>[ 23.358805] [IGT] kms_addfb_basic: exiting, ret=77
11744 23:02:35.418699 ev/dri/card0
11745 23:02:35.431772 Test requirement not met in function igt_require_i915, file ../lib<8>[ 23.371167] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=small-bo RESULT=skip>
11746 23:02:35.431860 /drmtest.c:721:
11747 23:02:35.432100 Received signal: <TESTCASE> TEST_CASE_ID=small-bo RESULT=skip
11749 23:02:35.435021 Test requirement: is_i915_device(fd)
11750 23:02:35.441742 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11751 23:02:35.444681 Test requirement: is_i915_device(fd)
11752 23:02:35.454832 No KMS driver or no outputs, pip<14>[ 23.395296] [IGT] kms_addfb_basic: executing
11753 23:02:35.454920 es: 8, outputs: 0
11754 23:02:35.458330 [1mSubtest too-wide: SKIP (0.000s)[0m
11755 23:02:35.464713 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11756 23:02:35.468198 Opened device: /dev/dri/card0
11757 23:02:35.474628 Test requirement not <14>[ 23.415569] [IGT] kms_addfb_basic: exiting, ret=77
11758 23:02:35.481434 met in function igt_require_i915, file ../lib/drmtest.c:721:
11759 23:02:35.487796 Test requirement: <8>[ 23.427751] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip>
11760 23:02:35.488053 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip
11762 23:02:35.491237 is_i915_device(fd)
11763 23:02:35.497623 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11764 23:02:35.500776 Test requirement: is_i915_device(fd)
11765 23:02:35.507983 No KMS driver or no outputs, pipes: 8, outputs: 0
11766 23:02:35.510918 [1mSubtest too-<14>[ 23.453779] [IGT] kms_addfb_basic: executing
11767 23:02:35.514154 high: SKIP (0.000s)[0m
11768 23:02:35.520866 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11769 23:02:35.523933 Opened device: /dev/dri/card0
11770 23:02:35.534175 Test requirement not met in function igt_require_i915, f<14>[ 23.473822] [IGT] kms_addfb_basic: exiting, ret=77
11771 23:02:35.534289 ile ../lib/drmtest.c:721:
11772 23:02:35.537326 Test requirement: is_i915_device(fd)
11773 23:02:35.547211 Test requiremen<8>[ 23.486269] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip>
11774 23:02:35.547510 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip
11776 23:02:35.554065 t not met in function igt_require_i915, file ../lib/drmtest.c:721:
11777 23:02:35.557024 Test requirement: is_i915_device(fd)
11778 23:02:35.560394 No KMS driver or no outputs, pipes: 8, outputs: 0
11779 23:02:35.563758 [1mSubtest bo-too-small: SKIP (0.000s)[0m
11780 23:02:35.570276 IGT-Ve<14>[ 23.511505] [IGT] kms_addfb_basic: executing
11781 23:02:35.573749 rsion: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11782 23:02:35.577172 Opened device: /dev/dri/card0
11783 23:02:35.583568 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11784 23:02:35.589941 Test<14>[ 23.531845] [IGT] kms_addfb_basic: exiting, ret=77
11785 23:02:35.593353 requirement: is_i915_device(fd)
11786 23:02:35.606631 Test requirement not met in function igt_requi<8>[ 23.543962] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip>
11787 23:02:35.606887 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip
11789 23:02:35.609805 re_i915, file ../lib/drmtest.c:721:
11790 23:02:35.613462 Test requirement: is_i915_device(fd)
11791 23:02:35.616410 No KMS driver or no outputs, pipes: 8, outputs: 0
11792 23:02:35.619850 [1mSubtest small-bo: SKIP (0.000s)[0m
11793 23:02:35.626570 IGT-Version: 1.27.1-g766edf9 (aarch64) (L<14>[ 23.569825] [IGT] kms_addfb_basic: executing
11794 23:02:35.629692 inux: 6.1.31 aarch64)
11795 23:02:35.632760 Opened device: /dev/dri/card0
11796 23:02:35.639649 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11797 23:02:35.642660 Test requirement: is_i915_device(fd)
11798 23:02:35.649535 T<14>[ 23.589725] [IGT] kms_addfb_basic: exiting, ret=77
11799 23:02:35.662705 est requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:<8>[ 23.602001] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip>
11800 23:02:35.662793
11801 23:02:35.663032 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip
11803 23:02:35.665736 Test requirement: is_i915_device(fd)
11804 23:02:35.672729 No KMS driver or no outputs, pipes: 8, outputs: 0
11805 23:02:35.675730 [1mSubtest bo-too-small-due-to-tiling: SKIP (0.000s)[0m
11806 23:02:35.686030 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarc<14>[ 23.628247] [IGT] kms_addfb_basic: executing
11807 23:02:35.686117 h64)
11808 23:02:35.688924 Opened device: /dev/dri/card0
11809 23:02:35.695433 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11810 23:02:35.698853 Test requirement: is_i915_device(fd)
11811 23:02:35.705388 Test requirement n<14>[ 23.648265] [IGT] kms_addfb_basic: exiting, ret=77
11812 23:02:35.712067 ot met in function igt_require_i915, file ../lib/drmtest.c:721:
11813 23:02:35.721979 Test requiremen<8>[ 23.660349] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-4-tiled RESULT=skip>
11814 23:02:35.722084 t: is_i915_device(fd)
11815 23:02:35.722351 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-4-tiled RESULT=skip
11817 23:02:35.728562 No KMS dr<8>[ 23.669981] <LAVA_SIGNAL_TESTSET STOP>
11818 23:02:35.728786 Received signal: <TESTSET> STOP
11819 23:02:35.728861 Closing test_set kms_addfb_basic
11820 23:02:35.731864 iver or no outputs, pipes: 8, outputs: 0
11821 23:02:35.735096 [1mSubtest addfb25-y-tiled-legacy: SKIP (0.000s)[0m
11822 23:02:35.741699 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11823 23:02:35.745202 Opened device: /dev/dri/card0
11824 23:02:35.754805 Test requirement not met in function igt_require<8>[ 23.695612] <LAVA_SIGNAL_TESTSET START kms_atomic>
11825 23:02:35.755090 Received signal: <TESTSET> START kms_atomic
11826 23:02:35.755174 Starting test_set kms_atomic
11827 23:02:35.758602 _i915, file ../lib/drmtest.c:721:
11828 23:02:35.761487 Test requirement: is_i915_device(fd)
11829 23:02:35.768247 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11830 23:02:35.771397 Test requirement: is_i915_device(fd)
11831 23:02:35.774849 No KMS driver <14>[ 23.718390] [IGT] kms_atomic: executing
11832 23:02:35.781280 or no outputs, p<14>[ 23.723649] [IGT] kms_atomic: exiting, ret=77
11833 23:02:35.784710 ipes: 8, outputs: 0
11834 23:02:35.788245 [1mSubtest addfb25-yf-tiled-legacy: SKIP (0.000s)[0m
11835 23:02:35.797994 IGT<8>[ 23.735717] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-overlay-legacy RESULT=skip>
11836 23:02:35.798247 Received signal: <TESTCASE> TEST_CASE_ID=plane-overlay-legacy RESULT=skip
11838 23:02:35.801401 -Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11839 23:02:35.804845 Opened device: /dev/dri/card0
11840 23:02:35.811187 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11841 23:02:35.817840 Test requirement: is_i915_device(<14>[ 23.761068] [IGT] kms_atomic: executing
11842 23:02:35.821281 fd)
11843 23:02:35.824601 Test requir<14>[ 23.766783] [IGT] kms_atomic: exiting, ret=77
11844 23:02:35.831263 ement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11845 23:02:35.841027 Test req<8>[ 23.778777] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-legacy RESULT=skip>
11846 23:02:35.841148 uirement: is_i915_device(fd)
11847 23:02:35.841417 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-legacy RESULT=skip
11849 23:02:35.847624 No KMS driver or no outputs, pipes: 8, outputs: 0
11850 23:02:35.851014 [1mSubtest addfb25-y-tiled-small-legacy: SKIP (0.000s)[0m
11851 23:02:35.857420 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11852 23:02:35.861091 Op<14>[ 23.804614] [IGT] kms_atomic: executing
11853 23:02:35.867602 ened device: /de<14>[ 23.809746] [IGT] kms_atomic: exiting, ret=77
11854 23:02:35.871132 v/dri/card0
11855 23:02:35.884237 Test requirement not met in function igt_require_i915, file ../lib/<8>[ 23.821551] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip>
11856 23:02:35.884322 drmtest.c:721:
11857 23:02:35.884559 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip
11859 23:02:35.887207 Test requirement: is_i915_device(fd)
11860 23:02:35.897310 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11861 23:02:35.900689 Test requirement: is_i915_device(fd)
11862 23:02:35.907280 No KMS driver or no outputs, pipes: 8, outputs: 0<14>[ 23.849235] [IGT] kms_atomic: executing
11863 23:02:35.907365
11864 23:02:35.913584 [1mSubtest ad<14>[ 23.855905] [IGT] kms_atomic: exiting, ret=77
11865 23:02:35.917071 dfb25-4-tiled: SKIP (0.000s)[0m
11866 23:02:35.926801 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux:<8>[ 23.867441] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-immutable-zpos RESULT=skip>
11867 23:02:35.927054 Received signal: <TESTCASE> TEST_CASE_ID=plane-immutable-zpos RESULT=skip
11869 23:02:35.930198 6.1.31 aarch64)
11870 23:02:35.933432 Opened device: /dev/dri/card0
11871 23:02:35.936759 No KMS driver or no outputs, pipes: 8, outputs: 0
11872 23:02:35.943208 [1mSubtest plane-overlay-legacy: SKIP (0.000s)[0m
11873 23:02:35.946849 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11874 23:02:35.953293 Opened device: /dev/dri<14>[ 23.895036] [IGT] kms_atomic: executing
11875 23:02:35.953377 /card0
11876 23:02:35.959964 No KMS d<14>[ 23.901233] [IGT] kms_atomic: exiting, ret=77
11877 23:02:35.963075 river or no outputs, pipes: 8, outputs: 0
11878 23:02:35.973268 [1mSubtest plane-primary-legacy: SKI<8>[ 23.912524] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test-only RESULT=skip>
11879 23:02:35.973353 P (0.000s)[0m
11880 23:02:35.973591 Received signal: <TESTCASE> TEST_CASE_ID=test-only RESULT=skip
11882 23:02:35.979697 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11883 23:02:35.983196 Opened device: /dev/dri/card0
11884 23:02:35.986203 No KMS driver or no outputs, pipes: 8, outputs: 0
11885 23:02:35.995968 [1mSubtest plane-primary-overlay-mutable-zpos<14>[ 23.937543] [IGT] kms_atomic: executing
11886 23:02:36.002719 : SKIP (0.000s)<14>[ 23.943311] [IGT] kms_atomic: exiting, ret=77
11887 23:02:36.002802 [0m
11888 23:02:36.006195 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11889 23:02:36.015971 Opened devi<8>[ 23.954549] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-cursor-legacy RESULT=skip>
11890 23:02:36.016224 Received signal: <TESTCASE> TEST_CASE_ID=plane-cursor-legacy RESULT=skip
11892 23:02:36.019411 ce: /dev/dri/card0
11893 23:02:36.022405 No KMS driver or no outputs, pipes: 8, outputs: 0
11894 23:02:36.026026 [1mSubtest plane-immutable-zpos: SKIP (0.000s)[0m
11895 23:02:36.032375 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11896 23:02:36.039101 Opened device: /dev/<14>[ 23.980501] [IGT] kms_atomic: executing
11897 23:02:36.039201 dri/card0
11898 23:02:36.045835 No KM<14>[ 23.986182] [IGT] kms_atomic: exiting, ret=77
11899 23:02:36.048688 S driver or no outputs, pipes: 8, outputs: 0
11900 23:02:36.058672 [1mSubtest test-only: SKIP (0.000<8>[ 23.998074] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params RESULT=skip>
11901 23:02:36.058787 s)[0m
11902 23:02:36.059053 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params RESULT=skip
11904 23:02:36.065316 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11905 23:02:36.068536 Opened device: /dev/dri/card0
11906 23:02:36.071816 No KMS driver or no outputs, pipes: 8, outputs: 0
11907 23:02:36.078633 [1mSubtest plane-cursor-legacy: SKIP (0.000s)[0m
11908 23:02:36.081735 IGT-Version: 1.27.<14>[ 24.024493] [IGT] kms_atomic: executing
11909 23:02:36.088735 1-g766edf9 (aarc<14>[ 24.030675] [IGT] kms_atomic: exiting, ret=77
11910 23:02:36.091785 h64) (Linux: 6.1.31 aarch64)
11911 23:02:36.095245 Opened device: /dev/dri/card0
11912 23:02:36.104959 No KMS driver or no<8>[ 24.042601] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params-fence RESULT=skip>
11913 23:02:36.105245 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params-fence RESULT=skip
11915 23:02:36.108321 outputs, pipes: 8, outputs: 0
11916 23:02:36.111760 [1mSubtest plane-invalid-params: SKIP (0.000s)[0m
11917 23:02:36.118082 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11918 23:02:36.118187 Opened device: /dev/dri/card0
11919 23:02:36.124943 No KMS driver or no outputs,<14>[ 24.068618] [IGT] kms_atomic: executing
11920 23:02:36.131495 pipes: 8, outpu<14>[ 24.074036] [IGT] kms_atomic: exiting, ret=77
11921 23:02:36.134380 ts: 0
11922 23:02:36.137806 [1mSubtest plane-invalid-params-fence: SKIP (0.000s)[0m
11923 23:02:36.147756 IGT-Version: 1<8>[ 24.085750] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params RESULT=skip>
11924 23:02:36.148019 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params RESULT=skip
11926 23:02:36.151266 .27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11927 23:02:36.154678 Opened device: /dev/dri/card0
11928 23:02:36.157547 No KMS driver or no outputs, pipes: 8, outputs: 0
11929 23:02:36.164256 [1mSubtest crtc-invalid-params: SKIP (0.000s)[0m
11930 23:02:36.170682 <14>[ 24.112402] [IGT] kms_atomic: executing
11931 23:02:36.174184 IGT-Version: 1.2<14>[ 24.117100] [IGT] kms_atomic: exiting, ret=77
11932 23:02:36.180921 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11933 23:02:36.181009 Opened device: /dev/dri/card0
11934 23:02:36.190680 N<8>[ 24.129269] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip>
11935 23:02:36.190940 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip
11937 23:02:36.194058 o KMS driver or no outputs, pipes: 8, outputs: 0
11938 23:02:36.200829 [1mSubtest crtc-invalid-params-fence: SKIP (0.000s)[0m
11939 23:02:36.213033 <14>[ 24.155218] [IGT] kms_atomic: executing
11940 23:02:36.219656 IGT-Version: 1.2<14>[ 24.159949] [IGT] kms_atomic: exiting, ret=77
11941 23:02:36.223031 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11942 23:02:36.226008 Opened device: /dev/dri/card0
11943 23:02:36.232799 N<8>[ 24.171838] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic-invalid-params RESULT=skip>
11944 23:02:36.233071 Received signal: <TESTCASE> TEST_CASE_ID=atomic-invalid-params RESULT=skip
11946 23:02:36.236193 o KMS driver or no outputs, pipes: 8, outputs: 0
11947 23:02:36.242588 [1mSubtest atomic-invalid-params: SKIP (0.000s)[0m
11948 23:02:36.255193 <14>[ 24.197514] [IGT] kms_atomic: executing
11949 23:02:36.261668 IGT-Version: 1.2<14>[ 24.202466] [IGT] kms_atomic: exiting, ret=77
11950 23:02:36.264956 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11951 23:02:36.268615 Opened device: /dev/dri/card0
11952 23:02:36.275323 N<8>[ 24.214554] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic_plane_damage RESULT=skip>
11953 23:02:36.275592 Received signal: <TESTCASE> TEST_CASE_ID=atomic_plane_damage RESULT=skip
11955 23:02:36.281526 o KMS driver or no outputs, pipe<8>[ 24.224333] <LAVA_SIGNAL_TESTSET STOP>
11956 23:02:36.281780 Received signal: <TESTSET> STOP
11957 23:02:36.281849 Closing test_set kms_atomic
11958 23:02:36.284998 s: 8, outputs: 0
11959 23:02:36.288145 [1mSubtest atomic_plane_damage: SKIP (0.000s)[0m
11960 23:02:36.308159 <8>[ 24.250724] <LAVA_SIGNAL_TESTSET START kms_flip_event_leak>
11961 23:02:36.308419 Received signal: <TESTSET> START kms_flip_event_leak
11962 23:02:36.308492 Starting test_set kms_flip_event_leak
11963 23:02:36.331603 <14>[ 24.273822] [IGT] kms_flip_event_leak: executing
11964 23:02:36.338305 IGT-Version: 1.2<14>[ 24.279416] [IGT] kms_flip_event_leak: exiting, ret=77
11965 23:02:36.341734 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11966 23:02:36.344748 Opened device: /dev/dri/card0
11967 23:02:36.351659 N<8>[ 24.292265] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
11968 23:02:36.351912 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
11970 23:02:36.358364 o KMS driver or no outputs, pipe<8>[ 24.300829] <LAVA_SIGNAL_TESTSET STOP>
11971 23:02:36.358610 Received signal: <TESTSET> STOP
11972 23:02:36.358677 Closing test_set kms_flip_event_leak
11973 23:02:36.361462 s: 8, outputs: 0
11974 23:02:36.364631 [1mSubtest basic: SKIP (0.000s)[0m
11975 23:02:36.384519 <8>[ 24.326961] <LAVA_SIGNAL_TESTSET START kms_prop_blob>
11976 23:02:36.384817 Received signal: <TESTSET> START kms_prop_blob
11977 23:02:36.384891 Starting test_set kms_prop_blob
11978 23:02:36.407195 <14>[ 24.349622] [IGT] kms_prop_blob: executing
11979 23:02:36.414131 IGT-Version: 1.2<14>[ 24.354595] [IGT] kms_prop_blob: starting subtest basic
11980 23:02:36.420629 7.1-g766edf9 (aa<14>[ 24.361479] [IGT] kms_prop_blob: exiting, ret=0
11981 23:02:36.423658 rch64) (Linux: 6.1.31 aarch64)
11982 23:02:36.427078 Opened device: /dev/dri/card0
11983 23:02:36.433960 Starting subtest:<8>[ 24.373859] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
11984 23:02:36.434054 basic
11985 23:02:36.434296 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11987 23:02:36.436808 [1mSubtest basic: SUCCESS (0.000s)[0m
11988 23:02:36.456288 <14>[ 24.398294] [IGT] kms_prop_blob: executing
11989 23:02:36.462546 IGT-Version: 1.2<14>[ 24.403106] [IGT] kms_prop_blob: starting subtest blob-prop-core
11990 23:02:36.469371 7.1-g766edf9 (aa<14>[ 24.410917] [IGT] kms_prop_blob: exiting, ret=0
11991 23:02:36.472411 rch64) (Linux: 6.1.31 aarch64)
11992 23:02:36.475994 Opened device: /dev/dri/card0
11993 23:02:36.482761 Starting subtest:<8>[ 24.423194] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-core RESULT=pass>
11994 23:02:36.483017 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-core RESULT=pass
11996 23:02:36.485505 blob-prop-core
11997 23:02:36.489107 [1mSubtest blob-prop-core: SUCCESS (0.000s)[0m
11998 23:02:36.506630 <14>[ 24.449120] [IGT] kms_prop_blob: executing
11999 23:02:36.513694 IGT-Version: 1.2<14>[ 24.454004] [IGT] kms_prop_blob: starting subtest blob-prop-validate
12000 23:02:36.520125 7.1-g766edf9 (aa<14>[ 24.462340] [IGT] kms_prop_blob: exiting, ret=0
12001 23:02:36.523073 rch64) (Linux: 6.1.31 aarch64)
12002 23:02:36.526651 Opened device: /dev/dri/card0
12003 23:02:36.536483 Starting subtest:<8>[ 24.473947] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-validate RESULT=pass>
12004 23:02:36.536578 blob-prop-validate
12005 23:02:36.536787 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-validate RESULT=pass
12007 23:02:36.542882 [1mSubtest blob-prop-validate: SUCCESS (0.000s)[0m
12008 23:02:36.557568 <14>[ 24.499746] [IGT] kms_prop_blob: executing
12009 23:02:36.563816 IGT-Version: 1.2<14>[ 24.504582] [IGT] kms_prop_blob: starting subtest blob-prop-lifetime
12010 23:02:36.570715 7.1-g766edf9 (aa<14>[ 24.512656] [IGT] kms_prop_blob: exiting, ret=0
12011 23:02:36.573939 rch64) (Linux: 6.1.31 aarch64)
12012 23:02:36.577167 Opened device: /dev/dri/card0
12013 23:02:36.587187 Starting subtest:<8>[ 24.524440] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-lifetime RESULT=pass>
12014 23:02:36.587273 blob-prop-lifetime
12015 23:02:36.587512 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-lifetime RESULT=pass
12017 23:02:36.593539 [1mSubtest blob-prop-lifetime: SUCCESS (0.000s)[0m
12018 23:02:36.608085 <14>[ 24.550440] [IGT] kms_prop_blob: executing
12019 23:02:36.614749 IGT-Version: 1.2<14>[ 24.555258] [IGT] kms_prop_blob: starting subtest blob-multiple
12020 23:02:36.621149 7.1-g766edf9 (aa<14>[ 24.562970] [IGT] kms_prop_blob: exiting, ret=0
12021 23:02:36.624553 rch64) (Linux: 6.1.31 aarch64)
12022 23:02:36.627942 Opened device: /dev/dri/card0
12023 23:02:36.634726 Starting subtest:<8>[ 24.574464] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-multiple RESULT=pass>
12024 23:02:36.634982 Received signal: <TESTCASE> TEST_CASE_ID=blob-multiple RESULT=pass
12026 23:02:36.637754 blob-multiple
12027 23:02:36.641173 [1mSubtest blob-multiple: SUCCESS (0.000s)[0m
12028 23:02:36.657835 <14>[ 24.600012] [IGT] kms_prop_blob: executing
12029 23:02:36.664263 IGT-Version: 1.2<14>[ 24.604935] [IGT] kms_prop_blob: starting subtest invalid-get-prop-any
12030 23:02:36.670711 7.1-g766edf9 (aa<14>[ 24.613095] [IGT] kms_prop_blob: exiting, ret=0
12031 23:02:36.674213 rch64) (Linux: 6.1.31 aarch64)
12032 23:02:36.677194 Opened device: /dev/dri/card0
12033 23:02:36.687127 Starting subtest:<8>[ 24.625365] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
12034 23:02:36.687213 invalid-get-prop-any
12035 23:02:36.687451 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
12037 23:02:36.694210 [1mSubtest invalid-get-prop-any: SUCCESS (0.000s)[0m
12038 23:02:36.709335 <14>[ 24.651395] [IGT] kms_prop_blob: executing
12039 23:02:36.715705 IGT-Version: 1.2<14>[ 24.656344] [IGT] kms_prop_blob: starting subtest invalid-get-prop
12040 23:02:36.722085 7.1-g766edf9 (aa<14>[ 24.664144] [IGT] kms_prop_blob: exiting, ret=0
12041 23:02:36.725470 rch64) (Linux: 6.1.31 aarch64)
12042 23:02:36.728880 Opened device: /dev/dri/card0
12043 23:02:36.735531 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
12045 23:02:36.738740 Starting subtest:<8>[ 24.676270] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
12046 23:02:36.738824 invalid-get-prop
12047 23:02:36.742185 [1mSubtest invalid-get-prop: SUCCESS (0.000s)[0m
12048 23:02:36.760439 <14>[ 24.702739] [IGT] kms_prop_blob: executing
12049 23:02:36.767212 IGT-Version: 1.2<14>[ 24.707589] [IGT] kms_prop_blob: starting subtest invalid-set-prop-any
12050 23:02:36.773621 7.1-g766edf9 (aa<14>[ 24.715896] [IGT] kms_prop_blob: exiting, ret=0
12051 23:02:36.776990 rch64) (Linux: 6.1.31 aarch64)
12052 23:02:36.780371 Opened device: /dev/dri/card0
12053 23:02:36.790230 Starting subtest:<8>[ 24.728071] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
12054 23:02:36.790315 invalid-set-prop-any
12055 23:02:36.790550 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
12057 23:02:36.796871 [1mSubtest invalid-set-prop-any: SUCCESS (0.000s)[0m
12058 23:02:36.810993 <14>[ 24.753562] [IGT] kms_prop_blob: executing
12059 23:02:36.817808 IGT-Version: 1.2<14>[ 24.758618] [IGT] kms_prop_blob: starting subtest invalid-set-prop
12060 23:02:36.824740 7.1-g766edf9 (aa<14>[ 24.766242] [IGT] kms_prop_blob: exiting, ret=0
12061 23:02:36.827721 rch64) (Linux: 6.1.31 aarch64)
12062 23:02:36.831220 Opened device: /dev/dri/card0
12063 23:02:36.837912 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
12065 23:02:36.840800 Starting subtest:<8>[ 24.778637] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
12066 23:02:36.840885 invalid-set-prop
12067 23:02:36.847607 [1mSubtest i<8>[ 24.788384] <LAVA_SIGNAL_TESTSET STOP>
12068 23:02:36.847859 Received signal: <TESTSET> STOP
12069 23:02:36.847929 Closing test_set kms_prop_blob
12070 23:02:36.850518 nvalid-set-prop: SUCCESS (0.000s)[0m
12071 23:02:36.871518 <8>[ 24.813955] <LAVA_SIGNAL_TESTSET START kms_setmode>
12072 23:02:36.871775 Received signal: <TESTSET> START kms_setmode
12073 23:02:36.871846 Starting test_set kms_setmode
12074 23:02:36.893879 <14>[ 24.836403] [IGT] kms_setmode: executing
12075 23:02:36.900893 IGT-Version: 1.2<14>[ 24.841086] [IGT] kms_setmode: starting subtest basic
12076 23:02:36.907110 7.1-g766edf9 (aa<14>[ 24.847743] [IGT] kms_setmode: exiting, ret=77
12077 23:02:36.910458 rch64) (Linux: 6.1.31 aarch64)
12078 23:02:36.910543 Opened device: /dev/dri/card0
12079 23:02:36.920577 Starting subtest:<8>[ 24.859930] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
12080 23:02:36.920664 basic
12081 23:02:36.920916 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
12083 23:02:36.923743 No dynamic tests executed.
12084 23:02:36.927227 [1mSubtest basic: SKIP (0.000s)[0m
12085 23:02:36.942331 <14>[ 24.884611] [IGT] kms_setmode: executing
12086 23:02:36.949119 IGT-Version: 1.2<14>[ 24.889430] [IGT] kms_setmode: starting subtest basic-clone-single-crtc
12087 23:02:36.955652 7.1-g766edf9 (aa<14>[ 24.897624] [IGT] kms_setmode: exiting, ret=77
12088 23:02:36.958623 rch64) (Linux: 6.1.31 aarch64)
12089 23:02:36.962020 Opened device: /dev/dri/card0
12090 23:02:36.971747 Starting subtest:<8>[ 24.909810] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-clone-single-crtc RESULT=skip>
12091 23:02:36.971849 basic-clone-single-crtc
12092 23:02:36.972115 Received signal: <TESTCASE> TEST_CASE_ID=basic-clone-single-crtc RESULT=skip
12094 23:02:36.975254 No dynamic tests executed.
12095 23:02:36.981658 [1mSubtest basic-clone-single-crtc: SKIP (0.000s)[0m
12096 23:02:36.993664 <14>[ 24.935964] [IGT] kms_setmode: executing
12097 23:02:37.000089 IGT-Version: 1.2<14>[ 24.940752] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc
12098 23:02:37.006650 7.1-g766edf9 (aa<14>[ 24.949191] [IGT] kms_setmode: exiting, ret=77
12099 23:02:37.010052 rch64) (Linux: 6.1.31 aarch64)
12100 23:02:37.013253 Opened device: /dev/dri/card0
12101 23:02:37.023271 Starting subtest:<8>[ 24.961564] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip>
12102 23:02:37.023567 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip
12104 23:02:37.026309 invalid-clone-single-crtc
12105 23:02:37.026490 No dynamic tests executed.
12106 23:02:37.033065 [1mSubtest invalid-clone-single-crtc: SKIP (0.000s)[0m
12107 23:02:37.045603 <14>[ 24.987863] [IGT] kms_setmode: executing
12108 23:02:37.052074 IGT-Version: 1.2<14>[ 24.992592] [IGT] kms_setmode: starting subtest invalid-clone-exclusive-crtc
12109 23:02:37.058618 7.1-g766edf9 (aa<14>[ 25.001231] [IGT] kms_setmode: exiting, ret=77
12110 23:02:37.062017 rch64) (Linux: 6.1.31 aarch64)
12111 23:02:37.065379 Opened device: /dev/dri/card0
12112 23:02:37.075185 Starting subtest:<8>[ 25.013363] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip>
12113 23:02:37.075461 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip
12115 23:02:37.078221 invalid-clone-exclusive-crtc
12116 23:02:37.081677 No dynamic tests executed.
12117 23:02:37.085185 [1mSubtest invalid-clone-exclusive-crtc: SKIP (0.000s)[0m
12118 23:02:37.097604 <14>[ 25.039789] [IGT] kms_setmode: executing
12119 23:02:37.103733 IGT-Version: 1.2<14>[ 25.044561] [IGT] kms_setmode: starting subtest clone-exclusive-crtc
12120 23:02:37.110771 7.1-g766edf9 (aa<14>[ 25.052527] [IGT] kms_setmode: exiting, ret=77
12121 23:02:37.114064 rch64) (Linux: 6.1.31 aarch64)
12122 23:02:37.117205 Opened device: /dev/dri/card0
12123 23:02:37.126963 Starting subtest:<8>[ 25.064782] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clone-exclusive-crtc RESULT=skip>
12124 23:02:37.127077 clone-exclusive-crtc
12125 23:02:37.127348 Received signal: <TESTCASE> TEST_CASE_ID=clone-exclusive-crtc RESULT=skip
12127 23:02:37.130395 No dynamic tests executed.
12128 23:02:37.133546 [1mSubtest clone-exclusive-crtc: SKIP (0.000s)[0m
12129 23:02:37.148368 <14>[ 25.090561] [IGT] kms_setmode: executing
12130 23:02:37.158107 IGT-Version: 1.2<14>[ 25.095352] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc-stealing
12131 23:02:37.164807 7.1-g766edf9 (aa<14>[ 25.104577] [IGT] kms_setmode: exiting, ret=77
12132 23:02:37.164897 rch64) (Linux: 6.1.31 aarch64)
12133 23:02:37.168320 Opened device: /dev/dri/card0
12134 23:02:37.177945 Starting subtest:<8>[ 25.116628] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip>
12135 23:02:37.178201 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip
12137 23:02:37.184899 invalid-clone-single-crtc-steal<8>[ 25.128185] <LAVA_SIGNAL_TESTSET STOP>
12138 23:02:37.185153 Received signal: <TESTSET> STOP
12139 23:02:37.185223 Closing test_set kms_setmode
12140 23:02:37.187781 ing
12141 23:02:37.187865 No dynamic tests executed.
12142 23:02:37.194535 [1mSubtest invalid-clone-single-crtc-stealing: SKIP (0.000s)[0m
12143 23:02:37.211642 <8>[ 25.153992] <LAVA_SIGNAL_TESTSET START kms_vblank>
12144 23:02:37.211924 Received signal: <TESTSET> START kms_vblank
12145 23:02:37.212024 Starting test_set kms_vblank
12146 23:02:37.233906 <14>[ 25.176285] [IGT] kms_vblank: executing
12147 23:02:37.240642 IGT-Version: 1.2<14>[ 25.181194] [IGT] kms_vblank: exiting, ret=77
12148 23:02:37.243740 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12149 23:02:37.247347 Opened device: /dev/dri/card0
12150 23:02:37.253683 N<8>[ 25.192991] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid RESULT=skip>
12151 23:02:37.253938 Received signal: <TESTCASE> TEST_CASE_ID=invalid RESULT=skip
12153 23:02:37.257133 o KMS driver or no outputs, pipes: 8, outputs: 0
12154 23:02:37.260486 [1mSubtest invalid: SKIP (0.000s)[0m
12155 23:02:37.275503 <14>[ 25.217716] [IGT] kms_vblank: executing
12156 23:02:37.282207 IGT-Version: 1.2<14>[ 25.222838] [IGT] kms_vblank: exiting, ret=77
12157 23:02:37.285295 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12158 23:02:37.288662 Opened device: /dev/dri/card0
12159 23:02:37.295510 N<8>[ 25.234189] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-id RESULT=skip>
12160 23:02:37.295796 Received signal: <TESTCASE> TEST_CASE_ID=crtc-id RESULT=skip
12162 23:02:37.298918 o KMS driver or no outputs, pipes: 8, outputs: 0
12163 23:02:37.301886 [1mSubtest crtc-id: SKIP (0.000s)[0m
12164 23:02:37.316454 <14>[ 25.258922] [IGT] kms_vblank: executing
12165 23:02:37.322960 IGT-Version: 1.2<14>[ 25.263958] [IGT] kms_vblank: exiting, ret=77
12166 23:02:37.326260 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12167 23:02:37.329756 Opened device: /dev/dri/card0
12168 23:02:37.336189 N<8>[ 25.275794] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip>
12169 23:02:37.336444 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip
12171 23:02:37.339447 o KMS driver or no outputs, pipes: 8, outputs: 0
12172 23:02:37.346307 [1mSubtest pipe-A-accuracy-idle: SKIP (0.000s)[0m
12173 23:02:37.358492 <14>[ 25.300972] [IGT] kms_vblank: executing
12174 23:02:37.365321 IGT-Version: 1.2<14>[ 25.305912] [IGT] kms_vblank: exiting, ret=77
12175 23:02:37.368643 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12176 23:02:37.371731 Opened device: /dev/dri/card0
12177 23:02:37.378211 N<8>[ 25.317633] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle RESULT=skip>
12178 23:02:37.378500 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle RESULT=skip
12180 23:02:37.381480 o KMS driver or no outputs, pipes: 8, outputs: 0
12181 23:02:37.388377 [1mSubtest pipe-A-query-idle: SKIP (0.000s)[0m
12182 23:02:37.400748 <14>[ 25.343048] [IGT] kms_vblank: executing
12183 23:02:37.407252 IGT-Version: 1.2<14>[ 25.348062] [IGT] kms_vblank: exiting, ret=77
12184 23:02:37.410760 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12185 23:02:37.414182 Opened device: /dev/dri/card0
12186 23:02:37.420806 N<8>[ 25.359707] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip>
12187 23:02:37.421061 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip
12189 23:02:37.423647 o KMS driver or no outputs, pipes: 8, outputs: 0
12190 23:02:37.430094 [1mSubtest pipe-A-query-idle-hang: SKIP (0.000s)[0m
12191 23:02:37.443467 <14>[ 25.385559] [IGT] kms_vblank: executing
12192 23:02:37.450126 IGT-Version: 1.2<14>[ 25.390629] [IGT] kms_vblank: exiting, ret=77
12193 23:02:37.453235 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12194 23:02:37.456466 Opened device: /dev/dri/card0
12195 23:02:37.462989 N<8>[ 25.402006] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked RESULT=skip>
12196 23:02:37.463303 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked RESULT=skip
12198 23:02:37.466332 o KMS driver or no outputs, pipes: 8, outputs: 0
12199 23:02:37.472680 [1mSubtest pipe-A-query-forked: SKIP (0.000s)[0m
12200 23:02:37.485470 <14>[ 25.427687] [IGT] kms_vblank: executing
12201 23:02:37.491907 IGT-Version: 1.2<14>[ 25.432746] [IGT] kms_vblank: exiting, ret=77
12202 23:02:37.495330 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12203 23:02:37.498741 Opened device: /dev/dri/card0
12204 23:02:37.505138 N<8>[ 25.444572] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip>
12205 23:02:37.505431 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip
12207 23:02:37.511659 o KMS driver or no outputs, pipes: 8, outputs: 0
12208 23:02:37.515120 [1mSubtest pipe-A-query-forked-hang: SKIP (0.000s)[0m
12209 23:02:37.527632 <14>[ 25.470188] [IGT] kms_vblank: executing
12210 23:02:37.534505 IGT-Version: 1.2<14>[ 25.475256] [IGT] kms_vblank: exiting, ret=77
12211 23:02:37.537698 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12212 23:02:37.540884 Opened device: /dev/dri/card0
12213 23:02:37.547385 N<8>[ 25.487107] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy RESULT=skip>
12214 23:02:37.547673 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy RESULT=skip
12216 23:02:37.551000 o KMS driver or no outputs, pipes: 8, outputs: 0
12217 23:02:37.557576 [1mSubtest pipe-A-query-busy: SKIP (0.000s)[0m
12218 23:02:37.569732 <14>[ 25.512112] [IGT] kms_vblank: executing
12219 23:02:37.576523 IGT-Version: 1.2<14>[ 25.517085] [IGT] kms_vblank: exiting, ret=77
12220 23:02:37.579501 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12221 23:02:37.582898 Opened device: /dev/dri/card0
12222 23:02:37.589584 N<8>[ 25.528962] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip>
12223 23:02:37.589877 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip
12225 23:02:37.593046 o KMS driver or no outputs, pipes: 8, outputs: 0
12226 23:02:37.599391 [1mSubtest pipe-A-query-busy-hang: SKIP (0.000s)[0m
12227 23:02:37.612153 <14>[ 25.554365] [IGT] kms_vblank: executing
12228 23:02:37.618579 IGT-Version: 1.2<14>[ 25.559299] [IGT] kms_vblank: exiting, ret=77
12229 23:02:37.621940 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12230 23:02:37.625337 Opened device: /dev/dri/card0
12231 23:02:37.631763 N<8>[ 25.571253] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip>
12232 23:02:37.632043 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip
12234 23:02:37.638272 o KMS driver or no outputs, pipes: 8, outputs: 0
12235 23:02:37.641489 [1mSubtest pipe-A-query-forked-busy: SKIP (0.000s)[0m
12236 23:02:37.654432 <14>[ 25.596929] [IGT] kms_vblank: executing
12237 23:02:37.661229 IGT-Version: 1.2<14>[ 25.602082] [IGT] kms_vblank: exiting, ret=77
12238 23:02:37.664359 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12239 23:02:37.667822 Opened device: /dev/dri/card0
12240 23:02:37.674322 N<8>[ 25.613786] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip>
12241 23:02:37.674585 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip
12243 23:02:37.680754 o KMS driver or no outputs, pipes: 8, outputs: 0
12244 23:02:37.684121 [1mSubtest pipe-A-query-forked-busy-hang: SKIP (0.000s)[0m
12245 23:02:37.698208 <14>[ 25.640599] [IGT] kms_vblank: executing
12246 23:02:37.704643 IGT-Version: 1.2<14>[ 25.645698] [IGT] kms_vblank: exiting, ret=77
12247 23:02:37.708050 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12248 23:02:37.711380 Opened device: /dev/dri/card0
12249 23:02:37.718268 N<8>[ 25.657344] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle RESULT=skip>
12250 23:02:37.718575 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle RESULT=skip
12252 23:02:37.721160 o KMS driver or no outputs, pipes: 8, outputs: 0
12253 23:02:37.727704 [1mSubtest pipe-A-wait-idle: SKIP (0.000s)[0m
12254 23:02:37.740697 <14>[ 25.682972] [IGT] kms_vblank: executing
12255 23:02:37.747257 IGT-Version: 1.2<14>[ 25.687955] [IGT] kms_vblank: exiting, ret=77
12256 23:02:37.750555 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12257 23:02:37.753792 Opened device: /dev/dri/card0
12258 23:02:37.760096 N<8>[ 25.699728] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip>
12259 23:02:37.760383 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip
12261 23:02:37.763830 o KMS driver or no outputs, pipes: 8, outputs: 0
12262 23:02:37.769960 [1mSubtest pipe-A-wait-idle-hang: SKIP (0.000s)[0m
12263 23:02:37.783587 <14>[ 25.725768] [IGT] kms_vblank: executing
12264 23:02:37.790013 IGT-Version: 1.2<14>[ 25.730952] [IGT] kms_vblank: exiting, ret=77
12265 23:02:37.793511 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12266 23:02:37.796367 Opened device: /dev/dri/card0
12267 23:02:37.803125 N<8>[ 25.742658] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked RESULT=skip>
12268 23:02:37.803384 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked RESULT=skip
12270 23:02:37.806601 o KMS driver or no outputs, pipes: 8, outputs: 0
12271 23:02:37.812907 [1mSubtest pipe-A-wait-forked: SKIP (0.000s)[0m
12272 23:02:37.826722 <14>[ 25.768897] [IGT] kms_vblank: executing
12273 23:02:37.833194 IGT-Version: 1.2<14>[ 25.773825] [IGT] kms_vblank: exiting, ret=77
12274 23:02:37.836170 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12275 23:02:37.839643 Opened device: /dev/dri/card0
12276 23:02:37.846362 N<8>[ 25.785652] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip>
12277 23:02:37.846637 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip
12279 23:02:37.849777 o KMS driver or no outputs, pipes: 8, outputs: 0
12280 23:02:37.855908 [1mSubtest pipe-A-wait-forked-hang: SKIP (0.000s)[0m
12281 23:02:37.869401 <14>[ 25.811646] [IGT] kms_vblank: executing
12282 23:02:37.875914 IGT-Version: 1.2<14>[ 25.816651] [IGT] kms_vblank: exiting, ret=77
12283 23:02:37.878848 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12284 23:02:37.882361 Opened device: /dev/dri/card0
12285 23:02:37.888892 N<8>[ 25.828233] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy RESULT=skip>
12286 23:02:37.889187 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy RESULT=skip
12288 23:02:37.892331 o KMS driver or no outputs, pipes: 8, outputs: 0
12289 23:02:37.898557 [1mSubtest pipe-A-wait-busy: SKIP (0.000s)[0m
12290 23:02:37.910786 <14>[ 25.853495] [IGT] kms_vblank: executing
12291 23:02:37.917629 IGT-Version: 1.2<14>[ 25.858734] [IGT] kms_vblank: exiting, ret=77
12292 23:02:37.920975 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12293 23:02:37.924432 Opened device: /dev/dri/card0
12294 23:02:37.930748 N<8>[ 25.870289] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip>
12295 23:02:37.931006 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip
12297 23:02:37.934294 o KMS driver or no outputs, pipes: 8, outputs: 0
12298 23:02:37.940590 [1mSubtest pipe-A-wait-busy-hang: SKIP (0.000s)[0m
12299 23:02:37.953433 <14>[ 25.896079] [IGT] kms_vblank: executing
12300 23:02:37.960415 IGT-Version: 1.2<14>[ 25.901091] [IGT] kms_vblank: exiting, ret=77
12301 23:02:37.963882 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12302 23:02:37.966802 Opened device: /dev/dri/card0
12303 23:02:37.973514 N<8>[ 25.912695] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip>
12304 23:02:37.973801 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip
12306 23:02:37.976659 o KMS driver or no outputs, pipes: 8, outputs: 0
12307 23:02:37.983349 [1mSubtest pipe-A-wait-forked-busy: SKIP (0.000s)[0m
12308 23:02:37.996004 <14>[ 25.938549] [IGT] kms_vblank: executing
12309 23:02:38.002736 IGT-Version: 1.2<14>[ 25.943615] [IGT] kms_vblank: exiting, ret=77
12310 23:02:38.006039 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12311 23:02:38.009111 Opened device: /dev/dri/card0
12312 23:02:38.015911 N<8>[ 25.955461] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip>
12313 23:02:38.016162 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip
12315 23:02:38.022342 o KMS driver or no outputs, pipes: 8, outputs: 0
12316 23:02:38.025772 [1mSubtest pipe-A-wait-forked-busy-hang: SKIP (0.000s)[0m
12317 23:02:38.039475 <14>[ 25.981853] [IGT] kms_vblank: executing
12318 23:02:38.045821 IGT-Version: 1.2<14>[ 25.987101] [IGT] kms_vblank: exiting, ret=77
12319 23:02:38.049240 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12320 23:02:38.052588 Opened device: /dev/dri/card0
12321 23:02:38.058916 N<8>[ 25.999014] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip>
12322 23:02:38.059202 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip
12324 23:02:38.065780 o KMS driver or no outputs, pipes: 8, outputs: 0
12325 23:02:38.069053 [1mSubtest pipe-A-ts-continuation-idle: SKIP (0.000s)[0m
12326 23:02:38.083437 <14>[ 26.025643] [IGT] kms_vblank: executing
12327 23:02:38.089710 IGT-Version: 1.2<14>[ 26.030992] [IGT] kms_vblank: exiting, ret=77
12328 23:02:38.093169 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12329 23:02:38.096177 Opened device: /dev/dri/card0
12330 23:02:38.102954 N<8>[ 26.042405] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip>
12331 23:02:38.103203 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip
12333 23:02:38.109819 o KMS driver or no outputs, pipes: 8, outputs: 0
12334 23:02:38.112672 [1mSubtest pipe-A-ts-continuation-idle-hang: SKIP (0.000s)[0m
12335 23:02:38.127603 <14>[ 26.070014] [IGT] kms_vblank: executing
12336 23:02:38.134340 IGT-Version: 1.2<14>[ 26.074946] [IGT] kms_vblank: exiting, ret=77
12337 23:02:38.137310 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12338 23:02:38.140665 Opened device: /dev/dri/card0
12339 23:02:38.147650 N<8>[ 26.086674] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip>
12340 23:02:38.147922 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip
12342 23:02:38.154016 o KMS driver or no outputs, pipes: 8, outputs: 0
12343 23:02:38.157479 [1mSubtest pipe-A-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12344 23:02:38.171025 <14>[ 26.113446] [IGT] kms_vblank: executing
12345 23:02:38.177650 IGT-Version: 1.2<14>[ 26.118530] [IGT] kms_vblank: exiting, ret=77
12346 23:02:38.180738 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12347 23:02:38.184292 Opened device: /dev/dri/card0
12348 23:02:38.190619 N<8>[ 26.130130] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip>
12349 23:02:38.190874 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip
12351 23:02:38.197466 o KMS driver or no outputs, pipes: 8, outputs: 0
12352 23:02:38.203849 [1mSubtest pipe-A-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12353 23:02:38.214728 <14>[ 26.157080] [IGT] kms_vblank: executing
12354 23:02:38.221171 IGT-Version: 1.2<14>[ 26.162238] [IGT] kms_vblank: exiting, ret=77
12355 23:02:38.224597 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12356 23:02:38.228029 Opened device: /dev/dri/card0
12357 23:02:38.234641 N<8>[ 26.173677] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip>
12358 23:02:38.234886 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip
12360 23:02:38.241158 o KMS driver or no outputs, pipes: 8, outputs: 0
12361 23:02:38.244541 [1mSubtest pipe-A-ts-continuation-suspend: SKIP (0.000s)[0m
12362 23:02:38.258785 <14>[ 26.201135] [IGT] kms_vblank: executing
12363 23:02:38.265107 IGT-Version: 1.2<14>[ 26.206211] [IGT] kms_vblank: exiting, ret=77
12364 23:02:38.268462 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12365 23:02:38.271863 Opened device: /dev/dri/card0
12366 23:02:38.278500 N<8>[ 26.217934] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip>
12367 23:02:38.278743 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip
12369 23:02:38.285121 o KMS driver or no outputs, pipes: 8, outputs: 0
12370 23:02:38.288381 [1mSubtest pipe-A-ts-continuation-modeset: SKIP (0.000s)[0m
12371 23:02:38.301888 <14>[ 26.244483] [IGT] kms_vblank: executing
12372 23:02:38.308678 IGT-Version: 1.2<14>[ 26.249478] [IGT] kms_vblank: exiting, ret=77
12373 23:02:38.311717 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12374 23:02:38.315268 Opened device: /dev/dri/card0
12375 23:02:38.321911 N<8>[ 26.261151] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip>
12376 23:02:38.322184 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip
12378 23:02:38.328241 o KMS driver or no outputs, pipes: 8, outputs: 0
12379 23:02:38.334636 [1mSubtest pipe-A-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12380 23:02:38.345531 <14>[ 26.288164] [IGT] kms_vblank: executing
12381 23:02:38.351998 IGT-Version: 1.2<14>[ 26.293301] [IGT] kms_vblank: exiting, ret=77
12382 23:02:38.355471 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12383 23:02:38.358807 Opened device: /dev/dri/card0
12384 23:02:38.365609 N<8>[ 26.304881] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip>
12385 23:02:38.365862 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip
12387 23:02:38.371971 o KMS driver or no outputs, pipes: 8, outputs: 0
12388 23:02:38.378663 [1mSubtest pipe-A-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12389 23:02:38.389240 <14>[ 26.331867] [IGT] kms_vblank: executing
12390 23:02:38.395930 IGT-Version: 1.2<14>[ 26.336870] [IGT] kms_vblank: exiting, ret=77
12391 23:02:38.399065 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12392 23:02:38.402566 Opened device: /dev/dri/card0
12393 23:02:38.408871 N<8>[ 26.348402] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip>
12394 23:02:38.409132 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip
12396 23:02:38.412109 o KMS driver or no outputs, pipes: 8, outputs: 0
12397 23:02:38.418719 [1mSubtest pipe-B-accuracy-idle: SKIP (0.000s)[0m
12398 23:02:38.431429 <14>[ 26.373988] [IGT] kms_vblank: executing
12399 23:02:38.438206 IGT-Version: 1.2<14>[ 26.379038] [IGT] kms_vblank: exiting, ret=77
12400 23:02:38.441663 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12401 23:02:38.444665 Opened device: /dev/dri/card0
12402 23:02:38.451051 N<8>[ 26.391013] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle RESULT=skip>
12403 23:02:38.451325 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle RESULT=skip
12405 23:02:38.454506 o KMS driver or no outputs, pipes: 8, outputs: 0
12406 23:02:38.461266 [1mSubtest pipe-B-query-idle: SKIP (0.000s)[0m
12407 23:02:38.473915 <14>[ 26.416212] [IGT] kms_vblank: executing
12408 23:02:38.480362 IGT-Version: 1.2<14>[ 26.421179] [IGT] kms_vblank: exiting, ret=77
12409 23:02:38.483507 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12410 23:02:38.486726 Opened device: /dev/dri/card0
12411 23:02:38.493120 N<8>[ 26.432967] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip>
12412 23:02:38.493373 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip
12414 23:02:38.500172 o KMS driver or no outputs, pipes: 8, outputs: 0
12415 23:02:38.503059 [1mSubtest pipe-B-query-idle-hang: SKIP (0.000s)[0m
12416 23:02:38.516401 <14>[ 26.458681] [IGT] kms_vblank: executing
12417 23:02:38.522511 IGT-Version: 1.2<14>[ 26.463765] [IGT] kms_vblank: exiting, ret=77
12418 23:02:38.525965 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12419 23:02:38.529116 Opened device: /dev/dri/card0
12420 23:02:38.535954 N<8>[ 26.475527] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked RESULT=skip>
12421 23:02:38.536226 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked RESULT=skip
12423 23:02:38.539035 o KMS driver or no outputs, pipes: 8, outputs: 0
12424 23:02:38.545529 [1mSubtest pipe-B-query-forked: SKIP (0.000s)[0m
12425 23:02:38.558675 <14>[ 26.501130] [IGT] kms_vblank: executing
12426 23:02:38.565149 IGT-Version: 1.2<14>[ 26.506123] [IGT] kms_vblank: exiting, ret=77
12427 23:02:38.568646 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12428 23:02:38.571986 Opened device: /dev/dri/card0
12429 23:02:38.578310 N<8>[ 26.517814] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip>
12430 23:02:38.578590 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip
12432 23:02:38.581801 o KMS driver or no outputs, pipes: 8, outputs: 0
12433 23:02:38.588444 [1mSubtest pipe-B-query-forked-hang: SKIP (0.000s)[0m
12434 23:02:38.601484 <14>[ 26.543953] [IGT] kms_vblank: executing
12435 23:02:38.608147 IGT-Version: 1.2<14>[ 26.548913] [IGT] kms_vblank: exiting, ret=77
12436 23:02:38.611098 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12437 23:02:38.614515 Opened device: /dev/dri/card0
12438 23:02:38.621436 N<8>[ 26.560720] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy RESULT=skip>
12439 23:02:38.621691 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy RESULT=skip
12441 23:02:38.625261 o KMS driver or no outputs, pipes: 8, outputs: 0
12442 23:02:38.630959 [1mSubtest pipe-B-query-busy: SKIP (0.000s)[0m
12443 23:02:38.644559 <14>[ 26.587014] [IGT] kms_vblank: executing
12444 23:02:38.651086 IGT-Version: 1.2<14>[ 26.591961] [IGT] kms_vblank: exiting, ret=77
12445 23:02:38.654528 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12446 23:02:38.657479 Opened device: /dev/dri/card0
12447 23:02:38.664298 N<8>[ 26.603831] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip>
12448 23:02:38.664552 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip
12450 23:02:38.667732 o KMS driver or no outputs, pipes: 8, outputs: 0
12451 23:02:38.674212 [1mSubtest pipe-B-query-busy-hang: SKIP (0.000s)[0m
12452 23:02:38.686799 <14>[ 26.629465] [IGT] kms_vblank: executing
12453 23:02:38.693467 IGT-Version: 1.2<14>[ 26.634495] [IGT] kms_vblank: exiting, ret=77
12454 23:02:38.696984 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12455 23:02:38.700429 Opened device: /dev/dri/card0
12456 23:02:38.706826 N<8>[ 26.646125] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip>
12457 23:02:38.707083 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip
12459 23:02:38.710206 o KMS driver or no outputs, pipes: 8, outputs: 0
12460 23:02:38.716962 [1mSubtest pipe-B-query-forked-busy: SKIP (0.000s)[0m
12461 23:02:38.730787 <14>[ 26.673062] [IGT] kms_vblank: executing
12462 23:02:38.737049 IGT-Version: 1.2<14>[ 26.678098] [IGT] kms_vblank: exiting, ret=77
12463 23:02:38.740428 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12464 23:02:38.743812 Opened device: /dev/dri/card0
12465 23:02:38.750445 N<8>[ 26.689803] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip>
12466 23:02:38.750740 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip
12468 23:02:38.756998 o KMS driver or no outputs, pipes: 8, outputs: 0
12469 23:02:38.760398 [1mSubtest pipe-B-query-forked-busy-hang: SKIP (0.000s)[0m
12470 23:02:38.773579 <14>[ 26.716268] [IGT] kms_vblank: executing
12471 23:02:38.780490 IGT-Version: 1.2<14>[ 26.721226] [IGT] kms_vblank: exiting, ret=77
12472 23:02:38.783444 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12473 23:02:38.786712 Opened device: /dev/dri/card0
12474 23:02:38.793259 N<8>[ 26.733055] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle RESULT=skip>
12475 23:02:38.793528 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle RESULT=skip
12477 23:02:38.796526 o KMS driver or no outputs, pipes: 8, outputs: 0
12478 23:02:38.803394 [1mSubtest pipe-B-wait-idle: SKIP (0.000s)[0m
12479 23:02:38.816424 <14>[ 26.759183] [IGT] kms_vblank: executing
12480 23:02:38.823003 IGT-Version: 1.2<14>[ 26.764160] [IGT] kms_vblank: exiting, ret=77
12481 23:02:38.826453 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12482 23:02:38.829947 Opened device: /dev/dri/card0
12483 23:02:38.836309 N<8>[ 26.776082] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip>
12484 23:02:38.836586 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip
12486 23:02:38.839723 o KMS driver or no outputs, pipes: 8, outputs: 0
12487 23:02:38.846477 [1mSubtest pipe-B-wait-idle-hang: SKIP (0.000s)[0m
12488 23:02:38.858656 <14>[ 26.801372] [IGT] kms_vblank: executing
12489 23:02:38.865188 IGT-Version: 1.2<14>[ 26.806432] [IGT] kms_vblank: exiting, ret=77
12490 23:02:38.868819 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12491 23:02:38.871797 Opened device: /dev/dri/card0
12492 23:02:38.878658 N<8>[ 26.817946] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked RESULT=skip>
12493 23:02:38.878909 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked RESULT=skip
12495 23:02:38.882111 o KMS driver or no outputs, pipes: 8, outputs: 0
12496 23:02:38.888382 [1mSubtest pipe-B-wait-forked: SKIP (0.000s)[0m
12497 23:02:38.901299 <14>[ 26.843845] [IGT] kms_vblank: executing
12498 23:02:38.907708 IGT-Version: 1.2<14>[ 26.848848] [IGT] kms_vblank: exiting, ret=77
12499 23:02:38.911135 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12500 23:02:38.914482 Opened device: /dev/dri/card0
12501 23:02:38.921154 N<8>[ 26.860514] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip>
12502 23:02:38.921431 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip
12504 23:02:38.924663 o KMS driver or no outputs, pipes: 8, outputs: 0
12505 23:02:38.931084 [1mSubtest pipe-B-wait-forked-hang: SKIP (0.000s)[0m
12506 23:02:38.943570 <14>[ 26.886003] [IGT] kms_vblank: executing
12507 23:02:38.950051 IGT-Version: 1.2<14>[ 26.890953] [IGT] kms_vblank: exiting, ret=77
12508 23:02:38.953169 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12509 23:02:38.956706 Opened device: /dev/dri/card0
12510 23:02:38.962998 N<8>[ 26.902913] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy RESULT=skip>
12511 23:02:38.963258 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy RESULT=skip
12513 23:02:38.966560 o KMS driver or no outputs, pipes: 8, outputs: 0
12514 23:02:38.973040 [1mSubtest pipe-B-wait-busy: SKIP (0.000s)[0m
12515 23:02:38.985207 <14>[ 26.927972] [IGT] kms_vblank: executing
12516 23:02:38.991692 IGT-Version: 1.2<14>[ 26.933068] [IGT] kms_vblank: exiting, ret=77
12517 23:02:38.995169 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12518 23:02:38.998383 Opened device: /dev/dri/card0
12519 23:02:39.005074 N<8>[ 26.944797] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip>
12520 23:02:39.005331 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip
12522 23:02:39.011736 o KMS driver or no outputs, pipes: 8, outputs: 0
12523 23:02:39.014716 [1mSubtest pipe-B-wait-busy-hang: SKIP (0.000s)[0m
12524 23:02:39.028055 <14>[ 26.970747] [IGT] kms_vblank: executing
12525 23:02:39.034790 IGT-Version: 1.2<14>[ 26.975753] [IGT] kms_vblank: exiting, ret=77
12526 23:02:39.038194 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12527 23:02:39.041135 Opened device: /dev/dri/card0
12528 23:02:39.047975 N<8>[ 26.987366] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip>
12529 23:02:39.048231 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip
12531 23:02:39.054245 o KMS driver or no outputs, pipes: 8, outputs: 0
12532 23:02:39.057566 [1mSubtest pipe-B-wait-forked-busy: SKIP (0.000s)[0m
12533 23:02:39.070767 <14>[ 27.013159] [IGT] kms_vblank: executing
12534 23:02:39.077053 IGT-Version: 1.2<14>[ 27.018298] [IGT] kms_vblank: exiting, ret=77
12535 23:02:39.080418 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12536 23:02:39.083819 Opened device: /dev/dri/card0
12537 23:02:39.090226 N<8>[ 27.029731] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip>
12538 23:02:39.090484 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip
12540 23:02:39.097175 o KMS driver or no outputs, pipes: 8, outputs: 0
12541 23:02:39.100169 [1mSubtest pipe-B-wait-forked-busy-hang: SKIP (0.000s)[0m
12542 23:02:39.113799 <14>[ 27.056157] [IGT] kms_vblank: executing
12543 23:02:39.120119 IGT-Version: 1.2<14>[ 27.061171] [IGT] kms_vblank: exiting, ret=77
12544 23:02:39.123530 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12545 23:02:39.126737 Opened device: /dev/dri/card0
12546 23:02:39.133681 N<8>[ 27.072866] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip>
12547 23:02:39.133937 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip
12549 23:02:39.140152 o KMS driver or no outputs, pipes: 8, outputs: 0
12550 23:02:39.143476 [1mSubtest pipe-B-ts-continuation-idle: SKIP (0.000s)[0m
12551 23:02:39.156862 <14>[ 27.099425] [IGT] kms_vblank: executing
12552 23:02:39.163410 IGT-Version: 1.2<14>[ 27.104480] [IGT] kms_vblank: exiting, ret=77
12553 23:02:39.167108 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12554 23:02:39.170065 Opened device: /dev/dri/card0
12555 23:02:39.176690 N<8>[ 27.116231] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip>
12556 23:02:39.177033 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip
12558 23:02:39.183661 o KMS driver or no outputs, pipes: 8, outputs: 0
12559 23:02:39.186978 [1mSubtest pipe-B-ts-continuation-idle-hang: SKIP (0.000s)[0m
12560 23:02:39.200539 <14>[ 27.142684] [IGT] kms_vblank: executing
12561 23:02:39.207095 IGT-Version: 1.2<14>[ 27.147764] [IGT] kms_vblank: exiting, ret=77
12562 23:02:39.210548 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12563 23:02:39.213371 Opened device: /dev/dri/card0
12564 23:02:39.219997 N<8>[ 27.159426] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip>
12565 23:02:39.220750 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip
12567 23:02:39.226577 o KMS driver or no outputs, pipes: 8, outputs: 0
12568 23:02:39.229966 [1mSubtest pipe-B-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12569 23:02:39.243790 <14>[ 27.185866] [IGT] kms_vblank: executing
12570 23:02:39.249984 IGT-Version: 1.2<14>[ 27.190958] [IGT] kms_vblank: exiting, ret=77
12571 23:02:39.253515 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12572 23:02:39.256820 Opened device: /dev/dri/card0
12573 23:02:39.263509 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip
12575 23:02:39.266714 N<8>[ 27.202838] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip>
12576 23:02:39.270080 o KMS driver or no outputs, pipes: 8, outputs: 0
12577 23:02:39.276227 [1mSubtest pipe-B-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12578 23:02:39.287885 <14>[ 27.229745] [IGT] kms_vblank: executing
12579 23:02:39.294482 IGT-Version: 1.2<14>[ 27.234992] [IGT] kms_vblank: exiting, ret=77
12580 23:02:39.297262 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12581 23:02:39.300865 Opened device: /dev/dri/card0
12582 23:02:39.307341 N<8>[ 27.246603] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip>
12583 23:02:39.308251 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip
12585 23:02:39.313979 o KMS driver or no outputs, pipes: 8, outputs: 0
12586 23:02:39.317224 [1mSubtest pipe-B-ts-continuation-suspend: SKIP (0.000s)[0m
12587 23:02:39.331530 <14>[ 27.273246] [IGT] kms_vblank: executing
12588 23:02:39.337434 IGT-Version: 1.2<14>[ 27.278306] [IGT] kms_vblank: exiting, ret=77
12589 23:02:39.341089 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12590 23:02:39.344727 Opened device: /dev/dri/card0
12591 23:02:39.351098 N<8>[ 27.289807] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip>
12592 23:02:39.351943 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip
12594 23:02:39.357421 o KMS driver or no outputs, pipes: 8, outputs: 0
12595 23:02:39.361105 [1mSubtest pipe-B-ts-continuation-modeset: SKIP (0.000s)[0m
12596 23:02:39.374572 <14>[ 27.316469] [IGT] kms_vblank: executing
12597 23:02:39.381104 IGT-Version: 1.2<14>[ 27.321492] [IGT] kms_vblank: exiting, ret=77
12598 23:02:39.384471 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12599 23:02:39.387421 Opened device: /dev/dri/card0
12600 23:02:39.393918 N<8>[ 27.333137] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip>
12601 23:02:39.394694 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip
12603 23:02:39.400606 o KMS driver or no outputs, pipes: 8, outputs: 0
12604 23:02:39.407528 [1mSubtest pipe-B-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12605 23:02:39.419050 <14>[ 27.361070] [IGT] kms_vblank: executing
12606 23:02:39.425613 IGT-Version: 1.2<14>[ 27.366141] [IGT] kms_vblank: exiting, ret=77
12607 23:02:39.428648 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12608 23:02:39.432162 Opened device: /dev/dri/card0
12609 23:02:39.438643 N<8>[ 27.377885] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip>
12610 23:02:39.439391 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip
12612 23:02:39.445271 o KMS driver or no outputs, pipes: 8, outputs: 0
12613 23:02:39.451550 [1mSubtest pipe-B-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12614 23:02:39.462354 <14>[ 27.404498] [IGT] kms_vblank: executing
12615 23:02:39.469292 IGT-Version: 1.2<14>[ 27.409553] [IGT] kms_vblank: exiting, ret=77
12616 23:02:39.471993 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12617 23:02:39.475703 Opened device: /dev/dri/card0
12618 23:02:39.481791 N<8>[ 27.421296] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip>
12619 23:02:39.482630 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip
12621 23:02:39.488253 o KMS driver or no outputs, pipes: 8, outputs: 0
12622 23:02:39.491625 [1mSubtest pipe-C-accuracy-idle: SKIP (0.000s)[0m
12623 23:02:39.504996 <14>[ 27.447031] [IGT] kms_vblank: executing
12624 23:02:39.511437 IGT-Version: 1.2<14>[ 27.452076] [IGT] kms_vblank: exiting, ret=77
12625 23:02:39.514516 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12626 23:02:39.517971 Opened device: /dev/dri/card0
12627 23:02:39.524634 N<8>[ 27.463749] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle RESULT=skip>
12628 23:02:39.525417 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle RESULT=skip
12630 23:02:39.527934 o KMS driver or no outputs, pipes: 8, outputs: 0
12631 23:02:39.534724 [1mSubtest pipe-C-query-idle: SKIP (0.000s)[0m
12632 23:02:39.547069 <14>[ 27.489317] [IGT] kms_vblank: executing
12633 23:02:39.553784 IGT-Version: 1.2<14>[ 27.494337] [IGT] kms_vblank: exiting, ret=77
12634 23:02:39.556920 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12635 23:02:39.559984 Opened device: /dev/dri/card0
12636 23:02:39.567117 N<8>[ 27.505915] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip>
12637 23:02:39.567812 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip
12639 23:02:39.570393 o KMS driver or no outputs, pipes: 8, outputs: 0
12640 23:02:39.576723 [1mSubtest pipe-C-query-idle-hang: SKIP (0.000s)[0m
12641 23:02:39.590843 <14>[ 27.532782] [IGT] kms_vblank: executing
12642 23:02:39.597136 IGT-Version: 1.2<14>[ 27.537767] [IGT] kms_vblank: exiting, ret=77
12643 23:02:39.601118 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12644 23:02:39.604121 Opened device: /dev/dri/card0
12645 23:02:39.610123 N<8>[ 27.549634] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked RESULT=skip>
12646 23:02:39.610901 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked RESULT=skip
12648 23:02:39.613559 o KMS driver or no outputs, pipes: 8, outputs: 0
12649 23:02:39.620161 [1mSubtest pipe-C-query-forked: SKIP (0.000s)[0m
12650 23:02:39.633283 <14>[ 27.575113] [IGT] kms_vblank: executing
12651 23:02:39.639678 IGT-Version: 1.2<14>[ 27.580156] [IGT] kms_vblank: exiting, ret=77
12652 23:02:39.643328 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12653 23:02:39.646108 Opened device: /dev/dri/card0
12654 23:02:39.652843 N<8>[ 27.591893] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip>
12655 23:02:39.653714 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip
12657 23:02:39.659313 o KMS driver or no outputs, pipes: 8, outputs: 0
12658 23:02:39.662849 [1mSubtest pipe-C-query-forked-hang: SKIP (0.000s)[0m
12659 23:02:39.675735 <14>[ 27.618029] [IGT] kms_vblank: executing
12660 23:02:39.682553 IGT-Version: 1.2<14>[ 27.623126] [IGT] kms_vblank: exiting, ret=77
12661 23:02:39.686026 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12662 23:02:39.689289 Opened device: /dev/dri/card0
12663 23:02:39.695499 N<8>[ 27.634829] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy RESULT=skip>
12664 23:02:39.696374 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy RESULT=skip
12666 23:02:39.698828 o KMS driver or no outputs, pipes: 8, outputs: 0
12667 23:02:39.705581 [1mSubtest pipe-C-query-busy: SKIP (0.000s)[0m
12668 23:02:39.718401 <14>[ 27.660526] [IGT] kms_vblank: executing
12669 23:02:39.725135 IGT-Version: 1.2<14>[ 27.665653] [IGT] kms_vblank: exiting, ret=77
12670 23:02:39.728393 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12671 23:02:39.731790 Opened device: /dev/dri/card0
12672 23:02:39.738132 N<8>[ 27.677300] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip>
12673 23:02:39.738992 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip
12675 23:02:39.741652 o KMS driver or no outputs, pipes: 8, outputs: 0
12676 23:02:39.748094 [1mSubtest pipe-C-query-busy-hang: SKIP (0.000s)[0m
12677 23:02:39.761140 <14>[ 27.703326] [IGT] kms_vblank: executing
12678 23:02:39.767789 IGT-Version: 1.2<14>[ 27.708428] [IGT] kms_vblank: exiting, ret=77
12679 23:02:39.771088 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12680 23:02:39.774173 Opened device: /dev/dri/card0
12681 23:02:39.780959 N<8>[ 27.720063] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip>
12682 23:02:39.781710 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip
12684 23:02:39.787882 o KMS driver or no outputs, pipes: 8, outputs: 0
12685 23:02:39.790927 [1mSubtest pipe-C-query-forked-busy: SKIP (0.000s)[0m
12686 23:02:39.804868 <14>[ 27.747312] [IGT] kms_vblank: executing
12687 23:02:39.811732 IGT-Version: 1.2<14>[ 27.752282] [IGT] kms_vblank: exiting, ret=77
12688 23:02:39.815433 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12689 23:02:39.818244 Opened device: /dev/dri/card0
12690 23:02:39.824872 N<8>[ 27.764114] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip>
12691 23:02:39.825743 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip
12693 23:02:39.831570 o KMS driver or no outputs, pipes: 8, outputs: 0
12694 23:02:39.835127 [1mSubtest pipe-C-query-forked-busy-hang: SKIP (0.000s)[0m
12695 23:02:39.849372 <14>[ 27.791240] [IGT] kms_vblank: executing
12696 23:02:39.855502 IGT-Version: 1.2<14>[ 27.796206] [IGT] kms_vblank: exiting, ret=77
12697 23:02:39.858995 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12698 23:02:39.862551 Opened device: /dev/dri/card0
12699 23:02:39.868890 N<8>[ 27.808064] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle RESULT=skip>
12700 23:02:39.869761 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle RESULT=skip
12702 23:02:39.872193 o KMS driver or no outputs, pipes: 8, outputs: 0
12703 23:02:39.878397 [1mSubtest pipe-C-wait-idle: SKIP (0.000s)[0m
12704 23:02:39.892060 <14>[ 27.834286] [IGT] kms_vblank: executing
12705 23:02:39.899264 IGT-Version: 1.2<14>[ 27.839524] [IGT] kms_vblank: exiting, ret=77
12706 23:02:39.902414 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12707 23:02:39.905455 Opened device: /dev/dri/card0
12708 23:02:39.911946 N<8>[ 27.851383] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip>
12709 23:02:39.912693 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip
12711 23:02:39.915135 o KMS driver or no outputs, pipes: 8, outputs: 0
12712 23:02:39.921619 [1mSubtest pipe-C-wait-idle-hang: SKIP (0.000s)[0m
12713 23:02:39.934619 <14>[ 27.876798] [IGT] kms_vblank: executing
12714 23:02:39.941306 IGT-Version: 1.2<14>[ 27.881915] [IGT] kms_vblank: exiting, ret=77
12715 23:02:39.944382 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12716 23:02:39.948110 Opened device: /dev/dri/card0
12717 23:02:39.954583 N<8>[ 27.893646] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked RESULT=skip>
12718 23:02:39.955331 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked RESULT=skip
12720 23:02:39.957528 o KMS driver or no outputs, pipes: 8, outputs: 0
12721 23:02:39.964220 [1mSubtest pipe-C-wait-forked: SKIP (0.000s)[0m
12722 23:02:39.977224 <14>[ 27.919447] [IGT] kms_vblank: executing
12723 23:02:39.983787 IGT-Version: 1.2<14>[ 27.924447] [IGT] kms_vblank: exiting, ret=77
12724 23:02:39.987115 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12725 23:02:39.990533 Opened device: /dev/dri/card0
12726 23:02:39.996937 N<8>[ 27.936206] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip>
12727 23:02:39.997683 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip
12729 23:02:40.003770 o KMS driver or no outputs, pipes: 8, outputs: 0
12730 23:02:40.006506 [1mSubtest pipe-C-wait-forked-hang: SKIP (0.000s)[0m
12731 23:02:40.019709 <14>[ 27.961945] [IGT] kms_vblank: executing
12732 23:02:40.026791 IGT-Version: 1.2<14>[ 27.966913] [IGT] kms_vblank: exiting, ret=77
12733 23:02:40.029803 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12734 23:02:40.033380 Opened device: /dev/dri/card0
12735 23:02:40.039743 N<8>[ 27.978849] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy RESULT=skip>
12736 23:02:40.040622 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy RESULT=skip
12738 23:02:40.042854 o KMS driver or no outputs, pipes: 8, outputs: 0
12739 23:02:40.049346 [1mSubtest pipe-C-wait-busy: SKIP (0.000s)[0m
12740 23:02:40.062155 <14>[ 28.003993] [IGT] kms_vblank: executing
12741 23:02:40.068413 IGT-Version: 1.2<14>[ 28.009044] [IGT] kms_vblank: exiting, ret=77
12742 23:02:40.072248 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12743 23:02:40.074750 Opened device: /dev/dri/card0
12744 23:02:40.081866 N<8>[ 28.020584] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip>
12745 23:02:40.082731 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip
12747 23:02:40.084876 o KMS driver or no outputs, pipes: 8, outputs: 0
12748 23:02:40.091799 [1mSubtest pipe-C-wait-busy-hang: SKIP (0.000s)[0m
12749 23:02:40.104405 <14>[ 28.046432] [IGT] kms_vblank: executing
12750 23:02:40.110676 IGT-Version: 1.2<14>[ 28.051408] [IGT] kms_vblank: exiting, ret=77
12751 23:02:40.114387 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12752 23:02:40.117650 Opened device: /dev/dri/card0
12753 23:02:40.124015 N<8>[ 28.063153] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip>
12754 23:02:40.124704 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip
12756 23:02:40.127451 o KMS driver or no outputs, pipes: 8, outputs: 0
12757 23:02:40.133872 [1mSubtest pipe-C-wait-forked-busy: SKIP (0.000s)[0m
12758 23:02:40.147017 <14>[ 28.089035] [IGT] kms_vblank: executing
12759 23:02:40.153216 IGT-Version: 1.2<14>[ 28.094033] [IGT] kms_vblank: exiting, ret=77
12760 23:02:40.156754 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12761 23:02:40.159773 Opened device: /dev/dri/card0
12762 23:02:40.166684 N<8>[ 28.105629] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip>
12763 23:02:40.167384 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip
12765 23:02:40.172993 o KMS driver or no outputs, pipes: 8, outputs: 0
12766 23:02:40.176334 [1mSubtest pipe-C-wait-forked-busy-hang: SKIP (0.000s)[0m
12767 23:02:40.189882 <14>[ 28.131938] [IGT] kms_vblank: executing
12768 23:02:40.196810 IGT-Version: 1.2<14>[ 28.136892] [IGT] kms_vblank: exiting, ret=77
12769 23:02:40.200029 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12770 23:02:40.202849 Opened device: /dev/dri/card0
12771 23:02:40.209724 N<8>[ 28.148710] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip>
12772 23:02:40.210590 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip
12774 23:02:40.215950 o KMS driver or no outputs, pipes: 8, outputs: 0
12775 23:02:40.219245 [1mSubtest pipe-C-ts-continuation-idle: SKIP (0.000s)[0m
12776 23:02:40.232870 <14>[ 28.174905] [IGT] kms_vblank: executing
12777 23:02:40.239319 IGT-Version: 1.2<14>[ 28.179951] [IGT] kms_vblank: exiting, ret=77
12778 23:02:40.242703 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12779 23:02:40.246326 Opened device: /dev/dri/card0
12780 23:02:40.252443 N<8>[ 28.191834] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip>
12781 23:02:40.253234 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip
12783 23:02:40.259165 o KMS driver or no outputs, pipes: 8, outputs: 0
12784 23:02:40.262094 [1mSubtest pipe-C-ts-continuation-idle-hang: SKIP (0.000s)[0m
12785 23:02:40.276373 <14>[ 28.218512] [IGT] kms_vblank: executing
12786 23:02:40.283275 IGT-Version: 1.2<14>[ 28.223616] [IGT] kms_vblank: exiting, ret=77
12787 23:02:40.286404 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12788 23:02:40.289570 Opened device: /dev/dri/card0
12789 23:02:40.296321 N<8>[ 28.235444] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip>
12790 23:02:40.297163 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip
12792 23:02:40.302898 o KMS driver or no outputs, pipes: 8, outputs: 0
12793 23:02:40.306234 [1mSubtest pipe-C-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12794 23:02:40.319771 <14>[ 28.262019] [IGT] kms_vblank: executing
12795 23:02:40.326530 IGT-Version: 1.2<14>[ 28.267232] [IGT] kms_vblank: exiting, ret=77
12796 23:02:40.329850 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12797 23:02:40.333241 Opened device: /dev/dri/card0
12798 23:02:40.340181 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip
12800 23:02:40.343087 N<8>[ 28.279067] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip>
12801 23:02:40.346781 o KMS driver or no outputs, pipes: 8, outputs: 0
12802 23:02:40.352986 [1mSubtest pipe-C-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12803 23:02:40.364538 <14>[ 28.306742] [IGT] kms_vblank: executing
12804 23:02:40.371502 IGT-Version: 1.2<14>[ 28.311728] [IGT] kms_vblank: exiting, ret=77
12805 23:02:40.374369 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12806 23:02:40.378042 Opened device: /dev/dri/card0
12807 23:02:40.384307 N<8>[ 28.323784] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip>
12808 23:02:40.385099 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip
12810 23:02:40.390967 o KMS driver or no outputs, pipes: 8, outputs: 0
12811 23:02:40.394614 [1mSubtest pipe-C-ts-continuation-suspend: SKIP (0.000s)[0m
12812 23:02:40.408662 <14>[ 28.350818] [IGT] kms_vblank: executing
12813 23:02:40.415198 IGT-Version: 1.2<14>[ 28.355842] [IGT] kms_vblank: exiting, ret=77
12814 23:02:40.418461 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12815 23:02:40.421686 Opened device: /dev/dri/card0
12816 23:02:40.428425 N<8>[ 28.368097] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip>
12817 23:02:40.429323 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip
12819 23:02:40.434954 o KMS driver or no outputs, pipes: 8, outputs: 0
12820 23:02:40.438430 [1mSubtest pipe-C-ts-continuation-modeset: SKIP (0.000s)[0m
12821 23:02:40.452065 <14>[ 28.394138] [IGT] kms_vblank: executing
12822 23:02:40.458732 IGT-Version: 1.2<14>[ 28.399301] [IGT] kms_vblank: exiting, ret=77
12823 23:02:40.462011 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12824 23:02:40.465044 Opened device: /dev/dri/card0
12825 23:02:40.471711 N<8>[ 28.411050] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip>
12826 23:02:40.472671 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip
12828 23:02:40.478436 o KMS driver or no outputs, pipes: 8, outputs: 0
12829 23:02:40.484711 [1mSubtest pipe-C-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12830 23:02:40.495422 <14>[ 28.437740] [IGT] kms_vblank: executing
12831 23:02:40.502110 IGT-Version: 1.2<14>[ 28.442924] [IGT] kms_vblank: exiting, ret=77
12832 23:02:40.505214 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12833 23:02:40.508649 Opened device: /dev/dri/card0
12834 23:02:40.514877 N<8>[ 28.454674] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip>
12835 23:02:40.515802 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip
12837 23:02:40.521713 o KMS driver or no outputs, pipes: 8, outputs: 0
12838 23:02:40.528075 [1mSubtest pipe-C-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12839 23:02:40.539431 <14>[ 28.481452] [IGT] kms_vblank: executing
12840 23:02:40.545640 IGT-Version: 1.2<14>[ 28.486503] [IGT] kms_vblank: exiting, ret=77
12841 23:02:40.549301 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12842 23:02:40.552855 Opened device: /dev/dri/card0
12843 23:02:40.558981 N<8>[ 28.498133] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip>
12844 23:02:40.559831 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip
12846 23:02:40.562127 o KMS driver or no outputs, pipes: 8, outputs: 0
12847 23:02:40.569060 [1mSubtest pipe-D-accuracy-idle: SKIP (0.000s)[0m
12848 23:02:40.582119 <14>[ 28.524503] [IGT] kms_vblank: executing
12849 23:02:40.588968 IGT-Version: 1.2<14>[ 28.529436] [IGT] kms_vblank: exiting, ret=77
12850 23:02:40.592125 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12851 23:02:40.595268 Opened device: /dev/dri/card0
12852 23:02:40.602219 N<8>[ 28.541527] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle RESULT=skip>
12853 23:02:40.602907 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle RESULT=skip
12855 23:02:40.605411 o KMS driver or no outputs, pipes: 8, outputs: 0
12856 23:02:40.611942 [1mSubtest pipe-D-query-idle: SKIP (0.000s)[0m
12857 23:02:40.624228 <14>[ 28.566677] [IGT] kms_vblank: executing
12858 23:02:40.631219 IGT-Version: 1.2<14>[ 28.571666] [IGT] kms_vblank: exiting, ret=77
12859 23:02:40.633987 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12860 23:02:40.637331 Opened device: /dev/dri/card0
12861 23:02:40.644128 N<8>[ 28.583290] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip>
12862 23:02:40.644844 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip
12864 23:02:40.647582 o KMS driver or no outputs, pipes: 8, outputs: 0
12865 23:02:40.654030 [1mSubtest pipe-D-query-idle-hang: SKIP (0.000s)[0m
12866 23:02:40.667593 <14>[ 28.609691] [IGT] kms_vblank: executing
12867 23:02:40.674168 IGT-Version: 1.2<14>[ 28.614823] [IGT] kms_vblank: exiting, ret=77
12868 23:02:40.677683 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12869 23:02:40.680478 Opened device: /dev/dri/card0
12870 23:02:40.687012 N<8>[ 28.626372] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked RESULT=skip>
12871 23:02:40.687836 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked RESULT=skip
12873 23:02:40.690653 o KMS driver or no outputs, pipes: 8, outputs: 0
12874 23:02:40.696954 [1mSubtest pipe-D-query-forked: SKIP (0.000s)[0m
12875 23:02:40.710089 <14>[ 28.651993] [IGT] kms_vblank: executing
12876 23:02:40.716090 IGT-Version: 1.2<14>[ 28.656954] [IGT] kms_vblank: exiting, ret=77
12877 23:02:40.719755 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12878 23:02:40.723176 Opened device: /dev/dri/card0
12879 23:02:40.729537 N<8>[ 28.668671] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip>
12880 23:02:40.730227 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip
12882 23:02:40.736165 o KMS driver or no outputs, pipes: 8, outputs: 0
12883 23:02:40.739675 [1mSubtest pipe-D-query-forked-hang: SKIP (0.000s)[0m
12884 23:02:40.752220 <14>[ 28.694593] [IGT] kms_vblank: executing
12885 23:02:40.759109 IGT-Version: 1.2<14>[ 28.699709] [IGT] kms_vblank: exiting, ret=77
12886 23:02:40.762072 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12887 23:02:40.765418 Opened device: /dev/dri/card0
12888 23:02:40.772334 N<8>[ 28.711591] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy RESULT=skip>
12889 23:02:40.773169 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy RESULT=skip
12891 23:02:40.775123 o KMS driver or no outputs, pipes: 8, outputs: 0
12892 23:02:40.782206 [1mSubtest pipe-D-query-busy: SKIP (0.000s)[0m
12893 23:02:40.794853 <14>[ 28.736823] [IGT] kms_vblank: executing
12894 23:02:40.801276 IGT-Version: 1.2<14>[ 28.741880] [IGT] kms_vblank: exiting, ret=77
12895 23:02:40.804553 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12896 23:02:40.807691 Opened device: /dev/dri/card0
12897 23:02:40.814605 N<8>[ 28.753499] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip>
12898 23:02:40.815540 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip
12900 23:02:40.817714 o KMS driver or no outputs, pipes: 8, outputs: 0
12901 23:02:40.824114 [1mSubtest pipe-D-query-busy-hang: SKIP (0.000s)[0m
12902 23:02:40.837576 <14>[ 28.779817] [IGT] kms_vblank: executing
12903 23:02:40.844417 IGT-Version: 1.2<14>[ 28.784807] [IGT] kms_vblank: exiting, ret=77
12904 23:02:40.847726 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12905 23:02:40.850657 Opened device: /dev/dri/card0
12906 23:02:40.857512 N<8>[ 28.796394] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip>
12907 23:02:40.858208 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip
12909 23:02:40.860835 o KMS driver or no outputs, pipes: 8, outputs: 0
12910 23:02:40.867162 [1mSubtest pipe-D-query-forked-busy: SKIP (0.000s)[0m
12911 23:02:40.880056 <14>[ 28.822404] [IGT] kms_vblank: executing
12912 23:02:40.886671 IGT-Version: 1.2<14>[ 28.827404] [IGT] kms_vblank: exiting, ret=77
12913 23:02:40.890059 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12914 23:02:40.892980 Opened device: /dev/dri/card0
12915 23:02:40.899933 N<8>[ 28.839154] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip>
12916 23:02:40.900624 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip
12918 23:02:40.906973 o KMS driver or no outputs, pipes: 8, outputs: 0
12919 23:02:40.909763 [1mSubtest pipe-D-query-forked-busy-hang: SKIP (0.000s)[0m
12920 23:02:40.923290 <14>[ 28.865662] [IGT] kms_vblank: executing
12921 23:02:40.930046 IGT-Version: 1.2<14>[ 28.870815] [IGT] kms_vblank: exiting, ret=77
12922 23:02:40.933242 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12923 23:02:40.936880 Opened device: /dev/dri/card0
12924 23:02:40.943141 N<8>[ 28.882353] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle RESULT=skip>
12925 23:02:40.944000 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle RESULT=skip
12927 23:02:40.946362 o KMS driver or no outputs, pipes: 8, outputs: 0
12928 23:02:40.953401 [1mSubtest pipe-D-wait-idle: SKIP (0.000s)[0m
12929 23:02:40.965144 <14>[ 28.907601] [IGT] kms_vblank: executing
12930 23:02:40.972106 IGT-Version: 1.2<14>[ 28.912552] [IGT] kms_vblank: exiting, ret=77
12931 23:02:40.974953 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12932 23:02:40.978712 Opened device: /dev/dri/card0
12933 23:02:40.985216 N<8>[ 28.924541] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip>
12934 23:02:40.985955 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip
12936 23:02:40.988131 o KMS driver or no outputs, pipes: 8, outputs: 0
12937 23:02:40.995028 [1mSubtest pipe-D-wait-idle-hang: SKIP (0.000s)[0m
12938 23:02:41.007303 <14>[ 28.949896] [IGT] kms_vblank: executing
12939 23:02:41.013976 IGT-Version: 1.2<14>[ 28.954917] [IGT] kms_vblank: exiting, ret=77
12940 23:02:41.017168 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12941 23:02:41.020822 Opened device: /dev/dri/card0
12942 23:02:41.027174 N<8>[ 28.967189] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked RESULT=skip>
12943 23:02:41.028032 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked RESULT=skip
12945 23:02:41.030444 o KMS driver or no outputs, pipes: 8, outputs: 0
12946 23:02:41.036760 [1mSubtest pipe-D-wait-forked: SKIP (0.000s)[0m
12947 23:02:41.050620 <14>[ 28.993141] [IGT] kms_vblank: executing
12948 23:02:41.057348 IGT-Version: 1.2<14>[ 28.998182] [IGT] kms_vblank: exiting, ret=77
12949 23:02:41.060585 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12950 23:02:41.064013 Opened device: /dev/dri/card0
12951 23:02:41.070762 N<8>[ 29.010353] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip>
12952 23:02:41.071471 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip
12954 23:02:41.073581 o KMS driver or no outputs, pipes: 8, outputs: 0
12955 23:02:41.080022 [1mSubtest pipe-D-wait-forked-hang: SKIP (0.000s)[0m
12956 23:02:41.093592 <14>[ 29.035820] [IGT] kms_vblank: executing
12957 23:02:41.099600 IGT-Version: 1.2<14>[ 29.040991] [IGT] kms_vblank: exiting, ret=77
12958 23:02:41.103153 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12959 23:02:41.106477 Opened device: /dev/dri/card0
12960 23:02:41.112994 N<8>[ 29.052484] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy RESULT=skip>
12961 23:02:41.113703 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy RESULT=skip
12963 23:02:41.116038 o KMS driver or no outputs, pipes: 8, outputs: 0
12964 23:02:41.123079 [1mSubtest pipe-D-wait-busy: SKIP (0.000s)[0m
12965 23:02:41.135551 <14>[ 29.078001] [IGT] kms_vblank: executing
12966 23:02:41.142015 IGT-Version: 1.2<14>[ 29.083017] [IGT] kms_vblank: exiting, ret=77
12967 23:02:41.145458 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12968 23:02:41.148756 Opened device: /dev/dri/card0
12969 23:02:41.155079 N<8>[ 29.094795] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip>
12970 23:02:41.155981 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip
12972 23:02:41.158663 o KMS driver or no outputs, pipes: 8, outputs: 0
12973 23:02:41.165134 [1mSubtest pipe-D-wait-busy-hang: SKIP (0.000s)[0m
12974 23:02:41.178880 <14>[ 29.121171] [IGT] kms_vblank: executing
12975 23:02:41.184956 IGT-Version: 1.2<14>[ 29.126356] [IGT] kms_vblank: exiting, ret=77
12976 23:02:41.188559 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12977 23:02:41.192083 Opened device: /dev/dri/card0
12978 23:02:41.198328 N<8>[ 29.137882] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip>
12979 23:02:41.199112 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip
12981 23:02:41.205163 o KMS driver or no outputs, pipes: 8, outputs: 0
12982 23:02:41.208294 [1mSubtest pipe-D-wait-forked-busy: SKIP (0.000s)[0m
12983 23:02:41.221269 <14>[ 29.164007] [IGT] kms_vblank: executing
12984 23:02:41.227799 IGT-Version: 1.2<14>[ 29.168969] [IGT] kms_vblank: exiting, ret=77
12985 23:02:41.231236 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12986 23:02:41.234440 Opened device: /dev/dri/card0
12987 23:02:41.241153 N<8>[ 29.180757] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip>
12988 23:02:41.241434 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip
12990 23:02:41.247266 o KMS driver or no outputs, pipes: 8, outputs: 0
12991 23:02:41.250495 [1mSubtest pipe-D-wait-forked-busy-hang: SKIP (0.000s)[0m
12992 23:02:41.263989 <14>[ 29.207088] [IGT] kms_vblank: executing
12993 23:02:41.270768 IGT-Version: 1.2<14>[ 29.212235] [IGT] kms_vblank: exiting, ret=77
12994 23:02:41.273941 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12995 23:02:41.277652 Opened device: /dev/dri/card0
12996 23:02:41.283654 N<8>[ 29.223997] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip>
12997 23:02:41.283944 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip
12999 23:02:41.290825 o KMS driver or no outputs, pipes: 8, outputs: 0
13000 23:02:41.293898 [1mSubtest pipe-D-ts-continuation-idle: SKIP (0.000s)[0m
13001 23:02:41.307314 <14>[ 29.250274] [IGT] kms_vblank: executing
13002 23:02:41.313857 IGT-Version: 1.2<14>[ 29.255363] [IGT] kms_vblank: exiting, ret=77
13003 23:02:41.317511 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13004 23:02:41.320568 Opened device: /dev/dri/card0
13005 23:02:41.327213 N<8>[ 29.267331] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip>
13006 23:02:41.327468 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip
13008 23:02:41.333815 o KMS driver or no outputs, pipes: 8, outputs: 0
13009 23:02:41.336871 [1mSubtest pipe-D-ts-continuation-idle-hang: SKIP (0.000s)[0m
13010 23:02:41.351221 <14>[ 29.294009] [IGT] kms_vblank: executing
13011 23:02:41.357894 IGT-Version: 1.2<14>[ 29.298990] [IGT] kms_vblank: exiting, ret=77
13012 23:02:41.360948 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13013 23:02:41.364379 Opened device: /dev/dri/card0
13014 23:02:41.370780 N<8>[ 29.310889] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip>
13015 23:02:41.371070 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip
13017 23:02:41.377530 o KMS driver or no outputs, pipes: 8, outputs: 0
13018 23:02:41.380878 [1mSubtest pipe-D-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13019 23:02:41.395478 <14>[ 29.338270] [IGT] kms_vblank: executing
13020 23:02:41.402061 IGT-Version: 1.2<14>[ 29.343227] [IGT] kms_vblank: exiting, ret=77
13021 23:02:41.405607 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13022 23:02:41.408638 Opened device: /dev/dri/card0
13023 23:02:41.415426 N<8>[ 29.355033] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip>
13024 23:02:41.415689 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip
13026 23:02:41.421860 o KMS driver or no outputs, pipes: 8, outputs: 0
13027 23:02:41.428366 [1mSubtest pipe-D-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13028 23:02:41.438575 <14>[ 29.381610] [IGT] kms_vblank: executing
13029 23:02:41.445672 IGT-Version: 1.2<14>[ 29.386698] [IGT] kms_vblank: exiting, ret=77
13030 23:02:41.448614 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13031 23:02:41.451987 Opened device: /dev/dri/card0
13032 23:02:41.458377 N<8>[ 29.398487] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip>
13033 23:02:41.458636 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip
13035 23:02:41.465253 o KMS driver or no outputs, pipes: 8, outputs: 0
13036 23:02:41.468658 [1mSubtest pipe-D-ts-continuation-suspend: SKIP (0.000s)[0m
13037 23:02:41.481848 <14>[ 29.424844] [IGT] kms_vblank: executing
13038 23:02:41.488516 IGT-Version: 1.2<14>[ 29.429846] [IGT] kms_vblank: exiting, ret=77
13039 23:02:41.491752 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13040 23:02:41.495278 Opened device: /dev/dri/card0
13041 23:02:41.501811 N<8>[ 29.441622] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip>
13042 23:02:41.502067 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip
13044 23:02:41.508511 o KMS driver or no outputs, pipes: 8, outputs: 0
13045 23:02:41.511563 [1mSubtest pipe-D-ts-continuation-modeset: SKIP (0.000s)[0m
13046 23:02:41.524999 <14>[ 29.468014] [IGT] kms_vblank: executing
13047 23:02:41.531726 IGT-Version: 1.2<14>[ 29.472998] [IGT] kms_vblank: exiting, ret=77
13048 23:02:41.534721 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13049 23:02:41.538323 Opened device: /dev/dri/card0
13050 23:02:41.544913 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip
13052 23:02:41.548307 N<8>[ 29.484790] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip>
13053 23:02:41.551762 o KMS driver or no outputs, pipes: 8, outputs: 0
13054 23:02:41.557991 [1mSubtest pipe-D-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13055 23:02:41.568736 <14>[ 29.511786] [IGT] kms_vblank: executing
13056 23:02:41.575631 IGT-Version: 1.2<14>[ 29.516777] [IGT] kms_vblank: exiting, ret=77
13057 23:02:41.578913 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13058 23:02:41.582211 Opened device: /dev/dri/card0
13059 23:02:41.588774 N<8>[ 29.528533] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip>
13060 23:02:41.589046 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip
13062 23:02:41.595461 o KMS driver or no outputs, pipes: 8, outputs: 0
13063 23:02:41.602133 [1mSubtest pipe-D-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13064 23:02:41.612491 <14>[ 29.555322] [IGT] kms_vblank: executing
13065 23:02:41.619206 IGT-Version: 1.2<14>[ 29.560423] [IGT] kms_vblank: exiting, ret=77
13066 23:02:41.622261 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13067 23:02:41.625946 Opened device: /dev/dri/card0
13068 23:02:41.632380 N<8>[ 29.572137] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip>
13069 23:02:41.632636 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip
13071 23:02:41.635515 o KMS driver or no outputs, pipes: 8, outputs: 0
13072 23:02:41.642307 [1mSubtest pipe-E-accuracy-idle: SKIP (0.000s)[0m
13073 23:02:41.655941 <14>[ 29.598737] [IGT] kms_vblank: executing
13074 23:02:41.662216 IGT-Version: 1.2<14>[ 29.603672] [IGT] kms_vblank: exiting, ret=77
13075 23:02:41.666037 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13076 23:02:41.668919 Opened device: /dev/dri/card0
13077 23:02:41.675686 N<8>[ 29.615809] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle RESULT=skip>
13078 23:02:41.676010 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle RESULT=skip
13080 23:02:41.679009 o KMS driver or no outputs, pipes: 8, outputs: 0
13081 23:02:41.685605 [1mSubtest pipe-E-query-idle: SKIP (0.000s)[0m
13082 23:02:41.698806 <14>[ 29.641645] [IGT] kms_vblank: executing
13083 23:02:41.705126 IGT-Version: 1.2<14>[ 29.647097] [IGT] kms_vblank: exiting, ret=77
13084 23:02:41.708723 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13085 23:02:41.711697 Opened device: /dev/dri/card0
13086 23:02:41.718538 N<8>[ 29.658422] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip>
13087 23:02:41.718794 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip
13089 23:02:41.721481 o KMS driver or no outputs, pipes: 8, outputs: 0
13090 23:02:41.728059 [1mSubtest pipe-E-query-idle-hang: SKIP (0.000s)[0m
13091 23:02:41.741435 <14>[ 29.684480] [IGT] kms_vblank: executing
13092 23:02:41.748082 IGT-Version: 1.2<14>[ 29.689478] [IGT] kms_vblank: exiting, ret=77
13093 23:02:41.751743 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13094 23:02:41.754732 Opened device: /dev/dri/card0
13095 23:02:41.761354 N<8>[ 29.701227] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked RESULT=skip>
13096 23:02:41.761609 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked RESULT=skip
13098 23:02:41.764748 o KMS driver or no outputs, pipes: 8, outputs: 0
13099 23:02:41.771041 [1mSubtest pipe-E-query-forked: SKIP (0.000s)[0m
13100 23:02:41.784227 <14>[ 29.727338] [IGT] kms_vblank: executing
13101 23:02:41.791078 IGT-Version: 1.2<14>[ 29.732295] [IGT] kms_vblank: exiting, ret=77
13102 23:02:41.794398 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13103 23:02:41.797716 Opened device: /dev/dri/card0
13104 23:02:41.804319 N<8>[ 29.744202] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip>
13105 23:02:41.804577 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip
13107 23:02:41.807587 o KMS driver or no outputs, pipes: 8, outputs: 0
13108 23:02:41.814290 [1mSubtest pipe-E-query-forked-hang: SKIP (0.000s)[0m
13109 23:02:41.826863 <14>[ 29.769902] [IGT] kms_vblank: executing
13110 23:02:41.833402 IGT-Version: 1.2<14>[ 29.774981] [IGT] kms_vblank: exiting, ret=77
13111 23:02:41.836995 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13112 23:02:41.840093 Opened device: /dev/dri/card0
13113 23:02:41.846774 N<8>[ 29.786672] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy RESULT=skip>
13114 23:02:41.847022 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy RESULT=skip
13116 23:02:41.849853 o KMS driver or no outputs, pipes: 8, outputs: 0
13117 23:02:41.856601 [1mSubtest pipe-E-query-busy: SKIP (0.000s)[0m
13118 23:02:41.869699 <14>[ 29.812792] [IGT] kms_vblank: executing
13119 23:02:41.876365 IGT-Version: 1.2<14>[ 29.817840] [IGT] kms_vblank: exiting, ret=77
13120 23:02:41.879497 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13121 23:02:41.882863 Opened device: /dev/dri/card0
13122 23:02:41.889886 N<8>[ 29.829765] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip>
13123 23:02:41.890149 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip
13125 23:02:41.893084 o KMS driver or no outputs, pipes: 8, outputs: 0
13126 23:02:41.899358 [1mSubtest pipe-E-query-busy-hang: SKIP (0.000s)[0m
13127 23:02:41.912592 <14>[ 29.855513] [IGT] kms_vblank: executing
13128 23:02:41.919126 IGT-Version: 1.2<14>[ 29.860478] [IGT] kms_vblank: exiting, ret=77
13129 23:02:41.922296 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13130 23:02:41.925738 Opened device: /dev/dri/card0
13131 23:02:41.932430 N<8>[ 29.872244] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip>
13132 23:02:41.932717 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip
13134 23:02:41.939082 o KMS driver or no outputs, pipes: 8, outputs: 0
13135 23:02:41.942455 [1mSubtest pipe-E-query-forked-busy: SKIP (0.000s)[0m
13136 23:02:41.956149 <14>[ 29.899042] [IGT] kms_vblank: executing
13137 23:02:41.962749 IGT-Version: 1.2<14>[ 29.903982] [IGT] kms_vblank: exiting, ret=77
13138 23:02:41.966241 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13139 23:02:41.969277 Opened device: /dev/dri/card0
13140 23:02:41.975793 N<8>[ 29.915864] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip>
13141 23:02:41.976070 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip
13143 23:02:41.982518 o KMS driver or no outputs, pipes: 8, outputs: 0
13144 23:02:41.985834 [1mSubtest pipe-E-query-forked-busy-hang: SKIP (0.000s)[0m
13145 23:02:41.999251 <14>[ 29.942017] [IGT] kms_vblank: executing
13146 23:02:42.005726 IGT-Version: 1.2<14>[ 29.946982] [IGT] kms_vblank: exiting, ret=77
13147 23:02:42.009088 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13148 23:02:42.012138 Opened device: /dev/dri/card0
13149 23:02:42.019210 N<8>[ 29.958879] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle RESULT=skip>
13150 23:02:42.019499 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle RESULT=skip
13152 23:02:42.022161 o KMS driver or no outputs, pipes: 8, outputs: 0
13153 23:02:42.028657 [1mSubtest pipe-E-wait-idle: SKIP (0.000s)[0m
13154 23:02:42.041785 <14>[ 29.984724] [IGT] kms_vblank: executing
13155 23:02:42.048295 IGT-Version: 1.2<14>[ 29.989746] [IGT] kms_vblank: exiting, ret=77
13156 23:02:42.051806 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13157 23:02:42.054905 Opened device: /dev/dri/card0
13158 23:02:42.061372 N<8>[ 30.001425] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip>
13159 23:02:42.061639 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip
13161 23:02:42.064926 o KMS driver or no outputs, pipes: 8, outputs: 0
13162 23:02:42.071329 [1mSubtest pipe-E-wait-idle-hang: SKIP (0.000s)[0m
13163 23:02:42.084377 <14>[ 30.027507] [IGT] kms_vblank: executing
13164 23:02:42.091086 IGT-Version: 1.2<14>[ 30.032505] [IGT] kms_vblank: exiting, ret=77
13165 23:02:42.094544 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13166 23:02:42.097814 Opened device: /dev/dri/card0
13167 23:02:42.104368 N<8>[ 30.044044] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked RESULT=skip>
13168 23:02:42.104675 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked RESULT=skip
13170 23:02:42.107626 o KMS driver or no outputs, pipes: 8, outputs: 0
13171 23:02:42.114246 [1mSubtest pipe-E-wait-forked: SKIP (0.000s)[0m
13172 23:02:42.126975 <14>[ 30.069841] [IGT] kms_vblank: executing
13173 23:02:42.133204 IGT-Version: 1.2<14>[ 30.075046] [IGT] kms_vblank: exiting, ret=77
13174 23:02:42.136637 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13175 23:02:42.139845 Opened device: /dev/dri/card0
13176 23:02:42.146389 N<8>[ 30.086736] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip>
13177 23:02:42.146656 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip
13179 23:02:42.153265 o KMS driver or no outputs, pipes: 8, outputs: 0
13180 23:02:42.156704 [1mSubtest pipe-E-wait-forked-hang: SKIP (0.000s)[0m
13181 23:02:42.169731 <14>[ 30.112479] [IGT] kms_vblank: executing
13182 23:02:42.176353 IGT-Version: 1.2<14>[ 30.117421] [IGT] kms_vblank: exiting, ret=77
13183 23:02:42.179475 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13184 23:02:42.182874 Opened device: /dev/dri/card0
13185 23:02:42.189655 N<8>[ 30.129385] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy RESULT=skip>
13186 23:02:42.189947 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy RESULT=skip
13188 23:02:42.192677 o KMS driver or no outputs, pipes: 8, outputs: 0
13189 23:02:42.199073 [1mSubtest pipe-E-wait-busy: SKIP (0.000s)[0m
13190 23:02:42.211309 <14>[ 30.154426] [IGT] kms_vblank: executing
13191 23:02:42.217961 IGT-Version: 1.2<14>[ 30.159523] [IGT] kms_vblank: exiting, ret=77
13192 23:02:42.221288 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13193 23:02:42.224664 Opened device: /dev/dri/card0
13194 23:02:42.231109 N<8>[ 30.171208] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip>
13195 23:02:42.231370 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip
13197 23:02:42.234467 o KMS driver or no outputs, pipes: 8, outputs: 0
13198 23:02:42.240891 [1mSubtest pipe-E-wait-busy-hang: SKIP (0.000s)[0m
13199 23:02:42.253979 <14>[ 30.196857] [IGT] kms_vblank: executing
13200 23:02:42.260444 IGT-Version: 1.2<14>[ 30.201808] [IGT] kms_vblank: exiting, ret=77
13201 23:02:42.263955 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13202 23:02:42.266922 Opened device: /dev/dri/card0
13203 23:02:42.273664 N<8>[ 30.213627] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip>
13204 23:02:42.273922 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip
13206 23:02:42.276710 o KMS driver or no outputs, pipes: 8, outputs: 0
13207 23:02:42.283392 [1mSubtest pipe-E-wait-forked-busy: SKIP (0.000s)[0m
13208 23:02:42.296642 <14>[ 30.239661] [IGT] kms_vblank: executing
13209 23:02:42.303212 IGT-Version: 1.2<14>[ 30.244658] [IGT] kms_vblank: exiting, ret=77
13210 23:02:42.306782 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13211 23:02:42.309946 Opened device: /dev/dri/card0
13212 23:02:42.316532 N<8>[ 30.256238] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip>
13213 23:02:42.316803 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip
13215 23:02:42.323267 o KMS driver or no outputs, pipes: 8, outputs: 0
13216 23:02:42.326489 [1mSubtest pipe-E-wait-forked-busy-hang: SKIP (0.000s)[0m
13217 23:02:42.339311 <14>[ 30.282561] [IGT] kms_vblank: executing
13218 23:02:42.345918 IGT-Version: 1.2<14>[ 30.287642] [IGT] kms_vblank: exiting, ret=77
13219 23:02:42.349282 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13220 23:02:42.352891 Opened device: /dev/dri/card0
13221 23:02:42.359477 N<8>[ 30.299542] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip>
13222 23:02:42.359735 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip
13224 23:02:42.365616 o KMS driver or no outputs, pipes: 8, outputs: 0
13225 23:02:42.369133 [1mSubtest pipe-E-ts-continuation-idle: SKIP (0.000s)[0m
13226 23:02:42.382924 <14>[ 30.325622] [IGT] kms_vblank: executing
13227 23:02:42.389250 IGT-Version: 1.2<14>[ 30.330813] [IGT] kms_vblank: exiting, ret=77
13228 23:02:42.392727 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13229 23:02:42.396166 Opened device: /dev/dri/card0
13230 23:02:42.402390 N<8>[ 30.342550] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip>
13231 23:02:42.402714 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip
13233 23:02:42.409416 o KMS driver or no outputs, pipes: 8, outputs: 0
13234 23:02:42.412691 [1mSubtest pipe-E-ts-continuation-idle-hang: SKIP (0.000s)[0m
13235 23:02:42.427224 <14>[ 30.369982] [IGT] kms_vblank: executing
13236 23:02:42.434057 IGT-Version: 1.2<14>[ 30.375133] [IGT] kms_vblank: exiting, ret=77
13237 23:02:42.437543 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13238 23:02:42.440634 Opened device: /dev/dri/card0
13239 23:02:42.447379 N<8>[ 30.387197] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip>
13240 23:02:42.448207 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip
13242 23:02:42.453652 o KMS driver or no outputs, pipes: 8, outputs: 0
13243 23:02:42.456740 [1mSubtest pipe-E-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13244 23:02:42.470564 <14>[ 30.413501] [IGT] kms_vblank: executing
13245 23:02:42.477112 IGT-Version: 1.2<14>[ 30.418637] [IGT] kms_vblank: exiting, ret=77
13246 23:02:42.480668 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13247 23:02:42.483760 Opened device: /dev/dri/card0
13248 23:02:42.490522 N<8>[ 30.429994] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip>
13249 23:02:42.491232 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip
13251 23:02:42.496966 o KMS driver or no outputs, pipes: 8, outputs: 0
13252 23:02:42.503422 [1mSubtest pipe-E-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13253 23:02:42.514623 <14>[ 30.457488] [IGT] kms_vblank: executing
13254 23:02:42.521176 IGT-Version: 1.2<14>[ 30.462808] [IGT] kms_vblank: exiting, ret=77
13255 23:02:42.524498 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13256 23:02:42.527981 Opened device: /dev/dri/card0
13257 23:02:42.534355 N<8>[ 30.474135] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip>
13258 23:02:42.534616 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip
13260 23:02:42.540961 o KMS driver or no outputs, pipes: 8, outputs: 0
13261 23:02:42.544171 [1mSubtest pipe-E-ts-continuation-suspend: SKIP (0.000s)[0m
13262 23:02:42.558619 <14>[ 30.501612] [IGT] kms_vblank: executing
13263 23:02:42.565156 IGT-Version: 1.2<14>[ 30.507037] [IGT] kms_vblank: exiting, ret=77
13264 23:02:42.568695 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13265 23:02:42.571864 Opened device: /dev/dri/card0
13266 23:02:42.578491 N<8>[ 30.518382] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip>
13267 23:02:42.578748 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip
13269 23:02:42.585498 o KMS driver or no outputs, pipes: 8, outputs: 0
13270 23:02:42.588335 [1mSubtest pipe-E-ts-continuation-modeset: SKIP (0.000s)[0m
13271 23:02:42.602759 <14>[ 30.545728] [IGT] kms_vblank: executing
13272 23:02:42.609229 IGT-Version: 1.2<14>[ 30.551156] [IGT] kms_vblank: exiting, ret=77
13273 23:02:42.612646 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13274 23:02:42.616079 Opened device: /dev/dri/card0
13275 23:02:42.622418 N<8>[ 30.562789] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip>
13276 23:02:42.622670 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip
13278 23:02:42.629103 o KMS driver or no outputs, pipes: 8, outputs: 0
13279 23:02:42.635730 [1mSubtest pipe-E-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13280 23:02:42.647318 <14>[ 30.590231] [IGT] kms_vblank: executing
13281 23:02:42.654157 IGT-Version: 1.2<14>[ 30.595494] [IGT] kms_vblank: exiting, ret=77
13282 23:02:42.657355 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13283 23:02:42.660892 Opened device: /dev/dri/card0
13284 23:02:42.667262 N<8>[ 30.607365] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip>
13285 23:02:42.667559 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip
13287 23:02:42.673758 o KMS driver or no outputs, pipes: 8, outputs: 0
13288 23:02:42.680813 [1mSubtest pipe-E-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13289 23:02:42.692442 <14>[ 30.634906] [IGT] kms_vblank: executing
13290 23:02:42.699407 IGT-Version: 1.2<14>[ 30.639888] [IGT] kms_vblank: exiting, ret=77
13291 23:02:42.702796 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13292 23:02:42.705385 Opened device: /dev/dri/card0
13293 23:02:42.712156 N<8>[ 30.652116] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip>
13294 23:02:42.712909 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip
13296 23:02:42.715515 o KMS driver or no outputs, pipes: 8, outputs: 0
13297 23:02:42.721653 [1mSubtest pipe-F-accuracy-idle: SKIP (0.000s)[0m
13298 23:02:42.734253 <14>[ 30.677154] [IGT] kms_vblank: executing
13299 23:02:42.740661 IGT-Version: 1.2<14>[ 30.682155] [IGT] kms_vblank: exiting, ret=77
13300 23:02:42.744109 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13301 23:02:42.747372 Opened device: /dev/dri/card0
13302 23:02:42.753746 N<8>[ 30.693884] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle RESULT=skip>
13303 23:02:42.754031 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle RESULT=skip
13305 23:02:42.757541 o KMS driver or no outputs, pipes: 8, outputs: 0
13306 23:02:42.763805 [1mSubtest pipe-F-query-idle: SKIP (0.000s)[0m
13307 23:02:42.776449 <14>[ 30.719550] [IGT] kms_vblank: executing
13308 23:02:42.783164 IGT-Version: 1.2<14>[ 30.724559] [IGT] kms_vblank: exiting, ret=77
13309 23:02:42.786296 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13310 23:02:42.789333 Opened device: /dev/dri/card0
13311 23:02:42.796460 N<8>[ 30.735880] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip>
13312 23:02:42.797177 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip
13314 23:02:42.800276 o KMS driver or no outputs, pipes: 8, outputs: 0
13315 23:02:42.806690 [1mSubtest pipe-F-query-idle-hang: SKIP (0.000s)[0m
13316 23:02:42.819825 <14>[ 30.761972] [IGT] kms_vblank: executing
13317 23:02:42.826480 IGT-Version: 1.2<14>[ 30.766979] [IGT] kms_vblank: exiting, ret=77
13318 23:02:42.829478 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13319 23:02:42.832340 Opened device: /dev/dri/card0
13320 23:02:42.839128 N<8>[ 30.778812] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked RESULT=skip>
13321 23:02:42.839871 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked RESULT=skip
13323 23:02:42.842815 o KMS driver or no outputs, pipes: 8, outputs: 0
13324 23:02:42.849260 [1mSubtest pipe-F-query-forked: SKIP (0.000s)[0m
13325 23:02:42.861624 <14>[ 30.804365] [IGT] kms_vblank: executing
13326 23:02:42.868178 IGT-Version: 1.2<14>[ 30.809415] [IGT] kms_vblank: exiting, ret=77
13327 23:02:42.871449 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13328 23:02:42.874860 Opened device: /dev/dri/card0
13329 23:02:42.881876 N<8>[ 30.821184] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip>
13330 23:02:42.882637 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip
13332 23:02:42.885171 o KMS driver or no outputs, pipes: 8, outputs: 0
13333 23:02:42.891203 [1mSubtest pipe-F-query-forked-hang: SKIP (0.000s)[0m
13334 23:02:42.904606 <14>[ 30.847160] [IGT] kms_vblank: executing
13335 23:02:42.911422 IGT-Version: 1.2<14>[ 30.852256] [IGT] kms_vblank: exiting, ret=77
13336 23:02:42.914356 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13337 23:02:42.917818 Opened device: /dev/dri/card0
13338 23:02:42.924713 N<8>[ 30.863918] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy RESULT=skip>
13339 23:02:42.925548 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy RESULT=skip
13341 23:02:42.927563 o KMS driver or no outputs, pipes: 8, outputs: 0
13342 23:02:42.934412 [1mSubtest pipe-F-query-busy: SKIP (0.000s)[0m
13343 23:02:42.947072 <14>[ 30.889507] [IGT] kms_vblank: executing
13344 23:02:42.953433 IGT-Version: 1.2<14>[ 30.894719] [IGT] kms_vblank: exiting, ret=77
13345 23:02:42.956857 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13346 23:02:42.959854 Opened device: /dev/dri/card0
13347 23:02:42.966760 N<8>[ 30.906194] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip>
13348 23:02:42.967536 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip
13350 23:02:42.973492 o KMS driver or no outputs, pipes: 8, outputs: 0
13351 23:02:42.976446 [1mSubtest pipe-F-query-busy-hang: SKIP (0.000s)[0m
13352 23:02:42.990518 <14>[ 30.932861] [IGT] kms_vblank: executing
13353 23:02:42.997094 IGT-Version: 1.2<14>[ 30.937907] [IGT] kms_vblank: exiting, ret=77
13354 23:02:43.000502 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13355 23:02:43.003461 Opened device: /dev/dri/card0
13356 23:02:43.010526 N<8>[ 30.949713] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip>
13357 23:02:43.011377 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip
13359 23:02:43.013774 o KMS driver or no outputs, pipes: 8, outputs: 0
13360 23:02:43.020235 [1mSubtest pipe-F-query-forked-busy: SKIP (0.000s)[0m
13361 23:02:43.033610 <14>[ 30.975847] [IGT] kms_vblank: executing
13362 23:02:43.040105 IGT-Version: 1.2<14>[ 30.980872] [IGT] kms_vblank: exiting, ret=77
13363 23:02:43.043236 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13364 23:02:43.046445 Opened device: /dev/dri/card0
13365 23:02:43.052887 N<8>[ 30.992398] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip>
13366 23:02:43.053845 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip
13368 23:02:43.059721 o KMS driver or no outputs, pipes: 8, outputs: 0
13369 23:02:43.063225 [1mSubtest pipe-F-query-forked-busy-hang: SKIP (0.000s)[0m
13370 23:02:43.076362 <14>[ 31.018943] [IGT] kms_vblank: executing
13371 23:02:43.083409 IGT-Version: 1.2<14>[ 31.023909] [IGT] kms_vblank: exiting, ret=77
13372 23:02:43.086334 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13373 23:02:43.090098 Opened device: /dev/dri/card0
13374 23:02:43.096626 N<8>[ 31.035770] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle RESULT=skip>
13375 23:02:43.097512 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle RESULT=skip
13377 23:02:43.100017 o KMS driver or no outputs, pipes: 8, outputs: 0
13378 23:02:43.106257 [1mSubtest pipe-F-wait-idle: SKIP (0.000s)[0m
13379 23:02:43.118377 <14>[ 31.061101] [IGT] kms_vblank: executing
13380 23:02:43.125094 IGT-Version: 1.2<14>[ 31.066113] [IGT] kms_vblank: exiting, ret=77
13381 23:02:43.127814 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13382 23:02:43.131418 Opened device: /dev/dri/card0
13383 23:02:43.138383 N<8>[ 31.077688] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip>
13384 23:02:43.138643 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip
13386 23:02:43.141142 o KMS driver or no outputs, pipes: 8, outputs: 0
13387 23:02:43.148068 [1mSubtest pipe-F-wait-idle-hang: SKIP (0.000s)[0m
13388 23:02:43.161120 <14>[ 31.103889] [IGT] kms_vblank: executing
13389 23:02:43.167536 IGT-Version: 1.2<14>[ 31.108908] [IGT] kms_vblank: exiting, ret=77
13390 23:02:43.171084 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13391 23:02:43.174210 Opened device: /dev/dri/card0
13392 23:02:43.181084 N<8>[ 31.120398] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked RESULT=skip>
13393 23:02:43.181486 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked RESULT=skip
13395 23:02:43.183991 o KMS driver or no outputs, pipes: 8, outputs: 0
13396 23:02:43.190673 [1mSubtest pipe-F-wait-forked: SKIP (0.000s)[0m
13397 23:02:43.203407 <14>[ 31.145982] [IGT] kms_vblank: executing
13398 23:02:43.209584 IGT-Version: 1.2<14>[ 31.151015] [IGT] kms_vblank: exiting, ret=77
13399 23:02:43.213074 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13400 23:02:43.215886 Opened device: /dev/dri/card0
13401 23:02:43.222707 N<8>[ 31.163035] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip>
13402 23:02:43.223342 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip
13404 23:02:43.229253 o KMS driver or no outputs, pipes: 8, outputs: 0
13405 23:02:43.232416 [1mSubtest pipe-F-wait-forked-hang: SKIP (0.000s)[0m
13406 23:02:43.245822 <14>[ 31.188702] [IGT] kms_vblank: executing
13407 23:02:43.252505 IGT-Version: 1.2<14>[ 31.193644] [IGT] kms_vblank: exiting, ret=77
13408 23:02:43.255786 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13409 23:02:43.259406 Opened device: /dev/dri/card0
13410 23:02:43.265530 N<8>[ 31.205512] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy RESULT=skip>
13411 23:02:43.266165 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy RESULT=skip
13413 23:02:43.268731 o KMS driver or no outputs, pipes: 8, outputs: 0
13414 23:02:43.275452 [1mSubtest pipe-F-wait-busy: SKIP (0.000s)[0m
13415 23:02:43.288102 <14>[ 31.231046] [IGT] kms_vblank: executing
13416 23:02:43.294719 IGT-Version: 1.2<14>[ 31.236035] [IGT] kms_vblank: exiting, ret=77
13417 23:02:43.298029 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13418 23:02:43.301383 Opened device: /dev/dri/card0
13419 23:02:43.307485 N<8>[ 31.247644] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip>
13420 23:02:43.307743 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip
13422 23:02:43.311065 o KMS driver or no outputs, pipes: 8, outputs: 0
13423 23:02:43.317705 [1mSubtest pipe-F-wait-busy-hang: SKIP (0.000s)[0m
13424 23:02:43.330557 <14>[ 31.273498] [IGT] kms_vblank: executing
13425 23:02:43.337222 IGT-Version: 1.2<14>[ 31.278545] [IGT] kms_vblank: exiting, ret=77
13426 23:02:43.340689 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13427 23:02:43.343752 Opened device: /dev/dri/card0
13428 23:02:43.350223 N<8>[ 31.290300] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip>
13429 23:02:43.350484 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip
13431 23:02:43.353555 o KMS driver or no outputs, pipes: 8, outputs: 0
13432 23:02:43.359903 [1mSubtest pipe-F-wait-forked-busy: SKIP (0.000s)[0m
13433 23:02:43.373343 <14>[ 31.316238] [IGT] kms_vblank: executing
13434 23:02:43.379675 IGT-Version: 1.2<14>[ 31.321239] [IGT] kms_vblank: exiting, ret=77
13435 23:02:43.382910 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13436 23:02:43.386285 Opened device: /dev/dri/card0
13437 23:02:43.392712 N<8>[ 31.332834] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip>
13438 23:02:43.393013 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip
13440 23:02:43.399394 o KMS driver or no outputs, pipes: 8, outputs: 0
13441 23:02:43.402728 [1mSubtest pipe-F-wait-forked-busy-hang: SKIP (0.000s)[0m
13442 23:02:43.415849 <14>[ 31.359115] [IGT] kms_vblank: executing
13443 23:02:43.422937 IGT-Version: 1.2<14>[ 31.364214] [IGT] kms_vblank: exiting, ret=77
13444 23:02:43.426174 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13445 23:02:43.429393 Opened device: /dev/dri/card0
13446 23:02:43.436599 N<8>[ 31.376121] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip>
13447 23:02:43.437008 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip
13449 23:02:43.443002 o KMS driver or no outputs, pipes: 8, outputs: 0
13450 23:02:43.446575 [1mSubtest pipe-F-ts-continuation-idle: SKIP (0.000s)[0m
13451 23:02:43.459537 <14>[ 31.402211] [IGT] kms_vblank: executing
13452 23:02:43.466659 IGT-Version: 1.2<14>[ 31.407306] [IGT] kms_vblank: exiting, ret=77
13453 23:02:43.469872 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13454 23:02:43.472630 Opened device: /dev/dri/card0
13455 23:02:43.479575 N<8>[ 31.419151] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip>
13456 23:02:43.480335 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip
13458 23:02:43.486154 o KMS driver or no outputs, pipes: 8, outputs: 0
13459 23:02:43.489290 [1mSubtest pipe-F-ts-continuation-idle-hang: SKIP (0.000s)[0m
13460 23:02:43.503848 <14>[ 31.446648] [IGT] kms_vblank: executing
13461 23:02:43.510605 IGT-Version: 1.2<14>[ 31.451791] [IGT] kms_vblank: exiting, ret=77
13462 23:02:43.513733 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13463 23:02:43.517366 Opened device: /dev/dri/card0
13464 23:02:43.523639 N<8>[ 31.463667] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip>
13465 23:02:43.524462 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip
13467 23:02:43.530154 o KMS driver or no outputs, pipes: 8, outputs: 0
13468 23:02:43.533155 [1mSubtest pipe-F-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13469 23:02:43.546777 <14>[ 31.489913] [IGT] kms_vblank: executing
13470 23:02:43.553587 IGT-Version: 1.2<14>[ 31.494967] [IGT] kms_vblank: exiting, ret=77
13471 23:02:43.556431 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13472 23:02:43.560212 Opened device: /dev/dri/card0
13473 23:02:43.566615 N<8>[ 31.506941] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip>
13474 23:02:43.566876 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip
13476 23:02:43.573106 o KMS driver or no outputs, pipes: 8, outputs: 0
13477 23:02:43.579874 [1mSubtest pipe-F-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13478 23:02:43.590578 <14>[ 31.533910] [IGT] kms_vblank: executing
13479 23:02:43.597695 IGT-Version: 1.2<14>[ 31.539072] [IGT] kms_vblank: exiting, ret=77
13480 23:02:43.600592 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13481 23:02:43.604031 Opened device: /dev/dri/card0
13482 23:02:43.610492 N<8>[ 31.550934] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip>
13483 23:02:43.610749 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip
13485 23:02:43.617338 o KMS driver or no outputs, pipes: 8, outputs: 0
13486 23:02:43.620481 [1mSubtest pipe-F-ts-continuation-suspend: SKIP (0.000s)[0m
13487 23:02:43.634212 <14>[ 31.577403] [IGT] kms_vblank: executing
13488 23:02:43.640872 IGT-Version: 1.2<14>[ 31.582467] [IGT] kms_vblank: exiting, ret=77
13489 23:02:43.644019 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13490 23:02:43.647616 Opened device: /dev/dri/card0
13491 23:02:43.654266 N<8>[ 31.594032] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip>
13492 23:02:43.654582 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip
13494 23:02:43.660642 o KMS driver or no outputs, pipes: 8, outputs: 0
13495 23:02:43.663567 [1mSubtest pipe-F-ts-continuation-modeset: SKIP (0.000s)[0m
13496 23:02:43.677352 <14>[ 31.620357] [IGT] kms_vblank: executing
13497 23:02:43.683895 IGT-Version: 1.2<14>[ 31.625460] [IGT] kms_vblank: exiting, ret=77
13498 23:02:43.687471 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13499 23:02:43.690464 Opened device: /dev/dri/card0
13500 23:02:43.697083 N<8>[ 31.637201] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip>
13501 23:02:43.697452 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip
13503 23:02:43.703721 o KMS driver or no outputs, pipes: 8, outputs: 0
13504 23:02:43.710576 [1mSubtest pipe-F-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13505 23:02:43.721314 <14>[ 31.664303] [IGT] kms_vblank: executing
13506 23:02:43.728379 IGT-Version: 1.2<14>[ 31.669423] [IGT] kms_vblank: exiting, ret=77
13507 23:02:43.731686 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13508 23:02:43.735329 Opened device: /dev/dri/card0
13509 23:02:43.741356 N<8>[ 31.681196] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip>
13510 23:02:43.742225 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip
13512 23:02:43.748012 o KMS driver or no outputs, pipes: 8, outputs: 0
13513 23:02:43.754543 [1mSubtest pipe-F-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13514 23:02:43.765348 <14>[ 31.708101] [IGT] kms_vblank: executing
13515 23:02:43.771833 IGT-Version: 1.2<14>[ 31.713098] [IGT] kms_vblank: exiting, ret=77
13516 23:02:43.775474 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13517 23:02:43.778493 Opened device: /dev/dri/card0
13518 23:02:43.785139 N<8>[ 31.724692] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip>
13519 23:02:43.785836 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip
13521 23:02:43.788450 o KMS driver or no outputs, pipes: 8, outputs: 0
13522 23:02:43.794875 [1mSubtest pipe-G-accuracy-idle: SKIP (0.000s)[0m
13523 23:02:43.807793 <14>[ 31.750218] [IGT] kms_vblank: executing
13524 23:02:43.814060 IGT-Version: 1.2<14>[ 31.755171] [IGT] kms_vblank: exiting, ret=77
13525 23:02:43.817237 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13526 23:02:43.820581 Opened device: /dev/dri/card0
13527 23:02:43.827593 N<8>[ 31.767036] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle RESULT=skip>
13528 23:02:43.828443 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle RESULT=skip
13530 23:02:43.831025 o KMS driver or no outputs, pipes: 8, outputs: 0
13531 23:02:43.837443 [1mSubtest pipe-G-query-idle: SKIP (0.000s)[0m
13532 23:02:43.849782 <14>[ 31.792434] [IGT] kms_vblank: executing
13533 23:02:43.856731 IGT-Version: 1.2<14>[ 31.797417] [IGT] kms_vblank: exiting, ret=77
13534 23:02:43.859563 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13535 23:02:43.863160 Opened device: /dev/dri/card0
13536 23:02:43.870077 N<8>[ 31.809316] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip>
13537 23:02:43.871133 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip
13539 23:02:43.873300 o KMS driver or no outputs, pipes: 8, outputs: 0
13540 23:02:43.879574 [1mSubtest pipe-G-query-idle-hang: SKIP (0.000s)[0m
13541 23:02:43.892460 <14>[ 31.835183] [IGT] kms_vblank: executing
13542 23:02:43.899370 IGT-Version: 1.2<14>[ 31.840157] [IGT] kms_vblank: exiting, ret=77
13543 23:02:43.902294 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13544 23:02:43.905681 Opened device: /dev/dri/card0
13545 23:02:43.912221 N<8>[ 31.851851] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked RESULT=skip>
13546 23:02:43.912970 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked RESULT=skip
13548 23:02:43.915753 o KMS driver or no outputs, pipes: 8, outputs: 0
13549 23:02:43.922391 [1mSubtest pipe-G-query-forked: SKIP (0.000s)[0m
13550 23:02:43.934859 <14>[ 31.877284] [IGT] kms_vblank: executing
13551 23:02:43.941178 IGT-Version: 1.2<14>[ 31.882362] [IGT] kms_vblank: exiting, ret=77
13552 23:02:43.944920 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13553 23:02:43.948508 Opened device: /dev/dri/card0
13554 23:02:43.954589 N<8>[ 31.893952] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip>
13555 23:02:43.955477 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip
13557 23:02:43.957969 o KMS driver or no outputs, pipes: 8, outputs: 0
13558 23:02:43.963791 [1mSubtest pipe-G-query-forked-hang: SKIP (0.000s)[0m
13559 23:02:43.977273 <14>[ 31.920348] [IGT] kms_vblank: executing
13560 23:02:43.984038 IGT-Version: 1.2<14>[ 31.925482] [IGT] kms_vblank: exiting, ret=77
13561 23:02:43.987258 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13562 23:02:43.990590 Opened device: /dev/dri/card0
13563 23:02:43.996978 N<8>[ 31.937240] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy RESULT=skip>
13564 23:02:43.997237 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy RESULT=skip
13566 23:02:44.000495 o KMS driver or no outputs, pipes: 8, outputs: 0
13567 23:02:44.007050 [1mSubtest pipe-G-query-busy: SKIP (0.000s)[0m
13568 23:02:44.020390 <14>[ 31.963583] [IGT] kms_vblank: executing
13569 23:02:44.027023 IGT-Version: 1.2<14>[ 31.968630] [IGT] kms_vblank: exiting, ret=77
13570 23:02:44.030065 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13571 23:02:44.033480 Opened device: /dev/dri/card0
13572 23:02:44.040051 N<8>[ 31.980462] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip>
13573 23:02:44.040312 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip
13575 23:02:44.043583 o KMS driver or no outputs, pipes: 8, outputs: 0
13576 23:02:44.049916 [1mSubtest pipe-G-query-busy-hang: SKIP (0.000s)[0m
13577 23:02:44.064192 <14>[ 32.007129] [IGT] kms_vblank: executing
13578 23:02:44.070329 IGT-Version: 1.2<14>[ 32.012199] [IGT] kms_vblank: exiting, ret=77
13579 23:02:44.073814 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13580 23:02:44.077287 Opened device: /dev/dri/card0
13581 23:02:44.083758 N<8>[ 32.023971] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip>
13582 23:02:44.084024 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip
13584 23:02:44.090267 o KMS driver or no outputs, pipes: 8, outputs: 0
13585 23:02:44.093673 [1mSubtest pipe-G-query-forked-busy: SKIP (0.000s)[0m
13586 23:02:44.107704 <14>[ 32.050790] [IGT] kms_vblank: executing
13587 23:02:44.114305 IGT-Version: 1.2<14>[ 32.055947] [IGT] kms_vblank: exiting, ret=77
13588 23:02:44.117615 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13589 23:02:44.120947 Opened device: /dev/dri/card0
13590 23:02:44.127607 N<8>[ 32.067753] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip>
13591 23:02:44.127864 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip
13593 23:02:44.134172 o KMS driver or no outputs, pipes: 8, outputs: 0
13594 23:02:44.137465 [1mSubtest pipe-G-query-forked-busy-hang: SKIP (0.000s)[0m
13595 23:02:44.151004 <14>[ 32.094168] [IGT] kms_vblank: executing
13596 23:02:44.157854 IGT-Version: 1.2<14>[ 32.099194] [IGT] kms_vblank: exiting, ret=77
13597 23:02:44.160741 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13598 23:02:44.164146 Opened device: /dev/dri/card0
13599 23:02:44.170751 N<8>[ 32.111035] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle RESULT=skip>
13600 23:02:44.171034 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle RESULT=skip
13602 23:02:44.174206 o KMS driver or no outputs, pipes: 8, outputs: 0
13603 23:02:44.180403 [1mSubtest pipe-G-wait-idle: SKIP (0.000s)[0m
13604 23:02:44.193787 <14>[ 32.137009] [IGT] kms_vblank: executing
13605 23:02:44.200335 IGT-Version: 1.2<14>[ 32.142096] [IGT] kms_vblank: exiting, ret=77
13606 23:02:44.203856 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13607 23:02:44.207162 Opened device: /dev/dri/card0
13608 23:02:44.213552 N<8>[ 32.153836] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip>
13609 23:02:44.213808 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip
13611 23:02:44.216861 o KMS driver or no outputs, pipes: 8, outputs: 0
13612 23:02:44.223324 [1mSubtest pipe-G-wait-idle-hang: SKIP (0.000s)[0m
13613 23:02:44.236848 <14>[ 32.179901] [IGT] kms_vblank: executing
13614 23:02:44.243153 IGT-Version: 1.2<14>[ 32.184866] [IGT] kms_vblank: exiting, ret=77
13615 23:02:44.246552 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13616 23:02:44.249932 Opened device: /dev/dri/card0
13617 23:02:44.256295 N<8>[ 32.196408] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked RESULT=skip>
13618 23:02:44.256550 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked RESULT=skip
13620 23:02:44.259697 o KMS driver or no outputs, pipes: 8, outputs: 0
13621 23:02:44.266688 [1mSubtest pipe-G-wait-forked: SKIP (0.000s)[0m
13622 23:02:44.280277 <14>[ 32.223043] [IGT] kms_vblank: executing
13623 23:02:44.286932 IGT-Version: 1.2<14>[ 32.228016] [IGT] kms_vblank: exiting, ret=77
13624 23:02:44.290105 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13625 23:02:44.293108 Opened device: /dev/dri/card0
13626 23:02:44.299901 N<8>[ 32.239885] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip>
13627 23:02:44.300314 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip
13629 23:02:44.303242 o KMS driver or no outputs, pipes: 8, outputs: 0
13630 23:02:44.310214 [1mSubtest pipe-G-wait-forked-hang: SKIP (0.000s)[0m
13631 23:02:44.322783 <14>[ 32.265645] [IGT] kms_vblank: executing
13632 23:02:44.329481 IGT-Version: 1.2<14>[ 32.270890] [IGT] kms_vblank: exiting, ret=77
13633 23:02:44.332732 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13634 23:02:44.336032 Opened device: /dev/dri/card0
13635 23:02:44.342520 N<8>[ 32.282260] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy RESULT=skip>
13636 23:02:44.343206 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy RESULT=skip
13638 23:02:44.345734 o KMS driver or no outputs, pipes: 8, outputs: 0
13639 23:02:44.352591 [1mSubtest pipe-G-wait-busy: SKIP (0.000s)[0m
13640 23:02:44.364625 <14>[ 32.307452] [IGT] kms_vblank: executing
13641 23:02:44.371019 IGT-Version: 1.2<14>[ 32.312446] [IGT] kms_vblank: exiting, ret=77
13642 23:02:44.374351 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13643 23:02:44.377890 Opened device: /dev/dri/card0
13644 23:02:44.384304 N<8>[ 32.324182] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip>
13645 23:02:44.384994 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip
13647 23:02:44.387672 o KMS driver or no outputs, pipes: 8, outputs: 0
13648 23:02:44.394331 [1mSubtest pipe-G-wait-busy-hang: SKIP (0.000s)[0m
13649 23:02:44.407366 <14>[ 32.350268] [IGT] kms_vblank: executing
13650 23:02:44.414250 IGT-Version: 1.2<14>[ 32.355384] [IGT] kms_vblank: exiting, ret=77
13651 23:02:44.417294 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13652 23:02:44.420612 Opened device: /dev/dri/card0
13653 23:02:44.427384 N<8>[ 32.367249] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip>
13654 23:02:44.428220 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip
13656 23:02:44.433818 o KMS driver or no outputs, pipes: 8, outputs: 0
13657 23:02:44.437127 [1mSubtest pipe-G-wait-forked-busy: SKIP (0.000s)[0m
13658 23:02:44.451024 <14>[ 32.393843] [IGT] kms_vblank: executing
13659 23:02:44.457343 IGT-Version: 1.2<14>[ 32.399103] [IGT] kms_vblank: exiting, ret=77
13660 23:02:44.460870 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13661 23:02:44.464189 Opened device: /dev/dri/card0
13662 23:02:44.470647 N<8>[ 32.410672] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip>
13663 23:02:44.471339 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip
13665 23:02:44.477521 o KMS driver or no outputs, pipes: 8, outputs: 0
13666 23:02:44.480489 [1mSubtest pipe-G-wait-forked-busy-hang: SKIP (0.000s)[0m
13667 23:02:44.494560 <14>[ 32.437476] [IGT] kms_vblank: executing
13668 23:02:44.501024 IGT-Version: 1.2<14>[ 32.442932] [IGT] kms_vblank: exiting, ret=77
13669 23:02:44.504489 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13670 23:02:44.507858 Opened device: /dev/dri/card0
13671 23:02:44.514408 N<8>[ 32.454478] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip>
13672 23:02:44.515118 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip
13674 23:02:44.521165 o KMS driver or no outputs, pipes: 8, outputs: 0
13675 23:02:44.524034 [1mSubtest pipe-G-ts-continuation-idle: SKIP (0.000s)[0m
13676 23:02:44.538535 <14>[ 32.481443] [IGT] kms_vblank: executing
13677 23:02:44.545151 IGT-Version: 1.2<14>[ 32.486700] [IGT] kms_vblank: exiting, ret=77
13678 23:02:44.548322 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13679 23:02:44.551801 Opened device: /dev/dri/card0
13680 23:02:44.558314 N<8>[ 32.498383] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip>
13681 23:02:44.558842 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip
13683 23:02:44.564853 o KMS driver or no outputs, pipes: 8, outputs: 0
13684 23:02:44.568263 [1mSubtest pipe-G-ts-continuation-idle-hang: SKIP (0.000s)[0m
13685 23:02:44.581951 <14>[ 32.524803] [IGT] kms_vblank: executing
13686 23:02:44.588319 IGT-Version: 1.2<14>[ 32.529777] [IGT] kms_vblank: exiting, ret=77
13687 23:02:44.591688 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13688 23:02:44.595100 Opened device: /dev/dri/card0
13689 23:02:44.601757 N<8>[ 32.541501] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip>
13690 23:02:44.602014 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip
13692 23:02:44.608022 o KMS driver or no outputs, pipes: 8, outputs: 0
13693 23:02:44.611439 [1mSubtest pipe-G-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13694 23:02:44.625459 <14>[ 32.568350] [IGT] kms_vblank: executing
13695 23:02:44.631666 IGT-Version: 1.2<14>[ 32.573381] [IGT] kms_vblank: exiting, ret=77
13696 23:02:44.635503 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13697 23:02:44.638240 Opened device: /dev/dri/card0
13698 23:02:44.645090 N<8>[ 32.585053] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip>
13699 23:02:44.645347 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip
13701 23:02:44.651747 o KMS driver or no outputs, pipes: 8, outputs: 0
13702 23:02:44.658231 [1mSubtest pipe-G-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13703 23:02:44.668697 <14>[ 32.611974] [IGT] kms_vblank: executing
13704 23:02:44.675087 IGT-Version: 1.2<14>[ 32.616954] [IGT] kms_vblank: exiting, ret=77
13705 23:02:44.678599 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13706 23:02:44.682136 Opened device: /dev/dri/card0
13707 23:02:44.688492 N<8>[ 32.628836] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip>
13708 23:02:44.688801 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip
13710 23:02:44.695260 o KMS driver or no outputs, pipes: 8, outputs: 0
13711 23:02:44.698114 [1mSubtest pipe-G-ts-continuation-suspend: SKIP (0.000s)[0m
13712 23:02:44.713086 <14>[ 32.656151] [IGT] kms_vblank: executing
13713 23:02:44.719643 IGT-Version: 1.2<14>[ 32.661107] [IGT] kms_vblank: exiting, ret=77
13714 23:02:44.723124 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13715 23:02:44.726084 Opened device: /dev/dri/card0
13716 23:02:44.732492 N<8>[ 32.673250] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip>
13717 23:02:44.732781 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip
13719 23:02:44.739093 o KMS driver or no outputs, pipes: 8, outputs: 0
13720 23:02:44.742261 [1mSubtest pipe-G-ts-continuation-modeset: SKIP (0.000s)[0m
13721 23:02:44.756397 <14>[ 32.699675] [IGT] kms_vblank: executing
13722 23:02:44.763186 IGT-Version: 1.2<14>[ 32.704679] [IGT] kms_vblank: exiting, ret=77
13723 23:02:44.766165 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13724 23:02:44.769602 Opened device: /dev/dri/card0
13725 23:02:44.776267 N<8>[ 32.716263] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip>
13726 23:02:44.776526 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip
13728 23:02:44.782665 o KMS driver or no outputs, pipes: 8, outputs: 0
13729 23:02:44.789181 [1mSubtest pipe-G-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13730 23:02:44.800570 <14>[ 32.743679] [IGT] kms_vblank: executing
13731 23:02:44.807130 IGT-Version: 1.2<14>[ 32.748805] [IGT] kms_vblank: exiting, ret=77
13732 23:02:44.810511 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13733 23:02:44.813740 Opened device: /dev/dri/card0
13734 23:02:44.820057 N<8>[ 32.760413] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip>
13735 23:02:44.820330 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip
13737 23:02:44.826697 o KMS driver or no outputs, pipes: 8, outputs: 0
13738 23:02:44.833175 [1mSubtest pipe-G-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13739 23:02:44.843975 <14>[ 32.787174] [IGT] kms_vblank: executing
13740 23:02:44.850501 IGT-Version: 1.2<14>[ 32.792262] [IGT] kms_vblank: exiting, ret=77
13741 23:02:44.853750 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13742 23:02:44.857099 Opened device: /dev/dri/card0
13743 23:02:44.863671 N<8>[ 32.804026] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip>
13744 23:02:44.863927 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip
13746 23:02:44.866895 o KMS driver or no outputs, pipes: 8, outputs: 0
13747 23:02:44.873775 [1mSubtest pipe-H-accuracy-idle: SKIP (0.000s)[0m
13748 23:02:44.886628 <14>[ 32.829710] [IGT] kms_vblank: executing
13749 23:02:44.892952 IGT-Version: 1.2<14>[ 32.834908] [IGT] kms_vblank: exiting, ret=77
13750 23:02:44.896305 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13751 23:02:44.899633 Opened device: /dev/dri/card0
13752 23:02:44.906517 N<8>[ 32.846699] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle RESULT=skip>
13753 23:02:44.906773 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle RESULT=skip
13755 23:02:44.909555 o KMS driver or no outputs, pipes: 8, outputs: 0
13756 23:02:44.916113 [1mSubtest pipe-H-query-idle: SKIP (0.000s)[0m
13757 23:02:44.929619 <14>[ 32.872777] [IGT] kms_vblank: executing
13758 23:02:44.936220 IGT-Version: 1.2<14>[ 32.877810] [IGT] kms_vblank: exiting, ret=77
13759 23:02:44.939884 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13760 23:02:44.943411 Opened device: /dev/dri/card0
13761 23:02:44.949574 N<8>[ 32.889701] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip>
13762 23:02:44.950382 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip
13764 23:02:44.953616 o KMS driver or no outputs, pipes: 8, outputs: 0
13765 23:02:44.960066 [1mSubtest pipe-H-query-idle-hang: SKIP (0.000s)[0m
13766 23:02:44.972755 <14>[ 32.915564] [IGT] kms_vblank: executing
13767 23:02:44.979285 IGT-Version: 1.2<14>[ 32.920597] [IGT] kms_vblank: exiting, ret=77
13768 23:02:44.982958 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13769 23:02:44.985874 Opened device: /dev/dri/card0
13770 23:02:44.992712 N<8>[ 32.932172] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked RESULT=skip>
13771 23:02:44.993437 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked RESULT=skip
13773 23:02:44.995722 o KMS driver or no outputs, pipes: 8, outputs: 0
13774 23:02:45.002781 [1mSubtest pipe-H-query-forked: SKIP (0.000s)[0m
13775 23:02:45.014972 <14>[ 32.957647] [IGT] kms_vblank: executing
13776 23:02:45.021777 IGT-Version: 1.2<14>[ 32.962955] [IGT] kms_vblank: exiting, ret=77
13777 23:02:45.024886 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13778 23:02:45.028122 Opened device: /dev/dri/card0
13779 23:02:45.035151 N<8>[ 32.974632] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip>
13780 23:02:45.036017 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip
13782 23:02:45.041437 o KMS driver or no outputs, pipes: 8, outputs: 0
13783 23:02:45.044977 [1mSubtest pipe-H-query-forked-hang: SKIP (0.000s)[0m
13784 23:02:45.057903 <14>[ 33.000613] [IGT] kms_vblank: executing
13785 23:02:45.064932 IGT-Version: 1.2<14>[ 33.005640] [IGT] kms_vblank: exiting, ret=77
13786 23:02:45.068052 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13787 23:02:45.071173 Opened device: /dev/dri/card0
13788 23:02:45.077748 N<8>[ 33.017393] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy RESULT=skip>
13789 23:02:45.078506 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy RESULT=skip
13791 23:02:45.081122 o KMS driver or no outputs, pipes: 8, outputs: 0
13792 23:02:45.087743 [1mSubtest pipe-H-query-busy: SKIP (0.000s)[0m
13793 23:02:45.100386 <14>[ 33.042732] [IGT] kms_vblank: executing
13794 23:02:45.106596 IGT-Version: 1.2<14>[ 33.047690] [IGT] kms_vblank: exiting, ret=77
13795 23:02:45.109961 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13796 23:02:45.113443 Opened device: /dev/dri/card0
13797 23:02:45.119761 N<8>[ 33.059367] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip>
13798 23:02:45.120633 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip
13800 23:02:45.122774 o KMS driver or no outputs, pipes: 8, outputs: 0
13801 23:02:45.129830 [1mSubtest pipe-H-query-busy-hang: SKIP (0.000s)[0m
13802 23:02:45.142519 <14>[ 33.085264] [IGT] kms_vblank: executing
13803 23:02:45.149389 IGT-Version: 1.2<14>[ 33.090301] [IGT] kms_vblank: exiting, ret=77
13804 23:02:45.152178 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13805 23:02:45.155538 Opened device: /dev/dri/card0
13806 23:02:45.162531 N<8>[ 33.102147] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip>
13807 23:02:45.163444 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip
13809 23:02:45.169216 o KMS driver or no outputs, pipes: 8, outputs: 0
13810 23:02:45.171897 [1mSubtest pipe-H-query-forked-busy: SKIP (0.000s)[0m
13811 23:02:45.185031 <14>[ 33.127990] [IGT] kms_vblank: executing
13812 23:02:45.192113 IGT-Version: 1.2<14>[ 33.133086] [IGT] kms_vblank: exiting, ret=77
13813 23:02:45.194736 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13814 23:02:45.198533 Opened device: /dev/dri/card0
13815 23:02:45.205392 N<8>[ 33.144784] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip>
13816 23:02:45.206257 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip
13818 23:02:45.211713 o KMS driver or no outputs, pipes: 8, outputs: 0
13819 23:02:45.214469 [1mSubtest pipe-H-query-forked-busy-hang: SKIP (0.000s)[0m
13820 23:02:45.228674 <14>[ 33.171419] [IGT] kms_vblank: executing
13821 23:02:45.234977 IGT-Version: 1.2<14>[ 33.176548] [IGT] kms_vblank: exiting, ret=77
13822 23:02:45.238550 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13823 23:02:45.242089 Opened device: /dev/dri/card0
13824 23:02:45.249012 N<8>[ 33.188159] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle RESULT=skip>
13825 23:02:45.249868 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle RESULT=skip
13827 23:02:45.251566 o KMS driver or no outputs, pipes: 8, outputs: 0
13828 23:02:45.258180 [1mSubtest pipe-H-wait-idle: SKIP (0.000s)[0m
13829 23:02:45.271027 <14>[ 33.213363] [IGT] kms_vblank: executing
13830 23:02:45.277087 IGT-Version: 1.2<14>[ 33.218397] [IGT] kms_vblank: exiting, ret=77
13831 23:02:45.280322 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13832 23:02:45.283223 Opened device: /dev/dri/card0
13833 23:02:45.289689 N<8>[ 33.230292] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip>
13834 23:02:45.289951 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip
13836 23:02:45.293155 o KMS driver or no outputs, pipes: 8, outputs: 0
13837 23:02:45.299564 [1mSubtest pipe-H-wait-idle-hang: SKIP (0.000s)[0m
13838 23:02:45.312758 <14>[ 33.256084] [IGT] kms_vblank: executing
13839 23:02:45.319579 IGT-Version: 1.2<14>[ 33.261075] [IGT] kms_vblank: exiting, ret=77
13840 23:02:45.322511 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13841 23:02:45.326046 Opened device: /dev/dri/card0
13842 23:02:45.332399 N<8>[ 33.272730] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked RESULT=skip>
13843 23:02:45.332654 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked RESULT=skip
13845 23:02:45.335661 o KMS driver or no outputs, pipes: 8, outputs: 0
13846 23:02:45.342482 [1mSubtest pipe-H-wait-forked: SKIP (0.000s)[0m
13847 23:02:45.354667 <14>[ 33.297931] [IGT] kms_vblank: executing
13848 23:02:45.361100 IGT-Version: 1.2<14>[ 33.303022] [IGT] kms_vblank: exiting, ret=77
13849 23:02:45.364427 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13850 23:02:45.367661 Opened device: /dev/dri/card0
13851 23:02:45.374308 N<8>[ 33.314979] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip>
13852 23:02:45.374563 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip
13854 23:02:45.381094 o KMS driver or no outputs, pipes: 8, outputs: 0
13855 23:02:45.384085 [1mSubtest pipe-H-wait-forked-hang: SKIP (0.000s)[0m
13856 23:02:45.397343 <14>[ 33.340739] [IGT] kms_vblank: executing
13857 23:02:45.403832 IGT-Version: 1.2<14>[ 33.345685] [IGT] kms_vblank: exiting, ret=77
13858 23:02:45.407235 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13859 23:02:45.410704 Opened device: /dev/dri/card0
13860 23:02:45.417036 N<8>[ 33.357665] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy RESULT=skip>
13861 23:02:45.417293 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy RESULT=skip
13863 23:02:45.420560 o KMS driver or no outputs, pipes: 8, outputs: 0
13864 23:02:45.426934 [1mSubtest pipe-H-wait-busy: SKIP (0.000s)[0m
13865 23:02:45.440134 <14>[ 33.383451] [IGT] kms_vblank: executing
13866 23:02:45.446838 IGT-Version: 1.2<14>[ 33.388387] [IGT] kms_vblank: exiting, ret=77
13867 23:02:45.449929 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13868 23:02:45.453101 Opened device: /dev/dri/card0
13869 23:02:45.459692 N<8>[ 33.400158] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip>
13870 23:02:45.459946 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip
13872 23:02:45.463135 o KMS driver or no outputs, pipes: 8, outputs: 0
13873 23:02:45.469723 [1mSubtest pipe-H-wait-busy-hang: SKIP (0.000s)[0m
13874 23:02:45.482452 <14>[ 33.425727] [IGT] kms_vblank: executing
13875 23:02:45.488914 IGT-Version: 1.2<14>[ 33.430953] [IGT] kms_vblank: exiting, ret=77
13876 23:02:45.492247 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13877 23:02:45.495577 Opened device: /dev/dri/card0
13878 23:02:45.502493 N<8>[ 33.442259] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip>
13879 23:02:45.502750 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip
13881 23:02:45.505331 o KMS driver or no outputs, pipes: 8, outputs: 0
13882 23:02:45.512397 [1mSubtest pipe-H-wait-forked-busy: SKIP (0.000s)[0m
13883 23:02:45.526450 <14>[ 33.469204] [IGT] kms_vblank: executing
13884 23:02:45.532795 IGT-Version: 1.2<14>[ 33.474481] [IGT] kms_vblank: exiting, ret=77
13885 23:02:45.536080 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13886 23:02:45.539583 Opened device: /dev/dri/card0
13887 23:02:45.546164 N<8>[ 33.486076] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip>
13888 23:02:45.546610 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip
13890 23:02:45.552538 o KMS driver or no outputs, pipes: 8, outputs: 0
13891 23:02:45.555992 [1mSubtest pipe-H-wait-forked-busy-hang: SKIP (0.000s)[0m
13892 23:02:45.569409 <14>[ 33.512532] [IGT] kms_vblank: executing
13893 23:02:45.576333 IGT-Version: 1.2<14>[ 33.517524] [IGT] kms_vblank: exiting, ret=77
13894 23:02:45.579503 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13895 23:02:45.582784 Opened device: /dev/dri/card0
13896 23:02:45.589381 N<8>[ 33.529271] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip>
13897 23:02:45.590255 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip
13899 23:02:45.596437 o KMS driver or no outputs, pipes: 8, outputs: 0
13900 23:02:45.599610 [1mSubtest pipe-H-ts-continuation-idle: SKIP (0.000s)[0m
13901 23:02:45.612921 <14>[ 33.555511] [IGT] kms_vblank: executing
13902 23:02:45.619304 IGT-Version: 1.2<14>[ 33.560625] [IGT] kms_vblank: exiting, ret=77
13903 23:02:45.622437 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13904 23:02:45.625802 Opened device: /dev/dri/card0
13905 23:02:45.632820 N<8>[ 33.572268] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip>
13906 23:02:45.633698 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip
13908 23:02:45.639474 o KMS driver or no outputs, pipes: 8, outputs: 0
13909 23:02:45.642833 [1mSubtest pipe-H-ts-continuation-idle-hang: SKIP (0.000s)[0m
13910 23:02:45.656466 <14>[ 33.599046] [IGT] kms_vblank: executing
13911 23:02:45.662572 IGT-Version: 1.2<14>[ 33.604015] [IGT] kms_vblank: exiting, ret=77
13912 23:02:45.666021 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13913 23:02:45.669505 Opened device: /dev/dri/card0
13914 23:02:45.676014 N<8>[ 33.615911] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip>
13915 23:02:45.676910 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip
13917 23:02:45.682538 o KMS driver or no outputs, pipes: 8, outputs: 0
13918 23:02:45.685725 [1mSubtest pipe-H-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13919 23:02:45.699575 <14>[ 33.642270] [IGT] kms_vblank: executing
13920 23:02:45.706005 IGT-Version: 1.2<14>[ 33.647400] [IGT] kms_vblank: exiting, ret=77
13921 23:02:45.709460 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13922 23:02:45.712445 Opened device: /dev/dri/card0
13923 23:02:45.719425 N<8>[ 33.659060] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip>
13924 23:02:45.720216 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip
13926 23:02:45.725802 o KMS driver or no outputs, pipes: 8, outputs: 0
13927 23:02:45.732367 [1mSubtest pipe-H-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13928 23:02:45.743489 <14>[ 33.685894] [IGT] kms_vblank: executing
13929 23:02:45.749550 IGT-Version: 1.2<14>[ 33.691133] [IGT] kms_vblank: exiting, ret=77
13930 23:02:45.752621 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13931 23:02:45.756235 Opened device: /dev/dri/card0
13932 23:02:45.762821 N<8>[ 33.702927] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip>
13933 23:02:45.763675 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip
13935 23:02:45.769262 o KMS driver or no outputs, pipes: 8, outputs: 0
13936 23:02:45.772605 [1mSubtest pipe-H-ts-continuation-suspend: SKIP (0.000s)[0m
13937 23:02:45.786466 <14>[ 33.729493] [IGT] kms_vblank: executing
13938 23:02:45.792906 IGT-Version: 1.2<14>[ 33.734597] [IGT] kms_vblank: exiting, ret=77
13939 23:02:45.796286 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13940 23:02:45.799548 Opened device: /dev/dri/card0
13941 23:02:45.806211 N<8>[ 33.746162] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip>
13942 23:02:45.806932 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip
13944 23:02:45.813002 o KMS driver or no outputs, pipes: 8, outputs: 0
13945 23:02:45.816438 [1mSubtest pipe-H-ts-continuation-modeset: SKIP (0.000s)[0m
13946 23:02:45.830610 <14>[ 33.773357] [IGT] kms_vblank: executing
13947 23:02:45.837027 IGT-Version: 1.2<14>[ 33.778565] [IGT] kms_vblank: exiting, ret=77
13948 23:02:45.840365 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13949 23:02:45.843450 Opened device: /dev/dri/card0
13950 23:02:45.850727 N<8>[ 33.790301] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip>
13951 23:02:45.851547 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip
13953 23:02:45.857189 o KMS driver or no outputs, pipes: 8, outputs: 0
13954 23:02:45.863266 [1mSubtest pipe-H-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13955 23:02:45.874063 <14>[ 33.816952] [IGT] kms_vblank: executing
13956 23:02:45.880440 IGT-Version: 1.2<14>[ 33.822014] [IGT] kms_vblank: exiting, ret=77
13957 23:02:45.884134 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13958 23:02:45.887073 Opened device: /dev/dri/card0
13959 23:02:45.893891 N<8>[ 33.833753] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip>
13960 23:02:45.894585 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip
13962 23:02:45.900668 Received signal: <TESTSET> STOP
13963 23:02:45.901204 Closing test_set kms_vblank
13964 23:02:45.903550 o KMS driver or no outputs, pipe<8>[ 33.845074] <LAVA_SIGNAL_TESTSET STOP>
13965 23:02:45.910358 s: 8, outputs: 0<8>[ 33.850927] <LAVA_SIGNAL_ENDRUN 0_igt-kms-mediatek 10597706_1.5.2.3.1>
13966 23:02:45.910845
13967 23:02:45.911445 Received signal: <ENDRUN> 0_igt-kms-mediatek 10597706_1.5.2.3.1
13968 23:02:45.911835 Ending use of test pattern.
13969 23:02:45.912152 Ending test lava.0_igt-kms-mediatek (10597706_1.5.2.3.1), duration 13.63
13971 23:02:45.916646 [1mSubtest pipe-H-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13972 23:02:45.917118 + set +x
13973 23:02:45.920608 <LAVA_TEST_RUNNER EXIT>
13974 23:02:45.921504 ok: lava_test_shell seems to have completed
13975 23:02:45.941605 addfb25-4-tiled:
result: skip
set: kms_addfb_basic
addfb25-bad-modifier:
result: fail
set: kms_addfb_basic
addfb25-framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
addfb25-modifier-no-flag:
result: pass
set: kms_addfb_basic
addfb25-x-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-x-tiled-mismatch-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-small-legacy:
result: skip
set: kms_addfb_basic
addfb25-yf-tiled-legacy:
result: skip
set: kms_addfb_basic
atomic-invalid-params:
result: skip
set: kms_atomic
atomic_plane_damage:
result: skip
set: kms_atomic
bad-pitch-0:
result: pass
set: kms_addfb_basic
bad-pitch-1024:
result: pass
set: kms_addfb_basic
bad-pitch-128:
result: pass
set: kms_addfb_basic
bad-pitch-256:
result: pass
set: kms_addfb_basic
bad-pitch-32:
result: pass
set: kms_addfb_basic
bad-pitch-63:
result: pass
set: kms_addfb_basic
bad-pitch-65536:
result: pass
set: kms_addfb_basic
bad-pitch-999:
result: pass
set: kms_addfb_basic
basic:
result: skip
set: kms_setmode
basic-auth:
result: pass
set: core_auth
basic-clone-single-crtc:
result: skip
set: kms_setmode
basic-x-tiled-legacy:
result: skip
set: kms_addfb_basic
basic-y-tiled-legacy:
result: skip
set: kms_addfb_basic
blob-multiple:
result: pass
set: kms_prop_blob
blob-prop-core:
result: pass
set: kms_prop_blob
blob-prop-lifetime:
result: pass
set: kms_prop_blob
blob-prop-validate:
result: pass
set: kms_prop_blob
bo-too-small:
result: skip
set: kms_addfb_basic
bo-too-small-due-to-tiling:
result: skip
set: kms_addfb_basic
clobberred-modifier:
result: skip
set: kms_addfb_basic
clone-exclusive-crtc:
result: skip
set: kms_setmode
core_getclient: pass
core_getstats: pass
core_getversion: pass
core_setmaster_vs_auth: pass
crtc-id:
result: skip
set: kms_vblank
crtc-invalid-params:
result: skip
set: kms_atomic
crtc-invalid-params-fence:
result: skip
set: kms_atomic
empty-block:
result: skip
set: drm_read
empty-nonblock:
result: skip
set: drm_read
fault-buffer:
result: skip
set: drm_read
framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
getclient-master-drop:
result: pass
set: core_auth
getclient-simple:
result: pass
set: core_auth
invalid:
result: skip
set: kms_vblank
invalid-buffer:
result: skip
set: drm_read
invalid-clone-exclusive-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc-stealing:
result: skip
set: kms_setmode
invalid-get-prop:
result: pass
set: kms_prop_blob
invalid-get-prop-any:
result: pass
set: kms_prop_blob
invalid-set-prop:
result: pass
set: kms_prop_blob
invalid-set-prop-any:
result: pass
set: kms_prop_blob
invalid-smem-bo-on-discrete:
result: skip
set: kms_addfb_basic
legacy-format:
result: pass
set: kms_addfb_basic
many-magics:
result: pass
set: core_auth
master-rmfb:
result: pass
set: kms_addfb_basic
no-handle:
result: pass
set: kms_addfb_basic
pipe-A-accuracy-idle:
result: skip
set: kms_vblank
pipe-A-query-busy:
result: skip
set: kms_vblank
pipe-A-query-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked:
result: skip
set: kms_vblank
pipe-A-query-forked-busy:
result: skip
set: kms_vblank
pipe-A-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked-hang:
result: skip
set: kms_vblank
pipe-A-query-idle:
result: skip
set: kms_vblank
pipe-A-query-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-A-wait-busy:
result: skip
set: kms_vblank
pipe-A-wait-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked-hang:
result: skip
set: kms_vblank
pipe-A-wait-idle:
result: skip
set: kms_vblank
pipe-A-wait-idle-hang:
result: skip
set: kms_vblank
pipe-B-accuracy-idle:
result: skip
set: kms_vblank
pipe-B-query-busy:
result: skip
set: kms_vblank
pipe-B-query-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked:
result: skip
set: kms_vblank
pipe-B-query-forked-busy:
result: skip
set: kms_vblank
pipe-B-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked-hang:
result: skip
set: kms_vblank
pipe-B-query-idle:
result: skip
set: kms_vblank
pipe-B-query-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-B-wait-busy:
result: skip
set: kms_vblank
pipe-B-wait-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked-hang:
result: skip
set: kms_vblank
pipe-B-wait-idle:
result: skip
set: kms_vblank
pipe-B-wait-idle-hang:
result: skip
set: kms_vblank
pipe-C-accuracy-idle:
result: skip
set: kms_vblank
pipe-C-query-busy:
result: skip
set: kms_vblank
pipe-C-query-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked:
result: skip
set: kms_vblank
pipe-C-query-forked-busy:
result: skip
set: kms_vblank
pipe-C-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked-hang:
result: skip
set: kms_vblank
pipe-C-query-idle:
result: skip
set: kms_vblank
pipe-C-query-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-C-wait-busy:
result: skip
set: kms_vblank
pipe-C-wait-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked-hang:
result: skip
set: kms_vblank
pipe-C-wait-idle:
result: skip
set: kms_vblank
pipe-C-wait-idle-hang:
result: skip
set: kms_vblank
pipe-D-accuracy-idle:
result: skip
set: kms_vblank
pipe-D-query-busy:
result: skip
set: kms_vblank
pipe-D-query-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked:
result: skip
set: kms_vblank
pipe-D-query-forked-busy:
result: skip
set: kms_vblank
pipe-D-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked-hang:
result: skip
set: kms_vblank
pipe-D-query-idle:
result: skip
set: kms_vblank
pipe-D-query-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-D-wait-busy:
result: skip
set: kms_vblank
pipe-D-wait-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked-hang:
result: skip
set: kms_vblank
pipe-D-wait-idle:
result: skip
set: kms_vblank
pipe-D-wait-idle-hang:
result: skip
set: kms_vblank
pipe-E-accuracy-idle:
result: skip
set: kms_vblank
pipe-E-query-busy:
result: skip
set: kms_vblank
pipe-E-query-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked:
result: skip
set: kms_vblank
pipe-E-query-forked-busy:
result: skip
set: kms_vblank
pipe-E-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked-hang:
result: skip
set: kms_vblank
pipe-E-query-idle:
result: skip
set: kms_vblank
pipe-E-query-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-E-wait-busy:
result: skip
set: kms_vblank
pipe-E-wait-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked-hang:
result: skip
set: kms_vblank
pipe-E-wait-idle:
result: skip
set: kms_vblank
pipe-E-wait-idle-hang:
result: skip
set: kms_vblank
pipe-F-accuracy-idle:
result: skip
set: kms_vblank
pipe-F-query-busy:
result: skip
set: kms_vblank
pipe-F-query-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked:
result: skip
set: kms_vblank
pipe-F-query-forked-busy:
result: skip
set: kms_vblank
pipe-F-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked-hang:
result: skip
set: kms_vblank
pipe-F-query-idle:
result: skip
set: kms_vblank
pipe-F-query-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-F-wait-busy:
result: skip
set: kms_vblank
pipe-F-wait-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked-hang:
result: skip
set: kms_vblank
pipe-F-wait-idle:
result: skip
set: kms_vblank
pipe-F-wait-idle-hang:
result: skip
set: kms_vblank
pipe-G-accuracy-idle:
result: skip
set: kms_vblank
pipe-G-query-busy:
result: skip
set: kms_vblank
pipe-G-query-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked:
result: skip
set: kms_vblank
pipe-G-query-forked-busy:
result: skip
set: kms_vblank
pipe-G-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked-hang:
result: skip
set: kms_vblank
pipe-G-query-idle:
result: skip
set: kms_vblank
pipe-G-query-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-G-wait-busy:
result: skip
set: kms_vblank
pipe-G-wait-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked-hang:
result: skip
set: kms_vblank
pipe-G-wait-idle:
result: skip
set: kms_vblank
pipe-G-wait-idle-hang:
result: skip
set: kms_vblank
pipe-H-accuracy-idle:
result: skip
set: kms_vblank
pipe-H-query-busy:
result: skip
set: kms_vblank
pipe-H-query-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked:
result: skip
set: kms_vblank
pipe-H-query-forked-busy:
result: skip
set: kms_vblank
pipe-H-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked-hang:
result: skip
set: kms_vblank
pipe-H-query-idle:
result: skip
set: kms_vblank
pipe-H-query-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-H-wait-busy:
result: skip
set: kms_vblank
pipe-H-wait-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked-hang:
result: skip
set: kms_vblank
pipe-H-wait-idle:
result: skip
set: kms_vblank
pipe-H-wait-idle-hang:
result: skip
set: kms_vblank
plane-cursor-legacy:
result: skip
set: kms_atomic
plane-immutable-zpos:
result: skip
set: kms_atomic
plane-invalid-params:
result: skip
set: kms_atomic
plane-invalid-params-fence:
result: skip
set: kms_atomic
plane-overlay-legacy:
result: skip
set: kms_atomic
plane-primary-legacy:
result: skip
set: kms_atomic
plane-primary-overlay-mutable-zpos:
result: skip
set: kms_atomic
short-buffer-block:
result: skip
set: drm_read
short-buffer-nonblock:
result: skip
set: drm_read
short-buffer-wakeup:
result: skip
set: drm_read
size-max:
result: skip
set: kms_addfb_basic
small-bo:
result: skip
set: kms_addfb_basic
test-only:
result: skip
set: kms_atomic
tile-pitch-mismatch:
result: skip
set: kms_addfb_basic
too-high:
result: skip
set: kms_addfb_basic
too-wide:
result: skip
set: kms_addfb_basic
unused-handle:
result: pass
set: kms_addfb_basic
unused-modifier:
result: pass
set: kms_addfb_basic
unused-offsets:
result: pass
set: kms_addfb_basic
unused-pitches:
result: pass
set: kms_addfb_basic
13976 23:02:45.942788 end: 3.1 lava-test-shell (duration 00:00:14) [common]
13977 23:02:45.943213 end: 3 lava-test-retry (duration 00:00:14) [common]
13978 23:02:45.943545 start: 4 finalize (timeout 00:07:47) [common]
13979 23:02:45.943871 start: 4.1 power-off (timeout 00:00:30) [common]
13980 23:02:45.944406 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-1' '--port=1' '--command=off'
13981 23:02:46.043687 >> Command sent successfully.
13982 23:02:46.048853 Returned 0 in 0 seconds
13983 23:02:46.149749 end: 4.1 power-off (duration 00:00:00) [common]
13985 23:02:46.151147 start: 4.2 read-feedback (timeout 00:07:46) [common]
13986 23:02:46.152322 Listened to connection for namespace 'common' for up to 1s
13987 23:02:47.153041 Finalising connection for namespace 'common'
13988 23:02:47.153790 Disconnecting from shell: Finalise
13989 23:02:47.154200 / #
13990 23:02:47.254993 end: 4.2 read-feedback (duration 00:00:01) [common]
13991 23:02:47.255179 end: 4 finalize (duration 00:00:01) [common]
13992 23:02:47.255292 Cleaning after the job
13993 23:02:47.255393 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/ramdisk
13994 23:02:47.260978 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/kernel
13995 23:02:47.266735 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/dtb
13996 23:02:47.266898 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10597706/tftp-deploy-cs7imoij/modules
13997 23:02:47.272237 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10597706
13998 23:02:47.365245 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10597706
13999 23:02:47.365435 Job finished correctly