Boot log: qemu_arm64-virt-gicv3
- Kernel Errors: 0
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 4
- Errors: 0
1 13:51:52.054552 lava-dispatcher, installed at version: 2023.01
2 13:51:52.054772 start: 0 validate
3 13:51:52.054895 Start time: 2023-06-14 13:51:52.054886+00:00 (UTC)
4 13:51:52.056004 Validating that http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-46-g4cc1cc26e90f/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image exists
5 13:51:52.618807 Validating that http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230609.0/arm64/rootfs.cpio.gz exists
6 13:51:52.790928 cmd: ['docker', 'pull', 'kernelci/qemu']
7 13:51:52.791148 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
8 13:51:52.932171 >> Using default tag: latest
9 13:51:54.033530 >> latest: Pulling from kernelci/qemu
10 13:51:54.065435 >> Digest: sha256:ce67b4aa6149816ab5c39a34ebc77720cac0c3651072f2c36655342e38024d42
11 13:51:54.065811 >> Status: Image is up to date for kernelci/qemu:latest
12 13:51:54.098797 >> docker.io/kernelci/qemu:latest
13 13:51:54.102009 Returned 0 in 1 seconds
14 13:51:54.238115 cmd: ['docker', 'run', '--rm', '--init', 'kernelci/qemu', 'qemu-system-aarch64', '--version']
15 13:51:54.238515 Calling: 'nice' 'docker' 'run' '--rm' '--init' 'kernelci/qemu' 'qemu-system-aarch64' '--version'
16 13:51:56.557220 >> QEMU emulator version 7.2.2 (Debian 1:7.2+dfsg-7~bpo11+1)
17 13:51:56.557589 >> Copyright (c) 2003-2022 Fabrice Bellard and the QEMU Project developers
18 13:51:58.278861 Returned 0 in 4 seconds
19 13:51:58.380112 validate duration: 6.33
21 13:51:58.380664 start: 1 deployimages (timeout 00:03:00) [common]
22 13:51:58.380832 start: 1.1 lava-overlay (timeout 00:03:00) [common]
23 13:51:58.381278 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz
24 13:51:58.381529 makedir: /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin
25 13:51:58.381742 makedir: /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/tests
26 13:51:58.381937 makedir: /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/results
27 13:51:58.382130 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-add-keys
28 13:51:58.382383 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-add-sources
29 13:51:58.382623 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-background-process-start
30 13:51:58.382861 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-background-process-stop
31 13:51:58.383088 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-common-functions
32 13:51:58.383311 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-echo-ipv4
33 13:51:58.383539 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-install-packages
34 13:51:58.383771 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-installed-packages
35 13:51:58.383995 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-os-build
36 13:51:58.384222 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-probe-channel
37 13:51:58.384445 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-probe-ip
38 13:51:58.384671 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-target-ip
39 13:51:58.384893 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-target-mac
40 13:51:58.385116 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-target-storage
41 13:51:58.385344 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-test-case
42 13:51:58.385568 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-test-event
43 13:51:58.385805 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-test-feedback
44 13:51:58.386028 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-test-raise
45 13:51:58.386258 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-test-reference
46 13:51:58.386490 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-test-runner
47 13:51:58.386712 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-test-set
48 13:51:58.386935 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-test-shell
49 13:51:58.387166 Updating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-install-packages (oe)
50 13:51:58.387452 Updating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/bin/lava-installed-packages (oe)
51 13:51:58.387696 Creating /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/environment
52 13:51:58.387887 LAVA metadata
53 13:51:58.388019 - LAVA_JOB_ID=610605
54 13:51:58.388151 - LAVA_DISPATCHER_IP=172.27.0.2
55 13:51:58.388336 start: 1.1.1 lava-vland-overlay (timeout 00:03:00) [common]
56 13:51:58.388468 skipped lava-vland-overlay
57 13:51:58.388610 end: 1.1.1 lava-vland-overlay (duration 00:00:00) [common]
58 13:51:58.388764 start: 1.1.2 lava-multinode-overlay (timeout 00:03:00) [common]
59 13:51:58.388887 skipped lava-multinode-overlay
60 13:51:58.389022 end: 1.1.2 lava-multinode-overlay (duration 00:00:00) [common]
61 13:51:58.389170 start: 1.1.3 test-definition (timeout 00:03:00) [common]
62 13:51:58.389313 Loading test definitions
63 13:51:58.389488 start: 1.1.3.1 inline-repo-action (timeout 00:03:00) [common]
64 13:51:58.389629 Using /lava-610605 at stage 0
65 13:51:58.390200 uuid=610605_1.1.3.1 testdef=None
66 13:51:58.390373 end: 1.1.3.1 inline-repo-action (duration 00:00:00) [common]
67 13:51:58.390530 start: 1.1.3.2 test-overlay (timeout 00:03:00) [common]
68 13:51:58.391378 end: 1.1.3.2 test-overlay (duration 00:00:00) [common]
70 13:51:58.391826 start: 1.1.3.3 test-install-overlay (timeout 00:03:00) [common]
71 13:51:58.392866 end: 1.1.3.3 test-install-overlay (duration 00:00:00) [common]
73 13:51:58.393327 start: 1.1.3.4 test-runscript-overlay (timeout 00:03:00) [common]
74 13:51:58.394339 runner path: /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/0/tests/0_timesync-off test_uuid 610605_1.1.3.1
75 13:51:58.394615 end: 1.1.3.4 test-runscript-overlay (duration 00:00:00) [common]
77 13:51:58.395063 start: 1.1.3.5 git-repo-action (timeout 00:03:00) [common]
78 13:51:58.395198 Using /lava-610605 at stage 0
79 13:51:58.395384 Fetching tests from https://github.com/kernelci/test-definitions.git
80 13:51:58.395526 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/0/tests/1_kselftest-arm64_qemu'
81 13:52:07.563059 Running '/usr/bin/git checkout kernelci.org
82 13:52:07.727155 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/0/tests/1_kselftest-arm64_qemu/automated/linux/kselftest/kselftest.yaml
83 13:52:07.728224 uuid=610605_1.1.3.5 testdef=None
84 13:52:07.728459 end: 1.1.3.5 git-repo-action (duration 00:00:09) [common]
86 13:52:07.728930 start: 1.1.3.6 test-overlay (timeout 00:02:51) [common]
87 13:52:07.730460 end: 1.1.3.6 test-overlay (duration 00:00:00) [common]
89 13:52:07.730933 start: 1.1.3.7 test-install-overlay (timeout 00:02:51) [common]
90 13:52:07.733048 end: 1.1.3.7 test-install-overlay (duration 00:00:00) [common]
92 13:52:07.733552 start: 1.1.3.8 test-runscript-overlay (timeout 00:02:51) [common]
93 13:52:07.735601 runner path: /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/0/tests/1_kselftest-arm64_qemu test_uuid 610605_1.1.3.5
94 13:52:07.735771 BOARD='qemu_arm64-virt-gicv3'
95 13:52:07.735891 BRANCH='cip'
96 13:52:07.736005 SKIPFILE='/dev/null'
97 13:52:07.736119 SKIP_INSTALL='True'
98 13:52:07.736232 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-46-g4cc1cc26e90f/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
99 13:52:07.736347 TST_CASENAME=''
100 13:52:07.736460 TST_CMDFILES='arm64'
101 13:52:07.736720 end: 1.1.3.8 test-runscript-overlay (duration 00:00:00) [common]
103 13:52:07.737166 Creating lava-test-runner.conf files
104 13:52:07.737289 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/610605/lava-overlay-mv16o0dz/lava-610605/0 for stage 0
105 13:52:07.737460 - 0_timesync-off
106 13:52:07.737598 - 1_kselftest-arm64_qemu
107 13:52:07.737793 end: 1.1.3 test-definition (duration 00:00:09) [common]
108 13:52:07.737959 start: 1.1.4 compress-overlay (timeout 00:02:51) [common]
109 13:52:16.304220 end: 1.1.4 compress-overlay (duration 00:00:09) [common]
110 13:52:16.304418 start: 1.1.5 persistent-nfs-overlay (timeout 00:02:42) [common]
111 13:52:16.304529 end: 1.1.5 persistent-nfs-overlay (duration 00:00:00) [common]
112 13:52:16.304653 end: 1.1 lava-overlay (duration 00:00:18) [common]
113 13:52:16.304754 start: 1.2 apply-overlay-guest (timeout 00:02:42) [common]
114 13:52:16.304836 Overlay: /var/lib/lava/dispatcher/tmp/610605/compress-overlay-if32za8_/overlay-1.1.4.tar.gz
115 13:52:31.071958 end: 1.2 apply-overlay-guest (duration 00:00:15) [common]
117 13:52:31.072701 start: 1.3 deploy-device-env (timeout 00:02:27) [common]
118 13:52:31.072861 end: 1.3 deploy-device-env (duration 00:00:00) [common]
119 13:52:31.073020 start: 1.4 download-retry (timeout 00:02:27) [common]
120 13:52:31.073186 start: 1.4.1 http-download (timeout 00:02:27) [common]
121 13:52:31.073474 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-46-g4cc1cc26e90f/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
122 13:52:31.073608 saving as /var/lib/lava/dispatcher/tmp/610605/deployimages-oo_bgkjb/kernel/Image
123 13:52:31.073743 total size: 47581696 (45MB)
124 13:52:31.073860 No compression specified
125 13:52:31.415481 progress 0% (0MB)
126 13:52:32.439258 progress 5% (2MB)
127 13:52:32.953934 progress 10% (4MB)
128 13:52:33.120624 progress 15% (6MB)
129 13:52:33.292445 progress 20% (9MB)
130 13:52:33.463819 progress 25% (11MB)
131 13:52:33.633582 progress 30% (13MB)
132 13:52:33.803107 progress 35% (15MB)
133 13:52:33.972825 progress 40% (18MB)
134 13:52:34.141715 progress 45% (20MB)
135 13:52:34.310686 progress 50% (22MB)
136 13:52:34.478122 progress 55% (24MB)
137 13:52:34.644922 progress 60% (27MB)
138 13:52:34.667425 progress 65% (29MB)
139 13:52:34.835443 progress 70% (31MB)
140 13:52:35.004247 progress 75% (34MB)
141 13:52:35.170905 progress 80% (36MB)
142 13:52:35.337020 progress 85% (38MB)
143 13:52:35.503162 progress 90% (40MB)
144 13:52:35.669525 progress 95% (43MB)
145 13:52:35.696288 progress 100% (45MB)
146 13:52:35.696543 45MB downloaded in 4.62s (9.82MB/s)
147 13:52:35.696822 end: 1.4.1 http-download (duration 00:00:05) [common]
149 13:52:35.697303 end: 1.4 download-retry (duration 00:00:05) [common]
150 13:52:35.697461 start: 1.5 download-retry (timeout 00:02:23) [common]
151 13:52:35.697615 start: 1.5.1 http-download (timeout 00:02:23) [common]
152 13:52:35.697916 Not decompressing ramdisk as can be used compressed.
153 13:52:35.698089 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230609.0/arm64/rootfs.cpio.gz
154 13:52:35.698215 saving as /var/lib/lava/dispatcher/tmp/610605/deployimages-oo_bgkjb/ramdisk/rootfs.cpio.gz
155 13:52:35.698333 total size: 88950412 (84MB)
156 13:52:35.698449 No compression specified
157 13:52:35.870056 progress 0% (0MB)
158 13:52:36.239051 progress 5% (4MB)
159 13:52:36.752868 progress 10% (8MB)
160 13:52:37.264451 progress 15% (12MB)
161 13:52:37.773728 progress 20% (16MB)
162 13:52:38.282376 progress 25% (21MB)
163 13:52:38.789300 progress 30% (25MB)
164 13:52:39.284795 progress 35% (29MB)
165 13:52:39.651338 progress 40% (33MB)
166 13:52:40.155652 progress 45% (38MB)
167 13:52:40.656710 progress 50% (42MB)
168 13:52:41.140996 progress 55% (46MB)
169 13:52:41.514672 progress 60% (50MB)
170 13:52:42.015982 progress 65% (55MB)
171 13:52:42.372977 progress 70% (59MB)
172 13:52:42.872093 progress 75% (63MB)
173 13:52:43.402794 progress 80% (67MB)
174 13:52:43.904811 progress 85% (72MB)
175 13:52:44.551352 progress 90% (76MB)
176 13:52:45.078974 progress 95% (80MB)
177 13:52:45.595011 progress 100% (84MB)
178 13:52:45.595426 84MB downloaded in 9.90s (8.57MB/s)
179 13:52:45.595685 end: 1.5.1 http-download (duration 00:00:10) [common]
181 13:52:45.596167 end: 1.5 download-retry (duration 00:00:10) [common]
182 13:52:45.596333 end: 1 deployimages (duration 00:00:47) [common]
183 13:52:45.596491 start: 2 boot-image-retry (timeout 00:05:00) [common]
184 13:52:45.596648 start: 2.1 boot-qemu-image (timeout 00:05:00) [common]
185 13:52:45.596803 start: 2.1.1 execute-qemu (timeout 00:05:00) [common]
186 13:52:45.597142 Extending command line for qcow2 test overlay
187 13:52:45.597770 Pulling docker image
188 13:52:45.597929 cmd: ['docker', 'pull', 'kernelci/qemu']
189 13:52:45.598060 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
190 13:52:45.761011 >> Using default tag: latest
191 13:52:46.879633 >> latest: Pulling from kernelci/qemu
192 13:52:46.911179 >> Digest: sha256:ce67b4aa6149816ab5c39a34ebc77720cac0c3651072f2c36655342e38024d42
193 13:52:46.911483 >> Status: Image is up to date for kernelci/qemu:latest
194 13:52:46.961104 >> docker.io/kernelci/qemu:latest
195 13:52:46.964581 Returned 0 in 1 seconds
196 13:52:47.100134 Boot command: docker run --network=host --cap-add=NET_ADMIN --interactive --tty --rm --init --name=lava-docker-qemu-610605-2.1.1-glruuulwf2 --mount=type=bind,source=/var/lib/lava/dispatcher/tmp,destination=/var/lib/lava/dispatcher/tmp kernelci/qemu qemu-system-aarch64 -cpu max,pauth-impdef=on -machine virt,gic-version=3,mte=on,accel=tcg -nographic -net nic,model=virtio,macaddr=52:54:00:12:34:58 -net user -m 1g -monitor none -kernel /var/lib/lava/dispatcher/tmp/610605/deployimages-oo_bgkjb/kernel/Image -append "console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon" -initrd /var/lib/lava/dispatcher/tmp/610605/deployimages-oo_bgkjb/ramdisk/rootfs.cpio.gz -drive format=qcow2,file=/var/lib/lava/dispatcher/tmp/610605/apply-overlay-guest-jgbv4gfe/lava-guest.qcow2,media=disk,if=virtio,id=lavatest
197 13:52:47.226840 started a shell command
198 13:52:47.227371 end: 2.1.1 execute-qemu (duration 00:00:02) [common]
199 13:52:47.227560 end: 2.1 boot-qemu-image (duration 00:00:02) [common]
200 13:52:47.227737 start: 2.2 auto-login-action (timeout 00:04:58) [common]
201 13:52:47.227909 Setting prompt string to ['Linux version [0-9]']
202 13:52:47.228046 auto-login-action: Wait for prompt ['Linux version [0-9]'] (timeout 00:05:00)
203 13:52:49.928898 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x000f0510]
204 13:52:49.929534 [ 0.000000] Linux version 6.1.31 (KernelCI@build-j35827-arm64-gcc-10-defconfig-arm64-chromebook-fwl9s) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Wed Jun 14 12:30:40 UTC 2023
205 13:52:49.929817 [ 0.000000] random: crng init done
206 13:52:49.930024 [ 0.000000] Machine model: linux,dummy-virt
207 13:52:49.930202 [ 0.000000] efi: UEFI not found.
208 13:52:49.930389 [ 0.000000] earlycon: pl11 at MMIO 0x0000000009000000 (options '')
209 13:52:49.930535 [ 0.000000] printk: bootconsole [pl11] enabled
210 13:52:49.930973 start: 2.2.1 login-action (timeout 00:04:56) [common]
211 13:52:49.931157 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
212 13:52:49.931364 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
213 13:52:49.931545 Using line separator: #'\n'#
214 13:52:49.931684 No login prompt set.
215 13:52:49.931844 Parsing kernel messages
216 13:52:49.931983 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
217 13:52:49.932236 [login-action] Waiting for messages, (timeout 00:04:56)
218 13:52:49.933864 [ 0.000000] NUMA: No NUMA configuration found
219 13:52:49.934291 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000007fffffff]
220 13:52:49.934967 [ 0.000000] NUMA: NODE_DATA [mem 0x7fdf5a00-0x7fdf7fff]
221 13:52:49.937038 [ 0.000000] Zone ranges:
222 13:52:49.937973 [ 0.000000] DMA [mem 0x0000000040000000-0x000000007fffffff]
223 13:52:49.938175 [ 0.000000] DMA32 empty
224 13:52:49.938624 [ 0.000000] Normal empty
225 13:52:49.938816 [ 0.000000] Movable zone start for each node
226 13:52:49.938993 [ 0.000000] Early memory node ranges
227 13:52:49.939144 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000007fffffff]
228 13:52:49.939533 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000007fffffff]
229 13:52:49.953538 [ 0.000000] cma: Reserved 32 MiB at 0x000000007cc00000
230 13:52:49.954654 [ 0.000000] psci: probing for conduit method from DT.
231 13:52:49.954912 [ 0.000000] psci: PSCIv1.1 detected in firmware.
232 13:52:49.955356 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
233 13:52:49.955520 [ 0.000000] psci: Trusted OS migration not required
234 13:52:49.955649 [ 0.000000] psci: SMC Calling Convention v1.0
235 13:52:49.957723 [ 0.000000] percpu: Embedded 21 pages/cpu s45224 r8192 d32600 u86016
236 13:52:49.958226 [ 0.000000] pcpu-alloc: s45224 r8192 d32600 u86016 alloc=21*4096
237 13:52:49.958658 [ 0.000000] pcpu-alloc: [0] 0
238 13:52:49.960101 [ 0.000000] Detected PIPT I-cache on CPU0
239 13:52:49.965312 [ 0.000000] CPU features: detected: Address authentication (IMP DEF algorithm)
240 13:52:49.965994 [ 0.000000] CPU features: detected: GIC system register CPU interface
241 13:52:49.966339 [ 0.000000] CPU features: detected: Hardware dirty bit management
242 13:52:49.966679 [ 0.000000] CPU features: detected: Memory Tagging Extension
243 13:52:49.966801 [ 0.000000] CPU features: detected: Asymmetric MTE Tag Check Fault
244 13:52:49.967114 [ 0.000000] CPU features: detected: Spectre-v4
245 13:52:49.970987 [ 0.000000] alternatives: applying boot alternatives
246 13:52:49.973603 [ 0.000000] Fallback order for Node 0: 0
247 13:52:49.974106 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 258048
248 13:52:49.974284 [ 0.000000] Policy zone: DMA
249 13:52:49.974506 [ 0.000000] Kernel command line: console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon
250 13:52:49.976833 <5>[ 0.000000] Unknown kernel command line parameters \"verbose\", will be passed to user space.
251 13:52:49.979800 <6>[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
252 13:52:49.980266 <6>[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
253 13:52:49.980537 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
254 13:52:49.990268 <6>[ 0.000000] Memory: 860720K/1048576K available (17984K kernel code, 4098K rwdata, 15868K rodata, 8384K init, 615K bss, 155088K reserved, 32768K cma-reserved)
255 13:52:49.996199 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
256 13:52:50.003300 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
257 13:52:50.003519 <6>[ 0.000000] rcu: RCU event tracing is enabled.
258 13:52:50.003618 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=1.
259 13:52:50.003712 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
260 13:52:50.003784 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
261 13:52:50.004099 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
262 13:52:50.004200 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
263 13:52:50.005148 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
264 13:52:50.011939 <6>[ 0.000000] GICv3: 224 SPIs implemented
265 13:52:50.012295 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
266 13:52:50.013856 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
267 13:52:50.013981 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
268 13:52:50.014659 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000080a0000
269 13:52:50.019013 <6>[ 0.000000] ITS [mem 0x08080000-0x0809ffff]
270 13:52:50.019937 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Devices @43030000 (indirect, esz 8, psz 64K, shr 1)
271 13:52:50.020283 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Interrupt Collections @43040000 (flat, esz 8, psz 64K, shr 1)
272 13:52:50.021049 <6>[ 0.000000] GICv3: using LPI property table @0x0000000043050000
273 13:52:50.021607 <6>[ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000043060000
274 13:52:50.023010 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
275 13:52:50.031068 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 62.50MHz (virt).
276 13:52:50.031844 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0x1ffffffffffffff max_cycles: 0x1cd42e208c, max_idle_ns: 881590405314 ns
277 13:52:50.032322 <6>[ 0.000075] sched_clock: 57 bits at 63MHz, resolution 16ns, wraps every 4398046511096ns
278 13:52:50.049498 <6>[ 0.014717] Console: colour dummy device 80x25
279 13:52:50.053493 <6>[ 0.020749] Calibrating delay loop (skipped), value calculated using timer frequency.. 125.00 BogoMIPS (lpj=250000)
280 13:52:50.054066 <6>[ 0.021658] pid_max: default: 32768 minimum: 301
281 13:52:50.055400 <6>[ 0.023115] LSM: Security Framework initializing
282 13:52:50.059635 <6>[ 0.027330] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
283 13:52:50.059849 <6>[ 0.027604] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
284 13:52:50.093299 <4>[ 0.061079] cacheinfo: Unable to detect cache hierarchy for CPU 0
285 13:52:50.099905 <6>[ 0.067507] cblist_init_generic: Setting adjustable number of callback queues.
286 13:52:50.100143 <6>[ 0.067855] cblist_init_generic: Setting shift to 0 and lim to 1.
287 13:52:50.100709 <6>[ 0.068413] cblist_init_generic: Setting shift to 0 and lim to 1.
288 13:52:50.102425 <6>[ 0.070155] rcu: Hierarchical SRCU implementation.
289 13:52:50.102593 <6>[ 0.070345] rcu: Max phase no-delay instances is 1000.
290 13:52:50.107492 <6>[ 0.075122] Platform MSI: its@8080000 domain created
291 13:52:50.109349 <6>[ 0.076909] PCI/MSI: /intc@8000000/its@8080000 domain created
292 13:52:50.109690 <6>[ 0.077593] fsl-mc MSI: its@8080000 domain created
293 13:52:50.113092 <6>[ 0.080785] EFI services will not be available.
294 13:52:50.114248 <6>[ 0.082035] smp: Bringing up secondary CPUs ...
295 13:52:50.114382 <6>[ 0.082299] smp: Brought up 1 node, 1 CPU
296 13:52:50.114520 <6>[ 0.082440] SMP: Total of 1 processors activated.
297 13:52:50.115042 <6>[ 0.082806] CPU features: detected: Branch Target Identification
298 13:52:50.115147 <6>[ 0.083058] CPU features: detected: 32-bit EL0 Support
299 13:52:50.115444 <6>[ 0.083232] CPU features: detected: 32-bit EL1 Support
300 13:52:50.115570 <6>[ 0.083399] CPU features: detected: ARMv8.4 Translation Table Level
301 13:52:50.116126 <6>[ 0.083666] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
302 13:52:50.116704 <6>[ 0.084395] CPU features: detected: Common not Private translations
303 13:52:50.117064 <6>[ 0.084768] CPU features: detected: CRC32 instructions
304 13:52:50.117183 <6>[ 0.085052] CPU features: detected: E0PD
305 13:52:50.117529 <6>[ 0.085375] CPU features: detected: Generic authentication (IMP DEF algorithm)
306 13:52:50.117929 <6>[ 0.085620] CPU features: detected: RCpc load-acquire (LDAPR)
307 13:52:50.118117 <6>[ 0.085873] CPU features: detected: LSE atomic instructions
308 13:52:50.118239 <6>[ 0.086126] CPU features: detected: Privileged Access Never
309 13:52:50.118344 <6>[ 0.086297] CPU features: detected: RAS Extension Support
310 13:52:50.118691 <6>[ 0.086448] CPU features: detected: Random Number Generator
311 13:52:50.118816 <6>[ 0.086659] CPU features: detected: Speculation barrier (SB)
312 13:52:50.118932 <6>[ 0.086839] CPU features: detected: Stage-2 Force Write-Back
313 13:52:50.119269 <6>[ 0.086994] CPU features: detected: TLB range maintenance instructions
314 13:52:50.119386 <6>[ 0.087261] CPU features: detected: Scalable Matrix Extension
315 13:52:50.119498 <6>[ 0.087436] CPU features: detected: FA64
316 13:52:50.119840 <6>[ 0.087566] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
317 13:52:50.119950 <6>[ 0.087752] CPU features: detected: Scalable Vector Extension
318 13:52:50.133871 <6>[ 0.098378] SVE: maximum available vector length 256 bytes per vector
319 13:52:50.134395 <6>[ 0.102104] SVE: default vector length 64 bytes per vector
320 13:52:50.136448 <6>[ 0.104103] SME: minimum available vector length 16 bytes per vector
321 13:52:50.136573 <6>[ 0.104344] SME: maximum available vector length 256 bytes per vector
322 13:52:50.136903 <6>[ 0.104728] SME: default vector length 32 bytes per vector
323 13:52:50.137465 <6>[ 0.105198] CPU: All CPU(s) started at EL1
324 13:52:50.137821 <6>[ 0.105599] alternatives: applying system-wide alternatives
325 13:52:50.192912 <6>[ 0.160677] devtmpfs: initialized
326 13:52:50.213551 <6>[ 0.180991] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
327 13:52:50.215042 <6>[ 0.182751] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
328 13:52:50.220244 <6>[ 0.187962] pinctrl core: initialized pinctrl subsystem
329 13:52:50.231423 <6>[ 0.199348] DMI not present or invalid.
330 13:52:50.240733 <6>[ 0.208393] NET: Registered PF_NETLINK/PF_ROUTE protocol family
331 13:52:50.252607 <6>[ 0.220106] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
332 13:52:50.253302 <6>[ 0.221038] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
333 13:52:50.253913 <6>[ 0.221613] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
334 13:52:50.254488 <6>[ 0.222194] audit: initializing netlink subsys (disabled)
335 13:52:50.259800 <5>[ 0.227557] audit: type=2000 audit(0.188:1): state=initialized audit_enabled=0 res=1
336 13:52:50.262663 <6>[ 0.230356] thermal_sys: Registered thermal governor 'step_wise'
337 13:52:50.263514 <6>[ 0.230433] thermal_sys: Registered thermal governor 'power_allocator'
338 13:52:50.263771 <6>[ 0.231126] cpuidle: using governor menu
339 13:52:50.264274 <6>[ 0.232110] NET: Registered PF_QIPCRTR protocol family
340 13:52:50.267748 <6>[ 0.235412] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
341 13:52:50.268325 <6>[ 0.236206] ASID allocator initialised with 65536 entries
342 13:52:50.275138 <6>[ 0.242708] Serial: AMBA PL011 UART driver
343 13:52:50.327815 <6>[ 0.295347] 9000000.pl011: ttyAMA0 at MMIO 0x9000000 (irq = 13, base_baud = 0) is a PL011 rev1
344 13:52:50.329216 <6>[ 0.297081] printk: console [ttyAMA0] enabled
345 13:52:50.329539 <6>[ 0.297081] printk: console [ttyAMA0] enabled
346 13:52:50.329652 <6>[ 0.297593] printk: bootconsole [pl11] disabled
347 13:52:50.329764 <6>[ 0.297593] printk: bootconsole [pl11] disabled
348 13:52:50.341428 <6>[ 0.309402] KASLR enabled
349 13:52:50.379181 <6>[ 0.346777] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
350 13:52:50.379422 <6>[ 0.347010] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
351 13:52:50.379545 <6>[ 0.347275] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
352 13:52:50.379657 <6>[ 0.347540] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
353 13:52:50.379993 <6>[ 0.347764] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
354 13:52:50.380113 <6>[ 0.347986] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
355 13:52:50.380483 <6>[ 0.348185] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
356 13:52:50.380592 <6>[ 0.348403] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
357 13:52:50.390535 <6>[ 0.358306] ACPI: Interpreter disabled.
358 13:52:50.398838 <6>[ 0.366748] iommu: Default domain type: Translated
359 13:52:50.399374 <6>[ 0.366950] iommu: DMA domain TLB invalidation policy: strict mode
360 13:52:50.400930 <5>[ 0.368687] SCSI subsystem initialized
361 13:52:50.401849 <7>[ 0.369613] libata version 3.00 loaded.
362 13:52:50.403208 <6>[ 0.370981] usbcore: registered new interface driver usbfs
363 13:52:50.403660 <6>[ 0.371377] usbcore: registered new interface driver hub
364 13:52:50.403838 <6>[ 0.371727] usbcore: registered new device driver usb
365 13:52:50.407409 <6>[ 0.375151] pps_core: LinuxPPS API ver. 1 registered
366 13:52:50.407587 <6>[ 0.375325] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
367 13:52:50.407758 <6>[ 0.375709] PTP clock support registered
368 13:52:50.408297 <6>[ 0.376295] EDAC MC: Ver: 3.0.0
369 13:52:50.414200 <6>[ 0.382196] FPGA manager framework
370 13:52:50.415220 <6>[ 0.382957] Advanced Linux Sound Architecture Driver Initialized.
371 13:52:50.423949 <6>[ 0.391899] vgaarb: loaded
372 13:52:50.428427 <6>[ 0.396137] clocksource: Switched to clocksource arch_sys_counter
373 13:52:50.429615 <5>[ 0.397346] VFS: Disk quotas dquot_6.6.0
374 13:52:50.429825 <6>[ 0.397631] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
375 13:52:50.433365 <6>[ 0.401085] pnp: PnP ACPI: disabled
376 13:52:50.453482 <6>[ 0.421127] NET: Registered PF_INET protocol family
377 13:52:50.455578 <6>[ 0.423349] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear)
378 13:52:50.460493 <6>[ 0.428228] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
379 13:52:50.460918 <6>[ 0.428595] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
380 13:52:50.461080 <6>[ 0.428914] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
381 13:52:50.461446 <6>[ 0.429336] TCP bind hash table entries: 8192 (order: 6, 262144 bytes, linear)
382 13:52:50.462156 <6>[ 0.429929] TCP: Hash tables configured (established 8192 bind 8192)
383 13:52:50.463357 <6>[ 0.431106] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
384 13:52:50.463749 <6>[ 0.431547] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
385 13:52:50.465152 <6>[ 0.432851] NET: Registered PF_UNIX/PF_LOCAL protocol family
386 13:52:50.467599 <6>[ 0.435342] RPC: Registered named UNIX socket transport module.
387 13:52:50.467793 <6>[ 0.435577] RPC: Registered udp transport module.
388 13:52:50.467891 <6>[ 0.435740] RPC: Registered tcp transport module.
389 13:52:50.468271 <6>[ 0.435975] RPC: Registered tcp NFSv4.1 backchannel transport module.
390 13:52:50.468369 <6>[ 0.436273] PCI: CLS 0 bytes, default 64
391 13:52:50.472964 <6>[ 0.440763] Unpacking initramfs...
392 13:52:50.481731 <6>[ 0.449507] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
393 13:52:50.482258 <6>[ 0.450264] kvm [1]: HYP mode not available
394 13:52:50.490185 <5>[ 0.457955] Initialise system trusted keyrings
395 13:52:50.497118 <6>[ 0.464869] workingset: timestamp_bits=42 max_order=18 bucket_order=0
396 13:52:50.532766 <6>[ 0.500456] squashfs: version 4.0 (2009/01/31) Phillip Lougher
397 13:52:50.537566 <5>[ 0.505345] NFS: Registering the id_resolver key type
398 13:52:50.537904 <5>[ 0.505756] Key type id_resolver registered
399 13:52:50.537996 <5>[ 0.505932] Key type id_legacy registered
400 13:52:50.538620 <6>[ 0.506430] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
401 13:52:50.538923 <6>[ 0.506706] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
402 13:52:50.544060 <6>[ 0.512034] 9p: Installing v9fs 9p2000 file system support
403 13:52:50.608911 <5>[ 0.576819] Key type asymmetric registered
404 13:52:50.609452 <5>[ 0.577015] Asymmetric key parser 'x509' registered
405 13:52:50.609662 <6>[ 0.577449] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
406 13:52:50.609878 <6>[ 0.577783] io scheduler mq-deadline registered
407 13:52:50.610105 <6>[ 0.577991] io scheduler kyber registered
408 13:52:50.680757 <6>[ 0.648467] pl061_gpio 9030000.pl061: PL061 GPIO chip registered
409 13:52:50.696438 <6>[ 0.664019] pci-host-generic 4010000000.pcie: host bridge /pcie@10000000 ranges:
410 13:52:50.697445 <6>[ 0.664926] pci-host-generic 4010000000.pcie: IO 0x003eff0000..0x003effffff -> 0x0000000000
411 13:52:50.697897 <6>[ 0.665659] pci-host-generic 4010000000.pcie: MEM 0x0010000000..0x003efeffff -> 0x0010000000
412 13:52:50.698079 <6>[ 0.665921] pci-host-generic 4010000000.pcie: MEM 0x8000000000..0xffffffffff -> 0x8000000000
413 13:52:50.698873 <4>[ 0.666559] pci-host-generic 4010000000.pcie: Memory resource size exceeds max for 32 bits
414 13:52:50.699797 <6>[ 0.667214] pci-host-generic 4010000000.pcie: ECAM at [mem 0x4010000000-0x401fffffff] for [bus 00-ff]
415 13:52:50.704880 <6>[ 0.672808] pci-host-generic 4010000000.pcie: PCI host bridge to bus 0000:00
416 13:52:50.705373 <6>[ 0.673184] pci_bus 0000:00: root bus resource [bus 00-ff]
417 13:52:50.705606 <6>[ 0.673398] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
418 13:52:50.705845 <6>[ 0.673598] pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff]
419 13:52:50.705996 <6>[ 0.673760] pci_bus 0000:00: root bus resource [mem 0x8000000000-0xffffffffff]
420 13:52:50.707595 <6>[ 0.675258] pci 0000:00:00.0: [1b36:0008] type 00 class 0x060000
421 13:52:50.715145 <6>[ 0.683014] pci 0000:00:01.0: [1af4:1000] type 00 class 0x020000
422 13:52:50.715607 <6>[ 0.683449] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x001f]
423 13:52:50.716074 <6>[ 0.683670] pci 0000:00:01.0: reg 0x14: [mem 0x00000000-0x00000fff]
424 13:52:50.720425 <6>[ 0.688020] pci 0000:00:01.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
425 13:52:50.720683 <6>[ 0.688319] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x0003ffff pref]
426 13:52:50.721218 <6>[ 0.689051] pci 0000:00:02.0: [1af4:1001] type 00 class 0x010000
427 13:52:50.721474 <6>[ 0.689279] pci 0000:00:02.0: reg 0x10: [io 0x0000-0x007f]
428 13:52:50.721734 <6>[ 0.689472] pci 0000:00:02.0: reg 0x14: [mem 0x00000000-0x00000fff]
429 13:52:50.721940 <6>[ 0.689716] pci 0000:00:02.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
430 13:52:50.728905 <6>[ 0.696602] pci 0000:00:01.0: BAR 6: assigned [mem 0x10000000-0x1003ffff pref]
431 13:52:50.729404 <6>[ 0.697105] pci 0000:00:01.0: BAR 4: assigned [mem 0x8000000000-0x8000003fff 64bit pref]
432 13:52:50.729628 <6>[ 0.697465] pci 0000:00:02.0: BAR 4: assigned [mem 0x8000004000-0x8000007fff 64bit pref]
433 13:52:50.730084 <6>[ 0.697722] pci 0000:00:01.0: BAR 1: assigned [mem 0x10040000-0x10040fff]
434 13:52:50.730284 <6>[ 0.697989] pci 0000:00:02.0: BAR 1: assigned [mem 0x10041000-0x10041fff]
435 13:52:50.730475 <6>[ 0.698231] pci 0000:00:02.0: BAR 0: assigned [io 0x1000-0x107f]
436 13:52:50.730643 <6>[ 0.698447] pci 0000:00:01.0: BAR 0: assigned [io 0x1080-0x109f]
437 13:52:50.749178 <6>[ 0.717137] EINJ: ACPI disabled.
438 13:52:50.845695 <6>[ 0.813234] virtio-pci 0000:00:01.0: enabling device (0000 -> 0003)
439 13:52:50.852446 <6>[ 0.820318] virtio-pci 0000:00:02.0: enabling device (0000 -> 0003)
440 13:52:50.882231 <6>[ 0.850150] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
441 13:52:50.897284 <6>[ 0.865001] SuperH (H)SCI(F) driver initialized
442 13:52:50.898693 <6>[ 0.866417] msm_serial: driver initialized
443 13:52:50.937040 <4>[ 0.904870] cacheinfo: Unable to detect cache hierarchy for CPU 0
444 13:52:50.965778 <6>[ 0.933681] loop: module loaded
445 13:52:50.966829 <6>[ 0.934502] virtio_blk virtio1: 1/0/0 default/read/poll queues
446 13:52:50.982991 <5>[ 0.950659] virtio_blk virtio1: [vda] 1048576 512-byte logical blocks (537 MB/512 MiB)
447 13:52:51.017697 <6>[ 0.985605] megasas: 07.719.03.00-rc1
448 13:52:51.033104 <5>[ 1.000805] physmap-flash 0.flash: physmap platform flash device: [mem 0x00000000-0x03ffffff]
449 13:52:51.034680 <6>[ 1.002331] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
450 13:52:51.035129 <6>[ 1.002956] Intel/Sharp Extended Query Table at 0x0031
451 13:52:51.036018 <6>[ 1.003751] Using buffer write method
452 13:52:51.040347 <7>[ 1.008248] erase region 0: offset=0x0,size=0x40000,blocks=256
453 13:52:51.040790 <5>[ 1.008585] physmap-flash 0.flash: physmap platform flash device: [mem 0x04000000-0x07ffffff]
454 13:52:51.041604 <6>[ 1.009260] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
455 13:52:51.041779 <6>[ 1.009524] Intel/Sharp Extended Query Table at 0x0031
456 13:52:51.042219 <6>[ 1.010057] Using buffer write method
457 13:52:51.042414 <7>[ 1.010162] erase region 0: offset=0x0,size=0x40000,blocks=256
458 13:52:51.042607 <5>[ 1.010332] Concatenating MTD devices:
459 13:52:51.042733 <5>[ 1.010430] (0): \"0.flash\"
460 13:52:51.042851 <5>[ 1.010503] (1): \"0.flash\"
461 13:52:51.042966 <5>[ 1.010581] into device \"0.flash\"
462 13:52:55.664343 <6>[ 5.632079] Freeing initrd memory: 86864K
463 13:52:55.778871 <6>[ 5.746644] tun: Universal TUN/TAP device driver, 1.6
464 13:52:55.788486 <6>[ 5.756379] thunder_xcv, ver 1.0
465 13:52:55.788888 <6>[ 5.756596] thunder_bgx, ver 1.0
466 13:52:55.788995 <6>[ 5.756861] nicpf, ver 1.0
467 13:52:55.792616 <6>[ 5.760308] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
468 13:52:55.792814 <6>[ 5.760500] hns3: Copyright (c) 2017 Huawei Corporation.
469 13:52:55.793010 <6>[ 5.760909] hclge is initializing
470 13:52:55.793211 <6>[ 5.761134] e1000: Intel(R) PRO/1000 Network Driver
471 13:52:55.793383 <6>[ 5.761274] e1000: Copyright (c) 1999-2006 Intel Corporation.
472 13:52:55.793823 <6>[ 5.761558] e1000e: Intel(R) PRO/1000 Network Driver
473 13:52:55.793999 <6>[ 5.761695] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
474 13:52:55.794166 <6>[ 5.761957] igb: Intel(R) Gigabit Ethernet Network Driver
475 13:52:55.794295 <6>[ 5.762088] igb: Copyright (c) 2007-2014 Intel Corporation.
476 13:52:55.794435 <6>[ 5.762333] igbvf: Intel(R) Gigabit Virtual Function Network Driver
477 13:52:55.794582 <6>[ 5.762510] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
478 13:52:55.795665 <6>[ 5.763441] sky2: driver version 1.30
479 13:52:55.799094 <6>[ 5.766817] VFIO - User Level meta-driver version: 0.3
480 13:52:55.808219 <6>[ 5.775924] usbcore: registered new interface driver usb-storage
481 13:52:55.808921 <6>[ 5.776656] usbcore: registered new device driver onboard-usb-hub
482 13:52:55.818380 <6>[ 5.786251] rtc-pl031 9010000.pl031: registered as rtc0
483 13:52:55.819569 <6>[ 5.787009] rtc-pl031 9010000.pl031: setting system clock to 2023-06-14T13:52:55 UTC (1686750775)
484 13:52:55.821785 <6>[ 5.789480] i2c_dev: i2c /dev entries driver
485 13:52:55.839580 <6>[ 5.807432] sdhci: Secure Digital Host Controller Interface driver
486 13:52:55.840153 <6>[ 5.807594] sdhci: Copyright(c) Pierre Ossman
487 13:52:55.841942 <6>[ 5.809616] Synopsys Designware Multimedia Card Interface Driver
488 13:52:55.844488 <6>[ 5.812176] sdhci-pltfm: SDHCI platform and OF driver helper
489 13:52:55.849999 <6>[ 5.817727] ledtrig-cpu: registered to indicate activity on CPUs
490 13:52:55.855744 <6>[ 5.823447] usbcore: registered new interface driver usbhid
491 13:52:55.855908 <6>[ 5.823624] usbhid: USB HID core driver
492 13:52:55.880504 <6>[ 5.848172] NET: Registered PF_PACKET protocol family
493 13:52:55.881497 <6>[ 5.849255] 9pnet: Installing 9P2000 support
494 13:52:55.881684 <5>[ 5.849627] Key type dns_resolver registered
495 13:52:55.883179 <6>[ 5.850951] registered taskstats version 1
496 13:52:55.883559 <5>[ 5.851336] Loading compiled-in X.509 certificates
497 13:52:55.904351 <6>[ 5.872009] input: gpio-keys as /devices/platform/gpio-keys/input/input0
498 13:52:55.910806 <6>[ 5.878794] ALSA device list:
499 13:52:55.911151 <6>[ 5.878945] No soundcards found.
500 13:52:55.913925 <6>[ 5.881695] uart-pl011 9000000.pl011: no DMA platform data
501 13:52:55.970048 <6>[ 5.937889] Freeing unused kernel memory: 8384K
502 13:52:55.971173 <6>[ 5.938868] Run /init as init process
503 13:52:55.971350 <7>[ 5.938997] with arguments:
504 13:52:55.971541 <7>[ 5.939104] /init
505 13:52:55.971725 <7>[ 5.939214] verbose
506 13:52:55.971866 <7>[ 5.939341] with environment:
507 13:52:55.972011 <7>[ 5.939473] HOME=/
508 13:52:55.972155 <7>[ 5.939557] TERM=linux
509 13:52:56.103965 <30>[ 6.071220] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
510 13:52:56.105155 <31>[ 6.072848] systemd[1]: No virtualization found in DMI
511 13:52:56.106093 <31>[ 6.073804] systemd[1]: UML virtualization not found in /proc/cpuinfo.
512 13:52:56.106284 <31>[ 6.074116] systemd[1]: No virtualization found in CPUID
513 13:52:56.106731 <31>[ 6.074396] systemd[1]: Virtualization XEN not found, /proc/xen does not exist
514 13:52:56.107717 <31>[ 6.075433] systemd[1]: Virtualization QEMU: \"fw-cfg\" present in /proc/device-tree/fw-cfg@9020000
515 13:52:56.107933 <31>[ 6.075762] systemd[1]: Found VM virtualization qemu
516 13:52:56.108383 <30>[ 6.076225] systemd[1]: Detected virtualization qemu.
517 13:52:56.108596 <30>[ 6.076557] systemd[1]: Detected architecture arm64.
518 13:52:56.109099 <31>[ 6.076933] systemd[1]: Detected initialized system, this is not the first boot.
519 13:52:56.113031
520 13:52:56.113383 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
521 13:52:56.113494
522 13:52:56.115176 <30>[ 6.082857] systemd[1]: Set hostname to <debian-bullseye-arm64>.
523 13:52:56.134133 <31>[ 6.101780] systemd[1]: Successfully added address 127.0.0.1 to loopback interface
524 13:52:56.135136 <31>[ 6.102876] systemd[1]: Failed to add address ::1 to loopback interface: Operation not supported
525 13:52:56.135388 <31>[ 6.103317] systemd[1]: Successfully brought loopback interface up
526 13:52:56.140372 <31>[ 6.108067] systemd[1]: Setting 'fs/file-max' to '9223372036854775807'.
527 13:52:56.152086 <31>[ 6.119776] systemd[1]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
528 13:52:56.152892 <31>[ 6.120529] systemd[1]: Unified cgroup hierarchy is located at /sys/fs/cgroup.
529 13:52:56.196301 <31>[ 6.163814] systemd[1]: Got EBADF when using BPF_F_ALLOW_MULTI, which indicates it is supported. Yay!
530 13:52:56.197577 <31>[ 6.165223] systemd[1]: Controller 'cpu' supported: yes
531 13:52:56.197773 <31>[ 6.165393] systemd[1]: Controller 'cpuacct' supported: no
532 13:52:56.197964 <31>[ 6.165547] systemd[1]: Controller 'cpuset' supported: yes
533 13:52:56.198129 <31>[ 6.165734] systemd[1]: Controller 'io' supported: yes
534 13:52:56.198305 <31>[ 6.165920] systemd[1]: Controller 'blkio' supported: no
535 13:52:56.198458 <31>[ 6.166093] systemd[1]: Controller 'memory' supported: yes
536 13:52:56.198634 <31>[ 6.166276] systemd[1]: Controller 'devices' supported: no
537 13:52:56.198777 <31>[ 6.166466] systemd[1]: Controller 'pids' supported: yes
538 13:52:56.198936 <31>[ 6.166646] systemd[1]: Controller 'bpf-firewall' supported: yes
539 13:52:56.199067 <31>[ 6.166818] systemd[1]: Controller 'bpf-devices' supported: yes
540 13:52:56.200546 <31>[ 6.168229] systemd[1]: Set up TFD_TIMER_CANCEL_ON_SET timerfd.
541 13:52:56.200794 <31>[ 6.168606] systemd[1]: Failed to stat /etc/localtime, ignoring: No such file or directory
542 13:52:56.201242 <31>[ 6.169119] systemd[1]: /etc/localtime doesn't exist yet, watching /etc instead.
543 13:52:56.207752 <31>[ 6.175409] systemd[1]: Enabling (yes) showing of status (commandline).
544 13:52:56.215874 <31>[ 6.183549] systemd[1]: Successfully forked off '(sd-executor)' as PID 100.
545 13:52:56.225755 <31>[ 6.193399] systemd[100]: Successfully forked off '(direxec)' as PID 101.
546 13:52:56.227691 <31>[ 6.195372] systemd[100]: Successfully forked off '(direxec)' as PID 102.
547 13:52:56.229776 <31>[ 6.197485] systemd[100]: Successfully forked off '(direxec)' as PID 103.
548 13:52:56.231732 <31>[ 6.199462] systemd[100]: Successfully forked off '(direxec)' as PID 104.
549 13:52:56.264972 <31>[ 6.232608] systemd[100]: Successfully forked off '(direxec)' as PID 105.
550 13:52:56.401448 <31>[ 6.369285] systemd-fstab-generator[102]: Parsing /etc/fstab...
551 13:52:56.403700 <31>[ 6.371370] systemd-fstab-generator[102]: Found entry what=/dev/disk/by-uuid/e8944c3c-78ff-4c74-a97d-ff60ed2bed2f where=/ type=ext4 makefs=no growfs=no noauto=no nofail=no
552 13:52:56.405189 <31>[ 6.372873] systemd-bless-boot-generator[101]: Skipping generator, not an EFI boot.
553 13:52:56.412534 <31>[ 6.380281] systemd-getty-generator[103]: Automatically adding serial getty for /dev/ttyAMA0.
554 13:52:56.413930 <31>[ 6.381613] systemd-getty-generator[103]: SELinux enabled state cached to: disabled
555 13:52:56.422493 <31>[ 6.390135] systemd-fstab-generator[102]: Checking was requested for /dev/disk/by-uuid/e8944c3c-78ff-4c74-a97d-ff60ed2bed2f, but fsck.ext4 does not exist.
556 13:52:56.431277 <31>[ 6.398951] systemd[100]: /usr/lib/systemd/system-generators/systemd-veritysetup-generator succeeded.
557 13:52:56.433509 <31>[ 6.401120] systemd-fstab-generator[102]: SELinux enabled state cached to: disabled
558 13:52:56.438983 <31>[ 6.406692] systemd[100]: /usr/lib/systemd/system-generators/systemd-fstab-generator succeeded.
559 13:52:56.439417 <31>[ 6.407211] systemd[100]: /usr/lib/systemd/system-generators/systemd-bless-boot-generator succeeded.
560 13:52:56.439793 <31>[ 6.407576] systemd[100]: /usr/lib/systemd/system-generators/systemd-getty-generator succeeded.
561 13:52:56.440521 <31>[ 6.408232] systemd[100]: /usr/lib/systemd/system-generators/systemd-run-generator succeeded.
562 13:52:56.443209 <31>[ 6.410941] systemd[1]: (sd-executor) succeeded.
563 13:52:56.444867 <31>[ 6.412563] systemd[1]: Looking for unit files in (higher priority first):
564 13:52:56.445079 <31>[ 6.412814] systemd[1]: /etc/systemd/system.control
565 13:52:56.445251 <31>[ 6.413009] systemd[1]: /run/systemd/system.control
566 13:52:56.445435 <31>[ 6.413193] systemd[1]: /run/systemd/transient
567 13:52:56.445615 <31>[ 6.413404] systemd[1]: /run/systemd/generator.early
568 13:52:56.445785 <31>[ 6.413604] systemd[1]: /etc/systemd/system
569 13:52:56.445969 <31>[ 6.413758] systemd[1]: /etc/systemd/system.attached
570 13:52:56.446130 <31>[ 6.413922] systemd[1]: /run/systemd/system
571 13:52:56.446310 <31>[ 6.414094] systemd[1]: /run/systemd/system.attached
572 13:52:56.446472 <31>[ 6.414265] systemd[1]: /run/systemd/generator
573 13:52:56.446656 <31>[ 6.414404] systemd[1]: /usr/local/lib/systemd/system
574 13:52:56.446799 <31>[ 6.414579] systemd[1]: /lib/systemd/system
575 13:52:56.446949 <31>[ 6.414734] systemd[1]: /usr/lib/systemd/system
576 13:52:56.447071 <31>[ 6.414899] systemd[1]: /run/systemd/generator.late
577 13:52:56.483514 <31>[ 6.451121] systemd[1]: Modification times have changed, need to update cache.
578 13:52:56.485421 <31>[ 6.453129] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.timesync1.service → systemd-timesyncd.service
579 13:52:56.486190 <31>[ 6.453922] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.network1.service → systemd-networkd.service
580 13:52:56.486956 <31>[ 6.454655] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.resolve1.service → systemd-resolved.service
581 13:52:56.487979 <31>[ 6.455572] systemd[1]: unit_file_build_name_map: normal unit file: /run/systemd/generator/-.mount
582 13:52:56.489604 <31>[ 6.457239] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/autovt@.service → getty@.service
583 13:52:56.489846 <31>[ 6.457584] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend-then-hibernate.target
584 13:52:56.490462 <31>[ 6.457970] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub@.service
585 13:52:56.490701 <31>[ 6.458392] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hybrid-sleep.target
586 13:52:56.490947 <31>[ 6.458724] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.target
587 13:52:56.491190 <31>[ 6.459057] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/machine.slice
588 13:52:56.491443 <31>[ 6.459312] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/local-fs-pre.target
589 13:52:56.491754 <31>[ 6.459601] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/exit.target
590 13:52:56.492986 <31>[ 6.460633] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel1.target → rescue.target
591 13:52:56.493204 <31>[ 6.460981] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/graphical.target
592 13:52:56.493420 <31>[ 6.461276] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network.target
593 13:52:56.493915 <31>[ 6.461577] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sysinit.target
594 13:52:56.494080 <31>[ 6.461866] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/quotaon.service
595 13:52:56.494234 <31>[ 6.462093] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-cryptsetup.target
596 13:52:56.494999 <31>[ 6.462686] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel4.target → multi-user.target
597 13:52:56.495539 <31>[ 6.463327] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/kmod.service → systemd-modules-load.service
598 13:52:56.496101 <31>[ 6.463684] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/swap.target
599 13:52:56.496615 <31>[ 6.464318] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd.service
600 13:52:56.496841 <31>[ 6.464610] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-boot-system-token.service
601 13:52:56.497433 <31>[ 6.464936] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.timer
602 13:52:56.497640 <31>[ 6.465289] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/console-getty.service
603 13:52:56.498151 <31>[ 6.465675] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-backlight@.service
604 13:52:56.498746 <31>[ 6.466238] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/hwclock.service → /dev/null
605 13:52:56.499292 <31>[ 6.466621] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup.service
606 13:52:56.499479 <31>[ 6.466907] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/blockdev@.target
607 13:52:56.499727 <31>[ 6.467185] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-binfmt.service
608 13:52:56.499915 <31>[ 6.467480] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.target
609 13:52:56.500167 <31>[ 6.467797] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-modules-load.service
610 13:52:56.500709 <31>[ 6.468466] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.service
611 13:52:56.501514 <31>[ 6.469180] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel6.target → reboot.target
612 13:52:56.502385 <31>[ 6.469920] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/ctrl-alt-del.target → reboot.target
613 13:52:56.502611 <31>[ 6.470199] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-kexec.service
614 13:52:56.502858 <31>[ 6.470504] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-volatile-root.service
615 13:52:56.503077 <31>[ 6.470849] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rc-local.service
616 13:52:56.503310 <31>[ 6.471134] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-pre.target
617 13:52:56.503811 <31>[ 6.471461] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.socket
618 13:52:56.503941 <31>[ 6.471749] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kexec.target
619 13:52:56.504606 <31>[ 6.472367] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/usb-gadget.target
620 13:52:56.504975 <31>[ 6.472662] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sleep.target
621 13:52:56.505448 <31>[ 6.472993] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/printer.target
622 13:52:56.505689 <31>[ 6.473325] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/multi-user.target
623 13:52:56.505895 <31>[ 6.473626] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.mount
624 13:52:56.506094 <31>[ 6.473939] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs.target
625 13:52:56.506557 <31>[ 6.474245] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hostnamed.service
626 13:52:56.507032 <31>[ 6.474580] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-remount-fs.service
627 13:52:56.507198 <31>[ 6.474985] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/final.target
628 13:52:56.507678 <31>[ 6.475278] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pstore.service
629 13:52:56.507852 <31>[ 6.475571] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.service
630 13:52:56.508330 <31>[ 6.476117] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.service
631 13:52:56.509108 <31>[ 6.476853] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.login1.service → systemd-logind.service
632 13:52:56.509480 <31>[ 6.477194] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/syslog.socket
633 13:52:56.509855 <31>[ 6.477637] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rcS.service → /dev/null
634 13:52:56.510322 <31>[ 6.477964] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sigpwr.target
635 13:52:56.510444 <31>[ 6.478272] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/local-fs.target
636 13:52:56.510871 <31>[ 6.478549] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-network-generator.service
637 13:52:56.511118 <31>[ 6.478879] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udev-settle.service
638 13:52:56.511625 <31>[ 6.479191] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timesyncd.service
639 13:52:56.511997 <31>[ 6.479813] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel0.target → poweroff.target
640 13:52:56.512848 <31>[ 6.480462] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timedated.service
641 13:52:56.513043 <31>[ 6.480798] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/debug-shell.service
642 13:52:56.513251 <31>[ 6.481044] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.service
643 13:52:56.513783 <31>[ 6.481345] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd-wait-online.service
644 13:52:56.514207 <31>[ 6.482053] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/default.target → graphical.target
645 13:52:56.514647 <31>[ 6.482350] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysctl.service
646 13:52:56.514827 <31>[ 6.482658] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user.slice
647 13:52:56.515199 <31>[ 6.482953] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-fs.target
648 13:52:56.515570 <31>[ 6.483224] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend.service
649 13:52:56.515682 <31>[ 6.483487] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.service
650 13:52:56.516022 <31>[ 6.483806] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.timer
651 13:52:56.516731 <31>[ 6.484469] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-user-sessions.service
652 13:52:56.517129 <31>[ 6.484796] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-systemd\x2dcryptsetup.slice
653 13:52:56.517503 <31>[ 6.485148] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-set.target
654 13:52:56.518113 <31>[ 6.485769] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend-then-hibernate.service
655 13:52:56.518235 <31>[ 6.486101] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/paths.target
656 13:52:56.518585 <31>[ 6.486341] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_fail@.service
657 13:52:56.519235 <31>[ 6.486995] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/procps.service → systemd-sysctl.service
658 13:52:56.519867 <31>[ 6.487484] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks-early.service → /dev/null
659 13:52:56.520758 <31>[ 6.488507] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.timedate1.service → systemd-timedated.service
660 13:52:56.521198 <31>[ 6.488913] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-localed.service
661 13:52:56.521855 <31>[ 6.489610] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel5.target → graphical.target
662 13:52:56.522279 <31>[ 6.489918] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate-resume@.service
663 13:52:56.522407 <31>[ 6.490212] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.path
664 13:52:56.522738 <31>[ 6.490537] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.service
665 13:52:56.523062 <31>[ 6.490816] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/shutdown.target
666 13:52:56.523407 <31>[ 6.491112] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rescue.service
667 13:52:56.523838 <31>[ 6.491399] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-boot-check-no-failures.service
668 13:52:56.524029 <31>[ 6.491754] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.automount
669 13:52:56.524785 <31>[ 6.492377] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-reboot.service
670 13:52:56.524986 <31>[ 6.492688] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/bluetooth.target
671 13:52:56.525175 <31>[ 6.492955] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-halt.service
672 13:52:56.525749 <31>[ 6.493194] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-time-wait-sync.service
673 13:52:56.525928 <31>[ 6.493454] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-exit.service
674 13:52:56.526080 <31>[ 6.493752] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-fsckd.service
675 13:52:56.526623 <31>[ 6.494224] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-udevadm-cleanup-db.service
676 13:52:56.526821 <31>[ 6.494543] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/timers.target
677 13:52:56.526994 <31>[ 6.494779] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rpcbind.target
678 13:52:56.527177 <31>[ 6.495044] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.socket
679 13:52:56.527627 <31>[ 6.495321] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.service
680 13:52:56.528001 <31>[ 6.495632] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.path
681 13:52:56.528613 <31>[ 6.496372] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-fs.target
682 13:52:56.529353 <31>[ 6.497091] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/x11-common.service → /dev/null
683 13:52:56.529740 <31>[ 6.497386] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.service
684 13:52:56.530110 <31>[ 6.497915] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rc.service → /dev/null
685 13:52:56.530471 <31>[ 6.498255] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-hugepages.mount
686 13:52:56.530821 <31>[ 6.498566] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-sync.target
687 13:52:56.531177 <31>[ 6.498871] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/nss-user-lookup.target
688 13:52:56.531534 <31>[ 6.499197] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journal-flush.service
689 13:52:56.531901 <31>[ 6.499535] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-control.socket
690 13:52:56.532595 <31>[ 6.500341] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.socket
691 13:52:56.533021 <31>[ 6.500641] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user@.service
692 13:52:56.533391 <31>[ 6.500995] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-audit.socket
693 13:52:56.533747 <31>[ 6.501374] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-poweroff.service
694 13:52:56.534104 <31>[ 6.501725] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-random-seed.service
695 13:52:56.534462 <31>[ 6.502073] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/first-boot-complete.target
696 13:52:56.534580 <31>[ 6.502392] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_reap.service
697 13:52:56.535188 <31>[ 6.502750] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup-dev.service
698 13:52:56.535311 <31>[ 6.503124] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty.target
699 13:52:56.535667 <31>[ 6.503422] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.timer
700 13:52:56.536034 <31>[ 6.503765] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/reboot.target
701 13:52:56.537294 <31>[ 6.505018] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/udev.service → systemd-udevd.service
702 13:52:56.537680 <31>[ 6.505371] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd.target
703 13:52:56.538097 <31>[ 6.505707] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-mqueue.mount
704 13:52:56.538471 <31>[ 6.506099] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hibernate.target
705 13:52:56.538847 <31>[ 6.506441] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/poweroff.target
706 13:52:56.539221 <31>[ 6.506765] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs-pre.target
707 13:52:56.539337 <31>[ 6.507145] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-config.mount
708 13:52:56.539692 <31>[ 6.507506] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/halt.target
709 13:52:56.540424 <31>[ 6.508130] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.service
710 13:52:56.540777 <31>[ 6.508529] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/slices.target
711 13:52:56.541106 <31>[ 6.508885] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/container-getty@.service
712 13:52:56.541432 <31>[ 6.509231] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup.target
713 13:52:56.541739 <31>[ 6.509519] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-dev-log.socket
714 13:52:56.542070 <31>[ 6.509866] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udev-trigger.service
715 13:52:56.542375 <31>[ 6.510165] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty@.service
716 13:52:56.542681 <31>[ 6.510473] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-machine-id-commit.service
717 13:52:56.542978 <31>[ 6.510786] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-cleanup.service
718 13:52:56.543830 <31>[ 6.511565] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel3.target → multi-user.target
719 13:52:56.544435 <31>[ 6.512200] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd.service
720 13:52:56.544818 <31>[ 6.512501] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-debug.mount
721 13:52:56.545271 <31>[ 6.512824] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.service
722 13:52:56.545459 <31>[ 6.513141] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-pre.target
723 13:52:56.545622 <31>[ 6.513383] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/smartcard.target
724 13:52:56.545817 <31>[ 6.513663] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/modprobe@.service
725 13:52:56.546321 <31>[ 6.513995] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update.target
726 13:52:56.546533 <31>[ 6.514317] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.socket
727 13:52:56.547099 <31>[ 6.514630] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp-runlevel.service
728 13:52:56.547310 <31>[ 6.514979] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-static.service
729 13:52:56.968913 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
730 13:52:56.973612 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
731 13:52:56.977260 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
732 13:52:56.980802 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
733 13:52:56.984480 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
734 13:52:56.985902 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
735 13:52:56.988263 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
736 13:52:56.989419 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
737 13:52:56.990208 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
738 13:52:56.990931 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
739 13:52:56.991737 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
740 13:52:56.995357 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
741 13:52:56.999298 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
742 13:52:57.002055 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
743 13:52:57.004427 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
744 13:52:57.006766 [[0;32m OK [0m] Listening on [0;1;39mNetwork Service Netlink Socket[0m.
745 13:52:57.009683 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
746 13:52:57.011455 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
747 13:52:57.038095 Mounting [0;1;39mHuge Pages File System[0m...
748 13:52:57.061257 Mounting [0;1;39mPOSIX Message Queue File System[0m...
749 13:52:57.097243 Mounting [0;1;39mKernel Debug File System[0m...
750 13:52:57.146099 Starting [0;1;39mLoad Kernel Module configfs[0m...
751 13:52:57.197441 Starting [0;1;39mLoad Kernel Module drm[0m...
752 13:52:57.253626 Starting [0;1;39mJournal Service[0m...
753 13:52:57.285761 Starting [0;1;39mLoad Kernel Modules[0m...
754 13:52:57.325459 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
755 13:52:57.377404 Starting [0;1;39mColdplug All udev Devices[0m...
756 13:52:57.470507 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
757 13:52:57.478382 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
758 13:52:57.490989 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
759 13:52:57.537289 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
760 13:52:57.589088 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
761 13:52:57.615044 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
762 13:52:57.677527 Mounting [0;1;39mKernel Configuration File System[0m...
763 13:52:57.785532 Starting [0;1;39mApply Kernel Variables[0m...
764 13:52:57.866489 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
765 13:52:57.894793 <47>[ 7.862359] systemd-journald[111]: SELinux enabled state cached to: disabled
766 13:52:57.896063 <47>[ 7.863775] systemd-journald[111]: Auditing in kernel turned off.
767 13:52:57.932531 <47>[ 7.900323] systemd-journald[111]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
768 13:52:57.981975 <47>[ 7.949416] systemd-journald[111]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
769 13:52:57.996601 <47>[ 7.964250] systemd-journald[111]: Fixed min_use=3.8M max_use=19.3M max_size=2.4M min_size=512.0K keep_free=9.6M n_max_files=100
770 13:52:57.998256 <47>[ 7.965971] systemd-journald[111]: Reserving 333 entries in field hash table.
771 13:52:58.009461 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
772 13:52:58.013350 See 'systemctl status systemd-remount-fs.service' for details.
773 13:52:58.033283 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
774 13:52:58.037219 <47>[ 8.004794] systemd-journald[111]: Reserving 4394 entries in data hash table.
775 13:52:58.038992 <47>[ 8.006648] systemd-journald[111]: Vacuuming...
776 13:52:58.039784 <47>[ 8.007409] systemd-journald[111]: Vacuuming done, freed 0B of archived journals from /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5.
777 13:52:58.048711 <47>[ 8.016592] systemd-journald[111]: Flushing /dev/kmsg...
778 13:52:58.081681 Starting [0;1;39mLoad/Save Random Seed[0m...
779 13:52:58.133449 Starting [0;1;39mCreate System Users[0m...
780 13:52:58.277603 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
781 13:52:58.449939 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
782 13:52:58.477996 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
783 13:52:58.566485 <47>[ 8.534310] systemd-journald[111]: systemd-journald running as PID 111 for the system.
784 13:52:58.580981 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
785 13:52:58.584606 <47>[ 8.552281] systemd-journald[111]: Sent READY=1 notification.
786 13:52:58.584817 <47>[ 8.552697] systemd-journald[111]: Sent WATCHDOG=1 notification.
787 13:52:58.619380 <47>[ 8.586924] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
788 13:52:58.637870 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
789 13:52:58.652622 <47>[ 8.620259] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
790 13:52:58.655144 <47>[ 8.622810] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
791 13:52:58.674836 <47>[ 8.642455] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
792 13:52:58.690499 <47>[ 8.658126] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
793 13:52:58.706441 <47>[ 8.674242] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
794 13:52:58.720995 <47>[ 8.688633] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
795 13:52:58.748833 <47>[ 8.716655] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
796 13:52:58.758322 <47>[ 8.725995] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
797 13:52:58.759935 <47>[ 8.727699] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
798 13:52:58.761428 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
799 13:52:58.771412 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
800 13:52:58.778285 <47>[ 8.746018] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
801 13:52:58.780060 <47>[ 8.747765] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
802 13:52:58.785280 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
803 13:52:58.794953 <47>[ 8.762629] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
804 13:52:58.808794 <47>[ 8.776715] systemd-journald[111]: n/a: New incoming connection.
805 13:52:58.809572 <47>[ 8.777309] systemd-journald[111]: varlink-21: varlink: setting state idle-server
806 13:52:58.826149 <47>[ 8.793741] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
807 13:52:58.826772 <47>[ 8.794393] systemd-journald[111]: varlink-21: New incoming message: {\"method\":\"io.systemd.Journal.FlushToVar\",\"parameters\":{}}
808 13:52:58.833269 <47>[ 8.800886] systemd-journald[111]: varlink-21: varlink: changing state idle-server → processing-method
809 13:52:58.833524 <46>[ 8.801303] systemd-journald[111]: Received client request to flush runtime journal.
810 13:52:58.834018 <47>[ 8.801789] systemd-journald[111]: Journal effective settings seal=yes keyed_hash=no compress=yes compress_threshold_bytes=512B
811 13:52:58.834952 <47>[ 8.802648] systemd-journald[111]: Vacuuming...
812 13:52:58.835468 <47>[ 8.803095] systemd-journald[111]: Vacuuming done, freed 0B of archived journals from /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5.
813 13:52:58.845125 <47>[ 8.812693] systemd-journald[111]: varlink-21: Sending message: {\"parameters\":{}}
814 13:52:58.845368 <47>[ 8.813001] systemd-journald[111]: varlink-21: varlink: changing state processing-method → processed-method
815 13:52:58.845555 <47>[ 8.813388] systemd-journald[111]: varlink-21: varlink: changing state processed-method → idle-server
816 13:52:58.859295 <47>[ 8.826955] systemd-journald[111]: varlink-21: varlink: changing state idle-server → pending-disconnect
817 13:52:58.859724 <47>[ 8.827356] systemd-journald[111]: varlink-21: varlink: changing state pending-disconnect → processing-disconnect
818 13:52:58.860101 <47>[ 8.827761] systemd-journald[111]: varlink-21: varlink: changing state processing-disconnect → disconnected
819 13:52:58.866841 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
820 13:52:58.876035 <47>[ 8.843530] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
821 13:52:58.913125 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
822 13:52:58.974079 Starting [0;1;39mCreate Volatile Files and Directories[0m...
823 13:52:58.982594 <47>[ 8.950177] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
824 13:52:59.431289 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
825 13:52:59.514400 Starting [0;1;39mNetwork Service[0m...
826 13:52:59.538468 <47>[ 9.506003] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
827 13:52:59.542031 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
828 13:52:59.622615 Starting [0;1;39mNetwork Time Synchronization[0m...
829 13:52:59.650811 <47>[ 9.618329] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
830 13:52:59.693782 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
831 13:52:59.724574 <47>[ 9.692123] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
832 13:53:00.093006 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
833 13:53:00.898817 <47>[ 10.866274] systemd-journald[111]: Data hash table of /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal has a fill level at 75.0 (3297 of 4394 items, 2531328 file size, 767 bytes per hash table item), suggesting rotation.
834 13:53:00.899338 <47>[ 10.866840] systemd-journald[111]: /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal: Journal header limits reached or header out-of-date, rotating.
835 13:53:00.899463 <47>[ 10.867352] systemd-journald[111]: Rotating...
836 13:53:00.913216 <47>[ 10.880719] systemd-journald[111]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
837 13:53:00.914636 <47>[ 10.882314] systemd-journald[111]: Reserving 333 entries in field hash table.
838 13:53:00.951453 <47>[ 10.919201] systemd-journald[111]: Reserving 4394 entries in data hash table.
839 13:53:00.967112 <47>[ 10.934940] systemd-journald[111]: Vacuuming...
840 13:53:00.990053 <47>[ 10.957503] systemd-journald[111]: Vacuuming done, freed 0B of archived journals from /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5.
841 13:53:00.997062 [[0;32m OK [0m] Started [0;1;39mNetwork Service[0m.
842 13:53:01.078192 Starting [0;1;39mNetwork Name Resolution[0m...
843 13:53:01.128728 <47>[ 11.096228] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
844 13:53:01.365896 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
845 13:53:01.367756 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
846 13:53:01.377224 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
847 13:53:02.072777 <47>[ 12.040124] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
848 13:53:03.061707 [[0;32m OK [0m] Started [0;1;39mNetwork Name Resolution[0m.
849 13:53:03.065494 [[0;32m OK [0m] Reached target [0;1;39mNetwork[0m.
850 13:53:03.068430 [[0;32m OK [0m] Reached target [0;1;39mHost and Network Name Lookups[0m.
851 13:53:03.115898 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
852 13:53:03.122887 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
853 13:53:03.139337 [[0;32m OK [0m] Started [0;1;39mPeriodic ext4 Onli…ata Check for All Filesystems[0m.
854 13:53:03.152561 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
855 13:53:03.159046 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
856 13:53:03.163303 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
857 13:53:03.191427 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
858 13:53:03.197673 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
859 13:53:03.201125 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
860 13:53:03.269353 <47>[ 13.237124] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
861 13:53:03.275847 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
862 13:53:03.413384 <47>[ 13.381117] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
863 13:53:03.414493 Starting [0;1;39mRemove Stale Onli…t4 Metadata Check Snapshots[0m...
864 13:53:03.618675 Starting [0;1;39mUser Login Management[0m...
865 13:53:03.633971 <47>[ 13.601507] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
866 13:53:03.674504 Starting [0;1;39mPermit User Sessions[0m...
867 13:53:03.702395 <47>[ 13.669907] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
868 13:53:03.952757 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
869 13:53:04.022299 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
870 13:53:04.264509 [[0;32m OK [0m] Finished [0;1;39mRemove Stale Onli…ext4 Metadata Check Snapshots[0m.
871 13:53:04.650920 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
872 13:53:06.907367 [[0m[0;31m* [0m] A start job is running for /dev/ttyAMA0 (9s / 1min 30s)
873 13:53:07.007725 M[K[[0;32m OK [0m] Found device [0;1;39m/dev/ttyAMA0[0m.
874 13:53:07.077786 [K[[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyAMA0[0m.
875 13:53:07.097170 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
876 13:53:07.109996 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
877 13:53:07.125001 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
878 13:53:07.169032 <47>[ 17.136802] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
879 13:53:07.182958 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
880 13:53:07.371226 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
881 13:53:07.405747 <47>[ 17.373537] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
882 13:53:07.418943 <47>[ 17.386517] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
883 13:53:07.493156
884 13:53:07.493771 Debian GNU/Linux 11 debian-bullseye-arm64 ttyAMA0
885 13:53:07.493933
886 13:53:07.494095 debian-bullseye-arm64 login: root (automatic login)
887 13:53:07.494252
888 13:53:07.580680 <6>[ 17.548471] virtio_net virtio0 enp0s1: renamed from eth0
889 13:53:07.768675 Linux debian-bullseye-arm64 6.1.31 #1 SMP PREEMPT Wed Jun 14 12:30:40 UTC 2023 aarch64
890 13:53:07.769365
891 13:53:07.769812 The programs included with the Debian GNU/Linux system are free software;
892 13:53:07.770001 the exact distribution terms for each program are described in the
893 13:53:07.770179 individual files in /usr/share/doc/*/copyright.
894 13:53:07.770375
895 13:53:07.770556 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
896 13:53:07.770718 permitted by applicable law.
897 13:53:08.317440 <47>[ 18.285174] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
898 13:53:08.348370 <47>[ 18.315720] systemd-journald[111]: Data hash table of /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal has a fill level at 75.0 (3296 of 4394 items, 2531328 file size, 768 bytes per hash table item), suggesting rotation.
899 13:53:08.355617 <47>[ 18.323226] systemd-journald[111]: /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal: Journal header limits reached or header out-of-date, rotating.
900 13:53:08.355853 <47>[ 18.323610] systemd-journald[111]: Rotating...
901 13:53:08.357706 <47>[ 18.325332] systemd-journald[111]: Reserving 333 entries in field hash table.
902 13:53:08.383396 <47>[ 18.351249] systemd-journald[111]: Reserving 4394 entries in data hash table.
903 13:53:08.394864 <47>[ 18.362725] systemd-journald[111]: Vacuuming...
904 13:53:08.404852 <47>[ 18.372409] systemd-journald[111]: Vacuuming done, freed 0B of archived journals from /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5.
905 13:53:08.575334 <47>[ 18.542834] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
906 13:53:10.247136 <47>[ 20.214879] systemd-journald[111]: Successfully sent stream file descriptor to service manager.
907 13:53:10.697157 Matched prompt #10: / #
909 13:53:10.697707 Setting prompt string to ['/ #']
910 13:53:10.697889 end: 2.2.1 login-action (duration 00:00:21) [common]
912 13:53:10.698291 end: 2.2 auto-login-action (duration 00:00:23) [common]
913 13:53:10.698508 start: 2.3 expect-shell-connection (timeout 00:04:35) [common]
914 13:53:10.698714 Setting prompt string to ['/ #']
915 13:53:10.698895 Forcing a shell prompt, looking for ['/ #']
917 13:53:10.749438 / #
918 13:53:10.749634 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
919 13:53:10.749822 Waiting using forced prompt support (timeout 00:02:30)
920 13:53:10.751248
921 13:53:10.755666 end: 2.3 expect-shell-connection (duration 00:00:00) [common]
922 13:53:10.755843 start: 2.4 export-device-env (timeout 00:04:35) [common]
923 13:53:10.756007 end: 2.4 export-device-env (duration 00:00:00) [common]
924 13:53:10.756161 end: 2 boot-image-retry (duration 00:00:25) [common]
925 13:53:10.756316 start: 3 lava-test-retry (timeout 00:08:48) [common]
926 13:53:10.756471 start: 3.1 lava-test-shell (timeout 00:08:48) [common]
927 13:53:10.756604 Using namespace: common
929 13:53:10.857485 / # #
930 13:53:10.857896 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
931 13:53:10.858647 #
933 13:53:10.971599 / # mkdir /lava-610605
934 13:53:10.972448 mkdir /lava-610605
936 13:53:11.102616 / # mount /dev/disk/by-uuid/0531155e-d7b4-49c9-bfee-cc04d5601fa3 -t ext2 /lava-610605
937 13:53:11.103464 mount /dev/disk/by-uuid/0531155e-d7b4-49c9-bfee-cc04d5601fa3 -t ext2 /lava-610605
938 13:53:11.141254 <4>[ 21.108851] ext2 filesystem being mounted at /lava-610605 supports timestamps until 2038 (0x7fffffff)
940 13:53:11.288404 / # ls -la /lava-610605/bin/lava-test-runner
941 13:53:11.289124 ls -la /lava-610605/bin/lava-test-runner
942 13:53:11.326253 -rwxr-xr-x 1 root root 1039 Jun 14 13:51 /lava-610605/bin/lava-test-runner
943 13:53:11.337494 Using /lava-610605
945 13:53:11.438416 / # export SHELL=/bin/sh
946 13:53:11.439219 export SHELL=/bin/sh
948 13:53:11.546877 / # . /lava-610605/environment
949 13:53:11.547627 . /lava-610605/environment
951 13:53:11.658384 / # /lava-610605/bin/lava-test-runner /lava-610605/0
952 13:53:11.658697 Test shell timeout: 10s (minimum of the action and connection timeout)
953 13:53:11.659377 /lava-610605/bin/lava-test-runner /lava-610605/0
954 13:53:11.817009 + export TESTRUN_ID=0_timesync-off
955 13:53:11.817352 + cd /lava-610605/0/tests/0_timesync-off
956 13:53:11.819051 + cat uuid
957 13:53:11.827366 + UUID=610605_1.1.3.1
958 13:53:11.827582 + set +x
959 13:53:11.828224 <LAVA_SIGNAL_STARTRUN 0_timesync-off 610605_1.1.3.1>
960 13:53:11.828457 + systemctl stop systemd-timesyncd
961 13:53:11.828808 Received signal: <STARTRUN> 0_timesync-off 610605_1.1.3.1
962 13:53:11.828957 Starting test lava.0_timesync-off (610605_1.1.3.1)
963 13:53:11.829123 Skipping test definition patterns.
964 13:53:12.072857 + set +x
965 13:53:12.073363 <LAVA_SIGNAL_ENDRUN 0_timesync-off 610605_1.1.3.1>
966 13:53:12.073791 Received signal: <ENDRUN> 0_timesync-off 610605_1.1.3.1
967 13:53:12.074020 Ending use of test pattern.
968 13:53:12.074190 Ending test lava.0_timesync-off (610605_1.1.3.1), duration 0.25
970 13:53:12.119927 + export TESTRUN_ID=1_kselftest-arm64_qemu
971 13:53:12.120186 + cd /lava-610605/0/tests/1_kselftest-arm64_qemu
972 13:53:12.122213 + cat uuid
973 13:53:12.130391 + UUID=610605_1.1.3.5
974 13:53:12.130629 + set +x
975 13:53:12.130789 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64_qemu 610605_1.1.3.5>
976 13:53:12.130895 + cd ./automated/linux/kselftest/
977 13:53:12.131184 Received signal: <STARTRUN> 1_kselftest-arm64_qemu 610605_1.1.3.5
978 13:53:12.131311 Starting test lava.1_kselftest-arm64_qemu (610605_1.1.3.5)
979 13:53:12.131437 Skipping test definition patterns.
980 13:53:12.134969 + ./kselftest.sh -c arm64 -T -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-46-g4cc1cc26e90f/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L -S /dev/null -b qemu_arm64-virt-gicv3 -g cip -e -p /opt/kselftests/mainline/ -n 1 -i 1
981 13:53:12.229316 INFO: install_deps skipped
982 13:53:12.261907 --2023-06-14 13:53:11-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-46-g4cc1cc26e90f/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
983 13:53:12.416672 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
984 13:53:12.616391 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
985 13:53:12.802075 HTTP request sent, awaiting response... 200 OK
986 13:53:12.804567 Length: 2878416 (2.7M) [application/octet-stream]
987 13:53:12.805909 Saving to: 'kselftest.tar.xz'
988 13:53:12.807059
989 13:53:14.082025 kselftest.tar.xz 0%[ ] 0 --.-KB/s kselftest.tar.xz 1%[ ] 50.15K 148KB/s kselftest.tar.xz 7%[> ] 219.84K 317KB/s kselftest.tar.xz 31%[=====> ] 898.59K 857KB/s kselftest.tar.xz 65%[============> ] 1.81M 1.45MB/s kselftest.tar.xz 100%[===================>] 2.74M 2.09MB/s in 1.3s
990 13:53:14.082249
991 13:53:14.090959 2023-06-14 13:53:13 (2.09 MB/s) - 'kselftest.tar.xz' saved [2878416/2878416]
992 13:53:14.091116
993 13:53:17.112134 skiplist:
994 13:53:17.112565 ========================================
995 13:53:17.112961 ========================================
996 13:53:17.163864 arm64:tags_test
997 13:53:17.164217 arm64:run_tags_test.sh
998 13:53:17.164677 arm64:fake_sigreturn_bad_magic
999 13:53:17.164846 arm64:fake_sigreturn_bad_size
1000 13:53:17.164977 arm64:fake_sigreturn_bad_size_for_magic0
1001 13:53:17.165107 arm64:fake_sigreturn_duplicated_fpsimd
1002 13:53:17.165254 arm64:fake_sigreturn_misaligned_sp
1003 13:53:17.165455 arm64:fake_sigreturn_missing_fpsimd
1004 13:53:17.165608 arm64:fake_sigreturn_sme_change_vl
1005 13:53:17.165780 arm64:fake_sigreturn_sve_change_vl
1006 13:53:17.165946 arm64:mangle_pstate_invalid_compat_toggle
1007 13:53:17.166150 arm64:mangle_pstate_invalid_daif_bits
1008 13:53:17.166373 arm64:mangle_pstate_invalid_mode_el1h
1009 13:53:17.166527 arm64:mangle_pstate_invalid_mode_el1t
1010 13:53:17.166660 arm64:mangle_pstate_invalid_mode_el2h
1011 13:53:17.166787 arm64:mangle_pstate_invalid_mode_el2t
1012 13:53:17.166911 arm64:mangle_pstate_invalid_mode_el3h
1013 13:53:17.167036 arm64:mangle_pstate_invalid_mode_el3t
1014 13:53:17.167153 arm64:sme_trap_no_sm
1015 13:53:17.167271 arm64:sme_trap_non_streaming
1016 13:53:17.167386 arm64:sme_trap_za
1017 13:53:17.167500 arm64:sme_vl
1018 13:53:17.167614 arm64:ssve_regs
1019 13:53:17.167728 arm64:sve_regs
1020 13:53:17.167840 arm64:sve_vl
1021 13:53:17.167954 arm64:za_no_regs
1022 13:53:17.168067 arm64:za_regs
1023 13:53:17.168179 arm64:pac
1024 13:53:17.168297 arm64:fp-stress
1025 13:53:17.168422 arm64:sve-ptrace
1026 13:53:17.168539 arm64:sve-probe-vls
1027 13:53:17.168654 arm64:vec-syscfg
1028 13:53:17.168766 arm64:za-fork
1029 13:53:17.168910 arm64:za-ptrace
1030 13:53:17.169027 arm64:check_buffer_fill
1031 13:53:17.169140 arm64:check_child_memory
1032 13:53:17.169252 arm64:check_gcr_el1_cswitch
1033 13:53:17.169368 arm64:check_ksm_options
1034 13:53:17.169480 arm64:check_mmap_options
1035 13:53:17.169593 arm64:check_prctl
1036 13:53:17.169717 arm64:check_tags_inclusion
1037 13:53:17.169832 arm64:check_user_mem
1038 13:53:17.169944 arm64:btitest
1039 13:53:17.170057 arm64:nobtitest
1040 13:53:17.170168 arm64:hwcap
1041 13:53:17.170284 arm64:ptrace
1042 13:53:17.170397 arm64:syscall-abi
1043 13:53:17.170510 arm64:tpidr2
1044 13:53:17.180330 ============== Tests to run ===============
1045 13:53:17.183380 arm64:tags_test
1046 13:53:17.183582 arm64:run_tags_test.sh
1047 13:53:17.183969 arm64:fake_sigreturn_bad_magic
1048 13:53:17.184159 arm64:fake_sigreturn_bad_size
1049 13:53:17.184290 arm64:fake_sigreturn_bad_size_for_magic0
1050 13:53:17.184410 arm64:fake_sigreturn_duplicated_fpsimd
1051 13:53:17.184527 arm64:fake_sigreturn_misaligned_sp
1052 13:53:17.184651 arm64:fake_sigreturn_missing_fpsimd
1053 13:53:17.184838 arm64:fake_sigreturn_sme_change_vl
1054 13:53:17.185034 arm64:fake_sigreturn_sve_change_vl
1055 13:53:17.185256 arm64:mangle_pstate_invalid_compat_toggle
1056 13:53:17.185436 arm64:mangle_pstate_invalid_daif_bits
1057 13:53:17.185599 arm64:mangle_pstate_invalid_mode_el1h
1058 13:53:17.185777 arm64:mangle_pstate_invalid_mode_el1t
1059 13:53:17.185953 arm64:mangle_pstate_invalid_mode_el2h
1060 13:53:17.186112 arm64:mangle_pstate_invalid_mode_el2t
1061 13:53:17.186298 arm64:mangle_pstate_invalid_mode_el3h
1062 13:53:17.186439 arm64:mangle_pstate_invalid_mode_el3t
1063 13:53:17.186557 arm64:sme_trap_no_sm
1064 13:53:17.186671 arm64:sme_trap_non_streaming
1065 13:53:17.186785 arm64:sme_trap_za
1066 13:53:17.186931 arm64:sme_vl
1067 13:53:17.187057 arm64:ssve_regs
1068 13:53:17.187172 arm64:sve_regs
1069 13:53:17.187286 arm64:sve_vl
1070 13:53:17.187401 arm64:za_no_regs
1071 13:53:17.187513 arm64:za_regs
1072 13:53:17.187624 arm64:pac
1073 13:53:17.187735 arm64:fp-stress
1074 13:53:17.187849 arm64:sve-ptrace
1075 13:53:17.187961 arm64:sve-probe-vls
1076 13:53:17.188074 arm64:vec-syscfg
1077 13:53:17.188186 arm64:za-fork
1078 13:53:17.188298 arm64:za-ptrace
1079 13:53:17.188409 arm64:check_buffer_fill
1080 13:53:17.188522 arm64:check_child_memory
1081 13:53:17.188648 arm64:check_gcr_el1_cswitch
1082 13:53:17.188792 arm64:check_ksm_options
1083 13:53:17.188909 arm64:check_mmap_options
1084 13:53:17.189023 arm64:check_prctl
1085 13:53:17.189164 arm64:check_tags_inclusion
1086 13:53:17.189292 arm64:check_user_mem
1087 13:53:17.189410 arm64:btitest
1088 13:53:17.189525 arm64:nobtitest
1089 13:53:17.189640 arm64:hwcap
1090 13:53:17.189768 arm64:ptrace
1091 13:53:17.189883 arm64:syscall-abi
1092 13:53:17.189997 arm64:tpidr2
1093 13:53:17.190111 ===========End Tests to run ===============
1094 13:53:18.089034 <12>[ 28.056812] kselftest: Running tests in arm64
1095 13:53:18.116667 TAP version 13
1096 13:53:18.133559 1..48
1097 13:53:18.180890 # selftests: arm64: tags_test
1098 13:53:18.233031 ok 1 selftests: arm64: tags_test
1099 13:53:18.279737 # selftests: arm64: run_tags_test.sh
1100 13:53:18.329099 # --------------------
1101 13:53:18.329367 # running tags test
1102 13:53:18.329497 # --------------------
1103 13:53:18.329615 # [PASS]
1104 13:53:18.336404 ok 2 selftests: arm64: run_tags_test.sh
1105 13:53:18.382338 # selftests: arm64: fake_sigreturn_bad_magic
1106 13:53:18.432455 # Registered handlers for all signals.
1107 13:53:18.432938 # Detected MINSTKSIGSZ:10000
1108 13:53:18.433065 # Testcase initialized.
1109 13:53:18.433159 # uc context validated.
1110 13:53:18.433245 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1111 13:53:18.433330 # Handled SIG_COPYCTX
1112 13:53:18.433414 # Available space:3536
1113 13:53:18.433517 # Using badly built context - ERR: BAD MAGIC !
1114 13:53:18.433605 # SIG_OK -- SP:0xFFFFFDFDFD80 si_addr@:0xfffffdfdfd80 si_code:2 token@:0xfffffdfdeb20 offset:-4704
1115 13:53:18.433700 # ==>> completed. PASS(1)
1116 13:53:18.433801 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
1117 13:53:18.433903 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFFDFDEB20
1118 13:53:18.441722 ok 3 selftests: arm64: fake_sigreturn_bad_magic
1119 13:53:18.487528 # selftests: arm64: fake_sigreturn_bad_size
1120 13:53:18.535636 # Registered handlers for all signals.
1121 13:53:18.535986 # Detected MINSTKSIGSZ:10000
1122 13:53:18.536457 # Testcase initialized.
1123 13:53:18.536662 # uc context validated.
1124 13:53:18.536849 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1125 13:53:18.537002 # Handled SIG_COPYCTX
1126 13:53:18.537123 # Available space:3536
1127 13:53:18.537239 # uc context validated.
1128 13:53:18.537356 # Using badly built context - ERR: Bad size for esr_context
1129 13:53:18.537472 # SIG_OK -- SP:0xFFFFD3320D80 si_addr@:0xffffd3320d80 si_code:2 token@:0xffffd331fb20 offset:-4704
1130 13:53:18.537590 # ==>> completed. PASS(1)
1131 13:53:18.537799 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
1132 13:53:18.537939 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD331FB20
1133 13:53:18.544462 ok 4 selftests: arm64: fake_sigreturn_bad_size
1134 13:53:18.591005 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
1135 13:53:18.638563 # Registered handlers for all signals.
1136 13:53:18.639292 # Detected MINSTKSIGSZ:10000
1137 13:53:18.639459 # Testcase initialized.
1138 13:53:18.639631 # uc context validated.
1139 13:53:18.639780 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1140 13:53:18.639923 # Handled SIG_COPYCTX
1141 13:53:18.640066 # Available space:3536
1142 13:53:18.640207 # Using badly built context - ERR: Bad size for terminator
1143 13:53:18.640381 # SIG_OK -- SP:0xFFFFD4744760 si_addr@:0xffffd4744760 si_code:2 token@:0xffffd4743500 offset:-4704
1144 13:53:18.640906 # ==>> completed. PASS(1)
1145 13:53:18.641323 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
1146 13:53:18.641483 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD4743500
1147 13:53:18.648333 ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0
1148 13:53:18.694066 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
1149 13:53:18.742177 # Registered handlers for all signals.
1150 13:53:18.742493 # Detected MINSTKSIGSZ:10000
1151 13:53:18.742882 # Testcase initialized.
1152 13:53:18.743042 # uc context validated.
1153 13:53:18.743192 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1154 13:53:18.743337 # Handled SIG_COPYCTX
1155 13:53:18.743479 # Available space:3536
1156 13:53:18.743618 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
1157 13:53:18.743759 # SIG_OK -- SP:0xFFFFEFE907C0 si_addr@:0xffffefe907c0 si_code:2 token@:0xffffefe8f560 offset:-4704
1158 13:53:18.743936 # ==>> completed. PASS(1)
1159 13:53:18.744071 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
1160 13:53:18.744213 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFEFE8F560
1161 13:53:18.751390 ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd
1162 13:53:18.796192 # selftests: arm64: fake_sigreturn_misaligned_sp
1163 13:53:18.844026 # Registered handlers for all signals.
1164 13:53:18.844293 # Detected MINSTKSIGSZ:10000
1165 13:53:18.844698 # Testcase initialized.
1166 13:53:18.846868 # uc context validated.
1167 13:53:18.847264 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1168 13:53:18.847373 # Handled SIG_COPYCTX
1169 13:53:18.847514 # SIG_OK -- SP:0xFFFFF23753B3 si_addr@:0xfffff23753b3 si_code:2 token@:0xfffff23753b3 offset:0
1170 13:53:18.847694 # ==>> completed. PASS(1)
1171 13:53:18.847915 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
1172 13:53:18.854353 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF23753B3
1173 13:53:18.854793 ok 7 selftests: arm64: fake_sigreturn_misaligned_sp
1174 13:53:18.899047 # selftests: arm64: fake_sigreturn_missing_fpsimd
1175 13:53:18.946600 # Registered handlers for all signals.
1176 13:53:18.948005 # Detected MINSTKSIGSZ:10000
1177 13:53:18.948326 # Testcase initialized.
1178 13:53:18.948433 # uc context validated.
1179 13:53:18.948527 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1180 13:53:18.948614 # Handled SIG_COPYCTX
1181 13:53:18.948714 # Mangling template header. Spare space:4096
1182 13:53:18.948799 # Using badly built context - ERR: Missing FPSIMD
1183 13:53:18.948899 # SIG_OK -- SP:0xFFFFF1721500 si_addr@:0xfffff1721500 si_code:2 token@:0xfffff17202a0 offset:-4704
1184 13:53:18.949000 # ==>> completed. PASS(1)
1185 13:53:18.949296 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
1186 13:53:18.949414 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF17202A0
1187 13:53:18.956342 ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd
1188 13:53:19.001340 # selftests: arm64: fake_sigreturn_sme_change_vl
1189 13:53:19.050803 # Registered handlers for all signals.
1190 13:53:19.051051 # Detected MINSTKSIGSZ:10000
1191 13:53:19.051350 # Required Features: [ SME ] supported
1192 13:53:19.051443 # Incompatible Features: [] absent
1193 13:53:19.051528 # Testcase initialized.
1194 13:53:19.051610 # uc context validated.
1195 13:53:19.051691 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1196 13:53:19.051774 # Handled SIG_COPYCTX
1197 13:53:19.051855 # Attempting to change VL from 16 to 256
1198 13:53:19.051954 # SIG_OK -- SP:0xFFFFE89D8DA0 si_addr@:0xffffe89d8da0 si_code:2 token@:0xffffe89d7b40 offset:-4704
1199 13:53:19.052040 # ==>> completed. PASS(1)
1200 13:53:19.052127 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
1201 13:53:19.052230 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE89D7B40
1202 13:53:19.059810 ok 9 selftests: arm64: fake_sigreturn_sme_change_vl
1203 13:53:19.104694 # selftests: arm64: fake_sigreturn_sve_change_vl
1204 13:53:19.154898 # Registered handlers for all signals.
1205 13:53:19.155240 # Detected MINSTKSIGSZ:10000
1206 13:53:19.155680 # Required Features: [ SVE ] supported
1207 13:53:19.155848 # Incompatible Features: [] absent
1208 13:53:19.156020 # Testcase initialized.
1209 13:53:19.156166 # uc context validated.
1210 13:53:19.157576 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1211 13:53:19.157787 # Handled SIG_COPYCTX
1212 13:53:19.158150 # Attempting to change VL from 16 to 256
1213 13:53:19.158286 # SIG_OK -- SP:0xFFFFCACFD2C0 si_addr@:0xffffcacfd2c0 si_code:2 token@:0xffffcacfc060 offset:-4704
1214 13:53:19.158409 # ==>> completed. PASS(1)
1215 13:53:19.158526 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
1216 13:53:19.158642 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCACFC060
1217 13:53:19.165325 ok 10 selftests: arm64: fake_sigreturn_sve_change_vl
1218 13:53:19.212675 # selftests: arm64: mangle_pstate_invalid_compat_toggle
1219 13:53:19.258275 # Registered handlers for all signals.
1220 13:53:19.258745 # Detected MINSTKSIGSZ:10000
1221 13:53:19.258877 # Testcase initialized.
1222 13:53:19.258994 # uc context validated.
1223 13:53:19.259108 # Handled SIG_TRIG
1224 13:53:19.259224 # SIG_OK -- SP:0xFFFFF1714620 si_addr@:0xfffff1714620 si_code:2 token@:(nil) offset:-281474732475936
1225 13:53:19.259369 # ==>> completed. PASS(1)
1226 13:53:19.259515 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
1227 13:53:19.266884 ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle
1228 13:53:19.315513 # selftests: arm64: mangle_pstate_invalid_daif_bits
1229 13:53:19.365163 # Registered handlers for all signals.
1230 13:53:19.365416 # Detected MINSTKSIGSZ:10000
1231 13:53:19.365710 # Testcase initialized.
1232 13:53:19.365815 # uc context validated.
1233 13:53:19.365904 # Handled SIG_TRIG
1234 13:53:19.365994 # SIG_OK -- SP:0xFFFFF3140390 si_addr@:0xfffff3140390 si_code:2 token@:(nil) offset:-281474759918480
1235 13:53:19.366085 # ==>> completed. PASS(1)
1236 13:53:19.366190 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
1237 13:53:19.374026 ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits
1238 13:53:19.419198 # selftests: arm64: mangle_pstate_invalid_mode_el1h
1239 13:53:19.466207 # Registered handlers for all signals.
1240 13:53:19.466616 # Detected MINSTKSIGSZ:10000
1241 13:53:19.466712 # Testcase initialized.
1242 13:53:19.466800 # uc context validated.
1243 13:53:19.466890 # Handled SIG_TRIG
1244 13:53:19.466979 # SIG_OK -- SP:0xFFFFE6E3C610 si_addr@:0xffffe6e3c610 si_code:2 token@:(nil) offset:-281474555430416
1245 13:53:19.467069 # ==>> completed. PASS(1)
1246 13:53:19.467175 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
1247 13:53:19.474543 ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h
1248 13:53:19.518830 # selftests: arm64: mangle_pstate_invalid_mode_el1t
1249 13:53:19.565442 # Registered handlers for all signals.
1250 13:53:19.565996 # Detected MINSTKSIGSZ:10000
1251 13:53:19.566193 # Testcase initialized.
1252 13:53:19.566376 # uc context validated.
1253 13:53:19.567194 # Handled SIG_TRIG
1254 13:53:19.567629 # SIG_OK -- SP:0xFFFFDACFF190 si_addr@:0xffffdacff190 si_code:2 token@:(nil) offset:-281474352804240
1255 13:53:19.567837 # ==>> completed. PASS(1)
1256 13:53:19.568039 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
1257 13:53:19.574313 ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t
1258 13:53:19.619781 # selftests: arm64: mangle_pstate_invalid_mode_el2h
1259 13:53:19.668214 # Registered handlers for all signals.
1260 13:53:19.668420 # Detected MINSTKSIGSZ:10000
1261 13:53:19.668504 # Testcase initialized.
1262 13:53:19.668597 # uc context validated.
1263 13:53:19.669804 # Handled SIG_TRIG
1264 13:53:19.670095 # SIG_OK -- SP:0xFFFFC61F0040 si_addr@:0xffffc61f0040 si_code:2 token@:(nil) offset:-281474005663808
1265 13:53:19.670193 # ==>> completed. PASS(1)
1266 13:53:19.670477 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
1267 13:53:19.677135 ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h
1268 13:53:19.724258 # selftests: arm64: mangle_pstate_invalid_mode_el2t
1269 13:53:19.774397 # Registered handlers for all signals.
1270 13:53:19.774629 # Detected MINSTKSIGSZ:10000
1271 13:53:19.774711 # Testcase initialized.
1272 13:53:19.774787 # uc context validated.
1273 13:53:19.775072 # Handled SIG_TRIG
1274 13:53:19.775169 # SIG_OK -- SP:0xFFFFFD182ED0 si_addr@:0xfffffd182ed0 si_code:2 token@:(nil) offset:-281474927963856
1275 13:53:19.775251 # ==>> completed. PASS(1)
1276 13:53:19.777151 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
1277 13:53:19.784518 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t
1278 13:53:19.834753 # selftests: arm64: mangle_pstate_invalid_mode_el3h
1279 13:53:19.884246 # Registered handlers for all signals.
1280 13:53:19.884582 # Detected MINSTKSIGSZ:10000
1281 13:53:19.884724 # Testcase initialized.
1282 13:53:19.885067 # uc context validated.
1283 13:53:19.885197 # Handled SIG_TRIG
1284 13:53:19.885314 # SIG_OK -- SP:0xFFFFF7C760D0 si_addr@:0xfffff7c760d0 si_code:2 token@:(nil) offset:-281474838782160
1285 13:53:19.885432 # ==>> completed. PASS(1)
1286 13:53:19.885545 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
1287 13:53:19.890356 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h
1288 13:53:19.936978 # selftests: arm64: mangle_pstate_invalid_mode_el3t
1289 13:53:19.984358 # Registered handlers for all signals.
1290 13:53:19.984666 # Detected MINSTKSIGSZ:10000
1291 13:53:19.984867 # Testcase initialized.
1292 13:53:19.985265 # uc context validated.
1293 13:53:19.985410 # Handled SIG_TRIG
1294 13:53:19.985558 # SIG_OK -- SP:0xFFFFF475F4A0 si_addr@:0xfffff475f4a0 si_code:2 token@:(nil) offset:-281474783114400
1295 13:53:19.985722 # ==>> completed. PASS(1)
1296 13:53:19.985869 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
1297 13:53:19.992845 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t
1298 13:53:20.057368 # selftests: arm64: sme_trap_no_sm
1299 13:53:20.175929 # Registered handlers for all signals.
1300 13:53:20.176392 # Detected MINSTKSIGSZ:10000
1301 13:53:20.176500 # Required Features: [ SME ] supported
1302 13:53:20.176589 # Incompatible Features: [] absent
1303 13:53:20.176675 # Testcase initialized.
1304 13:53:20.176776 # SIG_OK -- SP:0xFFFFDAF3A2F0 si_addr@:0xaaaabe2e2514 si_code:1 token@:(nil) offset:-187650311857428
1305 13:53:20.177067 # ==>> completed. PASS(1)
1306 13:53:20.177171 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
1307 13:53:20.194939 ok 19 selftests: arm64: sme_trap_no_sm
1308 13:53:20.284108 # selftests: arm64: sme_trap_non_streaming
1309 13:53:20.345012 # Registered handlers for all signals.
1310 13:53:20.345346 # Detected MINSTKSIGSZ:10000
1311 13:53:20.345741 # Required Features: [] NOT supported
1312 13:53:20.345907 # Incompatible Features: [] supported
1313 13:53:20.346059 # ==>> completed. SKIP.
1314 13:53:20.346213 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
1315 13:53:20.353849 ok 20 selftests: arm64: sme_trap_non_streaming # SKIP
1316 13:53:20.403439 # selftests: arm64: sme_trap_za
1317 13:53:20.454647 # Registered handlers for all signals.
1318 13:53:20.454891 # Detected MINSTKSIGSZ:10000
1319 13:53:20.454980 # Testcase initialized.
1320 13:53:20.455090 # SIG_OK -- SP:0xFFFFF31CE950 si_addr@:0xaaaac0712510 si_code:1 token@:(nil) offset:-187650349802768
1321 13:53:20.455174 # ==>> completed. PASS(1)
1322 13:53:20.455275 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
1323 13:53:20.464136 ok 21 selftests: arm64: sme_trap_za
1324 13:53:20.509795 # selftests: arm64: sme_vl
1325 13:53:20.561689 # Registered handlers for all signals.
1326 13:53:20.561925 # Detected MINSTKSIGSZ:10000
1327 13:53:20.562026 # Required Features: [ SME ] supported
1328 13:53:20.562119 # Incompatible Features: [] absent
1329 13:53:20.562229 # Testcase initialized.
1330 13:53:20.562322 # uc context validated.
1331 13:53:20.562410 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1332 13:53:20.562498 # Handled SIG_COPYCTX
1333 13:53:20.562586 # got expected VL 32
1334 13:53:20.562692 # ==>> completed. PASS(1)
1335 13:53:20.562783 # # SME VL :: Check that we get the right SME VL reported
1336 13:53:20.570810 ok 22 selftests: arm64: sme_vl
1337 13:53:20.616746 # selftests: arm64: ssve_regs
1338 13:53:20.805522 # Registered handlers for all signals.
1339 13:53:20.806001 # Detected MINSTKSIGSZ:10000
1340 13:53:20.806109 # Required Features: [ SME FA64 ] supported
1341 13:53:20.806205 # Incompatible Features: [] absent
1342 13:53:20.806296 # Testcase initialized.
1343 13:53:20.806384 # Testing VL 256
1344 13:53:20.807311 # Validating EXTRA...
1345 13:53:20.807410 # uc context validated.
1346 13:53:20.807728 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1347 13:53:20.807939 # Handled SIG_COPYCTX
1348 13:53:20.808170 # Got expected size 8752 and VL 256
1349 13:53:20.808364 # Testing VL 128
1350 13:53:20.808532 # Validating EXTRA...
1351 13:53:20.808779 # uc context validated.
1352 13:53:20.808973 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1353 13:53:20.809144 # Handled SIG_COPYCTX
1354 13:53:20.809304 # Got expected size 4384 and VL 128
1355 13:53:20.809426 # Testing VL 64
1356 13:53:20.809542 # uc context validated.
1357 13:53:20.809682 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1358 13:53:20.809889 # Handled SIG_COPYCTX
1359 13:53:20.810076 # Got expected size 2208 and VL 64
1360 13:53:20.810220 # Testing VL 32
1361 13:53:20.810362 # uc context validated.
1362 13:53:20.810503 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1363 13:53:20.810645 # Handled SIG_COPYCTX
1364 13:53:20.810824 # Got expected size 1120 and VL 32
1365 13:53:20.810959 # Testing VL 16
1366 13:53:20.811102 # uc context validated.
1367 13:53:20.811243 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1368 13:53:20.811385 # Handled SIG_COPYCTX
1369 13:53:20.811524 # Got expected size 576 and VL 16
1370 13:53:20.811664 # ==>> completed. PASS(1)
1371 13:53:20.811804 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
1372 13:53:20.816095 ok 23 selftests: arm64: ssve_regs
1373 13:53:20.860190 # selftests: arm64: sve_regs
1374 13:53:21.427411 # Registered handlers for all signals.
1375 13:53:21.427660 # Detected MINSTKSIGSZ:10000
1376 13:53:21.428538 # Required Features: [ SVE ] supported
1377 13:53:21.428647 # Incompatible Features: [] absent
1378 13:53:21.428758 # Testcase initialized.
1379 13:53:21.428866 # Testing VL 256
1380 13:53:21.428971 # Validating EXTRA...
1381 13:53:21.429083 # uc context validated.
1382 13:53:21.429166 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1383 13:53:21.429271 # Handled SIG_COPYCTX
1384 13:53:21.429412 # Got expected size 8752 and VL 256
1385 13:53:21.429576 # Testing VL 240
1386 13:53:21.429749 # Validating EXTRA...
1387 13:53:21.429907 # uc context validated.
1388 13:53:21.430061 # 8816 byte GOOD CONTEXT grabbed from sig_copyctx handler
1389 13:53:21.430174 # Handled SIG_COPYCTX
1390 13:53:21.430334 # Got expected size 8208 and VL 240
1391 13:53:21.430493 # Testing VL 224
1392 13:53:21.430642 # Validating EXTRA...
1393 13:53:21.430984 # uc context validated.
1394 13:53:21.431102 # 8272 byte GOOD CONTEXT grabbed from sig_copyctx handler
1395 13:53:21.431193 # Handled SIG_COPYCTX
1396 13:53:21.431280 # Got expected size 7664 and VL 224
1397 13:53:21.431368 # Testing VL 208
1398 13:53:21.431453 # Validating EXTRA...
1399 13:53:21.431537 # uc context validated.
1400 13:53:21.431622 # 7728 byte GOOD CONTEXT grabbed from sig_copyctx handler
1401 13:53:21.431706 # Handled SIG_COPYCTX
1402 13:53:21.431791 # Got expected size 7120 and VL 208
1403 13:53:21.431875 # Testing VL 192
1404 13:53:21.431960 # Validating EXTRA...
1405 13:53:21.432043 # uc context validated.
1406 13:53:21.432127 # 7184 byte GOOD CONTEXT grabbed from sig_copyctx handler
1407 13:53:21.432211 # Handled SIG_COPYCTX
1408 13:53:21.432295 # Got expected size 6576 and VL 192
1409 13:53:21.432381 # Testing VL 176
1410 13:53:21.432464 # Validating EXTRA...
1411 13:53:21.432548 # uc context validated.
1412 13:53:21.432631 # 6640 byte GOOD CONTEXT grabbed from sig_copyctx handler
1413 13:53:21.432714 # Handled SIG_COPYCTX
1414 13:53:21.432798 # Got expected size 6032 and VL 176
1415 13:53:21.432881 # Testing VL 160
1416 13:53:21.432964 # Validating EXTRA...
1417 13:53:21.433048 # uc context validated.
1418 13:53:21.433131 # 6096 byte GOOD CONTEXT grabbed from sig_copyctx handler
1419 13:53:21.433215 # Handled SIG_COPYCTX
1420 13:53:21.433298 # Got expected size 5488 and VL 160
1421 13:53:21.433382 # Testing VL 144
1422 13:53:21.433465 # Validating EXTRA...
1423 13:53:21.433548 # uc context validated.
1424 13:53:21.433632 # 5552 byte GOOD CONTEXT grabbed from sig_copyctx handler
1425 13:53:21.433730 # Handled SIG_COPYCTX
1426 13:53:21.433813 # Got expected size 4944 and VL 144
1427 13:53:21.433897 # Testing VL 128
1428 13:53:21.438470 # Validating EXTRA...
1429 13:53:21.438676 # uc context validated.
1430 13:53:21.439053 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1431 13:53:21.439268 # Handled SIG_COPYCTX
1432 13:53:21.439463 # Got expected size 4384 and VL 128
1433 13:53:21.439738 # Testing VL 112
1434 13:53:21.439916 # Validating EXTRA...
1435 13:53:21.440088 # uc context validated.
1436 13:53:21.440292 # 4448 byte GOOD CONTEXT grabbed from sig_copyctx handler
1437 13:53:21.440499 # Handled SIG_COPYCTX
1438 13:53:21.440676 # Got expected size 3840 and VL 112
1439 13:53:21.440835 # Testing VL 96
1440 13:53:21.440988 # uc context validated.
1441 13:53:21.441146 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1442 13:53:21.441344 # Handled SIG_COPYCTX
1443 13:53:21.441507 # Got expected size 3296 and VL 96
1444 13:53:21.441680 # Testing VL 80
1445 13:53:21.441844 # uc context validated.
1446 13:53:21.441981 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1447 13:53:21.442096 # Handled SIG_COPYCTX
1448 13:53:21.442216 # Got expected size 2752 and VL 80
1449 13:53:21.442347 # Testing VL 64
1450 13:53:21.442458 # uc context validated.
1451 13:53:21.442567 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1452 13:53:21.442677 # Handled SIG_COPYCTX
1453 13:53:21.442786 # Got expected size 2208 and VL 64
1454 13:53:21.442895 # Testing VL 48
1455 13:53:21.443004 # uc context validated.
1456 13:53:21.443115 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1457 13:53:21.443224 # Handled SIG_COPYCTX
1458 13:53:21.443335 # Got expected size 1664 and VL 48
1459 13:53:21.443445 # Testing VL 32
1460 13:53:21.443555 # uc context validated.
1461 13:53:21.443664 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1462 13:53:21.443774 # Handled SIG_COPYCTX
1463 13:53:21.443914 # Got expected size 1120 and VL 32
1464 13:53:21.444030 # Testing VL 16
1465 13:53:21.444141 # uc context validated.
1466 13:53:21.444250 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1467 13:53:21.444362 # Handled SIG_COPYCTX
1468 13:53:21.444471 # Got expected size 576 and VL 16
1469 13:53:21.444581 # ==>> completed. PASS(1)
1470 13:53:21.444689 # # SVE registers :: Check that we get the right SVE registers reported
1471 13:53:21.444801 ok 24 selftests: arm64: sve_regs
1472 13:53:21.489063 # selftests: arm64: sve_vl
1473 13:53:21.538532 # Registered handlers for all signals.
1474 13:53:21.538823 # Detected MINSTKSIGSZ:10000
1475 13:53:21.539024 # Required Features: [ SVE ] supported
1476 13:53:21.539254 # Incompatible Features: [] absent
1477 13:53:21.539453 # Testcase initialized.
1478 13:53:21.539658 # uc context validated.
1479 13:53:21.539808 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1480 13:53:21.539926 # Handled SIG_COPYCTX
1481 13:53:21.540040 # got expected VL 64
1482 13:53:21.540152 # ==>> completed. PASS(1)
1483 13:53:21.540262 # # SVE VL :: Check that we get the right SVE VL reported
1484 13:53:21.548887 ok 25 selftests: arm64: sve_vl
1485 13:53:21.591545 # selftests: arm64: za_no_regs
1486 13:53:21.649092 # Registered handlers for all signals.
1487 13:53:21.649413 # Detected MINSTKSIGSZ:10000
1488 13:53:21.649838 # Required Features: [ SME ] supported
1489 13:53:21.650055 # Incompatible Features: [] absent
1490 13:53:21.650228 # Testcase initialized.
1491 13:53:21.650397 # Testing VL 256
1492 13:53:21.650561 # uc context validated.
1493 13:53:21.650714 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1494 13:53:21.650862 # Handled SIG_COPYCTX
1495 13:53:21.651025 # Got expected size 16 and VL 256
1496 13:53:21.651169 # Testing VL 128
1497 13:53:21.651329 # uc context validated.
1498 13:53:21.651450 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1499 13:53:21.651565 # Handled SIG_COPYCTX
1500 13:53:21.651676 # Got expected size 16 and VL 128
1501 13:53:21.651787 # Testing VL 64
1502 13:53:21.651897 # uc context validated.
1503 13:53:21.652007 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1504 13:53:21.652117 # Handled SIG_COPYCTX
1505 13:53:21.652227 # Got expected size 16 and VL 64
1506 13:53:21.652337 # Testing VL 32
1507 13:53:21.652447 # uc context validated.
1508 13:53:21.652557 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1509 13:53:21.652666 # Handled SIG_COPYCTX
1510 13:53:21.652776 # Got expected size 16 and VL 32
1511 13:53:21.652885 # Testing VL 16
1512 13:53:21.652994 # uc context validated.
1513 13:53:21.653103 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1514 13:53:21.653213 # Handled SIG_COPYCTX
1515 13:53:21.653322 # Got expected size 16 and VL 16
1516 13:53:21.653431 # ==>> completed. PASS(1)
1517 13:53:21.653541 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
1518 13:53:21.659038 ok 26 selftests: arm64: za_no_regs
1519 13:53:21.704572 # selftests: arm64: za_regs
1520 13:53:21.862716 # Registered handlers for all signals.
1521 13:53:21.863212 # Detected MINSTKSIGSZ:10000
1522 13:53:21.863385 # Required Features: [ SME ] supported
1523 13:53:21.863554 # Incompatible Features: [] absent
1524 13:53:21.863726 # Testcase initialized.
1525 13:53:21.863890 # Testing VL 256
1526 13:53:21.864061 # Validating EXTRA...
1527 13:53:21.864228 # uc context validated.
1528 13:53:21.864435 # 66160 byte GOOD CONTEXT grabbed from sig_copyctx handler
1529 13:53:21.864574 # Handled SIG_COPYCTX
1530 13:53:21.864706 # Got expected size 65552 and VL 256
1531 13:53:21.864890 # Testing VL 128
1532 13:53:21.865103 # Validating EXTRA...
1533 13:53:21.865279 # uc context validated.
1534 13:53:21.865405 # 17008 byte GOOD CONTEXT grabbed from sig_copyctx handler
1535 13:53:21.865527 # Handled SIG_COPYCTX
1536 13:53:21.865660 # Got expected size 16400 and VL 128
1537 13:53:21.865862 # Testing VL 64
1538 13:53:21.866053 # Validating EXTRA...
1539 13:53:21.866240 # uc context validated.
1540 13:53:21.866405 # 4720 byte GOOD CONTEXT grabbed from sig_copyctx handler
1541 13:53:21.866547 # Handled SIG_COPYCTX
1542 13:53:21.866690 # Got expected size 4112 and VL 64
1543 13:53:21.866830 # Testing VL 32
1544 13:53:21.866969 # uc context validated.
1545 13:53:21.867153 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1546 13:53:21.867287 # Handled SIG_COPYCTX
1547 13:53:21.867427 # Got expected size 1040 and VL 32
1548 13:53:21.867567 # Testing VL 16
1549 13:53:21.867707 # uc context validated.
1550 13:53:21.867846 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1551 13:53:21.867985 # Handled SIG_COPYCTX
1552 13:53:21.868126 # Got expected size 272 and VL 16
1553 13:53:21.868265 # ==>> completed. PASS(1)
1554 13:53:21.868405 # # ZA register :: Check that we get the right ZA registers reported
1555 13:53:21.873488 ok 27 selftests: arm64: za_regs
1556 13:53:21.918248 # selftests: arm64: pac
1557 13:53:22.061266 # TAP version 13
1558 13:53:22.061484 # 1..7
1559 13:53:22.061689 # # Starting 7 tests from 1 test cases.
1560 13:53:22.062109 # # RUN global.corrupt_pac ...
1561 13:53:22.062306 # # OK global.corrupt_pac
1562 13:53:22.062530 # ok 1 global.corrupt_pac
1563 13:53:22.062720 # # RUN global.pac_instructions_not_nop ...
1564 13:53:22.062897 # # OK global.pac_instructions_not_nop
1565 13:53:22.063045 # ok 2 global.pac_instructions_not_nop
1566 13:53:22.063220 # # RUN global.pac_instructions_not_nop_generic ...
1567 13:53:22.063421 # # OK global.pac_instructions_not_nop_generic
1568 13:53:22.063638 # ok 3 global.pac_instructions_not_nop_generic
1569 13:53:22.063777 # # RUN global.single_thread_different_keys ...
1570 13:53:22.063920 # # OK global.single_thread_different_keys
1571 13:53:22.064061 # ok 4 global.single_thread_different_keys
1572 13:53:22.064203 # # RUN global.exec_changed_keys ...
1573 13:53:22.064344 # # OK global.exec_changed_keys
1574 13:53:22.064484 # ok 5 global.exec_changed_keys
1575 13:53:22.064624 # # RUN global.context_switch_keep_keys ...
1576 13:53:22.064765 # # OK global.context_switch_keep_keys
1577 13:53:22.064905 # ok 6 global.context_switch_keep_keys
1578 13:53:22.065044 # # RUN global.context_switch_keep_keys_generic ...
1579 13:53:22.065184 # # OK global.context_switch_keep_keys_generic
1580 13:53:22.065359 # ok 7 global.context_switch_keep_keys_generic
1581 13:53:22.065495 # # PASSED: 7 / 7 tests passed.
1582 13:53:22.065636 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
1583 13:53:22.071353 ok 28 selftests: arm64: pac
1584 13:53:22.114481 # selftests: arm64: fp-stress
1585 13:53:38.221423 # TAP version 13
1586 13:53:38.222014 # 1..27
1587 13:53:38.222229 # # 1 CPUs, 16 SVE VLs, 5 SME VLs
1588 13:53:38.222418 # # Will run for 10s
1589 13:53:38.222600 # # Started FPSIMD-0-0
1590 13:53:38.222774 # # Started SVE-VL-256-0
1591 13:53:38.222970 # # Started SVE-VL-240-0
1592 13:53:38.223179 # # Started SVE-VL-224-0
1593 13:53:38.223370 # # Started SVE-VL-208-0
1594 13:53:38.223577 # # Started SVE-VL-192-0
1595 13:53:38.223712 # # Started SVE-VL-176-0
1596 13:53:38.223850 # # Started SVE-VL-160-0
1597 13:53:38.223973 # # Started SVE-VL-144-0
1598 13:53:38.224095 # # Started SVE-VL-128-0
1599 13:53:38.224214 # # Started SVE-VL-112-0
1600 13:53:38.224329 # # Started SVE-VL-96-0
1601 13:53:38.224462 # # Started SVE-VL-80-0
1602 13:53:38.224616 # # Started SVE-VL-64-0
1603 13:53:38.224735 # # Started SVE-VL-48-0
1604 13:53:38.224854 # # Started SVE-VL-32-0
1605 13:53:38.224968 # # Started SVE-VL-16-0
1606 13:53:38.225081 # # Started SSVE-VL-256-0
1607 13:53:38.225198 # # Started ZA-VL-256-0
1608 13:53:38.225310 # # Started SSVE-VL-128-0
1609 13:53:38.225422 # # Started ZA-VL-128-0
1610 13:53:38.225540 # # Started SSVE-VL-64-0
1611 13:53:38.225668 # # Started ZA-VL-64-0
1612 13:53:38.225783 # # Started SSVE-VL-32-0
1613 13:53:38.225897 # # Started ZA-VL-32-0
1614 13:53:38.226010 # # Started SSVE-VL-16-0
1615 13:53:38.226122 # # Started ZA-VL-16-0
1616 13:53:38.230723 # # FPSIMD-0-0: Vector length: 128 bits
1617 13:53:38.230981 # # SVE-VL-256-0: Vector length: 2048 bits
1618 13:53:38.231187 # # SVE-VL-256-0: PID: 913
1619 13:53:38.231386 # # FPSIMD-0-0: PID: 912
1620 13:53:38.231523 # # SVE-VL-224-0: Vector length: 1792 bits
1621 13:53:38.231641 # # SVE-VL-224-0: PID: 915
1622 13:53:38.231755 # # SVE-VL-208-0: Vector length: 1664 bits
1623 13:53:38.232342 # # SVE-VL-208-0: PID: 916
1624 13:53:38.232512 # # SVE-VL-192-0: Vector length: 1536 bits
1625 13:53:38.232676 # # SVE-VL-192-0: PID: 917
1626 13:53:38.232878 # # SVE-VL-48-0: Vector length: 384 bits
1627 13:53:38.233057 # # SVE-VL-48-0: PID: 926
1628 13:53:38.233265 # # SVE-VL-64-0: Vector length: 512 bits
1629 13:53:38.233460 # # SVE-VL-64-0: PID: 925
1630 13:53:38.233644 # # SSVE-VL-256-0: Streaming mode Vector length: 2048 bits
1631 13:53:38.233851 # # SSVE-VL-256-0: PID: 929
1632 13:53:38.234034 # # SVE-VL-32-0: Vector length: 256 bits
1633 13:53:38.234258 # # SVE-VL-32-0: PID: 927
1634 13:53:38.234451 # # SVE-VL-160-0: Vector length: 1280 bits
1635 13:53:38.234634 # # SVE-VL-160-0: PID: 919
1636 13:53:38.234844 # # SVE-VL-176-0: Vector length: 1408 bits
1637 13:53:38.235082 # # SVE-VL-176-0: PID: 918
1638 13:53:38.235227 # # SVE-VL-16-0: Vector length: 128 bits
1639 13:53:38.235345 # # SVE-VL-16-0: PID: 928
1640 13:53:38.235460 # # ZA-VL-128-0: Streaming mode vector length: 1024 bits
1641 13:53:38.235614 # # ZA-VL-128-0: PID: 932
1642 13:53:38.235772 # # ZA-VL-256-0: Streaming mode vector length: 2048 bits
1643 13:53:38.235893 # # ZA-VL-256-0: PID: 930
1644 13:53:38.236007 # # SVE-VL-96-0: Vector length: 768 bits
1645 13:53:38.236121 # # SVE-VL-96-0: PID: 923
1646 13:53:38.236236 # # SSVE-VL-64-0: Streaming mode Vector length: 512 bits
1647 13:53:38.236349 # # SSVE-VL-64-0: PID: 933
1648 13:53:38.236461 # # SVE-VL-144-0: Vector length: 1152 bits
1649 13:53:38.236574 # # SVE-VL-144-0: PID: 920
1650 13:53:38.236686 # # SVE-VL-128-0: Vector length: 1024 bits
1651 13:53:38.236799 # # SVE-VL-128-0: PID: 921
1652 13:53:38.240581 # # SVE-VL-112-0: Vector length: 896 bits
1653 13:53:38.240939 # # SVE-VL-112-0: PID: 922
1654 13:53:38.241050 # # SSVE-VL-128-0: Streaming mode Vector length: 1024 bits
1655 13:53:38.241136 # # SSVE-VL-128-0: PID: 931
1656 13:53:38.241236 # # ZA-VL-16-0: Streaming mode vector length: 128 bits
1657 13:53:38.241320 # # SVE-VL-240-0: Vector length: 1920 bits
1658 13:53:38.241402 # # SVE-VL-240-0: PID: 914
1659 13:53:38.241478 # # SSVE-VL-32-0: Streaming mode Vector length: 256 bits
1660 13:53:38.241573 # # SSVE-VL-32-0: PID: 935
1661 13:53:38.241664 # # SSVE-VL-16-0: Streaming mode Vector length: 128 bits
1662 13:53:38.241743 # # SSVE-VL-16-0: PID: 937
1663 13:53:38.241834 # # SVE-VL-80-0: Vector length: 640 bits
1664 13:53:38.241916 # # SVE-VL-80-0: PID: 924
1665 13:53:38.241994 # # ZA-VL-64-0: Streaming mode vector length: 512 bits
1666 13:53:38.242087 # # ZA-VL-64-0: PID: 934
1667 13:53:38.242165 # # ZA-VL-16-0: PID: 938
1668 13:53:38.242251 # # ZA-VL-32-0: Streaming mode vector length: 256 bits
1669 13:53:38.242328 # # ZA-VL-32-0: PID: 936
1670 13:53:38.242406 # # Finishing up...
1671 13:53:38.242502 # # SVE-VL-160-0: Terminated by signal 15, no error, iterations=3732, signals=9
1672 13:53:38.242584 # # SVE-VL-256-0: Terminated by signal 15, no error, iterations=2568, signals=9
1673 13:53:38.242681 # # SVE-VL-192-0: Terminated by signal 15, no error, iterations=3283, signals=9
1674 13:53:38.242783 # # SVE-VL-144-0: Terminated by signal 15, no error, iterations=3419, signals=9
1675 13:53:38.243114 # # ZA-VL-16-0: Terminated by signal 15, no error, iterations=1722, signals=10
1676 13:53:38.243356 # # SVE-VL-80-0: Terminated by signal 15, no error, iterations=5114, signals=9
1677 13:53:38.247221 # # ZA-VL-64-0: Terminated by signal 15, no error, iterations=1241, signals=10
1678 13:53:38.264073 # # SSVE-VL-32-0: Terminated by signal 15, no error, iterations=9151, signals=10
1679 13:53:38.264785 # # ZA-VL-128-0: Terminated by signal 15, no error, iterations=689, signals=10
1680 13:53:38.264999 # # SVE-VL-16-0: Terminated by signal 15, no error, iterations=12991, signals=9
1681 13:53:38.265182 # # SVE-VL-96-0: Terminated by signal 15, no error, iterations=4745, signals=10
1682 13:53:38.265325 # # ZA-VL-256-0: Terminated by signal 15, no error, iterations=265, signals=9
1683 13:53:38.265492 # # SVE-VL-176-0: Terminated by signal 15, no error, iterations=3549, signals=9
1684 13:53:38.265645 # # SVE-VL-48-0: Terminated by signal 15, no error, iterations=8313, signals=10
1685 13:53:38.265833 # # SSVE-VL-64-0: Terminated by signal 15, no error, iterations=6573, signals=10
1686 13:53:38.265991 # # SSVE-VL-128-0: Terminated by signal 15, no error, iterations=4360, signals=10
1687 13:53:38.375021 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=3624, signals=9
1688 13:53:38.375481 # # SVE-VL-240-0: Terminated by signal 15, no error, iterations=2231, signals=9
1689 13:53:38.379721 # # SSVE-VL-16-0: Terminated by signal 15, no error, iterations=11554, signals=10
1690 13:53:38.380173 # # SVE-VL-112-0: Terminated by signal 15, no error, iterations=4290, signals=9
1691 13:53:38.380282 # # SSVE-VL-256-0: Terminated by signal 15, no error, iterations=2728, signals=10
1692 13:53:38.380575 # # ZA-VL-32-0: Terminated by signal 15, no error, iterations=1468, signals=10
1693 13:53:38.380684 # # SVE-VL-64-0: Terminated by signal 15, no error, iterations=6761, signals=9
1694 13:53:38.380787 # # SVE-VL-224-0: Terminated by signal 15, no error, iterations=2874, signals=9
1695 13:53:38.381102 # # SVE-VL-32-0: Terminated by signal 15, no error, iterations=9618, signals=9
1696 13:53:38.381240 # # SVE-VL-128-0: Terminated by signal 15, no error, iterations=3848, signals=9
1697 13:53:38.381725 # # SVE-VL-208-0: Terminated by signal 15, no error, iterations=2965, signals=9
1698 13:53:38.381949 # ok 1 FPSIMD-0-0
1699 13:53:38.382172 # ok 2 SVE-VL-256-0
1700 13:53:38.382354 # ok 3 SVE-VL-240-0
1701 13:53:38.382538 # ok 4 SVE-VL-224-0
1702 13:53:38.382724 # ok 5 SVE-VL-208-0
1703 13:53:38.382897 # ok 6 SVE-VL-192-0
1704 13:53:38.383160 # ok 7 SVE-VL-176-0
1705 13:53:38.383338 # ok 8 SVE-VL-160-0
1706 13:53:38.383511 # ok 9 SVE-VL-144-0
1707 13:53:38.383660 # ok 10 SVE-VL-128-0
1708 13:53:38.383805 # ok 11 SVE-VL-112-0
1709 13:53:38.383947 # ok 12 SVE-VL-96-0
1710 13:53:38.384096 # ok 13 SVE-VL-80-0
1711 13:53:38.384239 # ok 14 SVE-VL-64-0
1712 13:53:38.384381 # ok 15 SVE-VL-48-0
1713 13:53:38.384522 # ok 16 SVE-VL-32-0
1714 13:53:38.384664 # ok 17 SVE-VL-16-0
1715 13:53:38.384805 # ok 18 SSVE-VL-256-0
1716 13:53:38.384948 # ok 19 ZA-VL-256-0
1717 13:53:38.385089 # ok 20 SSVE-VL-128-0
1718 13:53:38.385230 # ok 21 ZA-VL-128-0
1719 13:53:38.385371 # ok 22 SSVE-VL-64-0
1720 13:53:38.385515 # ok 23 ZA-VL-64-0
1721 13:53:38.385666 # ok 24 SSVE-VL-32-0
1722 13:53:38.385811 # ok 25 ZA-VL-32-0
1723 13:53:38.385952 # ok 26 SSVE-VL-16-0
1724 13:53:38.387711 # ok 27 ZA-VL-16-0
1725 13:53:38.388139 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:0 error:0
1726 13:53:38.388289 ok 29 selftests: arm64: fp-stress
1727 13:53:38.545859 # selftests: arm64: sve-ptrace
1728 13:53:38.669802 # TAP version 13
1729 13:53:38.670154 # 1..4104
1730 13:53:38.670340 # # Parent is 955, child is 956
1731 13:53:38.670526 # ok 1 SVE FPSIMD set via SVE: 0
1732 13:53:38.670953 # ok 2 SVE get_fpsimd() gave same state
1733 13:53:38.671115 # ok 3 SVE SVE_PT_VL_INHERIT set
1734 13:53:38.671259 # ok 4 SVE SVE_PT_VL_INHERIT cleared
1735 13:53:38.671447 # ok 5 Set SVE VL 16
1736 13:53:38.671678 # ok 6 Set and get SVE data for VL 16
1737 13:53:38.671856 # ok 7 Set and get FPSIMD data for SVE VL 16
1738 13:53:38.672011 # ok 8 Set FPSIMD, read via SVE for SVE VL 16
1739 13:53:38.672155 # ok 9 Set SVE VL 32
1740 13:53:38.672312 # ok 10 Set and get SVE data for VL 32
1741 13:53:38.672487 # ok 11 Set and get FPSIMD data for SVE VL 32
1742 13:53:38.672655 # ok 12 Set FPSIMD, read via SVE for SVE VL 32
1743 13:53:38.672901 # ok 13 Set SVE VL 48
1744 13:53:38.673100 # ok 14 Set and get SVE data for VL 48
1745 13:53:38.673313 # ok 15 Set and get FPSIMD data for SVE VL 48
1746 13:53:38.673522 # ok 16 Set FPSIMD, read via SVE for SVE VL 48
1747 13:53:38.673714 # ok 17 Set SVE VL 64
1748 13:53:38.673883 # ok 18 Set and get SVE data for VL 64
1749 13:53:38.674083 # ok 19 Set and get FPSIMD data for SVE VL 64
1750 13:53:38.674286 # ok 20 Set FPSIMD, read via SVE for SVE VL 64
1751 13:53:38.674463 # ok 21 Set SVE VL 80
1752 13:53:38.674620 # ok 22 Set and get SVE data for VL 80
1753 13:53:38.674808 # ok 23 Set and get FPSIMD data for SVE VL 80
1754 13:53:38.674977 # ok 24 Set FPSIMD, read via SVE for SVE VL 80
1755 13:53:38.675102 # ok 25 Set SVE VL 96
1756 13:53:38.675217 # ok 26 Set and get SVE data for VL 96
1757 13:53:38.675333 # ok 27 Set and get FPSIMD data for SVE VL 96
1758 13:53:38.675448 # ok 28 Set FPSIMD, read via SVE for SVE VL 96
1759 13:53:38.675561 # ok 29 Set SVE VL 112
1760 13:53:38.675675 # ok 30 Set and get SVE data for VL 112
1761 13:53:38.675787 # ok 31 Set and get FPSIMD data for SVE VL 112
1762 13:53:38.675936 # ok 32 Set FPSIMD, read via SVE for SVE VL 112
1763 13:53:38.676059 # ok 33 Set SVE VL 128
1764 13:53:38.676172 # ok 34 Set and get SVE data for VL 128
1765 13:53:38.676285 # ok 35 Set and get FPSIMD data for SVE VL 128
1766 13:53:38.676398 # ok 36 Set FPSIMD, read via SVE for SVE VL 128
1767 13:53:38.676511 # ok 37 Set SVE VL 144
1768 13:53:38.676625 # ok 38 Set and get SVE data for VL 144
1769 13:53:38.676738 # ok 39 Set and get FPSIMD data for SVE VL 144
1770 13:53:38.676850 # ok 40 Set FPSIMD, read via SVE for SVE VL 144
1771 13:53:38.676963 # ok 41 Set SVE VL 160
1772 13:53:38.677082 # ok 42 Set and get SVE data for VL 160
1773 13:53:38.677196 # ok 43 Set and get FPSIMD data for SVE VL 160
1774 13:53:38.677309 # ok 44 Set FPSIMD, read via SVE for SVE VL 160
1775 13:53:38.677421 # ok 45 Set SVE VL 176
1776 13:53:38.677533 # ok 46 Set and get SVE data for VL 176
1777 13:53:38.677673 # ok 47 Set and get FPSIMD data for SVE VL 176
1778 13:53:38.679399 # ok 48 Set FPSIMD, read via SVE for SVE VL 176
1779 13:53:38.679613 # ok 49 Set SVE VL 192
1780 13:53:38.680089 # ok 50 Set and get SVE data for VL 192
1781 13:53:38.680294 # ok 51 Set and get FPSIMD data for SVE VL 192
1782 13:53:38.680466 # ok 52 Set FPSIMD, read via SVE for SVE VL 192
1783 13:53:38.680628 # ok 53 Set SVE VL 208
1784 13:53:38.680789 # ok 54 Set and get SVE data for VL 208
1785 13:53:38.680953 # ok 55 Set and get FPSIMD data for SVE VL 208
1786 13:53:38.681483 # ok 56 Set FPSIMD, read via SVE for SVE VL 208
1787 13:53:38.681593 # ok 57 Set SVE VL 224
1788 13:53:38.681696 # ok 58 Set and get SVE data for VL 224
1789 13:53:38.681785 # ok 59 Set and get FPSIMD data for SVE VL 224
1790 13:53:38.681869 # ok 60 Set FPSIMD, read via SVE for SVE VL 224
1791 13:53:38.681953 # ok 61 Set SVE VL 240
1792 13:53:38.682041 # ok 62 Set and get SVE data for VL 240
1793 13:53:38.682125 # ok 63 Set and get FPSIMD data for SVE VL 240
1794 13:53:38.682209 # ok 64 Set FPSIMD, read via SVE for SVE VL 240
1795 13:53:38.682293 # ok 65 Set SVE VL 256
1796 13:53:38.682378 # ok 66 Set and get SVE data for VL 256
1797 13:53:38.682460 # ok 67 Set and get FPSIMD data for SVE VL 256
1798 13:53:38.682543 # ok 68 Set FPSIMD, read via SVE for SVE VL 256
1799 13:53:38.682627 # ok 69 Set SVE VL 272
1800 13:53:38.682707 # ok 70 # SKIP SVE set SVE get SVE for VL 272
1801 13:53:38.683015 # ok 71 # SKIP SVE set SVE get FPSIMD for VL 272
1802 13:53:38.683187 # ok 72 # SKIP SVE set FPSIMD get SVE for VL 272
1803 13:53:38.683318 # ok 73 Set SVE VL 288
1804 13:53:38.683440 # ok 74 # SKIP SVE set SVE get SVE for VL 288
1805 13:53:38.683558 # ok 75 # SKIP SVE set SVE get FPSIMD for VL 288
1806 13:53:38.683676 # ok 76 # SKIP SVE set FPSIMD get SVE for VL 288
1807 13:53:38.683795 # ok 77 Set SVE VL 304
1808 13:53:38.683912 # ok 78 # SKIP SVE set SVE get SVE for VL 304
1809 13:53:38.684030 # ok 79 # SKIP SVE set SVE get FPSIMD for VL 304
1810 13:53:38.689314 # ok 80 # SKIP SVE set FPSIMD get SVE for VL 304
1811 13:53:38.689560 # ok 81 Set SVE VL 320
1812 13:53:38.690172 # ok 82 # SKIP SVE set SVE get SVE for VL 320
1813 13:53:38.690361 # ok 83 # SKIP SVE set SVE get FPSIMD for VL 320
1814 13:53:38.690521 # ok 84 # SKIP SVE set FPSIMD get SVE for VL 320
1815 13:53:38.690672 # ok 85 Set SVE VL 336
1816 13:53:38.690811 # ok 86 # SKIP SVE set SVE get SVE for VL 336
1817 13:53:38.690931 # ok 87 # SKIP SVE set SVE get FPSIMD for VL 336
1818 13:53:38.691053 # ok 88 # SKIP SVE set FPSIMD get SVE for VL 336
1819 13:53:38.691212 # ok 89 Set SVE VL 352
1820 13:53:38.691405 # ok 90 # SKIP SVE set SVE get SVE for VL 352
1821 13:53:38.691571 # ok 91 # SKIP SVE set SVE get FPSIMD for VL 352
1822 13:53:38.691730 # ok 92 # SKIP SVE set FPSIMD get SVE for VL 352
1823 13:53:38.691853 # ok 93 Set SVE VL 368
1824 13:53:38.691967 # ok 94 # SKIP SVE set SVE get SVE for VL 368
1825 13:53:38.692082 # ok 95 # SKIP SVE set SVE get FPSIMD for VL 368
1826 13:53:38.692200 # ok 96 # SKIP SVE set FPSIMD get SVE for VL 368
1827 13:53:38.692314 # ok 97 Set SVE VL 384
1828 13:53:38.692429 # ok 98 # SKIP SVE set SVE get SVE for VL 384
1829 13:53:38.692582 # ok 99 # SKIP SVE set SVE get FPSIMD for VL 384
1830 13:53:38.692748 # ok 100 # SKIP SVE set FPSIMD get SVE for VL 384
1831 13:53:38.692914 # ok 101 Set SVE VL 400
1832 13:53:38.693111 # ok 102 # SKIP SVE set SVE get SVE for VL 400
1833 13:53:38.693278 # ok 103 # SKIP SVE set SVE get FPSIMD for VL 400
1834 13:53:38.693455 # ok 104 # SKIP SVE set FPSIMD get SVE for VL 400
1835 13:53:38.693624 # ok 105 Set SVE VL 416
1836 13:53:38.694388 # ok 106 # SKIP SVE set SVE get SVE for VL 416
1837 13:53:38.694590 # ok 107 # SKIP SVE set SVE get FPSIMD for VL 416
1838 13:53:38.694751 # ok 108 # SKIP SVE set FPSIMD get SVE for VL 416
1839 13:53:38.694916 # ok 109 Set SVE VL 432
1840 13:53:38.695044 # ok 110 # SKIP SVE set SVE get SVE for VL 432
1841 13:53:38.695164 # ok 111 # SKIP SVE set SVE get FPSIMD for VL 432
1842 13:53:38.695281 # ok 112 # SKIP SVE set FPSIMD get SVE for VL 432
1843 13:53:38.695399 # ok 113 Set SVE VL 448
1844 13:53:38.695517 # ok 114 # SKIP SVE set SVE get SVE for VL 448
1845 13:53:38.695634 # ok 115 # SKIP SVE set SVE get FPSIMD for VL 448
1846 13:53:38.695751 # ok 116 # SKIP SVE set FPSIMD get SVE for VL 448
1847 13:53:38.695866 # ok 117 Set SVE VL 464
1848 13:53:38.695983 # ok 118 # SKIP SVE set SVE get SVE for VL 464
1849 13:53:38.696102 # ok 119 # SKIP SVE set SVE get FPSIMD for VL 464
1850 13:53:38.696245 # ok 120 # SKIP SVE set FPSIMD get SVE for VL 464
1851 13:53:38.696373 # ok 121 Set SVE VL 480
1852 13:53:38.702998 # ok 122 # SKIP SVE set SVE get SVE for VL 480
1853 13:53:38.703344 # ok 123 # SKIP SVE set SVE get FPSIMD for VL 480
1854 13:53:38.703450 # ok 124 # SKIP SVE set FPSIMD get SVE for VL 480
1855 13:53:38.703541 # ok 125 Set SVE VL 496
1856 13:53:38.703641 # ok 126 # SKIP SVE set SVE get SVE for VL 496
1857 13:53:38.703728 # ok 127 # SKIP SVE set SVE get FPSIMD for VL 496
1858 13:53:38.703826 # ok 128 # SKIP SVE set FPSIMD get SVE for VL 496
1859 13:53:38.703914 # ok 129 Set SVE VL 512
1860 13:53:38.704012 # ok 130 # SKIP SVE set SVE get SVE for VL 512
1861 13:53:38.704353 # ok 131 # SKIP SVE set SVE get FPSIMD for VL 512
1862 13:53:38.704545 # ok 132 # SKIP SVE set FPSIMD get SVE for VL 512
1863 13:53:38.704761 # ok 133 Set SVE VL 528
1864 13:53:38.704941 # ok 134 # SKIP SVE set SVE get SVE for VL 528
1865 13:53:38.705120 # ok 135 # SKIP SVE set SVE get FPSIMD for VL 528
1866 13:53:38.705298 # ok 136 # SKIP SVE set FPSIMD get SVE for VL 528
1867 13:53:38.705486 # ok 137 Set SVE VL 544
1868 13:53:38.705643 # ok 138 # SKIP SVE set SVE get SVE for VL 544
1869 13:53:38.705823 # ok 139 # SKIP SVE set SVE get FPSIMD for VL 544
1870 13:53:38.706014 # ok 140 # SKIP SVE set FPSIMD get SVE for VL 544
1871 13:53:38.706207 # ok 141 Set SVE VL 560
1872 13:53:38.706370 # ok 142 # SKIP SVE set SVE get SVE for VL 560
1873 13:53:38.706570 # ok 143 # SKIP SVE set SVE get FPSIMD for VL 560
1874 13:53:38.706730 # ok 144 # SKIP SVE set FPSIMD get SVE for VL 560
1875 13:53:38.706857 # ok 145 Set SVE VL 576
1876 13:53:38.706973 # ok 146 # SKIP SVE set SVE get SVE for VL 576
1877 13:53:38.707088 # ok 147 # SKIP SVE set SVE get FPSIMD for VL 576
1878 13:53:38.707205 # ok 148 # SKIP SVE set FPSIMD get SVE for VL 576
1879 13:53:38.707320 # ok 149 Set SVE VL 592
1880 13:53:38.707435 # ok 150 # SKIP SVE set SVE get SVE for VL 592
1881 13:53:38.707550 # ok 151 # SKIP SVE set SVE get FPSIMD for VL 592
1882 13:53:38.707665 # ok 152 # SKIP SVE set FPSIMD get SVE for VL 592
1883 13:53:38.707805 # ok 153 Set SVE VL 608
1884 13:53:38.712781 # ok 154 # SKIP SVE set SVE get SVE for VL 608
1885 13:53:38.713222 # ok 155 # SKIP SVE set SVE get FPSIMD for VL 608
1886 13:53:38.713327 # ok 156 # SKIP SVE set FPSIMD get SVE for VL 608
1887 13:53:38.713418 # ok 157 Set SVE VL 624
1888 13:53:38.713504 # ok 158 # SKIP SVE set SVE get SVE for VL 624
1889 13:53:38.713611 # ok 159 # SKIP SVE set SVE get FPSIMD for VL 624
1890 13:53:38.713710 # ok 160 # SKIP SVE set FPSIMD get SVE for VL 624
1891 13:53:38.713797 # ok 161 Set SVE VL 640
1892 13:53:38.713884 # ok 162 # SKIP SVE set SVE get SVE for VL 640
1893 13:53:38.713986 # ok 163 # SKIP SVE set SVE get FPSIMD for VL 640
1894 13:53:38.714077 # ok 164 # SKIP SVE set FPSIMD get SVE for VL 640
1895 13:53:38.714162 # ok 165 Set SVE VL 656
1896 13:53:38.714262 # ok 166 # SKIP SVE set SVE get SVE for VL 656
1897 13:53:38.714363 # ok 167 # SKIP SVE set SVE get FPSIMD for VL 656
1898 13:53:38.714470 # ok 168 # SKIP SVE set FPSIMD get SVE for VL 656
1899 13:53:38.714569 # ok 169 Set SVE VL 672
1900 13:53:38.714674 # ok 170 # SKIP SVE set SVE get SVE for VL 672
1901 13:53:38.715343 # ok 171 # SKIP SVE set SVE get FPSIMD for VL 672
1902 13:53:38.715717 # ok 172 # SKIP SVE set FPSIMD get SVE for VL 672
1903 13:53:38.715916 # ok 173 Set SVE VL 688
1904 13:53:38.716086 # ok 174 # SKIP SVE set SVE get SVE for VL 688
1905 13:53:38.716246 # ok 175 # SKIP SVE set SVE get FPSIMD for VL 688
1906 13:53:38.716438 # ok 176 # SKIP SVE set FPSIMD get SVE for VL 688
1907 13:53:38.716588 # ok 177 Set SVE VL 704
1908 13:53:38.716744 # ok 178 # SKIP SVE set SVE get SVE for VL 704
1909 13:53:38.716905 # ok 179 # SKIP SVE set SVE get FPSIMD for VL 704
1910 13:53:38.717071 # ok 180 # SKIP SVE set FPSIMD get SVE for VL 704
1911 13:53:38.717238 # ok 181 Set SVE VL 720
1912 13:53:38.717390 # ok 182 # SKIP SVE set SVE get SVE for VL 720
1913 13:53:38.717588 # ok 183 # SKIP SVE set SVE get FPSIMD for VL 720
1914 13:53:38.717767 # ok 184 # SKIP SVE set FPSIMD get SVE for VL 720
1915 13:53:38.717959 # ok 185 Set SVE VL 736
1916 13:53:38.718181 # ok 186 # SKIP SVE set SVE get SVE for VL 736
1917 13:53:38.718395 # ok 187 # SKIP SVE set SVE get FPSIMD for VL 736
1918 13:53:38.718573 # ok 188 # SKIP SVE set FPSIMD get SVE for VL 736
1919 13:53:38.718865 # ok 189 Set SVE VL 752
1920 13:53:38.719039 # ok 190 # SKIP SVE set SVE get SVE for VL 752
1921 13:53:38.719188 # ok 191 # SKIP SVE set SVE get FPSIMD for VL 752
1922 13:53:38.719374 # ok 192 # SKIP SVE set FPSIMD get SVE for VL 752
1923 13:53:38.719509 # ok 193 Set SVE VL 768
1924 13:53:38.719653 # ok 194 # SKIP SVE set SVE get SVE for VL 768
1925 13:53:38.719795 # ok 195 # SKIP SVE set SVE get FPSIMD for VL 768
1926 13:53:38.719936 # ok 196 # SKIP SVE set FPSIMD get SVE for VL 768
1927 13:53:38.720077 # ok 197 Set SVE VL 784
1928 13:53:38.720218 # ok 198 # SKIP SVE set SVE get SVE for VL 784
1929 13:53:38.720359 # ok 199 # SKIP SVE set SVE get FPSIMD for VL 784
1930 13:53:38.720500 # ok 200 # SKIP SVE set FPSIMD get SVE for VL 784
1931 13:53:38.720640 # ok 201 Set SVE VL 800
1932 13:53:38.720779 # ok 202 # SKIP SVE set SVE get SVE for VL 800
1933 13:53:38.726689 # ok 203 # SKIP SVE set SVE get FPSIMD for VL 800
1934 13:53:38.727141 # ok 204 # SKIP SVE set FPSIMD get SVE for VL 800
1935 13:53:38.730468 # ok 205 Set SVE VL 816
1936 13:53:38.730896 # ok 206 # SKIP SVE set SVE get SVE for VL 816
1937 13:53:38.731077 # ok 207 # SKIP SVE set SVE get FPSIMD for VL 816
1938 13:53:38.731265 # ok 208 # SKIP SVE set FPSIMD get SVE for VL 816
1939 13:53:38.731474 # ok 209 Set SVE VL 832
1940 13:53:38.731635 # ok 210 # SKIP SVE set SVE get SVE for VL 832
1941 13:53:38.731798 # ok 211 # SKIP SVE set SVE get FPSIMD for VL 832
1942 13:53:38.731964 # ok 212 # SKIP SVE set FPSIMD get SVE for VL 832
1943 13:53:38.732120 # ok 213 Set SVE VL 848
1944 13:53:38.732324 # ok 214 # SKIP SVE set SVE get SVE for VL 848
1945 13:53:38.732483 # ok 215 # SKIP SVE set SVE get FPSIMD for VL 848
1946 13:53:38.732667 # ok 216 # SKIP SVE set FPSIMD get SVE for VL 848
1947 13:53:38.732846 # ok 217 Set SVE VL 864
1948 13:53:38.733069 # ok 218 # SKIP SVE set SVE get SVE for VL 864
1949 13:53:38.733294 # ok 219 # SKIP SVE set SVE get FPSIMD for VL 864
1950 13:53:38.733475 # ok 220 # SKIP SVE set FPSIMD get SVE for VL 864
1951 13:53:38.733673 # ok 221 Set SVE VL 880
1952 13:53:38.733843 # ok 222 # SKIP SVE set SVE get SVE for VL 880
1953 13:53:38.734083 # ok 223 # SKIP SVE set SVE get FPSIMD for VL 880
1954 13:53:38.734303 # ok 224 # SKIP SVE set FPSIMD get SVE for VL 880
1955 13:53:38.734466 # ok 225 Set SVE VL 896
1956 13:53:38.734625 # ok 226 # SKIP SVE set SVE get SVE for VL 896
1957 13:53:38.734817 # ok 227 # SKIP SVE set SVE get FPSIMD for VL 896
1958 13:53:38.734954 # ok 228 # SKIP SVE set FPSIMD get SVE for VL 896
1959 13:53:38.735072 # ok 229 Set SVE VL 912
1960 13:53:38.735193 # ok 230 # SKIP SVE set SVE get SVE for VL 912
1961 13:53:38.735310 # ok 231 # SKIP SVE set SVE get FPSIMD for VL 912
1962 13:53:38.735425 # ok 232 # SKIP SVE set FPSIMD get SVE for VL 912
1963 13:53:38.735540 # ok 233 Set SVE VL 928
1964 13:53:38.735657 # ok 234 # SKIP SVE set SVE get SVE for VL 928
1965 13:53:38.735773 # ok 235 # SKIP SVE set SVE get FPSIMD for VL 928
1966 13:53:38.735889 # ok 236 # SKIP SVE set FPSIMD get SVE for VL 928
1967 13:53:38.736006 # ok 237 Set SVE VL 944
1968 13:53:38.736122 # ok 238 # SKIP SVE set SVE get SVE for VL 944
1969 13:53:38.736236 # ok 239 # SKIP SVE set SVE get FPSIMD for VL 944
1970 13:53:38.736380 # ok 240 # SKIP SVE set FPSIMD get SVE for VL 944
1971 13:53:38.736505 # ok 241 Set SVE VL 960
1972 13:53:38.736621 # ok 242 # SKIP SVE set SVE get SVE for VL 960
1973 13:53:38.736739 # ok 243 # SKIP SVE set SVE get FPSIMD for VL 960
1974 13:53:38.736854 # ok 244 # SKIP SVE set FPSIMD get SVE for VL 960
1975 13:53:38.736970 # ok 245 Set SVE VL 976
1976 13:53:38.747041 # ok 246 # SKIP SVE set SVE get SVE for VL 976
1977 13:53:38.747266 # ok 247 # SKIP SVE set SVE get FPSIMD for VL 976
1978 13:53:38.747671 # ok 248 # SKIP SVE set FPSIMD get SVE for VL 976
1979 13:53:38.747858 # ok 249 Set SVE VL 992
1980 13:53:38.748075 # ok 250 # SKIP SVE set SVE get SVE for VL 992
1981 13:53:38.748275 # ok 251 # SKIP SVE set SVE get FPSIMD for VL 992
1982 13:53:38.748500 # ok 252 # SKIP SVE set FPSIMD get SVE for VL 992
1983 13:53:38.748728 # ok 253 Set SVE VL 1008
1984 13:53:38.748945 # ok 254 # SKIP SVE set SVE get SVE for VL 1008
1985 13:53:38.749198 # ok 255 # SKIP SVE set SVE get FPSIMD for VL 1008
1986 13:53:38.749411 # ok 256 # SKIP SVE set FPSIMD get SVE for VL 1008
1987 13:53:38.749622 # ok 257 Set SVE VL 1024
1988 13:53:38.749825 # ok 258 # SKIP SVE set SVE get SVE for VL 1024
1989 13:53:38.750015 # ok 259 # SKIP SVE set SVE get FPSIMD for VL 1024
1990 13:53:38.750201 # ok 260 # SKIP SVE set FPSIMD get SVE for VL 1024
1991 13:53:38.750366 # ok 261 Set SVE VL 1040
1992 13:53:38.750529 # ok 262 # SKIP SVE set SVE get SVE for VL 1040
1993 13:53:38.750708 # ok 263 # SKIP SVE set SVE get FPSIMD for VL 1040
1994 13:53:38.750847 # ok 264 # SKIP SVE set FPSIMD get SVE for VL 1040
1995 13:53:38.750964 # ok 265 Set SVE VL 1056
1996 13:53:38.751085 # ok 266 # SKIP SVE set SVE get SVE for VL 1056
1997 13:53:38.751229 # ok 267 # SKIP SVE set SVE get FPSIMD for VL 1056
1998 13:53:38.751374 # ok 268 # SKIP SVE set FPSIMD get SVE for VL 1056
1999 13:53:38.751534 # ok 269 Set SVE VL 1072
2000 13:53:38.751745 # ok 270 # SKIP SVE set SVE get SVE for VL 1072
2001 13:53:38.751974 # ok 271 # SKIP SVE set SVE get FPSIMD for VL 1072
2002 13:53:38.752110 # ok 272 # SKIP SVE set FPSIMD get SVE for VL 1072
2003 13:53:38.752227 # ok 273 Set SVE VL 1088
2004 13:53:38.752340 # ok 274 # SKIP SVE set SVE get SVE for VL 1088
2005 13:53:38.752452 # ok 275 # SKIP SVE set SVE get FPSIMD for VL 1088
2006 13:53:38.752564 # ok 276 # SKIP SVE set FPSIMD get SVE for VL 1088
2007 13:53:38.752678 # ok 277 Set SVE VL 1104
2008 13:53:38.752791 # ok 278 # SKIP SVE set SVE get SVE for VL 1104
2009 13:53:38.752904 # ok 279 # SKIP SVE set SVE get FPSIMD for VL 1104
2010 13:53:38.753017 # ok 280 # SKIP SVE set FPSIMD get SVE for VL 1104
2011 13:53:38.753129 # ok 281 Set SVE VL 1120
2012 13:53:38.753245 # ok 282 # SKIP SVE set SVE get SVE for VL 1120
2013 13:53:38.753356 # ok 283 # SKIP SVE set SVE get FPSIMD for VL 1120
2014 13:53:38.753469 # ok 284 # SKIP SVE set FPSIMD get SVE for VL 1120
2015 13:53:38.753581 # ok 285 Set SVE VL 1136
2016 13:53:38.753772 # ok 286 # SKIP SVE set SVE get SVE for VL 1136
2017 13:53:38.753972 # ok 287 # SKIP SVE set SVE get FPSIMD for VL 1136
2018 13:53:38.754158 # ok 288 # SKIP SVE set FPSIMD get SVE for VL 1136
2019 13:53:38.754341 # ok 289 Set SVE VL 1152
2020 13:53:38.754524 # ok 290 # SKIP SVE set SVE get SVE for VL 1152
2021 13:53:38.754706 # ok 291 # SKIP SVE set SVE get FPSIMD for VL 1152
2022 13:53:38.755127 # ok 292 # SKIP SVE set FPSIMD get SVE for VL 1152
2023 13:53:38.755355 # ok 293 Set SVE VL 1168
2024 13:53:38.755535 # ok 294 # SKIP SVE set SVE get SVE for VL 1168
2025 13:53:38.755737 # ok 295 # SKIP SVE set SVE get FPSIMD for VL 1168
2026 13:53:38.755928 # ok 296 # SKIP SVE set FPSIMD get SVE for VL 1168
2027 13:53:38.756127 # ok 297 Set SVE VL 1184
2028 13:53:38.756335 # ok 298 # SKIP SVE set SVE get SVE for VL 1184
2029 13:53:38.756537 # ok 299 # SKIP SVE set SVE get FPSIMD for VL 1184
2030 13:53:38.756719 # ok 300 # SKIP SVE set FPSIMD get SVE for VL 1184
2031 13:53:38.756928 # ok 301 Set SVE VL 1200
2032 13:53:38.757117 # ok 302 # SKIP SVE set SVE get SVE for VL 1200
2033 13:53:38.757283 # ok 303 # SKIP SVE set SVE get FPSIMD for VL 1200
2034 13:53:38.757444 # ok 304 # SKIP SVE set FPSIMD get SVE for VL 1200
2035 13:53:38.757602 # ok 305 Set SVE VL 1216
2036 13:53:38.757777 # ok 306 # SKIP SVE set SVE get SVE for VL 1216
2037 13:53:38.757941 # ok 307 # SKIP SVE set SVE get FPSIMD for VL 1216
2038 13:53:38.758097 # ok 308 # SKIP SVE set FPSIMD get SVE for VL 1216
2039 13:53:38.758258 # ok 309 Set SVE VL 1232
2040 13:53:38.758402 # ok 310 # SKIP SVE set SVE get SVE for VL 1232
2041 13:53:38.758576 # ok 311 # SKIP SVE set SVE get FPSIMD for VL 1232
2042 13:53:38.758799 # ok 312 # SKIP SVE set FPSIMD get SVE for VL 1232
2043 13:53:38.758938 # ok 313 Set SVE VL 1248
2044 13:53:38.759057 # ok 314 # SKIP SVE set SVE get SVE for VL 1248
2045 13:53:38.759176 # ok 315 # SKIP SVE set SVE get FPSIMD for VL 1248
2046 13:53:38.759293 # ok 316 # SKIP SVE set FPSIMD get SVE for VL 1248
2047 13:53:38.759408 # ok 317 Set SVE VL 1264
2048 13:53:38.759522 # ok 318 # SKIP SVE set SVE get SVE for VL 1264
2049 13:53:38.759635 # ok 319 # SKIP SVE set SVE get FPSIMD for VL 1264
2050 13:53:38.759751 # ok 320 # SKIP SVE set FPSIMD get SVE for VL 1264
2051 13:53:38.759865 # ok 321 Set SVE VL 1280
2052 13:53:38.759981 # ok 322 # SKIP SVE set SVE get SVE for VL 1280
2053 13:53:38.760096 # ok 323 # SKIP SVE set SVE get FPSIMD for VL 1280
2054 13:53:38.760211 # ok 324 # SKIP SVE set FPSIMD get SVE for VL 1280
2055 13:53:38.760326 # ok 325 Set SVE VL 1296
2056 13:53:38.760440 # ok 326 # SKIP SVE set SVE get SVE for VL 1296
2057 13:53:38.760556 # ok 327 # SKIP SVE set SVE get FPSIMD for VL 1296
2058 13:53:38.760670 # ok 328 # SKIP SVE set FPSIMD get SVE for VL 1296
2059 13:53:38.760785 # ok 329 Set SVE VL 1312
2060 13:53:38.760899 # ok 330 # SKIP SVE set SVE get SVE for VL 1312
2061 13:53:38.761018 # ok 331 # SKIP SVE set SVE get FPSIMD for VL 1312
2062 13:53:38.767059 # ok 332 # SKIP SVE set FPSIMD get SVE for VL 1312
2063 13:53:38.767262 # ok 333 Set SVE VL 1328
2064 13:53:38.767664 # ok 334 # SKIP SVE set SVE get SVE for VL 1328
2065 13:53:38.767851 # ok 335 # SKIP SVE set SVE get FPSIMD for VL 1328
2066 13:53:38.768022 # ok 336 # SKIP SVE set FPSIMD get SVE for VL 1328
2067 13:53:38.768219 # ok 337 Set SVE VL 1344
2068 13:53:38.768415 # ok 338 # SKIP SVE set SVE get SVE for VL 1344
2069 13:53:38.768589 # ok 339 # SKIP SVE set SVE get FPSIMD for VL 1344
2070 13:53:38.768791 # ok 340 # SKIP SVE set FPSIMD get SVE for VL 1344
2071 13:53:38.768955 # ok 341 Set SVE VL 1360
2072 13:53:38.769116 # ok 342 # SKIP SVE set SVE get SVE for VL 1360
2073 13:53:38.769276 # ok 343 # SKIP SVE set SVE get FPSIMD for VL 1360
2074 13:53:38.769423 # ok 344 # SKIP SVE set FPSIMD get SVE for VL 1360
2075 13:53:38.769572 # ok 345 Set SVE VL 1376
2076 13:53:38.769738 # ok 346 # SKIP SVE set SVE get SVE for VL 1376
2077 13:53:38.769887 # ok 347 # SKIP SVE set SVE get FPSIMD for VL 1376
2078 13:53:38.770044 # ok 348 # SKIP SVE set FPSIMD get SVE for VL 1376
2079 13:53:38.770249 # ok 349 Set SVE VL 1392
2080 13:53:38.770414 # ok 350 # SKIP SVE set SVE get SVE for VL 1392
2081 13:53:38.770584 # ok 351 # SKIP SVE set SVE get FPSIMD for VL 1392
2082 13:53:38.770734 # ok 352 # SKIP SVE set FPSIMD get SVE for VL 1392
2083 13:53:38.770852 # ok 353 Set SVE VL 1408
2084 13:53:38.770968 # ok 354 # SKIP SVE set SVE get SVE for VL 1408
2085 13:53:38.771101 # ok 355 # SKIP SVE set SVE get FPSIMD for VL 1408
2086 13:53:38.771253 # ok 356 # SKIP SVE set FPSIMD get SVE for VL 1408
2087 13:53:38.771372 # ok 357 Set SVE VL 1424
2088 13:53:38.771487 # ok 358 # SKIP SVE set SVE get SVE for VL 1424
2089 13:53:38.771602 # ok 359 # SKIP SVE set SVE get FPSIMD for VL 1424
2090 13:53:38.771715 # ok 360 # SKIP SVE set FPSIMD get SVE for VL 1424
2091 13:53:38.771829 # ok 361 Set SVE VL 1440
2092 13:53:38.771942 # ok 362 # SKIP SVE set SVE get SVE for VL 1440
2093 13:53:38.772087 # ok 363 # SKIP SVE set SVE get FPSIMD for VL 1440
2094 13:53:38.772213 # ok 364 # SKIP SVE set FPSIMD get SVE for VL 1440
2095 13:53:38.772330 # ok 365 Set SVE VL 1456
2096 13:53:38.775010 # ok 366 # SKIP SVE set SVE get SVE for VL 1456
2097 13:53:38.775374 # ok 367 # SKIP SVE set SVE get FPSIMD for VL 1456
2098 13:53:38.775542 # ok 368 # SKIP SVE set FPSIMD get SVE for VL 1456
2099 13:53:38.775726 # ok 369 Set SVE VL 1472
2100 13:53:38.775946 # ok 370 # SKIP SVE set SVE get SVE for VL 1472
2101 13:53:38.776214 # ok 371 # SKIP SVE set SVE get FPSIMD for VL 1472
2102 13:53:38.776443 # ok 372 # SKIP SVE set FPSIMD get SVE for VL 1472
2103 13:53:38.776696 # ok 373 Set SVE VL 1488
2104 13:53:38.776963 # ok 374 # SKIP SVE set SVE get SVE for VL 1488
2105 13:53:38.777167 # ok 375 # SKIP SVE set SVE get FPSIMD for VL 1488
2106 13:53:38.777383 # ok 376 # SKIP SVE set FPSIMD get SVE for VL 1488
2107 13:53:38.777584 # ok 377 Set SVE VL 1504
2108 13:53:38.777812 # ok 378 # SKIP SVE set SVE get SVE for VL 1504
2109 13:53:38.778107 # ok 379 # SKIP SVE set SVE get FPSIMD for VL 1504
2110 13:53:38.778318 # ok 380 # SKIP SVE set FPSIMD get SVE for VL 1504
2111 13:53:38.778490 # ok 381 Set SVE VL 1520
2112 13:53:38.778669 # ok 382 # SKIP SVE set SVE get SVE for VL 1520
2113 13:53:38.778829 # ok 383 # SKIP SVE set SVE get FPSIMD for VL 1520
2114 13:53:38.778963 # ok 384 # SKIP SVE set FPSIMD get SVE for VL 1520
2115 13:53:38.779124 # ok 385 Set SVE VL 1536
2116 13:53:38.779256 # ok 386 # SKIP SVE set SVE get SVE for VL 1536
2117 13:53:38.779374 # ok 387 # SKIP SVE set SVE get FPSIMD for VL 1536
2118 13:53:38.779490 # ok 388 # SKIP SVE set FPSIMD get SVE for VL 1536
2119 13:53:38.779607 # ok 389 Set SVE VL 1552
2120 13:53:38.779720 # ok 390 # SKIP SVE set SVE get SVE for VL 1552
2121 13:53:38.779866 # ok 391 # SKIP SVE set SVE get FPSIMD for VL 1552
2122 13:53:38.779991 # ok 392 # SKIP SVE set FPSIMD get SVE for VL 1552
2123 13:53:38.780106 # ok 393 Set SVE VL 1568
2124 13:53:38.780224 # ok 394 # SKIP SVE set SVE get SVE for VL 1568
2125 13:53:38.780343 # ok 395 # SKIP SVE set SVE get FPSIMD for VL 1568
2126 13:53:38.782968 # ok 396 # SKIP SVE set FPSIMD get SVE for VL 1568
2127 13:53:38.783336 # ok 397 Set SVE VL 1584
2128 13:53:38.783439 # ok 398 # SKIP SVE set SVE get SVE for VL 1584
2129 13:53:38.783525 # ok 399 # SKIP SVE set SVE get FPSIMD for VL 1584
2130 13:53:38.783627 # ok 400 # SKIP SVE set FPSIMD get SVE for VL 1584
2131 13:53:38.783701 # ok 401 Set SVE VL 1600
2132 13:53:38.783794 # ok 402 # SKIP SVE set SVE get SVE for VL 1600
2133 13:53:38.783894 # ok 403 # SKIP SVE set SVE get FPSIMD for VL 1600
2134 13:53:38.784007 # ok 404 # SKIP SVE set FPSIMD get SVE for VL 1600
2135 13:53:38.784107 # ok 405 Set SVE VL 1616
2136 13:53:38.784206 # ok 406 # SKIP SVE set SVE get SVE for VL 1616
2137 13:53:38.784329 # ok 407 # SKIP SVE set SVE get FPSIMD for VL 1616
2138 13:53:38.784420 # ok 408 # SKIP SVE set FPSIMD get SVE for VL 1616
2139 13:53:38.784526 # ok 409 Set SVE VL 1632
2140 13:53:38.784652 # ok 410 # SKIP SVE set SVE get SVE for VL 1632
2141 13:53:38.784759 # ok 411 # SKIP SVE set SVE get FPSIMD for VL 1632
2142 13:53:38.784876 # ok 412 # SKIP SVE set FPSIMD get SVE for VL 1632
2143 13:53:38.784980 # ok 413 Set SVE VL 1648
2144 13:53:38.785094 # ok 414 # SKIP SVE set SVE get SVE for VL 1648
2145 13:53:38.785184 # ok 415 # SKIP SVE set SVE get FPSIMD for VL 1648
2146 13:53:38.785287 # ok 416 # SKIP SVE set FPSIMD get SVE for VL 1648
2147 13:53:38.785366 # ok 417 Set SVE VL 1664
2148 13:53:38.785455 # ok 418 # SKIP SVE set SVE get SVE for VL 1664
2149 13:53:38.785566 # ok 419 # SKIP SVE set SVE get FPSIMD for VL 1664
2150 13:53:38.785686 # ok 420 # SKIP SVE set FPSIMD get SVE for VL 1664
2151 13:53:38.785797 # ok 421 Set SVE VL 1680
2152 13:53:38.785901 # ok 422 # SKIP SVE set SVE get SVE for VL 1680
2153 13:53:38.785989 # ok 423 # SKIP SVE set SVE get FPSIMD for VL 1680
2154 13:53:38.786123 # ok 424 # SKIP SVE set FPSIMD get SVE for VL 1680
2155 13:53:38.786247 # ok 425 Set SVE VL 1696
2156 13:53:38.786552 # ok 426 # SKIP SVE set SVE get SVE for VL 1696
2157 13:53:38.786650 # ok 427 # SKIP SVE set SVE get FPSIMD for VL 1696
2158 13:53:38.786756 # ok 428 # SKIP SVE set FPSIMD get SVE for VL 1696
2159 13:53:38.791036 # ok 429 Set SVE VL 1712
2160 13:53:38.791153 # ok 430 # SKIP SVE set SVE get SVE for VL 1712
2161 13:53:38.791510 # ok 431 # SKIP SVE set SVE get FPSIMD for VL 1712
2162 13:53:38.791704 # ok 432 # SKIP SVE set FPSIMD get SVE for VL 1712
2163 13:53:38.791873 # ok 433 Set SVE VL 1728
2164 13:53:38.792062 # ok 434 # SKIP SVE set SVE get SVE for VL 1728
2165 13:53:38.792236 # ok 435 # SKIP SVE set SVE get FPSIMD for VL 1728
2166 13:53:38.792393 # ok 436 # SKIP SVE set FPSIMD get SVE for VL 1728
2167 13:53:38.792562 # ok 437 Set SVE VL 1744
2168 13:53:38.792702 # ok 438 # SKIP SVE set SVE get SVE for VL 1744
2169 13:53:38.792887 # ok 439 # SKIP SVE set SVE get FPSIMD for VL 1744
2170 13:53:38.793100 # ok 440 # SKIP SVE set FPSIMD get SVE for VL 1744
2171 13:53:38.793278 # ok 441 Set SVE VL 1760
2172 13:53:38.793440 # ok 442 # SKIP SVE set SVE get SVE for VL 1760
2173 13:53:38.793625 # ok 443 # SKIP SVE set SVE get FPSIMD for VL 1760
2174 13:53:38.793814 # ok 444 # SKIP SVE set FPSIMD get SVE for VL 1760
2175 13:53:38.794018 # ok 445 Set SVE VL 1776
2176 13:53:38.794170 # ok 446 # SKIP SVE set SVE get SVE for VL 1776
2177 13:53:38.794284 # ok 447 # SKIP SVE set SVE get FPSIMD for VL 1776
2178 13:53:38.794388 # ok 448 # SKIP SVE set FPSIMD get SVE for VL 1776
2179 13:53:38.794498 # ok 449 Set SVE VL 1792
2180 13:53:38.794645 # ok 450 # SKIP SVE set SVE get SVE for VL 1792
2181 13:53:38.794743 # ok 451 # SKIP SVE set SVE get FPSIMD for VL 1792
2182 13:53:38.794834 # ok 452 # SKIP SVE set FPSIMD get SVE for VL 1792
2183 13:53:38.794922 # ok 453 Set SVE VL 1808
2184 13:53:38.795015 # ok 454 # SKIP SVE set SVE get SVE for VL 1808
2185 13:53:38.795101 # ok 455 # SKIP SVE set SVE get FPSIMD for VL 1808
2186 13:53:38.795188 # ok 456 # SKIP SVE set FPSIMD get SVE for VL 1808
2187 13:53:38.795278 # ok 457 Set SVE VL 1824
2188 13:53:38.795365 # ok 458 # SKIP SVE set SVE get SVE for VL 1824
2189 13:53:38.795451 # ok 459 # SKIP SVE set SVE get FPSIMD for VL 1824
2190 13:53:38.795537 # ok 460 # SKIP SVE set FPSIMD get SVE for VL 1824
2191 13:53:38.795623 # ok 461 Set SVE VL 1840
2192 13:53:38.795707 # ok 462 # SKIP SVE set SVE get SVE for VL 1840
2193 13:53:38.795794 # ok 463 # SKIP SVE set SVE get FPSIMD for VL 1840
2194 13:53:38.798959 # ok 464 # SKIP SVE set FPSIMD get SVE for VL 1840
2195 13:53:38.799066 # ok 465 Set SVE VL 1856
2196 13:53:38.799372 # ok 466 # SKIP SVE set SVE get SVE for VL 1856
2197 13:53:38.799506 # ok 467 # SKIP SVE set SVE get FPSIMD for VL 1856
2198 13:53:38.799626 # ok 468 # SKIP SVE set FPSIMD get SVE for VL 1856
2199 13:53:38.799814 # ok 469 Set SVE VL 1872
2200 13:53:38.799988 # ok 470 # SKIP SVE set SVE get SVE for VL 1872
2201 13:53:38.800141 # ok 471 # SKIP SVE set SVE get FPSIMD for VL 1872
2202 13:53:38.800303 # ok 472 # SKIP SVE set FPSIMD get SVE for VL 1872
2203 13:53:38.800463 # ok 473 Set SVE VL 1888
2204 13:53:38.800605 # ok 474 # SKIP SVE set SVE get SVE for VL 1888
2205 13:53:38.800703 # ok 475 # SKIP SVE set SVE get FPSIMD for VL 1888
2206 13:53:38.800793 # ok 476 # SKIP SVE set FPSIMD get SVE for VL 1888
2207 13:53:38.800881 # ok 477 Set SVE VL 1904
2208 13:53:38.800967 # ok 478 # SKIP SVE set SVE get SVE for VL 1904
2209 13:53:38.801054 # ok 479 # SKIP SVE set SVE get FPSIMD for VL 1904
2210 13:53:38.807103 # ok 480 # SKIP SVE set FPSIMD get SVE for VL 1904
2211 13:53:38.807261 # ok 481 Set SVE VL 1920
2212 13:53:38.807408 # ok 482 # SKIP SVE set SVE get SVE for VL 1920
2213 13:53:38.807581 # ok 483 # SKIP SVE set SVE get FPSIMD for VL 1920
2214 13:53:38.807715 # ok 484 # SKIP SVE set FPSIMD get SVE for VL 1920
2215 13:53:38.807855 # ok 485 Set SVE VL 1936
2216 13:53:38.807989 # ok 486 # SKIP SVE set SVE get SVE for VL 1936
2217 13:53:38.808143 # ok 487 # SKIP SVE set SVE get FPSIMD for VL 1936
2218 13:53:38.808289 # ok 488 # SKIP SVE set FPSIMD get SVE for VL 1936
2219 13:53:38.808449 # ok 489 Set SVE VL 1952
2220 13:53:38.808595 # ok 490 # SKIP SVE set SVE get SVE for VL 1952
2221 13:53:38.808743 # ok 491 # SKIP SVE set SVE get FPSIMD for VL 1952
2222 13:53:38.808874 # ok 492 # SKIP SVE set FPSIMD get SVE for VL 1952
2223 13:53:38.809030 # ok 493 Set SVE VL 1968
2224 13:53:38.809175 # ok 494 # SKIP SVE set SVE get SVE for VL 1968
2225 13:53:38.809310 # ok 495 # SKIP SVE set SVE get FPSIMD for VL 1968
2226 13:53:38.809435 # ok 496 # SKIP SVE set FPSIMD get SVE for VL 1968
2227 13:53:38.809566 # ok 497 Set SVE VL 1984
2228 13:53:38.809687 # ok 498 # SKIP SVE set SVE get SVE for VL 1984
2229 13:53:38.809814 # ok 499 # SKIP SVE set SVE get FPSIMD for VL 1984
2230 13:53:38.809942 # ok 500 # SKIP SVE set FPSIMD get SVE for VL 1984
2231 13:53:38.810084 # ok 501 Set SVE VL 2000
2232 13:53:38.810233 # ok 502 # SKIP SVE set SVE get SVE for VL 2000
2233 13:53:38.810392 # ok 503 # SKIP SVE set SVE get FPSIMD for VL 2000
2234 13:53:38.810541 # ok 504 # SKIP SVE set FPSIMD get SVE for VL 2000
2235 13:53:38.810660 # ok 505 Set SVE VL 2016
2236 13:53:38.810752 # ok 506 # SKIP SVE set SVE get SVE for VL 2016
2237 13:53:38.810841 # ok 507 # SKIP SVE set SVE get FPSIMD for VL 2016
2238 13:53:38.810930 # ok 508 # SKIP SVE set FPSIMD get SVE for VL 2016
2239 13:53:38.811019 # ok 509 Set SVE VL 2032
2240 13:53:38.811107 # ok 510 # SKIP SVE set SVE get SVE for VL 2032
2241 13:53:38.811216 # ok 511 # SKIP SVE set SVE get FPSIMD for VL 2032
2242 13:53:38.811314 # ok 512 # SKIP SVE set FPSIMD get SVE for VL 2032
2243 13:53:38.811405 # ok 513 Set SVE VL 2048
2244 13:53:38.814162 # ok 514 # SKIP SVE set SVE get SVE for VL 2048
2245 13:53:38.814485 # ok 515 # SKIP SVE set SVE get FPSIMD for VL 2048
2246 13:53:38.814626 # ok 516 # SKIP SVE set FPSIMD get SVE for VL 2048
2247 13:53:38.814755 # ok 517 Set SVE VL 2064
2248 13:53:38.814849 # ok 518 # SKIP SVE set SVE get SVE for VL 2064
2249 13:53:38.814948 # ok 519 # SKIP SVE set SVE get FPSIMD for VL 2064
2250 13:53:38.815055 # ok 520 # SKIP SVE set FPSIMD get SVE for VL 2064
2251 13:53:38.815197 # ok 521 Set SVE VL 2080
2252 13:53:38.815316 # ok 522 # SKIP SVE set SVE get SVE for VL 2080
2253 13:53:38.815476 # ok 523 # SKIP SVE set SVE get FPSIMD for VL 2080
2254 13:53:38.815599 # ok 524 # SKIP SVE set FPSIMD get SVE for VL 2080
2255 13:53:38.815714 # ok 525 Set SVE VL 2096
2256 13:53:38.815842 # ok 526 # SKIP SVE set SVE get SVE for VL 2096
2257 13:53:38.815986 # ok 527 # SKIP SVE set SVE get FPSIMD for VL 2096
2258 13:53:38.816158 # ok 528 # SKIP SVE set FPSIMD get SVE for VL 2096
2259 13:53:38.816316 # ok 529 Set SVE VL 2112
2260 13:53:38.816432 # ok 530 # SKIP SVE set SVE get SVE for VL 2112
2261 13:53:38.816559 # ok 531 # SKIP SVE set SVE get FPSIMD for VL 2112
2262 13:53:38.816671 # ok 532 # SKIP SVE set FPSIMD get SVE for VL 2112
2263 13:53:38.816811 # ok 533 Set SVE VL 2128
2264 13:53:38.816969 # ok 534 # SKIP SVE set SVE get SVE for VL 2128
2265 13:53:38.817117 # ok 535 # SKIP SVE set SVE get FPSIMD for VL 2128
2266 13:53:38.817249 # ok 536 # SKIP SVE set FPSIMD get SVE for VL 2128
2267 13:53:38.817380 # ok 537 Set SVE VL 2144
2268 13:53:38.817523 # ok 538 # SKIP SVE set SVE get SVE for VL 2144
2269 13:53:38.818109 # ok 539 # SKIP SVE set SVE get FPSIMD for VL 2144
2270 13:53:38.818264 # ok 540 # SKIP SVE set FPSIMD get SVE for VL 2144
2271 13:53:38.818412 # ok 541 Set SVE VL 2160
2272 13:53:38.818593 # ok 542 # SKIP SVE set SVE get SVE for VL 2160
2273 13:53:38.818751 # ok 543 # SKIP SVE set SVE get FPSIMD for VL 2160
2274 13:53:38.818891 # ok 544 # SKIP SVE set FPSIMD get SVE for VL 2160
2275 13:53:38.819051 # ok 545 Set SVE VL 2176
2276 13:53:38.819190 # ok 546 # SKIP SVE set SVE get SVE for VL 2176
2277 13:53:38.819332 # ok 547 # SKIP SVE set SVE get FPSIMD for VL 2176
2278 13:53:38.819488 # ok 548 # SKIP SVE set FPSIMD get SVE for VL 2176
2279 13:53:38.819624 # ok 549 Set SVE VL 2192
2280 13:53:38.819748 # ok 550 # SKIP SVE set SVE get SVE for VL 2192
2281 13:53:38.819868 # ok 551 # SKIP SVE set SVE get FPSIMD for VL 2192
2282 13:53:38.819994 # ok 552 # SKIP SVE set FPSIMD get SVE for VL 2192
2283 13:53:38.820116 # ok 553 Set SVE VL 2208
2284 13:53:38.820285 # ok 554 # SKIP SVE set SVE get SVE for VL 2208
2285 13:53:38.820429 # ok 555 # SKIP SVE set SVE get FPSIMD for VL 2208
2286 13:53:38.820584 # ok 556 # SKIP SVE set FPSIMD get SVE for VL 2208
2287 13:53:38.820737 # ok 557 Set SVE VL 2224
2288 13:53:38.821083 # ok 558 # SKIP SVE set SVE get SVE for VL 2224
2289 13:53:38.821177 # ok 559 # SKIP SVE set SVE get FPSIMD for VL 2224
2290 13:53:38.821248 # ok 560 # SKIP SVE set FPSIMD get SVE for VL 2224
2291 13:53:38.821335 # ok 561 Set SVE VL 2240
2292 13:53:38.821414 # ok 562 # SKIP SVE set SVE get SVE for VL 2240
2293 13:53:38.821489 # ok 563 # SKIP SVE set SVE get FPSIMD for VL 2240
2294 13:53:38.821563 # ok 564 # SKIP SVE set FPSIMD get SVE for VL 2240
2295 13:53:38.821628 # ok 565 Set SVE VL 2256
2296 13:53:38.821711 # ok 566 # SKIP SVE set SVE get SVE for VL 2256
2297 13:53:38.821777 # ok 567 # SKIP SVE set SVE get FPSIMD for VL 2256
2298 13:53:38.821844 # ok 568 # SKIP SVE set FPSIMD get SVE for VL 2256
2299 13:53:38.821914 # ok 569 Set SVE VL 2272
2300 13:53:38.821979 # ok 570 # SKIP SVE set SVE get SVE for VL 2272
2301 13:53:38.822046 # ok 571 # SKIP SVE set SVE get FPSIMD for VL 2272
2302 13:53:38.822120 # ok 572 # SKIP SVE set FPSIMD get SVE for VL 2272
2303 13:53:38.822186 # ok 573 Set SVE VL 2288
2304 13:53:38.822258 # ok 574 # SKIP SVE set SVE get SVE for VL 2288
2305 13:53:38.822331 # ok 575 # SKIP SVE set SVE get FPSIMD for VL 2288
2306 13:53:38.822425 # ok 576 # SKIP SVE set FPSIMD get SVE for VL 2288
2307 13:53:38.822503 # ok 577 Set SVE VL 2304
2308 13:53:38.822588 # ok 578 # SKIP SVE set SVE get SVE for VL 2304
2309 13:53:38.822680 # ok 579 # SKIP SVE set SVE get FPSIMD for VL 2304
2310 13:53:38.822765 # ok 580 # SKIP SVE set FPSIMD get SVE for VL 2304
2311 13:53:38.822835 # ok 581 Set SVE VL 2320
2312 13:53:38.822908 # ok 582 # SKIP SVE set SVE get SVE for VL 2320
2313 13:53:38.822987 # ok 583 # SKIP SVE set SVE get FPSIMD for VL 2320
2314 13:53:38.823069 # ok 584 # SKIP SVE set FPSIMD get SVE for VL 2320
2315 13:53:38.823144 # ok 585 Set SVE VL 2336
2316 13:53:38.823219 # ok 586 # SKIP SVE set SVE get SVE for VL 2336
2317 13:53:38.823296 # ok 587 # SKIP SVE set SVE get FPSIMD for VL 2336
2318 13:53:38.823374 # ok 588 # SKIP SVE set FPSIMD get SVE for VL 2336
2319 13:53:38.823453 # ok 589 Set SVE VL 2352
2320 13:53:38.823530 # ok 590 # SKIP SVE set SVE get SVE for VL 2352
2321 13:53:38.823613 # ok 591 # SKIP SVE set SVE get FPSIMD for VL 2352
2322 13:53:38.823722 # ok 592 # SKIP SVE set FPSIMD get SVE for VL 2352
2323 13:53:38.823822 # ok 593 Set SVE VL 2368
2324 13:53:38.823922 # ok 594 # SKIP SVE set SVE get SVE for VL 2368
2325 13:53:38.824006 # ok 595 # SKIP SVE set SVE get FPSIMD for VL 2368
2326 13:53:38.824096 # ok 596 # SKIP SVE set FPSIMD get SVE for VL 2368
2327 13:53:38.824191 # ok 597 Set SVE VL 2384
2328 13:53:38.824273 # ok 598 # SKIP SVE set SVE get SVE for VL 2384
2329 13:53:38.824350 # ok 599 # SKIP SVE set SVE get FPSIMD for VL 2384
2330 13:53:38.824428 # ok 600 # SKIP SVE set FPSIMD get SVE for VL 2384
2331 13:53:38.824495 # ok 601 Set SVE VL 2400
2332 13:53:38.825120 # ok 602 # SKIP SVE set SVE get SVE for VL 2400
2333 13:53:38.825218 # ok 603 # SKIP SVE set SVE get FPSIMD for VL 2400
2334 13:53:38.825301 # ok 604 # SKIP SVE set FPSIMD get SVE for VL 2400
2335 13:53:38.825397 # ok 605 Set SVE VL 2416
2336 13:53:38.825503 # ok 606 # SKIP SVE set SVE get SVE for VL 2416
2337 13:53:38.825585 # ok 607 # SKIP SVE set SVE get FPSIMD for VL 2416
2338 13:53:38.825666 # ok 608 # SKIP SVE set FPSIMD get SVE for VL 2416
2339 13:53:38.825742 # ok 609 Set SVE VL 2432
2340 13:53:38.825810 # ok 610 # SKIP SVE set SVE get SVE for VL 2432
2341 13:53:38.825883 # ok 611 # SKIP SVE set SVE get FPSIMD for VL 2432
2342 13:53:38.825960 # ok 612 # SKIP SVE set FPSIMD get SVE for VL 2432
2343 13:53:38.826033 # ok 613 Set SVE VL 2448
2344 13:53:38.826129 # ok 614 # SKIP SVE set SVE get SVE for VL 2448
2345 13:53:38.826218 # ok 615 # SKIP SVE set SVE get FPSIMD for VL 2448
2346 13:53:38.826295 # ok 616 # SKIP SVE set FPSIMD get SVE for VL 2448
2347 13:53:38.826367 # ok 617 Set SVE VL 2464
2348 13:53:38.826440 # ok 618 # SKIP SVE set SVE get SVE for VL 2464
2349 13:53:38.826528 # ok 619 # SKIP SVE set SVE get FPSIMD for VL 2464
2350 13:53:38.826597 # ok 620 # SKIP SVE set FPSIMD get SVE for VL 2464
2351 13:53:38.826662 # ok 621 Set SVE VL 2480
2352 13:53:38.826725 # ok 622 # SKIP SVE set SVE get SVE for VL 2480
2353 13:53:38.826801 # ok 623 # SKIP SVE set SVE get FPSIMD for VL 2480
2354 13:53:38.826864 # ok 624 # SKIP SVE set FPSIMD get SVE for VL 2480
2355 13:53:38.826925 # ok 625 Set SVE VL 2496
2356 13:53:38.826997 # ok 626 # SKIP SVE set SVE get SVE for VL 2496
2357 13:53:38.827066 # ok 627 # SKIP SVE set SVE get FPSIMD for VL 2496
2358 13:53:38.827149 # ok 628 # SKIP SVE set FPSIMD get SVE for VL 2496
2359 13:53:38.827217 # ok 629 Set SVE VL 2512
2360 13:53:38.827292 # ok 630 # SKIP SVE set SVE get SVE for VL 2512
2361 13:53:38.827366 # ok 631 # SKIP SVE set SVE get FPSIMD for VL 2512
2362 13:53:38.827454 # ok 632 # SKIP SVE set FPSIMD get SVE for VL 2512
2363 13:53:38.827546 # ok 633 Set SVE VL 2528
2364 13:53:38.827630 # ok 634 # SKIP SVE set SVE get SVE for VL 2528
2365 13:53:38.827722 # ok 635 # SKIP SVE set SVE get FPSIMD for VL 2528
2366 13:53:38.827815 # ok 636 # SKIP SVE set FPSIMD get SVE for VL 2528
2367 13:53:38.827899 # ok 637 Set SVE VL 2544
2368 13:53:38.827986 # ok 638 # SKIP SVE set SVE get SVE for VL 2544
2369 13:53:38.828083 # ok 639 # SKIP SVE set SVE get FPSIMD for VL 2544
2370 13:53:38.828207 # ok 640 # SKIP SVE set FPSIMD get SVE for VL 2544
2371 13:53:38.828311 # ok 641 Set SVE VL 2560
2372 13:53:38.828403 # ok 642 # SKIP SVE set SVE get SVE for VL 2560
2373 13:53:38.828525 # ok 643 # SKIP SVE set SVE get FPSIMD for VL 2560
2374 13:53:38.828632 # ok 644 # SKIP SVE set FPSIMD get SVE for VL 2560
2375 13:53:38.828718 # ok 645 Set SVE VL 2576
2376 13:53:38.829443 # ok 646 # SKIP SVE set SVE get SVE for VL 2576
2377 13:53:38.829533 # ok 647 # SKIP SVE set SVE get FPSIMD for VL 2576
2378 13:53:38.829616 # ok 648 # SKIP SVE set FPSIMD get SVE for VL 2576
2379 13:53:38.829719 # ok 649 Set SVE VL 2592
2380 13:53:38.829820 # ok 650 # SKIP SVE set SVE get SVE for VL 2592
2381 13:53:38.829904 # ok 651 # SKIP SVE set SVE get FPSIMD for VL 2592
2382 13:53:38.829995 # ok 652 # SKIP SVE set FPSIMD get SVE for VL 2592
2383 13:53:38.830072 # ok 653 Set SVE VL 2608
2384 13:53:38.830147 # ok 654 # SKIP SVE set SVE get SVE for VL 2608
2385 13:53:38.830262 # ok 655 # SKIP SVE set SVE get FPSIMD for VL 2608
2386 13:53:38.830352 # ok 656 # SKIP SVE set FPSIMD get SVE for VL 2608
2387 13:53:38.830427 # ok 657 Set SVE VL 2624
2388 13:53:38.830520 # ok 658 # SKIP SVE set SVE get SVE for VL 2624
2389 13:53:38.830602 # ok 659 # SKIP SVE set SVE get FPSIMD for VL 2624
2390 13:53:38.830680 # ok 660 # SKIP SVE set FPSIMD get SVE for VL 2624
2391 13:53:38.830763 # ok 661 Set SVE VL 2640
2392 13:53:38.830861 # ok 662 # SKIP SVE set SVE get SVE for VL 2640
2393 13:53:38.830946 # ok 663 # SKIP SVE set SVE get FPSIMD for VL 2640
2394 13:53:38.831015 # ok 664 # SKIP SVE set FPSIMD get SVE for VL 2640
2395 13:53:38.831074 # ok 665 Set SVE VL 2656
2396 13:53:38.831134 # ok 666 # SKIP SVE set SVE get SVE for VL 2656
2397 13:53:38.842078 # ok 667 # SKIP SVE set SVE get FPSIMD for VL 2656
2398 13:53:38.842469 # ok 668 # SKIP SVE set FPSIMD get SVE for VL 2656
2399 13:53:38.842554 # ok 669 Set SVE VL 2672
2400 13:53:38.842619 # ok 670 # SKIP SVE set SVE get SVE for VL 2672
2401 13:53:38.842681 # ok 671 # SKIP SVE set SVE get FPSIMD for VL 2672
2402 13:53:38.842756 # ok 672 # SKIP SVE set FPSIMD get SVE for VL 2672
2403 13:53:38.843068 # ok 673 Set SVE VL 2688
2404 13:53:38.843162 # ok 674 # SKIP SVE set SVE get SVE for VL 2688
2405 13:53:38.843244 # ok 675 # SKIP SVE set SVE get FPSIMD for VL 2688
2406 13:53:38.843340 # ok 676 # SKIP SVE set FPSIMD get SVE for VL 2688
2407 13:53:38.843417 # ok 677 Set SVE VL 2704
2408 13:53:38.843513 # ok 678 # SKIP SVE set SVE get SVE for VL 2704
2409 13:53:38.843602 # ok 679 # SKIP SVE set SVE get FPSIMD for VL 2704
2410 13:53:38.843696 # ok 680 # SKIP SVE set FPSIMD get SVE for VL 2704
2411 13:53:38.843772 # ok 681 Set SVE VL 2720
2412 13:53:38.843863 # ok 682 # SKIP SVE set SVE get SVE for VL 2720
2413 13:53:38.843954 # ok 683 # SKIP SVE set SVE get FPSIMD for VL 2720
2414 13:53:38.844231 # ok 684 # SKIP SVE set FPSIMD get SVE for VL 2720
2415 13:53:38.844331 # ok 685 Set SVE VL 2736
2416 13:53:38.844427 # ok 686 # SKIP SVE set SVE get SVE for VL 2736
2417 13:53:38.844504 # ok 687 # SKIP SVE set SVE get FPSIMD for VL 2736
2418 13:53:38.844609 # ok 688 # SKIP SVE set FPSIMD get SVE for VL 2736
2419 13:53:38.844703 # ok 689 Set SVE VL 2752
2420 13:53:38.844795 # ok 690 # SKIP SVE set SVE get SVE for VL 2752
2421 13:53:38.844895 # ok 691 # SKIP SVE set SVE get FPSIMD for VL 2752
2422 13:53:38.844978 # ok 692 # SKIP SVE set FPSIMD get SVE for VL 2752
2423 13:53:38.845055 # ok 693 Set SVE VL 2768
2424 13:53:38.845145 # ok 694 # SKIP SVE set SVE get SVE for VL 2768
2425 13:53:38.845238 # ok 695 # SKIP SVE set SVE get FPSIMD for VL 2768
2426 13:53:38.845344 # ok 696 # SKIP SVE set FPSIMD get SVE for VL 2768
2427 13:53:38.845441 # ok 697 Set SVE VL 2784
2428 13:53:38.845692 # ok 698 # SKIP SVE set SVE get SVE for VL 2784
2429 13:53:38.845793 # ok 699 # SKIP SVE set SVE get FPSIMD for VL 2784
2430 13:53:38.845879 # ok 700 # SKIP SVE set FPSIMD get SVE for VL 2784
2431 13:53:38.845976 # ok 701 Set SVE VL 2800
2432 13:53:38.846075 # ok 702 # SKIP SVE set SVE get SVE for VL 2800
2433 13:53:38.846369 # ok 703 # SKIP SVE set SVE get FPSIMD for VL 2800
2434 13:53:38.846465 # ok 704 # SKIP SVE set FPSIMD get SVE for VL 2800
2435 13:53:38.846580 # ok 705 Set SVE VL 2816
2436 13:53:38.846674 # ok 706 # SKIP SVE set SVE get SVE for VL 2816
2437 13:53:38.846788 # ok 707 # SKIP SVE set SVE get FPSIMD for VL 2816
2438 13:53:38.847097 # ok 708 # SKIP SVE set FPSIMD get SVE for VL 2816
2439 13:53:38.847195 # ok 709 Set SVE VL 2832
2440 13:53:38.847289 # ok 710 # SKIP SVE set SVE get SVE for VL 2832
2441 13:53:38.847388 # ok 711 # SKIP SVE set SVE get FPSIMD for VL 2832
2442 13:53:38.847718 # ok 712 # SKIP SVE set FPSIMD get SVE for VL 2832
2443 13:53:38.847924 # ok 713 Set SVE VL 2848
2444 13:53:38.848128 # ok 714 # SKIP SVE set SVE get SVE for VL 2848
2445 13:53:38.848300 # ok 715 # SKIP SVE set SVE get FPSIMD for VL 2848
2446 13:53:38.848458 # ok 716 # SKIP SVE set FPSIMD get SVE for VL 2848
2447 13:53:38.848622 # ok 717 Set SVE VL 2864
2448 13:53:38.848785 # ok 718 # SKIP SVE set SVE get SVE for VL 2864
2449 13:53:38.848984 # ok 719 # SKIP SVE set SVE get FPSIMD for VL 2864
2450 13:53:38.849152 # ok 720 # SKIP SVE set FPSIMD get SVE for VL 2864
2451 13:53:38.849309 # ok 721 Set SVE VL 2880
2452 13:53:38.849444 # ok 722 # SKIP SVE set SVE get SVE for VL 2880
2453 13:53:38.849569 # ok 723 # SKIP SVE set SVE get FPSIMD for VL 2880
2454 13:53:38.849737 # ok 724 # SKIP SVE set FPSIMD get SVE for VL 2880
2455 13:53:38.849900 # ok 725 Set SVE VL 2896
2456 13:53:38.850058 # ok 726 # SKIP SVE set SVE get SVE for VL 2896
2457 13:53:38.850276 # ok 727 # SKIP SVE set SVE get FPSIMD for VL 2896
2458 13:53:38.850442 # ok 728 # SKIP SVE set FPSIMD get SVE for VL 2896
2459 13:53:38.850609 # ok 729 Set SVE VL 2912
2460 13:53:38.850747 # ok 730 # SKIP SVE set SVE get SVE for VL 2912
2461 13:53:38.850895 # ok 731 # SKIP SVE set SVE get FPSIMD for VL 2912
2462 13:53:38.851044 # ok 732 # SKIP SVE set FPSIMD get SVE for VL 2912
2463 13:53:38.851185 # ok 733 Set SVE VL 2928
2464 13:53:38.851325 # ok 734 # SKIP SVE set SVE get SVE for VL 2928
2465 13:53:38.851453 # ok 735 # SKIP SVE set SVE get FPSIMD for VL 2928
2466 13:53:38.851570 # ok 736 # SKIP SVE set FPSIMD get SVE for VL 2928
2467 13:53:38.851687 # ok 737 Set SVE VL 2944
2468 13:53:38.851804 # ok 738 # SKIP SVE set SVE get SVE for VL 2944
2469 13:53:38.851922 # ok 739 # SKIP SVE set SVE get FPSIMD for VL 2944
2470 13:53:38.852081 # ok 740 # SKIP SVE set FPSIMD get SVE for VL 2944
2471 13:53:38.852253 # ok 741 Set SVE VL 2960
2472 13:53:38.852401 # ok 742 # SKIP SVE set SVE get SVE for VL 2960
2473 13:53:38.852550 # ok 743 # SKIP SVE set SVE get FPSIMD for VL 2960
2474 13:53:38.852702 # ok 744 # SKIP SVE set FPSIMD get SVE for VL 2960
2475 13:53:38.852806 # ok 745 Set SVE VL 2976
2476 13:53:38.852905 # ok 746 # SKIP SVE set SVE get SVE for VL 2976
2477 13:53:38.853018 # ok 747 # SKIP SVE set SVE get FPSIMD for VL 2976
2478 13:53:38.853163 # ok 748 # SKIP SVE set FPSIMD get SVE for VL 2976
2479 13:53:38.853287 # ok 749 Set SVE VL 2992
2480 13:53:38.853404 # ok 750 # SKIP SVE set SVE get SVE for VL 2992
2481 13:53:38.853547 # ok 751 # SKIP SVE set SVE get FPSIMD for VL 2992
2482 13:53:38.853733 # ok 752 # SKIP SVE set FPSIMD get SVE for VL 2992
2483 13:53:38.853888 # ok 753 Set SVE VL 3008
2484 13:53:38.854026 # ok 754 # SKIP SVE set SVE get SVE for VL 3008
2485 13:53:38.854164 # ok 755 # SKIP SVE set SVE get FPSIMD for VL 3008
2486 13:53:38.854472 # ok 756 # SKIP SVE set FPSIMD get SVE for VL 3008
2487 13:53:38.854601 # ok 757 Set SVE VL 3024
2488 13:53:38.854694 # ok 758 # SKIP SVE set SVE get SVE for VL 3024
2489 13:53:38.854783 # ok 759 # SKIP SVE set SVE get FPSIMD for VL 3024
2490 13:53:38.854867 # ok 760 # SKIP SVE set FPSIMD get SVE for VL 3024
2491 13:53:38.854951 # ok 761 Set SVE VL 3040
2492 13:53:38.855032 # ok 762 # SKIP SVE set SVE get SVE for VL 3040
2493 13:53:38.855115 # ok 763 # SKIP SVE set SVE get FPSIMD for VL 3040
2494 13:53:38.855195 # ok 764 # SKIP SVE set FPSIMD get SVE for VL 3040
2495 13:53:38.855281 # ok 765 Set SVE VL 3056
2496 13:53:38.855379 # ok 766 # SKIP SVE set SVE get SVE for VL 3056
2497 13:53:38.855472 # ok 767 # SKIP SVE set SVE get FPSIMD for VL 3056
2498 13:53:38.855556 # ok 768 # SKIP SVE set FPSIMD get SVE for VL 3056
2499 13:53:38.855639 # ok 769 Set SVE VL 3072
2500 13:53:38.855724 # ok 770 # SKIP SVE set SVE get SVE for VL 3072
2501 13:53:38.855806 # ok 771 # SKIP SVE set SVE get FPSIMD for VL 3072
2502 13:53:38.855891 # ok 772 # SKIP SVE set FPSIMD get SVE for VL 3072
2503 13:53:38.855976 # ok 773 Set SVE VL 3088
2504 13:53:38.856058 # ok 774 # SKIP SVE set SVE get SVE for VL 3088
2505 13:53:38.856159 # ok 775 # SKIP SVE set SVE get FPSIMD for VL 3088
2506 13:53:38.856246 # ok 776 # SKIP SVE set FPSIMD get SVE for VL 3088
2507 13:53:38.856328 # ok 777 Set SVE VL 3104
2508 13:53:38.856409 # ok 778 # SKIP SVE set SVE get SVE for VL 3104
2509 13:53:38.856491 # ok 779 # SKIP SVE set SVE get FPSIMD for VL 3104
2510 13:53:38.856572 # ok 780 # SKIP SVE set FPSIMD get SVE for VL 3104
2511 13:53:38.856655 # ok 781 Set SVE VL 3120
2512 13:53:38.856739 # ok 782 # SKIP SVE set SVE get SVE for VL 3120
2513 13:53:38.856822 # ok 783 # SKIP SVE set SVE get FPSIMD for VL 3120
2514 13:53:38.856905 # ok 784 # SKIP SVE set FPSIMD get SVE for VL 3120
2515 13:53:38.856988 # ok 785 Set SVE VL 3136
2516 13:53:38.857070 # ok 786 # SKIP SVE set SVE get SVE for VL 3136
2517 13:53:38.857172 # ok 787 # SKIP SVE set SVE get FPSIMD for VL 3136
2518 13:53:38.857258 # ok 788 # SKIP SVE set FPSIMD get SVE for VL 3136
2519 13:53:38.857343 # ok 789 Set SVE VL 3152
2520 13:53:38.857428 # ok 790 # SKIP SVE set SVE get SVE for VL 3152
2521 13:53:38.857508 # ok 791 # SKIP SVE set SVE get FPSIMD for VL 3152
2522 13:53:38.857590 # ok 792 # SKIP SVE set FPSIMD get SVE for VL 3152
2523 13:53:38.858174 # ok 793 Set SVE VL 3168
2524 13:53:38.858270 # ok 794 # SKIP SVE set SVE get SVE for VL 3168
2525 13:53:38.858370 # ok 795 # SKIP SVE set SVE get FPSIMD for VL 3168
2526 13:53:38.858458 # ok 796 # SKIP SVE set FPSIMD get SVE for VL 3168
2527 13:53:38.858543 # ok 797 Set SVE VL 3184
2528 13:53:38.858627 # ok 798 # SKIP SVE set SVE get SVE for VL 3184
2529 13:53:38.858709 # ok 799 # SKIP SVE set SVE get FPSIMD for VL 3184
2530 13:53:38.858991 # ok 800 # SKIP SVE set FPSIMD get SVE for VL 3184
2531 13:53:38.859099 # ok 801 Set SVE VL 3200
2532 13:53:38.859188 # ok 802 # SKIP SVE set SVE get SVE for VL 3200
2533 13:53:38.859274 # ok 803 # SKIP SVE set SVE get FPSIMD for VL 3200
2534 13:53:38.859364 # ok 804 # SKIP SVE set FPSIMD get SVE for VL 3200
2535 13:53:38.859449 # ok 805 Set SVE VL 3216
2536 13:53:38.859530 # ok 806 # SKIP SVE set SVE get SVE for VL 3216
2537 13:53:38.859613 # ok 807 # SKIP SVE set SVE get FPSIMD for VL 3216
2538 13:53:38.859713 # ok 808 # SKIP SVE set FPSIMD get SVE for VL 3216
2539 13:53:38.859799 # ok 809 Set SVE VL 3232
2540 13:53:38.859883 # ok 810 # SKIP SVE set SVE get SVE for VL 3232
2541 13:53:38.859967 # ok 811 # SKIP SVE set SVE get FPSIMD for VL 3232
2542 13:53:38.860050 # ok 812 # SKIP SVE set FPSIMD get SVE for VL 3232
2543 13:53:38.860149 # ok 813 Set SVE VL 3248
2544 13:53:38.860235 # ok 814 # SKIP SVE set SVE get SVE for VL 3248
2545 13:53:38.860318 # ok 815 # SKIP SVE set SVE get FPSIMD for VL 3248
2546 13:53:38.860418 # ok 816 # SKIP SVE set FPSIMD get SVE for VL 3248
2547 13:53:38.860506 # ok 817 Set SVE VL 3264
2548 13:53:38.860603 # ok 818 # SKIP SVE set SVE get SVE for VL 3264
2549 13:53:38.860689 # ok 819 # SKIP SVE set SVE get FPSIMD for VL 3264
2550 13:53:38.860786 # ok 820 # SKIP SVE set FPSIMD get SVE for VL 3264
2551 13:53:38.861181 # ok 821 Set SVE VL 3280
2552 13:53:38.861284 # ok 822 # SKIP SVE set SVE get SVE for VL 3280
2553 13:53:38.861368 # ok 823 # SKIP SVE set SVE get FPSIMD for VL 3280
2554 13:53:38.861466 # ok 824 # SKIP SVE set FPSIMD get SVE for VL 3280
2555 13:53:38.861551 # ok 825 Set SVE VL 3296
2556 13:53:38.861653 # ok 826 # SKIP SVE set SVE get SVE for VL 3296
2557 13:53:38.861753 # ok 827 # SKIP SVE set SVE get FPSIMD for VL 3296
2558 13:53:38.861851 # ok 828 # SKIP SVE set FPSIMD get SVE for VL 3296
2559 13:53:38.861950 # ok 829 Set SVE VL 3312
2560 13:53:38.862047 # ok 830 # SKIP SVE set SVE get SVE for VL 3312
2561 13:53:38.862386 # ok 831 # SKIP SVE set SVE get FPSIMD for VL 3312
2562 13:53:38.864541 # ok 832 # SKIP SVE set FPSIMD get SVE for VL 3312
2563 13:53:38.864667 # ok 833 Set SVE VL 3328
2564 13:53:38.864797 # ok 834 # SKIP SVE set SVE get SVE for VL 3328
2565 13:53:38.864908 # ok 835 # SKIP SVE set SVE get FPSIMD for VL 3328
2566 13:53:38.865016 # ok 836 # SKIP SVE set FPSIMD get SVE for VL 3328
2567 13:53:38.865122 # ok 837 Set SVE VL 3344
2568 13:53:38.865231 # ok 838 # SKIP SVE set SVE get SVE for VL 3344
2569 13:53:38.865341 # ok 839 # SKIP SVE set SVE get FPSIMD for VL 3344
2570 13:53:38.865446 # ok 840 # SKIP SVE set FPSIMD get SVE for VL 3344
2571 13:53:38.865552 # ok 841 Set SVE VL 3360
2572 13:53:38.865667 # ok 842 # SKIP SVE set SVE get SVE for VL 3360
2573 13:53:38.865776 # ok 843 # SKIP SVE set SVE get FPSIMD for VL 3360
2574 13:53:38.865882 # ok 844 # SKIP SVE set FPSIMD get SVE for VL 3360
2575 13:53:38.865988 # ok 845 Set SVE VL 3376
2576 13:53:38.866093 # ok 846 # SKIP SVE set SVE get SVE for VL 3376
2577 13:53:38.866198 # ok 847 # SKIP SVE set SVE get FPSIMD for VL 3376
2578 13:53:38.866302 # ok 848 # SKIP SVE set FPSIMD get SVE for VL 3376
2579 13:53:38.866409 # ok 849 Set SVE VL 3392
2580 13:53:38.866489 # ok 850 # SKIP SVE set SVE get SVE for VL 3392
2581 13:53:38.866561 # ok 851 # SKIP SVE set SVE get FPSIMD for VL 3392
2582 13:53:38.866634 # ok 852 # SKIP SVE set FPSIMD get SVE for VL 3392
2583 13:53:38.866707 # ok 853 Set SVE VL 3408
2584 13:53:38.866779 # ok 854 # SKIP SVE set SVE get SVE for VL 3408
2585 13:53:38.869989 # ok 855 # SKIP SVE set SVE get FPSIMD for VL 3408
2586 13:53:38.870083 # ok 856 # SKIP SVE set FPSIMD get SVE for VL 3408
2587 13:53:38.870175 # ok 857 Set SVE VL 3424
2588 13:53:38.870279 # ok 858 # SKIP SVE set SVE get SVE for VL 3424
2589 13:53:38.870371 # ok 859 # SKIP SVE set SVE get FPSIMD for VL 3424
2590 13:53:38.870475 # ok 860 # SKIP SVE set FPSIMD get SVE for VL 3424
2591 13:53:38.870594 # ok 861 Set SVE VL 3440
2592 13:53:38.870667 # ok 862 # SKIP SVE set SVE get SVE for VL 3440
2593 13:53:38.871137 # ok 863 # SKIP SVE set SVE get FPSIMD for VL 3440
2594 13:53:38.871432 # ok 864 # SKIP SVE set FPSIMD get SVE for VL 3440
2595 13:53:38.871536 # ok 865 Set SVE VL 3456
2596 13:53:38.871655 # ok 866 # SKIP SVE set SVE get SVE for VL 3456
2597 13:53:38.871779 # ok 867 # SKIP SVE set SVE get FPSIMD for VL 3456
2598 13:53:38.871901 # ok 868 # SKIP SVE set FPSIMD get SVE for VL 3456
2599 13:53:38.872004 # ok 869 Set SVE VL 3472
2600 13:53:38.872125 # ok 870 # SKIP SVE set SVE get SVE for VL 3472
2601 13:53:38.872229 # ok 871 # SKIP SVE set SVE get FPSIMD for VL 3472
2602 13:53:38.872348 # ok 872 # SKIP SVE set FPSIMD get SVE for VL 3472
2603 13:53:38.872458 # ok 873 Set SVE VL 3488
2604 13:53:38.872585 # ok 874 # SKIP SVE set SVE get SVE for VL 3488
2605 13:53:38.872690 # ok 875 # SKIP SVE set SVE get FPSIMD for VL 3488
2606 13:53:38.872793 # ok 876 # SKIP SVE set FPSIMD get SVE for VL 3488
2607 13:53:38.872897 # ok 877 Set SVE VL 3504
2608 13:53:38.873020 # ok 878 # SKIP SVE set SVE get SVE for VL 3504
2609 13:53:38.873107 # ok 879 # SKIP SVE set SVE get FPSIMD for VL 3504
2610 13:53:38.873203 # ok 880 # SKIP SVE set FPSIMD get SVE for VL 3504
2611 13:53:38.873306 # ok 881 Set SVE VL 3520
2612 13:53:38.873432 # ok 882 # SKIP SVE set SVE get SVE for VL 3520
2613 13:53:38.873535 # ok 883 # SKIP SVE set SVE get FPSIMD for VL 3520
2614 13:53:38.873640 # ok 884 # SKIP SVE set FPSIMD get SVE for VL 3520
2615 13:53:38.873751 # ok 885 Set SVE VL 3536
2616 13:53:38.873848 # ok 886 # SKIP SVE set SVE get SVE for VL 3536
2617 13:53:38.873939 # ok 887 # SKIP SVE set SVE get FPSIMD for VL 3536
2618 13:53:38.874065 # ok 888 # SKIP SVE set FPSIMD get SVE for VL 3536
2619 13:53:38.874166 # ok 889 Set SVE VL 3552
2620 13:53:38.874272 # ok 890 # SKIP SVE set SVE get SVE for VL 3552
2621 13:53:38.874379 # ok 891 # SKIP SVE set SVE get FPSIMD for VL 3552
2622 13:53:38.874486 # ok 892 # SKIP SVE set FPSIMD get SVE for VL 3552
2623 13:53:38.874553 # ok 893 Set SVE VL 3568
2624 13:53:38.874649 # ok 894 # SKIP SVE set SVE get SVE for VL 3568
2625 13:53:38.874740 # ok 895 # SKIP SVE set SVE get FPSIMD for VL 3568
2626 13:53:38.874824 # ok 896 # SKIP SVE set FPSIMD get SVE for VL 3568
2627 13:53:38.874911 # ok 897 Set SVE VL 3584
2628 13:53:38.874999 # ok 898 # SKIP SVE set SVE get SVE for VL 3584
2629 13:53:38.875085 # ok 899 # SKIP SVE set SVE get FPSIMD for VL 3584
2630 13:53:38.875171 # ok 900 # SKIP SVE set FPSIMD get SVE for VL 3584
2631 13:53:38.875255 # ok 901 Set SVE VL 3600
2632 13:53:38.875361 # ok 902 # SKIP SVE set SVE get SVE for VL 3600
2633 13:53:38.875447 # ok 903 # SKIP SVE set SVE get FPSIMD for VL 3600
2634 13:53:38.875517 # ok 904 # SKIP SVE set FPSIMD get SVE for VL 3600
2635 13:53:38.875600 # ok 905 Set SVE VL 3616
2636 13:53:38.875688 # ok 906 # SKIP SVE set SVE get SVE for VL 3616
2637 13:53:38.875765 # ok 907 # SKIP SVE set SVE get FPSIMD for VL 3616
2638 13:53:38.875996 # ok 908 # SKIP SVE set FPSIMD get SVE for VL 3616
2639 13:53:38.876097 # ok 909 Set SVE VL 3632
2640 13:53:38.876182 # ok 910 # SKIP SVE set SVE get SVE for VL 3632
2641 13:53:38.876264 # ok 911 # SKIP SVE set SVE get FPSIMD for VL 3632
2642 13:53:38.876347 # ok 912 # SKIP SVE set FPSIMD get SVE for VL 3632
2643 13:53:38.876434 # ok 913 Set SVE VL 3648
2644 13:53:38.876516 # ok 914 # SKIP SVE set SVE get SVE for VL 3648
2645 13:53:38.876616 # ok 915 # SKIP SVE set SVE get FPSIMD for VL 3648
2646 13:53:38.876704 # ok 916 # SKIP SVE set FPSIMD get SVE for VL 3648
2647 13:53:38.876790 # ok 917 Set SVE VL 3664
2648 13:53:38.876873 # ok 918 # SKIP SVE set SVE get SVE for VL 3664
2649 13:53:38.876956 # ok 919 # SKIP SVE set SVE get FPSIMD for VL 3664
2650 13:53:38.877038 # ok 920 # SKIP SVE set FPSIMD get SVE for VL 3664
2651 13:53:38.877139 # ok 921 Set SVE VL 3680
2652 13:53:38.877226 # ok 922 # SKIP SVE set SVE get SVE for VL 3680
2653 13:53:38.877310 # ok 923 # SKIP SVE set SVE get FPSIMD for VL 3680
2654 13:53:38.877398 # ok 924 # SKIP SVE set FPSIMD get SVE for VL 3680
2655 13:53:38.877564 # ok 925 Set SVE VL 3696
2656 13:53:38.877672 # ok 926 # SKIP SVE set SVE get SVE for VL 3696
2657 13:53:38.877775 # ok 927 # SKIP SVE set SVE get FPSIMD for VL 3696
2658 13:53:38.877863 # ok 928 # SKIP SVE set FPSIMD get SVE for VL 3696
2659 13:53:38.877949 # ok 929 Set SVE VL 3712
2660 13:53:38.878048 # ok 930 # SKIP SVE set SVE get SVE for VL 3712
2661 13:53:38.878149 # ok 931 # SKIP SVE set SVE get FPSIMD for VL 3712
2662 13:53:38.878251 # ok 932 # SKIP SVE set FPSIMD get SVE for VL 3712
2663 13:53:38.878350 # ok 933 Set SVE VL 3728
2664 13:53:38.878515 # ok 934 # SKIP SVE set SVE get SVE for VL 3728
2665 13:53:38.878824 # ok 935 # SKIP SVE set SVE get FPSIMD for VL 3728
2666 13:53:38.878938 # ok 936 # SKIP SVE set FPSIMD get SVE for VL 3728
2667 13:53:38.879037 # ok 937 Set SVE VL 3744
2668 13:53:38.879134 # ok 938 # SKIP SVE set SVE get SVE for VL 3744
2669 13:53:38.879234 # ok 939 # SKIP SVE set SVE get FPSIMD for VL 3744
2670 13:53:38.879543 # ok 940 # SKIP SVE set FPSIMD get SVE for VL 3744
2671 13:53:38.879647 # ok 941 Set SVE VL 3760
2672 13:53:38.879747 # ok 942 # SKIP SVE set SVE get SVE for VL 3760
2673 13:53:38.879830 # ok 943 # SKIP SVE set SVE get FPSIMD for VL 3760
2674 13:53:38.880210 # ok 944 # SKIP SVE set FPSIMD get SVE for VL 3760
2675 13:53:38.880353 # ok 945 Set SVE VL 3776
2676 13:53:38.880505 # ok 946 # SKIP SVE set SVE get SVE for VL 3776
2677 13:53:38.880745 # ok 947 # SKIP SVE set SVE get FPSIMD for VL 3776
2678 13:53:38.880936 # ok 948 # SKIP SVE set FPSIMD get SVE for VL 3776
2679 13:53:38.881142 # ok 949 Set SVE VL 3792
2680 13:53:38.881364 # ok 950 # SKIP SVE set SVE get SVE for VL 3792
2681 13:53:38.881613 # ok 951 # SKIP SVE set SVE get FPSIMD for VL 3792
2682 13:53:38.881853 # ok 952 # SKIP SVE set FPSIMD get SVE for VL 3792
2683 13:53:38.882029 # ok 953 Set SVE VL 3808
2684 13:53:38.882187 # ok 954 # SKIP SVE set SVE get SVE for VL 3808
2685 13:53:38.882349 # ok 955 # SKIP SVE set SVE get FPSIMD for VL 3808
2686 13:53:38.882480 # ok 956 # SKIP SVE set FPSIMD get SVE for VL 3808
2687 13:53:38.882594 # ok 957 Set SVE VL 3824
2688 13:53:38.882743 # ok 958 # SKIP SVE set SVE get SVE for VL 3824
2689 13:53:38.882890 # ok 959 # SKIP SVE set SVE get FPSIMD for VL 3824
2690 13:53:38.883023 # ok 960 # SKIP SVE set FPSIMD get SVE for VL 3824
2691 13:53:38.883165 # ok 961 Set SVE VL 3840
2692 13:53:38.883352 # ok 962 # SKIP SVE set SVE get SVE for VL 3840
2693 13:53:38.883498 # ok 963 # SKIP SVE set SVE get FPSIMD for VL 3840
2694 13:53:38.883635 # ok 964 # SKIP SVE set FPSIMD get SVE for VL 3840
2695 13:53:38.883760 # ok 965 Set SVE VL 3856
2696 13:53:38.883878 # ok 966 # SKIP SVE set SVE get SVE for VL 3856
2697 13:53:38.883994 # ok 967 # SKIP SVE set SVE get FPSIMD for VL 3856
2698 13:53:38.884107 # ok 968 # SKIP SVE set FPSIMD get SVE for VL 3856
2699 13:53:38.884224 # ok 969 Set SVE VL 3872
2700 13:53:38.884334 # ok 970 # SKIP SVE set SVE get SVE for VL 3872
2701 13:53:38.884451 # ok 971 # SKIP SVE set SVE get FPSIMD for VL 3872
2702 13:53:38.884571 # ok 972 # SKIP SVE set FPSIMD get SVE for VL 3872
2703 13:53:38.884694 # ok 973 Set SVE VL 3888
2704 13:53:38.884845 # ok 974 # SKIP SVE set SVE get SVE for VL 3888
2705 13:53:38.884965 # ok 975 # SKIP SVE set SVE get FPSIMD for VL 3888
2706 13:53:38.885144 # ok 976 # SKIP SVE set FPSIMD get SVE for VL 3888
2707 13:53:38.885332 # ok 977 Set SVE VL 3904
2708 13:53:38.885492 # ok 978 # SKIP SVE set SVE get SVE for VL 3904
2709 13:53:38.885668 # ok 979 # SKIP SVE set SVE get FPSIMD for VL 3904
2710 13:53:38.885820 # ok 980 # SKIP SVE set FPSIMD get SVE for VL 3904
2711 13:53:38.885995 # ok 981 Set SVE VL 3920
2712 13:53:38.886166 # ok 982 # SKIP SVE set SVE get SVE for VL 3920
2713 13:53:38.886318 # ok 983 # SKIP SVE set SVE get FPSIMD for VL 3920
2714 13:53:38.886423 # ok 984 # SKIP SVE set FPSIMD get SVE for VL 3920
2715 13:53:38.886506 # ok 985 Set SVE VL 3936
2716 13:53:38.886604 # ok 986 # SKIP SVE set SVE get SVE for VL 3936
2717 13:53:38.886695 # ok 987 # SKIP SVE set SVE get FPSIMD for VL 3936
2718 13:53:38.886986 # ok 988 # SKIP SVE set FPSIMD get SVE for VL 3936
2719 13:53:38.887088 # ok 989 Set SVE VL 3952
2720 13:53:38.887174 # ok 990 # SKIP SVE set SVE get SVE for VL 3952
2721 13:53:38.887258 # ok 991 # SKIP SVE set SVE get FPSIMD for VL 3952
2722 13:53:38.887340 # ok 992 # SKIP SVE set FPSIMD get SVE for VL 3952
2723 13:53:38.887425 # ok 993 Set SVE VL 3968
2724 13:53:38.887508 # ok 994 # SKIP SVE set SVE get SVE for VL 3968
2725 13:53:38.887594 # ok 995 # SKIP SVE set SVE get FPSIMD for VL 3968
2726 13:53:38.887679 # ok 996 # SKIP SVE set FPSIMD get SVE for VL 3968
2727 13:53:38.887765 # ok 997 Set SVE VL 3984
2728 13:53:38.887850 # ok 998 # SKIP SVE set SVE get SVE for VL 3984
2729 13:53:38.887935 # ok 999 # SKIP SVE set SVE get FPSIMD for VL 3984
2730 13:53:38.888021 # ok 1000 # SKIP SVE set FPSIMD get SVE for VL 3984
2731 13:53:38.888104 # ok 1001 Set SVE VL 4000
2732 13:53:38.888187 # ok 1002 # SKIP SVE set SVE get SVE for VL 4000
2733 13:53:38.888291 # ok 1003 # SKIP SVE set SVE get FPSIMD for VL 4000
2734 13:53:38.888379 # ok 1004 # SKIP SVE set FPSIMD get SVE for VL 4000
2735 13:53:38.888466 # ok 1005 Set SVE VL 4016
2736 13:53:38.888548 # ok 1006 # SKIP SVE set SVE get SVE for VL 4016
2737 13:53:38.888632 # ok 1007 # SKIP SVE set SVE get FPSIMD for VL 4016
2738 13:53:38.888714 # ok 1008 # SKIP SVE set FPSIMD get SVE for VL 4016
2739 13:53:38.888797 # ok 1009 Set SVE VL 4032
2740 13:53:38.888880 # ok 1010 # SKIP SVE set SVE get SVE for VL 4032
2741 13:53:38.888963 # ok 1011 # SKIP SVE set SVE get FPSIMD for VL 4032
2742 13:53:38.889047 # ok 1012 # SKIP SVE set FPSIMD get SVE for VL 4032
2743 13:53:38.889146 # ok 1013 Set SVE VL 4048
2744 13:53:38.889232 # ok 1014 # SKIP SVE set SVE get SVE for VL 4048
2745 13:53:38.889314 # ok 1015 # SKIP SVE set SVE get FPSIMD for VL 4048
2746 13:53:38.889397 # ok 1016 # SKIP SVE set FPSIMD get SVE for VL 4048
2747 13:53:38.889482 # ok 1017 Set SVE VL 4064
2748 13:53:38.889566 # ok 1018 # SKIP SVE set SVE get SVE for VL 4064
2749 13:53:38.889672 # ok 1019 # SKIP SVE set SVE get FPSIMD for VL 4064
2750 13:53:38.889759 # ok 1020 # SKIP SVE set FPSIMD get SVE for VL 4064
2751 13:53:38.889844 # ok 1021 Set SVE VL 4080
2752 13:53:38.889928 # ok 1022 # SKIP SVE set SVE get SVE for VL 4080
2753 13:53:38.890027 # ok 1023 # SKIP SVE set SVE get FPSIMD for VL 4080
2754 13:53:38.890113 # ok 1024 # SKIP SVE set FPSIMD get SVE for VL 4080
2755 13:53:38.890196 # ok 1025 Set SVE VL 4096
2756 13:53:38.890293 # ok 1026 # SKIP SVE set SVE get SVE for VL 4096
2757 13:53:38.890379 # ok 1027 # SKIP SVE set SVE get FPSIMD for VL 4096
2758 13:53:38.890474 # ok 1028 # SKIP SVE set FPSIMD get SVE for VL 4096
2759 13:53:38.890767 # ok 1029 Set SVE VL 4112
2760 13:53:38.891096 # ok 1030 # SKIP SVE set SVE get SVE for VL 4112
2761 13:53:38.891189 # ok 1031 # SKIP SVE set SVE get FPSIMD for VL 4112
2762 13:53:38.891274 # ok 1032 # SKIP SVE set FPSIMD get SVE for VL 4112
2763 13:53:38.891359 # ok 1033 Set SVE VL 4128
2764 13:53:38.891445 # ok 1034 # SKIP SVE set SVE get SVE for VL 4128
2765 13:53:38.891726 # ok 1035 # SKIP SVE set SVE get FPSIMD for VL 4128
2766 13:53:38.891827 # ok 1036 # SKIP SVE set FPSIMD get SVE for VL 4128
2767 13:53:38.891906 # ok 1037 Set SVE VL 4144
2768 13:53:38.891983 # ok 1038 # SKIP SVE set SVE get SVE for VL 4144
2769 13:53:38.892058 # ok 1039 # SKIP SVE set SVE get FPSIMD for VL 4144
2770 13:53:38.892144 # ok 1040 # SKIP SVE set FPSIMD get SVE for VL 4144
2771 13:53:38.898970 # ok 1041 Set SVE VL 4160
2772 13:53:38.899332 # ok 1042 # SKIP SVE set SVE get SVE for VL 4160
2773 13:53:38.899435 # ok 1043 # SKIP SVE set SVE get FPSIMD for VL 4160
2774 13:53:38.899522 # ok 1044 # SKIP SVE set FPSIMD get SVE for VL 4160
2775 13:53:38.899622 # ok 1045 Set SVE VL 4176
2776 13:53:38.899710 # ok 1046 # SKIP SVE set SVE get SVE for VL 4176
2777 13:53:38.899811 # ok 1047 # SKIP SVE set SVE get FPSIMD for VL 4176
2778 13:53:38.899914 # ok 1048 # SKIP SVE set FPSIMD get SVE for VL 4176
2779 13:53:38.900206 # ok 1049 Set SVE VL 4192
2780 13:53:38.900307 # ok 1050 # SKIP SVE set SVE get SVE for VL 4192
2781 13:53:38.900393 # ok 1051 # SKIP SVE set SVE get FPSIMD for VL 4192
2782 13:53:38.900497 # ok 1052 # SKIP SVE set FPSIMD get SVE for VL 4192
2783 13:53:38.900596 # ok 1053 Set SVE VL 4208
2784 13:53:38.900696 # ok 1054 # SKIP SVE set SVE get SVE for VL 4208
2785 13:53:38.900798 # ok 1055 # SKIP SVE set SVE get FPSIMD for VL 4208
2786 13:53:38.901099 # ok 1056 # SKIP SVE set FPSIMD get SVE for VL 4208
2787 13:53:38.901192 # ok 1057 Set SVE VL 4224
2788 13:53:38.901277 # ok 1058 # SKIP SVE set SVE get SVE for VL 4224
2789 13:53:38.901376 # ok 1059 # SKIP SVE set SVE get FPSIMD for VL 4224
2790 13:53:38.901491 # ok 1060 # SKIP SVE set FPSIMD get SVE for VL 4224
2791 13:53:38.901581 # ok 1061 Set SVE VL 4240
2792 13:53:38.901689 # ok 1062 # SKIP SVE set SVE get SVE for VL 4240
2793 13:53:38.901790 # ok 1063 # SKIP SVE set SVE get FPSIMD for VL 4240
2794 13:53:38.902196 # ok 1064 # SKIP SVE set FPSIMD get SVE for VL 4240
2795 13:53:38.902297 # ok 1065 Set SVE VL 4256
2796 13:53:38.902579 # ok 1066 # SKIP SVE set SVE get SVE for VL 4256
2797 13:53:38.902668 # ok 1067 # SKIP SVE set SVE get FPSIMD for VL 4256
2798 13:53:38.902742 # ok 1068 # SKIP SVE set FPSIMD get SVE for VL 4256
2799 13:53:38.902804 # ok 1069 Set SVE VL 4272
2800 13:53:38.903131 # ok 1070 # SKIP SVE set SVE get SVE for VL 4272
2801 13:53:38.903629 # ok 1071 # SKIP SVE set SVE get FPSIMD for VL 4272
2802 13:53:38.903736 # ok 1072 # SKIP SVE set FPSIMD get SVE for VL 4272
2803 13:53:38.903820 # ok 1073 Set SVE VL 4288
2804 13:53:38.903902 # ok 1074 # SKIP SVE set SVE get SVE for VL 4288
2805 13:53:38.903997 # ok 1075 # SKIP SVE set SVE get FPSIMD for VL 4288
2806 13:53:38.904080 # ok 1076 # SKIP SVE set FPSIMD get SVE for VL 4288
2807 13:53:38.904157 # ok 1077 Set SVE VL 4304
2808 13:53:38.904230 # ok 1078 # SKIP SVE set SVE get SVE for VL 4304
2809 13:53:38.904319 # ok 1079 # SKIP SVE set SVE get FPSIMD for VL 4304
2810 13:53:38.904401 # ok 1080 # SKIP SVE set FPSIMD get SVE for VL 4304
2811 13:53:38.904495 # ok 1081 Set SVE VL 4320
2812 13:53:38.904591 # ok 1082 # SKIP SVE set SVE get SVE for VL 4320
2813 13:53:38.904712 # ok 1083 # SKIP SVE set SVE get FPSIMD for VL 4320
2814 13:53:38.904807 # ok 1084 # SKIP SVE set FPSIMD get SVE for VL 4320
2815 13:53:38.904900 # ok 1085 Set SVE VL 4336
2816 13:53:38.904991 # ok 1086 # SKIP SVE set SVE get SVE for VL 4336
2817 13:53:38.905102 # ok 1087 # SKIP SVE set SVE get FPSIMD for VL 4336
2818 13:53:38.905188 # ok 1088 # SKIP SVE set FPSIMD get SVE for VL 4336
2819 13:53:38.905282 # ok 1089 Set SVE VL 4352
2820 13:53:38.905394 # ok 1090 # SKIP SVE set SVE get SVE for VL 4352
2821 13:53:38.905508 # ok 1091 # SKIP SVE set SVE get FPSIMD for VL 4352
2822 13:53:38.905606 # ok 1092 # SKIP SVE set FPSIMD get SVE for VL 4352
2823 13:53:38.905733 # ok 1093 Set SVE VL 4368
2824 13:53:38.905822 # ok 1094 # SKIP SVE set SVE get SVE for VL 4368
2825 13:53:38.905931 # ok 1095 # SKIP SVE set SVE get FPSIMD for VL 4368
2826 13:53:38.906058 # ok 1096 # SKIP SVE set FPSIMD get SVE for VL 4368
2827 13:53:38.906156 # ok 1097 Set SVE VL 4384
2828 13:53:38.906267 # ok 1098 # SKIP SVE set SVE get SVE for VL 4384
2829 13:53:38.906349 # ok 1099 # SKIP SVE set SVE get FPSIMD for VL 4384
2830 13:53:38.906465 # ok 1100 # SKIP SVE set FPSIMD get SVE for VL 4384
2831 13:53:38.906573 # ok 1101 Set SVE VL 4400
2832 13:53:38.906881 # ok 1102 # SKIP SVE set SVE get SVE for VL 4400
2833 13:53:38.907037 # ok 1103 # SKIP SVE set SVE get FPSIMD for VL 4400
2834 13:53:38.913827 # ok 1104 # SKIP SVE set FPSIMD get SVE for VL 4400
2835 13:53:38.913968 # ok 1105 Set SVE VL 4416
2836 13:53:38.914069 # ok 1106 # SKIP SVE set SVE get SVE for VL 4416
2837 13:53:38.914151 # ok 1107 # SKIP SVE set SVE get FPSIMD for VL 4416
2838 13:53:38.914234 # ok 1108 # SKIP SVE set FPSIMD get SVE for VL 4416
2839 13:53:38.914300 # ok 1109 Set SVE VL 4432
2840 13:53:38.914366 # ok 1110 # SKIP SVE set SVE get SVE for VL 4432
2841 13:53:38.914465 # ok 1111 # SKIP SVE set SVE get FPSIMD for VL 4432
2842 13:53:38.914552 # ok 1112 # SKIP SVE set FPSIMD get SVE for VL 4432
2843 13:53:38.914646 # ok 1113 Set SVE VL 4448
2844 13:53:38.914726 # ok 1114 # SKIP SVE set SVE get SVE for VL 4448
2845 13:53:38.914798 # ok 1115 # SKIP SVE set SVE get FPSIMD for VL 4448
2846 13:53:38.914864 # ok 1116 # SKIP SVE set FPSIMD get SVE for VL 4448
2847 13:53:38.914928 # ok 1117 Set SVE VL 4464
2848 13:53:38.914989 # ok 1118 # SKIP SVE set SVE get SVE for VL 4464
2849 13:53:38.915058 # ok 1119 # SKIP SVE set SVE get FPSIMD for VL 4464
2850 13:53:38.915134 # ok 1120 # SKIP SVE set FPSIMD get SVE for VL 4464
2851 13:53:38.915211 # ok 1121 Set SVE VL 4480
2852 13:53:38.915288 # ok 1122 # SKIP SVE set SVE get SVE for VL 4480
2853 13:53:38.915366 # ok 1123 # SKIP SVE set SVE get FPSIMD for VL 4480
2854 13:53:38.915441 # ok 1124 # SKIP SVE set FPSIMD get SVE for VL 4480
2855 13:53:38.915525 # ok 1125 Set SVE VL 4496
2856 13:53:38.915610 # ok 1126 # SKIP SVE set SVE get SVE for VL 4496
2857 13:53:38.915694 # ok 1127 # SKIP SVE set SVE get FPSIMD for VL 4496
2858 13:53:38.915779 # ok 1128 # SKIP SVE set FPSIMD get SVE for VL 4496
2859 13:53:38.915874 # ok 1129 Set SVE VL 4512
2860 13:53:38.915957 # ok 1130 # SKIP SVE set SVE get SVE for VL 4512
2861 13:53:38.916039 # ok 1131 # SKIP SVE set SVE get FPSIMD for VL 4512
2862 13:53:38.916125 # ok 1132 # SKIP SVE set FPSIMD get SVE for VL 4512
2863 13:53:38.916210 # ok 1133 Set SVE VL 4528
2864 13:53:38.916289 # ok 1134 # SKIP SVE set SVE get SVE for VL 4528
2865 13:53:38.916363 # ok 1135 # SKIP SVE set SVE get FPSIMD for VL 4528
2866 13:53:38.916439 # ok 1136 # SKIP SVE set FPSIMD get SVE for VL 4528
2867 13:53:38.916518 # ok 1137 Set SVE VL 4544
2868 13:53:38.916598 # ok 1138 # SKIP SVE set SVE get SVE for VL 4544
2869 13:53:38.916669 # ok 1139 # SKIP SVE set SVE get FPSIMD for VL 4544
2870 13:53:38.916733 # ok 1140 # SKIP SVE set FPSIMD get SVE for VL 4544
2871 13:53:38.916809 # ok 1141 Set SVE VL 4560
2872 13:53:38.916889 # ok 1142 # SKIP SVE set SVE get SVE for VL 4560
2873 13:53:38.916954 # ok 1143 # SKIP SVE set SVE get FPSIMD for VL 4560
2874 13:53:38.917027 # ok 1144 # SKIP SVE set FPSIMD get SVE for VL 4560
2875 13:53:38.917106 # ok 1145 Set SVE VL 4576
2876 13:53:38.917192 # ok 1146 # SKIP SVE set SVE get SVE for VL 4576
2877 13:53:38.917485 # ok 1147 # SKIP SVE set SVE get FPSIMD for VL 4576
2878 13:53:38.917587 # ok 1148 # SKIP SVE set FPSIMD get SVE for VL 4576
2879 13:53:38.917682 # ok 1149 Set SVE VL 4592
2880 13:53:38.917769 # ok 1150 # SKIP SVE set SVE get SVE for VL 4592
2881 13:53:38.917853 # ok 1151 # SKIP SVE set SVE get FPSIMD for VL 4592
2882 13:53:38.917938 # ok 1152 # SKIP SVE set FPSIMD get SVE for VL 4592
2883 13:53:38.918024 # ok 1153 Set SVE VL 4608
2884 13:53:38.918105 # ok 1154 # SKIP SVE set SVE get SVE for VL 4608
2885 13:53:38.918190 # ok 1155 # SKIP SVE set SVE get FPSIMD for VL 4608
2886 13:53:38.918275 # ok 1156 # SKIP SVE set FPSIMD get SVE for VL 4608
2887 13:53:38.918359 # ok 1157 Set SVE VL 4624
2888 13:53:38.918460 # ok 1158 # SKIP SVE set SVE get SVE for VL 4624
2889 13:53:38.918555 # ok 1159 # SKIP SVE set SVE get FPSIMD for VL 4624
2890 13:53:38.918641 # ok 1160 # SKIP SVE set FPSIMD get SVE for VL 4624
2891 13:53:38.918726 # ok 1161 Set SVE VL 4640
2892 13:53:38.918843 # ok 1162 # SKIP SVE set SVE get SVE for VL 4640
2893 13:53:38.918930 # ok 1163 # SKIP SVE set SVE get FPSIMD for VL 4640
2894 13:53:38.919013 # ok 1164 # SKIP SVE set FPSIMD get SVE for VL 4640
2895 13:53:38.919098 # ok 1165 Set SVE VL 4656
2896 13:53:38.919181 # ok 1166 # SKIP SVE set SVE get SVE for VL 4656
2897 13:53:38.919266 # ok 1167 # SKIP SVE set SVE get FPSIMD for VL 4656
2898 13:53:38.919350 # ok 1168 # SKIP SVE set FPSIMD get SVE for VL 4656
2899 13:53:38.919437 # ok 1169 Set SVE VL 4672
2900 13:53:38.919524 # ok 1170 # SKIP SVE set SVE get SVE for VL 4672
2901 13:53:38.919608 # ok 1171 # SKIP SVE set SVE get FPSIMD for VL 4672
2902 13:53:38.919692 # ok 1172 # SKIP SVE set FPSIMD get SVE for VL 4672
2903 13:53:38.919776 # ok 1173 Set SVE VL 4688
2904 13:53:38.919860 # ok 1174 # SKIP SVE set SVE get SVE for VL 4688
2905 13:53:38.919943 # ok 1175 # SKIP SVE set SVE get FPSIMD for VL 4688
2906 13:53:38.920022 # ok 1176 # SKIP SVE set FPSIMD get SVE for VL 4688
2907 13:53:38.920097 # ok 1177 Set SVE VL 4704
2908 13:53:38.920169 # ok 1178 # SKIP SVE set SVE get SVE for VL 4704
2909 13:53:38.920243 # ok 1179 # SKIP SVE set SVE get FPSIMD for VL 4704
2910 13:53:38.920320 # ok 1180 # SKIP SVE set FPSIMD get SVE for VL 4704
2911 13:53:38.921756 # ok 1181 Set SVE VL 4720
2912 13:53:38.921829 # ok 1182 # SKIP SVE set SVE get SVE for VL 4720
2913 13:53:38.921889 # ok 1183 # SKIP SVE set SVE get FPSIMD for VL 4720
2914 13:53:38.921949 # ok 1184 # SKIP SVE set FPSIMD get SVE for VL 4720
2915 13:53:38.922008 # ok 1185 Set SVE VL 4736
2916 13:53:38.922066 # ok 1186 # SKIP SVE set SVE get SVE for VL 4736
2917 13:53:38.922124 # ok 1187 # SKIP SVE set SVE get FPSIMD for VL 4736
2918 13:53:38.922184 # ok 1188 # SKIP SVE set FPSIMD get SVE for VL 4736
2919 13:53:38.922253 # ok 1189 Set SVE VL 4752
2920 13:53:38.922566 # ok 1190 # SKIP SVE set SVE get SVE for VL 4752
2921 13:53:38.922651 # ok 1191 # SKIP SVE set SVE get FPSIMD for VL 4752
2922 13:53:38.922728 # ok 1192 # SKIP SVE set FPSIMD get SVE for VL 4752
2923 13:53:38.922790 # ok 1193 Set SVE VL 4768
2924 13:53:38.922849 # ok 1194 # SKIP SVE set SVE get SVE for VL 4768
2925 13:53:38.922921 # ok 1195 # SKIP SVE set SVE get FPSIMD for VL 4768
2926 13:53:38.922995 # ok 1196 # SKIP SVE set FPSIMD get SVE for VL 4768
2927 13:53:38.923056 # ok 1197 Set SVE VL 4784
2928 13:53:38.923115 # ok 1198 # SKIP SVE set SVE get SVE for VL 4784
2929 13:53:38.923174 # ok 1199 # SKIP SVE set SVE get FPSIMD for VL 4784
2930 13:53:38.923232 # ok 1200 # SKIP SVE set FPSIMD get SVE for VL 4784
2931 13:53:38.923290 # ok 1201 Set SVE VL 4800
2932 13:53:38.923348 # ok 1202 # SKIP SVE set SVE get SVE for VL 4800
2933 13:53:38.923406 # ok 1203 # SKIP SVE set SVE get FPSIMD for VL 4800
2934 13:53:38.923469 # ok 1204 # SKIP SVE set FPSIMD get SVE for VL 4800
2935 13:53:38.923527 # ok 1205 Set SVE VL 4816
2936 13:53:38.923585 # ok 1206 # SKIP SVE set SVE get SVE for VL 4816
2937 13:53:38.923643 # ok 1207 # SKIP SVE set SVE get FPSIMD for VL 4816
2938 13:53:38.923702 # ok 1208 # SKIP SVE set FPSIMD get SVE for VL 4816
2939 13:53:38.923761 # ok 1209 Set SVE VL 4832
2940 13:53:38.923819 # ok 1210 # SKIP SVE set SVE get SVE for VL 4832
2941 13:53:38.923877 # ok 1211 # SKIP SVE set SVE get FPSIMD for VL 4832
2942 13:53:38.923935 # ok 1212 # SKIP SVE set FPSIMD get SVE for VL 4832
2943 13:53:38.923992 # ok 1213 Set SVE VL 4848
2944 13:53:38.924050 # ok 1214 # SKIP SVE set SVE get SVE for VL 4848
2945 13:53:38.924109 # ok 1215 # SKIP SVE set SVE get FPSIMD for VL 4848
2946 13:53:38.924170 # ok 1216 # SKIP SVE set FPSIMD get SVE for VL 4848
2947 13:53:38.924228 # ok 1217 Set SVE VL 4864
2948 13:53:38.924286 # ok 1218 # SKIP SVE set SVE get SVE for VL 4864
2949 13:53:38.924344 # ok 1219 # SKIP SVE set SVE get FPSIMD for VL 4864
2950 13:53:38.924402 # ok 1220 # SKIP SVE set FPSIMD get SVE for VL 4864
2951 13:53:38.924464 # ok 1221 Set SVE VL 4880
2952 13:53:38.924524 # ok 1222 # SKIP SVE set SVE get SVE for VL 4880
2953 13:53:38.924582 # ok 1223 # SKIP SVE set SVE get FPSIMD for VL 4880
2954 13:53:38.932319 # ok 1224 # SKIP SVE set FPSIMD get SVE for VL 4880
2955 13:53:38.932547 # ok 1225 Set SVE VL 4896
2956 13:53:38.932633 # ok 1226 # SKIP SVE set SVE get SVE for VL 4896
2957 13:53:38.932726 # ok 1227 # SKIP SVE set SVE get FPSIMD for VL 4896
2958 13:53:38.932804 # ok 1228 # SKIP SVE set FPSIMD get SVE for VL 4896
2959 13:53:38.932874 # ok 1229 Set SVE VL 4912
2960 13:53:38.932961 # ok 1230 # SKIP SVE set SVE get SVE for VL 4912
2961 13:53:38.933045 # ok 1231 # SKIP SVE set SVE get FPSIMD for VL 4912
2962 13:53:38.933147 # ok 1232 # SKIP SVE set FPSIMD get SVE for VL 4912
2963 13:53:38.933242 # ok 1233 Set SVE VL 4928
2964 13:53:38.933368 # ok 1234 # SKIP SVE set SVE get SVE for VL 4928
2965 13:53:38.933488 # ok 1235 # SKIP SVE set SVE get FPSIMD for VL 4928
2966 13:53:38.933605 # ok 1236 # SKIP SVE set FPSIMD get SVE for VL 4928
2967 13:53:38.933703 # ok 1237 Set SVE VL 4944
2968 13:53:38.933796 # ok 1238 # SKIP SVE set SVE get SVE for VL 4944
2969 13:53:38.933922 # ok 1239 # SKIP SVE set SVE get FPSIMD for VL 4944
2970 13:53:38.934059 # ok 1240 # SKIP SVE set FPSIMD get SVE for VL 4944
2971 13:53:38.934176 # ok 1241 Set SVE VL 4960
2972 13:53:38.934492 # ok 1242 # SKIP SVE set SVE get SVE for VL 4960
2973 13:53:38.934576 # ok 1243 # SKIP SVE set SVE get FPSIMD for VL 4960
2974 13:53:38.935946 # ok 1244 # SKIP SVE set FPSIMD get SVE for VL 4960
2975 13:53:38.936250 # ok 1245 Set SVE VL 4976
2976 13:53:38.936350 # ok 1246 # SKIP SVE set SVE get SVE for VL 4976
2977 13:53:38.936453 # ok 1247 # SKIP SVE set SVE get FPSIMD for VL 4976
2978 13:53:38.936546 # ok 1248 # SKIP SVE set FPSIMD get SVE for VL 4976
2979 13:53:38.936673 # ok 1249 Set SVE VL 4992
2980 13:53:38.936757 # ok 1250 # SKIP SVE set SVE get SVE for VL 4992
2981 13:53:38.936851 # ok 1251 # SKIP SVE set SVE get FPSIMD for VL 4992
2982 13:53:38.937130 # ok 1252 # SKIP SVE set FPSIMD get SVE for VL 4992
2983 13:53:38.937231 # ok 1253 Set SVE VL 5008
2984 13:53:38.937295 # ok 1254 # SKIP SVE set SVE get SVE for VL 5008
2985 13:53:38.937388 # ok 1255 # SKIP SVE set SVE get FPSIMD for VL 5008
2986 13:53:38.937458 # ok 1256 # SKIP SVE set FPSIMD get SVE for VL 5008
2987 13:53:38.937534 # ok 1257 Set SVE VL 5024
2988 13:53:38.937596 # ok 1258 # SKIP SVE set SVE get SVE for VL 5024
2989 13:53:38.937684 # ok 1259 # SKIP SVE set SVE get FPSIMD for VL 5024
2990 13:53:38.937777 # ok 1260 # SKIP SVE set FPSIMD get SVE for VL 5024
2991 13:53:38.937870 # ok 1261 Set SVE VL 5040
2992 13:53:38.937952 # ok 1262 # SKIP SVE set SVE get SVE for VL 5040
2993 13:53:38.938061 # ok 1263 # SKIP SVE set SVE get FPSIMD for VL 5040
2994 13:53:38.938365 # ok 1264 # SKIP SVE set FPSIMD get SVE for VL 5040
2995 13:53:38.938464 # ok 1265 Set SVE VL 5056
2996 13:53:38.938553 # ok 1266 # SKIP SVE set SVE get SVE for VL 5056
2997 13:53:38.939077 # ok 1267 # SKIP SVE set SVE get FPSIMD for VL 5056
2998 13:53:38.939366 # ok 1268 # SKIP SVE set FPSIMD get SVE for VL 5056
2999 13:53:38.939461 # ok 1269 Set SVE VL 5072
3000 13:53:38.939576 # ok 1270 # SKIP SVE set SVE get SVE for VL 5072
3001 13:53:38.939706 # ok 1271 # SKIP SVE set SVE get FPSIMD for VL 5072
3002 13:53:38.939830 # ok 1272 # SKIP SVE set FPSIMD get SVE for VL 5072
3003 13:53:38.939956 # ok 1273 Set SVE VL 5088
3004 13:53:38.940065 # ok 1274 # SKIP SVE set SVE get SVE for VL 5088
3005 13:53:38.940165 # ok 1275 # SKIP SVE set SVE get FPSIMD for VL 5088
3006 13:53:38.940479 # ok 1276 # SKIP SVE set FPSIMD get SVE for VL 5088
3007 13:53:38.940579 # ok 1277 Set SVE VL 5104
3008 13:53:38.940699 # ok 1278 # SKIP SVE set SVE get SVE for VL 5104
3009 13:53:38.940803 # ok 1279 # SKIP SVE set SVE get FPSIMD for VL 5104
3010 13:53:38.940912 # ok 1280 # SKIP SVE set FPSIMD get SVE for VL 5104
3011 13:53:38.941054 # ok 1281 Set SVE VL 5120
3012 13:53:38.941189 # ok 1282 # SKIP SVE set SVE get SVE for VL 5120
3013 13:53:38.941297 # ok 1283 # SKIP SVE set SVE get FPSIMD for VL 5120
3014 13:53:38.941420 # ok 1284 # SKIP SVE set FPSIMD get SVE for VL 5120
3015 13:53:38.941524 # ok 1285 Set SVE VL 5136
3016 13:53:38.941654 # ok 1286 # SKIP SVE set SVE get SVE for VL 5136
3017 13:53:38.941772 # ok 1287 # SKIP SVE set SVE get FPSIMD for VL 5136
3018 13:53:38.941874 # ok 1288 # SKIP SVE set FPSIMD get SVE for VL 5136
3019 13:53:38.942017 # ok 1289 Set SVE VL 5152
3020 13:53:38.942117 # ok 1290 # SKIP SVE set SVE get SVE for VL 5152
3021 13:53:38.942228 # ok 1291 # SKIP SVE set SVE get FPSIMD for VL 5152
3022 13:53:38.942332 # ok 1292 # SKIP SVE set FPSIMD get SVE for VL 5152
3023 13:53:38.942430 # ok 1293 Set SVE VL 5168
3024 13:53:38.942828 # ok 1294 # SKIP SVE set SVE get SVE for VL 5168
3025 13:53:38.942937 # ok 1295 # SKIP SVE set SVE get FPSIMD for VL 5168
3026 13:53:38.943025 # ok 1296 # SKIP SVE set FPSIMD get SVE for VL 5168
3027 13:53:38.943300 # ok 1297 Set SVE VL 5184
3028 13:53:38.943392 # ok 1298 # SKIP SVE set SVE get SVE for VL 5184
3029 13:53:38.943476 # ok 1299 # SKIP SVE set SVE get FPSIMD for VL 5184
3030 13:53:38.943575 # ok 1300 # SKIP SVE set FPSIMD get SVE for VL 5184
3031 13:53:38.943659 # ok 1301 Set SVE VL 5200
3032 13:53:38.943756 # ok 1302 # SKIP SVE set SVE get SVE for VL 5200
3033 13:53:38.943841 # ok 1303 # SKIP SVE set SVE get FPSIMD for VL 5200
3034 13:53:38.943938 # ok 1304 # SKIP SVE set FPSIMD get SVE for VL 5200
3035 13:53:38.944021 # ok 1305 Set SVE VL 5216
3036 13:53:38.944117 # ok 1306 # SKIP SVE set SVE get SVE for VL 5216
3037 13:53:38.944214 # ok 1307 # SKIP SVE set SVE get FPSIMD for VL 5216
3038 13:53:38.944500 # ok 1308 # SKIP SVE set FPSIMD get SVE for VL 5216
3039 13:53:38.944589 # ok 1309 Set SVE VL 5232
3040 13:53:38.944685 # ok 1310 # SKIP SVE set SVE get SVE for VL 5232
3041 13:53:38.944770 # ok 1311 # SKIP SVE set SVE get FPSIMD for VL 5232
3042 13:53:38.944866 # ok 1312 # SKIP SVE set FPSIMD get SVE for VL 5232
3043 13:53:38.944951 # ok 1313 Set SVE VL 5248
3044 13:53:38.945049 # ok 1314 # SKIP SVE set SVE get SVE for VL 5248
3045 13:53:38.945346 # ok 1315 # SKIP SVE set SVE get FPSIMD for VL 5248
3046 13:53:38.945448 # ok 1316 # SKIP SVE set FPSIMD get SVE for VL 5248
3047 13:53:38.945545 # ok 1317 Set SVE VL 5264
3048 13:53:38.945626 # ok 1318 # SKIP SVE set SVE get SVE for VL 5264
3049 13:53:38.945737 # ok 1319 # SKIP SVE set SVE get FPSIMD for VL 5264
3050 13:53:38.945830 # ok 1320 # SKIP SVE set FPSIMD get SVE for VL 5264
3051 13:53:38.945938 # ok 1321 Set SVE VL 5280
3052 13:53:38.946036 # ok 1322 # SKIP SVE set SVE get SVE for VL 5280
3053 13:53:38.946139 # ok 1323 # SKIP SVE set SVE get FPSIMD for VL 5280
3054 13:53:38.946224 # ok 1324 # SKIP SVE set FPSIMD get SVE for VL 5280
3055 13:53:38.946320 # ok 1325 Set SVE VL 5296
3056 13:53:38.946464 # ok 1326 # SKIP SVE set SVE get SVE for VL 5296
3057 13:53:38.946751 # ok 1327 # SKIP SVE set SVE get FPSIMD for VL 5296
3058 13:53:38.946845 # ok 1328 # SKIP SVE set FPSIMD get SVE for VL 5296
3059 13:53:38.946938 # ok 1329 Set SVE VL 5312
3060 13:53:38.947051 # ok 1330 # SKIP SVE set SVE get SVE for VL 5312
3061 13:53:38.947174 # ok 1331 # SKIP SVE set SVE get FPSIMD for VL 5312
3062 13:53:38.947265 # ok 1332 # SKIP SVE set FPSIMD get SVE for VL 5312
3063 13:53:38.947487 # ok 1333 Set SVE VL 5328
3064 13:53:38.947641 # ok 1334 # SKIP SVE set SVE get SVE for VL 5328
3065 13:53:38.947793 # ok 1335 # SKIP SVE set SVE get FPSIMD for VL 5328
3066 13:53:38.947889 # ok 1336 # SKIP SVE set FPSIMD get SVE for VL 5328
3067 13:53:38.947969 # ok 1337 Set SVE VL 5344
3068 13:53:38.948042 # ok 1338 # SKIP SVE set SVE get SVE for VL 5344
3069 13:53:38.948128 # ok 1339 # SKIP SVE set SVE get FPSIMD for VL 5344
3070 13:53:38.948204 # ok 1340 # SKIP SVE set FPSIMD get SVE for VL 5344
3071 13:53:38.948292 # ok 1341 Set SVE VL 5360
3072 13:53:38.948378 # ok 1342 # SKIP SVE set SVE get SVE for VL 5360
3073 13:53:38.948487 # ok 1343 # SKIP SVE set SVE get FPSIMD for VL 5360
3074 13:53:38.948599 # ok 1344 # SKIP SVE set FPSIMD get SVE for VL 5360
3075 13:53:38.948707 # ok 1345 Set SVE VL 5376
3076 13:53:38.948829 # ok 1346 # SKIP SVE set SVE get SVE for VL 5376
3077 13:53:38.949136 # ok 1347 # SKIP SVE set SVE get FPSIMD for VL 5376
3078 13:53:38.949226 # ok 1348 # SKIP SVE set FPSIMD get SVE for VL 5376
3079 13:53:38.949329 # ok 1349 Set SVE VL 5392
3080 13:53:38.949408 # ok 1350 # SKIP SVE set SVE get SVE for VL 5392
3081 13:53:38.949509 # ok 1351 # SKIP SVE set SVE get FPSIMD for VL 5392
3082 13:53:38.949602 # ok 1352 # SKIP SVE set FPSIMD get SVE for VL 5392
3083 13:53:38.949701 # ok 1353 Set SVE VL 5408
3084 13:53:38.949785 # ok 1354 # SKIP SVE set SVE get SVE for VL 5408
3085 13:53:38.949909 # ok 1355 # SKIP SVE set SVE get FPSIMD for VL 5408
3086 13:53:38.950027 # ok 1356 # SKIP SVE set FPSIMD get SVE for VL 5408
3087 13:53:38.950136 # ok 1357 Set SVE VL 5424
3088 13:53:38.950256 # ok 1358 # SKIP SVE set SVE get SVE for VL 5424
3089 13:53:38.950496 # ok 1359 # SKIP SVE set SVE get FPSIMD for VL 5424
3090 13:53:38.953810 # ok 1360 # SKIP SVE set FPSIMD get SVE for VL 5424
3091 13:53:38.953920 # ok 1361 Set SVE VL 5440
3092 13:53:38.954008 # ok 1362 # SKIP SVE set SVE get SVE for VL 5440
3093 13:53:38.954091 # ok 1363 # SKIP SVE set SVE get FPSIMD for VL 5440
3094 13:53:38.954170 # ok 1364 # SKIP SVE set FPSIMD get SVE for VL 5440
3095 13:53:38.954252 # ok 1365 Set SVE VL 5456
3096 13:53:38.954333 # ok 1366 # SKIP SVE set SVE get SVE for VL 5456
3097 13:53:38.954400 # ok 1367 # SKIP SVE set SVE get FPSIMD for VL 5456
3098 13:53:38.954465 # ok 1368 # SKIP SVE set FPSIMD get SVE for VL 5456
3099 13:53:38.954539 # ok 1369 Set SVE VL 5472
3100 13:53:38.954623 # ok 1370 # SKIP SVE set SVE get SVE for VL 5472
3101 13:53:38.954706 # ok 1371 # SKIP SVE set SVE get FPSIMD for VL 5472
3102 13:53:38.954785 # ok 1372 # SKIP SVE set FPSIMD get SVE for VL 5472
3103 13:53:38.954866 # ok 1373 Set SVE VL 5488
3104 13:53:38.954946 # ok 1374 # SKIP SVE set SVE get SVE for VL 5488
3105 13:53:38.955023 # ok 1375 # SKIP SVE set SVE get FPSIMD for VL 5488
3106 13:53:38.955103 # ok 1376 # SKIP SVE set FPSIMD get SVE for VL 5488
3107 13:53:38.955186 # ok 1377 Set SVE VL 5504
3108 13:53:38.955270 # ok 1378 # SKIP SVE set SVE get SVE for VL 5504
3109 13:53:38.955355 # ok 1379 # SKIP SVE set SVE get FPSIMD for VL 5504
3110 13:53:38.955432 # ok 1380 # SKIP SVE set FPSIMD get SVE for VL 5504
3111 13:53:38.955517 # ok 1381 Set SVE VL 5520
3112 13:53:38.955603 # ok 1382 # SKIP SVE set SVE get SVE for VL 5520
3113 13:53:38.955690 # ok 1383 # SKIP SVE set SVE get FPSIMD for VL 5520
3114 13:53:38.955774 # ok 1384 # SKIP SVE set FPSIMD get SVE for VL 5520
3115 13:53:38.955860 # ok 1385 Set SVE VL 5536
3116 13:53:38.955945 # ok 1386 # SKIP SVE set SVE get SVE for VL 5536
3117 13:53:38.956309 # ok 1387 # SKIP SVE set SVE get FPSIMD for VL 5536
3118 13:53:38.956439 # ok 1388 # SKIP SVE set FPSIMD get SVE for VL 5536
3119 13:53:38.956535 # ok 1389 Set SVE VL 5552
3120 13:53:38.956621 # ok 1390 # SKIP SVE set SVE get SVE for VL 5552
3121 13:53:38.956685 # ok 1391 # SKIP SVE set SVE get FPSIMD for VL 5552
3122 13:53:38.956745 # ok 1392 # SKIP SVE set FPSIMD get SVE for VL 5552
3123 13:53:38.956805 # ok 1393 Set SVE VL 5568
3124 13:53:38.956864 # ok 1394 # SKIP SVE set SVE get SVE for VL 5568
3125 13:53:38.956923 # ok 1395 # SKIP SVE set SVE get FPSIMD for VL 5568
3126 13:53:38.956983 # ok 1396 # SKIP SVE set FPSIMD get SVE for VL 5568
3127 13:53:38.957042 # ok 1397 Set SVE VL 5584
3128 13:53:38.957101 # ok 1398 # SKIP SVE set SVE get SVE for VL 5584
3129 13:53:38.957160 # ok 1399 # SKIP SVE set SVE get FPSIMD for VL 5584
3130 13:53:38.957218 # ok 1400 # SKIP SVE set FPSIMD get SVE for VL 5584
3131 13:53:38.957277 # ok 1401 Set SVE VL 5600
3132 13:53:38.957336 # ok 1402 # SKIP SVE set SVE get SVE for VL 5600
3133 13:53:38.957395 # ok 1403 # SKIP SVE set SVE get FPSIMD for VL 5600
3134 13:53:38.957469 # ok 1404 # SKIP SVE set FPSIMD get SVE for VL 5600
3135 13:53:38.957531 # ok 1405 Set SVE VL 5616
3136 13:53:38.957591 # ok 1406 # SKIP SVE set SVE get SVE for VL 5616
3137 13:53:38.985788 # ok 1407 # SKIP SVE set SVE get FPSIMD for VL 5616
3138 13:53:38.986239 # ok 1408 # SKIP SVE set FPSIMD get SVE for VL 5616
3139 13:53:38.986341 # ok 1409 Set SVE VL 5632
3140 13:53:38.986413 # ok 1410 # SKIP SVE set SVE get SVE for VL 5632
3141 13:53:38.986478 # ok 1411 # SKIP SVE set SVE get FPSIMD for VL 5632
3142 13:53:38.986553 # ok 1412 # SKIP SVE set FPSIMD get SVE for VL 5632
3143 13:53:38.986617 # ok 1413 Set SVE VL 5648
3144 13:53:38.988818 # ok 1414 # SKIP SVE set SVE get SVE for VL 5648
3145 13:53:38.989126 # ok 1415 # SKIP SVE set SVE get FPSIMD for VL 5648
3146 13:53:38.989212 # ok 1416 # SKIP SVE set FPSIMD get SVE for VL 5648
3147 13:53:38.989280 # ok 1417 Set SVE VL 5664
3148 13:53:38.989344 # ok 1418 # SKIP SVE set SVE get SVE for VL 5664
3149 13:53:38.989421 # ok 1419 # SKIP SVE set SVE get FPSIMD for VL 5664
3150 13:53:38.989502 # ok 1420 # SKIP SVE set FPSIMD get SVE for VL 5664
3151 13:53:38.989568 # ok 1421 Set SVE VL 5680
3152 13:53:38.989843 # ok 1422 # SKIP SVE set SVE get SVE for VL 5680
3153 13:53:38.989943 # ok 1423 # SKIP SVE set SVE get FPSIMD for VL 5680
3154 13:53:38.990030 # ok 1424 # SKIP SVE set FPSIMD get SVE for VL 5680
3155 13:53:38.990128 # ok 1425 Set SVE VL 5696
3156 13:53:38.990211 # ok 1426 # SKIP SVE set SVE get SVE for VL 5696
3157 13:53:38.990311 # ok 1427 # SKIP SVE set SVE get FPSIMD for VL 5696
3158 13:53:38.990390 # ok 1428 # SKIP SVE set FPSIMD get SVE for VL 5696
3159 13:53:38.990468 # ok 1429 Set SVE VL 5712
3160 13:53:38.991829 # ok 1430 # SKIP SVE set SVE get SVE for VL 5712
3161 13:53:38.992136 # ok 1431 # SKIP SVE set SVE get FPSIMD for VL 5712
3162 13:53:38.992242 # ok 1432 # SKIP SVE set FPSIMD get SVE for VL 5712
3163 13:53:38.992347 # ok 1433 Set SVE VL 5728
3164 13:53:38.992472 # ok 1434 # SKIP SVE set SVE get SVE for VL 5728
3165 13:53:38.992564 # ok 1435 # SKIP SVE set SVE get FPSIMD for VL 5728
3166 13:53:38.992668 # ok 1436 # SKIP SVE set FPSIMD get SVE for VL 5728
3167 13:53:38.992775 # ok 1437 Set SVE VL 5744
3168 13:53:38.992897 # ok 1438 # SKIP SVE set SVE get SVE for VL 5744
3169 13:53:38.992989 # ok 1439 # SKIP SVE set SVE get FPSIMD for VL 5744
3170 13:53:38.993085 # ok 1440 # SKIP SVE set FPSIMD get SVE for VL 5744
3171 13:53:38.993198 # ok 1441 Set SVE VL 5760
3172 13:53:38.993298 # ok 1442 # SKIP SVE set SVE get SVE for VL 5760
3173 13:53:38.993408 # ok 1443 # SKIP SVE set SVE get FPSIMD for VL 5760
3174 13:53:38.993529 # ok 1444 # SKIP SVE set FPSIMD get SVE for VL 5760
3175 13:53:38.993634 # ok 1445 Set SVE VL 5776
3176 13:53:38.993754 # ok 1446 # SKIP SVE set SVE get SVE for VL 5776
3177 13:53:38.993851 # ok 1447 # SKIP SVE set SVE get FPSIMD for VL 5776
3178 13:53:38.993959 # ok 1448 # SKIP SVE set FPSIMD get SVE for VL 5776
3179 13:53:38.994042 # ok 1449 Set SVE VL 5792
3180 13:53:38.994112 # ok 1450 # SKIP SVE set SVE get SVE for VL 5792
3181 13:53:38.994196 # ok 1451 # SKIP SVE set SVE get FPSIMD for VL 5792
3182 13:53:38.994284 # ok 1452 # SKIP SVE set FPSIMD get SVE for VL 5792
3183 13:53:38.994386 # ok 1453 Set SVE VL 5808
3184 13:53:38.994455 # ok 1454 # SKIP SVE set SVE get SVE for VL 5808
3185 13:53:38.995235 # ok 1455 # SKIP SVE set SVE get FPSIMD for VL 5808
3186 13:53:38.995540 # ok 1456 # SKIP SVE set FPSIMD get SVE for VL 5808
3187 13:53:38.995643 # ok 1457 Set SVE VL 5824
3188 13:53:38.995762 # ok 1458 # SKIP SVE set SVE get SVE for VL 5824
3189 13:53:38.995888 # ok 1459 # SKIP SVE set SVE get FPSIMD for VL 5824
3190 13:53:38.995994 # ok 1460 # SKIP SVE set FPSIMD get SVE for VL 5824
3191 13:53:38.996092 # ok 1461 Set SVE VL 5840
3192 13:53:38.996167 # ok 1462 # SKIP SVE set SVE get SVE for VL 5840
3193 13:53:38.996261 # ok 1463 # SKIP SVE set SVE get FPSIMD for VL 5840
3194 13:53:38.996341 # ok 1464 # SKIP SVE set FPSIMD get SVE for VL 5840
3195 13:53:38.996433 # ok 1465 Set SVE VL 5856
3196 13:53:38.996510 # ok 1466 # SKIP SVE set SVE get SVE for VL 5856
3197 13:53:38.996603 # ok 1467 # SKIP SVE set SVE get FPSIMD for VL 5856
3198 13:53:38.996900 # ok 1468 # SKIP SVE set FPSIMD get SVE for VL 5856
3199 13:53:38.996996 # ok 1469 Set SVE VL 5872
3200 13:53:38.997070 # ok 1470 # SKIP SVE set SVE get SVE for VL 5872
3201 13:53:38.997179 # ok 1471 # SKIP SVE set SVE get FPSIMD for VL 5872
3202 13:53:38.997261 # ok 1472 # SKIP SVE set FPSIMD get SVE for VL 5872
3203 13:53:38.997340 # ok 1473 Set SVE VL 5888
3204 13:53:38.997434 # ok 1474 # SKIP SVE set SVE get SVE for VL 5888
3205 13:53:38.997519 # ok 1475 # SKIP SVE set SVE get FPSIMD for VL 5888
3206 13:53:38.997626 # ok 1476 # SKIP SVE set FPSIMD get SVE for VL 5888
3207 13:53:38.997758 # ok 1477 Set SVE VL 5904
3208 13:53:38.997883 # ok 1478 # SKIP SVE set SVE get SVE for VL 5904
3209 13:53:38.997978 # ok 1479 # SKIP SVE set SVE get FPSIMD for VL 5904
3210 13:53:38.998086 # ok 1480 # SKIP SVE set FPSIMD get SVE for VL 5904
3211 13:53:38.998188 # ok 1481 Set SVE VL 5920
3212 13:53:38.998292 # ok 1482 # SKIP SVE set SVE get SVE for VL 5920
3213 13:53:38.998367 # ok 1483 # SKIP SVE set SVE get FPSIMD for VL 5920
3214 13:53:38.998626 # ok 1484 # SKIP SVE set FPSIMD get SVE for VL 5920
3215 13:53:38.999307 # ok 1485 Set SVE VL 5936
3216 13:53:38.999433 # ok 1486 # SKIP SVE set SVE get SVE for VL 5936
3217 13:53:38.999524 # ok 1487 # SKIP SVE set SVE get FPSIMD for VL 5936
3218 13:53:38.999650 # ok 1488 # SKIP SVE set FPSIMD get SVE for VL 5936
3219 13:53:38.999740 # ok 1489 Set SVE VL 5952
3220 13:53:38.999838 # ok 1490 # SKIP SVE set SVE get SVE for VL 5952
3221 13:53:38.999940 # ok 1491 # SKIP SVE set SVE get FPSIMD for VL 5952
3222 13:53:39.000028 # ok 1492 # SKIP SVE set FPSIMD get SVE for VL 5952
3223 13:53:39.000128 # ok 1493 Set SVE VL 5968
3224 13:53:39.000231 # ok 1494 # SKIP SVE set SVE get SVE for VL 5968
3225 13:53:39.000499 # ok 1495 # SKIP SVE set SVE get FPSIMD for VL 5968
3226 13:53:39.000597 # ok 1496 # SKIP SVE set FPSIMD get SVE for VL 5968
3227 13:53:39.000683 # ok 1497 Set SVE VL 5984
3228 13:53:39.000811 # ok 1498 # SKIP SVE set SVE get SVE for VL 5984
3229 13:53:39.000903 # ok 1499 # SKIP SVE set SVE get FPSIMD for VL 5984
3230 13:53:39.001005 # ok 1500 # SKIP SVE set FPSIMD get SVE for VL 5984
3231 13:53:39.001097 # ok 1501 Set SVE VL 6000
3232 13:53:39.001206 # ok 1502 # SKIP SVE set SVE get SVE for VL 6000
3233 13:53:39.001300 # ok 1503 # SKIP SVE set SVE get FPSIMD for VL 6000
3234 13:53:39.001404 # ok 1504 # SKIP SVE set FPSIMD get SVE for VL 6000
3235 13:53:39.001511 # ok 1505 Set SVE VL 6016
3236 13:53:39.001635 # ok 1506 # SKIP SVE set SVE get SVE for VL 6016
3237 13:53:39.001745 # ok 1507 # SKIP SVE set SVE get FPSIMD for VL 6016
3238 13:53:39.001835 # ok 1508 # SKIP SVE set FPSIMD get SVE for VL 6016
3239 13:53:39.001913 # ok 1509 Set SVE VL 6032
3240 13:53:39.002013 # ok 1510 # SKIP SVE set SVE get SVE for VL 6032
3241 13:53:39.002099 # ok 1511 # SKIP SVE set SVE get FPSIMD for VL 6032
3242 13:53:39.002177 # ok 1512 # SKIP SVE set FPSIMD get SVE for VL 6032
3243 13:53:39.002255 # ok 1513 Set SVE VL 6048
3244 13:53:39.002358 # ok 1514 # SKIP SVE set SVE get SVE for VL 6048
3245 13:53:39.002440 # ok 1515 # SKIP SVE set SVE get FPSIMD for VL 6048
3246 13:53:39.002502 # ok 1516 # SKIP SVE set FPSIMD get SVE for VL 6048
3247 13:53:39.002574 # ok 1517 Set SVE VL 6064
3248 13:53:39.003029 # ok 1518 # SKIP SVE set SVE get SVE for VL 6064
3249 13:53:39.003315 # ok 1519 # SKIP SVE set SVE get FPSIMD for VL 6064
3250 13:53:39.003400 # ok 1520 # SKIP SVE set FPSIMD get SVE for VL 6064
3251 13:53:39.003491 # ok 1521 Set SVE VL 6080
3252 13:53:39.003602 # ok 1522 # SKIP SVE set SVE get SVE for VL 6080
3253 13:53:39.003686 # ok 1523 # SKIP SVE set SVE get FPSIMD for VL 6080
3254 13:53:39.003769 # ok 1524 # SKIP SVE set FPSIMD get SVE for VL 6080
3255 13:53:39.003886 # ok 1525 Set SVE VL 6096
3256 13:53:39.003978 # ok 1526 # SKIP SVE set SVE get SVE for VL 6096
3257 13:53:39.004087 # ok 1527 # SKIP SVE set SVE get FPSIMD for VL 6096
3258 13:53:39.004160 # ok 1528 # SKIP SVE set FPSIMD get SVE for VL 6096
3259 13:53:39.004234 # ok 1529 Set SVE VL 6112
3260 13:53:39.004323 # ok 1530 # SKIP SVE set SVE get SVE for VL 6112
3261 13:53:39.004402 # ok 1531 # SKIP SVE set SVE get FPSIMD for VL 6112
3262 13:53:39.004520 # ok 1532 # SKIP SVE set FPSIMD get SVE for VL 6112
3263 13:53:39.004615 # ok 1533 Set SVE VL 6128
3264 13:53:39.004723 # ok 1534 # SKIP SVE set SVE get SVE for VL 6128
3265 13:53:39.004823 # ok 1535 # SKIP SVE set SVE get FPSIMD for VL 6128
3266 13:53:39.004927 # ok 1536 # SKIP SVE set FPSIMD get SVE for VL 6128
3267 13:53:39.005018 # ok 1537 Set SVE VL 6144
3268 13:53:39.005106 # ok 1538 # SKIP SVE set SVE get SVE for VL 6144
3269 13:53:39.005177 # ok 1539 # SKIP SVE set SVE get FPSIMD for VL 6144
3270 13:53:39.005277 # ok 1540 # SKIP SVE set FPSIMD get SVE for VL 6144
3271 13:53:39.005344 # ok 1541 Set SVE VL 6160
3272 13:53:39.005428 # ok 1542 # SKIP SVE set SVE get SVE for VL 6160
3273 13:53:39.005519 # ok 1543 # SKIP SVE set SVE get FPSIMD for VL 6160
3274 13:53:39.005610 # ok 1544 # SKIP SVE set FPSIMD get SVE for VL 6160
3275 13:53:39.005736 # ok 1545 Set SVE VL 6176
3276 13:53:39.005851 # ok 1546 # SKIP SVE set SVE get SVE for VL 6176
3277 13:53:39.005959 # ok 1547 # SKIP SVE set SVE get FPSIMD for VL 6176
3278 13:53:39.006073 # ok 1548 # SKIP SVE set FPSIMD get SVE for VL 6176
3279 13:53:39.006185 # ok 1549 Set SVE VL 6192
3280 13:53:39.006278 # ok 1550 # SKIP SVE set SVE get SVE for VL 6192
3281 13:53:39.006944 # ok 1551 # SKIP SVE set SVE get FPSIMD for VL 6192
3282 13:53:39.007262 # ok 1552 # SKIP SVE set FPSIMD get SVE for VL 6192
3283 13:53:39.007378 # ok 1553 Set SVE VL 6208
3284 13:53:39.007512 # ok 1554 # SKIP SVE set SVE get SVE for VL 6208
3285 13:53:39.007623 # ok 1555 # SKIP SVE set SVE get FPSIMD for VL 6208
3286 13:53:39.007758 # ok 1556 # SKIP SVE set FPSIMD get SVE for VL 6208
3287 13:53:39.007856 # ok 1557 Set SVE VL 6224
3288 13:53:39.007983 # ok 1558 # SKIP SVE set SVE get SVE for VL 6224
3289 13:53:39.008084 # ok 1559 # SKIP SVE set SVE get FPSIMD for VL 6224
3290 13:53:39.008206 # ok 1560 # SKIP SVE set FPSIMD get SVE for VL 6224
3291 13:53:39.008318 # ok 1561 Set SVE VL 6240
3292 13:53:39.008439 # ok 1562 # SKIP SVE set SVE get SVE for VL 6240
3293 13:53:39.008534 # ok 1563 # SKIP SVE set SVE get FPSIMD for VL 6240
3294 13:53:39.008651 # ok 1564 # SKIP SVE set FPSIMD get SVE for VL 6240
3295 13:53:39.008730 # ok 1565 Set SVE VL 6256
3296 13:53:39.008852 # ok 1566 # SKIP SVE set SVE get SVE for VL 6256
3297 13:53:39.008953 # ok 1567 # SKIP SVE set SVE get FPSIMD for VL 6256
3298 13:53:39.009079 # ok 1568 # SKIP SVE set FPSIMD get SVE for VL 6256
3299 13:53:39.009185 # ok 1569 Set SVE VL 6272
3300 13:53:39.009311 # ok 1570 # SKIP SVE set SVE get SVE for VL 6272
3301 13:53:39.009411 # ok 1571 # SKIP SVE set SVE get FPSIMD for VL 6272
3302 13:53:39.009530 # ok 1572 # SKIP SVE set FPSIMD get SVE for VL 6272
3303 13:53:39.009621 # ok 1573 Set SVE VL 6288
3304 13:53:39.009725 # ok 1574 # SKIP SVE set SVE get SVE for VL 6288
3305 13:53:39.009803 # ok 1575 # SKIP SVE set SVE get FPSIMD for VL 6288
3306 13:53:39.009892 # ok 1576 # SKIP SVE set FPSIMD get SVE for VL 6288
3307 13:53:39.009991 # ok 1577 Set SVE VL 6304
3308 13:53:39.010073 # ok 1578 # SKIP SVE set SVE get SVE for VL 6304
3309 13:53:39.010166 # ok 1579 # SKIP SVE set SVE get FPSIMD for VL 6304
3310 13:53:39.010259 # ok 1580 # SKIP SVE set FPSIMD get SVE for VL 6304
3311 13:53:39.010341 # ok 1581 Set SVE VL 6320
3312 13:53:39.010826 # ok 1582 # SKIP SVE set SVE get SVE for VL 6320
3313 13:53:39.011134 # ok 1583 # SKIP SVE set SVE get FPSIMD for VL 6320
3314 13:53:39.011246 # ok 1584 # SKIP SVE set FPSIMD get SVE for VL 6320
3315 13:53:39.011345 # ok 1585 Set SVE VL 6336
3316 13:53:39.011474 # ok 1586 # SKIP SVE set SVE get SVE for VL 6336
3317 13:53:39.011573 # ok 1587 # SKIP SVE set SVE get FPSIMD for VL 6336
3318 13:53:39.011666 # ok 1588 # SKIP SVE set FPSIMD get SVE for VL 6336
3319 13:53:39.011731 # ok 1589 Set SVE VL 6352
3320 13:53:39.013857 # ok 1590 # SKIP SVE set SVE get SVE for VL 6352
3321 13:53:39.013950 # ok 1591 # SKIP SVE set SVE get FPSIMD for VL 6352
3322 13:53:39.014042 # ok 1592 # SKIP SVE set FPSIMD get SVE for VL 6352
3323 13:53:39.014120 # ok 1593 Set SVE VL 6368
3324 13:53:39.014215 # ok 1594 # SKIP SVE set SVE get SVE for VL 6368
3325 13:53:39.014323 # ok 1595 # SKIP SVE set SVE get FPSIMD for VL 6368
3326 13:53:39.014803 # ok 1596 # SKIP SVE set FPSIMD get SVE for VL 6368
3327 13:53:39.015080 # ok 1597 Set SVE VL 6384
3328 13:53:39.015160 # ok 1598 # SKIP SVE set SVE get SVE for VL 6384
3329 13:53:39.015232 # ok 1599 # SKIP SVE set SVE get FPSIMD for VL 6384
3330 13:53:39.015339 # ok 1600 # SKIP SVE set FPSIMD get SVE for VL 6384
3331 13:53:39.015426 # ok 1601 Set SVE VL 6400
3332 13:53:39.015516 # ok 1602 # SKIP SVE set SVE get SVE for VL 6400
3333 13:53:39.015609 # ok 1603 # SKIP SVE set SVE get FPSIMD for VL 6400
3334 13:53:39.015690 # ok 1604 # SKIP SVE set FPSIMD get SVE for VL 6400
3335 13:53:39.015783 # ok 1605 Set SVE VL 6416
3336 13:53:39.015898 # ok 1606 # SKIP SVE set SVE get SVE for VL 6416
3337 13:53:39.015995 # ok 1607 # SKIP SVE set SVE get FPSIMD for VL 6416
3338 13:53:39.016113 # ok 1608 # SKIP SVE set FPSIMD get SVE for VL 6416
3339 13:53:39.016204 # ok 1609 Set SVE VL 6432
3340 13:53:39.016305 # ok 1610 # SKIP SVE set SVE get SVE for VL 6432
3341 13:53:39.016425 # ok 1611 # SKIP SVE set SVE get FPSIMD for VL 6432
3342 13:53:39.016517 # ok 1612 # SKIP SVE set FPSIMD get SVE for VL 6432
3343 13:53:39.016595 # ok 1613 Set SVE VL 6448
3344 13:53:39.016690 # ok 1614 # SKIP SVE set SVE get SVE for VL 6448
3345 13:53:39.016801 # ok 1615 # SKIP SVE set SVE get FPSIMD for VL 6448
3346 13:53:39.016901 # ok 1616 # SKIP SVE set FPSIMD get SVE for VL 6448
3347 13:53:39.016990 # ok 1617 Set SVE VL 6464
3348 13:53:39.017373 # ok 1618 # SKIP SVE set SVE get SVE for VL 6464
3349 13:53:39.017571 # ok 1619 # SKIP SVE set SVE get FPSIMD for VL 6464
3350 13:53:39.017727 # ok 1620 # SKIP SVE set FPSIMD get SVE for VL 6464
3351 13:53:39.017858 # ok 1621 Set SVE VL 6480
3352 13:53:39.017983 # ok 1622 # SKIP SVE set SVE get SVE for VL 6480
3353 13:53:39.018099 # ok 1623 # SKIP SVE set SVE get FPSIMD for VL 6480
3354 13:53:39.018217 # ok 1624 # SKIP SVE set FPSIMD get SVE for VL 6480
3355 13:53:39.018322 # ok 1625 Set SVE VL 6496
3356 13:53:39.018420 # ok 1626 # SKIP SVE set SVE get SVE for VL 6496
3357 13:53:39.018554 # ok 1627 # SKIP SVE set SVE get FPSIMD for VL 6496
3358 13:53:39.018674 # ok 1628 # SKIP SVE set FPSIMD get SVE for VL 6496
3359 13:53:39.018792 # ok 1629 Set SVE VL 6512
3360 13:53:39.018908 # ok 1630 # SKIP SVE set SVE get SVE for VL 6512
3361 13:53:39.019048 # ok 1631 # SKIP SVE set SVE get FPSIMD for VL 6512
3362 13:53:39.019170 # ok 1632 # SKIP SVE set FPSIMD get SVE for VL 6512
3363 13:53:39.019291 # ok 1633 Set SVE VL 6528
3364 13:53:39.019411 # ok 1634 # SKIP SVE set SVE get SVE for VL 6528
3365 13:53:39.019532 # ok 1635 # SKIP SVE set SVE get FPSIMD for VL 6528
3366 13:53:39.019679 # ok 1636 # SKIP SVE set FPSIMD get SVE for VL 6528
3367 13:53:39.019797 # ok 1637 Set SVE VL 6544
3368 13:53:39.019911 # ok 1638 # SKIP SVE set SVE get SVE for VL 6544
3369 13:53:39.020016 # ok 1639 # SKIP SVE set SVE get FPSIMD for VL 6544
3370 13:53:39.020121 # ok 1640 # SKIP SVE set FPSIMD get SVE for VL 6544
3371 13:53:39.020246 # ok 1641 Set SVE VL 6560
3372 13:53:39.020391 # ok 1642 # SKIP SVE set SVE get SVE for VL 6560
3373 13:53:39.020513 # ok 1643 # SKIP SVE set SVE get FPSIMD for VL 6560
3374 13:53:39.020638 # ok 1644 # SKIP SVE set FPSIMD get SVE for VL 6560
3375 13:53:39.020804 # ok 1645 Set SVE VL 6576
3376 13:53:39.020957 # ok 1646 # SKIP SVE set SVE get SVE for VL 6576
3377 13:53:39.021109 # ok 1647 # SKIP SVE set SVE get FPSIMD for VL 6576
3378 13:53:39.021306 # ok 1648 # SKIP SVE set FPSIMD get SVE for VL 6576
3379 13:53:39.021457 # ok 1649 Set SVE VL 6592
3380 13:53:39.021593 # ok 1650 # SKIP SVE set SVE get SVE for VL 6592
3381 13:53:39.022468 # ok 1651 # SKIP SVE set SVE get FPSIMD for VL 6592
3382 13:53:39.022608 # ok 1652 # SKIP SVE set FPSIMD get SVE for VL 6592
3383 13:53:39.022692 # ok 1653 Set SVE VL 6608
3384 13:53:39.022767 # ok 1654 # SKIP SVE set SVE get SVE for VL 6608
3385 13:53:39.022843 # ok 1655 # SKIP SVE set SVE get FPSIMD for VL 6608
3386 13:53:39.022939 # ok 1656 # SKIP SVE set FPSIMD get SVE for VL 6608
3387 13:53:39.023024 # ok 1657 Set SVE VL 6624
3388 13:53:39.023103 # ok 1658 # SKIP SVE set SVE get SVE for VL 6624
3389 13:53:39.023184 # ok 1659 # SKIP SVE set SVE get FPSIMD for VL 6624
3390 13:53:39.023265 # ok 1660 # SKIP SVE set FPSIMD get SVE for VL 6624
3391 13:53:39.023543 # ok 1661 Set SVE VL 6640
3392 13:53:39.023644 # ok 1662 # SKIP SVE set SVE get SVE for VL 6640
3393 13:53:39.023738 # ok 1663 # SKIP SVE set SVE get FPSIMD for VL 6640
3394 13:53:39.023859 # ok 1664 # SKIP SVE set FPSIMD get SVE for VL 6640
3395 13:53:39.023967 # ok 1665 Set SVE VL 6656
3396 13:53:39.024073 # ok 1666 # SKIP SVE set SVE get SVE for VL 6656
3397 13:53:39.024186 # ok 1667 # SKIP SVE set SVE get FPSIMD for VL 6656
3398 13:53:39.024286 # ok 1668 # SKIP SVE set FPSIMD get SVE for VL 6656
3399 13:53:39.024387 # ok 1669 Set SVE VL 6672
3400 13:53:39.024466 # ok 1670 # SKIP SVE set SVE get SVE for VL 6672
3401 13:53:39.024574 # ok 1671 # SKIP SVE set SVE get FPSIMD for VL 6672
3402 13:53:39.024688 # ok 1672 # SKIP SVE set FPSIMD get SVE for VL 6672
3403 13:53:39.024790 # ok 1673 Set SVE VL 6688
3404 13:53:39.024890 # ok 1674 # SKIP SVE set SVE get SVE for VL 6688
3405 13:53:39.025011 # ok 1675 # SKIP SVE set SVE get FPSIMD for VL 6688
3406 13:53:39.025099 # ok 1676 # SKIP SVE set FPSIMD get SVE for VL 6688
3407 13:53:39.025183 # ok 1677 Set SVE VL 6704
3408 13:53:39.025265 # ok 1678 # SKIP SVE set SVE get SVE for VL 6704
3409 13:53:39.025372 # ok 1679 # SKIP SVE set SVE get FPSIMD for VL 6704
3410 13:53:39.025467 # ok 1680 # SKIP SVE set FPSIMD get SVE for VL 6704
3411 13:53:39.025559 # ok 1681 Set SVE VL 6720
3412 13:53:39.025636 # ok 1682 # SKIP SVE set SVE get SVE for VL 6720
3413 13:53:39.025723 # ok 1683 # SKIP SVE set SVE get FPSIMD for VL 6720
3414 13:53:39.025793 # ok 1684 # SKIP SVE set FPSIMD get SVE for VL 6720
3415 13:53:39.025872 # ok 1685 Set SVE VL 6736
3416 13:53:39.025948 # ok 1686 # SKIP SVE set SVE get SVE for VL 6736
3417 13:53:39.026029 # ok 1687 # SKIP SVE set SVE get FPSIMD for VL 6736
3418 13:53:39.026123 # ok 1688 # SKIP SVE set FPSIMD get SVE for VL 6736
3419 13:53:39.026205 # ok 1689 Set SVE VL 6752
3420 13:53:39.026295 # ok 1690 # SKIP SVE set SVE get SVE for VL 6752
3421 13:53:39.026393 # ok 1691 # SKIP SVE set SVE get FPSIMD for VL 6752
3422 13:53:39.026485 # ok 1692 # SKIP SVE set FPSIMD get SVE for VL 6752
3423 13:53:39.026561 # ok 1693 Set SVE VL 6768
3424 13:53:39.026628 # ok 1694 # SKIP SVE set SVE get SVE for VL 6768
3425 13:53:39.026697 # ok 1695 # SKIP SVE set SVE get FPSIMD for VL 6768
3426 13:53:39.026776 # ok 1696 # SKIP SVE set FPSIMD get SVE for VL 6768
3427 13:53:39.026862 # ok 1697 Set SVE VL 6784
3428 13:53:39.026959 # ok 1698 # SKIP SVE set SVE get SVE for VL 6784
3429 13:53:39.027083 # ok 1699 # SKIP SVE set SVE get FPSIMD for VL 6784
3430 13:53:39.027216 # ok 1700 # SKIP SVE set FPSIMD get SVE for VL 6784
3431 13:53:39.027326 # ok 1701 Set SVE VL 6800
3432 13:53:39.027431 # ok 1702 # SKIP SVE set SVE get SVE for VL 6800
3433 13:53:39.027537 # ok 1703 # SKIP SVE set SVE get FPSIMD for VL 6800
3434 13:53:39.027852 # ok 1704 # SKIP SVE set FPSIMD get SVE for VL 6800
3435 13:53:39.027955 # ok 1705 Set SVE VL 6816
3436 13:53:39.028039 # ok 1706 # SKIP SVE set SVE get SVE for VL 6816
3437 13:53:39.028118 # ok 1707 # SKIP SVE set SVE get FPSIMD for VL 6816
3438 13:53:39.028195 # ok 1708 # SKIP SVE set FPSIMD get SVE for VL 6816
3439 13:53:39.028274 # ok 1709 Set SVE VL 6832
3440 13:53:39.028355 # ok 1710 # SKIP SVE set SVE get SVE for VL 6832
3441 13:53:39.028430 # ok 1711 # SKIP SVE set SVE get FPSIMD for VL 6832
3442 13:53:39.028531 # ok 1712 # SKIP SVE set FPSIMD get SVE for VL 6832
3443 13:53:39.028624 # ok 1713 Set SVE VL 6848
3444 13:53:39.028721 # ok 1714 # SKIP SVE set SVE get SVE for VL 6848
3445 13:53:39.028803 # ok 1715 # SKIP SVE set SVE get FPSIMD for VL 6848
3446 13:53:39.028897 # ok 1716 # SKIP SVE set FPSIMD get SVE for VL 6848
3447 13:53:39.028967 # ok 1717 Set SVE VL 6864
3448 13:53:39.029040 # ok 1718 # SKIP SVE set SVE get SVE for VL 6864
3449 13:53:39.029113 # ok 1719 # SKIP SVE set SVE get FPSIMD for VL 6864
3450 13:53:39.029185 # ok 1720 # SKIP SVE set FPSIMD get SVE for VL 6864
3451 13:53:39.029273 # ok 1721 Set SVE VL 6880
3452 13:53:39.029362 # ok 1722 # SKIP SVE set SVE get SVE for VL 6880
3453 13:53:39.029436 # ok 1723 # SKIP SVE set SVE get FPSIMD for VL 6880
3454 13:53:39.029512 # ok 1724 # SKIP SVE set FPSIMD get SVE for VL 6880
3455 13:53:39.029605 # ok 1725 Set SVE VL 6896
3456 13:53:39.029706 # ok 1726 # SKIP SVE set SVE get SVE for VL 6896
3457 13:53:39.029800 # ok 1727 # SKIP SVE set SVE get FPSIMD for VL 6896
3458 13:53:39.029875 # ok 1728 # SKIP SVE set FPSIMD get SVE for VL 6896
3459 13:53:39.029957 # ok 1729 Set SVE VL 6912
3460 13:53:39.030042 # ok 1730 # SKIP SVE set SVE get SVE for VL 6912
3461 13:53:39.030124 # ok 1731 # SKIP SVE set SVE get FPSIMD for VL 6912
3462 13:53:39.030204 # ok 1732 # SKIP SVE set FPSIMD get SVE for VL 6912
3463 13:53:39.030283 # ok 1733 Set SVE VL 6928
3464 13:53:39.030362 # ok 1734 # SKIP SVE set SVE get SVE for VL 6928
3465 13:53:39.030441 # ok 1735 # SKIP SVE set SVE get FPSIMD for VL 6928
3466 13:53:39.030528 # ok 1736 # SKIP SVE set FPSIMD get SVE for VL 6928
3467 13:53:39.030609 # ok 1737 Set SVE VL 6944
3468 13:53:39.030689 # ok 1738 # SKIP SVE set SVE get SVE for VL 6944
3469 13:53:39.030765 # ok 1739 # SKIP SVE set SVE get FPSIMD for VL 6944
3470 13:53:39.030845 # ok 1740 # SKIP SVE set FPSIMD get SVE for VL 6944
3471 13:53:39.030919 # ok 1741 Set SVE VL 6960
3472 13:53:39.031004 # ok 1742 # SKIP SVE set SVE get SVE for VL 6960
3473 13:53:39.031071 # ok 1743 # SKIP SVE set SVE get FPSIMD for VL 6960
3474 13:53:39.031139 # ok 1744 # SKIP SVE set FPSIMD get SVE for VL 6960
3475 13:53:39.031204 # ok 1745 Set SVE VL 6976
3476 13:53:39.031275 # ok 1746 # SKIP SVE set SVE get SVE for VL 6976
3477 13:53:39.031554 # ok 1747 # SKIP SVE set SVE get FPSIMD for VL 6976
3478 13:53:39.031666 # ok 1748 # SKIP SVE set FPSIMD get SVE for VL 6976
3479 13:53:39.031766 # ok 1749 Set SVE VL 6992
3480 13:53:39.031856 # ok 1750 # SKIP SVE set SVE get SVE for VL 6992
3481 13:53:39.031946 # ok 1751 # SKIP SVE set SVE get FPSIMD for VL 6992
3482 13:53:39.032033 # ok 1752 # SKIP SVE set FPSIMD get SVE for VL 6992
3483 13:53:39.032109 # ok 1753 Set SVE VL 7008
3484 13:53:39.032174 # ok 1754 # SKIP SVE set SVE get SVE for VL 7008
3485 13:53:39.032245 # ok 1755 # SKIP SVE set SVE get FPSIMD for VL 7008
3486 13:53:39.032334 # ok 1756 # SKIP SVE set FPSIMD get SVE for VL 7008
3487 13:53:39.032405 # ok 1757 Set SVE VL 7024
3488 13:53:39.032466 # ok 1758 # SKIP SVE set SVE get SVE for VL 7024
3489 13:53:39.032530 # ok 1759 # SKIP SVE set SVE get FPSIMD for VL 7024
3490 13:53:39.032621 # ok 1760 # SKIP SVE set FPSIMD get SVE for VL 7024
3491 13:53:39.032698 # ok 1761 Set SVE VL 7040
3492 13:53:39.032780 # ok 1762 # SKIP SVE set SVE get SVE for VL 7040
3493 13:53:39.032875 # ok 1763 # SKIP SVE set SVE get FPSIMD for VL 7040
3494 13:53:39.032953 # ok 1764 # SKIP SVE set FPSIMD get SVE for VL 7040
3495 13:53:39.033032 # ok 1765 Set SVE VL 7056
3496 13:53:39.033326 # ok 1766 # SKIP SVE set SVE get SVE for VL 7056
3497 13:53:39.033435 # ok 1767 # SKIP SVE set SVE get FPSIMD for VL 7056
3498 13:53:39.033528 # ok 1768 # SKIP SVE set FPSIMD get SVE for VL 7056
3499 13:53:39.033642 # ok 1769 Set SVE VL 7072
3500 13:53:39.033724 # ok 1770 # SKIP SVE set SVE get SVE for VL 7072
3501 13:53:39.033798 # ok 1771 # SKIP SVE set SVE get FPSIMD for VL 7072
3502 13:53:39.033871 # ok 1772 # SKIP SVE set FPSIMD get SVE for VL 7072
3503 13:53:39.036803 # ok 1773 Set SVE VL 7088
3504 13:53:39.036957 # ok 1774 # SKIP SVE set SVE get SVE for VL 7088
3505 13:53:39.037060 # ok 1775 # SKIP SVE set SVE get FPSIMD for VL 7088
3506 13:53:39.037167 # ok 1776 # SKIP SVE set FPSIMD get SVE for VL 7088
3507 13:53:39.037273 # ok 1777 Set SVE VL 7104
3508 13:53:39.037361 # ok 1778 # SKIP SVE set SVE get SVE for VL 7104
3509 13:53:39.037441 # ok 1779 # SKIP SVE set SVE get FPSIMD for VL 7104
3510 13:53:39.037520 # ok 1780 # SKIP SVE set FPSIMD get SVE for VL 7104
3511 13:53:39.037598 # ok 1781 Set SVE VL 7120
3512 13:53:39.037889 # ok 1782 # SKIP SVE set SVE get SVE for VL 7120
3513 13:53:39.037985 # ok 1783 # SKIP SVE set SVE get FPSIMD for VL 7120
3514 13:53:39.038068 # ok 1784 # SKIP SVE set FPSIMD get SVE for VL 7120
3515 13:53:39.038165 # ok 1785 Set SVE VL 7136
3516 13:53:39.038252 # ok 1786 # SKIP SVE set SVE get SVE for VL 7136
3517 13:53:39.038344 # ok 1787 # SKIP SVE set SVE get FPSIMD for VL 7136
3518 13:53:39.038433 # ok 1788 # SKIP SVE set FPSIMD get SVE for VL 7136
3519 13:53:39.038507 # ok 1789 Set SVE VL 7152
3520 13:53:39.038598 # ok 1790 # SKIP SVE set SVE get SVE for VL 7152
3521 13:53:39.038681 # ok 1791 # SKIP SVE set SVE get FPSIMD for VL 7152
3522 13:53:39.038778 # ok 1792 # SKIP SVE set FPSIMD get SVE for VL 7152
3523 13:53:39.038865 # ok 1793 Set SVE VL 7168
3524 13:53:39.038938 # ok 1794 # SKIP SVE set SVE get SVE for VL 7168
3525 13:53:39.039032 # ok 1795 # SKIP SVE set SVE get FPSIMD for VL 7168
3526 13:53:39.039115 # ok 1796 # SKIP SVE set FPSIMD get SVE for VL 7168
3527 13:53:39.039199 # ok 1797 Set SVE VL 7184
3528 13:53:39.039264 # ok 1798 # SKIP SVE set SVE get SVE for VL 7184
3529 13:53:39.039350 # ok 1799 # SKIP SVE set SVE get FPSIMD for VL 7184
3530 13:53:39.039428 # ok 1800 # SKIP SVE set FPSIMD get SVE for VL 7184
3531 13:53:39.039695 # ok 1801 Set SVE VL 7200
3532 13:53:39.039803 # ok 1802 # SKIP SVE set SVE get SVE for VL 7200
3533 13:53:39.039905 # ok 1803 # SKIP SVE set SVE get FPSIMD for VL 7200
3534 13:53:39.039992 # ok 1804 # SKIP SVE set FPSIMD get SVE for VL 7200
3535 13:53:39.040079 # ok 1805 Set SVE VL 7216
3536 13:53:39.040177 # ok 1806 # SKIP SVE set SVE get SVE for VL 7216
3537 13:53:39.040264 # ok 1807 # SKIP SVE set SVE get FPSIMD for VL 7216
3538 13:53:39.040364 # ok 1808 # SKIP SVE set FPSIMD get SVE for VL 7216
3539 13:53:39.040464 # ok 1809 Set SVE VL 7232
3540 13:53:39.040563 # ok 1810 # SKIP SVE set SVE get SVE for VL 7232
3541 13:53:39.040662 # ok 1811 # SKIP SVE set SVE get FPSIMD for VL 7232
3542 13:53:39.040965 # ok 1812 # SKIP SVE set FPSIMD get SVE for VL 7232
3543 13:53:39.041052 # ok 1813 Set SVE VL 7248
3544 13:53:39.041146 # ok 1814 # SKIP SVE set SVE get SVE for VL 7248
3545 13:53:39.041228 # ok 1815 # SKIP SVE set SVE get FPSIMD for VL 7248
3546 13:53:39.041320 # ok 1816 # SKIP SVE set FPSIMD get SVE for VL 7248
3547 13:53:39.041415 # ok 1817 Set SVE VL 7264
3548 13:53:39.041504 # ok 1818 # SKIP SVE set SVE get SVE for VL 7264
3549 13:53:39.041785 # ok 1819 # SKIP SVE set SVE get FPSIMD for VL 7264
3550 13:53:39.041871 # ok 1820 # SKIP SVE set FPSIMD get SVE for VL 7264
3551 13:53:39.041946 # ok 1821 Set SVE VL 7280
3552 13:53:39.042050 # ok 1822 # SKIP SVE set SVE get SVE for VL 7280
3553 13:53:39.042146 # ok 1823 # SKIP SVE set SVE get FPSIMD for VL 7280
3554 13:53:39.042265 # ok 1824 # SKIP SVE set FPSIMD get SVE for VL 7280
3555 13:53:39.042364 # ok 1825 Set SVE VL 7296
3556 13:53:39.042661 # ok 1826 # SKIP SVE set SVE get SVE for VL 7296
3557 13:53:39.042752 # ok 1827 # SKIP SVE set SVE get FPSIMD for VL 7296
3558 13:53:39.042847 # ok 1828 # SKIP SVE set FPSIMD get SVE for VL 7296
3559 13:53:39.042918 # ok 1829 Set SVE VL 7312
3560 13:53:39.043007 # ok 1830 # SKIP SVE set SVE get SVE for VL 7312
3561 13:53:39.043092 # ok 1831 # SKIP SVE set SVE get FPSIMD for VL 7312
3562 13:53:39.043186 # ok 1832 # SKIP SVE set FPSIMD get SVE for VL 7312
3563 13:53:39.043273 # ok 1833 Set SVE VL 7328
3564 13:53:39.043399 # ok 1834 # SKIP SVE set SVE get SVE for VL 7328
3565 13:53:39.043510 # ok 1835 # SKIP SVE set SVE get FPSIMD for VL 7328
3566 13:53:39.043628 # ok 1836 # SKIP SVE set FPSIMD get SVE for VL 7328
3567 13:53:39.043735 # ok 1837 Set SVE VL 7344
3568 13:53:39.044013 # ok 1838 # SKIP SVE set SVE get SVE for VL 7344
3569 13:53:39.044105 # ok 1839 # SKIP SVE set SVE get FPSIMD for VL 7344
3570 13:53:39.044194 # ok 1840 # SKIP SVE set FPSIMD get SVE for VL 7344
3571 13:53:39.044271 # ok 1841 Set SVE VL 7360
3572 13:53:39.044351 # ok 1842 # SKIP SVE set SVE get SVE for VL 7360
3573 13:53:39.044440 # ok 1843 # SKIP SVE set SVE get FPSIMD for VL 7360
3574 13:53:39.044517 # ok 1844 # SKIP SVE set FPSIMD get SVE for VL 7360
3575 13:53:39.044607 # ok 1845 Set SVE VL 7376
3576 13:53:39.044682 # ok 1846 # SKIP SVE set SVE get SVE for VL 7376
3577 13:53:39.044770 # ok 1847 # SKIP SVE set SVE get FPSIMD for VL 7376
3578 13:53:39.044852 # ok 1848 # SKIP SVE set FPSIMD get SVE for VL 7376
3579 13:53:39.044939 # ok 1849 Set SVE VL 7392
3580 13:53:39.045202 # ok 1850 # SKIP SVE set SVE get SVE for VL 7392
3581 13:53:39.045287 # ok 1851 # SKIP SVE set SVE get FPSIMD for VL 7392
3582 13:53:39.045428 # ok 1852 # SKIP SVE set FPSIMD get SVE for VL 7392
3583 13:53:39.045538 # ok 1853 Set SVE VL 7408
3584 13:53:39.045624 # ok 1854 # SKIP SVE set SVE get SVE for VL 7408
3585 13:53:39.045721 # ok 1855 # SKIP SVE set SVE get FPSIMD for VL 7408
3586 13:53:39.045792 # ok 1856 # SKIP SVE set FPSIMD get SVE for VL 7408
3587 13:53:39.045881 # ok 1857 Set SVE VL 7424
3588 13:53:39.045958 # ok 1858 # SKIP SVE set SVE get SVE for VL 7424
3589 13:53:39.046046 # ok 1859 # SKIP SVE set SVE get FPSIMD for VL 7424
3590 13:53:39.046133 # ok 1860 # SKIP SVE set FPSIMD get SVE for VL 7424
3591 13:53:39.046213 # ok 1861 Set SVE VL 7440
3592 13:53:39.046508 # ok 1862 # SKIP SVE set SVE get SVE for VL 7440
3593 13:53:39.046616 # ok 1863 # SKIP SVE set SVE get FPSIMD for VL 7440
3594 13:53:39.046722 # ok 1864 # SKIP SVE set FPSIMD get SVE for VL 7440
3595 13:53:39.046813 # ok 1865 Set SVE VL 7456
3596 13:53:39.046916 # ok 1866 # SKIP SVE set SVE get SVE for VL 7456
3597 13:53:39.047216 # ok 1867 # SKIP SVE set SVE get FPSIMD for VL 7456
3598 13:53:39.047352 # ok 1868 # SKIP SVE set FPSIMD get SVE for VL 7456
3599 13:53:39.047486 # ok 1869 Set SVE VL 7472
3600 13:53:39.047710 # ok 1870 # SKIP SVE set SVE get SVE for VL 7472
3601 13:53:39.047833 # ok 1871 # SKIP SVE set SVE get FPSIMD for VL 7472
3602 13:53:39.047967 # ok 1872 # SKIP SVE set FPSIMD get SVE for VL 7472
3603 13:53:39.048063 # ok 1873 Set SVE VL 7488
3604 13:53:39.048165 # ok 1874 # SKIP SVE set SVE get SVE for VL 7488
3605 13:53:39.048252 # ok 1875 # SKIP SVE set SVE get FPSIMD for VL 7488
3606 13:53:39.048335 # ok 1876 # SKIP SVE set FPSIMD get SVE for VL 7488
3607 13:53:39.048417 # ok 1877 Set SVE VL 7504
3608 13:53:39.048515 # ok 1878 # SKIP SVE set SVE get SVE for VL 7504
3609 13:53:39.048600 # ok 1879 # SKIP SVE set SVE get FPSIMD for VL 7504
3610 13:53:39.048703 # ok 1880 # SKIP SVE set FPSIMD get SVE for VL 7504
3611 13:53:39.048789 # ok 1881 Set SVE VL 7520
3612 13:53:39.048888 # ok 1882 # SKIP SVE set SVE get SVE for VL 7520
3613 13:53:39.048987 # ok 1883 # SKIP SVE set SVE get FPSIMD for VL 7520
3614 13:53:39.049089 # ok 1884 # SKIP SVE set FPSIMD get SVE for VL 7520
3615 13:53:39.049422 # ok 1885 Set SVE VL 7536
3616 13:53:39.049521 # ok 1886 # SKIP SVE set SVE get SVE for VL 7536
3617 13:53:39.049621 # ok 1887 # SKIP SVE set SVE get FPSIMD for VL 7536
3618 13:53:39.049716 # ok 1888 # SKIP SVE set FPSIMD get SVE for VL 7536
3619 13:53:39.049824 # ok 1889 Set SVE VL 7552
3620 13:53:39.049924 # ok 1890 # SKIP SVE set SVE get SVE for VL 7552
3621 13:53:39.050211 # ok 1891 # SKIP SVE set SVE get FPSIMD for VL 7552
3622 13:53:39.050309 # ok 1892 # SKIP SVE set FPSIMD get SVE for VL 7552
3623 13:53:39.050404 # ok 1893 Set SVE VL 7568
3624 13:53:39.050506 # ok 1894 # SKIP SVE set SVE get SVE for VL 7568
3625 13:53:39.050608 # ok 1895 # SKIP SVE set SVE get FPSIMD for VL 7568
3626 13:53:39.050708 # ok 1896 # SKIP SVE set FPSIMD get SVE for VL 7568
3627 13:53:39.050807 # ok 1897 Set SVE VL 7584
3628 13:53:39.051101 # ok 1898 # SKIP SVE set SVE get SVE for VL 7584
3629 13:53:39.051200 # ok 1899 # SKIP SVE set SVE get FPSIMD for VL 7584
3630 13:53:39.051298 # ok 1900 # SKIP SVE set FPSIMD get SVE for VL 7584
3631 13:53:39.051397 # ok 1901 Set SVE VL 7600
3632 13:53:39.051677 # ok 1902 # SKIP SVE set SVE get SVE for VL 7600
3633 13:53:39.051829 # ok 1903 # SKIP SVE set SVE get FPSIMD for VL 7600
3634 13:53:39.051988 # ok 1904 # SKIP SVE set FPSIMD get SVE for VL 7600
3635 13:53:39.052123 # ok 1905 Set SVE VL 7616
3636 13:53:39.052271 # ok 1906 # SKIP SVE set SVE get SVE for VL 7616
3637 13:53:39.052366 # ok 1907 # SKIP SVE set SVE get FPSIMD for VL 7616
3638 13:53:39.052466 # ok 1908 # SKIP SVE set FPSIMD get SVE for VL 7616
3639 13:53:39.052555 # ok 1909 Set SVE VL 7632
3640 13:53:39.052654 # ok 1910 # SKIP SVE set SVE get SVE for VL 7632
3641 13:53:39.052755 # ok 1911 # SKIP SVE set SVE get FPSIMD for VL 7632
3642 13:53:39.053066 # ok 1912 # SKIP SVE set FPSIMD get SVE for VL 7632
3643 13:53:39.053166 # ok 1913 Set SVE VL 7648
3644 13:53:39.053266 # ok 1914 # SKIP SVE set SVE get SVE for VL 7648
3645 13:53:39.053352 # ok 1915 # SKIP SVE set SVE get FPSIMD for VL 7648
3646 13:53:39.053451 # ok 1916 # SKIP SVE set FPSIMD get SVE for VL 7648
3647 13:53:39.053549 # ok 1917 Set SVE VL 7664
3648 13:53:39.053852 # ok 1918 # SKIP SVE set SVE get SVE for VL 7664
3649 13:53:39.053953 # ok 1919 # SKIP SVE set SVE get FPSIMD for VL 7664
3650 13:53:39.054055 # ok 1920 # SKIP SVE set FPSIMD get SVE for VL 7664
3651 13:53:39.054155 # ok 1921 Set SVE VL 7680
3652 13:53:39.054240 # ok 1922 # SKIP SVE set SVE get SVE for VL 7680
3653 13:53:39.054527 # ok 1923 # SKIP SVE set SVE get FPSIMD for VL 7680
3654 13:53:39.054636 # ok 1924 # SKIP SVE set FPSIMD get SVE for VL 7680
3655 13:53:39.054746 # ok 1925 Set SVE VL 7696
3656 13:53:39.055073 # ok 1926 # SKIP SVE set SVE get SVE for VL 7696
3657 13:53:39.055268 # ok 1927 # SKIP SVE set SVE get FPSIMD for VL 7696
3658 13:53:39.055462 # ok 1928 # SKIP SVE set FPSIMD get SVE for VL 7696
3659 13:53:39.055624 # ok 1929 Set SVE VL 7712
3660 13:53:39.055789 # ok 1930 # SKIP SVE set SVE get SVE for VL 7712
3661 13:53:39.055950 # ok 1931 # SKIP SVE set SVE get FPSIMD for VL 7712
3662 13:53:39.056110 # ok 1932 # SKIP SVE set FPSIMD get SVE for VL 7712
3663 13:53:39.056303 # ok 1933 Set SVE VL 7728
3664 13:53:39.056461 # ok 1934 # SKIP SVE set SVE get SVE for VL 7728
3665 13:53:39.056621 # ok 1935 # SKIP SVE set SVE get FPSIMD for VL 7728
3666 13:53:39.056780 # ok 1936 # SKIP SVE set FPSIMD get SVE for VL 7728
3667 13:53:39.056939 # ok 1937 Set SVE VL 7744
3668 13:53:39.057062 # ok 1938 # SKIP SVE set SVE get SVE for VL 7744
3669 13:53:39.057191 # ok 1939 # SKIP SVE set SVE get FPSIMD for VL 7744
3670 13:53:39.057344 # ok 1940 # SKIP SVE set FPSIMD get SVE for VL 7744
3671 13:53:39.057484 # ok 1941 Set SVE VL 7760
3672 13:53:39.057690 # ok 1942 # SKIP SVE set SVE get SVE for VL 7760
3673 13:53:39.057827 # ok 1943 # SKIP SVE set SVE get FPSIMD for VL 7760
3674 13:53:39.057945 # ok 1944 # SKIP SVE set FPSIMD get SVE for VL 7760
3675 13:53:39.058061 # ok 1945 Set SVE VL 7776
3676 13:53:39.058176 # ok 1946 # SKIP SVE set SVE get SVE for VL 7776
3677 13:53:39.058333 # ok 1947 # SKIP SVE set SVE get FPSIMD for VL 7776
3678 13:53:39.058475 # ok 1948 # SKIP SVE set FPSIMD get SVE for VL 7776
3679 13:53:39.058593 # ok 1949 Set SVE VL 7792
3680 13:53:39.058705 # ok 1950 # SKIP SVE set SVE get SVE for VL 7792
3681 13:53:39.058792 # ok 1951 # SKIP SVE set SVE get FPSIMD for VL 7792
3682 13:53:39.058879 # ok 1952 # SKIP SVE set FPSIMD get SVE for VL 7792
3683 13:53:39.058967 # ok 1953 Set SVE VL 7808
3684 13:53:39.059054 # ok 1954 # SKIP SVE set SVE get SVE for VL 7808
3685 13:53:39.059140 # ok 1955 # SKIP SVE set SVE get FPSIMD for VL 7808
3686 13:53:39.060195 # ok 1956 # SKIP SVE set FPSIMD get SVE for VL 7808
3687 13:53:39.060297 # ok 1957 Set SVE VL 7824
3688 13:53:39.060392 # ok 1958 # SKIP SVE set SVE get SVE for VL 7824
3689 13:53:39.060698 # ok 1959 # SKIP SVE set SVE get FPSIMD for VL 7824
3690 13:53:39.060799 # ok 1960 # SKIP SVE set FPSIMD get SVE for VL 7824
3691 13:53:39.061096 # ok 1961 Set SVE VL 7840
3692 13:53:39.061182 # ok 1962 # SKIP SVE set SVE get SVE for VL 7840
3693 13:53:39.061248 # ok 1963 # SKIP SVE set SVE get FPSIMD for VL 7840
3694 13:53:39.061324 # ok 1964 # SKIP SVE set FPSIMD get SVE for VL 7840
3695 13:53:39.061390 # ok 1965 Set SVE VL 7856
3696 13:53:39.061464 # ok 1966 # SKIP SVE set SVE get SVE for VL 7856
3697 13:53:39.061540 # ok 1967 # SKIP SVE set SVE get FPSIMD for VL 7856
3698 13:53:39.061616 # ok 1968 # SKIP SVE set FPSIMD get SVE for VL 7856
3699 13:53:39.061901 # ok 1969 Set SVE VL 7872
3700 13:53:39.061985 # ok 1970 # SKIP SVE set SVE get SVE for VL 7872
3701 13:53:39.062071 # ok 1971 # SKIP SVE set SVE get FPSIMD for VL 7872
3702 13:53:39.062170 # ok 1972 # SKIP SVE set FPSIMD get SVE for VL 7872
3703 13:53:39.062237 # ok 1973 Set SVE VL 7888
3704 13:53:39.062307 # ok 1974 # SKIP SVE set SVE get SVE for VL 7888
3705 13:53:39.062386 # ok 1975 # SKIP SVE set SVE get FPSIMD for VL 7888
3706 13:53:39.062931 # ok 1976 # SKIP SVE set FPSIMD get SVE for VL 7888
3707 13:53:39.063030 # ok 1977 Set SVE VL 7904
3708 13:53:39.063286 # ok 1978 # SKIP SVE set SVE get SVE for VL 7904
3709 13:53:39.063387 # ok 1979 # SKIP SVE set SVE get FPSIMD for VL 7904
3710 13:53:39.063488 # ok 1980 # SKIP SVE set FPSIMD get SVE for VL 7904
3711 13:53:39.063576 # ok 1981 Set SVE VL 7920
3712 13:53:39.063676 # ok 1982 # SKIP SVE set SVE get SVE for VL 7920
3713 13:53:39.063782 # ok 1983 # SKIP SVE set SVE get FPSIMD for VL 7920
3714 13:53:39.064080 # ok 1984 # SKIP SVE set FPSIMD get SVE for VL 7920
3715 13:53:39.064182 # ok 1985 Set SVE VL 7936
3716 13:53:39.064283 # ok 1986 # SKIP SVE set SVE get SVE for VL 7936
3717 13:53:39.064572 # ok 1987 # SKIP SVE set SVE get FPSIMD for VL 7936
3718 13:53:39.064672 # ok 1988 # SKIP SVE set FPSIMD get SVE for VL 7936
3719 13:53:39.064759 # ok 1989 Set SVE VL 7952
3720 13:53:39.064863 # ok 1990 # SKIP SVE set SVE get SVE for VL 7952
3721 13:53:39.064966 # ok 1991 # SKIP SVE set SVE get FPSIMD for VL 7952
3722 13:53:39.065054 # ok 1992 # SKIP SVE set FPSIMD get SVE for VL 7952
3723 13:53:39.065152 # ok 1993 Set SVE VL 7968
3724 13:53:39.065250 # ok 1994 # SKIP SVE set SVE get SVE for VL 7968
3725 13:53:39.065352 # ok 1995 # SKIP SVE set SVE get FPSIMD for VL 7968
3726 13:53:39.065668 # ok 1996 # SKIP SVE set FPSIMD get SVE for VL 7968
3727 13:53:39.065800 # ok 1997 Set SVE VL 7984
3728 13:53:39.065908 # ok 1998 # SKIP SVE set SVE get SVE for VL 7984
3729 13:53:39.065997 # ok 1999 # SKIP SVE set SVE get FPSIMD for VL 7984
3730 13:53:39.066099 # ok 2000 # SKIP SVE set FPSIMD get SVE for VL 7984
3731 13:53:39.066185 # ok 2001 Set SVE VL 8000
3732 13:53:39.066491 # ok 2002 # SKIP SVE set SVE get SVE for VL 8000
3733 13:53:39.066605 # ok 2003 # SKIP SVE set SVE get FPSIMD for VL 8000
3734 13:53:39.066703 # ok 2004 # SKIP SVE set FPSIMD get SVE for VL 8000
3735 13:53:39.066789 # ok 2005 Set SVE VL 8016
3736 13:53:39.066881 # ok 2006 # SKIP SVE set SVE get SVE for VL 8016
3737 13:53:39.067157 # ok 2007 # SKIP SVE set SVE get FPSIMD for VL 8016
3738 13:53:39.067251 # ok 2008 # SKIP SVE set FPSIMD get SVE for VL 8016
3739 13:53:39.067319 # ok 2009 Set SVE VL 8032
3740 13:53:39.067434 # ok 2010 # SKIP SVE set SVE get SVE for VL 8032
3741 13:53:39.067500 # ok 2011 # SKIP SVE set SVE get FPSIMD for VL 8032
3742 13:53:39.067579 # ok 2012 # SKIP SVE set FPSIMD get SVE for VL 8032
3743 13:53:39.067661 # ok 2013 Set SVE VL 8048
3744 13:53:39.067739 # ok 2014 # SKIP SVE set SVE get SVE for VL 8048
3745 13:53:39.067818 # ok 2015 # SKIP SVE set SVE get FPSIMD for VL 8048
3746 13:53:39.067906 # ok 2016 # SKIP SVE set FPSIMD get SVE for VL 8048
3747 13:53:39.067995 # ok 2017 Set SVE VL 8064
3748 13:53:39.068077 # ok 2018 # SKIP SVE set SVE get SVE for VL 8064
3749 13:53:39.068173 # ok 2019 # SKIP SVE set SVE get FPSIMD for VL 8064
3750 13:53:39.068287 # ok 2020 # SKIP SVE set FPSIMD get SVE for VL 8064
3751 13:53:39.068391 # ok 2021 Set SVE VL 8080
3752 13:53:39.068489 # ok 2022 # SKIP SVE set SVE get SVE for VL 8080
3753 13:53:39.068783 # ok 2023 # SKIP SVE set SVE get FPSIMD for VL 8080
3754 13:53:39.068897 # ok 2024 # SKIP SVE set FPSIMD get SVE for VL 8080
3755 13:53:39.068985 # ok 2025 Set SVE VL 8096
3756 13:53:39.069084 # ok 2026 # SKIP SVE set SVE get SVE for VL 8096
3757 13:53:39.069199 # ok 2027 # SKIP SVE set SVE get FPSIMD for VL 8096
3758 13:53:39.069301 # ok 2028 # SKIP SVE set FPSIMD get SVE for VL 8096
3759 13:53:39.069390 # ok 2029 Set SVE VL 8112
3760 13:53:39.069484 # ok 2030 # SKIP SVE set SVE get SVE for VL 8112
3761 13:53:39.069578 # ok 2031 # SKIP SVE set SVE get FPSIMD for VL 8112
3762 13:53:39.069897 # ok 2032 # SKIP SVE set FPSIMD get SVE for VL 8112
3763 13:53:39.070038 # ok 2033 Set SVE VL 8128
3764 13:53:39.070143 # ok 2034 # SKIP SVE set SVE get SVE for VL 8128
3765 13:53:39.070248 # ok 2035 # SKIP SVE set SVE get FPSIMD for VL 8128
3766 13:53:39.070352 # ok 2036 # SKIP SVE set FPSIMD get SVE for VL 8128
3767 13:53:39.070456 # ok 2037 Set SVE VL 8144
3768 13:53:39.070762 # ok 2038 # SKIP SVE set SVE get SVE for VL 8144
3769 13:53:39.070868 # ok 2039 # SKIP SVE set SVE get FPSIMD for VL 8144
3770 13:53:39.070971 # ok 2040 # SKIP SVE set FPSIMD get SVE for VL 8144
3771 13:53:39.071060 # ok 2041 Set SVE VL 8160
3772 13:53:39.071159 # ok 2042 # SKIP SVE set SVE get SVE for VL 8160
3773 13:53:39.071261 # ok 2043 # SKIP SVE set SVE get FPSIMD for VL 8160
3774 13:53:39.071362 # ok 2044 # SKIP SVE set FPSIMD get SVE for VL 8160
3775 13:53:39.071464 # ok 2045 Set SVE VL 8176
3776 13:53:39.071566 # ok 2046 # SKIP SVE set SVE get SVE for VL 8176
3777 13:53:39.071869 # ok 2047 # SKIP SVE set SVE get FPSIMD for VL 8176
3778 13:53:39.071967 # ok 2048 # SKIP SVE set FPSIMD get SVE for VL 8176
3779 13:53:39.072061 # ok 2049 Set SVE VL 8192
3780 13:53:39.072343 # ok 2050 # SKIP SVE set SVE get SVE for VL 8192
3781 13:53:39.072433 # ok 2051 # SKIP SVE set SVE get FPSIMD for VL 8192
3782 13:53:39.072515 # ok 2052 # SKIP SVE set FPSIMD get SVE for VL 8192
3783 13:53:39.072613 # ok 2053 Streaming SVE FPSIMD set via SVE: 0
3784 13:53:39.072693 # ok 2054 Streaming SVE get_fpsimd() gave same state
3785 13:53:39.072788 # ok 2055 Streaming SVE SVE_PT_VL_INHERIT set
3786 13:53:39.072882 # ok 2056 Streaming SVE SVE_PT_VL_INHERIT cleared
3787 13:53:39.073167 # ok 2057 Set Streaming SVE VL 16
3788 13:53:39.073267 # ok 2058 Set and get Streaming SVE data for VL 16
3789 13:53:39.073377 # ok 2059 Set and get FPSIMD data for Streaming SVE VL 16
3790 13:53:39.073484 # ok 2060 Set FPSIMD, read via SVE for Streaming SVE VL 16
3791 13:53:39.073592 # ok 2061 Set Streaming SVE VL 32
3792 13:53:39.073716 # ok 2062 Set and get Streaming SVE data for VL 32
3793 13:53:39.073832 # ok 2063 Set and get FPSIMD data for Streaming SVE VL 32
3794 13:53:39.074129 # ok 2064 Set FPSIMD, read via SVE for Streaming SVE VL 32
3795 13:53:39.074253 # ok 2065 Set Streaming SVE VL 48
3796 13:53:39.074366 # ok 2066 # SKIP Streaming SVE set SVE get SVE for VL 48
3797 13:53:39.074482 # ok 2067 # SKIP Streaming SVE set SVE get FPSIMD for VL 48
3798 13:53:39.074790 # ok 2068 # SKIP Streaming SVE set FPSIMD get SVE for VL 48
3799 13:53:39.074891 # ok 2069 Set Streaming SVE VL 64
3800 13:53:39.074989 # ok 2070 Set and get Streaming SVE data for VL 64
3801 13:53:39.075077 # ok 2071 Set and get FPSIMD data for Streaming SVE VL 64
3802 13:53:39.075174 # ok 2072 Set FPSIMD, read via SVE for Streaming SVE VL 64
3803 13:53:39.075278 # ok 2073 Set Streaming SVE VL 80
3804 13:53:39.075409 # ok 2074 # SKIP Streaming SVE set SVE get SVE for VL 80
3805 13:53:39.075522 # ok 2075 # SKIP Streaming SVE set SVE get FPSIMD for VL 80
3806 13:53:39.075848 # ok 2076 # SKIP Streaming SVE set FPSIMD get SVE for VL 80
3807 13:53:39.075986 # ok 2077 Set Streaming SVE VL 96
3808 13:53:39.076079 # ok 2078 # SKIP Streaming SVE set SVE get SVE for VL 96
3809 13:53:39.076178 # ok 2079 # SKIP Streaming SVE set SVE get FPSIMD for VL 96
3810 13:53:39.076449 # ok 2080 # SKIP Streaming SVE set FPSIMD get SVE for VL 96
3811 13:53:39.076533 # ok 2081 Set Streaming SVE VL 112
3812 13:53:39.076626 # ok 2082 # SKIP Streaming SVE set SVE get SVE for VL 112
3813 13:53:39.076921 # ok 2083 # SKIP Streaming SVE set SVE get FPSIMD for VL 112
3814 13:53:39.077221 # ok 2084 # SKIP Streaming SVE set FPSIMD get SVE for VL 112
3815 13:53:39.077332 # ok 2085 Set Streaming SVE VL 128
3816 13:53:39.077415 # ok 2086 Set and get Streaming SVE data for VL 128
3817 13:53:39.077509 # ok 2087 Set and get FPSIMD data for Streaming SVE VL 128
3818 13:53:39.077609 # ok 2088 Set FPSIMD, read via SVE for Streaming SVE VL 128
3819 13:53:39.077701 # ok 2089 Set Streaming SVE VL 144
3820 13:53:39.077806 # ok 2090 # SKIP Streaming SVE set SVE get SVE for VL 144
3821 13:53:39.077938 # ok 2091 # SKIP Streaming SVE set SVE get FPSIMD for VL 144
3822 13:53:39.078056 # ok 2092 # SKIP Streaming SVE set FPSIMD get SVE for VL 144
3823 13:53:39.078159 # ok 2093 Set Streaming SVE VL 160
3824 13:53:39.078278 # ok 2094 # SKIP Streaming SVE set SVE get SVE for VL 160
3825 13:53:39.078764 # ok 2095 # SKIP Streaming SVE set SVE get FPSIMD for VL 160
3826 13:53:39.079051 # ok 2096 # SKIP Streaming SVE set FPSIMD get SVE for VL 160
3827 13:53:39.079140 # ok 2097 Set Streaming SVE VL 176
3828 13:53:39.079221 # ok 2098 # SKIP Streaming SVE set SVE get SVE for VL 176
3829 13:53:39.079498 # ok 2099 # SKIP Streaming SVE set SVE get FPSIMD for VL 176
3830 13:53:39.079617 # ok 2100 # SKIP Streaming SVE set FPSIMD get SVE for VL 176
3831 13:53:39.079722 # ok 2101 Set Streaming SVE VL 192
3832 13:53:39.079850 # ok 2102 # SKIP Streaming SVE set SVE get SVE for VL 192
3833 13:53:39.079959 # ok 2103 # SKIP Streaming SVE set SVE get FPSIMD for VL 192
3834 13:53:39.080068 # ok 2104 # SKIP Streaming SVE set FPSIMD get SVE for VL 192
3835 13:53:39.080161 # ok 2105 Set Streaming SVE VL 208
3836 13:53:39.080271 # ok 2106 # SKIP Streaming SVE set SVE get SVE for VL 208
3837 13:53:39.080403 # ok 2107 # SKIP Streaming SVE set SVE get FPSIMD for VL 208
3838 13:53:39.080515 # ok 2108 # SKIP Streaming SVE set FPSIMD get SVE for VL 208
3839 13:53:39.080642 # ok 2109 Set Streaming SVE VL 224
3840 13:53:39.080736 # ok 2110 # SKIP Streaming SVE set SVE get SVE for VL 224
3841 13:53:39.080846 # ok 2111 # SKIP Streaming SVE set SVE get FPSIMD for VL 224
3842 13:53:39.080969 # ok 2112 # SKIP Streaming SVE set FPSIMD get SVE for VL 224
3843 13:53:39.081101 # ok 2113 Set Streaming SVE VL 240
3844 13:53:39.081222 # ok 2114 # SKIP Streaming SVE set SVE get SVE for VL 240
3845 13:53:39.081351 # ok 2115 # SKIP Streaming SVE set SVE get FPSIMD for VL 240
3846 13:53:39.081475 # ok 2116 # SKIP Streaming SVE set FPSIMD get SVE for VL 240
3847 13:53:39.081601 # ok 2117 Set Streaming SVE VL 256
3848 13:53:39.081717 # ok 2118 Set and get Streaming SVE data for VL 256
3849 13:53:39.081817 # ok 2119 Set and get FPSIMD data for Streaming SVE VL 256
3850 13:53:39.082139 # ok 2120 Set FPSIMD, read via SVE for Streaming SVE VL 256
3851 13:53:39.082241 # ok 2121 Set Streaming SVE VL 272
3852 13:53:39.082362 # ok 2122 # SKIP Streaming SVE set SVE get SVE for VL 272
3853 13:53:39.082473 # ok 2123 # SKIP Streaming SVE set SVE get FPSIMD for VL 272
3854 13:53:39.082745 # ok 2124 # SKIP Streaming SVE set FPSIMD get SVE for VL 272
3855 13:53:39.082828 # ok 2125 Set Streaming SVE VL 288
3856 13:53:39.085093 # ok 2126 # SKIP Streaming SVE set SVE get SVE for VL 288
3857 13:53:39.085213 # ok 2127 # SKIP Streaming SVE set SVE get FPSIMD for VL 288
3858 13:53:39.085518 # ok 2128 # SKIP Streaming SVE set FPSIMD get SVE for VL 288
3859 13:53:39.085643 # ok 2129 Set Streaming SVE VL 304
3860 13:53:39.085743 # ok 2130 # SKIP Streaming SVE set SVE get SVE for VL 304
3861 13:53:39.085842 # ok 2131 # SKIP Streaming SVE set SVE get FPSIMD for VL 304
3862 13:53:39.085933 # ok 2132 # SKIP Streaming SVE set FPSIMD get SVE for VL 304
3863 13:53:39.086015 # ok 2133 Set Streaming SVE VL 320
3864 13:53:39.086112 # ok 2134 # SKIP Streaming SVE set SVE get SVE for VL 320
3865 13:53:39.086214 # ok 2135 # SKIP Streaming SVE set SVE get FPSIMD for VL 320
3866 13:53:39.086324 # ok 2136 # SKIP Streaming SVE set FPSIMD get SVE for VL 320
3867 13:53:39.086865 # ok 2137 Set Streaming SVE VL 336
3868 13:53:39.087214 # ok 2138 # SKIP Streaming SVE set SVE get SVE for VL 336
3869 13:53:39.087341 # ok 2139 # SKIP Streaming SVE set SVE get FPSIMD for VL 336
3870 13:53:39.087447 # ok 2140 # SKIP Streaming SVE set FPSIMD get SVE for VL 336
3871 13:53:39.087551 # ok 2141 Set Streaming SVE VL 352
3872 13:53:39.087648 # ok 2142 # SKIP Streaming SVE set SVE get SVE for VL 352
3873 13:53:39.087942 # ok 2143 # SKIP Streaming SVE set SVE get FPSIMD for VL 352
3874 13:53:39.088047 # ok 2144 # SKIP Streaming SVE set FPSIMD get SVE for VL 352
3875 13:53:39.088152 # ok 2145 Set Streaming SVE VL 368
3876 13:53:39.088242 # ok 2146 # SKIP Streaming SVE set SVE get SVE for VL 368
3877 13:53:39.088345 # ok 2147 # SKIP Streaming SVE set SVE get FPSIMD for VL 368
3878 13:53:39.088448 # ok 2148 # SKIP Streaming SVE set FPSIMD get SVE for VL 368
3879 13:53:39.088748 # ok 2149 Set Streaming SVE VL 384
3880 13:53:39.088860 # ok 2150 # SKIP Streaming SVE set SVE get SVE for VL 384
3881 13:53:39.088964 # ok 2151 # SKIP Streaming SVE set SVE get FPSIMD for VL 384
3882 13:53:39.089296 # ok 2152 # SKIP Streaming SVE set FPSIMD get SVE for VL 384
3883 13:53:39.089397 # ok 2153 Set Streaming SVE VL 400
3884 13:53:39.089493 # ok 2154 # SKIP Streaming SVE set SVE get SVE for VL 400
3885 13:53:39.089777 # ok 2155 # SKIP Streaming SVE set SVE get FPSIMD for VL 400
3886 13:53:39.089898 # ok 2156 # SKIP Streaming SVE set FPSIMD get SVE for VL 400
3887 13:53:39.090001 # ok 2157 Set Streaming SVE VL 416
3888 13:53:39.090101 # ok 2158 # SKIP Streaming SVE set SVE get SVE for VL 416
3889 13:53:39.090188 # ok 2159 # SKIP Streaming SVE set SVE get FPSIMD for VL 416
3890 13:53:39.090274 # ok 2160 # SKIP Streaming SVE set FPSIMD get SVE for VL 416
3891 13:53:39.090568 # ok 2161 Set Streaming SVE VL 432
3892 13:53:39.090676 # ok 2162 # SKIP Streaming SVE set SVE get SVE for VL 432
3893 13:53:39.090802 # ok 2163 # SKIP Streaming SVE set SVE get FPSIMD for VL 432
3894 13:53:39.091359 # ok 2164 # SKIP Streaming SVE set FPSIMD get SVE for VL 432
3895 13:53:39.091467 # ok 2165 Set Streaming SVE VL 448
3896 13:53:39.091558 # ok 2166 # SKIP Streaming SVE set SVE get SVE for VL 448
3897 13:53:39.091841 # ok 2167 # SKIP Streaming SVE set SVE get FPSIMD for VL 448
3898 13:53:39.091950 # ok 2168 # SKIP Streaming SVE set FPSIMD get SVE for VL 448
3899 13:53:39.092038 # ok 2169 Set Streaming SVE VL 464
3900 13:53:39.092137 # ok 2170 # SKIP Streaming SVE set SVE get SVE for VL 464
3901 13:53:39.092223 # ok 2171 # SKIP Streaming SVE set SVE get FPSIMD for VL 464
3902 13:53:39.092365 # ok 2172 # SKIP Streaming SVE set FPSIMD get SVE for VL 464
3903 13:53:39.092469 # ok 2173 Set Streaming SVE VL 480
3904 13:53:39.092594 # ok 2174 # SKIP Streaming SVE set SVE get SVE for VL 480
3905 13:53:39.092723 # ok 2175 # SKIP Streaming SVE set SVE get FPSIMD for VL 480
3906 13:53:39.092837 # ok 2176 # SKIP Streaming SVE set FPSIMD get SVE for VL 480
3907 13:53:39.092963 # ok 2177 Set Streaming SVE VL 496
3908 13:53:39.093094 # ok 2178 # SKIP Streaming SVE set SVE get SVE for VL 496
3909 13:53:39.093226 # ok 2179 # SKIP Streaming SVE set SVE get FPSIMD for VL 496
3910 13:53:39.093353 # ok 2180 # SKIP Streaming SVE set FPSIMD get SVE for VL 496
3911 13:53:39.093476 # ok 2181 Set Streaming SVE VL 512
3912 13:53:39.093582 # ok 2182 # SKIP Streaming SVE set SVE get SVE for VL 512
3913 13:53:39.093897 # ok 2183 # SKIP Streaming SVE set SVE get FPSIMD for VL 512
3914 13:53:39.094015 # ok 2184 # SKIP Streaming SVE set FPSIMD get SVE for VL 512
3915 13:53:39.094122 # ok 2185 Set Streaming SVE VL 528
3916 13:53:39.094412 # ok 2186 # SKIP Streaming SVE set SVE get SVE for VL 528
3917 13:53:39.094534 # ok 2187 # SKIP Streaming SVE set SVE get FPSIMD for VL 528
3918 13:53:39.094881 # ok 2188 # SKIP Streaming SVE set FPSIMD get SVE for VL 528
3919 13:53:39.094986 # ok 2189 Set Streaming SVE VL 544
3920 13:53:39.095088 # ok 2190 # SKIP Streaming SVE set SVE get SVE for VL 544
3921 13:53:39.095191 # ok 2191 # SKIP Streaming SVE set SVE get FPSIMD for VL 544
3922 13:53:39.095511 # ok 2192 # SKIP Streaming SVE set FPSIMD get SVE for VL 544
3923 13:53:39.095636 # ok 2193 Set Streaming SVE VL 560
3924 13:53:39.095966 # ok 2194 # SKIP Streaming SVE set SVE get SVE for VL 560
3925 13:53:39.096068 # ok 2195 # SKIP Streaming SVE set SVE get FPSIMD for VL 560
3926 13:53:39.096171 # ok 2196 # SKIP Streaming SVE set FPSIMD get SVE for VL 560
3927 13:53:39.096261 # ok 2197 Set Streaming SVE VL 576
3928 13:53:39.096364 # ok 2198 # SKIP Streaming SVE set SVE get SVE for VL 576
3929 13:53:39.096479 # ok 2199 # SKIP Streaming SVE set SVE get FPSIMD for VL 576
3930 13:53:39.096614 # ok 2200 # SKIP Streaming SVE set FPSIMD get SVE for VL 576
3931 13:53:39.096963 # ok 2201 Set Streaming SVE VL 592
3932 13:53:39.097053 # ok 2202 # SKIP Streaming SVE set SVE get SVE for VL 592
3933 13:53:39.097137 # ok 2203 # SKIP Streaming SVE set SVE get FPSIMD for VL 592
3934 13:53:39.097234 # ok 2204 # SKIP Streaming SVE set FPSIMD get SVE for VL 592
3935 13:53:39.097320 # ok 2205 Set Streaming SVE VL 608
3936 13:53:39.097418 # ok 2206 # SKIP Streaming SVE set SVE get SVE for VL 608
3937 13:53:39.097520 # ok 2207 # SKIP Streaming SVE set SVE get FPSIMD for VL 608
3938 13:53:39.097629 # ok 2208 # SKIP Streaming SVE set FPSIMD get SVE for VL 608
3939 13:53:39.097934 # ok 2209 Set Streaming SVE VL 624
3940 13:53:39.098033 # ok 2210 # SKIP Streaming SVE set SVE get SVE for VL 624
3941 13:53:39.098327 # ok 2211 # SKIP Streaming SVE set SVE get FPSIMD for VL 624
3942 13:53:39.098436 # ok 2212 # SKIP Streaming SVE set FPSIMD get SVE for VL 624
3943 13:53:39.098538 # ok 2213 Set Streaming SVE VL 640
3944 13:53:39.098640 # ok 2214 # SKIP Streaming SVE set SVE get SVE for VL 640
3945 13:53:39.098742 # ok 2215 # SKIP Streaming SVE set SVE get FPSIMD for VL 640
3946 13:53:39.099063 # ok 2216 # SKIP Streaming SVE set FPSIMD get SVE for VL 640
3947 13:53:39.099192 # ok 2217 Set Streaming SVE VL 656
3948 13:53:39.099297 # ok 2218 # SKIP Streaming SVE set SVE get SVE for VL 656
3949 13:53:39.099401 # ok 2219 # SKIP Streaming SVE set SVE get FPSIMD for VL 656
3950 13:53:39.099721 # ok 2220 # SKIP Streaming SVE set FPSIMD get SVE for VL 656
3951 13:53:39.099826 # ok 2221 Set Streaming SVE VL 672
3952 13:53:39.099932 # ok 2222 # SKIP Streaming SVE set SVE get SVE for VL 672
3953 13:53:39.100034 # ok 2223 # SKIP Streaming SVE set SVE get FPSIMD for VL 672
3954 13:53:39.100498 # ok 2224 # SKIP Streaming SVE set FPSIMD get SVE for VL 672
3955 13:53:39.100599 # ok 2225 Set Streaming SVE VL 688
3956 13:53:39.100686 # ok 2226 # SKIP Streaming SVE set SVE get SVE for VL 688
3957 13:53:39.100787 # ok 2227 # SKIP Streaming SVE set SVE get FPSIMD for VL 688
3958 13:53:39.100889 # ok 2228 # SKIP Streaming SVE set FPSIMD get SVE for VL 688
3959 13:53:39.100989 # ok 2229 Set Streaming SVE VL 704
3960 13:53:39.101091 # ok 2230 # SKIP Streaming SVE set SVE get SVE for VL 704
3961 13:53:39.101431 # ok 2231 # SKIP Streaming SVE set SVE get FPSIMD for VL 704
3962 13:53:39.101533 # ok 2232 # SKIP Streaming SVE set FPSIMD get SVE for VL 704
3963 13:53:39.101641 # ok 2233 Set Streaming SVE VL 720
3964 13:53:39.101754 # ok 2234 # SKIP Streaming SVE set SVE get SVE for VL 720
3965 13:53:39.101864 # ok 2235 # SKIP Streaming SVE set SVE get FPSIMD for VL 720
3966 13:53:39.102171 # ok 2236 # SKIP Streaming SVE set FPSIMD get SVE for VL 720
3967 13:53:39.102284 # ok 2237 Set Streaming SVE VL 736
3968 13:53:39.102612 # ok 2238 # SKIP Streaming SVE set SVE get SVE for VL 736
3969 13:53:39.102713 # ok 2239 # SKIP Streaming SVE set SVE get FPSIMD for VL 736
3970 13:53:39.103028 # ok 2240 # SKIP Streaming SVE set FPSIMD get SVE for VL 736
3971 13:53:39.103128 # ok 2241 Set Streaming SVE VL 752
3972 13:53:39.103232 # ok 2242 # SKIP Streaming SVE set SVE get SVE for VL 752
3973 13:53:39.103334 # ok 2243 # SKIP Streaming SVE set SVE get FPSIMD for VL 752
3974 13:53:39.103436 # ok 2244 # SKIP Streaming SVE set FPSIMD get SVE for VL 752
3975 13:53:39.103738 # ok 2245 Set Streaming SVE VL 768
3976 13:53:39.103838 # ok 2246 # SKIP Streaming SVE set SVE get SVE for VL 768
3977 13:53:39.103939 # ok 2247 # SKIP Streaming SVE set SVE get FPSIMD for VL 768
3978 13:53:39.104049 # ok 2248 # SKIP Streaming SVE set FPSIMD get SVE for VL 768
3979 13:53:39.104151 # ok 2249 Set Streaming SVE VL 784
3980 13:53:39.104478 # ok 2250 # SKIP Streaming SVE set SVE get SVE for VL 784
3981 13:53:39.104576 # ok 2251 # SKIP Streaming SVE set SVE get FPSIMD for VL 784
3982 13:53:39.104859 # ok 2252 # SKIP Streaming SVE set FPSIMD get SVE for VL 784
3983 13:53:39.104944 # ok 2253 Set Streaming SVE VL 800
3984 13:53:39.105018 # ok 2254 # SKIP Streaming SVE set SVE get SVE for VL 800
3985 13:53:39.105287 # ok 2255 # SKIP Streaming SVE set SVE get FPSIMD for VL 800
3986 13:53:39.105388 # ok 2256 # SKIP Streaming SVE set FPSIMD get SVE for VL 800
3987 13:53:39.105476 # ok 2257 Set Streaming SVE VL 816
3988 13:53:39.105576 # ok 2258 # SKIP Streaming SVE set SVE get SVE for VL 816
3989 13:53:39.105671 # ok 2259 # SKIP Streaming SVE set SVE get FPSIMD for VL 816
3990 13:53:39.105774 # ok 2260 # SKIP Streaming SVE set FPSIMD get SVE for VL 816
3991 13:53:39.105868 # ok 2261 Set Streaming SVE VL 832
3992 13:53:39.105971 # ok 2262 # SKIP Streaming SVE set SVE get SVE for VL 832
3993 13:53:39.106075 # ok 2263 # SKIP Streaming SVE set SVE get FPSIMD for VL 832
3994 13:53:39.106183 # ok 2264 # SKIP Streaming SVE set FPSIMD get SVE for VL 832
3995 13:53:39.106308 # ok 2265 Set Streaming SVE VL 848
3996 13:53:39.106623 # ok 2266 # SKIP Streaming SVE set SVE get SVE for VL 848
3997 13:53:39.106738 # ok 2267 # SKIP Streaming SVE set SVE get FPSIMD for VL 848
3998 13:53:39.106831 # ok 2268 # SKIP Streaming SVE set FPSIMD get SVE for VL 848
3999 13:53:39.107114 # ok 2269 Set Streaming SVE VL 864
4000 13:53:39.107208 # ok 2270 # SKIP Streaming SVE set SVE get SVE for VL 864
4001 13:53:39.107289 # ok 2271 # SKIP Streaming SVE set SVE get FPSIMD for VL 864
4002 13:53:39.107387 # ok 2272 # SKIP Streaming SVE set FPSIMD get SVE for VL 864
4003 13:53:39.107475 # ok 2273 Set Streaming SVE VL 880
4004 13:53:39.107565 # ok 2274 # SKIP Streaming SVE set SVE get SVE for VL 880
4005 13:53:39.107664 # ok 2275 # SKIP Streaming SVE set SVE get FPSIMD for VL 880
4006 13:53:39.107766 # ok 2276 # SKIP Streaming SVE set FPSIMD get SVE for VL 880
4007 13:53:39.107850 # ok 2277 Set Streaming SVE VL 896
4008 13:53:39.108136 # ok 2278 # SKIP Streaming SVE set SVE get SVE for VL 896
4009 13:53:39.110003 # ok 2279 # SKIP Streaming SVE set SVE get FPSIMD for VL 896
4010 13:53:39.110352 # ok 2280 # SKIP Streaming SVE set FPSIMD get SVE for VL 896
4011 13:53:39.110432 # ok 2281 Set Streaming SVE VL 912
4012 13:53:39.110785 # ok 2282 # SKIP Streaming SVE set SVE get SVE for VL 912
4013 13:53:39.111085 # ok 2283 # SKIP Streaming SVE set SVE get FPSIMD for VL 912
4014 13:53:39.111207 # ok 2284 # SKIP Streaming SVE set FPSIMD get SVE for VL 912
4015 13:53:39.111336 # ok 2285 Set Streaming SVE VL 928
4016 13:53:39.111469 # ok 2286 # SKIP Streaming SVE set SVE get SVE for VL 928
4017 13:53:39.111601 # ok 2287 # SKIP Streaming SVE set SVE get FPSIMD for VL 928
4018 13:53:39.111743 # ok 2288 # SKIP Streaming SVE set FPSIMD get SVE for VL 928
4019 13:53:39.112083 # ok 2289 Set Streaming SVE VL 944
4020 13:53:39.112194 # ok 2290 # SKIP Streaming SVE set SVE get SVE for VL 944
4021 13:53:39.112329 # ok 2291 # SKIP Streaming SVE set SVE get FPSIMD for VL 944
4022 13:53:39.112436 # ok 2292 # SKIP Streaming SVE set FPSIMD get SVE for VL 944
4023 13:53:39.112544 # ok 2293 Set Streaming SVE VL 960
4024 13:53:39.112650 # ok 2294 # SKIP Streaming SVE set SVE get SVE for VL 960
4025 13:53:39.113002 # ok 2295 # SKIP Streaming SVE set SVE get FPSIMD for VL 960
4026 13:53:39.113113 # ok 2296 # SKIP Streaming SVE set FPSIMD get SVE for VL 960
4027 13:53:39.113284 # ok 2297 Set Streaming SVE VL 976
4028 13:53:39.113374 # ok 2298 # SKIP Streaming SVE set SVE get SVE for VL 976
4029 13:53:39.113671 # ok 2299 # SKIP Streaming SVE set SVE get FPSIMD for VL 976
4030 13:53:39.113818 # ok 2300 # SKIP Streaming SVE set FPSIMD get SVE for VL 976
4031 13:53:39.113959 # ok 2301 Set Streaming SVE VL 992
4032 13:53:39.114069 # ok 2302 # SKIP Streaming SVE set SVE get SVE for VL 992
4033 13:53:39.114215 # ok 2303 # SKIP Streaming SVE set SVE get FPSIMD for VL 992
4034 13:53:39.114588 # ok 2304 # SKIP Streaming SVE set FPSIMD get SVE for VL 992
4035 13:53:39.114723 # ok 2305 Set Streaming SVE VL 1008
4036 13:53:39.114847 # ok 2306 # SKIP Streaming SVE set SVE get SVE for VL 1008
4037 13:53:39.114996 # ok 2307 # SKIP Streaming SVE set SVE get FPSIMD for VL 1008
4038 13:53:39.115131 # ok 2308 # SKIP Streaming SVE set FPSIMD get SVE for VL 1008
4039 13:53:39.115455 # ok 2309 Set Streaming SVE VL 1024
4040 13:53:39.115629 # ok 2310 # SKIP Streaming SVE set SVE get SVE for VL 1024
4041 13:53:39.115763 # ok 2311 # SKIP Streaming SVE set SVE get FPSIMD for VL 1024
4042 13:53:39.116096 # ok 2312 # SKIP Streaming SVE set FPSIMD get SVE for VL 1024
4043 13:53:39.116195 # ok 2313 Set Streaming SVE VL 1040
4044 13:53:39.116282 # ok 2314 # SKIP Streaming SVE set SVE get SVE for VL 1040
4045 13:53:39.116366 # ok 2315 # SKIP Streaming SVE set SVE get FPSIMD for VL 1040
4046 13:53:39.116465 # ok 2316 # SKIP Streaming SVE set FPSIMD get SVE for VL 1040
4047 13:53:39.116550 # ok 2317 Set Streaming SVE VL 1056
4048 13:53:39.116648 # ok 2318 # SKIP Streaming SVE set SVE get SVE for VL 1056
4049 13:53:39.116747 # ok 2319 # SKIP Streaming SVE set SVE get FPSIMD for VL 1056
4050 13:53:39.117100 # ok 2320 # SKIP Streaming SVE set FPSIMD get SVE for VL 1056
4051 13:53:39.117206 # ok 2321 Set Streaming SVE VL 1072
4052 13:53:39.117308 # ok 2322 # SKIP Streaming SVE set SVE get SVE for VL 1072
4053 13:53:39.117601 # ok 2323 # SKIP Streaming SVE set SVE get FPSIMD for VL 1072
4054 13:53:39.117726 # ok 2324 # SKIP Streaming SVE set FPSIMD get SVE for VL 1072
4055 13:53:39.117835 # ok 2325 Set Streaming SVE VL 1088
4056 13:53:39.117922 # ok 2326 # SKIP Streaming SVE set SVE get SVE for VL 1088
4057 13:53:39.118023 # ok 2327 # SKIP Streaming SVE set SVE get FPSIMD for VL 1088
4058 13:53:39.118281 # ok 2328 # SKIP Streaming SVE set FPSIMD get SVE for VL 1088
4059 13:53:39.118364 # ok 2329 Set Streaming SVE VL 1104
4060 13:53:39.118455 # ok 2330 # SKIP Streaming SVE set SVE get SVE for VL 1104
4061 13:53:39.118739 # ok 2331 # SKIP Streaming SVE set SVE get FPSIMD for VL 1104
4062 13:53:39.119007 # ok 2332 # SKIP Streaming SVE set FPSIMD get SVE for VL 1104
4063 13:53:39.119081 # ok 2333 Set Streaming SVE VL 1120
4064 13:53:39.119143 # ok 2334 # SKIP Streaming SVE set SVE get SVE for VL 1120
4065 13:53:39.119214 # ok 2335 # SKIP Streaming SVE set SVE get FPSIMD for VL 1120
4066 13:53:39.119286 # ok 2336 # SKIP Streaming SVE set FPSIMD get SVE for VL 1120
4067 13:53:39.119528 # ok 2337 Set Streaming SVE VL 1136
4068 13:53:39.119593 # ok 2338 # SKIP Streaming SVE set SVE get SVE for VL 1136
4069 13:53:39.119663 # ok 2339 # SKIP Streaming SVE set SVE get FPSIMD for VL 1136
4070 13:53:39.119896 # ok 2340 # SKIP Streaming SVE set FPSIMD get SVE for VL 1136
4071 13:53:39.119998 # ok 2341 Set Streaming SVE VL 1152
4072 13:53:39.120093 # ok 2342 # SKIP Streaming SVE set SVE get SVE for VL 1152
4073 13:53:39.120195 # ok 2343 # SKIP Streaming SVE set SVE get FPSIMD for VL 1152
4074 13:53:39.120281 # ok 2344 # SKIP Streaming SVE set FPSIMD get SVE for VL 1152
4075 13:53:39.120365 # ok 2345 Set Streaming SVE VL 1168
4076 13:53:39.120637 # ok 2346 # SKIP Streaming SVE set SVE get SVE for VL 1168
4077 13:53:39.120721 # ok 2347 # SKIP Streaming SVE set SVE get FPSIMD for VL 1168
4078 13:53:39.120811 # ok 2348 # SKIP Streaming SVE set FPSIMD get SVE for VL 1168
4079 13:53:39.120896 # ok 2349 Set Streaming SVE VL 1184
4080 13:53:39.120984 # ok 2350 # SKIP Streaming SVE set SVE get SVE for VL 1184
4081 13:53:39.121065 # ok 2351 # SKIP Streaming SVE set SVE get FPSIMD for VL 1184
4082 13:53:39.121147 # ok 2352 # SKIP Streaming SVE set FPSIMD get SVE for VL 1184
4083 13:53:39.121239 # ok 2353 Set Streaming SVE VL 1200
4084 13:53:39.121532 # ok 2354 # SKIP Streaming SVE set SVE get SVE for VL 1200
4085 13:53:39.121635 # ok 2355 # SKIP Streaming SVE set SVE get FPSIMD for VL 1200
4086 13:53:39.121740 # ok 2356 # SKIP Streaming SVE set FPSIMD get SVE for VL 1200
4087 13:53:39.122032 # ok 2357 Set Streaming SVE VL 1216
4088 13:53:39.122140 # ok 2358 # SKIP Streaming SVE set SVE get SVE for VL 1216
4089 13:53:39.122258 # ok 2359 # SKIP Streaming SVE set SVE get FPSIMD for VL 1216
4090 13:53:39.122365 # ok 2360 # SKIP Streaming SVE set FPSIMD get SVE for VL 1216
4091 13:53:39.122471 # ok 2361 Set Streaming SVE VL 1232
4092 13:53:39.122571 # ok 2362 # SKIP Streaming SVE set SVE get SVE for VL 1232
4093 13:53:39.122857 # ok 2363 # SKIP Streaming SVE set SVE get FPSIMD for VL 1232
4094 13:53:39.122951 # ok 2364 # SKIP Streaming SVE set FPSIMD get SVE for VL 1232
4095 13:53:39.123045 # ok 2365 Set Streaming SVE VL 1248
4096 13:53:39.123120 # ok 2366 # SKIP Streaming SVE set SVE get SVE for VL 1248
4097 13:53:39.123204 # ok 2367 # SKIP Streaming SVE set SVE get FPSIMD for VL 1248
4098 13:53:39.123479 # ok 2368 # SKIP Streaming SVE set FPSIMD get SVE for VL 1248
4099 13:53:39.123574 # ok 2369 Set Streaming SVE VL 1264
4100 13:53:39.123667 # ok 2370 # SKIP Streaming SVE set SVE get SVE for VL 1264
4101 13:53:39.123744 # ok 2371 # SKIP Streaming SVE set SVE get FPSIMD for VL 1264
4102 13:53:39.123832 # ok 2372 # SKIP Streaming SVE set FPSIMD get SVE for VL 1264
4103 13:53:39.123933 # ok 2373 Set Streaming SVE VL 1280
4104 13:53:39.124200 # ok 2374 # SKIP Streaming SVE set SVE get SVE for VL 1280
4105 13:53:39.124278 # ok 2375 # SKIP Streaming SVE set SVE get FPSIMD for VL 1280
4106 13:53:39.124369 # ok 2376 # SKIP Streaming SVE set FPSIMD get SVE for VL 1280
4107 13:53:39.124459 # ok 2377 Set Streaming SVE VL 1296
4108 13:53:39.124541 # ok 2378 # SKIP Streaming SVE set SVE get SVE for VL 1296
4109 13:53:39.124629 # ok 2379 # SKIP Streaming SVE set SVE get FPSIMD for VL 1296
4110 13:53:39.124727 # ok 2380 # SKIP Streaming SVE set FPSIMD get SVE for VL 1296
4111 13:53:39.125009 # ok 2381 Set Streaming SVE VL 1312
4112 13:53:39.125098 # ok 2382 # SKIP Streaming SVE set SVE get SVE for VL 1312
4113 13:53:39.125173 # ok 2383 # SKIP Streaming SVE set SVE get FPSIMD for VL 1312
4114 13:53:39.125245 # ok 2384 # SKIP Streaming SVE set FPSIMD get SVE for VL 1312
4115 13:53:39.125486 # ok 2385 Set Streaming SVE VL 1328
4116 13:53:39.125559 # ok 2386 # SKIP Streaming SVE set SVE get SVE for VL 1328
4117 13:53:39.125630 # ok 2387 # SKIP Streaming SVE set SVE get FPSIMD for VL 1328
4118 13:53:39.125892 # ok 2388 # SKIP Streaming SVE set FPSIMD get SVE for VL 1328
4119 13:53:39.125978 # ok 2389 Set Streaming SVE VL 1344
4120 13:53:39.126063 # ok 2390 # SKIP Streaming SVE set SVE get SVE for VL 1344
4121 13:53:39.126134 # ok 2391 # SKIP Streaming SVE set SVE get FPSIMD for VL 1344
4122 13:53:39.126224 # ok 2392 # SKIP Streaming SVE set FPSIMD get SVE for VL 1344
4123 13:53:39.126595 # ok 2393 Set Streaming SVE VL 1360
4124 13:53:39.126738 # ok 2394 # SKIP Streaming SVE set SVE get SVE for VL 1360
4125 13:53:39.126889 # ok 2395 # SKIP Streaming SVE set SVE get FPSIMD for VL 1360
4126 13:53:39.126981 # ok 2396 # SKIP Streaming SVE set FPSIMD get SVE for VL 1360
4127 13:53:39.127270 # ok 2397 Set Streaming SVE VL 1376
4128 13:53:39.127401 # ok 2398 # SKIP Streaming SVE set SVE get SVE for VL 1376
4129 13:53:39.127531 # ok 2399 # SKIP Streaming SVE set SVE get FPSIMD for VL 1376
4130 13:53:39.127641 # ok 2400 # SKIP Streaming SVE set FPSIMD get SVE for VL 1376
4131 13:53:39.127725 # ok 2401 Set Streaming SVE VL 1392
4132 13:53:39.164644 # ok 2402 # SKIP Streaming SVE set SVE get SVE for VL 1392
4133 13:53:39.164821 # ok 2403 # SKIP Streaming SVE set SVE get FPSIMD for VL 1392
4134 13:53:39.164887 # ok 2404 # SKIP Streaming SVE set FPSIMD get SVE for VL 1392
4135 13:53:39.164948 # ok 2405 Set Streaming SVE VL 1408
4136 13:53:39.165009 # ok 2406 # SKIP Streaming SVE set SVE get SVE for VL 1408
4137 13:53:39.165070 # ok 2407 # SKIP Streaming SVE set SVE get FPSIMD for VL 1408
4138 13:53:39.165131 # ok 2408 # SKIP Streaming SVE set FPSIMD get SVE for VL 1408
4139 13:53:39.165192 # ok 2409 Set Streaming SVE VL 1424
4140 13:53:39.165252 # ok 2410 # SKIP Streaming SVE set SVE get SVE for VL 1424
4141 13:53:39.165312 # ok 2411 # SKIP Streaming SVE set SVE get FPSIMD for VL 1424
4142 13:53:39.165372 # ok 2412 # SKIP Streaming SVE set FPSIMD get SVE for VL 1424
4143 13:53:39.165431 # ok 2413 Set Streaming SVE VL 1440
4144 13:53:39.165494 # ok 2414 # SKIP Streaming SVE set SVE get SVE for VL 1440
4145 13:53:39.165569 # ok 2415 # SKIP Streaming SVE set SVE get FPSIMD for VL 1440
4146 13:53:39.165666 # ok 2416 # SKIP Streaming SVE set FPSIMD get SVE for VL 1440
4147 13:53:39.165757 # ok 2417 Set Streaming SVE VL 1456
4148 13:53:39.165836 # ok 2418 # SKIP Streaming SVE set SVE get SVE for VL 1456
4149 13:53:39.165922 # ok 2419 # SKIP Streaming SVE set SVE get FPSIMD for VL 1456
4150 13:53:39.166003 # ok 2420 # SKIP Streaming SVE set FPSIMD get SVE for VL 1456
4151 13:53:39.166081 # ok 2421 Set Streaming SVE VL 1472
4152 13:53:39.166176 # ok 2422 # SKIP Streaming SVE set SVE get SVE for VL 1472
4153 13:53:39.166278 # ok 2423 # SKIP Streaming SVE set SVE get FPSIMD for VL 1472
4154 13:53:39.166361 # ok 2424 # SKIP Streaming SVE set FPSIMD get SVE for VL 1472
4155 13:53:39.166442 # ok 2425 Set Streaming SVE VL 1488
4156 13:53:39.166512 # ok 2426 # SKIP Streaming SVE set SVE get SVE for VL 1488
4157 13:53:39.166577 # ok 2427 # SKIP Streaming SVE set SVE get FPSIMD for VL 1488
4158 13:53:39.166647 # ok 2428 # SKIP Streaming SVE set FPSIMD get SVE for VL 1488
4159 13:53:39.166717 # ok 2429 Set Streaming SVE VL 1504
4160 13:53:39.166792 # ok 2430 # SKIP Streaming SVE set SVE get SVE for VL 1504
4161 13:53:39.166865 # ok 2431 # SKIP Streaming SVE set SVE get FPSIMD for VL 1504
4162 13:53:39.167141 # ok 2432 # SKIP Streaming SVE set FPSIMD get SVE for VL 1504
4163 13:53:39.167223 # ok 2433 Set Streaming SVE VL 1520
4164 13:53:39.167299 # ok 2434 # SKIP Streaming SVE set SVE get SVE for VL 1520
4165 13:53:39.167363 # ok 2435 # SKIP Streaming SVE set SVE get FPSIMD for VL 1520
4166 13:53:39.167433 # ok 2436 # SKIP Streaming SVE set FPSIMD get SVE for VL 1520
4167 13:53:39.167512 # ok 2437 Set Streaming SVE VL 1536
4168 13:53:39.167577 # ok 2438 # SKIP Streaming SVE set SVE get SVE for VL 1536
4169 13:53:39.167637 # ok 2439 # SKIP Streaming SVE set SVE get FPSIMD for VL 1536
4170 13:53:39.167702 # ok 2440 # SKIP Streaming SVE set FPSIMD get SVE for VL 1536
4171 13:53:39.167774 # ok 2441 Set Streaming SVE VL 1552
4172 13:53:39.167851 # ok 2442 # SKIP Streaming SVE set SVE get SVE for VL 1552
4173 13:53:39.167925 # ok 2443 # SKIP Streaming SVE set SVE get FPSIMD for VL 1552
4174 13:53:39.167999 # ok 2444 # SKIP Streaming SVE set FPSIMD get SVE for VL 1552
4175 13:53:39.168073 # ok 2445 Set Streaming SVE VL 1568
4176 13:53:39.168148 # ok 2446 # SKIP Streaming SVE set SVE get SVE for VL 1568
4177 13:53:39.168223 # ok 2447 # SKIP Streaming SVE set SVE get FPSIMD for VL 1568
4178 13:53:39.168301 # ok 2448 # SKIP Streaming SVE set FPSIMD get SVE for VL 1568
4179 13:53:39.168379 # ok 2449 Set Streaming SVE VL 1584
4180 13:53:39.168456 # ok 2450 # SKIP Streaming SVE set SVE get SVE for VL 1584
4181 13:53:39.168522 # ok 2451 # SKIP Streaming SVE set SVE get FPSIMD for VL 1584
4182 13:53:39.168585 # ok 2452 # SKIP Streaming SVE set FPSIMD get SVE for VL 1584
4183 13:53:39.168646 # ok 2453 Set Streaming SVE VL 1600
4184 13:53:39.168736 # ok 2454 # SKIP Streaming SVE set SVE get SVE for VL 1600
4185 13:53:39.168818 # ok 2455 # SKIP Streaming SVE set SVE get FPSIMD for VL 1600
4186 13:53:39.168885 # ok 2456 # SKIP Streaming SVE set FPSIMD get SVE for VL 1600
4187 13:53:39.168960 # ok 2457 Set Streaming SVE VL 1616
4188 13:53:39.169037 # ok 2458 # SKIP Streaming SVE set SVE get SVE for VL 1616
4189 13:53:39.169113 # ok 2459 # SKIP Streaming SVE set SVE get FPSIMD for VL 1616
4190 13:53:39.169203 # ok 2460 # SKIP Streaming SVE set FPSIMD get SVE for VL 1616
4191 13:53:39.169289 # ok 2461 Set Streaming SVE VL 1632
4192 13:53:39.169369 # ok 2462 # SKIP Streaming SVE set SVE get SVE for VL 1632
4193 13:53:39.169446 # ok 2463 # SKIP Streaming SVE set SVE get FPSIMD for VL 1632
4194 13:53:39.169525 # ok 2464 # SKIP Streaming SVE set FPSIMD get SVE for VL 1632
4195 13:53:39.169595 # ok 2465 Set Streaming SVE VL 1648
4196 13:53:39.169675 # ok 2466 # SKIP Streaming SVE set SVE get SVE for VL 1648
4197 13:53:39.169751 # ok 2467 # SKIP Streaming SVE set SVE get FPSIMD for VL 1648
4198 13:53:39.170037 # ok 2468 # SKIP Streaming SVE set FPSIMD get SVE for VL 1648
4199 13:53:39.170130 # ok 2469 Set Streaming SVE VL 1664
4200 13:53:39.170219 # ok 2470 # SKIP Streaming SVE set SVE get SVE for VL 1664
4201 13:53:39.170318 # ok 2471 # SKIP Streaming SVE set SVE get FPSIMD for VL 1664
4202 13:53:39.170404 # ok 2472 # SKIP Streaming SVE set FPSIMD get SVE for VL 1664
4203 13:53:39.170481 # ok 2473 Set Streaming SVE VL 1680
4204 13:53:39.170559 # ok 2474 # SKIP Streaming SVE set SVE get SVE for VL 1680
4205 13:53:39.170635 # ok 2475 # SKIP Streaming SVE set SVE get FPSIMD for VL 1680
4206 13:53:39.170712 # ok 2476 # SKIP Streaming SVE set FPSIMD get SVE for VL 1680
4207 13:53:39.170814 # ok 2477 Set Streaming SVE VL 1696
4208 13:53:39.170894 # ok 2478 # SKIP Streaming SVE set SVE get SVE for VL 1696
4209 13:53:39.170967 # ok 2479 # SKIP Streaming SVE set SVE get FPSIMD for VL 1696
4210 13:53:39.171042 # ok 2480 # SKIP Streaming SVE set FPSIMD get SVE for VL 1696
4211 13:53:39.171105 # ok 2481 Set Streaming SVE VL 1712
4212 13:53:39.171164 # ok 2482 # SKIP Streaming SVE set SVE get SVE for VL 1712
4213 13:53:39.171223 # ok 2483 # SKIP Streaming SVE set SVE get FPSIMD for VL 1712
4214 13:53:39.171282 # ok 2484 # SKIP Streaming SVE set FPSIMD get SVE for VL 1712
4215 13:53:39.171344 # ok 2485 Set Streaming SVE VL 1728
4216 13:53:39.171406 # ok 2486 # SKIP Streaming SVE set SVE get SVE for VL 1728
4217 13:53:39.171467 # ok 2487 # SKIP Streaming SVE set SVE get FPSIMD for VL 1728
4218 13:53:39.171529 # ok 2488 # SKIP Streaming SVE set FPSIMD get SVE for VL 1728
4219 13:53:39.171592 # ok 2489 Set Streaming SVE VL 1744
4220 13:53:39.171653 # ok 2490 # SKIP Streaming SVE set SVE get SVE for VL 1744
4221 13:53:39.171713 # ok 2491 # SKIP Streaming SVE set SVE get FPSIMD for VL 1744
4222 13:53:39.171774 # ok 2492 # SKIP Streaming SVE set FPSIMD get SVE for VL 1744
4223 13:53:39.171834 # ok 2493 Set Streaming SVE VL 1760
4224 13:53:39.171896 # ok 2494 # SKIP Streaming SVE set SVE get SVE for VL 1760
4225 13:53:39.171959 # ok 2495 # SKIP Streaming SVE set SVE get FPSIMD for VL 1760
4226 13:53:39.172021 # ok 2496 # SKIP Streaming SVE set FPSIMD get SVE for VL 1760
4227 13:53:39.172085 # ok 2497 Set Streaming SVE VL 1776
4228 13:53:39.172150 # ok 2498 # SKIP Streaming SVE set SVE get SVE for VL 1776
4229 13:53:39.172212 # ok 2499 # SKIP Streaming SVE set SVE get FPSIMD for VL 1776
4230 13:53:39.172274 # ok 2500 # SKIP Streaming SVE set FPSIMD get SVE for VL 1776
4231 13:53:39.172336 # ok 2501 Set Streaming SVE VL 1792
4232 13:53:39.172399 # ok 2502 # SKIP Streaming SVE set SVE get SVE for VL 1792
4233 13:53:39.172662 # ok 2503 # SKIP Streaming SVE set SVE get FPSIMD for VL 1792
4234 13:53:39.172748 # ok 2504 # SKIP Streaming SVE set FPSIMD get SVE for VL 1792
4235 13:53:39.172828 # ok 2505 Set Streaming SVE VL 1808
4236 13:53:39.172926 # ok 2506 # SKIP Streaming SVE set SVE get SVE for VL 1808
4237 13:53:39.173033 # ok 2507 # SKIP Streaming SVE set SVE get FPSIMD for VL 1808
4238 13:53:39.173147 # ok 2508 # SKIP Streaming SVE set FPSIMD get SVE for VL 1808
4239 13:53:39.173237 # ok 2509 Set Streaming SVE VL 1824
4240 13:53:39.173315 # ok 2510 # SKIP Streaming SVE set SVE get SVE for VL 1824
4241 13:53:39.173393 # ok 2511 # SKIP Streaming SVE set SVE get FPSIMD for VL 1824
4242 13:53:39.173471 # ok 2512 # SKIP Streaming SVE set FPSIMD get SVE for VL 1824
4243 13:53:39.173553 # ok 2513 Set Streaming SVE VL 1840
4244 13:53:39.173632 # ok 2514 # SKIP Streaming SVE set SVE get SVE for VL 1840
4245 13:53:39.173740 # ok 2515 # SKIP Streaming SVE set SVE get FPSIMD for VL 1840
4246 13:53:39.173839 # ok 2516 # SKIP Streaming SVE set FPSIMD get SVE for VL 1840
4247 13:53:39.173915 # ok 2517 Set Streaming SVE VL 1856
4248 13:53:39.173989 # ok 2518 # SKIP Streaming SVE set SVE get SVE for VL 1856
4249 13:53:39.174068 # ok 2519 # SKIP Streaming SVE set SVE get FPSIMD for VL 1856
4250 13:53:39.174166 # ok 2520 # SKIP Streaming SVE set FPSIMD get SVE for VL 1856
4251 13:53:39.174250 # ok 2521 Set Streaming SVE VL 1872
4252 13:53:39.174315 # ok 2522 # SKIP Streaming SVE set SVE get SVE for VL 1872
4253 13:53:39.174377 # ok 2523 # SKIP Streaming SVE set SVE get FPSIMD for VL 1872
4254 13:53:39.174436 # ok 2524 # SKIP Streaming SVE set FPSIMD get SVE for VL 1872
4255 13:53:39.174496 # ok 2525 Set Streaming SVE VL 1888
4256 13:53:39.174554 # ok 2526 # SKIP Streaming SVE set SVE get SVE for VL 1888
4257 13:53:39.174614 # ok 2527 # SKIP Streaming SVE set SVE get FPSIMD for VL 1888
4258 13:53:39.174672 # ok 2528 # SKIP Streaming SVE set FPSIMD get SVE for VL 1888
4259 13:53:39.174732 # ok 2529 Set Streaming SVE VL 1904
4260 13:53:39.174791 # ok 2530 # SKIP Streaming SVE set SVE get SVE for VL 1904
4261 13:53:39.174850 # ok 2531 # SKIP Streaming SVE set SVE get FPSIMD for VL 1904
4262 13:53:39.174908 # ok 2532 # SKIP Streaming SVE set FPSIMD get SVE for VL 1904
4263 13:53:39.174967 # ok 2533 Set Streaming SVE VL 1920
4264 13:53:39.175031 # ok 2534 # SKIP Streaming SVE set SVE get SVE for VL 1920
4265 13:53:39.175090 # ok 2535 # SKIP Streaming SVE set SVE get FPSIMD for VL 1920
4266 13:53:39.175150 # ok 2536 # SKIP Streaming SVE set FPSIMD get SVE for VL 1920
4267 13:53:39.175209 # ok 2537 Set Streaming SVE VL 1936
4268 13:53:39.175502 # ok 2538 # SKIP Streaming SVE set SVE get SVE for VL 1936
4269 13:53:39.175611 # ok 2539 # SKIP Streaming SVE set SVE get FPSIMD for VL 1936
4270 13:53:39.175688 # ok 2540 # SKIP Streaming SVE set FPSIMD get SVE for VL 1936
4271 13:53:39.175763 # ok 2541 Set Streaming SVE VL 1952
4272 13:53:39.175837 # ok 2542 # SKIP Streaming SVE set SVE get SVE for VL 1952
4273 13:53:39.175911 # ok 2543 # SKIP Streaming SVE set SVE get FPSIMD for VL 1952
4274 13:53:39.175986 # ok 2544 # SKIP Streaming SVE set FPSIMD get SVE for VL 1952
4275 13:53:39.176060 # ok 2545 Set Streaming SVE VL 1968
4276 13:53:39.176133 # ok 2546 # SKIP Streaming SVE set SVE get SVE for VL 1968
4277 13:53:39.176206 # ok 2547 # SKIP Streaming SVE set SVE get FPSIMD for VL 1968
4278 13:53:39.176279 # ok 2548 # SKIP Streaming SVE set FPSIMD get SVE for VL 1968
4279 13:53:39.176353 # ok 2549 Set Streaming SVE VL 1984
4280 13:53:39.176426 # ok 2550 # SKIP Streaming SVE set SVE get SVE for VL 1984
4281 13:53:39.176499 # ok 2551 # SKIP Streaming SVE set SVE get FPSIMD for VL 1984
4282 13:53:39.176592 # ok 2552 # SKIP Streaming SVE set FPSIMD get SVE for VL 1984
4283 13:53:39.176695 # ok 2553 Set Streaming SVE VL 2000
4284 13:53:39.176774 # ok 2554 # SKIP Streaming SVE set SVE get SVE for VL 2000
4285 13:53:39.176848 # ok 2555 # SKIP Streaming SVE set SVE get FPSIMD for VL 2000
4286 13:53:39.176922 # ok 2556 # SKIP Streaming SVE set FPSIMD get SVE for VL 2000
4287 13:53:39.176995 # ok 2557 Set Streaming SVE VL 2016
4288 13:53:39.177069 # ok 2558 # SKIP Streaming SVE set SVE get SVE for VL 2016
4289 13:53:39.177142 # ok 2559 # SKIP Streaming SVE set SVE get FPSIMD for VL 2016
4290 13:53:39.177215 # ok 2560 # SKIP Streaming SVE set FPSIMD get SVE for VL 2016
4291 13:53:39.177289 # ok 2561 Set Streaming SVE VL 2032
4292 13:53:39.177362 # ok 2562 # SKIP Streaming SVE set SVE get SVE for VL 2032
4293 13:53:39.177435 # ok 2563 # SKIP Streaming SVE set SVE get FPSIMD for VL 2032
4294 13:53:39.177507 # ok 2564 # SKIP Streaming SVE set FPSIMD get SVE for VL 2032
4295 13:53:39.177581 # ok 2565 Set Streaming SVE VL 2048
4296 13:53:39.177664 # ok 2566 # SKIP Streaming SVE set SVE get SVE for VL 2048
4297 13:53:39.177739 # ok 2567 # SKIP Streaming SVE set SVE get FPSIMD for VL 2048
4298 13:53:39.177812 # ok 2568 # SKIP Streaming SVE set FPSIMD get SVE for VL 2048
4299 13:53:39.177886 # ok 2569 Set Streaming SVE VL 2064
4300 13:53:39.177959 # ok 2570 # SKIP Streaming SVE set SVE get SVE for VL 2064
4301 13:53:39.178032 # ok 2571 # SKIP Streaming SVE set SVE get FPSIMD for VL 2064
4302 13:53:39.178105 # ok 2572 # SKIP Streaming SVE set FPSIMD get SVE for VL 2064
4303 13:53:39.178179 # ok 2573 Set Streaming SVE VL 2080
4304 13:53:39.178478 # ok 2574 # SKIP Streaming SVE set SVE get SVE for VL 2080
4305 13:53:39.178552 # ok 2575 # SKIP Streaming SVE set SVE get FPSIMD for VL 2080
4306 13:53:39.178628 # ok 2576 # SKIP Streaming SVE set FPSIMD get SVE for VL 2080
4307 13:53:39.178702 # ok 2577 Set Streaming SVE VL 2096
4308 13:53:39.178775 # ok 2578 # SKIP Streaming SVE set SVE get SVE for VL 2096
4309 13:53:39.178848 # ok 2579 # SKIP Streaming SVE set SVE get FPSIMD for VL 2096
4310 13:53:39.178922 # ok 2580 # SKIP Streaming SVE set FPSIMD get SVE for VL 2096
4311 13:53:39.178995 # ok 2581 Set Streaming SVE VL 2112
4312 13:53:39.179067 # ok 2582 # SKIP Streaming SVE set SVE get SVE for VL 2112
4313 13:53:39.179140 # ok 2583 # SKIP Streaming SVE set SVE get FPSIMD for VL 2112
4314 13:53:39.179214 # ok 2584 # SKIP Streaming SVE set FPSIMD get SVE for VL 2112
4315 13:53:39.179287 # ok 2585 Set Streaming SVE VL 2128
4316 13:53:39.179359 # ok 2586 # SKIP Streaming SVE set SVE get SVE for VL 2128
4317 13:53:39.179432 # ok 2587 # SKIP Streaming SVE set SVE get FPSIMD for VL 2128
4318 13:53:39.179504 # ok 2588 # SKIP Streaming SVE set FPSIMD get SVE for VL 2128
4319 13:53:39.179583 # ok 2589 Set Streaming SVE VL 2144
4320 13:53:39.179681 # ok 2590 # SKIP Streaming SVE set SVE get SVE for VL 2144
4321 13:53:39.179761 # ok 2591 # SKIP Streaming SVE set SVE get FPSIMD for VL 2144
4322 13:53:39.179844 # ok 2592 # SKIP Streaming SVE set FPSIMD get SVE for VL 2144
4323 13:53:39.179929 # ok 2593 Set Streaming SVE VL 2160
4324 13:53:39.180014 # ok 2594 # SKIP Streaming SVE set SVE get SVE for VL 2160
4325 13:53:39.180104 # ok 2595 # SKIP Streaming SVE set SVE get FPSIMD for VL 2160
4326 13:53:39.180189 # ok 2596 # SKIP Streaming SVE set FPSIMD get SVE for VL 2160
4327 13:53:39.180275 # ok 2597 Set Streaming SVE VL 2176
4328 13:53:39.180359 # ok 2598 # SKIP Streaming SVE set SVE get SVE for VL 2176
4329 13:53:39.180444 # ok 2599 # SKIP Streaming SVE set SVE get FPSIMD for VL 2176
4330 13:53:39.180529 # ok 2600 # SKIP Streaming SVE set FPSIMD get SVE for VL 2176
4331 13:53:39.180615 # ok 2601 Set Streaming SVE VL 2192
4332 13:53:39.180702 # ok 2602 # SKIP Streaming SVE set SVE get SVE for VL 2192
4333 13:53:39.180787 # ok 2603 # SKIP Streaming SVE set SVE get FPSIMD for VL 2192
4334 13:53:39.180873 # ok 2604 # SKIP Streaming SVE set FPSIMD get SVE for VL 2192
4335 13:53:39.180959 # ok 2605 Set Streaming SVE VL 2208
4336 13:53:39.181044 # ok 2606 # SKIP Streaming SVE set SVE get SVE for VL 2208
4337 13:53:39.181131 # ok 2607 # SKIP Streaming SVE set SVE get FPSIMD for VL 2208
4338 13:53:39.181217 # ok 2608 # SKIP Streaming SVE set FPSIMD get SVE for VL 2208
4339 13:53:39.181722 # ok 2609 Set Streaming SVE VL 2224
4340 13:53:39.181832 # ok 2610 # SKIP Streaming SVE set SVE get SVE for VL 2224
4341 13:53:39.181924 # ok 2611 # SKIP Streaming SVE set SVE get FPSIMD for VL 2224
4342 13:53:39.182015 # ok 2612 # SKIP Streaming SVE set FPSIMD get SVE for VL 2224
4343 13:53:39.182103 # ok 2613 Set Streaming SVE VL 2240
4344 13:53:39.182186 # ok 2614 # SKIP Streaming SVE set SVE get SVE for VL 2240
4345 13:53:39.182272 # ok 2615 # SKIP Streaming SVE set SVE get FPSIMD for VL 2240
4346 13:53:39.182339 # ok 2616 # SKIP Streaming SVE set FPSIMD get SVE for VL 2240
4347 13:53:39.182398 # ok 2617 Set Streaming SVE VL 2256
4348 13:53:39.182455 # ok 2618 # SKIP Streaming SVE set SVE get SVE for VL 2256
4349 13:53:39.182513 # ok 2619 # SKIP Streaming SVE set SVE get FPSIMD for VL 2256
4350 13:53:39.182571 # ok 2620 # SKIP Streaming SVE set FPSIMD get SVE for VL 2256
4351 13:53:39.182628 # ok 2621 Set Streaming SVE VL 2272
4352 13:53:39.182685 # ok 2622 # SKIP Streaming SVE set SVE get SVE for VL 2272
4353 13:53:39.182743 # ok 2623 # SKIP Streaming SVE set SVE get FPSIMD for VL 2272
4354 13:53:39.182800 # ok 2624 # SKIP Streaming SVE set FPSIMD get SVE for VL 2272
4355 13:53:39.182860 # ok 2625 Set Streaming SVE VL 2288
4356 13:53:39.182920 # ok 2626 # SKIP Streaming SVE set SVE get SVE for VL 2288
4357 13:53:39.182978 # ok 2627 # SKIP Streaming SVE set SVE get FPSIMD for VL 2288
4358 13:53:39.183036 # ok 2628 # SKIP Streaming SVE set FPSIMD get SVE for VL 2288
4359 13:53:39.183094 # ok 2629 Set Streaming SVE VL 2304
4360 13:53:39.183150 # ok 2630 # SKIP Streaming SVE set SVE get SVE for VL 2304
4361 13:53:39.183207 # ok 2631 # SKIP Streaming SVE set SVE get FPSIMD for VL 2304
4362 13:53:39.183265 # ok 2632 # SKIP Streaming SVE set FPSIMD get SVE for VL 2304
4363 13:53:39.183323 # ok 2633 Set Streaming SVE VL 2320
4364 13:53:39.183380 # ok 2634 # SKIP Streaming SVE set SVE get SVE for VL 2320
4365 13:53:39.183437 # ok 2635 # SKIP Streaming SVE set SVE get FPSIMD for VL 2320
4366 13:53:39.183505 # ok 2636 # SKIP Streaming SVE set FPSIMD get SVE for VL 2320
4367 13:53:39.183588 # ok 2637 Set Streaming SVE VL 2336
4368 13:53:39.183671 # ok 2638 # SKIP Streaming SVE set SVE get SVE for VL 2336
4369 13:53:39.183756 # ok 2639 # SKIP Streaming SVE set SVE get FPSIMD for VL 2336
4370 13:53:39.183840 # ok 2640 # SKIP Streaming SVE set FPSIMD get SVE for VL 2336
4371 13:53:39.183923 # ok 2641 Set Streaming SVE VL 2352
4372 13:53:39.184003 # ok 2642 # SKIP Streaming SVE set SVE get SVE for VL 2352
4373 13:53:39.184087 # ok 2643 # SKIP Streaming SVE set SVE get FPSIMD for VL 2352
4374 13:53:39.184524 # ok 2644 # SKIP Streaming SVE set FPSIMD get SVE for VL 2352
4375 13:53:39.184672 # ok 2645 Set Streaming SVE VL 2368
4376 13:53:39.184769 # ok 2646 # SKIP Streaming SVE set SVE get SVE for VL 2368
4377 13:53:39.184855 # ok 2647 # SKIP Streaming SVE set SVE get FPSIMD for VL 2368
4378 13:53:39.184942 # ok 2648 # SKIP Streaming SVE set FPSIMD get SVE for VL 2368
4379 13:53:39.185038 # ok 2649 Set Streaming SVE VL 2384
4380 13:53:39.185120 # ok 2650 # SKIP Streaming SVE set SVE get SVE for VL 2384
4381 13:53:39.185195 # ok 2651 # SKIP Streaming SVE set SVE get FPSIMD for VL 2384
4382 13:53:39.185270 # ok 2652 # SKIP Streaming SVE set FPSIMD get SVE for VL 2384
4383 13:53:39.185376 # ok 2653 Set Streaming SVE VL 2400
4384 13:53:39.185476 # ok 2654 # SKIP Streaming SVE set SVE get SVE for VL 2400
4385 13:53:39.185585 # ok 2655 # SKIP Streaming SVE set SVE get FPSIMD for VL 2400
4386 13:53:39.185700 # ok 2656 # SKIP Streaming SVE set FPSIMD get SVE for VL 2400
4387 13:53:39.185819 # ok 2657 Set Streaming SVE VL 2416
4388 13:53:39.185927 # ok 2658 # SKIP Streaming SVE set SVE get SVE for VL 2416
4389 13:53:39.186017 # ok 2659 # SKIP Streaming SVE set SVE get FPSIMD for VL 2416
4390 13:53:39.186122 # ok 2660 # SKIP Streaming SVE set FPSIMD get SVE for VL 2416
4391 13:53:39.186206 # ok 2661 Set Streaming SVE VL 2432
4392 13:53:39.186296 # ok 2662 # SKIP Streaming SVE set SVE get SVE for VL 2432
4393 13:53:39.186363 # ok 2663 # SKIP Streaming SVE set SVE get FPSIMD for VL 2432
4394 13:53:39.186423 # ok 2664 # SKIP Streaming SVE set FPSIMD get SVE for VL 2432
4395 13:53:39.186494 # ok 2665 Set Streaming SVE VL 2448
4396 13:53:39.186608 # ok 2666 # SKIP Streaming SVE set SVE get SVE for VL 2448
4397 13:53:39.186719 # ok 2667 # SKIP Streaming SVE set SVE get FPSIMD for VL 2448
4398 13:53:39.186829 # ok 2668 # SKIP Streaming SVE set FPSIMD get SVE for VL 2448
4399 13:53:39.186931 # ok 2669 Set Streaming SVE VL 2464
4400 13:53:39.187037 # ok 2670 # SKIP Streaming SVE set SVE get SVE for VL 2464
4401 13:53:39.187126 # ok 2671 # SKIP Streaming SVE set SVE get FPSIMD for VL 2464
4402 13:53:39.187209 # ok 2672 # SKIP Streaming SVE set FPSIMD get SVE for VL 2464
4403 13:53:39.187289 # ok 2673 Set Streaming SVE VL 2480
4404 13:53:39.187368 # ok 2674 # SKIP Streaming SVE set SVE get SVE for VL 2480
4405 13:53:39.187447 # ok 2675 # SKIP Streaming SVE set SVE get FPSIMD for VL 2480
4406 13:53:39.187526 # ok 2676 # SKIP Streaming SVE set FPSIMD get SVE for VL 2480
4407 13:53:39.187603 # ok 2677 Set Streaming SVE VL 2496
4408 13:53:39.187681 # ok 2678 # SKIP Streaming SVE set SVE get SVE for VL 2496
4409 13:53:39.188033 # ok 2679 # SKIP Streaming SVE set SVE get FPSIMD for VL 2496
4410 13:53:39.188186 # ok 2680 # SKIP Streaming SVE set FPSIMD get SVE for VL 2496
4411 13:53:39.188364 # ok 2681 Set Streaming SVE VL 2512
4412 13:53:39.188509 # ok 2682 # SKIP Streaming SVE set SVE get SVE for VL 2512
4413 13:53:39.188620 # ok 2683 # SKIP Streaming SVE set SVE get FPSIMD for VL 2512
4414 13:53:39.188720 # ok 2684 # SKIP Streaming SVE set FPSIMD get SVE for VL 2512
4415 13:53:39.188822 # ok 2685 Set Streaming SVE VL 2528
4416 13:53:39.188921 # ok 2686 # SKIP Streaming SVE set SVE get SVE for VL 2528
4417 13:53:39.189023 # ok 2687 # SKIP Streaming SVE set SVE get FPSIMD for VL 2528
4418 13:53:39.189123 # ok 2688 # SKIP Streaming SVE set FPSIMD get SVE for VL 2528
4419 13:53:39.189220 # ok 2689 Set Streaming SVE VL 2544
4420 13:53:39.189325 # ok 2690 # SKIP Streaming SVE set SVE get SVE for VL 2544
4421 13:53:39.189428 # ok 2691 # SKIP Streaming SVE set SVE get FPSIMD for VL 2544
4422 13:53:39.189510 # ok 2692 # SKIP Streaming SVE set FPSIMD get SVE for VL 2544
4423 13:53:39.189576 # ok 2693 Set Streaming SVE VL 2560
4424 13:53:39.189641 # ok 2694 # SKIP Streaming SVE set SVE get SVE for VL 2560
4425 13:53:39.189718 # ok 2695 # SKIP Streaming SVE set SVE get FPSIMD for VL 2560
4426 13:53:39.189784 # ok 2696 # SKIP Streaming SVE set FPSIMD get SVE for VL 2560
4427 13:53:39.189847 # ok 2697 Set Streaming SVE VL 2576
4428 13:53:39.189911 # ok 2698 # SKIP Streaming SVE set SVE get SVE for VL 2576
4429 13:53:39.190012 # ok 2699 # SKIP Streaming SVE set SVE get FPSIMD for VL 2576
4430 13:53:39.190097 # ok 2700 # SKIP Streaming SVE set FPSIMD get SVE for VL 2576
4431 13:53:39.190176 # ok 2701 Set Streaming SVE VL 2592
4432 13:53:39.190254 # ok 2702 # SKIP Streaming SVE set SVE get SVE for VL 2592
4433 13:53:39.190334 # ok 2703 # SKIP Streaming SVE set SVE get FPSIMD for VL 2592
4434 13:53:39.190412 # ok 2704 # SKIP Streaming SVE set FPSIMD get SVE for VL 2592
4435 13:53:39.190489 # ok 2705 Set Streaming SVE VL 2608
4436 13:53:39.190567 # ok 2706 # SKIP Streaming SVE set SVE get SVE for VL 2608
4437 13:53:39.190645 # ok 2707 # SKIP Streaming SVE set SVE get FPSIMD for VL 2608
4438 13:53:39.190722 # ok 2708 # SKIP Streaming SVE set FPSIMD get SVE for VL 2608
4439 13:53:39.190801 # ok 2709 Set Streaming SVE VL 2624
4440 13:53:39.190878 # ok 2710 # SKIP Streaming SVE set SVE get SVE for VL 2624
4441 13:53:39.190952 # ok 2711 # SKIP Streaming SVE set SVE get FPSIMD for VL 2624
4442 13:53:39.191026 # ok 2712 # SKIP Streaming SVE set FPSIMD get SVE for VL 2624
4443 13:53:39.191097 # ok 2713 Set Streaming SVE VL 2640
4444 13:53:39.191169 # ok 2714 # SKIP Streaming SVE set SVE get SVE for VL 2640
4445 13:53:39.191468 # ok 2715 # SKIP Streaming SVE set SVE get FPSIMD for VL 2640
4446 13:53:39.191555 # ok 2716 # SKIP Streaming SVE set FPSIMD get SVE for VL 2640
4447 13:53:39.191620 # ok 2717 Set Streaming SVE VL 2656
4448 13:53:39.191682 # ok 2718 # SKIP Streaming SVE set SVE get SVE for VL 2656
4449 13:53:39.191743 # ok 2719 # SKIP Streaming SVE set SVE get FPSIMD for VL 2656
4450 13:53:39.191803 # ok 2720 # SKIP Streaming SVE set FPSIMD get SVE for VL 2656
4451 13:53:39.191864 # ok 2721 Set Streaming SVE VL 2672
4452 13:53:39.191924 # ok 2722 # SKIP Streaming SVE set SVE get SVE for VL 2672
4453 13:53:39.191985 # ok 2723 # SKIP Streaming SVE set SVE get FPSIMD for VL 2672
4454 13:53:39.192045 # ok 2724 # SKIP Streaming SVE set FPSIMD get SVE for VL 2672
4455 13:53:39.192106 # ok 2725 Set Streaming SVE VL 2688
4456 13:53:39.192201 # ok 2726 # SKIP Streaming SVE set SVE get SVE for VL 2688
4457 13:53:39.192308 # ok 2727 # SKIP Streaming SVE set SVE get FPSIMD for VL 2688
4458 13:53:39.192392 # ok 2728 # SKIP Streaming SVE set FPSIMD get SVE for VL 2688
4459 13:53:39.192478 # ok 2729 Set Streaming SVE VL 2704
4460 13:53:39.192574 # ok 2730 # SKIP Streaming SVE set SVE get SVE for VL 2704
4461 13:53:39.192667 # ok 2731 # SKIP Streaming SVE set SVE get FPSIMD for VL 2704
4462 13:53:39.192754 # ok 2732 # SKIP Streaming SVE set FPSIMD get SVE for VL 2704
4463 13:53:39.192840 # ok 2733 Set Streaming SVE VL 2720
4464 13:53:39.192924 # ok 2734 # SKIP Streaming SVE set SVE get SVE for VL 2720
4465 13:53:39.193002 # ok 2735 # SKIP Streaming SVE set SVE get FPSIMD for VL 2720
4466 13:53:39.193081 # ok 2736 # SKIP Streaming SVE set FPSIMD get SVE for VL 2720
4467 13:53:39.193162 # ok 2737 Set Streaming SVE VL 2736
4468 13:53:39.193243 # ok 2738 # SKIP Streaming SVE set SVE get SVE for VL 2736
4469 13:53:39.193327 # ok 2739 # SKIP Streaming SVE set SVE get FPSIMD for VL 2736
4470 13:53:39.193405 # ok 2740 # SKIP Streaming SVE set FPSIMD get SVE for VL 2736
4471 13:53:39.193484 # ok 2741 Set Streaming SVE VL 2752
4472 13:53:39.193564 # ok 2742 # SKIP Streaming SVE set SVE get SVE for VL 2752
4473 13:53:39.193655 # ok 2743 # SKIP Streaming SVE set SVE get FPSIMD for VL 2752
4474 13:53:39.193741 # ok 2744 # SKIP Streaming SVE set FPSIMD get SVE for VL 2752
4475 13:53:39.193828 # ok 2745 Set Streaming SVE VL 2768
4476 13:53:39.193913 # ok 2746 # SKIP Streaming SVE set SVE get SVE for VL 2768
4477 13:53:39.193999 # ok 2747 # SKIP Streaming SVE set SVE get FPSIMD for VL 2768
4478 13:53:39.194093 # ok 2748 # SKIP Streaming SVE set FPSIMD get SVE for VL 2768
4479 13:53:39.194182 # ok 2749 Set Streaming SVE VL 2784
4480 13:53:39.194516 # ok 2750 # SKIP Streaming SVE set SVE get SVE for VL 2784
4481 13:53:39.194716 # ok 2751 # SKIP Streaming SVE set SVE get FPSIMD for VL 2784
4482 13:53:39.194892 # ok 2752 # SKIP Streaming SVE set FPSIMD get SVE for VL 2784
4483 13:53:39.194980 # ok 2753 Set Streaming SVE VL 2800
4484 13:53:39.195084 # ok 2754 # SKIP Streaming SVE set SVE get SVE for VL 2800
4485 13:53:39.195174 # ok 2755 # SKIP Streaming SVE set SVE get FPSIMD for VL 2800
4486 13:53:39.195264 # ok 2756 # SKIP Streaming SVE set FPSIMD get SVE for VL 2800
4487 13:53:39.195348 # ok 2757 Set Streaming SVE VL 2816
4488 13:53:39.195427 # ok 2758 # SKIP Streaming SVE set SVE get SVE for VL 2816
4489 13:53:39.195506 # ok 2759 # SKIP Streaming SVE set SVE get FPSIMD for VL 2816
4490 13:53:39.195583 # ok 2760 # SKIP Streaming SVE set FPSIMD get SVE for VL 2816
4491 13:53:39.195667 # ok 2761 Set Streaming SVE VL 2832
4492 13:53:39.195748 # ok 2762 # SKIP Streaming SVE set SVE get SVE for VL 2832
4493 13:53:39.195814 # ok 2763 # SKIP Streaming SVE set SVE get FPSIMD for VL 2832
4494 13:53:39.195889 # ok 2764 # SKIP Streaming SVE set FPSIMD get SVE for VL 2832
4495 13:53:39.195965 # ok 2765 Set Streaming SVE VL 2848
4496 13:53:39.196043 # ok 2766 # SKIP Streaming SVE set SVE get SVE for VL 2848
4497 13:53:39.196121 # ok 2767 # SKIP Streaming SVE set SVE get FPSIMD for VL 2848
4498 13:53:39.196198 # ok 2768 # SKIP Streaming SVE set FPSIMD get SVE for VL 2848
4499 13:53:39.196279 # ok 2769 Set Streaming SVE VL 2864
4500 13:53:39.196360 # ok 2770 # SKIP Streaming SVE set SVE get SVE for VL 2864
4501 13:53:39.196441 # ok 2771 # SKIP Streaming SVE set SVE get FPSIMD for VL 2864
4502 13:53:39.196520 # ok 2772 # SKIP Streaming SVE set FPSIMD get SVE for VL 2864
4503 13:53:39.196600 # ok 2773 Set Streaming SVE VL 2880
4504 13:53:39.196680 # ok 2774 # SKIP Streaming SVE set SVE get SVE for VL 2880
4505 13:53:39.196758 # ok 2775 # SKIP Streaming SVE set SVE get FPSIMD for VL 2880
4506 13:53:39.196835 # ok 2776 # SKIP Streaming SVE set FPSIMD get SVE for VL 2880
4507 13:53:39.196907 # ok 2777 Set Streaming SVE VL 2896
4508 13:53:39.196982 # ok 2778 # SKIP Streaming SVE set SVE get SVE for VL 2896
4509 13:53:39.197051 # ok 2779 # SKIP Streaming SVE set SVE get FPSIMD for VL 2896
4510 13:53:39.197117 # ok 2780 # SKIP Streaming SVE set FPSIMD get SVE for VL 2896
4511 13:53:39.197188 # ok 2781 Set Streaming SVE VL 2912
4512 13:53:39.197268 # ok 2782 # SKIP Streaming SVE set SVE get SVE for VL 2912
4513 13:53:39.197345 # ok 2783 # SKIP Streaming SVE set SVE get FPSIMD for VL 2912
4514 13:53:39.197417 # ok 2784 # SKIP Streaming SVE set FPSIMD get SVE for VL 2912
4515 13:53:39.197984 # ok 2785 Set Streaming SVE VL 2928
4516 13:53:39.198084 # ok 2786 # SKIP Streaming SVE set SVE get SVE for VL 2928
4517 13:53:39.198189 # ok 2787 # SKIP Streaming SVE set SVE get FPSIMD for VL 2928
4518 13:53:39.198294 # ok 2788 # SKIP Streaming SVE set FPSIMD get SVE for VL 2928
4519 13:53:39.198398 # ok 2789 Set Streaming SVE VL 2944
4520 13:53:39.198507 # ok 2790 # SKIP Streaming SVE set SVE get SVE for VL 2944
4521 13:53:39.198617 # ok 2791 # SKIP Streaming SVE set SVE get FPSIMD for VL 2944
4522 13:53:39.198721 # ok 2792 # SKIP Streaming SVE set FPSIMD get SVE for VL 2944
4523 13:53:39.198819 # ok 2793 Set Streaming SVE VL 2960
4524 13:53:39.198904 # ok 2794 # SKIP Streaming SVE set SVE get SVE for VL 2960
4525 13:53:39.198990 # ok 2795 # SKIP Streaming SVE set SVE get FPSIMD for VL 2960
4526 13:53:39.199069 # ok 2796 # SKIP Streaming SVE set FPSIMD get SVE for VL 2960
4527 13:53:39.199141 # ok 2797 Set Streaming SVE VL 2976
4528 13:53:39.199227 # ok 2798 # SKIP Streaming SVE set SVE get SVE for VL 2976
4529 13:53:39.199313 # ok 2799 # SKIP Streaming SVE set SVE get FPSIMD for VL 2976
4530 13:53:39.199398 # ok 2800 # SKIP Streaming SVE set FPSIMD get SVE for VL 2976
4531 13:53:39.199486 # ok 2801 Set Streaming SVE VL 2992
4532 13:53:39.199567 # ok 2802 # SKIP Streaming SVE set SVE get SVE for VL 2992
4533 13:53:39.199640 # ok 2803 # SKIP Streaming SVE set SVE get FPSIMD for VL 2992
4534 13:53:39.199740 # ok 2804 # SKIP Streaming SVE set FPSIMD get SVE for VL 2992
4535 13:53:39.199866 # ok 2805 Set Streaming SVE VL 3008
4536 13:53:39.199975 # ok 2806 # SKIP Streaming SVE set SVE get SVE for VL 3008
4537 13:53:39.200091 # ok 2807 # SKIP Streaming SVE set SVE get FPSIMD for VL 3008
4538 13:53:39.200180 # ok 2808 # SKIP Streaming SVE set FPSIMD get SVE for VL 3008
4539 13:53:39.200263 # ok 2809 Set Streaming SVE VL 3024
4540 13:53:39.200346 # ok 2810 # SKIP Streaming SVE set SVE get SVE for VL 3024
4541 13:53:39.200419 # ok 2811 # SKIP Streaming SVE set SVE get FPSIMD for VL 3024
4542 13:53:39.200495 # ok 2812 # SKIP Streaming SVE set FPSIMD get SVE for VL 3024
4543 13:53:39.200580 # ok 2813 Set Streaming SVE VL 3040
4544 13:53:39.200665 # ok 2814 # SKIP Streaming SVE set SVE get SVE for VL 3040
4545 13:53:39.200738 # ok 2815 # SKIP Streaming SVE set SVE get FPSIMD for VL 3040
4546 13:53:39.200807 # ok 2816 # SKIP Streaming SVE set FPSIMD get SVE for VL 3040
4547 13:53:39.200872 # ok 2817 Set Streaming SVE VL 3056
4548 13:53:39.200943 # ok 2818 # SKIP Streaming SVE set SVE get SVE for VL 3056
4549 13:53:39.201028 # ok 2819 # SKIP Streaming SVE set SVE get FPSIMD for VL 3056
4550 13:53:39.201340 # ok 2820 # SKIP Streaming SVE set FPSIMD get SVE for VL 3056
4551 13:53:39.201443 # ok 2821 Set Streaming SVE VL 3072
4552 13:53:39.201528 # ok 2822 # SKIP Streaming SVE set SVE get SVE for VL 3072
4553 13:53:39.201613 # ok 2823 # SKIP Streaming SVE set SVE get FPSIMD for VL 3072
4554 13:53:39.201708 # ok 2824 # SKIP Streaming SVE set FPSIMD get SVE for VL 3072
4555 13:53:39.201793 # ok 2825 Set Streaming SVE VL 3088
4556 13:53:39.201876 # ok 2826 # SKIP Streaming SVE set SVE get SVE for VL 3088
4557 13:53:39.201958 # ok 2827 # SKIP Streaming SVE set SVE get FPSIMD for VL 3088
4558 13:53:39.202041 # ok 2828 # SKIP Streaming SVE set FPSIMD get SVE for VL 3088
4559 13:53:39.202124 # ok 2829 Set Streaming SVE VL 3104
4560 13:53:39.202204 # ok 2830 # SKIP Streaming SVE set SVE get SVE for VL 3104
4561 13:53:39.202283 # ok 2831 # SKIP Streaming SVE set SVE get FPSIMD for VL 3104
4562 13:53:39.202366 # ok 2832 # SKIP Streaming SVE set FPSIMD get SVE for VL 3104
4563 13:53:39.202449 # ok 2833 Set Streaming SVE VL 3120
4564 13:53:39.202530 # ok 2834 # SKIP Streaming SVE set SVE get SVE for VL 3120
4565 13:53:39.202611 # ok 2835 # SKIP Streaming SVE set SVE get FPSIMD for VL 3120
4566 13:53:39.202693 # ok 2836 # SKIP Streaming SVE set FPSIMD get SVE for VL 3120
4567 13:53:39.202776 # ok 2837 Set Streaming SVE VL 3136
4568 13:53:39.202856 # ok 2838 # SKIP Streaming SVE set SVE get SVE for VL 3136
4569 13:53:39.202938 # ok 2839 # SKIP Streaming SVE set SVE get FPSIMD for VL 3136
4570 13:53:39.203020 # ok 2840 # SKIP Streaming SVE set FPSIMD get SVE for VL 3136
4571 13:53:39.203111 # ok 2841 Set Streaming SVE VL 3152
4572 13:53:39.203192 # ok 2842 # SKIP Streaming SVE set SVE get SVE for VL 3152
4573 13:53:39.203275 # ok 2843 # SKIP Streaming SVE set SVE get FPSIMD for VL 3152
4574 13:53:39.203357 # ok 2844 # SKIP Streaming SVE set FPSIMD get SVE for VL 3152
4575 13:53:39.203439 # ok 2845 Set Streaming SVE VL 3168
4576 13:53:39.203518 # ok 2846 # SKIP Streaming SVE set SVE get SVE for VL 3168
4577 13:53:39.203599 # ok 2847 # SKIP Streaming SVE set SVE get FPSIMD for VL 3168
4578 13:53:39.203680 # ok 2848 # SKIP Streaming SVE set FPSIMD get SVE for VL 3168
4579 13:53:39.203761 # ok 2849 Set Streaming SVE VL 3184
4580 13:53:39.203841 # ok 2850 # SKIP Streaming SVE set SVE get SVE for VL 3184
4581 13:53:39.203920 # ok 2851 # SKIP Streaming SVE set SVE get FPSIMD for VL 3184
4582 13:53:39.204001 # ok 2852 # SKIP Streaming SVE set FPSIMD get SVE for VL 3184
4583 13:53:39.204087 # ok 2853 Set Streaming SVE VL 3200
4584 13:53:39.204168 # ok 2854 # SKIP Streaming SVE set SVE get SVE for VL 3200
4585 13:53:39.204457 # ok 2855 # SKIP Streaming SVE set SVE get FPSIMD for VL 3200
4586 13:53:39.204572 # ok 2856 # SKIP Streaming SVE set FPSIMD get SVE for VL 3200
4587 13:53:39.204686 # ok 2857 Set Streaming SVE VL 3216
4588 13:53:39.204784 # ok 2858 # SKIP Streaming SVE set SVE get SVE for VL 3216
4589 13:53:39.204877 # ok 2859 # SKIP Streaming SVE set SVE get FPSIMD for VL 3216
4590 13:53:39.204945 # ok 2860 # SKIP Streaming SVE set FPSIMD get SVE for VL 3216
4591 13:53:39.205005 # ok 2861 Set Streaming SVE VL 3232
4592 13:53:39.205063 # ok 2862 # SKIP Streaming SVE set SVE get SVE for VL 3232
4593 13:53:39.205122 # ok 2863 # SKIP Streaming SVE set SVE get FPSIMD for VL 3232
4594 13:53:39.205182 # ok 2864 # SKIP Streaming SVE set FPSIMD get SVE for VL 3232
4595 13:53:39.205240 # ok 2865 Set Streaming SVE VL 3248
4596 13:53:39.205299 # ok 2866 # SKIP Streaming SVE set SVE get SVE for VL 3248
4597 13:53:39.205359 # ok 2867 # SKIP Streaming SVE set SVE get FPSIMD for VL 3248
4598 13:53:39.205418 # ok 2868 # SKIP Streaming SVE set FPSIMD get SVE for VL 3248
4599 13:53:39.205476 # ok 2869 Set Streaming SVE VL 3264
4600 13:53:39.205534 # ok 2870 # SKIP Streaming SVE set SVE get SVE for VL 3264
4601 13:53:39.205593 # ok 2871 # SKIP Streaming SVE set SVE get FPSIMD for VL 3264
4602 13:53:39.205662 # ok 2872 # SKIP Streaming SVE set FPSIMD get SVE for VL 3264
4603 13:53:39.205722 # ok 2873 Set Streaming SVE VL 3280
4604 13:53:39.205780 # ok 2874 # SKIP Streaming SVE set SVE get SVE for VL 3280
4605 13:53:39.205854 # ok 2875 # SKIP Streaming SVE set SVE get FPSIMD for VL 3280
4606 13:53:39.205917 # ok 2876 # SKIP Streaming SVE set FPSIMD get SVE for VL 3280
4607 13:53:39.205977 # ok 2877 Set Streaming SVE VL 3296
4608 13:53:39.212722 # ok 2878 # SKIP Streaming SVE set SVE get SVE for VL 3296
4609 13:53:39.212949 # ok 2879 # SKIP Streaming SVE set SVE get FPSIMD for VL 3296
4610 13:53:39.213064 # ok 2880 # SKIP Streaming SVE set FPSIMD get SVE for VL 3296
4611 13:53:39.213153 # ok 2881 Set Streaming SVE VL 3312
4612 13:53:39.213255 # ok 2882 # SKIP Streaming SVE set SVE get SVE for VL 3312
4613 13:53:39.213358 # ok 2883 # SKIP Streaming SVE set SVE get FPSIMD for VL 3312
4614 13:53:39.213462 # ok 2884 # SKIP Streaming SVE set FPSIMD get SVE for VL 3312
4615 13:53:39.213571 # ok 2885 Set Streaming SVE VL 3328
4616 13:53:39.213874 # ok 2886 # SKIP Streaming SVE set SVE get SVE for VL 3328
4617 13:53:39.213982 # ok 2887 # SKIP Streaming SVE set SVE get FPSIMD for VL 3328
4618 13:53:39.214262 # ok 2888 # SKIP Streaming SVE set FPSIMD get SVE for VL 3328
4619 13:53:39.216071 # ok 2889 Set Streaming SVE VL 3344
4620 13:53:39.216542 # ok 2890 # SKIP Streaming SVE set SVE get SVE for VL 3344
4621 13:53:39.216640 # ok 2891 # SKIP Streaming SVE set SVE get FPSIMD for VL 3344
4622 13:53:39.216732 # ok 2892 # SKIP Streaming SVE set FPSIMD get SVE for VL 3344
4623 13:53:39.216817 # ok 2893 Set Streaming SVE VL 3360
4624 13:53:39.216904 # ok 2894 # SKIP Streaming SVE set SVE get SVE for VL 3360
4625 13:53:39.217190 # ok 2895 # SKIP Streaming SVE set SVE get FPSIMD for VL 3360
4626 13:53:39.217301 # ok 2896 # SKIP Streaming SVE set FPSIMD get SVE for VL 3360
4627 13:53:39.217407 # ok 2897 Set Streaming SVE VL 3376
4628 13:53:39.217494 # ok 2898 # SKIP Streaming SVE set SVE get SVE for VL 3376
4629 13:53:39.217790 # ok 2899 # SKIP Streaming SVE set SVE get FPSIMD for VL 3376
4630 13:53:39.218098 # ok 2900 # SKIP Streaming SVE set FPSIMD get SVE for VL 3376
4631 13:53:39.218199 # ok 2901 Set Streaming SVE VL 3392
4632 13:53:39.218275 # ok 2902 # SKIP Streaming SVE set SVE get SVE for VL 3392
4633 13:53:39.225605 # ok 2903 # SKIP Streaming SVE set SVE get FPSIMD for VL 3392
4634 13:53:39.225880 # ok 2904 # SKIP Streaming SVE set FPSIMD get SVE for VL 3392
4635 13:53:39.226248 # ok 2905 Set Streaming SVE VL 3408
4636 13:53:39.226337 # ok 2906 # SKIP Streaming SVE set SVE get SVE for VL 3408
4637 13:53:39.226402 # ok 2907 # SKIP Streaming SVE set SVE get FPSIMD for VL 3408
4638 13:53:39.226464 # ok 2908 # SKIP Streaming SVE set FPSIMD get SVE for VL 3408
4639 13:53:39.236758 # ok 2909 Set Streaming SVE VL 3424
4640 13:53:39.237235 # ok 2910 # SKIP Streaming SVE set SVE get SVE for VL 3424
4641 13:53:39.237346 # ok 2911 # SKIP Streaming SVE set SVE get FPSIMD for VL 3424
4642 13:53:39.237430 # ok 2912 # SKIP Streaming SVE set FPSIMD get SVE for VL 3424
4643 13:53:39.237518 # ok 2913 Set Streaming SVE VL 3440
4644 13:53:39.237636 # ok 2914 # SKIP Streaming SVE set SVE get SVE for VL 3440
4645 13:53:39.237756 # ok 2915 # SKIP Streaming SVE set SVE get FPSIMD for VL 3440
4646 13:53:39.237851 # ok 2916 # SKIP Streaming SVE set FPSIMD get SVE for VL 3440
4647 13:53:39.237976 # ok 2917 Set Streaming SVE VL 3456
4648 13:53:39.238120 # ok 2918 # SKIP Streaming SVE set SVE get SVE for VL 3456
4649 13:53:39.245297 # ok 2919 # SKIP Streaming SVE set SVE get FPSIMD for VL 3456
4650 13:53:39.245735 # ok 2920 # SKIP Streaming SVE set FPSIMD get SVE for VL 3456
4651 13:53:39.245840 # ok 2921 Set Streaming SVE VL 3472
4652 13:53:39.245945 # ok 2922 # SKIP Streaming SVE set SVE get SVE for VL 3472
4653 13:53:39.246062 # ok 2923 # SKIP Streaming SVE set SVE get FPSIMD for VL 3472
4654 13:53:39.246145 # ok 2924 # SKIP Streaming SVE set FPSIMD get SVE for VL 3472
4655 13:53:39.246231 # ok 2925 Set Streaming SVE VL 3488
4656 13:53:39.256531 # ok 2926 # SKIP Streaming SVE set SVE get SVE for VL 3488
4657 13:53:39.256987 # ok 2927 # SKIP Streaming SVE set SVE get FPSIMD for VL 3488
4658 13:53:39.257090 # ok 2928 # SKIP Streaming SVE set FPSIMD get SVE for VL 3488
4659 13:53:39.257181 # ok 2929 Set Streaming SVE VL 3504
4660 13:53:39.257283 # ok 2930 # SKIP Streaming SVE set SVE get SVE for VL 3504
4661 13:53:39.257365 # ok 2931 # SKIP Streaming SVE set SVE get FPSIMD for VL 3504
4662 13:53:39.257440 # ok 2932 # SKIP Streaming SVE set FPSIMD get SVE for VL 3504
4663 13:53:39.257529 # ok 2933 Set Streaming SVE VL 3520
4664 13:53:39.257606 # ok 2934 # SKIP Streaming SVE set SVE get SVE for VL 3520
4665 13:53:39.257705 # ok 2935 # SKIP Streaming SVE set SVE get FPSIMD for VL 3520
4666 13:53:39.257995 # ok 2936 # SKIP Streaming SVE set FPSIMD get SVE for VL 3520
4667 13:53:39.258094 # ok 2937 Set Streaming SVE VL 3536
4668 13:53:39.258187 # ok 2938 # SKIP Streaming SVE set SVE get SVE for VL 3536
4669 13:53:39.264176 # ok 2939 # SKIP Streaming SVE set SVE get FPSIMD for VL 3536
4670 13:53:39.264662 # ok 2940 # SKIP Streaming SVE set FPSIMD get SVE for VL 3536
4671 13:53:39.264767 # ok 2941 Set Streaming SVE VL 3552
4672 13:53:39.264875 # ok 2942 # SKIP Streaming SVE set SVE get SVE for VL 3552
4673 13:53:39.264994 # ok 2943 # SKIP Streaming SVE set SVE get FPSIMD for VL 3552
4674 13:53:39.265093 # ok 2944 # SKIP Streaming SVE set FPSIMD get SVE for VL 3552
4675 13:53:39.265198 # ok 2945 Set Streaming SVE VL 3568
4676 13:53:39.265321 # ok 2946 # SKIP Streaming SVE set SVE get SVE for VL 3568
4677 13:53:39.265418 # ok 2947 # SKIP Streaming SVE set SVE get FPSIMD for VL 3568
4678 13:53:39.265541 # ok 2948 # SKIP Streaming SVE set FPSIMD get SVE for VL 3568
4679 13:53:39.265635 # ok 2949 Set Streaming SVE VL 3584
4680 13:53:39.265774 # ok 2950 # SKIP Streaming SVE set SVE get SVE for VL 3584
4681 13:53:39.265890 # ok 2951 # SKIP Streaming SVE set SVE get FPSIMD for VL 3584
4682 13:53:39.266196 # ok 2952 # SKIP Streaming SVE set FPSIMD get SVE for VL 3584
4683 13:53:39.266278 # ok 2953 Set Streaming SVE VL 3600
4684 13:53:39.268883 # ok 2954 # SKIP Streaming SVE set SVE get SVE for VL 3600
4685 13:53:39.269208 # ok 2955 # SKIP Streaming SVE set SVE get FPSIMD for VL 3600
4686 13:53:39.269490 # ok 2956 # SKIP Streaming SVE set FPSIMD get SVE for VL 3600
4687 13:53:39.269579 # ok 2957 Set Streaming SVE VL 3616
4688 13:53:39.269664 # ok 2958 # SKIP Streaming SVE set SVE get SVE for VL 3616
4689 13:53:39.269756 # ok 2959 # SKIP Streaming SVE set SVE get FPSIMD for VL 3616
4690 13:53:39.270069 # ok 2960 # SKIP Streaming SVE set FPSIMD get SVE for VL 3616
4691 13:53:39.270174 # ok 2961 Set Streaming SVE VL 3632
4692 13:53:39.270254 # ok 2962 # SKIP Streaming SVE set SVE get SVE for VL 3632
4693 13:53:39.270346 # ok 2963 # SKIP Streaming SVE set SVE get FPSIMD for VL 3632
4694 13:53:39.280631 # ok 2964 # SKIP Streaming SVE set FPSIMD get SVE for VL 3632
4695 13:53:39.280839 # ok 2965 Set Streaming SVE VL 3648
4696 13:53:39.281110 # ok 2966 # SKIP Streaming SVE set SVE get SVE for VL 3648
4697 13:53:39.281196 # ok 2967 # SKIP Streaming SVE set SVE get FPSIMD for VL 3648
4698 13:53:39.281466 # ok 2968 # SKIP Streaming SVE set FPSIMD get SVE for VL 3648
4699 13:53:39.281541 # ok 2969 Set Streaming SVE VL 3664
4700 13:53:39.281617 # ok 2970 # SKIP Streaming SVE set SVE get SVE for VL 3664
4701 13:53:39.281691 # ok 2971 # SKIP Streaming SVE set SVE get FPSIMD for VL 3664
4702 13:53:39.281757 # ok 2972 # SKIP Streaming SVE set FPSIMD get SVE for VL 3664
4703 13:53:39.282052 # ok 2973 Set Streaming SVE VL 3680
4704 13:53:39.282323 # ok 2974 # SKIP Streaming SVE set SVE get SVE for VL 3680
4705 13:53:39.282391 # ok 2975 # SKIP Streaming SVE set SVE get FPSIMD for VL 3680
4706 13:53:39.282451 # ok 2976 # SKIP Streaming SVE set FPSIMD get SVE for VL 3680
4707 13:53:39.282511 # ok 2977 Set Streaming SVE VL 3696
4708 13:53:39.288524 # ok 2978 # SKIP Streaming SVE set SVE get SVE for VL 3696
4709 13:53:39.288897 # ok 2979 # SKIP Streaming SVE set SVE get FPSIMD for VL 3696
4710 13:53:39.288983 # ok 2980 # SKIP Streaming SVE set FPSIMD get SVE for VL 3696
4711 13:53:39.289051 # ok 2981 Set Streaming SVE VL 3712
4712 13:53:39.289130 # ok 2982 # SKIP Streaming SVE set SVE get SVE for VL 3712
4713 13:53:39.289219 # ok 2983 # SKIP Streaming SVE set SVE get FPSIMD for VL 3712
4714 13:53:39.289505 # ok 2984 # SKIP Streaming SVE set FPSIMD get SVE for VL 3712
4715 13:53:39.289606 # ok 2985 Set Streaming SVE VL 3728
4716 13:53:39.289898 # ok 2986 # SKIP Streaming SVE set SVE get SVE for VL 3728
4717 13:53:39.289989 # ok 2987 # SKIP Streaming SVE set SVE get FPSIMD for VL 3728
4718 13:53:39.290053 # ok 2988 # SKIP Streaming SVE set FPSIMD get SVE for VL 3728
4719 13:53:39.290117 # ok 2989 Set Streaming SVE VL 3744
4720 13:53:39.294115 # ok 2990 # SKIP Streaming SVE set SVE get SVE for VL 3744
4721 13:53:39.294274 # ok 2991 # SKIP Streaming SVE set SVE get FPSIMD for VL 3744
4722 13:53:39.304278 # ok 2992 # SKIP Streaming SVE set FPSIMD get SVE for VL 3744
4723 13:53:39.304753 # ok 2993 Set Streaming SVE VL 3760
4724 13:53:39.304866 # ok 2994 # SKIP Streaming SVE set SVE get SVE for VL 3760
4725 13:53:39.304958 # ok 2995 # SKIP Streaming SVE set SVE get FPSIMD for VL 3760
4726 13:53:39.305058 # ok 2996 # SKIP Streaming SVE set FPSIMD get SVE for VL 3760
4727 13:53:39.305140 # ok 2997 Set Streaming SVE VL 3776
4728 13:53:39.305241 # ok 2998 # SKIP Streaming SVE set SVE get SVE for VL 3776
4729 13:53:39.305324 # ok 2999 # SKIP Streaming SVE set SVE get FPSIMD for VL 3776
4730 13:53:39.305604 # ok 3000 # SKIP Streaming SVE set FPSIMD get SVE for VL 3776
4731 13:53:39.305710 # ok 3001 Set Streaming SVE VL 3792
4732 13:53:39.305809 # ok 3002 # SKIP Streaming SVE set SVE get SVE for VL 3792
4733 13:53:39.305912 # ok 3003 # SKIP Streaming SVE set SVE get FPSIMD for VL 3792
4734 13:53:39.306191 # ok 3004 # SKIP Streaming SVE set FPSIMD get SVE for VL 3792
4735 13:53:39.306271 # ok 3005 Set Streaming SVE VL 3808
4736 13:53:39.312029 # ok 3006 # SKIP Streaming SVE set SVE get SVE for VL 3808
4737 13:53:39.312317 # ok 3007 # SKIP Streaming SVE set SVE get FPSIMD for VL 3808
4738 13:53:39.312540 # ok 3008 # SKIP Streaming SVE set FPSIMD get SVE for VL 3808
4739 13:53:39.312703 # ok 3009 Set Streaming SVE VL 3824
4740 13:53:39.312859 # ok 3010 # SKIP Streaming SVE set SVE get SVE for VL 3824
4741 13:53:39.313043 # ok 3011 # SKIP Streaming SVE set SVE get FPSIMD for VL 3824
4742 13:53:39.313209 # ok 3012 # SKIP Streaming SVE set FPSIMD get SVE for VL 3824
4743 13:53:39.313365 # ok 3013 Set Streaming SVE VL 3840
4744 13:53:39.313532 # ok 3014 # SKIP Streaming SVE set SVE get SVE for VL 3840
4745 13:53:39.313748 # ok 3015 # SKIP Streaming SVE set SVE get FPSIMD for VL 3840
4746 13:53:39.313927 # ok 3016 # SKIP Streaming SVE set FPSIMD get SVE for VL 3840
4747 13:53:39.314155 # ok 3017 Set Streaming SVE VL 3856
4748 13:53:39.314320 # ok 3018 # SKIP Streaming SVE set SVE get SVE for VL 3856
4749 13:53:39.314448 # ok 3019 # SKIP Streaming SVE set SVE get FPSIMD for VL 3856
4750 13:53:39.314565 # ok 3020 # SKIP Streaming SVE set FPSIMD get SVE for VL 3856
4751 13:53:39.319709 # ok 3021 Set Streaming SVE VL 3872
4752 13:53:39.320188 # ok 3022 # SKIP Streaming SVE set SVE get SVE for VL 3872
4753 13:53:39.320390 # ok 3023 # SKIP Streaming SVE set SVE get FPSIMD for VL 3872
4754 13:53:39.320603 # ok 3024 # SKIP Streaming SVE set FPSIMD get SVE for VL 3872
4755 13:53:39.320760 # ok 3025 Set Streaming SVE VL 3888
4756 13:53:39.320905 # ok 3026 # SKIP Streaming SVE set SVE get SVE for VL 3888
4757 13:53:39.322135 # ok 3027 # SKIP Streaming SVE set SVE get FPSIMD for VL 3888
4758 13:53:39.327590 # ok 3028 # SKIP Streaming SVE set FPSIMD get SVE for VL 3888
4759 13:53:39.328159 # ok 3029 Set Streaming SVE VL 3904
4760 13:53:39.328355 # ok 3030 # SKIP Streaming SVE set SVE get SVE for VL 3904
4761 13:53:39.328540 # ok 3031 # SKIP Streaming SVE set SVE get FPSIMD for VL 3904
4762 13:53:39.328755 # ok 3032 # SKIP Streaming SVE set FPSIMD get SVE for VL 3904
4763 13:53:39.328951 # ok 3033 Set Streaming SVE VL 3920
4764 13:53:39.329099 # ok 3034 # SKIP Streaming SVE set SVE get SVE for VL 3920
4765 13:53:39.329267 # ok 3035 # SKIP Streaming SVE set SVE get FPSIMD for VL 3920
4766 13:53:39.329468 # ok 3036 # SKIP Streaming SVE set FPSIMD get SVE for VL 3920
4767 13:53:39.329690 # ok 3037 Set Streaming SVE VL 3936
4768 13:53:39.329828 # ok 3038 # SKIP Streaming SVE set SVE get SVE for VL 3936
4769 13:53:39.329945 # ok 3039 # SKIP Streaming SVE set SVE get FPSIMD for VL 3936
4770 13:53:39.330059 # ok 3040 # SKIP Streaming SVE set FPSIMD get SVE for VL 3936
4771 13:53:39.330211 # ok 3041 Set Streaming SVE VL 3952
4772 13:53:39.330337 # ok 3042 # SKIP Streaming SVE set SVE get SVE for VL 3952
4773 13:53:39.330479 # ok 3043 # SKIP Streaming SVE set SVE get FPSIMD for VL 3952
4774 13:53:39.330600 # ok 3044 # SKIP Streaming SVE set FPSIMD get SVE for VL 3952
4775 13:53:39.330715 # ok 3045 Set Streaming SVE VL 3968
4776 13:53:39.334002 # ok 3046 # SKIP Streaming SVE set SVE get SVE for VL 3968
4777 13:53:39.334225 # ok 3047 # SKIP Streaming SVE set SVE get FPSIMD for VL 3968
4778 13:53:39.334360 # ok 3048 # SKIP Streaming SVE set FPSIMD get SVE for VL 3968
4779 13:53:39.334519 # ok 3049 Set Streaming SVE VL 3984
4780 13:53:39.334651 # ok 3050 # SKIP Streaming SVE set SVE get SVE for VL 3984
4781 13:53:39.334767 # ok 3051 # SKIP Streaming SVE set SVE get FPSIMD for VL 3984
4782 13:53:39.334887 # ok 3052 # SKIP Streaming SVE set FPSIMD get SVE for VL 3984
4783 13:53:39.335006 # ok 3053 Set Streaming SVE VL 4000
4784 13:53:39.335119 # ok 3054 # SKIP Streaming SVE set SVE get SVE for VL 4000
4785 13:53:39.335240 # ok 3055 # SKIP Streaming SVE set SVE get FPSIMD for VL 4000
4786 13:53:39.335356 # ok 3056 # SKIP Streaming SVE set FPSIMD get SVE for VL 4000
4787 13:53:39.335469 # ok 3057 Set Streaming SVE VL 4016
4788 13:53:39.335601 # ok 3058 # SKIP Streaming SVE set SVE get SVE for VL 4016
4789 13:53:39.335719 # ok 3059 # SKIP Streaming SVE set SVE get FPSIMD for VL 4016
4790 13:53:39.335834 # ok 3060 # SKIP Streaming SVE set FPSIMD get SVE for VL 4016
4791 13:53:39.335959 # ok 3061 Set Streaming SVE VL 4032
4792 13:53:39.336075 # ok 3062 # SKIP Streaming SVE set SVE get SVE for VL 4032
4793 13:53:39.336196 # ok 3063 # SKIP Streaming SVE set SVE get FPSIMD for VL 4032
4794 13:53:39.336316 # ok 3064 # SKIP Streaming SVE set FPSIMD get SVE for VL 4032
4795 13:53:39.336431 # ok 3065 Set Streaming SVE VL 4048
4796 13:53:39.336557 # ok 3066 # SKIP Streaming SVE set SVE get SVE for VL 4048
4797 13:53:39.336675 # ok 3067 # SKIP Streaming SVE set SVE get FPSIMD for VL 4048
4798 13:53:39.336793 # ok 3068 # SKIP Streaming SVE set FPSIMD get SVE for VL 4048
4799 13:53:39.336923 # ok 3069 Set Streaming SVE VL 4064
4800 13:53:39.337040 # ok 3070 # SKIP Streaming SVE set SVE get SVE for VL 4064
4801 13:53:39.337153 # ok 3071 # SKIP Streaming SVE set SVE get FPSIMD for VL 4064
4802 13:53:39.343308 # ok 3072 # SKIP Streaming SVE set FPSIMD get SVE for VL 4064
4803 13:53:39.343568 # ok 3073 Set Streaming SVE VL 4080
4804 13:53:39.344072 # ok 3074 # SKIP Streaming SVE set SVE get SVE for VL 4080
4805 13:53:39.344238 # ok 3075 # SKIP Streaming SVE set SVE get FPSIMD for VL 4080
4806 13:53:39.344418 # ok 3076 # SKIP Streaming SVE set FPSIMD get SVE for VL 4080
4807 13:53:39.344579 # ok 3077 Set Streaming SVE VL 4096
4808 13:53:39.344748 # ok 3078 # SKIP Streaming SVE set SVE get SVE for VL 4096
4809 13:53:39.344891 # ok 3079 # SKIP Streaming SVE set SVE get FPSIMD for VL 4096
4810 13:53:39.345043 # ok 3080 # SKIP Streaming SVE set FPSIMD get SVE for VL 4096
4811 13:53:39.345158 # ok 3081 Set Streaming SVE VL 4112
4812 13:53:39.345278 # ok 3082 # SKIP Streaming SVE set SVE get SVE for VL 4112
4813 13:53:39.345532 # ok 3083 # SKIP Streaming SVE set SVE get FPSIMD for VL 4112
4814 13:53:39.345689 # ok 3084 # SKIP Streaming SVE set FPSIMD get SVE for VL 4112
4815 13:53:39.345951 # ok 3085 Set Streaming SVE VL 4128
4816 13:53:39.346099 # ok 3086 # SKIP Streaming SVE set SVE get SVE for VL 4128
4817 13:53:39.346231 # ok 3087 # SKIP Streaming SVE set SVE get FPSIMD for VL 4128
4818 13:53:39.346330 # ok 3088 # SKIP Streaming SVE set FPSIMD get SVE for VL 4128
4819 13:53:39.346451 # ok 3089 Set Streaming SVE VL 4144
4820 13:53:39.346549 # ok 3090 # SKIP Streaming SVE set SVE get SVE for VL 4144
4821 13:53:39.346637 # ok 3091 # SKIP Streaming SVE set SVE get FPSIMD for VL 4144
4822 13:53:39.346723 # ok 3092 # SKIP Streaming SVE set FPSIMD get SVE for VL 4144
4823 13:53:39.346815 # ok 3093 Set Streaming SVE VL 4160
4824 13:53:39.346911 # ok 3094 # SKIP Streaming SVE set SVE get SVE for VL 4160
4825 13:53:39.347000 # ok 3095 # SKIP Streaming SVE set SVE get FPSIMD for VL 4160
4826 13:53:39.349362 # ok 3096 # SKIP Streaming SVE set FPSIMD get SVE for VL 4160
4827 13:53:39.349758 # ok 3097 Set Streaming SVE VL 4176
4828 13:53:39.349993 # ok 3098 # SKIP Streaming SVE set SVE get SVE for VL 4176
4829 13:53:39.350191 # ok 3099 # SKIP Streaming SVE set SVE get FPSIMD for VL 4176
4830 13:53:39.350345 # ok 3100 # SKIP Streaming SVE set FPSIMD get SVE for VL 4176
4831 13:53:39.350488 # ok 3101 Set Streaming SVE VL 4192
4832 13:53:39.350662 # ok 3102 # SKIP Streaming SVE set SVE get SVE for VL 4192
4833 13:53:39.350799 # ok 3103 # SKIP Streaming SVE set SVE get FPSIMD for VL 4192
4834 13:53:39.353503 # ok 3104 # SKIP Streaming SVE set FPSIMD get SVE for VL 4192
4835 13:53:39.354044 # ok 3105 Set Streaming SVE VL 4208
4836 13:53:39.354217 # ok 3106 # SKIP Streaming SVE set SVE get SVE for VL 4208
4837 13:53:39.354395 # ok 3107 # SKIP Streaming SVE set SVE get FPSIMD for VL 4208
4838 13:53:39.354542 # ok 3108 # SKIP Streaming SVE set FPSIMD get SVE for VL 4208
4839 13:53:39.354684 # ok 3109 Set Streaming SVE VL 4224
4840 13:53:39.354857 # ok 3110 # SKIP Streaming SVE set SVE get SVE for VL 4224
4841 13:53:39.359206 # ok 3111 # SKIP Streaming SVE set SVE get FPSIMD for VL 4224
4842 13:53:39.359751 # ok 3112 # SKIP Streaming SVE set FPSIMD get SVE for VL 4224
4843 13:53:39.359963 # ok 3113 Set Streaming SVE VL 4240
4844 13:53:39.360161 # ok 3114 # SKIP Streaming SVE set SVE get SVE for VL 4240
4845 13:53:39.360358 # ok 3115 # SKIP Streaming SVE set SVE get FPSIMD for VL 4240
4846 13:53:39.360565 # ok 3116 # SKIP Streaming SVE set FPSIMD get SVE for VL 4240
4847 13:53:39.360784 # ok 3117 Set Streaming SVE VL 4256
4848 13:53:39.360953 # ok 3118 # SKIP Streaming SVE set SVE get SVE for VL 4256
4849 13:53:39.361115 # ok 3119 # SKIP Streaming SVE set SVE get FPSIMD for VL 4256
4850 13:53:39.361277 # ok 3120 # SKIP Streaming SVE set FPSIMD get SVE for VL 4256
4851 13:53:39.361439 # ok 3121 Set Streaming SVE VL 4272
4852 13:53:39.361599 # ok 3122 # SKIP Streaming SVE set SVE get SVE for VL 4272
4853 13:53:39.361777 # ok 3123 # SKIP Streaming SVE set SVE get FPSIMD for VL 4272
4854 13:53:39.361939 # ok 3124 # SKIP Streaming SVE set FPSIMD get SVE for VL 4272
4855 13:53:39.362088 # ok 3125 Set Streaming SVE VL 4288
4856 13:53:39.362206 # ok 3126 # SKIP Streaming SVE set SVE get SVE for VL 4288
4857 13:53:39.362354 # ok 3127 # SKIP Streaming SVE set SVE get FPSIMD for VL 4288
4858 13:53:39.362474 # ok 3128 # SKIP Streaming SVE set FPSIMD get SVE for VL 4288
4859 13:53:39.362587 # ok 3129 Set Streaming SVE VL 4304
4860 13:53:39.362700 # ok 3130 # SKIP Streaming SVE set SVE get SVE for VL 4304
4861 13:53:39.362812 # ok 3131 # SKIP Streaming SVE set SVE get FPSIMD for VL 4304
4862 13:53:39.362926 # ok 3132 # SKIP Streaming SVE set FPSIMD get SVE for VL 4304
4863 13:53:39.363039 # ok 3133 Set Streaming SVE VL 4320
4864 13:53:39.363151 # ok 3134 # SKIP Streaming SVE set SVE get SVE for VL 4320
4865 13:53:39.363266 # ok 3135 # SKIP Streaming SVE set SVE get FPSIMD for VL 4320
4866 13:53:39.363379 # ok 3136 # SKIP Streaming SVE set FPSIMD get SVE for VL 4320
4867 13:53:39.363491 # ok 3137 Set Streaming SVE VL 4336
4868 13:53:39.363603 # ok 3138 # SKIP Streaming SVE set SVE get SVE for VL 4336
4869 13:53:39.367509 # ok 3139 # SKIP Streaming SVE set SVE get FPSIMD for VL 4336
4870 13:53:39.367969 # ok 3140 # SKIP Streaming SVE set FPSIMD get SVE for VL 4336
4871 13:53:39.368080 # ok 3141 Set Streaming SVE VL 4352
4872 13:53:39.368174 # ok 3142 # SKIP Streaming SVE set SVE get SVE for VL 4352
4873 13:53:39.368269 # ok 3143 # SKIP Streaming SVE set SVE get FPSIMD for VL 4352
4874 13:53:39.368383 # ok 3144 # SKIP Streaming SVE set FPSIMD get SVE for VL 4352
4875 13:53:39.368472 # ok 3145 Set Streaming SVE VL 4368
4876 13:53:39.368575 # ok 3146 # SKIP Streaming SVE set SVE get SVE for VL 4368
4877 13:53:39.368679 # ok 3147 # SKIP Streaming SVE set SVE get FPSIMD for VL 4368
4878 13:53:39.368770 # ok 3148 # SKIP Streaming SVE set FPSIMD get SVE for VL 4368
4879 13:53:39.368859 # ok 3149 Set Streaming SVE VL 4384
4880 13:53:39.368962 # ok 3150 # SKIP Streaming SVE set SVE get SVE for VL 4384
4881 13:53:39.369051 # ok 3151 # SKIP Streaming SVE set SVE get FPSIMD for VL 4384
4882 13:53:39.369393 # ok 3152 # SKIP Streaming SVE set FPSIMD get SVE for VL 4384
4883 13:53:39.369593 # ok 3153 Set Streaming SVE VL 4400
4884 13:53:39.369771 # ok 3154 # SKIP Streaming SVE set SVE get SVE for VL 4400
4885 13:53:39.369912 # ok 3155 # SKIP Streaming SVE set SVE get FPSIMD for VL 4400
4886 13:53:39.370048 # ok 3156 # SKIP Streaming SVE set FPSIMD get SVE for VL 4400
4887 13:53:39.370253 # ok 3157 Set Streaming SVE VL 4416
4888 13:53:39.370400 # ok 3158 # SKIP Streaming SVE set SVE get SVE for VL 4416
4889 13:53:39.370529 # ok 3159 # SKIP Streaming SVE set SVE get FPSIMD for VL 4416
4890 13:53:39.370701 # ok 3160 # SKIP Streaming SVE set FPSIMD get SVE for VL 4416
4891 13:53:39.370846 # ok 3161 Set Streaming SVE VL 4432
4892 13:53:39.375382 # ok 3162 # SKIP Streaming SVE set SVE get SVE for VL 4432
4893 13:53:39.375957 # ok 3163 # SKIP Streaming SVE set SVE get FPSIMD for VL 4432
4894 13:53:39.376148 # ok 3164 # SKIP Streaming SVE set FPSIMD get SVE for VL 4432
4895 13:53:39.376314 # ok 3165 Set Streaming SVE VL 4448
4896 13:53:39.376480 # ok 3166 # SKIP Streaming SVE set SVE get SVE for VL 4448
4897 13:53:39.376705 # ok 3167 # SKIP Streaming SVE set SVE get FPSIMD for VL 4448
4898 13:53:39.376973 # ok 3168 # SKIP Streaming SVE set FPSIMD get SVE for VL 4448
4899 13:53:39.377171 # ok 3169 Set Streaming SVE VL 4464
4900 13:53:39.377306 # ok 3170 # SKIP Streaming SVE set SVE get SVE for VL 4464
4901 13:53:39.377426 # ok 3171 # SKIP Streaming SVE set SVE get FPSIMD for VL 4464
4902 13:53:39.377544 # ok 3172 # SKIP Streaming SVE set FPSIMD get SVE for VL 4464
4903 13:53:39.377692 # ok 3173 Set Streaming SVE VL 4480
4904 13:53:39.377814 # ok 3174 # SKIP Streaming SVE set SVE get SVE for VL 4480
4905 13:53:39.377940 # ok 3175 # SKIP Streaming SVE set SVE get FPSIMD for VL 4480
4906 13:53:39.378177 # ok 3176 # SKIP Streaming SVE set FPSIMD get SVE for VL 4480
4907 13:53:39.383720 # ok 3177 Set Streaming SVE VL 4496
4908 13:53:39.384041 # ok 3178 # SKIP Streaming SVE set SVE get SVE for VL 4496
4909 13:53:39.384412 # ok 3179 # SKIP Streaming SVE set SVE get FPSIMD for VL 4496
4910 13:53:39.384555 # ok 3180 # SKIP Streaming SVE set FPSIMD get SVE for VL 4496
4911 13:53:39.384686 # ok 3181 Set Streaming SVE VL 4512
4912 13:53:39.384867 # ok 3182 # SKIP Streaming SVE set SVE get SVE for VL 4512
4913 13:53:39.385009 # ok 3183 # SKIP Streaming SVE set SVE get FPSIMD for VL 4512
4914 13:53:39.385137 # ok 3184 # SKIP Streaming SVE set FPSIMD get SVE for VL 4512
4915 13:53:39.385292 # ok 3185 Set Streaming SVE VL 4528
4916 13:53:39.385425 # ok 3186 # SKIP Streaming SVE set SVE get SVE for VL 4528
4917 13:53:39.385551 # ok 3187 # SKIP Streaming SVE set SVE get FPSIMD for VL 4528
4918 13:53:39.385689 # ok 3188 # SKIP Streaming SVE set FPSIMD get SVE for VL 4528
4919 13:53:39.385819 # ok 3189 Set Streaming SVE VL 4544
4920 13:53:39.385943 # ok 3190 # SKIP Streaming SVE set SVE get SVE for VL 4544
4921 13:53:39.386070 # ok 3191 # SKIP Streaming SVE set SVE get FPSIMD for VL 4544
4922 13:53:39.386193 # ok 3192 # SKIP Streaming SVE set FPSIMD get SVE for VL 4544
4923 13:53:39.386310 # ok 3193 Set Streaming SVE VL 4560
4924 13:53:39.386466 # ok 3194 # SKIP Streaming SVE set SVE get SVE for VL 4560
4925 13:53:39.386588 # ok 3195 # SKIP Streaming SVE set SVE get FPSIMD for VL 4560
4926 13:53:39.386704 # ok 3196 # SKIP Streaming SVE set FPSIMD get SVE for VL 4560
4927 13:53:39.386820 # ok 3197 Set Streaming SVE VL 4576
4928 13:53:39.386933 # ok 3198 # SKIP Streaming SVE set SVE get SVE for VL 4576
4929 13:53:39.387049 # ok 3199 # SKIP Streaming SVE set SVE get FPSIMD for VL 4576
4930 13:53:39.387162 # ok 3200 # SKIP Streaming SVE set FPSIMD get SVE for VL 4576
4931 13:53:39.391252 # ok 3201 Set Streaming SVE VL 4592
4932 13:53:39.391493 # ok 3202 # SKIP Streaming SVE set SVE get SVE for VL 4592
4933 13:53:39.391836 # ok 3203 # SKIP Streaming SVE set SVE get FPSIMD for VL 4592
4934 13:53:39.391945 # ok 3204 # SKIP Streaming SVE set FPSIMD get SVE for VL 4592
4935 13:53:39.392036 # ok 3205 Set Streaming SVE VL 4608
4936 13:53:39.392120 # ok 3206 # SKIP Streaming SVE set SVE get SVE for VL 4608
4937 13:53:39.392205 # ok 3207 # SKIP Streaming SVE set SVE get FPSIMD for VL 4608
4938 13:53:39.392292 # ok 3208 # SKIP Streaming SVE set FPSIMD get SVE for VL 4608
4939 13:53:39.392378 # ok 3209 Set Streaming SVE VL 4624
4940 13:53:39.392479 # ok 3210 # SKIP Streaming SVE set SVE get SVE for VL 4624
4941 13:53:39.392565 # ok 3211 # SKIP Streaming SVE set SVE get FPSIMD for VL 4624
4942 13:53:39.392650 # ok 3212 # SKIP Streaming SVE set FPSIMD get SVE for VL 4624
4943 13:53:39.392735 # ok 3213 Set Streaming SVE VL 4640
4944 13:53:39.392836 # ok 3214 # SKIP Streaming SVE set SVE get SVE for VL 4640
4945 13:53:39.392922 # ok 3215 # SKIP Streaming SVE set SVE get FPSIMD for VL 4640
4946 13:53:39.393022 # ok 3216 # SKIP Streaming SVE set FPSIMD get SVE for VL 4640
4947 13:53:39.393121 # ok 3217 Set Streaming SVE VL 4656
4948 13:53:39.393467 # ok 3218 # SKIP Streaming SVE set SVE get SVE for VL 4656
4949 13:53:39.393589 # ok 3219 # SKIP Streaming SVE set SVE get FPSIMD for VL 4656
4950 13:53:39.393708 # ok 3220 # SKIP Streaming SVE set FPSIMD get SVE for VL 4656
4951 13:53:39.393818 # ok 3221 Set Streaming SVE VL 4672
4952 13:53:39.394111 # ok 3222 # SKIP Streaming SVE set SVE get SVE for VL 4672
4953 13:53:39.397622 # ok 3223 # SKIP Streaming SVE set SVE get FPSIMD for VL 4672
4954 13:53:39.398137 # ok 3224 # SKIP Streaming SVE set FPSIMD get SVE for VL 4672
4955 13:53:39.398296 # ok 3225 Set Streaming SVE VL 4688
4956 13:53:39.398435 # ok 3226 # SKIP Streaming SVE set SVE get SVE for VL 4688
4957 13:53:39.403898 # ok 3227 # SKIP Streaming SVE set SVE get FPSIMD for VL 4688
4958 13:53:39.404489 # ok 3228 # SKIP Streaming SVE set FPSIMD get SVE for VL 4688
4959 13:53:39.404599 # ok 3229 Set Streaming SVE VL 4704
4960 13:53:39.404686 # ok 3230 # SKIP Streaming SVE set SVE get SVE for VL 4704
4961 13:53:39.404772 # ok 3231 # SKIP Streaming SVE set SVE get FPSIMD for VL 4704
4962 13:53:39.404869 # ok 3232 # SKIP Streaming SVE set FPSIMD get SVE for VL 4704
4963 13:53:39.404956 # ok 3233 Set Streaming SVE VL 4720
4964 13:53:39.405038 # ok 3234 # SKIP Streaming SVE set SVE get SVE for VL 4720
4965 13:53:39.405136 # ok 3235 # SKIP Streaming SVE set SVE get FPSIMD for VL 4720
4966 13:53:39.405235 # ok 3236 # SKIP Streaming SVE set FPSIMD get SVE for VL 4720
4967 13:53:39.405333 # ok 3237 Set Streaming SVE VL 4736
4968 13:53:39.405440 # ok 3238 # SKIP Streaming SVE set SVE get SVE for VL 4736
4969 13:53:39.405768 # ok 3239 # SKIP Streaming SVE set SVE get FPSIMD for VL 4736
4970 13:53:39.405886 # ok 3240 # SKIP Streaming SVE set FPSIMD get SVE for VL 4736
4971 13:53:39.405987 # ok 3241 Set Streaming SVE VL 4752
4972 13:53:39.411211 # ok 3242 # SKIP Streaming SVE set SVE get SVE for VL 4752
4973 13:53:39.411639 # ok 3243 # SKIP Streaming SVE set SVE get FPSIMD for VL 4752
4974 13:53:39.411748 # ok 3244 # SKIP Streaming SVE set FPSIMD get SVE for VL 4752
4975 13:53:39.411834 # ok 3245 Set Streaming SVE VL 4768
4976 13:53:39.411918 # ok 3246 # SKIP Streaming SVE set SVE get SVE for VL 4768
4977 13:53:39.412021 # ok 3247 # SKIP Streaming SVE set SVE get FPSIMD for VL 4768
4978 13:53:39.412104 # ok 3248 # SKIP Streaming SVE set FPSIMD get SVE for VL 4768
4979 13:53:39.412190 # ok 3249 Set Streaming SVE VL 4784
4980 13:53:39.412289 # ok 3250 # SKIP Streaming SVE set SVE get SVE for VL 4784
4981 13:53:39.412666 # ok 3251 # SKIP Streaming SVE set SVE get FPSIMD for VL 4784
4982 13:53:39.412769 # ok 3252 # SKIP Streaming SVE set FPSIMD get SVE for VL 4784
4983 13:53:39.413073 # ok 3253 Set Streaming SVE VL 4800
4984 13:53:39.413218 # ok 3254 # SKIP Streaming SVE set SVE get SVE for VL 4800
4985 13:53:39.413328 # ok 3255 # SKIP Streaming SVE set SVE get FPSIMD for VL 4800
4986 13:53:39.413438 # ok 3256 # SKIP Streaming SVE set FPSIMD get SVE for VL 4800
4987 13:53:39.413538 # ok 3257 Set Streaming SVE VL 4816
4988 13:53:39.413638 # ok 3258 # SKIP Streaming SVE set SVE get SVE for VL 4816
4989 13:53:39.413941 # ok 3259 # SKIP Streaming SVE set SVE get FPSIMD for VL 4816
4990 13:53:39.423378 # ok 3260 # SKIP Streaming SVE set FPSIMD get SVE for VL 4816
4991 13:53:39.423634 # ok 3261 Set Streaming SVE VL 4832
4992 13:53:39.424010 # ok 3262 # SKIP Streaming SVE set SVE get SVE for VL 4832
4993 13:53:39.424118 # ok 3263 # SKIP Streaming SVE set SVE get FPSIMD for VL 4832
4994 13:53:39.424210 # ok 3264 # SKIP Streaming SVE set FPSIMD get SVE for VL 4832
4995 13:53:39.424299 # ok 3265 Set Streaming SVE VL 4848
4996 13:53:39.424406 # ok 3266 # SKIP Streaming SVE set SVE get SVE for VL 4848
4997 13:53:39.424500 # ok 3267 # SKIP Streaming SVE set SVE get FPSIMD for VL 4848
4998 13:53:39.424613 # ok 3268 # SKIP Streaming SVE set FPSIMD get SVE for VL 4848
4999 13:53:39.424704 # ok 3269 Set Streaming SVE VL 4864
5000 13:53:39.424791 # ok 3270 # SKIP Streaming SVE set SVE get SVE for VL 4864
5001 13:53:39.424893 # ok 3271 # SKIP Streaming SVE set SVE get FPSIMD for VL 4864
5002 13:53:39.425000 # ok 3272 # SKIP Streaming SVE set FPSIMD get SVE for VL 4864
5003 13:53:39.425106 # ok 3273 Set Streaming SVE VL 4880
5004 13:53:39.425208 # ok 3274 # SKIP Streaming SVE set SVE get SVE for VL 4880
5005 13:53:39.425516 # ok 3275 # SKIP Streaming SVE set SVE get FPSIMD for VL 4880
5006 13:53:39.425641 # ok 3276 # SKIP Streaming SVE set FPSIMD get SVE for VL 4880
5007 13:53:39.425759 # ok 3277 Set Streaming SVE VL 4896
5008 13:53:39.425861 # ok 3278 # SKIP Streaming SVE set SVE get SVE for VL 4896
5009 13:53:39.435377 # ok 3279 # SKIP Streaming SVE set SVE get FPSIMD for VL 4896
5010 13:53:39.435832 # ok 3280 # SKIP Streaming SVE set FPSIMD get SVE for VL 4896
5011 13:53:39.435940 # ok 3281 Set Streaming SVE VL 4912
5012 13:53:39.436029 # ok 3282 # SKIP Streaming SVE set SVE get SVE for VL 4912
5013 13:53:39.436117 # ok 3283 # SKIP Streaming SVE set SVE get FPSIMD for VL 4912
5014 13:53:39.436206 # ok 3284 # SKIP Streaming SVE set FPSIMD get SVE for VL 4912
5015 13:53:39.436310 # ok 3285 Set Streaming SVE VL 4928
5016 13:53:39.436397 # ok 3286 # SKIP Streaming SVE set SVE get SVE for VL 4928
5017 13:53:39.436484 # ok 3287 # SKIP Streaming SVE set SVE get FPSIMD for VL 4928
5018 13:53:39.436577 # ok 3288 # SKIP Streaming SVE set FPSIMD get SVE for VL 4928
5019 13:53:39.436906 # ok 3289 Set Streaming SVE VL 4944
5020 13:53:39.437013 # ok 3290 # SKIP Streaming SVE set SVE get SVE for VL 4944
5021 13:53:39.437103 # ok 3291 # SKIP Streaming SVE set SVE get FPSIMD for VL 4944
5022 13:53:39.437208 # ok 3292 # SKIP Streaming SVE set FPSIMD get SVE for VL 4944
5023 13:53:39.437300 # ok 3293 Set Streaming SVE VL 4960
5024 13:53:39.437389 # ok 3294 # SKIP Streaming SVE set SVE get SVE for VL 4960
5025 13:53:39.437494 # ok 3295 # SKIP Streaming SVE set SVE get FPSIMD for VL 4960
5026 13:53:39.437597 # ok 3296 # SKIP Streaming SVE set FPSIMD get SVE for VL 4960
5027 13:53:39.437695 # ok 3297 Set Streaming SVE VL 4976
5028 13:53:39.437803 # ok 3298 # SKIP Streaming SVE set SVE get SVE for VL 4976
5029 13:53:39.437913 # ok 3299 # SKIP Streaming SVE set SVE get FPSIMD for VL 4976
5030 13:53:39.438017 # ok 3300 # SKIP Streaming SVE set FPSIMD get SVE for VL 4976
5031 13:53:39.451784 # ok 3301 Set Streaming SVE VL 4992
5032 13:53:39.452335 # ok 3302 # SKIP Streaming SVE set SVE get SVE for VL 4992
5033 13:53:39.452507 # ok 3303 # SKIP Streaming SVE set SVE get FPSIMD for VL 4992
5034 13:53:39.452606 # ok 3304 # SKIP Streaming SVE set FPSIMD get SVE for VL 4992
5035 13:53:39.452698 # ok 3305 Set Streaming SVE VL 5008
5036 13:53:39.452804 # ok 3306 # SKIP Streaming SVE set SVE get SVE for VL 5008
5037 13:53:39.452894 # ok 3307 # SKIP Streaming SVE set SVE get FPSIMD for VL 5008
5038 13:53:39.452981 # ok 3308 # SKIP Streaming SVE set FPSIMD get SVE for VL 5008
5039 13:53:39.453068 # ok 3309 Set Streaming SVE VL 5024
5040 13:53:39.453156 # ok 3310 # SKIP Streaming SVE set SVE get SVE for VL 5024
5041 13:53:39.453261 # ok 3311 # SKIP Streaming SVE set SVE get FPSIMD for VL 5024
5042 13:53:39.453348 # ok 3312 # SKIP Streaming SVE set FPSIMD get SVE for VL 5024
5043 13:53:39.453434 # ok 3313 Set Streaming SVE VL 5040
5044 13:53:39.453810 # ok 3314 # SKIP Streaming SVE set SVE get SVE for VL 5040
5045 13:53:39.454239 # ok 3315 # SKIP Streaming SVE set SVE get FPSIMD for VL 5040
5046 13:53:39.454477 # ok 3316 # SKIP Streaming SVE set FPSIMD get SVE for VL 5040
5047 13:53:39.454621 # ok 3317 Set Streaming SVE VL 5056
5048 13:53:39.454738 # ok 3318 # SKIP Streaming SVE set SVE get SVE for VL 5056
5049 13:53:39.467913 # ok 3319 # SKIP Streaming SVE set SVE get FPSIMD for VL 5056
5050 13:53:39.468460 # ok 3320 # SKIP Streaming SVE set FPSIMD get SVE for VL 5056
5051 13:53:39.468623 # ok 3321 Set Streaming SVE VL 5072
5052 13:53:39.469802 # ok 3322 # SKIP Streaming SVE set SVE get SVE for VL 5072
5053 13:53:39.469912 # ok 3323 # SKIP Streaming SVE set SVE get FPSIMD for VL 5072
5054 13:53:39.470087 # ok 3324 # SKIP Streaming SVE set FPSIMD get SVE for VL 5072
5055 13:53:39.470171 # ok 3325 Set Streaming SVE VL 5088
5056 13:53:39.470246 # ok 3326 # SKIP Streaming SVE set SVE get SVE for VL 5088
5057 13:53:39.483270 # ok 3327 # SKIP Streaming SVE set SVE get FPSIMD for VL 5088
5058 13:53:39.483599 # ok 3328 # SKIP Streaming SVE set FPSIMD get SVE for VL 5088
5059 13:53:39.483949 # ok 3329 Set Streaming SVE VL 5104
5060 13:53:39.484058 # ok 3330 # SKIP Streaming SVE set SVE get SVE for VL 5104
5061 13:53:39.484217 # ok 3331 # SKIP Streaming SVE set SVE get FPSIMD for VL 5104
5062 13:53:39.484308 # ok 3332 # SKIP Streaming SVE set FPSIMD get SVE for VL 5104
5063 13:53:39.484414 # ok 3333 Set Streaming SVE VL 5120
5064 13:53:39.484504 # ok 3334 # SKIP Streaming SVE set SVE get SVE for VL 5120
5065 13:53:39.484888 # ok 3335 # SKIP Streaming SVE set SVE get FPSIMD for VL 5120
5066 13:53:39.484991 # ok 3336 # SKIP Streaming SVE set FPSIMD get SVE for VL 5120
5067 13:53:39.485078 # ok 3337 Set Streaming SVE VL 5136
5068 13:53:39.485175 # ok 3338 # SKIP Streaming SVE set SVE get SVE for VL 5136
5069 13:53:39.485261 # ok 3339 # SKIP Streaming SVE set SVE get FPSIMD for VL 5136
5070 13:53:39.485359 # ok 3340 # SKIP Streaming SVE set FPSIMD get SVE for VL 5136
5071 13:53:39.485459 # ok 3341 Set Streaming SVE VL 5152
5072 13:53:39.485759 # ok 3342 # SKIP Streaming SVE set SVE get SVE for VL 5152
5073 13:53:39.485884 # ok 3343 # SKIP Streaming SVE set SVE get FPSIMD for VL 5152
5074 13:53:39.507789 # ok 3344 # SKIP Streaming SVE set FPSIMD get SVE for VL 5152
5075 13:53:39.508258 # ok 3345 Set Streaming SVE VL 5168
5076 13:53:39.508369 # ok 3346 # SKIP Streaming SVE set SVE get SVE for VL 5168
5077 13:53:39.508461 # ok 3347 # SKIP Streaming SVE set SVE get FPSIMD for VL 5168
5078 13:53:39.508549 # ok 3348 # SKIP Streaming SVE set FPSIMD get SVE for VL 5168
5079 13:53:39.508638 # ok 3349 Set Streaming SVE VL 5184
5080 13:53:39.509045 # ok 3350 # SKIP Streaming SVE set SVE get SVE for VL 5184
5081 13:53:39.509150 # ok 3351 # SKIP Streaming SVE set SVE get FPSIMD for VL 5184
5082 13:53:39.509240 # ok 3352 # SKIP Streaming SVE set FPSIMD get SVE for VL 5184
5083 13:53:39.509331 # ok 3353 Set Streaming SVE VL 5200
5084 13:53:39.509419 # ok 3354 # SKIP Streaming SVE set SVE get SVE for VL 5200
5085 13:53:39.509710 # ok 3355 # SKIP Streaming SVE set SVE get FPSIMD for VL 5200
5086 13:53:39.509819 # ok 3356 # SKIP Streaming SVE set FPSIMD get SVE for VL 5200
5087 13:53:39.509910 # ok 3357 Set Streaming SVE VL 5216
5088 13:53:39.509996 # ok 3358 # SKIP Streaming SVE set SVE get SVE for VL 5216
5089 13:53:39.510083 # ok 3359 # SKIP Streaming SVE set SVE get FPSIMD for VL 5216
5090 13:53:39.510374 # ok 3360 # SKIP Streaming SVE set FPSIMD get SVE for VL 5216
5091 13:53:39.516120 # ok 3361 Set Streaming SVE VL 5232
5092 13:53:39.516367 # ok 3362 # SKIP Streaming SVE set SVE get SVE for VL 5232
5093 13:53:39.516805 # ok 3363 # SKIP Streaming SVE set SVE get FPSIMD for VL 5232
5094 13:53:39.516940 # ok 3364 # SKIP Streaming SVE set FPSIMD get SVE for VL 5232
5095 13:53:39.517040 # ok 3365 Set Streaming SVE VL 5248
5096 13:53:39.517966 # ok 3366 # SKIP Streaming SVE set SVE get SVE for VL 5248
5097 13:53:39.518078 # ok 3367 # SKIP Streaming SVE set SVE get FPSIMD for VL 5248
5098 13:53:39.518169 # ok 3368 # SKIP Streaming SVE set FPSIMD get SVE for VL 5248
5099 13:53:39.518257 # ok 3369 Set Streaming SVE VL 5264
5100 13:53:39.518516 # ok 3370 # SKIP Streaming SVE set SVE get SVE for VL 5264
5101 13:53:39.518701 # ok 3371 # SKIP Streaming SVE set SVE get FPSIMD for VL 5264
5102 13:53:39.518798 # ok 3372 # SKIP Streaming SVE set FPSIMD get SVE for VL 5264
5103 13:53:39.518884 # ok 3373 Set Streaming SVE VL 5280
5104 13:53:39.518971 # ok 3374 # SKIP Streaming SVE set SVE get SVE for VL 5280
5105 13:53:39.519056 # ok 3375 # SKIP Streaming SVE set SVE get FPSIMD for VL 5280
5106 13:53:39.524310 # ok 3376 # SKIP Streaming SVE set FPSIMD get SVE for VL 5280
5107 13:53:39.524919 # ok 3377 Set Streaming SVE VL 5296
5108 13:53:39.525360 # ok 3378 # SKIP Streaming SVE set SVE get SVE for VL 5296
5109 13:53:39.525501 # ok 3379 # SKIP Streaming SVE set SVE get FPSIMD for VL 5296
5110 13:53:39.525620 # ok 3380 # SKIP Streaming SVE set FPSIMD get SVE for VL 5296
5111 13:53:39.525722 # ok 3381 Set Streaming SVE VL 5312
5112 13:53:39.525810 # ok 3382 # SKIP Streaming SVE set SVE get SVE for VL 5312
5113 13:53:39.525897 # ok 3383 # SKIP Streaming SVE set SVE get FPSIMD for VL 5312
5114 13:53:39.525987 # ok 3384 # SKIP Streaming SVE set FPSIMD get SVE for VL 5312
5115 13:53:39.526078 # ok 3385 Set Streaming SVE VL 5328
5116 13:53:39.526182 # ok 3386 # SKIP Streaming SVE set SVE get SVE for VL 5328
5117 13:53:39.527540 # ok 3387 # SKIP Streaming SVE set SVE get FPSIMD for VL 5328
5118 13:53:39.527855 # ok 3388 # SKIP Streaming SVE set FPSIMD get SVE for VL 5328
5119 13:53:39.527985 # ok 3389 Set Streaming SVE VL 5344
5120 13:53:39.528194 # ok 3390 # SKIP Streaming SVE set SVE get SVE for VL 5344
5121 13:53:39.528434 # ok 3391 # SKIP Streaming SVE set SVE get FPSIMD for VL 5344
5122 13:53:39.528645 # ok 3392 # SKIP Streaming SVE set FPSIMD get SVE for VL 5344
5123 13:53:39.528782 # ok 3393 Set Streaming SVE VL 5360
5124 13:53:39.529027 # ok 3394 # SKIP Streaming SVE set SVE get SVE for VL 5360
5125 13:53:39.529152 # ok 3395 # SKIP Streaming SVE set SVE get FPSIMD for VL 5360
5126 13:53:39.529260 # ok 3396 # SKIP Streaming SVE set FPSIMD get SVE for VL 5360
5127 13:53:39.529349 # ok 3397 Set Streaming SVE VL 5376
5128 13:53:39.529448 # ok 3398 # SKIP Streaming SVE set SVE get SVE for VL 5376
5129 13:53:39.529750 # ok 3399 # SKIP Streaming SVE set SVE get FPSIMD for VL 5376
5130 13:53:39.529869 # ok 3400 # SKIP Streaming SVE set FPSIMD get SVE for VL 5376
5131 13:53:39.536580 # ok 3401 Set Streaming SVE VL 5392
5132 13:53:39.537246 # ok 3402 # SKIP Streaming SVE set SVE get SVE for VL 5392
5133 13:53:39.537465 # ok 3403 # SKIP Streaming SVE set SVE get FPSIMD for VL 5392
5134 13:53:39.537942 # ok 3404 # SKIP Streaming SVE set FPSIMD get SVE for VL 5392
5135 13:53:39.538145 # ok 3405 Set Streaming SVE VL 5408
5136 13:53:39.538356 # ok 3406 # SKIP Streaming SVE set SVE get SVE for VL 5408
5137 13:53:39.538536 # ok 3407 # SKIP Streaming SVE set SVE get FPSIMD for VL 5408
5138 13:53:39.538706 # ok 3408 # SKIP Streaming SVE set FPSIMD get SVE for VL 5408
5139 13:53:39.538874 # ok 3409 Set Streaming SVE VL 5424
5140 13:53:39.541026 # ok 3410 # SKIP Streaming SVE set SVE get SVE for VL 5424
5141 13:53:39.541527 # ok 3411 # SKIP Streaming SVE set SVE get FPSIMD for VL 5424
5142 13:53:39.542000 # ok 3412 # SKIP Streaming SVE set FPSIMD get SVE for VL 5424
5143 13:53:39.542094 # ok 3413 Set Streaming SVE VL 5440
5144 13:53:39.542172 # ok 3414 # SKIP Streaming SVE set SVE get SVE for VL 5440
5145 13:53:39.542252 # ok 3415 # SKIP Streaming SVE set SVE get FPSIMD for VL 5440
5146 13:53:39.542327 # ok 3416 # SKIP Streaming SVE set FPSIMD get SVE for VL 5440
5147 13:53:39.553742 # ok 3417 Set Streaming SVE VL 5456
5148 13:53:39.553978 # ok 3418 # SKIP Streaming SVE set SVE get SVE for VL 5456
5149 13:53:39.554061 # ok 3419 # SKIP Streaming SVE set SVE get FPSIMD for VL 5456
5150 13:53:39.554136 # ok 3420 # SKIP Streaming SVE set FPSIMD get SVE for VL 5456
5151 13:53:39.554210 # ok 3421 Set Streaming SVE VL 5472
5152 13:53:39.554283 # ok 3422 # SKIP Streaming SVE set SVE get SVE for VL 5472
5153 13:53:39.554358 # ok 3423 # SKIP Streaming SVE set SVE get FPSIMD for VL 5472
5154 13:53:39.554432 # ok 3424 # SKIP Streaming SVE set FPSIMD get SVE for VL 5472
5155 13:53:39.554510 # ok 3425 Set Streaming SVE VL 5488
5156 13:53:39.554584 # ok 3426 # SKIP Streaming SVE set SVE get SVE for VL 5488
5157 13:53:39.554657 # ok 3427 # SKIP Streaming SVE set SVE get FPSIMD for VL 5488
5158 13:53:39.554727 # ok 3428 # SKIP Streaming SVE set FPSIMD get SVE for VL 5488
5159 13:53:39.554802 # ok 3429 Set Streaming SVE VL 5504
5160 13:53:39.554882 # ok 3430 # SKIP Streaming SVE set SVE get SVE for VL 5504
5161 13:53:39.557780 # ok 3431 # SKIP Streaming SVE set SVE get FPSIMD for VL 5504
5162 13:53:39.560505 # ok 3432 # SKIP Streaming SVE set FPSIMD get SVE for VL 5504
5163 13:53:39.560754 # ok 3433 Set Streaming SVE VL 5520
5164 13:53:39.561190 # ok 3434 # SKIP Streaming SVE set SVE get SVE for VL 5520
5165 13:53:39.561384 # ok 3435 # SKIP Streaming SVE set SVE get FPSIMD for VL 5520
5166 13:53:39.561568 # ok 3436 # SKIP Streaming SVE set FPSIMD get SVE for VL 5520
5167 13:53:39.561791 # ok 3437 Set Streaming SVE VL 5536
5168 13:53:39.562046 # ok 3438 # SKIP Streaming SVE set SVE get SVE for VL 5536
5169 13:53:39.562228 # ok 3439 # SKIP Streaming SVE set SVE get FPSIMD for VL 5536
5170 13:53:39.562397 # ok 3440 # SKIP Streaming SVE set FPSIMD get SVE for VL 5536
5171 13:53:39.562577 # ok 3441 Set Streaming SVE VL 5552
5172 13:53:39.563018 # ok 3442 # SKIP Streaming SVE set SVE get SVE for VL 5552
5173 13:53:39.563238 # ok 3443 # SKIP Streaming SVE set SVE get FPSIMD for VL 5552
5174 13:53:39.563485 # ok 3444 # SKIP Streaming SVE set FPSIMD get SVE for VL 5552
5175 13:53:39.563697 # ok 3445 Set Streaming SVE VL 5568
5176 13:53:39.563915 # ok 3446 # SKIP Streaming SVE set SVE get SVE for VL 5568
5177 13:53:39.564435 # ok 3447 # SKIP Streaming SVE set SVE get FPSIMD for VL 5568
5178 13:53:39.564672 # ok 3448 # SKIP Streaming SVE set FPSIMD get SVE for VL 5568
5179 13:53:39.564853 # ok 3449 Set Streaming SVE VL 5584
5180 13:53:39.565010 # ok 3450 # SKIP Streaming SVE set SVE get SVE for VL 5584
5181 13:53:39.565230 # ok 3451 # SKIP Streaming SVE set SVE get FPSIMD for VL 5584
5182 13:53:39.565430 # ok 3452 # SKIP Streaming SVE set FPSIMD get SVE for VL 5584
5183 13:53:39.565680 # ok 3453 Set Streaming SVE VL 5600
5184 13:53:39.565878 # ok 3454 # SKIP Streaming SVE set SVE get SVE for VL 5600
5185 13:53:39.566085 # ok 3455 # SKIP Streaming SVE set SVE get FPSIMD for VL 5600
5186 13:53:39.566321 # ok 3456 # SKIP Streaming SVE set FPSIMD get SVE for VL 5600
5187 13:53:39.566520 # ok 3457 Set Streaming SVE VL 5616
5188 13:53:39.566737 # ok 3458 # SKIP Streaming SVE set SVE get SVE for VL 5616
5189 13:53:39.566935 # ok 3459 # SKIP Streaming SVE set SVE get FPSIMD for VL 5616
5190 13:53:39.567094 # ok 3460 # SKIP Streaming SVE set FPSIMD get SVE for VL 5616
5191 13:53:39.567284 # ok 3461 Set Streaming SVE VL 5632
5192 13:53:39.567462 # ok 3462 # SKIP Streaming SVE set SVE get SVE for VL 5632
5193 13:53:39.567631 # ok 3463 # SKIP Streaming SVE set SVE get FPSIMD for VL 5632
5194 13:53:39.571174 # ok 3464 # SKIP Streaming SVE set FPSIMD get SVE for VL 5632
5195 13:53:39.571656 # ok 3465 Set Streaming SVE VL 5648
5196 13:53:39.571788 # ok 3466 # SKIP Streaming SVE set SVE get SVE for VL 5648
5197 13:53:39.571885 # ok 3467 # SKIP Streaming SVE set SVE get FPSIMD for VL 5648
5198 13:53:39.571993 # ok 3468 # SKIP Streaming SVE set FPSIMD get SVE for VL 5648
5199 13:53:39.572084 # ok 3469 Set Streaming SVE VL 5664
5200 13:53:39.572176 # ok 3470 # SKIP Streaming SVE set SVE get SVE for VL 5664
5201 13:53:39.572281 # ok 3471 # SKIP Streaming SVE set SVE get FPSIMD for VL 5664
5202 13:53:39.572453 # ok 3472 # SKIP Streaming SVE set FPSIMD get SVE for VL 5664
5203 13:53:39.572558 # ok 3473 Set Streaming SVE VL 5680
5204 13:53:39.572667 # ok 3474 # SKIP Streaming SVE set SVE get SVE for VL 5680
5205 13:53:39.572760 # ok 3475 # SKIP Streaming SVE set SVE get FPSIMD for VL 5680
5206 13:53:39.573739 # ok 3476 # SKIP Streaming SVE set FPSIMD get SVE for VL 5680
5207 13:53:39.573854 # ok 3477 Set Streaming SVE VL 5696
5208 13:53:39.574143 # ok 3478 # SKIP Streaming SVE set SVE get SVE for VL 5696
5209 13:53:39.583103 # ok 3479 # SKIP Streaming SVE set SVE get FPSIMD for VL 5696
5210 13:53:39.583622 # ok 3480 # SKIP Streaming SVE set FPSIMD get SVE for VL 5696
5211 13:53:39.583775 # ok 3481 Set Streaming SVE VL 5712
5212 13:53:39.583886 # ok 3482 # SKIP Streaming SVE set SVE get SVE for VL 5712
5213 13:53:39.584017 # ok 3483 # SKIP Streaming SVE set SVE get FPSIMD for VL 5712
5214 13:53:39.584174 # ok 3484 # SKIP Streaming SVE set FPSIMD get SVE for VL 5712
5215 13:53:39.584310 # ok 3485 Set Streaming SVE VL 5728
5216 13:53:39.584441 # ok 3486 # SKIP Streaming SVE set SVE get SVE for VL 5728
5217 13:53:39.584552 # ok 3487 # SKIP Streaming SVE set SVE get FPSIMD for VL 5728
5218 13:53:39.584678 # ok 3488 # SKIP Streaming SVE set FPSIMD get SVE for VL 5728
5219 13:53:39.584842 # ok 3489 Set Streaming SVE VL 5744
5220 13:53:39.584948 # ok 3490 # SKIP Streaming SVE set SVE get SVE for VL 5744
5221 13:53:39.585163 # ok 3491 # SKIP Streaming SVE set SVE get FPSIMD for VL 5744
5222 13:53:39.585314 # ok 3492 # SKIP Streaming SVE set FPSIMD get SVE for VL 5744
5223 13:53:39.585445 # ok 3493 Set Streaming SVE VL 5760
5224 13:53:39.585585 # ok 3494 # SKIP Streaming SVE set SVE get SVE for VL 5760
5225 13:53:39.585702 # ok 3495 # SKIP Streaming SVE set SVE get FPSIMD for VL 5760
5226 13:53:39.585847 # ok 3496 # SKIP Streaming SVE set FPSIMD get SVE for VL 5760
5227 13:53:39.585990 # ok 3497 Set Streaming SVE VL 5776
5228 13:53:39.586136 # ok 3498 # SKIP Streaming SVE set SVE get SVE for VL 5776
5229 13:53:39.586309 # ok 3499 # SKIP Streaming SVE set SVE get FPSIMD for VL 5776
5230 13:53:39.586449 # ok 3500 # SKIP Streaming SVE set FPSIMD get SVE for VL 5776
5231 13:53:39.591980 # ok 3501 Set Streaming SVE VL 5792
5232 13:53:39.592440 # ok 3502 # SKIP Streaming SVE set SVE get SVE for VL 5792
5233 13:53:39.592540 # ok 3503 # SKIP Streaming SVE set SVE get FPSIMD for VL 5792
5234 13:53:39.592638 # ok 3504 # SKIP Streaming SVE set FPSIMD get SVE for VL 5792
5235 13:53:39.592756 # ok 3505 Set Streaming SVE VL 5808
5236 13:53:39.592889 # ok 3506 # SKIP Streaming SVE set SVE get SVE for VL 5808
5237 13:53:39.593220 # ok 3507 # SKIP Streaming SVE set SVE get FPSIMD for VL 5808
5238 13:53:39.593450 # ok 3508 # SKIP Streaming SVE set FPSIMD get SVE for VL 5808
5239 13:53:39.593545 # ok 3509 Set Streaming SVE VL 5824
5240 13:53:39.593665 # ok 3510 # SKIP Streaming SVE set SVE get SVE for VL 5824
5241 13:53:39.593798 # ok 3511 # SKIP Streaming SVE set SVE get FPSIMD for VL 5824
5242 13:53:39.593879 # ok 3512 # SKIP Streaming SVE set FPSIMD get SVE for VL 5824
5243 13:53:39.593945 # ok 3513 Set Streaming SVE VL 5840
5244 13:53:39.594030 # ok 3514 # SKIP Streaming SVE set SVE get SVE for VL 5840
5245 13:53:39.599708 # ok 3515 # SKIP Streaming SVE set SVE get FPSIMD for VL 5840
5246 13:53:39.600248 # ok 3516 # SKIP Streaming SVE set FPSIMD get SVE for VL 5840
5247 13:53:39.600376 # ok 3517 Set Streaming SVE VL 5856
5248 13:53:39.600487 # ok 3518 # SKIP Streaming SVE set SVE get SVE for VL 5856
5249 13:53:39.600610 # ok 3519 # SKIP Streaming SVE set SVE get FPSIMD for VL 5856
5250 13:53:39.600705 # ok 3520 # SKIP Streaming SVE set FPSIMD get SVE for VL 5856
5251 13:53:39.600823 # ok 3521 Set Streaming SVE VL 5872
5252 13:53:39.600926 # ok 3522 # SKIP Streaming SVE set SVE get SVE for VL 5872
5253 13:53:39.601324 # ok 3523 # SKIP Streaming SVE set SVE get FPSIMD for VL 5872
5254 13:53:39.601449 # ok 3524 # SKIP Streaming SVE set FPSIMD get SVE for VL 5872
5255 13:53:39.601586 # ok 3525 Set Streaming SVE VL 5888
5256 13:53:39.601816 # ok 3526 # SKIP Streaming SVE set SVE get SVE for VL 5888
5257 13:53:39.601913 # ok 3527 # SKIP Streaming SVE set SVE get FPSIMD for VL 5888
5258 13:53:39.602021 # ok 3528 # SKIP Streaming SVE set FPSIMD get SVE for VL 5888
5259 13:53:39.602809 # ok 3529 Set Streaming SVE VL 5904
5260 13:53:39.602914 # ok 3530 # SKIP Streaming SVE set SVE get SVE for VL 5904
5261 13:53:39.603030 # ok 3531 # SKIP Streaming SVE set SVE get FPSIMD for VL 5904
5262 13:53:39.603164 # ok 3532 # SKIP Streaming SVE set FPSIMD get SVE for VL 5904
5263 13:53:39.603510 # ok 3533 Set Streaming SVE VL 5920
5264 13:53:39.603629 # ok 3534 # SKIP Streaming SVE set SVE get SVE for VL 5920
5265 13:53:39.603746 # ok 3535 # SKIP Streaming SVE set SVE get FPSIMD for VL 5920
5266 13:53:39.603904 # ok 3536 # SKIP Streaming SVE set FPSIMD get SVE for VL 5920
5267 13:53:39.604052 # ok 3537 Set Streaming SVE VL 5936
5268 13:53:39.604214 # ok 3538 # SKIP Streaming SVE set SVE get SVE for VL 5936
5269 13:53:39.604368 # ok 3539 # SKIP Streaming SVE set SVE get FPSIMD for VL 5936
5270 13:53:39.604576 # ok 3540 # SKIP Streaming SVE set FPSIMD get SVE for VL 5936
5271 13:53:39.604720 # ok 3541 Set Streaming SVE VL 5952
5272 13:53:39.604922 # ok 3542 # SKIP Streaming SVE set SVE get SVE for VL 5952
5273 13:53:39.605076 # ok 3543 # SKIP Streaming SVE set SVE get FPSIMD for VL 5952
5274 13:53:39.605275 # ok 3544 # SKIP Streaming SVE set FPSIMD get SVE for VL 5952
5275 13:53:39.605446 # ok 3545 Set Streaming SVE VL 5968
5276 13:53:39.605607 # ok 3546 # SKIP Streaming SVE set SVE get SVE for VL 5968
5277 13:53:39.605802 # ok 3547 # SKIP Streaming SVE set SVE get FPSIMD for VL 5968
5278 13:53:39.605948 # ok 3548 # SKIP Streaming SVE set FPSIMD get SVE for VL 5968
5279 13:53:39.606093 # ok 3549 Set Streaming SVE VL 5984
5280 13:53:39.615622 # ok 3550 # SKIP Streaming SVE set SVE get SVE for VL 5984
5281 13:53:39.616459 # ok 3551 # SKIP Streaming SVE set SVE get FPSIMD for VL 5984
5282 13:53:39.616662 # ok 3552 # SKIP Streaming SVE set FPSIMD get SVE for VL 5984
5283 13:53:39.616825 # ok 3553 Set Streaming SVE VL 6000
5284 13:53:39.617003 # ok 3554 # SKIP Streaming SVE set SVE get SVE for VL 6000
5285 13:53:39.617207 # ok 3555 # SKIP Streaming SVE set SVE get FPSIMD for VL 6000
5286 13:53:39.617414 # ok 3556 # SKIP Streaming SVE set FPSIMD get SVE for VL 6000
5287 13:53:39.617596 # ok 3557 Set Streaming SVE VL 6016
5288 13:53:39.617818 # ok 3558 # SKIP Streaming SVE set SVE get SVE for VL 6016
5289 13:53:39.617970 # ok 3559 # SKIP Streaming SVE set SVE get FPSIMD for VL 6016
5290 13:53:39.618141 # ok 3560 # SKIP Streaming SVE set FPSIMD get SVE for VL 6016
5291 13:53:39.618338 # ok 3561 Set Streaming SVE VL 6032
5292 13:53:39.618517 # ok 3562 # SKIP Streaming SVE set SVE get SVE for VL 6032
5293 13:53:39.618697 # ok 3563 # SKIP Streaming SVE set SVE get FPSIMD for VL 6032
5294 13:53:39.618923 # ok 3564 # SKIP Streaming SVE set FPSIMD get SVE for VL 6032
5295 13:53:39.619142 # ok 3565 Set Streaming SVE VL 6048
5296 13:53:39.619363 # ok 3566 # SKIP Streaming SVE set SVE get SVE for VL 6048
5297 13:53:39.619583 # ok 3567 # SKIP Streaming SVE set SVE get FPSIMD for VL 6048
5298 13:53:39.619834 # ok 3568 # SKIP Streaming SVE set FPSIMD get SVE for VL 6048
5299 13:53:39.620059 # ok 3569 Set Streaming SVE VL 6064
5300 13:53:39.620255 # ok 3570 # SKIP Streaming SVE set SVE get SVE for VL 6064
5301 13:53:39.620509 # ok 3571 # SKIP Streaming SVE set SVE get FPSIMD for VL 6064
5302 13:53:39.620717 # ok 3572 # SKIP Streaming SVE set FPSIMD get SVE for VL 6064
5303 13:53:39.621024 # ok 3573 Set Streaming SVE VL 6080
5304 13:53:39.621264 # ok 3574 # SKIP Streaming SVE set SVE get SVE for VL 6080
5305 13:53:39.621487 # ok 3575 # SKIP Streaming SVE set SVE get FPSIMD for VL 6080
5306 13:53:39.622925 # ok 3576 # SKIP Streaming SVE set FPSIMD get SVE for VL 6080
5307 13:53:39.623175 # ok 3577 Set Streaming SVE VL 6096
5308 13:53:39.623371 # ok 3578 # SKIP Streaming SVE set SVE get SVE for VL 6096
5309 13:53:39.623574 # ok 3579 # SKIP Streaming SVE set SVE get FPSIMD for VL 6096
5310 13:53:39.623792 # ok 3580 # SKIP Streaming SVE set FPSIMD get SVE for VL 6096
5311 13:53:39.623990 # ok 3581 Set Streaming SVE VL 6112
5312 13:53:39.624201 # ok 3582 # SKIP Streaming SVE set SVE get SVE for VL 6112
5313 13:53:39.631444 # ok 3583 # SKIP Streaming SVE set SVE get FPSIMD for VL 6112
5314 13:53:39.631883 # ok 3584 # SKIP Streaming SVE set FPSIMD get SVE for VL 6112
5315 13:53:39.632007 # ok 3585 Set Streaming SVE VL 6128
5316 13:53:39.632106 # ok 3586 # SKIP Streaming SVE set SVE get SVE for VL 6128
5317 13:53:39.632225 # ok 3587 # SKIP Streaming SVE set SVE get FPSIMD for VL 6128
5318 13:53:39.632338 # ok 3588 # SKIP Streaming SVE set FPSIMD get SVE for VL 6128
5319 13:53:39.632447 # ok 3589 Set Streaming SVE VL 6144
5320 13:53:39.632771 # ok 3590 # SKIP Streaming SVE set SVE get SVE for VL 6144
5321 13:53:39.632870 # ok 3591 # SKIP Streaming SVE set SVE get FPSIMD for VL 6144
5322 13:53:39.632984 # ok 3592 # SKIP Streaming SVE set FPSIMD get SVE for VL 6144
5323 13:53:39.633077 # ok 3593 Set Streaming SVE VL 6160
5324 13:53:39.633184 # ok 3594 # SKIP Streaming SVE set SVE get SVE for VL 6160
5325 13:53:39.633542 # ok 3595 # SKIP Streaming SVE set SVE get FPSIMD for VL 6160
5326 13:53:39.633731 # ok 3596 # SKIP Streaming SVE set FPSIMD get SVE for VL 6160
5327 13:53:39.633836 # ok 3597 Set Streaming SVE VL 6176
5328 13:53:39.637869 # ok 3598 # SKIP Streaming SVE set SVE get SVE for VL 6176
5329 13:53:39.639853 # ok 3599 # SKIP Streaming SVE set SVE get FPSIMD for VL 6176
5330 13:53:39.640053 # ok 3600 # SKIP Streaming SVE set FPSIMD get SVE for VL 6176
5331 13:53:39.640160 # ok 3601 Set Streaming SVE VL 6192
5332 13:53:39.640301 # ok 3602 # SKIP Streaming SVE set SVE get SVE for VL 6192
5333 13:53:39.640414 # ok 3603 # SKIP Streaming SVE set SVE get FPSIMD for VL 6192
5334 13:53:39.640546 # ok 3604 # SKIP Streaming SVE set FPSIMD get SVE for VL 6192
5335 13:53:39.640640 # ok 3605 Set Streaming SVE VL 6208
5336 13:53:39.640742 # ok 3606 # SKIP Streaming SVE set SVE get SVE for VL 6208
5337 13:53:39.640842 # ok 3607 # SKIP Streaming SVE set SVE get FPSIMD for VL 6208
5338 13:53:39.641585 # ok 3608 # SKIP Streaming SVE set FPSIMD get SVE for VL 6208
5339 13:53:39.641700 # ok 3609 Set Streaming SVE VL 6224
5340 13:53:39.641788 # ok 3610 # SKIP Streaming SVE set SVE get SVE for VL 6224
5341 13:53:39.641877 # ok 3611 # SKIP Streaming SVE set SVE get FPSIMD for VL 6224
5342 13:53:39.642147 # ok 3612 # SKIP Streaming SVE set FPSIMD get SVE for VL 6224
5343 13:53:39.642236 # ok 3613 Set Streaming SVE VL 6240
5344 13:53:39.642338 # ok 3614 # SKIP Streaming SVE set SVE get SVE for VL 6240
5345 13:53:39.643000 # ok 3615 # SKIP Streaming SVE set SVE get FPSIMD for VL 6240
5346 13:53:39.643102 # ok 3616 # SKIP Streaming SVE set FPSIMD get SVE for VL 6240
5347 13:53:39.643634 # ok 3617 Set Streaming SVE VL 6256
5348 13:53:39.643780 # ok 3618 # SKIP Streaming SVE set SVE get SVE for VL 6256
5349 13:53:39.643878 # ok 3619 # SKIP Streaming SVE set SVE get FPSIMD for VL 6256
5350 13:53:39.643959 # ok 3620 # SKIP Streaming SVE set FPSIMD get SVE for VL 6256
5351 13:53:39.644066 # ok 3621 Set Streaming SVE VL 6272
5352 13:53:39.644164 # ok 3622 # SKIP Streaming SVE set SVE get SVE for VL 6272
5353 13:53:39.644266 # ok 3623 # SKIP Streaming SVE set SVE get FPSIMD for VL 6272
5354 13:53:39.644400 # ok 3624 # SKIP Streaming SVE set FPSIMD get SVE for VL 6272
5355 13:53:39.644498 # ok 3625 Set Streaming SVE VL 6288
5356 13:53:39.652784 # ok 3626 # SKIP Streaming SVE set SVE get SVE for VL 6288
5357 13:53:39.653018 # ok 3627 # SKIP Streaming SVE set SVE get FPSIMD for VL 6288
5358 13:53:39.653113 # ok 3628 # SKIP Streaming SVE set FPSIMD get SVE for VL 6288
5359 13:53:39.655747 # ok 3629 Set Streaming SVE VL 6304
5360 13:53:39.655890 # ok 3630 # SKIP Streaming SVE set SVE get SVE for VL 6304
5361 13:53:39.656005 # ok 3631 # SKIP Streaming SVE set SVE get FPSIMD for VL 6304
5362 13:53:39.656116 # ok 3632 # SKIP Streaming SVE set FPSIMD get SVE for VL 6304
5363 13:53:39.656226 # ok 3633 Set Streaming SVE VL 6320
5364 13:53:39.656332 # ok 3634 # SKIP Streaming SVE set SVE get SVE for VL 6320
5365 13:53:39.656445 # ok 3635 # SKIP Streaming SVE set SVE get FPSIMD for VL 6320
5366 13:53:39.656563 # ok 3636 # SKIP Streaming SVE set FPSIMD get SVE for VL 6320
5367 13:53:39.656672 # ok 3637 Set Streaming SVE VL 6336
5368 13:53:39.656790 # ok 3638 # SKIP Streaming SVE set SVE get SVE for VL 6336
5369 13:53:39.656895 # ok 3639 # SKIP Streaming SVE set SVE get FPSIMD for VL 6336
5370 13:53:39.657002 # ok 3640 # SKIP Streaming SVE set FPSIMD get SVE for VL 6336
5371 13:53:39.657407 # ok 3641 Set Streaming SVE VL 6352
5372 13:53:39.657510 # ok 3642 # SKIP Streaming SVE set SVE get SVE for VL 6352
5373 13:53:39.657599 # ok 3643 # SKIP Streaming SVE set SVE get FPSIMD for VL 6352
5374 13:53:39.657703 # ok 3644 # SKIP Streaming SVE set FPSIMD get SVE for VL 6352
5375 13:53:39.657793 # ok 3645 Set Streaming SVE VL 6368
5376 13:53:39.657864 # ok 3646 # SKIP Streaming SVE set SVE get SVE for VL 6368
5377 13:53:39.657928 # ok 3647 # SKIP Streaming SVE set SVE get FPSIMD for VL 6368
5378 13:53:39.658011 # ok 3648 # SKIP Streaming SVE set FPSIMD get SVE for VL 6368
5379 13:53:39.658078 # ok 3649 Set Streaming SVE VL 6384
5380 13:53:39.658139 # ok 3650 # SKIP Streaming SVE set SVE get SVE for VL 6384
5381 13:53:39.658216 # ok 3651 # SKIP Streaming SVE set SVE get FPSIMD for VL 6384
5382 13:53:39.658281 # ok 3652 # SKIP Streaming SVE set FPSIMD get SVE for VL 6384
5383 13:53:39.658341 # ok 3653 Set Streaming SVE VL 6400
5384 13:53:39.663648 # ok 3654 # SKIP Streaming SVE set SVE get SVE for VL 6400
5385 13:53:39.663950 # ok 3655 # SKIP Streaming SVE set SVE get FPSIMD for VL 6400
5386 13:53:39.664087 # ok 3656 # SKIP Streaming SVE set FPSIMD get SVE for VL 6400
5387 13:53:39.664195 # ok 3657 Set Streaming SVE VL 6416
5388 13:53:39.664291 # ok 3658 # SKIP Streaming SVE set SVE get SVE for VL 6416
5389 13:53:39.664405 # ok 3659 # SKIP Streaming SVE set SVE get FPSIMD for VL 6416
5390 13:53:39.664500 # ok 3660 # SKIP Streaming SVE set FPSIMD get SVE for VL 6416
5391 13:53:39.664606 # ok 3661 Set Streaming SVE VL 6432
5392 13:53:39.664695 # ok 3662 # SKIP Streaming SVE set SVE get SVE for VL 6432
5393 13:53:39.665109 # ok 3663 # SKIP Streaming SVE set SVE get FPSIMD for VL 6432
5394 13:53:39.665206 # ok 3664 # SKIP Streaming SVE set FPSIMD get SVE for VL 6432
5395 13:53:39.665638 # ok 3665 Set Streaming SVE VL 6448
5396 13:53:39.665759 # ok 3666 # SKIP Streaming SVE set SVE get SVE for VL 6448
5397 13:53:39.665847 # ok 3667 # SKIP Streaming SVE set SVE get FPSIMD for VL 6448
5398 13:53:39.665932 # ok 3668 # SKIP Streaming SVE set FPSIMD get SVE for VL 6448
5399 13:53:39.666031 # ok 3669 Set Streaming SVE VL 6464
5400 13:53:39.670988 # ok 3670 # SKIP Streaming SVE set SVE get SVE for VL 6464
5401 13:53:39.671439 # ok 3671 # SKIP Streaming SVE set SVE get FPSIMD for VL 6464
5402 13:53:39.671555 # ok 3672 # SKIP Streaming SVE set FPSIMD get SVE for VL 6464
5403 13:53:39.671652 # ok 3673 Set Streaming SVE VL 6480
5404 13:53:39.671760 # ok 3674 # SKIP Streaming SVE set SVE get SVE for VL 6480
5405 13:53:39.671864 # ok 3675 # SKIP Streaming SVE set SVE get FPSIMD for VL 6480
5406 13:53:39.672237 # ok 3676 # SKIP Streaming SVE set FPSIMD get SVE for VL 6480
5407 13:53:39.672339 # ok 3677 Set Streaming SVE VL 6496
5408 13:53:39.672664 # ok 3678 # SKIP Streaming SVE set SVE get SVE for VL 6496
5409 13:53:39.672778 # ok 3679 # SKIP Streaming SVE set SVE get FPSIMD for VL 6496
5410 13:53:39.673249 # ok 3680 # SKIP Streaming SVE set FPSIMD get SVE for VL 6496
5411 13:53:39.673364 # ok 3681 Set Streaming SVE VL 6512
5412 13:53:39.673458 # ok 3682 # SKIP Streaming SVE set SVE get SVE for VL 6512
5413 13:53:39.673551 # ok 3683 # SKIP Streaming SVE set SVE get FPSIMD for VL 6512
5414 13:53:39.673654 # ok 3684 # SKIP Streaming SVE set FPSIMD get SVE for VL 6512
5415 13:53:39.673764 # ok 3685 Set Streaming SVE VL 6528
5416 13:53:39.673859 # ok 3686 # SKIP Streaming SVE set SVE get SVE for VL 6528
5417 13:53:39.673967 # ok 3687 # SKIP Streaming SVE set SVE get FPSIMD for VL 6528
5418 13:53:39.683378 # ok 3688 # SKIP Streaming SVE set FPSIMD get SVE for VL 6528
5419 13:53:39.683758 # ok 3689 Set Streaming SVE VL 6544
5420 13:53:39.684099 # ok 3690 # SKIP Streaming SVE set SVE get SVE for VL 6544
5421 13:53:39.684214 # ok 3691 # SKIP Streaming SVE set SVE get FPSIMD for VL 6544
5422 13:53:39.684310 # ok 3692 # SKIP Streaming SVE set FPSIMD get SVE for VL 6544
5423 13:53:39.684404 # ok 3693 Set Streaming SVE VL 6560
5424 13:53:39.684498 # ok 3694 # SKIP Streaming SVE set SVE get SVE for VL 6560
5425 13:53:39.684609 # ok 3695 # SKIP Streaming SVE set SVE get FPSIMD for VL 6560
5426 13:53:39.684705 # ok 3696 # SKIP Streaming SVE set FPSIMD get SVE for VL 6560
5427 13:53:39.684797 # ok 3697 Set Streaming SVE VL 6576
5428 13:53:39.684893 # ok 3698 # SKIP Streaming SVE set SVE get SVE for VL 6576
5429 13:53:39.685003 # ok 3699 # SKIP Streaming SVE set SVE get FPSIMD for VL 6576
5430 13:53:39.685113 # ok 3700 # SKIP Streaming SVE set FPSIMD get SVE for VL 6576
5431 13:53:39.685223 # ok 3701 Set Streaming SVE VL 6592
5432 13:53:39.685333 # ok 3702 # SKIP Streaming SVE set SVE get SVE for VL 6592
5433 13:53:39.685755 # ok 3703 # SKIP Streaming SVE set SVE get FPSIMD for VL 6592
5434 13:53:39.694474 # ok 3704 # SKIP Streaming SVE set FPSIMD get SVE for VL 6592
5435 13:53:39.694739 # ok 3705 Set Streaming SVE VL 6608
5436 13:53:39.695050 # ok 3706 # SKIP Streaming SVE set SVE get SVE for VL 6608
5437 13:53:39.695156 # ok 3707 # SKIP Streaming SVE set SVE get FPSIMD for VL 6608
5438 13:53:39.695242 # ok 3708 # SKIP Streaming SVE set FPSIMD get SVE for VL 6608
5439 13:53:39.695322 # ok 3709 Set Streaming SVE VL 6624
5440 13:53:39.695417 # ok 3710 # SKIP Streaming SVE set SVE get SVE for VL 6624
5441 13:53:39.695497 # ok 3711 # SKIP Streaming SVE set SVE get FPSIMD for VL 6624
5442 13:53:39.695590 # ok 3712 # SKIP Streaming SVE set FPSIMD get SVE for VL 6624
5443 13:53:39.695683 # ok 3713 Set Streaming SVE VL 6640
5444 13:53:39.695776 # ok 3714 # SKIP Streaming SVE set SVE get SVE for VL 6640
5445 13:53:39.695870 # ok 3715 # SKIP Streaming SVE set SVE get FPSIMD for VL 6640
5446 13:53:39.696166 # ok 3716 # SKIP Streaming SVE set FPSIMD get SVE for VL 6640
5447 13:53:39.696601 # ok 3717 Set Streaming SVE VL 6656
5448 13:53:39.696724 # ok 3718 # SKIP Streaming SVE set SVE get SVE for VL 6656
5449 13:53:39.696814 # ok 3719 # SKIP Streaming SVE set SVE get FPSIMD for VL 6656
5450 13:53:39.696895 # ok 3720 # SKIP Streaming SVE set FPSIMD get SVE for VL 6656
5451 13:53:39.697970 # ok 3721 Set Streaming SVE VL 6672
5452 13:53:39.698066 # ok 3722 # SKIP Streaming SVE set SVE get SVE for VL 6672
5453 13:53:39.698142 # ok 3723 # SKIP Streaming SVE set SVE get FPSIMD for VL 6672
5454 13:53:39.698216 # ok 3724 # SKIP Streaming SVE set FPSIMD get SVE for VL 6672
5455 13:53:39.698287 # ok 3725 Set Streaming SVE VL 6688
5456 13:53:39.699127 # ok 3726 # SKIP Streaming SVE set SVE get SVE for VL 6688
5457 13:53:39.699217 # ok 3727 # SKIP Streaming SVE set SVE get FPSIMD for VL 6688
5458 13:53:39.707309 # ok 3728 # SKIP Streaming SVE set FPSIMD get SVE for VL 6688
5459 13:53:39.707837 # ok 3729 Set Streaming SVE VL 6704
5460 13:53:39.710240 # ok 3730 # SKIP Streaming SVE set SVE get SVE for VL 6704
5461 13:53:39.710403 # ok 3731 # SKIP Streaming SVE set SVE get FPSIMD for VL 6704
5462 13:53:39.710510 # ok 3732 # SKIP Streaming SVE set FPSIMD get SVE for VL 6704
5463 13:53:39.710810 # ok 3733 Set Streaming SVE VL 6720
5464 13:53:39.710900 # ok 3734 # SKIP Streaming SVE set SVE get SVE for VL 6720
5465 13:53:39.710996 # ok 3735 # SKIP Streaming SVE set SVE get FPSIMD for VL 6720
5466 13:53:39.711096 # ok 3736 # SKIP Streaming SVE set FPSIMD get SVE for VL 6720
5467 13:53:39.711202 # ok 3737 Set Streaming SVE VL 6736
5468 13:53:39.711288 # ok 3738 # SKIP Streaming SVE set SVE get SVE for VL 6736
5469 13:53:39.711363 # ok 3739 # SKIP Streaming SVE set SVE get FPSIMD for VL 6736
5470 13:53:39.711441 # ok 3740 # SKIP Streaming SVE set FPSIMD get SVE for VL 6736
5471 13:53:39.711519 # ok 3741 Set Streaming SVE VL 6752
5472 13:53:39.711622 # ok 3742 # SKIP Streaming SVE set SVE get SVE for VL 6752
5473 13:53:39.711731 # ok 3743 # SKIP Streaming SVE set SVE get FPSIMD for VL 6752
5474 13:53:39.711829 # ok 3744 # SKIP Streaming SVE set FPSIMD get SVE for VL 6752
5475 13:53:39.711917 # ok 3745 Set Streaming SVE VL 6768
5476 13:53:39.719882 # ok 3746 # SKIP Streaming SVE set SVE get SVE for VL 6768
5477 13:53:39.720400 # ok 3747 # SKIP Streaming SVE set SVE get FPSIMD for VL 6768
5478 13:53:39.720567 # ok 3748 # SKIP Streaming SVE set FPSIMD get SVE for VL 6768
5479 13:53:39.720668 # ok 3749 Set Streaming SVE VL 6784
5480 13:53:39.720777 # ok 3750 # SKIP Streaming SVE set SVE get SVE for VL 6784
5481 13:53:39.720869 # ok 3751 # SKIP Streaming SVE set SVE get FPSIMD for VL 6784
5482 13:53:39.720956 # ok 3752 # SKIP Streaming SVE set FPSIMD get SVE for VL 6784
5483 13:53:39.721060 # ok 3753 Set Streaming SVE VL 6800
5484 13:53:39.721150 # ok 3754 # SKIP Streaming SVE set SVE get SVE for VL 6800
5485 13:53:39.721254 # ok 3755 # SKIP Streaming SVE set SVE get FPSIMD for VL 6800
5486 13:53:39.721572 # ok 3756 # SKIP Streaming SVE set FPSIMD get SVE for VL 6800
5487 13:53:39.721693 # ok 3757 Set Streaming SVE VL 6816
5488 13:53:39.721804 # ok 3758 # SKIP Streaming SVE set SVE get SVE for VL 6816
5489 13:53:39.731113 # ok 3759 # SKIP Streaming SVE set SVE get FPSIMD for VL 6816
5490 13:53:39.731629 # ok 3760 # SKIP Streaming SVE set FPSIMD get SVE for VL 6816
5491 13:53:39.731736 # ok 3761 Set Streaming SVE VL 6832
5492 13:53:39.731826 # ok 3762 # SKIP Streaming SVE set SVE get SVE for VL 6832
5493 13:53:39.731911 # ok 3763 # SKIP Streaming SVE set SVE get FPSIMD for VL 6832
5494 13:53:39.731995 # ok 3764 # SKIP Streaming SVE set FPSIMD get SVE for VL 6832
5495 13:53:39.732100 # ok 3765 Set Streaming SVE VL 6848
5496 13:53:39.732187 # ok 3766 # SKIP Streaming SVE set SVE get SVE for VL 6848
5497 13:53:39.732288 # ok 3767 # SKIP Streaming SVE set SVE get FPSIMD for VL 6848
5498 13:53:39.732374 # ok 3768 # SKIP Streaming SVE set FPSIMD get SVE for VL 6848
5499 13:53:39.732474 # ok 3769 Set Streaming SVE VL 6864
5500 13:53:39.732575 # ok 3770 # SKIP Streaming SVE set SVE get SVE for VL 6864
5501 13:53:39.732871 # ok 3771 # SKIP Streaming SVE set SVE get FPSIMD for VL 6864
5502 13:53:39.733007 # ok 3772 # SKIP Streaming SVE set FPSIMD get SVE for VL 6864
5503 13:53:39.733281 # ok 3773 Set Streaming SVE VL 6880
5504 13:53:39.733370 # ok 3774 # SKIP Streaming SVE set SVE get SVE for VL 6880
5505 13:53:39.743966 # ok 3775 # SKIP Streaming SVE set SVE get FPSIMD for VL 6880
5506 13:53:39.744477 # ok 3776 # SKIP Streaming SVE set FPSIMD get SVE for VL 6880
5507 13:53:39.744598 # ok 3777 Set Streaming SVE VL 6896
5508 13:53:39.744705 # ok 3778 # SKIP Streaming SVE set SVE get SVE for VL 6896
5509 13:53:39.744812 # ok 3779 # SKIP Streaming SVE set SVE get FPSIMD for VL 6896
5510 13:53:39.744934 # ok 3780 # SKIP Streaming SVE set FPSIMD get SVE for VL 6896
5511 13:53:39.745035 # ok 3781 Set Streaming SVE VL 6912
5512 13:53:39.745109 # ok 3782 # SKIP Streaming SVE set SVE get SVE for VL 6912
5513 13:53:39.745203 # ok 3783 # SKIP Streaming SVE set SVE get FPSIMD for VL 6912
5514 13:53:39.745288 # ok 3784 # SKIP Streaming SVE set FPSIMD get SVE for VL 6912
5515 13:53:39.745368 # ok 3785 Set Streaming SVE VL 6928
5516 13:53:39.745486 # ok 3786 # SKIP Streaming SVE set SVE get SVE for VL 6928
5517 13:53:39.745587 # ok 3787 # SKIP Streaming SVE set SVE get FPSIMD for VL 6928
5518 13:53:39.745715 # ok 3788 # SKIP Streaming SVE set FPSIMD get SVE for VL 6928
5519 13:53:39.745988 # ok 3789 Set Streaming SVE VL 6944
5520 13:53:39.751343 # ok 3790 # SKIP Streaming SVE set SVE get SVE for VL 6944
5521 13:53:39.751912 # ok 3791 # SKIP Streaming SVE set SVE get FPSIMD for VL 6944
5522 13:53:39.752022 # ok 3792 # SKIP Streaming SVE set FPSIMD get SVE for VL 6944
5523 13:53:39.752131 # ok 3793 Set Streaming SVE VL 6960
5524 13:53:39.752222 # ok 3794 # SKIP Streaming SVE set SVE get SVE for VL 6960
5525 13:53:39.752310 # ok 3795 # SKIP Streaming SVE set SVE get FPSIMD for VL 6960
5526 13:53:39.752400 # ok 3796 # SKIP Streaming SVE set FPSIMD get SVE for VL 6960
5527 13:53:39.752488 # ok 3797 Set Streaming SVE VL 6976
5528 13:53:39.752590 # ok 3798 # SKIP Streaming SVE set SVE get SVE for VL 6976
5529 13:53:39.752681 # ok 3799 # SKIP Streaming SVE set SVE get FPSIMD for VL 6976
5530 13:53:39.752767 # ok 3800 # SKIP Streaming SVE set FPSIMD get SVE for VL 6976
5531 13:53:39.753091 # ok 3801 Set Streaming SVE VL 6992
5532 13:53:39.753199 # ok 3802 # SKIP Streaming SVE set SVE get SVE for VL 6992
5533 13:53:39.753287 # ok 3803 # SKIP Streaming SVE set SVE get FPSIMD for VL 6992
5534 13:53:39.753431 # ok 3804 # SKIP Streaming SVE set FPSIMD get SVE for VL 6992
5535 13:53:39.753529 # ok 3805 Set Streaming SVE VL 7008
5536 13:53:39.753632 # ok 3806 # SKIP Streaming SVE set SVE get SVE for VL 7008
5537 13:53:39.753729 # ok 3807 # SKIP Streaming SVE set SVE get FPSIMD for VL 7008
5538 13:53:39.766890 # ok 3808 # SKIP Streaming SVE set FPSIMD get SVE for VL 7008
5539 13:53:39.767437 # ok 3809 Set Streaming SVE VL 7024
5540 13:53:39.767529 # ok 3810 # SKIP Streaming SVE set SVE get SVE for VL 7024
5541 13:53:39.767625 # ok 3811 # SKIP Streaming SVE set SVE get FPSIMD for VL 7024
5542 13:53:39.767990 # ok 3812 # SKIP Streaming SVE set FPSIMD get SVE for VL 7024
5543 13:53:39.768110 # ok 3813 Set Streaming SVE VL 7040
5544 13:53:39.768209 # ok 3814 # SKIP Streaming SVE set SVE get SVE for VL 7040
5545 13:53:39.768329 # ok 3815 # SKIP Streaming SVE set SVE get FPSIMD for VL 7040
5546 13:53:39.768436 # ok 3816 # SKIP Streaming SVE set FPSIMD get SVE for VL 7040
5547 13:53:39.768546 # ok 3817 Set Streaming SVE VL 7056
5548 13:53:39.768676 # ok 3818 # SKIP Streaming SVE set SVE get SVE for VL 7056
5549 13:53:39.768771 # ok 3819 # SKIP Streaming SVE set SVE get FPSIMD for VL 7056
5550 13:53:39.769117 # ok 3820 # SKIP Streaming SVE set FPSIMD get SVE for VL 7056
5551 13:53:39.769325 # ok 3821 Set Streaming SVE VL 7072
5552 13:53:39.769436 # ok 3822 # SKIP Streaming SVE set SVE get SVE for VL 7072
5553 13:53:39.769526 # ok 3823 # SKIP Streaming SVE set SVE get FPSIMD for VL 7072
5554 13:53:39.769630 # ok 3824 # SKIP Streaming SVE set FPSIMD get SVE for VL 7072
5555 13:53:39.769730 # ok 3825 Set Streaming SVE VL 7088
5556 13:53:39.769818 # ok 3826 # SKIP Streaming SVE set SVE get SVE for VL 7088
5557 13:53:39.769927 # ok 3827 # SKIP Streaming SVE set SVE get FPSIMD for VL 7088
5558 13:53:39.779413 # ok 3828 # SKIP Streaming SVE set FPSIMD get SVE for VL 7088
5559 13:53:39.780381 # ok 3829 Set Streaming SVE VL 7104
5560 13:53:39.780482 # ok 3830 # SKIP Streaming SVE set SVE get SVE for VL 7104
5561 13:53:39.780561 # ok 3831 # SKIP Streaming SVE set SVE get FPSIMD for VL 7104
5562 13:53:39.780640 # ok 3832 # SKIP Streaming SVE set FPSIMD get SVE for VL 7104
5563 13:53:39.780749 # ok 3833 Set Streaming SVE VL 7120
5564 13:53:39.780836 # ok 3834 # SKIP Streaming SVE set SVE get SVE for VL 7120
5565 13:53:39.780946 # ok 3835 # SKIP Streaming SVE set SVE get FPSIMD for VL 7120
5566 13:53:39.781050 # ok 3836 # SKIP Streaming SVE set FPSIMD get SVE for VL 7120
5567 13:53:39.781121 # ok 3837 Set Streaming SVE VL 7136
5568 13:53:39.781196 # ok 3838 # SKIP Streaming SVE set SVE get SVE for VL 7136
5569 13:53:39.781581 # ok 3839 # SKIP Streaming SVE set SVE get FPSIMD for VL 7136
5570 13:53:39.781730 # ok 3840 # SKIP Streaming SVE set FPSIMD get SVE for VL 7136
5571 13:53:39.781840 # ok 3841 Set Streaming SVE VL 7152
5572 13:53:39.791128 # ok 3842 # SKIP Streaming SVE set SVE get SVE for VL 7152
5573 13:53:39.791696 # ok 3843 # SKIP Streaming SVE set SVE get FPSIMD for VL 7152
5574 13:53:39.791813 # ok 3844 # SKIP Streaming SVE set FPSIMD get SVE for VL 7152
5575 13:53:39.791911 # ok 3845 Set Streaming SVE VL 7168
5576 13:53:39.792039 # ok 3846 # SKIP Streaming SVE set SVE get SVE for VL 7168
5577 13:53:39.792129 # ok 3847 # SKIP Streaming SVE set SVE get FPSIMD for VL 7168
5578 13:53:39.792231 # ok 3848 # SKIP Streaming SVE set FPSIMD get SVE for VL 7168
5579 13:53:39.792734 # ok 3849 Set Streaming SVE VL 7184
5580 13:53:39.793032 # ok 3850 # SKIP Streaming SVE set SVE get SVE for VL 7184
5581 13:53:39.793134 # ok 3851 # SKIP Streaming SVE set SVE get FPSIMD for VL 7184
5582 13:53:39.793256 # ok 3852 # SKIP Streaming SVE set FPSIMD get SVE for VL 7184
5583 13:53:39.793756 # ok 3853 Set Streaming SVE VL 7200
5584 13:53:39.793865 # ok 3854 # SKIP Streaming SVE set SVE get SVE for VL 7200
5585 13:53:39.793978 # ok 3855 # SKIP Streaming SVE set SVE get FPSIMD for VL 7200
5586 13:53:39.794076 # ok 3856 # SKIP Streaming SVE set FPSIMD get SVE for VL 7200
5587 13:53:39.794177 # ok 3857 Set Streaming SVE VL 7216
5588 13:53:39.794259 # ok 3858 # SKIP Streaming SVE set SVE get SVE for VL 7216
5589 13:53:39.794352 # ok 3859 # SKIP Streaming SVE set SVE get FPSIMD for VL 7216
5590 13:53:39.807635 # ok 3860 # SKIP Streaming SVE set FPSIMD get SVE for VL 7216
5591 13:53:39.809577 # ok 3861 Set Streaming SVE VL 7232
5592 13:53:39.809708 # ok 3862 # SKIP Streaming SVE set SVE get SVE for VL 7232
5593 13:53:39.810029 # ok 3863 # SKIP Streaming SVE set SVE get FPSIMD for VL 7232
5594 13:53:39.810131 # ok 3864 # SKIP Streaming SVE set FPSIMD get SVE for VL 7232
5595 13:53:39.810218 # ok 3865 Set Streaming SVE VL 7248
5596 13:53:39.810299 # ok 3866 # SKIP Streaming SVE set SVE get SVE for VL 7248
5597 13:53:39.810382 # ok 3867 # SKIP Streaming SVE set SVE get FPSIMD for VL 7248
5598 13:53:39.810483 # ok 3868 # SKIP Streaming SVE set FPSIMD get SVE for VL 7248
5599 13:53:39.810574 # ok 3869 Set Streaming SVE VL 7264
5600 13:53:39.810656 # ok 3870 # SKIP Streaming SVE set SVE get SVE for VL 7264
5601 13:53:39.810734 # ok 3871 # SKIP Streaming SVE set SVE get FPSIMD for VL 7264
5602 13:53:39.810829 # ok 3872 # SKIP Streaming SVE set FPSIMD get SVE for VL 7264
5603 13:53:39.810919 # ok 3873 Set Streaming SVE VL 7280
5604 13:53:39.810992 # ok 3874 # SKIP Streaming SVE set SVE get SVE for VL 7280
5605 13:53:39.811093 # ok 3875 # SKIP Streaming SVE set SVE get FPSIMD for VL 7280
5606 13:53:39.811191 # ok 3876 # SKIP Streaming SVE set FPSIMD get SVE for VL 7280
5607 13:53:39.811263 # ok 3877 Set Streaming SVE VL 7296
5608 13:53:39.811332 # ok 3878 # SKIP Streaming SVE set SVE get SVE for VL 7296
5609 13:53:39.811404 # ok 3879 # SKIP Streaming SVE set SVE get FPSIMD for VL 7296
5610 13:53:39.819032 # ok 3880 # SKIP Streaming SVE set FPSIMD get SVE for VL 7296
5611 13:53:39.819464 # ok 3881 Set Streaming SVE VL 7312
5612 13:53:39.819568 # ok 3882 # SKIP Streaming SVE set SVE get SVE for VL 7312
5613 13:53:39.819655 # ok 3883 # SKIP Streaming SVE set SVE get FPSIMD for VL 7312
5614 13:53:39.819740 # ok 3884 # SKIP Streaming SVE set FPSIMD get SVE for VL 7312
5615 13:53:39.819821 # ok 3885 Set Streaming SVE VL 7328
5616 13:53:39.819904 # ok 3886 # SKIP Streaming SVE set SVE get SVE for VL 7328
5617 13:53:39.819984 # ok 3887 # SKIP Streaming SVE set SVE get FPSIMD for VL 7328
5618 13:53:39.820261 # ok 3888 # SKIP Streaming SVE set FPSIMD get SVE for VL 7328
5619 13:53:39.820361 # ok 3889 Set Streaming SVE VL 7344
5620 13:53:39.820446 # ok 3890 # SKIP Streaming SVE set SVE get SVE for VL 7344
5621 13:53:39.820929 # ok 3891 # SKIP Streaming SVE set SVE get FPSIMD for VL 7344
5622 13:53:39.821074 # ok 3892 # SKIP Streaming SVE set FPSIMD get SVE for VL 7344
5623 13:53:39.821162 # ok 3893 Set Streaming SVE VL 7360
5624 13:53:39.821244 # ok 3894 # SKIP Streaming SVE set SVE get SVE for VL 7360
5625 13:53:39.821326 # ok 3895 # SKIP Streaming SVE set SVE get FPSIMD for VL 7360
5626 13:53:39.821410 # ok 3896 # SKIP Streaming SVE set FPSIMD get SVE for VL 7360
5627 13:53:39.821739 # ok 3897 Set Streaming SVE VL 7376
5628 13:53:39.821848 # ok 3898 # SKIP Streaming SVE set SVE get SVE for VL 7376
5629 13:53:39.821943 # ok 3899 # SKIP Streaming SVE set SVE get FPSIMD for VL 7376
5630 13:53:39.822038 # ok 3900 # SKIP Streaming SVE set FPSIMD get SVE for VL 7376
5631 13:53:39.832804 # ok 3901 Set Streaming SVE VL 7392
5632 13:53:39.833007 # ok 3902 # SKIP Streaming SVE set SVE get SVE for VL 7392
5633 13:53:39.833101 # ok 3903 # SKIP Streaming SVE set SVE get FPSIMD for VL 7392
5634 13:53:39.833189 # ok 3904 # SKIP Streaming SVE set FPSIMD get SVE for VL 7392
5635 13:53:39.833456 # ok 3905 Set Streaming SVE VL 7408
5636 13:53:39.833604 # ok 3906 # SKIP Streaming SVE set SVE get SVE for VL 7408
5637 13:53:39.833775 # ok 3907 # SKIP Streaming SVE set SVE get FPSIMD for VL 7408
5638 13:53:39.833916 # ok 3908 # SKIP Streaming SVE set FPSIMD get SVE for VL 7408
5639 13:53:39.834080 # ok 3909 Set Streaming SVE VL 7424
5640 13:53:39.834883 # ok 3910 # SKIP Streaming SVE set SVE get SVE for VL 7424
5641 13:53:39.835195 # ok 3911 # SKIP Streaming SVE set SVE get FPSIMD for VL 7424
5642 13:53:39.835330 # ok 3912 # SKIP Streaming SVE set FPSIMD get SVE for VL 7424
5643 13:53:39.835877 # ok 3913 Set Streaming SVE VL 7440
5644 13:53:39.835990 # ok 3914 # SKIP Streaming SVE set SVE get SVE for VL 7440
5645 13:53:39.836080 # ok 3915 # SKIP Streaming SVE set SVE get FPSIMD for VL 7440
5646 13:53:39.836168 # ok 3916 # SKIP Streaming SVE set FPSIMD get SVE for VL 7440
5647 13:53:39.836256 # ok 3917 Set Streaming SVE VL 7456
5648 13:53:39.836888 # ok 3918 # SKIP Streaming SVE set SVE get SVE for VL 7456
5649 13:53:39.837270 # ok 3919 # SKIP Streaming SVE set SVE get FPSIMD for VL 7456
5650 13:53:39.837482 # ok 3920 # SKIP Streaming SVE set FPSIMD get SVE for VL 7456
5651 13:53:39.837576 # ok 3921 Set Streaming SVE VL 7472
5652 13:53:39.837678 # ok 3922 # SKIP Streaming SVE set SVE get SVE for VL 7472
5653 13:53:39.837768 # ok 3923 # SKIP Streaming SVE set SVE get FPSIMD for VL 7472
5654 13:53:39.837855 # ok 3924 # SKIP Streaming SVE set FPSIMD get SVE for VL 7472
5655 13:53:39.844006 # ok 3925 Set Streaming SVE VL 7488
5656 13:53:39.844282 # ok 3926 # SKIP Streaming SVE set SVE get SVE for VL 7488
5657 13:53:39.844443 # ok 3927 # SKIP Streaming SVE set SVE get FPSIMD for VL 7488
5658 13:53:39.844544 # ok 3928 # SKIP Streaming SVE set FPSIMD get SVE for VL 7488
5659 13:53:39.844634 # ok 3929 Set Streaming SVE VL 7504
5660 13:53:39.844720 # ok 3930 # SKIP Streaming SVE set SVE get SVE for VL 7504
5661 13:53:39.844822 # ok 3931 # SKIP Streaming SVE set SVE get FPSIMD for VL 7504
5662 13:53:39.844909 # ok 3932 # SKIP Streaming SVE set FPSIMD get SVE for VL 7504
5663 13:53:39.845239 # ok 3933 Set Streaming SVE VL 7520
5664 13:53:39.845343 # ok 3934 # SKIP Streaming SVE set SVE get SVE for VL 7520
5665 13:53:39.845432 # ok 3935 # SKIP Streaming SVE set SVE get FPSIMD for VL 7520
5666 13:53:39.845522 # ok 3936 # SKIP Streaming SVE set FPSIMD get SVE for VL 7520
5667 13:53:39.845629 # ok 3937 Set Streaming SVE VL 7536
5668 13:53:39.845727 # ok 3938 # SKIP Streaming SVE set SVE get SVE for VL 7536
5669 13:53:39.856260 # ok 3939 # SKIP Streaming SVE set SVE get FPSIMD for VL 7536
5670 13:53:39.856468 # ok 3940 # SKIP Streaming SVE set FPSIMD get SVE for VL 7536
5671 13:53:39.856565 # ok 3941 Set Streaming SVE VL 7552
5672 13:53:39.856654 # ok 3942 # SKIP Streaming SVE set SVE get SVE for VL 7552
5673 13:53:39.856742 # ok 3943 # SKIP Streaming SVE set SVE get FPSIMD for VL 7552
5674 13:53:39.856833 # ok 3944 # SKIP Streaming SVE set FPSIMD get SVE for VL 7552
5675 13:53:39.856921 # ok 3945 Set Streaming SVE VL 7568
5676 13:53:39.857008 # ok 3946 # SKIP Streaming SVE set SVE get SVE for VL 7568
5677 13:53:39.857094 # ok 3947 # SKIP Streaming SVE set SVE get FPSIMD for VL 7568
5678 13:53:39.857180 # ok 3948 # SKIP Streaming SVE set FPSIMD get SVE for VL 7568
5679 13:53:39.857483 # ok 3949 Set Streaming SVE VL 7584
5680 13:53:39.857591 # ok 3950 # SKIP Streaming SVE set SVE get SVE for VL 7584
5681 13:53:39.857691 # ok 3951 # SKIP Streaming SVE set SVE get FPSIMD for VL 7584
5682 13:53:39.857781 # ok 3952 # SKIP Streaming SVE set FPSIMD get SVE for VL 7584
5683 13:53:39.857871 # ok 3953 Set Streaming SVE VL 7600
5684 13:53:39.857959 # ok 3954 # SKIP Streaming SVE set SVE get SVE for VL 7600
5685 13:53:39.858044 # ok 3955 # SKIP Streaming SVE set SVE get FPSIMD for VL 7600
5686 13:53:39.858132 # ok 3956 # SKIP Streaming SVE set FPSIMD get SVE for VL 7600
5687 13:53:39.858220 # ok 3957 Set Streaming SVE VL 7616
5688 13:53:39.858326 # ok 3958 # SKIP Streaming SVE set SVE get SVE for VL 7616
5689 13:53:39.858418 # ok 3959 # SKIP Streaming SVE set SVE get FPSIMD for VL 7616
5690 13:53:39.868265 # ok 3960 # SKIP Streaming SVE set FPSIMD get SVE for VL 7616
5691 13:53:39.868468 # ok 3961 Set Streaming SVE VL 7632
5692 13:53:39.868563 # ok 3962 # SKIP Streaming SVE set SVE get SVE for VL 7632
5693 13:53:39.869025 # ok 3963 # SKIP Streaming SVE set SVE get FPSIMD for VL 7632
5694 13:53:39.869135 # ok 3964 # SKIP Streaming SVE set FPSIMD get SVE for VL 7632
5695 13:53:39.869229 # ok 3965 Set Streaming SVE VL 7648
5696 13:53:39.869318 # ok 3966 # SKIP Streaming SVE set SVE get SVE for VL 7648
5697 13:53:39.869405 # ok 3967 # SKIP Streaming SVE set SVE get FPSIMD for VL 7648
5698 13:53:39.869495 # ok 3968 # SKIP Streaming SVE set FPSIMD get SVE for VL 7648
5699 13:53:39.869602 # ok 3969 Set Streaming SVE VL 7664
5700 13:53:39.869703 # ok 3970 # SKIP Streaming SVE set SVE get SVE for VL 7664
5701 13:53:39.869793 # ok 3971 # SKIP Streaming SVE set SVE get FPSIMD for VL 7664
5702 13:53:39.869879 # ok 3972 # SKIP Streaming SVE set FPSIMD get SVE for VL 7664
5703 13:53:39.869965 # ok 3973 Set Streaming SVE VL 7680
5704 13:53:39.870050 # ok 3974 # SKIP Streaming SVE set SVE get SVE for VL 7680
5705 13:53:39.870153 # ok 3975 # SKIP Streaming SVE set SVE get FPSIMD for VL 7680
5706 13:53:39.875898 # ok 3976 # SKIP Streaming SVE set FPSIMD get SVE for VL 7680
5707 13:53:39.876864 # ok 3977 Set Streaming SVE VL 7696
5708 13:53:39.876974 # ok 3978 # SKIP Streaming SVE set SVE get SVE for VL 7696
5709 13:53:39.877081 # ok 3979 # SKIP Streaming SVE set SVE get FPSIMD for VL 7696
5710 13:53:39.877382 # ok 3980 # SKIP Streaming SVE set FPSIMD get SVE for VL 7696
5711 13:53:39.877496 # ok 3981 Set Streaming SVE VL 7712
5712 13:53:39.877617 # ok 3982 # SKIP Streaming SVE set SVE get SVE for VL 7712
5713 13:53:39.878489 # ok 3983 # SKIP Streaming SVE set SVE get FPSIMD for VL 7712
5714 13:53:39.878786 # ok 3984 # SKIP Streaming SVE set FPSIMD get SVE for VL 7712
5715 13:53:39.878877 # ok 3985 Set Streaming SVE VL 7728
5716 13:53:39.879170 # ok 3986 # SKIP Streaming SVE set SVE get SVE for VL 7728
5717 13:53:39.879350 # ok 3987 # SKIP Streaming SVE set SVE get FPSIMD for VL 7728
5718 13:53:39.879451 # ok 3988 # SKIP Streaming SVE set FPSIMD get SVE for VL 7728
5719 13:53:39.879577 # ok 3989 Set Streaming SVE VL 7744
5720 13:53:39.879707 # ok 3990 # SKIP Streaming SVE set SVE get SVE for VL 7744
5721 13:53:39.879806 # ok 3991 # SKIP Streaming SVE set SVE get FPSIMD for VL 7744
5722 13:53:39.879922 # ok 3992 # SKIP Streaming SVE set FPSIMD get SVE for VL 7744
5723 13:53:39.880030 # ok 3993 Set Streaming SVE VL 7760
5724 13:53:39.880381 # ok 3994 # SKIP Streaming SVE set SVE get SVE for VL 7760
5725 13:53:39.880483 # ok 3995 # SKIP Streaming SVE set SVE get FPSIMD for VL 7760
5726 13:53:39.880601 # ok 3996 # SKIP Streaming SVE set FPSIMD get SVE for VL 7760
5727 13:53:39.880715 # ok 3997 Set Streaming SVE VL 7776
5728 13:53:39.880816 # ok 3998 # SKIP Streaming SVE set SVE get SVE for VL 7776
5729 13:53:39.880897 # ok 3999 # SKIP Streaming SVE set SVE get FPSIMD for VL 7776
5730 13:53:39.888368 # ok 4000 # SKIP Streaming SVE set FPSIMD get SVE for VL 7776
5731 13:53:39.888756 # ok 4001 Set Streaming SVE VL 7792
5732 13:53:39.888856 # ok 4002 # SKIP Streaming SVE set SVE get SVE for VL 7792
5733 13:53:39.888949 # ok 4003 # SKIP Streaming SVE set SVE get FPSIMD for VL 7792
5734 13:53:39.890215 # ok 4004 # SKIP Streaming SVE set FPSIMD get SVE for VL 7792
5735 13:53:39.890314 # ok 4005 Set Streaming SVE VL 7808
5736 13:53:39.890401 # ok 4006 # SKIP Streaming SVE set SVE get SVE for VL 7808
5737 13:53:39.890484 # ok 4007 # SKIP Streaming SVE set SVE get FPSIMD for VL 7808
5738 13:53:39.896087 # ok 4008 # SKIP Streaming SVE set FPSIMD get SVE for VL 7808
5739 13:53:39.896989 # ok 4009 Set Streaming SVE VL 7824
5740 13:53:39.897097 # ok 4010 # SKIP Streaming SVE set SVE get SVE for VL 7824
5741 13:53:39.897212 # ok 4011 # SKIP Streaming SVE set SVE get FPSIMD for VL 7824
5742 13:53:39.897516 # ok 4012 # SKIP Streaming SVE set FPSIMD get SVE for VL 7824
5743 13:53:39.897630 # ok 4013 Set Streaming SVE VL 7840
5744 13:53:39.908108 # ok 4014 # SKIP Streaming SVE set SVE get SVE for VL 7840
5745 13:53:39.908734 # ok 4015 # SKIP Streaming SVE set SVE get FPSIMD for VL 7840
5746 13:53:39.909060 # ok 4016 # SKIP Streaming SVE set FPSIMD get SVE for VL 7840
5747 13:53:39.909171 # ok 4017 Set Streaming SVE VL 7856
5748 13:53:39.909490 # ok 4018 # SKIP Streaming SVE set SVE get SVE for VL 7856
5749 13:53:39.909599 # ok 4019 # SKIP Streaming SVE set SVE get FPSIMD for VL 7856
5750 13:53:39.909719 # ok 4020 # SKIP Streaming SVE set FPSIMD get SVE for VL 7856
5751 13:53:39.909834 # ok 4021 Set Streaming SVE VL 7872
5752 13:53:39.911569 # ok 4022 # SKIP Streaming SVE set SVE get SVE for VL 7872
5753 13:53:39.912400 # ok 4023 # SKIP Streaming SVE set SVE get FPSIMD for VL 7872
5754 13:53:39.912528 # ok 4024 # SKIP Streaming SVE set FPSIMD get SVE for VL 7872
5755 13:53:39.912629 # ok 4025 Set Streaming SVE VL 7888
5756 13:53:39.912726 # ok 4026 # SKIP Streaming SVE set SVE get SVE for VL 7888
5757 13:53:39.912826 # ok 4027 # SKIP Streaming SVE set SVE get FPSIMD for VL 7888
5758 13:53:39.912951 # ok 4028 # SKIP Streaming SVE set FPSIMD get SVE for VL 7888
5759 13:53:39.913050 # ok 4029 Set Streaming SVE VL 7904
5760 13:53:39.913145 # ok 4030 # SKIP Streaming SVE set SVE get SVE for VL 7904
5761 13:53:39.913245 # ok 4031 # SKIP Streaming SVE set SVE get FPSIMD for VL 7904
5762 13:53:39.913353 # ok 4032 # SKIP Streaming SVE set FPSIMD get SVE for VL 7904
5763 13:53:39.913471 # ok 4033 Set Streaming SVE VL 7920
5764 13:53:39.913568 # ok 4034 # SKIP Streaming SVE set SVE get SVE for VL 7920
5765 13:53:39.913673 # ok 4035 # SKIP Streaming SVE set SVE get FPSIMD for VL 7920
5766 13:53:39.913787 # ok 4036 # SKIP Streaming SVE set FPSIMD get SVE for VL 7920
5767 13:53:39.921192 # ok 4037 Set Streaming SVE VL 7936
5768 13:53:39.921625 # ok 4038 # SKIP Streaming SVE set SVE get SVE for VL 7936
5769 13:53:39.921752 # ok 4039 # SKIP Streaming SVE set SVE get FPSIMD for VL 7936
5770 13:53:39.927373 # ok 4040 # SKIP Streaming SVE set FPSIMD get SVE for VL 7936
5771 13:53:39.928493 # ok 4041 Set Streaming SVE VL 7952
5772 13:53:39.928826 # ok 4042 # SKIP Streaming SVE set SVE get SVE for VL 7952
5773 13:53:39.928947 # ok 4043 # SKIP Streaming SVE set SVE get FPSIMD for VL 7952
5774 13:53:39.929768 # ok 4044 # SKIP Streaming SVE set FPSIMD get SVE for VL 7952
5775 13:53:39.930021 # ok 4045 Set Streaming SVE VL 7968
5776 13:53:39.930113 # ok 4046 # SKIP Streaming SVE set SVE get SVE for VL 7968
5777 13:53:39.930214 # ok 4047 # SKIP Streaming SVE set SVE get FPSIMD for VL 7968
5778 13:53:39.936518 # ok 4048 # SKIP Streaming SVE set FPSIMD get SVE for VL 7968
5779 13:53:39.936701 # ok 4049 Set Streaming SVE VL 7984
5780 13:53:39.936814 # ok 4050 # SKIP Streaming SVE set SVE get SVE for VL 7984
5781 13:53:39.936925 # ok 4051 # SKIP Streaming SVE set SVE get FPSIMD for VL 7984
5782 13:53:39.937029 # ok 4052 # SKIP Streaming SVE set FPSIMD get SVE for VL 7984
5783 13:53:39.937129 # ok 4053 Set Streaming SVE VL 8000
5784 13:53:39.937224 # ok 4054 # SKIP Streaming SVE set SVE get SVE for VL 8000
5785 13:53:39.937323 # ok 4055 # SKIP Streaming SVE set SVE get FPSIMD for VL 8000
5786 13:53:39.938025 # ok 4056 # SKIP Streaming SVE set FPSIMD get SVE for VL 8000
5787 13:53:39.938126 # ok 4057 Set Streaming SVE VL 8016
5788 13:53:39.941714 # ok 4058 # SKIP Streaming SVE set SVE get SVE for VL 8016
5789 13:53:39.941849 # ok 4059 # SKIP Streaming SVE set SVE get FPSIMD for VL 8016
5790 13:53:39.941974 # ok 4060 # SKIP Streaming SVE set FPSIMD get SVE for VL 8016
5791 13:53:39.942091 # ok 4061 Set Streaming SVE VL 8032
5792 13:53:39.942203 # ok 4062 # SKIP Streaming SVE set SVE get SVE for VL 8032
5793 13:53:39.942597 # ok 4063 # SKIP Streaming SVE set SVE get FPSIMD for VL 8032
5794 13:53:39.942735 # ok 4064 # SKIP Streaming SVE set FPSIMD get SVE for VL 8032
5795 13:53:39.942854 # ok 4065 Set Streaming SVE VL 8048
5796 13:53:39.942989 # ok 4066 # SKIP Streaming SVE set SVE get SVE for VL 8048
5797 13:53:39.943101 # ok 4067 # SKIP Streaming SVE set SVE get FPSIMD for VL 8048
5798 13:53:39.943232 # ok 4068 # SKIP Streaming SVE set FPSIMD get SVE for VL 8048
5799 13:53:39.943376 # ok 4069 Set Streaming SVE VL 8064
5800 13:53:39.943506 # ok 4070 # SKIP Streaming SVE set SVE get SVE for VL 8064
5801 13:53:39.943861 # ok 4071 # SKIP Streaming SVE set SVE get FPSIMD for VL 8064
5802 13:53:39.943997 # ok 4072 # SKIP Streaming SVE set FPSIMD get SVE for VL 8064
5803 13:53:39.944110 # ok 4073 Set Streaming SVE VL 8080
5804 13:53:39.944230 # ok 4074 # SKIP Streaming SVE set SVE get SVE for VL 8080
5805 13:53:39.969722 # ok 4075 # SKIP Streaming SVE set SVE get FPSIMD for VL 8080
5806 13:53:39.975691 # ok 4076 # SKIP Streaming SVE set FPSIMD get SVE for VL 8080
5807 13:53:39.976086 # ok 4077 Set Streaming SVE VL 8096
5808 13:53:39.976191 # ok 4078 # SKIP Streaming SVE set SVE get SVE for VL 8096
5809 13:53:39.976287 # ok 4079 # SKIP Streaming SVE set SVE get FPSIMD for VL 8096
5810 13:53:39.976393 # ok 4080 # SKIP Streaming SVE set FPSIMD get SVE for VL 8096
5811 13:53:39.976482 # ok 4081 Set Streaming SVE VL 8112
5812 13:53:39.976778 # ok 4082 # SKIP Streaming SVE set SVE get SVE for VL 8112
5813 13:53:39.976884 # ok 4083 # SKIP Streaming SVE set SVE get FPSIMD for VL 8112
5814 13:53:39.976975 # ok 4084 # SKIP Streaming SVE set FPSIMD get SVE for VL 8112
5815 13:53:39.977082 # ok 4085 Set Streaming SVE VL 8128
5816 13:53:39.977170 # ok 4086 # SKIP Streaming SVE set SVE get SVE for VL 8128
5817 13:53:39.977254 # ok 4087 # SKIP Streaming SVE set SVE get FPSIMD for VL 8128
5818 13:53:39.977475 # ok 4088 # SKIP Streaming SVE set FPSIMD get SVE for VL 8128
5819 13:53:39.977582 # ok 4089 Set Streaming SVE VL 8144
5820 13:53:39.977680 # ok 4090 # SKIP Streaming SVE set SVE get SVE for VL 8144
5821 13:53:39.987842 # ok 4091 # SKIP Streaming SVE set SVE get FPSIMD for VL 8144
5822 13:53:39.988289 # ok 4092 # SKIP Streaming SVE set FPSIMD get SVE for VL 8144
5823 13:53:39.988429 # ok 4093 Set Streaming SVE VL 8160
5824 13:53:39.988528 # ok 4094 # SKIP Streaming SVE set SVE get SVE for VL 8160
5825 13:53:39.988642 # ok 4095 # SKIP Streaming SVE set SVE get FPSIMD for VL 8160
5826 13:53:39.988731 # ok 4096 # SKIP Streaming SVE set FPSIMD get SVE for VL 8160
5827 13:53:39.988929 # ok 4097 Set Streaming SVE VL 8176
5828 13:53:39.989027 # ok 4098 # SKIP Streaming SVE set SVE get SVE for VL 8176
5829 13:53:39.989123 # ok 4099 # SKIP Streaming SVE set SVE get FPSIMD for VL 8176
5830 13:53:39.989215 # ok 4100 # SKIP Streaming SVE set FPSIMD get SVE for VL 8176
5831 13:53:39.989300 # ok 4101 Set Streaming SVE VL 8192
5832 13:53:39.989415 # ok 4102 # SKIP Streaming SVE set SVE get SVE for VL 8192
5833 13:53:39.990118 # ok 4103 # SKIP Streaming SVE set SVE get FPSIMD for VL 8192
5834 13:53:39.990412 # ok 4104 # SKIP Streaming SVE set FPSIMD get SVE for VL 8192
5835 13:53:39.990522 # # Totals: pass:1095 fail:0 xfail:0 xpass:0 skip:3009 error:0
5836 13:53:39.990625 ok 30 selftests: arm64: sve-ptrace
5837 13:53:39.990708 # selftests: arm64: sve-probe-vls
5838 13:53:40.010759 # TAP version 13
5839 13:53:40.011031 # 1..2
5840 13:53:40.011135 # ok 1 Enumerated 16 vector lengths
5841 13:53:40.011226 # ok 2 All vector lengths valid
5842 13:53:40.011312 # # 16
5843 13:53:40.011395 # # 32
5844 13:53:40.011476 # # 48
5845 13:53:40.011553 # # 64
5846 13:53:40.011644 # # 80
5847 13:53:40.011735 # # 96
5848 13:53:40.011811 # # 112
5849 13:53:40.011890 # # 128
5850 13:53:40.011973 # # 144
5851 13:53:40.012440 # # 160
5852 13:53:40.012543 # # 176
5853 13:53:40.012626 # # 192
5854 13:53:40.012705 # # 208
5855 13:53:40.012787 # # 224
5856 13:53:40.012868 # # 240
5857 13:53:40.012947 # # 256
5858 13:53:40.013026 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
5859 13:53:40.034409 ok 31 selftests: arm64: sve-probe-vls
5860 13:53:40.189068 # selftests: arm64: vec-syscfg
5861 13:53:41.238781 # TAP version 13
5862 13:53:41.239215 # 1..20
5863 13:53:41.239316 # ok 1 SVE default vector length 64
5864 13:53:41.239405 # ok 2 SVE minimum vector length 16
5865 13:53:41.239508 # ok 3 SVE maximum vector length 256
5866 13:53:41.239597 # ok 4 SVE current VL is 64
5867 13:53:41.239835 # ok 5 SVE set VL 64 and have VL 64
5868 13:53:41.239930 # ok 6 SVE prctl() set min/max
5869 13:53:41.240038 # ok 7 SVE vector length used default
5870 13:53:41.240128 # ok 8 SVE vector length was inherited
5871 13:53:41.240355 # ok 9 SVE vector length set on exec
5872 13:53:41.240450 # ok 10 SVE prctl() set all VLs, 0 errors
5873 13:53:41.240555 # ok 11 SME default vector length 32
5874 13:53:41.240645 # ok 12 SME minimum vector length 16
5875 13:53:41.242915 # ok 13 SME maximum vector length 256
5876 13:53:41.243036 # ok 14 SME current VL is 32
5877 13:53:41.243120 # ok 15 SME set VL 32 and have VL 32
5878 13:53:41.243203 # ok 16 SME prctl() set min/max
5879 13:53:41.243319 # ok 17 SME vector length used default
5880 13:53:41.243399 # ok 18 SME vector length was inherited
5881 13:53:41.243476 # ok 19 SME vector length set on exec
5882 13:53:41.243550 # ok 20 SME prctl() set all VLs, 0 errors
5883 13:53:41.243630 # # Totals: pass:20 fail:0 xfail:0 xpass:0 skip:0 error:0
5884 13:53:41.265698 ok 32 selftests: arm64: vec-syscfg
5885 13:53:41.369842 # selftests: arm64: za-fork
5886 13:53:41.543234 # TAP version 13
5887 13:53:41.543784 # 1..1
5888 13:53:41.543954 # # PID: 1019
5889 13:53:41.544135 # ok 1 fork_test
5890 13:53:41.544310 # # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0
5891 13:53:41.568064 ok 33 selftests: arm64: za-fork
5892 13:53:41.690663 # selftests: arm64: za-ptrace
5893 13:53:41.847811 # TAP version 13
5894 13:53:41.848054 # 1..1536
5895 13:53:41.848139 # # Parent is 1037, child is 1038
5896 13:53:41.848217 # ok 1 Set VL 16
5897 13:53:41.848493 # ok 2 Disabled ZA for VL 16
5898 13:53:41.848577 # ok 3 Data match for VL 16
5899 13:53:41.848654 # ok 4 Set VL 32
5900 13:53:41.849275 # ok 5 Disabled ZA for VL 32
5901 13:53:41.849381 # ok 6 Data match for VL 32
5902 13:53:41.849708 # ok 7 Set VL 48
5903 13:53:41.849835 # ok 8 # SKIP Disabled ZA for VL 48
5904 13:53:41.849931 # ok 9 # SKIP Get and set data for VL 48
5905 13:53:41.850013 # ok 10 Set VL 64
5906 13:53:41.850098 # ok 11 Disabled ZA for VL 64
5907 13:53:41.850202 # ok 12 Data match for VL 64
5908 13:53:41.850290 # ok 13 Set VL 80
5909 13:53:41.850374 # ok 14 # SKIP Disabled ZA for VL 80
5910 13:53:41.850460 # ok 15 # SKIP Get and set data for VL 80
5911 13:53:41.850560 # ok 16 Set VL 96
5912 13:53:41.850647 # ok 17 # SKIP Disabled ZA for VL 96
5913 13:53:41.850731 # ok 18 # SKIP Get and set data for VL 96
5914 13:53:41.850830 # ok 19 Set VL 112
5915 13:53:41.850916 # ok 20 # SKIP Disabled ZA for VL 112
5916 13:53:41.851002 # ok 21 # SKIP Get and set data for VL 112
5917 13:53:41.851087 # ok 22 Set VL 128
5918 13:53:41.851187 # ok 23 Disabled ZA for VL 128
5919 13:53:41.851274 # ok 24 Data match for VL 128
5920 13:53:41.851374 # ok 25 Set VL 144
5921 13:53:41.851460 # ok 26 # SKIP Disabled ZA for VL 144
5922 13:53:41.851559 # ok 27 # SKIP Get and set data for VL 144
5923 13:53:41.851646 # ok 28 Set VL 160
5924 13:53:41.851731 # ok 29 # SKIP Disabled ZA for VL 160
5925 13:53:41.851829 # ok 30 # SKIP Get and set data for VL 160
5926 13:53:41.851912 # ok 31 Set VL 176
5927 13:53:41.852006 # ok 32 # SKIP Disabled ZA for VL 176
5928 13:53:41.855787 # ok 33 # SKIP Get and set data for VL 176
5929 13:53:41.855910 # ok 34 Set VL 192
5930 13:53:41.856211 # ok 35 # SKIP Disabled ZA for VL 192
5931 13:53:41.856305 # ok 36 # SKIP Get and set data for VL 192
5932 13:53:41.856384 # ok 37 Set VL 208
5933 13:53:41.856703 # ok 38 # SKIP Disabled ZA for VL 208
5934 13:53:41.856879 # ok 39 # SKIP Get and set data for VL 208
5935 13:53:41.857040 # ok 40 Set VL 224
5936 13:53:41.857200 # ok 41 # SKIP Disabled ZA for VL 224
5937 13:53:41.857342 # ok 42 # SKIP Get and set data for VL 224
5938 13:53:41.857485 # ok 43 Set VL 240
5939 13:53:41.857694 # ok 44 # SKIP Disabled ZA for VL 240
5940 13:53:41.857900 # ok 45 # SKIP Get and set data for VL 240
5941 13:53:41.858108 # ok 46 Set VL 256
5942 13:53:41.858321 # ok 47 Disabled ZA for VL 256
5943 13:53:41.858473 # ok 48 Data match for VL 256
5944 13:53:41.858611 # ok 49 Set VL 272
5945 13:53:41.858747 # ok 50 # SKIP Disabled ZA for VL 272
5946 13:53:41.858901 # ok 51 # SKIP Get and set data for VL 272
5947 13:53:41.859063 # ok 52 Set VL 288
5948 13:53:41.859227 # ok 53 # SKIP Disabled ZA for VL 288
5949 13:53:41.859391 # ok 54 # SKIP Get and set data for VL 288
5950 13:53:41.859555 # ok 55 Set VL 304
5951 13:53:41.859718 # ok 56 # SKIP Disabled ZA for VL 304
5952 13:53:41.859894 # ok 57 # SKIP Get and set data for VL 304
5953 13:53:41.860118 # ok 58 Set VL 320
5954 13:53:41.860300 # ok 59 # SKIP Disabled ZA for VL 320
5955 13:53:41.860434 # ok 60 # SKIP Get and set data for VL 320
5956 13:53:41.860551 # ok 61 Set VL 336
5957 13:53:41.860702 # ok 62 # SKIP Disabled ZA for VL 336
5958 13:53:41.860824 # ok 63 # SKIP Get and set data for VL 336
5959 13:53:41.860944 # ok 64 Set VL 352
5960 13:53:41.861061 # ok 65 # SKIP Disabled ZA for VL 352
5961 13:53:41.861174 # ok 66 # SKIP Get and set data for VL 352
5962 13:53:41.861290 # ok 67 Set VL 368
5963 13:53:41.861406 # ok 68 # SKIP Disabled ZA for VL 368
5964 13:53:41.861522 # ok 69 # SKIP Get and set data for VL 368
5965 13:53:41.861637 # ok 70 Set VL 384
5966 13:53:41.861873 # ok 71 # SKIP Disabled ZA for VL 384
5967 13:53:41.862069 # ok 72 # SKIP Get and set data for VL 384
5968 13:53:41.862254 # ok 73 Set VL 400
5969 13:53:41.862437 # ok 74 # SKIP Disabled ZA for VL 400
5970 13:53:41.862619 # ok 75 # SKIP Get and set data for VL 400
5971 13:53:41.862789 # ok 76 Set VL 416
5972 13:53:41.862930 # ok 77 # SKIP Disabled ZA for VL 416
5973 13:53:41.863121 # ok 78 # SKIP Get and set data for VL 416
5974 13:53:41.866760 # ok 79 Set VL 432
5975 13:53:41.867000 # ok 80 # SKIP Disabled ZA for VL 432
5976 13:53:41.867411 # ok 81 # SKIP Get and set data for VL 432
5977 13:53:41.867606 # ok 82 Set VL 448
5978 13:53:41.867777 # ok 83 # SKIP Disabled ZA for VL 448
5979 13:53:41.867961 # ok 84 # SKIP Get and set data for VL 448
5980 13:53:41.868126 # ok 85 Set VL 464
5981 13:53:41.868253 # ok 86 # SKIP Disabled ZA for VL 464
5982 13:53:41.868425 # ok 87 # SKIP Get and set data for VL 464
5983 13:53:41.868627 # ok 88 Set VL 480
5984 13:53:41.868757 # ok 89 # SKIP Disabled ZA for VL 480
5985 13:53:41.868887 # ok 90 # SKIP Get and set data for VL 480
5986 13:53:41.869061 # ok 91 Set VL 496
5987 13:53:41.869206 # ok 92 # SKIP Disabled ZA for VL 496
5988 13:53:41.869348 # ok 93 # SKIP Get and set data for VL 496
5989 13:53:41.869489 # ok 94 Set VL 512
5990 13:53:41.869707 # ok 95 # SKIP Disabled ZA for VL 512
5991 13:53:41.869899 # ok 96 # SKIP Get and set data for VL 512
5992 13:53:41.870080 # ok 97 Set VL 528
5993 13:53:41.870242 # ok 98 # SKIP Disabled ZA for VL 528
5994 13:53:41.870402 # ok 99 # SKIP Get and set data for VL 528
5995 13:53:41.870563 # ok 100 Set VL 544
5996 13:53:41.870725 # ok 101 # SKIP Disabled ZA for VL 544
5997 13:53:41.870887 # ok 102 # SKIP Get and set data for VL 544
5998 13:53:41.871013 # ok 103 Set VL 560
5999 13:53:41.871128 # ok 104 # SKIP Disabled ZA for VL 560
6000 13:53:41.871242 # ok 105 # SKIP Get and set data for VL 560
6001 13:53:41.871356 # ok 106 Set VL 576
6002 13:53:41.871468 # ok 107 # SKIP Disabled ZA for VL 576
6003 13:53:41.871582 # ok 108 # SKIP Get and set data for VL 576
6004 13:53:41.871695 # ok 109 Set VL 592
6005 13:53:41.871840 # ok 110 # SKIP Disabled ZA for VL 592
6006 13:53:41.872000 # ok 111 # SKIP Get and set data for VL 592
6007 13:53:41.872130 # ok 112 Set VL 608
6008 13:53:41.872252 # ok 113 # SKIP Disabled ZA for VL 608
6009 13:53:41.872370 # ok 114 # SKIP Get and set data for VL 608
6010 13:53:41.872483 # ok 115 Set VL 624
6011 13:53:41.872597 # ok 116 # SKIP Disabled ZA for VL 624
6012 13:53:41.872710 # ok 117 # SKIP Get and set data for VL 624
6013 13:53:41.872823 # ok 118 Set VL 640
6014 13:53:41.872936 # ok 119 # SKIP Disabled ZA for VL 640
6015 13:53:41.873050 # ok 120 # SKIP Get and set data for VL 640
6016 13:53:41.873164 # ok 121 Set VL 656
6017 13:53:41.873278 # ok 122 # SKIP Disabled ZA for VL 656
6018 13:53:41.873392 # ok 123 # SKIP Get and set data for VL 656
6019 13:53:41.873506 # ok 124 Set VL 672
6020 13:53:41.887425 # ok 125 # SKIP Disabled ZA for VL 672
6021 13:53:41.887718 # ok 126 # SKIP Get and set data for VL 672
6022 13:53:41.887901 # ok 127 Set VL 688
6023 13:53:41.888286 # ok 128 # SKIP Disabled ZA for VL 688
6024 13:53:41.888481 # ok 129 # SKIP Get and set data for VL 688
6025 13:53:41.888639 # ok 130 Set VL 704
6026 13:53:41.888804 # ok 131 # SKIP Disabled ZA for VL 704
6027 13:53:41.888972 # ok 132 # SKIP Get and set data for VL 704
6028 13:53:41.889131 # ok 133 Set VL 720
6029 13:53:41.889329 # ok 134 # SKIP Disabled ZA for VL 720
6030 13:53:41.889490 # ok 135 # SKIP Get and set data for VL 720
6031 13:53:41.889658 # ok 136 Set VL 736
6032 13:53:41.889823 # ok 137 # SKIP Disabled ZA for VL 736
6033 13:53:41.889979 # ok 138 # SKIP Get and set data for VL 736
6034 13:53:41.890132 # ok 139 Set VL 752
6035 13:53:41.890299 # ok 140 # SKIP Disabled ZA for VL 752
6036 13:53:41.890465 # ok 141 # SKIP Get and set data for VL 752
6037 13:53:41.890624 # ok 142 Set VL 768
6038 13:53:41.890814 # ok 143 # SKIP Disabled ZA for VL 768
6039 13:53:41.890957 # ok 144 # SKIP Get and set data for VL 768
6040 13:53:41.891105 # ok 145 Set VL 784
6041 13:53:41.891253 # ok 146 # SKIP Disabled ZA for VL 784
6042 13:53:41.891409 # ok 147 # SKIP Get and set data for VL 784
6043 13:53:41.891569 # ok 148 Set VL 800
6044 13:53:41.891719 # ok 149 # SKIP Disabled ZA for VL 800
6045 13:53:41.891863 # ok 150 # SKIP Get and set data for VL 800
6046 13:53:41.892073 # ok 151 Set VL 816
6047 13:53:41.892230 # ok 152 # SKIP Disabled ZA for VL 816
6048 13:53:41.892350 # ok 153 # SKIP Get and set data for VL 816
6049 13:53:41.892466 # ok 154 Set VL 832
6050 13:53:41.892580 # ok 155 # SKIP Disabled ZA for VL 832
6051 13:53:41.892696 # ok 156 # SKIP Get and set data for VL 832
6052 13:53:41.892810 # ok 157 Set VL 848
6053 13:53:41.892969 # ok 158 # SKIP Disabled ZA for VL 848
6054 13:53:41.893094 # ok 159 # SKIP Get and set data for VL 848
6055 13:53:41.893213 # ok 160 Set VL 864
6056 13:53:41.893327 # ok 161 # SKIP Disabled ZA for VL 864
6057 13:53:41.893442 # ok 162 # SKIP Get and set data for VL 864
6058 13:53:41.893556 # ok 163 Set VL 880
6059 13:53:41.893721 # ok 164 # SKIP Disabled ZA for VL 880
6060 13:53:41.893925 # ok 165 # SKIP Get and set data for VL 880
6061 13:53:41.894108 # ok 166 Set VL 896
6062 13:53:41.894289 # ok 167 # SKIP Disabled ZA for VL 896
6063 13:53:41.894470 # ok 168 # SKIP Get and set data for VL 896
6064 13:53:41.894653 # ok 169 Set VL 912
6065 13:53:41.901084 # ok 170 # SKIP Disabled ZA for VL 912
6066 13:53:41.901307 # ok 171 # SKIP Get and set data for VL 912
6067 13:53:41.901424 # ok 172 Set VL 928
6068 13:53:41.901520 # ok 173 # SKIP Disabled ZA for VL 928
6069 13:53:41.901610 # ok 174 # SKIP Get and set data for VL 928
6070 13:53:41.901709 # ok 175 Set VL 944
6071 13:53:41.901816 # ok 176 # SKIP Disabled ZA for VL 944
6072 13:53:41.901908 # ok 177 # SKIP Get and set data for VL 944
6073 13:53:41.901996 # ok 178 Set VL 960
6074 13:53:41.902082 # ok 179 # SKIP Disabled ZA for VL 960
6075 13:53:41.902183 # ok 180 # SKIP Get and set data for VL 960
6076 13:53:41.902270 # ok 181 Set VL 976
6077 13:53:41.902349 # ok 182 # SKIP Disabled ZA for VL 976
6078 13:53:41.902424 # ok 183 # SKIP Get and set data for VL 976
6079 13:53:41.902502 # ok 184 Set VL 992
6080 13:53:41.903067 # ok 185 # SKIP Disabled ZA for VL 992
6081 13:53:41.903297 # ok 186 # SKIP Get and set data for VL 992
6082 13:53:41.903444 # ok 187 Set VL 1008
6083 13:53:41.903779 # ok 188 # SKIP Disabled ZA for VL 1008
6084 13:53:41.903893 # ok 189 # SKIP Get and set data for VL 1008
6085 13:53:41.903991 # ok 190 Set VL 1024
6086 13:53:41.904082 # ok 191 # SKIP Disabled ZA for VL 1024
6087 13:53:41.904171 # ok 192 # SKIP Get and set data for VL 1024
6088 13:53:41.904262 # ok 193 Set VL 1040
6089 13:53:41.904563 # ok 194 # SKIP Disabled ZA for VL 1040
6090 13:53:41.904670 # ok 195 # SKIP Get and set data for VL 1040
6091 13:53:41.904764 # ok 196 Set VL 1056
6092 13:53:41.904852 # ok 197 # SKIP Disabled ZA for VL 1056
6093 13:53:41.904941 # ok 198 # SKIP Get and set data for VL 1056
6094 13:53:41.905032 # ok 199 Set VL 1072
6095 13:53:41.905122 # ok 200 # SKIP Disabled ZA for VL 1072
6096 13:53:41.905209 # ok 201 # SKIP Get and set data for VL 1072
6097 13:53:41.905297 # ok 202 Set VL 1088
6098 13:53:41.905384 # ok 203 # SKIP Disabled ZA for VL 1088
6099 13:53:41.905474 # ok 204 # SKIP Get and set data for VL 1088
6100 13:53:41.907270 # ok 205 Set VL 1104
6101 13:53:41.907433 # ok 206 # SKIP Disabled ZA for VL 1104
6102 13:53:41.907529 # ok 207 # SKIP Get and set data for VL 1104
6103 13:53:41.907620 # ok 208 Set VL 1120
6104 13:53:41.907725 # ok 209 # SKIP Disabled ZA for VL 1120
6105 13:53:41.907818 # ok 210 # SKIP Get and set data for VL 1120
6106 13:53:41.907928 # ok 211 Set VL 1136
6107 13:53:41.908019 # ok 212 # SKIP Disabled ZA for VL 1136
6108 13:53:41.908123 # ok 213 # SKIP Get and set data for VL 1136
6109 13:53:41.908412 # ok 214 Set VL 1152
6110 13:53:41.908526 # ok 215 # SKIP Disabled ZA for VL 1152
6111 13:53:41.908798 # ok 216 # SKIP Get and set data for VL 1152
6112 13:53:41.908971 # ok 217 Set VL 1168
6113 13:53:41.909138 # ok 218 # SKIP Disabled ZA for VL 1168
6114 13:53:41.909297 # ok 219 # SKIP Get and set data for VL 1168
6115 13:53:41.909451 # ok 220 Set VL 1184
6116 13:53:41.909622 # ok 221 # SKIP Disabled ZA for VL 1184
6117 13:53:41.909861 # ok 222 # SKIP Get and set data for VL 1184
6118 13:53:41.909998 # ok 223 Set VL 1200
6119 13:53:41.910158 # ok 224 # SKIP Disabled ZA for VL 1200
6120 13:53:41.910324 # ok 225 # SKIP Get and set data for VL 1200
6121 13:53:41.910508 # ok 226 Set VL 1216
6122 13:53:41.910694 # ok 227 # SKIP Disabled ZA for VL 1216
6123 13:53:41.910882 # ok 228 # SKIP Get and set data for VL 1216
6124 13:53:41.911099 # ok 229 Set VL 1232
6125 13:53:41.911246 # ok 230 # SKIP Disabled ZA for VL 1232
6126 13:53:41.911405 # ok 231 # SKIP Get and set data for VL 1232
6127 13:53:41.911591 # ok 232 Set VL 1248
6128 13:53:41.911732 # ok 233 # SKIP Disabled ZA for VL 1248
6129 13:53:41.911897 # ok 234 # SKIP Get and set data for VL 1248
6130 13:53:41.912051 # ok 235 Set VL 1264
6131 13:53:41.912179 # ok 236 # SKIP Disabled ZA for VL 1264
6132 13:53:41.912338 # ok 237 # SKIP Get and set data for VL 1264
6133 13:53:41.912460 # ok 238 Set VL 1280
6134 13:53:41.912623 # ok 239 # SKIP Disabled ZA for VL 1280
6135 13:53:41.912749 # ok 240 # SKIP Get and set data for VL 1280
6136 13:53:41.912871 # ok 241 Set VL 1296
6137 13:53:41.913000 # ok 242 # SKIP Disabled ZA for VL 1296
6138 13:53:41.913120 # ok 243 # SKIP Get and set data for VL 1296
6139 13:53:41.913235 # ok 244 Set VL 1312
6140 13:53:41.913361 # ok 245 # SKIP Disabled ZA for VL 1312
6141 13:53:41.913478 # ok 246 # SKIP Get and set data for VL 1312
6142 13:53:41.913593 # ok 247 Set VL 1328
6143 13:53:41.913733 # ok 248 # SKIP Disabled ZA for VL 1328
6144 13:53:41.913849 # ok 249 # SKIP Get and set data for VL 1328
6145 13:53:41.919298 # ok 250 Set VL 1344
6146 13:53:41.919836 # ok 251 # SKIP Disabled ZA for VL 1344
6147 13:53:41.919943 # ok 252 # SKIP Get and set data for VL 1344
6148 13:53:41.920024 # ok 253 Set VL 1360
6149 13:53:41.920099 # ok 254 # SKIP Disabled ZA for VL 1360
6150 13:53:41.920173 # ok 255 # SKIP Get and set data for VL 1360
6151 13:53:41.920247 # ok 256 Set VL 1376
6152 13:53:41.920334 # ok 257 # SKIP Disabled ZA for VL 1376
6153 13:53:41.965310 # ok 258 # SKIP Get and set data for VL 1376
6154 13:53:41.965552 # ok 259 Set VL 1392
6155 13:53:41.965859 # ok 260 # SKIP Disabled ZA for VL 1392
6156 13:53:41.966218 # ok 261 # SKIP Get and set data for VL 1392
6157 13:53:41.966319 # ok 262 Set VL 1408
6158 13:53:41.966409 # ok 263 # SKIP Disabled ZA for VL 1408
6159 13:53:41.966494 # ok 264 # SKIP Get and set data for VL 1408
6160 13:53:41.966577 # ok 265 Set VL 1424
6161 13:53:41.966658 # ok 266 # SKIP Disabled ZA for VL 1424
6162 13:53:41.966935 # ok 267 # SKIP Get and set data for VL 1424
6163 13:53:41.967034 # ok 268 Set VL 1440
6164 13:53:41.967117 # ok 269 # SKIP Disabled ZA for VL 1440
6165 13:53:41.967199 # ok 270 # SKIP Get and set data for VL 1440
6166 13:53:41.967280 # ok 271 Set VL 1456
6167 13:53:41.967363 # ok 272 # SKIP Disabled ZA for VL 1456
6168 13:53:41.967445 # ok 273 # SKIP Get and set data for VL 1456
6169 13:53:41.967522 # ok 274 Set VL 1472
6170 13:53:41.967605 # ok 275 # SKIP Disabled ZA for VL 1472
6171 13:53:41.967688 # ok 276 # SKIP Get and set data for VL 1472
6172 13:53:41.967767 # ok 277 Set VL 1488
6173 13:53:41.967841 # ok 278 # SKIP Disabled ZA for VL 1488
6174 13:53:41.967916 # ok 279 # SKIP Get and set data for VL 1488
6175 13:53:41.968007 # ok 280 Set VL 1504
6176 13:53:41.968081 # ok 281 # SKIP Disabled ZA for VL 1504
6177 13:53:41.968153 # ok 282 # SKIP Get and set data for VL 1504
6178 13:53:41.968224 # ok 283 Set VL 1520
6179 13:53:41.968295 # ok 284 # SKIP Disabled ZA for VL 1520
6180 13:53:41.968366 # ok 285 # SKIP Get and set data for VL 1520
6181 13:53:41.968437 # ok 286 Set VL 1536
6182 13:53:41.968508 # ok 287 # SKIP Disabled ZA for VL 1536
6183 13:53:41.968578 # ok 288 # SKIP Get and set data for VL 1536
6184 13:53:41.968651 # ok 289 Set VL 1552
6185 13:53:41.968722 # ok 290 # SKIP Disabled ZA for VL 1552
6186 13:53:41.982480 # ok 291 # SKIP Get and set data for VL 1552
6187 13:53:41.982800 # ok 292 Set VL 1568
6188 13:53:41.983222 # ok 293 # SKIP Disabled ZA for VL 1568
6189 13:53:41.983396 # ok 294 # SKIP Get and set data for VL 1568
6190 13:53:41.983563 # ok 295 Set VL 1584
6191 13:53:41.983737 # ok 296 # SKIP Disabled ZA for VL 1584
6192 13:53:41.983890 # ok 297 # SKIP Get and set data for VL 1584
6193 13:53:41.984033 # ok 298 Set VL 1600
6194 13:53:41.984175 # ok 299 # SKIP Disabled ZA for VL 1600
6195 13:53:41.984355 # ok 300 # SKIP Get and set data for VL 1600
6196 13:53:41.984492 # ok 301 Set VL 1616
6197 13:53:41.984636 # ok 302 # SKIP Disabled ZA for VL 1616
6198 13:53:41.984777 # ok 303 # SKIP Get and set data for VL 1616
6199 13:53:41.984918 # ok 304 Set VL 1632
6200 13:53:41.985058 # ok 305 # SKIP Disabled ZA for VL 1632
6201 13:53:41.999861 # ok 306 # SKIP Get and set data for VL 1632
6202 13:53:42.001715 # ok 307 Set VL 1648
6203 13:53:42.002233 # ok 308 # SKIP Disabled ZA for VL 1648
6204 13:53:42.002454 # ok 309 # SKIP Get and set data for VL 1648
6205 13:53:42.002612 # ok 310 Set VL 1664
6206 13:53:42.002799 # ok 311 # SKIP Disabled ZA for VL 1664
6207 13:53:42.002998 # ok 312 # SKIP Get and set data for VL 1664
6208 13:53:42.003305 # ok 313 Set VL 1680
6209 13:53:42.003475 # ok 314 # SKIP Disabled ZA for VL 1680
6210 13:53:42.003659 # ok 315 # SKIP Get and set data for VL 1680
6211 13:53:42.003837 # ok 316 Set VL 1696
6212 13:53:42.003969 # ok 317 # SKIP Disabled ZA for VL 1696
6213 13:53:42.004136 # ok 318 # SKIP Get and set data for VL 1696
6214 13:53:42.004261 # ok 319 Set VL 1712
6215 13:53:42.004378 # ok 320 # SKIP Disabled ZA for VL 1712
6216 13:53:42.004503 # ok 321 # SKIP Get and set data for VL 1712
6217 13:53:42.004620 # ok 322 Set VL 1728
6218 13:53:42.004733 # ok 323 # SKIP Disabled ZA for VL 1728
6219 13:53:42.004881 # ok 324 # SKIP Get and set data for VL 1728
6220 13:53:42.005003 # ok 325 Set VL 1744
6221 13:53:42.005118 # ok 326 # SKIP Disabled ZA for VL 1744
6222 13:53:42.005233 # ok 327 # SKIP Get and set data for VL 1744
6223 13:53:42.005349 # ok 328 Set VL 1760
6224 13:53:42.005462 # ok 329 # SKIP Disabled ZA for VL 1760
6225 13:53:42.005578 # ok 330 # SKIP Get and set data for VL 1760
6226 13:53:42.009286 # ok 331 Set VL 1776
6227 13:53:42.013804 # ok 332 # SKIP Disabled ZA for VL 1776
6228 13:53:42.014059 # ok 333 # SKIP Get and set data for VL 1776
6229 13:53:42.014188 # ok 334 Set VL 1792
6230 13:53:42.014304 # ok 335 # SKIP Disabled ZA for VL 1792
6231 13:53:42.014419 # ok 336 # SKIP Get and set data for VL 1792
6232 13:53:42.014533 # ok 337 Set VL 1808
6233 13:53:42.014646 # ok 338 # SKIP Disabled ZA for VL 1808
6234 13:53:42.014759 # ok 339 # SKIP Get and set data for VL 1808
6235 13:53:42.014872 # ok 340 Set VL 1824
6236 13:53:42.014986 # ok 341 # SKIP Disabled ZA for VL 1824
6237 13:53:42.015100 # ok 342 # SKIP Get and set data for VL 1824
6238 13:53:42.015213 # ok 343 Set VL 1840
6239 13:53:42.015326 # ok 344 # SKIP Disabled ZA for VL 1840
6240 13:53:42.015439 # ok 345 # SKIP Get and set data for VL 1840
6241 13:53:42.015553 # ok 346 Set VL 1856
6242 13:53:42.015667 # ok 347 # SKIP Disabled ZA for VL 1856
6243 13:53:42.015781 # ok 348 # SKIP Get and set data for VL 1856
6244 13:53:42.015895 # ok 349 Set VL 1872
6245 13:53:42.016007 # ok 350 # SKIP Disabled ZA for VL 1872
6246 13:53:42.016120 # ok 351 # SKIP Get and set data for VL 1872
6247 13:53:42.016234 # ok 352 Set VL 1888
6248 13:53:42.016350 # ok 353 # SKIP Disabled ZA for VL 1888
6249 13:53:42.016505 # ok 354 # SKIP Get and set data for VL 1888
6250 13:53:42.016674 # ok 355 Set VL 1904
6251 13:53:42.016876 # ok 356 # SKIP Disabled ZA for VL 1904
6252 13:53:42.017101 # ok 357 # SKIP Get and set data for VL 1904
6253 13:53:42.017981 # ok 358 Set VL 1920
6254 13:53:42.019062 # ok 359 # SKIP Disabled ZA for VL 1920
6255 13:53:42.019617 # ok 360 # SKIP Get and set data for VL 1920
6256 13:53:42.019722 # ok 361 Set VL 1936
6257 13:53:42.019810 # ok 362 # SKIP Disabled ZA for VL 1936
6258 13:53:42.019893 # ok 363 # SKIP Get and set data for VL 1936
6259 13:53:42.019969 # ok 364 Set VL 1952
6260 13:53:42.020057 # ok 365 # SKIP Disabled ZA for VL 1952
6261 13:53:42.020131 # ok 366 # SKIP Get and set data for VL 1952
6262 13:53:42.020201 # ok 367 Set VL 1968
6263 13:53:42.020271 # ok 368 # SKIP Disabled ZA for VL 1968
6264 13:53:42.021235 # ok 369 # SKIP Get and set data for VL 1968
6265 13:53:42.021531 # ok 370 Set VL 1984
6266 13:53:42.021626 # ok 371 # SKIP Disabled ZA for VL 1984
6267 13:53:42.021737 # ok 372 # SKIP Get and set data for VL 1984
6268 13:53:42.021825 # ok 373 Set VL 2000
6269 13:53:42.021909 # ok 374 # SKIP Disabled ZA for VL 2000
6270 13:53:42.022008 # ok 375 # SKIP Get and set data for VL 2000
6271 13:53:42.022095 # ok 376 Set VL 2016
6272 13:53:42.022196 # ok 377 # SKIP Disabled ZA for VL 2016
6273 13:53:42.022283 # ok 378 # SKIP Get and set data for VL 2016
6274 13:53:42.022382 # ok 379 Set VL 2032
6275 13:53:42.022468 # ok 380 # SKIP Disabled ZA for VL 2032
6276 13:53:42.022564 # ok 381 # SKIP Get and set data for VL 2032
6277 13:53:42.022664 # ok 382 Set VL 2048
6278 13:53:42.022762 # ok 383 # SKIP Disabled ZA for VL 2048
6279 13:53:42.022862 # ok 384 # SKIP Get and set data for VL 2048
6280 13:53:42.022965 # ok 385 Set VL 2064
6281 13:53:42.023062 # ok 386 # SKIP Disabled ZA for VL 2064
6282 13:53:42.023161 # ok 387 # SKIP Get and set data for VL 2064
6283 13:53:42.023447 # ok 388 Set VL 2080
6284 13:53:42.023548 # ok 389 # SKIP Disabled ZA for VL 2080
6285 13:53:42.023648 # ok 390 # SKIP Get and set data for VL 2080
6286 13:53:42.023735 # ok 391 Set VL 2096
6287 13:53:42.023820 # ok 392 # SKIP Disabled ZA for VL 2096
6288 13:53:42.023915 # ok 393 # SKIP Get and set data for VL 2096
6289 13:53:42.023995 # ok 394 Set VL 2112
6290 13:53:42.029155 # ok 395 # SKIP Disabled ZA for VL 2112
6291 13:53:42.029468 # ok 396 # SKIP Get and set data for VL 2112
6292 13:53:42.029942 # ok 397 Set VL 2128
6293 13:53:42.030144 # ok 398 # SKIP Disabled ZA for VL 2128
6294 13:53:42.030316 # ok 399 # SKIP Get and set data for VL 2128
6295 13:53:42.030484 # ok 400 Set VL 2144
6296 13:53:42.030646 # ok 401 # SKIP Disabled ZA for VL 2144
6297 13:53:42.030806 # ok 402 # SKIP Get and set data for VL 2144
6298 13:53:42.030972 # ok 403 Set VL 2160
6299 13:53:42.031138 # ok 404 # SKIP Disabled ZA for VL 2160
6300 13:53:42.031303 # ok 405 # SKIP Get and set data for VL 2160
6301 13:53:42.031765 # ok 406 Set VL 2176
6302 13:53:42.031920 # ok 407 # SKIP Disabled ZA for VL 2176
6303 13:53:42.032044 # ok 408 # SKIP Get and set data for VL 2176
6304 13:53:42.032165 # ok 409 Set VL 2192
6305 13:53:42.032283 # ok 410 # SKIP Disabled ZA for VL 2192
6306 13:53:42.032402 # ok 411 # SKIP Get and set data for VL 2192
6307 13:53:42.032520 # ok 412 Set VL 2208
6308 13:53:42.032637 # ok 413 # SKIP Disabled ZA for VL 2208
6309 13:53:42.032753 # ok 414 # SKIP Get and set data for VL 2208
6310 13:53:42.032871 # ok 415 Set VL 2224
6311 13:53:42.032988 # ok 416 # SKIP Disabled ZA for VL 2224
6312 13:53:42.033106 # ok 417 # SKIP Get and set data for VL 2224
6313 13:53:42.033224 # ok 418 Set VL 2240
6314 13:53:42.033339 # ok 419 # SKIP Disabled ZA for VL 2240
6315 13:53:42.033458 # ok 420 # SKIP Get and set data for VL 2240
6316 13:53:42.033574 # ok 421 Set VL 2256
6317 13:53:42.033718 # ok 422 # SKIP Disabled ZA for VL 2256
6318 13:53:42.033851 # ok 423 # SKIP Get and set data for VL 2256
6319 13:53:42.033971 # ok 424 Set VL 2272
6320 13:53:42.034088 # ok 425 # SKIP Disabled ZA for VL 2272
6321 13:53:42.034205 # ok 426 # SKIP Get and set data for VL 2272
6322 13:53:42.034321 # ok 427 Set VL 2288
6323 13:53:42.034437 # ok 428 # SKIP Disabled ZA for VL 2288
6324 13:53:42.037049 # ok 429 # SKIP Get and set data for VL 2288
6325 13:53:42.037669 # ok 430 Set VL 2304
6326 13:53:42.037885 # ok 431 # SKIP Disabled ZA for VL 2304
6327 13:53:42.038061 # ok 432 # SKIP Get and set data for VL 2304
6328 13:53:42.038210 # ok 433 Set VL 2320
6329 13:53:42.038353 # ok 434 # SKIP Disabled ZA for VL 2320
6330 13:53:42.039383 # ok 435 # SKIP Get and set data for VL 2320
6331 13:53:42.039607 # ok 436 Set VL 2336
6332 13:53:42.039820 # ok 437 # SKIP Disabled ZA for VL 2336
6333 13:53:42.040010 # ok 438 # SKIP Get and set data for VL 2336
6334 13:53:42.040168 # ok 439 Set VL 2352
6335 13:53:42.040320 # ok 440 # SKIP Disabled ZA for VL 2352
6336 13:53:42.040474 # ok 441 # SKIP Get and set data for VL 2352
6337 13:53:42.040625 # ok 442 Set VL 2368
6338 13:53:42.040774 # ok 443 # SKIP Disabled ZA for VL 2368
6339 13:53:42.040925 # ok 444 # SKIP Get and set data for VL 2368
6340 13:53:42.041077 # ok 445 Set VL 2384
6341 13:53:42.041230 # ok 446 # SKIP Disabled ZA for VL 2384
6342 13:53:42.041384 # ok 447 # SKIP Get and set data for VL 2384
6343 13:53:42.041544 # ok 448 Set VL 2400
6344 13:53:42.041712 # ok 449 # SKIP Disabled ZA for VL 2400
6345 13:53:42.041867 # ok 450 # SKIP Get and set data for VL 2400
6346 13:53:42.042017 # ok 451 Set VL 2416
6347 13:53:42.042161 # ok 452 # SKIP Disabled ZA for VL 2416
6348 13:53:42.042310 # ok 453 # SKIP Get and set data for VL 2416
6349 13:53:42.042441 # ok 454 Set VL 2432
6350 13:53:42.042559 # ok 455 # SKIP Disabled ZA for VL 2432
6351 13:53:42.042672 # ok 456 # SKIP Get and set data for VL 2432
6352 13:53:42.042788 # ok 457 Set VL 2448
6353 13:53:42.043119 # ok 458 # SKIP Disabled ZA for VL 2448
6354 13:53:42.043250 # ok 459 # SKIP Get and set data for VL 2448
6355 13:53:42.043370 # ok 460 Set VL 2464
6356 13:53:42.043488 # ok 461 # SKIP Disabled ZA for VL 2464
6357 13:53:42.043608 # ok 462 # SKIP Get and set data for VL 2464
6358 13:53:42.043726 # ok 463 Set VL 2480
6359 13:53:42.043878 # ok 464 # SKIP Disabled ZA for VL 2480
6360 13:53:42.049498 # ok 465 # SKIP Get and set data for VL 2480
6361 13:53:42.049949 # ok 466 Set VL 2496
6362 13:53:42.050056 # ok 467 # SKIP Disabled ZA for VL 2496
6363 13:53:42.050151 # ok 468 # SKIP Get and set data for VL 2496
6364 13:53:42.050233 # ok 469 Set VL 2512
6365 13:53:42.050319 # ok 470 # SKIP Disabled ZA for VL 2512
6366 13:53:42.050423 # ok 471 # SKIP Get and set data for VL 2512
6367 13:53:42.050513 # ok 472 Set VL 2528
6368 13:53:42.050601 # ok 473 # SKIP Disabled ZA for VL 2528
6369 13:53:42.050689 # ok 474 # SKIP Get and set data for VL 2528
6370 13:53:42.050791 # ok 475 Set VL 2544
6371 13:53:42.050879 # ok 476 # SKIP Disabled ZA for VL 2544
6372 13:53:42.050964 # ok 477 # SKIP Get and set data for VL 2544
6373 13:53:42.051050 # ok 478 Set VL 2560
6374 13:53:42.051151 # ok 479 # SKIP Disabled ZA for VL 2560
6375 13:53:42.051238 # ok 480 # SKIP Get and set data for VL 2560
6376 13:53:42.051325 # ok 481 Set VL 2576
6377 13:53:42.051425 # ok 482 # SKIP Disabled ZA for VL 2576
6378 13:53:42.051513 # ok 483 # SKIP Get and set data for VL 2576
6379 13:53:42.051600 # ok 484 Set VL 2592
6380 13:53:42.051701 # ok 485 # SKIP Disabled ZA for VL 2592
6381 13:53:42.051793 # ok 486 # SKIP Get and set data for VL 2592
6382 13:53:42.051889 # ok 487 Set VL 2608
6383 13:53:42.057220 # ok 488 # SKIP Disabled ZA for VL 2608
6384 13:53:42.057426 # ok 489 # SKIP Get and set data for VL 2608
6385 13:53:42.057520 # ok 490 Set VL 2624
6386 13:53:42.057904 # ok 491 # SKIP Disabled ZA for VL 2624
6387 13:53:42.058121 # ok 492 # SKIP Get and set data for VL 2624
6388 13:53:42.058323 # ok 493 Set VL 2640
6389 13:53:42.058544 # ok 494 # SKIP Disabled ZA for VL 2640
6390 13:53:42.058777 # ok 495 # SKIP Get and set data for VL 2640
6391 13:53:42.058967 # ok 496 Set VL 2656
6392 13:53:42.059163 # ok 497 # SKIP Disabled ZA for VL 2656
6393 13:53:42.059309 # ok 498 # SKIP Get and set data for VL 2656
6394 13:53:42.059468 # ok 499 Set VL 2672
6395 13:53:42.059638 # ok 500 # SKIP Disabled ZA for VL 2672
6396 13:53:42.059817 # ok 501 # SKIP Get and set data for VL 2672
6397 13:53:42.059941 # ok 502 Set VL 2688
6398 13:53:42.060055 # ok 503 # SKIP Disabled ZA for VL 2688
6399 13:53:42.060168 # ok 504 # SKIP Get and set data for VL 2688
6400 13:53:42.060281 # ok 505 Set VL 2704
6401 13:53:42.060394 # ok 506 # SKIP Disabled ZA for VL 2704
6402 13:53:42.060509 # ok 507 # SKIP Get and set data for VL 2704
6403 13:53:42.060624 # ok 508 Set VL 2720
6404 13:53:42.060736 # ok 509 # SKIP Disabled ZA for VL 2720
6405 13:53:42.060879 # ok 510 # SKIP Get and set data for VL 2720
6406 13:53:42.061002 # ok 511 Set VL 2736
6407 13:53:42.061119 # ok 512 # SKIP Disabled ZA for VL 2736
6408 13:53:42.061252 # ok 513 # SKIP Get and set data for VL 2736
6409 13:53:42.061410 # ok 514 Set VL 2752
6410 13:53:42.061543 # ok 515 # SKIP Disabled ZA for VL 2752
6411 13:53:42.065442 # ok 516 # SKIP Get and set data for VL 2752
6412 13:53:42.066354 # ok 517 Set VL 2768
6413 13:53:42.066533 # ok 518 # SKIP Disabled ZA for VL 2768
6414 13:53:42.066699 # ok 519 # SKIP Get and set data for VL 2768
6415 13:53:42.066859 # ok 520 Set VL 2784
6416 13:53:42.066986 # ok 521 # SKIP Disabled ZA for VL 2784
6417 13:53:42.067122 # ok 522 # SKIP Get and set data for VL 2784
6418 13:53:42.067258 # ok 523 Set VL 2800
6419 13:53:42.067383 # ok 524 # SKIP Disabled ZA for VL 2800
6420 13:53:42.067528 # ok 525 # SKIP Get and set data for VL 2800
6421 13:53:42.067650 # ok 526 Set VL 2816
6422 13:53:42.067768 # ok 527 # SKIP Disabled ZA for VL 2816
6423 13:53:42.067884 # ok 528 # SKIP Get and set data for VL 2816
6424 13:53:42.068009 # ok 529 Set VL 2832
6425 13:53:42.068127 # ok 530 # SKIP Disabled ZA for VL 2832
6426 13:53:42.068239 # ok 531 # SKIP Get and set data for VL 2832
6427 13:53:42.068352 # ok 532 Set VL 2848
6428 13:53:42.068465 # ok 533 # SKIP Disabled ZA for VL 2848
6429 13:53:42.068611 # ok 534 # SKIP Get and set data for VL 2848
6430 13:53:42.068786 # ok 535 Set VL 2864
6431 13:53:42.068935 # ok 536 # SKIP Disabled ZA for VL 2864
6432 13:53:42.069061 # ok 537 # SKIP Get and set data for VL 2864
6433 13:53:42.069196 # ok 538 Set VL 2880
6434 13:53:42.069330 # ok 539 # SKIP Disabled ZA for VL 2880
6435 13:53:42.069463 # ok 540 # SKIP Get and set data for VL 2880
6436 13:53:42.069596 # ok 541 Set VL 2896
6437 13:53:42.073443 # ok 542 # SKIP Disabled ZA for VL 2896
6438 13:53:42.074005 # ok 543 # SKIP Get and set data for VL 2896
6439 13:53:42.074210 # ok 544 Set VL 2912
6440 13:53:42.074378 # ok 545 # SKIP Disabled ZA for VL 2912
6441 13:53:42.074697 # ok 546 # SKIP Get and set data for VL 2912
6442 13:53:42.074892 # ok 547 Set VL 2928
6443 13:53:42.075093 # ok 548 # SKIP Disabled ZA for VL 2928
6444 13:53:42.075265 # ok 549 # SKIP Get and set data for VL 2928
6445 13:53:42.075433 # ok 550 Set VL 2944
6446 13:53:42.075603 # ok 551 # SKIP Disabled ZA for VL 2944
6447 13:53:42.075768 # ok 552 # SKIP Get and set data for VL 2944
6448 13:53:42.075905 # ok 553 Set VL 2960
6449 13:53:42.076023 # ok 554 # SKIP Disabled ZA for VL 2960
6450 13:53:42.076138 # ok 555 # SKIP Get and set data for VL 2960
6451 13:53:42.076253 # ok 556 Set VL 2976
6452 13:53:42.076403 # ok 557 # SKIP Disabled ZA for VL 2976
6453 13:53:42.076570 # ok 558 # SKIP Get and set data for VL 2976
6454 13:53:42.076736 # ok 559 Set VL 2992
6455 13:53:42.076897 # ok 560 # SKIP Disabled ZA for VL 2992
6456 13:53:42.077052 # ok 561 # SKIP Get and set data for VL 2992
6457 13:53:42.077208 # ok 562 Set VL 3008
6458 13:53:42.077335 # ok 563 # SKIP Disabled ZA for VL 3008
6459 13:53:42.077513 # ok 564 # SKIP Get and set data for VL 3008
6460 13:53:42.078356 # ok 565 Set VL 3024
6461 13:53:42.078553 # ok 566 # SKIP Disabled ZA for VL 3024
6462 13:53:42.078719 # ok 567 # SKIP Get and set data for VL 3024
6463 13:53:42.078862 # ok 568 Set VL 3040
6464 13:53:42.078984 # ok 569 # SKIP Disabled ZA for VL 3040
6465 13:53:42.079101 # ok 570 # SKIP Get and set data for VL 3040
6466 13:53:42.079220 # ok 571 Set VL 3056
6467 13:53:42.079339 # ok 572 # SKIP Disabled ZA for VL 3056
6468 13:53:42.079460 # ok 573 # SKIP Get and set data for VL 3056
6469 13:53:42.079580 # ok 574 Set VL 3072
6470 13:53:42.079734 # ok 575 # SKIP Disabled ZA for VL 3072
6471 13:53:42.079861 # ok 576 # SKIP Get and set data for VL 3072
6472 13:53:42.079976 # ok 577 Set VL 3088
6473 13:53:42.080090 # ok 578 # SKIP Disabled ZA for VL 3088
6474 13:53:42.080206 # ok 579 # SKIP Get and set data for VL 3088
6475 13:53:42.080353 # ok 580 Set VL 3104
6476 13:53:42.080474 # ok 581 # SKIP Disabled ZA for VL 3104
6477 13:53:42.080590 # ok 582 # SKIP Get and set data for VL 3104
6478 13:53:42.080705 # ok 583 Set VL 3120
6479 13:53:42.080821 # ok 584 # SKIP Disabled ZA for VL 3120
6480 13:53:42.080936 # ok 585 # SKIP Get and set data for VL 3120
6481 13:53:42.081052 # ok 586 Set VL 3136
6482 13:53:42.081167 # ok 587 # SKIP Disabled ZA for VL 3136
6483 13:53:42.081282 # ok 588 # SKIP Get and set data for VL 3136
6484 13:53:42.081396 # ok 589 Set VL 3152
6485 13:53:42.081541 # ok 590 # SKIP Disabled ZA for VL 3152
6486 13:53:42.086006 # ok 591 # SKIP Get and set data for VL 3152
6487 13:53:42.086483 # ok 592 Set VL 3168
6488 13:53:42.086598 # ok 593 # SKIP Disabled ZA for VL 3168
6489 13:53:42.086690 # ok 594 # SKIP Get and set data for VL 3168
6490 13:53:42.086764 # ok 595 Set VL 3184
6491 13:53:42.086850 # ok 596 # SKIP Disabled ZA for VL 3184
6492 13:53:42.086923 # ok 597 # SKIP Get and set data for VL 3184
6493 13:53:42.087003 # ok 598 Set VL 3200
6494 13:53:42.087082 # ok 599 # SKIP Disabled ZA for VL 3200
6495 13:53:42.087164 # ok 600 # SKIP Get and set data for VL 3200
6496 13:53:42.087251 # ok 601 Set VL 3216
6497 13:53:42.087351 # ok 602 # SKIP Disabled ZA for VL 3216
6498 13:53:42.087437 # ok 603 # SKIP Get and set data for VL 3216
6499 13:53:42.087519 # ok 604 Set VL 3232
6500 13:53:42.087601 # ok 605 # SKIP Disabled ZA for VL 3232
6501 13:53:42.087697 # ok 606 # SKIP Get and set data for VL 3232
6502 13:53:42.087784 # ok 607 Set VL 3248
6503 13:53:42.087869 # ok 608 # SKIP Disabled ZA for VL 3248
6504 13:53:42.087951 # ok 609 # SKIP Get and set data for VL 3248
6505 13:53:42.088034 # ok 610 Set VL 3264
6506 13:53:42.088132 # ok 611 # SKIP Disabled ZA for VL 3264
6507 13:53:42.088215 # ok 612 # SKIP Get and set data for VL 3264
6508 13:53:42.091493 # ok 613 Set VL 3280
6509 13:53:42.091969 # ok 614 # SKIP Disabled ZA for VL 3280
6510 13:53:42.092130 # ok 615 # SKIP Get and set data for VL 3280
6511 13:53:42.092255 # ok 616 Set VL 3296
6512 13:53:42.097041 # ok 617 # SKIP Disabled ZA for VL 3296
6513 13:53:42.097390 # ok 618 # SKIP Get and set data for VL 3296
6514 13:53:42.097914 # ok 619 Set VL 3312
6515 13:53:42.098069 # ok 620 # SKIP Disabled ZA for VL 3312
6516 13:53:42.098174 # ok 621 # SKIP Get and set data for VL 3312
6517 13:53:42.098259 # ok 622 Set VL 3328
6518 13:53:42.098344 # ok 623 # SKIP Disabled ZA for VL 3328
6519 13:53:42.098428 # ok 624 # SKIP Get and set data for VL 3328
6520 13:53:42.098511 # ok 625 Set VL 3344
6521 13:53:42.098599 # ok 626 # SKIP Disabled ZA for VL 3344
6522 13:53:42.098692 # ok 627 # SKIP Get and set data for VL 3344
6523 13:53:42.098763 # ok 628 Set VL 3360
6524 13:53:42.098832 # ok 629 # SKIP Disabled ZA for VL 3360
6525 13:53:42.098909 # ok 630 # SKIP Get and set data for VL 3360
6526 13:53:42.098991 # ok 631 Set VL 3376
6527 13:53:42.099071 # ok 632 # SKIP Disabled ZA for VL 3376
6528 13:53:42.099154 # ok 633 # SKIP Get and set data for VL 3376
6529 13:53:42.099237 # ok 634 Set VL 3392
6530 13:53:42.099337 # ok 635 # SKIP Disabled ZA for VL 3392
6531 13:53:42.099423 # ok 636 # SKIP Get and set data for VL 3392
6532 13:53:42.099506 # ok 637 Set VL 3408
6533 13:53:42.099588 # ok 638 # SKIP Disabled ZA for VL 3408
6534 13:53:42.099685 # ok 639 # SKIP Get and set data for VL 3408
6535 13:53:42.099771 # ok 640 Set VL 3424
6536 13:53:42.099853 # ok 641 # SKIP Disabled ZA for VL 3424
6537 13:53:42.099934 # ok 642 # SKIP Get and set data for VL 3424
6538 13:53:42.100016 # ok 643 Set VL 3440
6539 13:53:42.100090 # ok 644 # SKIP Disabled ZA for VL 3440
6540 13:53:42.100170 # ok 645 # SKIP Get and set data for VL 3440
6541 13:53:42.100240 # ok 646 Set VL 3456
6542 13:53:42.105180 # ok 647 # SKIP Disabled ZA for VL 3456
6543 13:53:42.105716 # ok 648 # SKIP Get and set data for VL 3456
6544 13:53:42.105923 # ok 649 Set VL 3472
6545 13:53:42.106110 # ok 650 # SKIP Disabled ZA for VL 3472
6546 13:53:42.106278 # ok 651 # SKIP Get and set data for VL 3472
6547 13:53:42.106427 # ok 652 Set VL 3488
6548 13:53:42.106594 # ok 653 # SKIP Disabled ZA for VL 3488
6549 13:53:42.106801 # ok 654 # SKIP Get and set data for VL 3488
6550 13:53:42.106958 # ok 655 Set VL 3504
6551 13:53:42.107132 # ok 656 # SKIP Disabled ZA for VL 3504
6552 13:53:42.107389 # ok 657 # SKIP Get and set data for VL 3504
6553 13:53:42.107652 # ok 658 Set VL 3520
6554 13:53:42.107903 # ok 659 # SKIP Disabled ZA for VL 3520
6555 13:53:42.108062 # ok 660 # SKIP Get and set data for VL 3520
6556 13:53:42.108208 # ok 661 Set VL 3536
6557 13:53:42.108350 # ok 662 # SKIP Disabled ZA for VL 3536
6558 13:53:42.108491 # ok 663 # SKIP Get and set data for VL 3536
6559 13:53:42.108634 # ok 664 Set VL 3552
6560 13:53:42.108775 # ok 665 # SKIP Disabled ZA for VL 3552
6561 13:53:42.108917 # ok 666 # SKIP Get and set data for VL 3552
6562 13:53:42.109099 # ok 667 Set VL 3568
6563 13:53:42.109238 # ok 668 # SKIP Disabled ZA for VL 3568
6564 13:53:42.109382 # ok 669 # SKIP Get and set data for VL 3568
6565 13:53:42.109526 # ok 670 Set VL 3584
6566 13:53:42.109679 # ok 671 # SKIP Disabled ZA for VL 3584
6567 13:53:42.109824 # ok 672 # SKIP Get and set data for VL 3584
6568 13:53:42.109966 # ok 673 Set VL 3600
6569 13:53:42.110106 # ok 674 # SKIP Disabled ZA for VL 3600
6570 13:53:42.110249 # ok 675 # SKIP Get and set data for VL 3600
6571 13:53:42.110392 # ok 676 Set VL 3616
6572 13:53:42.110533 # ok 677 # SKIP Disabled ZA for VL 3616
6573 13:53:42.112714 # ok 678 # SKIP Get and set data for VL 3616
6574 13:53:42.112899 # ok 679 Set VL 3632
6575 13:53:42.113248 # ok 680 # SKIP Disabled ZA for VL 3632
6576 13:53:42.113362 # ok 681 # SKIP Get and set data for VL 3632
6577 13:53:42.113449 # ok 682 Set VL 3648
6578 13:53:42.113531 # ok 683 # SKIP Disabled ZA for VL 3648
6579 13:53:42.113619 # ok 684 # SKIP Get and set data for VL 3648
6580 13:53:42.113713 # ok 685 Set VL 3664
6581 13:53:42.113818 # ok 686 # SKIP Disabled ZA for VL 3664
6582 13:53:42.113895 # ok 687 # SKIP Get and set data for VL 3664
6583 13:53:42.113963 # ok 688 Set VL 3680
6584 13:53:42.114031 # ok 689 # SKIP Disabled ZA for VL 3680
6585 13:53:42.114103 # ok 690 # SKIP Get and set data for VL 3680
6586 13:53:42.114185 # ok 691 Set VL 3696
6587 13:53:42.114269 # ok 692 # SKIP Disabled ZA for VL 3696
6588 13:53:42.114351 # ok 693 # SKIP Get and set data for VL 3696
6589 13:53:42.114448 # ok 694 Set VL 3712
6590 13:53:42.114534 # ok 695 # SKIP Disabled ZA for VL 3712
6591 13:53:42.114617 # ok 696 # SKIP Get and set data for VL 3712
6592 13:53:42.114700 # ok 697 Set VL 3728
6593 13:53:42.114781 # ok 698 # SKIP Disabled ZA for VL 3728
6594 13:53:42.114866 # ok 699 # SKIP Get and set data for VL 3728
6595 13:53:42.114947 # ok 700 Set VL 3744
6596 13:53:42.115028 # ok 701 # SKIP Disabled ZA for VL 3744
6597 13:53:42.115128 # ok 702 # SKIP Get and set data for VL 3744
6598 13:53:42.115213 # ok 703 Set VL 3760
6599 13:53:42.115290 # ok 704 # SKIP Disabled ZA for VL 3760
6600 13:53:42.115358 # ok 705 # SKIP Get and set data for VL 3760
6601 13:53:42.121775 # ok 706 Set VL 3776
6602 13:53:42.121990 # ok 707 # SKIP Disabled ZA for VL 3776
6603 13:53:42.122078 # ok 708 # SKIP Get and set data for VL 3776
6604 13:53:42.122160 # ok 709 Set VL 3792
6605 13:53:42.122244 # ok 710 # SKIP Disabled ZA for VL 3792
6606 13:53:42.122327 # ok 711 # SKIP Get and set data for VL 3792
6607 13:53:42.122397 # ok 712 Set VL 3808
6608 13:53:42.122465 # ok 713 # SKIP Disabled ZA for VL 3808
6609 13:53:42.122534 # ok 714 # SKIP Get and set data for VL 3808
6610 13:53:42.122610 # ok 715 Set VL 3824
6611 13:53:42.122693 # ok 716 # SKIP Disabled ZA for VL 3824
6612 13:53:42.133192 # ok 717 # SKIP Get and set data for VL 3824
6613 13:53:42.133542 # ok 718 Set VL 3840
6614 13:53:42.134073 # ok 719 # SKIP Disabled ZA for VL 3840
6615 13:53:42.134289 # ok 720 # SKIP Get and set data for VL 3840
6616 13:53:42.134518 # ok 721 Set VL 3856
6617 13:53:42.134721 # ok 722 # SKIP Disabled ZA for VL 3856
6618 13:53:42.134929 # ok 723 # SKIP Get and set data for VL 3856
6619 13:53:42.135105 # ok 724 Set VL 3872
6620 13:53:42.135265 # ok 725 # SKIP Disabled ZA for VL 3872
6621 13:53:42.135435 # ok 726 # SKIP Get and set data for VL 3872
6622 13:53:42.135648 # ok 727 Set VL 3888
6623 13:53:42.135820 # ok 728 # SKIP Disabled ZA for VL 3888
6624 13:53:42.135982 # ok 729 # SKIP Get and set data for VL 3888
6625 13:53:42.136179 # ok 730 Set VL 3904
6626 13:53:42.136352 # ok 731 # SKIP Disabled ZA for VL 3904
6627 13:53:42.136522 # ok 732 # SKIP Get and set data for VL 3904
6628 13:53:42.136707 # ok 733 Set VL 3920
6629 13:53:42.136894 # ok 734 # SKIP Disabled ZA for VL 3920
6630 13:53:42.137078 # ok 735 # SKIP Get and set data for VL 3920
6631 13:53:42.137262 # ok 736 Set VL 3936
6632 13:53:42.137445 # ok 737 # SKIP Disabled ZA for VL 3936
6633 13:53:42.137629 # ok 738 # SKIP Get and set data for VL 3936
6634 13:53:42.137832 # ok 739 Set VL 3952
6635 13:53:42.138015 # ok 740 # SKIP Disabled ZA for VL 3952
6636 13:53:42.138176 # ok 741 # SKIP Get and set data for VL 3952
6637 13:53:42.138366 # ok 742 Set VL 3968
6638 13:53:42.138509 # ok 743 # SKIP Disabled ZA for VL 3968
6639 13:53:42.149689 # ok 744 # SKIP Get and set data for VL 3968
6640 13:53:42.149922 # ok 745 Set VL 3984
6641 13:53:42.150274 # ok 746 # SKIP Disabled ZA for VL 3984
6642 13:53:42.150403 # ok 747 # SKIP Get and set data for VL 3984
6643 13:53:42.150494 # ok 748 Set VL 4000
6644 13:53:42.150570 # ok 749 # SKIP Disabled ZA for VL 4000
6645 13:53:42.150650 # ok 750 # SKIP Get and set data for VL 4000
6646 13:53:42.150723 # ok 751 Set VL 4016
6647 13:53:42.150803 # ok 752 # SKIP Disabled ZA for VL 4016
6648 13:53:42.150884 # ok 753 # SKIP Get and set data for VL 4016
6649 13:53:42.150962 # ok 754 Set VL 4032
6650 13:53:42.151058 # ok 755 # SKIP Disabled ZA for VL 4032
6651 13:53:42.151137 # ok 756 # SKIP Get and set data for VL 4032
6652 13:53:42.151213 # ok 757 Set VL 4048
6653 13:53:42.151289 # ok 758 # SKIP Disabled ZA for VL 4048
6654 13:53:42.151388 # ok 759 # SKIP Get and set data for VL 4048
6655 13:53:42.151470 # ok 760 Set VL 4064
6656 13:53:42.151553 # ok 761 # SKIP Disabled ZA for VL 4064
6657 13:53:42.151646 # ok 762 # SKIP Get and set data for VL 4064
6658 13:53:42.151730 # ok 763 Set VL 4080
6659 13:53:42.151826 # ok 764 # SKIP Disabled ZA for VL 4080
6660 13:53:42.151923 # ok 765 # SKIP Get and set data for VL 4080
6661 13:53:42.152000 # ok 766 Set VL 4096
6662 13:53:42.152077 # ok 767 # SKIP Disabled ZA for VL 4096
6663 13:53:42.161266 # ok 768 # SKIP Get and set data for VL 4096
6664 13:53:42.161507 # ok 769 Set VL 4112
6665 13:53:42.161597 # ok 770 # SKIP Disabled ZA for VL 4112
6666 13:53:42.161687 # ok 771 # SKIP Get and set data for VL 4112
6667 13:53:42.161785 # ok 772 Set VL 4128
6668 13:53:42.161865 # ok 773 # SKIP Disabled ZA for VL 4128
6669 13:53:42.161944 # ok 774 # SKIP Get and set data for VL 4128
6670 13:53:42.162039 # ok 775 Set VL 4144
6671 13:53:42.162134 # ok 776 # SKIP Disabled ZA for VL 4144
6672 13:53:42.162423 # ok 777 # SKIP Get and set data for VL 4144
6673 13:53:42.162533 # ok 778 Set VL 4160
6674 13:53:42.162637 # ok 779 # SKIP Disabled ZA for VL 4160
6675 13:53:42.162717 # ok 780 # SKIP Get and set data for VL 4160
6676 13:53:42.162807 # ok 781 Set VL 4176
6677 13:53:42.162897 # ok 782 # SKIP Disabled ZA for VL 4176
6678 13:53:42.162977 # ok 783 # SKIP Get and set data for VL 4176
6679 13:53:42.163051 # ok 784 Set VL 4192
6680 13:53:42.163142 # ok 785 # SKIP Disabled ZA for VL 4192
6681 13:53:42.163233 # ok 786 # SKIP Get and set data for VL 4192
6682 13:53:42.163331 # ok 787 Set VL 4208
6683 13:53:42.163618 # ok 788 # SKIP Disabled ZA for VL 4208
6684 13:53:42.163723 # ok 789 # SKIP Get and set data for VL 4208
6685 13:53:42.163822 # ok 790 Set VL 4224
6686 13:53:42.163905 # ok 791 # SKIP Disabled ZA for VL 4224
6687 13:53:42.177360 # ok 792 # SKIP Get and set data for VL 4224
6688 13:53:42.177557 # ok 793 Set VL 4240
6689 13:53:42.177858 # ok 794 # SKIP Disabled ZA for VL 4240
6690 13:53:42.177951 # ok 795 # SKIP Get and set data for VL 4240
6691 13:53:42.178033 # ok 796 Set VL 4256
6692 13:53:42.178122 # ok 797 # SKIP Disabled ZA for VL 4256
6693 13:53:42.178200 # ok 798 # SKIP Get and set data for VL 4256
6694 13:53:42.178275 # ok 799 Set VL 4272
6695 13:53:42.178363 # ok 800 # SKIP Disabled ZA for VL 4272
6696 13:53:42.178441 # ok 801 # SKIP Get and set data for VL 4272
6697 13:53:42.178556 # ok 802 Set VL 4288
6698 13:53:42.178647 # ok 803 # SKIP Disabled ZA for VL 4288
6699 13:53:42.178749 # ok 804 # SKIP Get and set data for VL 4288
6700 13:53:42.178830 # ok 805 Set VL 4304
6701 13:53:42.178929 # ok 806 # SKIP Disabled ZA for VL 4304
6702 13:53:42.179015 # ok 807 # SKIP Get and set data for VL 4304
6703 13:53:42.179114 # ok 808 Set VL 4320
6704 13:53:42.179199 # ok 809 # SKIP Disabled ZA for VL 4320
6705 13:53:42.179292 # ok 810 # SKIP Get and set data for VL 4320
6706 13:53:42.179368 # ok 811 Set VL 4336
6707 13:53:42.179442 # ok 812 # SKIP Disabled ZA for VL 4336
6708 13:53:42.179529 # ok 813 # SKIP Get and set data for VL 4336
6709 13:53:42.179605 # ok 814 Set VL 4352
6710 13:53:42.179690 # ok 815 # SKIP Disabled ZA for VL 4352
6711 13:53:42.179983 # ok 816 # SKIP Get and set data for VL 4352
6712 13:53:42.194883 # ok 817 Set VL 4368
6713 13:53:42.195162 # ok 818 # SKIP Disabled ZA for VL 4368
6714 13:53:42.195315 # ok 819 # SKIP Get and set data for VL 4368
6715 13:53:42.195440 # ok 820 Set VL 4384
6716 13:53:42.195557 # ok 821 # SKIP Disabled ZA for VL 4384
6717 13:53:42.198908 # ok 822 # SKIP Get and set data for VL 4384
6718 13:53:42.199228 # ok 823 Set VL 4400
6719 13:53:42.199786 # ok 824 # SKIP Disabled ZA for VL 4400
6720 13:53:42.199949 # ok 825 # SKIP Get and set data for VL 4400
6721 13:53:42.200109 # ok 826 Set VL 4416
6722 13:53:42.200244 # ok 827 # SKIP Disabled ZA for VL 4416
6723 13:53:42.200363 # ok 828 # SKIP Get and set data for VL 4416
6724 13:53:42.200480 # ok 829 Set VL 4432
6725 13:53:42.200610 # ok 830 # SKIP Disabled ZA for VL 4432
6726 13:53:42.200731 # ok 831 # SKIP Get and set data for VL 4432
6727 13:53:42.200847 # ok 832 Set VL 4448
6728 13:53:42.200961 # ok 833 # SKIP Disabled ZA for VL 4448
6729 13:53:42.205294 # ok 834 # SKIP Get and set data for VL 4448
6730 13:53:42.205612 # ok 835 Set VL 4464
6731 13:53:42.206278 # ok 836 # SKIP Disabled ZA for VL 4464
6732 13:53:42.206514 # ok 837 # SKIP Get and set data for VL 4464
6733 13:53:42.206715 # ok 838 Set VL 4480
6734 13:53:42.206933 # ok 839 # SKIP Disabled ZA for VL 4480
6735 13:53:42.208229 # ok 840 # SKIP Get and set data for VL 4480
6736 13:53:42.208385 # ok 841 Set VL 4496
6737 13:53:42.208508 # ok 842 # SKIP Disabled ZA for VL 4496
6738 13:53:42.208630 # ok 843 # SKIP Get and set data for VL 4496
6739 13:53:42.208790 # ok 844 Set VL 4512
6740 13:53:42.208920 # ok 845 # SKIP Disabled ZA for VL 4512
6741 13:53:42.209037 # ok 846 # SKIP Get and set data for VL 4512
6742 13:53:42.209152 # ok 847 Set VL 4528
6743 13:53:42.209305 # ok 848 # SKIP Disabled ZA for VL 4528
6744 13:53:42.209451 # ok 849 # SKIP Get and set data for VL 4528
6745 13:53:42.209630 # ok 850 Set VL 4544
6746 13:53:42.209805 # ok 851 # SKIP Disabled ZA for VL 4544
6747 13:53:42.209958 # ok 852 # SKIP Get and set data for VL 4544
6748 13:53:42.210111 # ok 853 Set VL 4560
6749 13:53:42.210261 # ok 854 # SKIP Disabled ZA for VL 4560
6750 13:53:42.210413 # ok 855 # SKIP Get and set data for VL 4560
6751 13:53:42.210566 # ok 856 Set VL 4576
6752 13:53:42.210718 # ok 857 # SKIP Disabled ZA for VL 4576
6753 13:53:42.210870 # ok 858 # SKIP Get and set data for VL 4576
6754 13:53:42.211017 # ok 859 Set VL 4592
6755 13:53:42.211155 # ok 860 # SKIP Disabled ZA for VL 4592
6756 13:53:42.211299 # ok 861 # SKIP Get and set data for VL 4592
6757 13:53:42.211443 # ok 862 Set VL 4608
6758 13:53:42.213684 # ok 863 # SKIP Disabled ZA for VL 4608
6759 13:53:42.213939 # ok 864 # SKIP Get and set data for VL 4608
6760 13:53:42.214123 # ok 865 Set VL 4624
6761 13:53:42.214597 # ok 866 # SKIP Disabled ZA for VL 4624
6762 13:53:42.214790 # ok 867 # SKIP Get and set data for VL 4624
6763 13:53:42.214966 # ok 868 Set VL 4640
6764 13:53:42.215112 # ok 869 # SKIP Disabled ZA for VL 4640
6765 13:53:42.215269 # ok 870 # SKIP Get and set data for VL 4640
6766 13:53:42.215461 # ok 871 Set VL 4656
6767 13:53:42.215640 # ok 872 # SKIP Disabled ZA for VL 4656
6768 13:53:42.215784 # ok 873 # SKIP Get and set data for VL 4656
6769 13:53:42.215907 # ok 874 Set VL 4672
6770 13:53:42.216022 # ok 875 # SKIP Disabled ZA for VL 4672
6771 13:53:42.216137 # ok 876 # SKIP Get and set data for VL 4672
6772 13:53:42.216287 # ok 877 Set VL 4688
6773 13:53:42.216411 # ok 878 # SKIP Disabled ZA for VL 4688
6774 13:53:42.216525 # ok 879 # SKIP Get and set data for VL 4688
6775 13:53:42.216640 # ok 880 Set VL 4704
6776 13:53:42.216758 # ok 881 # SKIP Disabled ZA for VL 4704
6777 13:53:42.216875 # ok 882 # SKIP Get and set data for VL 4704
6778 13:53:42.216988 # ok 883 Set VL 4720
6779 13:53:42.217103 # ok 884 # SKIP Disabled ZA for VL 4720
6780 13:53:42.217218 # ok 885 # SKIP Get and set data for VL 4720
6781 13:53:42.217333 # ok 886 Set VL 4736
6782 13:53:42.217445 # ok 887 # SKIP Disabled ZA for VL 4736
6783 13:53:42.217560 # ok 888 # SKIP Get and set data for VL 4736
6784 13:53:42.217721 # ok 889 Set VL 4752
6785 13:53:42.217925 # ok 890 # SKIP Disabled ZA for VL 4752
6786 13:53:42.218154 # ok 891 # SKIP Get and set data for VL 4752
6787 13:53:42.218345 # ok 892 Set VL 4768
6788 13:53:42.218518 # ok 893 # SKIP Disabled ZA for VL 4768
6789 13:53:42.218680 # ok 894 # SKIP Get and set data for VL 4768
6790 13:53:42.219163 # ok 895 Set VL 4784
6791 13:53:42.219353 # ok 896 # SKIP Disabled ZA for VL 4784
6792 13:53:42.219530 # ok 897 # SKIP Get and set data for VL 4784
6793 13:53:42.219732 # ok 898 Set VL 4800
6794 13:53:42.219947 # ok 899 # SKIP Disabled ZA for VL 4800
6795 13:53:42.220156 # ok 900 # SKIP Get and set data for VL 4800
6796 13:53:42.220327 # ok 901 Set VL 4816
6797 13:53:42.220458 # ok 902 # SKIP Disabled ZA for VL 4816
6798 13:53:42.220575 # ok 903 # SKIP Get and set data for VL 4816
6799 13:53:42.220690 # ok 904 Set VL 4832
6800 13:53:42.220801 # ok 905 # SKIP Disabled ZA for VL 4832
6801 13:53:42.220946 # ok 906 # SKIP Get and set data for VL 4832
6802 13:53:42.221067 # ok 907 Set VL 4848
6803 13:53:42.221182 # ok 908 # SKIP Disabled ZA for VL 4848
6804 13:53:42.221304 # ok 909 # SKIP Get and set data for VL 4848
6805 13:53:42.221463 # ok 910 Set VL 4864
6806 13:53:42.221716 # ok 911 # SKIP Disabled ZA for VL 4864
6807 13:53:42.221939 # ok 912 # SKIP Get and set data for VL 4864
6808 13:53:42.222144 # ok 913 Set VL 4880
6809 13:53:42.222369 # ok 914 # SKIP Disabled ZA for VL 4880
6810 13:53:42.222581 # ok 915 # SKIP Get and set data for VL 4880
6811 13:53:42.231677 # ok 916 Set VL 4896
6812 13:53:42.233061 # ok 917 # SKIP Disabled ZA for VL 4896
6813 13:53:42.233550 # ok 918 # SKIP Get and set data for VL 4896
6814 13:53:42.233814 # ok 919 Set VL 4912
6815 13:53:42.234061 # ok 920 # SKIP Disabled ZA for VL 4912
6816 13:53:42.234289 # ok 921 # SKIP Get and set data for VL 4912
6817 13:53:42.234468 # ok 922 Set VL 4928
6818 13:53:42.234663 # ok 923 # SKIP Disabled ZA for VL 4928
6819 13:53:42.234838 # ok 924 # SKIP Get and set data for VL 4928
6820 13:53:42.235010 # ok 925 Set VL 4944
6821 13:53:42.235180 # ok 926 # SKIP Disabled ZA for VL 4944
6822 13:53:42.235349 # ok 927 # SKIP Get and set data for VL 4944
6823 13:53:42.235517 # ok 928 Set VL 4960
6824 13:53:42.235696 # ok 929 # SKIP Disabled ZA for VL 4960
6825 13:53:42.235898 # ok 930 # SKIP Get and set data for VL 4960
6826 13:53:42.236100 # ok 931 Set VL 4976
6827 13:53:42.236316 # ok 932 # SKIP Disabled ZA for VL 4976
6828 13:53:42.236485 # ok 933 # SKIP Get and set data for VL 4976
6829 13:53:42.236611 # ok 934 Set VL 4992
6830 13:53:42.236769 # ok 935 # SKIP Disabled ZA for VL 4992
6831 13:53:42.236951 # ok 936 # SKIP Get and set data for VL 4992
6832 13:53:42.237095 # ok 937 Set VL 5008
6833 13:53:42.237215 # ok 938 # SKIP Disabled ZA for VL 5008
6834 13:53:42.237343 # ok 939 # SKIP Get and set data for VL 5008
6835 13:53:42.237459 # ok 940 Set VL 5024
6836 13:53:42.237572 # ok 941 # SKIP Disabled ZA for VL 5024
6837 13:53:42.237778 # ok 942 # SKIP Get and set data for VL 5024
6838 13:53:42.237977 # ok 943 Set VL 5040
6839 13:53:42.238160 # ok 944 # SKIP Disabled ZA for VL 5040
6840 13:53:42.238342 # ok 945 # SKIP Get and set data for VL 5040
6841 13:53:42.238524 # ok 946 Set VL 5056
6842 13:53:42.238700 # ok 947 # SKIP Disabled ZA for VL 5056
6843 13:53:42.238842 # ok 948 # SKIP Get and set data for VL 5056
6844 13:53:42.238984 # ok 949 Set VL 5072
6845 13:53:42.241027 # ok 950 # SKIP Disabled ZA for VL 5072
6846 13:53:42.241537 # ok 951 # SKIP Get and set data for VL 5072
6847 13:53:42.241964 # ok 952 Set VL 5088
6848 13:53:42.242351 # ok 953 # SKIP Disabled ZA for VL 5088
6849 13:53:42.242640 # ok 954 # SKIP Get and set data for VL 5088
6850 13:53:42.242807 # ok 955 Set VL 5104
6851 13:53:42.242934 # ok 956 # SKIP Disabled ZA for VL 5104
6852 13:53:42.243087 # ok 957 # SKIP Get and set data for VL 5104
6853 13:53:42.243218 # ok 958 Set VL 5120
6854 13:53:42.243351 # ok 959 # SKIP Disabled ZA for VL 5120
6855 13:53:42.243500 # ok 960 # SKIP Get and set data for VL 5120
6856 13:53:42.243641 # ok 961 Set VL 5136
6857 13:53:42.243847 # ok 962 # SKIP Disabled ZA for VL 5136
6858 13:53:42.245790 # ok 963 # SKIP Get and set data for VL 5136
6859 13:53:42.245999 # ok 964 Set VL 5152
6860 13:53:42.246166 # ok 965 # SKIP Disabled ZA for VL 5152
6861 13:53:42.246323 # ok 966 # SKIP Get and set data for VL 5152
6862 13:53:42.246474 # ok 967 Set VL 5168
6863 13:53:42.246594 # ok 968 # SKIP Disabled ZA for VL 5168
6864 13:53:42.246712 # ok 969 # SKIP Get and set data for VL 5168
6865 13:53:42.246828 # ok 970 Set VL 5184
6866 13:53:42.246956 # ok 971 # SKIP Disabled ZA for VL 5184
6867 13:53:42.247109 # ok 972 # SKIP Get and set data for VL 5184
6868 13:53:42.247227 # ok 973 Set VL 5200
6869 13:53:42.247344 # ok 974 # SKIP Disabled ZA for VL 5200
6870 13:53:42.247467 # ok 975 # SKIP Get and set data for VL 5200
6871 13:53:42.247585 # ok 976 Set VL 5216
6872 13:53:42.247700 # ok 977 # SKIP Disabled ZA for VL 5216
6873 13:53:42.247814 # ok 978 # SKIP Get and set data for VL 5216
6874 13:53:42.247937 # ok 979 Set VL 5232
6875 13:53:42.248077 # ok 980 # SKIP Disabled ZA for VL 5232
6876 13:53:42.248235 # ok 981 # SKIP Get and set data for VL 5232
6877 13:53:42.248367 # ok 982 Set VL 5248
6878 13:53:42.248521 # ok 983 # SKIP Disabled ZA for VL 5248
6879 13:53:42.248649 # ok 984 # SKIP Get and set data for VL 5248
6880 13:53:42.248775 # ok 985 Set VL 5264
6881 13:53:42.249673 # ok 986 # SKIP Disabled ZA for VL 5264
6882 13:53:42.249984 # ok 987 # SKIP Get and set data for VL 5264
6883 13:53:42.250091 # ok 988 Set VL 5280
6884 13:53:42.250192 # ok 989 # SKIP Disabled ZA for VL 5280
6885 13:53:42.250288 # ok 990 # SKIP Get and set data for VL 5280
6886 13:53:42.250368 # ok 991 Set VL 5296
6887 13:53:42.250646 # ok 992 # SKIP Disabled ZA for VL 5296
6888 13:53:42.250741 # ok 993 # SKIP Get and set data for VL 5296
6889 13:53:42.250821 # ok 994 Set VL 5312
6890 13:53:42.250907 # ok 995 # SKIP Disabled ZA for VL 5312
6891 13:53:42.251008 # ok 996 # SKIP Get and set data for VL 5312
6892 13:53:42.251095 # ok 997 Set VL 5328
6893 13:53:42.251179 # ok 998 # SKIP Disabled ZA for VL 5328
6894 13:53:42.251260 # ok 999 # SKIP Get and set data for VL 5328
6895 13:53:42.251360 # ok 1000 Set VL 5344
6896 13:53:42.251442 # ok 1001 # SKIP Disabled ZA for VL 5344
6897 13:53:42.251521 # ok 1002 # SKIP Get and set data for VL 5344
6898 13:53:42.251618 # ok 1003 Set VL 5360
6899 13:53:42.251699 # ok 1004 # SKIP Disabled ZA for VL 5360
6900 13:53:42.251795 # ok 1005 # SKIP Get and set data for VL 5360
6901 13:53:42.251883 # ok 1006 Set VL 5376
6902 13:53:42.257808 # ok 1007 # SKIP Disabled ZA for VL 5376
6903 13:53:42.258295 # ok 1008 # SKIP Get and set data for VL 5376
6904 13:53:42.258463 # ok 1009 Set VL 5392
6905 13:53:42.258609 # ok 1010 # SKIP Disabled ZA for VL 5392
6906 13:53:42.258763 # ok 1011 # SKIP Get and set data for VL 5392
6907 13:53:42.258897 # ok 1012 Set VL 5408
6908 13:53:42.259005 # ok 1013 # SKIP Disabled ZA for VL 5408
6909 13:53:42.259122 # ok 1014 # SKIP Get and set data for VL 5408
6910 13:53:42.259257 # ok 1015 Set VL 5424
6911 13:53:42.259371 # ok 1016 # SKIP Disabled ZA for VL 5424
6912 13:53:42.259480 # ok 1017 # SKIP Get and set data for VL 5424
6913 13:53:42.259606 # ok 1018 Set VL 5440
6914 13:53:42.259735 # ok 1019 # SKIP Disabled ZA for VL 5440
6915 13:53:42.259836 # ok 1020 # SKIP Get and set data for VL 5440
6916 13:53:42.259924 # ok 1021 Set VL 5456
6917 13:53:42.260023 # ok 1022 # SKIP Disabled ZA for VL 5456
6918 13:53:42.260181 # ok 1023 # SKIP Get and set data for VL 5456
6919 13:53:42.260283 # ok 1024 Set VL 5472
6920 13:53:42.260406 # ok 1025 # SKIP Disabled ZA for VL 5472
6921 13:53:42.260517 # ok 1026 # SKIP Get and set data for VL 5472
6922 13:53:42.260657 # ok 1027 Set VL 5488
6923 13:53:42.260838 # ok 1028 # SKIP Disabled ZA for VL 5488
6924 13:53:42.261004 # ok 1029 # SKIP Get and set data for VL 5488
6925 13:53:42.261215 # ok 1030 Set VL 5504
6926 13:53:42.261374 # ok 1031 # SKIP Disabled ZA for VL 5504
6927 13:53:42.261534 # ok 1032 # SKIP Get and set data for VL 5504
6928 13:53:42.262305 # ok 1033 Set VL 5520
6929 13:53:42.262464 # ok 1034 # SKIP Disabled ZA for VL 5520
6930 13:53:42.262597 # ok 1035 # SKIP Get and set data for VL 5520
6931 13:53:42.262743 # ok 1036 Set VL 5536
6932 13:53:42.262855 # ok 1037 # SKIP Disabled ZA for VL 5536
6933 13:53:42.262944 # ok 1038 # SKIP Get and set data for VL 5536
6934 13:53:42.263021 # ok 1039 Set VL 5552
6935 13:53:42.263094 # ok 1040 # SKIP Disabled ZA for VL 5552
6936 13:53:42.263169 # ok 1041 # SKIP Get and set data for VL 5552
6937 13:53:42.263242 # ok 1042 Set VL 5568
6938 13:53:42.263315 # ok 1043 # SKIP Disabled ZA for VL 5568
6939 13:53:42.263388 # ok 1044 # SKIP Get and set data for VL 5568
6940 13:53:42.263483 # ok 1045 Set VL 5584
6941 13:53:42.263555 # ok 1046 # SKIP Disabled ZA for VL 5584
6942 13:53:42.263628 # ok 1047 # SKIP Get and set data for VL 5584
6943 13:53:42.263702 # ok 1048 Set VL 5600
6944 13:53:42.263787 # ok 1049 # SKIP Disabled ZA for VL 5600
6945 13:53:42.263877 # ok 1050 # SKIP Get and set data for VL 5600
6946 13:53:42.263952 # ok 1051 Set VL 5616
6947 13:53:42.264026 # ok 1052 # SKIP Disabled ZA for VL 5616
6948 13:53:42.271240 # ok 1053 # SKIP Get and set data for VL 5616
6949 13:53:42.271518 # ok 1054 Set VL 5632
6950 13:53:42.271747 # ok 1055 # SKIP Disabled ZA for VL 5632
6951 13:53:42.272162 # ok 1056 # SKIP Get and set data for VL 5632
6952 13:53:42.272264 # ok 1057 Set VL 5648
6953 13:53:42.272335 # ok 1058 # SKIP Disabled ZA for VL 5648
6954 13:53:42.272397 # ok 1059 # SKIP Get and set data for VL 5648
6955 13:53:42.272457 # ok 1060 Set VL 5664
6956 13:53:42.277855 # ok 1061 # SKIP Disabled ZA for VL 5664
6957 13:53:42.278091 # ok 1062 # SKIP Get and set data for VL 5664
6958 13:53:42.278473 # ok 1063 Set VL 5680
6959 13:53:42.278660 # ok 1064 # SKIP Disabled ZA for VL 5680
6960 13:53:42.278798 # ok 1065 # SKIP Get and set data for VL 5680
6961 13:53:42.278939 # ok 1066 Set VL 5696
6962 13:53:42.279073 # ok 1067 # SKIP Disabled ZA for VL 5696
6963 13:53:42.279271 # ok 1068 # SKIP Get and set data for VL 5696
6964 13:53:42.279489 # ok 1069 Set VL 5712
6965 13:53:42.279644 # ok 1070 # SKIP Disabled ZA for VL 5712
6966 13:53:42.279751 # ok 1071 # SKIP Get and set data for VL 5712
6967 13:53:42.279843 # ok 1072 Set VL 5728
6968 13:53:42.279930 # ok 1073 # SKIP Disabled ZA for VL 5728
6969 13:53:42.280016 # ok 1074 # SKIP Get and set data for VL 5728
6970 13:53:42.280263 # ok 1075 Set VL 5744
6971 13:53:42.280362 # ok 1076 # SKIP Disabled ZA for VL 5744
6972 13:53:42.280449 # ok 1077 # SKIP Get and set data for VL 5744
6973 13:53:42.280556 # ok 1078 Set VL 5760
6974 13:53:42.280647 # ok 1079 # SKIP Disabled ZA for VL 5760
6975 13:53:42.280735 # ok 1080 # SKIP Get and set data for VL 5760
6976 13:53:42.280829 # ok 1081 Set VL 5776
6977 13:53:42.286473 # ok 1082 # SKIP Disabled ZA for VL 5776
6978 13:53:42.286725 # ok 1083 # SKIP Get and set data for VL 5776
6979 13:53:42.286968 # ok 1084 Set VL 5792
6980 13:53:42.287202 # ok 1085 # SKIP Disabled ZA for VL 5792
6981 13:53:42.287370 # ok 1086 # SKIP Get and set data for VL 5792
6982 13:53:42.287564 # ok 1087 Set VL 5808
6983 13:53:42.287748 # ok 1088 # SKIP Disabled ZA for VL 5808
6984 13:53:42.287931 # ok 1089 # SKIP Get and set data for VL 5808
6985 13:53:42.288075 # ok 1090 Set VL 5824
6986 13:53:42.288170 # ok 1091 # SKIP Disabled ZA for VL 5824
6987 13:53:42.288282 # ok 1092 # SKIP Get and set data for VL 5824
6988 13:53:42.288371 # ok 1093 Set VL 5840
6989 13:53:42.288464 # ok 1094 # SKIP Disabled ZA for VL 5840
6990 13:53:42.288554 # ok 1095 # SKIP Get and set data for VL 5840
6991 13:53:42.288639 # ok 1096 Set VL 5856
6992 13:53:42.288725 # ok 1097 # SKIP Disabled ZA for VL 5856
6993 13:53:42.288817 # ok 1098 # SKIP Get and set data for VL 5856
6994 13:53:42.288904 # ok 1099 Set VL 5872
6995 13:53:42.288991 # ok 1100 # SKIP Disabled ZA for VL 5872
6996 13:53:42.289080 # ok 1101 # SKIP Get and set data for VL 5872
6997 13:53:42.289167 # ok 1102 Set VL 5888
6998 13:53:42.289252 # ok 1103 # SKIP Disabled ZA for VL 5888
6999 13:53:42.289338 # ok 1104 # SKIP Get and set data for VL 5888
7000 13:53:42.289423 # ok 1105 Set VL 5904
7001 13:53:42.289509 # ok 1106 # SKIP Disabled ZA for VL 5904
7002 13:53:42.289596 # ok 1107 # SKIP Get and set data for VL 5904
7003 13:53:42.289688 # ok 1108 Set VL 5920
7004 13:53:42.293918 # ok 1109 # SKIP Disabled ZA for VL 5920
7005 13:53:42.294107 # ok 1110 # SKIP Get and set data for VL 5920
7006 13:53:42.294201 # ok 1111 Set VL 5936
7007 13:53:42.294309 # ok 1112 # SKIP Disabled ZA for VL 5936
7008 13:53:42.294403 # ok 1113 # SKIP Get and set data for VL 5936
7009 13:53:42.294491 # ok 1114 Set VL 5952
7010 13:53:42.294579 # ok 1115 # SKIP Disabled ZA for VL 5952
7011 13:53:42.294685 # ok 1116 # SKIP Get and set data for VL 5952
7012 13:53:42.294775 # ok 1117 Set VL 5968
7013 13:53:42.294883 # ok 1118 # SKIP Disabled ZA for VL 5968
7014 13:53:42.294997 # ok 1119 # SKIP Get and set data for VL 5968
7015 13:53:42.295358 # ok 1120 Set VL 5984
7016 13:53:42.295443 # ok 1121 # SKIP Disabled ZA for VL 5984
7017 13:53:42.295521 # ok 1122 # SKIP Get and set data for VL 5984
7018 13:53:42.295596 # ok 1123 Set VL 6000
7019 13:53:42.295668 # ok 1124 # SKIP Disabled ZA for VL 6000
7020 13:53:42.295893 # ok 1125 # SKIP Get and set data for VL 6000
7021 13:53:42.295997 # ok 1126 Set VL 6016
7022 13:53:42.296257 # ok 1127 # SKIP Disabled ZA for VL 6016
7023 13:53:42.296354 # ok 1128 # SKIP Get and set data for VL 6016
7024 13:53:42.296442 # ok 1129 Set VL 6032
7025 13:53:42.296517 # ok 1130 # SKIP Disabled ZA for VL 6032
7026 13:53:42.296590 # ok 1131 # SKIP Get and set data for VL 6032
7027 13:53:42.296662 # ok 1132 Set VL 6048
7028 13:53:42.299677 # ok 1133 # SKIP Disabled ZA for VL 6048
7029 13:53:42.299833 # ok 1134 # SKIP Get and set data for VL 6048
7030 13:53:42.299939 # ok 1135 Set VL 6064
7031 13:53:42.300032 # ok 1136 # SKIP Disabled ZA for VL 6064
7032 13:53:42.305374 # ok 1137 # SKIP Get and set data for VL 6064
7033 13:53:42.305557 # ok 1138 Set VL 6080
7034 13:53:42.305879 # ok 1139 # SKIP Disabled ZA for VL 6080
7035 13:53:42.306024 # ok 1140 # SKIP Get and set data for VL 6080
7036 13:53:42.306157 # ok 1141 Set VL 6096
7037 13:53:42.306267 # ok 1142 # SKIP Disabled ZA for VL 6096
7038 13:53:42.306419 # ok 1143 # SKIP Get and set data for VL 6096
7039 13:53:42.306546 # ok 1144 Set VL 6112
7040 13:53:42.306663 # ok 1145 # SKIP Disabled ZA for VL 6112
7041 13:53:42.306754 # ok 1146 # SKIP Get and set data for VL 6112
7042 13:53:42.306840 # ok 1147 Set VL 6128
7043 13:53:42.306953 # ok 1148 # SKIP Disabled ZA for VL 6128
7044 13:53:42.307045 # ok 1149 # SKIP Get and set data for VL 6128
7045 13:53:42.307135 # ok 1150 Set VL 6144
7046 13:53:42.307226 # ok 1151 # SKIP Disabled ZA for VL 6144
7047 13:53:42.307332 # ok 1152 # SKIP Get and set data for VL 6144
7048 13:53:42.307425 # ok 1153 Set VL 6160
7049 13:53:42.307512 # ok 1154 # SKIP Disabled ZA for VL 6160
7050 13:53:42.307597 # ok 1155 # SKIP Get and set data for VL 6160
7051 13:53:42.307682 # ok 1156 Set VL 6176
7052 13:53:42.307784 # ok 1157 # SKIP Disabled ZA for VL 6176
7053 13:53:42.307873 # ok 1158 # SKIP Get and set data for VL 6176
7054 13:53:42.307959 # ok 1159 Set VL 6192
7055 13:53:42.308044 # ok 1160 # SKIP Disabled ZA for VL 6192
7056 13:53:42.310778 # ok 1161 # SKIP Get and set data for VL 6192
7057 13:53:42.311033 # ok 1162 Set VL 6208
7058 13:53:42.311483 # ok 1163 # SKIP Disabled ZA for VL 6208
7059 13:53:42.311703 # ok 1164 # SKIP Get and set data for VL 6208
7060 13:53:42.311855 # ok 1165 Set VL 6224
7061 13:53:42.311949 # ok 1166 # SKIP Disabled ZA for VL 6224
7062 13:53:42.312038 # ok 1167 # SKIP Get and set data for VL 6224
7063 13:53:42.312140 # ok 1168 Set VL 6240
7064 13:53:42.312273 # ok 1169 # SKIP Disabled ZA for VL 6240
7065 13:53:42.312414 # ok 1170 # SKIP Get and set data for VL 6240
7066 13:53:42.312540 # ok 1171 Set VL 6256
7067 13:53:42.312743 # ok 1172 # SKIP Disabled ZA for VL 6256
7068 13:53:42.312889 # ok 1173 # SKIP Get and set data for VL 6256
7069 13:53:42.313003 # ok 1174 Set VL 6272
7070 13:53:42.313134 # ok 1175 # SKIP Disabled ZA for VL 6272
7071 13:53:42.313235 # ok 1176 # SKIP Get and set data for VL 6272
7072 13:53:42.313335 # ok 1177 Set VL 6288
7073 13:53:42.313434 # ok 1178 # SKIP Disabled ZA for VL 6288
7074 13:53:42.313531 # ok 1179 # SKIP Get and set data for VL 6288
7075 13:53:42.313627 # ok 1180 Set VL 6304
7076 13:53:42.313753 # ok 1181 # SKIP Disabled ZA for VL 6304
7077 13:53:42.313843 # ok 1182 # SKIP Get and set data for VL 6304
7078 13:53:42.313924 # ok 1183 Set VL 6320
7079 13:53:42.314002 # ok 1184 # SKIP Disabled ZA for VL 6320
7080 13:53:42.314092 # ok 1185 # SKIP Get and set data for VL 6320
7081 13:53:42.314171 # ok 1186 Set VL 6336
7082 13:53:42.314490 # ok 1187 # SKIP Disabled ZA for VL 6336
7083 13:53:42.314757 # ok 1188 # SKIP Get and set data for VL 6336
7084 13:53:42.314991 # ok 1189 Set VL 6352
7085 13:53:42.315148 # ok 1190 # SKIP Disabled ZA for VL 6352
7086 13:53:42.315552 # ok 1191 # SKIP Get and set data for VL 6352
7087 13:53:42.315664 # ok 1192 Set VL 6368
7088 13:53:42.315759 # ok 1193 # SKIP Disabled ZA for VL 6368
7089 13:53:42.315850 # ok 1194 # SKIP Get and set data for VL 6368
7090 13:53:42.315937 # ok 1195 Set VL 6384
7091 13:53:42.316024 # ok 1196 # SKIP Disabled ZA for VL 6384
7092 13:53:42.316113 # ok 1197 # SKIP Get and set data for VL 6384
7093 13:53:42.316203 # ok 1198 Set VL 6400
7094 13:53:42.316292 # ok 1199 # SKIP Disabled ZA for VL 6400
7095 13:53:42.316379 # ok 1200 # SKIP Get and set data for VL 6400
7096 13:53:42.316467 # ok 1201 Set VL 6416
7097 13:53:42.316556 # ok 1202 # SKIP Disabled ZA for VL 6416
7098 13:53:42.316643 # ok 1203 # SKIP Get and set data for VL 6416
7099 13:53:42.316734 # ok 1204 Set VL 6432
7100 13:53:42.317020 # ok 1205 # SKIP Disabled ZA for VL 6432
7101 13:53:42.317121 # ok 1206 # SKIP Get and set data for VL 6432
7102 13:53:42.317213 # ok 1207 Set VL 6448
7103 13:53:42.320812 # ok 1208 # SKIP Disabled ZA for VL 6448
7104 13:53:42.320993 # ok 1209 # SKIP Get and set data for VL 6448
7105 13:53:42.321085 # ok 1210 Set VL 6464
7106 13:53:42.321175 # ok 1211 # SKIP Disabled ZA for VL 6464
7107 13:53:42.321288 # ok 1212 # SKIP Get and set data for VL 6464
7108 13:53:42.321380 # ok 1213 Set VL 6480
7109 13:53:42.321467 # ok 1214 # SKIP Disabled ZA for VL 6480
7110 13:53:42.321553 # ok 1215 # SKIP Get and set data for VL 6480
7111 13:53:42.321639 # ok 1216 Set VL 6496
7112 13:53:42.321737 # ok 1217 # SKIP Disabled ZA for VL 6496
7113 13:53:42.321849 # ok 1218 # SKIP Get and set data for VL 6496
7114 13:53:42.321946 # ok 1219 Set VL 6512
7115 13:53:42.322036 # ok 1220 # SKIP Disabled ZA for VL 6512
7116 13:53:42.322122 # ok 1221 # SKIP Get and set data for VL 6512
7117 13:53:42.322208 # ok 1222 Set VL 6528
7118 13:53:42.322315 # ok 1223 # SKIP Disabled ZA for VL 6528
7119 13:53:42.322406 # ok 1224 # SKIP Get and set data for VL 6528
7120 13:53:42.322492 # ok 1225 Set VL 6544
7121 13:53:42.322579 # ok 1226 # SKIP Disabled ZA for VL 6544
7122 13:53:42.322678 # ok 1227 # SKIP Get and set data for VL 6544
7123 13:53:42.322760 # ok 1228 Set VL 6560
7124 13:53:42.322840 # ok 1229 # SKIP Disabled ZA for VL 6560
7125 13:53:42.322942 # ok 1230 # SKIP Get and set data for VL 6560
7126 13:53:42.323026 # ok 1231 Set VL 6576
7127 13:53:42.323117 # ok 1232 # SKIP Disabled ZA for VL 6576
7128 13:53:42.323411 # ok 1233 # SKIP Get and set data for VL 6576
7129 13:53:42.323719 # ok 1234 Set VL 6592
7130 13:53:42.323807 # ok 1235 # SKIP Disabled ZA for VL 6592
7131 13:53:42.325390 # ok 1236 # SKIP Get and set data for VL 6592
7132 13:53:42.325488 # ok 1237 Set VL 6608
7133 13:53:42.325554 # ok 1238 # SKIP Disabled ZA for VL 6608
7134 13:53:42.325616 # ok 1239 # SKIP Get and set data for VL 6608
7135 13:53:42.325691 # ok 1240 Set VL 6624
7136 13:53:42.334061 # ok 1241 # SKIP Disabled ZA for VL 6624
7137 13:53:42.334488 # ok 1242 # SKIP Get and set data for VL 6624
7138 13:53:42.334600 # ok 1243 Set VL 6640
7139 13:53:42.334691 # ok 1244 # SKIP Disabled ZA for VL 6640
7140 13:53:42.334772 # ok 1245 # SKIP Get and set data for VL 6640
7141 13:53:42.334865 # ok 1246 Set VL 6656
7142 13:53:42.334975 # ok 1247 # SKIP Disabled ZA for VL 6656
7143 13:53:42.335068 # ok 1248 # SKIP Get and set data for VL 6656
7144 13:53:42.335160 # ok 1249 Set VL 6672
7145 13:53:42.335248 # ok 1250 # SKIP Disabled ZA for VL 6672
7146 13:53:42.335335 # ok 1251 # SKIP Get and set data for VL 6672
7147 13:53:42.335441 # ok 1252 Set VL 6688
7148 13:53:42.335530 # ok 1253 # SKIP Disabled ZA for VL 6688
7149 13:53:42.335617 # ok 1254 # SKIP Get and set data for VL 6688
7150 13:53:42.335705 # ok 1255 Set VL 6704
7151 13:53:42.335811 # ok 1256 # SKIP Disabled ZA for VL 6704
7152 13:53:42.335898 # ok 1257 # SKIP Get and set data for VL 6704
7153 13:53:42.335990 # ok 1258 Set VL 6720
7154 13:53:42.336075 # ok 1259 # SKIP Disabled ZA for VL 6720
7155 13:53:42.336480 # ok 1260 # SKIP Get and set data for VL 6720
7156 13:53:42.336587 # ok 1261 Set VL 6736
7157 13:53:42.336678 # ok 1262 # SKIP Disabled ZA for VL 6736
7158 13:53:42.336764 # ok 1263 # SKIP Get and set data for VL 6736
7159 13:53:42.336870 # ok 1264 Set VL 6752
7160 13:53:42.336966 # ok 1265 # SKIP Disabled ZA for VL 6752
7161 13:53:42.337052 # ok 1266 # SKIP Get and set data for VL 6752
7162 13:53:42.337138 # ok 1267 Set VL 6768
7163 13:53:42.337222 # ok 1268 # SKIP Disabled ZA for VL 6768
7164 13:53:42.337326 # ok 1269 # SKIP Get and set data for VL 6768
7165 13:53:42.337418 # ok 1270 Set VL 6784
7166 13:53:42.337506 # ok 1271 # SKIP Disabled ZA for VL 6784
7167 13:53:42.337591 # ok 1272 # SKIP Get and set data for VL 6784
7168 13:53:42.337708 # ok 1273 Set VL 6800
7169 13:53:42.337798 # ok 1274 # SKIP Disabled ZA for VL 6800
7170 13:53:42.337902 # ok 1275 # SKIP Get and set data for VL 6800
7171 13:53:42.337998 # ok 1276 Set VL 6816
7172 13:53:42.338084 # ok 1277 # SKIP Disabled ZA for VL 6816
7173 13:53:42.339154 # ok 1278 # SKIP Get and set data for VL 6816
7174 13:53:42.339264 # ok 1279 Set VL 6832
7175 13:53:42.339366 # ok 1280 # SKIP Disabled ZA for VL 6832
7176 13:53:42.339451 # ok 1281 # SKIP Get and set data for VL 6832
7177 13:53:42.339533 # ok 1282 Set VL 6848
7178 13:53:42.339628 # ok 1283 # SKIP Disabled ZA for VL 6848
7179 13:53:42.339697 # ok 1284 # SKIP Get and set data for VL 6848
7180 13:53:42.339758 # ok 1285 Set VL 6864
7181 13:53:42.346922 # ok 1286 # SKIP Disabled ZA for VL 6864
7182 13:53:42.348000 # ok 1287 # SKIP Get and set data for VL 6864
7183 13:53:42.348113 # ok 1288 Set VL 6880
7184 13:53:42.348202 # ok 1289 # SKIP Disabled ZA for VL 6880
7185 13:53:42.348284 # ok 1290 # SKIP Get and set data for VL 6880
7186 13:53:42.348360 # ok 1291 Set VL 6896
7187 13:53:42.348435 # ok 1292 # SKIP Disabled ZA for VL 6896
7188 13:53:42.348507 # ok 1293 # SKIP Get and set data for VL 6896
7189 13:53:42.348580 # ok 1294 Set VL 6912
7190 13:53:42.348654 # ok 1295 # SKIP Disabled ZA for VL 6912
7191 13:53:42.348728 # ok 1296 # SKIP Get and set data for VL 6912
7192 13:53:42.348817 # ok 1297 Set VL 6928
7193 13:53:42.348891 # ok 1298 # SKIP Disabled ZA for VL 6928
7194 13:53:42.348970 # ok 1299 # SKIP Get and set data for VL 6928
7195 13:53:42.349045 # ok 1300 Set VL 6944
7196 13:53:42.349326 # ok 1301 # SKIP Disabled ZA for VL 6944
7197 13:53:42.349431 # ok 1302 # SKIP Get and set data for VL 6944
7198 13:53:42.349517 # ok 1303 Set VL 6960
7199 13:53:42.349601 # ok 1304 # SKIP Disabled ZA for VL 6960
7200 13:53:42.349709 # ok 1305 # SKIP Get and set data for VL 6960
7201 13:53:42.349789 # ok 1306 Set VL 6976
7202 13:53:42.349865 # ok 1307 # SKIP Disabled ZA for VL 6976
7203 13:53:42.349942 # ok 1308 # SKIP Get and set data for VL 6976
7204 13:53:42.350035 # ok 1309 Set VL 6992
7205 13:53:42.350111 # ok 1310 # SKIP Disabled ZA for VL 6992
7206 13:53:42.350192 # ok 1311 # SKIP Get and set data for VL 6992
7207 13:53:42.350268 # ok 1312 Set VL 7008
7208 13:53:42.350549 # ok 1313 # SKIP Disabled ZA for VL 7008
7209 13:53:42.350668 # ok 1314 # SKIP Get and set data for VL 7008
7210 13:53:42.350756 # ok 1315 Set VL 7024
7211 13:53:42.350836 # ok 1316 # SKIP Disabled ZA for VL 7024
7212 13:53:42.350939 # ok 1317 # SKIP Get and set data for VL 7024
7213 13:53:42.351025 # ok 1318 Set VL 7040
7214 13:53:42.351122 # ok 1319 # SKIP Disabled ZA for VL 7040
7215 13:53:42.351220 # ok 1320 # SKIP Get and set data for VL 7040
7216 13:53:42.351321 # ok 1321 Set VL 7056
7217 13:53:42.351444 # ok 1322 # SKIP Disabled ZA for VL 7056
7218 13:53:42.351546 # ok 1323 # SKIP Get and set data for VL 7056
7219 13:53:42.351652 # ok 1324 Set VL 7072
7220 13:53:42.351737 # ok 1325 # SKIP Disabled ZA for VL 7072
7221 13:53:42.351805 # ok 1326 # SKIP Get and set data for VL 7072
7222 13:53:42.351865 # ok 1327 Set VL 7088
7223 13:53:42.351922 # ok 1328 # SKIP Disabled ZA for VL 7088
7224 13:53:42.351995 # ok 1329 # SKIP Get and set data for VL 7088
7225 13:53:42.352057 # ok 1330 Set VL 7104
7226 13:53:42.369346 # ok 1331 # SKIP Disabled ZA for VL 7104
7227 13:53:42.369550 # ok 1332 # SKIP Get and set data for VL 7104
7228 13:53:42.369837 # ok 1333 Set VL 7120
7229 13:53:42.369937 # ok 1334 # SKIP Disabled ZA for VL 7120
7230 13:53:42.370039 # ok 1335 # SKIP Get and set data for VL 7120
7231 13:53:42.370119 # ok 1336 Set VL 7136
7232 13:53:42.370193 # ok 1337 # SKIP Disabled ZA for VL 7136
7233 13:53:42.370281 # ok 1338 # SKIP Get and set data for VL 7136
7234 13:53:42.370372 # ok 1339 Set VL 7152
7235 13:53:42.370680 # ok 1340 # SKIP Disabled ZA for VL 7152
7236 13:53:42.370977 # ok 1341 # SKIP Get and set data for VL 7152
7237 13:53:42.371068 # ok 1342 Set VL 7168
7238 13:53:42.371146 # ok 1343 # SKIP Disabled ZA for VL 7168
7239 13:53:42.371221 # ok 1344 # SKIP Get and set data for VL 7168
7240 13:53:42.371296 # ok 1345 Set VL 7184
7241 13:53:42.371383 # ok 1346 # SKIP Disabled ZA for VL 7184
7242 13:53:42.371472 # ok 1347 # SKIP Get and set data for VL 7184
7243 13:53:42.371550 # ok 1348 Set VL 7200
7244 13:53:42.371666 # ok 1349 # SKIP Disabled ZA for VL 7200
7245 13:53:42.381624 # ok 1350 # SKIP Get and set data for VL 7200
7246 13:53:42.381881 # ok 1351 Set VL 7216
7247 13:53:42.381972 # ok 1352 # SKIP Disabled ZA for VL 7216
7248 13:53:42.382060 # ok 1353 # SKIP Get and set data for VL 7216
7249 13:53:42.382146 # ok 1354 Set VL 7232
7250 13:53:42.382442 # ok 1355 # SKIP Disabled ZA for VL 7232
7251 13:53:42.382549 # ok 1356 # SKIP Get and set data for VL 7232
7252 13:53:42.382638 # ok 1357 Set VL 7248
7253 13:53:42.382725 # ok 1358 # SKIP Disabled ZA for VL 7248
7254 13:53:42.382810 # ok 1359 # SKIP Get and set data for VL 7248
7255 13:53:42.382896 # ok 1360 Set VL 7264
7256 13:53:42.382979 # ok 1361 # SKIP Disabled ZA for VL 7264
7257 13:53:42.383082 # ok 1362 # SKIP Get and set data for VL 7264
7258 13:53:42.383169 # ok 1363 Set VL 7280
7259 13:53:42.383253 # ok 1364 # SKIP Disabled ZA for VL 7280
7260 13:53:42.383338 # ok 1365 # SKIP Get and set data for VL 7280
7261 13:53:42.383424 # ok 1366 Set VL 7296
7262 13:53:42.383525 # ok 1367 # SKIP Disabled ZA for VL 7296
7263 13:53:42.383610 # ok 1368 # SKIP Get and set data for VL 7296
7264 13:53:42.383692 # ok 1369 Set VL 7312
7265 13:53:42.383774 # ok 1370 # SKIP Disabled ZA for VL 7312
7266 13:53:42.383857 # ok 1371 # SKIP Get and set data for VL 7312
7267 13:53:42.383938 # ok 1372 Set VL 7328
7268 13:53:42.384388 # ok 1373 # SKIP Disabled ZA for VL 7328
7269 13:53:42.384484 # ok 1374 # SKIP Get and set data for VL 7328
7270 13:53:42.384559 # ok 1375 Set VL 7344
7271 13:53:42.384631 # ok 1376 # SKIP Disabled ZA for VL 7344
7272 13:53:42.384703 # ok 1377 # SKIP Get and set data for VL 7344
7273 13:53:42.384787 # ok 1378 Set VL 7360
7274 13:53:42.384875 # ok 1379 # SKIP Disabled ZA for VL 7360
7275 13:53:42.384949 # ok 1380 # SKIP Get and set data for VL 7360
7276 13:53:42.385022 # ok 1381 Set VL 7376
7277 13:53:42.385095 # ok 1382 # SKIP Disabled ZA for VL 7376
7278 13:53:42.385180 # ok 1383 # SKIP Get and set data for VL 7376
7279 13:53:42.385258 # ok 1384 Set VL 7392
7280 13:53:42.385333 # ok 1385 # SKIP Disabled ZA for VL 7392
7281 13:53:42.385404 # ok 1386 # SKIP Get and set data for VL 7392
7282 13:53:42.385479 # ok 1387 Set VL 7408
7283 13:53:42.385570 # ok 1388 # SKIP Disabled ZA for VL 7408
7284 13:53:42.385663 # ok 1389 # SKIP Get and set data for VL 7408
7285 13:53:42.385741 # ok 1390 Set VL 7424
7286 13:53:42.398149 # ok 1391 # SKIP Disabled ZA for VL 7424
7287 13:53:42.398400 # ok 1392 # SKIP Get and set data for VL 7424
7288 13:53:42.398501 # ok 1393 Set VL 7440
7289 13:53:42.398593 # ok 1394 # SKIP Disabled ZA for VL 7440
7290 13:53:42.398682 # ok 1395 # SKIP Get and set data for VL 7440
7291 13:53:42.398765 # ok 1396 Set VL 7456
7292 13:53:42.398851 # ok 1397 # SKIP Disabled ZA for VL 7456
7293 13:53:42.398938 # ok 1398 # SKIP Get and set data for VL 7456
7294 13:53:42.399026 # ok 1399 Set VL 7472
7295 13:53:42.399335 # ok 1400 # SKIP Disabled ZA for VL 7472
7296 13:53:42.399445 # ok 1401 # SKIP Get and set data for VL 7472
7297 13:53:42.399539 # ok 1402 Set VL 7488
7298 13:53:42.399631 # ok 1403 # SKIP Disabled ZA for VL 7488
7299 13:53:42.399717 # ok 1404 # SKIP Get and set data for VL 7488
7300 13:53:42.399803 # ok 1405 Set VL 7504
7301 13:53:42.399887 # ok 1406 # SKIP Disabled ZA for VL 7504
7302 13:53:42.399974 # ok 1407 # SKIP Get and set data for VL 7504
7303 13:53:42.400065 # ok 1408 Set VL 7520
7304 13:53:42.400152 # ok 1409 # SKIP Disabled ZA for VL 7520
7305 13:53:42.400257 # ok 1410 # SKIP Get and set data for VL 7520
7306 13:53:42.400345 # ok 1411 Set VL 7536
7307 13:53:42.400431 # ok 1412 # SKIP Disabled ZA for VL 7536
7308 13:53:42.405930 # ok 1413 # SKIP Get and set data for VL 7536
7309 13:53:42.406304 # ok 1414 Set VL 7552
7310 13:53:42.406390 # ok 1415 # SKIP Disabled ZA for VL 7552
7311 13:53:42.406480 # ok 1416 # SKIP Get and set data for VL 7552
7312 13:53:42.406552 # ok 1417 Set VL 7568
7313 13:53:42.406644 # ok 1418 # SKIP Disabled ZA for VL 7568
7314 13:53:42.406758 # ok 1419 # SKIP Get and set data for VL 7568
7315 13:53:42.406849 # ok 1420 Set VL 7584
7316 13:53:42.406959 # ok 1421 # SKIP Disabled ZA for VL 7584
7317 13:53:42.407047 # ok 1422 # SKIP Get and set data for VL 7584
7318 13:53:42.407141 # ok 1423 Set VL 7600
7319 13:53:42.407446 # ok 1424 # SKIP Disabled ZA for VL 7600
7320 13:53:42.407539 # ok 1425 # SKIP Get and set data for VL 7600
7321 13:53:42.407629 # ok 1426 Set VL 7616
7322 13:53:42.407723 # ok 1427 # SKIP Disabled ZA for VL 7616
7323 13:53:42.408409 # ok 1428 # SKIP Get and set data for VL 7616
7324 13:53:42.408503 # ok 1429 Set VL 7632
7325 13:53:42.408789 # ok 1430 # SKIP Disabled ZA for VL 7632
7326 13:53:42.408898 # ok 1431 # SKIP Get and set data for VL 7632
7327 13:53:42.409012 # ok 1432 Set VL 7648
7328 13:53:42.409118 # ok 1433 # SKIP Disabled ZA for VL 7648
7329 13:53:42.409203 # ok 1434 # SKIP Get and set data for VL 7648
7330 13:53:42.409286 # ok 1435 Set VL 7664
7331 13:53:42.409366 # ok 1436 # SKIP Disabled ZA for VL 7664
7332 13:53:42.409446 # ok 1437 # SKIP Get and set data for VL 7664
7333 13:53:42.409536 # ok 1438 Set VL 7680
7334 13:53:42.409825 # ok 1439 # SKIP Disabled ZA for VL 7680
7335 13:53:42.409923 # ok 1440 # SKIP Get and set data for VL 7680
7336 13:53:42.410002 # ok 1441 Set VL 7696
7337 13:53:42.410082 # ok 1442 # SKIP Disabled ZA for VL 7696
7338 13:53:42.410171 # ok 1443 # SKIP Get and set data for VL 7696
7339 13:53:42.410251 # ok 1444 Set VL 7712
7340 13:53:42.410356 # ok 1445 # SKIP Disabled ZA for VL 7712
7341 13:53:42.410446 # ok 1446 # SKIP Get and set data for VL 7712
7342 13:53:42.410539 # ok 1447 Set VL 7728
7343 13:53:42.410618 # ok 1448 # SKIP Disabled ZA for VL 7728
7344 13:53:42.410887 # ok 1449 # SKIP Get and set data for VL 7728
7345 13:53:42.410975 # ok 1450 Set VL 7744
7346 13:53:42.411051 # ok 1451 # SKIP Disabled ZA for VL 7744
7347 13:53:42.411371 # ok 1452 # SKIP Get and set data for VL 7744
7348 13:53:42.411491 # ok 1453 Set VL 7760
7349 13:53:42.411649 # ok 1454 # SKIP Disabled ZA for VL 7760
7350 13:53:42.411735 # ok 1455 # SKIP Get and set data for VL 7760
7351 13:53:42.411811 # ok 1456 Set VL 7776
7352 13:53:42.433752 # ok 1457 # SKIP Disabled ZA for VL 7776
7353 13:53:42.434006 # ok 1458 # SKIP Get and set data for VL 7776
7354 13:53:42.434316 # ok 1459 Set VL 7792
7355 13:53:42.434421 # ok 1460 # SKIP Disabled ZA for VL 7792
7356 13:53:42.434508 # ok 1461 # SKIP Get and set data for VL 7792
7357 13:53:42.434594 # ok 1462 Set VL 7808
7358 13:53:42.434676 # ok 1463 # SKIP Disabled ZA for VL 7808
7359 13:53:42.434775 # ok 1464 # SKIP Get and set data for VL 7808
7360 13:53:42.434873 # ok 1465 Set VL 7824
7361 13:53:42.434960 # ok 1466 # SKIP Disabled ZA for VL 7824
7362 13:53:42.435064 # ok 1467 # SKIP Get and set data for VL 7824
7363 13:53:42.435139 # ok 1468 Set VL 7840
7364 13:53:42.435217 # ok 1469 # SKIP Disabled ZA for VL 7840
7365 13:53:42.435312 # ok 1470 # SKIP Get and set data for VL 7840
7366 13:53:42.435397 # ok 1471 Set VL 7856
7367 13:53:42.435478 # ok 1472 # SKIP Disabled ZA for VL 7856
7368 13:53:42.435757 # ok 1473 # SKIP Get and set data for VL 7856
7369 13:53:42.435839 # ok 1474 Set VL 7872
7370 13:53:42.435914 # ok 1475 # SKIP Disabled ZA for VL 7872
7371 13:53:42.435987 # ok 1476 # SKIP Get and set data for VL 7872
7372 13:53:42.436060 # ok 1477 Set VL 7888
7373 13:53:42.441082 # ok 1478 # SKIP Disabled ZA for VL 7888
7374 13:53:42.441421 # ok 1479 # SKIP Get and set data for VL 7888
7375 13:53:42.441509 # ok 1480 Set VL 7904
7376 13:53:42.441593 # ok 1481 # SKIP Disabled ZA for VL 7904
7377 13:53:42.441670 # ok 1482 # SKIP Get and set data for VL 7904
7378 13:53:42.441747 # ok 1483 Set VL 7920
7379 13:53:42.441995 # ok 1484 # SKIP Disabled ZA for VL 7920
7380 13:53:42.442063 # ok 1485 # SKIP Get and set data for VL 7920
7381 13:53:42.442145 # ok 1486 Set VL 7936
7382 13:53:42.442221 # ok 1487 # SKIP Disabled ZA for VL 7936
7383 13:53:42.442285 # ok 1488 # SKIP Get and set data for VL 7936
7384 13:53:42.442919 # ok 1489 Set VL 7952
7385 13:53:42.442989 # ok 1490 # SKIP Disabled ZA for VL 7952
7386 13:53:42.443054 # ok 1491 # SKIP Get and set data for VL 7952
7387 13:53:42.443118 # ok 1492 Set VL 7968
7388 13:53:42.443376 # ok 1493 # SKIP Disabled ZA for VL 7968
7389 13:53:42.443480 # ok 1494 # SKIP Get and set data for VL 7968
7390 13:53:42.443564 # ok 1495 Set VL 7984
7391 13:53:42.443641 # ok 1496 # SKIP Disabled ZA for VL 7984
7392 13:53:42.443745 # ok 1497 # SKIP Get and set data for VL 7984
7393 13:53:42.443836 # ok 1498 Set VL 8000
7394 13:53:42.443924 # ok 1499 # SKIP Disabled ZA for VL 8000
7395 13:53:42.444013 # ok 1500 # SKIP Get and set data for VL 8000
7396 13:53:42.453430 # ok 1501 Set VL 8016
7397 13:53:42.453628 # ok 1502 # SKIP Disabled ZA for VL 8016
7398 13:53:42.454477 # ok 1503 # SKIP Get and set data for VL 8016
7399 13:53:42.454596 # ok 1504 Set VL 8032
7400 13:53:42.454869 # ok 1505 # SKIP Disabled ZA for VL 8032
7401 13:53:42.454958 # ok 1506 # SKIP Get and set data for VL 8032
7402 13:53:42.455034 # ok 1507 Set VL 8048
7403 13:53:42.455112 # ok 1508 # SKIP Disabled ZA for VL 8048
7404 13:53:42.455202 # ok 1509 # SKIP Get and set data for VL 8048
7405 13:53:42.455279 # ok 1510 Set VL 8064
7406 13:53:42.455368 # ok 1511 # SKIP Disabled ZA for VL 8064
7407 13:53:42.455448 # ok 1512 # SKIP Get and set data for VL 8064
7408 13:53:42.455525 # ok 1513 Set VL 8080
7409 13:53:42.455616 # ok 1514 # SKIP Disabled ZA for VL 8080
7410 13:53:42.455693 # ok 1515 # SKIP Get and set data for VL 8080
7411 13:53:42.462877 # ok 1516 Set VL 8096
7412 13:53:42.463136 # ok 1517 # SKIP Disabled ZA for VL 8096
7413 13:53:42.463546 # ok 1518 # SKIP Get and set data for VL 8096
7414 13:53:42.463653 # ok 1519 Set VL 8112
7415 13:53:42.463740 # ok 1520 # SKIP Disabled ZA for VL 8112
7416 13:53:42.463825 # ok 1521 # SKIP Get and set data for VL 8112
7417 13:53:42.463912 # ok 1522 Set VL 8128
7418 13:53:42.463991 # ok 1523 # SKIP Disabled ZA for VL 8128
7419 13:53:42.464070 # ok 1524 # SKIP Get and set data for VL 8128
7420 13:53:42.464153 # ok 1525 Set VL 8144
7421 13:53:42.464243 # ok 1526 # SKIP Disabled ZA for VL 8144
7422 13:53:42.468978 # ok 1527 # SKIP Get and set data for VL 8144
7423 13:53:42.469136 # ok 1528 Set VL 8160
7424 13:53:42.469427 # ok 1529 # SKIP Disabled ZA for VL 8160
7425 13:53:42.469523 # ok 1530 # SKIP Get and set data for VL 8160
7426 13:53:42.469919 # ok 1531 Set VL 8176
7427 13:53:42.470019 # ok 1532 # SKIP Disabled ZA for VL 8176
7428 13:53:42.470115 # ok 1533 # SKIP Get and set data for VL 8176
7429 13:53:42.470196 # ok 1534 Set VL 8192
7430 13:53:42.470270 # ok 1535 # SKIP Disabled ZA for VL 8192
7431 13:53:42.470341 # ok 1536 # SKIP Get and set data for VL 8192
7432 13:53:42.470415 # # Totals: pass:522 fail:0 xfail:0 xpass:0 skip:1014 error:0
7433 13:53:42.470507 ok 34 selftests: arm64: za-ptrace
7434 13:53:42.470591 # selftests: arm64: check_buffer_fill
7435 13:53:42.880697 # 1..20
7436 13:53:42.881131 # ok 1 Check buffer correctness by byte with sync err mode and mmap memory
7437 13:53:42.881231 # ok 2 Check buffer correctness by byte with async err mode and mmap memory
7438 13:53:42.881306 # ok 3 Check buffer correctness by byte with sync err mode and mmap/mprotect memory
7439 13:53:42.881394 # ok 4 Check buffer correctness by byte with async err mode and mmap/mprotect memory
7440 13:53:42.881469 # not ok 5 Check buffer write underflow by byte with sync mode and mmap memory
7441 13:53:42.881557 # not ok 6 Check buffer write underflow by byte with async mode and mmap memory
7442 13:53:42.882022 # ok 7 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7443 13:53:42.882133 # ok 8 Check buffer write underflow by byte with sync mode and mmap memory
7444 13:53:42.882234 # ok 9 Check buffer write underflow by byte with async mode and mmap memory
7445 13:53:42.882324 # ok 10 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7446 13:53:42.882503 # not ok 11 Check buffer write overflow by byte with sync mode and mmap memory
7447 13:53:42.882598 # not ok 12 Check buffer write overflow by byte with async mode and mmap memory
7448 13:53:42.882869 # ok 13 Check buffer write overflow by byte with tag fault ignore mode and mmap memory
7449 13:53:42.882961 # not ok 14 Check buffer write correctness by block with sync mode and mmap memory
7450 13:53:42.883046 # not ok 15 Check buffer write correctness by block with async mode and mmap memory
7451 13:53:42.883312 # ok 16 Check buffer write correctness by block with tag fault ignore and mmap memory
7452 13:53:42.886244 # ok 17 Check initial tags with private mapping, sync error mode and mmap memory
7453 13:53:42.886833 # ok 18 Check initial tags with private mapping, sync error mode and mmap/mprotect memory
7454 13:53:42.887004 # ok 19 Check initial tags with shared mapping, sync error mode and mmap memory
7455 13:53:42.887179 # ok 20 Check initial tags with shared mapping, sync error mode and mmap/mprotect memory
7456 13:53:42.887360 # # Totals: pass:14 fail:6 xfail:0 xpass:0 skip:0 error:0
7457 13:53:42.906936 not ok 35 selftests: arm64: check_buffer_fill # exit=1
7458 13:53:43.029146 # selftests: arm64: check_child_memory
7459 13:53:43.473303 # 1..12
7460 13:53:43.473679 # not ok 1 Check child anonymous memory with private mapping, precise mode and mmap memory
7461 13:53:43.473868 # not ok 2 Check child anonymous memory with shared mapping, precise mode and mmap memory
7462 13:53:43.474377 # not ok 3 Check child anonymous memory with private mapping, imprecise mode and mmap memory
7463 13:53:43.474616 # not ok 4 Check child anonymous memory with shared mapping, imprecise mode and mmap memory
7464 13:53:43.474816 # not ok 5 Check child anonymous memory with private mapping, precise mode and mmap/mprotect memory
7465 13:53:43.475028 # not ok 6 Check child anonymous memory with shared mapping, precise mode and mmap/mprotect memory
7466 13:53:43.475197 # not ok 7 Check child file memory with private mapping, precise mode and mmap memory
7467 13:53:43.475362 # not ok 8 Check child file memory with shared mapping, precise mode and mmap memory
7468 13:53:43.475488 # not ok 9 Check child file memory with private mapping, imprecise mode and mmap memory
7469 13:53:43.475604 # not ok 10 Check child file memory with shared mapping, imprecise mode and mmap memory
7470 13:53:43.481864 # not ok 11 Check child file memory with private mapping, precise mode and mmap/mprotect memory
7471 13:53:43.482371 # not ok 12 Check child file memory with shared mapping, precise mode and mmap/mprotect memory
7472 13:53:43.482511 # # Totals: pass:0 fail:12 xfail:0 xpass:0 skip:0 error:0
7473 13:53:43.497689 not ok 36 selftests: arm64: check_child_memory # exit=1
7474 13:53:43.612511 # selftests: arm64: check_gcr_el1_cswitch
7475 13:54:28.907242 <47>[ 98.873479] systemd-journald[111]: Sent WATCHDOG=1 notification.
7476 13:54:29.238482 <47>[ 99.205944] systemd-journald[111]: Data hash table of /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal has a fill level at 75.0 (3296 of 4394 items, 2531328 file size, 768 bytes per hash table item), suggesting rotation.
7477 13:54:29.238995 <47>[ 99.206546] systemd-journald[111]: /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5/system.journal: Journal header limits reached or header out-of-date, rotating.
7478 13:54:29.239750 <47>[ 99.207573] systemd-journald[111]: Rotating...
7479 13:54:29.270904 <47>[ 99.238653] systemd-journald[111]: Reserving 333 entries in field hash table.
7480 13:54:29.318659 <47>[ 99.286402] systemd-journald[111]: Reserving 4394 entries in data hash table.
7481 13:54:29.342707 <47>[ 99.310450] systemd-journald[111]: Vacuuming...
7482 13:54:29.345669 <47>[ 99.313336] systemd-journald[111]: Vacuuming done, freed 0B of archived journals from /run/log/journal/aa3c2edede8c479b99ca75a0766ab7d5.
7483 13:54:29.643522 # 1..1
7484 13:54:29.643789 # 1..1
7485 13:54:29.643879 # 1..1
7486 13:54:29.643964 # 1..1
7487 13:54:29.644048 # 1..1
7488 13:54:29.644131 # 1..1
7489 13:54:29.644211 # 1..1
7490 13:54:29.644293 # 1..1
7491 13:54:29.644600 # 1..1
7492 13:54:29.644699 # 1..1
7493 13:54:29.644787 # 1..1
7494 13:54:29.644871 # 1..1
7495 13:54:29.644952 # 1..1
7496 13:54:29.645034 # 1..1
7497 13:54:29.645115 # 1..1
7498 13:54:29.645192 # 1..1
7499 13:54:29.645267 # 1..1
7500 13:54:29.645341 # 1..1
7501 13:54:29.645413 # 1..1
7502 13:54:29.645486 # 1..1
7503 13:54:29.645560 # 1..1
7504 13:54:29.645633 # 1..1
7505 13:54:29.645720 # 1..1
7506 13:54:29.645796 # 1..1
7507 13:54:29.645871 # 1..1
7508 13:54:29.645951 # 1..1
7509 13:54:29.646027 # 1..1
7510 13:54:29.646101 # 1..1
7511 13:54:29.646173 # 1..1
7512 13:54:29.646245 # 1..1
7513 13:54:29.646318 # 1..1
7514 13:54:29.646393 # 1..1
7515 13:54:29.646466 # 1..1
7516 13:54:29.646537 # 1..1
7517 13:54:29.646610 # 1..1
7518 13:54:29.646683 # 1..1
7519 13:54:29.646760 # 1..1
7520 13:54:29.646833 # 1..1
7521 13:54:29.646909 # 1..1
7522 13:54:29.646987 # 1..1
7523 13:54:29.647066 # 1..1
7524 13:54:29.647145 # 1..1
7525 13:54:29.647222 # 1..1
7526 13:54:29.647295 # 1..1
7527 13:54:29.647368 # 1..1
7528 13:54:29.647471 # 1..1
7529 13:54:29.647547 # 1..1
7530 13:54:29.647620 # 1..1
7531 13:54:29.647691 # 1..1
7532 13:54:29.647765 # 1..1
7533 13:54:29.647844 # 1..1
7534 13:54:29.647922 # 1..1
7535 13:54:29.648003 # 1..1
7536 13:54:29.648079 # 1..1
7537 13:54:29.648159 # 1..1
7538 13:54:29.648239 # 1..1
7539 13:54:29.648321 # 1..1
7540 13:54:29.648399 # 1..1
7541 13:54:29.648476 # 1..1
7542 13:54:29.648548 # 1..1
7543 13:54:29.648622 # 1..1
7544 13:54:29.648695 # 1..1
7545 13:54:29.648767 # 1..1
7546 13:54:29.648836 # 1..1
7547 13:54:29.648905 # 1..1
7548 13:54:29.648973 # 1..1
7549 13:54:29.649041 # 1..1
7550 13:54:29.649113 # 1..1
7551 13:54:29.649182 # 1..1
7552 13:54:29.649262 # 1..1
7553 13:54:29.649345 # 1..1
7554 13:54:29.649428 # 1..1
7555 13:54:29.649511 # 1..1
7556 13:54:29.649593 # 1..1
7557 13:54:29.650256 # 1..1
7558 13:54:29.650342 # 1..1
7559 13:54:29.650414 # 1..1
7560 13:54:29.650484 # 1..1
7561 13:54:29.650555 # 1..1
7562 13:54:29.650624 # 1..1
7563 13:54:29.650694 # 1..1
7564 13:54:29.650764 # 1..1
7565 13:54:29.650834 # 1..1
7566 13:54:29.650902 # 1..1
7567 13:54:29.650971 # 1..1
7568 13:54:29.651040 # 1..1
7569 13:54:29.651109 # 1..1
7570 13:54:29.651179 # 1..1
7571 13:54:29.651248 # 1..1
7572 13:54:29.651317 # 1..1
7573 13:54:29.651386 # 1..1
7574 13:54:29.651455 # 1..1
7575 13:54:29.651527 # 1..1
7576 13:54:29.651595 # 1..1
7577 13:54:29.651666 # 1..1
7578 13:54:29.651736 # 1..1
7579 13:54:29.651806 # 1..1
7580 13:54:29.651876 # 1..1
7581 13:54:29.651945 # 1..1
7582 13:54:29.652014 # 1..1
7583 13:54:29.652084 # 1..1
7584 13:54:29.652154 # 1..1
7585 13:54:29.652225 # 1..1
7586 13:54:29.652294 # 1..1
7587 13:54:29.652362 # 1..1
7588 13:54:29.652431 # 1..1
7589 13:54:29.652500 # 1..1
7590 13:54:29.652568 # 1..1
7591 13:54:29.652637 # 1..1
7592 13:54:29.652710 # 1..1
7593 13:54:29.652783 # 1..1
7594 13:54:29.652857 # 1..1
7595 13:54:29.652931 # 1..1
7596 13:54:29.653011 # 1..1
7597 13:54:29.653089 # 1..1
7598 13:54:29.653165 # 1..1
7599 13:54:29.653243 # 1..1
7600 13:54:29.653325 # 1..1
7601 13:54:29.653403 # 1..1
7602 13:54:29.653487 # 1..1
7603 13:54:29.653562 # 1..1
7604 13:54:29.720070 # 1..1
7605 13:54:29.720322 # 1..1
7606 13:54:29.720639 # 1..1
7607 13:54:29.720744 # 1..1
7608 13:54:29.720831 # 1..1
7609 13:54:29.720923 # 1..1
7610 13:54:29.721007 # 1..1
7611 13:54:29.721093 # 1..1
7612 13:54:29.721176 # 1..1
7613 13:54:29.721262 # 1..1
7614 13:54:29.721343 # 1..1
7615 13:54:29.721424 # 1..1
7616 13:54:29.721507 # 1..1
7617 13:54:29.721592 # 1..1
7618 13:54:29.721684 # 1..1
7619 13:54:29.721766 # 1..1
7620 13:54:29.721845 # 1..1
7621 13:54:29.721926 # 1..1
7622 13:54:29.722007 # 1..1
7623 13:54:29.722086 # 1..1
7624 13:54:29.722167 # 1..1
7625 13:54:29.722246 # 1..1
7626 13:54:29.722325 # 1..1
7627 13:54:29.722401 # 1..1
7628 13:54:29.722479 # 1..1
7629 13:54:29.722558 # 1..1
7630 13:54:29.722639 # 1..1
7631 13:54:29.722720 # 1..1
7632 13:54:29.722840 # 1..1
7633 13:54:29.722923 # 1..1
7634 13:54:29.723004 # 1..1
7635 13:54:29.723087 # 1..1
7636 13:54:29.723170 # 1..1
7637 13:54:29.723250 # 1..1
7638 13:54:29.723331 # 1..1
7639 13:54:29.723411 # 1..1
7640 13:54:29.723497 # 1..1
7641 13:54:29.723582 # 1..1
7642 13:54:29.723668 # 1..1
7643 13:54:29.723755 # 1..1
7644 13:54:29.723848 # 1..1
7645 13:54:29.723935 # 1..1
7646 13:54:29.724022 # 1..1
7647 13:54:29.724107 # 1..1
7648 13:54:29.724189 # 1..1
7649 13:54:29.724268 # 1..1
7650 13:54:29.724348 # 1..1
7651 13:54:29.724429 # 1..1
7652 13:54:29.724512 # 1..1
7653 13:54:29.724595 # 1..1
7654 13:54:29.724681 # 1..1
7655 13:54:29.724767 # 1..1
7656 13:54:29.724853 # 1..1
7657 13:54:29.724938 # 1..1
7658 13:54:29.725024 # 1..1
7659 13:54:29.725111 # 1..1
7660 13:54:29.725198 # 1..1
7661 13:54:29.725285 # 1..1
7662 13:54:29.725372 # 1..1
7663 13:54:29.725458 # 1..1
7664 13:54:29.725538 # 1..1
7665 13:54:29.725618 # 1..1
7666 13:54:29.726543 # 1..1
7667 13:54:29.726640 # 1..1
7668 13:54:29.726724 # 1..1
7669 13:54:29.726811 # 1..1
7670 13:54:29.726899 # 1..1
7671 13:54:29.726987 # 1..1
7672 13:54:29.727076 # 1..1
7673 13:54:29.727165 # 1..1
7674 13:54:29.727254 # 1..1
7675 13:54:29.727343 # 1..1
7676 13:54:29.727432 # 1..1
7677 13:54:29.727521 # 1..1
7678 13:54:29.727610 # 1..1
7679 13:54:29.727697 # 1..1
7680 13:54:29.727785 # 1..1
7681 13:54:29.727873 # 1..1
7682 13:54:29.727962 # 1..1
7683 13:54:29.728051 # 1..1
7684 13:54:29.728136 # 1..1
7685 13:54:29.728217 # 1..1
7686 13:54:29.728298 # 1..1
7687 13:54:29.728380 # 1..1
7688 13:54:29.728464 # 1..1
7689 13:54:29.728546 # 1..1
7690 13:54:29.728629 # 1..1
7691 13:54:29.728707 # 1..1
7692 13:54:29.728789 # 1..1
7693 13:54:29.728867 # 1..1
7694 13:54:29.728947 # 1..1
7695 13:54:29.729028 # 1..1
7696 13:54:29.729110 # 1..1
7697 13:54:29.729191 # 1..1
7698 13:54:29.729274 # 1..1
7699 13:54:29.729357 # 1..1
7700 13:54:29.729438 # 1..1
7701 13:54:29.729558 # 1..1
7702 13:54:29.730599 # 1..1
7703 13:54:29.730780 # 1..1
7704 13:54:29.730912 # 1..1
7705 13:54:29.731032 # 1..1
7706 13:54:29.731368 # 1..1
7707 13:54:29.731500 # 1..1
7708 13:54:29.731620 # 1..1
7709 13:54:29.731737 # 1..1
7710 13:54:29.731852 # 1..1
7711 13:54:29.731969 # 1..1
7712 13:54:29.732141 # 1..1
7713 13:54:29.732334 # 1..1
7714 13:54:29.732510 # 1..1
7715 13:54:29.732657 # 1..1
7716 13:54:29.732801 # 1..1
7717 13:54:29.732946 # 1..1
7718 13:54:29.733085 # 1..1
7719 13:54:29.733225 # 1..1
7720 13:54:29.733366 # 1..1
7721 13:54:29.733505 # 1..1
7722 13:54:29.733645 # 1..1
7723 13:54:29.733799 # 1..1
7724 13:54:29.733988 # 1..1
7725 13:54:29.734160 # 1..1
7726 13:54:29.734303 # 1..1
7727 13:54:29.734444 # 1..1
7728 13:54:29.734583 # 1..1
7729 13:54:29.734830 # 1..1
7730 13:54:29.734985 # 1..1
7731 13:54:29.735129 # 1..1
7732 13:54:29.735270 # 1..1
7733 13:54:29.735413 # 1..1
7734 13:54:29.735555 # 1..1
7735 13:54:29.735695 # 1..1
7736 13:54:29.735881 # 1..1
7737 13:54:29.736052 # 1..1
7738 13:54:29.736223 # 1..1
7739 13:54:29.736405 # 1..1
7740 13:54:29.736577 # 1..1
7741 13:54:29.736719 # 1..1
7742 13:54:29.736852 # 1..1
7743 13:54:29.736979 # 1..1
7744 13:54:29.737095 # 1..1
7745 13:54:29.737210 # 1..1
7746 13:54:29.737324 # 1..1
7747 13:54:29.737439 # 1..1
7748 13:54:29.737551 # 1..1
7749 13:54:29.737719 # 1..1
7750 13:54:29.737936 # 1..1
7751 13:54:29.738121 # 1..1
7752 13:54:29.738299 # 1..1
7753 13:54:29.738442 # 1..1
7754 13:54:29.738583 # 1..1
7755 13:54:29.738725 # 1..1
7756 13:54:29.738868 # 1..1
7757 13:54:29.739009 # 1..1
7758 13:54:29.739151 # 1..1
7759 13:54:29.739292 # 1..1
7760 13:54:29.739432 # 1..1
7761 13:54:29.739573 # 1..1
7762 13:54:29.739713 # 1..1
7763 13:54:29.739851 # 1..1
7764 13:54:29.739994 # 1..1
7765 13:54:29.740135 # 1..1
7766 13:54:29.740274 # 1..1
7767 13:54:29.740414 # 1..1
7768 13:54:29.740554 # 1..1
7769 13:54:29.740694 # 1..1
7770 13:54:29.740834 # 1..1
7771 13:54:29.740973 # 1..1
7772 13:54:29.741114 # 1..1
7773 13:54:29.741254 # 1..1
7774 13:54:29.741394 # 1..1
7775 13:54:29.741534 # 1..1
7776 13:54:29.741684 # 1..1
7777 13:54:29.741826 # 1..1
7778 13:54:29.741966 # 1..1
7779 13:54:29.742106 # 1..1
7780 13:54:29.742245 # 1..1
7781 13:54:29.742384 # 1..1
7782 13:54:29.742523 # 1..1
7783 13:54:29.742664 # 1..1
7784 13:54:29.742803 # 1..1
7785 13:54:29.742942 # 1..1
7786 13:54:29.743081 # 1..1
7787 13:54:29.743221 # 1..1
7788 13:54:29.743360 # 1..1
7789 13:54:29.743500 # 1..1
7790 13:54:29.743640 # 1..1
7791 13:54:29.743779 # 1..1
7792 13:54:29.743918 # 1..1
7793 13:54:29.744057 # 1..1
7794 13:54:29.744197 # 1..1
7795 13:54:29.744337 # 1..1
7796 13:54:29.744477 # 1..1
7797 13:54:29.744617 # 1..1
7798 13:54:29.744763 # 1..1
7799 13:54:29.744906 # 1..1
7800 13:54:29.745046 # 1..1
7801 13:54:29.745189 # 1..1
7802 13:54:29.745330 # 1..1
7803 13:54:29.745469 # 1..1
7804 13:54:29.745609 # 1..1
7805 13:54:29.745762 # 1..1
7806 13:54:29.745905 # 1..1
7807 13:54:29.746045 # 1..1
7808 13:54:29.746185 # 1..1
7809 13:54:29.746325 # 1..1
7810 13:54:29.746466 # 1..1
7811 13:54:29.746605 # 1..1
7812 13:54:29.746746 # 1..1
7813 13:54:29.746886 # 1..1
7814 13:54:29.747027 # 1..1
7815 13:54:29.747167 # 1..1
7816 13:54:29.747308 # 1..1
7817 13:54:29.747447 # 1..1
7818 13:54:29.747586 # 1..1
7819 13:54:29.747725 # 1..1
7820 13:54:29.747865 # 1..1
7821 13:54:29.748005 # 1..1
7822 13:54:29.748145 # 1..1
7823 13:54:29.748286 # 1..1
7824 13:54:29.748426 # 1..1
7825 13:54:29.748566 # 1..1
7826 13:54:29.754463 # 1..1
7827 13:54:29.754709 # 1..1
7828 13:54:29.754810 # 1..1
7829 13:54:29.754902 # 1..1
7830 13:54:29.754993 # 1..1
7831 13:54:29.755084 # 1..1
7832 13:54:29.755392 # 1..1
7833 13:54:29.755497 # 1..1
7834 13:54:29.755590 # 1..1
7835 13:54:29.755679 # 1..1
7836 13:54:29.755770 # 1..1
7837 13:54:29.755861 # 1..1
7838 13:54:29.755953 # 1..1
7839 13:54:29.756047 # 1..1
7840 13:54:29.756136 # 1..1
7841 13:54:29.756234 # 1..1
7842 13:54:29.756319 # 1..1
7843 13:54:29.756399 # 1..1
7844 13:54:29.756477 # 1..1
7845 13:54:29.756578 # 1..1
7846 13:54:29.756665 # 1..1
7847 13:54:29.756744 # 1..1
7848 13:54:29.756822 # 1..1
7849 13:54:29.756902 # 1..1
7850 13:54:29.756982 # 1..1
7851 13:54:29.757061 # 1..1
7852 13:54:29.757140 # 1..1
7853 13:54:29.757221 # 1..1
7854 13:54:29.757300 # 1..1
7855 13:54:29.757377 # 1..1
7856 13:54:29.757454 # 1..1
7857 13:54:29.757534 # 1..1
7858 13:54:29.757613 # 1..1
7859 13:54:29.757705 # 1..1
7860 13:54:29.757786 # 1..1
7861 13:54:29.757868 # 1..1
7862 13:54:29.757953 # 1..1
7863 13:54:29.758038 # 1..1
7864 13:54:29.758121 # 1..1
7865 13:54:29.758206 # 1..1
7866 13:54:29.758292 # 1..1
7867 13:54:29.758374 # 1..1
7868 13:54:29.758454 # 1..1
7869 13:54:29.758535 # 1..1
7870 13:54:29.758612 # 1..1
7871 13:54:29.758691 # 1..1
7872 13:54:29.758768 # 1..1
7873 13:54:29.758846 # 1..1
7874 13:54:29.758925 # 1..1
7875 13:54:29.759004 # 1..1
7876 13:54:29.759085 # 1..1
7877 13:54:29.759168 # 1..1
7878 13:54:29.759247 # 1..1
7879 13:54:29.759328 # 1..1
7880 13:54:29.759410 # 1..1
7881 13:54:29.759490 # 1..1
7882 13:54:29.759570 # 1..1
7883 13:54:29.759689 # 1..1
7884 13:54:29.759778 # 1..1
7885 13:54:29.759864 # 1..1
7886 13:54:29.759948 # 1..1
7887 13:54:29.760031 # 1..1
7888 13:54:29.760112 # 1..1
7889 13:54:29.760193 # 1..1
7890 13:54:29.760271 # 1..1
7891 13:54:29.760352 # 1..1
7892 13:54:29.760434 # 1..1
7893 13:54:29.760519 # 1..1
7894 13:54:29.760604 # 1..1
7895 13:54:29.760688 # 1..1
7896 13:54:29.760771 # 1..1
7897 13:54:29.760855 # 1..1
7898 13:54:29.760938 # 1..1
7899 13:54:29.761015 # 1..1
7900 13:54:29.761095 # 1..1
7901 13:54:29.761175 # 1..1
7902 13:54:29.761259 # 1..1
7903 13:54:29.761341 # 1..1
7904 13:54:29.761422 # 1..1
7905 13:54:29.761502 # 1..1
7906 13:54:29.761584 # 1..1
7907 13:54:29.762748 # 1..1
7908 13:54:29.762859 # 1..1
7909 13:54:29.762951 # 1..1
7910 13:54:29.763042 # 1..1
7911 13:54:29.763133 # 1..1
7912 13:54:29.763220 # 1..1
7913 13:54:29.763304 # 1..1
7914 13:54:29.763393 # 1..1
7915 13:54:29.763476 # 1..1
7916 13:54:29.763559 # 1..1
7917 13:54:29.763637 # 1..1
7918 13:54:29.763719 # 1..1
7919 13:54:29.763803 # 1..1
7920 13:54:29.763890 # 1..1
7921 13:54:29.763974 # 1..1
7922 13:54:29.764058 # 1..1
7923 13:54:29.764142 # 1..1
7924 13:54:29.764224 # 1..1
7925 13:54:29.764307 # 1..1
7926 13:54:29.764392 # 1..1
7927 13:54:29.764472 # 1..1
7928 13:54:29.764556 # 1..1
7929 13:54:29.764638 # 1..1
7930 13:54:29.764723 # 1..1
7931 13:54:29.764809 # 1..1
7932 13:54:29.764897 # 1..1
7933 13:54:29.764981 # 1..1
7934 13:54:29.765069 # 1..1
7935 13:54:29.765158 # 1..1
7936 13:54:29.765242 # 1..1
7937 13:54:29.765328 # 1..1
7938 13:54:29.765413 # 1..1
7939 13:54:29.765495 # 1..1
7940 13:54:29.765578 # 1..1
7941 13:54:29.765672 # 1..1
7942 13:54:29.765754 # 1..1
7943 13:54:29.765836 # 1..1
7944 13:54:29.765923 # 1..1
7945 13:54:29.766006 # 1..1
7946 13:54:29.766091 # 1..1
7947 13:54:29.766172 # 1..1
7948 13:54:29.766255 # 1..1
7949 13:54:29.766337 # 1..1
7950 13:54:29.766418 # 1..1
7951 13:54:29.766501 # 1..1
7952 13:54:29.766584 # 1..1
7953 13:54:29.766668 # 1..1
7954 13:54:29.766751 # 1..1
7955 13:54:29.766834 # 1..1
7956 13:54:29.766921 # 1..1
7957 13:54:29.767005 # 1..1
7958 13:54:29.767091 # 1..1
7959 13:54:29.767175 # 1..1
7960 13:54:29.767258 # 1..1
7961 13:54:29.767340 # 1..1
7962 13:54:29.767422 # 1..1
7963 13:54:29.767505 # 1..1
7964 13:54:29.767587 # 1..1
7965 13:54:29.767671 # 1..1
7966 13:54:29.767759 # 1..1
7967 13:54:29.767842 # 1..1
7968 13:54:29.767930 # 1..1
7969 13:54:29.768016 # 1..1
7970 13:54:29.768101 # 1..1
7971 13:54:29.768182 # 1..1
7972 13:54:29.768262 # 1..1
7973 13:54:29.768343 # 1..1
7974 13:54:29.768426 # 1..1
7975 13:54:29.768510 # 1..1
7976 13:54:29.778739 # 1..1
7977 13:54:29.778989 # 1..1
7978 13:54:29.779076 # 1..1
7979 13:54:29.779369 # 1..1
7980 13:54:29.779464 # 1..1
7981 13:54:29.779547 # 1..1
7982 13:54:29.779631 # 1..1
7983 13:54:29.779712 # 1..1
7984 13:54:29.779809 # 1..1
7985 13:54:29.779902 # 1..1
7986 13:54:29.779984 # 1..1
7987 13:54:29.780083 # 1..1
7988 13:54:29.780169 # 1..1
7989 13:54:29.780250 # 1..1
7990 13:54:29.780332 # 1..1
7991 13:54:29.780415 # 1..1
7992 13:54:29.780500 # 1..1
7993 13:54:29.780586 # 1..1
7994 13:54:29.780671 # 1..1
7995 13:54:29.780756 # 1..1
7996 13:54:29.780837 # 1..1
7997 13:54:29.780920 # 1..1
7998 13:54:29.781012 # 1..1
7999 13:54:29.781096 # 1..1
8000 13:54:29.781178 # 1..1
8001 13:54:29.781262 # 1..1
8002 13:54:29.781343 # 1..1
8003 13:54:29.781443 #
8004 13:54:29.781529 not ok 37 selftests: arm64: check_gcr_el1_cswitch # TIMEOUT 45 seconds
8005 13:54:30.066113 # selftests: arm64: check_ksm_options
8006 13:54:30.406433 # 1..4
8007 13:54:30.406715 # # Invalid MTE synchronous exception caught!
8008 13:54:30.453679 not ok 38 selftests: arm64: check_ksm_options # exit=1
8009 13:54:30.756117 # selftests: arm64: check_mmap_options
8010 13:54:31.626008 # 1..22
8011 13:54:31.626619 # ok 1 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check off
8012 13:54:31.626837 # ok 2 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check off
8013 13:54:31.627020 # ok 3 Check anonymous memory with private mapping, no error mode, mmap memory and tag check off
8014 13:54:31.627187 # ok 4 Check file memory with private mapping, no error mode, mmap/mprotect memory and tag check off
8015 13:54:31.641334 # not ok 5 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check on
8016 13:54:31.641948 # not ok 6 Check anonymous memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
8017 13:54:31.642163 # not ok 7 Check anonymous memory with shared mapping, sync error mode, mmap memory and tag check on
8018 13:54:31.642390 # not ok 8 Check anonymous memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
8019 13:54:31.642651 # not ok 9 Check anonymous memory with private mapping, async error mode, mmap memory and tag check on
8020 13:54:31.642861 # not ok 10 Check anonymous memory with private mapping, async error mode, mmap/mprotect memory and tag check on
8021 13:54:31.643049 # not ok 11 Check anonymous memory with shared mapping, async error mode, mmap memory and tag check on
8022 13:54:31.652158 # not ok 12 Check anonymous memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
8023 13:54:31.652604 # not ok 13 Check file memory with private mapping, sync error mode, mmap memory and tag check on
8024 13:54:31.652712 # not ok 14 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
8025 13:54:31.652818 # not ok 15 Check file memory with shared mapping, sync error mode, mmap memory and tag check on
8026 13:54:31.652996 # not ok 16 Check file memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
8027 13:54:31.653313 # not ok 17 Check file memory with private mapping, async error mode, mmap memory and tag check on
8028 13:54:31.653625 # not ok 18 Check file memory with private mapping, async error mode, mmap/mprotect memory and tag check on
8029 13:54:31.653750 # not ok 19 Check file memory with shared mapping, async error mode, mmap memory and tag check on
8030 13:54:31.654107 # not ok 20 Check file memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
8031 13:54:31.654310 # not ok 21 Check clear PROT_MTE flags with private mapping, sync error mode and mmap memory
8032 13:54:31.654519 # not ok 22 Check clear PROT_MTE flags with private mapping and sync error mode and mmap/mprotect memory
8033 13:54:31.654727 # # Totals: pass:4 fail:18 xfail:0 xpass:0 skip:0 error:0
8034 13:54:31.700543 not ok 39 selftests: arm64: check_mmap_options # exit=1
8035 13:54:32.046394 # selftests: arm64: check_prctl
8036 13:54:32.354914 # TAP version 13
8037 13:54:32.355555 # 1..5
8038 13:54:32.355777 # ok 1 check_basic_read
8039 13:54:32.356140 # ok 2 NONE
8040 13:54:32.356279 # ok 3 SYNC
8041 13:54:32.356401 # ok 4 ASYNC
8042 13:54:32.356521 # ok 5 SYNC+ASYNC
8043 13:54:32.356639 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
8044 13:54:32.408091 ok 40 selftests: arm64: check_prctl
8045 13:54:32.704473 # selftests: arm64: check_tags_inclusion
8046 13:54:33.092945 # 1..4
8047 13:54:33.093298 # # Unexpected fault recorded for 0x900ffffa6249000-0x900ffffa6249050 in mode 1
8048 13:54:33.093723 # not ok 1 Check an included tag value with sync mode
8049 13:54:33.093835 # # Unexpected fault recorded for 0xc00ffffa6249000-0xc00ffffa6249050 in mode 1
8050 13:54:33.093924 # not ok 2 Check different included tags value with sync mode
8051 13:54:33.094006 # ok 3 Check none included tags value with sync mode
8052 13:54:33.094082 # # Unexpected fault recorded for 0x300ffffa6249000-0x300ffffa6249050 in mode 1
8053 13:54:33.094176 # not ok 4 Check all included tags value with sync mode
8054 13:54:33.094258 # # Totals: pass:1 fail:3 xfail:0 xpass:0 skip:0 error:0
8055 13:54:33.140772 not ok 41 selftests: arm64: check_tags_inclusion # exit=1
8056 13:54:33.457925 # selftests: arm64: check_user_mem
8057 13:54:42.824848 # 1..64
8058 13:54:42.825339 # ok 1 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8059 13:54:42.825451 # ok 2 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8060 13:54:42.825543 # ok 3 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8061 13:54:42.825660 # ok 4 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8062 13:54:42.825766 # ok 5 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8063 13:54:42.825937 # ok 6 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8064 13:54:42.826187 # ok 7 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8065 13:54:42.826400 # ok 8 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8066 13:54:42.826597 # ok 9 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8067 13:54:42.826866 # ok 10 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8068 13:54:42.827888 # ok 11 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8069 13:54:42.828368 # ok 12 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8070 13:54:42.828579 # ok 13 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8071 13:54:42.828838 # ok 14 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8072 13:54:42.829043 # ok 15 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8073 13:54:42.829229 # ok 16 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8074 13:54:42.829437 # ok 17 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8075 13:54:42.829614 # ok 18 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8076 13:54:42.829799 # ok 19 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8077 13:54:42.830001 # ok 20 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8078 13:54:42.830174 # ok 21 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8079 13:54:42.830341 # ok 22 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8080 13:54:42.830540 # ok 23 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8081 13:54:42.830705 # ok 24 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8082 13:54:42.830865 # ok 25 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8083 13:54:42.836117 # ok 26 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8084 13:54:42.836653 # ok 27 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8085 13:54:42.836862 # ok 28 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8086 13:54:42.837050 # ok 29 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8087 13:54:42.837258 # ok 30 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8088 13:54:42.837451 # ok 31 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8089 13:54:42.837617 # ok 32 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8090 13:54:42.837810 # ok 33 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8091 13:54:42.837995 # ok 34 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8092 13:54:42.838184 # ok 35 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8093 13:54:42.838394 # ok 36 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8094 13:54:42.838612 # ok 37 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8095 13:54:42.839078 # ok 38 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8096 13:54:42.839215 # ok 39 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8097 13:54:42.839336 # ok 40 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8098 13:54:42.839484 # ok 41 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8099 13:54:42.839613 # ok 42 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8100 13:54:42.843896 # ok 43 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8101 13:54:42.844094 # ok 44 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8102 13:54:42.844252 # ok 45 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8103 13:54:42.844421 # ok 46 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8104 13:54:42.844625 # ok 47 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8105 13:54:42.844849 # ok 48 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8106 13:54:42.845063 # ok 49 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8107 13:54:42.845215 # ok 50 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8108 13:54:42.845371 # ok 51 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8109 13:54:44.454739 # ok 52 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8110 13:54:44.461218 # ok 53 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8111 13:54:44.461669 # ok 54 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8112 13:54:44.461782 # ok 55 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8113 13:54:44.461874 # ok 56 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8114 13:54:44.461980 # ok 57 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8115 13:54:44.462084 # ok 58 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8116 13:54:44.462181 # ok 59 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8117 13:54:44.462472 # ok 60 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8118 13:54:44.462574 # ok 61 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8119 13:54:44.462903 # ok 62 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8120 13:54:44.465096 # ok 63 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8121 13:54:44.465494 # ok 64 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8122 13:54:44.465630 # # Totals: pass:64 fail:0 xfail:0 xpass:0 skip:0 error:0
8123 13:54:44.482538 ok 42 selftests: arm64: check_user_mem
8124 13:54:44.585378 # selftests: arm64: btitest
8125 13:54:44.738664 # TAP version 13
8126 13:54:44.738943 # 1..18
8127 13:54:44.739073 # # HWCAP_PACA present
8128 13:54:44.739412 # # HWCAP2_BTI present
8129 13:54:44.739541 # # Test binary built for BTI
8130 13:54:44.744932 # # [SIGILL in nohint_func/call_using_br_x0, BTYPE=11 (expected)]
8131 13:54:44.745124 # ok 1 nohint_func/call_using_br_x0
8132 13:54:44.745328 # # [SIGILL in nohint_func/call_using_br_x16, BTYPE=01 (expected)]
8133 13:54:44.745496 # ok 2 nohint_func/call_using_br_x16
8134 13:54:44.745669 # # [SIGILL in nohint_func/call_using_blr, BTYPE=10 (expected)]
8135 13:54:44.745846 # ok 3 nohint_func/call_using_blr
8136 13:54:44.746067 # # [SIGILL in bti_none_func/call_using_br_x0, BTYPE=11 (expected)]
8137 13:54:44.746229 # ok 4 bti_none_func/call_using_br_x0
8138 13:54:44.746423 # # [SIGILL in bti_none_func/call_using_br_x16, BTYPE=01 (expected)]
8139 13:54:44.746596 # ok 5 bti_none_func/call_using_br_x16
8140 13:54:44.746765 # # [SIGILL in bti_none_func/call_using_blr, BTYPE=10 (expected)]
8141 13:54:44.746897 # ok 6 bti_none_func/call_using_blr
8142 13:54:44.747047 # # [SIGILL in bti_c_func/call_using_br_x0, BTYPE=11 (expected)]
8143 13:54:44.747171 # ok 7 bti_c_func/call_using_br_x0
8144 13:54:44.747289 # ok 8 bti_c_func/call_using_br_x16
8145 13:54:44.747403 # ok 9 bti_c_func/call_using_blr
8146 13:54:44.747519 # ok 10 bti_j_func/call_using_br_x0
8147 13:54:44.747635 # ok 11 bti_j_func/call_using_br_x16
8148 13:54:44.747750 # # [SIGILL in bti_j_func/call_using_blr, BTYPE=10 (expected)]
8149 13:54:44.747866 # ok 12 bti_j_func/call_using_blr
8150 13:54:44.747981 # ok 13 bti_jc_func/call_using_br_x0
8151 13:54:44.748756 # ok 14 bti_jc_func/call_using_br_x16
8152 13:54:44.749204 # ok 15 bti_jc_func/call_using_blr
8153 13:54:44.749381 # # [SIGILL in paciasp_func/call_using_br_x0, BTYPE=11 (expected)]
8154 13:54:44.749517 # ok 16 paciasp_func/call_using_br_x0
8155 13:54:44.749677 # ok 17 paciasp_func/call_using_br_x16
8156 13:54:44.749805 # ok 18 paciasp_func/call_using_blr
8157 13:54:44.749930 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8158 13:54:44.764549 ok 43 selftests: arm64: btitest
8159 13:54:44.866037 # selftests: arm64: nobtitest
8160 13:54:44.965566 # TAP version 13
8161 13:54:44.965894 # 1..18
8162 13:54:44.966098 # # HWCAP_PACA present
8163 13:54:44.966528 # # HWCAP2_BTI present
8164 13:54:44.966638 # # Test binary not built for BTI
8165 13:54:44.966740 # ok 1 nohint_func/call_using_br_x0
8166 13:54:44.966830 # ok 2 nohint_func/call_using_br_x16
8167 13:54:44.966919 # ok 3 nohint_func/call_using_blr
8168 13:54:44.967008 # ok 4 bti_none_func/call_using_br_x0
8169 13:54:44.967097 # ok 5 bti_none_func/call_using_br_x16
8170 13:54:44.967186 # ok 6 bti_none_func/call_using_blr
8171 13:54:44.967274 # ok 7 bti_c_func/call_using_br_x0
8172 13:54:44.967361 # ok 8 bti_c_func/call_using_br_x16
8173 13:54:44.967449 # ok 9 bti_c_func/call_using_blr
8174 13:54:44.967537 # ok 10 bti_j_func/call_using_br_x0
8175 13:54:44.967643 # ok 11 bti_j_func/call_using_br_x16
8176 13:54:44.967734 # ok 12 bti_j_func/call_using_blr
8177 13:54:44.969780 # ok 13 bti_jc_func/call_using_br_x0
8178 13:54:44.970076 # ok 14 bti_jc_func/call_using_br_x16
8179 13:54:44.970175 # ok 15 bti_jc_func/call_using_blr
8180 13:54:44.970265 # ok 16 paciasp_func/call_using_br_x0
8181 13:54:44.970352 # ok 17 paciasp_func/call_using_br_x16
8182 13:54:44.970456 # ok 18 paciasp_func/call_using_blr
8183 13:54:44.970547 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8184 13:54:44.992247 ok 44 selftests: arm64: nobtitest
8185 13:54:45.092498 # selftests: arm64: hwcap
8186 13:54:45.240959 # TAP version 13
8187 13:54:45.241197 # 1..28
8188 13:54:45.241492 # # RNG present
8189 13:54:45.241599 # ok 1 cpuinfo_match_RNG
8190 13:54:45.241701 # ok 2 sigill_RNG
8191 13:54:45.241792 # # SME present
8192 13:54:45.241879 # ok 3 cpuinfo_match_SME
8193 13:54:45.241966 # ok 4 sigill_SME
8194 13:54:45.242051 # # SVE present
8195 13:54:45.242137 # ok 5 cpuinfo_match_SVE
8196 13:54:45.242226 # ok 6 sigill_SVE
8197 13:54:45.242332 # # SVE 2 present
8198 13:54:45.242419 # ok 7 cpuinfo_match_SVE 2
8199 13:54:45.242505 # ok 8 sigill_SVE 2
8200 13:54:45.242591 # # SVE AES present
8201 13:54:45.242676 # ok 9 cpuinfo_match_SVE AES
8202 13:54:45.242762 # ok 10 sigill_SVE AES
8203 13:54:45.242846 # # SVE2 PMULL present
8204 13:54:45.242931 # ok 11 cpuinfo_match_SVE2 PMULL
8205 13:54:45.243015 # ok 12 sigill_SVE2 PMULL
8206 13:54:45.243100 # # SVE2 BITPERM present
8207 13:54:45.243185 # ok 13 cpuinfo_match_SVE2 BITPERM
8208 13:54:45.243275 # ok 14 sigill_SVE2 BITPERM
8209 13:54:45.243359 # # SVE2 SHA3 present
8210 13:54:45.243463 # ok 15 cpuinfo_match_SVE2 SHA3
8211 13:54:45.243550 # ok 16 sigill_SVE2 SHA3
8212 13:54:45.243635 # # SVE2 SM4 present
8213 13:54:45.243719 # ok 17 cpuinfo_match_SVE2 SM4
8214 13:54:45.243804 # ok 18 sigill_SVE2 SM4
8215 13:54:45.243888 # # SVE2 I8MM present
8216 13:54:45.243972 # ok 19 cpuinfo_match_SVE2 I8MM
8217 13:54:45.251661 # ok 20 sigill_SVE2 I8MM
8218 13:54:45.252001 # # SVE2 F32MM present
8219 13:54:45.252178 # ok 21 cpuinfo_match_SVE2 F32MM
8220 13:54:45.252320 # ok 22 sigill_SVE2 F32MM
8221 13:54:45.252452 # # SVE2 F64MM present
8222 13:54:45.252648 # ok 23 cpuinfo_match_SVE2 F64MM
8223 13:54:45.252799 # ok 24 sigill_SVE2 F64MM
8224 13:54:45.252923 # # SVE2 BF16 present
8225 13:54:45.253040 # ok 25 cpuinfo_match_SVE2 BF16
8226 13:54:45.253157 # ok 26 sigill_SVE2 BF16
8227 13:54:45.253273 # ok 27 cpuinfo_match_SVE2 EBF16
8228 13:54:45.253390 # ok 28 # SKIP sigill_SVE2 EBF16
8229 13:54:45.253531 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:1 error:0
8230 13:54:45.268737 ok 45 selftests: arm64: hwcap
8231 13:54:45.424928 # selftests: arm64: ptrace
8232 13:54:45.567867 # TAP version 13
8233 13:54:45.568125 # 1..7
8234 13:54:45.568543 # # Parent is 4394, child is 4395
8235 13:54:45.568706 # ok 1 read_tpidr_one
8236 13:54:45.568857 # ok 2 write_tpidr_one
8237 13:54:45.569001 # ok 3 verify_tpidr_one
8238 13:54:45.569142 # ok 4 count_tpidrs
8239 13:54:45.569282 # ok 5 tpidr2_write
8240 13:54:45.569426 # ok 6 tpidr2_read
8241 13:54:45.569567 # ok 7 write_tpidr_only
8242 13:54:45.569727 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
8243 13:54:45.592165 ok 46 selftests: arm64: ptrace
8244 13:54:45.700791 # selftests: arm64: syscall-abi
8245 13:54:48.242538 # TAP version 13
8246 13:54:48.242775 # 1..514
8247 13:54:48.242861 # # SME with FA64
8248 13:54:48.242949 # ok 1 getpid() FPSIMD
8249 13:54:48.243227 # ok 2 getpid() SVE VL 256
8250 13:54:48.243329 # ok 3 getpid() SVE VL 256/SME VL 256 SM+ZA
8251 13:54:48.243416 # ok 4 getpid() SVE VL 256/SME VL 256 SM
8252 13:54:48.243500 # ok 5 getpid() SVE VL 256/SME VL 256 ZA
8253 13:54:48.243596 # ok 6 getpid() SVE VL 256/SME VL 128 SM+ZA
8254 13:54:48.243682 # ok 7 getpid() SVE VL 256/SME VL 128 SM
8255 13:54:48.243762 # ok 8 getpid() SVE VL 256/SME VL 128 ZA
8256 13:54:48.243857 # ok 9 getpid() SVE VL 256/SME VL 64 SM+ZA
8257 13:54:48.243941 # ok 10 getpid() SVE VL 256/SME VL 64 SM
8258 13:54:48.244019 # ok 11 getpid() SVE VL 256/SME VL 64 ZA
8259 13:54:48.244097 # ok 12 getpid() SVE VL 256/SME VL 32 SM+ZA
8260 13:54:48.244191 # ok 13 getpid() SVE VL 256/SME VL 32 SM
8261 13:54:48.244271 # ok 14 getpid() SVE VL 256/SME VL 32 ZA
8262 13:54:48.244349 # ok 15 getpid() SVE VL 256/SME VL 16 SM+ZA
8263 13:54:48.244440 # ok 16 getpid() SVE VL 256/SME VL 16 SM
8264 13:54:48.244520 # ok 17 getpid() SVE VL 256/SME VL 16 ZA
8265 13:54:48.244598 # ok 18 getpid() SVE VL 240
8266 13:54:48.244690 # ok 19 getpid() SVE VL 240/SME VL 256 SM+ZA
8267 13:54:48.244769 # ok 20 getpid() SVE VL 240/SME VL 256 SM
8268 13:54:48.244848 # ok 21 getpid() SVE VL 240/SME VL 256 ZA
8269 13:54:48.244945 # ok 22 getpid() SVE VL 240/SME VL 128 SM+ZA
8270 13:54:48.245024 # ok 23 getpid() SVE VL 240/SME VL 128 SM
8271 13:54:48.245117 # ok 24 getpid() SVE VL 240/SME VL 128 ZA
8272 13:54:48.245197 # ok 25 getpid() SVE VL 240/SME VL 64 SM+ZA
8273 13:54:48.245289 # ok 26 getpid() SVE VL 240/SME VL 64 SM
8274 13:54:48.245381 # ok 27 getpid() SVE VL 240/SME VL 64 ZA
8275 13:54:48.245829 # ok 28 getpid() SVE VL 240/SME VL 32 SM+ZA
8276 13:54:48.245934 # ok 29 getpid() SVE VL 240/SME VL 32 SM
8277 13:54:48.246017 # ok 30 getpid() SVE VL 240/SME VL 32 ZA
8278 13:54:48.246099 # ok 31 getpid() SVE VL 240/SME VL 16 SM+ZA
8279 13:54:48.246192 # ok 32 getpid() SVE VL 240/SME VL 16 SM
8280 13:54:48.246273 # ok 33 getpid() SVE VL 240/SME VL 16 ZA
8281 13:54:48.246350 # ok 34 getpid() SVE VL 224
8282 13:54:48.246441 # ok 35 getpid() SVE VL 224/SME VL 256 SM+ZA
8283 13:54:48.246520 # ok 36 getpid() SVE VL 224/SME VL 256 SM
8284 13:54:48.246593 # ok 37 getpid() SVE VL 224/SME VL 256 ZA
8285 13:54:48.246686 # ok 38 getpid() SVE VL 224/SME VL 128 SM+ZA
8286 13:54:48.246765 # ok 39 getpid() SVE VL 224/SME VL 128 SM
8287 13:54:48.246860 # ok 40 getpid() SVE VL 224/SME VL 128 ZA
8288 13:54:48.251121 # ok 41 getpid() SVE VL 224/SME VL 64 SM+ZA
8289 13:54:48.251534 # ok 42 getpid() SVE VL 224/SME VL 64 SM
8290 13:54:48.251727 # ok 43 getpid() SVE VL 224/SME VL 64 ZA
8291 13:54:48.251860 # ok 44 getpid() SVE VL 224/SME VL 32 SM+ZA
8292 13:54:48.251983 # ok 45 getpid() SVE VL 224/SME VL 32 SM
8293 13:54:48.252219 # ok 46 getpid() SVE VL 224/SME VL 32 ZA
8294 13:54:48.252408 # ok 47 getpid() SVE VL 224/SME VL 16 SM+ZA
8295 13:54:48.252607 # ok 48 getpid() SVE VL 224/SME VL 16 SM
8296 13:54:48.252781 # ok 49 getpid() SVE VL 224/SME VL 16 ZA
8297 13:54:48.252922 # ok 50 getpid() SVE VL 208
8298 13:54:48.253089 # ok 51 getpid() SVE VL 208/SME VL 256 SM+ZA
8299 13:54:48.253264 # ok 52 getpid() SVE VL 208/SME VL 256 SM
8300 13:54:48.253419 # ok 53 getpid() SVE VL 208/SME VL 256 ZA
8301 13:54:48.253566 # ok 54 getpid() SVE VL 208/SME VL 128 SM+ZA
8302 13:54:48.253723 # ok 55 getpid() SVE VL 208/SME VL 128 SM
8303 13:54:48.253866 # ok 56 getpid() SVE VL 208/SME VL 128 ZA
8304 13:54:48.254050 # ok 57 getpid() SVE VL 208/SME VL 64 SM+ZA
8305 13:54:48.254203 # ok 58 getpid() SVE VL 208/SME VL 64 SM
8306 13:54:48.254386 # ok 59 getpid() SVE VL 208/SME VL 64 ZA
8307 13:54:48.254536 # ok 60 getpid() SVE VL 208/SME VL 32 SM+ZA
8308 13:54:48.254711 # ok 61 getpid() SVE VL 208/SME VL 32 SM
8309 13:54:48.254858 # ok 62 getpid() SVE VL 208/SME VL 32 ZA
8310 13:54:48.255011 # ok 63 getpid() SVE VL 208/SME VL 16 SM+ZA
8311 13:54:48.255134 # ok 64 getpid() SVE VL 208/SME VL 16 SM
8312 13:54:48.255248 # ok 65 getpid() SVE VL 208/SME VL 16 ZA
8313 13:54:48.255362 # ok 66 getpid() SVE VL 192
8314 13:54:48.255476 # ok 67 getpid() SVE VL 192/SME VL 256 SM+ZA
8315 13:54:48.255589 # ok 68 getpid() SVE VL 192/SME VL 256 SM
8316 13:54:48.255701 # ok 69 getpid() SVE VL 192/SME VL 256 ZA
8317 13:54:48.255813 # ok 70 getpid() SVE VL 192/SME VL 128 SM+ZA
8318 13:54:48.255927 # ok 71 getpid() SVE VL 192/SME VL 128 SM
8319 13:54:48.256040 # ok 72 getpid() SVE VL 192/SME VL 128 ZA
8320 13:54:48.256153 # ok 73 getpid() SVE VL 192/SME VL 64 SM+ZA
8321 13:54:48.256265 # ok 74 getpid() SVE VL 192/SME VL 64 SM
8322 13:54:48.256379 # ok 75 getpid() SVE VL 192/SME VL 64 ZA
8323 13:54:48.256491 # ok 76 getpid() SVE VL 192/SME VL 32 SM+ZA
8324 13:54:48.259135 # ok 77 getpid() SVE VL 192/SME VL 32 SM
8325 13:54:48.259347 # ok 78 getpid() SVE VL 192/SME VL 32 ZA
8326 13:54:48.259746 # ok 79 getpid() SVE VL 192/SME VL 16 SM+ZA
8327 13:54:48.259933 # ok 80 getpid() SVE VL 192/SME VL 16 SM
8328 13:54:48.260168 # ok 81 getpid() SVE VL 192/SME VL 16 ZA
8329 13:54:48.260343 # ok 82 getpid() SVE VL 176
8330 13:54:48.260501 # ok 83 getpid() SVE VL 176/SME VL 256 SM+ZA
8331 13:54:48.260680 # ok 84 getpid() SVE VL 176/SME VL 256 SM
8332 13:54:48.260870 # ok 85 getpid() SVE VL 176/SME VL 256 ZA
8333 13:54:48.261067 # ok 86 getpid() SVE VL 176/SME VL 128 SM+ZA
8334 13:54:48.261198 # ok 87 getpid() SVE VL 176/SME VL 128 SM
8335 13:54:48.261319 # ok 88 getpid() SVE VL 176/SME VL 128 ZA
8336 13:54:48.261436 # ok 89 getpid() SVE VL 176/SME VL 64 SM+ZA
8337 13:54:48.261552 # ok 90 getpid() SVE VL 176/SME VL 64 SM
8338 13:54:48.261698 # ok 91 getpid() SVE VL 176/SME VL 64 ZA
8339 13:54:48.261914 # ok 92 getpid() SVE VL 176/SME VL 32 SM+ZA
8340 13:54:48.262091 # ok 93 getpid() SVE VL 176/SME VL 32 SM
8341 13:54:48.262236 # ok 94 getpid() SVE VL 176/SME VL 32 ZA
8342 13:54:48.262378 # ok 95 getpid() SVE VL 176/SME VL 16 SM+ZA
8343 13:54:48.262520 # ok 96 getpid() SVE VL 176/SME VL 16 SM
8344 13:54:48.262667 # ok 97 getpid() SVE VL 176/SME VL 16 ZA
8345 13:54:48.262844 # ok 98 getpid() SVE VL 160
8346 13:54:50.680300 # ok 99 getpid() SVE VL 160/SME VL 256 SM+ZA
8347 13:54:50.681336 # ok 100 getpid() SVE VL 160/SME VL 256 SM
8348 13:54:50.681562 # ok 101 getpid() SVE VL 160/SME VL 256 ZA
8349 13:54:50.681756 # ok 102 getpid() SVE VL 160/SME VL 128 SM+ZA
8350 13:54:50.681916 # ok 103 getpid() SVE VL 160/SME VL 128 SM
8351 13:54:50.682134 # ok 104 getpid() SVE VL 160/SME VL 128 ZA
8352 13:54:50.682311 # ok 105 getpid() SVE VL 160/SME VL 64 SM+ZA
8353 13:54:50.682475 # ok 106 getpid() SVE VL 160/SME VL 64 SM
8354 13:54:50.682646 # ok 107 getpid() SVE VL 160/SME VL 64 ZA
8355 13:54:50.682843 # ok 108 getpid() SVE VL 160/SME VL 32 SM+ZA
8356 13:54:50.683055 # ok 109 getpid() SVE VL 160/SME VL 32 SM
8357 13:54:50.683214 # ok 110 getpid() SVE VL 160/SME VL 32 ZA
8358 13:54:50.683334 # ok 111 getpid() SVE VL 160/SME VL 16 SM+ZA
8359 13:54:50.683468 # ok 112 getpid() SVE VL 160/SME VL 16 SM
8360 13:54:50.683645 # ok 113 getpid() SVE VL 160/SME VL 16 ZA
8361 13:54:50.683783 # ok 114 getpid() SVE VL 144
8362 13:54:50.683934 # ok 115 getpid() SVE VL 144/SME VL 256 SM+ZA
8363 13:54:50.684055 # ok 116 getpid() SVE VL 144/SME VL 256 SM
8364 13:54:50.684170 # ok 117 getpid() SVE VL 144/SME VL 256 ZA
8365 13:54:50.684286 # ok 118 getpid() SVE VL 144/SME VL 128 SM+ZA
8366 13:54:50.684404 # ok 119 getpid() SVE VL 144/SME VL 128 SM
8367 13:54:50.684526 # ok 120 getpid() SVE VL 144/SME VL 128 ZA
8368 13:54:50.684650 # ok 121 getpid() SVE VL 144/SME VL 64 SM+ZA
8369 13:54:50.684779 # ok 122 getpid() SVE VL 144/SME VL 64 SM
8370 13:54:50.684900 # ok 123 getpid() SVE VL 144/SME VL 64 ZA
8371 13:54:50.685021 # ok 124 getpid() SVE VL 144/SME VL 32 SM+ZA
8372 13:54:50.685141 # ok 125 getpid() SVE VL 144/SME VL 32 SM
8373 13:54:50.685260 # ok 126 getpid() SVE VL 144/SME VL 32 ZA
8374 13:54:50.685379 # ok 127 getpid() SVE VL 144/SME VL 16 SM+ZA
8375 13:54:50.685493 # ok 128 getpid() SVE VL 144/SME VL 16 SM
8376 13:54:50.688006 # ok 129 getpid() SVE VL 144/SME VL 16 ZA
8377 13:54:50.688129 # ok 130 getpid() SVE VL 128
8378 13:54:50.688245 # ok 131 getpid() SVE VL 128/SME VL 256 SM+ZA
8379 13:54:50.688558 # ok 132 getpid() SVE VL 128/SME VL 256 SM
8380 13:54:50.688657 # ok 133 getpid() SVE VL 128/SME VL 256 ZA
8381 13:54:50.688756 # ok 134 getpid() SVE VL 128/SME VL 128 SM+ZA
8382 13:54:50.688841 # ok 135 getpid() SVE VL 128/SME VL 128 SM
8383 13:54:50.689108 # ok 136 getpid() SVE VL 128/SME VL 128 ZA
8384 13:54:50.689191 # ok 137 getpid() SVE VL 128/SME VL 64 SM+ZA
8385 13:54:50.689271 # ok 138 getpid() SVE VL 128/SME VL 64 SM
8386 13:54:50.689351 # ok 139 getpid() SVE VL 128/SME VL 64 ZA
8387 13:54:50.689429 # ok 140 getpid() SVE VL 128/SME VL 32 SM+ZA
8388 13:54:50.689506 # ok 141 getpid() SVE VL 128/SME VL 32 SM
8389 13:54:50.689600 # ok 142 getpid() SVE VL 128/SME VL 32 ZA
8390 13:54:50.689673 # ok 143 getpid() SVE VL 128/SME VL 16 SM+ZA
8391 13:54:50.689737 # ok 144 getpid() SVE VL 128/SME VL 16 SM
8392 13:54:50.689812 # ok 145 getpid() SVE VL 128/SME VL 16 ZA
8393 13:54:50.689886 # ok 146 getpid() SVE VL 112
8394 13:54:50.689977 # ok 147 getpid() SVE VL 112/SME VL 256 SM+ZA
8395 13:54:50.690072 # ok 148 getpid() SVE VL 112/SME VL 256 SM
8396 13:54:50.690165 # ok 149 getpid() SVE VL 112/SME VL 256 ZA
8397 13:54:50.690257 # ok 150 getpid() SVE VL 112/SME VL 128 SM+ZA
8398 13:54:50.690353 # ok 151 getpid() SVE VL 112/SME VL 128 SM
8399 13:54:50.690451 # ok 152 getpid() SVE VL 112/SME VL 128 ZA
8400 13:54:50.690730 # ok 153 getpid() SVE VL 112/SME VL 64 SM+ZA
8401 13:54:50.690809 # ok 154 getpid() SVE VL 112/SME VL 64 SM
8402 13:54:50.690870 # ok 155 getpid() SVE VL 112/SME VL 64 ZA
8403 13:54:50.695098 # ok 156 getpid() SVE VL 112/SME VL 32 SM+ZA
8404 13:54:50.695462 # ok 157 getpid() SVE VL 112/SME VL 32 SM
8405 13:54:50.695554 # ok 158 getpid() SVE VL 112/SME VL 32 ZA
8406 13:54:50.695627 # ok 159 getpid() SVE VL 112/SME VL 16 SM+ZA
8407 13:54:50.695708 # ok 160 getpid() SVE VL 112/SME VL 16 SM
8408 13:54:50.695775 # ok 161 getpid() SVE VL 112/SME VL 16 ZA
8409 13:54:50.695884 # ok 162 getpid() SVE VL 96
8410 13:54:50.695956 # ok 163 getpid() SVE VL 96/SME VL 256 SM+ZA
8411 13:54:50.696049 # ok 164 getpid() SVE VL 96/SME VL 256 SM
8412 13:54:50.696123 # ok 165 getpid() SVE VL 96/SME VL 256 ZA
8413 13:54:50.696197 # ok 166 getpid() SVE VL 96/SME VL 128 SM+ZA
8414 13:54:50.696462 # ok 167 getpid() SVE VL 96/SME VL 128 SM
8415 13:54:50.696531 # ok 168 getpid() SVE VL 96/SME VL 128 ZA
8416 13:54:50.696610 # ok 169 getpid() SVE VL 96/SME VL 64 SM+ZA
8417 13:54:50.696684 # ok 170 getpid() SVE VL 96/SME VL 64 SM
8418 13:54:50.696746 # ok 171 getpid() SVE VL 96/SME VL 64 ZA
8419 13:54:50.696993 # ok 172 getpid() SVE VL 96/SME VL 32 SM+ZA
8420 13:54:50.697058 # ok 173 getpid() SVE VL 96/SME VL 32 SM
8421 13:54:50.697129 # ok 174 getpid() SVE VL 96/SME VL 32 ZA
8422 13:54:50.697203 # ok 175 getpid() SVE VL 96/SME VL 16 SM+ZA
8423 13:54:50.697444 # ok 176 getpid() SVE VL 96/SME VL 16 SM
8424 13:54:50.697509 # ok 177 getpid() SVE VL 96/SME VL 16 ZA
8425 13:54:50.697569 # ok 178 getpid() SVE VL 80
8426 13:54:50.697641 # ok 179 getpid() SVE VL 80/SME VL 256 SM+ZA
8427 13:54:50.697728 # ok 180 getpid() SVE VL 80/SME VL 256 SM
8428 13:54:50.697976 # ok 181 getpid() SVE VL 80/SME VL 256 ZA
8429 13:54:50.698052 # ok 182 getpid() SVE VL 80/SME VL 128 SM+ZA
8430 13:54:50.698124 # ok 183 getpid() SVE VL 80/SME VL 128 SM
8431 13:54:50.698196 # ok 184 getpid() SVE VL 80/SME VL 128 ZA
8432 13:54:50.698445 # ok 185 getpid() SVE VL 80/SME VL 64 SM+ZA
8433 13:54:50.698520 # ok 186 getpid() SVE VL 80/SME VL 64 SM
8434 13:54:50.698592 # ok 187 getpid() SVE VL 80/SME VL 64 ZA
8435 13:54:50.698665 # ok 188 getpid() SVE VL 80/SME VL 32 SM+ZA
8436 13:54:50.703997 # ok 189 getpid() SVE VL 80/SME VL 32 SM
8437 13:54:50.704328 # ok 190 getpid() SVE VL 80/SME VL 32 ZA
8438 13:54:50.704397 # ok 191 getpid() SVE VL 80/SME VL 16 SM+ZA
8439 13:54:50.704480 # ok 192 getpid() SVE VL 80/SME VL 16 SM
8440 13:54:50.704563 # ok 193 getpid() SVE VL 80/SME VL 16 ZA
8441 13:54:50.704638 # ok 194 getpid() SVE VL 64
8442 13:54:50.704700 # ok 195 getpid() SVE VL 64/SME VL 256 SM+ZA
8443 13:54:52.930855 # ok 196 getpid() SVE VL 64/SME VL 256 SM
8444 13:54:52.931692 # ok 197 getpid() SVE VL 64/SME VL 256 ZA
8445 13:54:52.931913 # ok 198 getpid() SVE VL 64/SME VL 128 SM+ZA
8446 13:54:52.932180 # ok 199 getpid() SVE VL 64/SME VL 128 SM
8447 13:54:52.932377 # ok 200 getpid() SVE VL 64/SME VL 128 ZA
8448 13:54:52.932583 # ok 201 getpid() SVE VL 64/SME VL 64 SM+ZA
8449 13:54:52.932764 # ok 202 getpid() SVE VL 64/SME VL 64 SM
8450 13:54:52.932901 # ok 203 getpid() SVE VL 64/SME VL 64 ZA
8451 13:54:52.933024 # ok 204 getpid() SVE VL 64/SME VL 32 SM+ZA
8452 13:54:52.933170 # ok 205 getpid() SVE VL 64/SME VL 32 SM
8453 13:54:52.933292 # ok 206 getpid() SVE VL 64/SME VL 32 ZA
8454 13:54:52.933409 # ok 207 getpid() SVE VL 64/SME VL 16 SM+ZA
8455 13:54:52.933550 # ok 208 getpid() SVE VL 64/SME VL 16 SM
8456 13:54:52.933724 # ok 209 getpid() SVE VL 64/SME VL 16 ZA
8457 13:54:52.933897 # ok 210 getpid() SVE VL 48
8458 13:54:52.934050 # ok 211 getpid() SVE VL 48/SME VL 256 SM+ZA
8459 13:54:52.934205 # ok 212 getpid() SVE VL 48/SME VL 256 SM
8460 13:54:52.934357 # ok 213 getpid() SVE VL 48/SME VL 256 ZA
8461 13:54:52.934560 # ok 214 getpid() SVE VL 48/SME VL 128 SM+ZA
8462 13:54:52.934722 # ok 215 getpid() SVE VL 48/SME VL 128 SM
8463 13:54:52.934853 # ok 216 getpid() SVE VL 48/SME VL 128 ZA
8464 13:54:52.934968 # ok 217 getpid() SVE VL 48/SME VL 64 SM+ZA
8465 13:54:52.935081 # ok 218 getpid() SVE VL 48/SME VL 64 SM
8466 13:54:52.935194 # ok 219 getpid() SVE VL 48/SME VL 64 ZA
8467 13:54:52.935306 # ok 220 getpid() SVE VL 48/SME VL 32 SM+ZA
8468 13:54:52.935418 # ok 221 getpid() SVE VL 48/SME VL 32 SM
8469 13:54:52.935531 # ok 222 getpid() SVE VL 48/SME VL 32 ZA
8470 13:54:52.935644 # ok 223 getpid() SVE VL 48/SME VL 16 SM+ZA
8471 13:54:52.935758 # ok 224 getpid() SVE VL 48/SME VL 16 SM
8472 13:54:52.935874 # ok 225 getpid() SVE VL 48/SME VL 16 ZA
8473 13:54:52.935986 # ok 226 getpid() SVE VL 32
8474 13:54:52.936098 # ok 227 getpid() SVE VL 32/SME VL 256 SM+ZA
8475 13:54:52.936210 # ok 228 getpid() SVE VL 32/SME VL 256 SM
8476 13:54:52.936323 # ok 229 getpid() SVE VL 32/SME VL 256 ZA
8477 13:54:52.936435 # ok 230 getpid() SVE VL 32/SME VL 128 SM+ZA
8478 13:54:52.936549 # ok 231 getpid() SVE VL 32/SME VL 128 SM
8479 13:54:52.936661 # ok 232 getpid() SVE VL 32/SME VL 128 ZA
8480 13:54:52.936774 # ok 233 getpid() SVE VL 32/SME VL 64 SM+ZA
8481 13:54:52.936887 # ok 234 getpid() SVE VL 32/SME VL 64 SM
8482 13:54:52.937024 # ok 235 getpid() SVE VL 32/SME VL 64 ZA
8483 13:54:52.937141 # ok 236 getpid() SVE VL 32/SME VL 32 SM+ZA
8484 13:54:52.937254 # ok 237 getpid() SVE VL 32/SME VL 32 SM
8485 13:54:52.937371 # ok 238 getpid() SVE VL 32/SME VL 32 ZA
8486 13:54:52.939391 # ok 239 getpid() SVE VL 32/SME VL 16 SM+ZA
8487 13:54:52.939593 # ok 240 getpid() SVE VL 32/SME VL 16 SM
8488 13:54:52.939744 # ok 241 getpid() SVE VL 32/SME VL 16 ZA
8489 13:54:52.939891 # ok 242 getpid() SVE VL 16
8490 13:54:52.940019 # ok 243 getpid() SVE VL 16/SME VL 256 SM+ZA
8491 13:54:52.940157 # ok 244 getpid() SVE VL 16/SME VL 256 SM
8492 13:54:52.940308 # ok 245 getpid() SVE VL 16/SME VL 256 ZA
8493 13:54:52.940488 # ok 246 getpid() SVE VL 16/SME VL 128 SM+ZA
8494 13:54:52.940638 # ok 247 getpid() SVE VL 16/SME VL 128 SM
8495 13:54:52.940795 # ok 248 getpid() SVE VL 16/SME VL 128 ZA
8496 13:54:52.940954 # ok 249 getpid() SVE VL 16/SME VL 64 SM+ZA
8497 13:54:52.941144 # ok 250 getpid() SVE VL 16/SME VL 64 SM
8498 13:54:52.941308 # ok 251 getpid() SVE VL 16/SME VL 64 ZA
8499 13:54:52.941466 # ok 252 getpid() SVE VL 16/SME VL 32 SM+ZA
8500 13:54:52.941621 # ok 253 getpid() SVE VL 16/SME VL 32 SM
8501 13:54:52.941790 # ok 254 getpid() SVE VL 16/SME VL 32 ZA
8502 13:54:52.941941 # ok 255 getpid() SVE VL 16/SME VL 16 SM+ZA
8503 13:54:52.942096 # ok 256 getpid() SVE VL 16/SME VL 16 SM
8504 13:54:52.942295 # ok 257 getpid() SVE VL 16/SME VL 16 ZA
8505 13:54:52.942461 # ok 258 sched_yield() FPSIMD
8506 13:54:52.942625 # ok 259 sched_yield() SVE VL 256
8507 13:54:52.942769 # ok 260 sched_yield() SVE VL 256/SME VL 256 SM+ZA
8508 13:54:52.942888 # ok 261 sched_yield() SVE VL 256/SME VL 256 SM
8509 13:54:52.943004 # ok 262 sched_yield() SVE VL 256/SME VL 256 ZA
8510 13:54:52.943119 # ok 263 sched_yield() SVE VL 256/SME VL 128 SM+ZA
8511 13:54:52.943232 # ok 264 sched_yield() SVE VL 256/SME VL 128 SM
8512 13:54:52.943346 # ok 265 sched_yield() SVE VL 256/SME VL 128 ZA
8513 13:54:52.943461 # ok 266 sched_yield() SVE VL 256/SME VL 64 SM+ZA
8514 13:54:52.943575 # ok 267 sched_yield() SVE VL 256/SME VL 64 SM
8515 13:54:52.943689 # ok 268 sched_yield() SVE VL 256/SME VL 64 ZA
8516 13:54:52.943803 # ok 269 sched_yield() SVE VL 256/SME VL 32 SM+ZA
8517 13:54:52.943947 # ok 270 sched_yield() SVE VL 256/SME VL 32 SM
8518 13:54:52.944068 # ok 271 sched_yield() SVE VL 256/SME VL 32 ZA
8519 13:54:52.944183 # ok 272 sched_yield() SVE VL 256/SME VL 16 SM+ZA
8520 13:54:52.944298 # ok 273 sched_yield() SVE VL 256/SME VL 16 SM
8521 13:54:52.947145 # ok 274 sched_yield() SVE VL 256/SME VL 16 ZA
8522 13:54:52.947608 # ok 275 sched_yield() SVE VL 240
8523 13:54:52.947720 # ok 276 sched_yield() SVE VL 240/SME VL 256 SM+ZA
8524 13:54:52.947821 # ok 277 sched_yield() SVE VL 240/SME VL 256 SM
8525 13:54:52.947907 # ok 278 sched_yield() SVE VL 240/SME VL 256 ZA
8526 13:54:52.947991 # ok 279 sched_yield() SVE VL 240/SME VL 128 SM+ZA
8527 13:54:52.948093 # ok 280 sched_yield() SVE VL 240/SME VL 128 SM
8528 13:54:52.948180 # ok 281 sched_yield() SVE VL 240/SME VL 128 ZA
8529 13:54:52.948262 # ok 282 sched_yield() SVE VL 240/SME VL 64 SM+ZA
8530 13:54:52.948362 # ok 283 sched_yield() SVE VL 240/SME VL 64 SM
8531 13:54:52.948447 # ok 284 sched_yield() SVE VL 240/SME VL 64 ZA
8532 13:54:52.948544 # ok 285 sched_yield() SVE VL 240/SME VL 32 SM+ZA
8533 13:54:52.948883 # ok 286 sched_yield() SVE VL 240/SME VL 32 SM
8534 13:54:52.949079 # ok 287 sched_yield() SVE VL 240/SME VL 32 ZA
8535 13:54:52.949249 # ok 288 sched_yield() SVE VL 240/SME VL 16 SM+ZA
8536 13:54:52.949378 # ok 289 sched_yield() SVE VL 240/SME VL 16 SM
8537 13:54:54.945871 # ok 290 sched_yield() SVE VL 240/SME VL 16 ZA
8538 13:54:54.946351 # ok 291 sched_yield() SVE VL 224
8539 13:54:54.946459 # ok 292 sched_yield() SVE VL 224/SME VL 256 SM+ZA
8540 13:54:54.946553 # ok 293 sched_yield() SVE VL 224/SME VL 256 SM
8541 13:54:54.946642 # ok 294 sched_yield() SVE VL 224/SME VL 256 ZA
8542 13:54:54.946744 # ok 295 sched_yield() SVE VL 224/SME VL 128 SM+ZA
8543 13:54:54.946831 # ok 296 sched_yield() SVE VL 224/SME VL 128 SM
8544 13:54:54.946931 # ok 297 sched_yield() SVE VL 224/SME VL 128 ZA
8545 13:54:54.954974 # ok 298 sched_yield() SVE VL 224/SME VL 64 SM+ZA
8546 13:54:54.955540 # ok 299 sched_yield() SVE VL 224/SME VL 64 SM
8547 13:54:54.955751 # ok 300 sched_yield() SVE VL 224/SME VL 64 ZA
8548 13:54:54.955930 # ok 301 sched_yield() SVE VL 224/SME VL 32 SM+ZA
8549 13:54:54.956122 # ok 302 sched_yield() SVE VL 224/SME VL 32 SM
8550 13:54:54.956309 # ok 303 sched_yield() SVE VL 224/SME VL 32 ZA
8551 13:54:54.956550 # ok 304 sched_yield() SVE VL 224/SME VL 16 SM+ZA
8552 13:54:54.956720 # ok 305 sched_yield() SVE VL 224/SME VL 16 SM
8553 13:54:54.956873 # ok 306 sched_yield() SVE VL 224/SME VL 16 ZA
8554 13:54:54.957019 # ok 307 sched_yield() SVE VL 208
8555 13:54:54.957163 # ok 308 sched_yield() SVE VL 208/SME VL 256 SM+ZA
8556 13:54:54.957306 # ok 309 sched_yield() SVE VL 208/SME VL 256 SM
8557 13:54:54.957450 # ok 310 sched_yield() SVE VL 208/SME VL 256 ZA
8558 13:54:54.957687 # ok 311 sched_yield() SVE VL 208/SME VL 128 SM+ZA
8559 13:54:54.957850 # ok 312 sched_yield() SVE VL 208/SME VL 128 SM
8560 13:54:54.958040 # ok 313 sched_yield() SVE VL 208/SME VL 128 ZA
8561 13:54:54.958213 # ok 314 sched_yield() SVE VL 208/SME VL 64 SM+ZA
8562 13:54:54.958375 # ok 315 sched_yield() SVE VL 208/SME VL 64 SM
8563 13:54:54.958542 # ok 316 sched_yield() SVE VL 208/SME VL 64 ZA
8564 13:54:54.958704 # ok 317 sched_yield() SVE VL 208/SME VL 32 SM+ZA
8565 13:54:54.958840 # ok 318 sched_yield() SVE VL 208/SME VL 32 SM
8566 13:54:54.958962 # ok 319 sched_yield() SVE VL 208/SME VL 32 ZA
8567 13:54:54.959161 # ok 320 sched_yield() SVE VL 208/SME VL 16 SM+ZA
8568 13:54:54.959335 # ok 321 sched_yield() SVE VL 208/SME VL 16 SM
8569 13:54:54.959495 # ok 322 sched_yield() SVE VL 208/SME VL 16 ZA
8570 13:54:54.959622 # ok 323 sched_yield() SVE VL 192
8571 13:54:54.959738 # ok 324 sched_yield() SVE VL 192/SME VL 256 SM+ZA
8572 13:54:54.959862 # ok 325 sched_yield() SVE VL 192/SME VL 256 SM
8573 13:54:54.960016 # ok 326 sched_yield() SVE VL 192/SME VL 256 ZA
8574 13:54:54.960176 # ok 327 sched_yield() SVE VL 192/SME VL 128 SM+ZA
8575 13:54:54.960334 # ok 328 sched_yield() SVE VL 192/SME VL 128 SM
8576 13:54:54.960495 # ok 329 sched_yield() SVE VL 192/SME VL 128 ZA
8577 13:54:54.960676 # ok 330 sched_yield() SVE VL 192/SME VL 64 SM+ZA
8578 13:54:54.960831 # ok 331 sched_yield() SVE VL 192/SME VL 64 SM
8579 13:54:54.960976 # ok 332 sched_yield() SVE VL 192/SME VL 64 ZA
8580 13:54:54.961137 # ok 333 sched_yield() SVE VL 192/SME VL 32 SM+ZA
8581 13:54:54.961295 # ok 334 sched_yield() SVE VL 192/SME VL 32 SM
8582 13:54:54.961451 # ok 335 sched_yield() SVE VL 192/SME VL 32 ZA
8583 13:54:54.961593 # ok 336 sched_yield() SVE VL 192/SME VL 16 SM+ZA
8584 13:54:54.962459 # ok 337 sched_yield() SVE VL 192/SME VL 16 SM
8585 13:54:54.962657 # ok 338 sched_yield() SVE VL 192/SME VL 16 ZA
8586 13:54:54.962903 # ok 339 sched_yield() SVE VL 176
8587 13:54:54.963287 # ok 340 sched_yield() SVE VL 176/SME VL 256 SM+ZA
8588 13:54:54.963430 # ok 341 sched_yield() SVE VL 176/SME VL 256 SM
8589 13:54:54.963577 # ok 342 sched_yield() SVE VL 176/SME VL 256 ZA
8590 13:54:54.963723 # ok 343 sched_yield() SVE VL 176/SME VL 128 SM+ZA
8591 13:54:54.963865 # ok 344 sched_yield() SVE VL 176/SME VL 128 SM
8592 13:54:54.964008 # ok 345 sched_yield() SVE VL 176/SME VL 128 ZA
8593 13:54:54.964149 # ok 346 sched_yield() SVE VL 176/SME VL 64 SM+ZA
8594 13:54:54.964289 # ok 347 sched_yield() SVE VL 176/SME VL 64 SM
8595 13:54:54.964429 # ok 348 sched_yield() SVE VL 176/SME VL 64 ZA
8596 13:54:54.964572 # ok 349 sched_yield() SVE VL 176/SME VL 32 SM+ZA
8597 13:54:54.964713 # ok 350 sched_yield() SVE VL 176/SME VL 32 SM
8598 13:54:54.964854 # ok 351 sched_yield() SVE VL 176/SME VL 32 ZA
8599 13:54:54.964995 # ok 352 sched_yield() SVE VL 176/SME VL 16 SM+ZA
8600 13:54:54.965135 # ok 353 sched_yield() SVE VL 176/SME VL 16 SM
8601 13:54:54.965276 # ok 354 sched_yield() SVE VL 176/SME VL 16 ZA
8602 13:54:54.965417 # ok 355 sched_yield() SVE VL 160
8603 13:54:54.967078 # ok 356 sched_yield() SVE VL 160/SME VL 256 SM+ZA
8604 13:54:54.967527 # ok 357 sched_yield() SVE VL 160/SME VL 256 SM
8605 13:54:54.967737 # ok 358 sched_yield() SVE VL 160/SME VL 256 ZA
8606 13:54:54.967895 # ok 359 sched_yield() SVE VL 160/SME VL 128 SM+ZA
8607 13:54:54.968040 # ok 360 sched_yield() SVE VL 160/SME VL 128 SM
8608 13:54:54.968229 # ok 361 sched_yield() SVE VL 160/SME VL 128 ZA
8609 13:54:54.968396 # ok 362 sched_yield() SVE VL 160/SME VL 64 SM+ZA
8610 13:54:54.968561 # ok 363 sched_yield() SVE VL 160/SME VL 64 SM
8611 13:54:54.968719 # ok 364 sched_yield() SVE VL 160/SME VL 64 ZA
8612 13:54:54.968885 # ok 365 sched_yield() SVE VL 160/SME VL 32 SM+ZA
8613 13:54:54.969092 # ok 366 sched_yield() SVE VL 160/SME VL 32 SM
8614 13:54:54.969234 # ok 367 sched_yield() SVE VL 160/SME VL 32 ZA
8615 13:54:54.969352 # ok 368 sched_yield() SVE VL 160/SME VL 16 SM+ZA
8616 13:54:54.969468 # ok 369 sched_yield() SVE VL 160/SME VL 16 SM
8617 13:54:54.969584 # ok 370 sched_yield() SVE VL 160/SME VL 16 ZA
8618 13:54:54.969758 # ok 371 sched_yield() SVE VL 144
8619 13:54:54.969959 # ok 372 sched_yield() SVE VL 144/SME VL 256 SM+ZA
8620 13:54:54.970135 # ok 373 sched_yield() SVE VL 144/SME VL 256 SM
8621 13:54:54.970280 # ok 374 sched_yield() SVE VL 144/SME VL 256 ZA
8622 13:54:54.970423 # ok 375 sched_yield() SVE VL 144/SME VL 128 SM+ZA
8623 13:54:54.970600 # ok 376 sched_yield() SVE VL 144/SME VL 128 SM
8624 13:54:57.030392 # ok 377 sched_yield() SVE VL 144/SME VL 128 ZA
8625 13:54:57.030742 # ok 378 sched_yield() SVE VL 144/SME VL 64 SM+ZA
8626 13:54:57.030915 # ok 379 sched_yield() SVE VL 144/SME VL 64 SM
8627 13:54:57.031077 # ok 380 sched_yield() SVE VL 144/SME VL 64 ZA
8628 13:54:57.031269 # ok 381 sched_yield() SVE VL 144/SME VL 32 SM+ZA
8629 13:54:57.031441 # ok 382 sched_yield() SVE VL 144/SME VL 32 SM
8630 13:54:57.031635 # ok 383 sched_yield() SVE VL 144/SME VL 32 ZA
8631 13:54:57.031799 # ok 384 sched_yield() SVE VL 144/SME VL 16 SM+ZA
8632 13:54:57.031959 # ok 385 sched_yield() SVE VL 144/SME VL 16 SM
8633 13:54:57.032121 # ok 386 sched_yield() SVE VL 144/SME VL 16 ZA
8634 13:54:57.032276 # ok 387 sched_yield() SVE VL 128
8635 13:54:57.032466 # ok 388 sched_yield() SVE VL 128/SME VL 256 SM+ZA
8636 13:54:57.032625 # ok 389 sched_yield() SVE VL 128/SME VL 256 SM
8637 13:54:57.032770 # ok 390 sched_yield() SVE VL 128/SME VL 256 ZA
8638 13:54:57.032915 # ok 391 sched_yield() SVE VL 128/SME VL 128 SM+ZA
8639 13:54:57.033063 # ok 392 sched_yield() SVE VL 128/SME VL 128 SM
8640 13:54:57.033222 # ok 393 sched_yield() SVE VL 128/SME VL 128 ZA
8641 13:54:57.033375 # ok 394 sched_yield() SVE VL 128/SME VL 64 SM+ZA
8642 13:54:57.033528 # ok 395 sched_yield() SVE VL 128/SME VL 64 SM
8643 13:54:57.037722 # ok 396 sched_yield() SVE VL 128/SME VL 64 ZA
8644 13:54:57.037921 # ok 397 sched_yield() SVE VL 128/SME VL 32 SM+ZA
8645 13:54:57.038093 # ok 398 sched_yield() SVE VL 128/SME VL 32 SM
8646 13:54:57.038315 # ok 399 sched_yield() SVE VL 128/SME VL 32 ZA
8647 13:54:57.038497 # ok 400 sched_yield() SVE VL 128/SME VL 16 SM+ZA
8648 13:54:57.038668 # ok 401 sched_yield() SVE VL 128/SME VL 16 SM
8649 13:54:57.038840 # ok 402 sched_yield() SVE VL 128/SME VL 16 ZA
8650 13:54:57.039017 # ok 403 sched_yield() SVE VL 112
8651 13:54:57.039205 # ok 404 sched_yield() SVE VL 112/SME VL 256 SM+ZA
8652 13:54:57.039407 # ok 405 sched_yield() SVE VL 112/SME VL 256 SM
8653 13:54:57.039577 # ok 406 sched_yield() SVE VL 112/SME VL 256 ZA
8654 13:54:57.039754 # ok 407 sched_yield() SVE VL 112/SME VL 128 SM+ZA
8655 13:54:57.039941 # ok 408 sched_yield() SVE VL 112/SME VL 128 SM
8656 13:54:57.040095 # ok 409 sched_yield() SVE VL 112/SME VL 128 ZA
8657 13:54:57.040216 # ok 410 sched_yield() SVE VL 112/SME VL 64 SM+ZA
8658 13:54:57.040362 # ok 411 sched_yield() SVE VL 112/SME VL 64 SM
8659 13:54:57.040485 # ok 412 sched_yield() SVE VL 112/SME VL 64 ZA
8660 13:54:57.040605 # ok 413 sched_yield() SVE VL 112/SME VL 32 SM+ZA
8661 13:54:57.040721 # ok 414 sched_yield() SVE VL 112/SME VL 32 SM
8662 13:54:57.040870 # ok 415 sched_yield() SVE VL 112/SME VL 32 ZA
8663 13:54:57.041043 # ok 416 sched_yield() SVE VL 112/SME VL 16 SM+ZA
8664 13:54:57.041201 # ok 417 sched_yield() SVE VL 112/SME VL 16 SM
8665 13:54:57.041610 # ok 418 sched_yield() SVE VL 112/SME VL 16 ZA
8666 13:54:57.041792 # ok 419 sched_yield() SVE VL 96
8667 13:54:57.041953 # ok 420 sched_yield() SVE VL 96/SME VL 256 SM+ZA
8668 13:54:57.042084 # ok 421 sched_yield() SVE VL 96/SME VL 256 SM
8669 13:54:57.042235 # ok 422 sched_yield() SVE VL 96/SME VL 256 ZA
8670 13:54:57.042390 # ok 423 sched_yield() SVE VL 96/SME VL 128 SM+ZA
8671 13:54:57.042625 # ok 424 sched_yield() SVE VL 96/SME VL 128 SM
8672 13:54:57.042809 # ok 425 sched_yield() SVE VL 96/SME VL 128 ZA
8673 13:54:57.042952 # ok 426 sched_yield() SVE VL 96/SME VL 64 SM+ZA
8674 13:54:57.043070 # ok 427 sched_yield() SVE VL 96/SME VL 64 SM
8675 13:54:57.043217 # ok 428 sched_yield() SVE VL 96/SME VL 64 ZA
8676 13:54:57.043339 # ok 429 sched_yield() SVE VL 96/SME VL 32 SM+ZA
8677 13:54:57.043456 # ok 430 sched_yield() SVE VL 96/SME VL 32 SM
8678 13:54:57.043574 # ok 431 sched_yield() SVE VL 96/SME VL 32 ZA
8679 13:54:57.043690 # ok 432 sched_yield() SVE VL 96/SME VL 16 SM+ZA
8680 13:54:57.043805 # ok 433 sched_yield() SVE VL 96/SME VL 16 SM
8681 13:54:57.043919 # ok 434 sched_yield() SVE VL 96/SME VL 16 ZA
8682 13:54:57.044033 # ok 435 sched_yield() SVE VL 80
8683 13:54:57.044148 # ok 436 sched_yield() SVE VL 80/SME VL 256 SM+ZA
8684 13:54:57.047068 # ok 437 sched_yield() SVE VL 80/SME VL 256 SM
8685 13:54:57.047517 # ok 438 sched_yield() SVE VL 80/SME VL 256 ZA
8686 13:54:57.047711 # ok 439 sched_yield() SVE VL 80/SME VL 128 SM+ZA
8687 13:54:57.047876 # ok 440 sched_yield() SVE VL 80/SME VL 128 SM
8688 13:54:57.048063 # ok 441 sched_yield() SVE VL 80/SME VL 128 ZA
8689 13:54:57.048279 # ok 442 sched_yield() SVE VL 80/SME VL 64 SM+ZA
8690 13:54:57.048452 # ok 443 sched_yield() SVE VL 80/SME VL 64 SM
8691 13:54:57.048611 # ok 444 sched_yield() SVE VL 80/SME VL 64 ZA
8692 13:54:57.048768 # ok 445 sched_yield() SVE VL 80/SME VL 32 SM+ZA
8693 13:54:57.048921 # ok 446 sched_yield() SVE VL 80/SME VL 32 SM
8694 13:54:57.049074 # ok 447 sched_yield() SVE VL 80/SME VL 32 ZA
8695 13:54:57.049235 # ok 448 sched_yield() SVE VL 80/SME VL 16 SM+ZA
8696 13:54:57.049446 # ok 449 sched_yield() SVE VL 80/SME VL 16 SM
8697 13:54:57.049590 # ok 450 sched_yield() SVE VL 80/SME VL 16 ZA
8698 13:54:57.049724 # ok 451 sched_yield() SVE VL 64
8699 13:54:57.049840 # ok 452 sched_yield() SVE VL 64/SME VL 256 SM+ZA
8700 13:54:57.049957 # ok 453 sched_yield() SVE VL 64/SME VL 256 SM
8701 13:54:57.050072 # ok 454 sched_yield() SVE VL 64/SME VL 256 ZA
8702 13:54:57.050188 # ok 455 sched_yield() SVE VL 64/SME VL 128 SM+ZA
8703 13:54:57.050302 # ok 456 sched_yield() SVE VL 64/SME VL 128 SM
8704 13:54:57.050419 # ok 457 sched_yield() SVE VL 64/SME VL 128 ZA
8705 13:54:57.050534 # ok 458 sched_yield() SVE VL 64/SME VL 64 SM+ZA
8706 13:54:57.050649 # ok 459 sched_yield() SVE VL 64/SME VL 64 SM
8707 13:54:57.050766 # ok 460 sched_yield() SVE VL 64/SME VL 64 ZA
8708 13:54:57.050880 # ok 461 sched_yield() SVE VL 64/SME VL 32 SM+ZA
8709 13:54:57.051022 # ok 462 sched_yield() SVE VL 64/SME VL 32 SM
8710 13:54:57.051142 # ok 463 sched_yield() SVE VL 64/SME VL 32 ZA
8711 13:54:57.703347 # ok 464 sched_yield() SVE VL 64/SME VL 16 SM+ZA
8712 13:54:57.703595 # ok 465 sched_yield() SVE VL 64/SME VL 16 SM
8713 13:54:57.703684 # ok 466 sched_yield() SVE VL 64/SME VL 16 ZA
8714 13:54:57.704007 # ok 467 sched_yield() SVE VL 48
8715 13:54:57.704112 # ok 468 sched_yield() SVE VL 48/SME VL 256 SM+ZA
8716 13:54:57.704196 # ok 469 sched_yield() SVE VL 48/SME VL 256 SM
8717 13:54:57.704275 # ok 470 sched_yield() SVE VL 48/SME VL 256 ZA
8718 13:54:57.704352 # ok 471 sched_yield() SVE VL 48/SME VL 128 SM+ZA
8719 13:54:57.704429 # ok 472 sched_yield() SVE VL 48/SME VL 128 SM
8720 13:54:57.704505 # ok 473 sched_yield() SVE VL 48/SME VL 128 ZA
8721 13:54:57.704598 # ok 474 sched_yield() SVE VL 48/SME VL 64 SM+ZA
8722 13:54:57.704678 # ok 475 sched_yield() SVE VL 48/SME VL 64 SM
8723 13:54:57.704754 # ok 476 sched_yield() SVE VL 48/SME VL 64 ZA
8724 13:54:57.704829 # ok 477 sched_yield() SVE VL 48/SME VL 32 SM+ZA
8725 13:54:57.704908 # ok 478 sched_yield() SVE VL 48/SME VL 32 SM
8726 13:54:57.705004 # ok 479 sched_yield() SVE VL 48/SME VL 32 ZA
8727 13:54:57.705086 # ok 480 sched_yield() SVE VL 48/SME VL 16 SM+ZA
8728 13:54:57.705163 # ok 481 sched_yield() SVE VL 48/SME VL 16 SM
8729 13:54:57.705240 # ok 482 sched_yield() SVE VL 48/SME VL 16 ZA
8730 13:54:57.705315 # ok 483 sched_yield() SVE VL 32
8731 13:54:57.705407 # ok 484 sched_yield() SVE VL 32/SME VL 256 SM+ZA
8732 13:54:57.705485 # ok 485 sched_yield() SVE VL 32/SME VL 256 SM
8733 13:54:57.705561 # ok 486 sched_yield() SVE VL 32/SME VL 256 ZA
8734 13:54:57.705638 # ok 487 sched_yield() SVE VL 32/SME VL 128 SM+ZA
8735 13:54:57.705743 # ok 488 sched_yield() SVE VL 32/SME VL 128 SM
8736 13:54:57.705823 # ok 489 sched_yield() SVE VL 32/SME VL 128 ZA
8737 13:54:57.705900 # ok 490 sched_yield() SVE VL 32/SME VL 64 SM+ZA
8738 13:54:57.705978 # ok 491 sched_yield() SVE VL 32/SME VL 64 SM
8739 13:54:57.706085 # ok 492 sched_yield() SVE VL 32/SME VL 64 ZA
8740 13:54:57.706161 # ok 493 sched_yield() SVE VL 32/SME VL 32 SM+ZA
8741 13:54:57.706240 # ok 494 sched_yield() SVE VL 32/SME VL 32 SM
8742 13:54:57.706307 # ok 495 sched_yield() SVE VL 32/SME VL 32 ZA
8743 13:54:57.706382 # ok 496 sched_yield() SVE VL 32/SME VL 16 SM+ZA
8744 13:54:57.706451 # ok 497 sched_yield() SVE VL 32/SME VL 16 SM
8745 13:54:57.706527 # ok 498 sched_yield() SVE VL 32/SME VL 16 ZA
8746 13:54:57.706605 # ok 499 sched_yield() SVE VL 16
8747 13:54:57.706711 # ok 500 sched_yield() SVE VL 16/SME VL 256 SM+ZA
8748 13:54:57.706785 # ok 501 sched_yield() SVE VL 16/SME VL 256 SM
8749 13:54:57.716257 # ok 502 sched_yield() SVE VL 16/SME VL 256 ZA
8750 13:54:57.716725 # ok 503 sched_yield() SVE VL 16/SME VL 128 SM+ZA
8751 13:54:57.716935 # ok 504 sched_yield() SVE VL 16/SME VL 128 SM
8752 13:54:57.717117 # ok 505 sched_yield() SVE VL 16/SME VL 128 ZA
8753 13:54:57.717306 # ok 506 sched_yield() SVE VL 16/SME VL 64 SM+ZA
8754 13:54:57.717506 # ok 507 sched_yield() SVE VL 16/SME VL 64 SM
8755 13:54:57.717732 # ok 508 sched_yield() SVE VL 16/SME VL 64 ZA
8756 13:54:57.717896 # ok 509 sched_yield() SVE VL 16/SME VL 32 SM+ZA
8757 13:54:57.718089 # ok 510 sched_yield() SVE VL 16/SME VL 32 SM
8758 13:54:57.718224 # ok 511 sched_yield() SVE VL 16/SME VL 32 ZA
8759 13:54:57.718342 # ok 512 sched_yield() SVE VL 16/SME VL 16 SM+ZA
8760 13:54:57.718459 # ok 513 sched_yield() SVE VL 16/SME VL 16 SM
8761 13:54:57.718574 # ok 514 sched_yield() SVE VL 16/SME VL 16 ZA
8762 13:54:57.718689 # # Totals: pass:514 fail:0 xfail:0 xpass:0 skip:0 error:0
8763 13:54:57.718831 ok 47 selftests: arm64: syscall-abi
8764 13:54:57.765842 # selftests: arm64: tpidr2
8765 13:54:57.918566 # TAP version 13
8766 13:54:57.918866 # 1..5
8767 13:54:57.919282 # # PID: 4429
8768 13:54:57.919444 # ok 1 default_value
8769 13:54:57.923726 # ok 2 write_read
8770 13:54:57.924187 # ok 3 write_sleep_read
8771 13:54:57.924354 # ok 4 write_fork_read
8772 13:54:57.924480 # ok 5 write_clone_read
8773 13:54:57.924621 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
8774 13:54:57.938711 ok 48 selftests: arm64: tpidr2
8775 13:54:58.433513 arm64_tags_test pass
8776 13:54:58.433776 arm64_run_tags_test_sh pass
8777 13:54:58.434111 arm64_fake_sigreturn_bad_magic pass
8778 13:54:58.434219 arm64_fake_sigreturn_bad_size pass
8779 13:54:58.434308 arm64_fake_sigreturn_bad_size_for_magic0 pass
8780 13:54:58.434399 arm64_fake_sigreturn_duplicated_fpsimd pass
8781 13:54:58.434485 arm64_fake_sigreturn_misaligned_sp pass
8782 13:54:58.434591 arm64_fake_sigreturn_missing_fpsimd pass
8783 13:54:58.434679 arm64_fake_sigreturn_sme_change_vl pass
8784 13:54:58.434767 arm64_fake_sigreturn_sve_change_vl pass
8785 13:54:58.434853 arm64_mangle_pstate_invalid_compat_toggle pass
8786 13:54:58.434958 arm64_mangle_pstate_invalid_daif_bits pass
8787 13:54:58.435065 arm64_mangle_pstate_invalid_mode_el1h pass
8788 13:54:58.435167 arm64_mangle_pstate_invalid_mode_el1t pass
8789 13:54:58.435510 arm64_mangle_pstate_invalid_mode_el2h pass
8790 13:54:58.435705 arm64_mangle_pstate_invalid_mode_el2t pass
8791 13:54:58.436121 arm64_mangle_pstate_invalid_mode_el3h pass
8792 13:54:58.436286 arm64_mangle_pstate_invalid_mode_el3t pass
8793 13:54:58.436437 arm64_sme_trap_no_sm pass
8794 13:54:58.436581 arm64_sme_trap_non_streaming skip
8795 13:54:58.436725 arm64_sme_trap_za pass
8796 13:54:58.436867 arm64_sme_vl pass
8797 13:54:58.437008 arm64_ssve_regs pass
8798 13:54:58.437150 arm64_sve_regs pass
8799 13:54:58.437333 arm64_sve_vl pass
8800 13:54:58.437468 arm64_za_no_regs pass
8801 13:54:58.437610 arm64_za_regs pass
8802 13:54:58.437766 arm64_pac_global_corrupt_pac pass
8803 13:54:58.437912 arm64_pac_global_pac_instructions_not_nop pass
8804 13:54:58.438055 arm64_pac_global_pac_instructions_not_nop_generic pass
8805 13:54:58.438199 arm64_pac_global_single_thread_different_keys pass
8806 13:54:58.438340 arm64_pac_global_exec_changed_keys pass
8807 13:54:58.438491 arm64_pac_global_context_switch_keep_keys pass
8808 13:54:58.438657 arm64_pac_global_context_switch_keep_keys_generic pass
8809 13:54:58.438798 arm64_pac pass
8810 13:54:58.438917 arm64_fp-stress_FPSIMD-0-0 pass
8811 13:54:58.439078 arm64_fp-stress_SVE-VL-256-0 pass
8812 13:54:58.439204 arm64_fp-stress_SVE-VL-240-0 pass
8813 13:54:58.439325 arm64_fp-stress_SVE-VL-224-0 pass
8814 13:54:58.439443 arm64_fp-stress_SVE-VL-208-0 pass
8815 13:54:58.439558 arm64_fp-stress_SVE-VL-192-0 pass
8816 13:54:58.439707 arm64_fp-stress_SVE-VL-176-0 pass
8817 13:54:58.439830 arm64_fp-stress_SVE-VL-160-0 pass
8818 13:54:58.439950 arm64_fp-stress_SVE-VL-144-0 pass
8819 13:54:58.440066 arm64_fp-stress_SVE-VL-128-0 pass
8820 13:54:58.440182 arm64_fp-stress_SVE-VL-112-0 pass
8821 13:54:58.440303 arm64_fp-stress_SVE-VL-96-0 pass
8822 13:54:58.440422 arm64_fp-stress_SVE-VL-80-0 pass
8823 13:54:58.440538 arm64_fp-stress_SVE-VL-64-0 pass
8824 13:54:58.440654 arm64_fp-stress_SVE-VL-48-0 pass
8825 13:54:58.440772 arm64_fp-stress_SVE-VL-32-0 pass
8826 13:54:58.440888 arm64_fp-stress_SVE-VL-16-0 pass
8827 13:54:58.441005 arm64_fp-stress_SSVE-VL-256-0 pass
8828 13:54:58.441121 arm64_fp-stress_ZA-VL-256-0 pass
8829 13:54:58.441235 arm64_fp-stress_SSVE-VL-128-0 pass
8830 13:54:58.441351 arm64_fp-stress_ZA-VL-128-0 pass
8831 13:54:58.441467 arm64_fp-stress_SSVE-VL-64-0 pass
8832 13:54:58.441581 arm64_fp-stress_ZA-VL-64-0 pass
8833 13:54:58.441708 arm64_fp-stress_SSVE-VL-32-0 pass
8834 13:54:58.441824 arm64_fp-stress_ZA-VL-32-0 pass
8835 13:54:58.441940 arm64_fp-stress_SSVE-VL-16-0 pass
8836 13:54:58.442056 arm64_fp-stress_ZA-VL-16-0 pass
8837 13:54:58.442171 arm64_fp-stress pass
8838 13:54:58.442976 arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 pass
8839 13:54:58.443388 arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state pass
8840 13:54:58.443564 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set pass
8841 13:54:58.443723 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared pass
8842 13:54:58.443883 arm64_sve-ptrace_Set_SVE_VL_16 pass
8843 13:54:58.444074 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 pass
8844 13:54:58.444234 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 pass
8845 13:54:58.444386 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 pass
8846 13:54:58.444544 arm64_sve-ptrace_Set_SVE_VL_32 pass
8847 13:54:58.444699 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 pass
8848 13:54:58.444854 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 pass
8849 13:54:58.445046 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 pass
8850 13:54:58.445211 arm64_sve-ptrace_Set_SVE_VL_48 pass
8851 13:54:58.445374 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 pass
8852 13:54:58.445523 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 pass
8853 13:54:58.445696 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 pass
8854 13:54:58.445865 arm64_sve-ptrace_Set_SVE_VL_64 pass
8855 13:54:58.446030 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 pass
8856 13:54:58.446192 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 pass
8857 13:54:58.446349 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 pass
8858 13:54:58.446478 arm64_sve-ptrace_Set_SVE_VL_80 pass
8859 13:54:58.446610 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 pass
8860 13:54:58.446764 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 pass
8861 13:54:58.446936 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 pass
8862 13:54:58.447067 arm64_sve-ptrace_Set_SVE_VL_96 pass
8863 13:54:58.447182 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 pass
8864 13:54:58.447300 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 pass
8865 13:54:58.447413 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 pass
8866 13:54:58.447526 arm64_sve-ptrace_Set_SVE_VL_112 pass
8867 13:54:58.447667 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 pass
8868 13:54:58.447787 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 pass
8869 13:54:58.447904 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 pass
8870 13:54:58.448020 arm64_sve-ptrace_Set_SVE_VL_128 pass
8871 13:54:58.448133 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 pass
8872 13:54:58.450953 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 pass
8873 13:54:58.451279 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 pass
8874 13:54:58.451383 arm64_sve-ptrace_Set_SVE_VL_144 pass
8875 13:54:58.451484 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 pass
8876 13:54:58.451578 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 pass
8877 13:54:58.451669 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 pass
8878 13:54:58.451748 arm64_sve-ptrace_Set_SVE_VL_160 pass
8879 13:54:58.451838 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 pass
8880 13:54:58.451928 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 pass
8881 13:54:58.452237 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 pass
8882 13:54:58.452342 arm64_sve-ptrace_Set_SVE_VL_176 pass
8883 13:54:58.452433 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 pass
8884 13:54:58.452524 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 pass
8885 13:54:58.452869 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 pass
8886 13:54:58.453089 arm64_sve-ptrace_Set_SVE_VL_192 pass
8887 13:54:58.453355 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 pass
8888 13:54:58.453572 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 pass
8889 13:54:58.453800 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 pass
8890 13:54:58.454072 arm64_sve-ptrace_Set_SVE_VL_208 pass
8891 13:54:58.454285 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 pass
8892 13:54:58.454538 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 pass
8893 13:54:58.454747 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 pass
8894 13:54:58.454948 arm64_sve-ptrace_Set_SVE_VL_224 pass
8895 13:54:58.455086 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 pass
8896 13:54:58.455208 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 pass
8897 13:54:58.455330 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 pass
8898 13:54:58.455448 arm64_sve-ptrace_Set_SVE_VL_240 pass
8899 13:54:58.455569 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 pass
8900 13:54:58.455687 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 pass
8901 13:54:58.455804 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 pass
8902 13:54:58.455921 arm64_sve-ptrace_Set_SVE_VL_256 pass
8903 13:54:58.456067 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 pass
8904 13:54:58.456193 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 pass
8905 13:54:58.458949 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 pass
8906 13:54:58.459258 arm64_sve-ptrace_Set_SVE_VL_272 pass
8907 13:54:58.459359 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 skip
8908 13:54:58.459440 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
8909 13:54:58.459534 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
8910 13:54:58.459615 arm64_sve-ptrace_Set_SVE_VL_288 pass
8911 13:54:58.459706 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 skip
8912 13:54:58.459788 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
8913 13:54:58.459879 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
8914 13:54:58.459969 arm64_sve-ptrace_Set_SVE_VL_304 pass
8915 13:54:58.460257 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 skip
8916 13:54:58.460363 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
8917 13:54:58.460456 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
8918 13:54:58.460535 arm64_sve-ptrace_Set_SVE_VL_320 pass
8919 13:54:58.460624 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 skip
8920 13:54:58.460715 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
8921 13:54:58.461004 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
8922 13:54:58.461106 arm64_sve-ptrace_Set_SVE_VL_336 pass
8923 13:54:58.461198 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 skip
8924 13:54:58.461294 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
8925 13:54:58.461384 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
8926 13:54:58.461654 arm64_sve-ptrace_Set_SVE_VL_352 pass
8927 13:54:58.461755 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 skip
8928 13:54:58.461850 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
8929 13:54:58.461931 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
8930 13:54:58.462029 arm64_sve-ptrace_Set_SVE_VL_368 pass
8931 13:54:58.462109 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 skip
8932 13:54:58.462197 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
8933 13:54:58.462286 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
8934 13:54:58.462376 arm64_sve-ptrace_Set_SVE_VL_384 pass
8935 13:54:58.462701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 skip
8936 13:54:58.462801 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
8937 13:54:58.466955 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
8938 13:54:58.467063 arm64_sve-ptrace_Set_SVE_VL_400 pass
8939 13:54:58.467361 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 skip
8940 13:54:58.467463 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
8941 13:54:58.467555 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
8942 13:54:58.467634 arm64_sve-ptrace_Set_SVE_VL_416 pass
8943 13:54:58.467723 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 skip
8944 13:54:58.467813 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
8945 13:54:58.467909 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
8946 13:54:58.468248 arm64_sve-ptrace_Set_SVE_VL_432 pass
8947 13:54:58.468470 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 skip
8948 13:54:58.468683 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
8949 13:54:58.468838 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
8950 13:54:58.469038 arm64_sve-ptrace_Set_SVE_VL_448 pass
8951 13:54:58.469246 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 skip
8952 13:54:58.469390 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
8953 13:54:58.484438 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
8954 13:54:58.484962 arm64_sve-ptrace_Set_SVE_VL_464 pass
8955 13:54:58.485168 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 skip
8956 13:54:58.485335 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
8957 13:54:58.485537 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
8958 13:54:58.485719 arm64_sve-ptrace_Set_SVE_VL_480 pass
8959 13:54:58.485875 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 skip
8960 13:54:58.486039 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
8961 13:54:58.486239 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
8962 13:54:58.486411 arm64_sve-ptrace_Set_SVE_VL_496 pass
8963 13:54:58.486580 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 skip
8964 13:54:58.486753 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
8965 13:54:58.486960 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
8966 13:54:58.487168 arm64_sve-ptrace_Set_SVE_VL_512 pass
8967 13:54:58.487341 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 skip
8968 13:54:58.487530 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
8969 13:54:58.487700 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
8970 13:54:58.487888 arm64_sve-ptrace_Set_SVE_VL_528 pass
8971 13:54:58.488082 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 skip
8972 13:54:58.488259 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
8973 13:54:58.488427 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
8974 13:54:58.488590 arm64_sve-ptrace_Set_SVE_VL_544 pass
8975 13:54:58.488767 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 skip
8976 13:54:58.488940 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
8977 13:54:58.489099 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
8978 13:54:58.489256 arm64_sve-ptrace_Set_SVE_VL_560 pass
8979 13:54:58.489466 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 skip
8980 13:54:58.489674 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
8981 13:54:58.489892 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
8982 13:54:58.490080 arm64_sve-ptrace_Set_SVE_VL_576 pass
8983 13:54:58.490263 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 skip
8984 13:54:58.490449 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
8985 13:54:58.490638 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
8986 13:54:58.490840 arm64_sve-ptrace_Set_SVE_VL_592 pass
8987 13:54:58.491013 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 skip
8988 13:54:58.491158 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
8989 13:54:58.491301 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
8990 13:54:58.491443 arm64_sve-ptrace_Set_SVE_VL_608 pass
8991 13:54:58.491584 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 skip
8992 13:54:58.491946 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
8993 13:54:58.492090 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
8994 13:54:58.492238 arm64_sve-ptrace_Set_SVE_VL_624 pass
8995 13:54:58.492382 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 skip
8996 13:54:58.492525 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
8997 13:54:58.492668 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
8998 13:54:58.492810 arm64_sve-ptrace_Set_SVE_VL_640 pass
8999 13:54:58.492952 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 skip
9000 13:54:58.493095 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
9001 13:54:58.493238 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
9002 13:54:58.493382 arm64_sve-ptrace_Set_SVE_VL_656 pass
9003 13:54:58.493524 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 skip
9004 13:54:58.495086 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
9005 13:54:58.495403 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
9006 13:54:58.495781 arm64_sve-ptrace_Set_SVE_VL_672 pass
9007 13:54:58.495962 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 skip
9008 13:54:58.496138 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
9009 13:54:58.496305 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
9010 13:54:58.496467 arm64_sve-ptrace_Set_SVE_VL_688 pass
9011 13:54:58.496662 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 skip
9012 13:54:58.496817 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
9013 13:54:58.496948 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
9014 13:54:58.497093 arm64_sve-ptrace_Set_SVE_VL_704 pass
9015 13:54:58.497313 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 skip
9016 13:54:58.497528 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
9017 13:54:58.497716 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
9018 13:54:58.497884 arm64_sve-ptrace_Set_SVE_VL_720 pass
9019 13:54:58.498060 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 skip
9020 13:54:58.498290 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
9021 13:54:58.498403 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
9022 13:54:58.498493 arm64_sve-ptrace_Set_SVE_VL_736 pass
9023 13:54:58.498600 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 skip
9024 13:54:58.498701 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
9025 13:54:58.498813 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
9026 13:54:58.498907 arm64_sve-ptrace_Set_SVE_VL_752 pass
9027 13:54:58.498994 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 skip
9028 13:54:58.499079 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
9029 13:54:58.499167 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
9030 13:54:58.499254 arm64_sve-ptrace_Set_SVE_VL_768 pass
9031 13:54:58.499344 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 skip
9032 13:54:58.499431 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
9033 13:54:58.499537 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
9034 13:54:58.499630 arm64_sve-ptrace_Set_SVE_VL_784 pass
9035 13:54:58.499718 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 skip
9036 13:54:58.499805 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
9037 13:54:58.506928 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
9038 13:54:58.507261 arm64_sve-ptrace_Set_SVE_VL_800 pass
9039 13:54:58.507371 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 skip
9040 13:54:58.507471 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
9041 13:54:58.507593 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
9042 13:54:58.507691 arm64_sve-ptrace_Set_SVE_VL_816 pass
9043 13:54:58.507764 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 skip
9044 13:54:58.507843 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
9045 13:54:58.507912 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
9046 13:54:58.507990 arm64_sve-ptrace_Set_SVE_VL_832 pass
9047 13:54:58.508058 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 skip
9048 13:54:58.508135 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
9049 13:54:58.508213 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
9050 13:54:58.508292 arm64_sve-ptrace_Set_SVE_VL_848 pass
9051 13:54:58.508369 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 skip
9052 13:54:58.508627 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
9053 13:54:58.508700 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
9054 13:54:58.508765 arm64_sve-ptrace_Set_SVE_VL_864 pass
9055 13:54:58.508844 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 skip
9056 13:54:58.508926 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
9057 13:54:58.509012 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
9058 13:54:58.509103 arm64_sve-ptrace_Set_SVE_VL_880 pass
9059 13:54:58.509190 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 skip
9060 13:54:58.509284 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
9061 13:54:58.509375 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
9062 13:54:58.509459 arm64_sve-ptrace_Set_SVE_VL_896 pass
9063 13:54:58.509678 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 skip
9064 13:54:58.509750 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
9065 13:54:58.510016 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
9066 13:54:58.510097 arm64_sve-ptrace_Set_SVE_VL_912 pass
9067 13:54:58.510160 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 skip
9068 13:54:58.510233 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
9069 13:54:58.510309 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
9070 13:54:58.510406 arm64_sve-ptrace_Set_SVE_VL_928 pass
9071 13:54:58.510492 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 skip
9072 13:54:58.510750 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
9073 13:54:58.510822 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
9074 13:54:58.510886 arm64_sve-ptrace_Set_SVE_VL_944 pass
9075 13:54:58.514960 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 skip
9076 13:54:58.515223 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
9077 13:54:58.515295 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
9078 13:54:58.515421 arm64_sve-ptrace_Set_SVE_VL_960 pass
9079 13:54:58.515573 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 skip
9080 13:54:58.515702 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
9081 13:54:58.515853 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
9082 13:54:58.515985 arm64_sve-ptrace_Set_SVE_VL_976 pass
9083 13:54:58.516110 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 skip
9084 13:54:58.516238 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
9085 13:54:58.516393 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
9086 13:54:58.516527 arm64_sve-ptrace_Set_SVE_VL_992 pass
9087 13:54:58.516654 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 skip
9088 13:54:58.516779 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
9089 13:54:58.516906 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
9090 13:54:58.517031 arm64_sve-ptrace_Set_SVE_VL_1008 pass
9091 13:54:58.517187 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 skip
9092 13:54:58.517322 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
9093 13:54:58.517452 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
9094 13:54:58.517579 arm64_sve-ptrace_Set_SVE_VL_1024 pass
9095 13:54:58.517726 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 skip
9096 13:54:58.517853 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
9097 13:54:58.517980 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
9098 13:54:58.518107 arm64_sve-ptrace_Set_SVE_VL_1040 pass
9099 13:54:58.518265 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 skip
9100 13:54:58.518399 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
9101 13:54:58.518525 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
9102 13:54:58.518651 arm64_sve-ptrace_Set_SVE_VL_1056 pass
9103 13:54:58.518778 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 skip
9104 13:54:58.518901 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
9105 13:54:58.519018 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
9106 13:54:58.519135 arm64_sve-ptrace_Set_SVE_VL_1072 pass
9107 13:54:58.519251 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 skip
9108 13:54:58.519367 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
9109 13:54:58.519484 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
9110 13:54:58.519626 arm64_sve-ptrace_Set_SVE_VL_1088 pass
9111 13:54:58.519748 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 skip
9112 13:54:58.519866 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
9113 13:54:58.519983 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
9114 13:54:58.520307 arm64_sve-ptrace_Set_SVE_VL_1104 pass
9115 13:54:58.532891 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 skip
9116 13:54:58.533288 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
9117 13:54:58.533399 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
9118 13:54:58.533490 arm64_sve-ptrace_Set_SVE_VL_1120 pass
9119 13:54:58.533576 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 skip
9120 13:54:58.533667 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
9121 13:54:58.533770 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
9122 13:54:58.533858 arm64_sve-ptrace_Set_SVE_VL_1136 pass
9123 13:54:58.533943 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 skip
9124 13:54:58.534044 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
9125 13:54:58.534132 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
9126 13:54:58.534232 arm64_sve-ptrace_Set_SVE_VL_1152 pass
9127 13:54:58.534333 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 skip
9128 13:54:58.534679 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
9129 13:54:58.534889 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
9130 13:54:58.535107 arm64_sve-ptrace_Set_SVE_VL_1168 pass
9131 13:54:58.535297 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 skip
9132 13:54:58.535509 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
9133 13:54:58.535689 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
9134 13:54:58.535865 arm64_sve-ptrace_Set_SVE_VL_1184 pass
9135 13:54:58.536074 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 skip
9136 13:54:58.536255 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
9137 13:54:58.536425 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
9138 13:54:58.536562 arm64_sve-ptrace_Set_SVE_VL_1200 pass
9139 13:54:58.536685 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 skip
9140 13:54:58.536838 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
9141 13:54:58.536971 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
9142 13:54:58.537107 arm64_sve-ptrace_Set_SVE_VL_1216 pass
9143 13:54:58.537294 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 skip
9144 13:54:58.537434 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
9145 13:54:58.537576 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
9146 13:54:58.538221 arm64_sve-ptrace_Set_SVE_VL_1232 pass
9147 13:54:58.538385 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 skip
9148 13:54:58.538555 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
9149 13:54:58.538712 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
9150 13:54:58.538836 arm64_sve-ptrace_Set_SVE_VL_1248 pass
9151 13:54:58.538950 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 skip
9152 13:54:58.539063 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
9153 13:54:58.539176 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
9154 13:54:58.539286 arm64_sve-ptrace_Set_SVE_VL_1264 pass
9155 13:54:58.539400 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 skip
9156 13:54:58.539510 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
9157 13:54:58.539621 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
9158 13:54:58.539731 arm64_sve-ptrace_Set_SVE_VL_1280 pass
9159 13:54:58.539867 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 skip
9160 13:54:58.539983 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
9161 13:54:58.540095 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
9162 13:54:58.540206 arm64_sve-ptrace_Set_SVE_VL_1296 pass
9163 13:54:58.543171 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 skip
9164 13:54:58.543362 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
9165 13:54:58.543604 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
9166 13:54:58.543798 arm64_sve-ptrace_Set_SVE_VL_1312 pass
9167 13:54:58.543969 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 skip
9168 13:54:58.544149 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
9169 13:54:58.544331 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
9170 13:54:58.544498 arm64_sve-ptrace_Set_SVE_VL_1328 pass
9171 13:54:58.544690 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 skip
9172 13:54:58.544893 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
9173 13:54:58.545146 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
9174 13:54:58.545366 arm64_sve-ptrace_Set_SVE_VL_1344 pass
9175 13:54:58.545555 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 skip
9176 13:54:58.545763 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
9177 13:54:58.545991 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
9178 13:54:58.546161 arm64_sve-ptrace_Set_SVE_VL_1360 pass
9179 13:54:58.546304 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 skip
9180 13:54:58.546442 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
9181 13:54:58.546620 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
9182 13:54:58.546802 arm64_sve-ptrace_Set_SVE_VL_1376 pass
9183 13:54:58.546979 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 skip
9184 13:54:58.547126 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
9185 13:54:58.547267 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
9186 13:54:58.547411 arm64_sve-ptrace_Set_SVE_VL_1392 pass
9187 13:54:58.547551 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 skip
9188 13:54:58.547692 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
9189 13:54:58.547831 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
9190 13:54:58.547970 arm64_sve-ptrace_Set_SVE_VL_1408 pass
9191 13:54:58.548148 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 skip
9192 13:54:58.550978 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
9193 13:54:58.551437 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
9194 13:54:58.551646 arm64_sve-ptrace_Set_SVE_VL_1424 pass
9195 13:54:58.551841 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 skip
9196 13:54:58.552041 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
9197 13:54:58.552275 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
9198 13:54:58.552475 arm64_sve-ptrace_Set_SVE_VL_1440 pass
9199 13:54:58.552648 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 skip
9200 13:54:58.552810 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
9201 13:54:58.553024 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
9202 13:54:58.553224 arm64_sve-ptrace_Set_SVE_VL_1456 pass
9203 13:54:58.553453 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 skip
9204 13:54:58.553667 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
9205 13:54:58.553882 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
9206 13:54:58.554078 arm64_sve-ptrace_Set_SVE_VL_1472 pass
9207 13:54:58.554248 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 skip
9208 13:54:58.554422 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
9209 13:54:58.554594 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
9210 13:54:58.554808 arm64_sve-ptrace_Set_SVE_VL_1488 pass
9211 13:54:58.554957 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 skip
9212 13:54:58.555112 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
9213 13:54:58.555235 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
9214 13:54:58.555352 arm64_sve-ptrace_Set_SVE_VL_1504 pass
9215 13:54:58.555468 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 skip
9216 13:54:58.555583 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
9217 13:54:58.555697 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
9218 13:54:58.555811 arm64_sve-ptrace_Set_SVE_VL_1520 pass
9219 13:54:58.555923 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 skip
9220 13:54:58.556039 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
9221 13:54:58.556152 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
9222 13:54:58.558949 arm64_sve-ptrace_Set_SVE_VL_1536 pass
9223 13:54:58.559357 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 skip
9224 13:54:58.559564 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
9225 13:54:58.559768 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
9226 13:54:58.559963 arm64_sve-ptrace_Set_SVE_VL_1552 pass
9227 13:54:58.560193 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 skip
9228 13:54:58.560392 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
9229 13:54:58.560571 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
9230 13:54:58.560731 arm64_sve-ptrace_Set_SVE_VL_1568 pass
9231 13:54:58.561072 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 skip
9232 13:54:58.561251 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
9233 13:54:58.561413 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
9234 13:54:58.561611 arm64_sve-ptrace_Set_SVE_VL_1584 pass
9235 13:54:58.561823 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 skip
9236 13:54:58.562022 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
9237 13:54:58.562193 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
9238 13:54:58.562349 arm64_sve-ptrace_Set_SVE_VL_1600 pass
9239 13:54:58.562526 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 skip
9240 13:54:58.562826 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
9241 13:54:58.562994 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
9242 13:54:58.563166 arm64_sve-ptrace_Set_SVE_VL_1616 pass
9243 13:54:58.563309 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 skip
9244 13:54:58.563453 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
9245 13:54:58.563635 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
9246 13:54:58.563773 arm64_sve-ptrace_Set_SVE_VL_1632 pass
9247 13:54:58.563915 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 skip
9248 13:54:58.564056 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
9249 13:54:58.564197 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
9250 13:54:58.564337 arm64_sve-ptrace_Set_SVE_VL_1648 pass
9251 13:54:58.564481 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 skip
9252 13:54:58.564622 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
9253 13:54:58.567025 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
9254 13:54:58.567205 arm64_sve-ptrace_Set_SVE_VL_1664 pass
9255 13:54:58.567642 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 skip
9256 13:54:58.567850 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
9257 13:54:58.568066 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
9258 13:54:58.568278 arm64_sve-ptrace_Set_SVE_VL_1680 pass
9259 13:54:58.568476 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 skip
9260 13:54:58.568726 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
9261 13:54:58.568897 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
9262 13:54:58.569118 arm64_sve-ptrace_Set_SVE_VL_1696 pass
9263 13:54:58.569310 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 skip
9264 13:54:58.569470 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
9265 13:54:58.569592 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
9266 13:54:58.569735 arm64_sve-ptrace_Set_SVE_VL_1712 pass
9267 13:54:58.569876 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 skip
9268 13:54:58.570025 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
9269 13:54:58.570148 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
9270 13:54:58.570266 arm64_sve-ptrace_Set_SVE_VL_1728 pass
9271 13:54:58.570381 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 skip
9272 13:54:58.570497 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
9273 13:54:58.570612 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
9274 13:54:58.570726 arm64_sve-ptrace_Set_SVE_VL_1744 pass
9275 13:54:58.582813 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 skip
9276 13:54:58.583269 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
9277 13:54:58.583475 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
9278 13:54:58.583651 arm64_sve-ptrace_Set_SVE_VL_1760 pass
9279 13:54:58.583822 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 skip
9280 13:54:58.584019 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
9281 13:54:58.584189 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
9282 13:54:58.584354 arm64_sve-ptrace_Set_SVE_VL_1776 pass
9283 13:54:58.584517 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 skip
9284 13:54:58.584681 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
9285 13:54:58.584881 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
9286 13:54:58.585050 arm64_sve-ptrace_Set_SVE_VL_1792 pass
9287 13:54:58.585214 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 skip
9288 13:54:58.585379 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
9289 13:54:58.585545 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
9290 13:54:58.585724 arm64_sve-ptrace_Set_SVE_VL_1808 pass
9291 13:54:58.585891 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 skip
9292 13:54:58.586054 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
9293 13:54:58.586258 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
9294 13:54:58.586429 arm64_sve-ptrace_Set_SVE_VL_1824 pass
9295 13:54:58.586600 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 skip
9296 13:54:58.586765 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
9297 13:54:58.586930 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
9298 13:54:58.587093 arm64_sve-ptrace_Set_SVE_VL_1840 pass
9299 13:54:58.587258 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 skip
9300 13:54:58.587425 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
9301 13:54:58.587592 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
9302 13:54:58.587756 arm64_sve-ptrace_Set_SVE_VL_1856 pass
9303 13:54:58.587921 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 skip
9304 13:54:58.588120 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
9305 13:54:58.588289 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
9306 13:54:58.588453 arm64_sve-ptrace_Set_SVE_VL_1872 pass
9307 13:54:58.591198 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 skip
9308 13:54:58.591568 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
9309 13:54:58.591677 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
9310 13:54:58.591767 arm64_sve-ptrace_Set_SVE_VL_1888 pass
9311 13:54:58.591854 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 skip
9312 13:54:58.591956 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
9313 13:54:58.592045 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
9314 13:54:58.592145 arm64_sve-ptrace_Set_SVE_VL_1904 pass
9315 13:54:58.592232 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 skip
9316 13:54:58.592338 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
9317 13:54:58.592637 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
9318 13:54:58.592738 arm64_sve-ptrace_Set_SVE_VL_1920 pass
9319 13:54:58.592839 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 skip
9320 13:54:58.592926 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
9321 13:54:58.593025 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
9322 13:54:58.593125 arm64_sve-ptrace_Set_SVE_VL_1936 pass
9323 13:54:58.593459 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 skip
9324 13:54:58.593671 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
9325 13:54:58.593877 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
9326 13:54:58.594073 arm64_sve-ptrace_Set_SVE_VL_1952 pass
9327 13:54:58.594255 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 skip
9328 13:54:58.594420 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
9329 13:54:58.594616 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
9330 13:54:58.594804 arm64_sve-ptrace_Set_SVE_VL_1968 pass
9331 13:54:58.594971 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 skip
9332 13:54:58.595100 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
9333 13:54:58.595216 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
9334 13:54:58.595357 arm64_sve-ptrace_Set_SVE_VL_1984 pass
9335 13:54:58.599069 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 skip
9336 13:54:58.599546 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
9337 13:54:58.599721 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
9338 13:54:58.599932 arm64_sve-ptrace_Set_SVE_VL_2000 pass
9339 13:54:58.600074 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 skip
9340 13:54:58.600250 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
9341 13:54:58.600387 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
9342 13:54:58.600531 arm64_sve-ptrace_Set_SVE_VL_2016 pass
9343 13:54:58.600705 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 skip
9344 13:54:58.600842 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
9345 13:54:58.601015 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
9346 13:54:58.601151 arm64_sve-ptrace_Set_SVE_VL_2032 pass
9347 13:54:58.601325 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 skip
9348 13:54:58.601462 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
9349 13:54:58.601636 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
9350 13:54:58.601792 arm64_sve-ptrace_Set_SVE_VL_2048 pass
9351 13:54:58.602000 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 skip
9352 13:54:58.602158 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
9353 13:54:58.602334 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
9354 13:54:58.602504 arm64_sve-ptrace_Set_SVE_VL_2064 pass
9355 13:54:58.602776 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 skip
9356 13:54:58.602989 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
9357 13:54:58.603122 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
9358 13:54:58.603241 arm64_sve-ptrace_Set_SVE_VL_2080 pass
9359 13:54:58.606968 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 skip
9360 13:54:58.607407 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
9361 13:54:58.607587 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
9362 13:54:58.607747 arm64_sve-ptrace_Set_SVE_VL_2096 pass
9363 13:54:58.607957 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 skip
9364 13:54:58.608174 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
9365 13:54:58.608363 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
9366 13:54:58.608573 arm64_sve-ptrace_Set_SVE_VL_2112 pass
9367 13:54:58.608814 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 skip
9368 13:54:58.609019 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
9369 13:54:58.609231 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
9370 13:54:58.609455 arm64_sve-ptrace_Set_SVE_VL_2128 pass
9371 13:54:58.609620 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 skip
9372 13:54:58.609768 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
9373 13:54:58.609953 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
9374 13:54:58.610183 arm64_sve-ptrace_Set_SVE_VL_2144 pass
9375 13:54:58.610397 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 skip
9376 13:54:58.610573 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
9377 13:54:58.610730 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
9378 13:54:58.610898 arm64_sve-ptrace_Set_SVE_VL_2160 pass
9379 13:54:58.611029 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 skip
9380 13:54:58.611147 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
9381 13:54:58.611265 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
9382 13:54:58.611381 arm64_sve-ptrace_Set_SVE_VL_2176 pass
9383 13:54:58.611496 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 skip
9384 13:54:58.611613 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
9385 13:54:58.611728 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
9386 13:54:58.611842 arm64_sve-ptrace_Set_SVE_VL_2192 pass
9387 13:54:58.611958 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 skip
9388 13:54:58.612104 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
9389 13:54:58.612228 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
9390 13:54:58.612344 arm64_sve-ptrace_Set_SVE_VL_2208 pass
9391 13:54:58.612459 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 skip
9392 13:54:58.612576 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
9393 13:54:58.612691 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
9394 13:54:58.612806 arm64_sve-ptrace_Set_SVE_VL_2224 pass
9395 13:54:58.614998 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 skip
9396 13:54:58.615329 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
9397 13:54:58.615438 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
9398 13:54:58.615543 arm64_sve-ptrace_Set_SVE_VL_2240 pass
9399 13:54:58.615872 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 skip
9400 13:54:58.616070 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
9401 13:54:58.616230 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
9402 13:54:58.616410 arm64_sve-ptrace_Set_SVE_VL_2256 pass
9403 13:54:58.616658 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 skip
9404 13:54:58.616829 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
9405 13:54:58.616983 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
9406 13:54:58.617166 arm64_sve-ptrace_Set_SVE_VL_2272 pass
9407 13:54:58.617340 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 skip
9408 13:54:58.617532 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
9409 13:54:58.617668 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
9410 13:54:58.617792 arm64_sve-ptrace_Set_SVE_VL_2288 pass
9411 13:54:58.617890 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 skip
9412 13:54:58.617988 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
9413 13:54:58.618137 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
9414 13:54:58.618297 arm64_sve-ptrace_Set_SVE_VL_2304 pass
9415 13:54:58.618451 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 skip
9416 13:54:58.618634 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
9417 13:54:58.618767 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
9418 13:54:58.618874 arm64_sve-ptrace_Set_SVE_VL_2320 pass
9419 13:54:58.618964 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 skip
9420 13:54:58.619052 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
9421 13:54:58.619138 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
9422 13:54:58.619226 arm64_sve-ptrace_Set_SVE_VL_2336 pass
9423 13:54:58.619313 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 skip
9424 13:54:58.622989 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
9425 13:54:58.623372 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
9426 13:54:58.623476 arm64_sve-ptrace_Set_SVE_VL_2352 pass
9427 13:54:58.623565 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 skip
9428 13:54:58.623650 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
9429 13:54:58.625086 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
9430 13:54:58.625300 arm64_sve-ptrace_Set_SVE_VL_2368 pass
9431 13:54:58.625464 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 skip
9432 13:54:58.625621 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
9433 13:54:58.625790 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
9434 13:54:58.625944 arm64_sve-ptrace_Set_SVE_VL_2384 pass
9435 13:54:58.634118 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 skip
9436 13:54:58.634686 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
9437 13:54:58.634889 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
9438 13:54:58.635062 arm64_sve-ptrace_Set_SVE_VL_2400 pass
9439 13:54:58.635226 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 skip
9440 13:54:58.635429 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
9441 13:54:58.635586 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
9442 13:54:58.635713 arm64_sve-ptrace_Set_SVE_VL_2416 pass
9443 13:54:58.635832 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 skip
9444 13:54:58.635979 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
9445 13:54:58.636100 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
9446 13:54:58.636219 arm64_sve-ptrace_Set_SVE_VL_2432 pass
9447 13:54:58.636334 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 skip
9448 13:54:58.636469 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
9449 13:54:58.636588 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
9450 13:54:58.636700 arm64_sve-ptrace_Set_SVE_VL_2448 pass
9451 13:54:58.636812 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 skip
9452 13:54:58.636946 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
9453 13:54:58.637070 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
9454 13:54:58.637183 arm64_sve-ptrace_Set_SVE_VL_2464 pass
9455 13:54:58.637295 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 skip
9456 13:54:58.637429 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
9457 13:54:58.637545 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
9458 13:54:58.638158 arm64_sve-ptrace_Set_SVE_VL_2480 pass
9459 13:54:58.638307 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 skip
9460 13:54:58.638424 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
9461 13:54:58.638616 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
9462 13:54:58.638760 arm64_sve-ptrace_Set_SVE_VL_2496 pass
9463 13:54:58.638878 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 skip
9464 13:54:58.638993 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
9465 13:54:58.639106 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
9466 13:54:58.639218 arm64_sve-ptrace_Set_SVE_VL_2512 pass
9467 13:54:58.639330 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 skip
9468 13:54:58.639443 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
9469 13:54:58.639554 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
9470 13:54:58.639636 arm64_sve-ptrace_Set_SVE_VL_2528 pass
9471 13:54:58.639731 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 skip
9472 13:54:58.642948 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
9473 13:54:58.643258 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
9474 13:54:58.643360 arm64_sve-ptrace_Set_SVE_VL_2544 pass
9475 13:54:58.643457 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 skip
9476 13:54:58.643550 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
9477 13:54:58.643854 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
9478 13:54:58.643973 arm64_sve-ptrace_Set_SVE_VL_2560 pass
9479 13:54:58.644072 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 skip
9480 13:54:58.644371 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
9481 13:54:58.644996 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
9482 13:54:58.645105 arm64_sve-ptrace_Set_SVE_VL_2576 pass
9483 13:54:58.645187 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 skip
9484 13:54:58.645268 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
9485 13:54:58.645349 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
9486 13:54:58.645427 arm64_sve-ptrace_Set_SVE_VL_2592 pass
9487 13:54:58.645522 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 skip
9488 13:54:58.645605 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
9489 13:54:58.645699 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
9490 13:54:58.645799 arm64_sve-ptrace_Set_SVE_VL_2608 pass
9491 13:54:58.645881 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 skip
9492 13:54:58.645976 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
9493 13:54:58.646069 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
9494 13:54:58.646160 arm64_sve-ptrace_Set_SVE_VL_2624 pass
9495 13:54:58.646251 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 skip
9496 13:54:58.646627 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
9497 13:54:58.646732 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
9498 13:54:58.646831 arm64_sve-ptrace_Set_SVE_VL_2640 pass
9499 13:54:58.646912 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 skip
9500 13:54:58.651011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
9501 13:54:58.651322 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
9502 13:54:58.651428 arm64_sve-ptrace_Set_SVE_VL_2656 pass
9503 13:54:58.651524 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 skip
9504 13:54:58.651605 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
9505 13:54:58.651882 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
9506 13:54:58.651969 arm64_sve-ptrace_Set_SVE_VL_2672 pass
9507 13:54:58.652060 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 skip
9508 13:54:58.652153 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
9509 13:54:58.652447 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
9510 13:54:58.652548 arm64_sve-ptrace_Set_SVE_VL_2688 pass
9511 13:54:58.652652 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 skip
9512 13:54:58.652749 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
9513 13:54:58.652908 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
9514 13:54:58.653026 arm64_sve-ptrace_Set_SVE_VL_2704 pass
9515 13:54:58.653324 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 skip
9516 13:54:58.653420 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
9517 13:54:58.653525 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
9518 13:54:58.653621 arm64_sve-ptrace_Set_SVE_VL_2720 pass
9519 13:54:58.653796 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 skip
9520 13:54:58.653916 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
9521 13:54:58.654221 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
9522 13:54:58.654323 arm64_sve-ptrace_Set_SVE_VL_2736 pass
9523 13:54:58.654427 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 skip
9524 13:54:58.654533 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
9525 13:54:58.654835 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
9526 13:54:58.654940 arm64_sve-ptrace_Set_SVE_VL_2752 pass
9527 13:54:58.659185 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 skip
9528 13:54:58.659334 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
9529 13:54:58.659429 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
9530 13:54:58.659522 arm64_sve-ptrace_Set_SVE_VL_2768 pass
9531 13:54:58.659618 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 skip
9532 13:54:58.659930 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
9533 13:54:58.660035 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
9534 13:54:58.660329 arm64_sve-ptrace_Set_SVE_VL_2784 pass
9535 13:54:58.660453 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 skip
9536 13:54:58.660542 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
9537 13:54:58.660638 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
9538 13:54:58.660722 arm64_sve-ptrace_Set_SVE_VL_2800 pass
9539 13:54:58.660805 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 skip
9540 13:54:58.660900 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
9541 13:54:58.660995 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
9542 13:54:58.661089 arm64_sve-ptrace_Set_SVE_VL_2816 pass
9543 13:54:58.661189 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 skip
9544 13:54:58.661489 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
9545 13:54:58.661604 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
9546 13:54:58.661697 arm64_sve-ptrace_Set_SVE_VL_2832 pass
9547 13:54:58.661794 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 skip
9548 13:54:58.662092 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
9549 13:54:58.662205 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
9550 13:54:58.662505 arm64_sve-ptrace_Set_SVE_VL_2848 pass
9551 13:54:58.662612 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 skip
9552 13:54:58.662718 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
9553 13:54:58.662821 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
9554 13:54:58.666938 arm64_sve-ptrace_Set_SVE_VL_2864 pass
9555 13:54:58.667405 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 skip
9556 13:54:58.667578 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
9557 13:54:58.667713 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
9558 13:54:58.667928 arm64_sve-ptrace_Set_SVE_VL_2880 pass
9559 13:54:58.668098 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 skip
9560 13:54:58.668266 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
9561 13:54:58.668414 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
9562 13:54:58.668629 arm64_sve-ptrace_Set_SVE_VL_2896 pass
9563 13:54:58.668770 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 skip
9564 13:54:58.668922 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
9565 13:54:58.669081 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
9566 13:54:58.669210 arm64_sve-ptrace_Set_SVE_VL_2912 pass
9567 13:54:58.669371 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 skip
9568 13:54:58.669505 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
9569 13:54:58.669632 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
9570 13:54:58.669774 arm64_sve-ptrace_Set_SVE_VL_2928 pass
9571 13:54:58.669903 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 skip
9572 13:54:58.670038 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
9573 13:54:58.670228 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
9574 13:54:58.670468 arm64_sve-ptrace_Set_SVE_VL_2944 pass
9575 13:54:58.670660 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 skip
9576 13:54:58.670831 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
9577 13:54:58.670977 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
9578 13:54:58.671121 arm64_sve-ptrace_Set_SVE_VL_2960 pass
9579 13:54:58.671262 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 skip
9580 13:54:58.671404 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
9581 13:54:58.671546 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
9582 13:54:58.671690 arm64_sve-ptrace_Set_SVE_VL_2976 pass
9583 13:54:58.671866 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 skip
9584 13:54:58.672004 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
9585 13:54:58.674945 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
9586 13:54:58.675375 arm64_sve-ptrace_Set_SVE_VL_2992 pass
9587 13:54:58.675586 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 skip
9588 13:54:58.675765 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
9589 13:54:58.675960 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
9590 13:54:58.676124 arm64_sve-ptrace_Set_SVE_VL_3008 pass
9591 13:54:58.676258 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 skip
9592 13:54:58.676374 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
9593 13:54:58.676569 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
9594 13:54:58.676714 arm64_sve-ptrace_Set_SVE_VL_3024 pass
9595 13:54:58.689736 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 skip
9596 13:54:58.690259 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
9597 13:54:58.690369 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
9598 13:54:58.690455 arm64_sve-ptrace_Set_SVE_VL_3040 pass
9599 13:54:58.690539 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 skip
9600 13:54:58.690621 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
9601 13:54:58.690728 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
9602 13:54:58.690813 arm64_sve-ptrace_Set_SVE_VL_3056 pass
9603 13:54:58.690896 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 skip
9604 13:54:58.690976 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
9605 13:54:58.691072 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
9606 13:54:58.691156 arm64_sve-ptrace_Set_SVE_VL_3072 pass
9607 13:54:58.691250 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 skip
9608 13:54:58.691347 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
9609 13:54:58.691447 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
9610 13:54:58.691544 arm64_sve-ptrace_Set_SVE_VL_3088 pass
9611 13:54:58.691652 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 skip
9612 13:54:58.692038 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
9613 13:54:58.692240 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
9614 13:54:58.692435 arm64_sve-ptrace_Set_SVE_VL_3104 pass
9615 13:54:58.692591 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 skip
9616 13:54:58.692739 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
9617 13:54:58.692922 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
9618 13:54:58.693057 arm64_sve-ptrace_Set_SVE_VL_3120 pass
9619 13:54:58.693182 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 skip
9620 13:54:58.693306 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
9621 13:54:58.693432 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
9622 13:54:58.693586 arm64_sve-ptrace_Set_SVE_VL_3136 pass
9623 13:54:58.693732 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 skip
9624 13:54:58.693857 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
9625 13:54:58.693981 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
9626 13:54:58.694105 arm64_sve-ptrace_Set_SVE_VL_3152 pass
9627 13:54:58.694233 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 skip
9628 13:54:58.694386 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
9629 13:54:58.694516 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
9630 13:54:58.694644 arm64_sve-ptrace_Set_SVE_VL_3168 pass
9631 13:54:58.694828 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 skip
9632 13:54:58.694961 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
9633 13:54:58.695078 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
9634 13:54:58.695195 arm64_sve-ptrace_Set_SVE_VL_3184 pass
9635 13:54:58.695337 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 skip
9636 13:54:58.695460 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
9637 13:54:58.695579 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
9638 13:54:58.698936 arm64_sve-ptrace_Set_SVE_VL_3200 pass
9639 13:54:58.699289 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 skip
9640 13:54:58.699427 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
9641 13:54:58.699552 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
9642 13:54:58.699705 arm64_sve-ptrace_Set_SVE_VL_3216 pass
9643 13:54:58.699836 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 skip
9644 13:54:58.699963 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
9645 13:54:58.700085 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
9646 13:54:58.700236 arm64_sve-ptrace_Set_SVE_VL_3232 pass
9647 13:54:58.700365 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 skip
9648 13:54:58.700490 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
9649 13:54:58.700614 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
9650 13:54:58.700737 arm64_sve-ptrace_Set_SVE_VL_3248 pass
9651 13:54:58.700862 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 skip
9652 13:54:58.701012 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
9653 13:54:58.701139 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
9654 13:54:58.701260 arm64_sve-ptrace_Set_SVE_VL_3264 pass
9655 13:54:58.701387 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 skip
9656 13:54:58.701512 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
9657 13:54:58.701675 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
9658 13:54:58.701807 arm64_sve-ptrace_Set_SVE_VL_3280 pass
9659 13:54:58.701930 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 skip
9660 13:54:58.702056 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
9661 13:54:58.702178 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
9662 13:54:58.702326 arm64_sve-ptrace_Set_SVE_VL_3296 pass
9663 13:54:58.702454 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 skip
9664 13:54:58.702581 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
9665 13:54:58.702709 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
9666 13:54:58.702843 arm64_sve-ptrace_Set_SVE_VL_3312 pass
9667 13:54:58.702988 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 skip
9668 13:54:58.703109 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
9669 13:54:58.707137 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
9670 13:54:58.707380 arm64_sve-ptrace_Set_SVE_VL_3328 pass
9671 13:54:58.707843 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 skip
9672 13:54:58.708005 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
9673 13:54:58.708135 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
9674 13:54:58.708261 arm64_sve-ptrace_Set_SVE_VL_3344 pass
9675 13:54:58.708412 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 skip
9676 13:54:58.708535 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
9677 13:54:58.708662 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
9678 13:54:58.708787 arm64_sve-ptrace_Set_SVE_VL_3360 pass
9679 13:54:58.708920 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 skip
9680 13:54:58.709093 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
9681 13:54:58.709225 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
9682 13:54:58.709382 arm64_sve-ptrace_Set_SVE_VL_3376 pass
9683 13:54:58.709517 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 skip
9684 13:54:58.709631 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
9685 13:54:58.709827 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
9686 13:54:58.709988 arm64_sve-ptrace_Set_SVE_VL_3392 pass
9687 13:54:58.710131 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 skip
9688 13:54:58.710297 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
9689 13:54:58.710468 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
9690 13:54:58.710674 arm64_sve-ptrace_Set_SVE_VL_3408 pass
9691 13:54:58.710833 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 skip
9692 13:54:58.710955 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
9693 13:54:58.711071 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
9694 13:54:58.711189 arm64_sve-ptrace_Set_SVE_VL_3424 pass
9695 13:54:58.711303 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 skip
9696 13:54:58.711444 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
9697 13:54:58.715039 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
9698 13:54:58.715231 arm64_sve-ptrace_Set_SVE_VL_3440 pass
9699 13:54:58.715659 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 skip
9700 13:54:58.715893 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
9701 13:54:58.716080 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
9702 13:54:58.716252 arm64_sve-ptrace_Set_SVE_VL_3456 pass
9703 13:54:58.716445 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 skip
9704 13:54:58.716644 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
9705 13:54:58.716800 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
9706 13:54:58.716990 arm64_sve-ptrace_Set_SVE_VL_3472 pass
9707 13:54:58.717194 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 skip
9708 13:54:58.717409 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
9709 13:54:58.717639 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
9710 13:54:58.717877 arm64_sve-ptrace_Set_SVE_VL_3488 pass
9711 13:54:58.718108 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 skip
9712 13:54:58.718353 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
9713 13:54:58.718533 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
9714 13:54:58.718734 arm64_sve-ptrace_Set_SVE_VL_3504 pass
9715 13:54:58.718914 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 skip
9716 13:54:58.719082 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
9717 13:54:58.719251 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
9718 13:54:58.719418 arm64_sve-ptrace_Set_SVE_VL_3520 pass
9719 13:54:58.719621 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 skip
9720 13:54:58.719792 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
9721 13:54:58.719956 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
9722 13:54:58.720121 arm64_sve-ptrace_Set_SVE_VL_3536 pass
9723 13:54:58.720284 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 skip
9724 13:54:58.723165 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
9725 13:54:58.723285 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
9726 13:54:58.723385 arm64_sve-ptrace_Set_SVE_VL_3552 pass
9727 13:54:58.723671 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 skip
9728 13:54:58.723864 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
9729 13:54:58.724105 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
9730 13:54:58.724300 arm64_sve-ptrace_Set_SVE_VL_3568 pass
9731 13:54:58.724471 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 skip
9732 13:54:58.724845 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
9733 13:54:58.724947 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
9734 13:54:58.725034 arm64_sve-ptrace_Set_SVE_VL_3584 pass
9735 13:54:58.725115 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 skip
9736 13:54:58.725215 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
9737 13:54:58.725302 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
9738 13:54:58.725388 arm64_sve-ptrace_Set_SVE_VL_3600 pass
9739 13:54:58.725472 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 skip
9740 13:54:58.725557 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
9741 13:54:58.725665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
9742 13:54:58.725758 arm64_sve-ptrace_Set_SVE_VL_3616 pass
9743 13:54:58.725843 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 skip
9744 13:54:58.725989 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
9745 13:54:58.726082 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
9746 13:54:58.726166 arm64_sve-ptrace_Set_SVE_VL_3632 pass
9747 13:54:58.726484 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 skip
9748 13:54:58.726585 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
9749 13:54:58.726686 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
9750 13:54:58.726780 arm64_sve-ptrace_Set_SVE_VL_3648 pass
9751 13:54:58.730944 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 skip
9752 13:54:58.731256 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
9753 13:54:58.731359 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
9754 13:54:58.731457 arm64_sve-ptrace_Set_SVE_VL_3664 pass
9755 13:54:58.745229 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 skip
9756 13:54:58.745700 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
9757 13:54:58.745868 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
9758 13:54:58.746026 arm64_sve-ptrace_Set_SVE_VL_3680 pass
9759 13:54:58.746160 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 skip
9760 13:54:58.746316 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
9761 13:54:58.746454 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
9762 13:54:58.746595 arm64_sve-ptrace_Set_SVE_VL_3696 pass
9763 13:54:58.746724 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 skip
9764 13:54:58.746847 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
9765 13:54:58.746951 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
9766 13:54:58.747040 arm64_sve-ptrace_Set_SVE_VL_3712 pass
9767 13:54:58.747145 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 skip
9768 13:54:58.747235 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
9769 13:54:58.747347 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
9770 13:54:58.747652 arm64_sve-ptrace_Set_SVE_VL_3728 pass
9771 13:54:58.747756 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 skip
9772 13:54:58.748062 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
9773 13:54:58.748161 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
9774 13:54:58.748245 arm64_sve-ptrace_Set_SVE_VL_3744 pass
9775 13:54:58.748343 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 skip
9776 13:54:58.748427 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
9777 13:54:58.748723 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
9778 13:54:58.748833 arm64_sve-ptrace_Set_SVE_VL_3760 pass
9779 13:54:58.748932 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 skip
9780 13:54:58.749241 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
9781 13:54:58.749340 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
9782 13:54:58.749440 arm64_sve-ptrace_Set_SVE_VL_3776 pass
9783 13:54:58.749524 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 skip
9784 13:54:58.749621 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
9785 13:54:58.749954 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
9786 13:54:58.750093 arm64_sve-ptrace_Set_SVE_VL_3792 pass
9787 13:54:58.750201 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 skip
9788 13:54:58.750303 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
9789 13:54:58.750404 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
9790 13:54:58.750509 arm64_sve-ptrace_Set_SVE_VL_3808 pass
9791 13:54:58.750808 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 skip
9792 13:54:58.754892 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
9793 13:54:58.755205 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
9794 13:54:58.755308 arm64_sve-ptrace_Set_SVE_VL_3824 pass
9795 13:54:58.755409 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 skip
9796 13:54:58.755515 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
9797 13:54:58.755633 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
9798 13:54:58.755745 arm64_sve-ptrace_Set_SVE_VL_3840 pass
9799 13:54:58.756049 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 skip
9800 13:54:58.756178 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
9801 13:54:58.756283 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
9802 13:54:58.756385 arm64_sve-ptrace_Set_SVE_VL_3856 pass
9803 13:54:58.756692 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 skip
9804 13:54:58.756803 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
9805 13:54:58.756905 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
9806 13:54:58.757006 arm64_sve-ptrace_Set_SVE_VL_3872 pass
9807 13:54:58.757105 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 skip
9808 13:54:58.757439 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
9809 13:54:58.757555 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
9810 13:54:58.757644 arm64_sve-ptrace_Set_SVE_VL_3888 pass
9811 13:54:58.757748 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 skip
9812 13:54:58.758064 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
9813 13:54:58.758230 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
9814 13:54:58.758364 arm64_sve-ptrace_Set_SVE_VL_3904 pass
9815 13:54:58.758461 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 skip
9816 13:54:58.758571 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
9817 13:54:58.758665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
9818 13:54:58.758771 arm64_sve-ptrace_Set_SVE_VL_3920 pass
9819 13:54:58.762948 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 skip
9820 13:54:58.763306 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
9821 13:54:58.763408 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
9822 13:54:58.763509 arm64_sve-ptrace_Set_SVE_VL_3936 pass
9823 13:54:58.763596 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 skip
9824 13:54:58.763695 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
9825 13:54:58.763797 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
9826 13:54:58.763884 arm64_sve-ptrace_Set_SVE_VL_3952 pass
9827 13:54:58.763983 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 skip
9828 13:54:58.764267 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
9829 13:54:58.764357 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
9830 13:54:58.764455 arm64_sve-ptrace_Set_SVE_VL_3968 pass
9831 13:54:58.764560 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 skip
9832 13:54:58.764660 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
9833 13:54:58.764959 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
9834 13:54:58.765060 arm64_sve-ptrace_Set_SVE_VL_3984 pass
9835 13:54:58.765386 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 skip
9836 13:54:58.765479 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
9837 13:54:58.765750 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
9838 13:54:58.765842 arm64_sve-ptrace_Set_SVE_VL_4000 pass
9839 13:54:58.765973 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 skip
9840 13:54:58.766109 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
9841 13:54:58.766218 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
9842 13:54:58.766306 arm64_sve-ptrace_Set_SVE_VL_4016 pass
9843 13:54:58.766406 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 skip
9844 13:54:58.766716 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
9845 13:54:58.766818 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
9846 13:54:58.766931 arm64_sve-ptrace_Set_SVE_VL_4032 pass
9847 13:54:58.770977 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 skip
9848 13:54:58.771375 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
9849 13:54:58.771483 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
9850 13:54:58.771565 arm64_sve-ptrace_Set_SVE_VL_4048 pass
9851 13:54:58.771649 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 skip
9852 13:54:58.771745 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
9853 13:54:58.771834 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
9854 13:54:58.771924 arm64_sve-ptrace_Set_SVE_VL_4064 pass
9855 13:54:58.772021 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 skip
9856 13:54:58.772105 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
9857 13:54:58.772215 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
9858 13:54:58.772322 arm64_sve-ptrace_Set_SVE_VL_4080 pass
9859 13:54:58.772451 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 skip
9860 13:54:58.772554 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
9861 13:54:58.772677 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
9862 13:54:58.772773 arm64_sve-ptrace_Set_SVE_VL_4096 pass
9863 13:54:58.772861 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 skip
9864 13:54:58.772976 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
9865 13:54:58.773081 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
9866 13:54:58.773204 arm64_sve-ptrace_Set_SVE_VL_4112 pass
9867 13:54:58.773304 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 skip
9868 13:54:58.773411 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
9869 13:54:58.773502 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
9870 13:54:58.773602 arm64_sve-ptrace_Set_SVE_VL_4128 pass
9871 13:54:58.773703 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 skip
9872 13:54:58.773818 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
9873 13:54:58.773916 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
9874 13:54:58.774028 arm64_sve-ptrace_Set_SVE_VL_4144 pass
9875 13:54:58.774139 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 skip
9876 13:54:58.774259 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
9877 13:54:58.774379 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
9878 13:54:58.774498 arm64_sve-ptrace_Set_SVE_VL_4160 pass
9879 13:54:58.774584 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 skip
9880 13:54:58.774676 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
9881 13:54:58.778902 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
9882 13:54:58.779215 arm64_sve-ptrace_Set_SVE_VL_4176 pass
9883 13:54:58.779317 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 skip
9884 13:54:58.779415 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
9885 13:54:58.779496 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
9886 13:54:58.779589 arm64_sve-ptrace_Set_SVE_VL_4192 pass
9887 13:54:58.779684 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 skip
9888 13:54:58.779783 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
9889 13:54:58.779874 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
9890 13:54:58.779964 arm64_sve-ptrace_Set_SVE_VL_4208 pass
9891 13:54:58.780057 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 skip
9892 13:54:58.780354 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
9893 13:54:58.780468 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
9894 13:54:58.780748 arm64_sve-ptrace_Set_SVE_VL_4224 pass
9895 13:54:58.780849 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 skip
9896 13:54:58.781129 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
9897 13:54:58.781224 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
9898 13:54:58.781316 arm64_sve-ptrace_Set_SVE_VL_4240 pass
9899 13:54:58.781408 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 skip
9900 13:54:58.781684 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
9901 13:54:58.781782 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
9902 13:54:58.781874 arm64_sve-ptrace_Set_SVE_VL_4256 pass
9903 13:54:58.782147 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 skip
9904 13:54:58.782236 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
9905 13:54:58.782328 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
9906 13:54:58.782408 arm64_sve-ptrace_Set_SVE_VL_4272 pass
9907 13:54:58.782499 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 skip
9908 13:54:58.782785 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
9909 13:54:58.782872 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
9910 13:54:58.786940 arm64_sve-ptrace_Set_SVE_VL_4288 pass
9911 13:54:58.787224 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 skip
9912 13:54:58.787314 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
9913 13:54:58.787396 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
9914 13:54:58.787651 arm64_sve-ptrace_Set_SVE_VL_4304 pass
9915 13:54:58.799765 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 skip
9916 13:54:58.800064 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
9917 13:54:58.800166 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
9918 13:54:58.800244 arm64_sve-ptrace_Set_SVE_VL_4320 pass
9919 13:54:58.800336 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 skip
9920 13:54:58.800423 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
9921 13:54:58.800509 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
9922 13:54:58.800596 arm64_sve-ptrace_Set_SVE_VL_4336 pass
9923 13:54:58.800878 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 skip
9924 13:54:58.800976 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
9925 13:54:58.801078 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
9926 13:54:58.801182 arm64_sve-ptrace_Set_SVE_VL_4352 pass
9927 13:54:58.801268 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 skip
9928 13:54:58.801361 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
9929 13:54:58.801450 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
9930 13:54:58.801543 arm64_sve-ptrace_Set_SVE_VL_4368 pass
9931 13:54:58.801636 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 skip
9932 13:54:58.801733 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
9933 13:54:58.801826 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
9934 13:54:58.801926 arm64_sve-ptrace_Set_SVE_VL_4384 pass
9935 13:54:58.802029 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 skip
9936 13:54:58.802333 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
9937 13:54:58.802448 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
9938 13:54:58.802542 arm64_sve-ptrace_Set_SVE_VL_4400 pass
9939 13:54:58.802632 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 skip
9940 13:54:58.802722 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
9941 13:54:58.806908 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
9942 13:54:58.807205 arm64_sve-ptrace_Set_SVE_VL_4416 pass
9943 13:54:58.807301 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 skip
9944 13:54:58.807385 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
9945 13:54:58.807476 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
9946 13:54:58.807550 arm64_sve-ptrace_Set_SVE_VL_4432 pass
9947 13:54:58.807668 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 skip
9948 13:54:58.807762 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
9949 13:54:58.807862 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
9950 13:54:58.808173 arm64_sve-ptrace_Set_SVE_VL_4448 pass
9951 13:54:58.808267 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 skip
9952 13:54:58.808369 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
9953 13:54:58.808462 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
9954 13:54:58.808564 arm64_sve-ptrace_Set_SVE_VL_4464 pass
9955 13:54:58.808653 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 skip
9956 13:54:58.808749 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
9957 13:54:58.808843 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
9958 13:54:58.808944 arm64_sve-ptrace_Set_SVE_VL_4480 pass
9959 13:54:58.809127 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 skip
9960 13:54:58.809249 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
9961 13:54:58.809363 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
9962 13:54:58.809475 arm64_sve-ptrace_Set_SVE_VL_4496 pass
9963 13:54:58.809767 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 skip
9964 13:54:58.809870 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
9965 13:54:58.809975 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
9966 13:54:58.810059 arm64_sve-ptrace_Set_SVE_VL_4512 pass
9967 13:54:58.810153 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 skip
9968 13:54:58.810254 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
9969 13:54:58.810543 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
9970 13:54:58.810846 arm64_sve-ptrace_Set_SVE_VL_4528 pass
9971 13:54:58.810928 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 skip
9972 13:54:58.815139 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
9973 13:54:58.815433 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
9974 13:54:58.815542 arm64_sve-ptrace_Set_SVE_VL_4544 pass
9975 13:54:58.815642 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 skip
9976 13:54:58.815754 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
9977 13:54:58.815830 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
9978 13:54:58.815929 arm64_sve-ptrace_Set_SVE_VL_4560 pass
9979 13:54:58.816013 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 skip
9980 13:54:58.816110 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
9981 13:54:58.816182 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
9982 13:54:58.816274 arm64_sve-ptrace_Set_SVE_VL_4576 pass
9983 13:54:58.816354 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 skip
9984 13:54:58.816446 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
9985 13:54:58.816530 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
9986 13:54:58.816626 arm64_sve-ptrace_Set_SVE_VL_4592 pass
9987 13:54:58.816975 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 skip
9988 13:54:58.817075 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
9989 13:54:58.817189 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
9990 13:54:58.817275 arm64_sve-ptrace_Set_SVE_VL_4608 pass
9991 13:54:58.817363 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 skip
9992 13:54:58.817448 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
9993 13:54:58.817543 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
9994 13:54:58.817639 arm64_sve-ptrace_Set_SVE_VL_4624 pass
9995 13:54:58.817745 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 skip
9996 13:54:58.817833 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
9997 13:54:58.818122 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
9998 13:54:58.818241 arm64_sve-ptrace_Set_SVE_VL_4640 pass
9999 13:54:58.818347 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 skip
10000 13:54:58.818466 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
10001 13:54:58.818550 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
10002 13:54:58.818645 arm64_sve-ptrace_Set_SVE_VL_4656 pass
10003 13:54:58.818732 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 skip
10004 13:54:58.822947 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
10005 13:54:58.823269 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
10006 13:54:58.823371 arm64_sve-ptrace_Set_SVE_VL_4672 pass
10007 13:54:58.823493 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 skip
10008 13:54:58.823622 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
10009 13:54:58.823732 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
10010 13:54:58.823856 arm64_sve-ptrace_Set_SVE_VL_4688 pass
10011 13:54:58.823948 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 skip
10012 13:54:58.824033 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
10013 13:54:58.824114 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
10014 13:54:58.824207 arm64_sve-ptrace_Set_SVE_VL_4704 pass
10015 13:54:58.824296 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 skip
10016 13:54:58.824403 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
10017 13:54:58.824688 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
10018 13:54:58.824787 arm64_sve-ptrace_Set_SVE_VL_4720 pass
10019 13:54:58.824865 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 skip
10020 13:54:58.824961 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
10021 13:54:58.825042 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
10022 13:54:58.825132 arm64_sve-ptrace_Set_SVE_VL_4736 pass
10023 13:54:58.825196 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 skip
10024 13:54:58.825280 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
10025 13:54:58.825532 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
10026 13:54:58.825660 arm64_sve-ptrace_Set_SVE_VL_4752 pass
10027 13:54:58.825773 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 skip
10028 13:54:58.825866 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
10029 13:54:58.825965 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
10030 13:54:58.826234 arm64_sve-ptrace_Set_SVE_VL_4768 pass
10031 13:54:58.826315 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 skip
10032 13:54:58.826391 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
10033 13:54:58.826476 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
10034 13:54:58.826758 arm64_sve-ptrace_Set_SVE_VL_4784 pass
10035 13:54:58.826843 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 skip
10036 13:54:58.830956 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
10037 13:54:58.831358 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
10038 13:54:58.831546 arm64_sve-ptrace_Set_SVE_VL_4800 pass
10039 13:54:58.831717 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 skip
10040 13:54:58.831877 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
10041 13:54:58.832073 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
10042 13:54:58.832232 arm64_sve-ptrace_Set_SVE_VL_4816 pass
10043 13:54:58.832359 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 skip
10044 13:54:58.832525 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
10045 13:54:58.832707 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
10046 13:54:58.832891 arm64_sve-ptrace_Set_SVE_VL_4832 pass
10047 13:54:58.833102 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 skip
10048 13:54:58.833277 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
10049 13:54:58.833426 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
10050 13:54:58.833589 arm64_sve-ptrace_Set_SVE_VL_4848 pass
10051 13:54:58.833752 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 skip
10052 13:54:58.833912 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
10053 13:54:58.834071 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
10054 13:54:58.834216 arm64_sve-ptrace_Set_SVE_VL_4864 pass
10055 13:54:58.834367 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 skip
10056 13:54:58.834551 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
10057 13:54:58.834706 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
10058 13:54:58.834847 arm64_sve-ptrace_Set_SVE_VL_4880 pass
10059 13:54:58.834967 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 skip
10060 13:54:58.835084 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
10061 13:54:58.835199 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
10062 13:54:58.835315 arm64_sve-ptrace_Set_SVE_VL_4896 pass
10063 13:54:58.835430 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 skip
10064 13:54:58.835545 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
10065 13:54:58.835660 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
10066 13:54:58.835774 arm64_sve-ptrace_Set_SVE_VL_4912 pass
10067 13:54:58.835890 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 skip
10068 13:54:58.836005 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
10069 13:54:58.836145 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
10070 13:54:58.836266 arm64_sve-ptrace_Set_SVE_VL_4928 pass
10071 13:54:58.838961 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 skip
10072 13:54:58.839382 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
10073 13:54:58.839555 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
10074 13:54:58.839728 arm64_sve-ptrace_Set_SVE_VL_4944 pass
10075 13:54:58.851030 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 skip
10076 13:54:58.851473 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
10077 13:54:58.851666 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
10078 13:54:58.851804 arm64_sve-ptrace_Set_SVE_VL_4960 pass
10079 13:54:58.851959 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 skip
10080 13:54:58.852148 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
10081 13:54:58.852306 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
10082 13:54:58.852456 arm64_sve-ptrace_Set_SVE_VL_4976 pass
10083 13:54:58.852623 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 skip
10084 13:54:58.852775 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
10085 13:54:58.852975 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
10086 13:54:58.853138 arm64_sve-ptrace_Set_SVE_VL_4992 pass
10087 13:54:58.853303 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 skip
10088 13:54:58.853461 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
10089 13:54:58.853616 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
10090 13:54:58.853788 arm64_sve-ptrace_Set_SVE_VL_5008 pass
10091 13:54:58.853949 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 skip
10092 13:54:58.854156 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
10093 13:54:58.854332 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
10094 13:54:58.854503 arm64_sve-ptrace_Set_SVE_VL_5024 pass
10095 13:54:58.854663 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 skip
10096 13:54:58.854846 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
10097 13:54:58.854986 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
10098 13:54:58.855103 arm64_sve-ptrace_Set_SVE_VL_5040 pass
10099 13:54:58.855218 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 skip
10100 13:54:58.855333 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
10101 13:54:58.855447 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
10102 13:54:58.855559 arm64_sve-ptrace_Set_SVE_VL_5056 pass
10103 13:54:58.855701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 skip
10104 13:54:58.855820 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
10105 13:54:58.855938 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
10106 13:54:58.856055 arm64_sve-ptrace_Set_SVE_VL_5072 pass
10107 13:54:58.856170 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 skip
10108 13:54:58.856283 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
10109 13:54:58.856398 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
10110 13:54:58.858942 arm64_sve-ptrace_Set_SVE_VL_5088 pass
10111 13:54:58.859287 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 skip
10112 13:54:58.859486 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
10113 13:54:58.859644 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
10114 13:54:58.859816 arm64_sve-ptrace_Set_SVE_VL_5104 pass
10115 13:54:58.859942 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 skip
10116 13:54:58.860102 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
10117 13:54:58.860253 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
10118 13:54:58.860443 arm64_sve-ptrace_Set_SVE_VL_5120 pass
10119 13:54:58.860607 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 skip
10120 13:54:58.860758 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
10121 13:54:58.860915 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
10122 13:54:58.861073 arm64_sve-ptrace_Set_SVE_VL_5136 pass
10123 13:54:58.861243 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 skip
10124 13:54:58.861390 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
10125 13:54:58.861544 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
10126 13:54:58.861709 arm64_sve-ptrace_Set_SVE_VL_5152 pass
10127 13:54:58.861858 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 skip
10128 13:54:58.861989 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
10129 13:54:58.862176 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
10130 13:54:58.862339 arm64_sve-ptrace_Set_SVE_VL_5168 pass
10131 13:54:58.862496 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 skip
10132 13:54:58.862658 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
10133 13:54:58.862800 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
10134 13:54:58.862917 arm64_sve-ptrace_Set_SVE_VL_5184 pass
10135 13:54:58.863034 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 skip
10136 13:54:58.863150 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
10137 13:54:58.863292 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
10138 13:54:58.863414 arm64_sve-ptrace_Set_SVE_VL_5200 pass
10139 13:54:58.863531 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 skip
10140 13:54:58.863647 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
10141 13:54:58.863761 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
10142 13:54:58.863875 arm64_sve-ptrace_Set_SVE_VL_5216 pass
10143 13:54:58.866971 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 skip
10144 13:54:58.867412 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
10145 13:54:58.867604 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
10146 13:54:58.867809 arm64_sve-ptrace_Set_SVE_VL_5232 pass
10147 13:54:58.868009 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 skip
10148 13:54:58.868216 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
10149 13:54:58.868421 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
10150 13:54:58.868571 arm64_sve-ptrace_Set_SVE_VL_5248 pass
10151 13:54:58.868705 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 skip
10152 13:54:58.868899 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
10153 13:54:58.869056 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
10154 13:54:58.869219 arm64_sve-ptrace_Set_SVE_VL_5264 pass
10155 13:54:58.869388 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 skip
10156 13:54:58.869551 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
10157 13:54:58.869725 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
10158 13:54:58.869889 arm64_sve-ptrace_Set_SVE_VL_5280 pass
10159 13:54:58.870060 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 skip
10160 13:54:58.870265 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
10161 13:54:58.870474 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
10162 13:54:58.870644 arm64_sve-ptrace_Set_SVE_VL_5296 pass
10163 13:54:58.870798 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 skip
10164 13:54:58.870919 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
10165 13:54:58.871034 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
10166 13:54:58.871150 arm64_sve-ptrace_Set_SVE_VL_5312 pass
10167 13:54:58.871264 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 skip
10168 13:54:58.871376 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
10169 13:54:58.871489 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
10170 13:54:58.871601 arm64_sve-ptrace_Set_SVE_VL_5328 pass
10171 13:54:58.871712 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 skip
10172 13:54:58.871854 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
10173 13:54:58.871976 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
10174 13:54:58.872093 arm64_sve-ptrace_Set_SVE_VL_5344 pass
10175 13:54:58.872208 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 skip
10176 13:54:58.872322 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
10177 13:54:58.874944 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
10178 13:54:58.875343 arm64_sve-ptrace_Set_SVE_VL_5360 pass
10179 13:54:58.875492 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 skip
10180 13:54:58.875658 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
10181 13:54:58.875894 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
10182 13:54:58.876082 arm64_sve-ptrace_Set_SVE_VL_5376 pass
10183 13:54:58.876249 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 skip
10184 13:54:58.876408 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
10185 13:54:58.876559 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
10186 13:54:58.876770 arm64_sve-ptrace_Set_SVE_VL_5392 pass
10187 13:54:58.876905 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 skip
10188 13:54:58.877023 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
10189 13:54:58.877139 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
10190 13:54:58.877296 arm64_sve-ptrace_Set_SVE_VL_5408 pass
10191 13:54:58.877472 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 skip
10192 13:54:58.877636 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
10193 13:54:58.877893 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
10194 13:54:58.878089 arm64_sve-ptrace_Set_SVE_VL_5424 pass
10195 13:54:58.878290 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 skip
10196 13:54:58.878450 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
10197 13:54:58.878605 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
10198 13:54:58.878798 arm64_sve-ptrace_Set_SVE_VL_5440 pass
10199 13:54:58.878938 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 skip
10200 13:54:58.879057 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
10201 13:54:58.879174 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
10202 13:54:58.879319 arm64_sve-ptrace_Set_SVE_VL_5456 pass
10203 13:54:58.879441 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 skip
10204 13:54:58.879558 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
10205 13:54:58.879674 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
10206 13:54:58.879791 arm64_sve-ptrace_Set_SVE_VL_5472 pass
10207 13:54:58.879906 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 skip
10208 13:54:58.880020 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
10209 13:54:58.880135 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
10210 13:54:58.880251 arm64_sve-ptrace_Set_SVE_VL_5488 pass
10211 13:54:58.882961 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 skip
10212 13:54:58.883407 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
10213 13:54:58.883608 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
10214 13:54:58.883781 arm64_sve-ptrace_Set_SVE_VL_5504 pass
10215 13:54:58.883992 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 skip
10216 13:54:58.884170 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
10217 13:54:58.884360 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
10218 13:54:58.884516 arm64_sve-ptrace_Set_SVE_VL_5520 pass
10219 13:54:58.884674 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 skip
10220 13:54:58.884832 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
10221 13:54:58.884973 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
10222 13:54:58.885160 arm64_sve-ptrace_Set_SVE_VL_5536 pass
10223 13:54:58.885332 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 skip
10224 13:54:58.885485 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
10225 13:54:58.885720 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
10226 13:54:58.885886 arm64_sve-ptrace_Set_SVE_VL_5552 pass
10227 13:54:58.886046 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 skip
10228 13:54:58.886185 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
10229 13:54:58.886303 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
10230 13:54:58.886451 arm64_sve-ptrace_Set_SVE_VL_5568 pass
10231 13:54:58.886598 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 skip
10232 13:54:58.886717 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
10233 13:54:58.886834 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
10234 13:54:58.886949 arm64_sve-ptrace_Set_SVE_VL_5584 pass
10235 13:54:58.902229 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 skip
10236 13:54:58.902427 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
10237 13:54:58.902831 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
10238 13:54:58.902999 arm64_sve-ptrace_Set_SVE_VL_5600 pass
10239 13:54:58.903203 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 skip
10240 13:54:58.903386 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
10241 13:54:58.903579 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
10242 13:54:58.903750 arm64_sve-ptrace_Set_SVE_VL_5616 pass
10243 13:54:58.903910 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 skip
10244 13:54:58.904066 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
10245 13:54:58.904217 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
10246 13:54:58.904396 arm64_sve-ptrace_Set_SVE_VL_5632 pass
10247 13:54:58.904528 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 skip
10248 13:54:58.904663 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
10249 13:54:58.904780 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
10250 13:54:58.904896 arm64_sve-ptrace_Set_SVE_VL_5648 pass
10251 13:54:58.905015 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 skip
10252 13:54:58.905181 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
10253 13:54:58.905319 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
10254 13:54:58.905466 arm64_sve-ptrace_Set_SVE_VL_5664 pass
10255 13:54:58.905608 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 skip
10256 13:54:58.905808 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
10257 13:54:58.906004 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
10258 13:54:58.906227 arm64_sve-ptrace_Set_SVE_VL_5680 pass
10259 13:54:58.906419 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 skip
10260 13:54:58.906607 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
10261 13:54:58.906753 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
10262 13:54:58.906869 arm64_sve-ptrace_Set_SVE_VL_5696 pass
10263 13:54:58.906980 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 skip
10264 13:54:58.907092 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
10265 13:54:58.907230 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
10266 13:54:58.907348 arm64_sve-ptrace_Set_SVE_VL_5712 pass
10267 13:54:58.907460 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 skip
10268 13:54:58.910992 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
10269 13:54:58.911499 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
10270 13:54:58.911799 arm64_sve-ptrace_Set_SVE_VL_5728 pass
10271 13:54:58.911976 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 skip
10272 13:54:58.912184 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
10273 13:54:58.912396 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
10274 13:54:58.912556 arm64_sve-ptrace_Set_SVE_VL_5744 pass
10275 13:54:58.912705 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 skip
10276 13:54:58.912873 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
10277 13:54:58.913044 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
10278 13:54:58.913211 arm64_sve-ptrace_Set_SVE_VL_5760 pass
10279 13:54:58.913382 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 skip
10280 13:54:58.913555 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
10281 13:54:58.913753 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
10282 13:54:58.913914 arm64_sve-ptrace_Set_SVE_VL_5776 pass
10283 13:54:58.914070 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 skip
10284 13:54:58.914208 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
10285 13:54:58.914344 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
10286 13:54:58.914480 arm64_sve-ptrace_Set_SVE_VL_5792 pass
10287 13:54:58.914669 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 skip
10288 13:54:58.914841 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
10289 13:54:58.914972 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
10290 13:54:58.915089 arm64_sve-ptrace_Set_SVE_VL_5808 pass
10291 13:54:58.915203 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 skip
10292 13:54:58.915319 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
10293 13:54:58.915466 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
10294 13:54:58.915590 arm64_sve-ptrace_Set_SVE_VL_5824 pass
10295 13:54:58.915708 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 skip
10296 13:54:58.915823 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
10297 13:54:58.915938 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
10298 13:54:58.916052 arm64_sve-ptrace_Set_SVE_VL_5840 pass
10299 13:54:58.916165 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 skip
10300 13:54:58.916279 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
10301 13:54:58.916395 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
10302 13:54:58.919008 arm64_sve-ptrace_Set_SVE_VL_5856 pass
10303 13:54:58.919202 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 skip
10304 13:54:58.919614 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
10305 13:54:58.919809 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
10306 13:54:58.919954 arm64_sve-ptrace_Set_SVE_VL_5872 pass
10307 13:54:58.920077 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 skip
10308 13:54:58.920231 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
10309 13:54:58.920354 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
10310 13:54:58.920490 arm64_sve-ptrace_Set_SVE_VL_5888 pass
10311 13:54:58.920640 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 skip
10312 13:54:58.920798 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
10313 13:54:58.920981 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
10314 13:54:58.921146 arm64_sve-ptrace_Set_SVE_VL_5904 pass
10315 13:54:58.921303 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 skip
10316 13:54:58.921461 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
10317 13:54:58.921607 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
10318 13:54:58.921831 arm64_sve-ptrace_Set_SVE_VL_5920 pass
10319 13:54:58.922081 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 skip
10320 13:54:58.922271 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
10321 13:54:58.922455 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
10322 13:54:58.922667 arm64_sve-ptrace_Set_SVE_VL_5936 pass
10323 13:54:58.922844 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 skip
10324 13:54:58.922989 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
10325 13:54:58.923130 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
10326 13:54:58.923271 arm64_sve-ptrace_Set_SVE_VL_5952 pass
10327 13:54:58.923450 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 skip
10328 13:54:58.923586 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
10329 13:54:58.923728 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
10330 13:54:58.923870 arm64_sve-ptrace_Set_SVE_VL_5968 pass
10331 13:54:58.924010 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 skip
10332 13:54:58.924150 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
10333 13:54:58.926931 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
10334 13:54:58.927353 arm64_sve-ptrace_Set_SVE_VL_5984 pass
10335 13:54:58.927537 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 skip
10336 13:54:58.927713 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
10337 13:54:58.927934 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
10338 13:54:58.928136 arm64_sve-ptrace_Set_SVE_VL_6000 pass
10339 13:54:58.928345 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 skip
10340 13:54:58.928527 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
10341 13:54:58.928717 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
10342 13:54:58.928891 arm64_sve-ptrace_Set_SVE_VL_6016 pass
10343 13:54:58.929163 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 skip
10344 13:54:58.929369 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
10345 13:54:58.929532 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
10346 13:54:58.929754 arm64_sve-ptrace_Set_SVE_VL_6032 pass
10347 13:54:58.929950 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 skip
10348 13:54:58.930132 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
10349 13:54:58.930295 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
10350 13:54:58.930460 arm64_sve-ptrace_Set_SVE_VL_6048 pass
10351 13:54:58.930621 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 skip
10352 13:54:58.930776 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
10353 13:54:58.930904 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
10354 13:54:58.931020 arm64_sve-ptrace_Set_SVE_VL_6064 pass
10355 13:54:58.931167 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 skip
10356 13:54:58.931287 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
10357 13:54:58.931401 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
10358 13:54:58.931516 arm64_sve-ptrace_Set_SVE_VL_6080 pass
10359 13:54:58.931629 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 skip
10360 13:54:58.931741 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
10361 13:54:58.931854 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
10362 13:54:58.931968 arm64_sve-ptrace_Set_SVE_VL_6096 pass
10363 13:54:58.932081 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 skip
10364 13:54:58.934956 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
10365 13:54:58.935353 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
10366 13:54:58.935546 arm64_sve-ptrace_Set_SVE_VL_6112 pass
10367 13:54:58.935729 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 skip
10368 13:54:58.935979 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
10369 13:54:58.936163 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
10370 13:54:58.936429 arm64_sve-ptrace_Set_SVE_VL_6128 pass
10371 13:54:58.936626 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 skip
10372 13:54:58.936870 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
10373 13:54:58.937055 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
10374 13:54:58.937283 arm64_sve-ptrace_Set_SVE_VL_6144 pass
10375 13:54:58.937465 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 skip
10376 13:54:58.937632 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
10377 13:54:58.937802 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
10378 13:54:58.937951 arm64_sve-ptrace_Set_SVE_VL_6160 pass
10379 13:54:58.938101 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 skip
10380 13:54:58.938365 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
10381 13:54:58.938592 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
10382 13:54:58.938756 arm64_sve-ptrace_Set_SVE_VL_6176 pass
10383 13:54:58.938885 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 skip
10384 13:54:58.939004 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
10385 13:54:58.939120 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
10386 13:54:58.939237 arm64_sve-ptrace_Set_SVE_VL_6192 pass
10387 13:54:58.939352 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 skip
10388 13:54:58.939468 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
10389 13:54:58.939583 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
10390 13:54:58.939699 arm64_sve-ptrace_Set_SVE_VL_6208 pass
10391 13:54:58.939814 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 skip
10392 13:54:58.939956 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
10393 13:54:58.940080 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
10394 13:54:58.940197 arm64_sve-ptrace_Set_SVE_VL_6224 pass
10395 13:54:58.955587 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 skip
10396 13:54:58.956019 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
10397 13:54:58.956221 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
10398 13:54:58.956380 arm64_sve-ptrace_Set_SVE_VL_6240 pass
10399 13:54:58.956512 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 skip
10400 13:54:58.956700 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
10401 13:54:58.956849 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
10402 13:54:58.957011 arm64_sve-ptrace_Set_SVE_VL_6256 pass
10403 13:54:58.957157 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 skip
10404 13:54:58.957305 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
10405 13:54:58.957491 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
10406 13:54:58.957672 arm64_sve-ptrace_Set_SVE_VL_6272 pass
10407 13:54:58.957832 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 skip
10408 13:54:58.957995 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
10409 13:54:58.958157 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
10410 13:54:58.958324 arm64_sve-ptrace_Set_SVE_VL_6288 pass
10411 13:54:58.958516 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 skip
10412 13:54:58.958668 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
10413 13:54:58.958803 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
10414 13:54:58.958934 arm64_sve-ptrace_Set_SVE_VL_6304 pass
10415 13:54:58.959050 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 skip
10416 13:54:58.959166 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
10417 13:54:58.959280 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
10418 13:54:58.959397 arm64_sve-ptrace_Set_SVE_VL_6320 pass
10419 13:54:58.959536 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 skip
10420 13:54:58.959657 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
10421 13:54:58.963002 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
10422 13:54:58.963429 arm64_sve-ptrace_Set_SVE_VL_6336 pass
10423 13:54:58.963614 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 skip
10424 13:54:58.963786 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
10425 13:54:58.963982 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
10426 13:54:58.964158 arm64_sve-ptrace_Set_SVE_VL_6352 pass
10427 13:54:58.964323 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 skip
10428 13:54:58.964484 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
10429 13:54:58.964669 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
10430 13:54:58.964832 arm64_sve-ptrace_Set_SVE_VL_6368 pass
10431 13:54:58.964994 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 skip
10432 13:54:58.965168 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
10433 13:54:58.965314 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
10434 13:54:58.965493 arm64_sve-ptrace_Set_SVE_VL_6384 pass
10435 13:54:58.965684 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 skip
10436 13:54:58.965857 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
10437 13:54:58.966002 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
10438 13:54:58.966143 arm64_sve-ptrace_Set_SVE_VL_6400 pass
10439 13:54:58.966285 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 skip
10440 13:54:58.966538 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
10441 13:54:58.966703 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
10442 13:54:58.966851 arm64_sve-ptrace_Set_SVE_VL_6416 pass
10443 13:54:58.966974 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 skip
10444 13:54:58.967090 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
10445 13:54:58.967205 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
10446 13:54:58.967321 arm64_sve-ptrace_Set_SVE_VL_6432 pass
10447 13:54:58.967462 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 skip
10448 13:54:58.967581 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
10449 13:54:58.970975 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
10450 13:54:58.971413 arm64_sve-ptrace_Set_SVE_VL_6448 pass
10451 13:54:58.971605 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 skip
10452 13:54:58.971772 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
10453 13:54:58.971941 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
10454 13:54:58.972191 arm64_sve-ptrace_Set_SVE_VL_6464 pass
10455 13:54:58.972354 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 skip
10456 13:54:58.972501 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
10457 13:54:58.972683 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
10458 13:54:58.972858 arm64_sve-ptrace_Set_SVE_VL_6480 pass
10459 13:54:58.973048 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 skip
10460 13:54:58.973288 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
10461 13:54:58.973466 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
10462 13:54:58.973631 arm64_sve-ptrace_Set_SVE_VL_6496 pass
10463 13:54:58.973800 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 skip
10464 13:54:58.973964 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
10465 13:54:58.974123 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
10466 13:54:58.974290 arm64_sve-ptrace_Set_SVE_VL_6512 pass
10467 13:54:58.974429 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 skip
10468 13:54:58.974622 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
10469 13:54:58.974793 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
10470 13:54:58.974934 arm64_sve-ptrace_Set_SVE_VL_6528 pass
10471 13:54:58.975051 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 skip
10472 13:54:58.975165 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
10473 13:54:58.975276 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
10474 13:54:58.975390 arm64_sve-ptrace_Set_SVE_VL_6544 pass
10475 13:54:58.975502 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 skip
10476 13:54:58.975615 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
10477 13:54:58.975755 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
10478 13:54:58.975874 arm64_sve-ptrace_Set_SVE_VL_6560 pass
10479 13:54:58.978977 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 skip
10480 13:54:58.979401 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
10481 13:54:58.979585 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
10482 13:54:58.979739 arm64_sve-ptrace_Set_SVE_VL_6576 pass
10483 13:54:58.979900 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 skip
10484 13:54:58.980100 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
10485 13:54:58.980302 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
10486 13:54:58.980521 arm64_sve-ptrace_Set_SVE_VL_6592 pass
10487 13:54:58.980698 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 skip
10488 13:54:58.980859 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
10489 13:54:58.981050 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
10490 13:54:58.981213 arm64_sve-ptrace_Set_SVE_VL_6608 pass
10491 13:54:58.981367 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 skip
10492 13:54:58.981536 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
10493 13:54:58.981742 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
10494 13:54:58.981908 arm64_sve-ptrace_Set_SVE_VL_6624 pass
10495 13:54:58.982066 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 skip
10496 13:54:58.982225 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
10497 13:54:58.982419 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
10498 13:54:58.982568 arm64_sve-ptrace_Set_SVE_VL_6640 pass
10499 13:54:58.982704 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 skip
10500 13:54:58.982880 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
10501 13:54:58.983035 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
10502 13:54:58.983156 arm64_sve-ptrace_Set_SVE_VL_6656 pass
10503 13:54:58.983269 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 skip
10504 13:54:58.983383 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
10505 13:54:58.983496 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
10506 13:54:58.983610 arm64_sve-ptrace_Set_SVE_VL_6672 pass
10507 13:54:58.983723 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 skip
10508 13:54:58.983836 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
10509 13:54:58.983976 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
10510 13:54:58.984095 arm64_sve-ptrace_Set_SVE_VL_6688 pass
10511 13:54:58.984210 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 skip
10512 13:54:58.986980 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
10513 13:54:58.987396 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
10514 13:54:58.987631 arm64_sve-ptrace_Set_SVE_VL_6704 pass
10515 13:54:58.987856 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 skip
10516 13:54:58.988089 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
10517 13:54:58.988265 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
10518 13:54:58.988439 arm64_sve-ptrace_Set_SVE_VL_6720 pass
10519 13:54:58.988603 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 skip
10520 13:54:58.988744 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
10521 13:54:58.988897 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
10522 13:54:58.989060 arm64_sve-ptrace_Set_SVE_VL_6736 pass
10523 13:54:58.989219 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 skip
10524 13:54:58.989388 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
10525 13:54:58.989562 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
10526 13:54:58.989736 arm64_sve-ptrace_Set_SVE_VL_6752 pass
10527 13:54:58.989888 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 skip
10528 13:54:58.990041 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
10529 13:54:58.990185 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
10530 13:54:58.990349 arm64_sve-ptrace_Set_SVE_VL_6768 pass
10531 13:54:58.990513 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 skip
10532 13:54:58.990671 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
10533 13:54:58.990826 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
10534 13:54:58.990947 arm64_sve-ptrace_Set_SVE_VL_6784 pass
10535 13:54:58.991061 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 skip
10536 13:54:58.991176 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
10537 13:54:58.991294 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
10538 13:54:58.991409 arm64_sve-ptrace_Set_SVE_VL_6800 pass
10539 13:54:58.991525 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 skip
10540 13:54:58.991666 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
10541 13:54:58.991787 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
10542 13:54:58.991902 arm64_sve-ptrace_Set_SVE_VL_6816 pass
10543 13:54:58.992017 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 skip
10544 13:54:58.992133 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
10545 13:54:58.992247 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
10546 13:54:58.992364 arm64_sve-ptrace_Set_SVE_VL_6832 pass
10547 13:54:58.995019 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 skip
10548 13:54:58.995449 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
10549 13:54:58.995602 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
10550 13:54:58.995725 arm64_sve-ptrace_Set_SVE_VL_6848 pass
10551 13:54:58.995821 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 skip
10552 13:54:58.995956 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
10553 13:54:58.996106 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
10554 13:54:58.996206 arm64_sve-ptrace_Set_SVE_VL_6864 pass
10555 13:54:59.008750 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 skip
10556 13:54:59.009130 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
10557 13:54:59.009235 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
10558 13:54:59.009323 arm64_sve-ptrace_Set_SVE_VL_6880 pass
10559 13:54:59.009401 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 skip
10560 13:54:59.009495 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
10561 13:54:59.009576 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
10562 13:54:59.009665 arm64_sve-ptrace_Set_SVE_VL_6896 pass
10563 13:54:59.009759 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 skip
10564 13:54:59.009841 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
10565 13:54:59.009935 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
10566 13:54:59.010022 arm64_sve-ptrace_Set_SVE_VL_6912 pass
10567 13:54:59.010116 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 skip
10568 13:54:59.010208 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
10569 13:54:59.010299 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
10570 13:54:59.010604 arm64_sve-ptrace_Set_SVE_VL_6928 pass
10571 13:54:59.010705 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 skip
10572 13:54:59.010799 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
10573 13:54:59.011072 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
10574 13:54:59.011173 arm64_sve-ptrace_Set_SVE_VL_6944 pass
10575 13:54:59.011467 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 skip
10576 13:54:59.011567 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
10577 13:54:59.011647 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
10578 13:54:59.011740 arm64_sve-ptrace_Set_SVE_VL_6960 pass
10579 13:54:59.012011 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 skip
10580 13:54:59.012197 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
10581 13:54:59.012366 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
10582 13:54:59.012555 arm64_sve-ptrace_Set_SVE_VL_6976 pass
10583 13:54:59.012761 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 skip
10584 13:54:59.012941 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
10585 13:54:59.013099 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
10586 13:54:59.013256 arm64_sve-ptrace_Set_SVE_VL_6992 pass
10587 13:54:59.013392 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 skip
10588 13:54:59.013580 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
10589 13:54:59.013828 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
10590 13:54:59.014027 arm64_sve-ptrace_Set_SVE_VL_7008 pass
10591 13:54:59.014238 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 skip
10592 13:54:59.014404 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
10593 13:54:59.014597 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
10594 13:54:59.014762 arm64_sve-ptrace_Set_SVE_VL_7024 pass
10595 13:54:59.014906 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 skip
10596 13:54:59.015024 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
10597 13:54:59.015169 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
10598 13:54:59.015292 arm64_sve-ptrace_Set_SVE_VL_7040 pass
10599 13:54:59.015412 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 skip
10600 13:54:59.015529 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
10601 13:54:59.015645 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
10602 13:54:59.015760 arm64_sve-ptrace_Set_SVE_VL_7056 pass
10603 13:54:59.019010 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 skip
10604 13:54:59.019560 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
10605 13:54:59.019775 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
10606 13:54:59.019969 arm64_sve-ptrace_Set_SVE_VL_7072 pass
10607 13:54:59.020188 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 skip
10608 13:54:59.020391 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
10609 13:54:59.020613 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
10610 13:54:59.020823 arm64_sve-ptrace_Set_SVE_VL_7088 pass
10611 13:54:59.021031 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 skip
10612 13:54:59.021273 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
10613 13:54:59.021493 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
10614 13:54:59.021643 arm64_sve-ptrace_Set_SVE_VL_7104 pass
10615 13:54:59.021821 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 skip
10616 13:54:59.021991 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
10617 13:54:59.022179 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
10618 13:54:59.022348 arm64_sve-ptrace_Set_SVE_VL_7120 pass
10619 13:54:59.022551 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 skip
10620 13:54:59.022734 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
10621 13:54:59.022877 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
10622 13:54:59.022997 arm64_sve-ptrace_Set_SVE_VL_7136 pass
10623 13:54:59.023114 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 skip
10624 13:54:59.023230 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
10625 13:54:59.023350 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
10626 13:54:59.023463 arm64_sve-ptrace_Set_SVE_VL_7152 pass
10627 13:54:59.023575 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 skip
10628 13:54:59.023718 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
10629 13:54:59.023840 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
10630 13:54:59.023954 arm64_sve-ptrace_Set_SVE_VL_7168 pass
10631 13:54:59.024069 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 skip
10632 13:54:59.026969 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
10633 13:54:59.027307 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
10634 13:54:59.027433 arm64_sve-ptrace_Set_SVE_VL_7184 pass
10635 13:54:59.027548 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 skip
10636 13:54:59.027684 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
10637 13:54:59.027802 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
10638 13:54:59.027918 arm64_sve-ptrace_Set_SVE_VL_7200 pass
10639 13:54:59.028031 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 skip
10640 13:54:59.028145 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
10641 13:54:59.028283 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
10642 13:54:59.028404 arm64_sve-ptrace_Set_SVE_VL_7216 pass
10643 13:54:59.028518 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 skip
10644 13:54:59.028631 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
10645 13:54:59.028745 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
10646 13:54:59.028858 arm64_sve-ptrace_Set_SVE_VL_7232 pass
10647 13:54:59.029006 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 skip
10648 13:54:59.029123 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
10649 13:54:59.029237 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
10650 13:54:59.029353 arm64_sve-ptrace_Set_SVE_VL_7248 pass
10651 13:54:59.029466 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 skip
10652 13:54:59.029579 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
10653 13:54:59.029711 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
10654 13:54:59.029854 arm64_sve-ptrace_Set_SVE_VL_7264 pass
10655 13:54:59.029973 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 skip
10656 13:54:59.030086 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
10657 13:54:59.030199 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
10658 13:54:59.030314 arm64_sve-ptrace_Set_SVE_VL_7280 pass
10659 13:54:59.030427 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 skip
10660 13:54:59.030567 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
10661 13:54:59.030710 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
10662 13:54:59.030861 arm64_sve-ptrace_Set_SVE_VL_7296 pass
10663 13:54:59.030991 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 skip
10664 13:54:59.031135 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
10665 13:54:59.031256 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
10666 13:54:59.038955 arm64_sve-ptrace_Set_SVE_VL_7312 pass
10667 13:54:59.039366 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 skip
10668 13:54:59.039517 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
10669 13:54:59.039654 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
10670 13:54:59.039772 arm64_sve-ptrace_Set_SVE_VL_7328 pass
10671 13:54:59.039887 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 skip
10672 13:54:59.040026 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
10673 13:54:59.040148 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
10674 13:54:59.040397 arm64_sve-ptrace_Set_SVE_VL_7344 pass
10675 13:54:59.040608 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 skip
10676 13:54:59.040775 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
10677 13:54:59.040925 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
10678 13:54:59.041084 arm64_sve-ptrace_Set_SVE_VL_7360 pass
10679 13:54:59.041248 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 skip
10680 13:54:59.041472 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
10681 13:54:59.041703 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
10682 13:54:59.041924 arm64_sve-ptrace_Set_SVE_VL_7376 pass
10683 13:54:59.042145 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 skip
10684 13:54:59.042417 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
10685 13:54:59.042563 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
10686 13:54:59.042703 arm64_sve-ptrace_Set_SVE_VL_7392 pass
10687 13:54:59.042858 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 skip
10688 13:54:59.043009 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
10689 13:54:59.043130 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
10690 13:54:59.043245 arm64_sve-ptrace_Set_SVE_VL_7408 pass
10691 13:54:59.043361 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 skip
10692 13:54:59.043475 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
10693 13:54:59.043589 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
10694 13:54:59.043706 arm64_sve-ptrace_Set_SVE_VL_7424 pass
10695 13:54:59.044121 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 skip
10696 13:54:59.044270 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
10697 13:54:59.044392 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
10698 13:54:59.046950 arm64_sve-ptrace_Set_SVE_VL_7440 pass
10699 13:54:59.047275 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 skip
10700 13:54:59.047378 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
10701 13:54:59.047477 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
10702 13:54:59.047577 arm64_sve-ptrace_Set_SVE_VL_7456 pass
10703 13:54:59.047661 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 skip
10704 13:54:59.047960 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
10705 13:54:59.048066 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
10706 13:54:59.048168 arm64_sve-ptrace_Set_SVE_VL_7472 pass
10707 13:54:59.048253 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 skip
10708 13:54:59.048351 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
10709 13:54:59.048449 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
10710 13:54:59.048546 arm64_sve-ptrace_Set_SVE_VL_7488 pass
10711 13:54:59.048837 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 skip
10712 13:54:59.048939 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
10713 13:54:59.049038 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
10714 13:54:59.049123 arm64_sve-ptrace_Set_SVE_VL_7504 pass
10715 13:54:59.062351 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 skip
10716 13:54:59.062836 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
10717 13:54:59.063060 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
10718 13:54:59.063263 arm64_sve-ptrace_Set_SVE_VL_7520 pass
10719 13:54:59.063472 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 skip
10720 13:54:59.063694 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
10721 13:54:59.063955 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
10722 13:54:59.064151 arm64_sve-ptrace_Set_SVE_VL_7536 pass
10723 13:54:59.064303 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 skip
10724 13:54:59.064469 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
10725 13:54:59.064646 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
10726 13:54:59.064771 arm64_sve-ptrace_Set_SVE_VL_7552 pass
10727 13:54:59.064887 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 skip
10728 13:54:59.065013 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
10729 13:54:59.065161 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
10730 13:54:59.065315 arm64_sve-ptrace_Set_SVE_VL_7568 pass
10731 13:54:59.065476 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 skip
10732 13:54:59.065626 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
10733 13:54:59.065842 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
10734 13:54:59.066034 arm64_sve-ptrace_Set_SVE_VL_7584 pass
10735 13:54:59.066220 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 skip
10736 13:54:59.066386 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
10737 13:54:59.066551 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
10738 13:54:59.066739 arm64_sve-ptrace_Set_SVE_VL_7600 pass
10739 13:54:59.066916 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 skip
10740 13:54:59.067045 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
10741 13:54:59.067161 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
10742 13:54:59.067303 arm64_sve-ptrace_Set_SVE_VL_7616 pass
10743 13:54:59.067424 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 skip
10744 13:54:59.067539 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
10745 13:54:59.067653 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
10746 13:54:59.067766 arm64_sve-ptrace_Set_SVE_VL_7632 pass
10747 13:54:59.067880 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 skip
10748 13:54:59.067993 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
10749 13:54:59.068105 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
10750 13:54:59.070935 arm64_sve-ptrace_Set_SVE_VL_7648 pass
10751 13:54:59.071212 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 skip
10752 13:54:59.071314 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
10753 13:54:59.071649 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
10754 13:54:59.071840 arm64_sve-ptrace_Set_SVE_VL_7664 pass
10755 13:54:59.072008 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 skip
10756 13:54:59.072184 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
10757 13:54:59.072328 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
10758 13:54:59.072467 arm64_sve-ptrace_Set_SVE_VL_7680 pass
10759 13:54:59.072618 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 skip
10760 13:54:59.072802 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
10761 13:54:59.072952 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
10762 13:54:59.073108 arm64_sve-ptrace_Set_SVE_VL_7696 pass
10763 13:54:59.073267 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 skip
10764 13:54:59.073412 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
10765 13:54:59.073572 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
10766 13:54:59.073746 arm64_sve-ptrace_Set_SVE_VL_7712 pass
10767 13:54:59.073944 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 skip
10768 13:54:59.074107 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
10769 13:54:59.074267 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
10770 13:54:59.074423 arm64_sve-ptrace_Set_SVE_VL_7728 pass
10771 13:54:59.074584 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 skip
10772 13:54:59.074757 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
10773 13:54:59.074915 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
10774 13:54:59.075035 arm64_sve-ptrace_Set_SVE_VL_7744 pass
10775 13:54:59.075150 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 skip
10776 13:54:59.075263 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
10777 13:54:59.075407 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
10778 13:54:59.075525 arm64_sve-ptrace_Set_SVE_VL_7760 pass
10779 13:54:59.075640 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 skip
10780 13:54:59.075753 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
10781 13:54:59.075868 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
10782 13:54:59.075983 arm64_sve-ptrace_Set_SVE_VL_7776 pass
10783 13:54:59.076095 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 skip
10784 13:54:59.076209 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
10785 13:54:59.078985 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
10786 13:54:59.079176 arm64_sve-ptrace_Set_SVE_VL_7792 pass
10787 13:54:59.079572 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 skip
10788 13:54:59.079740 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
10789 13:54:59.079883 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
10790 13:54:59.080029 arm64_sve-ptrace_Set_SVE_VL_7808 pass
10791 13:54:59.080162 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 skip
10792 13:54:59.080302 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
10793 13:54:59.080468 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
10794 13:54:59.080618 arm64_sve-ptrace_Set_SVE_VL_7824 pass
10795 13:54:59.080765 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 skip
10796 13:54:59.080909 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
10797 13:54:59.081067 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
10798 13:54:59.081225 arm64_sve-ptrace_Set_SVE_VL_7840 pass
10799 13:54:59.081471 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 skip
10800 13:54:59.081714 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
10801 13:54:59.081932 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
10802 13:54:59.082161 arm64_sve-ptrace_Set_SVE_VL_7856 pass
10803 13:54:59.082363 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 skip
10804 13:54:59.082564 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
10805 13:54:59.082790 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
10806 13:54:59.082968 arm64_sve-ptrace_Set_SVE_VL_7872 pass
10807 13:54:59.083092 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 skip
10808 13:54:59.083211 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
10809 13:54:59.083327 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
10810 13:54:59.083444 arm64_sve-ptrace_Set_SVE_VL_7888 pass
10811 13:54:59.083557 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 skip
10812 13:54:59.083671 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
10813 13:54:59.083784 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
10814 13:54:59.083896 arm64_sve-ptrace_Set_SVE_VL_7904 pass
10815 13:54:59.084009 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 skip
10816 13:54:59.087182 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
10817 13:54:59.087352 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
10818 13:54:59.087572 arm64_sve-ptrace_Set_SVE_VL_7920 pass
10819 13:54:59.087810 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 skip
10820 13:54:59.088090 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
10821 13:54:59.088313 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
10822 13:54:59.088500 arm64_sve-ptrace_Set_SVE_VL_7936 pass
10823 13:54:59.088671 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 skip
10824 13:54:59.088873 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
10825 13:54:59.089085 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
10826 13:54:59.089319 arm64_sve-ptrace_Set_SVE_VL_7952 pass
10827 13:54:59.089503 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 skip
10828 13:54:59.089677 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
10829 13:54:59.089812 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
10830 13:54:59.089975 arm64_sve-ptrace_Set_SVE_VL_7968 pass
10831 13:54:59.090181 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 skip
10832 13:54:59.090394 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
10833 13:54:59.090636 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
10834 13:54:59.090835 arm64_sve-ptrace_Set_SVE_VL_7984 pass
10835 13:54:59.090967 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 skip
10836 13:54:59.091083 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
10837 13:54:59.091198 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
10838 13:54:59.091339 arm64_sve-ptrace_Set_SVE_VL_8000 pass
10839 13:54:59.091462 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 skip
10840 13:54:59.091577 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
10841 13:54:59.091692 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
10842 13:54:59.091806 arm64_sve-ptrace_Set_SVE_VL_8016 pass
10843 13:54:59.095030 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 skip
10844 13:54:59.095435 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
10845 13:54:59.095535 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
10846 13:54:59.095622 arm64_sve-ptrace_Set_SVE_VL_8032 pass
10847 13:54:59.095705 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 skip
10848 13:54:59.095805 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
10849 13:54:59.095891 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
10850 13:54:59.095973 arm64_sve-ptrace_Set_SVE_VL_8048 pass
10851 13:54:59.096076 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 skip
10852 13:54:59.096178 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
10853 13:54:59.096282 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
10854 13:54:59.096585 arm64_sve-ptrace_Set_SVE_VL_8064 pass
10855 13:54:59.096689 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 skip
10856 13:54:59.096788 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
10857 13:54:59.096888 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
10858 13:54:59.097192 arm64_sve-ptrace_Set_SVE_VL_8080 pass
10859 13:54:59.097495 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 skip
10860 13:54:59.097598 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
10861 13:54:59.097705 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
10862 13:54:59.097791 arm64_sve-ptrace_Set_SVE_VL_8096 pass
10863 13:54:59.098041 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 skip
10864 13:54:59.098164 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
10865 13:54:59.098270 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
10866 13:54:59.098369 arm64_sve-ptrace_Set_SVE_VL_8112 pass
10867 13:54:59.098683 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 skip
10868 13:54:59.098786 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
10869 13:54:59.103061 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
10870 13:54:59.103383 arm64_sve-ptrace_Set_SVE_VL_8128 pass
10871 13:54:59.103486 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 skip
10872 13:54:59.103587 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
10873 13:54:59.103688 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
10874 13:54:59.103772 arm64_sve-ptrace_Set_SVE_VL_8144 pass
10875 13:54:59.114221 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 skip
10876 13:54:59.114808 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
10877 13:54:59.115010 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
10878 13:54:59.115205 arm64_sve-ptrace_Set_SVE_VL_8160 pass
10879 13:54:59.115369 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 skip
10880 13:54:59.115535 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
10881 13:54:59.115722 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
10882 13:54:59.115885 arm64_sve-ptrace_Set_SVE_VL_8176 pass
10883 13:54:59.116051 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 skip
10884 13:54:59.116211 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
10885 13:54:59.116414 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
10886 13:54:59.116580 arm64_sve-ptrace_Set_SVE_VL_8192 pass
10887 13:54:59.116739 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 skip
10888 13:54:59.116894 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
10889 13:54:59.117046 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
10890 13:54:59.117199 arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 pass
10891 13:54:59.117386 arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state pass
10892 13:54:59.117549 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set pass
10893 13:54:59.117723 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared pass
10894 13:54:59.117879 arm64_sve-ptrace_Set_Streaming_SVE_VL_16 pass
10895 13:54:59.118032 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 pass
10896 13:54:59.118220 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 pass
10897 13:54:59.118379 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 pass
10898 13:54:59.118535 arm64_sve-ptrace_Set_Streaming_SVE_VL_32 pass
10899 13:54:59.118690 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 pass
10900 13:54:59.118842 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 pass
10901 13:54:59.118960 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 pass
10902 13:54:59.119101 arm64_sve-ptrace_Set_Streaming_SVE_VL_48 pass
10903 13:54:59.119221 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 skip
10904 13:54:59.119337 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 skip
10905 13:54:59.119450 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 skip
10906 13:54:59.119566 arm64_sve-ptrace_Set_Streaming_SVE_VL_64 pass
10907 13:54:59.119680 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 pass
10908 13:54:59.119793 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 pass
10909 13:54:59.119907 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 pass
10910 13:54:59.120229 arm64_sve-ptrace_Set_Streaming_SVE_VL_80 pass
10911 13:54:59.122955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 skip
10912 13:54:59.123264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 skip
10913 13:54:59.123372 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 skip
10914 13:54:59.123487 arm64_sve-ptrace_Set_Streaming_SVE_VL_96 pass
10915 13:54:59.123576 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 skip
10916 13:54:59.123676 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 skip
10917 13:54:59.123779 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 skip
10918 13:54:59.124077 arm64_sve-ptrace_Set_Streaming_SVE_VL_112 pass
10919 13:54:59.124182 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 skip
10920 13:54:59.124285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 skip
10921 13:54:59.124374 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 skip
10922 13:54:59.124481 arm64_sve-ptrace_Set_Streaming_SVE_VL_128 pass
10923 13:54:59.124800 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 pass
10924 13:54:59.124904 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 pass
10925 13:54:59.125010 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 pass
10926 13:54:59.125119 arm64_sve-ptrace_Set_Streaming_SVE_VL_144 pass
10927 13:54:59.125213 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 skip
10928 13:54:59.125316 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 skip
10929 13:54:59.125618 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 skip
10930 13:54:59.125734 arm64_sve-ptrace_Set_Streaming_SVE_VL_160 pass
10931 13:54:59.125842 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 skip
10932 13:54:59.125951 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 skip
10933 13:54:59.126255 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 skip
10934 13:54:59.126570 arm64_sve-ptrace_Set_Streaming_SVE_VL_176 pass
10935 13:54:59.126679 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 skip
10936 13:54:59.126771 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 skip
10937 13:54:59.126878 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 skip
10938 13:54:59.126965 arm64_sve-ptrace_Set_Streaming_SVE_VL_192 pass
10939 13:54:59.131055 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 skip
10940 13:54:59.131369 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 skip
10941 13:54:59.131473 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 skip
10942 13:54:59.131580 arm64_sve-ptrace_Set_Streaming_SVE_VL_208 pass
10943 13:54:59.131683 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 skip
10944 13:54:59.131769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 skip
10945 13:54:59.131870 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 skip
10946 13:54:59.131972 arm64_sve-ptrace_Set_Streaming_SVE_VL_224 pass
10947 13:54:59.132077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 skip
10948 13:54:59.132379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 skip
10949 13:54:59.132482 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 skip
10950 13:54:59.132586 arm64_sve-ptrace_Set_Streaming_SVE_VL_240 pass
10951 13:54:59.132691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 skip
10952 13:54:59.132783 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 skip
10953 13:54:59.132889 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 skip
10954 13:54:59.132976 arm64_sve-ptrace_Set_Streaming_SVE_VL_256 pass
10955 13:54:59.133073 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 pass
10956 13:54:59.133400 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 pass
10957 13:54:59.133528 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 pass
10958 13:54:59.133621 arm64_sve-ptrace_Set_Streaming_SVE_VL_272 pass
10959 13:54:59.133746 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 skip
10960 13:54:59.133855 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
10961 13:54:59.133964 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
10962 13:54:59.134075 arm64_sve-ptrace_Set_Streaming_SVE_VL_288 pass
10963 13:54:59.134426 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 skip
10964 13:54:59.134533 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
10965 13:54:59.134638 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
10966 13:54:59.134747 arm64_sve-ptrace_Set_Streaming_SVE_VL_304 pass
10967 13:54:59.138986 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 skip
10968 13:54:59.139432 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
10969 13:54:59.139619 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
10970 13:54:59.139789 arm64_sve-ptrace_Set_Streaming_SVE_VL_320 pass
10971 13:54:59.139991 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 skip
10972 13:54:59.140165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
10973 13:54:59.140329 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
10974 13:54:59.140488 arm64_sve-ptrace_Set_Streaming_SVE_VL_336 pass
10975 13:54:59.140683 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 skip
10976 13:54:59.140849 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
10977 13:54:59.141016 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
10978 13:54:59.141178 arm64_sve-ptrace_Set_Streaming_SVE_VL_352 pass
10979 13:54:59.141333 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 skip
10980 13:54:59.141519 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
10981 13:54:59.141689 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
10982 13:54:59.141849 arm64_sve-ptrace_Set_Streaming_SVE_VL_368 pass
10983 13:54:59.142005 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 skip
10984 13:54:59.142163 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
10985 13:54:59.142319 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
10986 13:54:59.142511 arm64_sve-ptrace_Set_Streaming_SVE_VL_384 pass
10987 13:54:59.142675 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 skip
10988 13:54:59.142869 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
10989 13:54:59.143021 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
10990 13:54:59.143146 arm64_sve-ptrace_Set_Streaming_SVE_VL_400 pass
10991 13:54:59.143263 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 skip
10992 13:54:59.143379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
10993 13:54:59.143527 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
10994 13:54:59.143652 arm64_sve-ptrace_Set_Streaming_SVE_VL_416 pass
10995 13:54:59.143769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 skip
10996 13:54:59.146945 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
10997 13:54:59.147249 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
10998 13:54:59.147348 arm64_sve-ptrace_Set_Streaming_SVE_VL_432 pass
10999 13:54:59.147449 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 skip
11000 13:54:59.147547 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
11001 13:54:59.147847 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
11002 13:54:59.147975 arm64_sve-ptrace_Set_Streaming_SVE_VL_448 pass
11003 13:54:59.148072 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 skip
11004 13:54:59.148181 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
11005 13:54:59.148288 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
11006 13:54:59.148392 arm64_sve-ptrace_Set_Streaming_SVE_VL_464 pass
11007 13:54:59.148493 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 skip
11008 13:54:59.148598 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
11009 13:54:59.148894 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
11010 13:54:59.148994 arm64_sve-ptrace_Set_Streaming_SVE_VL_480 pass
11011 13:54:59.149102 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 skip
11012 13:54:59.164105 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
11013 13:54:59.164511 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
11014 13:54:59.164625 arm64_sve-ptrace_Set_Streaming_SVE_VL_496 pass
11015 13:54:59.164713 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 skip
11016 13:54:59.164798 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
11017 13:54:59.164899 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
11018 13:54:59.164987 arm64_sve-ptrace_Set_Streaming_SVE_VL_512 pass
11019 13:54:59.165093 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 skip
11020 13:54:59.165185 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
11021 13:54:59.165465 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
11022 13:54:59.165580 arm64_sve-ptrace_Set_Streaming_SVE_VL_528 pass
11023 13:54:59.165692 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 skip
11024 13:54:59.165793 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
11025 13:54:59.166136 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
11026 13:54:59.166336 arm64_sve-ptrace_Set_Streaming_SVE_VL_544 pass
11027 13:54:59.166509 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 skip
11028 13:54:59.166645 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
11029 13:54:59.166854 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
11030 13:54:59.166989 arm64_sve-ptrace_Set_Streaming_SVE_VL_560 pass
11031 13:54:59.167110 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 skip
11032 13:54:59.171258 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
11033 13:54:59.171503 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
11034 13:54:59.171766 arm64_sve-ptrace_Set_Streaming_SVE_VL_576 pass
11035 13:54:59.171997 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 skip
11036 13:54:59.172194 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
11037 13:54:59.172405 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
11038 13:54:59.172574 arm64_sve-ptrace_Set_Streaming_SVE_VL_592 pass
11039 13:54:59.172733 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 skip
11040 13:54:59.172901 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
11041 13:54:59.173074 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
11042 13:54:59.173278 arm64_sve-ptrace_Set_Streaming_SVE_VL_608 pass
11043 13:54:59.173465 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 skip
11044 13:54:59.173671 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
11045 13:54:59.173847 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
11046 13:54:59.174018 arm64_sve-ptrace_Set_Streaming_SVE_VL_624 pass
11047 13:54:59.174852 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 skip
11048 13:54:59.174960 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
11049 13:54:59.175052 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
11050 13:54:59.175143 arm64_sve-ptrace_Set_Streaming_SVE_VL_640 pass
11051 13:54:59.175233 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 skip
11052 13:54:59.175324 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
11053 13:54:59.175417 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
11054 13:54:59.175508 arm64_sve-ptrace_Set_Streaming_SVE_VL_656 pass
11055 13:54:59.175603 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 skip
11056 13:54:59.175696 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
11057 13:54:59.175788 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
11058 13:54:59.175879 arm64_sve-ptrace_Set_Streaming_SVE_VL_672 pass
11059 13:54:59.179058 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 skip
11060 13:54:59.179406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
11061 13:54:59.179510 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
11062 13:54:59.179611 arm64_sve-ptrace_Set_Streaming_SVE_VL_688 pass
11063 13:54:59.179709 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 skip
11064 13:54:59.180005 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
11065 13:54:59.180109 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
11066 13:54:59.180211 arm64_sve-ptrace_Set_Streaming_SVE_VL_704 pass
11067 13:54:59.180311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 skip
11068 13:54:59.180605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
11069 13:54:59.180696 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
11070 13:54:59.181013 arm64_sve-ptrace_Set_Streaming_SVE_VL_720 pass
11071 13:54:59.181126 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 skip
11072 13:54:59.181237 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
11073 13:54:59.181346 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
11074 13:54:59.181448 arm64_sve-ptrace_Set_Streaming_SVE_VL_736 pass
11075 13:54:59.181686 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 skip
11076 13:54:59.181794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
11077 13:54:59.181897 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
11078 13:54:59.181999 arm64_sve-ptrace_Set_Streaming_SVE_VL_752 pass
11079 13:54:59.182099 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 skip
11080 13:54:59.182395 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
11081 13:54:59.182506 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
11082 13:54:59.182597 arm64_sve-ptrace_Set_Streaming_SVE_VL_768 pass
11083 13:54:59.182699 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 skip
11084 13:54:59.182791 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
11085 13:54:59.186990 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
11086 13:54:59.187393 arm64_sve-ptrace_Set_Streaming_SVE_VL_784 pass
11087 13:54:59.187503 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 skip
11088 13:54:59.187594 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
11089 13:54:59.187945 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
11090 13:54:59.188054 arm64_sve-ptrace_Set_Streaming_SVE_VL_800 pass
11091 13:54:59.188145 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 skip
11092 13:54:59.188228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
11093 13:54:59.188328 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
11094 13:54:59.188421 arm64_sve-ptrace_Set_Streaming_SVE_VL_816 pass
11095 13:54:59.188527 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 skip
11096 13:54:59.188617 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
11097 13:54:59.188724 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
11098 13:54:59.188831 arm64_sve-ptrace_Set_Streaming_SVE_VL_832 pass
11099 13:54:59.188938 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 skip
11100 13:54:59.189264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
11101 13:54:59.189587 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
11102 13:54:59.189704 arm64_sve-ptrace_Set_Streaming_SVE_VL_848 pass
11103 13:54:59.189807 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 skip
11104 13:54:59.189899 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
11105 13:54:59.189990 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
11106 13:54:59.190095 arm64_sve-ptrace_Set_Streaming_SVE_VL_864 pass
11107 13:54:59.190187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 skip
11108 13:54:59.190292 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
11109 13:54:59.190625 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
11110 13:54:59.190733 arm64_sve-ptrace_Set_Streaming_SVE_VL_880 pass
11111 13:54:59.191028 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 skip
11112 13:54:59.195135 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
11113 13:54:59.195267 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
11114 13:54:59.195578 arm64_sve-ptrace_Set_Streaming_SVE_VL_896 pass
11115 13:54:59.195703 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 skip
11116 13:54:59.195799 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
11117 13:54:59.195907 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
11118 13:54:59.196016 arm64_sve-ptrace_Set_Streaming_SVE_VL_912 pass
11119 13:54:59.196125 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 skip
11120 13:54:59.196227 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
11121 13:54:59.196326 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
11122 13:54:59.196425 arm64_sve-ptrace_Set_Streaming_SVE_VL_928 pass
11123 13:54:59.196724 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 skip
11124 13:54:59.196845 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
11125 13:54:59.196935 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
11126 13:54:59.197271 arm64_sve-ptrace_Set_Streaming_SVE_VL_944 pass
11127 13:54:59.197426 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 skip
11128 13:54:59.197523 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
11129 13:54:59.197636 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
11130 13:54:59.197733 arm64_sve-ptrace_Set_Streaming_SVE_VL_960 pass
11131 13:54:59.197833 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 skip
11132 13:54:59.198260 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
11133 13:54:59.198463 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
11134 13:54:59.198661 arm64_sve-ptrace_Set_Streaming_SVE_VL_976 pass
11135 13:54:59.198827 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 skip
11136 13:54:59.198953 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
11137 13:54:59.199085 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
11138 13:54:59.203024 arm64_sve-ptrace_Set_Streaming_SVE_VL_992 pass
11139 13:54:59.203445 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 skip
11140 13:54:59.203550 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
11141 13:54:59.203640 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
11142 13:54:59.203742 arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 pass
11143 13:54:59.203829 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 skip
11144 13:54:59.204343 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
11145 13:54:59.204447 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
11146 13:54:59.204532 arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 pass
11147 13:54:59.204630 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 skip
11148 13:54:59.215958 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
11149 13:54:59.216112 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
11150 13:54:59.216297 arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 pass
11151 13:54:59.216422 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 skip
11152 13:54:59.216717 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
11153 13:54:59.216824 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
11154 13:54:59.216913 arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 pass
11155 13:54:59.217015 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 skip
11156 13:54:59.217103 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
11157 13:54:59.217188 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
11158 13:54:59.217287 arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 pass
11159 13:54:59.217374 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 skip
11160 13:54:59.217473 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
11161 13:54:59.217767 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
11162 13:54:59.217872 arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 pass
11163 13:54:59.218066 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 skip
11164 13:54:59.218170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
11165 13:54:59.218479 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
11166 13:54:59.218585 arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 pass
11167 13:54:59.218887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 skip
11168 13:54:59.218996 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
11169 13:54:59.223182 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
11170 13:54:59.223301 arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 pass
11171 13:54:59.223411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 skip
11172 13:54:59.223521 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
11173 13:54:59.223636 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
11174 13:54:59.223744 arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 pass
11175 13:54:59.223847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 skip
11176 13:54:59.224066 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
11177 13:54:59.224190 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
11178 13:54:59.224301 arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 pass
11179 13:54:59.224475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 skip
11180 13:54:59.224599 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
11181 13:54:59.224908 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
11182 13:54:59.225032 arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 pass
11183 13:54:59.225144 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 skip
11184 13:54:59.225258 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
11185 13:54:59.225366 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
11186 13:54:59.225665 arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 pass
11187 13:54:59.225770 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 skip
11188 13:54:59.225883 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
11189 13:54:59.225975 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
11190 13:54:59.226060 arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 pass
11191 13:54:59.226161 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 skip
11192 13:54:59.226250 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
11193 13:54:59.226357 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
11194 13:54:59.226451 arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 pass
11195 13:54:59.226560 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 skip
11196 13:54:59.226672 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
11197 13:54:59.226782 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
11198 13:54:59.230965 arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 pass
11199 13:54:59.231275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 skip
11200 13:54:59.231381 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
11201 13:54:59.231472 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
11202 13:54:59.231578 arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 pass
11203 13:54:59.231669 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 skip
11204 13:54:59.231970 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
11205 13:54:59.232079 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
11206 13:54:59.232175 arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 pass
11207 13:54:59.232282 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 skip
11208 13:54:59.232375 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
11209 13:54:59.232485 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
11210 13:54:59.232583 arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 pass
11211 13:54:59.232917 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 skip
11212 13:54:59.233024 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
11213 13:54:59.233131 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
11214 13:54:59.233249 arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 pass
11215 13:54:59.233517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 skip
11216 13:54:59.233908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
11217 13:54:59.234067 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
11218 13:54:59.234160 arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 pass
11219 13:54:59.234249 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 skip
11220 13:54:59.234355 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
11221 13:54:59.234462 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
11222 13:54:59.234554 arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 pass
11223 13:54:59.234661 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 skip
11224 13:54:59.234768 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
11225 13:54:59.238962 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
11226 13:54:59.239378 arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 pass
11227 13:54:59.239484 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 skip
11228 13:54:59.239585 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
11229 13:54:59.239672 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
11230 13:54:59.239770 arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 pass
11231 13:54:59.239869 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 skip
11232 13:54:59.240178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
11233 13:54:59.240296 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
11234 13:54:59.240398 arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 pass
11235 13:54:59.240697 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 skip
11236 13:54:59.240815 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
11237 13:54:59.240925 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
11238 13:54:59.241239 arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 pass
11239 13:54:59.241332 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 skip
11240 13:54:59.241602 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
11241 13:54:59.241704 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
11242 13:54:59.241805 arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 pass
11243 13:54:59.241895 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 skip
11244 13:54:59.242002 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
11245 13:54:59.242287 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
11246 13:54:59.242378 arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 pass
11247 13:54:59.242477 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 skip
11248 13:54:59.242776 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
11249 13:54:59.246980 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
11250 13:54:59.247090 arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 pass
11251 13:54:59.247368 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 skip
11252 13:54:59.247461 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
11253 13:54:59.247562 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
11254 13:54:59.247649 arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 pass
11255 13:54:59.247935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 skip
11256 13:54:59.248027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
11257 13:54:59.248127 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
11258 13:54:59.248228 arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 pass
11259 13:54:59.248512 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 skip
11260 13:54:59.248601 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
11261 13:54:59.248886 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
11262 13:54:59.248975 arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 pass
11263 13:54:59.249061 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 skip
11264 13:54:59.249158 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
11265 13:54:59.249259 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
11266 13:54:59.249561 arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 pass
11267 13:54:59.249659 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 skip
11268 13:54:59.249766 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
11269 13:54:59.250064 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
11270 13:54:59.250166 arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 pass
11271 13:54:59.250266 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 skip
11272 13:54:59.250383 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
11273 13:54:59.250822 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
11274 13:54:59.251005 arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 pass
11275 13:54:59.254968 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 skip
11276 13:54:59.255506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
11277 13:54:59.255705 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
11278 13:54:59.255901 arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 pass
11279 13:54:59.256089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 skip
11280 13:54:59.256228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
11281 13:54:59.256372 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
11282 13:54:59.266561 arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 pass
11283 13:54:59.267019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 skip
11284 13:54:59.267124 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
11285 13:54:59.267227 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
11286 13:54:59.267329 arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 pass
11287 13:54:59.267629 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 skip
11288 13:54:59.267732 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
11289 13:54:59.267833 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
11290 13:54:59.267934 arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 pass
11291 13:54:59.268219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 skip
11292 13:54:59.268308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
11293 13:54:59.268604 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
11294 13:54:59.268721 arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 pass
11295 13:54:59.268813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 skip
11296 13:54:59.268910 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
11297 13:54:59.269208 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
11298 13:54:59.269311 arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 pass
11299 13:54:59.269417 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 skip
11300 13:54:59.269695 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
11301 13:54:59.269819 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
11302 13:54:59.269971 arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 pass
11303 13:54:59.270082 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 skip
11304 13:54:59.270393 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
11305 13:54:59.270495 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
11306 13:54:59.270794 arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 pass
11307 13:54:59.270897 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 skip
11308 13:54:59.274978 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
11309 13:54:59.275329 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
11310 13:54:59.275435 arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 pass
11311 13:54:59.275536 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 skip
11312 13:54:59.275635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
11313 13:54:59.275974 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
11314 13:54:59.276080 arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 pass
11315 13:54:59.276185 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 skip
11316 13:54:59.276288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
11317 13:54:59.276612 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
11318 13:54:59.276734 arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 pass
11319 13:54:59.276847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 skip
11320 13:54:59.277148 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
11321 13:54:59.277253 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
11322 13:54:59.277362 arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 pass
11323 13:54:59.277468 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 skip
11324 13:54:59.277563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
11325 13:54:59.277680 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
11326 13:54:59.277788 arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 pass
11327 13:54:59.278016 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 skip
11328 13:54:59.278140 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
11329 13:54:59.278243 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
11330 13:54:59.278344 arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 pass
11331 13:54:59.278446 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 skip
11332 13:54:59.278743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
11333 13:54:59.282951 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
11334 13:54:59.283290 arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 pass
11335 13:54:59.283401 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 skip
11336 13:54:59.283490 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
11337 13:54:59.283598 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
11338 13:54:59.283693 arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 pass
11339 13:54:59.283800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 skip
11340 13:54:59.283890 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
11341 13:54:59.283989 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
11342 13:54:59.284091 arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 pass
11343 13:54:59.284204 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 skip
11344 13:54:59.284504 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
11345 13:54:59.284612 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
11346 13:54:59.284715 arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 pass
11347 13:54:59.284811 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 skip
11348 13:54:59.285099 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
11349 13:54:59.285209 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
11350 13:54:59.285304 arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 pass
11351 13:54:59.285611 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 skip
11352 13:54:59.285743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
11353 13:54:59.285851 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
11354 13:54:59.285958 arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 pass
11355 13:54:59.286309 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 skip
11356 13:54:59.286416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
11357 13:54:59.286518 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
11358 13:54:59.286621 arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 pass
11359 13:54:59.286907 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 skip
11360 13:54:59.291003 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
11361 13:54:59.291341 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
11362 13:54:59.291445 arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 pass
11363 13:54:59.291548 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 skip
11364 13:54:59.291852 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
11365 13:54:59.291961 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
11366 13:54:59.292068 arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 pass
11367 13:54:59.292169 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 skip
11368 13:54:59.292257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
11369 13:54:59.292358 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
11370 13:54:59.292459 arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 pass
11371 13:54:59.292758 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 skip
11372 13:54:59.292866 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
11373 13:54:59.292971 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
11374 13:54:59.293301 arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 pass
11375 13:54:59.293405 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 skip
11376 13:54:59.293509 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
11377 13:54:59.293613 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
11378 13:54:59.293712 arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 pass
11379 13:54:59.294075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 skip
11380 13:54:59.294180 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
11381 13:54:59.294268 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
11382 13:54:59.294369 arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 pass
11383 13:54:59.294461 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 skip
11384 13:54:59.294562 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
11385 13:54:59.294665 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
11386 13:54:59.294766 arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 pass
11387 13:54:59.299185 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 skip
11388 13:54:59.299387 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
11389 13:54:59.299564 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
11390 13:54:59.299768 arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 pass
11391 13:54:59.299975 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 skip
11392 13:54:59.300185 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
11393 13:54:59.300352 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
11394 13:54:59.300507 arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 pass
11395 13:54:59.300662 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 skip
11396 13:54:59.300819 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
11397 13:54:59.301005 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
11398 13:54:59.301151 arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 pass
11399 13:54:59.301303 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 skip
11400 13:54:59.301452 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
11401 13:54:59.301604 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
11402 13:54:59.301804 arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 pass
11403 13:54:59.301964 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 skip
11404 13:54:59.302120 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
11405 13:54:59.302273 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
11406 13:54:59.302428 arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 pass
11407 13:54:59.302583 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 skip
11408 13:54:59.302768 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
11409 13:54:59.302909 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
11410 13:54:59.303024 arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 pass
11411 13:54:59.303138 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 skip
11412 13:54:59.303254 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
11413 13:54:59.303368 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
11414 13:54:59.303482 arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 pass
11415 13:54:59.306946 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 skip
11416 13:54:59.317501 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
11417 13:54:59.318007 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
11418 13:54:59.318199 arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 pass
11419 13:54:59.318370 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 skip
11420 13:54:59.318547 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
11421 13:54:59.318741 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
11422 13:54:59.318904 arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 pass
11423 13:54:59.319103 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 skip
11424 13:54:59.319271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
11425 13:54:59.319426 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
11426 13:54:59.319620 arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 pass
11427 13:54:59.319791 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 skip
11428 13:54:59.319952 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
11429 13:54:59.320113 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
11430 13:54:59.320280 arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 pass
11431 13:54:59.320470 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 skip
11432 13:54:59.320623 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
11433 13:54:59.320770 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
11434 13:54:59.320926 arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 pass
11435 13:54:59.321091 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 skip
11436 13:54:59.321271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
11437 13:54:59.321473 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
11438 13:54:59.321641 arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 pass
11439 13:54:59.322498 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 skip
11440 13:54:59.322708 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
11441 13:54:59.322909 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
11442 13:54:59.323052 arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 pass
11443 13:54:59.323172 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 skip
11444 13:54:59.323290 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
11445 13:54:59.323406 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
11446 13:54:59.323522 arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 pass
11447 13:54:59.323636 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 skip
11448 13:54:59.323751 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
11449 13:54:59.324090 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
11450 13:54:59.324221 arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 pass
11451 13:54:59.324340 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 skip
11452 13:54:59.324456 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
11453 13:54:59.324574 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
11454 13:54:59.324689 arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 pass
11455 13:54:59.324805 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 skip
11456 13:54:59.324923 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
11457 13:54:59.325039 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
11458 13:54:59.326941 arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 pass
11459 13:54:59.327326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 skip
11460 13:54:59.327516 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
11461 13:54:59.327708 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
11462 13:54:59.327864 arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 pass
11463 13:54:59.328016 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 skip
11464 13:54:59.328207 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
11465 13:54:59.328376 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
11466 13:54:59.328581 arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 pass
11467 13:54:59.328760 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 skip
11468 13:54:59.328961 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
11469 13:54:59.329112 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
11470 13:54:59.329285 arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 pass
11471 13:54:59.329451 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 skip
11472 13:54:59.329597 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
11473 13:54:59.329792 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
11474 13:54:59.330032 arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 pass
11475 13:54:59.330215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 skip
11476 13:54:59.330372 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
11477 13:54:59.330561 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
11478 13:54:59.330727 arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 pass
11479 13:54:59.330871 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 skip
11480 13:54:59.330998 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
11481 13:54:59.331120 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
11482 13:54:59.331235 arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 pass
11483 13:54:59.331381 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 skip
11484 13:54:59.331507 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
11485 13:54:59.331625 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
11486 13:54:59.331742 arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 pass
11487 13:54:59.331858 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 skip
11488 13:54:59.331976 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
11489 13:54:59.335059 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
11490 13:54:59.335437 arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 pass
11491 13:54:59.335592 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 skip
11492 13:54:59.335745 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
11493 13:54:59.335907 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
11494 13:54:59.336067 arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 pass
11495 13:54:59.336201 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 skip
11496 13:54:59.336350 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
11497 13:54:59.336482 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
11498 13:54:59.336635 arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 pass
11499 13:54:59.336766 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 skip
11500 13:54:59.336917 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
11501 13:54:59.337071 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
11502 13:54:59.337205 arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 pass
11503 13:54:59.337356 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 skip
11504 13:54:59.337512 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
11505 13:54:59.337681 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
11506 13:54:59.337839 arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 pass
11507 13:54:59.338018 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 skip
11508 13:54:59.338208 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
11509 13:54:59.338375 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
11510 13:54:59.338634 arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 pass
11511 13:54:59.338859 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 skip
11512 13:54:59.343050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
11513 13:54:59.343783 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
11514 13:54:59.343986 arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 pass
11515 13:54:59.344147 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 skip
11516 13:54:59.344309 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
11517 13:54:59.344513 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
11518 13:54:59.344713 arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 pass
11519 13:54:59.344926 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 skip
11520 13:54:59.345138 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
11521 13:54:59.345349 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
11522 13:54:59.345613 arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 pass
11523 13:54:59.345847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 skip
11524 13:54:59.346079 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
11525 13:54:59.346280 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
11526 13:54:59.346460 arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 pass
11527 13:54:59.346629 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 skip
11528 13:54:59.346880 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
11529 13:54:59.347051 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
11530 13:54:59.347181 arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 pass
11531 13:54:59.347296 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 skip
11532 13:54:59.347410 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
11533 13:54:59.347524 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
11534 13:54:59.347639 arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 pass
11535 13:54:59.351018 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 skip
11536 13:54:59.351536 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
11537 13:54:59.351743 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
11538 13:54:59.351980 arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 pass
11539 13:54:59.352206 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 skip
11540 13:54:59.352406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
11541 13:54:59.352563 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
11542 13:54:59.352714 arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 pass
11543 13:54:59.352889 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 skip
11544 13:54:59.353050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
11545 13:54:59.353216 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
11546 13:54:59.353384 arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 pass
11547 13:54:59.353506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 skip
11548 13:54:59.353620 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
11549 13:54:59.353829 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
11550 13:54:59.373402 arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 pass
11551 13:54:59.373538 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 skip
11552 13:54:59.373839 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
11553 13:54:59.373936 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
11554 13:54:59.374022 arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 pass
11555 13:54:59.374119 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 skip
11556 13:54:59.374221 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
11557 13:54:59.374529 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
11558 13:54:59.374637 arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 pass
11559 13:54:59.374741 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 skip
11560 13:54:59.374828 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
11561 13:54:59.375164 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
11562 13:54:59.375273 arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 pass
11563 13:54:59.375373 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 skip
11564 13:54:59.375699 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
11565 13:54:59.375822 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
11566 13:54:59.375929 arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 pass
11567 13:54:59.376040 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 skip
11568 13:54:59.376339 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
11569 13:54:59.376657 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
11570 13:54:59.376764 arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 pass
11571 13:54:59.377075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 skip
11572 13:54:59.377188 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
11573 13:54:59.377595 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
11574 13:54:59.377708 arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 pass
11575 13:54:59.377794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 skip
11576 13:54:59.377892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
11577 13:54:59.377989 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
11578 13:54:59.378302 arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 pass
11579 13:54:59.378613 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 skip
11580 13:54:59.378722 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
11581 13:54:59.378829 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
11582 13:54:59.378920 arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 pass
11583 13:54:59.383166 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 skip
11584 13:54:59.383415 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
11585 13:54:59.383644 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
11586 13:54:59.383909 arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 pass
11587 13:54:59.384093 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 skip
11588 13:54:59.384265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
11589 13:54:59.384447 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
11590 13:54:59.384595 arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 pass
11591 13:54:59.384778 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 skip
11592 13:54:59.385206 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
11593 13:54:59.385313 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
11594 13:54:59.385420 arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 pass
11595 13:54:59.385507 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 skip
11596 13:54:59.385591 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
11597 13:54:59.385682 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
11598 13:54:59.385768 arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 pass
11599 13:54:59.385869 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 skip
11600 13:54:59.385955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
11601 13:54:59.386043 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
11602 13:54:59.386143 arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 pass
11603 13:54:59.386456 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 skip
11604 13:54:59.386559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
11605 13:54:59.386661 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
11606 13:54:59.386763 arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 pass
11607 13:54:59.390977 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 skip
11608 13:54:59.391290 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
11609 13:54:59.391401 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
11610 13:54:59.391508 arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 pass
11611 13:54:59.391594 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 skip
11612 13:54:59.391692 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
11613 13:54:59.391790 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
11614 13:54:59.391889 arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 pass
11615 13:54:59.391989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 skip
11616 13:54:59.392289 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
11617 13:54:59.392410 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
11618 13:54:59.392511 arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 pass
11619 13:54:59.392609 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 skip
11620 13:54:59.392706 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
11621 13:54:59.393114 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
11622 13:54:59.393219 arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 pass
11623 13:54:59.393361 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 skip
11624 13:54:59.393461 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
11625 13:54:59.397704 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
11626 13:54:59.397815 arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 pass
11627 13:54:59.397900 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 skip
11628 13:54:59.397984 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
11629 13:54:59.398072 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
11630 13:54:59.398153 arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 pass
11631 13:54:59.398235 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 skip
11632 13:54:59.398317 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
11633 13:54:59.398400 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
11634 13:54:59.399268 arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 pass
11635 13:54:59.399505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 skip
11636 13:54:59.399687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
11637 13:54:59.400193 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
11638 13:54:59.400391 arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 pass
11639 13:54:59.400559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 skip
11640 13:54:59.400717 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
11641 13:54:59.400934 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
11642 13:54:59.401153 arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 pass
11643 13:54:59.401391 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 skip
11644 13:54:59.401612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
11645 13:54:59.401874 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
11646 13:54:59.402116 arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 pass
11647 13:54:59.402314 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 skip
11648 13:54:59.402580 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
11649 13:54:59.402779 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
11650 13:54:59.402914 arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 pass
11651 13:54:59.403030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 skip
11652 13:54:59.403146 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
11653 13:54:59.403260 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
11654 13:54:59.403374 arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 pass
11655 13:54:59.403487 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 skip
11656 13:54:59.403600 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
11657 13:54:59.403714 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
11658 13:54:59.403857 arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 pass
11659 13:54:59.403978 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 skip
11660 13:54:59.404092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
11661 13:54:59.407213 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
11662 13:54:59.407437 arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 pass
11663 13:54:59.407611 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 skip
11664 13:54:59.407806 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
11665 13:54:59.407977 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
11666 13:54:59.408144 arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 pass
11667 13:54:59.408329 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 skip
11668 13:54:59.408501 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
11669 13:54:59.408674 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
11670 13:54:59.408849 arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 pass
11671 13:54:59.409052 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 skip
11672 13:54:59.409208 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
11673 13:54:59.409372 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
11674 13:54:59.409527 arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 pass
11675 13:54:59.409706 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 skip
11676 13:54:59.409930 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
11677 13:54:59.410090 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
11678 13:54:59.410214 arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 pass
11679 13:54:59.410383 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 skip
11680 13:54:59.410533 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
11681 13:54:59.410651 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
11682 13:54:59.410764 arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 pass
11683 13:54:59.410876 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 skip
11684 13:54:59.424134 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
11685 13:54:59.424445 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
11686 13:54:59.424663 arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 pass
11687 13:54:59.425197 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 skip
11688 13:54:59.425382 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
11689 13:54:59.425525 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
11690 13:54:59.425692 arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 pass
11691 13:54:59.425865 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 skip
11692 13:54:59.426005 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
11693 13:54:59.426156 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
11694 13:54:59.426345 arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 pass
11695 13:54:59.426512 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 skip
11696 13:54:59.426679 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
11697 13:54:59.426833 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
11698 13:54:59.426952 arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 pass
11699 13:54:59.427069 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 skip
11700 13:54:59.427182 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
11701 13:54:59.427294 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
11702 13:54:59.427435 arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 pass
11703 13:54:59.427556 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 skip
11704 13:54:59.427670 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
11705 13:54:59.431019 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
11706 13:54:59.431225 arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 pass
11707 13:54:59.431585 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 skip
11708 13:54:59.431687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
11709 13:54:59.431775 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
11710 13:54:59.431874 arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 pass
11711 13:54:59.431961 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 skip
11712 13:54:59.432061 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
11713 13:54:59.432162 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
11714 13:54:59.432461 arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 pass
11715 13:54:59.432561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 skip
11716 13:54:59.432669 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
11717 13:54:59.432968 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
11718 13:54:59.433073 arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 pass
11719 13:54:59.433191 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 skip
11720 13:54:59.433487 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
11721 13:54:59.433581 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
11722 13:54:59.433676 arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 pass
11723 13:54:59.433796 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 skip
11724 13:54:59.433915 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
11725 13:54:59.434221 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
11726 13:54:59.434312 arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 pass
11727 13:54:59.434430 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 skip
11728 13:54:59.434758 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
11729 13:54:59.438959 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
11730 13:54:59.439269 arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 pass
11731 13:54:59.439371 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 skip
11732 13:54:59.439471 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
11733 13:54:59.439819 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
11734 13:54:59.439922 arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 pass
11735 13:54:59.440026 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 skip
11736 13:54:59.440318 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
11737 13:54:59.440417 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
11738 13:54:59.440516 arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 pass
11739 13:54:59.440613 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 skip
11740 13:54:59.440906 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
11741 13:54:59.441020 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
11742 13:54:59.441129 arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 pass
11743 13:54:59.441416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 skip
11744 13:54:59.441516 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
11745 13:54:59.441615 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
11746 13:54:59.441723 arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 pass
11747 13:54:59.442058 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 skip
11748 13:54:59.442174 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
11749 13:54:59.442462 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
11750 13:54:59.442557 arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 pass
11751 13:54:59.442687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 skip
11752 13:54:59.442810 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
11753 13:54:59.447147 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
11754 13:54:59.447249 arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 pass
11755 13:54:59.447350 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 skip
11756 13:54:59.447649 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
11757 13:54:59.447743 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
11758 13:54:59.447841 arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 pass
11759 13:54:59.448154 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 skip
11760 13:54:59.448258 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
11761 13:54:59.448356 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
11762 13:54:59.448641 arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 pass
11763 13:54:59.448732 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 skip
11764 13:54:59.449027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
11765 13:54:59.449143 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
11766 13:54:59.449448 arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 pass
11767 13:54:59.449540 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 skip
11768 13:54:59.449632 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
11769 13:54:59.449742 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
11770 13:54:59.449830 arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 pass
11771 13:54:59.449931 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 skip
11772 13:54:59.450027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
11773 13:54:59.450320 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
11774 13:54:59.450418 arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 pass
11775 13:54:59.450510 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 skip
11776 13:54:59.450803 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
11777 13:54:59.454924 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
11778 13:54:59.455249 arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 pass
11779 13:54:59.455334 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 skip
11780 13:54:59.455414 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
11781 13:54:59.455495 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
11782 13:54:59.455571 arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 pass
11783 13:54:59.455834 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 skip
11784 13:54:59.455947 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
11785 13:54:59.456061 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
11786 13:54:59.456167 arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 pass
11787 13:54:59.456287 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 skip
11788 13:54:59.456589 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
11789 13:54:59.456831 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
11790 13:54:59.457026 arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 pass
11791 13:54:59.457205 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 skip
11792 13:54:59.457371 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
11793 13:54:59.457568 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
11794 13:54:59.457750 arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 pass
11795 13:54:59.457995 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 skip
11796 13:54:59.458201 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
11797 13:54:59.458406 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
11798 13:54:59.458607 arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 pass
11799 13:54:59.458850 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 skip
11800 13:54:59.458990 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
11801 13:54:59.459107 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
11802 13:54:59.459222 arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 pass
11803 13:54:59.459334 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 skip
11804 13:54:59.459449 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
11805 13:54:59.463117 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
11806 13:54:59.463224 arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 pass
11807 13:54:59.463330 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 skip
11808 13:54:59.463425 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
11809 13:54:59.463682 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
11810 13:54:59.463793 arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 pass
11811 13:54:59.463891 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 skip
11812 13:54:59.464259 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
11813 13:54:59.464349 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
11814 13:54:59.464447 arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 pass
11815 13:54:59.464785 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 skip
11816 13:54:59.464973 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
11817 13:54:59.465123 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
11818 13:54:59.475338 arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 pass
11819 13:54:59.475619 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 skip
11820 13:54:59.475990 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
11821 13:54:59.476092 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
11822 13:54:59.476180 arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 pass
11823 13:54:59.476264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 skip
11824 13:54:59.476349 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
11825 13:54:59.476447 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
11826 13:54:59.476533 arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 pass
11827 13:54:59.476634 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 skip
11828 13:54:59.476722 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
11829 13:54:59.476823 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
11830 13:54:59.477126 arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 pass
11831 13:54:59.477233 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 skip
11832 13:54:59.477334 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
11833 13:54:59.477629 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
11834 13:54:59.477729 arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 pass
11835 13:54:59.477829 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 skip
11836 13:54:59.478138 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
11837 13:54:59.478253 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
11838 13:54:59.478355 arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 pass
11839 13:54:59.478662 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 skip
11840 13:54:59.478784 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
11841 13:54:59.482958 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
11842 13:54:59.483062 arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 pass
11843 13:54:59.483390 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 skip
11844 13:54:59.483584 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
11845 13:54:59.483780 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
11846 13:54:59.483952 arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 pass
11847 13:54:59.484111 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 skip
11848 13:54:59.484331 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
11849 13:54:59.484548 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
11850 13:54:59.484735 arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 pass
11851 13:54:59.484906 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 skip
11852 13:54:59.485140 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
11853 13:54:59.485373 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
11854 13:54:59.485536 arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 pass
11855 13:54:59.485699 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 skip
11856 13:54:59.485905 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
11857 13:54:59.486081 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
11858 13:54:59.486231 arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 pass
11859 13:54:59.486386 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 skip
11860 13:54:59.486547 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
11861 13:54:59.486718 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
11862 13:54:59.486907 arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 pass
11863 13:54:59.487075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 skip
11864 13:54:59.487201 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
11865 13:54:59.487317 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
11866 13:54:59.487431 arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 pass
11867 13:54:59.487544 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 skip
11868 13:54:59.490946 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
11869 13:54:59.491378 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
11870 13:54:59.491573 arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 pass
11871 13:54:59.491735 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 skip
11872 13:54:59.491924 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
11873 13:54:59.492081 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
11874 13:54:59.492241 arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 pass
11875 13:54:59.492430 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 skip
11876 13:54:59.492597 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
11877 13:54:59.492752 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
11878 13:54:59.492885 arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 pass
11879 13:54:59.493075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 skip
11880 13:54:59.493243 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
11881 13:54:59.493402 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
11882 13:54:59.493565 arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 pass
11883 13:54:59.493737 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 skip
11884 13:54:59.493935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
11885 13:54:59.494101 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
11886 13:54:59.494261 arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 pass
11887 13:54:59.494385 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 skip
11888 13:54:59.494578 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
11889 13:54:59.494739 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
11890 13:54:59.494886 arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 pass
11891 13:54:59.495004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 skip
11892 13:54:59.495117 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
11893 13:54:59.495232 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
11894 13:54:59.495371 arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 pass
11895 13:54:59.501735 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 skip
11896 13:54:59.501985 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
11897 13:54:59.502156 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
11898 13:54:59.502317 arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 pass
11899 13:54:59.502479 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 skip
11900 13:54:59.502651 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
11901 13:54:59.502818 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
11902 13:54:59.502980 arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 pass
11903 13:54:59.503135 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 skip
11904 13:54:59.503258 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
11905 13:54:59.503377 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
11906 13:54:59.503490 arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 pass
11907 13:54:59.503605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 skip
11908 13:54:59.503720 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
11909 13:54:59.503834 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
11910 13:54:59.503947 arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 pass
11911 13:54:59.504060 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 skip
11912 13:54:59.504173 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
11913 13:54:59.504287 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
11914 13:54:59.504400 arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 pass
11915 13:54:59.504512 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 skip
11916 13:54:59.504625 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
11917 13:54:59.505320 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
11918 13:54:59.505489 arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 pass
11919 13:54:59.505622 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 skip
11920 13:54:59.505818 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
11921 13:54:59.506012 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
11922 13:54:59.506224 arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 pass
11923 13:54:59.506442 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 skip
11924 13:54:59.507216 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
11925 13:54:59.507430 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
11926 13:54:59.508170 arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 pass
11927 13:54:59.508384 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 skip
11928 13:54:59.508566 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
11929 13:54:59.508744 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
11930 13:54:59.508911 arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 pass
11931 13:54:59.509528 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 skip
11932 13:54:59.509758 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
11933 13:54:59.509934 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
11934 13:54:59.510089 arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 pass
11935 13:54:59.510240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 skip
11936 13:54:59.510391 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
11937 13:54:59.510531 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
11938 13:54:59.510668 arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 pass
11939 13:54:59.510840 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 skip
11940 13:54:59.510979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
11941 13:54:59.511097 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
11942 13:54:59.511235 arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 pass
11943 13:54:59.511356 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 skip
11944 13:54:59.511453 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
11945 13:54:59.511541 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
11946 13:54:59.511649 arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 pass
11947 13:54:59.515198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 skip
11948 13:54:59.515687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
11949 13:54:59.515850 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
11950 13:54:59.515989 arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 pass
11951 13:54:59.516127 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 skip
11952 13:54:59.533974 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
11953 13:54:59.534406 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
11954 13:54:59.534508 arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 pass
11955 13:54:59.534618 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 skip
11956 13:54:59.534740 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
11957 13:54:59.534833 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
11958 13:54:59.534923 arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 pass
11959 13:54:59.535236 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 skip
11960 13:54:59.535339 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
11961 13:54:59.535461 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
11962 13:54:59.535558 arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 pass
11963 13:54:59.535647 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 skip
11964 13:54:59.535743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
11965 13:54:59.535824 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
11966 13:54:59.535939 arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 pass
11967 13:54:59.536041 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 skip
11968 13:54:59.536139 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
11969 13:54:59.536234 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
11970 13:54:59.536330 arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 pass
11971 13:54:59.536428 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 skip
11972 13:54:59.536513 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
11973 13:54:59.536604 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
11974 13:54:59.536725 arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 pass
11975 13:54:59.536830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 skip
11976 13:54:59.536952 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
11977 13:54:59.537056 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
11978 13:54:59.537179 arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 pass
11979 13:54:59.537293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 skip
11980 13:54:59.537414 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
11981 13:54:59.537500 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
11982 13:54:59.537583 arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 pass
11983 13:54:59.537684 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 skip
11984 13:54:59.538045 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
11985 13:54:59.538152 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
11986 13:54:59.538450 arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 pass
11987 13:54:59.538558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 skip
11988 13:54:59.538641 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
11989 13:54:59.538721 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
11990 13:54:59.538799 arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 pass
11991 13:54:59.538875 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 skip
11992 13:54:59.538974 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
11993 13:54:59.539056 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
11994 13:54:59.542905 arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 pass
11995 13:54:59.543224 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 skip
11996 13:54:59.543331 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
11997 13:54:59.543451 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
11998 13:54:59.543561 arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 pass
11999 13:54:59.543642 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 skip
12000 13:54:59.543754 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
12001 13:54:59.544045 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
12002 13:54:59.544159 arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 pass
12003 13:54:59.544285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 skip
12004 13:54:59.544378 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
12005 13:54:59.544690 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
12006 13:54:59.544780 arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 pass
12007 13:54:59.544902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 skip
12008 13:54:59.545008 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
12009 13:54:59.545100 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
12010 13:54:59.545375 arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 pass
12011 13:54:59.545469 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 skip
12012 13:54:59.545581 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
12013 13:54:59.545693 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
12014 13:54:59.545804 arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 pass
12015 13:54:59.546103 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 skip
12016 13:54:59.546204 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
12017 13:54:59.546297 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
12018 13:54:59.546376 arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 pass
12019 13:54:59.546530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 skip
12020 13:54:59.546644 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
12021 13:54:59.550905 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
12022 13:54:59.551246 arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 pass
12023 13:54:59.551341 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 skip
12024 13:54:59.551437 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
12025 13:54:59.551723 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
12026 13:54:59.551823 arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 pass
12027 13:54:59.551918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 skip
12028 13:54:59.551991 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
12029 13:54:59.552078 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
12030 13:54:59.552171 arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 pass
12031 13:54:59.552450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 skip
12032 13:54:59.552545 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
12033 13:54:59.552642 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
12034 13:54:59.552750 arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 pass
12035 13:54:59.552861 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 skip
12036 13:54:59.553131 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
12037 13:54:59.553213 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
12038 13:54:59.553467 arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 pass
12039 13:54:59.553537 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 skip
12040 13:54:59.553625 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
12041 13:54:59.554061 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
12042 13:54:59.554131 arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 pass
12043 13:54:59.554207 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 skip
12044 13:54:59.554456 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
12045 13:54:59.554549 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
12046 13:54:59.554646 arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 pass
12047 13:54:59.554905 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 skip
12048 13:54:59.558965 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
12049 13:54:59.559221 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
12050 13:54:59.559436 arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 pass
12051 13:54:59.559599 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 skip
12052 13:54:59.559780 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
12053 13:54:59.559948 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
12054 13:54:59.560086 arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 pass
12055 13:54:59.560259 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 skip
12056 13:54:59.560396 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
12057 13:54:59.560568 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
12058 13:54:59.560704 arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 pass
12059 13:54:59.560878 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 skip
12060 13:54:59.561231 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
12061 13:54:59.561583 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
12062 13:54:59.561732 arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 pass
12063 13:54:59.561878 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 skip
12064 13:54:59.562021 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
12065 13:54:59.562163 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
12066 13:54:59.562343 arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 pass
12067 13:54:59.562477 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 skip
12068 13:54:59.562619 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
12069 13:54:59.562762 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
12070 13:54:59.562903 arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 pass
12071 13:54:59.563045 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 skip
12072 13:54:59.563221 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
12073 13:54:59.563357 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
12074 13:54:59.563500 arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 pass
12075 13:54:59.566932 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 skip
12076 13:54:59.567278 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
12077 13:54:59.567437 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
12078 13:54:59.567578 arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 pass
12079 13:54:59.567751 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 skip
12080 13:54:59.567914 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
12081 13:54:59.568049 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
12082 13:54:59.568221 arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 pass
12083 13:54:59.568388 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 skip
12084 13:54:59.568737 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
12085 13:54:59.568874 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
12086 13:54:59.582300 arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 pass
12087 13:54:59.582728 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 skip
12088 13:54:59.582889 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
12089 13:54:59.583048 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
12090 13:54:59.583241 arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 pass
12091 13:54:59.583387 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 skip
12092 13:54:59.583612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
12093 13:54:59.583777 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
12094 13:54:59.583929 arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 pass
12095 13:54:59.584185 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 skip
12096 13:54:59.584378 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
12097 13:54:59.584584 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
12098 13:54:59.584801 arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 pass
12099 13:54:59.585051 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 skip
12100 13:54:59.585270 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
12101 13:54:59.585489 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
12102 13:54:59.586413 arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 pass
12103 13:54:59.586643 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 skip
12104 13:54:59.586841 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
12105 13:54:59.586982 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
12106 13:54:59.587134 arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 pass
12107 13:54:59.587257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 skip
12108 13:54:59.587373 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
12109 13:54:59.587489 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
12110 13:54:59.587603 arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 pass
12111 13:54:59.587716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 skip
12112 13:54:59.587830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
12113 13:54:59.587944 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
12114 13:54:59.588057 arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 pass
12115 13:54:59.588170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 skip
12116 13:54:59.588284 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
12117 13:54:59.588398 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
12118 13:54:59.588739 arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 pass
12119 13:54:59.588898 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 skip
12120 13:54:59.591210 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
12121 13:54:59.591414 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
12122 13:54:59.591587 arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 pass
12123 13:54:59.591754 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 skip
12124 13:54:59.591963 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
12125 13:54:59.592130 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
12126 13:54:59.592292 arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 pass
12127 13:54:59.592475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 skip
12128 13:54:59.592642 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
12129 13:54:59.592865 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
12130 13:54:59.593072 arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 pass
12131 13:54:59.593321 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 skip
12132 13:54:59.593497 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
12133 13:54:59.593682 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
12134 13:54:59.593854 arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 pass
12135 13:54:59.594012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 skip
12136 13:54:59.594174 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
12137 13:54:59.594424 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
12138 13:54:59.594630 arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 pass
12139 13:54:59.594847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 skip
12140 13:54:59.595007 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
12141 13:54:59.595128 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
12142 13:54:59.595242 arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 pass
12143 13:54:59.595356 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 skip
12144 13:54:59.595470 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
12145 13:54:59.595608 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
12146 13:54:59.595728 arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 pass
12147 13:54:59.595844 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 skip
12148 13:54:59.599026 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
12149 13:54:59.599367 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
12150 13:54:59.599560 arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 pass
12151 13:54:59.599734 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 skip
12152 13:54:59.599913 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
12153 13:54:59.600082 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
12154 13:54:59.600223 arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 pass
12155 13:54:59.600368 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 skip
12156 13:54:59.600542 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
12157 13:54:59.600680 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
12158 13:54:59.600824 arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 pass
12159 13:54:59.600999 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 skip
12160 13:54:59.601137 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
12161 13:54:59.601281 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
12162 13:54:59.601455 arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 pass
12163 13:54:59.601590 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 skip
12164 13:54:59.601755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
12165 13:54:59.601936 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
12166 13:54:59.602073 arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 pass
12167 13:54:59.602217 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 skip
12168 13:54:59.602391 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
12169 13:54:59.602529 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
12170 13:54:59.602673 arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 pass
12171 13:54:59.602846 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 skip
12172 13:54:59.602983 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
12173 13:54:59.603154 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
12174 13:54:59.607104 arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 pass
12175 13:54:59.607532 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 skip
12176 13:54:59.607701 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
12177 13:54:59.607906 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
12178 13:54:59.608150 arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 pass
12179 13:54:59.608326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 skip
12180 13:54:59.608498 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
12181 13:54:59.608665 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
12182 13:54:59.608845 arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 pass
12183 13:54:59.609006 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 skip
12184 13:54:59.609172 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
12185 13:54:59.609329 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
12186 13:54:59.609566 arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 pass
12187 13:54:59.609755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 skip
12188 13:54:59.609922 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
12189 13:54:59.610097 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
12190 13:54:59.610266 arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 pass
12191 13:54:59.610404 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 skip
12192 13:54:59.610536 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
12193 13:54:59.610662 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
12194 13:54:59.610816 arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 pass
12195 13:54:59.610950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 skip
12196 13:54:59.611072 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
12197 13:54:59.615172 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
12198 13:54:59.615530 arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 pass
12199 13:54:59.615681 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 skip
12200 13:54:59.615871 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
12201 13:54:59.616034 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
12202 13:54:59.616223 arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 pass
12203 13:54:59.616431 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 skip
12204 13:54:59.616624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
12205 13:54:59.616819 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
12206 13:54:59.617025 arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 pass
12207 13:54:59.617204 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 skip
12208 13:54:59.617357 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
12209 13:54:59.617554 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
12210 13:54:59.617737 arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 pass
12211 13:54:59.617878 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 skip
12212 13:54:59.618006 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
12213 13:54:59.618231 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
12214 13:54:59.618400 arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 pass
12215 13:54:59.618521 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 skip
12216 13:54:59.618635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
12217 13:54:59.618770 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
12218 13:54:59.618887 arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 pass
12219 13:54:59.619001 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 skip
12220 13:54:59.638717 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
12221 13:54:59.639020 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
12222 13:54:59.639247 arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 pass
12223 13:54:59.639439 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 skip
12224 13:54:59.639633 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
12225 13:54:59.639795 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
12226 13:54:59.639989 arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 pass
12227 13:54:59.640145 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 skip
12228 13:54:59.640303 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
12229 13:54:59.640498 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
12230 13:54:59.640685 arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 pass
12231 13:54:59.640896 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 skip
12232 13:54:59.641086 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
12233 13:54:59.641305 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
12234 13:54:59.641470 arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 pass
12235 13:54:59.641627 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 skip
12236 13:54:59.641803 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
12237 13:54:59.641996 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
12238 13:54:59.642164 arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 pass
12239 13:54:59.642320 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 skip
12240 13:54:59.642480 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
12241 13:54:59.642645 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
12242 13:54:59.642808 arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 pass
12243 13:54:59.642931 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 skip
12244 13:54:59.643077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
12245 13:54:59.643199 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
12246 13:54:59.643315 arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 pass
12247 13:54:59.643431 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 skip
12248 13:54:59.643549 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
12249 13:54:59.643664 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
12250 13:54:59.643780 arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 pass
12251 13:54:59.647016 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 skip
12252 13:54:59.647231 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
12253 13:54:59.647657 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
12254 13:54:59.647862 arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 pass
12255 13:54:59.648074 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 skip
12256 13:54:59.648293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
12257 13:54:59.648470 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
12258 13:54:59.648699 arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 pass
12259 13:54:59.648877 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 skip
12260 13:54:59.649041 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
12261 13:54:59.649205 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
12262 13:54:59.649370 arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 pass
12263 13:54:59.649534 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 skip
12264 13:54:59.649712 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
12265 13:54:59.649874 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
12266 13:54:59.650072 arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 pass
12267 13:54:59.650249 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 skip
12268 13:54:59.650454 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
12269 13:54:59.650618 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
12270 13:54:59.650770 arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 pass
12271 13:54:59.650890 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 skip
12272 13:54:59.651004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
12273 13:54:59.651118 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
12274 13:54:59.651230 arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 pass
12275 13:54:59.651341 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 skip
12276 13:54:59.651454 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
12277 13:54:59.651565 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
12278 13:54:59.651678 arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 pass
12279 13:54:59.651791 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 skip
12280 13:54:59.651902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
12281 13:54:59.652014 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
12282 13:54:59.652126 arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 pass
12283 13:54:59.652263 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 skip
12284 13:54:59.652613 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
12285 13:54:59.652766 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
12286 13:54:59.652885 arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 pass
12287 13:54:59.654970 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 skip
12288 13:54:59.655414 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
12289 13:54:59.655606 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
12290 13:54:59.655776 arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 pass
12291 13:54:59.655974 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 skip
12292 13:54:59.656145 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
12293 13:54:59.656307 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
12294 13:54:59.656469 arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 pass
12295 13:54:59.656647 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 skip
12296 13:54:59.656885 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
12297 13:54:59.657101 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
12298 13:54:59.657300 arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 pass
12299 13:54:59.657562 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 skip
12300 13:54:59.657774 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
12301 13:54:59.657945 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
12302 13:54:59.658102 arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 pass
12303 13:54:59.658257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 skip
12304 13:54:59.658439 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
12305 13:54:59.658637 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
12306 13:54:59.658863 arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 pass
12307 13:54:59.659001 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 skip
12308 13:54:59.659121 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
12309 13:54:59.659237 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
12310 13:54:59.659352 arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 pass
12311 13:54:59.659465 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 skip
12312 13:54:59.659581 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
12313 13:54:59.659696 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
12314 13:54:59.659810 arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 pass
12315 13:54:59.659924 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 skip
12316 13:54:59.660037 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
12317 13:54:59.660150 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
12318 13:54:59.662932 arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 pass
12319 13:54:59.663362 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 skip
12320 13:54:59.663557 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
12321 13:54:59.663763 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
12322 13:54:59.663940 arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 pass
12323 13:54:59.664105 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 skip
12324 13:54:59.664301 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
12325 13:54:59.664470 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
12326 13:54:59.664642 arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 pass
12327 13:54:59.664800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 skip
12328 13:54:59.664993 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
12329 13:54:59.665161 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
12330 13:54:59.665325 arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 pass
12331 13:54:59.665483 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 skip
12332 13:54:59.665611 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
12333 13:54:59.665766 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
12334 13:54:59.665894 arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 pass
12335 13:54:59.666018 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 skip
12336 13:54:59.666137 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
12337 13:54:59.666253 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
12338 13:54:59.666411 arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 pass
12339 13:54:59.666554 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 skip
12340 13:54:59.666646 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
12341 13:54:59.666734 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
12342 13:54:59.666800 arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 pass
12343 13:54:59.666860 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 skip
12344 13:54:59.666920 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
12345 13:54:59.666993 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
12346 13:54:59.670968 arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 pass
12347 13:54:59.671268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 skip
12348 13:54:59.671416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
12349 13:54:59.671568 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
12350 13:54:59.671696 arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 pass
12351 13:54:59.671816 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 skip
12352 13:54:59.671945 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
12353 13:54:59.672042 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
12354 13:54:59.685614 arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 pass
12355 13:54:59.686008 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 skip
12356 13:54:59.686200 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
12357 13:54:59.686408 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
12358 13:54:59.686641 arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 pass
12359 13:54:59.686832 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 skip
12360 13:54:59.687027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
12361 13:54:59.687209 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
12362 13:54:59.687340 arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 pass
12363 13:54:59.687468 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 skip
12364 13:54:59.687624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
12365 13:54:59.687819 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
12366 13:54:59.687980 arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 pass
12367 13:54:59.688134 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 skip
12368 13:54:59.688292 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
12369 13:54:59.688455 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
12370 13:54:59.688660 arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 pass
12371 13:54:59.688830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 skip
12372 13:54:59.688996 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
12373 13:54:59.689158 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
12374 13:54:59.689358 arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 pass
12375 13:54:59.689534 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 skip
12376 13:54:59.690182 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
12377 13:54:59.690389 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
12378 13:54:59.690580 arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 pass
12379 13:54:59.690759 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 skip
12380 13:54:59.690882 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
12381 13:54:59.690998 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
12382 13:54:59.691112 arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 pass
12383 13:54:59.691226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 skip
12384 13:54:59.691339 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
12385 13:54:59.691452 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
12386 13:54:59.691565 arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 pass
12387 13:54:59.691895 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 skip
12388 13:54:59.692014 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
12389 13:54:59.692107 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
12390 13:54:59.692195 arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 pass
12391 13:54:59.695004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 skip
12392 13:54:59.695353 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
12393 13:54:59.695462 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
12394 13:54:59.695545 arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 pass
12395 13:54:59.695642 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 skip
12396 13:54:59.695723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
12397 13:54:59.695812 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
12398 13:54:59.696084 arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 pass
12399 13:54:59.696195 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 skip
12400 13:54:59.696290 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
12401 13:54:59.696441 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
12402 13:54:59.696544 arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 pass
12403 13:54:59.696624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 skip
12404 13:54:59.696714 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
12405 13:54:59.696804 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
12406 13:54:59.696894 arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 pass
12407 13:54:59.697181 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 skip
12408 13:54:59.697296 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
12409 13:54:59.697389 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
12410 13:54:59.697480 arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 pass
12411 13:54:59.697799 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 skip
12412 13:54:59.697959 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
12413 13:54:59.698111 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
12414 13:54:59.698234 arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 pass
12415 13:54:59.698364 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 skip
12416 13:54:59.698490 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
12417 13:54:59.698622 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
12418 13:54:59.698734 arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 pass
12419 13:54:59.702957 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 skip
12420 13:54:59.703313 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
12421 13:54:59.703454 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
12422 13:54:59.703612 arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 pass
12423 13:54:59.703832 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 skip
12424 13:54:59.704040 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
12425 13:54:59.704232 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
12426 13:54:59.704409 arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 pass
12427 13:54:59.704567 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 skip
12428 13:54:59.704723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
12429 13:54:59.704869 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
12430 13:54:59.704982 arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 pass
12431 13:54:59.705113 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 skip
12432 13:54:59.705246 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
12433 13:54:59.705421 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
12434 13:54:59.705549 arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 pass
12435 13:54:59.705687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 skip
12436 13:54:59.705854 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
12437 13:54:59.706011 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
12438 13:54:59.706118 arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 pass
12439 13:54:59.706237 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 skip
12440 13:54:59.706355 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
12441 13:54:59.706475 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
12442 13:54:59.706618 arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 pass
12443 13:54:59.706741 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 skip
12444 13:54:59.706844 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
12445 13:54:59.706951 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
12446 13:54:59.710966 arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 pass
12447 13:54:59.711429 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 skip
12448 13:54:59.711641 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
12449 13:54:59.711828 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
12450 13:54:59.712070 arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 pass
12451 13:54:59.712293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 skip
12452 13:54:59.712507 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
12453 13:54:59.712702 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
12454 13:54:59.712914 arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 pass
12455 13:54:59.713133 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 skip
12456 13:54:59.713306 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
12457 13:54:59.713495 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
12458 13:54:59.713692 arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 pass
12459 13:54:59.713893 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 skip
12460 13:54:59.714073 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
12461 13:54:59.714244 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
12462 13:54:59.714396 arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 pass
12463 13:54:59.714637 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 skip
12464 13:54:59.714788 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
12465 13:54:59.714908 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
12466 13:54:59.715027 arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 pass
12467 13:54:59.715145 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 skip
12468 13:54:59.715260 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
12469 13:54:59.715379 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
12470 13:54:59.715494 arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 pass
12471 13:54:59.715609 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 skip
12472 13:54:59.715725 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
12473 13:54:59.715842 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
12474 13:54:59.718956 arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 pass
12475 13:54:59.719265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 skip
12476 13:54:59.719368 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
12477 13:54:59.719462 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
12478 13:54:59.719544 arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 pass
12479 13:54:59.719640 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 skip
12480 13:54:59.719969 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
12481 13:54:59.720161 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
12482 13:54:59.720355 arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 pass
12483 13:54:59.720560 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 skip
12484 13:54:59.720750 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
12485 13:54:59.720895 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
12486 13:54:59.721021 arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 pass
12487 13:54:59.721190 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 skip
12488 13:54:59.735005 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
12489 13:54:59.735475 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
12490 13:54:59.735678 arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 pass
12491 13:54:59.735833 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 skip
12492 13:54:59.736017 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
12493 13:54:59.736173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
12494 13:54:59.736323 arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 pass
12495 13:54:59.736475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 skip
12496 13:54:59.736643 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
12497 13:54:59.736771 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
12498 13:54:59.736921 arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 pass
12499 13:54:59.737087 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 skip
12500 13:54:59.737322 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
12501 13:54:59.737495 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
12502 13:54:59.737668 arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 pass
12503 13:54:59.737854 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 skip
12504 13:54:59.738028 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
12505 13:54:59.738219 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
12506 13:54:59.738396 arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 pass
12507 13:54:59.738558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 skip
12508 13:54:59.738715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
12509 13:54:59.738835 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
12510 13:54:59.738950 arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 pass
12511 13:54:59.739092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 skip
12512 13:54:59.739210 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
12513 13:54:59.739325 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
12514 13:54:59.739440 arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 pass
12515 13:54:59.743212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 skip
12516 13:54:59.743395 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
12517 13:54:59.743640 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
12518 13:54:59.743792 arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 pass
12519 13:54:59.743940 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 skip
12520 13:54:59.744070 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
12521 13:54:59.744218 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
12522 13:54:59.744369 arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 pass
12523 13:54:59.744512 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 skip
12524 13:54:59.744860 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
12525 13:54:59.745013 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
12526 13:54:59.745158 arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 pass
12527 13:54:59.745303 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 skip
12528 13:54:59.745444 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
12529 13:54:59.745598 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
12530 13:54:59.745761 arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 pass
12531 13:54:59.745905 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 skip
12532 13:54:59.746072 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
12533 13:54:59.746485 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
12534 13:54:59.746642 arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 pass
12535 13:54:59.746850 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 skip
12536 13:54:59.746993 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
12537 13:54:59.750945 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
12538 13:54:59.751270 arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 pass
12539 13:54:59.751432 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 skip
12540 13:54:59.751580 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
12541 13:54:59.751734 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
12542 13:54:59.751928 arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 pass
12543 13:54:59.752100 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 skip
12544 13:54:59.752293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
12545 13:54:59.752455 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
12546 13:54:59.752625 arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 pass
12547 13:54:59.752758 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 skip
12548 13:54:59.752926 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
12549 13:54:59.753067 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
12550 13:54:59.753229 arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 pass
12551 13:54:59.753417 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 skip
12552 13:54:59.753568 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
12553 13:54:59.753778 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
12554 13:54:59.753989 arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 pass
12555 13:54:59.754181 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 skip
12556 13:54:59.754405 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
12557 13:54:59.754605 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
12558 13:54:59.754782 arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 pass
12559 13:54:59.754910 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 skip
12560 13:54:59.755052 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
12561 13:54:59.755174 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
12562 13:54:59.755288 arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 pass
12563 13:54:59.759030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 skip
12564 13:54:59.759554 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
12565 13:54:59.759761 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
12566 13:54:59.759985 arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 pass
12567 13:54:59.760193 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 skip
12568 13:54:59.760428 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
12569 13:54:59.760649 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
12570 13:54:59.760838 arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 pass
12571 13:54:59.760992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 skip
12572 13:54:59.761150 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
12573 13:54:59.761308 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
12574 13:54:59.761467 arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 pass
12575 13:54:59.761598 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 skip
12576 13:54:59.761765 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
12577 13:54:59.761950 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
12578 13:54:59.762096 arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 pass
12579 13:54:59.762228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 skip
12580 13:54:59.762379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
12581 13:54:59.762528 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
12582 13:54:59.762665 arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 pass
12583 13:54:59.762800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 skip
12584 13:54:59.762927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
12585 13:54:59.763046 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
12586 13:54:59.763162 arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 pass
12587 13:54:59.763278 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 skip
12588 13:54:59.763421 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
12589 13:54:59.763544 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
12590 13:54:59.763662 arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 pass
12591 13:54:59.763782 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 skip
12592 13:54:59.763898 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
12593 13:54:59.767009 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
12594 13:54:59.767312 arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 pass
12595 13:54:59.767415 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 skip
12596 13:54:59.767509 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
12597 13:54:59.767588 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
12598 13:54:59.767678 arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 pass
12599 13:54:59.767773 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 skip
12600 13:54:59.768064 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
12601 13:54:59.768166 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
12602 13:54:59.768259 arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 pass
12603 13:54:59.768338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 skip
12604 13:54:59.768427 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
12605 13:54:59.768517 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
12606 13:54:59.768850 arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 pass
12607 13:54:59.769047 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 skip
12608 13:54:59.769245 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
12609 13:54:59.769410 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
12610 13:54:59.769567 arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 pass
12611 13:54:59.769791 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 skip
12612 13:54:59.769981 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
12613 13:54:59.770170 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
12614 13:54:59.770337 arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 pass
12615 13:54:59.770538 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 skip
12616 13:54:59.770708 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
12617 13:54:59.770834 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
12618 13:54:59.770947 arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 pass
12619 13:54:59.771058 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 skip
12620 13:54:59.771170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
12621 13:54:59.771306 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
12622 13:54:59.785633 arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 pass
12623 13:54:59.786073 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 skip
12624 13:54:59.786281 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
12625 13:54:59.786459 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
12626 13:54:59.786659 arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 pass
12627 13:54:59.786812 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 skip
12628 13:54:59.786976 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
12629 13:54:59.787141 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
12630 13:54:59.787330 arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 pass
12631 13:54:59.787482 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 skip
12632 13:54:59.787624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
12633 13:54:59.787763 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
12634 13:54:59.787915 arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 pass
12635 13:54:59.788093 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 skip
12636 13:54:59.788240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
12637 13:54:59.788376 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
12638 13:54:59.788562 arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 pass
12639 13:54:59.788715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 skip
12640 13:54:59.788847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
12641 13:54:59.789046 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
12642 13:54:59.789242 arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 pass
12643 13:54:59.789478 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 skip
12644 13:54:59.789681 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
12645 13:54:59.789849 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
12646 13:54:59.790010 arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 pass
12647 13:54:59.790159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 skip
12648 13:54:59.790314 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
12649 13:54:59.790477 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
12650 13:54:59.790613 arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 pass
12651 13:54:59.790759 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 skip
12652 13:54:59.790896 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
12653 13:54:59.791039 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
12654 13:54:59.791163 arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 pass
12655 13:54:59.791497 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 skip
12656 13:54:59.791625 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
12657 13:54:59.795294 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
12658 13:54:59.795536 arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 pass
12659 13:54:59.795769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 skip
12660 13:54:59.796223 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
12661 13:54:59.796429 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
12662 13:54:59.796600 arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 pass
12663 13:54:59.796781 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 skip
12664 13:54:59.796928 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
12665 13:54:59.797085 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
12666 13:54:59.797242 arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 pass
12667 13:54:59.797430 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 skip
12668 13:54:59.797595 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
12669 13:54:59.797773 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
12670 13:54:59.797939 arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 pass
12671 13:54:59.798102 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 skip
12672 13:54:59.798256 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
12673 13:54:59.798409 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
12674 13:54:59.798564 arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 pass
12675 13:54:59.798716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 skip
12676 13:54:59.798875 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
12677 13:54:59.798998 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
12678 13:54:59.799113 arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 pass
12679 13:54:59.799227 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 skip
12680 13:54:59.799342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
12681 13:54:59.799456 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
12682 13:54:59.799570 arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 pass
12683 13:54:59.799686 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 skip
12684 13:54:59.803048 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
12685 13:54:59.803463 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
12686 13:54:59.803567 arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 pass
12687 13:54:59.803648 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 skip
12688 13:54:59.803738 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
12689 13:54:59.804030 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
12690 13:54:59.804140 arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 pass
12691 13:54:59.804422 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 skip
12692 13:54:59.804516 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
12693 13:54:59.804607 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
12694 13:54:59.805047 arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 pass
12695 13:54:59.805379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 skip
12696 13:54:59.805667 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
12697 13:54:59.805834 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
12698 13:54:59.805985 arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 pass
12699 13:54:59.806134 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 skip
12700 13:54:59.806326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
12701 13:54:59.806484 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
12702 13:54:59.806636 arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 pass
12703 13:54:59.806784 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 skip
12704 13:54:59.806943 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
12705 13:54:59.807065 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
12706 13:54:59.807181 arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 pass
12707 13:54:59.811140 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 skip
12708 13:54:59.811338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
12709 13:54:59.811704 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
12710 13:54:59.811853 arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 pass
12711 13:54:59.811992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 skip
12712 13:54:59.812153 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
12713 13:54:59.812293 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
12714 13:54:59.812454 arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 pass
12715 13:54:59.812601 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 skip
12716 13:54:59.812771 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
12717 13:54:59.812925 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
12718 13:54:59.813099 arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 pass
12719 13:54:59.813250 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 skip
12720 13:54:59.813425 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
12721 13:54:59.813596 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
12722 13:54:59.813787 arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 pass
12723 13:54:59.813979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 skip
12724 13:54:59.814170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
12725 13:54:59.814361 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
12726 13:54:59.814553 arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 pass
12727 13:54:59.814719 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 skip
12728 13:54:59.814911 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
12729 13:54:59.819105 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
12730 13:54:59.819443 arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 pass
12731 13:54:59.819564 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 skip
12732 13:54:59.819887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
12733 13:54:59.820007 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
12734 13:54:59.820104 arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 pass
12735 13:54:59.820216 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 skip
12736 13:54:59.820326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
12737 13:54:59.820634 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
12738 13:54:59.820754 arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 pass
12739 13:54:59.820871 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 skip
12740 13:54:59.821179 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
12741 13:54:59.821314 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
12742 13:54:59.821415 arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 pass
12743 13:54:59.821528 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 skip
12744 13:54:59.821639 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
12745 13:54:59.821763 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
12746 13:54:59.821874 arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 pass
12747 13:54:59.822180 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 skip
12748 13:54:59.822331 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
12749 13:54:59.822500 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
12750 13:54:59.822636 arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 pass
12751 13:54:59.822772 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 skip
12752 13:54:59.822905 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
12753 13:54:59.827026 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
12754 13:54:59.827370 arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 pass
12755 13:54:59.827469 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 skip
12756 13:54:59.840076 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
12757 13:54:59.840496 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
12758 13:54:59.840603 arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 pass
12759 13:54:59.840685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 skip
12760 13:54:59.840777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
12761 13:54:59.840857 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
12762 13:54:59.841150 arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 pass
12763 13:54:59.841248 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 skip
12764 13:54:59.841339 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
12765 13:54:59.841430 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
12766 13:54:59.841791 arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 pass
12767 13:54:59.841889 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 skip
12768 13:54:59.841969 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
12769 13:54:59.842060 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
12770 13:54:59.842172 arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 pass
12771 13:54:59.842257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 skip
12772 13:54:59.842348 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
12773 13:54:59.842654 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
12774 13:54:59.842764 arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 pass
12775 13:54:59.847011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 skip
12776 13:54:59.847376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
12777 13:54:59.847519 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
12778 13:54:59.847633 arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 pass
12779 13:54:59.847780 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 skip
12780 13:54:59.847912 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
12781 13:54:59.848106 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
12782 13:54:59.848257 arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 pass
12783 13:54:59.848416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 skip
12784 13:54:59.848563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
12785 13:54:59.848717 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
12786 13:54:59.848836 arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 pass
12787 13:54:59.848979 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 skip
12788 13:54:59.849096 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
12789 13:54:59.849244 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
12790 13:54:59.849393 arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 pass
12791 13:54:59.849539 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 skip
12792 13:54:59.849699 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
12793 13:54:59.849827 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
12794 13:54:59.850163 arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 pass
12795 13:54:59.850293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 skip
12796 13:54:59.850438 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
12797 13:54:59.850567 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
12798 13:54:59.850690 arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 pass
12799 13:54:59.850807 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 skip
12800 13:54:59.855077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
12801 13:54:59.855217 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
12802 13:54:59.855547 arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 pass
12803 13:54:59.855683 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 skip
12804 13:54:59.855818 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
12805 13:54:59.855947 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
12806 13:54:59.856099 arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 pass
12807 13:54:59.856222 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 skip
12808 13:54:59.856501 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
12809 13:54:59.856639 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
12810 13:54:59.856776 arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 pass
12811 13:54:59.856910 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 skip
12812 13:54:59.857052 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
12813 13:54:59.857142 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
12814 13:54:59.857220 arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 pass
12815 13:54:59.857296 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 skip
12816 13:54:59.857372 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
12817 13:54:59.857447 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
12818 13:54:59.857524 arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 pass
12819 13:54:59.857615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 skip
12820 13:54:59.857700 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
12821 13:54:59.857777 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
12822 13:54:59.857853 arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 pass
12823 13:54:59.857929 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 skip
12824 13:54:59.858010 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
12825 13:54:59.858109 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
12826 13:54:59.858188 arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 pass
12827 13:54:59.858264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 skip
12828 13:54:59.858354 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
12829 13:54:59.858433 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
12830 13:54:59.858521 arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 pass
12831 13:54:59.858612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 skip
12832 13:54:59.862985 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
12833 13:54:59.863282 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
12834 13:54:59.863381 arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 pass
12835 13:54:59.863474 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 skip
12836 13:54:59.863585 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
12837 13:54:59.863884 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
12838 13:54:59.863999 arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 pass
12839 13:54:59.864266 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 skip
12840 13:54:59.864368 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
12841 13:54:59.864461 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
12842 13:54:59.864553 arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 pass
12843 13:54:59.864854 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 skip
12844 13:54:59.864956 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
12845 13:54:59.865050 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
12846 13:54:59.865329 arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 pass
12847 13:54:59.865416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 skip
12848 13:54:59.865500 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
12849 13:54:59.865582 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
12850 13:54:59.865945 arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 pass
12851 13:54:59.866095 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 skip
12852 13:54:59.866238 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
12853 13:54:59.866356 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
12854 13:54:59.866510 arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 pass
12855 13:54:59.866668 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 skip
12856 13:54:59.866775 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
12857 13:54:59.866885 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
12858 13:54:59.870937 arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 pass
12859 13:54:59.871270 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 skip
12860 13:54:59.871412 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
12861 13:54:59.871554 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
12862 13:54:59.871673 arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 pass
12863 13:54:59.871799 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 skip
12864 13:54:59.871941 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
12865 13:54:59.872082 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
12866 13:54:59.872220 arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 pass
12867 13:54:59.872363 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 skip
12868 13:54:59.872508 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
12869 13:54:59.872652 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
12870 13:54:59.872771 arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 pass
12871 13:54:59.873121 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 skip
12872 13:54:59.873271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
12873 13:54:59.873440 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
12874 13:54:59.873578 arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 pass
12875 13:54:59.873737 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 skip
12876 13:54:59.873873 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
12877 13:54:59.874021 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
12878 13:54:59.874137 arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 pass
12879 13:54:59.874269 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 skip
12880 13:54:59.874428 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
12881 13:54:59.874574 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
12882 13:54:59.874698 arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 pass
12883 13:54:59.874822 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 skip
12884 13:54:59.874918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
12885 13:54:59.879030 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
12886 13:54:59.879175 arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 pass
12887 13:54:59.879510 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 skip
12888 13:54:59.879626 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
12889 13:54:59.879732 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
12890 13:54:59.894615 arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 pass
12891 13:54:59.895079 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 skip
12892 13:54:59.895184 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
12893 13:54:59.895279 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
12894 13:54:59.895359 arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 pass
12895 13:54:59.895450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 skip
12896 13:54:59.895529 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
12897 13:54:59.895629 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
12898 13:54:59.895953 arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 pass
12899 13:54:59.896170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 skip
12900 13:54:59.896397 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
12901 13:54:59.896588 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
12902 13:54:59.896799 arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 pass
12903 13:54:59.896966 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 skip
12904 13:54:59.897137 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
12905 13:54:59.897341 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
12906 13:54:59.897528 arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 pass
12907 13:54:59.897787 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 skip
12908 13:54:59.897980 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
12909 13:54:59.898151 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
12910 13:54:59.898310 arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 pass
12911 13:54:59.898505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 skip
12912 13:54:59.898653 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
12913 13:54:59.898838 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
12914 13:54:59.899010 arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 pass
12915 13:54:59.899203 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 skip
12916 13:54:59.899375 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
12917 13:54:59.903026 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
12918 13:54:59.903455 arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 pass
12919 13:54:59.903604 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 skip
12920 13:54:59.903757 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
12921 13:54:59.903888 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
12922 13:54:59.904005 arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 pass
12923 13:54:59.904112 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 skip
12924 13:54:59.904220 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
12925 13:54:59.904326 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
12926 13:54:59.904637 arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 pass
12927 13:54:59.904746 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 skip
12928 13:54:59.904855 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
12929 13:54:59.905155 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
12930 13:54:59.905254 arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 pass
12931 13:54:59.905359 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 skip
12932 13:54:59.905626 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
12933 13:54:59.905747 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
12934 13:54:59.905853 arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 pass
12935 13:54:59.905946 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 skip
12936 13:54:59.906067 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
12937 13:54:59.906361 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
12938 13:54:59.906464 arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 pass
12939 13:54:59.906563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 skip
12940 13:54:59.906676 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
12941 13:54:59.910979 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
12942 13:54:59.911411 arm64_sve-ptrace pass
12943 13:54:59.911510 arm64_sve-probe-vls_Enumerated_16_vector_lengths pass
12944 13:54:59.911602 arm64_sve-probe-vls_All_vector_lengths_valid pass
12945 13:54:59.911690 arm64_sve-probe-vls pass
12946 13:54:59.911779 arm64_vec-syscfg_SVE_default_vector_length_64 pass
12947 13:54:59.911886 arm64_vec-syscfg_SVE_minimum_vector_length_16 pass
12948 13:54:59.911979 arm64_vec-syscfg_SVE_maximum_vector_length_256 pass
12949 13:54:59.912069 arm64_vec-syscfg_SVE_current_VL_is_64 pass
12950 13:54:59.912174 arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 pass
12951 13:54:59.912264 arm64_vec-syscfg_SVE_prctl_set_min_max pass
12952 13:54:59.912362 arm64_vec-syscfg_SVE_vector_length_used_default pass
12953 13:54:59.912446 arm64_vec-syscfg_SVE_vector_length_was_inherited pass
12954 13:54:59.912545 arm64_vec-syscfg_SVE_vector_length_set_on_exec pass
12955 13:54:59.912641 arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors pass
12956 13:54:59.912937 arm64_vec-syscfg_SME_default_vector_length_32 pass
12957 13:54:59.913044 arm64_vec-syscfg_SME_minimum_vector_length_16 pass
12958 13:54:59.913152 arm64_vec-syscfg_SME_maximum_vector_length_256 pass
12959 13:54:59.913243 arm64_vec-syscfg_SME_current_VL_is_32 pass
12960 13:54:59.913344 arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 pass
12961 13:54:59.913438 arm64_vec-syscfg_SME_prctl_set_min_max pass
12962 13:54:59.913557 arm64_vec-syscfg_SME_vector_length_used_default pass
12963 13:54:59.913669 arm64_vec-syscfg_SME_vector_length_was_inherited pass
12964 13:54:59.913975 arm64_vec-syscfg_SME_vector_length_set_on_exec pass
12965 13:54:59.914084 arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors pass
12966 13:54:59.914195 arm64_vec-syscfg pass
12967 13:54:59.914289 arm64_za-fork_fork_test pass
12968 13:54:59.914393 arm64_za-fork pass
12969 13:54:59.914491 arm64_za-ptrace_Set_VL_16 pass
12970 13:54:59.914582 arm64_za-ptrace_Disabled_ZA_for_VL_16 pass
12971 13:54:59.914658 arm64_za-ptrace_Data_match_for_VL_16 pass
12972 13:54:59.914750 arm64_za-ptrace_Set_VL_32 pass
12973 13:54:59.914824 arm64_za-ptrace_Disabled_ZA_for_VL_32 pass
12974 13:54:59.914917 arm64_za-ptrace_Data_match_for_VL_32 pass
12975 13:54:59.918926 arm64_za-ptrace_Set_VL_48 pass
12976 13:54:59.919222 arm64_za-ptrace_Disabled_ZA_for_VL_48 skip
12977 13:54:59.919306 arm64_za-ptrace_Get_and_set_data_for_VL_48 skip
12978 13:54:59.919421 arm64_za-ptrace_Set_VL_64 pass
12979 13:54:59.919516 arm64_za-ptrace_Disabled_ZA_for_VL_64 pass
12980 13:54:59.919625 arm64_za-ptrace_Data_match_for_VL_64 pass
12981 13:54:59.919698 arm64_za-ptrace_Set_VL_80 pass
12982 13:54:59.919788 arm64_za-ptrace_Disabled_ZA_for_VL_80 skip
12983 13:54:59.919874 arm64_za-ptrace_Get_and_set_data_for_VL_80 skip
12984 13:54:59.920141 arm64_za-ptrace_Set_VL_96 pass
12985 13:54:59.920214 arm64_za-ptrace_Disabled_ZA_for_VL_96 skip
12986 13:54:59.920304 arm64_za-ptrace_Get_and_set_data_for_VL_96 skip
12987 13:54:59.920390 arm64_za-ptrace_Set_VL_112 pass
12988 13:54:59.920462 arm64_za-ptrace_Disabled_ZA_for_VL_112 skip
12989 13:54:59.920552 arm64_za-ptrace_Get_and_set_data_for_VL_112 skip
12990 13:54:59.920623 arm64_za-ptrace_Set_VL_128 pass
12991 13:54:59.920712 arm64_za-ptrace_Disabled_ZA_for_VL_128 pass
12992 13:54:59.920976 arm64_za-ptrace_Data_match_for_VL_128 pass
12993 13:54:59.921049 arm64_za-ptrace_Set_VL_144 pass
12994 13:54:59.921124 arm64_za-ptrace_Disabled_ZA_for_VL_144 skip
12995 13:54:59.921214 arm64_za-ptrace_Get_and_set_data_for_VL_144 skip
12996 13:54:59.921285 arm64_za-ptrace_Set_VL_160 pass
12997 13:54:59.921374 arm64_za-ptrace_Disabled_ZA_for_VL_160 skip
12998 13:54:59.921459 arm64_za-ptrace_Get_and_set_data_for_VL_160 skip
12999 13:54:59.921544 arm64_za-ptrace_Set_VL_176 pass
13000 13:54:59.921815 arm64_za-ptrace_Disabled_ZA_for_VL_176 skip
13001 13:54:59.921923 arm64_za-ptrace_Get_and_set_data_for_VL_176 skip
13002 13:54:59.922030 arm64_za-ptrace_Set_VL_192 pass
13003 13:54:59.922122 arm64_za-ptrace_Disabled_ZA_for_VL_192 skip
13004 13:54:59.922219 arm64_za-ptrace_Get_and_set_data_for_VL_192 skip
13005 13:54:59.922289 arm64_za-ptrace_Set_VL_208 pass
13006 13:54:59.922366 arm64_za-ptrace_Disabled_ZA_for_VL_208 skip
13007 13:54:59.922476 arm64_za-ptrace_Get_and_set_data_for_VL_208 skip
13008 13:54:59.922740 arm64_za-ptrace_Set_VL_224 pass
13009 13:54:59.922811 arm64_za-ptrace_Disabled_ZA_for_VL_224 skip
13010 13:54:59.926945 arm64_za-ptrace_Get_and_set_data_for_VL_224 skip
13011 13:54:59.927237 arm64_za-ptrace_Set_VL_240 pass
13012 13:54:59.927340 arm64_za-ptrace_Disabled_ZA_for_VL_240 skip
13013 13:54:59.927423 arm64_za-ptrace_Get_and_set_data_for_VL_240 skip
13014 13:54:59.927515 arm64_za-ptrace_Set_VL_256 pass
13015 13:54:59.927598 arm64_za-ptrace_Disabled_ZA_for_VL_256 pass
13016 13:54:59.927687 arm64_za-ptrace_Data_match_for_VL_256 pass
13017 13:54:59.927766 arm64_za-ptrace_Set_VL_272 pass
13018 13:54:59.927842 arm64_za-ptrace_Disabled_ZA_for_VL_272 skip
13019 13:54:59.927931 arm64_za-ptrace_Get_and_set_data_for_VL_272 skip
13020 13:54:59.928013 arm64_za-ptrace_Set_VL_288 pass
13021 13:54:59.928090 arm64_za-ptrace_Disabled_ZA_for_VL_288 skip
13022 13:54:59.928178 arm64_za-ptrace_Get_and_set_data_for_VL_288 skip
13023 13:54:59.928256 arm64_za-ptrace_Set_VL_304 pass
13024 13:54:59.928344 arm64_za-ptrace_Disabled_ZA_for_VL_304 skip
13025 13:54:59.928435 arm64_za-ptrace_Get_and_set_data_for_VL_304 skip
13026 13:54:59.928513 arm64_za-ptrace_Set_VL_320 pass
13027 13:54:59.928601 arm64_za-ptrace_Disabled_ZA_for_VL_320 skip
13028 13:54:59.928897 arm64_za-ptrace_Get_and_set_data_for_VL_320 skip
13029 13:54:59.929006 arm64_za-ptrace_Set_VL_336 pass
13030 13:54:59.929099 arm64_za-ptrace_Disabled_ZA_for_VL_336 skip
13031 13:54:59.929204 arm64_za-ptrace_Get_and_set_data_for_VL_336 skip
13032 13:54:59.929295 arm64_za-ptrace_Set_VL_352 pass
13033 13:54:59.929399 arm64_za-ptrace_Disabled_ZA_for_VL_352 skip
13034 13:54:59.929489 arm64_za-ptrace_Get_and_set_data_for_VL_352 skip
13035 13:54:59.929592 arm64_za-ptrace_Set_VL_368 pass
13036 13:54:59.929696 arm64_za-ptrace_Disabled_ZA_for_VL_368 skip
13037 13:54:59.929992 arm64_za-ptrace_Get_and_set_data_for_VL_368 skip
13038 13:54:59.930089 arm64_za-ptrace_Set_VL_384 pass
13039 13:54:59.930174 arm64_za-ptrace_Disabled_ZA_for_VL_384 skip
13040 13:54:59.930275 arm64_za-ptrace_Get_and_set_data_for_VL_384 skip
13041 13:54:59.930362 arm64_za-ptrace_Set_VL_400 pass
13042 13:54:59.930449 arm64_za-ptrace_Disabled_ZA_for_VL_400 skip
13043 13:54:59.930535 arm64_za-ptrace_Get_and_set_data_for_VL_400 skip
13044 13:54:59.930635 arm64_za-ptrace_Set_VL_416 pass
13045 13:54:59.930721 arm64_za-ptrace_Disabled_ZA_for_VL_416 skip
13046 13:54:59.930809 arm64_za-ptrace_Get_and_set_data_for_VL_416 skip
13047 13:54:59.930909 arm64_za-ptrace_Set_VL_432 pass
13048 13:54:59.934929 arm64_za-ptrace_Disabled_ZA_for_VL_432 skip
13049 13:54:59.935231 arm64_za-ptrace_Get_and_set_data_for_VL_432 skip
13050 13:54:59.935331 arm64_za-ptrace_Set_VL_448 pass
13051 13:54:59.935430 arm64_za-ptrace_Disabled_ZA_for_VL_448 skip
13052 13:54:59.935519 arm64_za-ptrace_Get_and_set_data_for_VL_448 skip
13053 13:54:59.935621 arm64_za-ptrace_Set_VL_464 pass
13054 13:54:59.935713 arm64_za-ptrace_Disabled_ZA_for_VL_464 skip
13055 13:54:59.935818 arm64_za-ptrace_Get_and_set_data_for_VL_464 skip
13056 13:54:59.935925 arm64_za-ptrace_Set_VL_480 pass
13057 13:54:59.936016 arm64_za-ptrace_Disabled_ZA_for_VL_480 skip
13058 13:54:59.936117 arm64_za-ptrace_Get_and_set_data_for_VL_480 skip
13059 13:54:59.936207 arm64_za-ptrace_Set_VL_496 pass
13060 13:54:59.936310 arm64_za-ptrace_Disabled_ZA_for_VL_496 skip
13061 13:54:59.953434 arm64_za-ptrace_Get_and_set_data_for_VL_496 skip
13062 13:54:59.953675 arm64_za-ptrace_Set_VL_512 pass
13063 13:54:59.953769 arm64_za-ptrace_Disabled_ZA_for_VL_512 skip
13064 13:54:59.954073 arm64_za-ptrace_Get_and_set_data_for_VL_512 skip
13065 13:54:59.954171 arm64_za-ptrace_Set_VL_528 pass
13066 13:54:59.954261 arm64_za-ptrace_Disabled_ZA_for_VL_528 skip
13067 13:54:59.954349 arm64_za-ptrace_Get_and_set_data_for_VL_528 skip
13068 13:54:59.954437 arm64_za-ptrace_Set_VL_544 pass
13069 13:54:59.954543 arm64_za-ptrace_Disabled_ZA_for_VL_544 skip
13070 13:54:59.954632 arm64_za-ptrace_Get_and_set_data_for_VL_544 skip
13071 13:54:59.954719 arm64_za-ptrace_Set_VL_560 pass
13072 13:54:59.954806 arm64_za-ptrace_Disabled_ZA_for_VL_560 skip
13073 13:54:59.954892 arm64_za-ptrace_Get_and_set_data_for_VL_560 skip
13074 13:54:59.954993 arm64_za-ptrace_Set_VL_576 pass
13075 13:54:59.955082 arm64_za-ptrace_Disabled_ZA_for_VL_576 skip
13076 13:54:59.955187 arm64_za-ptrace_Get_and_set_data_for_VL_576 skip
13077 13:54:59.955272 arm64_za-ptrace_Set_VL_592 pass
13078 13:54:59.955366 arm64_za-ptrace_Disabled_ZA_for_VL_592 skip
13079 13:54:59.955652 arm64_za-ptrace_Get_and_set_data_for_VL_592 skip
13080 13:54:59.955748 arm64_za-ptrace_Set_VL_608 pass
13081 13:54:59.955836 arm64_za-ptrace_Disabled_ZA_for_VL_608 skip
13082 13:54:59.955941 arm64_za-ptrace_Get_and_set_data_for_VL_608 skip
13083 13:54:59.956032 arm64_za-ptrace_Set_VL_624 pass
13084 13:54:59.956124 arm64_za-ptrace_Disabled_ZA_for_VL_624 skip
13085 13:54:59.956229 arm64_za-ptrace_Get_and_set_data_for_VL_624 skip
13086 13:54:59.956319 arm64_za-ptrace_Set_VL_640 pass
13087 13:54:59.956407 arm64_za-ptrace_Disabled_ZA_for_VL_640 skip
13088 13:54:59.956511 arm64_za-ptrace_Get_and_set_data_for_VL_640 skip
13089 13:54:59.956600 arm64_za-ptrace_Set_VL_656 pass
13090 13:54:59.956686 arm64_za-ptrace_Disabled_ZA_for_VL_656 skip
13091 13:54:59.956791 arm64_za-ptrace_Get_and_set_data_for_VL_656 skip
13092 13:54:59.956881 arm64_za-ptrace_Set_VL_672 pass
13093 13:54:59.956970 arm64_za-ptrace_Disabled_ZA_for_VL_672 skip
13094 13:54:59.957073 arm64_za-ptrace_Get_and_set_data_for_VL_672 skip
13095 13:54:59.957162 arm64_za-ptrace_Set_VL_688 pass
13096 13:54:59.957262 arm64_za-ptrace_Disabled_ZA_for_VL_688 skip
13097 13:54:59.957350 arm64_za-ptrace_Get_and_set_data_for_VL_688 skip
13098 13:54:59.957453 arm64_za-ptrace_Set_VL_704 pass
13099 13:54:59.957557 arm64_za-ptrace_Disabled_ZA_for_VL_704 skip
13100 13:54:59.957667 arm64_za-ptrace_Get_and_set_data_for_VL_704 skip
13101 13:54:59.957773 arm64_za-ptrace_Set_VL_720 pass
13102 13:54:59.957875 arm64_za-ptrace_Disabled_ZA_for_VL_720 skip
13103 13:54:59.958161 arm64_za-ptrace_Get_and_set_data_for_VL_720 skip
13104 13:54:59.958266 arm64_za-ptrace_Set_VL_736 pass
13105 13:54:59.958366 arm64_za-ptrace_Disabled_ZA_for_VL_736 skip
13106 13:54:59.958486 arm64_za-ptrace_Get_and_set_data_for_VL_736 skip
13107 13:54:59.958572 arm64_za-ptrace_Set_VL_752 pass
13108 13:54:59.958648 arm64_za-ptrace_Disabled_ZA_for_VL_752 skip
13109 13:54:59.958738 arm64_za-ptrace_Get_and_set_data_for_VL_752 skip
13110 13:54:59.958824 arm64_za-ptrace_Set_VL_768 pass
13111 13:54:59.958894 arm64_za-ptrace_Disabled_ZA_for_VL_768 skip
13112 13:54:59.963103 arm64_za-ptrace_Get_and_set_data_for_VL_768 skip
13113 13:54:59.963193 arm64_za-ptrace_Set_VL_784 pass
13114 13:54:59.963301 arm64_za-ptrace_Disabled_ZA_for_VL_784 skip
13115 13:54:59.963410 arm64_za-ptrace_Get_and_set_data_for_VL_784 skip
13116 13:54:59.963503 arm64_za-ptrace_Set_VL_800 pass
13117 13:54:59.963627 arm64_za-ptrace_Disabled_ZA_for_VL_800 skip
13118 13:54:59.963729 arm64_za-ptrace_Get_and_set_data_for_VL_800 skip
13119 13:54:59.963835 arm64_za-ptrace_Set_VL_816 pass
13120 13:54:59.963937 arm64_za-ptrace_Disabled_ZA_for_VL_816 skip
13121 13:54:59.964021 arm64_za-ptrace_Get_and_set_data_for_VL_816 skip
13122 13:54:59.964122 arm64_za-ptrace_Set_VL_832 pass
13123 13:54:59.964206 arm64_za-ptrace_Disabled_ZA_for_VL_832 skip
13124 13:54:59.964302 arm64_za-ptrace_Get_and_set_data_for_VL_832 skip
13125 13:54:59.964406 arm64_za-ptrace_Set_VL_848 pass
13126 13:54:59.964497 arm64_za-ptrace_Disabled_ZA_for_VL_848 skip
13127 13:54:59.964592 arm64_za-ptrace_Get_and_set_data_for_VL_848 skip
13128 13:54:59.964701 arm64_za-ptrace_Set_VL_864 pass
13129 13:54:59.964783 arm64_za-ptrace_Disabled_ZA_for_VL_864 skip
13130 13:54:59.964880 arm64_za-ptrace_Get_and_set_data_for_VL_864 skip
13131 13:54:59.964974 arm64_za-ptrace_Set_VL_880 pass
13132 13:54:59.965049 arm64_za-ptrace_Disabled_ZA_for_VL_880 skip
13133 13:54:59.965118 arm64_za-ptrace_Get_and_set_data_for_VL_880 skip
13134 13:54:59.965204 arm64_za-ptrace_Set_VL_896 pass
13135 13:54:59.965280 arm64_za-ptrace_Disabled_ZA_for_VL_896 skip
13136 13:54:59.965365 arm64_za-ptrace_Get_and_set_data_for_VL_896 skip
13137 13:54:59.965443 arm64_za-ptrace_Set_VL_912 pass
13138 13:54:59.965531 arm64_za-ptrace_Disabled_ZA_for_VL_912 skip
13139 13:54:59.965601 arm64_za-ptrace_Get_and_set_data_for_VL_912 skip
13140 13:54:59.965712 arm64_za-ptrace_Set_VL_928 pass
13141 13:54:59.965792 arm64_za-ptrace_Disabled_ZA_for_VL_928 skip
13142 13:54:59.965875 arm64_za-ptrace_Get_and_set_data_for_VL_928 skip
13143 13:54:59.965969 arm64_za-ptrace_Set_VL_944 pass
13144 13:54:59.966083 arm64_za-ptrace_Disabled_ZA_for_VL_944 skip
13145 13:54:59.966186 arm64_za-ptrace_Get_and_set_data_for_VL_944 skip
13146 13:54:59.966300 arm64_za-ptrace_Set_VL_960 pass
13147 13:54:59.966421 arm64_za-ptrace_Disabled_ZA_for_VL_960 skip
13148 13:54:59.966521 arm64_za-ptrace_Get_and_set_data_for_VL_960 skip
13149 13:54:59.966634 arm64_za-ptrace_Set_VL_976 pass
13150 13:54:59.966741 arm64_za-ptrace_Disabled_ZA_for_VL_976 skip
13151 13:54:59.966808 arm64_za-ptrace_Get_and_set_data_for_VL_976 skip
13152 13:54:59.970945 arm64_za-ptrace_Set_VL_992 pass
13153 13:54:59.971262 arm64_za-ptrace_Disabled_ZA_for_VL_992 skip
13154 13:54:59.971364 arm64_za-ptrace_Get_and_set_data_for_VL_992 skip
13155 13:54:59.971449 arm64_za-ptrace_Set_VL_1008 pass
13156 13:54:59.971555 arm64_za-ptrace_Disabled_ZA_for_VL_1008 skip
13157 13:54:59.971647 arm64_za-ptrace_Get_and_set_data_for_VL_1008 skip
13158 13:54:59.971734 arm64_za-ptrace_Set_VL_1024 pass
13159 13:54:59.971831 arm64_za-ptrace_Disabled_ZA_for_VL_1024 skip
13160 13:54:59.971935 arm64_za-ptrace_Get_and_set_data_for_VL_1024 skip
13161 13:54:59.972026 arm64_za-ptrace_Set_VL_1040 pass
13162 13:54:59.972136 arm64_za-ptrace_Disabled_ZA_for_VL_1040 skip
13163 13:54:59.972227 arm64_za-ptrace_Get_and_set_data_for_VL_1040 skip
13164 13:54:59.972315 arm64_za-ptrace_Set_VL_1056 pass
13165 13:54:59.972417 arm64_za-ptrace_Disabled_ZA_for_VL_1056 skip
13166 13:54:59.972507 arm64_za-ptrace_Get_and_set_data_for_VL_1056 skip
13167 13:54:59.972611 arm64_za-ptrace_Set_VL_1072 pass
13168 13:54:59.972714 arm64_za-ptrace_Disabled_ZA_for_VL_1072 skip
13169 13:54:59.972822 arm64_za-ptrace_Get_and_set_data_for_VL_1072 skip
13170 13:54:59.973096 arm64_za-ptrace_Set_VL_1088 pass
13171 13:54:59.973268 arm64_za-ptrace_Disabled_ZA_for_VL_1088 skip
13172 13:54:59.973464 arm64_za-ptrace_Get_and_set_data_for_VL_1088 skip
13173 13:54:59.973664 arm64_za-ptrace_Set_VL_1104 pass
13174 13:54:59.973821 arm64_za-ptrace_Disabled_ZA_for_VL_1104 skip
13175 13:54:59.973979 arm64_za-ptrace_Get_and_set_data_for_VL_1104 skip
13176 13:54:59.974113 arm64_za-ptrace_Set_VL_1120 pass
13177 13:54:59.974241 arm64_za-ptrace_Disabled_ZA_for_VL_1120 skip
13178 13:54:59.974367 arm64_za-ptrace_Get_and_set_data_for_VL_1120 skip
13179 13:54:59.974547 arm64_za-ptrace_Set_VL_1136 pass
13180 13:54:59.974721 arm64_za-ptrace_Disabled_ZA_for_VL_1136 skip
13181 13:54:59.974858 arm64_za-ptrace_Get_and_set_data_for_VL_1136 skip
13182 13:54:59.974980 arm64_za-ptrace_Set_VL_1152 pass
13183 13:54:59.975099 arm64_za-ptrace_Disabled_ZA_for_VL_1152 skip
13184 13:54:59.975217 arm64_za-ptrace_Get_and_set_data_for_VL_1152 skip
13185 13:54:59.975362 arm64_za-ptrace_Set_VL_1168 pass
13186 13:54:59.975487 arm64_za-ptrace_Disabled_ZA_for_VL_1168 skip
13187 13:54:59.979081 arm64_za-ptrace_Get_and_set_data_for_VL_1168 skip
13188 13:54:59.979272 arm64_za-ptrace_Set_VL_1184 pass
13189 13:54:59.979640 arm64_za-ptrace_Disabled_ZA_for_VL_1184 skip
13190 13:54:59.979744 arm64_za-ptrace_Get_and_set_data_for_VL_1184 skip
13191 13:54:59.979827 arm64_za-ptrace_Set_VL_1200 pass
13192 13:54:59.979905 arm64_za-ptrace_Disabled_ZA_for_VL_1200 skip
13193 13:54:59.979982 arm64_za-ptrace_Get_and_set_data_for_VL_1200 skip
13194 13:54:59.980078 arm64_za-ptrace_Set_VL_1216 pass
13195 13:54:59.980158 arm64_za-ptrace_Disabled_ZA_for_VL_1216 skip
13196 13:54:59.980237 arm64_za-ptrace_Get_and_set_data_for_VL_1216 skip
13197 13:54:59.980314 arm64_za-ptrace_Set_VL_1232 pass
13198 13:54:59.980406 arm64_za-ptrace_Disabled_ZA_for_VL_1232 skip
13199 13:54:59.980487 arm64_za-ptrace_Get_and_set_data_for_VL_1232 skip
13200 13:54:59.980578 arm64_za-ptrace_Set_VL_1248 pass
13201 13:54:59.980657 arm64_za-ptrace_Disabled_ZA_for_VL_1248 skip
13202 13:54:59.980746 arm64_za-ptrace_Get_and_set_data_for_VL_1248 skip
13203 13:54:59.980828 arm64_za-ptrace_Set_VL_1264 pass
13204 13:54:59.980905 arm64_za-ptrace_Disabled_ZA_for_VL_1264 skip
13205 13:54:59.980995 arm64_za-ptrace_Get_and_set_data_for_VL_1264 skip
13206 13:54:59.981074 arm64_za-ptrace_Set_VL_1280 pass
13207 13:54:59.981162 arm64_za-ptrace_Disabled_ZA_for_VL_1280 skip
13208 13:54:59.981254 arm64_za-ptrace_Get_and_set_data_for_VL_1280 skip
13209 13:54:59.981332 arm64_za-ptrace_Set_VL_1296 pass
13210 13:54:59.981408 arm64_za-ptrace_Disabled_ZA_for_VL_1296 skip
13211 13:54:59.981497 arm64_za-ptrace_Get_and_set_data_for_VL_1296 skip
13212 13:54:59.981576 arm64_za-ptrace_Set_VL_1312 pass
13213 13:54:59.981671 arm64_za-ptrace_Disabled_ZA_for_VL_1312 skip
13214 13:54:59.981953 arm64_za-ptrace_Get_and_set_data_for_VL_1312 skip
13215 13:54:59.982052 arm64_za-ptrace_Set_VL_1328 pass
13216 13:54:59.982142 arm64_za-ptrace_Disabled_ZA_for_VL_1328 skip
13217 13:54:59.982219 arm64_za-ptrace_Get_and_set_data_for_VL_1328 skip
13218 13:54:59.982295 arm64_za-ptrace_Set_VL_1344 pass
13219 13:54:59.982387 arm64_za-ptrace_Disabled_ZA_for_VL_1344 skip
13220 13:54:59.982465 arm64_za-ptrace_Get_and_set_data_for_VL_1344 skip
13221 13:54:59.982540 arm64_za-ptrace_Set_VL_1360 pass
13222 13:54:59.982616 arm64_za-ptrace_Disabled_ZA_for_VL_1360 skip
13223 13:54:59.982706 arm64_za-ptrace_Get_and_set_data_for_VL_1360 skip
13224 13:54:59.982784 arm64_za-ptrace_Set_VL_1376 pass
13225 13:54:59.982859 arm64_za-ptrace_Disabled_ZA_for_VL_1376 skip
13226 13:54:59.982934 arm64_za-ptrace_Get_and_set_data_for_VL_1376 skip
13227 13:54:59.983023 arm64_za-ptrace_Set_VL_1392 pass
13228 13:54:59.986972 arm64_za-ptrace_Disabled_ZA_for_VL_1392 skip
13229 13:54:59.987446 arm64_za-ptrace_Get_and_set_data_for_VL_1392 skip
13230 13:54:59.987654 arm64_za-ptrace_Set_VL_1408 pass
13231 13:54:59.987847 arm64_za-ptrace_Disabled_ZA_for_VL_1408 skip
13232 13:54:59.988026 arm64_za-ptrace_Get_and_set_data_for_VL_1408 skip
13233 13:54:59.988229 arm64_za-ptrace_Set_VL_1424 pass
13234 13:54:59.988424 arm64_za-ptrace_Disabled_ZA_for_VL_1424 skip
13235 13:54:59.988592 arm64_za-ptrace_Get_and_set_data_for_VL_1424 skip
13236 13:54:59.988770 arm64_za-ptrace_Set_VL_1440 pass
13237 13:54:59.988953 arm64_za-ptrace_Disabled_ZA_for_VL_1440 skip
13238 13:54:59.989103 arm64_za-ptrace_Get_and_set_data_for_VL_1440 skip
13239 13:54:59.989230 arm64_za-ptrace_Set_VL_1456 pass
13240 13:54:59.989356 arm64_za-ptrace_Disabled_ZA_for_VL_1456 skip
13241 13:54:59.989481 arm64_za-ptrace_Get_and_set_data_for_VL_1456 skip
13242 13:54:59.989670 arm64_za-ptrace_Set_VL_1472 pass
13243 13:54:59.989862 arm64_za-ptrace_Disabled_ZA_for_VL_1472 skip
13244 13:54:59.990022 arm64_za-ptrace_Get_and_set_data_for_VL_1472 skip
13245 13:54:59.990190 arm64_za-ptrace_Set_VL_1488 pass
13246 13:54:59.990364 arm64_za-ptrace_Disabled_ZA_for_VL_1488 skip
13247 13:54:59.990508 arm64_za-ptrace_Get_and_set_data_for_VL_1488 skip
13248 13:54:59.990650 arm64_za-ptrace_Set_VL_1504 pass
13249 13:54:59.990791 arm64_za-ptrace_Disabled_ZA_for_VL_1504 skip
13250 13:54:59.990931 arm64_za-ptrace_Get_and_set_data_for_VL_1504 skip
13251 13:54:59.991073 arm64_za-ptrace_Set_VL_1520 pass
13252 13:54:59.991216 arm64_za-ptrace_Disabled_ZA_for_VL_1520 skip
13253 13:54:59.991356 arm64_za-ptrace_Get_and_set_data_for_VL_1520 skip
13254 13:54:59.991496 arm64_za-ptrace_Set_VL_1536 pass
13255 13:54:59.991636 arm64_za-ptrace_Disabled_ZA_for_VL_1536 skip
13256 13:55:00.008229 arm64_za-ptrace_Get_and_set_data_for_VL_1536 skip
13257 13:55:00.008537 arm64_za-ptrace_Set_VL_1552 pass
13258 13:55:00.008955 arm64_za-ptrace_Disabled_ZA_for_VL_1552 skip
13259 13:55:00.009058 arm64_za-ptrace_Get_and_set_data_for_VL_1552 skip
13260 13:55:00.009141 arm64_za-ptrace_Set_VL_1568 pass
13261 13:55:00.009221 arm64_za-ptrace_Disabled_ZA_for_VL_1568 skip
13262 13:55:00.009299 arm64_za-ptrace_Get_and_set_data_for_VL_1568 skip
13263 13:55:00.009378 arm64_za-ptrace_Set_VL_1584 pass
13264 13:55:00.009455 arm64_za-ptrace_Disabled_ZA_for_VL_1584 skip
13265 13:55:00.009533 arm64_za-ptrace_Get_and_set_data_for_VL_1584 skip
13266 13:55:00.009610 arm64_za-ptrace_Set_VL_1600 pass
13267 13:55:00.009730 arm64_za-ptrace_Disabled_ZA_for_VL_1600 skip
13268 13:55:00.009831 arm64_za-ptrace_Get_and_set_data_for_VL_1600 skip
13269 13:55:00.009917 arm64_za-ptrace_Set_VL_1616 pass
13270 13:55:00.009997 arm64_za-ptrace_Disabled_ZA_for_VL_1616 skip
13271 13:55:00.010078 arm64_za-ptrace_Get_and_set_data_for_VL_1616 skip
13272 13:55:00.010156 arm64_za-ptrace_Set_VL_1632 pass
13273 13:55:00.010234 arm64_za-ptrace_Disabled_ZA_for_VL_1632 skip
13274 13:55:00.010328 arm64_za-ptrace_Get_and_set_data_for_VL_1632 skip
13275 13:55:00.010407 arm64_za-ptrace_Set_VL_1648 pass
13276 13:55:00.010483 arm64_za-ptrace_Disabled_ZA_for_VL_1648 skip
13277 13:55:00.010559 arm64_za-ptrace_Get_and_set_data_for_VL_1648 skip
13278 13:55:00.010635 arm64_za-ptrace_Set_VL_1664 pass
13279 13:55:00.010724 arm64_za-ptrace_Disabled_ZA_for_VL_1664 skip
13280 13:55:00.010802 arm64_za-ptrace_Get_and_set_data_for_VL_1664 skip
13281 13:55:00.010878 arm64_za-ptrace_Set_VL_1680 pass
13282 13:55:00.010953 arm64_za-ptrace_Disabled_ZA_for_VL_1680 skip
13283 13:55:00.011042 arm64_za-ptrace_Get_and_set_data_for_VL_1680 skip
13284 13:55:00.011120 arm64_za-ptrace_Set_VL_1696 pass
13285 13:55:00.011213 arm64_za-ptrace_Disabled_ZA_for_VL_1696 skip
13286 13:55:00.011291 arm64_za-ptrace_Get_and_set_data_for_VL_1696 skip
13287 13:55:00.011380 arm64_za-ptrace_Set_VL_1712 pass
13288 13:55:00.011469 arm64_za-ptrace_Disabled_ZA_for_VL_1712 skip
13289 13:55:00.011558 arm64_za-ptrace_Get_and_set_data_for_VL_1712 skip
13290 13:55:00.011647 arm64_za-ptrace_Set_VL_1728 pass
13291 13:55:00.011736 arm64_za-ptrace_Disabled_ZA_for_VL_1728 skip
13292 13:55:00.012061 arm64_za-ptrace_Get_and_set_data_for_VL_1728 skip
13293 13:55:00.012254 arm64_za-ptrace_Set_VL_1744 pass
13294 13:55:00.012425 arm64_za-ptrace_Disabled_ZA_for_VL_1744 skip
13295 13:55:00.012620 arm64_za-ptrace_Get_and_set_data_for_VL_1744 skip
13296 13:55:00.012794 arm64_za-ptrace_Set_VL_1760 pass
13297 13:55:00.012956 arm64_za-ptrace_Disabled_ZA_for_VL_1760 skip
13298 13:55:00.013117 arm64_za-ptrace_Get_and_set_data_for_VL_1760 skip
13299 13:55:00.013280 arm64_za-ptrace_Set_VL_1776 pass
13300 13:55:00.013437 arm64_za-ptrace_Disabled_ZA_for_VL_1776 skip
13301 13:55:00.013619 arm64_za-ptrace_Get_and_set_data_for_VL_1776 skip
13302 13:55:00.013796 arm64_za-ptrace_Set_VL_1792 pass
13303 13:55:00.013950 arm64_za-ptrace_Disabled_ZA_for_VL_1792 skip
13304 13:55:00.014108 arm64_za-ptrace_Get_and_set_data_for_VL_1792 skip
13305 13:55:00.014271 arm64_za-ptrace_Set_VL_1808 pass
13306 13:55:00.014431 arm64_za-ptrace_Disabled_ZA_for_VL_1808 skip
13307 13:55:00.014570 arm64_za-ptrace_Get_and_set_data_for_VL_1808 skip
13308 13:55:00.014717 arm64_za-ptrace_Set_VL_1824 pass
13309 13:55:00.014853 arm64_za-ptrace_Disabled_ZA_for_VL_1824 skip
13310 13:55:00.014969 arm64_za-ptrace_Get_and_set_data_for_VL_1824 skip
13311 13:55:00.015083 arm64_za-ptrace_Set_VL_1840 pass
13312 13:55:00.015228 arm64_za-ptrace_Disabled_ZA_for_VL_1840 skip
13313 13:55:00.015347 arm64_za-ptrace_Get_and_set_data_for_VL_1840 skip
13314 13:55:00.015462 arm64_za-ptrace_Set_VL_1856 pass
13315 13:55:00.015575 arm64_za-ptrace_Disabled_ZA_for_VL_1856 skip
13316 13:55:00.015689 arm64_za-ptrace_Get_and_set_data_for_VL_1856 skip
13317 13:55:00.015802 arm64_za-ptrace_Set_VL_1872 pass
13318 13:55:00.015915 arm64_za-ptrace_Disabled_ZA_for_VL_1872 skip
13319 13:55:00.016028 arm64_za-ptrace_Get_and_set_data_for_VL_1872 skip
13320 13:55:00.016141 arm64_za-ptrace_Set_VL_1888 pass
13321 13:55:00.016254 arm64_za-ptrace_Disabled_ZA_for_VL_1888 skip
13322 13:55:00.022991 arm64_za-ptrace_Get_and_set_data_for_VL_1888 skip
13323 13:55:00.023261 arm64_za-ptrace_Set_VL_1904 pass
13324 13:55:00.023651 arm64_za-ptrace_Disabled_ZA_for_VL_1904 skip
13325 13:55:00.023754 arm64_za-ptrace_Get_and_set_data_for_VL_1904 skip
13326 13:55:00.023837 arm64_za-ptrace_Set_VL_1920 pass
13327 13:55:00.023917 arm64_za-ptrace_Disabled_ZA_for_VL_1920 skip
13328 13:55:00.023995 arm64_za-ptrace_Get_and_set_data_for_VL_1920 skip
13329 13:55:00.024072 arm64_za-ptrace_Set_VL_1936 pass
13330 13:55:00.024164 arm64_za-ptrace_Disabled_ZA_for_VL_1936 skip
13331 13:55:00.024243 arm64_za-ptrace_Get_and_set_data_for_VL_1936 skip
13332 13:55:00.024320 arm64_za-ptrace_Set_VL_1952 pass
13333 13:55:00.024397 arm64_za-ptrace_Disabled_ZA_for_VL_1952 skip
13334 13:55:00.024473 arm64_za-ptrace_Get_and_set_data_for_VL_1952 skip
13335 13:55:00.024564 arm64_za-ptrace_Set_VL_1968 pass
13336 13:55:00.024643 arm64_za-ptrace_Disabled_ZA_for_VL_1968 skip
13337 13:55:00.024719 arm64_za-ptrace_Get_and_set_data_for_VL_1968 skip
13338 13:55:00.024796 arm64_za-ptrace_Set_VL_1984 pass
13339 13:55:00.024886 arm64_za-ptrace_Disabled_ZA_for_VL_1984 skip
13340 13:55:00.024965 arm64_za-ptrace_Get_and_set_data_for_VL_1984 skip
13341 13:55:00.025041 arm64_za-ptrace_Set_VL_2000 pass
13342 13:55:00.025131 arm64_za-ptrace_Disabled_ZA_for_VL_2000 skip
13343 13:55:00.025210 arm64_za-ptrace_Get_and_set_data_for_VL_2000 skip
13344 13:55:00.025301 arm64_za-ptrace_Set_VL_2016 pass
13345 13:55:00.025380 arm64_za-ptrace_Disabled_ZA_for_VL_2016 skip
13346 13:55:00.025722 arm64_za-ptrace_Get_and_set_data_for_VL_2016 skip
13347 13:55:00.025909 arm64_za-ptrace_Set_VL_2032 pass
13348 13:55:00.026073 arm64_za-ptrace_Disabled_ZA_for_VL_2032 skip
13349 13:55:00.026266 arm64_za-ptrace_Get_and_set_data_for_VL_2032 skip
13350 13:55:00.026426 arm64_za-ptrace_Set_VL_2048 pass
13351 13:55:00.026583 arm64_za-ptrace_Disabled_ZA_for_VL_2048 skip
13352 13:55:00.026766 arm64_za-ptrace_Get_and_set_data_for_VL_2048 skip
13353 13:55:00.026894 arm64_za-ptrace_Set_VL_2064 pass
13354 13:55:00.027010 arm64_za-ptrace_Disabled_ZA_for_VL_2064 skip
13355 13:55:00.027125 arm64_za-ptrace_Get_and_set_data_for_VL_2064 skip
13356 13:55:00.027243 arm64_za-ptrace_Set_VL_2080 pass
13357 13:55:00.027356 arm64_za-ptrace_Disabled_ZA_for_VL_2080 skip
13358 13:55:00.027470 arm64_za-ptrace_Get_and_set_data_for_VL_2080 skip
13359 13:55:00.030944 arm64_za-ptrace_Set_VL_2096 pass
13360 13:55:00.031264 arm64_za-ptrace_Disabled_ZA_for_VL_2096 skip
13361 13:55:00.031390 arm64_za-ptrace_Get_and_set_data_for_VL_2096 skip
13362 13:55:00.031478 arm64_za-ptrace_Set_VL_2112 pass
13363 13:55:00.031565 arm64_za-ptrace_Disabled_ZA_for_VL_2112 skip
13364 13:55:00.031670 arm64_za-ptrace_Get_and_set_data_for_VL_2112 skip
13365 13:55:00.031761 arm64_za-ptrace_Set_VL_2128 pass
13366 13:55:00.031850 arm64_za-ptrace_Disabled_ZA_for_VL_2128 skip
13367 13:55:00.031951 arm64_za-ptrace_Get_and_set_data_for_VL_2128 skip
13368 13:55:00.032055 arm64_za-ptrace_Set_VL_2144 pass
13369 13:55:00.032145 arm64_za-ptrace_Disabled_ZA_for_VL_2144 skip
13370 13:55:00.032255 arm64_za-ptrace_Get_and_set_data_for_VL_2144 skip
13371 13:55:00.032362 arm64_za-ptrace_Set_VL_2160 pass
13372 13:55:00.032468 arm64_za-ptrace_Disabled_ZA_for_VL_2160 skip
13373 13:55:00.032578 arm64_za-ptrace_Get_and_set_data_for_VL_2160 skip
13374 13:55:00.032667 arm64_za-ptrace_Set_VL_2176 pass
13375 13:55:00.032958 arm64_za-ptrace_Disabled_ZA_for_VL_2176 skip
13376 13:55:00.033068 arm64_za-ptrace_Get_and_set_data_for_VL_2176 skip
13377 13:55:00.033168 arm64_za-ptrace_Set_VL_2192 pass
13378 13:55:00.033256 arm64_za-ptrace_Disabled_ZA_for_VL_2192 skip
13379 13:55:00.033370 arm64_za-ptrace_Get_and_set_data_for_VL_2192 skip
13380 13:55:00.033455 arm64_za-ptrace_Set_VL_2208 pass
13381 13:55:00.033540 arm64_za-ptrace_Disabled_ZA_for_VL_2208 skip
13382 13:55:00.033643 arm64_za-ptrace_Get_and_set_data_for_VL_2208 skip
13383 13:55:00.033742 arm64_za-ptrace_Set_VL_2224 pass
13384 13:55:00.033846 arm64_za-ptrace_Disabled_ZA_for_VL_2224 skip
13385 13:55:00.033937 arm64_za-ptrace_Get_and_set_data_for_VL_2224 skip
13386 13:55:00.034038 arm64_za-ptrace_Set_VL_2240 pass
13387 13:55:00.034124 arm64_za-ptrace_Disabled_ZA_for_VL_2240 skip
13388 13:55:00.034224 arm64_za-ptrace_Get_and_set_data_for_VL_2240 skip
13389 13:55:00.034311 arm64_za-ptrace_Set_VL_2256 pass
13390 13:55:00.034418 arm64_za-ptrace_Disabled_ZA_for_VL_2256 skip
13391 13:55:00.034522 arm64_za-ptrace_Get_and_set_data_for_VL_2256 skip
13392 13:55:00.034609 arm64_za-ptrace_Set_VL_2272 pass
13393 13:55:00.034712 arm64_za-ptrace_Disabled_ZA_for_VL_2272 skip
13394 13:55:00.034802 arm64_za-ptrace_Get_and_set_data_for_VL_2272 skip
13395 13:55:00.039035 arm64_za-ptrace_Set_VL_2288 pass
13396 13:55:00.039434 arm64_za-ptrace_Disabled_ZA_for_VL_2288 skip
13397 13:55:00.039533 arm64_za-ptrace_Get_and_set_data_for_VL_2288 skip
13398 13:55:00.039631 arm64_za-ptrace_Set_VL_2304 pass
13399 13:55:00.039715 arm64_za-ptrace_Disabled_ZA_for_VL_2304 skip
13400 13:55:00.039811 arm64_za-ptrace_Get_and_set_data_for_VL_2304 skip
13401 13:55:00.039899 arm64_za-ptrace_Set_VL_2320 pass
13402 13:55:00.039999 arm64_za-ptrace_Disabled_ZA_for_VL_2320 skip
13403 13:55:00.040099 arm64_za-ptrace_Get_and_set_data_for_VL_2320 skip
13404 13:55:00.040184 arm64_za-ptrace_Set_VL_2336 pass
13405 13:55:00.040289 arm64_za-ptrace_Disabled_ZA_for_VL_2336 skip
13406 13:55:00.040387 arm64_za-ptrace_Get_and_set_data_for_VL_2336 skip
13407 13:55:00.040489 arm64_za-ptrace_Set_VL_2352 pass
13408 13:55:00.040573 arm64_za-ptrace_Disabled_ZA_for_VL_2352 skip
13409 13:55:00.040672 arm64_za-ptrace_Get_and_set_data_for_VL_2352 skip
13410 13:55:00.040774 arm64_za-ptrace_Set_VL_2368 pass
13411 13:55:00.040877 arm64_za-ptrace_Disabled_ZA_for_VL_2368 skip
13412 13:55:00.040983 arm64_za-ptrace_Get_and_set_data_for_VL_2368 skip
13413 13:55:00.041073 arm64_za-ptrace_Set_VL_2384 pass
13414 13:55:00.041180 arm64_za-ptrace_Disabled_ZA_for_VL_2384 skip
13415 13:55:00.041277 arm64_za-ptrace_Get_and_set_data_for_VL_2384 skip
13416 13:55:00.041381 arm64_za-ptrace_Set_VL_2400 pass
13417 13:55:00.041474 arm64_za-ptrace_Disabled_ZA_for_VL_2400 skip
13418 13:55:00.041580 arm64_za-ptrace_Get_and_set_data_for_VL_2400 skip
13419 13:55:00.041682 arm64_za-ptrace_Set_VL_2416 pass
13420 13:55:00.041789 arm64_za-ptrace_Disabled_ZA_for_VL_2416 skip
13421 13:55:00.041880 arm64_za-ptrace_Get_and_set_data_for_VL_2416 skip
13422 13:55:00.041986 arm64_za-ptrace_Set_VL_2432 pass
13423 13:55:00.042094 arm64_za-ptrace_Disabled_ZA_for_VL_2432 skip
13424 13:55:00.042187 arm64_za-ptrace_Get_and_set_data_for_VL_2432 skip
13425 13:55:00.042298 arm64_za-ptrace_Set_VL_2448 pass
13426 13:55:00.042390 arm64_za-ptrace_Disabled_ZA_for_VL_2448 skip
13427 13:55:00.042496 arm64_za-ptrace_Get_and_set_data_for_VL_2448 skip
13428 13:55:00.042582 arm64_za-ptrace_Set_VL_2464 pass
13429 13:55:00.042685 arm64_za-ptrace_Disabled_ZA_for_VL_2464 skip
13430 13:55:00.042777 arm64_za-ptrace_Get_and_set_data_for_VL_2464 skip
13431 13:55:00.042877 arm64_za-ptrace_Set_VL_2480 pass
13432 13:55:00.042964 arm64_za-ptrace_Disabled_ZA_for_VL_2480 skip
13433 13:55:00.047025 arm64_za-ptrace_Get_and_set_data_for_VL_2480 skip
13434 13:55:00.047155 arm64_za-ptrace_Set_VL_2496 pass
13435 13:55:00.047544 arm64_za-ptrace_Disabled_ZA_for_VL_2496 skip
13436 13:55:00.047751 arm64_za-ptrace_Get_and_set_data_for_VL_2496 skip
13437 13:55:00.047895 arm64_za-ptrace_Set_VL_2512 pass
13438 13:55:00.048027 arm64_za-ptrace_Disabled_ZA_for_VL_2512 skip
13439 13:55:00.048159 arm64_za-ptrace_Get_and_set_data_for_VL_2512 skip
13440 13:55:00.048316 arm64_za-ptrace_Set_VL_2528 pass
13441 13:55:00.048449 arm64_za-ptrace_Disabled_ZA_for_VL_2528 skip
13442 13:55:00.048572 arm64_za-ptrace_Get_and_set_data_for_VL_2528 skip
13443 13:55:00.048693 arm64_za-ptrace_Set_VL_2544 pass
13444 13:55:00.048818 arm64_za-ptrace_Disabled_ZA_for_VL_2544 skip
13445 13:55:00.048962 arm64_za-ptrace_Get_and_set_data_for_VL_2544 skip
13446 13:55:00.049084 arm64_za-ptrace_Set_VL_2560 pass
13447 13:55:00.049202 arm64_za-ptrace_Disabled_ZA_for_VL_2560 skip
13448 13:55:00.049323 arm64_za-ptrace_Get_and_set_data_for_VL_2560 skip
13449 13:55:00.064686 arm64_za-ptrace_Set_VL_2576 pass
13450 13:55:00.065140 arm64_za-ptrace_Disabled_ZA_for_VL_2576 skip
13451 13:55:00.065248 arm64_za-ptrace_Get_and_set_data_for_VL_2576 skip
13452 13:55:00.065339 arm64_za-ptrace_Set_VL_2592 pass
13453 13:55:00.065423 arm64_za-ptrace_Disabled_ZA_for_VL_2592 skip
13454 13:55:00.065525 arm64_za-ptrace_Get_and_set_data_for_VL_2592 skip
13455 13:55:00.065615 arm64_za-ptrace_Set_VL_2608 pass
13456 13:55:00.065713 arm64_za-ptrace_Disabled_ZA_for_VL_2608 skip
13457 13:55:00.065798 arm64_za-ptrace_Get_and_set_data_for_VL_2608 skip
13458 13:55:00.065901 arm64_za-ptrace_Set_VL_2624 pass
13459 13:55:00.065988 arm64_za-ptrace_Disabled_ZA_for_VL_2624 skip
13460 13:55:00.066331 arm64_za-ptrace_Get_and_set_data_for_VL_2624 skip
13461 13:55:00.066540 arm64_za-ptrace_Set_VL_2640 pass
13462 13:55:00.066716 arm64_za-ptrace_Disabled_ZA_for_VL_2640 skip
13463 13:55:00.066911 arm64_za-ptrace_Get_and_set_data_for_VL_2640 skip
13464 13:55:00.067060 arm64_za-ptrace_Set_VL_2656 pass
13465 13:55:00.067218 arm64_za-ptrace_Disabled_ZA_for_VL_2656 skip
13466 13:55:00.067384 arm64_za-ptrace_Get_and_set_data_for_VL_2656 skip
13467 13:55:00.067552 arm64_za-ptrace_Set_VL_2672 pass
13468 13:55:00.067798 arm64_za-ptrace_Disabled_ZA_for_VL_2672 skip
13469 13:55:00.067974 arm64_za-ptrace_Get_and_set_data_for_VL_2672 skip
13470 13:55:00.068134 arm64_za-ptrace_Set_VL_2688 pass
13471 13:55:00.068299 arm64_za-ptrace_Disabled_ZA_for_VL_2688 skip
13472 13:55:00.068461 arm64_za-ptrace_Get_and_set_data_for_VL_2688 skip
13473 13:55:00.068623 arm64_za-ptrace_Set_VL_2704 pass
13474 13:55:00.068779 arm64_za-ptrace_Disabled_ZA_for_VL_2704 skip
13475 13:55:00.068971 arm64_za-ptrace_Get_and_set_data_for_VL_2704 skip
13476 13:55:00.069133 arm64_za-ptrace_Set_VL_2720 pass
13477 13:55:00.069271 arm64_za-ptrace_Disabled_ZA_for_VL_2720 skip
13478 13:55:00.069418 arm64_za-ptrace_Get_and_set_data_for_VL_2720 skip
13479 13:55:00.069565 arm64_za-ptrace_Set_VL_2736 pass
13480 13:55:00.070321 arm64_za-ptrace_Disabled_ZA_for_VL_2736 skip
13481 13:55:00.070426 arm64_za-ptrace_Get_and_set_data_for_VL_2736 skip
13482 13:55:00.070516 arm64_za-ptrace_Set_VL_2752 pass
13483 13:55:00.070604 arm64_za-ptrace_Disabled_ZA_for_VL_2752 skip
13484 13:55:00.070694 arm64_za-ptrace_Get_and_set_data_for_VL_2752 skip
13485 13:55:00.070781 arm64_za-ptrace_Set_VL_2768 pass
13486 13:55:00.070869 arm64_za-ptrace_Disabled_ZA_for_VL_2768 skip
13487 13:55:00.070980 arm64_za-ptrace_Get_and_set_data_for_VL_2768 skip
13488 13:55:00.071073 arm64_za-ptrace_Set_VL_2784 pass
13489 13:55:00.071161 arm64_za-ptrace_Disabled_ZA_for_VL_2784 skip
13490 13:55:00.071249 arm64_za-ptrace_Get_and_set_data_for_VL_2784 skip
13491 13:55:00.071337 arm64_za-ptrace_Set_VL_2800 pass
13492 13:55:00.071424 arm64_za-ptrace_Disabled_ZA_for_VL_2800 skip
13493 13:55:00.071511 arm64_za-ptrace_Get_and_set_data_for_VL_2800 skip
13494 13:55:00.071599 arm64_za-ptrace_Set_VL_2816 pass
13495 13:55:00.075002 arm64_za-ptrace_Disabled_ZA_for_VL_2816 skip
13496 13:55:00.075144 arm64_za-ptrace_Get_and_set_data_for_VL_2816 skip
13497 13:55:00.075258 arm64_za-ptrace_Set_VL_2832 pass
13498 13:55:00.075553 arm64_za-ptrace_Disabled_ZA_for_VL_2832 skip
13499 13:55:00.075635 arm64_za-ptrace_Get_and_set_data_for_VL_2832 skip
13500 13:55:00.075701 arm64_za-ptrace_Set_VL_2848 pass
13501 13:55:00.075762 arm64_za-ptrace_Disabled_ZA_for_VL_2848 skip
13502 13:55:00.075821 arm64_za-ptrace_Get_and_set_data_for_VL_2848 skip
13503 13:55:00.075896 arm64_za-ptrace_Set_VL_2864 pass
13504 13:55:00.075976 arm64_za-ptrace_Disabled_ZA_for_VL_2864 skip
13505 13:55:00.076073 arm64_za-ptrace_Get_and_set_data_for_VL_2864 skip
13506 13:55:00.076145 arm64_za-ptrace_Set_VL_2880 pass
13507 13:55:00.076211 arm64_za-ptrace_Disabled_ZA_for_VL_2880 skip
13508 13:55:00.076292 arm64_za-ptrace_Get_and_set_data_for_VL_2880 skip
13509 13:55:00.076355 arm64_za-ptrace_Set_VL_2896 pass
13510 13:55:00.076430 arm64_za-ptrace_Disabled_ZA_for_VL_2896 skip
13511 13:55:00.076543 arm64_za-ptrace_Get_and_set_data_for_VL_2896 skip
13512 13:55:00.076638 arm64_za-ptrace_Set_VL_2912 pass
13513 13:55:00.076722 arm64_za-ptrace_Disabled_ZA_for_VL_2912 skip
13514 13:55:00.076807 arm64_za-ptrace_Get_and_set_data_for_VL_2912 skip
13515 13:55:00.076885 arm64_za-ptrace_Set_VL_2928 pass
13516 13:55:00.076978 arm64_za-ptrace_Disabled_ZA_for_VL_2928 skip
13517 13:55:00.077058 arm64_za-ptrace_Get_and_set_data_for_VL_2928 skip
13518 13:55:00.077140 arm64_za-ptrace_Set_VL_2944 pass
13519 13:55:00.077224 arm64_za-ptrace_Disabled_ZA_for_VL_2944 skip
13520 13:55:00.077286 arm64_za-ptrace_Get_and_set_data_for_VL_2944 skip
13521 13:55:00.077345 arm64_za-ptrace_Set_VL_2960 pass
13522 13:55:00.077421 arm64_za-ptrace_Disabled_ZA_for_VL_2960 skip
13523 13:55:00.077520 arm64_za-ptrace_Get_and_set_data_for_VL_2960 skip
13524 13:55:00.077601 arm64_za-ptrace_Set_VL_2976 pass
13525 13:55:00.077700 arm64_za-ptrace_Disabled_ZA_for_VL_2976 skip
13526 13:55:00.078088 arm64_za-ptrace_Get_and_set_data_for_VL_2976 skip
13527 13:55:00.078310 arm64_za-ptrace_Set_VL_2992 pass
13528 13:55:00.078491 arm64_za-ptrace_Disabled_ZA_for_VL_2992 skip
13529 13:55:00.078740 arm64_za-ptrace_Get_and_set_data_for_VL_2992 skip
13530 13:55:00.078888 arm64_za-ptrace_Set_VL_3008 pass
13531 13:55:00.079008 arm64_za-ptrace_Disabled_ZA_for_VL_3008 skip
13532 13:55:00.079121 arm64_za-ptrace_Get_and_set_data_for_VL_3008 skip
13533 13:55:00.079234 arm64_za-ptrace_Set_VL_3024 pass
13534 13:55:00.079350 arm64_za-ptrace_Disabled_ZA_for_VL_3024 skip
13535 13:55:00.082955 arm64_za-ptrace_Get_and_set_data_for_VL_3024 skip
13536 13:55:00.083162 arm64_za-ptrace_Set_VL_3040 pass
13537 13:55:00.083567 arm64_za-ptrace_Disabled_ZA_for_VL_3040 skip
13538 13:55:00.083769 arm64_za-ptrace_Get_and_set_data_for_VL_3040 skip
13539 13:55:00.083939 arm64_za-ptrace_Set_VL_3056 pass
13540 13:55:00.084103 arm64_za-ptrace_Disabled_ZA_for_VL_3056 skip
13541 13:55:00.084302 arm64_za-ptrace_Get_and_set_data_for_VL_3056 skip
13542 13:55:00.084467 arm64_za-ptrace_Set_VL_3072 pass
13543 13:55:00.084622 arm64_za-ptrace_Disabled_ZA_for_VL_3072 skip
13544 13:55:00.084770 arm64_za-ptrace_Get_and_set_data_for_VL_3072 skip
13545 13:55:00.084924 arm64_za-ptrace_Set_VL_3088 pass
13546 13:55:00.085077 arm64_za-ptrace_Disabled_ZA_for_VL_3088 skip
13547 13:55:00.085237 arm64_za-ptrace_Get_and_set_data_for_VL_3088 skip
13548 13:55:00.085398 arm64_za-ptrace_Set_VL_3104 pass
13549 13:55:00.085593 arm64_za-ptrace_Disabled_ZA_for_VL_3104 skip
13550 13:55:00.085775 arm64_za-ptrace_Get_and_set_data_for_VL_3104 skip
13551 13:55:00.085945 arm64_za-ptrace_Set_VL_3120 pass
13552 13:55:00.086103 arm64_za-ptrace_Disabled_ZA_for_VL_3120 skip
13553 13:55:00.086252 arm64_za-ptrace_Get_and_set_data_for_VL_3120 skip
13554 13:55:00.086400 arm64_za-ptrace_Set_VL_3136 pass
13555 13:55:00.086528 arm64_za-ptrace_Disabled_ZA_for_VL_3136 skip
13556 13:55:00.086663 arm64_za-ptrace_Get_and_set_data_for_VL_3136 skip
13557 13:55:00.086800 arm64_za-ptrace_Set_VL_3152 pass
13558 13:55:00.086924 arm64_za-ptrace_Disabled_ZA_for_VL_3152 skip
13559 13:55:00.087038 arm64_za-ptrace_Get_and_set_data_for_VL_3152 skip
13560 13:55:00.087151 arm64_za-ptrace_Set_VL_3168 pass
13561 13:55:00.087263 arm64_za-ptrace_Disabled_ZA_for_VL_3168 skip
13562 13:55:00.087379 arm64_za-ptrace_Get_and_set_data_for_VL_3168 skip
13563 13:55:00.087522 arm64_za-ptrace_Set_VL_3184 pass
13564 13:55:00.087641 arm64_za-ptrace_Disabled_ZA_for_VL_3184 skip
13565 13:55:00.087754 arm64_za-ptrace_Get_and_set_data_for_VL_3184 skip
13566 13:55:00.087868 arm64_za-ptrace_Set_VL_3200 pass
13567 13:55:00.087982 arm64_za-ptrace_Disabled_ZA_for_VL_3200 skip
13568 13:55:00.088095 arm64_za-ptrace_Get_and_set_data_for_VL_3200 skip
13569 13:55:00.088208 arm64_za-ptrace_Set_VL_3216 pass
13570 13:55:00.088323 arm64_za-ptrace_Disabled_ZA_for_VL_3216 skip
13571 13:55:00.088437 arm64_za-ptrace_Get_and_set_data_for_VL_3216 skip
13572 13:55:00.088550 arm64_za-ptrace_Set_VL_3232 pass
13573 13:55:00.088663 arm64_za-ptrace_Disabled_ZA_for_VL_3232 skip
13574 13:55:00.088776 arm64_za-ptrace_Get_and_set_data_for_VL_3232 skip
13575 13:55:00.091220 arm64_za-ptrace_Set_VL_3248 pass
13576 13:55:00.091394 arm64_za-ptrace_Disabled_ZA_for_VL_3248 skip
13577 13:55:00.091569 arm64_za-ptrace_Get_and_set_data_for_VL_3248 skip
13578 13:55:00.091716 arm64_za-ptrace_Set_VL_3264 pass
13579 13:55:00.091849 arm64_za-ptrace_Disabled_ZA_for_VL_3264 skip
13580 13:55:00.092005 arm64_za-ptrace_Get_and_set_data_for_VL_3264 skip
13581 13:55:00.092204 arm64_za-ptrace_Set_VL_3280 pass
13582 13:55:00.092370 arm64_za-ptrace_Disabled_ZA_for_VL_3280 skip
13583 13:55:00.092537 arm64_za-ptrace_Get_and_set_data_for_VL_3280 skip
13584 13:55:00.092699 arm64_za-ptrace_Set_VL_3296 pass
13585 13:55:00.092850 arm64_za-ptrace_Disabled_ZA_for_VL_3296 skip
13586 13:55:00.093004 arm64_za-ptrace_Get_and_set_data_for_VL_3296 skip
13587 13:55:00.093196 arm64_za-ptrace_Set_VL_3312 pass
13588 13:55:00.093384 arm64_za-ptrace_Disabled_ZA_for_VL_3312 skip
13589 13:55:00.093547 arm64_za-ptrace_Get_and_set_data_for_VL_3312 skip
13590 13:55:00.093721 arm64_za-ptrace_Set_VL_3328 pass
13591 13:55:00.093879 arm64_za-ptrace_Disabled_ZA_for_VL_3328 skip
13592 13:55:00.094044 arm64_za-ptrace_Get_and_set_data_for_VL_3328 skip
13593 13:55:00.094210 arm64_za-ptrace_Set_VL_3344 pass
13594 13:55:00.094383 arm64_za-ptrace_Disabled_ZA_for_VL_3344 skip
13595 13:55:00.094539 arm64_za-ptrace_Get_and_set_data_for_VL_3344 skip
13596 13:55:00.094698 arm64_za-ptrace_Set_VL_3360 pass
13597 13:55:00.094892 arm64_za-ptrace_Disabled_ZA_for_VL_3360 skip
13598 13:55:00.095061 arm64_za-ptrace_Get_and_set_data_for_VL_3360 skip
13599 13:55:00.095186 arm64_za-ptrace_Set_VL_3376 pass
13600 13:55:00.095302 arm64_za-ptrace_Disabled_ZA_for_VL_3376 skip
13601 13:55:00.095420 arm64_za-ptrace_Get_and_set_data_for_VL_3376 skip
13602 13:55:00.095533 arm64_za-ptrace_Set_VL_3392 pass
13603 13:55:00.095651 arm64_za-ptrace_Disabled_ZA_for_VL_3392 skip
13604 13:55:00.095766 arm64_za-ptrace_Get_and_set_data_for_VL_3392 skip
13605 13:55:00.095882 arm64_za-ptrace_Set_VL_3408 pass
13606 13:55:00.095995 arm64_za-ptrace_Disabled_ZA_for_VL_3408 skip
13607 13:55:00.096109 arm64_za-ptrace_Get_and_set_data_for_VL_3408 skip
13608 13:55:00.096225 arm64_za-ptrace_Set_VL_3424 pass
13609 13:55:00.096339 arm64_za-ptrace_Disabled_ZA_for_VL_3424 skip
13610 13:55:00.096452 arm64_za-ptrace_Get_and_set_data_for_VL_3424 skip
13611 13:55:00.096565 arm64_za-ptrace_Set_VL_3440 pass
13612 13:55:00.099005 arm64_za-ptrace_Disabled_ZA_for_VL_3440 skip
13613 13:55:00.099188 arm64_za-ptrace_Get_and_set_data_for_VL_3440 skip
13614 13:55:00.099578 arm64_za-ptrace_Set_VL_3456 pass
13615 13:55:00.099776 arm64_za-ptrace_Disabled_ZA_for_VL_3456 skip
13616 13:55:00.100004 arm64_za-ptrace_Get_and_set_data_for_VL_3456 skip
13617 13:55:00.100221 arm64_za-ptrace_Set_VL_3472 pass
13618 13:55:00.100431 arm64_za-ptrace_Disabled_ZA_for_VL_3472 skip
13619 13:55:00.100688 arm64_za-ptrace_Get_and_set_data_for_VL_3472 skip
13620 13:55:00.100876 arm64_za-ptrace_Set_VL_3488 pass
13621 13:55:00.101043 arm64_za-ptrace_Disabled_ZA_for_VL_3488 skip
13622 13:55:00.101203 arm64_za-ptrace_Get_and_set_data_for_VL_3488 skip
13623 13:55:00.101370 arm64_za-ptrace_Set_VL_3504 pass
13624 13:55:00.101526 arm64_za-ptrace_Disabled_ZA_for_VL_3504 skip
13625 13:55:00.101689 arm64_za-ptrace_Get_and_set_data_for_VL_3504 skip
13626 13:55:00.101910 arm64_za-ptrace_Set_VL_3520 pass
13627 13:55:00.102074 arm64_za-ptrace_Disabled_ZA_for_VL_3520 skip
13628 13:55:00.102200 arm64_za-ptrace_Get_and_set_data_for_VL_3520 skip
13629 13:55:00.102403 arm64_za-ptrace_Set_VL_3536 pass
13630 13:55:00.102550 arm64_za-ptrace_Disabled_ZA_for_VL_3536 skip
13631 13:55:00.102687 arm64_za-ptrace_Get_and_set_data_for_VL_3536 skip
13632 13:55:00.102846 arm64_za-ptrace_Set_VL_3552 pass
13633 13:55:00.102967 arm64_za-ptrace_Disabled_ZA_for_VL_3552 skip
13634 13:55:00.103082 arm64_za-ptrace_Get_and_set_data_for_VL_3552 skip
13635 13:55:00.103198 arm64_za-ptrace_Set_VL_3568 pass
13636 13:55:00.103313 arm64_za-ptrace_Disabled_ZA_for_VL_3568 skip
13637 13:55:00.103430 arm64_za-ptrace_Get_and_set_data_for_VL_3568 skip
13638 13:55:00.103545 arm64_za-ptrace_Set_VL_3584 pass
13639 13:55:00.103659 arm64_za-ptrace_Disabled_ZA_for_VL_3584 skip
13640 13:55:00.103774 arm64_za-ptrace_Get_and_set_data_for_VL_3584 skip
13641 13:55:00.120487 arm64_za-ptrace_Set_VL_3600 pass
13642 13:55:00.120739 arm64_za-ptrace_Disabled_ZA_for_VL_3600 skip
13643 13:55:00.121191 arm64_za-ptrace_Get_and_set_data_for_VL_3600 skip
13644 13:55:00.121365 arm64_za-ptrace_Set_VL_3616 pass
13645 13:55:00.121524 arm64_za-ptrace_Disabled_ZA_for_VL_3616 skip
13646 13:55:00.121696 arm64_za-ptrace_Get_and_set_data_for_VL_3616 skip
13647 13:55:00.121857 arm64_za-ptrace_Set_VL_3632 pass
13648 13:55:00.122020 arm64_za-ptrace_Disabled_ZA_for_VL_3632 skip
13649 13:55:00.122223 arm64_za-ptrace_Get_and_set_data_for_VL_3632 skip
13650 13:55:00.122391 arm64_za-ptrace_Set_VL_3648 pass
13651 13:55:00.122548 arm64_za-ptrace_Disabled_ZA_for_VL_3648 skip
13652 13:55:00.122708 arm64_za-ptrace_Get_and_set_data_for_VL_3648 skip
13653 13:55:00.122896 arm64_za-ptrace_Set_VL_3664 pass
13654 13:55:00.123096 arm64_za-ptrace_Disabled_ZA_for_VL_3664 skip
13655 13:55:00.123277 arm64_za-ptrace_Get_and_set_data_for_VL_3664 skip
13656 13:55:00.123446 arm64_za-ptrace_Set_VL_3680 pass
13657 13:55:00.123610 arm64_za-ptrace_Disabled_ZA_for_VL_3680 skip
13658 13:55:00.123763 arm64_za-ptrace_Get_and_set_data_for_VL_3680 skip
13659 13:55:00.123952 arm64_za-ptrace_Set_VL_3696 pass
13660 13:55:00.124115 arm64_za-ptrace_Disabled_ZA_for_VL_3696 skip
13661 13:55:00.124271 arm64_za-ptrace_Get_and_set_data_for_VL_3696 skip
13662 13:55:00.124439 arm64_za-ptrace_Set_VL_3712 pass
13663 13:55:00.124578 arm64_za-ptrace_Disabled_ZA_for_VL_3712 skip
13664 13:55:00.124700 arm64_za-ptrace_Get_and_set_data_for_VL_3712 skip
13665 13:55:00.124828 arm64_za-ptrace_Set_VL_3728 pass
13666 13:55:00.124954 arm64_za-ptrace_Disabled_ZA_for_VL_3728 skip
13667 13:55:00.125081 arm64_za-ptrace_Get_and_set_data_for_VL_3728 skip
13668 13:55:00.125228 arm64_za-ptrace_Set_VL_3744 pass
13669 13:55:00.125394 arm64_za-ptrace_Disabled_ZA_for_VL_3744 skip
13670 13:55:00.125557 arm64_za-ptrace_Get_and_set_data_for_VL_3744 skip
13671 13:55:00.125730 arm64_za-ptrace_Set_VL_3760 pass
13672 13:55:00.125896 arm64_za-ptrace_Disabled_ZA_for_VL_3760 skip
13673 13:55:00.126057 arm64_za-ptrace_Get_and_set_data_for_VL_3760 skip
13674 13:55:00.126220 arm64_za-ptrace_Set_VL_3776 pass
13675 13:55:00.126424 arm64_za-ptrace_Disabled_ZA_for_VL_3776 skip
13676 13:55:00.126593 arm64_za-ptrace_Get_and_set_data_for_VL_3776 skip
13677 13:55:00.126786 arm64_za-ptrace_Set_VL_3792 pass
13678 13:55:00.126939 arm64_za-ptrace_Disabled_ZA_for_VL_3792 skip
13679 13:55:00.127057 arm64_za-ptrace_Get_and_set_data_for_VL_3792 skip
13680 13:55:00.127171 arm64_za-ptrace_Set_VL_3808 pass
13681 13:55:00.127284 arm64_za-ptrace_Disabled_ZA_for_VL_3808 skip
13682 13:55:00.127400 arm64_za-ptrace_Get_and_set_data_for_VL_3808 skip
13683 13:55:00.127513 arm64_za-ptrace_Set_VL_3824 pass
13684 13:55:00.127625 arm64_za-ptrace_Disabled_ZA_for_VL_3824 skip
13685 13:55:00.127739 arm64_za-ptrace_Get_and_set_data_for_VL_3824 skip
13686 13:55:00.127853 arm64_za-ptrace_Set_VL_3840 pass
13687 13:55:00.128184 arm64_za-ptrace_Disabled_ZA_for_VL_3840 skip
13688 13:55:00.128314 arm64_za-ptrace_Get_and_set_data_for_VL_3840 skip
13689 13:55:00.128436 arm64_za-ptrace_Set_VL_3856 pass
13690 13:55:00.128551 arm64_za-ptrace_Disabled_ZA_for_VL_3856 skip
13691 13:55:00.128666 arm64_za-ptrace_Get_and_set_data_for_VL_3856 skip
13692 13:55:00.128782 arm64_za-ptrace_Set_VL_3872 pass
13693 13:55:00.128898 arm64_za-ptrace_Disabled_ZA_for_VL_3872 skip
13694 13:55:00.129013 arm64_za-ptrace_Get_and_set_data_for_VL_3872 skip
13695 13:55:00.129126 arm64_za-ptrace_Set_VL_3888 pass
13696 13:55:00.129241 arm64_za-ptrace_Disabled_ZA_for_VL_3888 skip
13697 13:55:00.129355 arm64_za-ptrace_Get_and_set_data_for_VL_3888 skip
13698 13:55:00.129473 arm64_za-ptrace_Set_VL_3904 pass
13699 13:55:00.129588 arm64_za-ptrace_Disabled_ZA_for_VL_3904 skip
13700 13:55:00.129718 arm64_za-ptrace_Get_and_set_data_for_VL_3904 skip
13701 13:55:00.129835 arm64_za-ptrace_Set_VL_3920 pass
13702 13:55:00.131090 arm64_za-ptrace_Disabled_ZA_for_VL_3920 skip
13703 13:55:00.131295 arm64_za-ptrace_Get_and_set_data_for_VL_3920 skip
13704 13:55:00.131646 arm64_za-ptrace_Set_VL_3936 pass
13705 13:55:00.131751 arm64_za-ptrace_Disabled_ZA_for_VL_3936 skip
13706 13:55:00.131841 arm64_za-ptrace_Get_and_set_data_for_VL_3936 skip
13707 13:55:00.131928 arm64_za-ptrace_Set_VL_3952 pass
13708 13:55:00.132014 arm64_za-ptrace_Disabled_ZA_for_VL_3952 skip
13709 13:55:00.132116 arm64_za-ptrace_Get_and_set_data_for_VL_3952 skip
13710 13:55:00.132204 arm64_za-ptrace_Set_VL_3968 pass
13711 13:55:00.132289 arm64_za-ptrace_Disabled_ZA_for_VL_3968 skip
13712 13:55:00.132374 arm64_za-ptrace_Get_and_set_data_for_VL_3968 skip
13713 13:55:00.132480 arm64_za-ptrace_Set_VL_3984 pass
13714 13:55:00.132567 arm64_za-ptrace_Disabled_ZA_for_VL_3984 skip
13715 13:55:00.132669 arm64_za-ptrace_Get_and_set_data_for_VL_3984 skip
13716 13:55:00.132757 arm64_za-ptrace_Set_VL_4000 pass
13717 13:55:00.133232 arm64_za-ptrace_Disabled_ZA_for_VL_4000 skip
13718 13:55:00.133335 arm64_za-ptrace_Get_and_set_data_for_VL_4000 skip
13719 13:55:00.133421 arm64_za-ptrace_Set_VL_4016 pass
13720 13:55:00.133507 arm64_za-ptrace_Disabled_ZA_for_VL_4016 skip
13721 13:55:00.133590 arm64_za-ptrace_Get_and_set_data_for_VL_4016 skip
13722 13:55:00.133700 arm64_za-ptrace_Set_VL_4032 pass
13723 13:55:00.133789 arm64_za-ptrace_Disabled_ZA_for_VL_4032 skip
13724 13:55:00.133875 arm64_za-ptrace_Get_and_set_data_for_VL_4032 skip
13725 13:55:00.133966 arm64_za-ptrace_Set_VL_4048 pass
13726 13:55:00.134066 arm64_za-ptrace_Disabled_ZA_for_VL_4048 skip
13727 13:55:00.134154 arm64_za-ptrace_Get_and_set_data_for_VL_4048 skip
13728 13:55:00.134441 arm64_za-ptrace_Set_VL_4064 pass
13729 13:55:00.134544 arm64_za-ptrace_Disabled_ZA_for_VL_4064 skip
13730 13:55:00.134630 arm64_za-ptrace_Get_and_set_data_for_VL_4064 skip
13731 13:55:00.134713 arm64_za-ptrace_Set_VL_4080 pass
13732 13:55:00.134816 arm64_za-ptrace_Disabled_ZA_for_VL_4080 skip
13733 13:55:00.134907 arm64_za-ptrace_Get_and_set_data_for_VL_4080 skip
13734 13:55:00.134995 arm64_za-ptrace_Set_VL_4096 pass
13735 13:55:00.138902 arm64_za-ptrace_Disabled_ZA_for_VL_4096 skip
13736 13:55:00.139236 arm64_za-ptrace_Get_and_set_data_for_VL_4096 skip
13737 13:55:00.139335 arm64_za-ptrace_Set_VL_4112 pass
13738 13:55:00.139421 arm64_za-ptrace_Disabled_ZA_for_VL_4112 skip
13739 13:55:00.139522 arm64_za-ptrace_Get_and_set_data_for_VL_4112 skip
13740 13:55:00.139609 arm64_za-ptrace_Set_VL_4128 pass
13741 13:55:00.139711 arm64_za-ptrace_Disabled_ZA_for_VL_4128 skip
13742 13:55:00.139798 arm64_za-ptrace_Get_and_set_data_for_VL_4128 skip
13743 13:55:00.139901 arm64_za-ptrace_Set_VL_4144 pass
13744 13:55:00.140003 arm64_za-ptrace_Disabled_ZA_for_VL_4144 skip
13745 13:55:00.140105 arm64_za-ptrace_Get_and_set_data_for_VL_4144 skip
13746 13:55:00.140206 arm64_za-ptrace_Set_VL_4160 pass
13747 13:55:00.140307 arm64_za-ptrace_Disabled_ZA_for_VL_4160 skip
13748 13:55:00.140409 arm64_za-ptrace_Get_and_set_data_for_VL_4160 skip
13749 13:55:00.140510 arm64_za-ptrace_Set_VL_4176 pass
13750 13:55:00.140815 arm64_za-ptrace_Disabled_ZA_for_VL_4176 skip
13751 13:55:00.140916 arm64_za-ptrace_Get_and_set_data_for_VL_4176 skip
13752 13:55:00.141018 arm64_za-ptrace_Set_VL_4192 pass
13753 13:55:00.141106 arm64_za-ptrace_Disabled_ZA_for_VL_4192 skip
13754 13:55:00.141207 arm64_za-ptrace_Get_and_set_data_for_VL_4192 skip
13755 13:55:00.141505 arm64_za-ptrace_Set_VL_4208 pass
13756 13:55:00.141606 arm64_za-ptrace_Disabled_ZA_for_VL_4208 skip
13757 13:55:00.141718 arm64_za-ptrace_Get_and_set_data_for_VL_4208 skip
13758 13:55:00.141806 arm64_za-ptrace_Set_VL_4224 pass
13759 13:55:00.141906 arm64_za-ptrace_Disabled_ZA_for_VL_4224 skip
13760 13:55:00.142008 arm64_za-ptrace_Get_and_set_data_for_VL_4224 skip
13761 13:55:00.142106 arm64_za-ptrace_Set_VL_4240 pass
13762 13:55:00.142209 arm64_za-ptrace_Disabled_ZA_for_VL_4240 skip
13763 13:55:00.142511 arm64_za-ptrace_Get_and_set_data_for_VL_4240 skip
13764 13:55:00.142668 arm64_za-ptrace_Set_VL_4256 pass
13765 13:55:00.142785 arm64_za-ptrace_Disabled_ZA_for_VL_4256 skip
13766 13:55:00.142892 arm64_za-ptrace_Get_and_set_data_for_VL_4256 skip
13767 13:55:00.150948 arm64_za-ptrace_Set_VL_4272 pass
13768 13:55:00.151366 arm64_za-ptrace_Disabled_ZA_for_VL_4272 skip
13769 13:55:00.151567 arm64_za-ptrace_Get_and_set_data_for_VL_4272 skip
13770 13:55:00.151733 arm64_za-ptrace_Set_VL_4288 pass
13771 13:55:00.151917 arm64_za-ptrace_Disabled_ZA_for_VL_4288 skip
13772 13:55:00.152070 arm64_za-ptrace_Get_and_set_data_for_VL_4288 skip
13773 13:55:00.152206 arm64_za-ptrace_Set_VL_4304 pass
13774 13:55:00.152366 arm64_za-ptrace_Disabled_ZA_for_VL_4304 skip
13775 13:55:00.152527 arm64_za-ptrace_Get_and_set_data_for_VL_4304 skip
13776 13:55:00.152692 arm64_za-ptrace_Set_VL_4320 pass
13777 13:55:00.152889 arm64_za-ptrace_Disabled_ZA_for_VL_4320 skip
13778 13:55:00.153057 arm64_za-ptrace_Get_and_set_data_for_VL_4320 skip
13779 13:55:00.153216 arm64_za-ptrace_Set_VL_4336 pass
13780 13:55:00.153375 arm64_za-ptrace_Disabled_ZA_for_VL_4336 skip
13781 13:55:00.153508 arm64_za-ptrace_Get_and_set_data_for_VL_4336 skip
13782 13:55:00.153633 arm64_za-ptrace_Set_VL_4352 pass
13783 13:55:00.153792 arm64_za-ptrace_Disabled_ZA_for_VL_4352 skip
13784 13:55:00.153959 arm64_za-ptrace_Get_and_set_data_for_VL_4352 skip
13785 13:55:00.154129 arm64_za-ptrace_Set_VL_4368 pass
13786 13:55:00.154334 arm64_za-ptrace_Disabled_ZA_for_VL_4368 skip
13787 13:55:00.154505 arm64_za-ptrace_Get_and_set_data_for_VL_4368 skip
13788 13:55:00.154670 arm64_za-ptrace_Set_VL_4384 pass
13789 13:55:00.154836 arm64_za-ptrace_Disabled_ZA_for_VL_4384 skip
13790 13:55:00.154977 arm64_za-ptrace_Get_and_set_data_for_VL_4384 skip
13791 13:55:00.155097 arm64_za-ptrace_Set_VL_4400 pass
13792 13:55:00.155211 arm64_za-ptrace_Disabled_ZA_for_VL_4400 skip
13793 13:55:00.155325 arm64_za-ptrace_Get_and_set_data_for_VL_4400 skip
13794 13:55:00.155441 arm64_za-ptrace_Set_VL_4416 pass
13795 13:55:00.155555 arm64_za-ptrace_Disabled_ZA_for_VL_4416 skip
13796 13:55:00.155671 arm64_za-ptrace_Get_and_set_data_for_VL_4416 skip
13797 13:55:00.155786 arm64_za-ptrace_Set_VL_4432 pass
13798 13:55:00.155900 arm64_za-ptrace_Disabled_ZA_for_VL_4432 skip
13799 13:55:00.156013 arm64_za-ptrace_Get_and_set_data_for_VL_4432 skip
13800 13:55:00.156155 arm64_za-ptrace_Set_VL_4448 pass
13801 13:55:00.156275 arm64_za-ptrace_Disabled_ZA_for_VL_4448 skip
13802 13:55:00.156390 arm64_za-ptrace_Get_and_set_data_for_VL_4448 skip
13803 13:55:00.156509 arm64_za-ptrace_Set_VL_4464 pass
13804 13:55:00.158983 arm64_za-ptrace_Disabled_ZA_for_VL_4464 skip
13805 13:55:00.159357 arm64_za-ptrace_Get_and_set_data_for_VL_4464 skip
13806 13:55:00.159459 arm64_za-ptrace_Set_VL_4480 pass
13807 13:55:00.159546 arm64_za-ptrace_Disabled_ZA_for_VL_4480 skip
13808 13:55:00.159645 arm64_za-ptrace_Get_and_set_data_for_VL_4480 skip
13809 13:55:00.159733 arm64_za-ptrace_Set_VL_4496 pass
13810 13:55:00.159832 arm64_za-ptrace_Disabled_ZA_for_VL_4496 skip
13811 13:55:00.159918 arm64_za-ptrace_Get_and_set_data_for_VL_4496 skip
13812 13:55:00.160018 arm64_za-ptrace_Set_VL_4512 pass
13813 13:55:00.160104 arm64_za-ptrace_Disabled_ZA_for_VL_4512 skip
13814 13:55:00.160203 arm64_za-ptrace_Get_and_set_data_for_VL_4512 skip
13815 13:55:00.160289 arm64_za-ptrace_Set_VL_4528 pass
13816 13:55:00.160388 arm64_za-ptrace_Disabled_ZA_for_VL_4528 skip
13817 13:55:00.160722 arm64_za-ptrace_Get_and_set_data_for_VL_4528 skip
13818 13:55:00.160919 arm64_za-ptrace_Set_VL_4544 pass
13819 13:55:00.161083 arm64_za-ptrace_Disabled_ZA_for_VL_4544 skip
13820 13:55:00.161279 arm64_za-ptrace_Get_and_set_data_for_VL_4544 skip
13821 13:55:00.161430 arm64_za-ptrace_Set_VL_4560 pass
13822 13:55:00.161579 arm64_za-ptrace_Disabled_ZA_for_VL_4560 skip
13823 13:55:00.161741 arm64_za-ptrace_Get_and_set_data_for_VL_4560 skip
13824 13:55:00.161887 arm64_za-ptrace_Set_VL_4576 pass
13825 13:55:00.162089 arm64_za-ptrace_Disabled_ZA_for_VL_4576 skip
13826 13:55:00.162254 arm64_za-ptrace_Get_and_set_data_for_VL_4576 skip
13827 13:55:00.162376 arm64_za-ptrace_Set_VL_4592 pass
13828 13:55:00.162513 arm64_za-ptrace_Disabled_ZA_for_VL_4592 skip
13829 13:55:00.162662 arm64_za-ptrace_Get_and_set_data_for_VL_4592 skip
13830 13:55:00.162778 arm64_za-ptrace_Set_VL_4608 pass
13831 13:55:00.162891 arm64_za-ptrace_Disabled_ZA_for_VL_4608 skip
13832 13:55:00.163001 arm64_za-ptrace_Get_and_set_data_for_VL_4608 skip
13833 13:55:00.163139 arm64_za-ptrace_Set_VL_4624 pass
13834 13:55:00.177954 arm64_za-ptrace_Disabled_ZA_for_VL_4624 skip
13835 13:55:00.178105 arm64_za-ptrace_Get_and_set_data_for_VL_4624 skip
13836 13:55:00.178200 arm64_za-ptrace_Set_VL_4640 pass
13837 13:55:00.178302 arm64_za-ptrace_Disabled_ZA_for_VL_4640 skip
13838 13:55:00.178404 arm64_za-ptrace_Get_and_set_data_for_VL_4640 skip
13839 13:55:00.178492 arm64_za-ptrace_Set_VL_4656 pass
13840 13:55:00.178601 arm64_za-ptrace_Disabled_ZA_for_VL_4656 skip
13841 13:55:00.178715 arm64_za-ptrace_Get_and_set_data_for_VL_4656 skip
13842 13:55:00.179066 arm64_za-ptrace_Set_VL_4672 pass
13843 13:55:00.179292 arm64_za-ptrace_Disabled_ZA_for_VL_4672 skip
13844 13:55:00.179458 arm64_za-ptrace_Get_and_set_data_for_VL_4672 skip
13845 13:55:00.179624 arm64_za-ptrace_Set_VL_4688 pass
13846 13:55:00.179809 arm64_za-ptrace_Disabled_ZA_for_VL_4688 skip
13847 13:55:00.179967 arm64_za-ptrace_Get_and_set_data_for_VL_4688 skip
13848 13:55:00.180135 arm64_za-ptrace_Set_VL_4704 pass
13849 13:55:00.180303 arm64_za-ptrace_Disabled_ZA_for_VL_4704 skip
13850 13:55:00.180499 arm64_za-ptrace_Get_and_set_data_for_VL_4704 skip
13851 13:55:00.180674 arm64_za-ptrace_Set_VL_4720 pass
13852 13:55:00.180843 arm64_za-ptrace_Disabled_ZA_for_VL_4720 skip
13853 13:55:00.181007 arm64_za-ptrace_Get_and_set_data_for_VL_4720 skip
13854 13:55:00.181171 arm64_za-ptrace_Set_VL_4736 pass
13855 13:55:00.181334 arm64_za-ptrace_Disabled_ZA_for_VL_4736 skip
13856 13:55:00.181535 arm64_za-ptrace_Get_and_set_data_for_VL_4736 skip
13857 13:55:00.181719 arm64_za-ptrace_Set_VL_4752 pass
13858 13:55:00.181886 arm64_za-ptrace_Disabled_ZA_for_VL_4752 skip
13859 13:55:00.182055 arm64_za-ptrace_Get_and_set_data_for_VL_4752 skip
13860 13:55:00.182223 arm64_za-ptrace_Set_VL_4768 pass
13861 13:55:00.182372 arm64_za-ptrace_Disabled_ZA_for_VL_4768 skip
13862 13:55:00.182523 arm64_za-ptrace_Get_and_set_data_for_VL_4768 skip
13863 13:55:00.182752 arm64_za-ptrace_Set_VL_4784 pass
13864 13:55:00.182918 arm64_za-ptrace_Disabled_ZA_for_VL_4784 skip
13865 13:55:00.183040 arm64_za-ptrace_Get_and_set_data_for_VL_4784 skip
13866 13:55:00.183186 arm64_za-ptrace_Set_VL_4800 pass
13867 13:55:00.183308 arm64_za-ptrace_Disabled_ZA_for_VL_4800 skip
13868 13:55:00.183423 arm64_za-ptrace_Get_and_set_data_for_VL_4800 skip
13869 13:55:00.183536 arm64_za-ptrace_Set_VL_4816 pass
13870 13:55:00.183649 arm64_za-ptrace_Disabled_ZA_for_VL_4816 skip
13871 13:55:00.183759 arm64_za-ptrace_Get_and_set_data_for_VL_4816 skip
13872 13:55:00.183870 arm64_za-ptrace_Set_VL_4832 pass
13873 13:55:00.183983 arm64_za-ptrace_Disabled_ZA_for_VL_4832 skip
13874 13:55:00.184094 arm64_za-ptrace_Get_and_set_data_for_VL_4832 skip
13875 13:55:00.184205 arm64_za-ptrace_Set_VL_4848 pass
13876 13:55:00.184318 arm64_za-ptrace_Disabled_ZA_for_VL_4848 skip
13877 13:55:00.184429 arm64_za-ptrace_Get_and_set_data_for_VL_4848 skip
13878 13:55:00.186976 arm64_za-ptrace_Set_VL_4864 pass
13879 13:55:00.187326 arm64_za-ptrace_Disabled_ZA_for_VL_4864 skip
13880 13:55:00.187430 arm64_za-ptrace_Get_and_set_data_for_VL_4864 skip
13881 13:55:00.187515 arm64_za-ptrace_Set_VL_4880 pass
13882 13:55:00.187614 arm64_za-ptrace_Disabled_ZA_for_VL_4880 skip
13883 13:55:00.187699 arm64_za-ptrace_Get_and_set_data_for_VL_4880 skip
13884 13:55:00.187797 arm64_za-ptrace_Set_VL_4896 pass
13885 13:55:00.187894 arm64_za-ptrace_Disabled_ZA_for_VL_4896 skip
13886 13:55:00.187994 arm64_za-ptrace_Get_and_set_data_for_VL_4896 skip
13887 13:55:00.188290 arm64_za-ptrace_Set_VL_4912 pass
13888 13:55:00.188407 arm64_za-ptrace_Disabled_ZA_for_VL_4912 skip
13889 13:55:00.188705 arm64_za-ptrace_Get_and_set_data_for_VL_4912 skip
13890 13:55:00.188801 arm64_za-ptrace_Set_VL_4928 pass
13891 13:55:00.188888 arm64_za-ptrace_Disabled_ZA_for_VL_4928 skip
13892 13:55:00.189072 arm64_za-ptrace_Get_and_set_data_for_VL_4928 skip
13893 13:55:00.189167 arm64_za-ptrace_Set_VL_4944 pass
13894 13:55:00.189252 arm64_za-ptrace_Disabled_ZA_for_VL_4944 skip
13895 13:55:00.189352 arm64_za-ptrace_Get_and_set_data_for_VL_4944 skip
13896 13:55:00.189436 arm64_za-ptrace_Set_VL_4960 pass
13897 13:55:00.189543 arm64_za-ptrace_Disabled_ZA_for_VL_4960 skip
13898 13:55:00.189631 arm64_za-ptrace_Get_and_set_data_for_VL_4960 skip
13899 13:55:00.189987 arm64_za-ptrace_Set_VL_4976 pass
13900 13:55:00.190093 arm64_za-ptrace_Disabled_ZA_for_VL_4976 skip
13901 13:55:00.190383 arm64_za-ptrace_Get_and_set_data_for_VL_4976 skip
13902 13:55:00.190488 arm64_za-ptrace_Set_VL_4992 pass
13903 13:55:00.190577 arm64_za-ptrace_Disabled_ZA_for_VL_4992 skip
13904 13:55:00.190662 arm64_za-ptrace_Get_and_set_data_for_VL_4992 skip
13905 13:55:00.190760 arm64_za-ptrace_Set_VL_5008 pass
13906 13:55:00.190853 arm64_za-ptrace_Disabled_ZA_for_VL_5008 skip
13907 13:55:00.190958 arm64_za-ptrace_Get_and_set_data_for_VL_5008 skip
13908 13:55:00.194970 arm64_za-ptrace_Set_VL_5024 pass
13909 13:55:00.195335 arm64_za-ptrace_Disabled_ZA_for_VL_5024 skip
13910 13:55:00.195439 arm64_za-ptrace_Get_and_set_data_for_VL_5024 skip
13911 13:55:00.195532 arm64_za-ptrace_Set_VL_5040 pass
13912 13:55:00.195632 arm64_za-ptrace_Disabled_ZA_for_VL_5040 skip
13913 13:55:00.195718 arm64_za-ptrace_Get_and_set_data_for_VL_5040 skip
13914 13:55:00.195817 arm64_za-ptrace_Set_VL_5056 pass
13915 13:55:00.195919 arm64_za-ptrace_Disabled_ZA_for_VL_5056 skip
13916 13:55:00.196020 arm64_za-ptrace_Get_and_set_data_for_VL_5056 skip
13917 13:55:00.196307 arm64_za-ptrace_Set_VL_5072 pass
13918 13:55:00.196412 arm64_za-ptrace_Disabled_ZA_for_VL_5072 skip
13919 13:55:00.196510 arm64_za-ptrace_Get_and_set_data_for_VL_5072 skip
13920 13:55:00.196609 arm64_za-ptrace_Set_VL_5088 pass
13921 13:55:00.196926 arm64_za-ptrace_Disabled_ZA_for_VL_5088 skip
13922 13:55:00.197029 arm64_za-ptrace_Get_and_set_data_for_VL_5088 skip
13923 13:55:00.197116 arm64_za-ptrace_Set_VL_5104 pass
13924 13:55:00.197216 arm64_za-ptrace_Disabled_ZA_for_VL_5104 skip
13925 13:55:00.197317 arm64_za-ptrace_Get_and_set_data_for_VL_5104 skip
13926 13:55:00.197406 arm64_za-ptrace_Set_VL_5120 pass
13927 13:55:00.197505 arm64_za-ptrace_Disabled_ZA_for_VL_5120 skip
13928 13:55:00.197606 arm64_za-ptrace_Get_and_set_data_for_VL_5120 skip
13929 13:55:00.197717 arm64_za-ptrace_Set_VL_5136 pass
13930 13:55:00.198022 arm64_za-ptrace_Disabled_ZA_for_VL_5136 skip
13931 13:55:00.198136 arm64_za-ptrace_Get_and_set_data_for_VL_5136 skip
13932 13:55:00.198425 arm64_za-ptrace_Set_VL_5152 pass
13933 13:55:00.198532 arm64_za-ptrace_Disabled_ZA_for_VL_5152 skip
13934 13:55:00.198619 arm64_za-ptrace_Get_and_set_data_for_VL_5152 skip
13935 13:55:00.198716 arm64_za-ptrace_Set_VL_5168 pass
13936 13:55:00.198807 arm64_za-ptrace_Disabled_ZA_for_VL_5168 skip
13937 13:55:00.198911 arm64_za-ptrace_Get_and_set_data_for_VL_5168 skip
13938 13:55:00.203112 arm64_za-ptrace_Set_VL_5184 pass
13939 13:55:00.203255 arm64_za-ptrace_Disabled_ZA_for_VL_5184 skip
13940 13:55:00.203443 arm64_za-ptrace_Get_and_set_data_for_VL_5184 skip
13941 13:55:00.203583 arm64_za-ptrace_Set_VL_5200 pass
13942 13:55:00.203695 arm64_za-ptrace_Disabled_ZA_for_VL_5200 skip
13943 13:55:00.203867 arm64_za-ptrace_Get_and_set_data_for_VL_5200 skip
13944 13:55:00.204012 arm64_za-ptrace_Set_VL_5216 pass
13945 13:55:00.204142 arm64_za-ptrace_Disabled_ZA_for_VL_5216 skip
13946 13:55:00.204274 arm64_za-ptrace_Get_and_set_data_for_VL_5216 skip
13947 13:55:00.204392 arm64_za-ptrace_Set_VL_5232 pass
13948 13:55:00.204541 arm64_za-ptrace_Disabled_ZA_for_VL_5232 skip
13949 13:55:00.204660 arm64_za-ptrace_Get_and_set_data_for_VL_5232 skip
13950 13:55:00.204803 arm64_za-ptrace_Set_VL_5248 pass
13951 13:55:00.204936 arm64_za-ptrace_Disabled_ZA_for_VL_5248 skip
13952 13:55:00.205060 arm64_za-ptrace_Get_and_set_data_for_VL_5248 skip
13953 13:55:00.205181 arm64_za-ptrace_Set_VL_5264 pass
13954 13:55:00.205329 arm64_za-ptrace_Disabled_ZA_for_VL_5264 skip
13955 13:55:00.205455 arm64_za-ptrace_Get_and_set_data_for_VL_5264 skip
13956 13:55:00.205568 arm64_za-ptrace_Set_VL_5280 pass
13957 13:55:00.205689 arm64_za-ptrace_Disabled_ZA_for_VL_5280 skip
13958 13:55:00.205805 arm64_za-ptrace_Get_and_set_data_for_VL_5280 skip
13959 13:55:00.206161 arm64_za-ptrace_Set_VL_5296 pass
13960 13:55:00.206271 arm64_za-ptrace_Disabled_ZA_for_VL_5296 skip
13961 13:55:00.206396 arm64_za-ptrace_Get_and_set_data_for_VL_5296 skip
13962 13:55:00.206510 arm64_za-ptrace_Set_VL_5312 pass
13963 13:55:00.206620 arm64_za-ptrace_Disabled_ZA_for_VL_5312 skip
13964 13:55:00.206784 arm64_za-ptrace_Get_and_set_data_for_VL_5312 skip
13965 13:55:00.206931 arm64_za-ptrace_Set_VL_5328 pass
13966 13:55:00.207062 arm64_za-ptrace_Disabled_ZA_for_VL_5328 skip
13967 13:55:00.207170 arm64_za-ptrace_Get_and_set_data_for_VL_5328 skip
13968 13:55:00.207275 arm64_za-ptrace_Set_VL_5344 pass
13969 13:55:00.207380 arm64_za-ptrace_Disabled_ZA_for_VL_5344 skip
13970 13:55:00.207515 arm64_za-ptrace_Get_and_set_data_for_VL_5344 skip
13971 13:55:00.207617 arm64_za-ptrace_Set_VL_5360 pass
13972 13:55:00.207724 arm64_za-ptrace_Disabled_ZA_for_VL_5360 skip
13973 13:55:00.207831 arm64_za-ptrace_Get_and_set_data_for_VL_5360 skip
13974 13:55:00.207936 arm64_za-ptrace_Set_VL_5376 pass
13975 13:55:00.210958 arm64_za-ptrace_Disabled_ZA_for_VL_5376 skip
13976 13:55:00.211341 arm64_za-ptrace_Get_and_set_data_for_VL_5376 skip
13977 13:55:00.211499 arm64_za-ptrace_Set_VL_5392 pass
13978 13:55:00.211625 arm64_za-ptrace_Disabled_ZA_for_VL_5392 skip
13979 13:55:00.211741 arm64_za-ptrace_Get_and_set_data_for_VL_5392 skip
13980 13:55:00.212088 arm64_za-ptrace_Set_VL_5408 pass
13981 13:55:00.212235 arm64_za-ptrace_Disabled_ZA_for_VL_5408 skip
13982 13:55:00.212389 arm64_za-ptrace_Get_and_set_data_for_VL_5408 skip
13983 13:55:00.212549 arm64_za-ptrace_Set_VL_5424 pass
13984 13:55:00.212706 arm64_za-ptrace_Disabled_ZA_for_VL_5424 skip
13985 13:55:00.212863 arm64_za-ptrace_Get_and_set_data_for_VL_5424 skip
13986 13:55:00.213025 arm64_za-ptrace_Set_VL_5440 pass
13987 13:55:00.213158 arm64_za-ptrace_Disabled_ZA_for_VL_5440 skip
13988 13:55:00.213283 arm64_za-ptrace_Get_and_set_data_for_VL_5440 skip
13989 13:55:00.213435 arm64_za-ptrace_Set_VL_5456 pass
13990 13:55:00.213547 arm64_za-ptrace_Disabled_ZA_for_VL_5456 skip
13991 13:55:00.213627 arm64_za-ptrace_Get_and_set_data_for_VL_5456 skip
13992 13:55:00.213715 arm64_za-ptrace_Set_VL_5472 pass
13993 13:55:00.213793 arm64_za-ptrace_Disabled_ZA_for_VL_5472 skip
13994 13:55:00.213874 arm64_za-ptrace_Get_and_set_data_for_VL_5472 skip
13995 13:55:00.213981 arm64_za-ptrace_Set_VL_5488 pass
13996 13:55:00.214081 arm64_za-ptrace_Disabled_ZA_for_VL_5488 skip
13997 13:55:00.214179 arm64_za-ptrace_Get_and_set_data_for_VL_5488 skip
13998 13:55:00.214262 arm64_za-ptrace_Set_VL_5504 pass
13999 13:55:00.214366 arm64_za-ptrace_Disabled_ZA_for_VL_5504 skip
14000 13:55:00.214472 arm64_za-ptrace_Get_and_set_data_for_VL_5504 skip
14001 13:55:00.214562 arm64_za-ptrace_Set_VL_5520 pass
14002 13:55:00.214790 arm64_za-ptrace_Disabled_ZA_for_VL_5520 skip
14003 13:55:00.214876 arm64_za-ptrace_Get_and_set_data_for_VL_5520 skip
14004 13:55:00.214939 arm64_za-ptrace_Set_VL_5536 pass
14005 13:55:00.215000 arm64_za-ptrace_Disabled_ZA_for_VL_5536 skip
14006 13:55:00.215060 arm64_za-ptrace_Get_and_set_data_for_VL_5536 skip
14007 13:55:00.215120 arm64_za-ptrace_Set_VL_5552 pass
14008 13:55:00.215180 arm64_za-ptrace_Disabled_ZA_for_VL_5552 skip
14009 13:55:00.215241 arm64_za-ptrace_Get_and_set_data_for_VL_5552 skip
14010 13:55:00.215301 arm64_za-ptrace_Set_VL_5568 pass
14011 13:55:00.215361 arm64_za-ptrace_Disabled_ZA_for_VL_5568 skip
14012 13:55:00.215421 arm64_za-ptrace_Get_and_set_data_for_VL_5568 skip
14013 13:55:00.215481 arm64_za-ptrace_Set_VL_5584 pass
14014 13:55:00.218947 arm64_za-ptrace_Disabled_ZA_for_VL_5584 skip
14015 13:55:00.219256 arm64_za-ptrace_Get_and_set_data_for_VL_5584 skip
14016 13:55:00.219371 arm64_za-ptrace_Set_VL_5600 pass
14017 13:55:00.219461 arm64_za-ptrace_Disabled_ZA_for_VL_5600 skip
14018 13:55:00.219567 arm64_za-ptrace_Get_and_set_data_for_VL_5600 skip
14019 13:55:00.219672 arm64_za-ptrace_Set_VL_5616 pass
14020 13:55:00.219763 arm64_za-ptrace_Disabled_ZA_for_VL_5616 skip
14021 13:55:00.219869 arm64_za-ptrace_Get_and_set_data_for_VL_5616 skip
14022 13:55:00.219956 arm64_za-ptrace_Set_VL_5632 pass
14023 13:55:00.220055 arm64_za-ptrace_Disabled_ZA_for_VL_5632 skip
14024 13:55:00.220156 arm64_za-ptrace_Get_and_set_data_for_VL_5632 skip
14025 13:55:00.220255 arm64_za-ptrace_Set_VL_5648 pass
14026 13:55:00.235851 arm64_za-ptrace_Disabled_ZA_for_VL_5648 skip
14027 13:55:00.236014 arm64_za-ptrace_Get_and_set_data_for_VL_5648 skip
14028 13:55:00.236463 arm64_za-ptrace_Set_VL_5664 pass
14029 13:55:00.236630 arm64_za-ptrace_Disabled_ZA_for_VL_5664 skip
14030 13:55:00.236787 arm64_za-ptrace_Get_and_set_data_for_VL_5664 skip
14031 13:55:00.236936 arm64_za-ptrace_Set_VL_5680 pass
14032 13:55:00.237062 arm64_za-ptrace_Disabled_ZA_for_VL_5680 skip
14033 13:55:00.237245 arm64_za-ptrace_Get_and_set_data_for_VL_5680 skip
14034 13:55:00.237386 arm64_za-ptrace_Set_VL_5696 pass
14035 13:55:00.237513 arm64_za-ptrace_Disabled_ZA_for_VL_5696 skip
14036 13:55:00.237686 arm64_za-ptrace_Get_and_set_data_for_VL_5696 skip
14037 13:55:00.237846 arm64_za-ptrace_Set_VL_5712 pass
14038 13:55:00.238014 arm64_za-ptrace_Disabled_ZA_for_VL_5712 skip
14039 13:55:00.238190 arm64_za-ptrace_Get_and_set_data_for_VL_5712 skip
14040 13:55:00.238381 arm64_za-ptrace_Set_VL_5728 pass
14041 13:55:00.238545 arm64_za-ptrace_Disabled_ZA_for_VL_5728 skip
14042 13:55:00.238681 arm64_za-ptrace_Get_and_set_data_for_VL_5728 skip
14043 13:55:00.238805 arm64_za-ptrace_Set_VL_5744 pass
14044 13:55:00.238916 arm64_za-ptrace_Disabled_ZA_for_VL_5744 skip
14045 13:55:00.239007 arm64_za-ptrace_Get_and_set_data_for_VL_5744 skip
14046 13:55:00.239093 arm64_za-ptrace_Set_VL_5760 pass
14047 13:55:00.239201 arm64_za-ptrace_Disabled_ZA_for_VL_5760 skip
14048 13:55:00.239293 arm64_za-ptrace_Get_and_set_data_for_VL_5760 skip
14049 13:55:00.239380 arm64_za-ptrace_Set_VL_5776 pass
14050 13:55:00.239466 arm64_za-ptrace_Disabled_ZA_for_VL_5776 skip
14051 13:55:00.239553 arm64_za-ptrace_Get_and_set_data_for_VL_5776 skip
14052 13:55:00.239643 arm64_za-ptrace_Set_VL_5792 pass
14053 13:55:00.239728 arm64_za-ptrace_Disabled_ZA_for_VL_5792 skip
14054 13:55:00.242993 arm64_za-ptrace_Get_and_set_data_for_VL_5792 skip
14055 13:55:00.243402 arm64_za-ptrace_Set_VL_5808 pass
14056 13:55:00.243641 arm64_za-ptrace_Disabled_ZA_for_VL_5808 skip
14057 13:55:00.243847 arm64_za-ptrace_Get_and_set_data_for_VL_5808 skip
14058 13:55:00.244059 arm64_za-ptrace_Set_VL_5824 pass
14059 13:55:00.244308 arm64_za-ptrace_Disabled_ZA_for_VL_5824 skip
14060 13:55:00.244484 arm64_za-ptrace_Get_and_set_data_for_VL_5824 skip
14061 13:55:00.244696 arm64_za-ptrace_Set_VL_5840 pass
14062 13:55:00.244899 arm64_za-ptrace_Disabled_ZA_for_VL_5840 skip
14063 13:55:00.245080 arm64_za-ptrace_Get_and_set_data_for_VL_5840 skip
14064 13:55:00.245357 arm64_za-ptrace_Set_VL_5856 pass
14065 13:55:00.245619 arm64_za-ptrace_Disabled_ZA_for_VL_5856 skip
14066 13:55:00.246510 arm64_za-ptrace_Get_and_set_data_for_VL_5856 skip
14067 13:55:00.246708 arm64_za-ptrace_Set_VL_5872 pass
14068 13:55:00.246929 arm64_za-ptrace_Disabled_ZA_for_VL_5872 skip
14069 13:55:00.247068 arm64_za-ptrace_Get_and_set_data_for_VL_5872 skip
14070 13:55:00.247212 arm64_za-ptrace_Set_VL_5888 pass
14071 13:55:00.247355 arm64_za-ptrace_Disabled_ZA_for_VL_5888 skip
14072 13:55:00.247496 arm64_za-ptrace_Get_and_set_data_for_VL_5888 skip
14073 13:55:00.247638 arm64_za-ptrace_Set_VL_5904 pass
14074 13:55:00.247779 arm64_za-ptrace_Disabled_ZA_for_VL_5904 skip
14075 13:55:00.247921 arm64_za-ptrace_Get_and_set_data_for_VL_5904 skip
14076 13:55:00.248062 arm64_za-ptrace_Set_VL_5920 pass
14077 13:55:00.248203 arm64_za-ptrace_Disabled_ZA_for_VL_5920 skip
14078 13:55:00.248344 arm64_za-ptrace_Get_and_set_data_for_VL_5920 skip
14079 13:55:00.248484 arm64_za-ptrace_Set_VL_5936 pass
14080 13:55:00.248626 arm64_za-ptrace_Disabled_ZA_for_VL_5936 skip
14081 13:55:00.248767 arm64_za-ptrace_Get_and_set_data_for_VL_5936 skip
14082 13:55:00.248908 arm64_za-ptrace_Set_VL_5952 pass
14083 13:55:00.249049 arm64_za-ptrace_Disabled_ZA_for_VL_5952 skip
14084 13:55:00.249191 arm64_za-ptrace_Get_and_set_data_for_VL_5952 skip
14085 13:55:00.249332 arm64_za-ptrace_Set_VL_5968 pass
14086 13:55:00.249472 arm64_za-ptrace_Disabled_ZA_for_VL_5968 skip
14087 13:55:00.249612 arm64_za-ptrace_Get_and_set_data_for_VL_5968 skip
14088 13:55:00.249764 arm64_za-ptrace_Set_VL_5984 pass
14089 13:55:00.249904 arm64_za-ptrace_Disabled_ZA_for_VL_5984 skip
14090 13:55:00.250044 arm64_za-ptrace_Get_and_set_data_for_VL_5984 skip
14091 13:55:00.250183 arm64_za-ptrace_Set_VL_6000 pass
14092 13:55:00.250983 arm64_za-ptrace_Disabled_ZA_for_VL_6000 skip
14093 13:55:00.251370 arm64_za-ptrace_Get_and_set_data_for_VL_6000 skip
14094 13:55:00.251474 arm64_za-ptrace_Set_VL_6016 pass
14095 13:55:00.251560 arm64_za-ptrace_Disabled_ZA_for_VL_6016 skip
14096 13:55:00.251647 arm64_za-ptrace_Get_and_set_data_for_VL_6016 skip
14097 13:55:00.251746 arm64_za-ptrace_Set_VL_6032 pass
14098 13:55:00.251833 arm64_za-ptrace_Disabled_ZA_for_VL_6032 skip
14099 13:55:00.251920 arm64_za-ptrace_Get_and_set_data_for_VL_6032 skip
14100 13:55:00.252020 arm64_za-ptrace_Set_VL_6048 pass
14101 13:55:00.252120 arm64_za-ptrace_Disabled_ZA_for_VL_6048 skip
14102 13:55:00.252263 arm64_za-ptrace_Get_and_set_data_for_VL_6048 skip
14103 13:55:00.252526 arm64_za-ptrace_Set_VL_6064 pass
14104 13:55:00.252773 arm64_za-ptrace_Disabled_ZA_for_VL_6064 skip
14105 13:55:00.252991 arm64_za-ptrace_Get_and_set_data_for_VL_6064 skip
14106 13:55:00.253205 arm64_za-ptrace_Set_VL_6080 pass
14107 13:55:00.253379 arm64_za-ptrace_Disabled_ZA_for_VL_6080 skip
14108 13:55:00.253570 arm64_za-ptrace_Get_and_set_data_for_VL_6080 skip
14109 13:55:00.253834 arm64_za-ptrace_Set_VL_6096 pass
14110 13:55:00.254071 arm64_za-ptrace_Disabled_ZA_for_VL_6096 skip
14111 13:55:00.254303 arm64_za-ptrace_Get_and_set_data_for_VL_6096 skip
14112 13:55:00.254501 arm64_za-ptrace_Set_VL_6112 pass
14113 13:55:00.254689 arm64_za-ptrace_Disabled_ZA_for_VL_6112 skip
14114 13:55:00.254915 arm64_za-ptrace_Get_and_set_data_for_VL_6112 skip
14115 13:55:00.255067 arm64_za-ptrace_Set_VL_6128 pass
14116 13:55:00.255208 arm64_za-ptrace_Disabled_ZA_for_VL_6128 skip
14117 13:55:00.255349 arm64_za-ptrace_Get_and_set_data_for_VL_6128 skip
14118 13:55:00.255530 arm64_za-ptrace_Set_VL_6144 pass
14119 13:55:00.255665 arm64_za-ptrace_Disabled_ZA_for_VL_6144 skip
14120 13:55:00.255807 arm64_za-ptrace_Get_and_set_data_for_VL_6144 skip
14121 13:55:00.255948 arm64_za-ptrace_Set_VL_6160 pass
14122 13:55:00.256088 arm64_za-ptrace_Disabled_ZA_for_VL_6160 skip
14123 13:55:00.256227 arm64_za-ptrace_Get_and_set_data_for_VL_6160 skip
14124 13:55:00.256367 arm64_za-ptrace_Set_VL_6176 pass
14125 13:55:00.259030 arm64_za-ptrace_Disabled_ZA_for_VL_6176 skip
14126 13:55:00.259235 arm64_za-ptrace_Get_and_set_data_for_VL_6176 skip
14127 13:55:00.259644 arm64_za-ptrace_Set_VL_6192 pass
14128 13:55:00.259877 arm64_za-ptrace_Disabled_ZA_for_VL_6192 skip
14129 13:55:00.260051 arm64_za-ptrace_Get_and_set_data_for_VL_6192 skip
14130 13:55:00.260209 arm64_za-ptrace_Set_VL_6208 pass
14131 13:55:00.260405 arm64_za-ptrace_Disabled_ZA_for_VL_6208 skip
14132 13:55:00.260605 arm64_za-ptrace_Get_and_set_data_for_VL_6208 skip
14133 13:55:00.260791 arm64_za-ptrace_Set_VL_6224 pass
14134 13:55:00.260965 arm64_za-ptrace_Disabled_ZA_for_VL_6224 skip
14135 13:55:00.261191 arm64_za-ptrace_Get_and_set_data_for_VL_6224 skip
14136 13:55:00.261362 arm64_za-ptrace_Set_VL_6240 pass
14137 13:55:00.261535 arm64_za-ptrace_Disabled_ZA_for_VL_6240 skip
14138 13:55:00.261712 arm64_za-ptrace_Get_and_set_data_for_VL_6240 skip
14139 13:55:00.261873 arm64_za-ptrace_Set_VL_6256 pass
14140 13:55:00.262034 arm64_za-ptrace_Disabled_ZA_for_VL_6256 skip
14141 13:55:00.262193 arm64_za-ptrace_Get_and_set_data_for_VL_6256 skip
14142 13:55:00.262354 arm64_za-ptrace_Set_VL_6272 pass
14143 13:55:00.262517 arm64_za-ptrace_Disabled_ZA_for_VL_6272 skip
14144 13:55:00.262676 arm64_za-ptrace_Get_and_set_data_for_VL_6272 skip
14145 13:55:00.262842 arm64_za-ptrace_Set_VL_6288 pass
14146 13:55:00.262963 arm64_za-ptrace_Disabled_ZA_for_VL_6288 skip
14147 13:55:00.263077 arm64_za-ptrace_Get_and_set_data_for_VL_6288 skip
14148 13:55:00.263190 arm64_za-ptrace_Set_VL_6304 pass
14149 13:55:00.263301 arm64_za-ptrace_Disabled_ZA_for_VL_6304 skip
14150 13:55:00.263413 arm64_za-ptrace_Get_and_set_data_for_VL_6304 skip
14151 13:55:00.263525 arm64_za-ptrace_Set_VL_6320 pass
14152 13:55:00.263636 arm64_za-ptrace_Disabled_ZA_for_VL_6320 skip
14153 13:55:00.263747 arm64_za-ptrace_Get_and_set_data_for_VL_6320 skip
14154 13:55:00.263857 arm64_za-ptrace_Set_VL_6336 pass
14155 13:55:00.263968 arm64_za-ptrace_Disabled_ZA_for_VL_6336 skip
14156 13:55:00.264079 arm64_za-ptrace_Get_and_set_data_for_VL_6336 skip
14157 13:55:00.264189 arm64_za-ptrace_Set_VL_6352 pass
14158 13:55:00.264300 arm64_za-ptrace_Disabled_ZA_for_VL_6352 skip
14159 13:55:00.264411 arm64_za-ptrace_Get_and_set_data_for_VL_6352 skip
14160 13:55:00.267067 arm64_za-ptrace_Set_VL_6368 pass
14161 13:55:00.267266 arm64_za-ptrace_Disabled_ZA_for_VL_6368 skip
14162 13:55:00.267681 arm64_za-ptrace_Get_and_set_data_for_VL_6368 skip
14163 13:55:00.267849 arm64_za-ptrace_Set_VL_6384 pass
14164 13:55:00.267977 arm64_za-ptrace_Disabled_ZA_for_VL_6384 skip
14165 13:55:00.268313 arm64_za-ptrace_Get_and_set_data_for_VL_6384 skip
14166 13:55:00.268463 arm64_za-ptrace_Set_VL_6400 pass
14167 13:55:00.268611 arm64_za-ptrace_Disabled_ZA_for_VL_6400 skip
14168 13:55:00.268762 arm64_za-ptrace_Get_and_set_data_for_VL_6400 skip
14169 13:55:00.268915 arm64_za-ptrace_Set_VL_6416 pass
14170 13:55:00.269107 arm64_za-ptrace_Disabled_ZA_for_VL_6416 skip
14171 13:55:00.269271 arm64_za-ptrace_Get_and_set_data_for_VL_6416 skip
14172 13:55:00.269435 arm64_za-ptrace_Set_VL_6432 pass
14173 13:55:00.269588 arm64_za-ptrace_Disabled_ZA_for_VL_6432 skip
14174 13:55:00.269746 arm64_za-ptrace_Get_and_set_data_for_VL_6432 skip
14175 13:55:00.269904 arm64_za-ptrace_Set_VL_6448 pass
14176 13:55:00.270051 arm64_za-ptrace_Disabled_ZA_for_VL_6448 skip
14177 13:55:00.270224 arm64_za-ptrace_Get_and_set_data_for_VL_6448 skip
14178 13:55:00.270366 arm64_za-ptrace_Set_VL_6464 pass
14179 13:55:00.270483 arm64_za-ptrace_Disabled_ZA_for_VL_6464 skip
14180 13:55:00.270592 arm64_za-ptrace_Get_and_set_data_for_VL_6464 skip
14181 13:55:00.270710 arm64_za-ptrace_Set_VL_6480 pass
14182 13:55:00.270830 arm64_za-ptrace_Disabled_ZA_for_VL_6480 skip
14183 13:55:00.270920 arm64_za-ptrace_Get_and_set_data_for_VL_6480 skip
14184 13:55:00.271004 arm64_za-ptrace_Set_VL_6496 pass
14185 13:55:00.271110 arm64_za-ptrace_Disabled_ZA_for_VL_6496 skip
14186 13:55:00.271199 arm64_za-ptrace_Get_and_set_data_for_VL_6496 skip
14187 13:55:00.271283 arm64_za-ptrace_Set_VL_6512 pass
14188 13:55:00.271368 arm64_za-ptrace_Disabled_ZA_for_VL_6512 skip
14189 13:55:00.271452 arm64_za-ptrace_Get_and_set_data_for_VL_6512 skip
14190 13:55:00.271535 arm64_za-ptrace_Set_VL_6528 pass
14191 13:55:00.275259 arm64_za-ptrace_Disabled_ZA_for_VL_6528 skip
14192 13:55:00.275350 arm64_za-ptrace_Get_and_set_data_for_VL_6528 skip
14193 13:55:00.275429 arm64_za-ptrace_Set_VL_6544 pass
14194 13:55:00.275697 arm64_za-ptrace_Disabled_ZA_for_VL_6544 skip
14195 13:55:00.275797 arm64_za-ptrace_Get_and_set_data_for_VL_6544 skip
14196 13:55:00.275900 arm64_za-ptrace_Set_VL_6560 pass
14197 13:55:00.275987 arm64_za-ptrace_Disabled_ZA_for_VL_6560 skip
14198 13:55:00.276091 arm64_za-ptrace_Get_and_set_data_for_VL_6560 skip
14199 13:55:00.276175 arm64_za-ptrace_Set_VL_6576 pass
14200 13:55:00.276262 arm64_za-ptrace_Disabled_ZA_for_VL_6576 skip
14201 13:55:00.276358 arm64_za-ptrace_Get_and_set_data_for_VL_6576 skip
14202 13:55:00.276428 arm64_za-ptrace_Set_VL_6592 pass
14203 13:55:00.276502 arm64_za-ptrace_Disabled_ZA_for_VL_6592 skip
14204 13:55:00.276601 arm64_za-ptrace_Get_and_set_data_for_VL_6592 skip
14205 13:55:00.276693 arm64_za-ptrace_Set_VL_6608 pass
14206 13:55:00.276789 arm64_za-ptrace_Disabled_ZA_for_VL_6608 skip
14207 13:55:00.276875 arm64_za-ptrace_Get_and_set_data_for_VL_6608 skip
14208 13:55:00.276958 arm64_za-ptrace_Set_VL_6624 pass
14209 13:55:00.277057 arm64_za-ptrace_Disabled_ZA_for_VL_6624 skip
14210 13:55:00.277156 arm64_za-ptrace_Get_and_set_data_for_VL_6624 skip
14211 13:55:00.277253 arm64_za-ptrace_Set_VL_6640 pass
14212 13:55:00.277382 arm64_za-ptrace_Disabled_ZA_for_VL_6640 skip
14213 13:55:00.277495 arm64_za-ptrace_Get_and_set_data_for_VL_6640 skip
14214 13:55:00.277577 arm64_za-ptrace_Set_VL_6656 pass
14215 13:55:00.277637 arm64_za-ptrace_Disabled_ZA_for_VL_6656 skip
14216 13:55:00.277748 arm64_za-ptrace_Get_and_set_data_for_VL_6656 skip
14217 13:55:00.277866 arm64_za-ptrace_Set_VL_6672 pass
14218 13:55:00.278151 arm64_za-ptrace_Disabled_ZA_for_VL_6672 skip
14219 13:55:00.294907 arm64_za-ptrace_Get_and_set_data_for_VL_6672 skip
14220 13:55:00.295027 arm64_za-ptrace_Set_VL_6688 pass
14221 13:55:00.295151 arm64_za-ptrace_Disabled_ZA_for_VL_6688 skip
14222 13:55:00.295241 arm64_za-ptrace_Get_and_set_data_for_VL_6688 skip
14223 13:55:00.295339 arm64_za-ptrace_Set_VL_6704 pass
14224 13:55:00.295438 arm64_za-ptrace_Disabled_ZA_for_VL_6704 skip
14225 13:55:00.295773 arm64_za-ptrace_Get_and_set_data_for_VL_6704 skip
14226 13:55:00.295875 arm64_za-ptrace_Set_VL_6720 pass
14227 13:55:00.295984 arm64_za-ptrace_Disabled_ZA_for_VL_6720 skip
14228 13:55:00.296098 arm64_za-ptrace_Get_and_set_data_for_VL_6720 skip
14229 13:55:00.296185 arm64_za-ptrace_Set_VL_6736 pass
14230 13:55:00.296283 arm64_za-ptrace_Disabled_ZA_for_VL_6736 skip
14231 13:55:00.296657 arm64_za-ptrace_Get_and_set_data_for_VL_6736 skip
14232 13:55:00.296959 arm64_za-ptrace_Set_VL_6752 pass
14233 13:55:00.297181 arm64_za-ptrace_Disabled_ZA_for_VL_6752 skip
14234 13:55:00.297446 arm64_za-ptrace_Get_and_set_data_for_VL_6752 skip
14235 13:55:00.297687 arm64_za-ptrace_Set_VL_6768 pass
14236 13:55:00.297911 arm64_za-ptrace_Disabled_ZA_for_VL_6768 skip
14237 13:55:00.298134 arm64_za-ptrace_Get_and_set_data_for_VL_6768 skip
14238 13:55:00.298326 arm64_za-ptrace_Set_VL_6784 pass
14239 13:55:00.298498 arm64_za-ptrace_Disabled_ZA_for_VL_6784 skip
14240 13:55:00.298709 arm64_za-ptrace_Get_and_set_data_for_VL_6784 skip
14241 13:55:00.298889 arm64_za-ptrace_Set_VL_6800 pass
14242 13:55:00.299065 arm64_za-ptrace_Disabled_ZA_for_VL_6800 skip
14243 13:55:00.299211 arm64_za-ptrace_Get_and_set_data_for_VL_6800 skip
14244 13:55:00.299354 arm64_za-ptrace_Set_VL_6816 pass
14245 13:55:00.299495 arm64_za-ptrace_Disabled_ZA_for_VL_6816 skip
14246 13:55:00.299636 arm64_za-ptrace_Get_and_set_data_for_VL_6816 skip
14247 13:55:00.299777 arm64_za-ptrace_Set_VL_6832 pass
14248 13:55:00.299952 arm64_za-ptrace_Disabled_ZA_for_VL_6832 skip
14249 13:55:00.303070 arm64_za-ptrace_Get_and_set_data_for_VL_6832 skip
14250 13:55:00.303299 arm64_za-ptrace_Set_VL_6848 pass
14251 13:55:00.303624 arm64_za-ptrace_Disabled_ZA_for_VL_6848 skip
14252 13:55:00.303799 arm64_za-ptrace_Get_and_set_data_for_VL_6848 skip
14253 13:55:00.304004 arm64_za-ptrace_Set_VL_6864 pass
14254 13:55:00.304183 arm64_za-ptrace_Disabled_ZA_for_VL_6864 skip
14255 13:55:00.304336 arm64_za-ptrace_Get_and_set_data_for_VL_6864 skip
14256 13:55:00.304523 arm64_za-ptrace_Set_VL_6880 pass
14257 13:55:00.304720 arm64_za-ptrace_Disabled_ZA_for_VL_6880 skip
14258 13:55:00.304859 arm64_za-ptrace_Get_and_set_data_for_VL_6880 skip
14259 13:55:00.304981 arm64_za-ptrace_Set_VL_6896 pass
14260 13:55:00.305098 arm64_za-ptrace_Disabled_ZA_for_VL_6896 skip
14261 13:55:00.305217 arm64_za-ptrace_Get_and_set_data_for_VL_6896 skip
14262 13:55:00.305334 arm64_za-ptrace_Set_VL_6912 pass
14263 13:55:00.305452 arm64_za-ptrace_Disabled_ZA_for_VL_6912 skip
14264 13:55:00.305619 arm64_za-ptrace_Get_and_set_data_for_VL_6912 skip
14265 13:55:00.305810 arm64_za-ptrace_Set_VL_6928 pass
14266 13:55:00.305986 arm64_za-ptrace_Disabled_ZA_for_VL_6928 skip
14267 13:55:00.306132 arm64_za-ptrace_Get_and_set_data_for_VL_6928 skip
14268 13:55:00.306278 arm64_za-ptrace_Set_VL_6944 pass
14269 13:55:00.306442 arm64_za-ptrace_Disabled_ZA_for_VL_6944 skip
14270 13:55:00.306600 arm64_za-ptrace_Get_and_set_data_for_VL_6944 skip
14271 13:55:00.306721 arm64_za-ptrace_Set_VL_6960 pass
14272 13:55:00.306814 arm64_za-ptrace_Disabled_ZA_for_VL_6960 skip
14273 13:55:00.306902 arm64_za-ptrace_Get_and_set_data_for_VL_6960 skip
14274 13:55:00.306990 arm64_za-ptrace_Set_VL_6976 pass
14275 13:55:00.307151 arm64_za-ptrace_Disabled_ZA_for_VL_6976 skip
14276 13:55:00.307281 arm64_za-ptrace_Get_and_set_data_for_VL_6976 skip
14277 13:55:00.307404 arm64_za-ptrace_Set_VL_6992 pass
14278 13:55:00.307530 arm64_za-ptrace_Disabled_ZA_for_VL_6992 skip
14279 13:55:00.307659 arm64_za-ptrace_Get_and_set_data_for_VL_6992 skip
14280 13:55:00.307761 arm64_za-ptrace_Set_VL_7008 pass
14281 13:55:00.307849 arm64_za-ptrace_Disabled_ZA_for_VL_7008 skip
14282 13:55:00.307937 arm64_za-ptrace_Get_and_set_data_for_VL_7008 skip
14283 13:55:00.308024 arm64_za-ptrace_Set_VL_7024 pass
14284 13:55:00.308116 arm64_za-ptrace_Disabled_ZA_for_VL_7024 skip
14285 13:55:00.310984 arm64_za-ptrace_Get_and_set_data_for_VL_7024 skip
14286 13:55:00.311426 arm64_za-ptrace_Set_VL_7040 pass
14287 13:55:00.311528 arm64_za-ptrace_Disabled_ZA_for_VL_7040 skip
14288 13:55:00.311619 arm64_za-ptrace_Get_and_set_data_for_VL_7040 skip
14289 13:55:00.311708 arm64_za-ptrace_Set_VL_7056 pass
14290 13:55:00.311794 arm64_za-ptrace_Disabled_ZA_for_VL_7056 skip
14291 13:55:00.311898 arm64_za-ptrace_Get_and_set_data_for_VL_7056 skip
14292 13:55:00.311984 arm64_za-ptrace_Set_VL_7072 pass
14293 13:55:00.312071 arm64_za-ptrace_Disabled_ZA_for_VL_7072 skip
14294 13:55:00.312171 arm64_za-ptrace_Get_and_set_data_for_VL_7072 skip
14295 13:55:00.312258 arm64_za-ptrace_Set_VL_7088 pass
14296 13:55:00.312343 arm64_za-ptrace_Disabled_ZA_for_VL_7088 skip
14297 13:55:00.312445 arm64_za-ptrace_Get_and_set_data_for_VL_7088 skip
14298 13:55:00.312534 arm64_za-ptrace_Set_VL_7104 pass
14299 13:55:00.312618 arm64_za-ptrace_Disabled_ZA_for_VL_7104 skip
14300 13:55:00.312721 arm64_za-ptrace_Get_and_set_data_for_VL_7104 skip
14301 13:55:00.312810 arm64_za-ptrace_Set_VL_7120 pass
14302 13:55:00.312912 arm64_za-ptrace_Disabled_ZA_for_VL_7120 skip
14303 13:55:00.313012 arm64_za-ptrace_Get_and_set_data_for_VL_7120 skip
14304 13:55:00.313110 arm64_za-ptrace_Set_VL_7136 pass
14305 13:55:00.313215 arm64_za-ptrace_Disabled_ZA_for_VL_7136 skip
14306 13:55:00.313517 arm64_za-ptrace_Get_and_set_data_for_VL_7136 skip
14307 13:55:00.313613 arm64_za-ptrace_Set_VL_7152 pass
14308 13:55:00.313729 arm64_za-ptrace_Disabled_ZA_for_VL_7152 skip
14309 13:55:00.313828 arm64_za-ptrace_Get_and_set_data_for_VL_7152 skip
14310 13:55:00.313916 arm64_za-ptrace_Set_VL_7168 pass
14311 13:55:00.314017 arm64_za-ptrace_Disabled_ZA_for_VL_7168 skip
14312 13:55:00.314118 arm64_za-ptrace_Get_and_set_data_for_VL_7168 skip
14313 13:55:00.314207 arm64_za-ptrace_Set_VL_7184 pass
14314 13:55:00.314305 arm64_za-ptrace_Disabled_ZA_for_VL_7184 skip
14315 13:55:00.314407 arm64_za-ptrace_Get_and_set_data_for_VL_7184 skip
14316 13:55:00.314510 arm64_za-ptrace_Set_VL_7200 pass
14317 13:55:00.314795 arm64_za-ptrace_Disabled_ZA_for_VL_7200 skip
14318 13:55:00.314891 arm64_za-ptrace_Get_and_set_data_for_VL_7200 skip
14319 13:55:00.314980 arm64_za-ptrace_Set_VL_7216 pass
14320 13:55:00.319045 arm64_za-ptrace_Disabled_ZA_for_VL_7216 skip
14321 13:55:00.319286 arm64_za-ptrace_Get_and_set_data_for_VL_7216 skip
14322 13:55:00.319582 arm64_za-ptrace_Set_VL_7232 pass
14323 13:55:00.319680 arm64_za-ptrace_Disabled_ZA_for_VL_7232 skip
14324 13:55:00.319771 arm64_za-ptrace_Get_and_set_data_for_VL_7232 skip
14325 13:55:00.319853 arm64_za-ptrace_Set_VL_7248 pass
14326 13:55:00.319954 arm64_za-ptrace_Disabled_ZA_for_VL_7248 skip
14327 13:55:00.320041 arm64_za-ptrace_Get_and_set_data_for_VL_7248 skip
14328 13:55:00.320128 arm64_za-ptrace_Set_VL_7264 pass
14329 13:55:00.320229 arm64_za-ptrace_Disabled_ZA_for_VL_7264 skip
14330 13:55:00.320333 arm64_za-ptrace_Get_and_set_data_for_VL_7264 skip
14331 13:55:00.320434 arm64_za-ptrace_Set_VL_7280 pass
14332 13:55:00.320523 arm64_za-ptrace_Disabled_ZA_for_VL_7280 skip
14333 13:55:00.320621 arm64_za-ptrace_Get_and_set_data_for_VL_7280 skip
14334 13:55:00.320721 arm64_za-ptrace_Set_VL_7296 pass
14335 13:55:00.320816 arm64_za-ptrace_Disabled_ZA_for_VL_7296 skip
14336 13:55:00.320920 arm64_za-ptrace_Get_and_set_data_for_VL_7296 skip
14337 13:55:00.321019 arm64_za-ptrace_Set_VL_7312 pass
14338 13:55:00.321120 arm64_za-ptrace_Disabled_ZA_for_VL_7312 skip
14339 13:55:00.321440 arm64_za-ptrace_Get_and_set_data_for_VL_7312 skip
14340 13:55:00.321549 arm64_za-ptrace_Set_VL_7328 pass
14341 13:55:00.321834 arm64_za-ptrace_Disabled_ZA_for_VL_7328 skip
14342 13:55:00.321930 arm64_za-ptrace_Get_and_set_data_for_VL_7328 skip
14343 13:55:00.322017 arm64_za-ptrace_Set_VL_7344 pass
14344 13:55:00.322098 arm64_za-ptrace_Disabled_ZA_for_VL_7344 skip
14345 13:55:00.322196 arm64_za-ptrace_Get_and_set_data_for_VL_7344 skip
14346 13:55:00.322294 arm64_za-ptrace_Set_VL_7360 pass
14347 13:55:00.322415 arm64_za-ptrace_Disabled_ZA_for_VL_7360 skip
14348 13:55:00.322509 arm64_za-ptrace_Get_and_set_data_for_VL_7360 skip
14349 13:55:00.322597 arm64_za-ptrace_Set_VL_7376 pass
14350 13:55:00.322699 arm64_za-ptrace_Disabled_ZA_for_VL_7376 skip
14351 13:55:00.322788 arm64_za-ptrace_Get_and_set_data_for_VL_7376 skip
14352 13:55:00.322873 arm64_za-ptrace_Set_VL_7392 pass
14353 13:55:00.322973 arm64_za-ptrace_Disabled_ZA_for_VL_7392 skip
14354 13:55:00.327015 arm64_za-ptrace_Get_and_set_data_for_VL_7392 skip
14355 13:55:00.327465 arm64_za-ptrace_Set_VL_7408 pass
14356 13:55:00.327563 arm64_za-ptrace_Disabled_ZA_for_VL_7408 skip
14357 13:55:00.327652 arm64_za-ptrace_Get_and_set_data_for_VL_7408 skip
14358 13:55:00.327741 arm64_za-ptrace_Set_VL_7424 pass
14359 13:55:00.327846 arm64_za-ptrace_Disabled_ZA_for_VL_7424 skip
14360 13:55:00.327935 arm64_za-ptrace_Get_and_set_data_for_VL_7424 skip
14361 13:55:00.328024 arm64_za-ptrace_Set_VL_7440 pass
14362 13:55:00.328128 arm64_za-ptrace_Disabled_ZA_for_VL_7440 skip
14363 13:55:00.328217 arm64_za-ptrace_Get_and_set_data_for_VL_7440 skip
14364 13:55:00.328306 arm64_za-ptrace_Set_VL_7456 pass
14365 13:55:00.328408 arm64_za-ptrace_Disabled_ZA_for_VL_7456 skip
14366 13:55:00.328495 arm64_za-ptrace_Get_and_set_data_for_VL_7456 skip
14367 13:55:00.328599 arm64_za-ptrace_Set_VL_7472 pass
14368 13:55:00.328686 arm64_za-ptrace_Disabled_ZA_for_VL_7472 skip
14369 13:55:00.328786 arm64_za-ptrace_Get_and_set_data_for_VL_7472 skip
14370 13:55:00.328876 arm64_za-ptrace_Set_VL_7488 pass
14371 13:55:00.328976 arm64_za-ptrace_Disabled_ZA_for_VL_7488 skip
14372 13:55:00.329061 arm64_za-ptrace_Get_and_set_data_for_VL_7488 skip
14373 13:55:00.329162 arm64_za-ptrace_Set_VL_7504 pass
14374 13:55:00.329262 arm64_za-ptrace_Disabled_ZA_for_VL_7504 skip
14375 13:55:00.329364 arm64_za-ptrace_Get_and_set_data_for_VL_7504 skip
14376 13:55:00.329656 arm64_za-ptrace_Set_VL_7520 pass
14377 13:55:00.329748 arm64_za-ptrace_Disabled_ZA_for_VL_7520 skip
14378 13:55:00.329832 arm64_za-ptrace_Get_and_set_data_for_VL_7520 skip
14379 13:55:00.329932 arm64_za-ptrace_Set_VL_7536 pass
14380 13:55:00.330018 arm64_za-ptrace_Disabled_ZA_for_VL_7536 skip
14381 13:55:00.330116 arm64_za-ptrace_Get_and_set_data_for_VL_7536 skip
14382 13:55:00.330216 arm64_za-ptrace_Set_VL_7552 pass
14383 13:55:00.330316 arm64_za-ptrace_Disabled_ZA_for_VL_7552 skip
14384 13:55:00.330611 arm64_za-ptrace_Get_and_set_data_for_VL_7552 skip
14385 13:55:00.330708 arm64_za-ptrace_Set_VL_7568 pass
14386 13:55:00.330813 arm64_za-ptrace_Disabled_ZA_for_VL_7568 skip
14387 13:55:00.330904 arm64_za-ptrace_Get_and_set_data_for_VL_7568 skip
14388 13:55:00.334974 arm64_za-ptrace_Set_VL_7584 pass
14389 13:55:00.335433 arm64_za-ptrace_Disabled_ZA_for_VL_7584 skip
14390 13:55:00.335644 arm64_za-ptrace_Get_and_set_data_for_VL_7584 skip
14391 13:55:00.335816 arm64_za-ptrace_Set_VL_7600 pass
14392 13:55:00.335946 arm64_za-ptrace_Disabled_ZA_for_VL_7600 skip
14393 13:55:00.336079 arm64_za-ptrace_Get_and_set_data_for_VL_7600 skip
14394 13:55:00.336182 arm64_za-ptrace_Set_VL_7616 pass
14395 13:55:00.336324 arm64_za-ptrace_Disabled_ZA_for_VL_7616 skip
14396 13:55:00.336432 arm64_za-ptrace_Get_and_set_data_for_VL_7616 skip
14397 13:55:00.336584 arm64_za-ptrace_Set_VL_7632 pass
14398 13:55:00.336727 arm64_za-ptrace_Disabled_ZA_for_VL_7632 skip
14399 13:55:00.336894 arm64_za-ptrace_Get_and_set_data_for_VL_7632 skip
14400 13:55:00.337002 arm64_za-ptrace_Set_VL_7648 pass
14401 13:55:00.337098 arm64_za-ptrace_Disabled_ZA_for_VL_7648 skip
14402 13:55:00.337193 arm64_za-ptrace_Get_and_set_data_for_VL_7648 skip
14403 13:55:00.337285 arm64_za-ptrace_Set_VL_7664 pass
14404 13:55:00.337376 arm64_za-ptrace_Disabled_ZA_for_VL_7664 skip
14405 13:55:00.337468 arm64_za-ptrace_Get_and_set_data_for_VL_7664 skip
14406 13:55:00.337583 arm64_za-ptrace_Set_VL_7680 pass
14407 13:55:00.337737 arm64_za-ptrace_Disabled_ZA_for_VL_7680 skip
14408 13:55:00.337864 arm64_za-ptrace_Get_and_set_data_for_VL_7680 skip
14409 13:55:00.337990 arm64_za-ptrace_Set_VL_7696 pass
14410 13:55:00.338118 arm64_za-ptrace_Disabled_ZA_for_VL_7696 skip
14411 13:55:00.359579 arm64_za-ptrace_Get_and_set_data_for_VL_7696 skip
14412 13:55:00.359840 arm64_za-ptrace_Set_VL_7712 pass
14413 13:55:00.360212 arm64_za-ptrace_Disabled_ZA_for_VL_7712 skip
14414 13:55:00.360344 arm64_za-ptrace_Get_and_set_data_for_VL_7712 skip
14415 13:55:00.360487 arm64_za-ptrace_Set_VL_7728 pass
14416 13:55:00.360635 arm64_za-ptrace_Disabled_ZA_for_VL_7728 skip
14417 13:55:00.360797 arm64_za-ptrace_Get_and_set_data_for_VL_7728 skip
14418 13:55:00.360909 arm64_za-ptrace_Set_VL_7744 pass
14419 13:55:00.361041 arm64_za-ptrace_Disabled_ZA_for_VL_7744 skip
14420 13:55:00.361174 arm64_za-ptrace_Get_and_set_data_for_VL_7744 skip
14421 13:55:00.361316 arm64_za-ptrace_Set_VL_7760 pass
14422 13:55:00.361453 arm64_za-ptrace_Disabled_ZA_for_VL_7760 skip
14423 13:55:00.361624 arm64_za-ptrace_Get_and_set_data_for_VL_7760 skip
14424 13:55:00.361777 arm64_za-ptrace_Set_VL_7776 pass
14425 13:55:00.361912 arm64_za-ptrace_Disabled_ZA_for_VL_7776 skip
14426 13:55:00.362051 arm64_za-ptrace_Get_and_set_data_for_VL_7776 skip
14427 13:55:00.362219 arm64_za-ptrace_Set_VL_7792 pass
14428 13:55:00.362384 arm64_za-ptrace_Disabled_ZA_for_VL_7792 skip
14429 13:55:00.362589 arm64_za-ptrace_Get_and_set_data_for_VL_7792 skip
14430 13:55:00.362744 arm64_za-ptrace_Set_VL_7808 pass
14431 13:55:00.362893 arm64_za-ptrace_Disabled_ZA_for_VL_7808 skip
14432 13:55:00.363023 arm64_za-ptrace_Get_and_set_data_for_VL_7808 skip
14433 13:55:00.363133 arm64_za-ptrace_Set_VL_7824 pass
14434 13:55:00.363244 arm64_za-ptrace_Disabled_ZA_for_VL_7824 skip
14435 13:55:00.363407 arm64_za-ptrace_Get_and_set_data_for_VL_7824 skip
14436 13:55:00.363561 arm64_za-ptrace_Set_VL_7840 pass
14437 13:55:00.363732 arm64_za-ptrace_Disabled_ZA_for_VL_7840 skip
14438 13:55:00.366922 arm64_za-ptrace_Get_and_set_data_for_VL_7840 skip
14439 13:55:00.367273 arm64_za-ptrace_Set_VL_7856 pass
14440 13:55:00.367362 arm64_za-ptrace_Disabled_ZA_for_VL_7856 skip
14441 13:55:00.367453 arm64_za-ptrace_Get_and_set_data_for_VL_7856 skip
14442 13:55:00.367733 arm64_za-ptrace_Set_VL_7872 pass
14443 13:55:00.367827 arm64_za-ptrace_Disabled_ZA_for_VL_7872 skip
14444 13:55:00.367929 arm64_za-ptrace_Get_and_set_data_for_VL_7872 skip
14445 13:55:00.368021 arm64_za-ptrace_Set_VL_7888 pass
14446 13:55:00.368123 arm64_za-ptrace_Disabled_ZA_for_VL_7888 skip
14447 13:55:00.368198 arm64_za-ptrace_Get_and_set_data_for_VL_7888 skip
14448 13:55:00.368262 arm64_za-ptrace_Set_VL_7904 pass
14449 13:55:00.368339 arm64_za-ptrace_Disabled_ZA_for_VL_7904 skip
14450 13:55:00.368404 arm64_za-ptrace_Get_and_set_data_for_VL_7904 skip
14451 13:55:00.368469 arm64_za-ptrace_Set_VL_7920 pass
14452 13:55:00.368575 arm64_za-ptrace_Disabled_ZA_for_VL_7920 skip
14453 13:55:00.368676 arm64_za-ptrace_Get_and_set_data_for_VL_7920 skip
14454 13:55:00.368804 arm64_za-ptrace_Set_VL_7936 pass
14455 13:55:00.368900 arm64_za-ptrace_Disabled_ZA_for_VL_7936 skip
14456 13:55:00.368989 arm64_za-ptrace_Get_and_set_data_for_VL_7936 skip
14457 13:55:00.369056 arm64_za-ptrace_Set_VL_7952 pass
14458 13:55:00.369133 arm64_za-ptrace_Disabled_ZA_for_VL_7952 skip
14459 13:55:00.369392 arm64_za-ptrace_Get_and_set_data_for_VL_7952 skip
14460 13:55:00.369464 arm64_za-ptrace_Set_VL_7968 pass
14461 13:55:00.369542 arm64_za-ptrace_Disabled_ZA_for_VL_7968 skip
14462 13:55:00.369607 arm64_za-ptrace_Get_and_set_data_for_VL_7968 skip
14463 13:55:00.369727 arm64_za-ptrace_Set_VL_7984 pass
14464 13:55:00.369837 arm64_za-ptrace_Disabled_ZA_for_VL_7984 skip
14465 13:55:00.369924 arm64_za-ptrace_Get_and_set_data_for_VL_7984 skip
14466 13:55:00.370000 arm64_za-ptrace_Set_VL_8000 pass
14467 13:55:00.370277 arm64_za-ptrace_Disabled_ZA_for_VL_8000 skip
14468 13:55:00.370360 arm64_za-ptrace_Get_and_set_data_for_VL_8000 skip
14469 13:55:00.370484 arm64_za-ptrace_Set_VL_8016 pass
14470 13:55:00.370589 arm64_za-ptrace_Disabled_ZA_for_VL_8016 skip
14471 13:55:00.370707 arm64_za-ptrace_Get_and_set_data_for_VL_8016 skip
14472 13:55:00.370807 arm64_za-ptrace_Set_VL_8032 pass
14473 13:55:00.370894 arm64_za-ptrace_Disabled_ZA_for_VL_8032 skip
14474 13:55:00.375134 arm64_za-ptrace_Get_and_set_data_for_VL_8032 skip
14475 13:55:00.375381 arm64_za-ptrace_Set_VL_8048 pass
14476 13:55:00.375694 arm64_za-ptrace_Disabled_ZA_for_VL_8048 skip
14477 13:55:00.375798 arm64_za-ptrace_Get_and_set_data_for_VL_8048 skip
14478 13:55:00.375889 arm64_za-ptrace_Set_VL_8064 pass
14479 13:55:00.375975 arm64_za-ptrace_Disabled_ZA_for_VL_8064 skip
14480 13:55:00.376064 arm64_za-ptrace_Get_and_set_data_for_VL_8064 skip
14481 13:55:00.376170 arm64_za-ptrace_Set_VL_8080 pass
14482 13:55:00.376260 arm64_za-ptrace_Disabled_ZA_for_VL_8080 skip
14483 13:55:00.376351 arm64_za-ptrace_Get_and_set_data_for_VL_8080 skip
14484 13:55:00.376436 arm64_za-ptrace_Set_VL_8096 pass
14485 13:55:00.376524 arm64_za-ptrace_Disabled_ZA_for_VL_8096 skip
14486 13:55:00.376628 arm64_za-ptrace_Get_and_set_data_for_VL_8096 skip
14487 13:55:00.376719 arm64_za-ptrace_Set_VL_8112 pass
14488 13:55:00.376805 arm64_za-ptrace_Disabled_ZA_for_VL_8112 skip
14489 13:55:00.376911 arm64_za-ptrace_Get_and_set_data_for_VL_8112 skip
14490 13:55:00.377002 arm64_za-ptrace_Set_VL_8128 pass
14491 13:55:00.377084 arm64_za-ptrace_Disabled_ZA_for_VL_8128 skip
14492 13:55:00.377180 arm64_za-ptrace_Get_and_set_data_for_VL_8128 skip
14493 13:55:00.377280 arm64_za-ptrace_Set_VL_8144 pass
14494 13:55:00.377367 arm64_za-ptrace_Disabled_ZA_for_VL_8144 skip
14495 13:55:00.377465 arm64_za-ptrace_Get_and_set_data_for_VL_8144 skip
14496 13:55:00.377567 arm64_za-ptrace_Set_VL_8160 pass
14497 13:55:00.377664 arm64_za-ptrace_Disabled_ZA_for_VL_8160 skip
14498 13:55:00.377777 arm64_za-ptrace_Get_and_set_data_for_VL_8160 skip
14499 13:55:00.378092 arm64_za-ptrace_Set_VL_8176 pass
14500 13:55:00.378204 arm64_za-ptrace_Disabled_ZA_for_VL_8176 skip
14501 13:55:00.378312 arm64_za-ptrace_Get_and_set_data_for_VL_8176 skip
14502 13:55:00.378404 arm64_za-ptrace_Set_VL_8192 pass
14503 13:55:00.378504 arm64_za-ptrace_Disabled_ZA_for_VL_8192 skip
14504 13:55:00.378587 arm64_za-ptrace_Get_and_set_data_for_VL_8192 skip
14505 13:55:00.378689 arm64_za-ptrace pass
14506 13:55:00.382981 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory pass
14507 13:55:00.383443 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory pass
14508 13:55:00.383582 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory pass
14509 13:55:00.383895 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory pass
14510 13:55:00.384022 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory fail
14511 13:55:00.384341 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory fail
14512 13:55:00.384464 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14513 13:55:00.384778 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory pass
14514 13:55:00.385088 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory pass
14515 13:55:00.385401 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14516 13:55:00.385693 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory fail
14517 13:55:00.385817 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory fail
14518 13:55:00.386147 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory pass
14519 13:55:00.386607 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory fail
14520 13:55:00.386706 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory fail
14521 13:55:00.391076 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory pass
14522 13:55:00.391614 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory pass
14523 13:55:00.391825 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14524 13:55:00.392030 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory pass
14525 13:55:00.392205 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14526 13:55:00.392403 arm64_check_buffer_fill fail
14527 13:55:00.392567 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14528 13:55:00.392766 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14529 13:55:00.393289 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14530 13:55:00.393426 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14531 13:55:00.393700 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14532 13:55:00.393821 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14533 13:55:00.394213 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14534 13:55:00.394446 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14535 13:55:00.394643 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14536 13:55:00.394807 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14537 13:55:00.399221 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14538 13:55:00.399538 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14539 13:55:00.399641 arm64_check_child_memory fail
14540 13:55:00.399743 arm64_check_gcr_el1_cswitch fail
14541 13:55:00.399829 arm64_check_ksm_options fail
14542 13:55:00.400122 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off pass
14543 13:55:00.400578 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14544 13:55:00.400989 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off pass
14545 13:55:00.401204 arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14546 13:55:00.401442 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14547 13:55:00.404815 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14548 13:55:00.405309 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14549 13:55:00.405586 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14550 13:55:00.405824 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14551 13:55:00.406052 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14552 13:55:00.406509 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14553 13:55:00.406741 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14554 13:55:00.407190 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14555 13:55:00.407425 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14556 13:55:00.407627 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14557 13:55:00.408100 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14558 13:55:00.408345 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14559 13:55:00.408887 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14560 13:55:00.409088 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14561 13:55:00.409281 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14562 13:55:00.409501 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory fail
14563 13:55:00.409964 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory fail
14564 13:55:00.410161 arm64_check_mmap_options fail
14565 13:55:00.410408 arm64_check_prctl_check_basic_read pass
14566 13:55:00.410598 arm64_check_prctl_NONE pass
14567 13:55:00.410818 arm64_check_prctl_SYNC pass
14568 13:55:00.411007 arm64_check_prctl_ASYNC pass
14569 13:55:00.411181 arm64_check_prctl_SYNC_ASYNC pass
14570 13:55:00.411362 arm64_check_prctl pass
14571 13:55:00.411500 arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode fail
14572 13:55:00.418942 arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode fail
14573 13:55:00.419423 arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode pass
14574 13:55:00.419698 arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode fail
14575 13:55:00.419879 arm64_check_tags_inclusion fail
14576 13:55:00.420084 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14577 13:55:00.420254 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14578 13:55:00.420420 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14579 13:55:00.420613 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14580 13:55:00.420763 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14581 13:55:00.420955 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14582 13:55:00.421141 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14583 13:55:00.421343 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14584 13:55:00.421591 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14585 13:55:00.421819 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14586 13:55:00.422021 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14587 13:55:00.422455 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14588 13:55:00.422659 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14589 13:55:00.422854 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14590 13:55:00.426949 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14591 13:55:00.427408 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14592 13:55:00.427611 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14593 13:55:00.427810 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14594 13:55:00.428233 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14595 13:55:00.428438 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14596 13:55:00.428632 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14597 13:55:00.428805 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14598 13:55:00.429011 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14599 13:55:00.429188 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14600 13:55:00.429401 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14601 13:55:00.429571 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14602 13:55:00.429782 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14603 13:55:00.430227 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14604 13:55:00.430331 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14605 13:55:00.430421 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14606 13:55:00.430732 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14607 13:55:00.431052 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14608 13:55:00.435056 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14609 13:55:00.435398 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14610 13:55:00.435502 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14611 13:55:00.435602 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14612 13:55:00.435946 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14613 13:55:00.436173 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14614 13:55:00.436364 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14615 13:55:00.436862 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14616 13:55:00.437097 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14617 13:55:00.437297 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14618 13:55:00.437491 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14619 13:55:00.437699 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14620 13:55:00.437983 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14621 13:55:00.438187 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14622 13:55:00.438374 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14623 13:55:00.438575 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14624 13:55:00.438839 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14625 13:55:00.442986 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14626 13:55:00.443435 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14627 13:55:00.443638 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14628 13:55:00.443829 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14629 13:55:00.443991 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14630 13:55:00.444175 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14631 13:55:00.444358 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14632 13:55:00.444544 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14633 13:55:00.444728 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14634 13:55:00.444912 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14635 13:55:00.445553 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14636 13:55:00.445794 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14637 13:55:00.445961 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14638 13:55:00.458527 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14639 13:55:00.458999 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14640 13:55:00.459225 arm64_check_user_mem pass
14641 13:55:00.459447 arm64_btitest_nohint_func_call_using_br_x0 pass
14642 13:55:00.459669 arm64_btitest_nohint_func_call_using_br_x16 pass
14643 13:55:00.459893 arm64_btitest_nohint_func_call_using_blr pass
14644 13:55:00.460170 arm64_btitest_bti_none_func_call_using_br_x0 pass
14645 13:55:00.460348 arm64_btitest_bti_none_func_call_using_br_x16 pass
14646 13:55:00.460481 arm64_btitest_bti_none_func_call_using_blr pass
14647 13:55:00.460602 arm64_btitest_bti_c_func_call_using_br_x0 pass
14648 13:55:00.460746 arm64_btitest_bti_c_func_call_using_br_x16 pass
14649 13:55:00.461700 arm64_btitest_bti_c_func_call_using_blr pass
14650 13:55:00.461875 arm64_btitest_bti_j_func_call_using_br_x0 pass
14651 13:55:00.462000 arm64_btitest_bti_j_func_call_using_br_x16 pass
14652 13:55:00.462116 arm64_btitest_bti_j_func_call_using_blr pass
14653 13:55:00.462230 arm64_btitest_bti_jc_func_call_using_br_x0 pass
14654 13:55:00.462553 arm64_btitest_bti_jc_func_call_using_br_x16 pass
14655 13:55:00.462674 arm64_btitest_bti_jc_func_call_using_blr pass
14656 13:55:00.462772 arm64_btitest_paciasp_func_call_using_br_x0 pass
14657 13:55:00.462865 arm64_btitest_paciasp_func_call_using_br_x16 pass
14658 13:55:00.462956 arm64_btitest_paciasp_func_call_using_blr pass
14659 13:55:00.463048 arm64_btitest pass
14660 13:55:00.463160 arm64_nobtitest_nohint_func_call_using_br_x0 pass
14661 13:55:00.467028 arm64_nobtitest_nohint_func_call_using_br_x16 pass
14662 13:55:00.467437 arm64_nobtitest_nohint_func_call_using_blr pass
14663 13:55:00.467572 arm64_nobtitest_bti_none_func_call_using_br_x0 pass
14664 13:55:00.467688 arm64_nobtitest_bti_none_func_call_using_br_x16 pass
14665 13:55:00.467828 arm64_nobtitest_bti_none_func_call_using_blr pass
14666 13:55:00.467946 arm64_nobtitest_bti_c_func_call_using_br_x0 pass
14667 13:55:00.468094 arm64_nobtitest_bti_c_func_call_using_br_x16 pass
14668 13:55:00.468288 arm64_nobtitest_bti_c_func_call_using_blr pass
14669 13:55:00.468477 arm64_nobtitest_bti_j_func_call_using_br_x0 pass
14670 13:55:00.468685 arm64_nobtitest_bti_j_func_call_using_br_x16 pass
14671 13:55:00.468865 arm64_nobtitest_bti_j_func_call_using_blr pass
14672 13:55:00.469087 arm64_nobtitest_bti_jc_func_call_using_br_x0 pass
14673 13:55:00.469289 arm64_nobtitest_bti_jc_func_call_using_br_x16 pass
14674 13:55:00.469491 arm64_nobtitest_bti_jc_func_call_using_blr pass
14675 13:55:00.469703 arm64_nobtitest_paciasp_func_call_using_br_x0 pass
14676 13:55:00.469892 arm64_nobtitest_paciasp_func_call_using_br_x16 pass
14677 13:55:00.470058 arm64_nobtitest_paciasp_func_call_using_blr pass
14678 13:55:00.470225 arm64_nobtitest pass
14679 13:55:00.470391 arm64_hwcap_cpuinfo_match_RNG pass
14680 13:55:00.470595 arm64_hwcap_sigill_RNG pass
14681 13:55:00.470764 arm64_hwcap_cpuinfo_match_SME pass
14682 13:55:00.470887 arm64_hwcap_sigill_SME pass
14683 13:55:00.471002 arm64_hwcap_cpuinfo_match_SVE pass
14684 13:55:00.471116 arm64_hwcap_sigill_SVE pass
14685 13:55:00.471246 arm64_hwcap_cpuinfo_match_SVE_2 pass
14686 13:55:00.471390 arm64_hwcap_sigill_SVE_2 pass
14687 13:55:00.471506 arm64_hwcap_cpuinfo_match_SVE_AES pass
14688 13:55:00.471619 arm64_hwcap_sigill_SVE_AES pass
14689 13:55:00.471730 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
14690 13:55:00.471847 arm64_hwcap_sigill_SVE2_PMULL pass
14691 13:55:00.471962 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
14692 13:55:00.472074 arm64_hwcap_sigill_SVE2_BITPERM pass
14693 13:55:00.472190 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
14694 13:55:00.472300 arm64_hwcap_sigill_SVE2_SHA3 pass
14695 13:55:00.472411 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
14696 13:55:00.472522 arm64_hwcap_sigill_SVE2_SM4 pass
14697 13:55:00.472633 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
14698 13:55:00.472776 arm64_hwcap_sigill_SVE2_I8MM pass
14699 13:55:00.474966 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
14700 13:55:00.475470 arm64_hwcap_sigill_SVE2_F32MM pass
14701 13:55:00.475672 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
14702 13:55:00.475836 arm64_hwcap_sigill_SVE2_F64MM pass
14703 13:55:00.475996 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
14704 13:55:00.476208 arm64_hwcap_sigill_SVE2_BF16 pass
14705 13:55:00.476398 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
14706 13:55:00.476576 arm64_hwcap_sigill_SVE2_EBF16 skip
14707 13:55:00.476773 arm64_hwcap pass
14708 13:55:00.476949 arm64_ptrace_read_tpidr_one pass
14709 13:55:00.477084 arm64_ptrace_write_tpidr_one pass
14710 13:55:00.477213 arm64_ptrace_verify_tpidr_one pass
14711 13:55:00.477338 arm64_ptrace_count_tpidrs pass
14712 13:55:00.477463 arm64_ptrace_tpidr2_write pass
14713 13:55:00.477664 arm64_ptrace_tpidr2_read pass
14714 13:55:00.477834 arm64_ptrace_write_tpidr_only pass
14715 13:55:00.477992 arm64_ptrace pass
14716 13:55:00.478149 arm64_syscall-abi_getpid_FPSIMD pass
14717 13:55:00.478296 arm64_syscall-abi_getpid_SVE_VL_256 pass
14718 13:55:00.478456 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA pass
14719 13:55:00.478625 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM pass
14720 13:55:00.478799 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA pass
14721 13:55:00.478949 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA pass
14722 13:55:00.479070 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM pass
14723 13:55:00.479186 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA pass
14724 13:55:00.479337 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA pass
14725 13:55:00.479461 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM pass
14726 13:55:00.479578 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA pass
14727 13:55:00.479693 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA pass
14728 13:55:00.479810 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM pass
14729 13:55:00.479927 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA pass
14730 13:55:00.480045 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA pass
14731 13:55:00.480161 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM pass
14732 13:55:00.480277 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA pass
14733 13:55:00.480395 arm64_syscall-abi_getpid_SVE_VL_240 pass
14734 13:55:00.480511 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA pass
14735 13:55:00.480627 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM pass
14736 13:55:00.480744 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA pass
14737 13:55:00.483074 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA pass
14738 13:55:00.483535 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM pass
14739 13:55:00.483731 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA pass
14740 13:55:00.483894 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA pass
14741 13:55:00.484047 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM pass
14742 13:55:00.484190 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA pass
14743 13:55:00.484326 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA pass
14744 13:55:00.484463 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM pass
14745 13:55:00.484625 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA pass
14746 13:55:00.484822 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA pass
14747 13:55:00.484988 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM pass
14748 13:55:00.485151 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA pass
14749 13:55:00.485310 arm64_syscall-abi_getpid_SVE_VL_224 pass
14750 13:55:00.485468 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA pass
14751 13:55:00.485669 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM pass
14752 13:55:00.485838 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA pass
14753 13:55:00.486006 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA pass
14754 13:55:00.486182 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM pass
14755 13:55:00.486345 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA pass
14756 13:55:00.486512 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA pass
14757 13:55:00.486717 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM pass
14758 13:55:00.486848 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA pass
14759 13:55:00.486965 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA pass
14760 13:55:00.487080 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM pass
14761 13:55:00.487196 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA pass
14762 13:55:00.487311 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA pass
14763 13:55:00.487427 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM pass
14764 13:55:00.487541 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA pass
14765 13:55:00.491102 arm64_syscall-abi_getpid_SVE_VL_208 pass
14766 13:55:00.491561 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA pass
14767 13:55:00.491745 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM pass
14768 13:55:00.491913 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA pass
14769 13:55:00.492080 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA pass
14770 13:55:00.492273 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM pass
14771 13:55:00.492440 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA pass
14772 13:55:00.492604 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA pass
14773 13:55:00.492766 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM pass
14774 13:55:00.492957 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA pass
14775 13:55:00.493121 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA pass
14776 13:55:00.493282 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM pass
14777 13:55:00.493433 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA pass
14778 13:55:00.493623 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA pass
14779 13:55:00.493802 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM pass
14780 13:55:00.493967 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA pass
14781 13:55:00.494165 arm64_syscall-abi_getpid_SVE_VL_192 pass
14782 13:55:00.494374 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA pass
14783 13:55:00.494596 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM pass
14784 13:55:00.494775 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA pass
14785 13:55:00.494964 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA pass
14786 13:55:00.495089 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM pass
14787 13:55:00.495209 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA pass
14788 13:55:00.495324 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA pass
14789 13:55:00.495438 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM pass
14790 13:55:00.495551 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA pass
14791 13:55:00.495665 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA pass
14792 13:55:00.495776 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM pass
14793 13:55:00.495889 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA pass
14794 13:55:00.499128 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA pass
14795 13:55:00.499545 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM pass
14796 13:55:00.499681 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA pass
14797 13:55:00.499882 arm64_syscall-abi_getpid_SVE_VL_176 pass
14798 13:55:00.500121 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA pass
14799 13:55:00.500293 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM pass
14800 13:55:00.500459 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA pass
14801 13:55:00.500634 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA pass
14802 13:55:00.500832 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM pass
14803 13:55:00.500992 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA pass
14804 13:55:00.501114 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA pass
14805 13:55:00.501229 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM pass
14806 13:55:00.501413 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA pass
14807 13:55:00.501566 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA pass
14808 13:55:00.513011 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM pass
14809 13:55:00.513330 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA pass
14810 13:55:00.513507 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA pass
14811 13:55:00.513894 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM pass
14812 13:55:00.514008 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA pass
14813 13:55:00.514102 arm64_syscall-abi_getpid_SVE_VL_160 pass
14814 13:55:00.514188 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA pass
14815 13:55:00.514280 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM pass
14816 13:55:00.514363 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA pass
14817 13:55:00.514447 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA pass
14818 13:55:00.514550 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM pass
14819 13:55:00.514639 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA pass
14820 13:55:00.514724 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA pass
14821 13:55:00.514809 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM pass
14822 13:55:00.514894 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA pass
14823 13:55:00.514997 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA pass
14824 13:55:00.515085 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM pass
14825 13:55:00.515168 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA pass
14826 13:55:00.515267 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA pass
14827 13:55:00.515355 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM pass
14828 13:55:00.515438 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA pass
14829 13:55:00.515542 arm64_syscall-abi_getpid_SVE_VL_144 pass
14830 13:55:00.515627 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA pass
14831 13:55:00.515727 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM pass
14832 13:55:00.515829 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA pass
14833 13:55:00.515931 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA pass
14834 13:55:00.516016 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM pass
14835 13:55:00.516118 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA pass
14836 13:55:00.516225 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA pass
14837 13:55:00.516556 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM pass
14838 13:55:00.516657 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA pass
14839 13:55:00.516751 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA pass
14840 13:55:00.516836 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM pass
14841 13:55:00.516933 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA pass
14842 13:55:00.517033 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA pass
14843 13:55:00.517132 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM pass
14844 13:55:00.517217 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA pass
14845 13:55:00.517660 arm64_syscall-abi_getpid_SVE_VL_128 pass
14846 13:55:00.517762 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA pass
14847 13:55:00.517850 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM pass
14848 13:55:00.517933 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA pass
14849 13:55:00.518209 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA pass
14850 13:55:00.518304 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM pass
14851 13:55:00.518391 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA pass
14852 13:55:00.518476 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA pass
14853 13:55:00.518559 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM pass
14854 13:55:00.518659 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA pass
14855 13:55:00.518747 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA pass
14856 13:55:00.518832 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM pass
14857 13:55:00.518917 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA pass
14858 13:55:00.519018 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA pass
14859 13:55:00.523066 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM pass
14860 13:55:00.523485 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA pass
14861 13:55:00.523672 arm64_syscall-abi_getpid_SVE_VL_112 pass
14862 13:55:00.523831 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA pass
14863 13:55:00.524011 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM pass
14864 13:55:00.524168 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA pass
14865 13:55:00.524350 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA pass
14866 13:55:00.524506 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM pass
14867 13:55:00.524656 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA pass
14868 13:55:00.524807 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA pass
14869 13:55:00.524985 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM pass
14870 13:55:00.525142 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA pass
14871 13:55:00.525298 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA pass
14872 13:55:00.525488 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM pass
14873 13:55:00.525644 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA pass
14874 13:55:00.525816 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA pass
14875 13:55:00.525980 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM pass
14876 13:55:00.526147 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA pass
14877 13:55:00.526319 arm64_syscall-abi_getpid_SVE_VL_96 pass
14878 13:55:00.526519 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA pass
14879 13:55:00.526731 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM pass
14880 13:55:00.526962 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA pass
14881 13:55:00.527105 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA pass
14882 13:55:00.527223 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM pass
14883 13:55:00.527337 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA pass
14884 13:55:00.527449 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA pass
14885 13:55:00.527599 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM pass
14886 13:55:00.527720 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA pass
14887 13:55:00.527835 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA pass
14888 13:55:00.527950 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM pass
14889 13:55:00.528064 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA pass
14890 13:55:00.528177 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA pass
14891 13:55:00.528289 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM pass
14892 13:55:00.528402 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA pass
14893 13:55:00.528513 arm64_syscall-abi_getpid_SVE_VL_80 pass
14894 13:55:00.528625 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA pass
14895 13:55:00.528740 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM pass
14896 13:55:00.529068 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA pass
14897 13:55:00.531036 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA pass
14898 13:55:00.531254 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM pass
14899 13:55:00.531661 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA pass
14900 13:55:00.531768 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA pass
14901 13:55:00.531857 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM pass
14902 13:55:00.531946 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA pass
14903 13:55:00.532034 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA pass
14904 13:55:00.532143 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM pass
14905 13:55:00.532237 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA pass
14906 13:55:00.532326 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA pass
14907 13:55:00.532432 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM pass
14908 13:55:00.532522 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA pass
14909 13:55:00.532610 arm64_syscall-abi_getpid_SVE_VL_64 pass
14910 13:55:00.532700 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA pass
14911 13:55:00.532807 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM pass
14912 13:55:00.532897 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA pass
14913 13:55:00.532983 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA pass
14914 13:55:00.533069 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM pass
14915 13:55:00.533157 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA pass
14916 13:55:00.533268 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA pass
14917 13:55:00.533359 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM pass
14918 13:55:00.533448 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA pass
14919 13:55:00.533535 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA pass
14920 13:55:00.533639 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM pass
14921 13:55:00.533740 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA pass
14922 13:55:00.533828 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA pass
14923 13:55:00.533932 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM pass
14924 13:55:00.534018 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA pass
14925 13:55:00.534117 arm64_syscall-abi_getpid_SVE_VL_48 pass
14926 13:55:00.534203 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA pass
14927 13:55:00.534302 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM pass
14928 13:55:00.534391 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA pass
14929 13:55:00.534491 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA pass
14930 13:55:00.534750 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM pass
14931 13:55:00.534879 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA pass
14932 13:55:00.538965 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA pass
14933 13:55:00.539326 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM pass
14934 13:55:00.539431 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA pass
14935 13:55:00.539518 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA pass
14936 13:55:00.539616 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM pass
14937 13:55:00.539703 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA pass
14938 13:55:00.539804 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA pass
14939 13:55:00.539893 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM pass
14940 13:55:00.539996 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA pass
14941 13:55:00.540085 arm64_syscall-abi_getpid_SVE_VL_32 pass
14942 13:55:00.540200 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA pass
14943 13:55:00.540298 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM pass
14944 13:55:00.540400 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA pass
14945 13:55:00.540506 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA pass
14946 13:55:00.540853 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM pass
14947 13:55:00.541093 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA pass
14948 13:55:00.541289 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA pass
14949 13:55:00.541466 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM pass
14950 13:55:00.541698 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA pass
14951 13:55:00.541922 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA pass
14952 13:55:00.542122 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM pass
14953 13:55:00.542283 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA pass
14954 13:55:00.542416 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA pass
14955 13:55:00.542565 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM pass
14956 13:55:00.542731 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA pass
14957 13:55:00.542879 arm64_syscall-abi_getpid_SVE_VL_16 pass
14958 13:55:00.542997 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA pass
14959 13:55:00.543113 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM pass
14960 13:55:00.561793 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA pass
14961 13:55:00.562041 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA pass
14962 13:55:00.562352 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM pass
14963 13:55:00.562462 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA pass
14964 13:55:00.562555 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA pass
14965 13:55:00.562661 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM pass
14966 13:55:00.562756 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA pass
14967 13:55:00.562847 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA pass
14968 13:55:00.562922 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM pass
14969 13:55:00.563008 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA pass
14970 13:55:00.563091 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA pass
14971 13:55:00.563182 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM pass
14972 13:55:00.563263 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA pass
14973 13:55:00.563337 arm64_syscall-abi_sched_yield_FPSIMD pass
14974 13:55:00.563426 arm64_syscall-abi_sched_yield_SVE_VL_256 pass
14975 13:55:00.563520 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA pass
14976 13:55:00.563611 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM pass
14977 13:55:00.563728 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA pass
14978 13:55:00.563844 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA pass
14979 13:55:00.564167 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM pass
14980 13:55:00.564288 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA pass
14981 13:55:00.564403 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA pass
14982 13:55:00.564498 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM pass
14983 13:55:00.564605 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA pass
14984 13:55:00.564713 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA pass
14985 13:55:00.564820 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM pass
14986 13:55:00.565166 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA pass
14987 13:55:00.565273 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA pass
14988 13:55:00.565371 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM pass
14989 13:55:00.565453 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA pass
14990 13:55:00.565533 arm64_syscall-abi_sched_yield_SVE_VL_240 pass
14991 13:55:00.565809 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA pass
14992 13:55:00.565905 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM pass
14993 13:55:00.566001 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA pass
14994 13:55:00.566084 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA pass
14995 13:55:00.566165 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM pass
14996 13:55:00.566482 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA pass
14997 13:55:00.566575 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA pass
14998 13:55:00.566661 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM pass
14999 13:55:00.570905 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA pass
15000 13:55:00.571244 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA pass
15001 13:55:00.571338 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM pass
15002 13:55:00.571415 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA pass
15003 13:55:00.571484 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA pass
15004 13:55:00.571740 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM pass
15005 13:55:00.571813 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA pass
15006 13:55:00.571895 arm64_syscall-abi_sched_yield_SVE_VL_224 pass
15007 13:55:00.571964 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA pass
15008 13:55:00.572046 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM pass
15009 13:55:00.572319 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA pass
15010 13:55:00.572405 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA pass
15011 13:55:00.572532 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM pass
15012 13:55:00.572632 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA pass
15013 13:55:00.572719 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA pass
15014 13:55:00.572804 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM pass
15015 13:55:00.573087 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA pass
15016 13:55:00.573186 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA pass
15017 13:55:00.573281 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM pass
15018 13:55:00.573388 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA pass
15019 13:55:00.573500 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA pass
15020 13:55:00.573792 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM pass
15021 13:55:00.573899 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA pass
15022 13:55:00.574005 arm64_syscall-abi_sched_yield_SVE_VL_208 pass
15023 13:55:00.574091 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA pass
15024 13:55:00.574193 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM pass
15025 13:55:00.574294 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA pass
15026 13:55:00.574412 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA pass
15027 13:55:00.574730 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM pass
15028 13:55:00.574837 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA pass
15029 13:55:00.578918 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA pass
15030 13:55:00.579246 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM pass
15031 13:55:00.579373 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA pass
15032 13:55:00.579476 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA pass
15033 13:55:00.579572 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM pass
15034 13:55:00.579673 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA pass
15035 13:55:00.579768 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA pass
15036 13:55:00.579863 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM pass
15037 13:55:00.580153 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA pass
15038 13:55:00.580249 arm64_syscall-abi_sched_yield_SVE_VL_192 pass
15039 13:55:00.580374 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA pass
15040 13:55:00.580456 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM pass
15041 13:55:00.580534 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA pass
15042 13:55:00.580627 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA pass
15043 13:55:00.580918 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM pass
15044 13:55:00.581034 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA pass
15045 13:55:00.581134 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA pass
15046 13:55:00.581245 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM pass
15047 13:55:00.581365 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA pass
15048 13:55:00.581468 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA pass
15049 13:55:00.581752 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM pass
15050 13:55:00.581852 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA pass
15051 13:55:00.581951 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA pass
15052 13:55:00.582034 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM pass
15053 13:55:00.582129 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA pass
15054 13:55:00.582225 arm64_syscall-abi_sched_yield_SVE_VL_176 pass
15055 13:55:00.582332 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA pass
15056 13:55:00.582635 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM pass
15057 13:55:00.582735 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA pass
15058 13:55:00.582858 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA pass
15059 13:55:00.586941 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM pass
15060 13:55:00.587243 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA pass
15061 13:55:00.587352 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA pass
15062 13:55:00.587460 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM pass
15063 13:55:00.587566 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA pass
15064 13:55:00.587870 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA pass
15065 13:55:00.587975 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM pass
15066 13:55:00.588078 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA pass
15067 13:55:00.588366 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA pass
15068 13:55:00.588471 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM pass
15069 13:55:00.588573 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA pass
15070 13:55:00.588658 arm64_syscall-abi_sched_yield_SVE_VL_160 pass
15071 13:55:00.588759 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA pass
15072 13:55:00.588859 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM pass
15073 13:55:00.588960 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA pass
15074 13:55:00.589256 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA pass
15075 13:55:00.589385 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM pass
15076 13:55:00.589497 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA pass
15077 13:55:00.589589 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA pass
15078 13:55:00.589682 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM pass
15079 13:55:00.589782 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA pass
15080 13:55:00.589869 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA pass
15081 13:55:00.589971 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM pass
15082 13:55:00.590058 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA pass
15083 13:55:00.590157 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA pass
15084 13:55:00.590244 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM pass
15085 13:55:00.590345 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA pass
15086 13:55:00.590453 arm64_syscall-abi_sched_yield_SVE_VL_144 pass
15087 13:55:00.590554 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA pass
15088 13:55:00.590845 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM pass
15089 13:55:00.590956 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA pass
15090 13:55:00.595024 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA pass
15091 13:55:00.595398 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM pass
15092 13:55:00.595595 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA pass
15093 13:55:00.595752 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA pass
15094 13:55:00.595877 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM pass
15095 13:55:00.596028 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA pass
15096 13:55:00.596148 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA pass
15097 13:55:00.596264 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM pass
15098 13:55:00.596384 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA pass
15099 13:55:00.596510 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA pass
15100 13:55:00.607808 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM pass
15101 13:55:00.608294 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA pass
15102 13:55:00.608481 arm64_syscall-abi_sched_yield_SVE_VL_128 pass
15103 13:55:00.608652 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA pass
15104 13:55:00.608792 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM pass
15105 13:55:00.608930 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA pass
15106 13:55:00.609115 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA pass
15107 13:55:00.609263 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM pass
15108 13:55:00.609402 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA pass
15109 13:55:00.609562 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA pass
15110 13:55:00.609718 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM pass
15111 13:55:00.609873 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA pass
15112 13:55:00.610075 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA pass
15113 13:55:00.610294 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM pass
15114 13:55:00.610533 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA pass
15115 13:55:00.610703 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA pass
15116 13:55:00.610854 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM pass
15117 13:55:00.611004 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA pass
15118 13:55:00.611127 arm64_syscall-abi_sched_yield_SVE_VL_112 pass
15119 13:55:00.611243 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA pass
15120 13:55:00.611360 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM pass
15121 13:55:00.611479 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA pass
15122 13:55:00.611595 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA pass
15123 13:55:00.615016 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM pass
15124 13:55:00.615438 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA pass
15125 13:55:00.615549 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA pass
15126 13:55:00.615639 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM pass
15127 13:55:00.615743 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA pass
15128 13:55:00.615832 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA pass
15129 13:55:00.615918 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM pass
15130 13:55:00.616021 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA pass
15131 13:55:00.616107 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA pass
15132 13:55:00.616194 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM pass
15133 13:55:00.616297 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA pass
15134 13:55:00.616391 arm64_syscall-abi_sched_yield_SVE_VL_96 pass
15135 13:55:00.616494 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA pass
15136 13:55:00.616830 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM pass
15137 13:55:00.616934 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA pass
15138 13:55:00.617038 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA pass
15139 13:55:00.617126 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM pass
15140 13:55:00.617228 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA pass
15141 13:55:00.617320 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA pass
15142 13:55:00.617424 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM pass
15143 13:55:00.617512 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA pass
15144 13:55:00.617611 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA pass
15145 13:55:00.617721 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM pass
15146 13:55:00.618005 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA pass
15147 13:55:00.618119 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA pass
15148 13:55:00.618235 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM pass
15149 13:55:00.618330 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA pass
15150 13:55:00.618442 arm64_syscall-abi_sched_yield_SVE_VL_80 pass
15151 13:55:00.618550 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA pass
15152 13:55:00.618654 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM pass
15153 13:55:00.618952 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA pass
15154 13:55:00.623142 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA pass
15155 13:55:00.623288 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM pass
15156 13:55:00.623398 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA pass
15157 13:55:00.623723 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA pass
15158 13:55:00.623889 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM pass
15159 13:55:00.624098 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA pass
15160 13:55:00.624273 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA pass
15161 13:55:00.624410 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM pass
15162 13:55:00.624560 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA pass
15163 13:55:00.624686 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA pass
15164 13:55:00.624805 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM pass
15165 13:55:00.624945 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA pass
15166 13:55:00.625066 arm64_syscall-abi_sched_yield_SVE_VL_64 pass
15167 13:55:00.625179 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA pass
15168 13:55:00.625326 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM pass
15169 13:55:00.625446 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA pass
15170 13:55:00.625575 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA pass
15171 13:55:00.625806 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM pass
15172 13:55:00.626036 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA pass
15173 13:55:00.626266 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA pass
15174 13:55:00.626457 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM pass
15175 13:55:00.626651 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA pass
15176 13:55:00.626897 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA pass
15177 13:55:00.627058 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM pass
15178 13:55:00.627204 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA pass
15179 13:55:00.627345 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA pass
15180 13:55:00.630960 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM pass
15181 13:55:00.631419 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA pass
15182 13:55:00.631606 arm64_syscall-abi_sched_yield_SVE_VL_48 pass
15183 13:55:00.631769 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA pass
15184 13:55:00.631958 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM pass
15185 13:55:00.632085 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA pass
15186 13:55:00.632201 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA pass
15187 13:55:00.632356 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM pass
15188 13:55:00.632529 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA pass
15189 13:55:00.632702 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA pass
15190 13:55:00.632913 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM pass
15191 13:55:00.633091 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA pass
15192 13:55:00.633253 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA pass
15193 13:55:00.633426 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM pass
15194 13:55:00.633638 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA pass
15195 13:55:00.633792 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA pass
15196 13:55:00.633911 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM pass
15197 13:55:00.634027 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA pass
15198 13:55:00.634161 arm64_syscall-abi_sched_yield_SVE_VL_32 pass
15199 13:55:00.634283 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA pass
15200 13:55:00.634456 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM pass
15201 13:55:00.634623 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA pass
15202 13:55:00.634770 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA pass
15203 13:55:00.634914 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM pass
15204 13:55:00.635056 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA pass
15205 13:55:00.635231 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA pass
15206 13:55:00.635369 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM pass
15207 13:55:00.635511 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA pass
15208 13:55:00.635652 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA pass
15209 13:55:00.639070 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM pass
15210 13:55:00.639581 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA pass
15211 13:55:00.639793 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA pass
15212 13:55:00.639986 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM pass
15213 13:55:00.640188 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA pass
15214 13:55:00.640399 arm64_syscall-abi_sched_yield_SVE_VL_16 pass
15215 13:55:00.640570 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA pass
15216 13:55:00.640731 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM pass
15217 13:55:00.640888 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA pass
15218 13:55:00.641048 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA pass
15219 13:55:00.641247 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM pass
15220 13:55:00.641415 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA pass
15221 13:55:00.641605 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA pass
15222 13:55:00.641780 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM pass
15223 13:55:00.641947 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA pass
15224 13:55:00.642113 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA pass
15225 13:55:00.642238 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM pass
15226 13:55:00.642354 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA pass
15227 13:55:00.642472 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA pass
15228 13:55:00.642590 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM pass
15229 13:55:00.642736 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA pass
15230 13:55:00.642859 arm64_syscall-abi pass
15231 13:55:00.642976 arm64_tpidr2_default_value pass
15232 13:55:00.643092 arm64_tpidr2_write_read pass
15233 13:55:00.643208 arm64_tpidr2_write_sleep_read pass
15234 13:55:00.643324 arm64_tpidr2_write_fork_read pass
15235 13:55:00.643443 arm64_tpidr2_write_clone_read pass
15236 13:55:00.643558 arm64_tpidr2 pass
15237 13:55:00.656629 + ../../utils/send-to-lava.sh ./output/result.txt
15238 13:55:00.698828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
15239 13:55:00.699862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
15241 13:55:00.731277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
15243 13:55:00.731845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>
15244 13:55:00.762809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
15245 13:55:00.763279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
15247 13:55:00.794788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
15249 13:55:00.795258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
15250 13:55:00.826800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
15252 13:55:00.827351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
15253 13:55:00.859240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
15255 13:55:00.859702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
15256 13:55:00.890249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
15258 13:55:00.890707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
15259 13:55:00.921239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
15260 13:55:00.921704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
15262 13:55:00.952880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass>
15263 13:55:00.953350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass
15265 13:55:00.984132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass>
15266 13:55:00.984599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass
15268 13:55:01.015974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
15269 13:55:01.016418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
15271 13:55:01.049681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
15273 13:55:01.050360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
15274 13:55:01.086187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
15275 13:55:01.086659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
15277 13:55:01.125170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
15279 13:55:01.125739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
15280 13:55:01.160750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
15281 13:55:01.161173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
15283 13:55:01.197173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
15284 13:55:01.197621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
15286 13:55:01.240933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
15287 13:55:01.241395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
15289 13:55:01.296818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
15290 13:55:01.297187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
15292 13:55:01.352251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass>
15293 13:55:01.352806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass
15295 13:55:01.402213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>
15296 13:55:01.402753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
15298 13:55:01.446347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
15299 13:55:01.446684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
15301 13:55:01.484336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=pass>
15302 13:55:01.484786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=pass
15304 13:55:01.522685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=pass
15306 13:55:01.523219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=pass>
15307 13:55:01.562681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=pass>
15308 13:55:01.563050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=pass
15310 13:55:01.601505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=pass
15312 13:55:01.601851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=pass>
15313 13:55:01.639423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=pass>
15314 13:55:01.639703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=pass
15316 13:55:01.680474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=pass>
15317 13:55:01.680943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=pass
15319 13:55:01.721212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass>
15320 13:55:01.721691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass
15322 13:55:01.760578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass
15324 13:55:01.761038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass>
15325 13:55:01.799774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass>
15326 13:55:01.800099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass
15328 13:55:01.841736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass>
15329 13:55:01.842133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass
15331 13:55:01.878847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass>
15332 13:55:01.879368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass
15334 13:55:01.916476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass>
15335 13:55:01.916935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass
15337 13:55:01.957692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass>
15338 13:55:01.958099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass
15340 13:55:01.994753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
15341 13:55:01.995550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
15343 13:55:02.039848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
15344 13:55:02.040404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
15346 13:55:02.083742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass>
15347 13:55:02.084209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass
15349 13:55:02.132689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass>
15350 13:55:02.134341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass
15352 13:55:02.181263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass>
15353 13:55:02.181767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass
15355 13:55:02.229168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass>
15356 13:55:02.229553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass
15358 13:55:02.269840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass>
15359 13:55:02.270234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass
15361 13:55:02.310521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass
15363 13:55:02.311357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass>
15364 13:55:02.354710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass>
15365 13:55:02.355093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass
15367 13:55:02.394578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass>
15368 13:55:02.395127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass
15370 13:55:02.435991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass
15372 13:55:02.436423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass>
15373 13:55:02.482164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass
15375 13:55:02.482644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass>
15376 13:55:02.521440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass
15378 13:55:02.521852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass>
15379 13:55:02.561132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass>
15380 13:55:02.561560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass
15382 13:55:02.605458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass
15384 13:55:02.605937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass>
15385 13:55:02.645175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass>
15386 13:55:02.645616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass
15388 13:55:02.685690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass>
15389 13:55:02.686108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass
15391 13:55:02.720755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass
15393 13:55:02.721213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass>
15394 13:55:02.754724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass
15396 13:55:02.755325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass>
15397 13:55:02.793489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass
15399 13:55:02.793905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass>
15400 13:55:02.832577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass>
15401 13:55:02.832953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass
15403 13:55:02.877173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass
15405 13:55:02.877724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass>
15406 13:55:02.917879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass
15408 13:55:02.918494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass>
15409 13:55:02.957481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass>
15410 13:55:02.957854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass
15412 13:55:02.996587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass>
15413 13:55:02.996990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass
15415 13:55:03.034557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass
15417 13:55:03.035101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass>
15418 13:55:03.074858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass>
15419 13:55:03.075326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass
15421 13:55:03.116933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass>
15422 13:55:03.117300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass
15424 13:55:03.154748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
15426 13:55:03.155102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
15427 13:55:03.193954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
15428 13:55:03.194276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
15430 13:55:03.240346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass>
15431 13:55:03.240640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass
15433 13:55:03.282905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
15434 13:55:03.283324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
15436 13:55:03.325086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
15437 13:55:03.325531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
15439 13:55:03.358575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass>
15440 13:55:03.359080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass
15442 13:55:03.393405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass>
15443 13:55:03.393891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass
15445 13:55:03.425473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass>
15446 13:55:03.425957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass
15448 13:55:03.458074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass>
15449 13:55:03.458511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass
15451 13:55:03.490566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass>
15452 13:55:03.491037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass
15454 13:55:03.522384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass>
15455 13:55:03.522814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass
15457 13:55:03.555280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass
15459 13:55:03.555734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass>
15460 13:55:03.588692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass>
15461 13:55:03.589153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass
15463 13:55:03.620644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass>
15464 13:55:03.621124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass
15466 13:55:03.653037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass>
15467 13:55:03.653475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass
15469 13:55:03.684480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass
15471 13:55:03.685023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass>
15472 13:55:03.715837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass>
15473 13:55:03.716277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass
15475 13:55:03.746471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass>
15476 13:55:03.746899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass
15478 13:55:03.777596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass>
15479 13:55:03.778071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass
15481 13:55:03.809382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass
15483 13:55:03.809930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass>
15484 13:55:03.840899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass
15486 13:55:03.841434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass>
15487 13:55:03.871989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass
15489 13:55:03.872522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass>
15490 13:55:03.902467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass>
15491 13:55:03.902878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass
15493 13:55:03.934081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass>
15494 13:55:03.934551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass
15496 13:55:03.965726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass
15498 13:55:03.966275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass>
15499 13:55:03.996763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass>
15500 13:55:03.997231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass
15502 13:55:04.028595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass
15504 13:55:04.029160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass>
15505 13:55:04.059811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass>
15506 13:55:04.060285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass
15508 13:55:04.092196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass
15510 13:55:04.092808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass>
15511 13:55:04.122670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass
15513 13:55:04.123267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass>
15514 13:55:04.155049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass
15516 13:55:04.155659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass>
15517 13:55:04.187219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass
15519 13:55:04.187819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass>
15520 13:55:04.218025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass>
15521 13:55:04.218471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass
15523 13:55:04.248570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass
15525 13:55:04.249031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass>
15526 13:55:04.279314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass
15528 13:55:04.279756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass>
15529 13:55:04.310574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass>
15530 13:55:04.310963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass
15532 13:55:04.342041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass>
15533 13:55:04.342446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass
15535 13:55:04.373320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass
15537 13:55:04.373774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass>
15538 13:55:04.404250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass>
15539 13:55:04.404705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass
15541 13:55:04.435625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass
15543 13:55:04.436183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass>
15544 13:55:04.466137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass>
15545 13:55:04.466574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass
15547 13:55:04.497366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass
15549 13:55:04.497846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass>
15550 13:55:04.528411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass>
15551 13:55:04.528876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass
15553 13:55:04.560258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass>
15554 13:55:04.560671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass
15556 13:55:04.592777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass
15558 13:55:04.593317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass>
15559 13:55:04.624291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass>
15560 13:55:04.624741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass
15562 13:55:04.657164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass
15564 13:55:04.657730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass>
15565 13:55:04.688986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass
15567 13:55:04.689563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass>
15568 13:55:04.720343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass
15570 13:55:04.720904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass>
15571 13:55:04.751717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass
15573 13:55:04.752250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass>
15574 13:55:04.783902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass>
15575 13:55:04.784386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass
15577 13:55:04.817684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass>
15578 13:55:04.818137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass
15580 13:55:04.850345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass>
15581 13:55:04.850811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass
15583 13:55:04.881578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass
15585 13:55:04.882204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass>
15586 13:55:04.912378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass
15588 13:55:04.912924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass>
15589 13:55:04.943871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass>
15590 13:55:04.944312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass
15592 13:55:04.974801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass>
15593 13:55:04.975261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass
15595 13:55:05.008026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass
15597 13:55:05.008564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass>
15598 13:55:05.038650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass>
15599 13:55:05.039128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass
15601 13:55:05.070224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass
15603 13:55:05.070809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass>
15604 13:55:05.102438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass
15606 13:55:05.102995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass>
15607 13:55:05.133256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass>
15608 13:55:05.133700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass
15610 13:55:05.165905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass>
15611 13:55:05.166354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass
15613 13:55:05.198518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass
15615 13:55:05.199077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass>
15616 13:55:05.229639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass>
15617 13:55:05.230089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass
15619 13:55:05.260382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass>
15620 13:55:05.260828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass
15622 13:55:05.292006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass>
15623 13:55:05.292452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass
15625 13:55:05.325278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass>
15626 13:55:05.325762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass
15628 13:55:05.360945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass>
15629 13:55:05.361507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass
15631 13:55:05.393748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass>
15632 13:55:05.394314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass
15634 13:55:05.427232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
15636 13:55:05.427710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
15637 13:55:05.461502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
15638 13:55:05.461939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
15640 13:55:05.501033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
15642 13:55:05.501713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
15643 13:55:05.533930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass>
15644 13:55:05.534350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass
15646 13:55:05.565384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
15648 13:55:05.565910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
15649 13:55:05.597275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
15650 13:55:05.597763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
15652 13:55:05.629698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
15654 13:55:05.630255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
15655 13:55:05.661312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass>
15656 13:55:05.661689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass
15658 13:55:05.694781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
15659 13:55:05.695205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
15661 13:55:05.726748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
15662 13:55:05.727165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
15664 13:55:05.758039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
15665 13:55:05.758443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
15667 13:55:05.789695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass
15669 13:55:05.790138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass>
15670 13:55:05.821737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
15671 13:55:05.822266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
15673 13:55:05.854069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
15674 13:55:05.854568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
15676 13:55:05.890190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
15678 13:55:05.890648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
15679 13:55:05.922637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass
15681 13:55:05.923199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass>
15682 13:55:05.959804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
15683 13:55:05.960162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
15685 13:55:05.992525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
15686 13:55:05.992981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
15688 13:55:06.024631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
15689 13:55:06.025016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
15691 13:55:06.056286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass>
15692 13:55:06.056734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass
15694 13:55:06.088752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
15696 13:55:06.089277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
15697 13:55:06.122299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
15699 13:55:06.123036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
15700 13:55:06.160093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
15701 13:55:06.160539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
15703 13:55:06.194280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass>
15704 13:55:06.194654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass
15706 13:55:06.228649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
15707 13:55:06.228944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
15709 13:55:06.263749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
15710 13:55:06.264128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
15712 13:55:06.297973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
15714 13:55:06.298365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
15715 13:55:06.332720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass
15717 13:55:06.333131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass>
15718 13:55:06.366660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
15719 13:55:06.367030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
15721 13:55:06.401434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
15722 13:55:06.401826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
15724 13:55:06.436569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
15725 13:55:06.437029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
15727 13:55:06.470779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass
15729 13:55:06.471339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass>
15730 13:55:06.505801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
15731 13:55:06.506253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
15733 13:55:06.540424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
15734 13:55:06.540846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
15736 13:55:06.574648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
15738 13:55:06.575084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
15739 13:55:06.608689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass>
15740 13:55:06.609067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass
15742 13:55:06.643880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
15743 13:55:06.644250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
15745 13:55:06.678218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
15746 13:55:06.678590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
15748 13:55:06.713251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
15749 13:55:06.713621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
15751 13:55:06.747878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass>
15752 13:55:06.748160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass
15754 13:55:06.782391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
15755 13:55:06.782783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
15757 13:55:06.817198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
15758 13:55:06.817555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
15760 13:55:06.852522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
15761 13:55:06.852885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
15763 13:55:06.888168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass>
15764 13:55:06.888520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass
15766 13:55:06.922672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
15767 13:55:06.923022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
15769 13:55:06.957970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
15771 13:55:06.958424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
15772 13:55:06.993112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
15773 13:55:06.993390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
15775 13:55:07.028254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass
15777 13:55:07.028679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass>
15778 13:55:07.063589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
15780 13:55:07.064092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
15781 13:55:07.098643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
15782 13:55:07.098920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
15784 13:55:07.133943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
15785 13:55:07.134219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
15787 13:55:07.169314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass>
15788 13:55:07.169676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass
15790 13:55:07.204084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
15792 13:55:07.204361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
15793 13:55:07.239216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
15795 13:55:07.239492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
15796 13:55:07.275735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
15797 13:55:07.276084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
15799 13:55:07.311179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass
15801 13:55:07.311613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass>
15802 13:55:07.345960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
15803 13:55:07.346341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
15805 13:55:07.382407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
15807 13:55:07.382874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
15808 13:55:07.417777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
15809 13:55:07.418217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
15811 13:55:07.464167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass
15813 13:55:07.464702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass>
15814 13:55:07.497986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
15815 13:55:07.498422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
15817 13:55:07.533418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
15818 13:55:07.533848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
15820 13:55:07.568583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
15821 13:55:07.569032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
15823 13:55:07.604135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass>
15824 13:55:07.604633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass
15826 13:55:07.638495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
15827 13:55:07.638979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
15829 13:55:07.673075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
15830 13:55:07.673555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
15832 13:55:07.708494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
15834 13:55:07.709140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
15835 13:55:07.743648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass
15837 13:55:07.744222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass>
15838 13:55:07.779547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
15839 13:55:07.779941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
15841 13:55:07.815200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
15843 13:55:07.815529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
15844 13:55:07.858395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
15845 13:55:07.858755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
15847 13:55:07.892875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass>
15848 13:55:07.893175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass
15850 13:55:07.928036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
15852 13:55:07.928478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
15853 13:55:07.963126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
15855 13:55:07.963608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
15856 13:55:07.997756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
15858 13:55:07.998213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
15859 13:55:08.032022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass>
15860 13:55:08.032481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass
15862 13:55:08.066463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
15863 13:55:08.066928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
15865 13:55:08.101007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
15866 13:55:08.101458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
15868 13:55:08.136362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
15870 13:55:08.136829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
15871 13:55:08.170655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass
15873 13:55:08.171125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass>
15874 13:55:08.207939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
15876 13:55:08.208516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
15877 13:55:08.244925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
15878 13:55:08.245382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
15880 13:55:08.280985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
15881 13:55:08.281410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
15883 13:55:08.316564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass
15885 13:55:08.317120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass>
15886 13:55:08.351874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
15887 13:55:08.352308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
15889 13:55:08.386975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
15891 13:55:08.387533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
15892 13:55:08.422533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
15893 13:55:08.423006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
15895 13:55:08.457210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass>
15896 13:55:08.457664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass
15898 13:55:08.492298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
15899 13:55:08.492726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
15901 13:55:08.527713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
15903 13:55:08.528258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
15904 13:55:08.562472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
15906 13:55:08.563027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
15907 13:55:08.597177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass
15909 13:55:08.597641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass>
15910 13:55:08.632554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
15912 13:55:08.633015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
15913 13:55:08.667629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
15915 13:55:08.668104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
15916 13:55:08.702399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
15918 13:55:08.702866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
15919 13:55:08.736486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass>
15920 13:55:08.736907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass
15922 13:55:08.770572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
15923 13:55:08.770950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
15925 13:55:08.805531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
15926 13:55:08.805930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
15928 13:55:08.840614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
15929 13:55:08.841057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
15931 13:55:08.875950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass
15933 13:55:08.876480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass>
15934 13:55:08.910740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
15935 13:55:08.911150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
15937 13:55:08.946524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
15939 13:55:08.947092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
15940 13:55:08.982068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
15941 13:55:08.982461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
15943 13:55:09.017024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass>
15944 13:55:09.017393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass
15946 13:55:09.052251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
15947 13:55:09.052617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
15949 13:55:09.087585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
15950 13:55:09.087933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
15952 13:55:09.121967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
15953 13:55:09.122324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
15955 13:55:09.156771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass>
15956 13:55:09.157136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass
15958 13:55:09.191186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
15960 13:55:09.191785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
15961 13:55:09.225800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
15962 13:55:09.226291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
15964 13:55:09.261247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
15966 13:55:09.261835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
15967 13:55:09.296213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass>
15968 13:55:09.296700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass
15970 13:55:09.331802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
15971 13:55:09.332253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
15973 13:55:09.366159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
15974 13:55:09.366539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
15976 13:55:09.400510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
15977 13:55:09.400921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
15979 13:55:09.434861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass
15981 13:55:09.435409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass>
15982 13:55:09.469191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
15983 13:55:09.469620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
15985 13:55:09.503967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
15987 13:55:09.504463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
15988 13:55:09.539126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
15990 13:55:09.539729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
15991 13:55:09.573814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass>
15992 13:55:09.574248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass
15994 13:55:09.608520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
15996 13:55:09.608975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
15997 13:55:09.644540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
15998 13:55:09.644945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
16000 13:55:09.679146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
16002 13:55:09.679671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
16003 13:55:09.714097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass>
16004 13:55:09.714480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass
16006 13:55:09.749210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
16007 13:55:09.749591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
16009 13:55:09.784556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
16010 13:55:09.784954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
16012 13:55:09.820085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
16014 13:55:09.820545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
16015 13:55:09.854412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass
16017 13:55:09.854930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass>
16018 13:55:09.888539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
16019 13:55:09.888869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
16021 13:55:09.922812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
16022 13:55:09.923225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
16024 13:55:09.957596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
16025 13:55:09.958024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
16027 13:55:09.992263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass
16029 13:55:09.992902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass>
16030 13:55:10.026828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
16031 13:55:10.027300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
16033 13:55:10.061730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
16035 13:55:10.062369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
16036 13:55:10.096864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
16037 13:55:10.097287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
16039 13:55:10.131279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass
16041 13:55:10.131733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass>
16042 13:55:10.166150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
16044 13:55:10.166752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
16045 13:55:10.200425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
16046 13:55:10.200889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
16048 13:55:10.234910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
16049 13:55:10.235342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
16051 13:55:10.269687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass>
16052 13:55:10.270124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass
16054 13:55:10.304833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
16055 13:55:10.305314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
16057 13:55:10.344400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
16058 13:55:10.344864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
16060 13:55:10.383259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
16062 13:55:10.383658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
16063 13:55:10.416732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass>
16064 13:55:10.417112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass
16066 13:55:10.450334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
16067 13:55:10.450728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
16069 13:55:10.483639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
16071 13:55:10.484016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
16072 13:55:10.516139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
16074 13:55:10.516688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
16075 13:55:10.546519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass>
16076 13:55:10.546983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass
16078 13:55:10.578640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
16080 13:55:10.579122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
16081 13:55:10.610248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
16082 13:55:10.610728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
16084 13:55:10.642391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
16085 13:55:10.642842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
16087 13:55:10.673504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass>
16088 13:55:10.673980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass
16090 13:55:10.704885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
16091 13:55:10.705328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
16093 13:55:10.736318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
16094 13:55:10.736769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
16096 13:55:10.767862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
16097 13:55:10.768268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
16099 13:55:10.798725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass
16101 13:55:10.799185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass>
16102 13:55:10.830209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
16103 13:55:10.830624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
16105 13:55:10.861117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
16106 13:55:10.861521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
16108 13:55:10.893026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
16110 13:55:10.893586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
16111 13:55:10.923699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass>
16112 13:55:10.924163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass
16114 13:55:10.954271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
16116 13:55:10.954868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
16117 13:55:10.988047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
16118 13:55:10.988504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
16120 13:55:11.020131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
16122 13:55:11.020765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
16123 13:55:11.051616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass
16125 13:55:11.052160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass>
16126 13:55:11.083702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
16127 13:55:11.084201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
16129 13:55:11.115881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
16130 13:55:11.116335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
16132 13:55:11.147824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
16133 13:55:11.148289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
16135 13:55:11.179326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass>
16136 13:55:11.179798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass
16138 13:55:11.210311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
16139 13:55:11.210738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
16141 13:55:11.240877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
16143 13:55:11.241394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
16144 13:55:11.271901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
16145 13:55:11.272359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
16147 13:55:11.304904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass>
16148 13:55:11.305368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass
16150 13:55:11.336447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
16151 13:55:11.336875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
16153 13:55:11.368193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
16155 13:55:11.368828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
16156 13:55:11.399994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
16157 13:55:11.400456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
16159 13:55:11.431506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass>
16160 13:55:11.431968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass
16162 13:55:11.462903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
16164 13:55:11.463352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
16165 13:55:11.494251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
16166 13:55:11.494694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
16168 13:55:11.525538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
16169 13:55:11.526009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
16171 13:55:11.556820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass
16173 13:55:11.557448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass>
16174 13:55:11.587882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
16175 13:55:11.588310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
16177 13:55:11.618704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
16179 13:55:11.619238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
16180 13:55:11.649376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
16181 13:55:11.649820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
16183 13:55:11.682088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass
16185 13:55:11.682642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass>
16186 13:55:11.714819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
16188 13:55:11.715374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
16189 13:55:11.746366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
16190 13:55:11.746769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
16192 13:55:11.778078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
16194 13:55:11.778524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
16195 13:55:11.809102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass
16197 13:55:11.809548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass>
16198 13:55:11.840969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
16200 13:55:11.841420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
16201 13:55:11.873893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
16202 13:55:11.874327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
16204 13:55:11.910446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
16205 13:55:11.910870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
16207 13:55:11.943732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass>
16208 13:55:11.944170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass
16210 13:55:11.978256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
16211 13:55:11.978669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
16213 13:55:12.015819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
16214 13:55:12.016226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
16216 13:55:12.051929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
16218 13:55:12.052407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
16219 13:55:12.087780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass
16221 13:55:12.088251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass>
16222 13:55:12.125608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
16223 13:55:12.125966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
16225 13:55:12.177207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
16226 13:55:12.177591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
16228 13:55:12.213549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
16230 13:55:12.214007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
16231 13:55:12.248541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass
16233 13:55:12.248994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass>
16234 13:55:12.282618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
16235 13:55:12.283033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
16237 13:55:12.317186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
16238 13:55:12.317605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
16240 13:55:12.351902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
16241 13:55:12.352324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
16243 13:55:12.385840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass
16245 13:55:12.386303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass>
16246 13:55:12.420142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
16247 13:55:12.420585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
16249 13:55:12.454588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
16251 13:55:12.455004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
16252 13:55:12.489293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
16253 13:55:12.489767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
16255 13:55:12.524053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass>
16256 13:55:12.524490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass
16258 13:55:12.558841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
16260 13:55:12.559253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
16261 13:55:12.599811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
16262 13:55:12.600244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
16264 13:55:12.646174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
16266 13:55:12.646646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
16267 13:55:12.697344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass>
16268 13:55:12.697830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass
16270 13:55:12.746217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
16272 13:55:12.746692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
16273 13:55:12.780074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
16274 13:55:12.780522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
16276 13:55:12.814247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
16278 13:55:12.814849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
16279 13:55:12.852391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass>
16280 13:55:12.852850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass
16282 13:55:12.895949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
16284 13:55:12.896594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
16285 13:55:12.931622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
16286 13:55:12.932102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
16288 13:55:12.966594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
16289 13:55:12.967066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
16291 13:55:13.001121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass>
16292 13:55:13.001545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass
16294 13:55:13.035938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
16295 13:55:13.036298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
16297 13:55:13.071838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
16298 13:55:13.072205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
16300 13:55:13.106462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
16301 13:55:13.106836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
16303 13:55:13.142150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass>
16304 13:55:13.142617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass
16306 13:55:13.177698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
16307 13:55:13.178062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
16309 13:55:13.213065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
16311 13:55:13.213521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
16312 13:55:13.248383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
16313 13:55:13.248746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
16315 13:55:13.283159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass
16317 13:55:13.283497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass>
16318 13:55:13.318323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
16319 13:55:13.318638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
16321 13:55:13.353354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
16322 13:55:13.353659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
16324 13:55:13.388562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
16325 13:55:13.388940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
16327 13:55:13.424815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass>
16328 13:55:13.425202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass
16330 13:55:13.460214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
16331 13:55:13.460573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
16333 13:55:13.494580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
16335 13:55:13.495032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
16336 13:55:13.530061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
16337 13:55:13.530441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
16339 13:55:13.564375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass>
16340 13:55:13.564731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass
16342 13:55:13.598883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
16343 13:55:13.599237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
16345 13:55:13.633467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
16346 13:55:13.633827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
16348 13:55:13.668013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
16349 13:55:13.668399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
16351 13:55:13.702852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass>
16352 13:55:13.703218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass
16354 13:55:13.737322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
16355 13:55:13.737727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
16357 13:55:13.773063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
16359 13:55:13.773533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
16360 13:55:13.808885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
16361 13:55:13.809308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
16363 13:55:13.844413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass>
16364 13:55:13.844842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass
16366 13:55:13.879643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
16367 13:55:13.880072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
16369 13:55:13.914011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
16370 13:55:13.914431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
16372 13:55:13.950740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
16373 13:55:13.951138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
16375 13:55:13.988022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass>
16376 13:55:13.988408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass
16378 13:55:14.024053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
16379 13:55:14.024438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
16381 13:55:14.060099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
16382 13:55:14.060495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
16384 13:55:14.096075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
16385 13:55:14.096480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
16387 13:55:14.132301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass>
16388 13:55:14.132689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass
16390 13:55:14.167872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
16391 13:55:14.168240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
16393 13:55:14.204037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
16394 13:55:14.204412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
16396 13:55:14.238210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
16397 13:55:14.238634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
16399 13:55:14.272686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass
16401 13:55:14.273155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass>
16402 13:55:14.308442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
16404 13:55:14.308988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
16405 13:55:14.343518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
16406 13:55:14.343897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
16408 13:55:14.377879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
16409 13:55:14.378243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
16411 13:55:14.414640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass>
16412 13:55:14.415087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass
16414 13:55:14.452473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
16415 13:55:14.452886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
16417 13:55:14.488987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
16418 13:55:14.489400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
16420 13:55:14.525625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
16421 13:55:14.526122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
16423 13:55:14.562024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass>
16424 13:55:14.562415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass
16426 13:55:14.597690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
16427 13:55:14.598056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
16429 13:55:14.633592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
16430 13:55:14.634016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
16432 13:55:14.668710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
16434 13:55:14.669176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
16435 13:55:14.702924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass
16437 13:55:14.703437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass>
16438 13:55:14.738070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
16440 13:55:14.738638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
16441 13:55:14.772511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
16442 13:55:14.772974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
16444 13:55:14.808082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
16445 13:55:14.808571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
16447 13:55:14.846826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass>
16448 13:55:14.847321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass
16450 13:55:14.881717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
16452 13:55:14.882179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
16453 13:55:14.916626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
16455 13:55:14.917218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
16456 13:55:14.951857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
16457 13:55:14.952320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
16459 13:55:14.987922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass
16461 13:55:14.988390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass>
16462 13:55:15.022349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
16464 13:55:15.022805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
16465 13:55:15.056446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
16466 13:55:15.056927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
16468 13:55:15.091847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
16470 13:55:15.092409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
16471 13:55:15.126986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass>
16472 13:55:15.127525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass
16474 13:55:15.162518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
16476 13:55:15.163169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
16477 13:55:15.197348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
16479 13:55:15.197973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
16480 13:55:15.232064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
16481 13:55:15.232414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
16483 13:55:15.266677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass>
16484 13:55:15.267139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass
16486 13:55:15.301929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
16487 13:55:15.302291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
16489 13:55:15.337676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
16490 13:55:15.338101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
16492 13:55:15.373862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
16493 13:55:15.374415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
16495 13:55:15.409652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass>
16496 13:55:15.410086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass
16498 13:55:15.446942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
16499 13:55:15.447390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
16501 13:55:15.498382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
16502 13:55:15.498800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
16504 13:55:15.535676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
16505 13:55:15.536035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
16507 13:55:15.567708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass>
16508 13:55:15.568150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass
16510 13:55:15.599786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
16511 13:55:15.600162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
16513 13:55:15.630636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
16514 13:55:15.631024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
16516 13:55:15.665782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
16517 13:55:15.666167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
16519 13:55:15.698032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass
16521 13:55:15.698391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass>
16522 13:55:15.731879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
16523 13:55:15.732305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
16525 13:55:15.763702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
16526 13:55:15.764075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
16528 13:55:15.795185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
16530 13:55:15.795551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
16531 13:55:15.832613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass>
16532 13:55:15.832989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass
16534 13:55:15.867813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
16535 13:55:15.868231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
16537 13:55:15.904517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
16538 13:55:15.904870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
16540 13:55:15.941605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
16541 13:55:15.941976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
16543 13:55:15.980409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass
16545 13:55:15.981047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass>
16546 13:55:16.016743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
16548 13:55:16.017380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
16549 13:55:16.055532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
16550 13:55:16.055985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
16552 13:55:16.093908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
16553 13:55:16.094398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
16555 13:55:16.150002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass>
16556 13:55:16.150444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass
16558 13:55:16.206789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
16560 13:55:16.207234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
16561 13:55:16.250829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
16562 13:55:16.251303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
16564 13:55:16.281445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
16566 13:55:16.282041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
16567 13:55:16.312231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass
16569 13:55:16.312677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass>
16570 13:55:16.346501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
16571 13:55:16.346906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
16573 13:55:16.377616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
16575 13:55:16.378255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
16576 13:55:16.408662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
16577 13:55:16.409130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
16579 13:55:16.440821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass
16581 13:55:16.441391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass>
16582 13:55:16.472114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
16584 13:55:16.472586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
16585 13:55:16.504127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
16586 13:55:16.504544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
16588 13:55:16.535586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
16590 13:55:16.536037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
16591 13:55:16.566350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass
16593 13:55:16.566820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass>
16594 13:55:16.598630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
16595 13:55:16.599097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
16597 13:55:16.630511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
16598 13:55:16.630964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
16600 13:55:16.661984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
16601 13:55:16.662423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
16603 13:55:16.693316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass
16605 13:55:16.693879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass>
16606 13:55:16.724265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
16607 13:55:16.724692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
16609 13:55:16.756313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
16610 13:55:16.756744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
16612 13:55:16.789030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
16613 13:55:16.789457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
16615 13:55:16.821734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass>
16616 13:55:16.822204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass
16618 13:55:16.855237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
16620 13:55:16.855660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
16621 13:55:16.886671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
16622 13:55:16.887129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
16624 13:55:16.917829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
16625 13:55:16.918316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
16627 13:55:16.950594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass>
16628 13:55:16.951054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass
16630 13:55:16.981988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
16632 13:55:16.982610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
16633 13:55:17.012913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
16634 13:55:17.013377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
16636 13:55:17.045450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
16638 13:55:17.046005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
16639 13:55:17.078235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass
16641 13:55:17.078770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass>
16642 13:55:17.109483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
16644 13:55:17.110025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
16645 13:55:17.140919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
16647 13:55:17.141475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
16648 13:55:17.171916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
16650 13:55:17.172515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
16651 13:55:17.202345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass
16653 13:55:17.202937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass>
16654 13:55:17.233614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
16656 13:55:17.234194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
16657 13:55:17.264456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
16658 13:55:17.264923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
16660 13:55:17.295226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
16662 13:55:17.295798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
16663 13:55:17.326689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass
16665 13:55:17.327287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass>
16666 13:55:17.359916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
16667 13:55:17.360366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
16669 13:55:17.392807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
16671 13:55:17.393350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
16672 13:55:17.427136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
16674 13:55:17.427689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
16675 13:55:17.461742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass>
16676 13:55:17.462277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass
16678 13:55:17.496243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
16679 13:55:17.496754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
16681 13:55:17.531666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
16682 13:55:17.532145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
16684 13:55:17.566923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
16685 13:55:17.567385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
16687 13:55:17.600980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass>
16688 13:55:17.601432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass
16690 13:55:17.636170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
16691 13:55:17.636631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
16693 13:55:17.670508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
16695 13:55:17.670980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
16696 13:55:17.704438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
16697 13:55:17.704910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
16699 13:55:17.740885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass>
16700 13:55:17.741409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass
16702 13:55:17.776823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
16703 13:55:17.777265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
16705 13:55:17.811697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
16707 13:55:17.812346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
16708 13:55:17.845157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
16710 13:55:17.845575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
16711 13:55:17.879091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass
16713 13:55:17.879684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass>
16714 13:55:17.910667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
16715 13:55:17.911149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
16717 13:55:17.941911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
16718 13:55:17.942310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
16720 13:55:17.972915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
16721 13:55:17.973323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
16723 13:55:18.004390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass
16725 13:55:18.004941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass>
16726 13:55:18.035846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
16727 13:55:18.036251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
16729 13:55:18.067301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
16731 13:55:18.067860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
16732 13:55:18.099637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
16733 13:55:18.100127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
16735 13:55:18.133564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass
16737 13:55:18.134147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass>
16738 13:55:18.165253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
16739 13:55:18.165703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
16741 13:55:18.196998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
16743 13:55:18.197615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
16744 13:55:18.228188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
16745 13:55:18.228638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
16747 13:55:18.258966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass
16749 13:55:18.259505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass>
16750 13:55:18.290577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
16752 13:55:18.291005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
16753 13:55:18.321817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
16754 13:55:18.322267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
16756 13:55:18.352742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
16757 13:55:18.353187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
16759 13:55:18.384333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass
16761 13:55:18.384904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass>
16762 13:55:18.415908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
16764 13:55:18.416478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
16765 13:55:18.446345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
16766 13:55:18.446802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
16768 13:55:18.478204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
16770 13:55:18.478672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
16771 13:55:18.509431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass>
16772 13:55:18.509919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass
16774 13:55:18.540432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
16775 13:55:18.540897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
16777 13:55:18.572974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
16778 13:55:18.573406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
16780 13:55:18.604803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
16782 13:55:18.605250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
16783 13:55:18.635957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass>
16784 13:55:18.636424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass
16786 13:55:18.666977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
16788 13:55:18.667449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
16789 13:55:18.698031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
16790 13:55:18.698438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
16792 13:55:18.729692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
16793 13:55:18.730173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
16795 13:55:18.760758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass>
16796 13:55:18.761224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass
16798 13:55:18.792131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
16799 13:55:18.792590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
16801 13:55:18.822724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
16802 13:55:18.823194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
16804 13:55:18.854809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
16805 13:55:18.855265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
16807 13:55:18.886489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass>
16808 13:55:18.886933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass
16810 13:55:18.918182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
16811 13:55:18.918749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
16813 13:55:18.952410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
16815 13:55:18.953046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
16816 13:55:18.983439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
16818 13:55:18.984348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
16819 13:55:19.014924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass>
16820 13:55:19.015443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass
16822 13:55:19.057455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
16824 13:55:19.058033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
16825 13:55:19.088969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
16826 13:55:19.089417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
16828 13:55:19.120446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
16829 13:55:19.120961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
16831 13:55:19.152774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass
16833 13:55:19.153238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass>
16834 13:55:19.184075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
16835 13:55:19.184591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
16837 13:55:19.215792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
16838 13:55:19.216284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
16840 13:55:19.252845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
16842 13:55:19.253390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
16843 13:55:19.284705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass
16845 13:55:19.285310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass>
16846 13:55:19.316207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
16848 13:55:19.316753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
16849 13:55:19.347341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
16851 13:55:19.347975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
16852 13:55:19.379264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
16854 13:55:19.379968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
16855 13:55:19.411590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass
16857 13:55:19.412129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass>
16858 13:55:19.442480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
16859 13:55:19.443090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
16861 13:55:19.472769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
16862 13:55:19.473198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
16864 13:55:19.504570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
16866 13:55:19.505021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
16867 13:55:19.537236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass>
16868 13:55:19.537778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass
16870 13:55:19.571243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
16872 13:55:19.571686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
16873 13:55:19.605058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
16874 13:55:19.605447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
16876 13:55:19.636138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
16877 13:55:19.636475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
16879 13:55:19.666867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass>
16880 13:55:19.667348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass
16882 13:55:19.698164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
16883 13:55:19.698633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
16885 13:55:19.729493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
16886 13:55:19.729981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
16888 13:55:19.760521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
16889 13:55:19.760989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
16891 13:55:19.791616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass
16893 13:55:19.792028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass>
16894 13:55:19.823332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
16896 13:55:19.823793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
16897 13:55:19.854413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
16899 13:55:19.855108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
16900 13:55:19.884897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
16901 13:55:19.885294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
16903 13:55:19.916254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass>
16904 13:55:19.916732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass
16906 13:55:19.947207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
16908 13:55:19.947774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
16909 13:55:19.977919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
16910 13:55:19.978338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
16912 13:55:20.008725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
16913 13:55:20.009206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
16915 13:55:20.039519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass>
16916 13:55:20.039961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass
16918 13:55:20.070357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
16920 13:55:20.070993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
16921 13:55:20.102967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
16922 13:55:20.103501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
16924 13:55:20.137335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
16925 13:55:20.137752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
16927 13:55:20.170633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass>
16928 13:55:20.171015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass
16930 13:55:20.202462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
16931 13:55:20.202993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
16933 13:55:20.234258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
16934 13:55:20.234787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
16936 13:55:20.268135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
16937 13:55:20.268533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
16939 13:55:20.301784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass
16941 13:55:20.302219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass>
16942 13:55:20.334898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
16943 13:55:20.335367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
16945 13:55:20.368505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
16946 13:55:20.368960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
16948 13:55:20.409541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
16950 13:55:20.410006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
16951 13:55:20.451847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass>
16952 13:55:20.452283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass
16954 13:55:20.485527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
16955 13:55:20.485938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
16957 13:55:20.521969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
16959 13:55:20.522406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
16960 13:55:20.559972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
16962 13:55:20.560422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
16963 13:55:20.596264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass>
16964 13:55:20.596755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass
16966 13:55:20.627116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
16968 13:55:20.627739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
16969 13:55:20.658763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
16971 13:55:20.659351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
16972 13:55:20.689760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
16974 13:55:20.690210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
16975 13:55:20.720091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass>
16976 13:55:20.720517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass
16978 13:55:20.750702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
16979 13:55:20.751174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
16981 13:55:20.781492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
16983 13:55:20.782153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
16984 13:55:20.812306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
16985 13:55:20.812767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
16987 13:55:20.842614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass>
16988 13:55:20.843091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass
16990 13:55:20.873618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
16992 13:55:20.874263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
16993 13:55:20.904699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
16994 13:55:20.905113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
16996 13:55:20.935605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
16997 13:55:20.936011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
16999 13:55:20.966899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass>
17000 13:55:20.967366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass
17002 13:55:20.998001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
17004 13:55:20.998552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
17005 13:55:21.029594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
17007 13:55:21.030180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
17008 13:55:21.060867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
17009 13:55:21.061321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
17011 13:55:21.091909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass>
17012 13:55:21.092353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass
17014 13:55:21.123669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
17015 13:55:21.124121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
17017 13:55:21.154580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
17018 13:55:21.155021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
17020 13:55:21.185773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
17021 13:55:21.186222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
17023 13:55:21.216955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass>
17024 13:55:21.217434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass
17026 13:55:21.248400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
17027 13:55:21.248864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
17029 13:55:21.279940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
17030 13:55:21.280383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
17032 13:55:21.310305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
17033 13:55:21.310739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
17035 13:55:21.341268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass>
17036 13:55:21.341656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass
17038 13:55:21.372153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
17039 13:55:21.372531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
17041 13:55:21.403148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
17043 13:55:21.403551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
17044 13:55:21.434466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
17045 13:55:21.434888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
17047 13:55:21.465578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass>
17048 13:55:21.466017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass
17050 13:55:21.496473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
17051 13:55:21.496948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
17053 13:55:21.527704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
17055 13:55:21.528150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
17056 13:55:21.558621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
17057 13:55:21.559029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
17059 13:55:21.589832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass
17061 13:55:21.590286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass>
17062 13:55:21.621160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
17063 13:55:21.621608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
17065 13:55:21.652361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
17066 13:55:21.652821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
17068 13:55:21.684028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
17069 13:55:21.684437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
17071 13:55:21.715646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass
17073 13:55:21.716081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass>
17074 13:55:21.746912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
17075 13:55:21.747327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
17077 13:55:21.778568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
17078 13:55:21.778974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
17080 13:55:21.810512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
17082 13:55:21.810968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
17083 13:55:21.842230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass
17085 13:55:21.842677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass>
17086 13:55:21.873265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
17087 13:55:21.873685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
17089 13:55:21.904995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
17090 13:55:21.905415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
17092 13:55:21.937070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
17093 13:55:21.937495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
17095 13:55:21.969607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass>
17096 13:55:21.970025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass
17098 13:55:22.000737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
17099 13:55:22.001161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
17101 13:55:22.032764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
17102 13:55:22.033238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
17104 13:55:22.064278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
17106 13:55:22.064906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
17107 13:55:22.095110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass
17109 13:55:22.095729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass>
17110 13:55:22.126317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
17112 13:55:22.126747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
17113 13:55:22.157872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
17114 13:55:22.158279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
17116 13:55:22.188770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
17118 13:55:22.189208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
17119 13:55:22.220574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass
17121 13:55:22.221025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass>
17122 13:55:22.251699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
17123 13:55:22.252125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
17125 13:55:22.282863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
17126 13:55:22.283310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
17128 13:55:22.314129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
17129 13:55:22.314573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
17131 13:55:22.345201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass
17133 13:55:22.345801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass>
17134 13:55:22.376567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
17136 13:55:22.377127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
17137 13:55:22.407845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
17138 13:55:22.408302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
17140 13:55:22.439087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
17142 13:55:22.439635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
17143 13:55:22.471290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass>
17144 13:55:22.471752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass
17146 13:55:22.502191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
17147 13:55:22.502649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
17149 13:55:22.533181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
17151 13:55:22.533748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
17152 13:55:22.564436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
17154 13:55:22.564988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
17155 13:55:22.596653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass
17157 13:55:22.597418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass>
17158 13:55:22.629798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
17160 13:55:22.630261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
17161 13:55:22.664076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
17163 13:55:22.664536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
17164 13:55:22.696866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
17166 13:55:22.697333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
17167 13:55:22.745632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass
17169 13:55:22.746108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass>
17170 13:55:22.786449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
17171 13:55:22.786936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
17173 13:55:22.818453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
17174 13:55:22.818926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
17176 13:55:22.850358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
17177 13:55:22.850763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
17179 13:55:22.881743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass>
17180 13:55:22.882218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass
17182 13:55:22.913386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
17183 13:55:22.913860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
17185 13:55:22.945242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
17186 13:55:22.945653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
17188 13:55:22.976695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
17189 13:55:22.977088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
17191 13:55:23.008474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass
17193 13:55:23.008890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass>
17194 13:55:23.039757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
17196 13:55:23.040156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
17197 13:55:23.070903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
17199 13:55:23.071309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
17200 13:55:23.104981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
17202 13:55:23.105542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
17203 13:55:23.136447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass>
17204 13:55:23.136898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass
17206 13:55:23.167903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
17207 13:55:23.168356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
17209 13:55:23.199543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
17210 13:55:23.199991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
17212 13:55:23.230350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
17213 13:55:23.230850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
17215 13:55:23.267871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass
17217 13:55:23.268506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass>
17218 13:55:23.299124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
17220 13:55:23.299544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
17221 13:55:23.329865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
17222 13:55:23.330256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
17224 13:55:23.360498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
17226 13:55:23.360909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
17227 13:55:23.392116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass
17229 13:55:23.392557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass>
17230 13:55:23.422668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
17231 13:55:23.423057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
17233 13:55:23.453548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
17234 13:55:23.453953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
17236 13:55:23.484274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
17237 13:55:23.484666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
17239 13:55:23.515852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass
17241 13:55:23.516454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass>
17242 13:55:23.546532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
17243 13:55:23.546936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
17245 13:55:23.580750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
17246 13:55:23.581164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
17248 13:55:23.612583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
17250 13:55:23.613134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
17251 13:55:23.643626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass
17253 13:55:23.644047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass>
17254 13:55:23.674253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
17255 13:55:23.674705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
17257 13:55:23.706088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
17258 13:55:23.706542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
17260 13:55:23.737380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
17261 13:55:23.737856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
17263 13:55:23.768842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass>
17264 13:55:23.769289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass
17266 13:55:23.800325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
17267 13:55:23.800759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
17269 13:55:23.832047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
17270 13:55:23.832477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
17272 13:55:23.863153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
17274 13:55:23.863868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
17275 13:55:23.900623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass
17277 13:55:23.901048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass>
17278 13:55:23.935925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
17279 13:55:23.936326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
17281 13:55:23.971225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
17283 13:55:23.971650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
17284 13:55:24.006341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
17286 13:55:24.006913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
17287 13:55:24.041462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass
17289 13:55:24.041914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass>
17290 13:55:24.076163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
17292 13:55:24.076607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
17293 13:55:24.110694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
17294 13:55:24.111123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
17296 13:55:24.145198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
17297 13:55:24.145620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
17299 13:55:24.180203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass>
17300 13:55:24.180660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass
17302 13:55:24.214739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
17303 13:55:24.215106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
17305 13:55:24.249797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
17306 13:55:24.250166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
17308 13:55:24.284564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
17310 13:55:24.285020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
17311 13:55:24.320075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass
17313 13:55:24.320552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass>
17314 13:55:24.355234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
17316 13:55:24.355752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
17317 13:55:24.394586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
17318 13:55:24.394955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
17320 13:55:24.429179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
17321 13:55:24.429467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
17323 13:55:24.463686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass>
17324 13:55:24.464038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass
17326 13:55:24.497295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
17327 13:55:24.497642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
17329 13:55:24.531764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
17331 13:55:24.532214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
17332 13:55:24.566062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
17333 13:55:24.566485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
17335 13:55:24.600962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass
17337 13:55:24.601418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass>
17338 13:55:24.635794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
17340 13:55:24.636256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
17341 13:55:24.670137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
17342 13:55:24.670507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
17344 13:55:24.704688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
17345 13:55:24.705046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
17347 13:55:24.738859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass>
17348 13:55:24.739219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass
17350 13:55:24.773476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
17351 13:55:24.773928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
17353 13:55:24.808568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
17354 13:55:24.809039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
17356 13:55:24.842785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
17357 13:55:24.843125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
17359 13:55:24.877456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass
17361 13:55:24.877756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass>
17362 13:55:24.912055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
17363 13:55:24.912333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
17365 13:55:24.946707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
17367 13:55:24.947217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
17368 13:55:24.980906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
17369 13:55:24.981263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
17371 13:55:25.015878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass
17373 13:55:25.016384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass>
17374 13:55:25.050824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
17376 13:55:25.051117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
17377 13:55:25.085994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
17378 13:55:25.086272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
17380 13:55:25.120872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
17381 13:55:25.121164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
17383 13:55:25.156402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass>
17384 13:55:25.156684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass
17386 13:55:25.191046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
17388 13:55:25.191331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
17389 13:55:25.225258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
17390 13:55:25.225631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
17392 13:55:25.260706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
17393 13:55:25.261224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
17395 13:55:25.295463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass
17397 13:55:25.295958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass>
17398 13:55:25.329352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
17399 13:55:25.329747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
17401 13:55:25.364054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
17402 13:55:25.364412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
17404 13:55:25.398856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
17406 13:55:25.399429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
17407 13:55:25.445473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass
17409 13:55:25.445957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass>
17410 13:55:25.501716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
17411 13:55:25.502123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
17413 13:55:25.542267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
17415 13:55:25.542736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
17416 13:55:25.582900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
17417 13:55:25.583326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
17419 13:55:25.617519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass>
17420 13:55:25.617983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass
17422 13:55:25.651738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
17423 13:55:25.652164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
17425 13:55:25.685499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
17426 13:55:25.685926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
17428 13:55:25.719717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
17429 13:55:25.720148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
17431 13:55:25.754070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass>
17432 13:55:25.754492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass
17434 13:55:25.788201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
17435 13:55:25.788617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
17437 13:55:25.822679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
17438 13:55:25.823042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
17440 13:55:25.857068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
17441 13:55:25.857435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
17443 13:55:25.891975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass>
17444 13:55:25.892328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass
17446 13:55:25.926627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
17447 13:55:25.927082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
17449 13:55:25.961886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
17450 13:55:25.962211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
17452 13:55:25.996982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
17453 13:55:25.997261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
17455 13:55:26.031891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass
17457 13:55:26.032348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass>
17458 13:55:26.066723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
17459 13:55:26.067086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
17461 13:55:26.102281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
17462 13:55:26.102633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
17464 13:55:26.137076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
17466 13:55:26.137598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
17467 13:55:26.172489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass>
17468 13:55:26.172943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass
17470 13:55:26.206890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
17471 13:55:26.207241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
17473 13:55:26.242514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
17474 13:55:26.242861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
17476 13:55:26.276793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
17477 13:55:26.277144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
17479 13:55:26.312303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass>
17480 13:55:26.312759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass
17482 13:55:26.346287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
17483 13:55:26.346648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
17485 13:55:26.380681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
17487 13:55:26.381116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
17488 13:55:26.414704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
17489 13:55:26.415068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
17491 13:55:26.448889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass>
17492 13:55:26.449232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass
17494 13:55:26.482821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
17495 13:55:26.483185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
17497 13:55:26.517513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
17498 13:55:26.517883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
17500 13:55:26.552120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
17501 13:55:26.552468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
17503 13:55:26.586564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass
17505 13:55:26.587045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass>
17506 13:55:26.620544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
17508 13:55:26.620985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
17509 13:55:26.654493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
17510 13:55:26.654874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
17512 13:55:26.688543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
17513 13:55:26.688904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
17515 13:55:26.722791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass
17517 13:55:26.723236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass>
17518 13:55:26.757533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
17519 13:55:26.757912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
17521 13:55:26.792303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
17522 13:55:26.792673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
17524 13:55:26.826595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
17526 13:55:26.827027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
17527 13:55:26.861344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass>
17528 13:55:26.861685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass
17530 13:55:26.896051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
17531 13:55:26.896416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
17533 13:55:26.930607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
17534 13:55:26.930956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
17536 13:55:26.965479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
17537 13:55:26.965769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
17539 13:55:27.000076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass
17541 13:55:27.000356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass>
17542 13:55:27.034453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
17544 13:55:27.034880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
17545 13:55:27.070073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
17546 13:55:27.070422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
17548 13:55:27.104934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
17549 13:55:27.105344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
17551 13:55:27.140079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass
17553 13:55:27.140533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass>
17554 13:55:27.174770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
17555 13:55:27.175186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
17557 13:55:27.209629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
17558 13:55:27.210058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
17560 13:55:27.244285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
17561 13:55:27.244702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
17563 13:55:27.278576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass
17565 13:55:27.279035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass>
17566 13:55:27.312729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
17568 13:55:27.313286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
17569 13:55:27.346883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
17570 13:55:27.347252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
17572 13:55:27.381184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
17574 13:55:27.381697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
17575 13:55:27.416115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass
17577 13:55:27.416616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass>
17578 13:55:27.450444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
17580 13:55:27.450949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
17581 13:55:27.484927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
17583 13:55:27.485435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
17584 13:55:27.519152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
17586 13:55:27.519664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
17587 13:55:27.554063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass>
17588 13:55:27.554347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass
17590 13:55:27.589279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
17591 13:55:27.589562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
17593 13:55:27.625431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
17595 13:55:27.626085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
17596 13:55:27.660332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
17597 13:55:27.660742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
17599 13:55:27.696175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass
17601 13:55:27.696847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass>
17602 13:55:27.730751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
17603 13:55:27.731076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
17605 13:55:27.765959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
17606 13:55:27.766341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
17608 13:55:27.800920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
17609 13:55:27.801209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
17611 13:55:27.835667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass>
17612 13:55:27.835977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass
17614 13:55:27.870154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
17615 13:55:27.870526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
17617 13:55:27.904524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
17618 13:55:27.904901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
17620 13:55:27.938964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
17622 13:55:27.939482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
17623 13:55:27.974613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass
17625 13:55:27.975125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass>
17626 13:55:28.009287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
17627 13:55:28.009662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
17629 13:55:28.044448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
17630 13:55:28.044906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
17632 13:55:28.076994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
17633 13:55:28.077403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
17635 13:55:28.107692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass>
17636 13:55:28.108157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass
17638 13:55:28.138561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
17640 13:55:28.139120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
17641 13:55:28.170005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
17642 13:55:28.170455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
17644 13:55:28.200903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
17646 13:55:28.201447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
17647 13:55:28.236876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass>
17648 13:55:28.237282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass
17650 13:55:28.272339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
17651 13:55:28.272681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
17653 13:55:28.307789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
17655 13:55:28.308204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
17656 13:55:28.343020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
17658 13:55:28.343441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
17659 13:55:28.378326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass
17661 13:55:28.378810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass>
17662 13:55:28.413467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
17663 13:55:28.413819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
17665 13:55:28.448409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
17667 13:55:28.448814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
17668 13:55:28.483483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
17669 13:55:28.483825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
17671 13:55:28.519259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass
17673 13:55:28.519707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass>
17674 13:55:28.553896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
17675 13:55:28.554245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
17677 13:55:28.588815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
17679 13:55:28.589386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
17680 13:55:28.623609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
17681 13:55:28.624084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
17683 13:55:28.657959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass
17685 13:55:28.658414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass>
17686 13:55:28.692140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
17687 13:55:28.692561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
17689 13:55:28.726536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
17691 13:55:28.727097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
17692 13:55:28.761587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
17693 13:55:28.762069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
17695 13:55:28.797136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass
17697 13:55:28.797584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass>
17698 13:55:28.832052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
17699 13:55:28.832482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
17701 13:55:28.866734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
17702 13:55:28.867087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
17704 13:55:28.901481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
17705 13:55:28.901853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
17707 13:55:28.936277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass
17709 13:55:28.936712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass>
17710 13:55:28.971059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
17712 13:55:28.971559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
17713 13:55:29.006371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
17715 13:55:29.006802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
17716 13:55:29.041004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
17717 13:55:29.041420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
17719 13:55:29.076982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass
17721 13:55:29.077442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass>
17722 13:55:29.112132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
17723 13:55:29.112470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
17725 13:55:29.147768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
17726 13:55:29.148136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
17728 13:55:29.182506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
17730 13:55:29.183158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
17731 13:55:29.216831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass
17733 13:55:29.217428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass>
17734 13:55:29.252705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
17735 13:55:29.253038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
17737 13:55:29.288798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
17738 13:55:29.289171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
17740 13:55:29.324437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
17741 13:55:29.324740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
17743 13:55:29.368324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass>
17744 13:55:29.368671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass
17746 13:55:29.421571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
17747 13:55:29.422021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
17749 13:55:29.453512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
17750 13:55:29.453928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
17752 13:55:29.484977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
17754 13:55:29.485614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
17755 13:55:29.515677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass>
17756 13:55:29.516142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass
17758 13:55:29.546856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
17760 13:55:29.547424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
17761 13:55:29.578278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
17763 13:55:29.578902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
17764 13:55:29.610238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
17765 13:55:29.610653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
17767 13:55:29.644604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass>
17768 13:55:29.645040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass
17770 13:55:29.678323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
17772 13:55:29.678866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
17773 13:55:29.709931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
17775 13:55:29.710487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
17776 13:55:29.741045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
17777 13:55:29.741457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
17779 13:55:29.771985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass>
17780 13:55:29.772408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass
17782 13:55:29.802638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
17783 13:55:29.803072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
17785 13:55:29.833800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
17787 13:55:29.834242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
17788 13:55:29.865108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
17790 13:55:29.865547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
17791 13:55:29.898438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass
17793 13:55:29.898883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass>
17794 13:55:29.931990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
17796 13:55:29.932638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
17797 13:55:29.964285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
17799 13:55:29.964762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
17800 13:55:29.995632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
17801 13:55:29.996107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
17803 13:55:30.026051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass
17805 13:55:30.026682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass>
17806 13:55:30.057324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
17807 13:55:30.057730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
17809 13:55:30.088430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
17810 13:55:30.088857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
17812 13:55:30.119818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
17813 13:55:30.120244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
17815 13:55:30.151478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass>
17816 13:55:30.151911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass
17818 13:55:30.182115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
17819 13:55:30.182585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
17821 13:55:30.212683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
17822 13:55:30.213157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
17824 13:55:30.243683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
17826 13:55:30.244116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
17827 13:55:30.274532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass
17829 13:55:30.274970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass>
17830 13:55:30.305269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
17831 13:55:30.305668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
17833 13:55:30.337034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
17834 13:55:30.337495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
17836 13:55:30.368062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
17837 13:55:30.368507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
17839 13:55:30.398743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass
17841 13:55:30.399294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass>
17842 13:55:30.431868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
17843 13:55:30.432297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
17845 13:55:30.464500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
17847 13:55:30.465059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
17848 13:55:30.500355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
17849 13:55:30.500910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
17851 13:55:30.536940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass
17853 13:55:30.537498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass>
17854 13:55:30.574365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
17855 13:55:30.574837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
17857 13:55:30.606830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
17859 13:55:30.607381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
17860 13:55:30.637574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
17862 13:55:30.638044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
17863 13:55:30.668732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass>
17864 13:55:30.669205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass
17866 13:55:30.699959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
17867 13:55:30.700420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
17869 13:55:30.731039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
17871 13:55:30.731622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
17872 13:55:30.762049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
17874 13:55:30.762519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
17875 13:55:30.792791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass
17877 13:55:30.793260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass>
17878 13:55:30.823676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
17879 13:55:30.824082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
17881 13:55:30.856351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
17882 13:55:30.856770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
17884 13:55:30.888554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
17885 13:55:30.888954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
17887 13:55:30.920859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass
17889 13:55:30.921295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass>
17890 13:55:30.952315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
17891 13:55:30.952707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
17893 13:55:30.984047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
17895 13:55:30.984472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
17896 13:55:31.015107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
17898 13:55:31.015534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
17899 13:55:31.046186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass
17901 13:55:31.046610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass>
17902 13:55:31.077442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
17903 13:55:31.077838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
17905 13:55:31.108868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
17906 13:55:31.109307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
17908 13:55:31.139969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
17910 13:55:31.140501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
17911 13:55:31.171789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass>
17912 13:55:31.172238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass
17914 13:55:31.203260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
17916 13:55:31.203814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
17917 13:55:31.234402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
17918 13:55:31.234859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
17920 13:55:31.273147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
17921 13:55:31.273580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
17923 13:55:31.304587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass>
17924 13:55:31.305008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass
17926 13:55:31.336005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
17928 13:55:31.336437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
17929 13:55:31.368115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
17930 13:55:31.368562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
17932 13:55:31.399479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
17933 13:55:31.399943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
17935 13:55:31.430095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass>
17936 13:55:31.430560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass
17938 13:55:31.461131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
17940 13:55:31.461690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
17941 13:55:31.491868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
17942 13:55:31.492298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
17944 13:55:31.522655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
17945 13:55:31.523084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
17947 13:55:31.553604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass
17949 13:55:31.554027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass>
17950 13:55:31.584204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
17951 13:55:31.584603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
17953 13:55:31.615073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
17955 13:55:31.615520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
17956 13:55:31.646223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
17957 13:55:31.646681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
17959 13:55:31.677825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass>
17960 13:55:31.678308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass
17962 13:55:31.708967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
17964 13:55:31.709525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
17965 13:55:31.739973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
17967 13:55:31.740600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
17968 13:55:31.770802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
17970 13:55:31.771432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
17971 13:55:31.801384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass>
17972 13:55:31.801867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass
17974 13:55:31.832785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
17975 13:55:31.833248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
17977 13:55:31.863887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
17979 13:55:31.864462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
17980 13:55:31.897004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
17982 13:55:31.897432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
17983 13:55:31.931799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass>
17984 13:55:31.932268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass
17986 13:55:31.963756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
17987 13:55:31.964213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
17989 13:55:31.997630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
17990 13:55:31.998042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
17992 13:55:32.031465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
17993 13:55:32.031932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
17995 13:55:32.062720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass>
17996 13:55:32.063193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass
17998 13:55:32.094031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
17999 13:55:32.094472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
18001 13:55:32.124928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
18002 13:55:32.125425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
18004 13:55:32.156197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
18006 13:55:32.156665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
18007 13:55:32.188081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass>
18008 13:55:32.188529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass
18010 13:55:32.218935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
18012 13:55:32.219568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
18013 13:55:32.250044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
18015 13:55:32.250697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
18016 13:55:32.280939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
18017 13:55:32.281412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
18019 13:55:32.311863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass
18021 13:55:32.312494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass>
18022 13:55:32.342777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
18023 13:55:32.343249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
18025 13:55:32.374298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
18026 13:55:32.374777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
18028 13:55:32.405415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
18030 13:55:32.405891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
18031 13:55:32.435926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass
18033 13:55:32.436376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass>
18034 13:55:32.466154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
18036 13:55:32.466552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
18037 13:55:32.496358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
18038 13:55:32.496759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
18040 13:55:32.526799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
18041 13:55:32.527208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
18043 13:55:32.557544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass>
18044 13:55:32.558059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass
18046 13:55:32.588205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
18047 13:55:32.588698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
18049 13:55:32.619609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
18051 13:55:32.620198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
18052 13:55:32.653049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
18054 13:55:32.653480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
18055 13:55:32.686050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass
18057 13:55:32.686493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass>
18058 13:55:32.719914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
18059 13:55:32.720329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
18061 13:55:32.753613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
18063 13:55:32.754254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
18064 13:55:32.790595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
18066 13:55:32.791046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
18067 13:55:32.822642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass>
18068 13:55:32.823034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass
18070 13:55:32.853067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
18071 13:55:32.853494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
18073 13:55:32.884349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
18074 13:55:32.884792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
18076 13:55:32.915612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
18078 13:55:32.916047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
18079 13:55:32.946732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass
18081 13:55:32.947174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass>
18082 13:55:32.977464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
18084 13:55:32.977925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
18085 13:55:33.008710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
18086 13:55:33.009123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
18088 13:55:33.039948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
18090 13:55:33.040513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
18091 13:55:33.070784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass>
18092 13:55:33.071239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass
18094 13:55:33.102280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
18095 13:55:33.102706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
18097 13:55:33.133142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
18099 13:55:33.133720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
18100 13:55:33.164203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
18101 13:55:33.164678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
18103 13:55:33.195931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass>
18104 13:55:33.196345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass
18106 13:55:33.226890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
18108 13:55:33.227337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
18109 13:55:33.258031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
18111 13:55:33.258453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
18112 13:55:33.289368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
18113 13:55:33.289814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
18115 13:55:33.320095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass>
18116 13:55:33.320482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass
18118 13:55:33.350590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
18119 13:55:33.351022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
18121 13:55:33.381716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
18122 13:55:33.382135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
18124 13:55:33.412195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
18125 13:55:33.412606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
18127 13:55:33.442669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass
18129 13:55:33.443126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass>
18130 13:55:33.473599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
18131 13:55:33.474035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
18133 13:55:33.504560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
18135 13:55:33.505026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
18136 13:55:33.535606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
18138 13:55:33.536076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
18139 13:55:33.565585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass>
18140 13:55:33.566019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass
18142 13:55:33.596645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
18143 13:55:33.597057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
18145 13:55:33.627898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
18146 13:55:33.628316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
18148 13:55:33.658719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
18149 13:55:33.659131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
18151 13:55:33.689769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass>
18152 13:55:33.690159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass
18154 13:55:33.720233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
18155 13:55:33.720688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
18157 13:55:33.750499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
18158 13:55:33.750974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
18160 13:55:33.781178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
18161 13:55:33.781621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
18163 13:55:33.811806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass>
18164 13:55:33.812251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass
18166 13:55:33.842587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
18167 13:55:33.843053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
18169 13:55:33.873903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
18171 13:55:33.874541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
18172 13:55:33.904864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
18173 13:55:33.905287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
18175 13:55:33.935795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass>
18176 13:55:33.936223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass
18178 13:55:33.966502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
18180 13:55:33.966955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
18181 13:55:33.997533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
18183 13:55:33.998199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
18184 13:55:34.028094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
18185 13:55:34.028573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
18187 13:55:34.060352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass
18189 13:55:34.061002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass>
18190 13:55:34.094294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
18191 13:55:34.094762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
18193 13:55:34.125276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
18194 13:55:34.125701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
18196 13:55:34.156621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
18197 13:55:34.157091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
18199 13:55:34.187885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass
18201 13:55:34.188455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass>
18202 13:55:34.218122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
18203 13:55:34.218600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
18205 13:55:34.248746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
18207 13:55:34.249133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
18208 13:55:34.279423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
18209 13:55:34.279804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
18211 13:55:34.309321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass>
18212 13:55:34.309799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass
18214 13:55:34.340535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
18215 13:55:34.340978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
18217 13:55:34.372419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
18218 13:55:34.372867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
18220 13:55:34.403827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
18221 13:55:34.404314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
18223 13:55:34.436714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass>
18224 13:55:34.437184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass
18226 13:55:34.467658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
18227 13:55:34.468132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
18229 13:55:34.498323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
18230 13:55:34.498786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
18232 13:55:34.529225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
18233 13:55:34.529623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
18235 13:55:34.560111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass>
18236 13:55:34.560580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass
18238 13:55:34.590722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
18239 13:55:34.591163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
18241 13:55:34.622159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
18242 13:55:34.622602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
18244 13:55:34.653579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
18246 13:55:34.654203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
18247 13:55:34.684984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass
18249 13:55:34.685429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass>
18250 13:55:34.716267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
18252 13:55:34.716806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
18253 13:55:34.747888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
18255 13:55:34.748514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
18256 13:55:34.778963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
18258 13:55:34.779625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
18259 13:55:34.812044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass>
18260 13:55:34.812529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass
18262 13:55:34.843823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
18264 13:55:34.844448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
18265 13:55:34.875174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
18267 13:55:34.875807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
18268 13:55:34.906646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
18269 13:55:34.907100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
18271 13:55:34.938182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass>
18272 13:55:34.938635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass
18274 13:55:34.969203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
18275 13:55:34.969666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
18277 13:55:35.000921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
18278 13:55:35.001357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
18280 13:55:35.032320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
18282 13:55:35.032892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
18283 13:55:35.063059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass>
18284 13:55:35.063484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass
18286 13:55:35.093928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
18287 13:55:35.094365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
18289 13:55:35.125712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
18291 13:55:35.126182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
18292 13:55:35.156697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
18293 13:55:35.157192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
18295 13:55:35.191405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass
18297 13:55:35.191986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass>
18298 13:55:35.223873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
18300 13:55:35.224429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
18301 13:55:35.254635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
18302 13:55:35.255094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
18304 13:55:35.285884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
18305 13:55:35.286319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
18307 13:55:35.317004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass>
18308 13:55:35.317452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass
18310 13:55:35.348378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
18311 13:55:35.348845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
18313 13:55:35.380528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
18315 13:55:35.381080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
18316 13:55:35.411985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
18318 13:55:35.412547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
18319 13:55:35.445024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass>
18320 13:55:35.445495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass
18322 13:55:35.478311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
18324 13:55:35.479100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
18325 13:55:35.512259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
18327 13:55:35.512828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
18328 13:55:35.545731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
18330 13:55:35.546278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
18331 13:55:35.579709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass>
18332 13:55:35.580159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass
18334 13:55:35.616892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
18336 13:55:35.617347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
18337 13:55:35.652485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
18338 13:55:35.652888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
18340 13:55:35.684644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
18341 13:55:35.685055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
18343 13:55:35.716691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass
18345 13:55:35.717142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass>
18346 13:55:35.748203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
18348 13:55:35.748740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
18349 13:55:35.779555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
18350 13:55:35.779985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
18352 13:55:35.810129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
18353 13:55:35.810586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
18355 13:55:35.841011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass
18357 13:55:35.841556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass>
18358 13:55:35.872443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
18360 13:55:35.872895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
18361 13:55:35.904277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
18363 13:55:35.904861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
18364 13:55:35.935123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
18366 13:55:35.935727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
18367 13:55:35.967595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass
18369 13:55:35.968169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass>
18370 13:55:35.998661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
18372 13:55:35.999228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
18373 13:55:36.029269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
18374 13:55:36.029707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
18376 13:55:36.060822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
18378 13:55:36.061451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
18379 13:55:36.091840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass
18381 13:55:36.092393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass>
18382 13:55:36.123160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
18384 13:55:36.123611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
18385 13:55:36.154298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
18386 13:55:36.154769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
18388 13:55:36.185791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
18390 13:55:36.186348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
18391 13:55:36.217202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass>
18392 13:55:36.217668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass
18394 13:55:36.248171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
18395 13:55:36.248625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
18397 13:55:36.278846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
18399 13:55:36.279414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
18400 13:55:36.309638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
18401 13:55:36.310089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
18403 13:55:36.340106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass>
18404 13:55:36.340554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass
18406 13:55:36.370727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
18407 13:55:36.371164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
18409 13:55:36.420753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
18410 13:55:36.421162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
18412 13:55:36.451751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
18413 13:55:36.452204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
18415 13:55:36.482136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass
18417 13:55:36.482765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass>
18418 13:55:36.512588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
18420 13:55:36.513047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
18421 13:55:36.543647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
18423 13:55:36.544215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
18424 13:55:36.574554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
18426 13:55:36.575104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
18427 13:55:36.605687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass>
18428 13:55:36.606167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass
18430 13:55:36.636992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
18431 13:55:36.637439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
18433 13:55:36.668371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
18434 13:55:36.668819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
18436 13:55:36.698526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
18437 13:55:36.698999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
18439 13:55:36.729931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass
18441 13:55:36.730394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass>
18442 13:55:36.760385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
18444 13:55:36.760854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
18445 13:55:36.793759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
18446 13:55:36.794295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
18448 13:55:36.827804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
18450 13:55:36.828428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
18451 13:55:36.858501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass>
18452 13:55:36.858952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass
18454 13:55:36.889972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
18455 13:55:36.890423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
18457 13:55:36.920367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
18458 13:55:36.920803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
18460 13:55:36.952912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
18461 13:55:36.953400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
18463 13:55:36.985910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass>
18464 13:55:36.986396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass
18466 13:55:37.016569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
18467 13:55:37.017032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
18469 13:55:37.048270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
18471 13:55:37.048879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
18472 13:55:37.079241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
18474 13:55:37.079816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
18475 13:55:37.109862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass
18477 13:55:37.110423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass>
18478 13:55:37.141035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
18479 13:55:37.141478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
18481 13:55:37.172207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
18483 13:55:37.172775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
18484 13:55:37.204022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
18486 13:55:37.204579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
18487 13:55:37.235824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass>
18488 13:55:37.236295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass
18490 13:55:37.267183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
18492 13:55:37.267782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
18493 13:55:37.297844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
18494 13:55:37.298341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
18496 13:55:37.328732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
18497 13:55:37.329185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
18499 13:55:37.359137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass
18501 13:55:37.359706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass>
18502 13:55:37.389976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
18503 13:55:37.390438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
18505 13:55:37.421113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
18507 13:55:37.421748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
18508 13:55:37.452080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
18510 13:55:37.452641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
18511 13:55:37.482687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass>
18512 13:55:37.483154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass
18514 13:55:37.514205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
18516 13:55:37.514782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
18517 13:55:37.545361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
18519 13:55:37.545991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
18520 13:55:37.576149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
18522 13:55:37.576719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
18523 13:55:37.606776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass>
18524 13:55:37.607166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass
18526 13:55:37.638325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
18528 13:55:37.638964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
18529 13:55:37.669955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
18531 13:55:37.670595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
18532 13:55:37.703061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
18534 13:55:37.703722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
18535 13:55:37.740169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass>
18536 13:55:37.740706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass
18538 13:55:37.774424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
18539 13:55:37.774925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
18541 13:55:37.808371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
18542 13:55:37.808821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
18544 13:55:37.842109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
18545 13:55:37.842655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
18547 13:55:37.874699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass>
18548 13:55:37.875219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass
18550 13:55:37.907380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
18552 13:55:37.907828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
18553 13:55:37.939360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
18555 13:55:37.939924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
18556 13:55:37.971772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
18557 13:55:37.972149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
18559 13:55:38.005004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass
18561 13:55:38.005584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass>
18562 13:55:38.038359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
18563 13:55:38.038797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
18565 13:55:38.069802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
18566 13:55:38.070242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
18568 13:55:38.100748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
18570 13:55:38.101216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
18571 13:55:38.131076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass
18573 13:55:38.131766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass>
18574 13:55:38.161999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
18575 13:55:38.162442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
18577 13:55:38.192616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
18578 13:55:38.193038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
18580 13:55:38.223298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
18582 13:55:38.223757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
18583 13:55:38.254295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass
18585 13:55:38.254746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass>
18586 13:55:38.285780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
18587 13:55:38.286230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
18589 13:55:38.317085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
18590 13:55:38.317519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
18592 13:55:38.348513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
18593 13:55:38.348893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
18595 13:55:38.379964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass
18597 13:55:38.380563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass>
18598 13:55:38.410778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
18600 13:55:38.411490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
18601 13:55:38.443094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
18603 13:55:38.443742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
18604 13:55:38.474241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
18605 13:55:38.474697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
18607 13:55:38.505162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass>
18608 13:55:38.505632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass
18610 13:55:38.536993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
18612 13:55:38.537622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
18613 13:55:38.568843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
18614 13:55:38.569304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
18616 13:55:38.600211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
18617 13:55:38.600670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
18619 13:55:38.631044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass
18621 13:55:38.631617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass>
18622 13:55:38.662430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
18623 13:55:38.662877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
18625 13:55:38.694336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
18626 13:55:38.694788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
18628 13:55:38.726049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
18630 13:55:38.726652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
18631 13:55:38.757545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass
18633 13:55:38.758082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass>
18634 13:55:38.788619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
18635 13:55:38.788999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
18637 13:55:38.820040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
18639 13:55:38.820444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
18640 13:55:38.850680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
18641 13:55:38.851075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
18643 13:55:38.881616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass>
18644 13:55:38.882031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass
18646 13:55:38.912449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
18647 13:55:38.912870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
18649 13:55:38.944051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
18651 13:55:38.944486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
18652 13:55:38.975832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
18654 13:55:38.976265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
18655 13:55:39.007785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass>
18656 13:55:39.008197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass
18658 13:55:39.039342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
18660 13:55:39.039958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
18661 13:55:39.070211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
18662 13:55:39.070628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
18664 13:55:39.101710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
18666 13:55:39.102142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
18667 13:55:39.132588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass>
18668 13:55:39.133005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass
18670 13:55:39.163661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
18672 13:55:39.164125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
18673 13:55:39.197024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
18674 13:55:39.197451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
18676 13:55:39.228628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
18678 13:55:39.229266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
18679 13:55:39.261620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass
18681 13:55:39.262265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass>
18682 13:55:39.292587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
18684 13:55:39.293044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
18685 13:55:39.325223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
18686 13:55:39.325620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
18688 13:55:39.355696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
18689 13:55:39.356173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
18691 13:55:39.388776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass>
18692 13:55:39.389333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass
18694 13:55:39.421537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
18696 13:55:39.422353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
18697 13:55:39.454541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
18698 13:55:39.455059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
18700 13:55:39.487662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
18701 13:55:39.488036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
18703 13:55:39.519226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass
18705 13:55:39.519792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass>
18706 13:55:39.549999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
18708 13:55:39.550541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
18709 13:55:39.581139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
18710 13:55:39.581610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
18712 13:55:39.612389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
18713 13:55:39.612859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
18715 13:55:39.644048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass
18717 13:55:39.644700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass>
18718 13:55:39.675972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
18719 13:55:39.676403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
18721 13:55:39.706828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
18722 13:55:39.707266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
18724 13:55:39.738648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
18725 13:55:39.739078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
18727 13:55:39.774521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass
18729 13:55:39.775071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass>
18730 13:55:39.806865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
18732 13:55:39.807466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
18733 13:55:39.840009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
18735 13:55:39.840619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
18736 13:55:39.872674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
18737 13:55:39.873124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
18739 13:55:39.906486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass
18741 13:55:39.907286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass>
18742 13:55:39.941699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
18744 13:55:39.942261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
18745 13:55:39.973779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
18747 13:55:39.974337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
18748 13:55:40.005370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
18750 13:55:40.005930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
18751 13:55:40.037071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass
18753 13:55:40.037640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass>
18754 13:55:40.068191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
18755 13:55:40.068656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
18757 13:55:40.099206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
18759 13:55:40.099811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
18760 13:55:40.130449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
18762 13:55:40.131056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
18763 13:55:40.162511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass
18765 13:55:40.163127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass>
18766 13:55:40.197040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
18767 13:55:40.197624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
18769 13:55:40.232128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
18771 13:55:40.232769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
18772 13:55:40.264821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
18774 13:55:40.265407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
18775 13:55:40.297732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass
18777 13:55:40.298301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass>
18778 13:55:40.329872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
18780 13:55:40.330314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
18781 13:55:40.361825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
18782 13:55:40.362284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
18784 13:55:40.394730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
18786 13:55:40.395196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
18787 13:55:40.426177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass>
18788 13:55:40.426666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass
18790 13:55:40.460732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
18792 13:55:40.461310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
18793 13:55:40.508638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
18794 13:55:40.509139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
18796 13:55:40.561192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
18797 13:55:40.561640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
18799 13:55:40.613779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass>
18800 13:55:40.614268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass
18802 13:55:40.648209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
18803 13:55:40.648685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
18805 13:55:40.680207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
18806 13:55:40.680609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
18808 13:55:40.712690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
18810 13:55:40.713174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
18811 13:55:40.744004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass>
18812 13:55:40.744467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass
18814 13:55:40.775890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
18815 13:55:40.776343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
18817 13:55:40.807619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
18818 13:55:40.808047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
18820 13:55:40.839154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
18822 13:55:40.839767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
18823 13:55:40.871594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass
18825 13:55:40.872062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass>
18826 13:55:40.902600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
18827 13:55:40.903031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
18829 13:55:40.933476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
18831 13:55:40.934088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
18832 13:55:40.964989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
18833 13:55:40.965410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
18835 13:55:41.000064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass>
18836 13:55:41.000502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass
18838 13:55:41.034728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
18839 13:55:41.035172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
18841 13:55:41.068266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
18843 13:55:41.068730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
18844 13:55:41.099937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
18845 13:55:41.100360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
18847 13:55:41.131843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass
18849 13:55:41.132398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass>
18850 13:55:41.163443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
18851 13:55:41.163874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
18853 13:55:41.198184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
18855 13:55:41.198661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
18856 13:55:41.230641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
18857 13:55:41.231075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
18859 13:55:41.263913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass
18861 13:55:41.264385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass>
18862 13:55:41.295705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
18864 13:55:41.296270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
18865 13:55:41.326810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
18866 13:55:41.327254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
18868 13:55:41.358123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
18869 13:55:41.358566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
18871 13:55:41.392337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass>
18872 13:55:41.392716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass
18874 13:55:41.423769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
18876 13:55:41.424426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
18877 13:55:41.457983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
18879 13:55:41.458630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
18880 13:55:41.492153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
18881 13:55:41.492625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
18883 13:55:41.546634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass
18885 13:55:41.547281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass>
18886 13:55:41.577550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
18887 13:55:41.578047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
18889 13:55:41.609659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
18890 13:55:41.610160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
18892 13:55:41.640383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
18893 13:55:41.640860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
18895 13:55:41.672132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass>
18896 13:55:41.672591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass
18898 13:55:41.703105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
18900 13:55:41.703670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
18901 13:55:41.734291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
18902 13:55:41.734734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
18904 13:55:41.765325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
18905 13:55:41.765791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
18907 13:55:41.796605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass>
18908 13:55:41.797070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass
18910 13:55:41.828651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
18911 13:55:41.829059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
18913 13:55:41.860450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
18914 13:55:41.860867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
18916 13:55:41.891952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
18918 13:55:41.892506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
18919 13:55:41.926540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass
18921 13:55:41.927102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass>
18922 13:55:41.957927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
18924 13:55:41.958641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
18925 13:55:41.989569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
18927 13:55:41.990130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
18928 13:55:42.024985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
18929 13:55:42.025397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
18931 13:55:42.056389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass>
18932 13:55:42.056836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass
18934 13:55:42.088485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
18935 13:55:42.088956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
18937 13:55:42.123602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
18938 13:55:42.124066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
18940 13:55:42.159653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
18941 13:55:42.160113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
18943 13:55:42.191793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass
18945 13:55:42.192338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass>
18946 13:55:42.223778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
18948 13:55:42.224208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
18949 13:55:42.254909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
18950 13:55:42.255416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
18952 13:55:42.285994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
18954 13:55:42.286641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
18955 13:55:42.316517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass
18957 13:55:42.317156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass>
18958 13:55:42.348804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
18959 13:55:42.349294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
18961 13:55:42.380483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
18962 13:55:42.380963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
18964 13:55:42.412235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
18965 13:55:42.412699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
18967 13:55:42.444071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass
18969 13:55:42.444631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass>
18970 13:55:42.474911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
18972 13:55:42.475390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
18973 13:55:42.506214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
18974 13:55:42.506631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
18976 13:55:42.537903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
18977 13:55:42.538377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
18979 13:55:42.568910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass
18981 13:55:42.569500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass>
18982 13:55:42.600251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
18983 13:55:42.600692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
18985 13:55:42.632149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
18986 13:55:42.632602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
18988 13:55:42.664014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
18990 13:55:42.664559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
18991 13:55:42.704724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass
18993 13:55:42.705361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass>
18994 13:55:42.752687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
18995 13:55:42.753220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
18997 13:55:42.788044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
18998 13:55:42.788543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
19000 13:55:42.831096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
19002 13:55:42.831711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
19003 13:55:42.863684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass>
19004 13:55:42.864152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass
19006 13:55:42.896232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
19008 13:55:42.896797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
19009 13:55:42.928019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
19011 13:55:42.928489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
19012 13:55:42.959336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
19013 13:55:42.959767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
19015 13:55:42.993026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass
19017 13:55:42.993591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass>
19018 13:55:43.023650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
19019 13:55:43.024134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
19021 13:55:43.057630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
19022 13:55:43.058063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
19024 13:55:43.092735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
19025 13:55:43.093177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
19027 13:55:43.147194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass
19029 13:55:43.147613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass>
19030 13:55:43.188211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
19031 13:55:43.188596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
19033 13:55:43.222379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
19034 13:55:43.222852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
19036 13:55:43.254545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
19037 13:55:43.255042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
19039 13:55:43.287363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass>
19040 13:55:43.287798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass
19042 13:55:43.319034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
19044 13:55:43.319663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
19045 13:55:43.350923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
19047 13:55:43.351381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
19048 13:55:43.382251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
19050 13:55:43.382886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
19051 13:55:43.413703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass>
19052 13:55:43.414118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass
19054 13:55:43.444323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
19055 13:55:43.444801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
19057 13:55:43.477043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
19058 13:55:43.477522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
19060 13:55:43.508601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
19061 13:55:43.509051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
19063 13:55:43.540752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass>
19064 13:55:43.541224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass
19066 13:55:43.572863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
19067 13:55:43.573336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
19069 13:55:43.604314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
19070 13:55:43.604768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
19072 13:55:43.635959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
19073 13:55:43.636405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
19075 13:55:43.668336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass>
19076 13:55:43.668790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass
19078 13:55:43.699791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
19080 13:55:43.700344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
19081 13:55:43.731952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
19082 13:55:43.732414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
19084 13:55:43.763966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
19086 13:55:43.764417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
19087 13:55:43.794487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass>
19088 13:55:43.794895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass
19090 13:55:43.825939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
19092 13:55:43.826591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
19093 13:55:43.857012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
19094 13:55:43.857488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
19096 13:55:43.889304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
19098 13:55:43.889955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
19099 13:55:43.922368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass
19101 13:55:43.923002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass>
19102 13:55:43.956932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
19104 13:55:43.957575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
19105 13:55:43.992351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
19107 13:55:43.992913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
19108 13:55:44.027787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
19110 13:55:44.028347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
19111 13:55:44.060266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass
19113 13:55:44.060627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass>
19114 13:55:44.092956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
19116 13:55:44.093364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
19117 13:55:44.124420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
19119 13:55:44.124983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
19120 13:55:44.155604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
19121 13:55:44.156062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
19123 13:55:44.186444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass>
19124 13:55:44.186918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass
19126 13:55:44.218434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
19127 13:55:44.218908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
19129 13:55:44.250057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
19130 13:55:44.250524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
19132 13:55:44.282554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
19133 13:55:44.283024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
19135 13:55:44.321273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass
19137 13:55:44.321818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass>
19138 13:55:44.354679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
19139 13:55:44.355138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
19141 13:55:44.387982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
19142 13:55:44.388449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
19144 13:55:44.419797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
19146 13:55:44.420338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
19147 13:55:44.450938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass
19149 13:55:44.451501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass>
19150 13:55:44.483288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
19152 13:55:44.483845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
19153 13:55:44.515534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
19155 13:55:44.516096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
19156 13:55:44.548191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
19157 13:55:44.548654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
19159 13:55:44.581650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass>
19160 13:55:44.582098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass
19162 13:55:44.613852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
19163 13:55:44.614289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
19165 13:55:44.645595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
19167 13:55:44.646148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
19168 13:55:44.677682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
19169 13:55:44.678137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
19171 13:55:44.709153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass>
19172 13:55:44.709618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass
19174 13:55:44.741594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
19175 13:55:44.742060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
19177 13:55:44.774069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
19179 13:55:44.774615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
19180 13:55:44.806189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
19182 13:55:44.806651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
19183 13:55:44.837873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass>
19184 13:55:44.838291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass
19186 13:55:44.869498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
19187 13:55:44.869968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
19189 13:55:44.901536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
19190 13:55:44.902004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
19192 13:55:44.933725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
19193 13:55:44.934176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
19195 13:55:44.965132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass
19197 13:55:44.965596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass>
19198 13:55:44.996952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
19199 13:55:44.997470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
19201 13:55:45.029330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
19202 13:55:45.029820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
19204 13:55:45.061186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
19205 13:55:45.061689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
19207 13:55:45.094160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass>
19208 13:55:45.094683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass
19210 13:55:45.126312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
19211 13:55:45.126777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
19213 13:55:45.158014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
19214 13:55:45.158489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
19216 13:55:45.190186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
19217 13:55:45.190720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
19219 13:55:45.221946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass
19221 13:55:45.222513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass>
19222 13:55:45.254121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
19224 13:55:45.254702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
19225 13:55:45.285802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
19226 13:55:45.286240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
19228 13:55:45.322588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
19229 13:55:45.323059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
19231 13:55:45.359295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass
19233 13:55:45.359728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass>
19234 13:55:45.391870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
19236 13:55:45.392314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
19237 13:55:45.424147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
19238 13:55:45.424588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
19240 13:55:45.456457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
19241 13:55:45.456894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
19243 13:55:45.498038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass>
19244 13:55:45.498512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass
19246 13:55:45.538453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
19247 13:55:45.538960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
19249 13:55:45.573077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
19250 13:55:45.573554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
19252 13:55:45.605550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
19253 13:55:45.606139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
19255 13:55:45.638605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass>
19256 13:55:45.639022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass
19258 13:55:45.672392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
19260 13:55:45.673166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
19261 13:55:45.712375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
19262 13:55:45.712940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
19264 13:55:45.745345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
19265 13:55:45.745694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
19267 13:55:45.778120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass
19269 13:55:45.778525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass>
19270 13:55:45.810905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
19272 13:55:45.811533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
19273 13:55:45.844419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
19274 13:55:45.844809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
19276 13:55:45.877383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
19277 13:55:45.877789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
19279 13:55:45.909565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass
19281 13:55:45.910011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass>
19282 13:55:45.942348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
19284 13:55:45.942913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
19285 13:55:45.974882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
19286 13:55:45.975331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
19288 13:55:46.007533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
19289 13:55:46.007991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
19291 13:55:46.039542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass>
19292 13:55:46.039988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass
19294 13:55:46.084584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
19296 13:55:46.085170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
19297 13:55:46.127069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
19299 13:55:46.127631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
19300 13:55:46.160881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
19301 13:55:46.161296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
19303 13:55:46.193625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass
19305 13:55:46.194047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass>
19306 13:55:46.224856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
19307 13:55:46.225284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
19309 13:55:46.257105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
19310 13:55:46.257572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
19312 13:55:46.292849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
19313 13:55:46.293249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
19315 13:55:46.325200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass
19317 13:55:46.325618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass>
19318 13:55:46.357672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
19320 13:55:46.358074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
19321 13:55:46.389351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
19322 13:55:46.389740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
19324 13:55:46.420668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
19325 13:55:46.421140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
19327 13:55:46.452942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass
19329 13:55:46.453488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass>
19330 13:55:46.484082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
19331 13:55:46.484538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
19333 13:55:46.515854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
19334 13:55:46.516321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
19336 13:55:46.547408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
19337 13:55:46.547883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
19339 13:55:46.577799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass
19341 13:55:46.578352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass>
19342 13:55:46.608173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
19343 13:55:46.608628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
19345 13:55:46.657784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
19346 13:55:46.658242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
19348 13:55:46.689102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
19349 13:55:46.689533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
19351 13:55:46.721282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass>
19352 13:55:46.721746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass
19354 13:55:46.752256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
19355 13:55:46.752653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
19357 13:55:46.783887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
19358 13:55:46.784353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
19360 13:55:46.815292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
19362 13:55:46.815840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
19363 13:55:46.846279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass
19365 13:55:46.846791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass>
19366 13:55:46.877529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
19367 13:55:46.877987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
19369 13:55:46.909237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
19370 13:55:46.909671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
19372 13:55:46.940259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
19374 13:55:46.940819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
19375 13:55:46.971063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass
19377 13:55:46.971579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass>
19378 13:55:47.002374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
19379 13:55:47.002807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
19381 13:55:47.034058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
19382 13:55:47.034564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
19384 13:55:47.065934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
19385 13:55:47.066381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
19387 13:55:47.097172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass
19389 13:55:47.097782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass>
19390 13:55:47.129889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
19391 13:55:47.130343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
19393 13:55:47.161142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
19394 13:55:47.161588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
19396 13:55:47.192999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
19397 13:55:47.193438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
19399 13:55:47.225459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass>
19400 13:55:47.225914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass
19402 13:55:47.257377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
19403 13:55:47.257800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
19405 13:55:47.289113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
19406 13:55:47.289532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
19408 13:55:47.320910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
19409 13:55:47.321330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
19411 13:55:47.352735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass
19413 13:55:47.353268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass>
19414 13:55:47.384618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
19415 13:55:47.385070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
19417 13:55:47.416691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
19418 13:55:47.417151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
19420 13:55:47.448042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
19421 13:55:47.448471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
19423 13:55:47.480031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass
19425 13:55:47.480568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass>
19426 13:55:47.511742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
19427 13:55:47.512178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
19429 13:55:47.542937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
19430 13:55:47.543387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
19432 13:55:47.576139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
19433 13:55:47.576591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
19435 13:55:47.608167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass
19437 13:55:47.608622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass>
19438 13:55:47.640364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
19439 13:55:47.640756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
19441 13:55:47.671333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
19443 13:55:47.671883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
19444 13:55:47.718470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
19446 13:55:47.719030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
19447 13:55:47.752708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass>
19448 13:55:47.753170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass
19450 13:55:47.786584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
19451 13:55:47.787074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
19453 13:55:47.820314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
19455 13:55:47.820784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
19456 13:55:47.853371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
19457 13:55:47.853866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
19459 13:55:47.884894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass>
19460 13:55:47.885373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass
19462 13:55:47.917972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
19463 13:55:47.918448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
19465 13:55:47.950168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
19466 13:55:47.950590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
19468 13:55:47.983758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
19470 13:55:47.984226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
19471 13:55:48.016480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass
19473 13:55:48.016926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass>
19474 13:55:48.048324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
19475 13:55:48.048726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
19477 13:55:48.080121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
19478 13:55:48.080529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
19480 13:55:48.111598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
19481 13:55:48.112012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
19483 13:55:48.143161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass
19485 13:55:48.143648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass>
19486 13:55:48.176130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
19487 13:55:48.176550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
19489 13:55:48.207921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
19490 13:55:48.208343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
19492 13:55:48.239937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
19493 13:55:48.240416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
19495 13:55:48.272472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass
19497 13:55:48.273043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass>
19498 13:55:48.303986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
19499 13:55:48.304448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
19501 13:55:48.335982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
19503 13:55:48.336565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
19504 13:55:48.368359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
19506 13:55:48.368926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
19507 13:55:48.399947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass>
19508 13:55:48.400405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass
19510 13:55:48.431994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
19511 13:55:48.432474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
19513 13:55:48.463618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
19514 13:55:48.464062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
19516 13:55:48.495572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
19517 13:55:48.496042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
19519 13:55:48.528842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass
19521 13:55:48.529419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass>
19522 13:55:48.559877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
19523 13:55:48.560322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
19525 13:55:48.591845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
19527 13:55:48.592389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
19528 13:55:48.622668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
19529 13:55:48.623129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
19531 13:55:48.654088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass>
19532 13:55:48.654538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass
19534 13:55:48.684842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
19535 13:55:48.685303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
19537 13:55:48.716629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
19539 13:55:48.717188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
19540 13:55:48.748482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
19541 13:55:48.748953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
19543 13:55:48.780428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass>
19544 13:55:48.780895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass
19546 13:55:48.812411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
19548 13:55:48.812979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
19549 13:55:48.844050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
19551 13:55:48.844605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
19552 13:55:48.875770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
19553 13:55:48.876202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
19555 13:55:48.906438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass>
19556 13:55:48.906904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass
19558 13:55:48.937304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
19559 13:55:48.937750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
19561 13:55:48.969531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
19562 13:55:48.970018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
19564 13:55:49.002563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
19566 13:55:49.003028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
19567 13:55:49.034254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass>
19568 13:55:49.034714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass
19570 13:55:49.065809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
19571 13:55:49.066274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
19573 13:55:49.097552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
19574 13:55:49.097987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
19576 13:55:49.128291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
19577 13:55:49.128698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
19579 13:55:49.158696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass>
19580 13:55:49.159113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass
19582 13:55:49.189477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
19583 13:55:49.189948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
19585 13:55:49.220744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
19586 13:55:49.221194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
19588 13:55:49.252118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
19590 13:55:49.252566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
19591 13:55:49.284367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass
19593 13:55:49.284914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass>
19594 13:55:49.316126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
19596 13:55:49.316670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
19597 13:55:49.348098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
19598 13:55:49.348507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
19600 13:55:49.382741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
19601 13:55:49.383205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
19603 13:55:49.427782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass
19605 13:55:49.428329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass>
19606 13:55:49.458845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
19608 13:55:49.459432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
19609 13:55:49.490723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
19611 13:55:49.491298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
19612 13:55:49.521733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
19614 13:55:49.522269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
19615 13:55:49.552798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass>
19616 13:55:49.553243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass
19618 13:55:49.584823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
19619 13:55:49.585292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
19621 13:55:49.615911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
19623 13:55:49.616474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
19624 13:55:49.647121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
19626 13:55:49.647684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
19627 13:55:49.677870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass
19629 13:55:49.678323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass>
19630 13:55:49.708374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
19631 13:55:49.708786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
19633 13:55:49.739870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
19635 13:55:49.740423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
19636 13:55:49.771151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
19638 13:55:49.771720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
19639 13:55:49.803510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass>
19640 13:55:49.803985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass
19642 13:55:49.835973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
19643 13:55:49.836429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
19645 13:55:49.867986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
19647 13:55:49.868545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
19648 13:55:49.900138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
19650 13:55:49.900587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
19651 13:55:49.934104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass>
19652 13:55:49.934526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass
19654 13:55:49.967843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
19656 13:55:49.968210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
19657 13:55:50.003059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
19659 13:55:50.003503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
19660 13:55:50.035845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
19662 13:55:50.036255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
19663 13:55:50.068416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass>
19664 13:55:50.068834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass
19666 13:55:50.102070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
19667 13:55:50.102445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
19669 13:55:50.143908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
19670 13:55:50.144310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
19672 13:55:50.179280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
19674 13:55:50.179644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
19675 13:55:50.213919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass>
19676 13:55:50.214312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass
19678 13:55:50.248102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
19679 13:55:50.248541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
19681 13:55:50.284146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
19682 13:55:50.284546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
19684 13:55:50.318285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
19686 13:55:50.318747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
19687 13:55:50.352171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass
19689 13:55:50.352635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass>
19690 13:55:50.386154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
19692 13:55:50.386614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
19693 13:55:50.420897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
19694 13:55:50.421324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
19696 13:55:50.455283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
19698 13:55:50.455713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
19699 13:55:50.491544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass>
19700 13:55:50.491947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass
19702 13:55:50.528349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
19703 13:55:50.528828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
19705 13:55:50.567309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
19707 13:55:50.567767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
19708 13:55:50.605372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
19710 13:55:50.605823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
19711 13:55:50.644033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass>
19712 13:55:50.644462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass
19714 13:55:50.684172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
19715 13:55:50.684545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
19717 13:55:50.718838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
19719 13:55:50.719239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
19720 13:55:50.753639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
19721 13:55:50.754046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
19723 13:55:50.788155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass>
19724 13:55:50.788564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass
19726 13:55:50.823193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
19728 13:55:50.823633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
19729 13:55:50.857581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
19730 13:55:50.858006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
19732 13:55:50.893778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
19733 13:55:50.894198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
19735 13:55:50.930537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass>
19736 13:55:50.930955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass
19738 13:55:50.966014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
19740 13:55:50.966464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
19741 13:55:51.000248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
19742 13:55:51.000667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
19744 13:55:51.034432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
19746 13:55:51.034895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
19747 13:55:51.068703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass>
19748 13:55:51.069121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass
19750 13:55:51.102808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
19752 13:55:51.103257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
19753 13:55:51.137309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
19755 13:55:51.137906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
19756 13:55:51.170488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
19758 13:55:51.170952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
19759 13:55:51.203723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass>
19760 13:55:51.204157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass
19762 13:55:51.237256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
19764 13:55:51.237841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
19765 13:55:51.270674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
19766 13:55:51.271094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
19768 13:55:51.303964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
19769 13:55:51.304438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
19771 13:55:51.336412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass>
19772 13:55:51.336888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass
19774 13:55:51.369467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
19776 13:55:51.369936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
19777 13:55:51.402269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
19778 13:55:51.402735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
19780 13:55:51.435569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
19782 13:55:51.436255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
19783 13:55:51.468135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass>
19784 13:55:51.468584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass
19786 13:55:51.501399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
19787 13:55:51.501831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
19789 13:55:51.534166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
19790 13:55:51.534596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
19792 13:55:51.566687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
19793 13:55:51.567115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
19795 13:55:51.599211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass
19797 13:55:51.599738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass>
19798 13:55:51.632230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
19799 13:55:51.632663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
19801 13:55:51.665233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
19802 13:55:51.665695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
19804 13:55:51.700202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
19806 13:55:51.700822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
19807 13:55:51.733389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass
19809 13:55:51.734005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass>
19810 13:55:51.792791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
19811 13:55:51.793235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
19813 13:55:51.826276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
19814 13:55:51.826741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
19816 13:55:51.859522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
19817 13:55:51.859969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
19819 13:55:51.894834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass>
19820 13:55:51.895290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass
19822 13:55:51.934106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
19823 13:55:51.934559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
19825 13:55:51.982267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
19827 13:55:51.982835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
19828 13:55:52.016071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
19829 13:55:52.016551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
19831 13:55:52.055580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass
19833 13:55:52.056034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass>
19834 13:55:52.091741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
19835 13:55:52.092303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
19837 13:55:52.128641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
19838 13:55:52.129185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
19840 13:55:52.165099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
19841 13:55:52.165563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
19843 13:55:52.201015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass>
19844 13:55:52.201548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass
19846 13:55:52.237189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
19847 13:55:52.237661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
19849 13:55:52.274044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
19850 13:55:52.274488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
19852 13:55:52.310640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
19854 13:55:52.311237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
19855 13:55:52.346271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass>
19856 13:55:52.346702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass
19858 13:55:52.382271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
19860 13:55:52.382686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
19861 13:55:52.418872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
19863 13:55:52.419583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
19864 13:55:52.454370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
19866 13:55:52.454830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
19867 13:55:52.489464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass>
19868 13:55:52.489903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass
19870 13:55:52.525015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
19871 13:55:52.525438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
19873 13:55:52.561236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
19874 13:55:52.561697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
19876 13:55:52.599886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
19877 13:55:52.600312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
19879 13:55:52.636452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass>
19880 13:55:52.636826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass
19882 13:55:52.672407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
19884 13:55:52.673028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
19885 13:55:52.708779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
19887 13:55:52.709424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
19888 13:55:52.744876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
19889 13:55:52.745294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
19891 13:55:52.782629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass>
19892 13:55:52.783040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass
19894 13:55:52.819639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
19895 13:55:52.820198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
19897 13:55:52.856022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
19898 13:55:52.856436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
19900 13:55:52.892300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
19902 13:55:52.892747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
19903 13:55:52.928543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass
19905 13:55:52.928991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass>
19906 13:55:52.964252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
19907 13:55:52.964732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
19909 13:55:52.999847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
19911 13:55:53.000479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
19912 13:55:53.035230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
19914 13:55:53.035946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
19915 13:55:53.071208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass
19917 13:55:53.071666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass>
19918 13:55:53.107733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
19919 13:55:53.108145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
19921 13:55:53.144769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
19922 13:55:53.145210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
19924 13:55:53.179973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
19925 13:55:53.180387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
19927 13:55:53.216253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass
19929 13:55:53.216736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass>
19930 13:55:53.252010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
19931 13:55:53.252418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
19933 13:55:53.287942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
19934 13:55:53.288358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
19936 13:55:53.323798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
19937 13:55:53.324205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
19939 13:55:53.359639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass>
19940 13:55:53.360080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass
19942 13:55:53.395188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
19944 13:55:53.395645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
19945 13:55:53.431958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
19946 13:55:53.432369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
19948 13:55:53.468011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
19949 13:55:53.468388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
19951 13:55:53.502617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass>
19952 13:55:53.503004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass
19954 13:55:53.537798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
19955 13:55:53.538164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
19957 13:55:53.572535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
19958 13:55:53.572904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
19960 13:55:53.607670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
19961 13:55:53.608026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
19963 13:55:53.642502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass
19965 13:55:53.642955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass>
19966 13:55:53.677349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
19968 13:55:53.677731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
19969 13:55:53.712575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
19970 13:55:53.712976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
19972 13:55:53.748408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
19973 13:55:53.748730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
19975 13:55:53.784425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass>
19976 13:55:53.784801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass
19978 13:55:53.819870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
19980 13:55:53.820320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
19981 13:55:53.856053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
19982 13:55:53.856572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
19984 13:55:53.892976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
19985 13:55:53.893356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
19987 13:55:53.928470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass
19989 13:55:53.928767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass>
19990 13:55:53.963565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
19991 13:55:53.963950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
19993 13:55:53.998420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
19994 13:55:53.998874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
19996 13:55:54.033465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
19997 13:55:54.033863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
19999 13:55:54.072367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass
20001 13:55:54.072935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass>
20002 13:55:54.107552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
20003 13:55:54.107980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
20005 13:55:54.142800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
20006 13:55:54.143232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
20008 13:55:54.178339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
20009 13:55:54.178736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
20011 13:55:54.213296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass>
20012 13:55:54.213738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass
20014 13:55:54.248287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
20015 13:55:54.248761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
20017 13:55:54.282745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
20018 13:55:54.283199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
20020 13:55:54.317077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
20021 13:55:54.317454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
20023 13:55:54.352583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass>
20024 13:55:54.352959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass
20026 13:55:54.386886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
20027 13:55:54.387280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
20029 13:55:54.421686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
20030 13:55:54.422227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
20032 13:55:54.459922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
20034 13:55:54.460531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
20035 13:55:54.496511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass>
20036 13:55:54.496900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass
20038 13:55:54.532103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
20039 13:55:54.532469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
20041 13:55:54.568666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
20042 13:55:54.569027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
20044 13:55:54.604501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
20046 13:55:54.605126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
20047 13:55:54.640111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass>
20048 13:55:54.640572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass
20050 13:55:54.676010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
20051 13:55:54.676402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
20053 13:55:54.711880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
20055 13:55:54.712388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
20056 13:55:54.747975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
20057 13:55:54.748488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
20059 13:55:54.783927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass
20061 13:55:54.784408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass>
20062 13:55:54.819709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
20063 13:55:54.820112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
20065 13:55:54.855630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
20066 13:55:54.855994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
20068 13:55:54.890717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
20070 13:55:54.891190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
20071 13:55:54.926846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass>
20072 13:55:54.927227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass
20074 13:55:54.962660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
20075 13:55:54.963119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
20077 13:55:54.998164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
20078 13:55:54.998648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
20080 13:55:55.034152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
20081 13:55:55.034631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
20083 13:55:55.070213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass>
20084 13:55:55.070702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass
20086 13:55:55.108183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
20087 13:55:55.108592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
20089 13:55:55.144159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
20090 13:55:55.144483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
20092 13:55:55.180039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
20093 13:55:55.180350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
20095 13:55:55.216672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass
20097 13:55:55.217018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass>
20098 13:55:55.252341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
20099 13:55:55.252712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
20101 13:55:55.288208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
20103 13:55:55.288635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
20104 13:55:55.323075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
20106 13:55:55.323589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
20107 13:55:55.358410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass>
20108 13:55:55.358791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass
20110 13:55:55.392925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
20111 13:55:55.393246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
20113 13:55:55.428236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
20114 13:55:55.428643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
20116 13:55:55.464220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
20117 13:55:55.464660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
20119 13:55:55.502628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass
20121 13:55:55.503011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass>
20122 13:55:55.537966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
20123 13:55:55.538378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
20125 13:55:55.576073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
20126 13:55:55.576513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
20128 13:55:55.624549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
20129 13:55:55.624933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
20131 13:55:55.662652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass>
20132 13:55:55.663042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass
20134 13:55:55.699897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
20135 13:55:55.700218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
20137 13:55:55.736643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
20138 13:55:55.737037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
20140 13:55:55.775298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
20142 13:55:55.775759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
20143 13:55:55.811466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass
20145 13:55:55.811836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass>
20146 13:55:55.848593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
20147 13:55:55.848995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
20149 13:55:55.884519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
20150 13:55:55.884823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
20152 13:55:55.920475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
20153 13:55:55.920786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
20155 13:55:55.956787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass>
20156 13:55:55.957168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass
20158 13:55:55.992445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
20159 13:55:55.992774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
20161 13:55:56.028558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
20162 13:55:56.028919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
20164 13:55:56.065218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
20165 13:55:56.065593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
20167 13:55:56.101499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass
20169 13:55:56.101974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass>
20170 13:55:56.137934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
20171 13:55:56.138392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
20173 13:55:56.174081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
20174 13:55:56.174511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
20176 13:55:56.209984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
20177 13:55:56.210351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
20179 13:55:56.245687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass>
20180 13:55:56.246090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass
20182 13:55:56.281256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
20184 13:55:56.281829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
20185 13:55:56.317128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
20187 13:55:56.317735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
20188 13:55:56.352178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
20189 13:55:56.352555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
20191 13:55:56.391201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass
20193 13:55:56.391699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass>
20194 13:55:56.425642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
20195 13:55:56.426061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
20197 13:55:56.463509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
20198 13:55:56.463934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
20200 13:55:56.498767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
20202 13:55:56.499233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
20203 13:55:56.536820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass>
20204 13:55:56.537241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass
20206 13:55:56.572211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
20207 13:55:56.572635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
20209 13:55:56.607845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
20211 13:55:56.608308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
20212 13:55:56.642352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
20213 13:55:56.642780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
20215 13:55:56.677321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass>
20216 13:55:56.677743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass
20218 13:55:56.712998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
20219 13:55:56.713421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
20221 13:55:56.752503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
20223 13:55:56.753158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
20224 13:55:56.788434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
20225 13:55:56.788929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
20227 13:55:56.824784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass
20229 13:55:56.825250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass>
20230 13:55:56.860428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
20232 13:55:56.860891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
20233 13:55:56.921480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
20234 13:55:56.922039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
20236 13:55:56.958316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
20237 13:55:56.958774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
20239 13:55:56.993732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass
20241 13:55:56.994334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass>
20242 13:55:57.028982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
20243 13:55:57.029457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
20245 13:55:57.065528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
20246 13:55:57.066042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
20248 13:55:57.101620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
20249 13:55:57.102136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
20251 13:55:57.136955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass>
20252 13:55:57.137412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass
20254 13:55:57.172172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
20256 13:55:57.172715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
20257 13:55:57.208159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
20258 13:55:57.208640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
20260 13:55:57.243126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
20262 13:55:57.243739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
20263 13:55:57.278719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass
20265 13:55:57.279283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass>
20266 13:55:57.313811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
20267 13:55:57.314284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
20269 13:55:57.348904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
20271 13:55:57.349366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
20272 13:55:57.384823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
20273 13:55:57.385275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
20275 13:55:57.420181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass>
20276 13:55:57.420660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass
20278 13:55:57.456007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
20279 13:55:57.456484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
20281 13:55:57.491983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
20283 13:55:57.492595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
20284 13:55:57.527645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
20285 13:55:57.528095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
20287 13:55:57.563047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass
20289 13:55:57.563620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass>
20290 13:55:57.599122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
20292 13:55:57.599691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
20293 13:55:57.635542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
20295 13:55:57.636226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
20296 13:55:57.669830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
20297 13:55:57.670282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
20299 13:55:57.709032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass
20301 13:55:57.709710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass>
20302 13:55:57.761164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
20304 13:55:57.761636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
20305 13:55:57.813557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
20306 13:55:57.814091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
20308 13:55:57.866972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
20310 13:55:57.867522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
20311 13:55:57.905315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass
20313 13:55:57.906205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass>
20314 13:55:57.940311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
20315 13:55:57.940732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
20317 13:55:57.975230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
20319 13:55:57.975704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
20320 13:55:58.009962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
20322 13:55:58.010489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
20323 13:55:58.044351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass>
20324 13:55:58.044697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass
20326 13:55:58.079472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
20327 13:55:58.079854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
20329 13:55:58.114793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
20330 13:55:58.115190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
20332 13:55:58.150355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
20333 13:55:58.150739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
20335 13:55:58.190749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass
20337 13:55:58.191255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass>
20338 13:55:58.235176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
20340 13:55:58.235639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
20341 13:55:58.270321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
20342 13:55:58.270787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
20344 13:55:58.305832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
20345 13:55:58.306319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
20347 13:55:58.340600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass>
20348 13:55:58.341072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass
20350 13:55:58.375685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
20352 13:55:58.376232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
20353 13:55:58.410107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
20354 13:55:58.410544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
20356 13:55:58.446092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
20357 13:55:58.446529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
20359 13:55:58.481193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass>
20360 13:55:58.481682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass
20362 13:55:58.516256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
20363 13:55:58.516742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
20365 13:55:58.552296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
20366 13:55:58.552782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
20368 13:55:58.587215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
20370 13:55:58.587842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
20371 13:55:58.622136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass
20373 13:55:58.622712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass>
20374 13:55:58.656692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
20376 13:55:58.657161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
20377 13:55:58.691620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
20378 13:55:58.692044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
20380 13:55:58.726271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
20382 13:55:58.726988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
20383 13:55:58.774244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass>
20384 13:55:58.774717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass
20386 13:55:58.808981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
20388 13:55:58.809612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
20389 13:55:58.844396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
20391 13:55:58.845035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
20392 13:55:58.879750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
20394 13:55:58.880299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
20395 13:55:58.913926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass>
20396 13:55:58.914370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass
20398 13:55:58.949026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
20399 13:55:58.949483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
20401 13:55:58.984017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
20403 13:55:58.984563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
20404 13:55:59.019847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
20406 13:55:59.020415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
20407 13:55:59.054578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass
20409 13:55:59.055132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass>
20410 13:55:59.089120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
20412 13:55:59.089834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
20413 13:55:59.123931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
20415 13:55:59.124462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
20416 13:55:59.159285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
20418 13:55:59.159875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
20419 13:55:59.194416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass
20421 13:55:59.195032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass>
20422 13:55:59.229498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
20423 13:55:59.229973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
20425 13:55:59.269733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
20427 13:55:59.270309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
20428 13:55:59.305175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
20429 13:55:59.305634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
20431 13:55:59.339809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass>
20432 13:55:59.340261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass
20434 13:55:59.374879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
20436 13:55:59.375612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
20437 13:55:59.410124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
20438 13:55:59.410607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
20440 13:55:59.446689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
20442 13:55:59.447170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
20443 13:55:59.481245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass>
20444 13:55:59.481707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass
20446 13:55:59.516219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
20447 13:55:59.516640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
20449 13:55:59.552364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
20450 13:55:59.552795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
20452 13:55:59.592893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
20453 13:55:59.593377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
20455 13:55:59.629668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass
20457 13:55:59.630131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass>
20458 13:55:59.666043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
20459 13:55:59.666449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
20461 13:55:59.701095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
20463 13:55:59.701681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
20464 13:55:59.736034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
20465 13:55:59.736456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
20467 13:55:59.770758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass>
20468 13:55:59.771224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass
20470 13:55:59.805697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
20471 13:55:59.806114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
20473 13:55:59.840320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
20475 13:55:59.840786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
20476 13:55:59.875192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
20478 13:55:59.875643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
20479 13:55:59.911134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass
20481 13:55:59.911600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass>
20482 13:55:59.946266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
20483 13:55:59.946685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
20485 13:55:59.981088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
20486 13:55:59.981511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
20488 13:56:00.016180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
20489 13:56:00.016599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
20491 13:56:00.051066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass
20493 13:56:00.051526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass>
20494 13:56:00.086278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
20496 13:56:00.086724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
20497 13:56:00.121132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
20498 13:56:00.121546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
20500 13:56:00.156227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
20502 13:56:00.156681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
20503 13:56:00.192436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass>
20504 13:56:00.192852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass
20506 13:56:00.230249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
20507 13:56:00.230696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
20509 13:56:00.267846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
20510 13:56:00.268334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
20512 13:56:00.307138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
20514 13:56:00.307623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
20515 13:56:00.345396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass
20517 13:56:00.345841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass>
20518 13:56:00.384388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
20519 13:56:00.384865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
20521 13:56:00.421456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
20523 13:56:00.422010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
20524 13:56:00.458600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
20526 13:56:00.459306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
20527 13:56:00.496528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass
20529 13:56:00.497077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass>
20530 13:56:00.534242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
20532 13:56:00.534794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
20533 13:56:00.575266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
20535 13:56:00.575732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
20536 13:56:00.612889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
20537 13:56:00.613336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
20539 13:56:00.650150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass
20541 13:56:00.650629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass>
20542 13:56:00.693511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
20544 13:56:00.693988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
20545 13:56:00.732582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
20546 13:56:00.732998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
20548 13:56:00.771993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
20549 13:56:00.772391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
20551 13:56:00.807510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass
20553 13:56:00.808051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass>
20554 13:56:00.842790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
20555 13:56:00.843323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
20557 13:56:00.877961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
20558 13:56:00.878432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
20560 13:56:00.912651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
20562 13:56:00.913132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
20563 13:56:00.947581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass
20565 13:56:00.948144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass>
20566 13:56:00.982058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
20568 13:56:00.982638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
20569 13:56:01.016777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
20570 13:56:01.017240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
20572 13:56:01.051860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
20573 13:56:01.052330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
20575 13:56:01.086749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass>
20576 13:56:01.087242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass
20578 13:56:01.121619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
20580 13:56:01.122344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
20581 13:56:01.156706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
20582 13:56:01.157111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
20584 13:56:01.194079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
20585 13:56:01.194485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
20587 13:56:01.228539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass>
20588 13:56:01.228932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass
20590 13:56:01.265754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
20592 13:56:01.266187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
20593 13:56:01.300836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
20594 13:56:01.301223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
20596 13:56:01.336746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
20598 13:56:01.337189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
20599 13:56:01.372976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass
20601 13:56:01.373470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass>
20602 13:56:01.408347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
20603 13:56:01.408779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
20605 13:56:01.443856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
20606 13:56:01.444333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
20608 13:56:01.490823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
20609 13:56:01.491281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
20611 13:56:01.541977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass
20613 13:56:01.542431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass>
20614 13:56:01.578012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
20615 13:56:01.578477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
20617 13:56:01.614107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
20619 13:56:01.614577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
20620 13:56:01.650692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
20621 13:56:01.651173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
20623 13:56:01.686516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass
20625 13:56:01.686979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass>
20626 13:56:01.721733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
20627 13:56:01.722214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
20629 13:56:01.756757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
20631 13:56:01.757238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
20632 13:56:01.793029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
20634 13:56:01.793493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
20635 13:56:01.828426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass>
20636 13:56:01.828850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass
20638 13:56:01.864408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
20640 13:56:01.864884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
20641 13:56:01.900379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
20642 13:56:01.900903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
20644 13:56:01.939812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
20645 13:56:01.940258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
20647 13:56:01.974518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass>
20648 13:56:01.974977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass
20650 13:56:02.036086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
20651 13:56:02.036501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
20653 13:56:02.071658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
20654 13:56:02.072105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
20656 13:56:02.106682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
20657 13:56:02.107105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
20659 13:56:02.145381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass>
20660 13:56:02.145805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass
20662 13:56:02.180972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
20664 13:56:02.181582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
20665 13:56:02.216198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
20666 13:56:02.216610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
20668 13:56:02.251958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
20670 13:56:02.252414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
20671 13:56:02.287976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass>
20672 13:56:02.288376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass
20674 13:56:02.328118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
20675 13:56:02.328534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
20677 13:56:02.368529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
20679 13:56:02.368980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
20680 13:56:02.404400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
20681 13:56:02.404821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
20683 13:56:02.440335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass>
20684 13:56:02.440814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass
20686 13:56:02.475576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
20687 13:56:02.476055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
20689 13:56:02.511181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
20691 13:56:02.511645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
20692 13:56:02.546355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
20693 13:56:02.546768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
20695 13:56:02.581497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass>
20696 13:56:02.582004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass
20698 13:56:02.616857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
20700 13:56:02.617491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
20701 13:56:02.652485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
20703 13:56:02.652942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
20704 13:56:02.687715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
20705 13:56:02.688173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
20707 13:56:02.722510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass
20709 13:56:02.723219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass>
20710 13:56:02.757978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
20711 13:56:02.758454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
20713 13:56:02.794371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
20715 13:56:02.794934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
20716 13:56:02.830483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
20717 13:56:02.830952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
20719 13:56:02.866400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass>
20720 13:56:02.866859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass
20722 13:56:02.905825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
20724 13:56:02.906383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
20725 13:56:02.941284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
20727 13:56:02.941864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
20728 13:56:02.977340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
20730 13:56:02.977918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
20731 13:56:03.012548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass
20733 13:56:03.013095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass>
20734 13:56:03.048008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
20735 13:56:03.048480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
20737 13:56:03.083845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
20738 13:56:03.084320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
20740 13:56:03.119912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
20741 13:56:03.120337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
20743 13:56:03.155157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass
20745 13:56:03.155634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass>
20746 13:56:03.190783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
20748 13:56:03.191249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
20749 13:56:03.225977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
20750 13:56:03.226463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
20752 13:56:03.261722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
20753 13:56:03.262143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
20755 13:56:03.296303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass>
20756 13:56:03.296741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass
20758 13:56:03.333852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
20759 13:56:03.334272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
20761 13:56:03.368961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
20762 13:56:03.369353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
20764 13:56:03.404508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
20765 13:56:03.404965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
20767 13:56:03.440977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass>
20768 13:56:03.441447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass
20770 13:56:03.478206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
20772 13:56:03.478862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
20773 13:56:03.516663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
20774 13:56:03.517115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
20776 13:56:03.552925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
20777 13:56:03.553386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
20779 13:56:03.588273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass
20781 13:56:03.588723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass>
20782 13:56:03.623795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
20783 13:56:03.624214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
20785 13:56:03.659303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
20787 13:56:03.659763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
20788 13:56:03.694495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
20789 13:56:03.694917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
20791 13:56:03.730322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass>
20792 13:56:03.730757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass
20794 13:56:03.765179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
20795 13:56:03.765617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
20797 13:56:03.800603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
20799 13:56:03.801054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
20800 13:56:03.836051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
20802 13:56:03.836498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
20803 13:56:03.871202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass
20805 13:56:03.871844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass>
20806 13:56:03.906614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
20808 13:56:03.907184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
20809 13:56:03.942678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
20811 13:56:03.943266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
20812 13:56:03.978183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
20813 13:56:03.978639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
20815 13:56:04.013299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass
20817 13:56:04.013908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass>
20818 13:56:04.048309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
20819 13:56:04.048730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
20821 13:56:04.083757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
20822 13:56:04.084234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
20824 13:56:04.120549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
20826 13:56:04.121010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
20827 13:56:04.156085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass
20829 13:56:04.156534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass>
20830 13:56:04.191850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
20832 13:56:04.192301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
20833 13:56:04.227088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
20835 13:56:04.227556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
20836 13:56:04.263021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
20837 13:56:04.263441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
20839 13:56:04.297493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass>
20840 13:56:04.297939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass
20842 13:56:04.332169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
20844 13:56:04.332630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
20845 13:56:04.366997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
20847 13:56:04.367432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
20848 13:56:04.401689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
20850 13:56:04.402137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
20851 13:56:04.436231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass
20853 13:56:04.436679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass>
20854 13:56:04.471645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
20855 13:56:04.472130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
20857 13:56:04.507544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
20859 13:56:04.508006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
20860 13:56:04.543673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
20862 13:56:04.544292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
20863 13:56:04.579598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass>
20864 13:56:04.580032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass
20866 13:56:04.614380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
20868 13:56:04.614935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
20869 13:56:04.649451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
20871 13:56:04.649989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
20872 13:56:04.684495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
20873 13:56:04.684891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
20875 13:56:04.719777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass
20877 13:56:04.720205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass>
20878 13:56:04.755015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
20880 13:56:04.755477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
20881 13:56:04.789771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
20882 13:56:04.790204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
20884 13:56:04.825299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
20885 13:56:04.825684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
20887 13:56:04.861295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass
20889 13:56:04.861726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass>
20890 13:56:04.896732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
20891 13:56:04.897190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
20893 13:56:04.932482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
20895 13:56:04.933100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
20896 13:56:04.968143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
20898 13:56:04.968674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
20899 13:56:05.003820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass
20901 13:56:05.004349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass>
20902 13:56:05.038056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
20903 13:56:05.038433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
20905 13:56:05.073708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
20906 13:56:05.074092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
20908 13:56:05.109207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
20909 13:56:05.109700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
20911 13:56:05.144439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass>
20912 13:56:05.144960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass
20914 13:56:05.180438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
20915 13:56:05.180834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
20917 13:56:05.216312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
20918 13:56:05.216727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
20920 13:56:05.252436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
20921 13:56:05.252875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
20923 13:56:05.288648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass
20925 13:56:05.289242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass>
20926 13:56:05.324143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
20928 13:56:05.324602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
20929 13:56:05.360162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
20930 13:56:05.360582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
20932 13:56:05.396157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
20933 13:56:05.396576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
20935 13:56:05.431104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass
20937 13:56:05.431584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass>
20938 13:56:05.466276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
20940 13:56:05.466737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
20941 13:56:05.501120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
20942 13:56:05.501559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
20944 13:56:05.536793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
20945 13:56:05.537231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
20947 13:56:05.573129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass>
20948 13:56:05.573563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass
20950 13:56:05.609356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
20951 13:56:05.609931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
20953 13:56:05.645838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
20954 13:56:05.646260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
20956 13:56:05.682227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
20957 13:56:05.682639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
20959 13:56:05.718946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass>
20960 13:56:05.719364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass
20962 13:56:05.754618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
20964 13:56:05.755097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
20965 13:56:05.790746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
20967 13:56:05.791212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
20968 13:56:05.826531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
20970 13:56:05.826997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
20971 13:56:05.862105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass
20973 13:56:05.862570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass>
20974 13:56:05.897485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
20976 13:56:05.897942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
20977 13:56:05.932964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
20978 13:56:05.933376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
20980 13:56:05.968365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
20982 13:56:05.969016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
20983 13:56:06.004054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass
20985 13:56:06.004704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass>
20986 13:56:06.039119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
20988 13:56:06.039570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
20989 13:56:06.074479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
20990 13:56:06.074860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
20992 13:56:06.110652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
20994 13:56:06.111105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
20995 13:56:06.149155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass>
20996 13:56:06.149584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass
20998 13:56:06.185585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
20999 13:56:06.186038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
21001 13:56:06.222415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
21002 13:56:06.222837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
21004 13:56:06.257358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
21005 13:56:06.257841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
21007 13:56:06.292090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass>
21008 13:56:06.292574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass
21010 13:56:06.327155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
21012 13:56:06.327751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
21013 13:56:06.364645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
21015 13:56:06.365184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
21016 13:56:06.402024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
21017 13:56:06.402495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
21019 13:56:06.437075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass>
21020 13:56:06.437515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass
21022 13:56:06.473313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
21024 13:56:06.473774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
21025 13:56:06.508609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
21026 13:56:06.509025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
21028 13:56:06.544574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
21030 13:56:06.545047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
21031 13:56:06.579776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass>
21032 13:56:06.580220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass
21034 13:56:06.615924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
21035 13:56:06.616342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
21037 13:56:06.652681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
21038 13:56:06.653068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
21040 13:56:06.688060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
21042 13:56:06.688531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
21043 13:56:06.722780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass>
21044 13:56:06.723222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass
21046 13:56:06.758395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
21047 13:56:06.758883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
21049 13:56:06.793271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
21050 13:56:06.793692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
21052 13:56:06.828336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
21053 13:56:06.828765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
21055 13:56:06.864879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass>
21056 13:56:06.865292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass
21058 13:56:06.899994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
21060 13:56:06.900433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
21061 13:56:06.935195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
21063 13:56:06.935843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
21064 13:56:06.970339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
21065 13:56:06.970815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
21067 13:56:07.005033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass>
21068 13:56:07.005539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass
21070 13:56:07.040618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
21072 13:56:07.041251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
21073 13:56:07.077043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
21075 13:56:07.077495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
21076 13:56:07.129404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
21077 13:56:07.129790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
21079 13:56:07.172533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass>
21080 13:56:07.173014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass
21082 13:56:07.208288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
21084 13:56:07.208749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
21085 13:56:07.244750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
21086 13:56:07.245163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
21088 13:56:07.280375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
21089 13:56:07.280854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
21091 13:56:07.315956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass>
21092 13:56:07.316412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass
21094 13:56:07.351787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
21096 13:56:07.352261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
21097 13:56:07.388612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
21098 13:56:07.389035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
21100 13:56:07.424603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
21101 13:56:07.425021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
21103 13:56:07.460133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass>
21104 13:56:07.460570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass
21106 13:56:07.495788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
21107 13:56:07.496196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
21109 13:56:07.530455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
21110 13:56:07.530893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
21112 13:56:07.567069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
21114 13:56:07.567754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
21115 13:56:07.603126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass
21117 13:56:07.603798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass>
21118 13:56:07.638910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
21120 13:56:07.639541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
21121 13:56:07.674221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
21122 13:56:07.674629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
21124 13:56:07.710122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
21125 13:56:07.710533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
21127 13:56:07.745223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass
21129 13:56:07.745673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass>
21130 13:56:07.780919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
21131 13:56:07.781406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
21133 13:56:07.818996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
21135 13:56:07.819567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
21136 13:56:07.858385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
21137 13:56:07.858793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
21139 13:56:07.896538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass
21141 13:56:07.896956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass>
21142 13:56:07.933414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
21143 13:56:07.933787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
21145 13:56:07.968579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
21146 13:56:07.968966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
21148 13:56:08.004268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
21150 13:56:08.004666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
21151 13:56:08.040282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass
21153 13:56:08.040847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass>
21154 13:56:08.075256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
21156 13:56:08.075814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
21157 13:56:08.110487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
21158 13:56:08.110875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
21160 13:56:08.146481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
21161 13:56:08.146905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
21163 13:56:08.181623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass>
21164 13:56:08.182073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass
21166 13:56:08.217077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
21167 13:56:08.217458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
21169 13:56:08.252705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
21170 13:56:08.253160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
21172 13:56:08.289076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
21174 13:56:08.289696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
21175 13:56:08.325309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass
21177 13:56:08.325925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass>
21178 13:56:08.361189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
21179 13:56:08.361635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
21181 13:56:08.397776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
21183 13:56:08.398411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
21184 13:56:08.434326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
21185 13:56:08.434766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
21187 13:56:08.470270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass
21189 13:56:08.470892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass>
21190 13:56:08.507869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
21191 13:56:08.508342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
21193 13:56:08.544975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
21195 13:56:08.545421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
21196 13:56:08.580501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
21198 13:56:08.580917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
21199 13:56:08.616312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass>
21200 13:56:08.616887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass
21202 13:56:08.652484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
21204 13:56:08.652961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
21205 13:56:08.688788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
21207 13:56:08.689264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
21208 13:56:08.725780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
21210 13:56:08.726368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
21211 13:56:08.761394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass>
21212 13:56:08.761884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass
21214 13:56:08.797395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
21216 13:56:08.797860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
21217 13:56:08.832433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
21218 13:56:08.832837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
21220 13:56:08.868148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
21221 13:56:08.868551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
21223 13:56:08.903299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass
21225 13:56:08.903933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass>
21226 13:56:08.938613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
21228 13:56:08.939267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
21229 13:56:08.973237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
21230 13:56:08.973643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
21232 13:56:09.008850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
21233 13:56:09.009274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
21235 13:56:09.044403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass>
21236 13:56:09.044839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass
21238 13:56:09.080040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
21239 13:56:09.080461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
21241 13:56:09.114622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
21242 13:56:09.115093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
21244 13:56:09.150195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
21245 13:56:09.150644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
21247 13:56:09.187324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass>
21248 13:56:09.187811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass
21250 13:56:09.223212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
21252 13:56:09.223646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
21253 13:56:09.259308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
21255 13:56:09.259744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
21256 13:56:09.295695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
21257 13:56:09.296102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
21259 13:56:09.330670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass>
21260 13:56:09.331117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass
21262 13:56:09.366126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
21264 13:56:09.366588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
21265 13:56:09.402209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
21267 13:56:09.402672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
21268 13:56:09.436886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
21269 13:56:09.437332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
21271 13:56:09.472599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass>
21272 13:56:09.473044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass
21274 13:56:09.507726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
21275 13:56:09.508164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
21277 13:56:09.543232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
21279 13:56:09.543688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
21280 13:56:09.578112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
21281 13:56:09.578600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
21283 13:56:09.612981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass>
21284 13:56:09.613479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass
21286 13:56:09.648806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
21288 13:56:09.649448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
21289 13:56:09.684982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
21291 13:56:09.685413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
21292 13:56:09.721028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
21294 13:56:09.721448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
21295 13:56:09.755721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass>
21296 13:56:09.756153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass
21298 13:56:09.790504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
21299 13:56:09.790901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
21301 13:56:09.825326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
21303 13:56:09.825962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
21304 13:56:09.860726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
21305 13:56:09.861187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
21307 13:56:09.895155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass
21309 13:56:09.895799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass>
21310 13:56:09.930201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
21311 13:56:09.930616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
21313 13:56:09.965599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
21314 13:56:09.966032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
21316 13:56:10.000491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
21317 13:56:10.000899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
21319 13:56:10.035752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass
21321 13:56:10.036171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass>
21322 13:56:10.070226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
21324 13:56:10.070675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
21325 13:56:10.104463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
21326 13:56:10.104943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
21328 13:56:10.139571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
21330 13:56:10.140011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
21331 13:56:10.173472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass
21333 13:56:10.174037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass>
21334 13:56:10.207980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
21335 13:56:10.208417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
21337 13:56:10.242612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
21339 13:56:10.243034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
21340 13:56:10.276887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
21341 13:56:10.277281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
21343 13:56:10.312870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass
21345 13:56:10.313323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass>
21346 13:56:10.347785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
21347 13:56:10.348177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
21349 13:56:10.382050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
21350 13:56:10.382447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
21352 13:56:10.416757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
21354 13:56:10.417200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
21355 13:56:10.451555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass
21357 13:56:10.452016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass>
21358 13:56:10.488333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
21360 13:56:10.488706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
21361 13:56:10.523061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
21363 13:56:10.523629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
21364 13:56:10.557824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
21365 13:56:10.558238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
21367 13:56:10.593928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass>
21368 13:56:10.594339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass
21370 13:56:10.628714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
21372 13:56:10.629163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
21373 13:56:10.664583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
21375 13:56:10.665022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
21376 13:56:10.700912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
21378 13:56:10.701263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
21379 13:56:10.736721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass
21381 13:56:10.737371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass>
21382 13:56:10.772081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
21383 13:56:10.772520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
21385 13:56:10.808193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
21387 13:56:10.808647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
21388 13:56:10.843098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
21390 13:56:10.843667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
21391 13:56:10.877725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass>
21392 13:56:10.878214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass
21394 13:56:10.912302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
21396 13:56:10.912857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
21397 13:56:10.948118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
21398 13:56:10.948576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
21400 13:56:10.984553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
21401 13:56:10.985035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
21403 13:56:11.019956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass
21405 13:56:11.020526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass>
21406 13:56:11.055752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
21407 13:56:11.056172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
21409 13:56:11.091777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
21411 13:56:11.092230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
21412 13:56:11.127386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
21414 13:56:11.127853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
21415 13:56:11.162327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass
21417 13:56:11.162924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass>
21418 13:56:11.197027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
21420 13:56:11.197636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
21421 13:56:11.232656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
21422 13:56:11.233077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
21424 13:56:11.268201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
21425 13:56:11.268714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
21427 13:56:11.308569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass
21429 13:56:11.309049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass>
21430 13:56:11.344262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
21431 13:56:11.344684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
21433 13:56:11.379388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
21435 13:56:11.379960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
21436 13:56:11.414088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
21437 13:56:11.414551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
21439 13:56:11.448714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass>
21440 13:56:11.449194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass
21442 13:56:11.483576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
21443 13:56:11.483987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
21445 13:56:11.518243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
21446 13:56:11.518631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
21448 13:56:11.553033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
21449 13:56:11.553458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
21451 13:56:11.587805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass>
21452 13:56:11.588229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass
21454 13:56:11.622263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
21455 13:56:11.622659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
21457 13:56:11.656584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
21458 13:56:11.656981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
21460 13:56:11.692033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
21462 13:56:11.692476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
21463 13:56:11.727821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass>
21464 13:56:11.728291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass
21466 13:56:11.762614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
21467 13:56:11.763026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
21469 13:56:11.800125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
21471 13:56:11.800686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
21472 13:56:11.834666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
21473 13:56:11.835176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
21475 13:56:11.869198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass>
21476 13:56:11.869681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass
21478 13:56:11.904641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
21479 13:56:11.905189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
21481 13:56:11.941545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
21483 13:56:11.942134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
21484 13:56:11.976970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
21486 13:56:11.977660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
21487 13:56:12.012423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass>
21488 13:56:12.012834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass
21490 13:56:12.047613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
21491 13:56:12.048043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
21493 13:56:12.083801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
21495 13:56:12.084252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
21496 13:56:12.120668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
21498 13:56:12.121136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
21499 13:56:12.155928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass
21501 13:56:12.156500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass>
21502 13:56:12.190397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
21503 13:56:12.190853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
21505 13:56:12.232823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
21507 13:56:12.233297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
21508 13:56:12.281353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
21509 13:56:12.281787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
21511 13:56:12.316443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass>
21512 13:56:12.316868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass
21514 13:56:12.351279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
21516 13:56:12.351873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
21517 13:56:12.386231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
21518 13:56:12.386601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
21520 13:56:12.421156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
21522 13:56:12.421592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
21523 13:56:12.455980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass
21525 13:56:12.456384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass>
21526 13:56:12.490368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
21527 13:56:12.490784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
21529 13:56:12.525015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
21530 13:56:12.525483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
21532 13:56:12.560147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
21534 13:56:12.560719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
21535 13:56:12.596119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass>
21536 13:56:12.596579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass
21538 13:56:12.631340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
21540 13:56:12.631913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
21541 13:56:12.666862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
21542 13:56:12.667246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
21544 13:56:12.702681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
21545 13:56:12.703089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
21547 13:56:12.736854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass>
21548 13:56:12.737239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass
21550 13:56:12.773499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
21551 13:56:12.773947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
21553 13:56:12.809802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
21554 13:56:12.810231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
21556 13:56:12.847303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
21558 13:56:12.847775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
21559 13:56:12.885784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass>
21560 13:56:12.886300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass
21562 13:56:12.923993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
21563 13:56:12.924421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
21565 13:56:12.959891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
21566 13:56:12.960365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
21568 13:56:12.995640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
21569 13:56:12.996112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
21571 13:56:13.030535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass>
21572 13:56:13.030990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass
21574 13:56:13.066295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
21575 13:56:13.066748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
21577 13:56:13.102367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
21578 13:56:13.102833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
21580 13:56:13.138561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
21582 13:56:13.139140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
21583 13:56:13.175998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
21584 13:56:13.176426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
21586 13:56:13.229858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass>
21587 13:56:13.230320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass
21589 13:56:13.269170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
21591 13:56:13.269622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
21592 13:56:13.305135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
21593 13:56:13.305574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
21595 13:56:13.341130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass
21597 13:56:13.341603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass>
21598 13:56:13.376618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass
21600 13:56:13.377059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass>
21601 13:56:13.412501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass
21603 13:56:13.412930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass>
21604 13:56:13.448141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass>
21605 13:56:13.448565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass
21607 13:56:13.483771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass>
21608 13:56:13.484189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass
21610 13:56:13.519259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass
21612 13:56:13.519882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass>
21613 13:56:13.560464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass
21615 13:56:13.561012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass>
21616 13:56:13.595108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass
21618 13:56:13.595510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass>
21619 13:56:13.631065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass>
21620 13:56:13.631456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass
21622 13:56:13.673508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip
21624 13:56:13.674070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip>
21625 13:56:13.708395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip>
21626 13:56:13.708788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip
21628 13:56:13.744114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip>
21629 13:56:13.744538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip
21631 13:56:13.780441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass
21633 13:56:13.780900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass>
21634 13:56:13.815999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass>
21635 13:56:13.816474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass
21637 13:56:13.851855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass>
21638 13:56:13.852328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass
21640 13:56:13.887171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass
21642 13:56:13.887866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass>
21643 13:56:13.922411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass
21645 13:56:13.923040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass>
21646 13:56:13.957019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip>
21647 13:56:13.957438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip
21649 13:56:13.992352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip>
21650 13:56:13.992785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip
21652 13:56:14.028056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip>
21653 13:56:14.028500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip
21655 13:56:14.064154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass
21657 13:56:14.064630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass>
21658 13:56:14.099188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip
21660 13:56:14.099662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip>
21661 13:56:14.135357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip>
21662 13:56:14.135793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip
21664 13:56:14.170542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip>
21665 13:56:14.170990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip
21667 13:56:14.205531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass>
21668 13:56:14.205982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass
21670 13:56:14.240960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip
21672 13:56:14.241525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip>
21673 13:56:14.284705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip
21675 13:56:14.285289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip>
21676 13:56:14.320096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip
21678 13:56:14.320646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip>
21679 13:56:14.355926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass>
21680 13:56:14.356399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass
21682 13:56:14.391790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass>
21683 13:56:14.392271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass
21685 13:56:14.428337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass>
21686 13:56:14.428802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass
21688 13:56:14.466755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass
21690 13:56:14.467398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass>
21691 13:56:14.502229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass>
21692 13:56:14.502720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass
21694 13:56:14.538740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip>
21695 13:56:14.539214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip
21697 13:56:14.575715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip
21699 13:56:14.576167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip>
21700 13:56:14.611845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip
21702 13:56:14.612298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip>
21703 13:56:14.648169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass>
21704 13:56:14.648654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass
21706 13:56:14.684568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip
21708 13:56:14.685031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip>
21709 13:56:14.720809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip
21711 13:56:14.721463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip>
21712 13:56:14.756594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip>
21713 13:56:14.757020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip
21715 13:56:14.792751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass
21717 13:56:14.793230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass>
21718 13:56:14.828970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip
21720 13:56:14.829441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip>
21721 13:56:14.864898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip
21723 13:56:14.865553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip>
21724 13:56:14.900541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip
21726 13:56:14.901015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip>
21727 13:56:14.936629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass>
21728 13:56:14.937069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass
21730 13:56:14.972654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip
21732 13:56:14.973131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip>
21733 13:56:15.008800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip
21735 13:56:15.009265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip>
21736 13:56:15.045268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip>
21737 13:56:15.045680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip
21739 13:56:15.081270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass
21741 13:56:15.081846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass>
21742 13:56:15.116709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip
21744 13:56:15.117271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip>
21745 13:56:15.152600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip>
21746 13:56:15.153040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip
21748 13:56:15.189326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip
21750 13:56:15.189808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip>
21751 13:56:15.225401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass
21753 13:56:15.225845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass>
21754 13:56:15.261007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip
21756 13:56:15.261673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip>
21757 13:56:15.296537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip
21759 13:56:15.296998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip>
21760 13:56:15.332402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip
21762 13:56:15.332977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip>
21763 13:56:15.368274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass
21765 13:56:15.368743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass>
21766 13:56:15.404143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip
21768 13:56:15.404593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip>
21769 13:56:15.440390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip>
21770 13:56:15.440826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip
21772 13:56:15.477625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip>
21773 13:56:15.478063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip
21775 13:56:15.514401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass>
21776 13:56:15.514850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass
21778 13:56:15.550088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass
21780 13:56:15.550572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass>
21781 13:56:15.585607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass
21783 13:56:15.586081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass>
21784 13:56:15.622923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass>
21785 13:56:15.623340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass
21787 13:56:15.658797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass>
21788 13:56:15.659275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass
21790 13:56:15.695895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
21791 13:56:15.696360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
21793 13:56:15.731790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
21795 13:56:15.732248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
21796 13:56:15.768232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
21797 13:56:15.768646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
21799 13:56:15.804286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass
21801 13:56:15.804681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass>
21802 13:56:15.839885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
21803 13:56:15.840301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
21805 13:56:15.876102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
21806 13:56:15.876519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
21808 13:56:15.912100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
21810 13:56:15.912574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
21811 13:56:15.946692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass>
21812 13:56:15.947095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass
21814 13:56:15.984238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
21816 13:56:15.984684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
21817 13:56:16.019930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
21818 13:56:16.020307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
21820 13:56:16.055860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
21821 13:56:16.056210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
21823 13:56:16.093266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass>
21824 13:56:16.093659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass
21826 13:56:16.128745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
21827 13:56:16.129202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
21829 13:56:16.164093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
21831 13:56:16.164660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
21832 13:56:16.199787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
21833 13:56:16.200258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
21835 13:56:16.236103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass>
21836 13:56:16.236577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass
21838 13:56:16.272199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
21839 13:56:16.272665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
21841 13:56:16.307312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
21843 13:56:16.307887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
21844 13:56:16.342710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
21845 13:56:16.343177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
21847 13:56:16.377540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass>
21848 13:56:16.378044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass
21850 13:56:16.412503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
21852 13:56:16.413053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
21853 13:56:16.447818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
21855 13:56:16.448386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
21856 13:56:16.482776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
21857 13:56:16.483224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
21859 13:56:16.517817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass
21861 13:56:16.518285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass>
21862 13:56:16.552515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
21863 13:56:16.552923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
21865 13:56:16.588560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
21866 13:56:16.589032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
21868 13:56:16.624470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
21869 13:56:16.624947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
21871 13:56:16.660513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass
21873 13:56:16.661098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass>
21874 13:56:16.695987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
21875 13:56:16.696470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
21877 13:56:16.731652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
21879 13:56:16.732102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
21880 13:56:16.769204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
21881 13:56:16.769624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
21883 13:56:16.804895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass
21885 13:56:16.805346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass>
21886 13:56:16.841717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
21888 13:56:16.842166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
21889 13:56:16.877617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
21890 13:56:16.878099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
21892 13:56:16.914514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
21893 13:56:16.914938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
21895 13:56:16.950437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass>
21896 13:56:16.950848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass
21898 13:56:16.985958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
21899 13:56:16.986378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
21901 13:56:17.021264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
21903 13:56:17.021722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
21904 13:56:17.056565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
21905 13:56:17.056998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
21907 13:56:17.093017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass>
21908 13:56:17.093434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass
21910 13:56:17.129380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
21911 13:56:17.129779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
21913 13:56:17.164603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
21914 13:56:17.165062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
21916 13:56:17.200710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
21917 13:56:17.201186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
21919 13:56:17.237990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass>
21920 13:56:17.238485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass
21922 13:56:17.273826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
21923 13:56:17.274277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
21925 13:56:17.309391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
21926 13:56:17.309812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
21928 13:56:17.353062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
21929 13:56:17.353520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
21931 13:56:17.403359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass
21933 13:56:17.403814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass>
21934 13:56:17.439947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
21936 13:56:17.440401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
21937 13:56:17.475854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
21939 13:56:17.476315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
21940 13:56:17.512064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
21942 13:56:17.512518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
21943 13:56:17.548192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass>
21944 13:56:17.548599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass
21946 13:56:17.584447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
21947 13:56:17.584872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
21949 13:56:17.619567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
21951 13:56:17.620036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
21952 13:56:17.655237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
21954 13:56:17.655616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
21955 13:56:17.704409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass>
21956 13:56:17.704880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass
21958 13:56:17.739678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
21960 13:56:17.740140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
21961 13:56:17.776667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
21962 13:56:17.777160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
21964 13:56:17.813155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
21965 13:56:17.813575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
21967 13:56:17.849944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass
21969 13:56:17.850402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass>
21970 13:56:17.887098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
21972 13:56:17.887578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
21973 13:56:17.924010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
21974 13:56:17.924451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
21976 13:56:17.960733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
21978 13:56:17.961199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
21979 13:56:17.996215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass>
21980 13:56:17.996630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass
21982 13:56:18.032017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
21983 13:56:18.032501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
21985 13:56:18.067878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
21986 13:56:18.068300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
21988 13:56:18.103671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
21989 13:56:18.104105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
21991 13:56:18.138536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass
21993 13:56:18.139001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass>
21994 13:56:18.174085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
21996 13:56:18.174683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
21997 13:56:18.209331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
21999 13:56:18.209795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
22000 13:56:18.244977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
22002 13:56:18.245446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
22003 13:56:18.280456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass
22005 13:56:18.280930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass>
22006 13:56:18.315838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
22007 13:56:18.316253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
22009 13:56:18.350682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
22010 13:56:18.351123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
22012 13:56:18.385898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
22013 13:56:18.386329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
22015 13:56:18.421527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass>
22016 13:56:18.421969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass
22018 13:56:18.456753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
22020 13:56:18.457210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
22021 13:56:18.492226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
22022 13:56:18.492719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
22024 13:56:18.528715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
22026 13:56:18.529367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
22027 13:56:18.564433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass
22029 13:56:18.564903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass>
22030 13:56:18.600482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
22031 13:56:18.600973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
22033 13:56:18.636524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
22035 13:56:18.637164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
22036 13:56:18.672351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
22037 13:56:18.672895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
22039 13:56:18.709107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass
22041 13:56:18.709795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass>
22042 13:56:18.745417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
22044 13:56:18.746133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
22045 13:56:18.781954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
22046 13:56:18.782377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
22048 13:56:18.818465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
22050 13:56:18.819115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
22051 13:56:18.854775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass>
22052 13:56:18.855277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass
22054 13:56:18.892403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
22055 13:56:18.892824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
22057 13:56:18.929420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
22058 13:56:18.929863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
22060 13:56:18.966998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
22062 13:56:18.967464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
22063 13:56:19.004579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass
22065 13:56:19.005223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass>
22066 13:56:19.040652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
22068 13:56:19.041291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
22069 13:56:19.076645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
22070 13:56:19.077064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
22072 13:56:19.113285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
22073 13:56:19.113738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
22075 13:56:19.148584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass
22077 13:56:19.149109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass>
22078 13:56:19.185707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
22080 13:56:19.186276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
22081 13:56:19.221644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
22082 13:56:19.222152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
22084 13:56:19.257831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
22086 13:56:19.258471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
22087 13:56:19.293215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass>
22088 13:56:19.293707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass
22090 13:56:19.328447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
22092 13:56:19.329056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
22093 13:56:19.363138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
22095 13:56:19.363600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
22096 13:56:19.397363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
22097 13:56:19.397829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
22099 13:56:19.432391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass
22101 13:56:19.432972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass>
22102 13:56:19.468393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
22103 13:56:19.468868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
22105 13:56:19.503819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
22106 13:56:19.504221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
22108 13:56:19.540254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
22109 13:56:19.540703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
22111 13:56:19.577504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass>
22112 13:56:19.577927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass
22114 13:56:19.613127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
22115 13:56:19.613576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
22117 13:56:19.648661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
22118 13:56:19.649062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
22120 13:56:19.684324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
22121 13:56:19.684755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
22123 13:56:19.720465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass
22125 13:56:19.720893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass>
22126 13:56:19.756308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
22127 13:56:19.756666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
22129 13:56:19.791703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
22130 13:56:19.792178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
22132 13:56:19.828701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
22134 13:56:19.829149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
22135 13:56:19.864787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass
22137 13:56:19.865235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass>
22138 13:56:19.900578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
22139 13:56:19.901078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
22141 13:56:19.936401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
22142 13:56:19.936817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
22144 13:56:19.972358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
22145 13:56:19.972770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
22147 13:56:20.008254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass
22149 13:56:20.008850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass>
22150 13:56:20.044010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
22152 13:56:20.044651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
22153 13:56:20.080742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
22154 13:56:20.081129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
22156 13:56:20.116242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
22157 13:56:20.116729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
22159 13:56:20.151223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass
22161 13:56:20.151697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass>
22162 13:56:20.186727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
22164 13:56:20.187207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
22165 13:56:20.222144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
22166 13:56:20.222489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
22168 13:56:20.258223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
22169 13:56:20.258590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
22171 13:56:20.294816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass>
22172 13:56:20.295170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass
22174 13:56:20.330493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
22175 13:56:20.330977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
22177 13:56:20.366810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
22178 13:56:20.367317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
22180 13:56:20.402200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
22182 13:56:20.402818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
22183 13:56:20.436489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass
22185 13:56:20.437023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass>
22186 13:56:20.470926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
22187 13:56:20.471391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
22189 13:56:20.506265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
22190 13:56:20.506640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
22192 13:56:20.541103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
22194 13:56:20.541567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
22195 13:56:20.576241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass>
22196 13:56:20.576588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass
22198 13:56:20.612835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
22199 13:56:20.613186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
22201 13:56:20.647875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
22202 13:56:20.648354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
22204 13:56:20.683426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
22206 13:56:20.683906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
22207 13:56:20.720132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass>
22208 13:56:20.720573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass
22210 13:56:20.755938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
22211 13:56:20.756351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
22213 13:56:20.791274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
22215 13:56:20.791743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
22216 13:56:20.828034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
22217 13:56:20.828451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
22219 13:56:20.864129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass>
22220 13:56:20.864538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass
22222 13:56:20.902136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
22223 13:56:20.902550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
22225 13:56:20.939822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
22226 13:56:20.940262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
22228 13:56:20.997352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
22229 13:56:20.997725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
22231 13:56:21.054026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass>
22232 13:56:21.054438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass
22234 13:56:21.085949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
22235 13:56:21.086372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
22237 13:56:21.117446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
22239 13:56:21.118052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
22240 13:56:21.150928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
22242 13:56:21.151512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
22243 13:56:21.182839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass
22245 13:56:21.183395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass>
22246 13:56:21.214532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
22247 13:56:21.214937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
22249 13:56:21.246606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
22250 13:56:21.247021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
22252 13:56:21.278249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
22254 13:56:21.278682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
22255 13:56:21.309640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass>
22256 13:56:21.310074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass
22258 13:56:21.344997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
22259 13:56:21.345411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
22261 13:56:21.378752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
22262 13:56:21.379166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
22264 13:56:21.411508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
22265 13:56:21.411926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
22267 13:56:21.445090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass
22269 13:56:21.445554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass>
22270 13:56:21.477081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
22272 13:56:21.477528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
22273 13:56:21.509368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
22275 13:56:21.509831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
22276 13:56:21.541119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
22278 13:56:21.541566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
22279 13:56:21.572407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass>
22280 13:56:21.572851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass
22282 13:56:21.604826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
22284 13:56:21.605279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
22285 13:56:21.637300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
22287 13:56:21.637771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
22288 13:56:21.671517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
22289 13:56:21.671931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
22291 13:56:21.702832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass>
22292 13:56:21.703224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass
22294 13:56:21.733843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
22295 13:56:21.734252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
22297 13:56:21.765672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
22299 13:56:21.766140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
22300 13:56:21.799879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
22302 13:56:21.800337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
22303 13:56:21.834458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass
22305 13:56:21.834913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass>
22306 13:56:21.868677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
22307 13:56:21.869066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
22309 13:56:21.901659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
22310 13:56:21.902057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
22312 13:56:21.934476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
22314 13:56:21.934945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
22315 13:56:21.967774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass>
22316 13:56:21.968256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass
22318 13:56:22.000419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
22319 13:56:22.000917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
22321 13:56:22.033272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
22323 13:56:22.033900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
22324 13:56:22.066381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
22325 13:56:22.066884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
22327 13:56:22.099800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass>
22328 13:56:22.100293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass
22330 13:56:22.132584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
22331 13:56:22.133082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
22333 13:56:22.165504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
22334 13:56:22.166015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
22336 13:56:22.198470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
22337 13:56:22.198977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
22339 13:56:22.231292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass
22341 13:56:22.231933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass>
22342 13:56:22.264314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
22343 13:56:22.264814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
22345 13:56:22.298045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
22346 13:56:22.298575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
22348 13:56:22.331949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
22349 13:56:22.332429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
22351 13:56:22.367611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass>
22352 13:56:22.368028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass
22354 13:56:22.402599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
22355 13:56:22.403027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
22357 13:56:22.437114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
22358 13:56:22.437530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
22360 13:56:22.496371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
22361 13:56:22.496834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
22363 13:56:22.554911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass>
22364 13:56:22.555336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass
22366 13:56:22.589196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
22367 13:56:22.589696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
22369 13:56:22.624328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
22371 13:56:22.624807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
22372 13:56:22.659572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
22374 13:56:22.660229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
22375 13:56:22.693979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass
22377 13:56:22.694427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass>
22378 13:56:22.728147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
22379 13:56:22.728557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
22381 13:56:22.761402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
22383 13:56:22.762036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
22384 13:56:22.794356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
22385 13:56:22.794855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
22387 13:56:22.828004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass
22389 13:56:22.828616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass>
22390 13:56:22.862995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
22392 13:56:22.863662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
22393 13:56:22.898962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
22395 13:56:22.899600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
22396 13:56:22.933956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
22397 13:56:22.934355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
22399 13:56:22.967963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass>
22400 13:56:22.968411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass
22402 13:56:23.004058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
22404 13:56:23.004680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
22405 13:56:23.054469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
22406 13:56:23.054924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
22408 13:56:23.089729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
22409 13:56:23.090184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
22411 13:56:23.123193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass
22413 13:56:23.123561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass>
22414 13:56:23.156498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
22415 13:56:23.156867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
22417 13:56:23.191586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
22418 13:56:23.192029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
22420 13:56:23.226812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
22422 13:56:23.227284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
22423 13:56:23.262662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass
22425 13:56:23.263297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass>
22426 13:56:23.296882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
22427 13:56:23.297376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
22429 13:56:23.331230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
22431 13:56:23.331908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
22432 13:56:23.366303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
22433 13:56:23.366800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
22435 13:56:23.400741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass
22437 13:56:23.401358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass>
22438 13:56:23.436002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
22439 13:56:23.436451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
22441 13:56:23.471517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
22442 13:56:23.472004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
22444 13:56:23.506249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
22445 13:56:23.506689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
22447 13:56:23.541201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass>
22448 13:56:23.541644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass
22450 13:56:23.577709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
22451 13:56:23.578176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
22453 13:56:23.613329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
22454 13:56:23.613783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
22456 13:56:23.648618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
22458 13:56:23.649163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
22459 13:56:23.683181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass
22461 13:56:23.683785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass>
22462 13:56:23.717731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
22463 13:56:23.718226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
22465 13:56:23.751915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
22467 13:56:23.752361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
22468 13:56:23.785890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
22469 13:56:23.786323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
22471 13:56:23.820146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass>
22472 13:56:23.820630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass
22474 13:56:23.854411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
22475 13:56:23.854940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
22477 13:56:23.889360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
22478 13:56:23.889749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
22480 13:56:23.923727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
22481 13:56:23.924186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
22483 13:56:23.960173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass>
22484 13:56:23.960580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass
22486 13:56:23.996152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
22487 13:56:23.996601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
22489 13:56:24.031732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
22490 13:56:24.032195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
22492 13:56:24.066251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
22494 13:56:24.066799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
22495 13:56:24.102328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass
22497 13:56:24.102905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass>
22498 13:56:24.136389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
22499 13:56:24.136864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
22501 13:56:24.170876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
22503 13:56:24.171339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
22504 13:56:24.205493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
22505 13:56:24.205992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
22507 13:56:24.239609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass>
22508 13:56:24.240092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass
22510 13:56:24.273734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
22511 13:56:24.274199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
22513 13:56:24.309082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
22514 13:56:24.309536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
22516 13:56:24.344337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
22517 13:56:24.344794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
22519 13:56:24.378671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass>
22520 13:56:24.379124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass
22522 13:56:24.415726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
22523 13:56:24.416199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
22525 13:56:24.449151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
22527 13:56:24.449738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
22528 13:56:24.486215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
22530 13:56:24.486772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
22531 13:56:24.523201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass
22533 13:56:24.523901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass>
22534 13:56:24.558415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
22535 13:56:24.558838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
22537 13:56:24.592529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
22538 13:56:24.592955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
22540 13:56:24.627793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
22541 13:56:24.628212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
22543 13:56:24.661462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass>
22544 13:56:24.661870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass
22546 13:56:24.695592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
22547 13:56:24.695984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
22549 13:56:24.732154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
22550 13:56:24.732607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
22552 13:56:24.769946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
22553 13:56:24.770400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
22555 13:56:24.807236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass
22557 13:56:24.807709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass>
22558 13:56:24.841673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
22559 13:56:24.842103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
22561 13:56:24.876504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
22562 13:56:24.876929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
22564 13:56:24.911319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
22566 13:56:24.911786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
22567 13:56:24.946260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass
22569 13:56:24.946732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass>
22570 13:56:24.980451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
22572 13:56:24.980925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
22573 13:56:25.014823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
22574 13:56:25.015283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
22576 13:56:25.048426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
22577 13:56:25.048865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
22579 13:56:25.082596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass>
22580 13:56:25.083036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass
22582 13:56:25.116654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
22583 13:56:25.117145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
22585 13:56:25.151289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
22587 13:56:25.152033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
22588 13:56:25.187890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
22589 13:56:25.188374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
22591 13:56:25.223159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass
22593 13:56:25.223788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass>
22594 13:56:25.258116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
22596 13:56:25.258695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
22597 13:56:25.292704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
22598 13:56:25.293170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
22600 13:56:25.333727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
22602 13:56:25.334443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
22603 13:56:25.368227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass
22605 13:56:25.368850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass>
22606 13:56:25.403935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
22608 13:56:25.404572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
22609 13:56:25.440404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
22610 13:56:25.440873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
22612 13:56:25.471569 <47>[ 215.439162] systemd-journald[111]: Sent WATCHDOG=1 notification.
22613 13:56:25.480893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
22614 13:56:25.481349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
22616 13:56:25.515976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass
22618 13:56:25.516558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass>
22619 13:56:25.552104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
22621 13:56:25.552660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
22622 13:56:25.587856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
22623 13:56:25.588287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
22625 13:56:25.624046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
22626 13:56:25.624505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
22628 13:56:25.664538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass
22630 13:56:25.665014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass>
22631 13:56:25.718096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
22632 13:56:25.718569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
22634 13:56:25.765407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
22636 13:56:25.765976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
22637 13:56:25.803651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
22639 13:56:25.804215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
22640 13:56:25.839970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass>
22641 13:56:25.840415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass
22643 13:56:25.872218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
22644 13:56:25.872657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
22646 13:56:25.904114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
22648 13:56:25.904524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
22649 13:56:25.936548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
22650 13:56:25.936946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
22652 13:56:25.968905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass
22654 13:56:25.969372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass>
22655 13:56:26.001392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
22656 13:56:26.001796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
22658 13:56:26.033067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
22659 13:56:26.033486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
22661 13:56:26.065251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
22663 13:56:26.065822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
22664 13:56:26.097364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass>
22665 13:56:26.097811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass
22667 13:56:26.129344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
22669 13:56:26.129947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
22670 13:56:26.162606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
22671 13:56:26.163058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
22673 13:56:26.194892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
22675 13:56:26.195339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
22676 13:56:26.226901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass>
22677 13:56:26.227301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass
22679 13:56:26.258746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
22680 13:56:26.259171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
22682 13:56:26.291882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
22684 13:56:26.292472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
22685 13:56:26.324172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
22687 13:56:26.324726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
22688 13:56:26.356954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass
22690 13:56:26.357515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass>
22691 13:56:26.390097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
22693 13:56:26.390668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
22694 13:56:26.423219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
22696 13:56:26.423792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
22697 13:56:26.456533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
22698 13:56:26.456980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
22700 13:56:26.491693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass>
22701 13:56:26.492159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass
22703 13:56:26.527328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
22705 13:56:26.527785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
22706 13:56:26.562567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
22707 13:56:26.562992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
22709 13:56:26.596465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
22710 13:56:26.596989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
22712 13:56:26.630422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass
22714 13:56:26.630855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass>
22715 13:56:26.662456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
22716 13:56:26.662928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
22718 13:56:26.694059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
22719 13:56:26.694558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
22721 13:56:26.725126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
22723 13:56:26.725581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
22724 13:56:26.756289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass>
22725 13:56:26.756765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass
22727 13:56:26.788225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
22729 13:56:26.788774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
22730 13:56:26.820323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
22731 13:56:26.820752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
22733 13:56:26.852127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
22734 13:56:26.852564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
22736 13:56:26.883590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass
22738 13:56:26.884146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass>
22739 13:56:26.914859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
22740 13:56:26.915284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
22742 13:56:26.953140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
22743 13:56:26.953596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
22745 13:56:26.989232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
22746 13:56:26.989701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
22748 13:56:27.020935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass>
22749 13:56:27.021430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass
22751 13:56:27.052247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
22752 13:56:27.052746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
22754 13:56:27.084855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
22756 13:56:27.085434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
22757 13:56:27.117794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
22758 13:56:27.118274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
22760 13:56:27.148963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass
22762 13:56:27.149525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass>
22763 13:56:27.180917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
22765 13:56:27.181478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
22766 13:56:27.212579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
22767 13:56:27.213032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
22769 13:56:27.246004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
22770 13:56:27.246467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
22772 13:56:27.277188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass>
22773 13:56:27.277682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass
22775 13:56:27.309490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
22776 13:56:27.310084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
22778 13:56:27.340901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
22779 13:56:27.341368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
22781 13:56:27.372858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
22783 13:56:27.373416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
22784 13:56:27.404450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass>
22785 13:56:27.404931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass
22787 13:56:27.435919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
22788 13:56:27.436400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
22790 13:56:27.466884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
22791 13:56:27.467352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
22793 13:56:27.498549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
22795 13:56:27.499163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
22796 13:56:27.530178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass
22798 13:56:27.530844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass>
22799 13:56:27.562415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
22800 13:56:27.562858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
22802 13:56:27.616641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
22804 13:56:27.617202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
22805 13:56:27.649638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
22807 13:56:27.650273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
22808 13:56:27.682466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass>
22809 13:56:27.682897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass
22811 13:56:27.715179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
22813 13:56:27.715632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
22814 13:56:27.747943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
22815 13:56:27.748393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
22817 13:56:27.780566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
22818 13:56:27.781061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
22820 13:56:27.825148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass>
22821 13:56:27.825619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass
22823 13:56:27.870732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
22824 13:56:27.871228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
22826 13:56:27.905117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
22828 13:56:27.905530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
22829 13:56:27.938151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
22830 13:56:27.938620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
22832 13:56:27.971997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass>
22833 13:56:27.972407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass
22835 13:56:28.006506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
22836 13:56:28.006932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
22838 13:56:28.040733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
22840 13:56:28.041164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
22841 13:56:28.074767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
22842 13:56:28.075229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
22844 13:56:28.108382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass
22846 13:56:28.108912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass>
22847 13:56:28.152094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
22848 13:56:28.152543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
22850 13:56:28.188305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
22851 13:56:28.188770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
22853 13:56:28.221518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
22854 13:56:28.222118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
22856 13:56:28.254269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass>
22857 13:56:28.254732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass
22859 13:56:28.288050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
22860 13:56:28.288430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
22862 13:56:28.322006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
22863 13:56:28.322410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
22865 13:56:28.355867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
22866 13:56:28.356415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
22868 13:56:28.388252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass>
22869 13:56:28.388671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass
22871 13:56:28.422019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
22872 13:56:28.422525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
22874 13:56:28.456229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
22875 13:56:28.456722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
22877 13:56:28.496904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
22878 13:56:28.497280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
22880 13:56:28.531634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass>
22881 13:56:28.532046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass
22883 13:56:28.564349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
22884 13:56:28.564754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
22886 13:56:28.596498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
22887 13:56:28.596972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
22889 13:56:28.629069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
22890 13:56:28.629533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
22892 13:56:28.662722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass>
22893 13:56:28.663108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass
22895 13:56:28.696188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
22896 13:56:28.696550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
22898 13:56:28.728669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
22899 13:56:28.729109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
22901 13:56:28.760421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
22902 13:56:28.760796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
22904 13:56:28.792538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass>
22905 13:56:28.792903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass
22907 13:56:28.824197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
22908 13:56:28.824658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
22910 13:56:28.855700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
22911 13:56:28.856107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
22913 13:56:28.887219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
22915 13:56:28.887796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
22916 13:56:28.919726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass>
22917 13:56:28.920183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass
22919 13:56:28.951523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
22920 13:56:28.951976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
22922 13:56:28.984327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
22924 13:56:28.984871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
22925 13:56:29.016714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
22927 13:56:29.017169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
22928 13:56:29.049374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass
22930 13:56:29.049822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass>
22931 13:56:29.081955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
22932 13:56:29.082428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
22934 13:56:29.114010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
22935 13:56:29.114499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
22937 13:56:29.147136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
22939 13:56:29.147821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
22940 13:56:29.178698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass>
22941 13:56:29.179159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass
22943 13:56:29.210777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
22944 13:56:29.211191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
22946 13:56:29.243241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
22948 13:56:29.243661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
22949 13:56:29.274903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
22950 13:56:29.275317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
22952 13:56:29.307686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass>
22953 13:56:29.308100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass
22955 13:56:29.339690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
22956 13:56:29.340138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
22958 13:56:29.371984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
22959 13:56:29.372462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
22961 13:56:29.404342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
22962 13:56:29.404809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
22964 13:56:29.436242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass
22966 13:56:29.436867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass>
22967 13:56:29.468435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
22968 13:56:29.468875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
22970 13:56:29.504206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
22972 13:56:29.504774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
22973 13:56:29.536604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
22974 13:56:29.537046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
22976 13:56:29.569241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass>
22977 13:56:29.569691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass
22979 13:56:29.601874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
22980 13:56:29.602313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
22982 13:56:29.634298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
22983 13:56:29.634750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
22985 13:56:29.666871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
22986 13:56:29.667308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
22988 13:56:29.699722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass
22990 13:56:29.700300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass>
22991 13:56:29.732156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
22992 13:56:29.732608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
22994 13:56:29.765336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
22995 13:56:29.765812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
22997 13:56:29.798180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
22999 13:56:29.798797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
23000 13:56:29.831131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass
23002 13:56:29.831758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass>
23003 13:56:29.863600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
23005 13:56:29.864211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
23006 13:56:29.895214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
23008 13:56:29.895832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
23009 13:56:29.927626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
23010 13:56:29.928091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
23012 13:56:29.960367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass>
23013 13:56:29.960778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass
23015 13:56:29.993079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
23016 13:56:29.993487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
23018 13:56:30.025883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
23019 13:56:30.026287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
23021 13:56:30.057600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
23022 13:56:30.058055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
23024 13:56:30.088893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass>
23025 13:56:30.089328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass
23027 13:56:30.122826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
23028 13:56:30.123289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
23030 13:56:30.157373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
23031 13:56:30.157852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
23033 13:56:30.190165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
23034 13:56:30.190617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
23036 13:56:30.222278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass>
23037 13:56:30.222727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass
23039 13:56:30.254065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
23040 13:56:30.254497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
23042 13:56:30.285933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
23043 13:56:30.286343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
23045 13:56:30.318629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
23047 13:56:30.319183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
23048 13:56:30.350410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass
23050 13:56:30.350946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass>
23051 13:56:30.382803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
23053 13:56:30.383361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
23054 13:56:30.415452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
23056 13:56:30.416036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
23057 13:56:30.449776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
23058 13:56:30.450256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
23060 13:56:30.481353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass>
23061 13:56:30.481816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass
23063 13:56:30.513291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
23065 13:56:30.513860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
23066 13:56:30.546020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
23067 13:56:30.546490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
23069 13:56:30.579754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
23070 13:56:30.580213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
23072 13:56:30.612396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass>
23073 13:56:30.612868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass
23075 13:56:30.644423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
23077 13:56:30.644978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
23078 13:56:30.681328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
23079 13:56:30.681897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
23081 13:56:30.714894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
23083 13:56:30.715458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
23084 13:56:30.750420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass
23086 13:56:30.750846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass>
23087 13:56:30.789127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
23088 13:56:30.789584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
23090 13:56:30.828033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
23092 13:56:30.828392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
23093 13:56:30.860489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
23094 13:56:30.860886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
23096 13:56:30.892791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass>
23097 13:56:30.893214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass
23099 13:56:30.924854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
23101 13:56:30.925429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
23102 13:56:30.958597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
23103 13:56:30.959061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
23105 13:56:30.991242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
23107 13:56:30.991787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
23108 13:56:31.023131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass
23110 13:56:31.023598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass>
23111 13:56:31.055772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
23112 13:56:31.056185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
23114 13:56:31.090407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
23116 13:56:31.091001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
23117 13:56:31.122374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
23118 13:56:31.122803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
23120 13:56:31.153534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass>
23121 13:56:31.154017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass
23123 13:56:31.186488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
23124 13:56:31.186978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
23126 13:56:31.219109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
23128 13:56:31.219570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
23129 13:56:31.252144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
23130 13:56:31.252600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
23132 13:56:31.284354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass
23134 13:56:31.284789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass>
23135 13:56:31.317148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
23136 13:56:31.317624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
23138 13:56:31.349743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
23139 13:56:31.350199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
23141 13:56:31.382155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
23142 13:56:31.382596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
23144 13:56:31.414719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass>
23145 13:56:31.415169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass
23147 13:56:31.447271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
23149 13:56:31.447879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
23150 13:56:31.479933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
23151 13:56:31.480387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
23153 13:56:31.512860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
23154 13:56:31.513303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
23156 13:56:31.545423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass
23158 13:56:31.545981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass>
23159 13:56:31.577562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
23160 13:56:31.578030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
23162 13:56:31.609670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
23163 13:56:31.610073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
23165 13:56:31.641439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
23166 13:56:31.641829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
23168 13:56:31.673817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass>
23169 13:56:31.674268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass
23171 13:56:31.706708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
23172 13:56:31.707168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
23174 13:56:31.739267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
23176 13:56:31.739879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
23177 13:56:31.771240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
23179 13:56:31.771822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
23180 13:56:31.803969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass
23182 13:56:31.804549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass>
23183 13:56:31.836179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
23184 13:56:31.836624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
23186 13:56:31.869016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
23188 13:56:31.869571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
23189 13:56:31.901693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
23190 13:56:31.902308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
23192 13:56:31.935545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass>
23193 13:56:31.936023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass
23195 13:56:31.967738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
23197 13:56:31.968323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
23198 13:56:32.000210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
23199 13:56:32.000689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
23201 13:56:32.032396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
23202 13:56:32.032856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
23204 13:56:32.064810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass
23206 13:56:32.065352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass>
23207 13:56:32.097916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
23208 13:56:32.098394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
23210 13:56:32.133073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
23211 13:56:32.133563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
23213 13:56:32.166239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
23214 13:56:32.166713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
23216 13:56:32.198052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass
23218 13:56:32.198506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass>
23219 13:56:32.230048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
23221 13:56:32.230506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
23222 13:56:32.261956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
23223 13:56:32.262378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
23225 13:56:32.294577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
23226 13:56:32.295028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
23228 13:56:32.326107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass
23230 13:56:32.326693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass>
23231 13:56:32.357632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
23232 13:56:32.358113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
23234 13:56:32.389899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
23235 13:56:32.390369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
23237 13:56:32.422028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
23238 13:56:32.422496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
23240 13:56:32.454222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass>
23241 13:56:32.454626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass
23243 13:56:32.488105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
23245 13:56:32.488562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
23246 13:56:32.520702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
23247 13:56:32.521175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
23249 13:56:32.553443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
23250 13:56:32.553868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
23252 13:56:32.586802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass>
23253 13:56:32.587250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass
23255 13:56:32.619587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
23257 13:56:32.620037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
23258 13:56:32.654227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
23259 13:56:32.654693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
23261 13:56:32.690700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
23263 13:56:32.691176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
23264 13:56:32.749184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass>
23265 13:56:32.749678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass
23267 13:56:32.781441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
23268 13:56:32.781923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
23270 13:56:32.824725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
23271 13:56:32.825132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
23273 13:56:32.871956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
23274 13:56:32.872353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
23276 13:56:32.915256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass
23278 13:56:32.915689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass>
23279 13:56:32.955699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
23280 13:56:32.956069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
23282 13:56:32.988622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
23284 13:56:32.988990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
23285 13:56:33.020222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
23287 13:56:33.020692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
23288 13:56:33.055837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass
23290 13:56:33.056395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass>
23291 13:56:33.088191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
23292 13:56:33.088678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
23294 13:56:33.119955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
23295 13:56:33.120437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
23297 13:56:33.152541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
23298 13:56:33.153021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
23300 13:56:33.185684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass
23302 13:56:33.186265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass>
23303 13:56:33.217745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
23304 13:56:33.218226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
23306 13:56:33.251524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
23307 13:56:33.251988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
23309 13:56:33.284714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
23310 13:56:33.285184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
23312 13:56:33.318344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass
23314 13:56:33.318811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass>
23315 13:56:33.351734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
23316 13:56:33.352146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
23318 13:56:33.388154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
23319 13:56:33.388622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
23321 13:56:33.420982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
23322 13:56:33.421404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
23324 13:56:33.452811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass>
23325 13:56:33.453287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass
23327 13:56:33.484916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
23328 13:56:33.485370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
23330 13:56:33.516113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
23331 13:56:33.516509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
23333 13:56:33.549354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
23334 13:56:33.549774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
23336 13:56:33.581751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass>
23337 13:56:33.582187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass
23339 13:56:33.612752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
23340 13:56:33.613226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
23342 13:56:33.644209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
23344 13:56:33.644763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
23345 13:56:33.676110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
23346 13:56:33.676519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
23348 13:56:33.707712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass>
23349 13:56:33.708175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass
23351 13:56:33.738858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
23353 13:56:33.739324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
23354 13:56:33.770546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
23355 13:56:33.770959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
23357 13:56:33.802181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
23358 13:56:33.802596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
23360 13:56:33.833703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass>
23361 13:56:33.834202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass
23363 13:56:33.865419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
23364 13:56:33.865905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
23366 13:56:33.898206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
23368 13:56:33.901789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
23369 13:56:33.930051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
23371 13:56:33.930633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
23372 13:56:33.961630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass
23374 13:56:33.962244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass>
23375 13:56:33.993817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
23377 13:56:33.994479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
23378 13:56:34.027016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
23380 13:56:34.027492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
23381 13:56:34.062401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
23382 13:56:34.062821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
23384 13:56:34.098197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass>
23385 13:56:34.098612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass
23387 13:56:34.133382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
23388 13:56:34.133798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
23390 13:56:34.168734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
23391 13:56:34.169164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
23393 13:56:34.204253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
23394 13:56:34.204695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
23396 13:56:34.239856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass>
23397 13:56:34.240267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass
23399 13:56:34.276266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
23400 13:56:34.276674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
23402 13:56:34.312444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
23403 13:56:34.312860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
23405 13:56:34.348232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
23407 13:56:34.348683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
23408 13:56:34.384520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass
23410 13:56:34.385115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass>
23411 13:56:34.421795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
23412 13:56:34.422295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
23414 13:56:34.457467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
23415 13:56:34.457964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
23417 13:56:34.493941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
23418 13:56:34.494397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
23420 13:56:34.529468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass
23422 13:56:34.529960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass>
23423 13:56:34.565106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
23425 13:56:34.565690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
23426 13:56:34.600570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
23427 13:56:34.600994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
23429 13:56:34.636895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
23430 13:56:34.637320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
23432 13:56:34.672323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass>
23433 13:56:34.672816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass
23435 13:56:34.708563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
23437 13:56:34.709208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
23438 13:56:34.744675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
23439 13:56:34.745146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
23441 13:56:34.780493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
23442 13:56:34.780929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
23444 13:56:34.816183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass>
23445 13:56:34.816543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass
23447 13:56:34.852444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
23448 13:56:34.852822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
23450 13:56:34.888573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
23452 13:56:34.889046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
23453 13:56:34.924374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
23454 13:56:34.924790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
23456 13:56:34.960946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass>
23457 13:56:34.961406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass
23459 13:56:34.996559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
23460 13:56:34.997042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
23462 13:56:35.032491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
23463 13:56:35.032918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
23465 13:56:35.068608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
23467 13:56:35.069086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
23468 13:56:35.104309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass
23470 13:56:35.104844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass>
23471 13:56:35.140557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
23472 13:56:35.140953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
23474 13:56:35.176563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
23475 13:56:35.177018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
23477 13:56:35.212653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
23478 13:56:35.213080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
23480 13:56:35.249208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass>
23481 13:56:35.249634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass
23483 13:56:35.284843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
23485 13:56:35.285433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
23486 13:56:35.320810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
23487 13:56:35.321230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
23489 13:56:35.356725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
23490 13:56:35.357196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
23492 13:56:35.393049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass>
23493 13:56:35.393482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass
23495 13:56:35.428938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
23496 13:56:35.429373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
23498 13:56:35.466096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
23499 13:56:35.466520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
23501 13:56:35.501830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
23503 13:56:35.502416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
23504 13:56:35.537529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass>
23505 13:56:35.538012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass
23507 13:56:35.573127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
23508 13:56:35.573551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
23510 13:56:35.609019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
23511 13:56:35.609441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
23513 13:56:35.645274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
23514 13:56:35.645694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
23516 13:56:35.681522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass
23518 13:56:35.682090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass>
23519 13:56:35.717000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
23520 13:56:35.717444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
23522 13:56:35.752445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
23523 13:56:35.752824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
23525 13:56:35.788192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
23526 13:56:35.788574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
23528 13:56:35.824056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass>
23529 13:56:35.824404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass
23531 13:56:35.859235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
23533 13:56:35.859730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
23534 13:56:35.894362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
23535 13:56:35.894730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
23537 13:56:35.929092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
23538 13:56:35.929552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
23540 13:56:35.964217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass>
23541 13:56:35.964634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass
23543 13:56:35.999725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
23544 13:56:36.000140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
23546 13:56:36.034705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
23547 13:56:36.035120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
23549 13:56:36.070716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
23550 13:56:36.071134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
23552 13:56:36.106947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass
23554 13:56:36.107496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass>
23555 13:56:36.142224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
23556 13:56:36.142589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
23558 13:56:36.177541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
23559 13:56:36.177851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
23561 13:56:36.212859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
23562 13:56:36.213156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
23564 13:56:36.248357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass
23566 13:56:36.248646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass>
23567 13:56:36.284039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
23568 13:56:36.284405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
23570 13:56:36.319773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
23571 13:56:36.320131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
23573 13:56:36.355089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
23575 13:56:36.355396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
23576 13:56:36.390500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass>
23577 13:56:36.390856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass
23579 13:56:36.425379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
23580 13:56:36.425753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
23582 13:56:36.460518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
23583 13:56:36.460900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
23585 13:56:36.495577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
23586 13:56:36.495948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
23588 13:56:36.529912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass>
23589 13:56:36.530309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass
23591 13:56:36.564547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
23592 13:56:36.564951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
23594 13:56:36.600736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
23595 13:56:36.601151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
23597 13:56:36.636130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
23598 13:56:36.636564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
23600 13:56:36.671596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass>
23601 13:56:36.671958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass
23603 13:56:36.706731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
23604 13:56:36.707093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
23606 13:56:36.741631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
23607 13:56:36.742058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
23609 13:56:36.776888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
23610 13:56:36.777282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
23612 13:56:36.811909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass>
23613 13:56:36.812303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass
23615 13:56:36.850519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
23616 13:56:36.850902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
23618 13:56:36.886385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
23619 13:56:36.886749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
23621 13:56:36.922639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
23622 13:56:36.923097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
23624 13:56:36.957394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass>
23625 13:56:36.957777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass
23627 13:56:36.992609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
23628 13:56:36.992979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
23630 13:56:37.028729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
23631 13:56:37.029129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
23633 13:56:37.064424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
23635 13:56:37.064871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
23636 13:56:37.100205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass>
23637 13:56:37.100613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass
23639 13:56:37.136793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
23641 13:56:37.137366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
23642 13:56:37.173306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
23643 13:56:37.173806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
23645 13:56:37.208944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
23646 13:56:37.209369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
23648 13:56:37.244538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass
23650 13:56:37.245073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass>
23651 13:56:37.279708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
23652 13:56:37.280102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
23654 13:56:37.314316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
23656 13:56:37.314831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
23657 13:56:37.349843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
23658 13:56:37.350222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
23660 13:56:37.384810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass>
23661 13:56:37.385174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass
23663 13:56:37.420605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
23664 13:56:37.421039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
23666 13:56:37.456461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
23668 13:56:37.456803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
23669 13:56:37.492088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
23670 13:56:37.492468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
23672 13:56:37.528372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass>
23673 13:56:37.528666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass
23675 13:56:37.563952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
23676 13:56:37.564261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
23678 13:56:37.600002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
23679 13:56:37.600310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
23681 13:56:37.634706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
23682 13:56:37.635082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
23684 13:56:37.669703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass>
23685 13:56:37.670083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass
23687 13:56:37.704440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
23688 13:56:37.704819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
23690 13:56:37.740440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
23691 13:56:37.740773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
23693 13:56:37.775923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
23694 13:56:37.776284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
23696 13:56:37.810568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass
23698 13:56:37.811190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass>
23699 13:56:37.875488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
23700 13:56:37.875928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
23702 13:56:37.909524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
23704 13:56:37.910011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
23705 13:56:37.944755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
23706 13:56:37.945197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
23708 13:56:37.980152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass>
23709 13:56:37.980618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass
23711 13:56:38.017578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
23712 13:56:38.018104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
23714 13:56:38.050773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
23716 13:56:38.051343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
23717 13:56:38.084388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
23718 13:56:38.084858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
23720 13:56:38.117611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass>
23721 13:56:38.118110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass
23723 13:56:38.150428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
23724 13:56:38.150870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
23726 13:56:38.184600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
23727 13:56:38.185040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
23729 13:56:38.218650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
23731 13:56:38.219299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
23732 13:56:38.251727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass>
23733 13:56:38.252221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass
23735 13:56:38.284466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
23736 13:56:38.284884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
23738 13:56:38.317452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
23740 13:56:38.317924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
23741 13:56:38.351232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
23743 13:56:38.351699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
23744 13:56:38.385371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass>
23745 13:56:38.385809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass
23747 13:56:38.419338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
23749 13:56:38.419767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
23750 13:56:38.452677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
23751 13:56:38.453094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
23753 13:56:38.486150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
23754 13:56:38.486564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
23756 13:56:38.518595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass
23758 13:56:38.519152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass>
23759 13:56:38.552113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
23760 13:56:38.552562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
23762 13:56:38.585290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
23763 13:56:38.585764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
23765 13:56:38.618399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
23766 13:56:38.618822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
23768 13:56:38.652110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass>
23769 13:56:38.652598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass
23771 13:56:38.685212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
23773 13:56:38.685832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
23774 13:56:38.718397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
23776 13:56:38.718961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
23777 13:56:38.751323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
23779 13:56:38.751865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
23780 13:56:38.784364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass
23782 13:56:38.784909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass>
23783 13:56:38.818456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
23784 13:56:38.818901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
23786 13:56:38.852879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
23788 13:56:38.853438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
23789 13:56:38.886510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
23790 13:56:38.886929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
23792 13:56:38.920701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass
23794 13:56:38.921141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass>
23795 13:56:38.955605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
23797 13:56:38.956048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
23798 13:56:38.989612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
23799 13:56:38.990043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
23801 13:56:39.024735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
23803 13:56:39.025191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
23804 13:56:39.058505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass>
23805 13:56:39.058923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass
23807 13:56:39.092255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
23808 13:56:39.092666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
23810 13:56:39.126656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
23811 13:56:39.127159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
23813 13:56:39.162959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
23815 13:56:39.163411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
23816 13:56:39.200232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass
23818 13:56:39.200685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass>
23819 13:56:39.237395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
23820 13:56:39.237823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
23822 13:56:39.274687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
23823 13:56:39.275117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
23825 13:56:39.312915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
23827 13:56:39.313366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
23828 13:56:39.349257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass>
23829 13:56:39.349680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass
23831 13:56:39.385918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
23832 13:56:39.386330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
23834 13:56:39.422212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
23835 13:56:39.422626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
23837 13:56:39.458585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
23838 13:56:39.459017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
23840 13:56:39.496098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass>
23841 13:56:39.496527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass
23843 13:56:39.532481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
23844 13:56:39.532909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
23846 13:56:39.569035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
23847 13:56:39.569462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
23849 13:56:39.607189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
23851 13:56:39.607645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
23852 13:56:39.645586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass
23854 13:56:39.646085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass>
23855 13:56:39.685093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
23856 13:56:39.685496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
23858 13:56:39.722616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
23859 13:56:39.723066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
23861 13:56:39.760437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
23862 13:56:39.760855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
23864 13:56:39.798054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass>
23865 13:56:39.798475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass
23867 13:56:39.835742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
23868 13:56:39.836148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
23870 13:56:39.873434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
23871 13:56:39.873859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
23873 13:56:39.910510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
23874 13:56:39.910941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
23876 13:56:39.950454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass>
23877 13:56:39.950881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass
23879 13:56:39.988130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
23880 13:56:39.988548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
23882 13:56:40.026587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
23883 13:56:40.027014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
23885 13:56:40.065453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
23886 13:56:40.065845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
23888 13:56:40.103722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass>
23889 13:56:40.104177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass
23891 13:56:40.141263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
23893 13:56:40.141687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
23894 13:56:40.180048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
23895 13:56:40.180462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
23897 13:56:40.219528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
23898 13:56:40.219947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
23900 13:56:40.259521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass>
23901 13:56:40.259908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass
23903 13:56:40.290684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
23905 13:56:40.291087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
23906 13:56:40.324461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
23907 13:56:40.324928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
23909 13:56:40.358002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
23910 13:56:40.358480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
23912 13:56:40.391914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass>
23913 13:56:40.392405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass
23915 13:56:40.426298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
23916 13:56:40.426800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
23918 13:56:40.461546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
23920 13:56:40.462134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
23921 13:56:40.498507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
23922 13:56:40.498935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
23924 13:56:40.533503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass>
23925 13:56:40.533935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass
23927 13:56:40.574677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
23928 13:56:40.575212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
23930 13:56:40.620836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
23931 13:56:40.621269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
23933 13:56:40.662083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
23934 13:56:40.662571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
23936 13:56:40.701756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass>
23937 13:56:40.702281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass
23939 13:56:40.741527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
23940 13:56:40.742016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
23942 13:56:40.778376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
23943 13:56:40.778764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
23945 13:56:40.813514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
23946 13:56:40.813998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
23948 13:56:40.848617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass>
23949 13:56:40.849001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass
23951 13:56:40.883046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
23953 13:56:40.883535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
23954 13:56:40.915981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
23955 13:56:40.916386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
23957 13:56:40.948233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
23958 13:56:40.948643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
23960 13:56:40.980424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass>
23961 13:56:40.980849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass
23963 13:56:41.012408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
23965 13:56:41.012972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
23966 13:56:41.044282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
23967 13:56:41.044752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
23969 13:56:41.075976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
23970 13:56:41.076403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
23972 13:56:41.108235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass
23974 13:56:41.108678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass>
23975 13:56:41.140658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
23976 13:56:41.141060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
23978 13:56:41.173180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
23979 13:56:41.173644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
23981 13:56:41.205735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
23982 13:56:41.206146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
23984 13:56:41.239636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass
23986 13:56:41.240219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass>
23987 13:56:41.273227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
23988 13:56:41.273680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
23990 13:56:41.305578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
23991 13:56:41.306068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
23993 13:56:41.337521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
23994 13:56:41.337998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
23996 13:56:41.369015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass
23998 13:56:41.369579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass>
23999 13:56:41.400605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
24000 13:56:41.401045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
24002 13:56:41.432440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
24004 13:56:41.433005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
24005 13:56:41.464226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
24007 13:56:41.464863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
24008 13:56:41.496828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass
24010 13:56:41.497290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass>
24011 13:56:41.530822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
24012 13:56:41.531233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
24014 13:56:41.564116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
24015 13:56:41.564571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
24017 13:56:41.596269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
24018 13:56:41.596723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
24020 13:56:41.628333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass>
24021 13:56:41.628777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass
24023 13:56:41.660508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
24025 13:56:41.660940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
24026 13:56:41.693431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
24027 13:56:41.693851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
24029 13:56:41.726714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
24031 13:56:41.727171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
24032 13:56:41.759105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass
24034 13:56:41.759562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass>
24035 13:56:41.791923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
24036 13:56:41.792312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
24038 13:56:41.824074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
24040 13:56:41.824633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
24041 13:56:41.858516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
24043 13:56:41.859092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
24044 13:56:41.890775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass>
24045 13:56:41.891242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass
24047 13:56:41.923426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
24048 13:56:41.923908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
24050 13:56:41.955225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
24052 13:56:41.955776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
24053 13:56:41.987504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
24054 13:56:41.987948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
24056 13:56:42.020019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass
24058 13:56:42.020563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass>
24059 13:56:42.052312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
24060 13:56:42.052745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
24062 13:56:42.084687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
24064 13:56:42.085158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
24065 13:56:42.116990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
24066 13:56:42.117404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
24068 13:56:42.148879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass>
24069 13:56:42.149361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass
24071 13:56:42.181549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
24072 13:56:42.182062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
24074 13:56:42.215030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
24076 13:56:42.215689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
24077 13:56:42.247381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
24079 13:56:42.248011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
24080 13:56:42.278768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass
24082 13:56:42.279400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass>
24083 13:56:42.310394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
24084 13:56:42.310871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
24086 13:56:42.342605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
24087 13:56:42.343000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
24089 13:56:42.376180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
24090 13:56:42.376568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
24092 13:56:42.408369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass
24094 13:56:42.408792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass>
24095 13:56:42.439957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
24097 13:56:42.440392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
24098 13:56:42.471304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
24100 13:56:42.471739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
24101 13:56:42.502670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
24103 13:56:42.503126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
24104 13:56:42.536336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass
24106 13:56:42.536796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass>
24107 13:56:42.568530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
24108 13:56:42.568953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
24110 13:56:42.600823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
24112 13:56:42.601262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
24113 13:56:42.632379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
24115 13:56:42.632966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
24116 13:56:42.664285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass>
24117 13:56:42.664761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass
24119 13:56:42.696311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
24121 13:56:42.696873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
24122 13:56:42.728080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
24123 13:56:42.728452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
24125 13:56:42.760202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
24126 13:56:42.760635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
24128 13:56:42.792365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass>
24129 13:56:42.792743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass
24131 13:56:42.824366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
24133 13:56:42.824807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
24134 13:56:42.866655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
24135 13:56:42.867104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
24137 13:56:42.907810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
24138 13:56:42.908271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
24140 13:56:42.943296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass
24142 13:56:42.947143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass>
24143 13:56:42.997440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
24145 13:56:42.997866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
24146 13:56:43.030663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
24147 13:56:43.031138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
24149 13:56:43.062470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
24150 13:56:43.062952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
24152 13:56:43.094449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass>
24153 13:56:43.094942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass
24155 13:56:43.128568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
24157 13:56:43.129210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
24158 13:56:43.160356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
24159 13:56:43.160779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
24161 13:56:43.194120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
24162 13:56:43.194558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
24164 13:56:43.228139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass
24166 13:56:43.228755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass>
24167 13:56:43.260398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
24169 13:56:43.260958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
24170 13:56:43.293052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
24171 13:56:43.293436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
24173 13:56:43.325004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
24175 13:56:43.325656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
24176 13:56:43.357201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass>
24177 13:56:43.357640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass
24179 13:56:43.389502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
24181 13:56:43.390058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
24182 13:56:43.421509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
24183 13:56:43.421914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
24185 13:56:43.453939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
24186 13:56:43.454362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
24188 13:56:43.486495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass>
24189 13:56:43.486939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass
24191 13:56:43.521474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
24192 13:56:43.521889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
24194 13:56:43.554036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
24196 13:56:43.554465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
24197 13:56:43.586567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
24199 13:56:43.586996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
24200 13:56:43.622341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass>
24201 13:56:43.622781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass
24203 13:56:43.655252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
24205 13:56:43.655874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
24206 13:56:43.687343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
24208 13:56:43.687910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
24209 13:56:43.719869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
24210 13:56:43.720346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
24212 13:56:43.753413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass>
24213 13:56:43.753933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass
24215 13:56:43.787299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
24217 13:56:43.787867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
24218 13:56:43.819992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
24219 13:56:43.820450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
24221 13:56:43.854150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
24223 13:56:43.854717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
24224 13:56:43.886516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass
24226 13:56:43.887058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass>
24227 13:56:43.918047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
24229 13:56:43.918519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
24230 13:56:43.952192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
24231 13:56:43.952633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
24233 13:56:43.986532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
24235 13:56:43.986988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
24236 13:56:44.018427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass
24238 13:56:44.019062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass>
24239 13:56:44.050334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
24240 13:56:44.050819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
24242 13:56:44.081995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
24243 13:56:44.082414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
24245 13:56:44.113322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
24246 13:56:44.113791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
24248 13:56:44.145667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass>
24249 13:56:44.146114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass
24251 13:56:44.177922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
24252 13:56:44.178343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
24254 13:56:44.209391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
24256 13:56:44.209868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
24257 13:56:44.241501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
24258 13:56:44.242011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
24260 13:56:44.272865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass
24262 13:56:44.273431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass>
24263 13:56:44.305142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
24265 13:56:44.305710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
24266 13:56:44.337938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
24267 13:56:44.338341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
24269 13:56:44.370435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
24270 13:56:44.370883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
24272 13:56:44.401923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass>
24273 13:56:44.402354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass
24275 13:56:44.433061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
24277 13:56:44.433617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
24278 13:56:44.464831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
24280 13:56:44.465376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
24281 13:56:44.496979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
24282 13:56:44.497443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
24284 13:56:44.528597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass>
24285 13:56:44.529059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass
24287 13:56:44.560214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
24288 13:56:44.560668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
24290 13:56:44.592047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
24291 13:56:44.592501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
24293 13:56:44.624017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
24295 13:56:44.624553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
24296 13:56:44.655497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass
24298 13:56:44.656034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass>
24299 13:56:44.686644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
24300 13:56:44.687077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
24302 13:56:44.717706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
24303 13:56:44.718143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
24305 13:56:44.749406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
24306 13:56:44.749832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
24308 13:56:44.780347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass
24310 13:56:44.780890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass>
24311 13:56:44.812134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
24312 13:56:44.812579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
24314 13:56:44.843662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
24316 13:56:44.844291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
24317 13:56:44.874779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
24318 13:56:44.875228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
24320 13:56:44.906206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass>
24321 13:56:44.906674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass
24323 13:56:44.937890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
24325 13:56:44.938432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
24326 13:56:44.968985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
24327 13:56:44.969439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
24329 13:56:45.000358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
24330 13:56:45.000819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
24332 13:56:45.031586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass>
24333 13:56:45.032072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass
24335 13:56:45.062980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
24337 13:56:45.063443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
24338 13:56:45.094302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
24339 13:56:45.094750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
24341 13:56:45.125989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
24342 13:56:45.126458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
24344 13:56:45.157517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass>
24345 13:56:45.158029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass
24347 13:56:45.188612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
24348 13:56:45.189041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
24350 13:56:45.219901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
24351 13:56:45.220375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
24353 13:56:45.250819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
24354 13:56:45.251275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
24356 13:56:45.281705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass>
24357 13:56:45.282196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass
24359 13:56:45.312492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
24360 13:56:45.312930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
24362 13:56:45.344168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
24363 13:56:45.344641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
24365 13:56:45.375990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
24367 13:56:45.376455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
24368 13:56:45.406980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass>
24369 13:56:45.407416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass
24371 13:56:45.438426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
24372 13:56:45.438851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
24374 13:56:45.470046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
24376 13:56:45.470639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
24377 13:56:45.501945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
24378 13:56:45.502416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
24380 13:56:45.533586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass>
24381 13:56:45.534080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass
24383 13:56:45.564674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
24384 13:56:45.565095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
24386 13:56:45.596032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
24387 13:56:45.596461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
24389 13:56:45.628186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
24390 13:56:45.628616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
24392 13:56:45.659480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass>
24393 13:56:45.659966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass
24395 13:56:45.691039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
24397 13:56:45.691625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
24398 13:56:45.725641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
24399 13:56:45.726139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
24401 13:56:45.759292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
24403 13:56:45.759884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
24404 13:56:45.793103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass>
24405 13:56:45.793575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass
24407 13:56:45.828900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
24409 13:56:45.829458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
24410 13:56:45.865691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
24412 13:56:45.866308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
24413 13:56:45.900108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
24414 13:56:45.900598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
24416 13:56:45.932875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass>
24417 13:56:45.933341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass
24419 13:56:45.964686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
24420 13:56:45.965112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
24422 13:56:45.997135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
24423 13:56:45.997558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
24425 13:56:46.028082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
24426 13:56:46.028509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
24428 13:56:46.059612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass
24430 13:56:46.060094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass>
24431 13:56:46.090861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
24432 13:56:46.091282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
24434 13:56:46.122950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
24436 13:56:46.123427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
24437 13:56:46.154577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
24438 13:56:46.154999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
24440 13:56:46.189160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass
24442 13:56:46.189632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass>
24443 13:56:46.224791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
24444 13:56:46.225237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
24446 13:56:46.256703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
24447 13:56:46.257139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
24449 13:56:46.288807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
24450 13:56:46.289228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
24452 13:56:46.320873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass>
24453 13:56:46.321298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass
24455 13:56:46.352793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
24456 13:56:46.353209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
24458 13:56:46.385462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
24459 13:56:46.385890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
24461 13:56:46.417062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
24462 13:56:46.417506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
24464 13:56:46.448900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass>
24465 13:56:46.449390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass
24467 13:56:46.480827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
24468 13:56:46.481283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
24470 13:56:46.512693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
24471 13:56:46.513148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
24473 13:56:46.545061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
24474 13:56:46.545522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
24476 13:56:46.576469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass>
24477 13:56:46.576884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass
24479 13:56:46.608385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
24480 13:56:46.608799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
24482 13:56:46.640238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
24483 13:56:46.640656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
24485 13:56:46.672066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
24486 13:56:46.672466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
24488 13:56:46.703989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass>
24489 13:56:46.704511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass
24491 13:56:46.736249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
24492 13:56:46.736754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
24494 13:56:46.768334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
24495 13:56:46.768784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
24497 13:56:46.800172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
24498 13:56:46.800617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
24500 13:56:46.831680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass>
24501 13:56:46.832137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass
24503 13:56:46.863620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
24504 13:56:46.864094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
24506 13:56:46.895507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
24507 13:56:46.895926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
24509 13:56:46.927232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
24511 13:56:46.927701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
24512 13:56:46.959791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass
24514 13:56:46.960353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass>
24515 13:56:46.990744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
24516 13:56:46.991194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
24518 13:56:47.022233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
24519 13:56:47.022647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
24521 13:56:47.053008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
24522 13:56:47.053424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
24524 13:56:47.084044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass>
24525 13:56:47.084515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass
24527 13:56:47.115220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
24529 13:56:47.115776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
24530 13:56:47.146380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
24531 13:56:47.146836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
24533 13:56:47.177642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
24534 13:56:47.178110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
24536 13:56:47.209204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass>
24537 13:56:47.209691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass
24539 13:56:47.242813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
24540 13:56:47.243224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
24542 13:56:47.274412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
24544 13:56:47.275048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
24545 13:56:47.305809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
24547 13:56:47.306409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
24548 13:56:47.336987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass
24550 13:56:47.337559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass>
24551 13:56:47.368057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
24552 13:56:47.368515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
24554 13:56:47.400026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
24555 13:56:47.400503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
24557 13:56:47.432051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
24558 13:56:47.432511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
24560 13:56:47.463506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass>
24561 13:56:47.463979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass
24563 13:56:47.494537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
24564 13:56:47.495027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
24566 13:56:47.526285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
24567 13:56:47.526757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
24569 13:56:47.557902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
24571 13:56:47.558452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
24572 13:56:47.588951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass
24574 13:56:47.589484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass>
24575 13:56:47.620255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
24576 13:56:47.620682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
24578 13:56:47.652123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
24579 13:56:47.652558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
24581 13:56:47.685671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
24582 13:56:47.686128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
24584 13:56:47.717941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass>
24585 13:56:47.718370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass
24587 13:56:47.749923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
24588 13:56:47.750399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
24590 13:56:47.780925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
24591 13:56:47.781368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
24593 13:56:47.812218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
24595 13:56:47.812686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
24596 13:56:47.843036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass
24598 13:56:47.843691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass>
24599 13:56:47.874697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
24600 13:56:47.875165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
24602 13:56:47.906891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
24603 13:56:47.907350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
24605 13:56:47.938438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
24607 13:56:47.939090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
24608 13:56:47.970657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass
24610 13:56:47.971288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass>
24611 13:56:48.005135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
24612 13:56:48.005602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
24614 13:56:48.040619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
24615 13:56:48.041104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
24617 13:56:48.094142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
24619 13:56:48.094785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
24620 13:56:48.125889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass
24622 13:56:48.126444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass>
24623 13:56:48.157057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
24624 13:56:48.157507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
24626 13:56:48.188453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
24627 13:56:48.188882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
24629 13:56:48.220235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
24631 13:56:48.220790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
24632 13:56:48.252269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass
24634 13:56:48.252826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass>
24635 13:56:48.284680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
24636 13:56:48.285211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
24638 13:56:48.319309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
24640 13:56:48.319858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
24641 13:56:48.351943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
24643 13:56:48.352480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
24644 13:56:48.383612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass
24646 13:56:48.384141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass>
24647 13:56:48.414739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
24649 13:56:48.415280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
24650 13:56:48.446700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
24652 13:56:48.447231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
24653 13:56:48.477850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
24654 13:56:48.478290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
24656 13:56:48.508539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass>
24657 13:56:48.509008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass
24659 13:56:48.540124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
24660 13:56:48.540579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
24662 13:56:48.571172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
24664 13:56:48.571711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
24665 13:56:48.604408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
24666 13:56:48.604873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
24668 13:56:48.635917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass>
24669 13:56:48.636383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass
24671 13:56:48.667347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
24673 13:56:48.667974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
24674 13:56:48.698622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
24676 13:56:48.699169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
24677 13:56:48.729729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
24678 13:56:48.730197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
24680 13:56:48.760748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass>
24681 13:56:48.761220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass
24683 13:56:48.792043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
24684 13:56:48.792510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
24686 13:56:48.823083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
24688 13:56:48.823680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
24689 13:56:48.855019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
24691 13:56:48.855602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
24692 13:56:48.886364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass>
24693 13:56:48.886840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass
24695 13:56:48.918563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
24696 13:56:48.918972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
24698 13:56:48.953111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
24700 13:56:48.953536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
24701 13:56:48.985739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
24702 13:56:48.986239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
24704 13:56:49.017944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass
24706 13:56:49.018583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass>
24707 13:56:49.049295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
24708 13:56:49.049683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
24710 13:56:49.080457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
24711 13:56:49.080880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
24713 13:56:49.112884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
24714 13:56:49.113310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
24716 13:56:49.146036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass
24718 13:56:49.146685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass>
24719 13:56:49.177924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
24720 13:56:49.178412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
24722 13:56:49.209559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
24723 13:56:49.210066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
24725 13:56:49.241444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
24726 13:56:49.241911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
24728 13:56:49.273764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass>
24729 13:56:49.274330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass
24731 13:56:49.306259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
24732 13:56:49.306703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
24734 13:56:49.337811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
24735 13:56:49.338226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
24737 13:56:49.370493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
24739 13:56:49.370950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
24740 13:56:49.405488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass
24742 13:56:49.405955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass>
24743 13:56:49.440446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
24744 13:56:49.440861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
24746 13:56:49.476241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
24747 13:56:49.476683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
24749 13:56:49.510815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
24750 13:56:49.511240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
24752 13:56:49.545788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass>
24753 13:56:49.546215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass
24755 13:56:49.580256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
24756 13:56:49.580757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
24758 13:56:49.615193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
24760 13:56:49.615648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
24761 13:56:49.651829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
24762 13:56:49.652245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
24764 13:56:49.687062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass
24766 13:56:49.687530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass>
24767 13:56:49.722056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
24768 13:56:49.722488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
24770 13:56:49.757266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
24771 13:56:49.757683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
24773 13:56:49.792726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
24774 13:56:49.793177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
24776 13:56:49.828103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass
24778 13:56:49.828661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass>
24779 13:56:49.863225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
24781 13:56:49.863682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
24782 13:56:49.898443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
24783 13:56:49.898837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
24785 13:56:49.933896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
24786 13:56:49.934320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
24788 13:56:49.969617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass>
24789 13:56:49.970036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass
24791 13:56:50.006352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
24792 13:56:50.006769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
24794 13:56:50.042789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
24795 13:56:50.043253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
24797 13:56:50.079546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
24798 13:56:50.080008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
24800 13:56:50.115563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass>
24801 13:56:50.116031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass
24803 13:56:50.150751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
24805 13:56:50.151232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
24806 13:56:50.186284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
24808 13:56:50.186737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
24809 13:56:50.221281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
24811 13:56:50.221884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
24812 13:56:50.256193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass>
24813 13:56:50.256626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass
24815 13:56:50.291889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
24817 13:56:50.292439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
24818 13:56:50.327727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
24819 13:56:50.328179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
24821 13:56:50.362858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
24822 13:56:50.363320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
24824 13:56:50.398354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass
24826 13:56:50.398919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass>
24827 13:56:50.433429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
24828 13:56:50.433886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
24830 13:56:50.468500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
24831 13:56:50.468884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
24833 13:56:50.504388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
24834 13:56:50.504847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
24836 13:56:50.540415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass
24838 13:56:50.541033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass>
24839 13:56:50.576297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
24840 13:56:50.576774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
24842 13:56:50.613782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
24843 13:56:50.614216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
24845 13:56:50.649308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
24847 13:56:50.649778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
24848 13:56:50.685970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass>
24849 13:56:50.686414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass
24851 13:56:50.722144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
24852 13:56:50.722568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
24854 13:56:50.770609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
24855 13:56:50.771039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
24857 13:56:50.818427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
24858 13:56:50.818830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
24860 13:56:50.857234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass>
24861 13:56:50.857595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass
24863 13:56:50.893577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
24864 13:56:50.893949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
24866 13:56:50.929281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
24867 13:56:50.929665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
24869 13:56:50.965459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
24870 13:56:50.965862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
24872 13:56:51.001141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass
24874 13:56:51.001476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass>
24875 13:56:51.036804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
24876 13:56:51.037275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
24878 13:56:51.072793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
24879 13:56:51.073252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
24881 13:56:51.108743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
24882 13:56:51.109193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
24884 13:56:51.144696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass>
24885 13:56:51.145138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass
24887 13:56:51.180391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
24888 13:56:51.180847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
24890 13:56:51.216332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
24891 13:56:51.216764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
24893 13:56:51.252339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
24895 13:56:51.252914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
24896 13:56:51.288783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass>
24897 13:56:51.289242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass
24899 13:56:51.324739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
24900 13:56:51.325120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
24902 13:56:51.361508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
24903 13:56:51.361909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
24905 13:56:51.397101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
24906 13:56:51.397492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
24908 13:56:51.432740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass
24910 13:56:51.433174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass>
24911 13:56:51.468557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
24912 13:56:51.468945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
24914 13:56:51.504368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
24915 13:56:51.504769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
24917 13:56:51.540197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
24918 13:56:51.540589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
24920 13:56:51.576496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass
24922 13:56:51.576941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass>
24923 13:56:51.612341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
24924 13:56:51.612792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
24926 13:56:51.648328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
24927 13:56:51.648722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
24929 13:56:51.684049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
24930 13:56:51.684442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
24932 13:56:51.719757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass>
24933 13:56:51.720154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass
24935 13:56:51.755501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
24936 13:56:51.755890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
24938 13:56:51.791766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
24939 13:56:51.792197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
24941 13:56:51.827669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
24942 13:56:51.828113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
24944 13:56:51.863609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass>
24945 13:56:51.864046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass
24947 13:56:51.899679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
24949 13:56:51.900243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
24950 13:56:51.935702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
24951 13:56:51.936157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
24953 13:56:51.972124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
24954 13:56:51.972569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
24956 13:56:52.007748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass>
24957 13:56:52.008193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass
24959 13:56:52.044001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
24961 13:56:52.044666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
24962 13:56:52.080327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
24964 13:56:52.080939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
24965 13:56:52.115866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
24966 13:56:52.116347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
24968 13:56:52.150696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass>
24969 13:56:52.151141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass
24971 13:56:52.186669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
24973 13:56:52.187138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
24974 13:56:52.222221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
24976 13:56:52.222837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
24977 13:56:52.258931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
24978 13:56:52.259392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
24980 13:56:52.296663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass>
24981 13:56:52.297058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass
24983 13:56:52.332278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
24984 13:56:52.332697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
24986 13:56:52.367749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
24987 13:56:52.368201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
24989 13:56:52.402305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
24990 13:56:52.402721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
24992 13:56:52.438297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass
24994 13:56:52.438750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass>
24995 13:56:52.474115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
24996 13:56:52.474588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
24998 13:56:52.509566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
25000 13:56:52.510222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
25001 13:56:52.545107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
25003 13:56:52.545752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
25004 13:56:52.581253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass>
25005 13:56:52.581692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass
25007 13:56:52.616657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
25008 13:56:52.617071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
25010 13:56:52.651849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
25011 13:56:52.652288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
25013 13:56:52.687865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
25014 13:56:52.688281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
25016 13:56:52.724370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass
25018 13:56:52.724930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass>
25019 13:56:52.759900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
25021 13:56:52.760465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
25022 13:56:52.795682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
25023 13:56:52.796138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
25025 13:56:52.831296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
25027 13:56:52.831750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
25028 13:56:52.866631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass>
25029 13:56:52.867052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass
25031 13:56:52.902829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
25032 13:56:52.903335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
25034 13:56:52.939398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
25036 13:56:52.940055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
25037 13:56:52.974710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
25038 13:56:52.975184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
25040 13:56:53.010868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass>
25041 13:56:53.011396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass
25043 13:56:53.046430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
25045 13:56:53.047046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
25046 13:56:53.081929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
25047 13:56:53.082397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
25049 13:56:53.118396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
25051 13:56:53.118993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
25052 13:56:53.153754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass>
25053 13:56:53.154218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass
25055 13:56:53.209216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
25056 13:56:53.209712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
25058 13:56:53.249482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
25059 13:56:53.249980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
25061 13:56:53.285141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
25062 13:56:53.285576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
25064 13:56:53.320655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass>
25065 13:56:53.321116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass
25067 13:56:53.356504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
25068 13:56:53.356965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
25070 13:56:53.391823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
25071 13:56:53.392242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
25073 13:56:53.428189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
25074 13:56:53.428623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
25076 13:56:53.464384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass>
25077 13:56:53.464734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass
25079 13:56:53.500316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
25080 13:56:53.500777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
25082 13:56:53.536517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
25084 13:56:53.537095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
25085 13:56:53.572208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
25086 13:56:53.572669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
25088 13:56:53.608920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass
25090 13:56:53.609401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass>
25091 13:56:53.644583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
25092 13:56:53.645021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
25094 13:56:53.680495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
25095 13:56:53.680945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
25097 13:56:53.716099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
25098 13:56:53.716542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
25100 13:56:53.751887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass>
25101 13:56:53.752326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass
25103 13:56:53.787771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
25104 13:56:53.788203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
25106 13:56:53.823831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
25108 13:56:53.824586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
25109 13:56:53.861462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
25110 13:56:53.861911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
25112 13:56:53.898263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass
25114 13:56:53.898816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass>
25115 13:56:53.934131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
25116 13:56:53.934574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
25118 13:56:53.970240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
25119 13:56:53.970719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
25121 13:56:54.006439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
25122 13:56:54.006861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
25124 13:56:54.042434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass>
25125 13:56:54.042902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass
25127 13:56:54.077930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
25128 13:56:54.078398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
25130 13:56:54.114346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
25131 13:56:54.114829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
25133 13:56:54.150610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
25135 13:56:54.151070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
25136 13:56:54.186797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass
25138 13:56:54.187260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass>
25139 13:56:54.222724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
25141 13:56:54.223184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
25142 13:56:54.258517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
25143 13:56:54.258925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
25145 13:56:54.295841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
25146 13:56:54.296251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
25148 13:56:54.331426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass>
25149 13:56:54.331864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass
25151 13:56:54.367369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
25153 13:56:54.367839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
25154 13:56:54.403654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
25156 13:56:54.404118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
25157 13:56:54.439701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
25158 13:56:54.440173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
25160 13:56:54.475756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass>
25161 13:56:54.476205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass
25163 13:56:54.513972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
25165 13:56:54.514545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
25166 13:56:54.556253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
25168 13:56:54.556815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
25169 13:56:54.609146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
25170 13:56:54.609571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
25172 13:56:54.648686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass
25174 13:56:54.649167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass>
25175 13:56:54.686192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
25177 13:56:54.686657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
25178 13:56:54.722105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
25180 13:56:54.722569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
25181 13:56:54.757046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
25182 13:56:54.757489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
25184 13:56:54.792743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass>
25185 13:56:54.793190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass
25187 13:56:54.829082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
25189 13:56:54.829555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
25190 13:56:54.866020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
25191 13:56:54.866457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
25193 13:56:54.901533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
25195 13:56:54.902004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
25196 13:56:54.936588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass
25198 13:56:54.937050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass>
25199 13:56:54.972647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
25201 13:56:54.973113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
25202 13:56:55.008317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
25204 13:56:55.008786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
25205 13:56:55.044559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
25206 13:56:55.044968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
25208 13:56:55.081714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass>
25209 13:56:55.082114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass
25211 13:56:55.119949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
25212 13:56:55.120413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
25214 13:56:55.156381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
25215 13:56:55.156862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
25217 13:56:55.192629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
25218 13:56:55.193094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
25220 13:56:55.228714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass
25222 13:56:55.229267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass>
25223 13:56:55.265109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
25224 13:56:55.265562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
25226 13:56:55.301862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
25227 13:56:55.302348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
25229 13:56:55.337593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
25231 13:56:55.338201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
25232 13:56:55.372754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass>
25233 13:56:55.373228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass
25235 13:56:55.408707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
25237 13:56:55.409263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
25238 13:56:55.444679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
25239 13:56:55.445129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
25241 13:56:55.481233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
25243 13:56:55.481686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
25244 13:56:55.516759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass
25246 13:56:55.517201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass>
25247 13:56:55.552259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
25248 13:56:55.552695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
25250 13:56:55.587829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
25252 13:56:55.588304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
25253 13:56:55.622735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
25254 13:56:55.623215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
25256 13:56:55.657353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass>
25257 13:56:55.657779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass
25259 13:56:55.692449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
25260 13:56:55.692949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
25262 13:56:55.728382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
25264 13:56:55.729095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
25265 13:56:55.765174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
25267 13:56:55.765754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
25268 13:56:55.802019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass
25270 13:56:55.802574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass>
25271 13:56:55.839212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
25273 13:56:55.839683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
25274 13:56:55.876969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
25275 13:56:55.877356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
25277 13:56:55.916700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
25278 13:56:55.917100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
25280 13:56:55.952785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass>
25281 13:56:55.953188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass
25283 13:56:55.987947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
25285 13:56:55.988377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
25286 13:56:56.023257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
25288 13:56:56.023833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
25289 13:56:56.058618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
25290 13:56:56.059028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
25292 13:56:56.093870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass>
25293 13:56:56.094290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass
25295 13:56:56.129103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
25297 13:56:56.129576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
25298 13:56:56.164259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
25300 13:56:56.164730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
25301 13:56:56.199590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
25302 13:56:56.200015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
25304 13:56:56.235809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass>
25305 13:56:56.236250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass
25307 13:56:56.271333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
25309 13:56:56.271924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
25310 13:56:56.305897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
25311 13:56:56.306318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
25313 13:56:56.341145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
25314 13:56:56.341563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
25316 13:56:56.385616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass>
25317 13:56:56.386050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass
25319 13:56:56.422520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
25321 13:56:56.425803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
25322 13:56:56.458472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
25323 13:56:56.458893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
25325 13:56:56.493843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
25326 13:56:56.494354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
25328 13:56:56.529172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass
25330 13:56:56.529844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass>
25331 13:56:56.564692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
25332 13:56:56.565172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
25334 13:56:56.600936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
25335 13:56:56.601354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
25337 13:56:56.637034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
25338 13:56:56.637503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
25340 13:56:56.672114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass>
25341 13:56:56.672565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass
25343 13:56:56.707637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
25345 13:56:56.708193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
25346 13:56:56.742386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
25348 13:56:56.742993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
25349 13:56:56.777297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
25351 13:56:56.777784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
25352 13:56:56.812525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass>
25353 13:56:56.812955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass
25355 13:56:56.848115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
25357 13:56:56.848599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
25358 13:56:56.883897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
25359 13:56:56.884323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
25361 13:56:56.918682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
25362 13:56:56.919098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
25364 13:56:56.953879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass>
25365 13:56:56.954351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass
25367 13:56:56.988614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
25368 13:56:56.989007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
25370 13:56:57.024238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
25371 13:56:57.024711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
25373 13:56:57.059615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
25375 13:56:57.060080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
25376 13:56:57.094621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass
25378 13:56:57.095092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass>
25379 13:56:57.129631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
25380 13:56:57.130033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
25382 13:56:57.164602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
25383 13:56:57.165019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
25385 13:56:57.199867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
25387 13:56:57.200334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
25388 13:56:57.234154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass>
25389 13:56:57.234593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass
25391 13:56:57.271164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
25393 13:56:57.271843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
25394 13:56:57.307567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
25395 13:56:57.308011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
25397 13:56:57.344094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
25399 13:56:57.344667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
25400 13:56:57.380068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass>
25401 13:56:57.380528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass
25403 13:56:57.414775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
25405 13:56:57.415365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
25406 13:56:57.449683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
25407 13:56:57.450193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
25409 13:56:57.485165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
25411 13:56:57.485663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
25412 13:56:57.520351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass>
25413 13:56:57.520779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass
25415 13:56:57.555759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
25416 13:56:57.556197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
25418 13:56:57.592101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
25419 13:56:57.592517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
25421 13:56:57.627565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
25422 13:56:57.627966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
25424 13:56:57.664314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass
25426 13:56:57.664735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass>
25427 13:56:57.699917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
25428 13:56:57.700386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
25430 13:56:57.736402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
25432 13:56:57.736972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
25433 13:56:57.772851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
25435 13:56:57.773328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
25436 13:56:57.808444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass>
25437 13:56:57.808933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass
25439 13:56:57.844670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
25441 13:56:57.845243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
25442 13:56:57.880718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
25443 13:56:57.881182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
25445 13:56:57.917311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
25447 13:56:57.917783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
25448 13:56:57.953602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass>
25449 13:56:57.954033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass
25451 13:56:57.992313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
25452 13:56:57.992749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
25454 13:56:58.034036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
25456 13:56:58.034685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
25457 13:56:58.072415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
25458 13:56:58.072903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
25460 13:56:58.108639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass
25462 13:56:58.109291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass>
25463 13:56:58.144490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
25464 13:56:58.144940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
25466 13:56:58.180579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
25467 13:56:58.180988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
25469 13:56:58.215842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
25471 13:56:58.216299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
25472 13:56:58.252804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass>
25473 13:56:58.253246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass
25475 13:56:58.289611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
25476 13:56:58.290124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
25478 13:56:58.360157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
25479 13:56:58.360598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
25481 13:56:58.396144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
25482 13:56:58.396604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
25484 13:56:58.432288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass>
25485 13:56:58.432700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass
25487 13:56:58.468788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
25488 13:56:58.469249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
25490 13:56:58.506385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
25491 13:56:58.506853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
25493 13:56:58.543809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
25494 13:56:58.544266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
25496 13:56:58.580163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass>
25497 13:56:58.580598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass
25499 13:56:58.616062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
25500 13:56:58.616481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
25502 13:56:58.652216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
25503 13:56:58.652672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
25505 13:56:58.688313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
25506 13:56:58.688770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
25508 13:56:58.724128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass
25510 13:56:58.724590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass>
25511 13:56:58.760887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
25513 13:56:58.761350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
25514 13:56:58.797805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
25516 13:56:58.798283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
25517 13:56:58.833110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
25518 13:56:58.833597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
25520 13:56:58.868126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass
25522 13:56:58.868848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass>
25523 13:56:58.904154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
25525 13:56:58.904721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
25526 13:56:58.940600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
25528 13:56:58.941158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
25529 13:56:58.977347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
25530 13:56:58.977764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
25532 13:56:59.013023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass>
25533 13:56:59.013459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass
25535 13:56:59.049504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
25536 13:56:59.049960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
25538 13:56:59.085699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
25539 13:56:59.086187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
25541 13:56:59.121607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
25543 13:56:59.122244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
25544 13:56:59.157181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass>
25545 13:56:59.157670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass
25547 13:56:59.192967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
25548 13:56:59.193462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
25550 13:56:59.229104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
25552 13:56:59.229803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
25553 13:56:59.264945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
25555 13:56:59.265536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
25556 13:56:59.301296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass
25558 13:56:59.301779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass>
25559 13:56:59.338068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
25561 13:56:59.338530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
25562 13:56:59.374571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
25564 13:56:59.375134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
25565 13:56:59.410789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
25567 13:56:59.411452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
25568 13:56:59.450252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass>
25569 13:56:59.450700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass
25571 13:56:59.486038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
25572 13:56:59.486528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
25574 13:56:59.521840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
25575 13:56:59.522326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
25577 13:56:59.557464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
25579 13:56:59.558121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
25580 13:56:59.593382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass
25582 13:56:59.594024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass>
25583 13:56:59.632311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
25584 13:56:59.632776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
25586 13:56:59.667867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
25588 13:56:59.668446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
25589 13:56:59.703756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
25591 13:56:59.704366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
25592 13:56:59.740107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass
25594 13:56:59.740566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass>
25595 13:56:59.776053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
25596 13:56:59.776534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
25598 13:56:59.812139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
25600 13:56:59.812773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
25601 13:56:59.848250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
25602 13:56:59.848707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
25604 13:56:59.883902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass>
25605 13:56:59.884380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass
25607 13:56:59.920016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
25608 13:56:59.920477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
25610 13:56:59.956741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
25611 13:56:59.957165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
25613 13:56:59.992795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
25614 13:56:59.993223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
25616 13:57:00.028677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass
25618 13:57:00.029151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass>
25619 13:57:00.064809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
25620 13:57:00.065259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
25622 13:57:00.101855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
25624 13:57:00.102476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
25625 13:57:00.141922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
25627 13:57:00.142516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
25628 13:57:00.179169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass
25630 13:57:00.179810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass>
25631 13:57:00.216207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
25632 13:57:00.216645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
25634 13:57:00.253166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
25635 13:57:00.253618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
25637 13:57:00.290135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
25639 13:57:00.290596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
25640 13:57:00.325883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass>
25641 13:57:00.326382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass
25643 13:57:00.365311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
25644 13:57:00.365740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
25646 13:57:00.410827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
25647 13:57:00.411260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
25649 13:57:00.462098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
25651 13:57:00.462584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
25652 13:57:00.500619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass>
25653 13:57:00.501069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass
25655 13:57:00.538620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
25657 13:57:00.539098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
25658 13:57:00.575251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
25660 13:57:00.575823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
25661 13:57:00.610642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
25662 13:57:00.611154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
25664 13:57:00.646030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass>
25665 13:57:00.646523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass
25667 13:57:00.680724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
25668 13:57:00.681191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
25670 13:57:00.715961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
25671 13:57:00.716421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
25673 13:57:00.751682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
25675 13:57:00.752144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
25676 13:57:00.789457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass>
25677 13:57:00.789907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass
25679 13:57:00.827339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
25681 13:57:00.827940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
25682 13:57:00.866407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
25683 13:57:00.866875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
25685 13:57:00.904674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
25686 13:57:00.905091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
25688 13:57:00.941577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass>
25689 13:57:00.942037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass
25691 13:57:00.977502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
25692 13:57:00.977899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
25694 13:57:01.013304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
25696 13:57:01.013758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
25697 13:57:01.049404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
25699 13:57:01.049792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
25700 13:57:01.085558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass
25702 13:57:01.085976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass>
25703 13:57:01.121211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
25705 13:57:01.121632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
25706 13:57:01.156956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
25707 13:57:01.157435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
25709 13:57:01.193174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
25711 13:57:01.193778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
25712 13:57:01.230722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass>
25713 13:57:01.231174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass
25715 13:57:01.266746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
25717 13:57:01.267223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
25718 13:57:01.302812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
25720 13:57:01.303406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
25721 13:57:01.339732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
25722 13:57:01.340185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
25724 13:57:01.375704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass
25726 13:57:01.376265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass>
25727 13:57:01.411193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
25729 13:57:01.411647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
25730 13:57:01.447150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
25732 13:57:01.447611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
25733 13:57:01.483644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
25734 13:57:01.484061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
25736 13:57:01.519135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass
25738 13:57:01.519601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass>
25739 13:57:01.556016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
25740 13:57:01.556456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
25742 13:57:01.592652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
25743 13:57:01.593070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
25745 13:57:01.629720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
25746 13:57:01.630163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
25748 13:57:01.665373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass>
25749 13:57:01.665809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass
25751 13:57:01.701360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
25752 13:57:01.701799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
25754 13:57:01.737250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
25755 13:57:01.737680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
25757 13:57:01.773358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
25759 13:57:01.773834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
25760 13:57:01.809889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass
25762 13:57:01.810347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass>
25763 13:57:01.846519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
25764 13:57:01.846946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
25766 13:57:01.883180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
25768 13:57:01.883644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
25769 13:57:01.918528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
25770 13:57:01.918936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
25772 13:57:01.956082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass>
25773 13:57:01.956492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass
25775 13:57:01.990822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
25776 13:57:01.991285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
25778 13:57:02.026734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
25779 13:57:02.027244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
25781 13:57:02.061996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
25782 13:57:02.062455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
25784 13:57:02.097795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass>
25785 13:57:02.098289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass
25787 13:57:02.133176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
25789 13:57:02.133668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
25790 13:57:02.168718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
25791 13:57:02.169230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
25793 13:57:02.204917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
25795 13:57:02.205502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
25796 13:57:02.240815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass
25798 13:57:02.241369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass>
25799 13:57:02.276865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
25801 13:57:02.277509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
25802 13:57:02.314095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
25804 13:57:02.314693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
25805 13:57:02.350784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
25806 13:57:02.351251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
25808 13:57:02.387296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass
25810 13:57:02.387750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass>
25811 13:57:02.422968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
25812 13:57:02.423431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
25814 13:57:02.456657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
25815 13:57:02.457073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
25817 13:57:02.492689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
25818 13:57:02.493073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
25820 13:57:02.525032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass
25822 13:57:02.525602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass>
25823 13:57:02.557717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
25824 13:57:02.558086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
25826 13:57:02.589997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
25828 13:57:02.590436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
25829 13:57:02.623222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
25831 13:57:02.623606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
25832 13:57:02.657067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass>
25833 13:57:02.657544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass
25835 13:57:02.690052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
25836 13:57:02.690490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
25838 13:57:02.723637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
25839 13:57:02.724104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
25841 13:57:02.756936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
25842 13:57:02.757480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
25844 13:57:02.790618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass>
25845 13:57:02.791007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass
25847 13:57:02.823308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
25849 13:57:02.823877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
25850 13:57:02.855622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
25851 13:57:02.856071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
25853 13:57:02.887891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
25855 13:57:02.888442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
25856 13:57:02.921053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass
25858 13:57:02.921502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass>
25859 13:57:02.953931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
25860 13:57:02.954313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
25862 13:57:02.986923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
25864 13:57:02.987387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
25865 13:57:03.022501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
25867 13:57:03.022919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
25868 13:57:03.070865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass>
25869 13:57:03.071331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass
25871 13:57:03.104070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
25872 13:57:03.104414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
25874 13:57:03.135907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
25875 13:57:03.136337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
25877 13:57:03.168136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
25878 13:57:03.168572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
25880 13:57:03.200791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass>
25881 13:57:03.201228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass
25883 13:57:03.233028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
25884 13:57:03.233470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
25886 13:57:03.265163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
25887 13:57:03.265620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
25889 13:57:03.299355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
25891 13:57:03.299897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
25892 13:57:03.331339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass
25894 13:57:03.331877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass>
25895 13:57:03.362938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
25896 13:57:03.363383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
25898 13:57:03.396544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
25899 13:57:03.397012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
25901 13:57:03.444575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
25902 13:57:03.445028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
25904 13:57:03.489958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass>
25905 13:57:03.490437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass
25907 13:57:03.521691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
25908 13:57:03.522093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
25910 13:57:03.553561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
25911 13:57:03.554047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
25913 13:57:03.585843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
25914 13:57:03.586299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
25916 13:57:03.617360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass>
25917 13:57:03.617808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass
25919 13:57:03.650365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
25920 13:57:03.650785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
25922 13:57:03.682142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
25923 13:57:03.682563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
25925 13:57:03.715120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
25927 13:57:03.715596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
25928 13:57:03.747872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass
25930 13:57:03.748343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass>
25931 13:57:03.780185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
25933 13:57:03.780652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
25934 13:57:03.812772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
25935 13:57:03.813215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
25937 13:57:03.844753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
25939 13:57:03.845324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
25940 13:57:03.876372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass
25942 13:57:03.876827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass>
25943 13:57:03.908646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
25945 13:57:03.909202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
25946 13:57:03.940725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
25948 13:57:03.941364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
25949 13:57:03.974661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
25950 13:57:03.975148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
25952 13:57:04.009183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass>
25953 13:57:04.009667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass
25955 13:57:04.045242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
25957 13:57:04.045714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
25958 13:57:04.080169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
25960 13:57:04.080633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
25961 13:57:04.117715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
25962 13:57:04.118116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
25964 13:57:04.151496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass>
25965 13:57:04.151837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass
25967 13:57:04.183175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
25969 13:57:04.183614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
25970 13:57:04.214658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
25971 13:57:04.215066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
25973 13:57:04.245978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
25974 13:57:04.246428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
25976 13:57:04.277230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass
25978 13:57:04.277821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass>
25979 13:57:04.308356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
25981 13:57:04.309070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
25982 13:57:04.339567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
25983 13:57:04.340020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
25985 13:57:04.371983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
25986 13:57:04.372437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
25988 13:57:04.402637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass>
25989 13:57:04.403036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass
25991 13:57:04.433616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
25993 13:57:04.434248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
25994 13:57:04.465658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
25995 13:57:04.466107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
25997 13:57:04.497111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
25998 13:57:04.497545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
26000 13:57:04.528244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass>
26001 13:57:04.528688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass
26003 13:57:04.559883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
26004 13:57:04.560340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
26006 13:57:04.591590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
26007 13:57:04.592025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
26009 13:57:04.623860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
26010 13:57:04.624312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
26012 13:57:04.654865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass>
26013 13:57:04.655280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass
26015 13:57:04.686472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
26017 13:57:04.686921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
26018 13:57:04.718197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
26019 13:57:04.718601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
26021 13:57:04.751495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
26023 13:57:04.751941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
26024 13:57:04.782917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass
26026 13:57:04.783501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass>
26027 13:57:04.814670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
26028 13:57:04.815135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
26030 13:57:04.846468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
26032 13:57:04.847007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
26033 13:57:04.877741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
26034 13:57:04.878220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
26036 13:57:04.908878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass>
26037 13:57:04.909331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass
26039 13:57:04.940973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
26040 13:57:04.941358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
26042 13:57:04.973362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
26043 13:57:04.973822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
26045 13:57:05.004776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
26047 13:57:05.005320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
26048 13:57:05.036658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass>
26049 13:57:05.037110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass
26051 13:57:05.067795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
26052 13:57:05.068268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
26054 13:57:05.098828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
26055 13:57:05.099194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
26057 13:57:05.132044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
26058 13:57:05.132506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
26060 13:57:05.163442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass>
26061 13:57:05.163897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass
26063 13:57:05.195357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
26065 13:57:05.195959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
26066 13:57:05.227689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
26067 13:57:05.228077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
26069 13:57:05.259573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
26070 13:57:05.260010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
26072 13:57:05.292349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass>
26073 13:57:05.292798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass
26075 13:57:05.324205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
26076 13:57:05.324695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
26078 13:57:05.356024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
26079 13:57:05.356486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
26081 13:57:05.387260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
26083 13:57:05.387798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
26084 13:57:05.418247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass
26086 13:57:05.418777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass>
26087 13:57:05.449813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
26088 13:57:05.450258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
26090 13:57:05.482660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
26091 13:57:05.483112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
26093 13:57:05.514719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
26094 13:57:05.515172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
26096 13:57:05.546112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass>
26097 13:57:05.546553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass
26099 13:57:05.578089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
26100 13:57:05.578542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
26102 13:57:05.610857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
26103 13:57:05.611308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
26105 13:57:05.643884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
26107 13:57:05.644415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
26108 13:57:05.674913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass
26110 13:57:05.675433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass>
26111 13:57:05.706547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
26112 13:57:05.706998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
26114 13:57:05.737893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
26115 13:57:05.738295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
26117 13:57:05.769895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
26118 13:57:05.770300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
26120 13:57:05.803730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass>
26121 13:57:05.804138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass
26123 13:57:05.835897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
26124 13:57:05.836304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
26126 13:57:05.868338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
26127 13:57:05.868770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
26129 13:57:05.901194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
26130 13:57:05.901617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
26132 13:57:05.936181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass>
26133 13:57:05.936829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass
26135 13:57:05.970983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
26137 13:57:05.971614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
26138 13:57:06.003224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
26140 13:57:06.003805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
26141 13:57:06.034865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
26142 13:57:06.035309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
26144 13:57:06.067653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass
26146 13:57:06.068230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass>
26147 13:57:06.099117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
26149 13:57:06.099688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
26150 13:57:06.131750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
26152 13:57:06.132300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
26153 13:57:06.162864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
26155 13:57:06.163475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
26156 13:57:06.194537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass
26158 13:57:06.194997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass>
26159 13:57:06.227585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
26160 13:57:06.228018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
26162 13:57:06.260504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
26163 13:57:06.260937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
26165 13:57:06.294114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
26167 13:57:06.294531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
26168 13:57:06.326534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass>
26169 13:57:06.326965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass
26171 13:57:06.358383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
26172 13:57:06.358815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
26174 13:57:06.390196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
26175 13:57:06.390595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
26177 13:57:06.421688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
26178 13:57:06.422107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
26180 13:57:06.453508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass>
26181 13:57:06.453900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass
26183 13:57:06.486865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
26185 13:57:06.487315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
26186 13:57:06.519876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
26187 13:57:06.520277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
26189 13:57:06.552256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
26191 13:57:06.552708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
26192 13:57:06.584737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass>
26193 13:57:06.585161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass
26195 13:57:06.616581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
26196 13:57:06.617061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
26198 13:57:06.649196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
26199 13:57:06.649713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
26201 13:57:06.683632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
26202 13:57:06.684173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
26204 13:57:06.715700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass
26206 13:57:06.716268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass>
26207 13:57:06.747457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
26208 13:57:06.747930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
26210 13:57:06.779475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
26211 13:57:06.779882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
26213 13:57:06.811271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
26215 13:57:06.811697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
26216 13:57:06.842844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass>
26217 13:57:06.843243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass
26219 13:57:06.874857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
26220 13:57:06.875259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
26222 13:57:06.907192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
26224 13:57:06.907759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
26225 13:57:06.950735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
26226 13:57:06.951198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
26228 13:57:06.983214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass
26230 13:57:06.983799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass>
26231 13:57:07.015836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
26232 13:57:07.016288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
26234 13:57:07.049134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
26236 13:57:07.049603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
26237 13:57:07.081716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
26239 13:57:07.082184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
26240 13:57:07.115794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass>
26241 13:57:07.116279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass
26243 13:57:07.148866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
26244 13:57:07.149356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
26246 13:57:07.182762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
26247 13:57:07.183251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
26249 13:57:07.217047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
26250 13:57:07.217451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
26252 13:57:07.252246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass>
26253 13:57:07.252675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass
26255 13:57:07.286449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
26256 13:57:07.286890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
26258 13:57:07.319967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
26259 13:57:07.320427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
26261 13:57:07.353488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
26263 13:57:07.353956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
26264 13:57:07.386296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass
26266 13:57:07.386661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass>
26267 13:57:07.418634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
26268 13:57:07.419056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
26270 13:57:07.451734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
26271 13:57:07.452213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
26273 13:57:07.483936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
26275 13:57:07.484484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
26276 13:57:07.516019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass
26278 13:57:07.516573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass>
26279 13:57:07.547572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
26280 13:57:07.548028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
26282 13:57:07.580117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
26283 13:57:07.580559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
26285 13:57:07.612000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
26286 13:57:07.612441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
26288 13:57:07.644246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass
26290 13:57:07.644714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass>
26291 13:57:07.675873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
26293 13:57:07.676333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
26294 13:57:07.708237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
26296 13:57:07.708699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
26297 13:57:07.740870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
26299 13:57:07.741332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
26300 13:57:07.772358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass
26302 13:57:07.772909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass>
26303 13:57:07.804257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
26305 13:57:07.804833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
26306 13:57:07.836122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
26307 13:57:07.836587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
26309 13:57:07.867934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
26311 13:57:07.868566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
26312 13:57:07.899483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass>
26313 13:57:07.899962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass
26315 13:57:07.932951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
26316 13:57:07.933444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
26318 13:57:07.965358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
26319 13:57:07.965914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
26321 13:57:07.997246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
26323 13:57:07.997853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
26324 13:57:08.029792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass>
26325 13:57:08.030217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass
26327 13:57:08.062350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
26328 13:57:08.062764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
26330 13:57:08.095155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
26332 13:57:08.095618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
26333 13:57:08.128997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
26334 13:57:08.129406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
26336 13:57:08.163689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass
26338 13:57:08.164132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass>
26339 13:57:08.198770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
26341 13:57:08.199223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
26342 13:57:08.232351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
26343 13:57:08.232763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
26345 13:57:08.266410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
26346 13:57:08.266810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
26348 13:57:08.301078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass
26350 13:57:08.301679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass>
26351 13:57:08.334507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
26353 13:57:08.335108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
26354 13:57:08.368637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
26355 13:57:08.369105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
26357 13:57:08.401828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
26359 13:57:08.402393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
26360 13:57:08.435914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass
26362 13:57:08.436399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass>
26363 13:57:08.468817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
26365 13:57:08.469289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
26366 13:57:08.501843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
26367 13:57:08.502255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
26369 13:57:08.535837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
26370 13:57:08.536268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
26372 13:57:08.588866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass
26374 13:57:08.589518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass>
26375 13:57:08.622758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
26376 13:57:08.623227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
26378 13:57:08.658195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
26379 13:57:08.658618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
26381 13:57:08.690935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
26382 13:57:08.691413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
26384 13:57:08.723954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass>
26385 13:57:08.724423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass
26387 13:57:08.756348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
26389 13:57:08.756911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
26390 13:57:08.788421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
26391 13:57:08.788872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
26393 13:57:08.821023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
26395 13:57:08.821573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
26396 13:57:08.852994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass>
26397 13:57:08.853458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass
26399 13:57:08.885518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
26401 13:57:08.885991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
26402 13:57:08.918766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
26403 13:57:08.919238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
26405 13:57:08.952645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
26407 13:57:08.953196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
26408 13:57:08.986542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass
26410 13:57:08.987133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass>
26411 13:57:09.021050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
26413 13:57:09.021624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
26414 13:57:09.055699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
26416 13:57:09.056250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
26417 13:57:09.089953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
26418 13:57:09.090426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
26420 13:57:09.123816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass>
26421 13:57:09.124325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass
26423 13:57:09.156125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
26424 13:57:09.156606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
26426 13:57:09.188553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
26428 13:57:09.189173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
26429 13:57:09.223941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
26431 13:57:09.224617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
26432 13:57:09.258271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass
26434 13:57:09.258985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass>
26435 13:57:09.292049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
26436 13:57:09.292440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
26438 13:57:09.325152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
26439 13:57:09.325541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
26441 13:57:09.359205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
26443 13:57:09.359643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
26444 13:57:09.393322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass>
26445 13:57:09.393758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass
26447 13:57:09.428202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
26448 13:57:09.428681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
26450 13:57:09.462517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
26451 13:57:09.462999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
26453 13:57:09.497267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
26455 13:57:09.497847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
26456 13:57:09.532645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass
26458 13:57:09.533200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass>
26459 13:57:09.566471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
26460 13:57:09.566953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
26462 13:57:09.601281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
26463 13:57:09.601682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
26465 13:57:09.636108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
26467 13:57:09.636667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
26468 13:57:09.670421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass
26470 13:57:09.671060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass>
26471 13:57:09.704746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
26473 13:57:09.705374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
26474 13:57:09.740144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
26475 13:57:09.740617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
26477 13:57:09.773317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
26478 13:57:09.773783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
26480 13:57:09.808281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass
26482 13:57:09.808848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass>
26483 13:57:09.841696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
26484 13:57:09.842197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
26486 13:57:09.874501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
26487 13:57:09.874916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
26489 13:57:09.908038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
26490 13:57:09.908490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
26492 13:57:09.940180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass>
26493 13:57:09.940652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass
26495 13:57:09.972631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
26496 13:57:09.973076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
26498 13:57:10.005021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
26499 13:57:10.005424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
26501 13:57:10.037319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
26502 13:57:10.037770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
26504 13:57:10.069686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass>
26505 13:57:10.070170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass
26507 13:57:10.101828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
26508 13:57:10.102293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
26510 13:57:10.134324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
26512 13:57:10.134938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
26513 13:57:10.167204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
26515 13:57:10.167816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
26516 13:57:10.201904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass
26518 13:57:10.202527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass>
26519 13:57:10.235666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
26521 13:57:10.236282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
26522 13:57:10.268721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
26523 13:57:10.269212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
26525 13:57:10.303750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
26526 13:57:10.304221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
26528 13:57:10.337556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass
26530 13:57:10.338191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass>
26531 13:57:10.370934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
26533 13:57:10.371611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
26534 13:57:10.404358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
26536 13:57:10.404985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
26537 13:57:10.437452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
26539 13:57:10.437937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
26540 13:57:10.470767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass
26542 13:57:10.471409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass>
26543 13:57:10.504407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
26544 13:57:10.504881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
26546 13:57:10.538568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
26547 13:57:10.539040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
26549 13:57:10.572073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
26551 13:57:10.572617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
26552 13:57:10.605723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass>
26553 13:57:10.606178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass
26555 13:57:10.639561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
26556 13:57:10.640019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
26558 13:57:10.673028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
26559 13:57:10.673486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
26561 13:57:10.706574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
26562 13:57:10.707030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
26564 13:57:10.740490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass>
26565 13:57:10.740952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass
26567 13:57:10.774618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
26568 13:57:10.775099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
26570 13:57:10.810248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
26571 13:57:10.810665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
26573 13:57:10.846353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
26574 13:57:10.846913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
26576 13:57:10.883339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass
26578 13:57:10.884138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass>
26579 13:57:10.920804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
26580 13:57:10.921255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
26582 13:57:10.958535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
26583 13:57:10.958911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
26585 13:57:10.994177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
26586 13:57:10.994550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
26588 13:57:11.027828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass>
26589 13:57:11.028339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass
26591 13:57:11.061050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
26592 13:57:11.061535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
26594 13:57:11.096515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
26595 13:57:11.096929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
26597 13:57:11.131573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
26598 13:57:11.131969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
26600 13:57:11.165842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass
26602 13:57:11.166402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass>
26603 13:57:11.199994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
26604 13:57:11.200462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
26606 13:57:11.234443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
26608 13:57:11.235090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
26609 13:57:11.268537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
26610 13:57:11.268948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
26612 13:57:11.302572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass
26614 13:57:11.303038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass>
26615 13:57:11.336314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
26616 13:57:11.336796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
26618 13:57:11.370311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
26619 13:57:11.370764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
26621 13:57:11.406609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
26622 13:57:11.407030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
26624 13:57:11.441086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass>
26625 13:57:11.441500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass
26627 13:57:11.474595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
26628 13:57:11.475035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
26630 13:57:11.508405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
26631 13:57:11.508868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
26633 13:57:11.541738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
26634 13:57:11.542198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
26636 13:57:11.575755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass>
26637 13:57:11.576179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass
26639 13:57:11.609027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
26640 13:57:11.609416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
26642 13:57:11.645118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
26643 13:57:11.645563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
26645 13:57:11.680416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
26647 13:57:11.681023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
26648 13:57:11.713787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass>
26649 13:57:11.714271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass
26651 13:57:11.747474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
26652 13:57:11.747949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
26654 13:57:11.782079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
26656 13:57:11.782548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
26657 13:57:11.815599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
26658 13:57:11.816084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
26660 13:57:11.849270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass>
26661 13:57:11.849693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass
26663 13:57:11.885265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
26665 13:57:11.885747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
26666 13:57:11.920428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
26668 13:57:11.921076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
26669 13:57:11.957596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
26671 13:57:11.958072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
26672 13:57:11.992568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass
26674 13:57:11.993028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass>
26675 13:57:12.030496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
26676 13:57:12.030917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
26678 13:57:12.067760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
26679 13:57:12.068239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
26681 13:57:12.102047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
26682 13:57:12.102468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
26684 13:57:12.136026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass>
26685 13:57:12.136442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass
26687 13:57:12.169709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
26688 13:57:12.170109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
26690 13:57:12.203698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
26691 13:57:12.204117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
26693 13:57:12.237450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
26694 13:57:12.237928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
26696 13:57:12.271276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass
26698 13:57:12.271848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass>
26699 13:57:12.307175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
26701 13:57:12.307619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
26702 13:57:12.342540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
26703 13:57:12.342998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
26705 13:57:12.376396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
26707 13:57:12.376963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
26708 13:57:12.409442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass>
26709 13:57:12.409934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass
26711 13:57:12.442635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
26713 13:57:12.443193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
26714 13:57:12.475926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
26715 13:57:12.476380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
26717 13:57:12.509069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
26718 13:57:12.509527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
26720 13:57:12.542965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass
26722 13:57:12.543605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass>
26723 13:57:12.576829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
26725 13:57:12.577457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
26726 13:57:12.610689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
26727 13:57:12.611172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
26729 13:57:12.645485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
26730 13:57:12.645883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
26732 13:57:12.679903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass
26734 13:57:12.680328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass>
26735 13:57:12.713765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
26737 13:57:12.714196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
26738 13:57:12.748109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
26740 13:57:12.748547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
26741 13:57:12.782048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
26742 13:57:12.782452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
26744 13:57:12.817038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass>
26745 13:57:12.817472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass
26747 13:57:12.851673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
26749 13:57:12.852138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
26750 13:57:12.886138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
26751 13:57:12.886600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
26753 13:57:12.919889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
26754 13:57:12.920373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
26756 13:57:12.957020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass
26758 13:57:12.957499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass>
26759 13:57:12.993201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
26760 13:57:12.993678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
26762 13:57:13.033462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
26764 13:57:13.034031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
26765 13:57:13.072511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
26766 13:57:13.072978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
26768 13:57:13.107676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass>
26769 13:57:13.108151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass
26771 13:57:13.142536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
26772 13:57:13.143010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
26774 13:57:13.177605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
26775 13:57:13.178114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
26777 13:57:13.214159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
26778 13:57:13.214613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
26780 13:57:13.249759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass>
26781 13:57:13.250092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass
26783 13:57:13.284491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
26785 13:57:13.284913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
26786 13:57:13.319157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
26788 13:57:13.319570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
26789 13:57:13.353513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
26790 13:57:13.353996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
26792 13:57:13.388426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass>
26793 13:57:13.388875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass
26795 13:57:13.423911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
26797 13:57:13.424386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
26798 13:57:13.460448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
26799 13:57:13.460971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
26801 13:57:13.506295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
26802 13:57:13.506762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
26804 13:57:13.542109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass
26806 13:57:13.542556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass>
26807 13:57:13.576920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
26808 13:57:13.577390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
26810 13:57:13.612581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
26811 13:57:13.613032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
26813 13:57:13.648597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
26815 13:57:13.649139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
26816 13:57:13.708337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass
26818 13:57:13.708904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass>
26819 13:57:13.743470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
26820 13:57:13.743885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
26822 13:57:13.778148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
26823 13:57:13.778584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
26825 13:57:13.814110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
26827 13:57:13.814580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
26828 13:57:13.849812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass
26830 13:57:13.850277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass>
26831 13:57:13.884904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
26832 13:57:13.885370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
26834 13:57:13.920108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
26835 13:57:13.920525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
26837 13:57:13.955232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
26839 13:57:13.955688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
26840 13:57:13.990133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass>
26841 13:57:13.990540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass
26843 13:57:14.025343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
26845 13:57:14.025804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
26846 13:57:14.060585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
26848 13:57:14.061032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
26849 13:57:14.096514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
26850 13:57:14.096972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
26852 13:57:14.131663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass>
26853 13:57:14.132122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass
26855 13:57:14.166535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
26856 13:57:14.166963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
26858 13:57:14.202716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
26860 13:57:14.203298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
26861 13:57:14.237997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
26862 13:57:14.238373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
26864 13:57:14.272620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass
26866 13:57:14.273079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass>
26867 13:57:14.307535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
26868 13:57:14.307893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
26870 13:57:14.342321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
26871 13:57:14.342698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
26873 13:57:14.378760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
26874 13:57:14.379152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
26876 13:57:14.413710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass>
26877 13:57:14.414069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass
26879 13:57:14.448642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
26881 13:57:14.449233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
26882 13:57:14.483794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
26883 13:57:14.484253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
26885 13:57:14.518363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
26887 13:57:14.518919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
26888 13:57:14.552970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass
26890 13:57:14.553538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass>
26891 13:57:14.587870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
26892 13:57:14.588331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
26894 13:57:14.622761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
26895 13:57:14.623191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
26897 13:57:14.658071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
26898 13:57:14.658507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
26900 13:57:14.692832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass>
26901 13:57:14.693199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass
26903 13:57:14.728204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
26905 13:57:14.728766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
26906 13:57:14.764143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
26907 13:57:14.764461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
26909 13:57:14.799166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
26911 13:57:14.799508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
26912 13:57:14.834686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass>
26913 13:57:14.834992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass
26915 13:57:14.870119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
26916 13:57:14.870445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
26918 13:57:14.904949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
26919 13:57:14.905278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
26921 13:57:14.940162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
26922 13:57:14.940525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
26924 13:57:14.974624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass>
26925 13:57:14.975211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass
26927 13:57:15.007845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
26928 13:57:15.008309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
26930 13:57:15.040131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
26931 13:57:15.040601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
26933 13:57:15.072546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
26934 13:57:15.072964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
26936 13:57:15.105459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass
26938 13:57:15.106104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass>
26939 13:57:15.137537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
26940 13:57:15.138017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
26942 13:57:15.170524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
26944 13:57:15.171072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
26945 13:57:15.202743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
26946 13:57:15.203223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
26948 13:57:15.235848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass
26950 13:57:15.236387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass>
26951 13:57:15.268421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
26952 13:57:15.268869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
26954 13:57:15.304362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
26955 13:57:15.304878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
26957 13:57:15.336890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
26958 13:57:15.337353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
26960 13:57:15.368462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass>
26961 13:57:15.368939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass
26963 13:57:15.400716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
26965 13:57:15.401254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
26966 13:57:15.432818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
26967 13:57:15.433263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
26969 13:57:15.465408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
26970 13:57:15.465852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
26972 13:57:15.501855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass
26974 13:57:15.502430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass>
26975 13:57:15.533634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
26976 13:57:15.534143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
26978 13:57:15.565356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
26980 13:57:15.565938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
26981 13:57:15.596684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
26982 13:57:15.597146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
26984 13:57:15.628007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass>
26985 13:57:15.628460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass
26987 13:57:15.659573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
26988 13:57:15.659985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
26990 13:57:15.691854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
26991 13:57:15.692279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
26993 13:57:15.723089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
26995 13:57:15.723563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
26996 13:57:15.754426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass>
26997 13:57:15.754848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass
26999 13:57:15.785822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
27000 13:57:15.786309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
27002 13:57:15.818543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
27003 13:57:15.819090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
27005 13:57:15.849889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
27006 13:57:15.850445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
27008 13:57:15.881751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass
27010 13:57:15.882377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass>
27011 13:57:15.914325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
27013 13:57:15.914889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
27014 13:57:15.946787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
27015 13:57:15.947262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
27017 13:57:15.979630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
27018 13:57:15.980089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
27020 13:57:16.012295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass>
27021 13:57:16.012812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass
27023 13:57:16.043749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
27024 13:57:16.044152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
27026 13:57:16.075214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
27028 13:57:16.075791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
27029 13:57:16.108366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
27030 13:57:16.108829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
27032 13:57:16.140445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass>
27033 13:57:16.140907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass
27035 13:57:16.172221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
27036 13:57:16.172684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
27038 13:57:16.204457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
27039 13:57:16.204922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
27041 13:57:16.236258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
27042 13:57:16.236718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
27044 13:57:16.268418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass>
27045 13:57:16.268873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass
27047 13:57:16.301005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
27049 13:57:16.301674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
27050 13:57:16.334647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
27051 13:57:16.335128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
27053 13:57:16.366602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
27054 13:57:16.367059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
27056 13:57:16.399253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass
27058 13:57:16.399857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass>
27059 13:57:16.433606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
27060 13:57:16.434158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
27062 13:57:16.467408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
27064 13:57:16.467989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
27065 13:57:16.501111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
27067 13:57:16.501554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
27068 13:57:16.533801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass>
27069 13:57:16.534271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass
27071 13:57:16.565899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
27072 13:57:16.566370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
27074 13:57:16.599229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
27076 13:57:16.599779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
27077 13:57:16.634886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
27079 13:57:16.635415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
27080 13:57:16.666784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass>
27081 13:57:16.667244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass
27083 13:57:16.697795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
27085 13:57:16.698335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
27086 13:57:16.728359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
27087 13:57:16.728846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
27089 13:57:16.760236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
27091 13:57:16.760797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
27092 13:57:16.791207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass
27094 13:57:16.791806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass>
27095 13:57:16.824209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
27096 13:57:16.824650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
27098 13:57:16.859035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
27100 13:57:16.859623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
27101 13:57:16.894252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
27102 13:57:16.894716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
27104 13:57:16.926334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass
27106 13:57:16.926876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass>
27107 13:57:16.958334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
27109 13:57:16.958874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
27110 13:57:16.992631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
27111 13:57:16.993117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
27113 13:57:17.026423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
27114 13:57:17.026894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
27116 13:57:17.060927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass
27118 13:57:17.061490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass>
27119 13:57:17.095318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
27121 13:57:17.095859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
27122 13:57:17.129541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
27123 13:57:17.130029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
27125 13:57:17.164254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
27126 13:57:17.164713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
27128 13:57:17.199282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass
27130 13:57:17.199838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass>
27131 13:57:17.233393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
27133 13:57:17.233957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
27134 13:57:17.268038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
27135 13:57:17.268463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
27137 13:57:17.303247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
27139 13:57:17.303711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
27140 13:57:17.337711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass
27142 13:57:17.338164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass>
27143 13:57:17.372280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
27144 13:57:17.372716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
27146 13:57:17.406235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
27147 13:57:17.406706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
27149 13:57:17.440765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
27151 13:57:17.441394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
27152 13:57:17.474896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass
27154 13:57:17.475514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass>
27155 13:57:17.506576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
27157 13:57:17.507200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
27158 13:57:17.538216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
27160 13:57:17.538757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
27161 13:57:17.569823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
27162 13:57:17.570269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
27164 13:57:17.601720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass
27166 13:57:17.602291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass>
27167 13:57:17.633378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
27169 13:57:17.634036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
27170 13:57:17.665059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
27171 13:57:17.665516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
27173 13:57:17.698090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
27174 13:57:17.698567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
27176 13:57:17.729780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass>
27177 13:57:17.730280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass
27179 13:57:17.761294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
27181 13:57:17.761928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
27182 13:57:17.794444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
27184 13:57:17.795008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
27185 13:57:17.826597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
27187 13:57:17.827152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
27188 13:57:17.858162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass>
27189 13:57:17.858609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass
27191 13:57:17.891251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
27193 13:57:17.891995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
27194 13:57:17.924515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
27195 13:57:17.925057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
27197 13:57:17.956717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
27198 13:57:17.957238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
27200 13:57:17.989748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass>
27201 13:57:17.990235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass
27203 13:57:18.021671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
27205 13:57:18.022129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
27206 13:57:18.054164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
27207 13:57:18.054558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
27209 13:57:18.087873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
27211 13:57:18.088427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
27212 13:57:18.120050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass>
27213 13:57:18.120539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass
27215 13:57:18.152815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
27217 13:57:18.153387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
27218 13:57:18.185712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
27219 13:57:18.186107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
27221 13:57:18.220124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
27222 13:57:18.220566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
27224 13:57:18.254478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass>
27225 13:57:18.254958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass
27227 13:57:18.289506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
27228 13:57:18.290003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
27230 13:57:18.324822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
27232 13:57:18.325269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
27233 13:57:18.360283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
27234 13:57:18.360665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
27236 13:57:18.395206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass
27238 13:57:18.395673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass>
27239 13:57:18.429401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
27240 13:57:18.429892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
27242 13:57:18.464754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
27244 13:57:18.465302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
27245 13:57:18.499522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
27247 13:57:18.500157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
27248 13:57:18.534341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass
27250 13:57:18.535045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass>
27251 13:57:18.568734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
27253 13:57:18.569512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
27254 13:57:18.604000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
27255 13:57:18.604440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
27257 13:57:18.639432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
27258 13:57:18.639873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
27260 13:57:18.672441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass
27262 13:57:18.672986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass>
27263 13:57:18.705130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
27264 13:57:18.705602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
27266 13:57:18.737192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
27268 13:57:18.737821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
27269 13:57:18.768407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
27270 13:57:18.768863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
27272 13:57:18.823334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass>
27273 13:57:18.823822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass
27275 13:57:18.854786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
27277 13:57:18.855333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
27278 13:57:18.885708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
27280 13:57:18.886334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
27281 13:57:18.917381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
27282 13:57:18.917843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
27284 13:57:18.948899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass>
27285 13:57:18.949356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass
27287 13:57:18.980913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
27289 13:57:18.981464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
27290 13:57:19.012485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
27291 13:57:19.012930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
27293 13:57:19.043878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
27294 13:57:19.044335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
27296 13:57:19.075818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass>
27297 13:57:19.076232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass
27299 13:57:19.107657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
27300 13:57:19.108075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
27302 13:57:19.139133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
27304 13:57:19.139592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
27305 13:57:19.170891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
27307 13:57:19.171434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
27308 13:57:19.202494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass>
27309 13:57:19.202962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass
27311 13:57:19.233507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
27312 13:57:19.233943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
27314 13:57:19.265497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
27315 13:57:19.265983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
27317 13:57:19.296732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
27318 13:57:19.297285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
27320 13:57:19.332008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass
27322 13:57:19.332569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass>
27323 13:57:19.364844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
27324 13:57:19.365282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
27326 13:57:19.396710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
27327 13:57:19.397155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
27329 13:57:19.428850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
27330 13:57:19.429312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
27332 13:57:19.460319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass>
27333 13:57:19.460792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass
27335 13:57:19.492163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
27336 13:57:19.492610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
27338 13:57:19.524916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
27340 13:57:19.525457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
27341 13:57:19.556941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
27342 13:57:19.557388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
27344 13:57:19.588751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass
27346 13:57:19.589310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass>
27347 13:57:19.620348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
27348 13:57:19.620787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
27350 13:57:19.652011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
27351 13:57:19.652444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
27353 13:57:19.684107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
27354 13:57:19.684586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
27356 13:57:19.714967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass
27358 13:57:19.715552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass>
27359 13:57:19.746499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
27360 13:57:19.746958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
27362 13:57:19.778019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
27363 13:57:19.778493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
27365 13:57:19.809469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
27366 13:57:19.809952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
27368 13:57:19.840923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass
27370 13:57:19.841483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass>
27371 13:57:19.872750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
27373 13:57:19.873309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
27374 13:57:19.905454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
27375 13:57:19.905918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
27377 13:57:19.937221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
27378 13:57:19.937708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
27380 13:57:19.968774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass>
27381 13:57:19.969257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass
27383 13:57:20.000589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
27384 13:57:20.000998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
27386 13:57:20.032565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
27388 13:57:20.033010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
27389 13:57:20.064380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
27390 13:57:20.064777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
27392 13:57:20.097110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass
27394 13:57:20.097570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass>
27395 13:57:20.128741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
27397 13:57:20.129182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
27398 13:57:20.159991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
27399 13:57:20.160409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
27401 13:57:20.191364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
27402 13:57:20.191787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
27404 13:57:20.222655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass
27406 13:57:20.223211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass>
27407 13:57:20.254081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
27408 13:57:20.254548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
27410 13:57:20.285266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
27411 13:57:20.285696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
27413 13:57:20.317138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
27415 13:57:20.317706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
27416 13:57:20.349497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass
27418 13:57:20.350156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass>
27419 13:57:20.380664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
27420 13:57:20.381122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
27422 13:57:20.412364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
27423 13:57:20.412810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
27425 13:57:20.444096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
27426 13:57:20.444547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
27428 13:57:20.475183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass
27430 13:57:20.475771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass>
27431 13:57:20.506798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
27432 13:57:20.507242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
27434 13:57:20.539615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
27436 13:57:20.540146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
27437 13:57:20.571113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
27439 13:57:20.571746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
27440 13:57:20.602912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass
27442 13:57:20.603478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass>
27443 13:57:20.635406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
27445 13:57:20.635966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
27446 13:57:20.668078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
27447 13:57:20.668525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
27449 13:57:20.701402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
27450 13:57:20.701859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
27452 13:57:20.733274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass>
27453 13:57:20.733701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass
27455 13:57:20.764748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
27456 13:57:20.765214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
27458 13:57:20.796796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
27459 13:57:20.797250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
27461 13:57:20.830219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
27462 13:57:20.830653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
27464 13:57:20.861269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass>
27465 13:57:20.861801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass
27467 13:57:20.893031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
27468 13:57:20.893442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
27470 13:57:20.925191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
27471 13:57:20.925574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
27473 13:57:20.957525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
27474 13:57:20.957915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
27476 13:57:20.990498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass>
27477 13:57:20.990882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass
27479 13:57:21.023561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
27480 13:57:21.024001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
27482 13:57:21.055312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
27484 13:57:21.055878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
27485 13:57:21.088165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
27486 13:57:21.088666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
27488 13:57:21.120453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass>
27489 13:57:21.120925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass
27491 13:57:21.151731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
27492 13:57:21.152171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
27494 13:57:21.183126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
27496 13:57:21.183568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
27497 13:57:21.215260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
27499 13:57:21.215706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
27500 13:57:21.246604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass>
27501 13:57:21.247071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass
27503 13:57:21.277913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
27505 13:57:21.278450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
27506 13:57:21.309286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
27507 13:57:21.309688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
27509 13:57:21.340820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
27510 13:57:21.341286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
27512 13:57:21.372763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass>
27513 13:57:21.373235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass
27515 13:57:21.403876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
27516 13:57:21.404330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
27518 13:57:21.434809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
27519 13:57:21.435279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
27521 13:57:21.466151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
27523 13:57:21.466772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
27524 13:57:21.496593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass>
27525 13:57:21.497073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass
27527 13:57:21.528429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
27528 13:57:21.528898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
27530 13:57:21.560882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
27532 13:57:21.561478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
27533 13:57:21.592553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
27535 13:57:21.592990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
27536 13:57:21.624251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass
27538 13:57:21.624680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass>
27539 13:57:21.655826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
27541 13:57:21.656254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
27542 13:57:21.687836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
27543 13:57:21.688280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
27545 13:57:21.719967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
27547 13:57:21.720501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
27548 13:57:21.750866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass
27550 13:57:21.751406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass>
27551 13:57:21.782051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
27553 13:57:21.782511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
27554 13:57:21.812930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
27555 13:57:21.813381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
27557 13:57:21.844636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
27558 13:57:21.845088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
27560 13:57:21.875725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass
27562 13:57:21.876178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass>
27563 13:57:21.906580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
27564 13:57:21.906997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
27566 13:57:21.938123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
27567 13:57:21.938515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
27569 13:57:21.970355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
27570 13:57:21.970842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
27572 13:57:22.001716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass
27574 13:57:22.002339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass>
27575 13:57:22.032617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
27576 13:57:22.033079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
27578 13:57:22.064123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
27579 13:57:22.064571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
27581 13:57:22.095157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
27583 13:57:22.095687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
27584 13:57:22.126773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass
27586 13:57:22.127293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass>
27587 13:57:22.157920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
27588 13:57:22.158388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
27590 13:57:22.189328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
27592 13:57:22.189888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
27593 13:57:22.222701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
27594 13:57:22.223178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
27596 13:57:22.255460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass>
27597 13:57:22.255918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass
27599 13:57:22.286587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
27600 13:57:22.287021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
27602 13:57:22.319219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
27604 13:57:22.319752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
27605 13:57:22.350474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
27606 13:57:22.350904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
27608 13:57:22.382318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass
27610 13:57:22.382914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass>
27611 13:57:22.413293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
27612 13:57:22.413751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
27614 13:57:22.444812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
27615 13:57:22.445283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
27617 13:57:22.476491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
27619 13:57:22.477128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
27620 13:57:22.508755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass>
27621 13:57:22.509236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass
27623 13:57:22.540358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
27624 13:57:22.540755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
27626 13:57:22.572910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
27627 13:57:22.573328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
27629 13:57:22.604217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
27630 13:57:22.604667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
27632 13:57:22.634537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass>
27633 13:57:22.634993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass
27635 13:57:22.665205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
27637 13:57:22.665787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
27638 13:57:22.696625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
27639 13:57:22.697046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
27641 13:57:22.727987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
27643 13:57:22.728446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
27644 13:57:22.758471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass
27646 13:57:22.759022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass>
27647 13:57:22.789636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
27648 13:57:22.790053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
27650 13:57:22.820787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
27651 13:57:22.821189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
27653 13:57:22.854312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
27655 13:57:22.854922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
27656 13:57:22.885452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass>
27657 13:57:22.885867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass
27659 13:57:22.916849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
27661 13:57:22.917291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
27662 13:57:22.948245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
27664 13:57:22.948674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
27665 13:57:22.981064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
27666 13:57:22.981539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
27668 13:57:23.026480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass
27670 13:57:23.027071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass>
27671 13:57:23.060332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
27673 13:57:23.060800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
27674 13:57:23.094798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
27676 13:57:23.095377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
27677 13:57:23.128811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
27679 13:57:23.129442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
27680 13:57:23.162103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass>
27681 13:57:23.162574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass
27683 13:57:23.193833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
27685 13:57:23.194428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
27686 13:57:23.225215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
27687 13:57:23.225674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
27689 13:57:23.256720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
27691 13:57:23.257273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
27692 13:57:23.287942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass
27694 13:57:23.288572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass>
27695 13:57:23.319396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
27696 13:57:23.319864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
27698 13:57:23.350616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
27699 13:57:23.351092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
27701 13:57:23.382821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
27702 13:57:23.383281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
27704 13:57:23.414786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass>
27705 13:57:23.415247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass
27707 13:57:23.446100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
27708 13:57:23.446568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
27710 13:57:23.478157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
27711 13:57:23.478624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
27713 13:57:23.509280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
27714 13:57:23.509742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
27716 13:57:23.540360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass>
27717 13:57:23.540820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass
27719 13:57:23.571742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
27720 13:57:23.572160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
27722 13:57:23.604163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
27723 13:57:23.604631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
27725 13:57:23.635734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
27726 13:57:23.636186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
27728 13:57:23.666679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass>
27729 13:57:23.667146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass
27731 13:57:23.698000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
27733 13:57:23.698547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
27734 13:57:23.730000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
27735 13:57:23.730443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
27737 13:57:23.761594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
27738 13:57:23.762069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
27740 13:57:23.792357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=pass
27742 13:57:23.792893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=pass>
27743 13:57:23.823887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass
27745 13:57:23.824421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass>
27746 13:57:23.854621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass>
27747 13:57:23.855085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass
27749 13:57:23.884963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass>
27750 13:57:23.885388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass
27752 13:57:23.936924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass>
27753 13:57:23.937430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass
27755 13:57:23.968737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass
27757 13:57:23.969387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass>
27758 13:57:24.000899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass>
27759 13:57:24.001346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass
27761 13:57:24.032972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass
27763 13:57:24.033545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass>
27764 13:57:24.064719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass
27766 13:57:24.065286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass>
27767 13:57:24.096393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass>
27768 13:57:24.096790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass
27770 13:57:24.128279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass>
27771 13:57:24.128750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass
27773 13:57:24.159106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass
27775 13:57:24.159745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass>
27776 13:57:24.190747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass
27778 13:57:24.191199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass>
27779 13:57:24.222354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass
27781 13:57:24.222789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass>
27782 13:57:24.253997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass>
27783 13:57:24.254472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass
27785 13:57:24.285791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass
27787 13:57:24.286417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass>
27788 13:57:24.317544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass>
27789 13:57:24.317977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass
27791 13:57:24.349296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass
27793 13:57:24.349859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass>
27794 13:57:24.381119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass>
27795 13:57:24.381577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass
27797 13:57:24.412876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass
27799 13:57:24.413439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass>
27800 13:57:24.445139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass>
27801 13:57:24.445601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass
27803 13:57:24.477062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass>
27804 13:57:24.477529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass
27806 13:57:24.509298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass>
27807 13:57:24.509772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass
27809 13:57:24.541461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass
27811 13:57:24.542118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass>
27812 13:57:24.572679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
27813 13:57:24.573206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
27815 13:57:24.604476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass
27817 13:57:24.605019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass>
27818 13:57:24.637109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
27819 13:57:24.637656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
27821 13:57:24.669037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass
27823 13:57:24.669708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass>
27824 13:57:24.700802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass
27826 13:57:24.701398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass>
27827 13:57:24.732523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass>
27828 13:57:24.732949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass
27830 13:57:24.764275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass
27832 13:57:24.764829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass>
27833 13:57:24.796451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass>
27834 13:57:24.796876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass
27836 13:57:24.828268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass>
27837 13:57:24.828699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass
27839 13:57:24.860247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass
27841 13:57:24.860763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass>
27842 13:57:24.892006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip>
27843 13:57:24.892432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip
27845 13:57:24.923800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip
27847 13:57:24.924389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip>
27848 13:57:24.955437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass>
27849 13:57:24.955892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass
27851 13:57:24.987006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass
27853 13:57:24.987545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass>
27854 13:57:25.018607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass
27856 13:57:25.019133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass>
27857 13:57:25.050007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass
27859 13:57:25.050548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass>
27860 13:57:25.081506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip
27862 13:57:25.082053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip>
27863 13:57:25.112827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip>
27864 13:57:25.113267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip
27866 13:57:25.147981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass>
27867 13:57:25.148436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass
27869 13:57:25.179563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip
27871 13:57:25.180088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip>
27872 13:57:25.210931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip
27874 13:57:25.211559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip>
27875 13:57:25.241877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass>
27876 13:57:25.242286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass
27878 13:57:25.273324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip
27880 13:57:25.273956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip>
27881 13:57:25.305238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip
27883 13:57:25.305680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip>
27884 13:57:25.336742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass
27886 13:57:25.337165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass>
27887 13:57:25.371714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass
27889 13:57:25.372270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass>
27890 13:57:25.402667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass
27892 13:57:25.403217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass>
27893 13:57:25.433559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass
27895 13:57:25.434095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass>
27896 13:57:25.465424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip
27898 13:57:25.465966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip>
27899 13:57:25.502947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip
27901 13:57:25.503482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip>
27902 13:57:25.533299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass>
27903 13:57:25.533696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass
27905 13:57:25.564376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip
27907 13:57:25.564912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip>
27908 13:57:25.595601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip
27910 13:57:25.596153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip>
27911 13:57:25.625897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass>
27912 13:57:25.626370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass
27914 13:57:25.657971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip
27916 13:57:25.658516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip>
27917 13:57:25.689698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip>
27918 13:57:25.690138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip
27920 13:57:25.721226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass
27922 13:57:25.721850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass>
27923 13:57:25.752860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip>
27924 13:57:25.753309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip
27926 13:57:25.784262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip>
27927 13:57:25.784707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip
27929 13:57:25.815922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass
27931 13:57:25.816482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass>
27932 13:57:25.856593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip
27934 13:57:25.857358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip>
27935 13:57:25.889455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip>
27936 13:57:25.890031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip
27938 13:57:25.933682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass>
27939 13:57:25.934176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass
27941 13:57:25.966740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip>
27942 13:57:25.967211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip
27944 13:57:26.000252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip
27946 13:57:26.000708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip>
27947 13:57:26.031099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass
27949 13:57:26.031564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass>
27950 13:57:26.061804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip>
27951 13:57:26.062231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip
27953 13:57:26.094306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip>
27954 13:57:26.094787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip
27956 13:57:26.124719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass>
27957 13:57:26.125195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass
27959 13:57:26.155576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass>
27960 13:57:26.156041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass
27962 13:57:26.186500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass
27964 13:57:26.187052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass>
27965 13:57:26.218034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass>
27966 13:57:26.218503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass
27968 13:57:26.252525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip>
27969 13:57:26.252995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip
27971 13:57:26.283776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip>
27972 13:57:26.284232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip
27974 13:57:26.313861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass>
27975 13:57:26.314313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass
27977 13:57:26.344336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip
27979 13:57:26.344883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip>
27980 13:57:26.375981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip
27982 13:57:26.376610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip>
27983 13:57:26.409808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass>
27984 13:57:26.410277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass
27986 13:57:26.445322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip
27988 13:57:26.445956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip>
27989 13:57:26.480666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip
27991 13:57:26.481284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip>
27992 13:57:26.512759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass>
27993 13:57:26.513225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass
27995 13:57:26.543939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip
27997 13:57:26.544562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip>
27998 13:57:26.574508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip>
27999 13:57:26.574983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip
28001 13:57:26.605391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass>
28002 13:57:26.605877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass
28004 13:57:26.636875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip>
28005 13:57:26.637357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip
28007 13:57:26.667611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip>
28008 13:57:26.668085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip
28010 13:57:26.699123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass
28012 13:57:26.699745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass>
28013 13:57:26.730597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip
28015 13:57:26.731222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip>
28016 13:57:26.761844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip>
28017 13:57:26.762315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip
28019 13:57:26.792216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass>
28020 13:57:26.792697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass
28022 13:57:26.823493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip
28024 13:57:26.824049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip>
28025 13:57:26.856367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip>
28026 13:57:26.856804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip
28028 13:57:26.887420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass>
28029 13:57:26.887864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass
28031 13:57:26.918679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip>
28032 13:57:26.919247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip
28034 13:57:26.950325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip
28036 13:57:26.950904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip>
28037 13:57:26.981051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass>
28038 13:57:26.981518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass
28040 13:57:27.012477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip>
28041 13:57:27.012946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip
28043 13:57:27.043903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip>
28044 13:57:27.044349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip
28046 13:57:27.074883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass
28048 13:57:27.075346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass>
28049 13:57:27.105432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip
28051 13:57:27.105888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip>
28052 13:57:27.136273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip>
28053 13:57:27.136685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip
28055 13:57:27.166851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass>
28056 13:57:27.167295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass
28058 13:57:27.198052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip>
28059 13:57:27.198531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip
28061 13:57:27.229383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip
28063 13:57:27.229985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip>
28064 13:57:27.261150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass>
28065 13:57:27.261626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass
28067 13:57:27.292363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip
28069 13:57:27.292920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip>
28070 13:57:27.323859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip>
28071 13:57:27.324323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip
28073 13:57:27.354349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass>
28074 13:57:27.354815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass
28076 13:57:27.386194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip>
28077 13:57:27.386639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip
28079 13:57:27.417350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip>
28080 13:57:27.417779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip
28082 13:57:27.448606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass
28084 13:57:27.449046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass>
28085 13:57:27.479578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip>
28086 13:57:27.479991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip
28088 13:57:27.511675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip
28090 13:57:27.512128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip>
28091 13:57:27.542793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass>
28092 13:57:27.543227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass
28094 13:57:27.574518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip>
28095 13:57:27.574951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip
28097 13:57:27.606050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip
28099 13:57:27.606489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip>
28100 13:57:27.637472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass>
28101 13:57:27.637901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass
28103 13:57:27.669226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip>
28104 13:57:27.669707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip
28106 13:57:27.702926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip
28108 13:57:27.703476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip>
28109 13:57:27.735003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass
28111 13:57:27.735702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass>
28112 13:57:27.766649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip
28114 13:57:27.767206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip>
28115 13:57:27.798076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip
28117 13:57:27.798708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip>
28118 13:57:27.830272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass
28120 13:57:27.830900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass>
28121 13:57:27.863941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip>
28122 13:57:27.864415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip
28124 13:57:27.897106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip>
28125 13:57:27.897583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip
28127 13:57:27.929139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass>
28128 13:57:27.929668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass
28130 13:57:27.962048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip>
28131 13:57:27.962529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip
28133 13:57:27.994508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip>
28134 13:57:27.994984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip
28136 13:57:28.026693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass>
28137 13:57:28.027155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass
28139 13:57:28.060068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip>
28140 13:57:28.060574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip
28142 13:57:28.094240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip>
28143 13:57:28.094692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip
28145 13:57:28.130715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass
28147 13:57:28.131314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass>
28148 13:57:28.167895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip>
28149 13:57:28.168352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip
28151 13:57:28.199597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip>
28152 13:57:28.200048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip
28154 13:57:28.230348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass
28156 13:57:28.230950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass>
28157 13:57:28.261232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip>
28158 13:57:28.261669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip
28160 13:57:28.293284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip
28162 13:57:28.293823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip>
28163 13:57:28.324233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass
28165 13:57:28.324671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass>
28166 13:57:28.355729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip
28168 13:57:28.356292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip>
28169 13:57:28.386612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip
28171 13:57:28.387050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip>
28172 13:57:28.417758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass
28174 13:57:28.418181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass>
28175 13:57:28.448819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip>
28176 13:57:28.449272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip
28178 13:57:28.480392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip>
28179 13:57:28.480774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip
28181 13:57:28.512277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass>
28182 13:57:28.512656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass
28184 13:57:28.544572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip
28186 13:57:28.545137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip>
28187 13:57:28.576124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip
28189 13:57:28.576664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip>
28190 13:57:28.607541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass
28192 13:57:28.608077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass>
28193 13:57:28.638521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip>
28194 13:57:28.638981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip
28196 13:57:28.669558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip>
28197 13:57:28.670043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip
28199 13:57:28.700720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass
28201 13:57:28.701256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass>
28202 13:57:28.732844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip>
28203 13:57:28.733293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip
28205 13:57:28.764540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip>
28206 13:57:28.764930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip
28208 13:57:28.795719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass>
28209 13:57:28.796117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass
28211 13:57:28.826408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip
28213 13:57:28.826873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip>
28214 13:57:28.856987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip>
28215 13:57:28.857446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip
28217 13:57:28.887985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass>
28218 13:57:28.888452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass
28220 13:57:28.918486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip>
28221 13:57:28.918945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip
28223 13:57:28.948817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip
28225 13:57:28.949348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip>
28226 13:57:28.979437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass>
28227 13:57:28.979892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass
28229 13:57:29.010324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip
28231 13:57:29.010858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip>
28232 13:57:29.064795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip
28234 13:57:29.065333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip>
28235 13:57:29.095703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass
28237 13:57:29.096227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass>
28238 13:57:29.126014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip>
28239 13:57:29.126443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip
28241 13:57:29.156273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip>
28242 13:57:29.156719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip
28244 13:57:29.186494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass
28246 13:57:29.187101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass>
28247 13:57:29.217180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip
28249 13:57:29.217606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip>
28250 13:57:29.248513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip>
28251 13:57:29.248969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip
28253 13:57:29.279915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass>
28254 13:57:29.280349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass
28256 13:57:29.311697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip
28258 13:57:29.312231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip>
28259 13:57:29.342883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip
28261 13:57:29.343469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip>
28262 13:57:29.373769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass>
28263 13:57:29.374218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass
28265 13:57:29.405475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip>
28266 13:57:29.405874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip
28268 13:57:29.436972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip
28270 13:57:29.437542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip>
28271 13:57:29.467878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass
28273 13:57:29.468407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass>
28274 13:57:29.498153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip>
28275 13:57:29.498592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip
28277 13:57:29.528907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip
28279 13:57:29.529432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip>
28280 13:57:29.560704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass
28282 13:57:29.561241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass>
28283 13:57:29.591996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip>
28284 13:57:29.592427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip
28286 13:57:29.623480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip>
28287 13:57:29.623875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip
28289 13:57:29.654261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass
28291 13:57:29.654701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass>
28292 13:57:29.685071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip
28294 13:57:29.685520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip>
28295 13:57:29.716879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip>
28296 13:57:29.717288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip
28298 13:57:29.749850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass
28300 13:57:29.750308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass>
28301 13:57:29.781103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip>
28302 13:57:29.781502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip
28304 13:57:29.812247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip>
28305 13:57:29.812713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip
28307 13:57:29.843807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass
28309 13:57:29.844415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass>
28310 13:57:29.874948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip
28312 13:57:29.875486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip>
28313 13:57:29.906285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip>
28314 13:57:29.906742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip
28316 13:57:29.937208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass>
28317 13:57:29.937671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass
28319 13:57:29.968657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip>
28320 13:57:29.969080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip
28322 13:57:29.999877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip>
28323 13:57:30.000339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip
28325 13:57:30.031488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass
28327 13:57:30.031938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass>
28328 13:57:30.062750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip
28330 13:57:30.063180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip>
28331 13:57:30.094252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip
28333 13:57:30.094851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip>
28334 13:57:30.124711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass
28336 13:57:30.125311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass>
28337 13:57:30.155580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip
28339 13:57:30.156114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip>
28340 13:57:30.186254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip>
28341 13:57:30.186662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip
28343 13:57:30.216838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass>
28344 13:57:30.217270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass
28346 13:57:30.247856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip>
28347 13:57:30.248258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip
28349 13:57:30.279207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip
28351 13:57:30.279645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip>
28352 13:57:30.310464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass>
28353 13:57:30.310870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass
28355 13:57:30.342585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip
28357 13:57:30.343125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip>
28358 13:57:30.374219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip>
28359 13:57:30.374677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip
28361 13:57:30.405841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass
28363 13:57:30.406369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass>
28364 13:57:30.437675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip>
28365 13:57:30.438112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip
28367 13:57:30.469498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip>
28368 13:57:30.469933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip
28370 13:57:30.502700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass
28372 13:57:30.503316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass>
28373 13:57:30.534817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip>
28374 13:57:30.535277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip
28376 13:57:30.566644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip>
28377 13:57:30.567093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip
28379 13:57:30.597958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass>
28380 13:57:30.598423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass
28382 13:57:30.629069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip
28384 13:57:30.629629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip>
28385 13:57:30.660856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip
28387 13:57:30.661401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip>
28388 13:57:30.692888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass>
28389 13:57:30.693387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass
28391 13:57:30.725273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip
28393 13:57:30.725874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip>
28394 13:57:30.757362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip
28396 13:57:30.757947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip>
28397 13:57:30.788621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass>
28398 13:57:30.789095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass
28400 13:57:30.820002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip
28402 13:57:30.820569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip>
28403 13:57:30.852961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip
28405 13:57:30.853512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip>
28406 13:57:30.885671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass>
28407 13:57:30.886144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass
28409 13:57:30.922460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip
28411 13:57:30.923051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip>
28412 13:57:30.956228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip>
28413 13:57:30.956700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip
28415 13:57:30.990150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass>
28416 13:57:30.990595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass
28418 13:57:31.023035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip
28420 13:57:31.023623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip>
28421 13:57:31.055336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip>
28422 13:57:31.055822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip
28424 13:57:31.086864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass>
28425 13:57:31.087324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass
28427 13:57:31.118252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip
28429 13:57:31.118873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip>
28430 13:57:31.148755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip>
28431 13:57:31.149233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip
28433 13:57:31.180883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass
28435 13:57:31.181403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass>
28436 13:57:31.213544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip>
28437 13:57:31.214083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip
28439 13:57:31.246705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip>
28440 13:57:31.247161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip
28442 13:57:31.277355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass
28444 13:57:31.277879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass>
28445 13:57:31.308691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip
28447 13:57:31.309200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip>
28448 13:57:31.340040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip
28450 13:57:31.340572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip>
28451 13:57:31.370673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass
28453 13:57:31.371189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass>
28454 13:57:31.401421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip>
28455 13:57:31.401848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip
28457 13:57:31.432389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip>
28458 13:57:31.432829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip
28460 13:57:31.463436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass>
28461 13:57:31.463863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass
28463 13:57:31.493395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip
28465 13:57:31.493839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip>
28466 13:57:31.524681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip
28468 13:57:31.525127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip>
28469 13:57:31.555805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass>
28470 13:57:31.556223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass
28472 13:57:31.587136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip
28474 13:57:31.587575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip>
28475 13:57:31.618636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip
28477 13:57:31.619076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip>
28478 13:57:31.649282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass>
28479 13:57:31.649689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass
28481 13:57:31.680727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip
28483 13:57:31.681291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip>
28484 13:57:31.712085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip>
28485 13:57:31.712506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip
28487 13:57:31.744014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass
28489 13:57:31.744565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass>
28490 13:57:31.775836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip>
28491 13:57:31.776301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip
28493 13:57:31.808069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip
28495 13:57:31.808611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip>
28496 13:57:31.839626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass
28498 13:57:31.840157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass>
28499 13:57:31.870055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip
28501 13:57:31.870664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip>
28502 13:57:31.901259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip
28504 13:57:31.901822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip>
28505 13:57:31.932824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass>
28506 13:57:31.933284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass
28508 13:57:31.968312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip>
28509 13:57:31.968792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip
28511 13:57:32.002134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip>
28512 13:57:32.002606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip
28514 13:57:32.034146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass>
28515 13:57:32.034553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass
28517 13:57:32.066030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip
28519 13:57:32.066599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip>
28520 13:57:32.098830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip>
28521 13:57:32.099290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip
28523 13:57:32.130362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass>
28524 13:57:32.130821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass
28526 13:57:32.163653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip>
28527 13:57:32.164080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip
28529 13:57:32.196857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip>
28530 13:57:32.197276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip
28532 13:57:32.231120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass
28534 13:57:32.231601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass>
28535 13:57:32.265800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip
28537 13:57:32.266398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip>
28538 13:57:32.299579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip>
28539 13:57:32.300031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip
28541 13:57:32.330686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass>
28542 13:57:32.331139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass
28544 13:57:32.363458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip>
28545 13:57:32.363911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip
28547 13:57:32.394303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip
28549 13:57:32.394767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip>
28550 13:57:32.425504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass>
28551 13:57:32.426005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass
28553 13:57:32.457026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip
28555 13:57:32.457589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip>
28556 13:57:32.488210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip>
28557 13:57:32.488661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip
28559 13:57:32.520073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass
28561 13:57:32.520659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass>
28562 13:57:32.550992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip
28564 13:57:32.551551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip>
28565 13:57:32.581958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip>
28566 13:57:32.582422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip
28568 13:57:32.613966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass
28570 13:57:32.614620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass>
28571 13:57:32.646586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip
28573 13:57:32.647229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip>
28574 13:57:32.682530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip>
28575 13:57:32.683010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip
28577 13:57:32.717489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass
28579 13:57:32.717851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass>
28580 13:57:32.752487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip
28582 13:57:32.752720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip>
28583 13:57:32.787848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip
28585 13:57:32.788274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip>
28586 13:57:32.823802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass>
28587 13:57:32.824166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass
28589 13:57:32.859057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip
28591 13:57:32.859641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip>
28592 13:57:32.891899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip
28594 13:57:32.892437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip>
28595 13:57:32.923983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass
28597 13:57:32.924523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass>
28598 13:57:32.956247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip>
28599 13:57:32.956689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip
28601 13:57:32.989277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip
28603 13:57:32.989741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip>
28604 13:57:33.021517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass>
28605 13:57:33.021996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass
28607 13:57:33.054850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip
28609 13:57:33.055440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip>
28610 13:57:33.089168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip
28612 13:57:33.089818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip>
28613 13:57:33.124037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass>
28614 13:57:33.124518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass
28616 13:57:33.160289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip>
28617 13:57:33.160778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip
28619 13:57:33.192634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip
28621 13:57:33.193025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip>
28622 13:57:33.224117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass
28624 13:57:33.224556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass>
28625 13:57:33.256093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip
28627 13:57:33.256709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip>
28628 13:57:33.287084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip
28630 13:57:33.287706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip>
28631 13:57:33.317526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass>
28632 13:57:33.318017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass
28634 13:57:33.349394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip>
28635 13:57:33.349872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip
28637 13:57:33.381143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip>
28638 13:57:33.381604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip
28640 13:57:33.414462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass>
28641 13:57:33.414931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass
28643 13:57:33.446352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip
28645 13:57:33.446778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip>
28646 13:57:33.477846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip>
28647 13:57:33.478288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip
28649 13:57:33.509480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass
28651 13:57:33.510022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass>
28652 13:57:33.540607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip>
28653 13:57:33.541052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip
28655 13:57:33.572507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip
28657 13:57:33.572950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip>
28658 13:57:33.604908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass>
28659 13:57:33.605305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass
28661 13:57:33.636321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip>
28662 13:57:33.636736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip
28664 13:57:33.669367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip
28666 13:57:33.669950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip>
28667 13:57:33.701470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass>
28668 13:57:33.701955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass
28670 13:57:33.733694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip>
28671 13:57:33.734143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip
28673 13:57:33.765378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip
28675 13:57:33.765937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip>
28676 13:57:33.797883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass
28678 13:57:33.798435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass>
28679 13:57:33.830241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip>
28680 13:57:33.830688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip
28682 13:57:33.863974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip
28684 13:57:33.864538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip>
28685 13:57:33.895850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass
28687 13:57:33.896406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass>
28688 13:57:33.928139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip
28690 13:57:33.928689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip>
28691 13:57:33.959956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip>
28692 13:57:33.960419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip
28694 13:57:33.995073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass
28696 13:57:33.995522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass>
28697 13:57:34.027910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip>
28698 13:57:34.028321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip
28700 13:57:34.059908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip
28702 13:57:34.060458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip>
28703 13:57:34.091828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass
28705 13:57:34.092271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass>
28706 13:57:34.123906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip
28708 13:57:34.124346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip>
28709 13:57:34.183719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip>
28710 13:57:34.184091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip
28712 13:57:34.216394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass
28714 13:57:34.216753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass>
28715 13:57:34.247812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip
28717 13:57:34.248165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip>
28718 13:57:34.279004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip
28720 13:57:34.279544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip>
28721 13:57:34.310713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass
28723 13:57:34.311227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass>
28724 13:57:34.342598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip
28726 13:57:34.343223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip>
28727 13:57:34.374151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip>
28728 13:57:34.374556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip
28730 13:57:34.406185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass
28732 13:57:34.406625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass>
28733 13:57:34.438672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip
28735 13:57:34.439137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip>
28736 13:57:34.471912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip>
28737 13:57:34.472323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip
28739 13:57:34.510305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass
28741 13:57:34.510759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass>
28742 13:57:34.543070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip
28744 13:57:34.543733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip>
28745 13:57:34.575570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip>
28746 13:57:34.576034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip
28748 13:57:34.609961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass>
28749 13:57:34.610398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass
28751 13:57:34.642016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip>
28752 13:57:34.642396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip
28754 13:57:34.673725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip>
28755 13:57:34.674163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip
28757 13:57:34.705084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass>
28758 13:57:34.705556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass
28760 13:57:34.737005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip>
28761 13:57:34.737426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip
28763 13:57:34.768923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip>
28764 13:57:34.769334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip
28766 13:57:34.801025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass
28768 13:57:34.801466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass>
28769 13:57:34.833218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip
28771 13:57:34.833779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip>
28772 13:57:34.865722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip>
28773 13:57:34.866174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip
28775 13:57:34.897721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass>
28776 13:57:34.898164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass
28778 13:57:34.930816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip>
28779 13:57:34.931252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip
28781 13:57:34.964131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip
28783 13:57:34.964700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip>
28784 13:57:34.996492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass
28786 13:57:34.997064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass>
28787 13:57:35.029201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip>
28788 13:57:35.029700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip
28790 13:57:35.062927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip>
28791 13:57:35.063419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip
28793 13:57:35.095803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass>
28794 13:57:35.096276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass
28796 13:57:35.128175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip>
28797 13:57:35.128644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip
28799 13:57:35.164043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip>
28800 13:57:35.164477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip
28802 13:57:35.196435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass>
28803 13:57:35.196808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass
28805 13:57:35.228881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip
28807 13:57:35.229424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip>
28808 13:57:35.262429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip>
28809 13:57:35.262907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip
28811 13:57:35.294872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass
28813 13:57:35.295479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass>
28814 13:57:35.328202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip>
28815 13:57:35.328667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip
28817 13:57:35.360127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip>
28818 13:57:35.360570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip
28820 13:57:35.392121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass
28822 13:57:35.392707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass>
28823 13:57:35.423740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip>
28824 13:57:35.424202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip
28826 13:57:35.456818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip>
28827 13:57:35.457269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip
28829 13:57:35.488539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass>
28830 13:57:35.489003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass
28832 13:57:35.520723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip
28834 13:57:35.521320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip>
28835 13:57:35.553183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip>
28836 13:57:35.553641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip
28838 13:57:35.588052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass>
28839 13:57:35.588447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass
28841 13:57:35.621373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip
28843 13:57:35.621749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip>
28844 13:57:35.653717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip>
28845 13:57:35.654098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip
28847 13:57:35.693538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass
28849 13:57:35.693990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass>
28850 13:57:35.732107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip>
28851 13:57:35.732456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip
28853 13:57:35.763370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip>
28854 13:57:35.763739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip
28856 13:57:35.795620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass>
28857 13:57:35.795983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass
28859 13:57:35.826238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip>
28860 13:57:35.826606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip
28862 13:57:35.859752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip>
28863 13:57:35.860133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip
28865 13:57:35.896372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass>
28866 13:57:35.896791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass
28868 13:57:35.934538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip
28870 13:57:35.934926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip>
28871 13:57:35.972841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip>
28872 13:57:35.973227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip
28874 13:57:36.012142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass>
28875 13:57:36.012534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass
28877 13:57:36.048615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip
28879 13:57:36.049177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip>
28880 13:57:36.081813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip
28882 13:57:36.082321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip>
28883 13:57:36.114075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass>
28884 13:57:36.114546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass
28886 13:57:36.145969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip
28888 13:57:36.146590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip>
28889 13:57:36.179294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip
28891 13:57:36.179754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip>
28892 13:57:36.211996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass
28894 13:57:36.212466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass>
28895 13:57:36.243319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip>
28896 13:57:36.243749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip
28898 13:57:36.274715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip>
28899 13:57:36.275203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip
28901 13:57:36.306494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass>
28902 13:57:36.306965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass
28904 13:57:36.338218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip>
28905 13:57:36.338684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip
28907 13:57:36.369396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip>
28908 13:57:36.369887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip
28910 13:57:36.400684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass>
28911 13:57:36.401161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass
28913 13:57:36.432821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip>
28914 13:57:36.433235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip
28916 13:57:36.465182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip
28918 13:57:36.465630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip>
28919 13:57:36.497189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass
28921 13:57:36.497631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass>
28922 13:57:36.529586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip>
28923 13:57:36.530023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip
28925 13:57:36.561917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip>
28926 13:57:36.562330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip
28928 13:57:36.594049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass>
28929 13:57:36.594534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass
28931 13:57:36.627250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip
28933 13:57:36.627696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip>
28934 13:57:36.659178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip
28936 13:57:36.659845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip>
28937 13:57:36.692269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass>
28938 13:57:36.692741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass
28940 13:57:36.725138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip
28942 13:57:36.725731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip>
28943 13:57:36.756736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip>
28944 13:57:36.757221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip
28946 13:57:36.788691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass>
28947 13:57:36.789181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass
28949 13:57:36.822490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip
28951 13:57:36.823046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip>
28952 13:57:36.855961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip
28954 13:57:36.856535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip>
28955 13:57:36.893526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass>
28956 13:57:36.894032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass
28958 13:57:36.927147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip
28960 13:57:36.927795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip>
28961 13:57:36.958146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip>
28962 13:57:36.958633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip
28964 13:57:36.991242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass>
28965 13:57:36.991731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass
28967 13:57:37.022767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip
28969 13:57:37.023422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip>
28970 13:57:37.057409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip>
28971 13:57:37.057893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip
28973 13:57:37.090352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass>
28974 13:57:37.090805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass
28976 13:57:37.122705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip
28978 13:57:37.123262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip>
28979 13:57:37.155999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip>
28980 13:57:37.156466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip
28982 13:57:37.187766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass>
28983 13:57:37.188229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass
28985 13:57:37.220102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip
28987 13:57:37.220476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip>
28988 13:57:37.252435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip>
28989 13:57:37.252918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip
28991 13:57:37.284099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass
28993 13:57:37.284554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass>
28994 13:57:37.315596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip
28996 13:57:37.316045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip>
28997 13:57:37.346951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip
28999 13:57:37.347572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip>
29000 13:57:37.378648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass
29002 13:57:37.379195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass>
29003 13:57:37.410093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip
29005 13:57:37.410539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip>
29006 13:57:37.442189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip>
29007 13:57:37.442673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip
29009 13:57:37.474119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass
29011 13:57:37.474655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass>
29012 13:57:37.505420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip>
29013 13:57:37.505881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip
29015 13:57:37.538676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip
29017 13:57:37.539239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip>
29018 13:57:37.570751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass
29020 13:57:37.571291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass>
29021 13:57:37.602319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip
29023 13:57:37.602927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip>
29024 13:57:37.634109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip>
29025 13:57:37.634517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip
29027 13:57:37.665080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass
29029 13:57:37.665533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass>
29030 13:57:37.696116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip
29032 13:57:37.696558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip>
29033 13:57:37.727360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip>
29034 13:57:37.727788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip
29036 13:57:37.758635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass
29038 13:57:37.759078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass>
29039 13:57:37.789653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip
29041 13:57:37.790089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip>
29042 13:57:37.820326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip>
29043 13:57:37.820750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip
29045 13:57:37.851770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass
29047 13:57:37.852217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass>
29048 13:57:37.884073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip>
29049 13:57:37.884478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip
29051 13:57:37.916550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip
29053 13:57:37.917015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip>
29054 13:57:37.949708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass>
29055 13:57:37.950102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass
29057 13:57:37.981496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip>
29058 13:57:37.981899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip
29060 13:57:38.015228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip
29062 13:57:38.015664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip>
29063 13:57:38.048388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass
29065 13:57:38.048826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass>
29066 13:57:38.085084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip>
29067 13:57:38.085497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip
29069 13:57:38.116761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip>
29070 13:57:38.117107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip
29072 13:57:38.148768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass
29074 13:57:38.149213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass>
29075 13:57:38.181312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip>
29076 13:57:38.181774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip
29078 13:57:38.214109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip>
29079 13:57:38.214580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip
29081 13:57:38.247040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass
29083 13:57:38.247601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass>
29084 13:57:38.279472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip>
29085 13:57:38.279947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip
29087 13:57:38.311039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip
29089 13:57:38.311604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip>
29090 13:57:38.343165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass
29092 13:57:38.343814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass>
29093 13:57:38.375832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip
29095 13:57:38.376467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip>
29096 13:57:38.407681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip
29098 13:57:38.408273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip>
29099 13:57:38.438942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass
29101 13:57:38.439493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass>
29102 13:57:38.470486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip>
29103 13:57:38.470955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip
29105 13:57:38.502464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip>
29106 13:57:38.502942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip
29108 13:57:38.534130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass>
29109 13:57:38.534595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass
29111 13:57:38.565722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip
29113 13:57:38.566285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip>
29114 13:57:38.597749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip>
29115 13:57:38.598221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip
29117 13:57:38.629149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass
29119 13:57:38.629716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass>
29120 13:57:38.661956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip
29122 13:57:38.662509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip>
29123 13:57:38.693945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip
29125 13:57:38.694528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip>
29126 13:57:38.724887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass>
29127 13:57:38.725302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass
29129 13:57:38.756199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip>
29130 13:57:38.756600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip
29132 13:57:38.787741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip
29134 13:57:38.788313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip>
29135 13:57:38.819167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass
29137 13:57:38.819764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass>
29138 13:57:38.850368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip>
29139 13:57:38.850789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip
29141 13:57:38.881669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip
29143 13:57:38.882257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip>
29144 13:57:38.913781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass
29146 13:57:38.914400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass>
29147 13:57:38.946395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip
29149 13:57:38.946986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip>
29150 13:57:38.978385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip
29152 13:57:38.979026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip>
29153 13:57:39.010182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass
29155 13:57:39.010809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass>
29156 13:57:39.041147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip>
29157 13:57:39.041623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip
29159 13:57:39.073066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip>
29160 13:57:39.073531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip
29162 13:57:39.104946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass>
29163 13:57:39.105478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass
29165 13:57:39.136639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip
29167 13:57:39.137385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip>
29168 13:57:39.168158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip
29170 13:57:39.168712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip>
29171 13:57:39.198827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass>
29172 13:57:39.199370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass
29174 13:57:39.230743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip
29176 13:57:39.231321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip>
29177 13:57:39.262606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip
29179 13:57:39.263152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip>
29180 13:57:39.320857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass>
29181 13:57:39.321253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass
29183 13:57:39.355153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip
29185 13:57:39.355512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip>
29186 13:57:39.386432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip
29188 13:57:39.386785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip>
29189 13:57:39.417874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass
29191 13:57:39.418221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass>
29192 13:57:39.449409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip>
29193 13:57:39.449848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip
29195 13:57:39.480918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip>
29196 13:57:39.481351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip
29198 13:57:39.513286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass>
29199 13:57:39.513708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass
29201 13:57:39.546069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip>
29202 13:57:39.546514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip
29204 13:57:39.578125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip>
29205 13:57:39.578587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip
29207 13:57:39.610135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass
29209 13:57:39.610726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass>
29210 13:57:39.642225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip
29212 13:57:39.642868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip>
29213 13:57:39.674878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip
29215 13:57:39.675524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip>
29216 13:57:39.707051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass
29218 13:57:39.707600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass>
29219 13:57:39.738931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip>
29220 13:57:39.739353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip
29222 13:57:39.769974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip>
29223 13:57:39.770437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip
29225 13:57:39.800594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass>
29226 13:57:39.801068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass
29228 13:57:39.832710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip>
29229 13:57:39.833193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip
29231 13:57:39.864527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip
29233 13:57:39.865173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip>
29234 13:57:39.896195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass
29236 13:57:39.896811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass>
29237 13:57:39.927645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip
29239 13:57:39.928197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip>
29240 13:57:39.959613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip>
29241 13:57:39.960108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip
29243 13:57:39.990662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass>
29244 13:57:39.991281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass
29246 13:57:40.021899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip>
29247 13:57:40.022343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip
29249 13:57:40.053622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip
29251 13:57:40.054094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip>
29252 13:57:40.084983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass
29254 13:57:40.085535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass>
29255 13:57:40.116403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip>
29256 13:57:40.116851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip
29258 13:57:40.148748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip>
29259 13:57:40.149209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip
29261 13:57:40.180030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass>
29262 13:57:40.180477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass
29264 13:57:40.211230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip
29266 13:57:40.211783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip>
29267 13:57:40.242033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip>
29268 13:57:40.242447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip
29270 13:57:40.272483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass>
29271 13:57:40.272977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass
29273 13:57:40.304692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip>
29274 13:57:40.305153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip
29276 13:57:40.336483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip
29278 13:57:40.337077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip>
29279 13:57:40.368102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass>
29280 13:57:40.368579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass
29282 13:57:40.399506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip
29284 13:57:40.399949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip>
29285 13:57:40.431608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip>
29286 13:57:40.432017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip
29288 13:57:40.464383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass>
29289 13:57:40.464950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass
29291 13:57:40.512677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip>
29292 13:57:40.513133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip
29294 13:57:40.560843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip>
29295 13:57:40.561224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip
29297 13:57:40.593540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass
29299 13:57:40.594001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass>
29300 13:57:40.641184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip>
29301 13:57:40.641535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip
29303 13:57:40.676594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip
29305 13:57:40.677212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip>
29306 13:57:40.712800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass>
29307 13:57:40.713165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass
29309 13:57:40.748878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip>
29310 13:57:40.749344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip
29312 13:57:40.799793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip
29314 13:57:40.800387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip>
29315 13:57:40.844960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass>
29316 13:57:40.845496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass
29318 13:57:40.877477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip>
29319 13:57:40.877931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip
29321 13:57:40.910259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip>
29322 13:57:40.910700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip
29324 13:57:40.941369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass>
29325 13:57:40.941816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass
29327 13:57:40.972287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip>
29328 13:57:40.972741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip
29330 13:57:41.004077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip>
29331 13:57:41.004510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip
29333 13:57:41.034589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass>
29334 13:57:41.035039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass
29336 13:57:41.069169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip>
29337 13:57:41.069613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip
29339 13:57:41.104335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip>
29340 13:57:41.104881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip
29342 13:57:41.137011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass>
29343 13:57:41.137548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass
29345 13:57:41.168328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip>
29346 13:57:41.168836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip
29348 13:57:41.199270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip>
29349 13:57:41.199697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip
29351 13:57:41.229771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass>
29352 13:57:41.230196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass
29354 13:57:41.261644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip
29356 13:57:41.262113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip>
29357 13:57:41.293081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip>
29358 13:57:41.293488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip
29360 13:57:41.324195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass>
29361 13:57:41.324639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass
29363 13:57:41.355253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip
29365 13:57:41.355808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip>
29366 13:57:41.386782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip
29368 13:57:41.387344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip>
29369 13:57:41.418605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass>
29370 13:57:41.419074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass
29372 13:57:41.450252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip
29374 13:57:41.450706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip>
29375 13:57:41.481628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip>
29376 13:57:41.482035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip
29378 13:57:41.512306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass
29380 13:57:41.512742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass>
29381 13:57:41.543201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip
29383 13:57:41.543645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip>
29384 13:57:41.574626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip
29386 13:57:41.575033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip>
29387 13:57:41.605756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass>
29388 13:57:41.606152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass
29390 13:57:41.636694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip
29392 13:57:41.637333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip>
29393 13:57:41.673104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip>
29394 13:57:41.673551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip
29396 13:57:41.708921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass
29398 13:57:41.709367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass>
29399 13:57:41.744565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip>
29400 13:57:41.744965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip
29402 13:57:41.782235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip>
29403 13:57:41.782675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip
29405 13:57:41.817346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass
29407 13:57:41.817922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass>
29408 13:57:41.853501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip>
29409 13:57:41.853897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip
29411 13:57:41.888713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip>
29412 13:57:41.889067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip
29414 13:57:41.924409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass
29416 13:57:41.924836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass>
29417 13:57:41.959898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip>
29418 13:57:41.960252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip
29420 13:57:41.995759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip>
29421 13:57:41.996118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip
29423 13:57:42.031140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass
29425 13:57:42.031573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass>
29426 13:57:42.066662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip>
29427 13:57:42.067006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip
29429 13:57:42.103190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip
29431 13:57:42.103648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip>
29432 13:57:42.140787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass>
29433 13:57:42.141288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass
29435 13:57:42.176367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip>
29436 13:57:42.176789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip
29438 13:57:42.212097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip>
29439 13:57:42.212448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip
29441 13:57:42.247928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass
29443 13:57:42.248509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass>
29444 13:57:42.284117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip
29446 13:57:42.284709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip>
29447 13:57:42.320561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip>
29448 13:57:42.320994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip
29450 13:57:42.356965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass>
29451 13:57:42.357332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass
29453 13:57:42.392551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip>
29454 13:57:42.392911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip
29456 13:57:42.427603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip>
29457 13:57:42.427964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip
29459 13:57:42.462275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass
29461 13:57:42.462681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass>
29462 13:57:42.497175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip>
29463 13:57:42.497628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip
29465 13:57:42.532682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip
29467 13:57:42.533148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip>
29468 13:57:42.566360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass>
29469 13:57:42.566651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass
29471 13:57:42.601108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip>
29472 13:57:42.601527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip
29474 13:57:42.636212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip>
29475 13:57:42.636629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip
29477 13:57:42.670944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass
29479 13:57:42.671412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass>
29480 13:57:42.706506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip>
29481 13:57:42.706925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip
29483 13:57:42.741459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip>
29484 13:57:42.741882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip
29486 13:57:42.776543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass
29488 13:57:42.776997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass>
29489 13:57:42.811649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip
29491 13:57:42.812098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip>
29492 13:57:42.846545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip>
29493 13:57:42.846957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip
29495 13:57:42.881117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass>
29496 13:57:42.881558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass
29498 13:57:42.916304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip
29500 13:57:42.916758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip>
29501 13:57:42.951246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip
29503 13:57:42.951697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip>
29504 13:57:42.986959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass>
29505 13:57:42.987377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass
29507 13:57:43.021931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip>
29508 13:57:43.022374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip
29510 13:57:43.056978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip>
29511 13:57:43.057455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip
29513 13:57:43.093997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass>
29514 13:57:43.094488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass
29516 13:57:43.133070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip>
29517 13:57:43.133534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip
29519 13:57:43.169641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip>
29520 13:57:43.170142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip
29522 13:57:43.204921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass>
29523 13:57:43.205395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass
29525 13:57:43.240231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip>
29526 13:57:43.240711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip
29528 13:57:43.276386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip
29530 13:57:43.276916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip>
29531 13:57:43.311208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass
29533 13:57:43.311669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass>
29534 13:57:43.346465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip>
29535 13:57:43.346903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip
29537 13:57:43.382053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip
29539 13:57:43.382621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip>
29540 13:57:43.416627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass
29542 13:57:43.417194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass>
29543 13:57:43.451264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip
29545 13:57:43.451719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip>
29546 13:57:43.486589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip>
29547 13:57:43.487011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip
29549 13:57:43.521769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass
29551 13:57:43.522223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass>
29552 13:57:43.556191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip>
29553 13:57:43.556632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip
29555 13:57:43.591878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip>
29556 13:57:43.592269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip
29558 13:57:43.626356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass
29560 13:57:43.626989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass>
29561 13:57:43.661736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip>
29562 13:57:43.662141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip
29564 13:57:43.696699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip>
29565 13:57:43.697069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip
29567 13:57:43.733667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass
29569 13:57:43.734173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass>
29570 13:57:43.768603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip>
29571 13:57:43.768954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip
29573 13:57:43.805443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip>
29574 13:57:43.805801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip
29576 13:57:43.841373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass
29578 13:57:43.841813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass>
29579 13:57:43.876339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip>
29580 13:57:43.876803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip
29582 13:57:43.911203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip
29584 13:57:43.911665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip>
29585 13:57:43.945481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass
29587 13:57:43.946060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass>
29588 13:57:43.981913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip>
29589 13:57:43.982312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip
29591 13:57:44.017582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip>
29592 13:57:44.017851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip
29594 13:57:44.053205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass
29596 13:57:44.053763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass>
29597 13:57:44.088914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip>
29598 13:57:44.089296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip
29600 13:57:44.126335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip
29602 13:57:44.126628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip>
29603 13:57:44.160967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass
29605 13:57:44.161352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass>
29606 13:57:44.196250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip
29608 13:57:44.196651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip>
29609 13:57:44.231524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip>
29610 13:57:44.231881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip
29612 13:57:44.266177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass>
29613 13:57:44.266598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass
29615 13:57:44.300801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip>
29616 13:57:44.301155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip
29618 13:57:44.335761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip>
29619 13:57:44.336218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip
29621 13:57:44.370712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass
29623 13:57:44.371283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass>
29624 13:57:44.428439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip
29626 13:57:44.428891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip>
29627 13:57:44.463881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip>
29628 13:57:44.464324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip
29630 13:57:44.499129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass
29632 13:57:44.499740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass>
29633 13:57:44.534680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip>
29634 13:57:44.535127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip
29636 13:57:44.570180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip>
29637 13:57:44.570542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip
29639 13:57:44.605008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass
29641 13:57:44.605456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass>
29642 13:57:44.640486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip>
29643 13:57:44.640840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip
29645 13:57:44.674717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip
29647 13:57:44.675153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip>
29648 13:57:44.709148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass
29650 13:57:44.709573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass>
29651 13:57:44.743956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip>
29652 13:57:44.744312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip
29654 13:57:44.778508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip>
29655 13:57:44.778858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip
29657 13:57:44.813515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass>
29658 13:57:44.813876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass
29660 13:57:44.848355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip>
29661 13:57:44.848705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip
29663 13:57:44.883340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip>
29664 13:57:44.883692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip
29666 13:57:44.918296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass
29668 13:57:44.918726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass>
29669 13:57:44.952877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip>
29670 13:57:44.953228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip
29672 13:57:44.987266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip
29674 13:57:44.987812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip>
29675 13:57:45.021992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass
29677 13:57:45.022552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass>
29678 13:57:45.056875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip>
29679 13:57:45.057327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip
29681 13:57:45.091627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip
29683 13:57:45.092183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip>
29684 13:57:45.125840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass>
29685 13:57:45.126315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass
29687 13:57:45.160750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip
29689 13:57:45.161313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip>
29690 13:57:45.195492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip>
29691 13:57:45.195891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip
29693 13:57:45.229580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass
29695 13:57:45.230137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass>
29696 13:57:45.265037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip>
29697 13:57:45.265458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip
29699 13:57:45.299911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip>
29700 13:57:45.300335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip
29702 13:57:45.333978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass>
29703 13:57:45.334400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass
29705 13:57:45.368673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip>
29706 13:57:45.369137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip
29708 13:57:45.403711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip>
29709 13:57:45.404162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip
29711 13:57:45.438297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass
29713 13:57:45.438863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass>
29714 13:57:45.472930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip>
29715 13:57:45.473380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip
29717 13:57:45.507676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip>
29718 13:57:45.508125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip
29720 13:57:45.542363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass
29722 13:57:45.542955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass>
29723 13:57:45.576944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip>
29724 13:57:45.577401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip
29726 13:57:45.611848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip>
29727 13:57:45.612305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip
29729 13:57:45.646191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass>
29730 13:57:45.646656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass
29732 13:57:45.680469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip>
29733 13:57:45.680952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip
29735 13:57:45.714511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip>
29736 13:57:45.714985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip
29738 13:57:45.746637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass>
29739 13:57:45.747137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass
29741 13:57:45.778042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip>
29742 13:57:45.778529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip
29744 13:57:45.809305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip
29746 13:57:45.809928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip>
29747 13:57:45.840694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass>
29748 13:57:45.841083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass
29750 13:57:45.872262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip
29752 13:57:45.872957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip>
29753 13:57:45.904839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip>
29754 13:57:45.905270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip
29756 13:57:45.936339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass>
29757 13:57:45.936779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass
29759 13:57:45.968415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip>
29760 13:57:45.968871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip
29762 13:57:46.003336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip
29764 13:57:46.003931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip>
29765 13:57:46.038060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass>
29766 13:57:46.038517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass
29768 13:57:46.072730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip
29770 13:57:46.073190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip>
29771 13:57:46.104483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip>
29772 13:57:46.104876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip
29774 13:57:46.136361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass
29776 13:57:46.136921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass>
29777 13:57:46.168081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip>
29778 13:57:46.168477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip
29780 13:57:46.205148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip>
29781 13:57:46.205552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip
29783 13:57:46.240775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass
29785 13:57:46.241240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass>
29786 13:57:46.274092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip>
29787 13:57:46.274559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip
29789 13:57:46.305747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip>
29790 13:57:46.306267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip
29792 13:57:46.338324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass>
29793 13:57:46.338814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass
29795 13:57:46.372379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip>
29796 13:57:46.372852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip
29798 13:57:46.404154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip>
29799 13:57:46.404615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip
29801 13:57:46.435586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass>
29802 13:57:46.436026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass
29804 13:57:46.467418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip>
29805 13:57:46.467901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip
29807 13:57:46.499621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip>
29808 13:57:46.500074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip
29810 13:57:46.532748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass>
29811 13:57:46.533207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass
29813 13:57:46.565802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip
29815 13:57:46.566351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip>
29816 13:57:46.598421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip>
29817 13:57:46.598816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip
29819 13:57:46.629913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass>
29820 13:57:46.630310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass
29822 13:57:46.661855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip
29824 13:57:46.662405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip>
29825 13:57:46.693252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip>
29826 13:57:46.693674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip
29828 13:57:46.724959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass>
29829 13:57:46.725370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass
29831 13:57:46.756484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip>
29832 13:57:46.756921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip
29834 13:57:46.789147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip
29836 13:57:46.789787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip>
29837 13:57:46.820415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass>
29838 13:57:46.820895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass
29840 13:57:46.851979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip>
29841 13:57:46.852444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip
29843 13:57:46.883991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip>
29844 13:57:46.884391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip
29846 13:57:46.916583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass>
29847 13:57:46.917054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass
29849 13:57:46.948997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip>
29850 13:57:46.949416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip
29852 13:57:46.980866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip
29854 13:57:46.981306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip>
29855 13:57:47.012087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass>
29856 13:57:47.012519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass
29858 13:57:47.043571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip
29860 13:57:47.044031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip>
29861 13:57:47.074652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip>
29862 13:57:47.075085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip
29864 13:57:47.105903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass>
29865 13:57:47.106336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass
29867 13:57:47.137398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip>
29868 13:57:47.137886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip
29870 13:57:47.169088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip>
29871 13:57:47.169483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip
29873 13:57:47.200037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass>
29874 13:57:47.200444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass
29876 13:57:47.231501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip>
29877 13:57:47.231964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip
29879 13:57:47.262450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip>
29880 13:57:47.262920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip
29882 13:57:47.293774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass>
29883 13:57:47.294238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass
29885 13:57:47.325561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip
29887 13:57:47.326035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip>
29888 13:57:47.360412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip>
29889 13:57:47.360914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip
29891 13:57:47.393448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass
29893 13:57:47.394061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass>
29894 13:57:47.424836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip
29896 13:57:47.425374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip>
29897 13:57:47.456127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip>
29898 13:57:47.456549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip
29900 13:57:47.487351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass>
29901 13:57:47.487762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass
29903 13:57:47.518221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip>
29904 13:57:47.518705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip
29906 13:57:47.549784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip>
29907 13:57:47.550244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip
29909 13:57:47.581221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass>
29910 13:57:47.581679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass
29912 13:57:47.614314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip
29914 13:57:47.614781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip>
29915 13:57:47.645259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip
29917 13:57:47.645832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip>
29918 13:57:47.676204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass
29920 13:57:47.676768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass>
29921 13:57:47.707633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip>
29922 13:57:47.708085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip
29924 13:57:47.738229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip>
29925 13:57:47.738686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip
29927 13:57:47.769274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass>
29928 13:57:47.769698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass
29930 13:57:47.800954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip>
29931 13:57:47.801426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip
29933 13:57:47.832214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip>
29934 13:57:47.832676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip
29936 13:57:47.863530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass>
29937 13:57:47.863989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass
29939 13:57:47.894465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip
29941 13:57:47.895040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip>
29942 13:57:47.925659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip
29944 13:57:47.926100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip>
29945 13:57:47.957692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass>
29946 13:57:47.958107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass
29948 13:57:47.989434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip>
29949 13:57:47.989940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip
29951 13:57:48.021635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip>
29952 13:57:48.022128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip
29954 13:57:48.053322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass>
29955 13:57:48.053793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass
29957 13:57:48.084691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip>
29958 13:57:48.085144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip
29960 13:57:48.116474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip
29962 13:57:48.117118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip>
29963 13:57:48.148057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass>
29964 13:57:48.148492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass
29966 13:57:48.180327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip>
29967 13:57:48.180738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip
29969 13:57:48.212962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip
29971 13:57:48.213609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip>
29972 13:57:48.244674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass>
29973 13:57:48.245133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass
29975 13:57:48.276040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip>
29976 13:57:48.276493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip
29978 13:57:48.307256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip
29980 13:57:48.307799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip>
29981 13:57:48.337941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass>
29982 13:57:48.338420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass
29984 13:57:48.369857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip>
29985 13:57:48.370280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip
29987 13:57:48.401349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip>
29988 13:57:48.401826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip
29990 13:57:48.432451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass>
29991 13:57:48.432916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass
29993 13:57:48.464288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip
29995 13:57:48.464843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip>
29996 13:57:48.495626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip
29998 13:57:48.496050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip>
29999 13:57:48.526225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass
30001 13:57:48.526787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass>
30002 13:57:48.556848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip>
30003 13:57:48.557315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip
30005 13:57:48.588622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip
30007 13:57:48.589184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip>
30008 13:57:48.620218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass
30010 13:57:48.620639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass>
30011 13:57:48.651725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip
30013 13:57:48.652148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip>
30014 13:57:48.682743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip>
30015 13:57:48.683159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip
30017 13:57:48.714234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass
30019 13:57:48.714650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass>
30020 13:57:48.745166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip
30022 13:57:48.745637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip>
30023 13:57:48.776634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip>
30024 13:57:48.777040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip
30026 13:57:48.809287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass>
30027 13:57:48.809848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass
30029 13:57:48.841438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip>
30030 13:57:48.841928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip
30032 13:57:48.873632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip
30034 13:57:48.874079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip>
30035 13:57:48.904946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass>
30036 13:57:48.905363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass
30038 13:57:48.936799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip>
30039 13:57:48.937197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip
30041 13:57:48.968964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip
30043 13:57:48.969414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip>
30044 13:57:49.000538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass>
30045 13:57:49.000969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass
30047 13:57:49.033168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip
30049 13:57:49.033612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip>
30050 13:57:49.064822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip
30052 13:57:49.065256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip>
30053 13:57:49.096480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass>
30054 13:57:49.096905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass
30056 13:57:49.128166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip
30058 13:57:49.128723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip>
30059 13:57:49.159330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip
30061 13:57:49.159870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip>
30062 13:57:49.190383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass
30064 13:57:49.190916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass>
30065 13:57:49.221722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip
30067 13:57:49.222268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip>
30068 13:57:49.252931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip>
30069 13:57:49.253328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip
30071 13:57:49.284085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass
30073 13:57:49.284520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass>
30074 13:57:49.314721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip
30076 13:57:49.315164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip>
30077 13:57:49.345459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip>
30078 13:57:49.345886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip
30080 13:57:49.376974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass
30082 13:57:49.377370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass>
30083 13:57:49.408945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip
30085 13:57:49.409520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip>
30086 13:57:49.441307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip
30088 13:57:49.441868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip>
30089 13:57:49.473139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass>
30090 13:57:49.473610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass
30092 13:57:49.520633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip
30094 13:57:49.521222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip>
30095 13:57:49.563900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip>
30096 13:57:49.564332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip
30098 13:57:49.600050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass
30100 13:57:49.600531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass>
30101 13:57:49.635785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip>
30102 13:57:49.636147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip
30104 13:57:49.670441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip>
30105 13:57:49.670929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip
30107 13:57:49.702257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass>
30108 13:57:49.702755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass
30110 13:57:49.734584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip>
30111 13:57:49.735055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip
30113 13:57:49.766670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip>
30114 13:57:49.767086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip
30116 13:57:49.798297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass
30118 13:57:49.798759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass>
30119 13:57:49.830142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip>
30120 13:57:49.830573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip
30122 13:57:49.863599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip>
30123 13:57:49.864037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip
30125 13:57:49.896009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass>
30126 13:57:49.896448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass
30128 13:57:49.928386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip>
30129 13:57:49.928808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip
30131 13:57:49.960062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip>
30132 13:57:49.960462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip
30134 13:57:49.992416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass>
30135 13:57:49.992885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass
30137 13:57:50.027851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip>
30138 13:57:50.028246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip
30140 13:57:50.060293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip
30142 13:57:50.060696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip>
30143 13:57:50.092609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass>
30144 13:57:50.093057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass
30146 13:57:50.124734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip
30148 13:57:50.125328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip>
30149 13:57:50.156774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip>
30150 13:57:50.157240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip
30152 13:57:50.188568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass>
30153 13:57:50.189048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass
30155 13:57:50.229457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip>
30156 13:57:50.229955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip
30158 13:57:50.263933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip
30160 13:57:50.264390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip>
30161 13:57:50.295654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass>
30162 13:57:50.296081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass
30164 13:57:50.327457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip>
30165 13:57:50.327920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip
30167 13:57:50.359202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip
30169 13:57:50.359809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip>
30170 13:57:50.391372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass
30172 13:57:50.391919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass>
30173 13:57:50.422951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip>
30174 13:57:50.423404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip
30176 13:57:50.454454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip>
30177 13:57:50.454939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip
30179 13:57:50.485253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass>
30180 13:57:50.485683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass
30182 13:57:50.516945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip
30184 13:57:50.517399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip>
30185 13:57:50.548512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip
30187 13:57:50.548957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip>
30188 13:57:50.579930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass>
30189 13:57:50.580401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass
30191 13:57:50.611589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip
30193 13:57:50.612028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip>
30194 13:57:50.643210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip
30196 13:57:50.643651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip>
30197 13:57:50.674483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass>
30198 13:57:50.674947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass
30200 13:57:50.707754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip>
30201 13:57:50.708225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip
30203 13:57:50.740031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip>
30204 13:57:50.740502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip
30206 13:57:50.771695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass
30208 13:57:50.772251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass>
30209 13:57:50.803203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip
30211 13:57:50.803747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip>
30212 13:57:50.834290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip>
30213 13:57:50.834764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip
30215 13:57:50.865778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass>
30216 13:57:50.866248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass
30218 13:57:50.898035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip>
30219 13:57:50.898519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip
30221 13:57:50.932490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip
30223 13:57:50.933061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip>
30224 13:57:50.964681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass>
30225 13:57:50.965160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass
30227 13:57:50.998756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip>
30228 13:57:50.999234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip
30230 13:57:51.033155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip>
30231 13:57:51.033573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip
30233 13:57:51.068091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass
30235 13:57:51.068639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass>
30236 13:57:51.101345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip>
30237 13:57:51.101678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip
30239 13:57:51.133831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip>
30240 13:57:51.134267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip
30242 13:57:51.165668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass
30244 13:57:51.166268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass>
30245 13:57:51.197322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip>
30246 13:57:51.197761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip
30248 13:57:51.229272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip
30250 13:57:51.229847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip>
30251 13:57:51.261224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass>
30252 13:57:51.261671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass
30254 13:57:51.293132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip>
30255 13:57:51.293561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip
30257 13:57:51.324624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip
30259 13:57:51.325180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip>
30260 13:57:51.355957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass>
30261 13:57:51.356433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass
30263 13:57:51.386942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip
30265 13:57:51.387519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip>
30266 13:57:51.418453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip>
30267 13:57:51.418862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip
30269 13:57:51.449789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass
30271 13:57:51.450232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass>
30272 13:57:51.481543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip>
30273 13:57:51.481926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip
30275 13:57:51.513355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip
30277 13:57:51.513807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip>
30278 13:57:51.544826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass
30280 13:57:51.545422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass>
30281 13:57:51.576154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip>
30282 13:57:51.576624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip
30284 13:57:51.607904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip
30286 13:57:51.608465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip>
30287 13:57:51.638733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass>
30288 13:57:51.639122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass
30290 13:57:51.669190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip>
30291 13:57:51.669610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip
30293 13:57:51.700375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip
30295 13:57:51.700811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip>
30296 13:57:51.732084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass>
30297 13:57:51.732518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass
30299 13:57:51.763244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip
30301 13:57:51.763699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip>
30302 13:57:51.794039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip>
30303 13:57:51.794475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip
30305 13:57:51.824983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass
30307 13:57:51.825447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass>
30308 13:57:51.855934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip>
30309 13:57:51.856351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip
30311 13:57:51.886651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip
30313 13:57:51.887109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip>
30314 13:57:51.917868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass>
30315 13:57:51.918307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass
30317 13:57:51.948900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip
30319 13:57:51.949356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip>
30320 13:57:51.982604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip>
30321 13:57:51.983032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip
30323 13:57:52.014158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass>
30324 13:57:52.014598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass
30326 13:57:52.055918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip>
30327 13:57:52.056392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip
30329 13:57:52.106848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip
30331 13:57:52.107300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip>
30332 13:57:52.138390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass>
30333 13:57:52.138834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass
30335 13:57:52.173260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip>
30336 13:57:52.173702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip
30338 13:57:52.207545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip>
30339 13:57:52.208019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip
30341 13:57:52.245343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass>
30342 13:57:52.245782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass
30344 13:57:52.281064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip>
30345 13:57:52.281488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip
30347 13:57:52.316275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip>
30348 13:57:52.316704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip
30350 13:57:52.349601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass>
30351 13:57:52.350044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass
30353 13:57:52.381381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip
30355 13:57:52.381855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip>
30356 13:57:52.412552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip>
30357 13:57:52.413018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip
30359 13:57:52.443794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass>
30360 13:57:52.444218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass
30362 13:57:52.474624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip>
30363 13:57:52.475048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip
30365 13:57:52.506067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip
30367 13:57:52.506535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip>
30368 13:57:52.537559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass>
30369 13:57:52.538006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass
30371 13:57:52.570735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip>
30372 13:57:52.571169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip
30374 13:57:52.602837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip
30376 13:57:52.603274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip>
30377 13:57:52.634234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass
30379 13:57:52.634649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass>
30380 13:57:52.665506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip>
30381 13:57:52.665992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip
30383 13:57:52.699187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip
30385 13:57:52.699821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip>
30386 13:57:52.730807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass>
30387 13:57:52.731215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass
30389 13:57:52.763882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip>
30390 13:57:52.764372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip
30392 13:57:52.798028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip>
30393 13:57:52.798517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip
30395 13:57:52.830121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass
30397 13:57:52.830694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass>
30398 13:57:52.862617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip>
30399 13:57:52.863047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip
30401 13:57:52.893887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip>
30402 13:57:52.894313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip
30404 13:57:52.926556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass>
30405 13:57:52.926996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass
30407 13:57:52.960667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip>
30408 13:57:52.961133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip
30410 13:57:52.993164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip
30412 13:57:52.993737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip>
30413 13:57:53.025044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass>
30414 13:57:53.025574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass
30416 13:57:53.058123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip>
30417 13:57:53.058582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip
30419 13:57:53.090535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip>
30420 13:57:53.091021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip
30422 13:57:53.129167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass>
30423 13:57:53.129575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass
30425 13:57:53.162056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip
30427 13:57:53.162513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip>
30428 13:57:53.193833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip>
30429 13:57:53.194242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip
30431 13:57:53.225990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass>
30432 13:57:53.226397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass
30434 13:57:53.258095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip
30436 13:57:53.258657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip>
30437 13:57:53.289059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip
30439 13:57:53.289609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip>
30440 13:57:53.320361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass
30442 13:57:53.320890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass>
30443 13:57:53.352287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip
30445 13:57:53.352749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip>
30446 13:57:53.383824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip>
30447 13:57:53.384235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip
30449 13:57:53.414429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass>
30450 13:57:53.414906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass
30452 13:57:53.445496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip>
30453 13:57:53.445981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip
30455 13:57:53.476750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip>
30456 13:57:53.477223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip
30458 13:57:53.508325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass
30460 13:57:53.508769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass>
30461 13:57:53.540173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip>
30462 13:57:53.540637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip
30464 13:57:53.573326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip
30466 13:57:53.573978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip>
30467 13:57:53.605339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass>
30468 13:57:53.605808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass
30470 13:57:53.636773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip
30472 13:57:53.637219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip>
30473 13:57:53.668058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip>
30474 13:57:53.668536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip
30476 13:57:53.699162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass
30478 13:57:53.699782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass>
30479 13:57:53.730574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip
30481 13:57:53.731133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip>
30482 13:57:53.761674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip>
30483 13:57:53.762126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip
30485 13:57:53.793017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass
30487 13:57:53.793478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass>
30488 13:57:53.825492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip>
30489 13:57:53.825952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip
30491 13:57:53.857021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip>
30492 13:57:53.857489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip
30494 13:57:53.888690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass
30496 13:57:53.889238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass>
30497 13:57:53.919412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip>
30498 13:57:53.919804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip
30500 13:57:53.950219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip>
30501 13:57:53.950602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip
30503 13:57:53.981149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass>
30504 13:57:53.981546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass
30506 13:57:54.012761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip
30508 13:57:54.013199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip>
30509 13:57:54.044243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip
30511 13:57:54.044885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip>
30512 13:57:54.075133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass
30514 13:57:54.075695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass>
30515 13:57:54.106645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip>
30516 13:57:54.107144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip
30518 13:57:54.137274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip>
30519 13:57:54.137680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip
30521 13:57:54.168954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass>
30522 13:57:54.169387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass
30524 13:57:54.200596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip>
30525 13:57:54.201010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip
30527 13:57:54.233575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip>
30528 13:57:54.234074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip
30530 13:57:54.264542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass>
30531 13:57:54.264984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass
30533 13:57:54.296836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip>
30534 13:57:54.297318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip
30536 13:57:54.328943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip>
30537 13:57:54.329370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip
30539 13:57:54.361186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass>
30540 13:57:54.361671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass
30542 13:57:54.393097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip>
30543 13:57:54.393577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip
30545 13:57:54.428934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip>
30546 13:57:54.429415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip
30548 13:57:54.461942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass
30550 13:57:54.462351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass>
30551 13:57:54.497726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip>
30552 13:57:54.498106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip
30554 13:57:54.533592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip>
30555 13:57:54.534017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip
30557 13:57:54.569189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass>
30558 13:57:54.569636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass
30560 13:57:54.613275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip>
30561 13:57:54.613693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip
30563 13:57:54.670659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip>
30564 13:57:54.671090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip
30566 13:57:54.705454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass>
30567 13:57:54.705946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass
30569 13:57:54.742254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip>
30570 13:57:54.742788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip
30572 13:57:54.777143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip
30574 13:57:54.777581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip>
30575 13:57:54.812414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass
30577 13:57:54.812738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass>
30578 13:57:54.848443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip
30580 13:57:54.848743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip>
30581 13:57:54.883530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip>
30582 13:57:54.883812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip
30584 13:57:54.918751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass>
30585 13:57:54.919032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass
30587 13:57:54.956309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip>
30588 13:57:54.956755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip
30590 13:57:54.991422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip>
30591 13:57:54.991773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip
30593 13:57:55.025810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass>
30594 13:57:55.026175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass
30596 13:57:55.060927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip>
30597 13:57:55.061411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip
30599 13:57:55.096195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip>
30600 13:57:55.096677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip
30602 13:57:55.132157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass>
30603 13:57:55.132643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass
30605 13:57:55.167772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip>
30606 13:57:55.168252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip
30608 13:57:55.202846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip
30610 13:57:55.203448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip>
30611 13:57:55.237259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass
30613 13:57:55.237777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass>
30614 13:57:55.272269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip>
30615 13:57:55.272641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip
30617 13:57:55.307894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip
30619 13:57:55.308385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip>
30620 13:57:55.342286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass>
30621 13:57:55.342640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass
30623 13:57:55.377421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip>
30624 13:57:55.377909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip
30626 13:57:55.416172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip
30628 13:57:55.416749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip>
30629 13:57:55.451600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass>
30630 13:57:55.452083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass
30632 13:57:55.471314 <47>[ 305.439100] systemd-journald[111]: Sent WATCHDOG=1 notification.
30633 13:57:55.492894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip
30635 13:57:55.493346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip>
30636 13:57:55.528216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip
30638 13:57:55.528775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip>
30639 13:57:55.563829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass
30641 13:57:55.564307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass>
30642 13:57:55.599349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip
30644 13:57:55.599822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip>
30645 13:57:55.636556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip
30647 13:57:55.637126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip>
30648 13:57:55.672285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass
30650 13:57:55.672859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass>
30651 13:57:55.707600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip>
30652 13:57:55.708087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip
30654 13:57:55.742738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip>
30655 13:57:55.743240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip
30657 13:57:55.778386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass
30659 13:57:55.778943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass>
30660 13:57:55.813630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip>
30661 13:57:55.814051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip
30663 13:57:55.848434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip>
30664 13:57:55.848845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip
30666 13:57:55.883296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass
30668 13:57:55.883949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass>
30669 13:57:55.925077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip
30671 13:57:55.925510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip>
30672 13:57:55.960630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip>
30673 13:57:55.961053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip
30675 13:57:55.996673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass
30677 13:57:55.997224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass>
30678 13:57:56.032730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip
30680 13:57:56.033173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip>
30681 13:57:56.069179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip>
30682 13:57:56.069590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip
30684 13:57:56.104350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass
30686 13:57:56.104905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass>
30687 13:57:56.139332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip>
30688 13:57:56.139797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip
30690 13:57:56.174042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip
30692 13:57:56.174484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip>
30693 13:57:56.209712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass>
30694 13:57:56.210176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass
30696 13:57:56.244932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip>
30697 13:57:56.245290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip
30699 13:57:56.281279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip
30701 13:57:56.281726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip>
30702 13:57:56.316295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass>
30703 13:57:56.316693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass
30705 13:57:56.353096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip
30707 13:57:56.353561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip>
30708 13:57:56.388336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip>
30709 13:57:56.388768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip
30711 13:57:56.424207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass
30713 13:57:56.424664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass>
30714 13:57:56.460056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip>
30715 13:57:56.460485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip
30717 13:57:56.500451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip>
30718 13:57:56.500952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip
30720 13:57:56.536569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass>
30721 13:57:56.537033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass
30723 13:57:56.571732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip>
30724 13:57:56.572231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip
30726 13:57:56.606971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip
30728 13:57:56.607561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip>
30729 13:57:56.641811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass
30731 13:57:56.642304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass>
30732 13:57:56.678241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip
30734 13:57:56.678701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip>
30735 13:57:56.714562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip
30737 13:57:56.715023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip>
30738 13:57:56.749691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass>
30739 13:57:56.750247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass
30741 13:57:56.786259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip
30743 13:57:56.786729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip>
30744 13:57:56.821742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip
30746 13:57:56.822474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip>
30747 13:57:56.858495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass
30749 13:57:56.858993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass>
30750 13:57:56.899579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip>
30751 13:57:56.899994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip
30753 13:57:56.936627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip>
30754 13:57:56.937013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip
30756 13:57:56.972760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass>
30757 13:57:56.973175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass
30759 13:57:57.009131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip>
30760 13:57:57.009546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip
30762 13:57:57.046506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip>
30763 13:57:57.046902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip
30765 13:57:57.082588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass>
30766 13:57:57.082978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass
30768 13:57:57.120137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip>
30769 13:57:57.120534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip
30771 13:57:57.156229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip>
30772 13:57:57.156660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip
30774 13:57:57.191795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass
30776 13:57:57.192260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass>
30777 13:57:57.228611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip>
30778 13:57:57.228980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip
30780 13:57:57.264815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip>
30781 13:57:57.265236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip
30783 13:57:57.300678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass>
30784 13:57:57.301093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass
30786 13:57:57.336617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip>
30787 13:57:57.337021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip
30789 13:57:57.372453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip>
30790 13:57:57.372818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip
30792 13:57:57.407989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass>
30793 13:57:57.408487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass
30795 13:57:57.443604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip
30797 13:57:57.444170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip>
30798 13:57:57.478412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip
30800 13:57:57.479056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip>
30801 13:57:57.513714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass
30803 13:57:57.514163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass>
30804 13:57:57.548388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip>
30805 13:57:57.548835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip
30807 13:57:57.583678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip>
30808 13:57:57.584141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip
30810 13:57:57.619342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass
30812 13:57:57.619892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass>
30813 13:57:57.654056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip>
30814 13:57:57.654532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip
30816 13:57:57.689534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip
30818 13:57:57.690212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip>
30819 13:57:57.724458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass>
30820 13:57:57.724933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass
30822 13:57:57.759726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip>
30823 13:57:57.760190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip
30825 13:57:57.794074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip>
30826 13:57:57.794542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip
30828 13:57:57.828964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass
30830 13:57:57.829497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass>
30831 13:57:57.864390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip>
30832 13:57:57.864823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip
30834 13:57:57.899742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip>
30835 13:57:57.900323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip
30837 13:57:57.934425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass>
30838 13:57:57.934932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass
30840 13:57:57.969712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip
30842 13:57:57.970164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip>
30843 13:57:58.006033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip>
30844 13:57:58.006516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip
30846 13:57:58.051835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass>
30847 13:57:58.052321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass
30849 13:57:58.098590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip
30851 13:57:58.099254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip>
30852 13:57:58.141848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip
30854 13:57:58.142610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip>
30855 13:57:58.177176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass>
30856 13:57:58.177705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass
30858 13:57:58.212305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip
30860 13:57:58.212774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip>
30861 13:57:58.247901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip>
30862 13:57:58.248282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip
30864 13:57:58.282505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass
30866 13:57:58.282940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass>
30867 13:57:58.317274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip>
30868 13:57:58.317684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip
30870 13:57:58.352726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip>
30871 13:57:58.353149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip
30873 13:57:58.388896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass>
30874 13:57:58.389424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass
30876 13:57:58.424619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip>
30877 13:57:58.425067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip
30879 13:57:58.459994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip>
30880 13:57:58.460472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip
30882 13:57:58.494472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass>
30883 13:57:58.495002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass
30885 13:57:58.529428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip>
30886 13:57:58.529966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip
30888 13:57:58.564658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip
30890 13:57:58.565300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip>
30891 13:57:58.600292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass>
30892 13:57:58.600779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass
30894 13:57:58.635988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip
30896 13:57:58.636477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip>
30897 13:57:58.671896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip
30899 13:57:58.672363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip>
30900 13:57:58.706765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass>
30901 13:57:58.707210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass
30903 13:57:58.742813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip
30905 13:57:58.743272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip>
30906 13:57:58.779029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip
30908 13:57:58.779509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip>
30909 13:57:58.813726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass
30911 13:57:58.814338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass>
30912 13:57:58.848421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip
30914 13:57:58.848983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip>
30915 13:57:58.883115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip
30917 13:57:58.883713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip>
30918 13:57:58.917559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass>
30919 13:57:58.918040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass
30921 13:57:58.952297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip>
30922 13:57:58.952745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip
30924 13:57:58.987931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip
30926 13:57:58.988495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip>
30927 13:57:59.022531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass>
30928 13:57:59.023061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass
30930 13:57:59.058280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip>
30931 13:57:59.058755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip
30933 13:57:59.093404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip
30935 13:57:59.093962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip>
30936 13:57:59.129315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass>
30937 13:57:59.129699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass
30939 13:57:59.164332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip
30941 13:57:59.164808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip>
30942 13:57:59.199580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip>
30943 13:57:59.199944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip
30945 13:57:59.234362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass>
30946 13:57:59.234940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass
30948 13:57:59.269020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip>
30949 13:57:59.269499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip
30951 13:57:59.304116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip>
30952 13:57:59.304594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip
30954 13:57:59.340049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass>
30955 13:57:59.340499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass
30957 13:57:59.376365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip
30959 13:57:59.376990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip>
30960 13:57:59.411341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip
30962 13:57:59.411889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip>
30963 13:57:59.447346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass
30965 13:57:59.447818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass>
30966 13:57:59.489275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip
30968 13:57:59.489901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip>
30969 13:57:59.525202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip
30971 13:57:59.525669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip>
30972 13:57:59.560673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass>
30973 13:57:59.561155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass
30975 13:57:59.596631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip>
30976 13:57:59.597031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip
30978 13:57:59.632991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip
30980 13:57:59.633620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip>
30981 13:57:59.668119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass
30983 13:57:59.668651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass>
30984 13:57:59.704051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip>
30985 13:57:59.704529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip
30987 13:57:59.741242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip>
30988 13:57:59.741705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip
30990 13:57:59.804164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass>
30991 13:57:59.804687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass
30993 13:57:59.838480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip
30995 13:57:59.839029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip>
30996 13:57:59.872083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip>
30997 13:57:59.872542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip
30999 13:57:59.907774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass>
31000 13:57:59.908255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass
31002 13:57:59.941770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip
31004 13:57:59.942241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip>
31005 13:57:59.975502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip>
31006 13:57:59.975958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip
31008 13:58:00.012725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass
31010 13:58:00.013322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass>
31011 13:58:00.047692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip>
31012 13:58:00.048153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip
31014 13:58:00.081294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip>
31015 13:58:00.081758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip
31017 13:58:00.116160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass
31019 13:58:00.116633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass>
31020 13:58:00.151543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip>
31021 13:58:00.151975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip
31023 13:58:00.185543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip>
31024 13:58:00.185988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip
31026 13:58:00.220988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass>
31027 13:58:00.221466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass
31029 13:58:00.256709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip
31031 13:58:00.257354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip>
31032 13:58:00.291977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip>
31033 13:58:00.292449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip
31035 13:58:00.328474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass>
31036 13:58:00.328866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass
31038 13:58:00.364235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip>
31039 13:58:00.364719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip
31041 13:58:00.405258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip
31043 13:58:00.405899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip>
31044 13:58:00.440571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass>
31045 13:58:00.441013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass
31047 13:58:00.475162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip
31049 13:58:00.475632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip>
31050 13:58:00.511849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip>
31051 13:58:00.512328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip
31053 13:58:00.545236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass>
31054 13:58:00.545705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass
31056 13:58:00.579554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip>
31057 13:58:00.579953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip
31059 13:58:00.615626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip
31061 13:58:00.616295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip>
31062 13:58:00.649416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass>
31063 13:58:00.650000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass
31065 13:58:00.687140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip
31067 13:58:00.687808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip>
31068 13:58:00.726668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip>
31069 13:58:00.727132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip
31071 13:58:00.760361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass>
31072 13:58:00.760831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass
31074 13:58:00.795009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip>
31075 13:58:00.795479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip
31077 13:58:00.830596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip>
31078 13:58:00.831098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip
31080 13:58:00.864118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass>
31081 13:58:00.864630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass
31083 13:58:00.898271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip>
31084 13:58:00.898697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip
31086 13:58:00.932945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip>
31087 13:58:00.933407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip
31089 13:58:00.969000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass>
31090 13:58:00.969470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass
31092 13:58:01.005887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip>
31093 13:58:01.006308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip
31095 13:58:01.056516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip>
31096 13:58:01.057017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip
31098 13:58:01.098459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass>
31099 13:58:01.098916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass
31101 13:58:01.138032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip
31103 13:58:01.138660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip>
31104 13:58:01.170506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip
31106 13:58:01.171093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip>
31107 13:58:01.211261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass>
31108 13:58:01.211694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass
31110 13:58:01.243948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip>
31111 13:58:01.244384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip
31113 13:58:01.276957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip>
31114 13:58:01.277440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip
31116 13:58:01.316238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass>
31117 13:58:01.316732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass
31119 13:58:01.348907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip>
31120 13:58:01.349400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip
31122 13:58:01.385214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip
31124 13:58:01.385876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip>
31125 13:58:01.420383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass>
31126 13:58:01.420845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass
31128 13:58:01.454007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip>
31129 13:58:01.454401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip
31131 13:58:01.488301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip
31133 13:58:01.488769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip>
31134 13:58:01.525396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass>
31135 13:58:01.525817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass
31137 13:58:01.562298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip>
31138 13:58:01.562739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip
31140 13:58:01.600162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip>
31141 13:58:01.600623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip
31143 13:58:01.634710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass>
31144 13:58:01.635138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass
31146 13:58:01.670102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip>
31147 13:58:01.670539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip
31149 13:58:01.708330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip>
31150 13:58:01.708766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip
31152 13:58:01.741090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass>
31153 13:58:01.741522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass
31155 13:58:01.775240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip
31157 13:58:01.775707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip>
31158 13:58:01.811838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip>
31159 13:58:01.812272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip
31161 13:58:01.845428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass>
31162 13:58:01.845874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass
31164 13:58:01.881861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip>
31165 13:58:01.882327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip
31167 13:58:01.917910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip
31169 13:58:01.918372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip>
31170 13:58:01.951806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass
31172 13:58:01.952367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass>
31173 13:58:01.988373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip>
31174 13:58:01.988852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip
31176 13:58:02.022617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip>
31177 13:58:02.023100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip
31179 13:58:02.057391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass>
31180 13:58:02.057890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass
31182 13:58:02.094085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip>
31183 13:58:02.094565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip
31185 13:58:02.129364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip>
31186 13:58:02.129796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip
31188 13:58:02.164819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass>
31189 13:58:02.165298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass
31191 13:58:02.202045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip>
31192 13:58:02.202484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip
31194 13:58:02.236100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip>
31195 13:58:02.236540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip
31197 13:58:02.272071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass>
31198 13:58:02.272535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass
31200 13:58:02.305698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip>
31201 13:58:02.306178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip
31203 13:58:02.339638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip>
31204 13:58:02.340092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip
31206 13:58:02.373348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass>
31207 13:58:02.373831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass
31209 13:58:02.407271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip
31211 13:58:02.407824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip>
31212 13:58:02.442136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip
31214 13:58:02.442712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip>
31215 13:58:02.477198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass>
31216 13:58:02.477719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass
31218 13:58:02.511883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip>
31219 13:58:02.512384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip
31221 13:58:02.548939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip>
31222 13:58:02.549354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip
31224 13:58:02.585260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass
31226 13:58:02.585720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass>
31227 13:58:02.620501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip
31229 13:58:02.620978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip>
31230 13:58:02.656547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip>
31231 13:58:02.657024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip
31233 13:58:02.694323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass
31235 13:58:02.694871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass>
31236 13:58:02.729985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip>
31237 13:58:02.730466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip
31239 13:58:02.768305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip>
31240 13:58:02.768840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip
31242 13:58:02.805445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass
31244 13:58:02.806052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass>
31245 13:58:02.845718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip
31247 13:58:02.846260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip>
31248 13:58:02.884184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip>
31249 13:58:02.884588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip
31251 13:58:02.917968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass>
31252 13:58:02.918395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass
31254 13:58:02.956430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip>
31255 13:58:02.956900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip
31257 13:58:02.995027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip
31259 13:58:02.995654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip>
31260 13:58:03.032761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass
31262 13:58:03.033219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass>
31263 13:58:03.080498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip>
31264 13:58:03.080961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip
31266 13:58:03.132012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip>
31267 13:58:03.132404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip
31269 13:58:03.168483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass
31271 13:58:03.168898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass>
31272 13:58:03.204279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip>
31273 13:58:03.204706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip
31275 13:58:03.239906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip>
31276 13:58:03.240362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip
31278 13:58:03.273775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass
31280 13:58:03.274155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass>
31281 13:58:03.307168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip
31283 13:58:03.307643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip>
31284 13:58:03.341064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip>
31285 13:58:03.341509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip
31287 13:58:03.381084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass>
31288 13:58:03.381532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass
31290 13:58:03.429021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip
31292 13:58:03.429415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip>
31293 13:58:03.465642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip>
31294 13:58:03.466138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip
31296 13:58:03.501353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass
31298 13:58:03.502036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass>
31299 13:58:03.537529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip>
31300 13:58:03.538080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip
31302 13:58:03.574013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip>
31303 13:58:03.574514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip
31305 13:58:03.610569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass>
31306 13:58:03.611012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass
31308 13:58:03.646176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip
31310 13:58:03.646627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip>
31311 13:58:03.681124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip>
31312 13:58:03.681619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip
31314 13:58:03.719761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass>
31315 13:58:03.720240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass
31317 13:58:03.758640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip
31319 13:58:03.759311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip>
31320 13:58:03.798113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip
31322 13:58:03.798745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip>
31323 13:58:03.835794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass>
31324 13:58:03.836227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass
31326 13:58:03.872408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip>
31327 13:58:03.872821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip
31329 13:58:03.908737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip>
31330 13:58:03.909231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip
31332 13:58:03.944934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass
31334 13:58:03.945404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass>
31335 13:58:03.981129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip
31337 13:58:03.981789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip>
31338 13:58:04.016255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip>
31339 13:58:04.016631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip
31341 13:58:04.053984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass>
31342 13:58:04.054439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass
31344 13:58:04.092833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip
31346 13:58:04.093313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip>
31347 13:58:04.129528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip>
31348 13:58:04.129965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip
31350 13:58:04.166663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass>
31351 13:58:04.167066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass
31353 13:58:04.205684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip>
31354 13:58:04.206000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip
31356 13:58:04.241187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip
31358 13:58:04.241511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip>
31359 13:58:04.276276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass
31361 13:58:04.276724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass>
31362 13:58:04.310811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip>
31363 13:58:04.311171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip
31365 13:58:04.346125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip>
31366 13:58:04.346482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip
31368 13:58:04.381104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass
31370 13:58:04.381387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass>
31371 13:58:04.417029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip>
31372 13:58:04.417319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip
31374 13:58:04.452234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip
31376 13:58:04.452654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip>
31377 13:58:04.486941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass
31379 13:58:04.487408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass>
31380 13:58:04.522190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip>
31381 13:58:04.522589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip
31383 13:58:04.556769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip>
31384 13:58:04.557185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip
31386 13:58:04.592678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass
31388 13:58:04.593131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass>
31389 13:58:04.628178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip>
31390 13:58:04.628640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip
31392 13:58:04.663335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip
31394 13:58:04.663883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip>
31395 13:58:04.699777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass>
31396 13:58:04.700256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass
31398 13:58:04.734417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip
31400 13:58:04.734830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip>
31401 13:58:04.768980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip>
31402 13:58:04.769282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip
31404 13:58:04.804453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass
31406 13:58:04.804793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass>
31407 13:58:04.839964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip>
31408 13:58:04.840503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip
31410 13:58:04.904004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip
31412 13:58:04.904377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip>
31413 13:58:04.947931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass>
31414 13:58:04.948324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass
31416 13:58:04.980339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip
31418 13:58:04.980900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip>
31419 13:58:05.012791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip>
31420 13:58:05.013277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip
31422 13:58:05.044730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass
31424 13:58:05.045315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass>
31425 13:58:05.077147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip>
31426 13:58:05.077617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip
31428 13:58:05.109470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip>
31429 13:58:05.109932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip
31431 13:58:05.141897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass
31433 13:58:05.142464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass>
31434 13:58:05.173244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip>
31435 13:58:05.173700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip
31437 13:58:05.205242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip>
31438 13:58:05.205694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip
31440 13:58:05.236902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass
31442 13:58:05.237458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass>
31443 13:58:05.268224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip>
31444 13:58:05.268669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip
31446 13:58:05.300013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip>
31447 13:58:05.300462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip
31449 13:58:05.332370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass
31451 13:58:05.332914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass>
31452 13:58:05.364522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip
31454 13:58:05.365086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip>
31455 13:58:05.396269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip>
31456 13:58:05.396722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip
31458 13:58:05.428025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass
31460 13:58:05.428681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass>
31461 13:58:05.458733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip>
31462 13:58:05.459215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip
31464 13:58:05.491010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip
31466 13:58:05.491561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip>
31467 13:58:05.523719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass>
31468 13:58:05.524232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass
31470 13:58:05.555623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip
31472 13:58:05.556182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip>
31473 13:58:05.586744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip>
31474 13:58:05.587232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip
31476 13:58:05.618326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass>
31477 13:58:05.618816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass
31479 13:58:05.650543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip
31481 13:58:05.651150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip>
31482 13:58:05.683685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip
31484 13:58:05.684125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip>
31485 13:58:05.715646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass
31487 13:58:05.716027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass>
31488 13:58:05.748312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip
31490 13:58:05.748861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip>
31491 13:58:05.782634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip>
31492 13:58:05.783107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip
31494 13:58:05.817323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass>
31495 13:58:05.817765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass
31497 13:58:05.852884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip
31499 13:58:05.853520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip>
31500 13:58:05.888554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip
31502 13:58:05.889190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip>
31503 13:58:05.925002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass
31505 13:58:05.925471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass>
31506 13:58:05.961686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip>
31507 13:58:05.962243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip
31509 13:58:05.996279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip>
31510 13:58:05.996867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip
31512 13:58:06.029104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass>
31513 13:58:06.029580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass
31515 13:58:06.062522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip>
31516 13:58:06.063092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip
31518 13:58:06.096129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip
31520 13:58:06.096558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip>
31521 13:58:06.129878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass
31523 13:58:06.130294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass>
31524 13:58:06.164017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip>
31525 13:58:06.164413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip
31527 13:58:06.214419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip>
31528 13:58:06.214805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip
31530 13:58:06.267067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass
31532 13:58:06.267802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass>
31533 13:58:06.300229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip>
31534 13:58:06.300693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip
31536 13:58:06.331944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip
31538 13:58:06.332522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip>
31539 13:58:06.363834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass>
31540 13:58:06.364307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass
31542 13:58:06.395732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip>
31543 13:58:06.396191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip
31545 13:58:06.428656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip
31547 13:58:06.429406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip>
31548 13:58:06.460409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass
31550 13:58:06.460962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass>
31551 13:58:06.493378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip
31553 13:58:06.493811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip>
31554 13:58:06.526002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip>
31555 13:58:06.526465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip
31557 13:58:06.557393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass>
31558 13:58:06.557867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass
31560 13:58:06.589426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip>
31561 13:58:06.589866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip
31563 13:58:06.622160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip>
31564 13:58:06.622623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip
31566 13:58:06.654428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass>
31567 13:58:06.654861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass
31569 13:58:06.686517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip>
31570 13:58:06.686889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip
31572 13:58:06.718670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip>
31573 13:58:06.719087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip
31575 13:58:06.751180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass
31577 13:58:06.751646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass>
31578 13:58:06.783874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip>
31579 13:58:06.784281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip
31581 13:58:06.815229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip
31583 13:58:06.815654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip>
31584 13:58:06.846678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass>
31585 13:58:06.847062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass
31587 13:58:06.880037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip>
31588 13:58:06.880460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip
31590 13:58:06.914065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip
31592 13:58:06.914490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip>
31593 13:58:06.945926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass
31595 13:58:06.946352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass>
31596 13:58:06.977437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip
31598 13:58:06.977962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip>
31599 13:58:07.009053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip>
31600 13:58:07.009486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip
31602 13:58:07.041302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass>
31603 13:58:07.041772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass
31605 13:58:07.073306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip
31607 13:58:07.073880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip>
31608 13:58:07.105402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip>
31609 13:58:07.105881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip
31611 13:58:07.139762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass
31613 13:58:07.140373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass>
31614 13:58:07.174052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip
31616 13:58:07.174586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip>
31617 13:58:07.206635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip>
31618 13:58:07.207082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip
31620 13:58:07.238501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass>
31621 13:58:07.238960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass
31623 13:58:07.271119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip
31625 13:58:07.271778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip>
31626 13:58:07.303803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip>
31627 13:58:07.304255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip
31629 13:58:07.335419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass
31631 13:58:07.335949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass>
31632 13:58:07.367720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip>
31633 13:58:07.368092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip
31635 13:58:07.399907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip>
31636 13:58:07.400281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip
31638 13:58:07.431104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass
31640 13:58:07.431561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass>
31641 13:58:07.464386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip
31643 13:58:07.464826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip>
31644 13:58:07.496560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip>
31645 13:58:07.496980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip
31647 13:58:07.528553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass>
31648 13:58:07.528983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass
31650 13:58:07.560200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip
31652 13:58:07.560645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip>
31653 13:58:07.592319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip
31655 13:58:07.592765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip>
31656 13:58:07.623955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass>
31657 13:58:07.624384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass
31659 13:58:07.656248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip>
31660 13:58:07.656674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip
31662 13:58:07.688297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip
31664 13:58:07.688741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip>
31665 13:58:07.720393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass>
31666 13:58:07.720807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass
31668 13:58:07.752850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip>
31669 13:58:07.753260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip
31671 13:58:07.787491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip
31673 13:58:07.787936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip>
31674 13:58:07.820274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass>
31675 13:58:07.820839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass
31677 13:58:07.854164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip>
31678 13:58:07.854668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip
31680 13:58:07.886370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip>
31681 13:58:07.886843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip
31683 13:58:07.918187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass>
31684 13:58:07.918644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass
31686 13:58:07.950397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip>
31687 13:58:07.950846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip
31689 13:58:07.982189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip>
31690 13:58:07.982635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip
31692 13:58:08.013579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass>
31693 13:58:08.014009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass
31695 13:58:08.045250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip>
31696 13:58:08.045693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip
31698 13:58:08.081347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip>
31699 13:58:08.081800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip
31701 13:58:08.115016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass>
31702 13:58:08.115458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass
31704 13:58:08.149769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip>
31705 13:58:08.150210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip
31707 13:58:08.184855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip
31709 13:58:08.185503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip>
31710 13:58:08.220107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass>
31711 13:58:08.220541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass
31713 13:58:08.253458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip
31715 13:58:08.254019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip>
31716 13:58:08.285261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip
31718 13:58:08.285714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip>
31719 13:58:08.320954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass
31721 13:58:08.321395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass>
31722 13:58:08.352769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip>
31723 13:58:08.353167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip
31725 13:58:08.384230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip>
31726 13:58:08.384627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip
31728 13:58:08.416117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass
31730 13:58:08.416658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass>
31731 13:58:08.449309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip>
31732 13:58:08.449755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip
31734 13:58:08.483437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip>
31735 13:58:08.483848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip
31737 13:58:08.516133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass>
31738 13:58:08.516600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass
31740 13:58:08.548499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip>
31741 13:58:08.548970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip
31743 13:58:08.580136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip
31745 13:58:08.580664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip>
31746 13:58:08.612790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass
31748 13:58:08.613334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass>
31749 13:58:08.644814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip>
31750 13:58:08.645211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip
31752 13:58:08.677698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip>
31753 13:58:08.678146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip
31755 13:58:08.710439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass
31757 13:58:08.710984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass>
31758 13:58:08.742420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip>
31759 13:58:08.742846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip
31761 13:58:08.774398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip>
31762 13:58:08.774803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip
31764 13:58:08.808275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass
31766 13:58:08.808704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass>
31767 13:58:08.841024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip>
31768 13:58:08.841486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip
31770 13:58:08.873367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip>
31771 13:58:08.873828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip
31773 13:58:08.904525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass
31775 13:58:08.905228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass>
31776 13:58:08.937148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip>
31777 13:58:08.937680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip
31779 13:58:08.969841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip
31781 13:58:08.970281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip>
31782 13:58:09.000976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass>
31783 13:58:09.001451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass
31785 13:58:09.032647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip>
31786 13:58:09.033119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip
31788 13:58:09.064812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip>
31789 13:58:09.065264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip
31791 13:58:09.096572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass>
31792 13:58:09.097051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass
31794 13:58:09.128925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip
31796 13:58:09.129371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip>
31797 13:58:09.161981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip>
31798 13:58:09.162449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip
31800 13:58:09.194084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass
31802 13:58:09.194676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass>
31803 13:58:09.228497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip>
31804 13:58:09.229006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip
31806 13:58:09.263400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip
31808 13:58:09.264008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip>
31809 13:58:09.297320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass>
31810 13:58:09.297734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass
31812 13:58:09.330230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip>
31813 13:58:09.330638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip
31815 13:58:09.362322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip
31817 13:58:09.362959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip>
31818 13:58:09.393818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass>
31819 13:58:09.394314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass
31821 13:58:09.425397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip>
31822 13:58:09.425915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip
31824 13:58:09.459571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip
31826 13:58:09.460336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip>
31827 13:58:09.491581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass>
31828 13:58:09.492043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass
31830 13:58:09.523596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip
31832 13:58:09.524153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip>
31833 13:58:09.556162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip
31835 13:58:09.556727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip>
31836 13:58:09.588037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass
31838 13:58:09.588484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass>
31839 13:58:09.620251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip
31841 13:58:09.620804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip>
31842 13:58:09.652176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip
31844 13:58:09.652723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip>
31845 13:58:09.683871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass>
31846 13:58:09.684330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass
31848 13:58:09.715540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip>
31849 13:58:09.716001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip
31851 13:58:09.747519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip>
31852 13:58:09.747995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip
31854 13:58:09.779173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass
31856 13:58:09.779768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass>
31857 13:58:09.810764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip
31859 13:58:09.811316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip>
31860 13:58:09.842797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip
31862 13:58:09.843380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip>
31863 13:58:09.874625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass>
31864 13:58:09.875080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass
31866 13:58:09.907139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip
31868 13:58:09.907749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip>
31869 13:58:09.938721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip>
31870 13:58:09.939183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip
31872 13:58:09.971119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass
31874 13:58:09.971704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass>
31875 13:58:10.024008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip>
31876 13:58:10.024406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip
31878 13:58:10.055618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip>
31879 13:58:10.056014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip
31881 13:58:10.089713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass
31883 13:58:10.090157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass>
31884 13:58:10.124658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip>
31885 13:58:10.125048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip
31887 13:58:10.156116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip>
31888 13:58:10.156601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip
31890 13:58:10.188076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass>
31891 13:58:10.188534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass
31893 13:58:10.219683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip>
31894 13:58:10.220128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip
31896 13:58:10.251663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip>
31897 13:58:10.252093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip
31899 13:58:10.283853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass
31901 13:58:10.284391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass>
31902 13:58:10.318889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip
31904 13:58:10.319454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip>
31905 13:58:10.352033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip
31907 13:58:10.352581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip>
31908 13:58:10.383799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass
31910 13:58:10.384340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass>
31911 13:58:10.415647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip
31913 13:58:10.416260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip>
31914 13:58:10.447310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip
31916 13:58:10.447735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip>
31917 13:58:10.478790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass>
31918 13:58:10.479199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass
31920 13:58:10.511179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip
31922 13:58:10.511614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip>
31923 13:58:10.543252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip
31925 13:58:10.543856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip>
31926 13:58:10.574336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass>
31927 13:58:10.574772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass
31929 13:58:10.607459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip>
31930 13:58:10.607844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip
31932 13:58:10.639659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip>
31933 13:58:10.640113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip
31935 13:58:10.671553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass
31937 13:58:10.672126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass>
31938 13:58:10.703778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip>
31939 13:58:10.704187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip
31941 13:58:10.735577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip>
31942 13:58:10.735992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip
31944 13:58:10.766660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass>
31945 13:58:10.767052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass
31947 13:58:10.799244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip
31949 13:58:10.799634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip>
31950 13:58:10.831649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip
31952 13:58:10.832213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip>
31953 13:58:10.862781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass
31955 13:58:10.863180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass>
31956 13:58:10.893793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip>
31957 13:58:10.894257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip
31959 13:58:10.925480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip
31961 13:58:10.926059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip>
31962 13:58:10.958594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass
31964 13:58:10.959023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass>
31965 13:58:10.990300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip>
31966 13:58:10.990760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip
31968 13:58:11.024109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip>
31969 13:58:11.024549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip
31971 13:58:11.056941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass>
31972 13:58:11.057510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass
31974 13:58:11.092870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip>
31975 13:58:11.093415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip
31977 13:58:11.131175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip
31979 13:58:11.131754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip>
31980 13:58:11.167895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass>
31981 13:58:11.168346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass
31983 13:58:11.200445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip>
31984 13:58:11.200892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip
31986 13:58:11.232830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip>
31987 13:58:11.233221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip
31989 13:58:11.264738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass>
31990 13:58:11.265085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass
31992 13:58:11.299936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip
31994 13:58:11.300315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip>
31995 13:58:11.333205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip>
31996 13:58:11.333611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip
31998 13:58:11.367556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass
32000 13:58:11.367949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass>
32001 13:58:11.410931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip
32003 13:58:11.411406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip>
32004 13:58:11.454572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip>
32005 13:58:11.454998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip
32007 13:58:11.488076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass
32009 13:58:11.488506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass>
32010 13:58:11.520159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip>
32011 13:58:11.520533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip
32013 13:58:11.555527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip>
32014 13:58:11.555890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip
32016 13:58:11.596528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass
32018 13:58:11.597184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass>
32019 13:58:11.630812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip>
32020 13:58:11.631231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip
32022 13:58:11.664299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip>
32023 13:58:11.664781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip
32025 13:58:11.700440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass>
32026 13:58:11.700913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass
32028 13:58:11.734164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip>
32029 13:58:11.734580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip
32031 13:58:11.767978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip>
32032 13:58:11.768432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip
32034 13:58:11.803590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass>
32035 13:58:11.804106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass
32037 13:58:11.839151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip
32039 13:58:11.839734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip>
32040 13:58:11.874090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip>
32041 13:58:11.874507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip
32043 13:58:11.910111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass>
32044 13:58:11.910574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass
32046 13:58:11.945831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip
32048 13:58:11.946369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip>
32049 13:58:11.983268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip
32051 13:58:11.983849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip>
32052 13:58:12.017777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass>
32053 13:58:12.018249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass
32055 13:58:12.052529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip
32057 13:58:12.053139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip>
32058 13:58:12.089365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip
32060 13:58:12.089919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip>
32061 13:58:12.124510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass>
32062 13:58:12.124950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass
32064 13:58:12.160045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip>
32065 13:58:12.160443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip
32067 13:58:12.195251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip
32069 13:58:12.195704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip>
32070 13:58:12.229346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass
32072 13:58:12.229829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass>
32073 13:58:12.263677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip>
32074 13:58:12.264116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip
32076 13:58:12.299061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip
32078 13:58:12.299618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip>
32079 13:58:12.334075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass
32081 13:58:12.334503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass>
32082 13:58:12.369359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip>
32083 13:58:12.369783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip
32085 13:58:12.404057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip>
32086 13:58:12.404458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip
32088 13:58:12.438092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass
32090 13:58:12.438592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass>
32091 13:58:12.472396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip>
32092 13:58:12.472811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip
32094 13:58:12.506136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip>
32095 13:58:12.506546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip
32097 13:58:12.540315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass>
32098 13:58:12.540735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass
32100 13:58:12.574242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip
32102 13:58:12.574862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip>
32103 13:58:12.609006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip>
32104 13:58:12.609460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip
32106 13:58:12.642868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass>
32107 13:58:12.643279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass
32109 13:58:12.676948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip>
32110 13:58:12.677361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip
32112 13:58:12.710758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip>
32113 13:58:12.711215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip
32115 13:58:12.744559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass>
32116 13:58:12.745002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass
32118 13:58:12.778605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip>
32119 13:58:12.779052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip
32121 13:58:12.813312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip>
32122 13:58:12.813688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip
32124 13:58:12.846373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass
32126 13:58:12.846835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass>
32127 13:58:12.879516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip>
32128 13:58:12.879926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip
32130 13:58:12.913154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip>
32131 13:58:12.913535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip
32133 13:58:12.946514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass
32135 13:58:12.947144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass>
32136 13:58:12.980100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip>
32137 13:58:12.980519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip
32139 13:58:13.014406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip>
32140 13:58:13.014841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip
32142 13:58:13.047730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass>
32143 13:58:13.048175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass
32145 13:58:13.083079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip
32147 13:58:13.083559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip>
32148 13:58:13.122661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip
32150 13:58:13.123136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip>
32151 13:58:13.159991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass
32153 13:58:13.160555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass>
32154 13:58:13.198536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip>
32155 13:58:13.198976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip
32157 13:58:13.237321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip
32159 13:58:13.237800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip>
32160 13:58:13.273510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass>
32161 13:58:13.273937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass
32163 13:58:13.307369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip>
32164 13:58:13.307826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip
32166 13:58:13.341241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip
32168 13:58:13.341693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip>
32169 13:58:13.374603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass
32171 13:58:13.375024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass>
32172 13:58:13.408756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip>
32173 13:58:13.409164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip
32175 13:58:13.443075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip
32177 13:58:13.443539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip>
32178 13:58:13.476586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass>
32179 13:58:13.477056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass
32181 13:58:13.510960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip>
32182 13:58:13.511411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip
32184 13:58:13.545271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip>
32185 13:58:13.545705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip
32187 13:58:13.578988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass
32189 13:58:13.579559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass>
32190 13:58:13.612934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip>
32191 13:58:13.613397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip
32193 13:58:13.648382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip
32195 13:58:13.648938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip>
32196 13:58:13.681385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass>
32197 13:58:13.681882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass
32199 13:58:13.714495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip>
32200 13:58:13.714979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip
32202 13:58:13.748033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip>
32203 13:58:13.748525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip
32205 13:58:13.782035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass>
32206 13:58:13.782535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass
32208 13:58:13.815887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip>
32209 13:58:13.816321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip
32211 13:58:13.849778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip>
32212 13:58:13.850194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip
32214 13:58:13.882455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass
32216 13:58:13.882916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass>
32217 13:58:13.916049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip>
32218 13:58:13.916539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip
32220 13:58:13.949108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip>
32221 13:58:13.949655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip
32223 13:58:13.982089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass
32225 13:58:13.982517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass>
32226 13:58:14.015615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip
32228 13:58:14.016059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip>
32229 13:58:14.048741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip>
32230 13:58:14.049148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip
32232 13:58:14.082821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass>
32233 13:58:14.083236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass
32235 13:58:14.125657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip>
32236 13:58:14.126094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip
32238 13:58:14.160313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip>
32239 13:58:14.160791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip
32241 13:58:14.197319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass
32243 13:58:14.197988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass>
32244 13:58:14.249726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip>
32245 13:58:14.250180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip
32247 13:58:14.309925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip>
32248 13:58:14.310334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip
32250 13:58:14.358444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass>
32251 13:58:14.358907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass
32253 13:58:14.402849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip
32255 13:58:14.403316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip>
32256 13:58:14.444280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip>
32257 13:58:14.444676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip
32259 13:58:14.483156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass
32261 13:58:14.483614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass>
32262 13:58:14.526455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip>
32263 13:58:14.526849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip
32265 13:58:14.573036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip
32267 13:58:14.573416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip>
32268 13:58:14.619792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass>
32269 13:58:14.620183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass
32271 13:58:14.667727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip>
32272 13:58:14.668180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip
32274 13:58:14.708735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip>
32275 13:58:14.709162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip
32277 13:58:14.747954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass>
32278 13:58:14.748397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass
32280 13:58:14.789274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip>
32281 13:58:14.789708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip
32283 13:58:14.827616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip>
32284 13:58:14.827997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip
32286 13:58:14.865628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass>
32287 13:58:14.866079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass
32289 13:58:14.902558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip
32291 13:58:14.902943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip>
32292 13:58:14.936338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip
32294 13:58:14.936786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip>
32295 13:58:14.969399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass>
32296 13:58:14.969819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass
32298 13:58:15.003307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip
32300 13:58:15.003764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip>
32301 13:58:15.037192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip>
32302 13:58:15.037620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip
32304 13:58:15.074318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass
32306 13:58:15.074778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass>
32307 13:58:15.132864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip>
32308 13:58:15.133292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip
32310 13:58:15.171909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip>
32311 13:58:15.172333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip
32313 13:58:15.205263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass>
32314 13:58:15.205693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass
32316 13:58:15.238702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip>
32317 13:58:15.239146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip
32319 13:58:15.272061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip>
32320 13:58:15.272505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip
32322 13:58:15.305206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass
32324 13:58:15.305674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass>
32325 13:58:15.338589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip>
32326 13:58:15.339038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip
32328 13:58:15.372459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip
32330 13:58:15.372903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip>
32331 13:58:15.405852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass>
32332 13:58:15.406320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass
32334 13:58:15.438962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip
32336 13:58:15.439504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip>
32337 13:58:15.472192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip>
32338 13:58:15.472644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip
32340 13:58:15.504991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass>
32341 13:58:15.505397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass
32343 13:58:15.539576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip
32345 13:58:15.540011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip>
32346 13:58:15.573432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip
32348 13:58:15.573893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip>
32349 13:58:15.607782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass>
32350 13:58:15.608246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass
32352 13:58:15.642215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip
32354 13:58:15.642773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip>
32355 13:58:15.677167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip
32357 13:58:15.677757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip>
32358 13:58:15.711726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass
32360 13:58:15.712179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass>
32361 13:58:15.745540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip
32363 13:58:15.745967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip>
32364 13:58:15.779854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip>
32365 13:58:15.780265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip
32367 13:58:15.813797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass>
32368 13:58:15.814270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass
32370 13:58:15.848059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip
32372 13:58:15.848522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip>
32373 13:58:15.882375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip>
32374 13:58:15.882792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip
32376 13:58:15.916478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass
32378 13:58:15.916915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass>
32379 13:58:15.950553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip
32381 13:58:15.950996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip>
32382 13:58:15.984056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip
32384 13:58:15.984495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip>
32385 13:58:16.017205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass>
32386 13:58:16.017631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass
32388 13:58:16.052858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip>
32389 13:58:16.053289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip
32391 13:58:16.088268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip
32393 13:58:16.088737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip>
32394 13:58:16.124442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass>
32395 13:58:16.124975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass
32397 13:58:16.161538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip
32399 13:58:16.162010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip>
32400 13:58:16.197315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip
32402 13:58:16.197691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip>
32403 13:58:16.231539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass>
32404 13:58:16.231935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass
32406 13:58:16.266240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip>
32407 13:58:16.266644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip
32409 13:58:16.300795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip>
32410 13:58:16.301288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip
32412 13:58:16.336067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass>
32413 13:58:16.336558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass
32415 13:58:16.372441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip>
32416 13:58:16.372981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip
32418 13:58:16.408583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip
32420 13:58:16.409028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip>
32421 13:58:16.442077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass>
32422 13:58:16.442509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass
32424 13:58:16.476049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip>
32425 13:58:16.476492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip
32427 13:58:16.510588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip>
32428 13:58:16.511027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip
32430 13:58:16.544306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=pass>
32431 13:58:16.544748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=pass
32433 13:58:16.578675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass>
32434 13:58:16.579145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass
32436 13:58:16.612526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass>
32437 13:58:16.612999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass
32439 13:58:16.646925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass>
32440 13:58:16.647404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass
32442 13:58:16.683107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass
32444 13:58:16.683576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass>
32445 13:58:16.718065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32447 13:58:16.718737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32448 13:58:16.752678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32449 13:58:16.753143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32451 13:58:16.800998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32452 13:58:16.801439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32454 13:58:16.841689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass>
32455 13:58:16.842168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass
32457 13:58:16.884415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass>
32458 13:58:16.884837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass
32460 13:58:16.923716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32461 13:58:16.924150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32463 13:58:16.959281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32465 13:58:16.959749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32466 13:58:16.994417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32468 13:58:16.994869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32469 13:58:17.028971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass>
32470 13:58:17.029393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass
32472 13:58:17.062556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail>
32473 13:58:17.062980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail
32475 13:58:17.096917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail>
32476 13:58:17.097297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail
32478 13:58:17.131201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass
32480 13:58:17.131675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass>
32481 13:58:17.164565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32482 13:58:17.164994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32484 13:58:17.199847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32485 13:58:17.200312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32487 13:58:17.234446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32488 13:58:17.234863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32490 13:58:17.268766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32492 13:58:17.269262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32493 13:58:17.302428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail
32495 13:58:17.302913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail>
32496 13:58:17.336353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32498 13:58:17.337005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32499 13:58:17.370214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32500 13:58:17.370661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32502 13:58:17.403872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32503 13:58:17.404281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32505 13:58:17.437787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32506 13:58:17.438234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32508 13:58:17.472176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32509 13:58:17.472589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32511 13:58:17.508366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32512 13:58:17.508803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32514 13:58:17.545464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32515 13:58:17.545887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32517 13:58:17.580267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32518 13:58:17.580704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32520 13:58:17.614657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32521 13:58:17.615131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32523 13:58:17.649178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32525 13:58:17.649657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32526 13:58:17.689805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32527 13:58:17.690280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32529 13:58:17.724452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32530 13:58:17.724873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32532 13:58:17.758369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=fail>
32533 13:58:17.758809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=fail
32535 13:58:17.792121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail>
32536 13:58:17.792558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail
32538 13:58:17.824806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=fail>
32539 13:58:17.825238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=fail
32541 13:58:17.859140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32543 13:58:17.859701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32544 13:58:17.894042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32545 13:58:17.894487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32547 13:58:17.931746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32548 13:58:17.932164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32550 13:58:17.966224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32551 13:58:17.966646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32553 13:58:18.000188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32554 13:58:18.000590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32556 13:58:18.035802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32558 13:58:18.036457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32559 13:58:18.069903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32560 13:58:18.070374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32562 13:58:18.103855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32563 13:58:18.104258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32565 13:58:18.155703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32566 13:58:18.156127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32568 13:58:18.209318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32570 13:58:18.209798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32571 13:58:18.250727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32572 13:58:18.251178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32574 13:58:18.286799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32575 13:58:18.287266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32577 13:58:18.320362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32578 13:58:18.320837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32580 13:58:18.353917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32581 13:58:18.354353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32583 13:58:18.387255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32585 13:58:18.387864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32586 13:58:18.421503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32587 13:58:18.421998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32589 13:58:18.455520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32590 13:58:18.455981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32592 13:58:18.488357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32593 13:58:18.488777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32595 13:58:18.521118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32596 13:58:18.521538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32598 13:58:18.555913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32599 13:58:18.556345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32601 13:58:18.590715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail>
32602 13:58:18.591133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail
32604 13:58:18.624533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail>
32605 13:58:18.624952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail
32607 13:58:18.659806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=fail>
32608 13:58:18.660242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=fail
32610 13:58:18.692907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
32611 13:58:18.693339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
32613 13:58:18.726338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
32614 13:58:18.726785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
32616 13:58:18.759993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass>
32617 13:58:18.760427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass
32619 13:58:18.794719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass>
32620 13:58:18.795156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass
32622 13:58:18.832030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass>
32623 13:58:18.832473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass
32625 13:58:18.866597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
32626 13:58:18.867047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
32628 13:58:18.902619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail>
32629 13:58:18.903017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail
32631 13:58:18.938069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail>
32632 13:58:18.938470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail
32634 13:58:18.973060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass>
32635 13:58:18.973548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass
32637 13:58:19.008545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail
32639 13:58:19.009168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail>
32640 13:58:19.042961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail
32642 13:58:19.043423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail>
32643 13:58:19.079682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32644 13:58:19.080080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32646 13:58:19.116014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32648 13:58:19.116450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32649 13:58:19.152017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32650 13:58:19.152496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32652 13:58:19.187884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32653 13:58:19.188342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32655 13:58:19.225357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32657 13:58:19.225833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32658 13:58:19.262611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32660 13:58:19.263084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32661 13:58:19.302228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32663 13:58:19.302683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32664 13:58:19.337691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32665 13:58:19.338132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32667 13:58:19.377902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32668 13:58:19.378274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32670 13:58:19.416490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32671 13:58:19.416949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32673 13:58:19.468857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32674 13:58:19.469274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32676 13:58:19.502796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32678 13:58:19.503262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32679 13:58:19.539148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32681 13:58:19.539606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32682 13:58:19.573994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32683 13:58:19.574422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32685 13:58:19.610540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32687 13:58:19.611000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32688 13:58:19.648362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32689 13:58:19.648813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32691 13:58:19.685770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32693 13:58:19.686230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32694 13:58:19.725184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32696 13:58:19.725639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32697 13:58:19.764067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32698 13:58:19.764483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32700 13:58:19.802050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32701 13:58:19.802470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32703 13:58:19.842243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32705 13:58:19.842704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32706 13:58:19.877714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32707 13:58:19.878139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32709 13:58:19.912851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32710 13:58:19.913276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32712 13:58:19.948214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32714 13:58:19.948684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32715 13:58:19.983752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32716 13:58:19.984202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32718 13:58:20.020349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32719 13:58:20.020777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32721 13:58:20.055960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32722 13:58:20.056385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32724 13:58:20.092228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32726 13:58:20.092693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32727 13:58:20.128359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32728 13:58:20.128844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32730 13:58:20.165917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32732 13:58:20.166608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32733 13:58:20.201564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32734 13:58:20.202075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32736 13:58:20.264529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32738 13:58:20.265141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32739 13:58:20.301258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32740 13:58:20.301686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32742 13:58:20.339741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32743 13:58:20.340168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32745 13:58:20.376502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32746 13:58:20.376948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32748 13:58:20.414095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32749 13:58:20.414546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32751 13:58:20.468757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32752 13:58:20.469205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32754 13:58:20.506165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32755 13:58:20.506589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32757 13:58:20.546035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32758 13:58:20.546479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32760 13:58:20.583168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32762 13:58:20.583644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32763 13:58:20.621065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32764 13:58:20.621504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32766 13:58:20.657731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32767 13:58:20.658194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32769 13:58:20.698551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32770 13:58:20.698998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32772 13:58:20.736566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32773 13:58:20.737040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32775 13:58:20.772307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32776 13:58:20.772735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32778 13:58:20.808037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32779 13:58:20.808459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32781 13:58:20.844270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32782 13:58:20.844699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32784 13:58:20.880046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32785 13:58:20.880478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32787 13:58:20.915324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32789 13:58:20.915979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32790 13:58:20.950903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32791 13:58:20.951381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32793 13:58:20.986801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32794 13:58:20.987295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32796 13:58:21.025175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32798 13:58:21.025642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32799 13:58:21.066194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32801 13:58:21.067007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32802 13:58:21.104150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32803 13:58:21.104572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32805 13:58:21.144065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32807 13:58:21.144543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32808 13:58:21.183739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32809 13:58:21.184182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32811 13:58:21.222347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32812 13:58:21.222767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32814 13:58:21.258847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32815 13:58:21.259267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32817 13:58:21.294767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32818 13:58:21.295166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32820 13:58:21.332595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32821 13:58:21.332996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32823 13:58:21.368680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32824 13:58:21.369156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32826 13:58:21.405734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32827 13:58:21.406187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32829 13:58:21.442362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32830 13:58:21.442787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32832 13:58:21.479147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32834 13:58:21.479797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32835 13:58:21.520442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=pass>
32836 13:58:21.520972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=pass
32838 13:58:21.559225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass
32840 13:58:21.559689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass>
32841 13:58:21.595195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass
32843 13:58:21.595664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass>
32844 13:58:21.630444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass>
32845 13:58:21.630882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass
32847 13:58:21.665821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass>
32848 13:58:21.666233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass
32850 13:58:21.700810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass>
32851 13:58:21.701252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass
32853 13:58:21.736410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass>
32854 13:58:21.736901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass
32856 13:58:21.771434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass
32858 13:58:21.772077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass>
32859 13:58:21.806704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass
32861 13:58:21.807336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass>
32862 13:58:21.841840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass
32864 13:58:21.842440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass>
32865 13:58:21.875878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass>
32866 13:58:21.876317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass
32868 13:58:21.912459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass
32870 13:58:21.913012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass>
32871 13:58:21.948375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass>
32872 13:58:21.948834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass
32874 13:58:21.984508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32875 13:58:21.984966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass
32877 13:58:22.020119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass
32879 13:58:22.020710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32880 13:58:22.055622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass
32882 13:58:22.056194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass>
32883 13:58:22.090199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass
32885 13:58:22.090754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass>
32886 13:58:22.124776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass>
32887 13:58:22.125253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass
32889 13:58:22.160092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass>
32890 13:58:22.160523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass
32892 13:58:22.194788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
32893 13:58:22.195266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
32895 13:58:22.231563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass>
32896 13:58:22.232070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass
32898 13:58:22.266423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass
32900 13:58:22.267071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass>
32901 13:58:22.301656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass
32903 13:58:22.302218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass>
32904 13:58:22.337947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass>
32905 13:58:22.338395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass
32907 13:58:22.375244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass
32909 13:58:22.375620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass>
32910 13:58:22.411918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass
32912 13:58:22.412546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass>
32913 13:58:22.448375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass>
32914 13:58:22.448832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass
32916 13:58:22.484742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass
32918 13:58:22.485326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass>
32919 13:58:22.520421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass>
32920 13:58:22.520844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass
32922 13:58:22.557401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass
32924 13:58:22.557868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass>
32925 13:58:22.593404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass
32927 13:58:22.593868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass>
32928 13:58:22.629656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass
32930 13:58:22.630115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass>
32931 13:58:22.667953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32932 13:58:22.668401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass
32934 13:58:22.704804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32935 13:58:22.705215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass
32937 13:58:22.742214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass
32939 13:58:22.742903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass>
32940 13:58:22.778819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass>
32941 13:58:22.779287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass
32943 13:58:22.815161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass
32945 13:58:22.815718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass>
32946 13:58:22.852265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass>
32947 13:58:22.852677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass
32949 13:58:22.889682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
32951 13:58:22.890112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
32952 13:58:22.925511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
32953 13:58:22.925966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
32955 13:58:22.961007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass
32957 13:58:22.961486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass>
32958 13:58:22.997076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
32959 13:58:22.997536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
32961 13:58:23.032619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
32963 13:58:23.033090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
32964 13:58:23.069499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
32965 13:58:23.069943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
32967 13:58:23.106835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
32968 13:58:23.107315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
32970 13:58:23.144167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
32971 13:58:23.144661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
32973 13:58:23.181562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass>
32974 13:58:23.182015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass
32976 13:58:23.218397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
32977 13:58:23.218794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
32979 13:58:23.262050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass
32981 13:58:23.262426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass>
32982 13:58:23.299637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
32983 13:58:23.300088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
32985 13:58:23.336375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass
32987 13:58:23.336920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass>
32988 13:58:23.373519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
32989 13:58:23.373996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
32991 13:58:23.412270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass>
32992 13:58:23.412716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass
32994 13:58:23.450138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
32995 13:58:23.450559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
32997 13:58:23.494337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass>
32998 13:58:23.494777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass
33000 13:58:23.530292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
33001 13:58:23.530718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
33003 13:58:23.566020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass>
33004 13:58:23.566487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass
33006 13:58:23.603071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
33008 13:58:23.603678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
33009 13:58:23.639916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass>
33010 13:58:23.640390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass
33012 13:58:23.677142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
33013 13:58:23.677566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
33015 13:58:23.712575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass>
33016 13:58:23.713061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass
33018 13:58:23.748385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
33019 13:58:23.748852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
33021 13:58:23.784279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass>
33022 13:58:23.784714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass
33024 13:58:23.819567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
33025 13:58:23.820023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
33027 13:58:23.855790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass>
33028 13:58:23.856214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass
33030 13:58:23.890502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
33031 13:58:23.890936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
33033 13:58:23.930173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
33034 13:58:23.930594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
33036 13:58:23.965462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
33037 13:58:23.965910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
33039 13:58:24.000701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
33040 13:58:24.001137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
33042 13:58:24.036304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
33044 13:58:24.036954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
33045 13:58:24.072265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
33046 13:58:24.072747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
33048 13:58:24.108201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
33049 13:58:24.108678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
33051 13:58:24.143768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
33052 13:58:24.144241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
33054 13:58:24.178229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
33055 13:58:24.178695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
33057 13:58:24.212653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
33058 13:58:24.213129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
33060 13:58:24.248540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
33062 13:58:24.249120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
33063 13:58:24.298925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
33065 13:58:24.299485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
33066 13:58:24.352854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass
33068 13:58:24.353451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass>
33069 13:58:24.388562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33070 13:58:24.389043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33072 13:58:24.427199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass
33074 13:58:24.427683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33075 13:58:24.465969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33077 13:58:24.466569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33078 13:58:24.500784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33079 13:58:24.501319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33081 13:58:24.538381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass
33083 13:58:24.538961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33084 13:58:24.577102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33086 13:58:24.577701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33087 13:58:24.613006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33088 13:58:24.613494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33090 13:58:24.648708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33091 13:58:24.649196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass
33093 13:58:24.684910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33094 13:58:24.685435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33096 13:58:24.720428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33098 13:58:24.720909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33099 13:58:24.759632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33100 13:58:24.760174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass
33102 13:58:24.794426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33103 13:58:24.794909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33105 13:58:24.834025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33106 13:58:24.834418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33108 13:58:24.874136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass
33110 13:58:24.874704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33111 13:58:24.913015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33112 13:58:24.913427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33114 13:58:24.952127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass>
33115 13:58:24.952587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass
33117 13:58:24.988415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33118 13:58:24.988926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33120 13:58:25.026656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33121 13:58:25.027147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass
33123 13:58:25.063064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33125 13:58:25.063656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33126 13:58:25.098213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33127 13:58:25.098636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33129 13:58:25.133322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass
33131 13:58:25.133781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33132 13:58:25.169623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33134 13:58:25.170104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33135 13:58:25.208616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33136 13:58:25.209042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33138 13:58:25.246336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33139 13:58:25.246853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass
33141 13:58:25.284277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33142 13:58:25.284764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33144 13:58:25.321999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33145 13:58:25.322482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33147 13:58:25.384575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass
33149 13:58:25.384956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33150 13:58:25.422458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33152 13:58:25.422896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33153 13:58:25.461085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33155 13:58:25.461531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33156 13:58:25.501217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass
33158 13:58:25.501694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33159 13:58:25.537727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33161 13:58:25.538302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33162 13:58:25.574708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass>
33163 13:58:25.575215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass
33165 13:58:25.612513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33166 13:58:25.612931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33168 13:58:25.650003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33169 13:58:25.650450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass
33171 13:58:25.688463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33173 13:58:25.688928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33174 13:58:25.737483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33175 13:58:25.737915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33177 13:58:25.775820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass
33179 13:58:25.776299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33180 13:58:25.813768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33181 13:58:25.814207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33183 13:58:25.852766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33184 13:58:25.853214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33186 13:58:25.888463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33187 13:58:25.888908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass
33189 13:58:25.924101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33190 13:58:25.924547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33192 13:58:25.960238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33193 13:58:25.960719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33195 13:58:25.996902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass
33197 13:58:25.997556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33198 13:58:26.033543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33200 13:58:26.034193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33201 13:58:26.077295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33202 13:58:26.077802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33204 13:58:26.118006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33205 13:58:26.118548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass
33207 13:58:26.155711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33208 13:58:26.156211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33210 13:58:26.196573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass>
33211 13:58:26.197037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass
33213 13:58:26.233186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33214 13:58:26.233591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33216 13:58:26.270607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33217 13:58:26.271116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass
33219 13:58:26.312635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33220 13:58:26.313031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33222 13:58:26.351826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33223 13:58:26.352276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33225 13:58:26.394141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass
33227 13:58:26.394617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33228 13:58:26.432146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33229 13:58:26.432573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33231 13:58:26.470361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33233 13:58:26.470837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33234 13:58:26.509407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33235 13:58:26.509842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass
33237 13:58:26.548396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33238 13:58:26.548809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33240 13:58:26.586942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33242 13:58:26.587423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33243 13:58:26.626650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass
33245 13:58:26.627138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33246 13:58:26.665489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33248 13:58:26.665947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33249 13:58:26.703560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33250 13:58:26.703952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33252 13:58:26.742234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33253 13:58:26.742639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass
33255 13:58:26.780421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33256 13:58:26.780846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33258 13:58:26.818479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass>
33259 13:58:26.818906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass
33261 13:58:26.857856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33262 13:58:26.858248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33264 13:58:26.896048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass
33266 13:58:26.896481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33267 13:58:26.933931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33268 13:58:26.934353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33270 13:58:26.972518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33271 13:58:26.973044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33273 13:58:27.009063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33274 13:58:27.009588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass
33276 13:58:27.044084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass
33278 13:58:27.044564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
33279 13:58:27.080160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
33280 13:58:27.080648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
33282 13:58:27.114700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass
33284 13:58:27.115358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass>
33285 13:58:27.150762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass
33287 13:58:27.151421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
33288 13:58:27.185684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
33289 13:58:27.186169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
33291 13:58:27.221080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass>
33292 13:58:27.221541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass
33294 13:58:27.256352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass
33296 13:58:27.256976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
33297 13:58:27.290806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
33299 13:58:27.291378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
33300 13:58:27.325811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass>
33301 13:58:27.326237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass
33303 13:58:27.360010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
33304 13:58:27.360441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass
33306 13:58:27.394323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass
33308 13:58:27.394948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass>
33309 13:58:27.428807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
33310 13:58:27.429231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
33312 13:58:27.464417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass>
33313 13:58:27.464854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass
33315 13:58:27.500160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass
33317 13:58:27.500637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
33318 13:58:27.540585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
33320 13:58:27.541005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
33321 13:58:27.585894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass
33323 13:58:27.586362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass>
33324 13:58:27.621407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass
33326 13:58:27.621878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
33327 13:58:27.656563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
33328 13:58:27.657097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
33330 13:58:27.691965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass>
33331 13:58:27.692429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass
33333 13:58:27.726617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
33334 13:58:27.727090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass
33336 13:58:27.761400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
33337 13:58:27.761812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
33339 13:58:27.796708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass>
33340 13:58:27.797194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass
33342 13:58:27.831511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass
33344 13:58:27.831968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
33345 13:58:27.865711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
33346 13:58:27.866103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
33348 13:58:27.902322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass>
33349 13:58:27.902771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass
33351 13:58:27.937499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass
33353 13:58:27.937961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
33354 13:58:27.972393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass
33356 13:58:27.972851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass>
33357 13:58:28.007447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
33358 13:58:28.007888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
33360 13:58:28.042789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass>
33361 13:58:28.043268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass
33363 13:58:28.078551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
33364 13:58:28.078982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass
33366 13:58:28.115996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
33368 13:58:28.116461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
33369 13:58:28.153437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass>
33370 13:58:28.154148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass
33372 13:58:28.193934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
33373 13:58:28.194391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass
33375 13:58:28.234247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
33377 13:58:28.234721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
33378 13:58:28.268755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass
33380 13:58:28.269338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass>
33381 13:58:28.303326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass
33383 13:58:28.303694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
33384 13:58:28.337193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
33385 13:58:28.337577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
33387 13:58:28.370622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass>
33388 13:58:28.371020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass
33390 13:58:28.403517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass
33392 13:58:28.404089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
33393 13:58:28.437269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
33394 13:58:28.437741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
33396 13:58:28.472002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass>
33397 13:58:28.472482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass
33399 13:58:28.505118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
33400 13:58:28.505579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass
33402 13:58:28.537858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass>
33403 13:58:28.538314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass
33405 13:58:28.570590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
33406 13:58:28.571055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
33408 13:58:28.604711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass
33410 13:58:28.605348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass>
33411 13:58:28.638100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
33412 13:58:28.638518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass
33414 13:58:28.671146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
33416 13:58:28.671590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
33417 13:58:28.704253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass>
33418 13:58:28.704664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass
33420 13:58:28.737276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
33421 13:58:28.737698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass
33423 13:58:28.771718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
33424 13:58:28.772174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
33426 13:58:28.813064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass>
33427 13:58:28.813497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass
33429 13:58:28.846983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass
33431 13:58:28.847452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
33432 13:58:28.880742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
33433 13:58:28.881244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
33435 13:58:28.928096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass
33437 13:58:28.928565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass>
33438 13:58:28.964614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass
33440 13:58:28.965083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
33441 13:58:29.001143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
33443 13:58:29.001610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
33444 13:58:29.037056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass>
33445 13:58:29.037472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass
33447 13:58:29.073274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass
33449 13:58:29.073621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
33450 13:58:29.105435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass>
33451 13:58:29.105789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass
33453 13:58:29.137372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
33454 13:58:29.137765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
33456 13:58:29.169168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass
33458 13:58:29.169773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass>
33459 13:58:29.200948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
33460 13:58:29.201374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass
33462 13:58:29.232582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
33463 13:58:29.233022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
33465 13:58:29.264833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass>
33466 13:58:29.265285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass
33468 13:58:29.296703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
33469 13:58:29.297129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass
33471 13:58:29.329485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
33472 13:58:29.329989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
33474 13:58:29.362354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass
33476 13:58:29.362816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass>
33477 13:58:29.394317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
33478 13:58:29.394784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass
33480 13:58:29.426126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
33481 13:58:29.426588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
33483 13:58:29.457947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass>
33484 13:58:29.458420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass
33486 13:58:29.489682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
33487 13:58:29.490131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass
33489 13:58:29.521365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
33490 13:58:29.521811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
33492 13:58:29.553708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass>
33493 13:58:29.554205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass
33495 13:58:29.585379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
33496 13:58:29.585867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass
33498 13:58:29.618161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass
33500 13:58:29.618638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass>
33501 13:58:29.650218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
33502 13:58:29.650704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
33504 13:58:29.686244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass>
33505 13:58:29.686719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass
33507 13:58:29.719227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass
33509 13:58:29.719784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
33510 13:58:29.750563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
33512 13:58:29.751147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
33513 13:58:29.782156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass
33515 13:58:29.782722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass>
33516 13:58:29.813402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass
33518 13:58:29.813976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
33519 13:58:29.844699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
33520 13:58:29.845173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
33522 13:58:29.876339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass
33524 13:58:29.876793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass>
33525 13:58:29.908697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
33526 13:58:29.909108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass
33528 13:58:29.940980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
33529 13:58:29.941390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
33531 13:58:29.973042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass
33533 13:58:29.973507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass>
33534 13:58:30.005032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass
33536 13:58:30.005480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
33537 13:58:30.036405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
33538 13:58:30.036831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
33540 13:58:30.068980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass
33542 13:58:30.069556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass>
33543 13:58:30.100778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
33544 13:58:30.101258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass
33546 13:58:30.132185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass>
33547 13:58:30.132669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass
33549 13:58:30.164421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
33550 13:58:30.164877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
33552 13:58:30.196914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass>
33553 13:58:30.197382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass
33555 13:58:30.228964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass
33557 13:58:30.229520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
33558 13:58:30.260960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
33560 13:58:30.261430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
33561 13:58:30.292517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass>
33562 13:58:30.292906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass
33564 13:58:30.324123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass
33566 13:58:30.324683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
33567 13:58:30.357484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
33568 13:58:30.357942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
33570 13:58:30.390110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass
33572 13:58:30.390577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass>
33573 13:58:30.424000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass
33575 13:58:30.424559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
33576 13:58:30.456900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
33578 13:58:30.457454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
33579 13:58:30.509408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass
33581 13:58:30.509987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass>
33582 13:58:30.540613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
33583 13:58:30.541111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass
33585 13:58:30.572877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
33587 13:58:30.573428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
33588 13:58:30.605595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass>
33589 13:58:30.606096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass
33591 13:58:30.637475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
33592 13:58:30.637940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass
33594 13:58:30.669893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass>
33595 13:58:30.670335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass
33597 13:58:30.702524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
33598 13:58:30.702937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
33600 13:58:30.736784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass>
33601 13:58:30.737270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass
33603 13:58:30.769595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
33604 13:58:30.770139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass
33606 13:58:30.801825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
33607 13:58:30.802243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
33609 13:58:30.834800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass
33611 13:58:30.835230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass>
33612 13:58:30.866667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
33613 13:58:30.867219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass
33615 13:58:30.902433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
33616 13:58:30.902915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
33618 13:58:30.935787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass>
33619 13:58:30.936289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass
33621 13:58:30.968490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
33622 13:58:30.968975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass
33624 13:58:31.001323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
33626 13:58:31.001806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
33627 13:58:31.034492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass
33629 13:58:31.034952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass>
33630 13:58:31.076882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
33631 13:58:31.077307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass
33633 13:58:31.126520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
33634 13:58:31.127002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
33636 13:58:31.162189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass>
33637 13:58:31.162670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass
33639 13:58:31.197875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
33640 13:58:31.198300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass
33642 13:58:31.241756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass>
33643 13:58:31.242199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass
33645 13:58:31.275187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
33647 13:58:31.275648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
33648 13:58:31.306833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass>
33649 13:58:31.307316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass
33651 13:58:31.339003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass
33653 13:58:31.339635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
33654 13:58:31.370934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
33656 13:58:31.371395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
33657 13:58:31.404131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass>
33658 13:58:31.404539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass
33660 13:58:31.440267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
33661 13:58:31.440707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass
33663 13:58:31.473124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
33665 13:58:31.473591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
33666 13:58:31.505825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass
33668 13:58:31.506278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass>
33669 13:58:31.538241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
33670 13:58:31.538718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass
33672 13:58:31.570671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
33673 13:58:31.571148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
33675 13:58:31.604049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass
33677 13:58:31.604684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass>
33678 13:58:31.636199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass
33680 13:58:31.636837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
33681 13:58:31.667748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
33683 13:58:31.668212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
33684 13:58:31.700743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass
33686 13:58:31.701203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass>
33687 13:58:31.732382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
33688 13:58:31.732825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass
33690 13:58:31.764016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass>
33691 13:58:31.764462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass
33693 13:58:31.795939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
33694 13:58:31.796367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
33696 13:58:31.827577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass>
33697 13:58:31.828003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass
33699 13:58:31.860386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
33700 13:58:31.860848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass
33702 13:58:31.892113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
33703 13:58:31.892566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
33705 13:58:31.927436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass>
33706 13:58:31.927904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass
33708 13:58:31.960435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
33709 13:58:31.960952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass
33711 13:58:31.995181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
33713 13:58:31.995640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
33714 13:58:32.028075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass>
33715 13:58:32.028502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass
33717 13:58:32.060385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
33718 13:58:32.060852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass
33720 13:58:32.095203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
33722 13:58:32.095657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
33723 13:58:32.126811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass
33725 13:58:32.127629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass>
33726 13:58:32.158740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
33727 13:58:32.159208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass
33729 13:58:32.190618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
33730 13:58:32.191036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
33732 13:58:32.223907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass>
33733 13:58:32.224351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass
33735 13:58:32.255944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass
33737 13:58:32.256502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
33738 13:58:32.287226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass
33740 13:58:32.287860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass>
33741 13:58:32.321939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
33743 13:58:32.322540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
33744 13:58:32.353990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass>
33745 13:58:32.354433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass
33747 13:58:32.386177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass
33749 13:58:32.386644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
33750 13:58:32.418221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
33752 13:58:32.418687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
33753 13:58:32.453662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass>
33754 13:58:32.454077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass
33756 13:58:32.489659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass
33758 13:58:32.490113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
33759 13:58:32.525717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
33761 13:58:32.526321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
33762 13:58:32.561316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass
33764 13:58:32.561953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass>
33765 13:58:32.596979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass
33767 13:58:32.597514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
33768 13:58:32.632659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
33769 13:58:32.633092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
33771 13:58:32.670021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass
33773 13:58:32.670609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass>
33774 13:58:32.705358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass
33776 13:58:32.705918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
33777 13:58:32.740970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
33779 13:58:32.741538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
33780 13:58:32.777409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass
33782 13:58:32.778008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass>
33783 13:58:32.812941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass
33785 13:58:32.813412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
33786 13:58:32.848858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass
33788 13:58:32.849322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass>
33789 13:58:32.884798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
33791 13:58:32.885265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
33792 13:58:32.920433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass>
33793 13:58:32.920888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass
33795 13:58:32.956454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass
33797 13:58:32.957011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
33798 13:58:32.992613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
33799 13:58:32.993070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
33801 13:58:33.028119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass>
33802 13:58:33.028564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass
33804 13:58:33.065698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass
33806 13:58:33.066402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
33807 13:58:33.102498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
33808 13:58:33.102936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
33810 13:58:33.137368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass>
33811 13:58:33.137762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass
33813 13:58:33.173998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
33814 13:58:33.174388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass
33816 13:58:33.210974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
33818 13:58:33.211450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
33819 13:58:33.247800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass
33821 13:58:33.248429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass>
33822 13:58:33.284045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
33823 13:58:33.284511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass
33825 13:58:33.320917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
33827 13:58:33.321516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
33828 13:58:33.357413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass>
33829 13:58:33.357905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass
33831 13:58:33.393598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass
33833 13:58:33.394253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
33834 13:58:33.428804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
33835 13:58:33.429217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
33837 13:58:33.465000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass>
33838 13:58:33.465415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass
33840 13:58:33.501213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33842 13:58:33.501674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33843 13:58:33.537021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33844 13:58:33.537422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass
33846 13:58:33.573045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33848 13:58:33.573492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33849 13:58:33.609047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33850 13:58:33.609438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33852 13:58:33.644760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33853 13:58:33.645199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass
33855 13:58:33.681728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33856 13:58:33.682167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33858 13:58:33.717387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33859 13:58:33.717836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33861 13:58:33.752848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33862 13:58:33.753290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass
33864 13:58:33.788714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33865 13:58:33.789105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33867 13:58:33.824954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33869 13:58:33.825403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33870 13:58:33.860914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33871 13:58:33.861370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass
33873 13:58:33.896673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33874 13:58:33.897121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33876 13:58:33.932557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33878 13:58:33.933247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33879 13:58:33.967993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33880 13:58:33.968389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass
33882 13:58:34.004681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33883 13:58:34.005076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33885 13:58:34.040529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass
33887 13:58:34.040965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass>
33888 13:58:34.076506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33890 13:58:34.076949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33891 13:58:34.113376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33892 13:58:34.113874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass
33894 13:58:34.149027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33895 13:58:34.149500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33897 13:58:34.185721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33898 13:58:34.186145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33900 13:58:34.222033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33901 13:58:34.222518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass
33903 13:58:34.257831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33904 13:58:34.258286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33906 13:58:34.293989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33907 13:58:34.294444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33909 13:58:34.329935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33910 13:58:34.330393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass
33912 13:58:34.366080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33914 13:58:34.366690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33915 13:58:34.402172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33916 13:58:34.402618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33918 13:58:34.438068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33919 13:58:34.438500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass
33921 13:58:34.473542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33922 13:58:34.474003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33924 13:58:34.510580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33925 13:58:34.511027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33927 13:58:34.546708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33928 13:58:34.547167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass
33930 13:58:34.582589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33932 13:58:34.583151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33933 13:58:34.618489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass
33935 13:58:34.619041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass>
33936 13:58:34.654512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33937 13:58:34.654919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33939 13:58:34.690831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33940 13:58:34.691295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass
33942 13:58:34.727561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33944 13:58:34.728176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33945 13:58:34.763177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33947 13:58:34.763813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33948 13:58:34.800982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33949 13:58:34.801347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass
33951 13:58:34.837433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33952 13:58:34.837917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33954 13:58:34.873156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33955 13:58:34.873577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33957 13:58:34.908688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33958 13:58:34.909104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass
33960 13:58:34.944549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33961 13:58:34.944975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33963 13:58:34.980352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33964 13:58:34.980776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33966 13:58:35.016062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33967 13:58:35.016484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass
33969 13:58:35.051968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33970 13:58:35.052383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33972 13:58:35.089133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33973 13:58:35.089611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33975 13:58:35.124641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33976 13:58:35.125033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass
33978 13:58:35.160621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33979 13:58:35.161011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33981 13:58:35.196562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass
33983 13:58:35.196995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass>
33984 13:58:35.232552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33985 13:58:35.232963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33987 13:58:35.269029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33988 13:58:35.269440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass
33990 13:58:35.304663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33992 13:58:35.305098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33993 13:58:35.340612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33994 13:58:35.341027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33996 13:58:35.377087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass
33998 13:58:35.377551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33999 13:58:35.416445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass
34001 13:58:35.416887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
34002 13:58:35.452085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
34003 13:58:35.452497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
34005 13:58:35.487838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass
34007 13:58:35.488290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass>
34008 13:58:35.522425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
34009 13:58:35.522834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass
34011 13:58:35.557721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
34013 13:58:35.558184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
34014 13:58:35.612638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass>
34015 13:58:35.613133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass
34017 13:58:35.656574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
34018 13:58:35.656990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass
34020 13:58:35.693474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
34021 13:58:35.693899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
34023 13:58:35.728805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass>
34024 13:58:35.729224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass
34026 13:58:35.765244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
34027 13:58:35.765695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass
34029 13:58:35.801380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass
34031 13:58:35.801962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass>
34032 13:58:35.837102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
34034 13:58:35.837679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
34035 13:58:35.873296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass
34037 13:58:35.874024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass>
34038 13:58:35.908982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass
34040 13:58:35.909536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
34041 13:58:35.944856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
34042 13:58:35.945293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
34044 13:58:35.980708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass
34046 13:58:35.981281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass>
34047 13:58:36.017321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass
34049 13:58:36.017902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
34050 13:58:36.053488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
34051 13:58:36.053909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
34053 13:58:36.091985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass>
34054 13:58:36.092415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass
34056 13:58:36.129039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
34057 13:58:36.129486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass
34059 13:58:36.166787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
34060 13:58:36.167268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
34062 13:58:36.205511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass>
34063 13:58:36.206038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass
34065 13:58:36.244260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
34066 13:58:36.244670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass
34068 13:58:36.280931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
34070 13:58:36.281500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
34071 13:58:36.316469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass>
34072 13:58:36.316976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass
34074 13:58:36.352478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
34075 13:58:36.352891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass
34077 13:58:36.389067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass
34079 13:58:36.389517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass>
34080 13:58:36.424957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
34081 13:58:36.425438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
34083 13:58:36.461239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass>
34084 13:58:36.461615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass
34086 13:58:36.496748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass
34088 13:58:36.497201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
34089 13:58:36.532534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
34090 13:58:36.532940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
34092 13:58:36.568709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass>
34093 13:58:36.569118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass
34095 13:58:36.604521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
34096 13:58:36.605011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass
34098 13:58:36.641046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
34100 13:58:36.641518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
34101 13:58:36.677119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass>
34102 13:58:36.677543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass
34104 13:58:36.713534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass
34106 13:58:36.714192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
34107 13:58:36.750562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
34109 13:58:36.751207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
34110 13:58:36.786850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass>
34111 13:58:36.787328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass
34113 13:58:36.822567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
34114 13:58:36.822970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass
34116 13:58:36.859760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
34118 13:58:36.860208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
34119 13:58:36.895267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass
34121 13:58:36.896275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass>
34122 13:58:36.933278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
34123 13:58:36.933692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass
34125 13:58:36.969254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass>
34126 13:58:36.969677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass
34128 13:58:37.004468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
34129 13:58:37.004917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
34131 13:58:37.040424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass>
34132 13:58:37.040815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass
34134 13:58:37.077478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass
34136 13:58:37.078083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
34137 13:58:37.113365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
34139 13:58:37.113848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
34140 13:58:37.149846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass
34142 13:58:37.150320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass>
34143 13:58:37.187622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
34144 13:58:37.188013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass
34146 13:58:37.223796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
34147 13:58:37.224227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
34149 13:58:37.260698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass>
34150 13:58:37.261118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass
34152 13:58:37.297421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
34153 13:58:37.297836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass
34155 13:58:37.333034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
34156 13:58:37.333477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
34158 13:58:37.368931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass>
34159 13:58:37.369349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass
34161 13:58:37.405691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass
34163 13:58:37.406134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
34164 13:58:37.443287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
34166 13:58:37.443756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
34167 13:58:37.479224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass
34169 13:58:37.479694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass>
34170 13:58:37.525839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
34171 13:58:37.526229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass
34173 13:58:37.562094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass
34175 13:58:37.562651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass>
34176 13:58:37.601724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
34177 13:58:37.602176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
34179 13:58:37.637997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass>
34180 13:58:37.638452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass
34182 13:58:37.673520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
34183 13:58:37.674007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass
34185 13:58:37.709316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
34187 13:58:37.709784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
34188 13:58:37.746949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass>
34189 13:58:37.747368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass
34191 13:58:37.784245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
34192 13:58:37.784654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass
34194 13:58:37.820304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
34196 13:58:37.820944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
34197 13:58:37.856654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass
34199 13:58:37.857301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass>
34200 13:58:37.892570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
34201 13:58:37.893057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass
34203 13:58:37.930863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
34204 13:58:37.931332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
34206 13:58:37.966284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass>
34207 13:58:37.966768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass
34209 13:58:38.002592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
34210 13:58:38.002988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass
34212 13:58:38.039547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
34213 13:58:38.039994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
34215 13:58:38.076010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass>
34216 13:58:38.076406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass
34218 13:58:38.113935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass
34220 13:58:38.114413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
34221 13:58:38.149616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass>
34222 13:58:38.150106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass
34224 13:58:38.186080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
34225 13:58:38.186527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
34227 13:58:38.222778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass
34229 13:58:38.223372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass>
34230 13:58:38.261791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass
34232 13:58:38.262220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
34233 13:58:38.297345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
34235 13:58:38.297957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
34236 13:58:38.333357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass
34238 13:58:38.334000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass>
34239 13:58:38.370512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass
34241 13:58:38.371150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
34242 13:58:38.408124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
34243 13:58:38.408570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
34245 13:58:38.446906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass>
34246 13:58:38.447347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass
34248 13:58:38.482710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
34249 13:58:38.483143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass
34251 13:58:38.518057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
34252 13:58:38.518494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
34254 13:58:38.553814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass>
34255 13:58:38.554262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass
34257 13:58:38.591951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass
34259 13:58:38.592544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
34260 13:58:38.629572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
34262 13:58:38.630042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
34263 13:58:38.665491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass
34265 13:58:38.665960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass>
34266 13:58:38.701569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass
34268 13:58:38.702039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
34269 13:58:38.737557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass>
34270 13:58:38.737972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass
34272 13:58:38.777227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
34273 13:58:38.777641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
34275 13:58:38.814393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass>
34276 13:58:38.814822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass
34278 13:58:38.850670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
34279 13:58:38.851113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass
34281 13:58:38.887801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
34283 13:58:38.888264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
34284 13:58:38.924595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass
34286 13:58:38.925157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass>
34287 13:58:38.961671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
34288 13:58:38.962134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass
34290 13:58:38.997517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
34291 13:58:38.997979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
34293 13:58:39.033982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass>
34294 13:58:39.034400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass
34296 13:58:39.069599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass
34298 13:58:39.070248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
34299 13:58:39.107731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
34300 13:58:39.108204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
34302 13:58:39.144361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass
34304 13:58:39.144994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass>
34305 13:58:39.180071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass
34307 13:58:39.180707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
34308 13:58:39.216734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
34309 13:58:39.217221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
34311 13:58:39.253118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass>
34312 13:58:39.253603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass
34314 13:58:39.296053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
34315 13:58:39.296518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass
34317 13:58:39.332496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass
34319 13:58:39.332966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass>
34320 13:58:39.368283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
34321 13:58:39.368717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
34323 13:58:39.409974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass>
34324 13:58:39.410441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass
34326 13:58:39.454771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
34327 13:58:39.455255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass
34329 13:58:39.490744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
34330 13:58:39.491215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
34332 13:58:39.526845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass>
34333 13:58:39.527321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass
34335 13:58:39.564944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass
34337 13:58:39.565516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
34338 13:58:39.600938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
34339 13:58:39.601404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
34341 13:58:39.640801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass>
34342 13:58:39.641258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass
34344 13:58:39.676596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
34345 13:58:39.677056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass
34347 13:58:39.713009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
34348 13:58:39.713475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
34350 13:58:39.748409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass>
34351 13:58:39.748854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass
34353 13:58:39.786638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
34354 13:58:39.787086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass
34356 13:58:39.823127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
34358 13:58:39.823590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
34359 13:58:39.857743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass>
34360 13:58:39.858207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass
34362 13:58:39.892984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
34363 13:58:39.893380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass
34365 13:58:39.928218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass>
34366 13:58:39.928653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass
34368 13:58:39.968723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
34369 13:58:39.969146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
34371 13:58:40.004954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass>
34372 13:58:40.005454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass
34374 13:58:40.040871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
34375 13:58:40.041362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass
34377 13:58:40.076731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
34379 13:58:40.077369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
34380 13:58:40.113700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass
34382 13:58:40.114328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass>
34383 13:58:40.150915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
34384 13:58:40.151332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass
34386 13:58:40.187870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
34388 13:58:40.188514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
34389 13:58:40.223859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass>
34390 13:58:40.224303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass
34392 13:58:40.260109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
34393 13:58:40.260548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass
34395 13:58:40.295807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
34396 13:58:40.296218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
34398 13:58:40.331281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass
34400 13:58:40.331851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass>
34401 13:58:40.367625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass
34403 13:58:40.368102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
34404 13:58:40.408747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
34405 13:58:40.409165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
34407 13:58:40.445246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass>
34408 13:58:40.445681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass
34410 13:58:40.483609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
34411 13:58:40.484010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass
34413 13:58:40.521500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass
34415 13:58:40.521944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass>
34416 13:58:40.559194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
34418 13:58:40.559811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
34419 13:58:40.598037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass
34421 13:58:40.598702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass>
34422 13:58:40.634198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass
34424 13:58:40.634750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
34425 13:58:40.670030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
34426 13:58:40.670497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
34428 13:58:40.741126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass>
34429 13:58:40.741631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass
34431 13:58:40.777595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
34432 13:58:40.778076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass
34434 13:58:40.813547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
34435 13:58:40.814030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
34437 13:58:40.848561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass>
34438 13:58:40.849027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass
34440 13:58:40.883938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
34441 13:58:40.884414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass
34443 13:58:40.919742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
34445 13:58:40.920192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
34446 13:58:40.954776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass
34448 13:58:40.955332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass>
34449 13:58:40.990883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass
34451 13:58:40.991439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
34452 13:58:41.026551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
34453 13:58:41.027012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
34455 13:58:41.061540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass>
34456 13:58:41.061982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass
34458 13:58:41.098123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
34459 13:58:41.098550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass
34461 13:58:41.134781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass
34463 13:58:41.135243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass>
34464 13:58:41.172163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
34465 13:58:41.172628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
34467 13:58:41.209150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass>
34468 13:58:41.209580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass
34470 13:58:41.246077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
34471 13:58:41.246526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass
34473 13:58:41.282746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
34475 13:58:41.283223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
34476 13:58:41.320080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass>
34477 13:58:41.320494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass
34479 13:58:41.356416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
34480 13:58:41.356785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass
34482 13:58:41.390734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
34483 13:58:41.391199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
34485 13:58:41.425393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass>
34486 13:58:41.425860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass
34488 13:58:41.461146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass
34490 13:58:41.461594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
34491 13:58:41.497285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
34492 13:58:41.497757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
34494 13:58:41.533082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass>
34495 13:58:41.533571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass
34497 13:58:41.569001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
34498 13:58:41.569468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass
34500 13:58:41.605225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
34501 13:58:41.605703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
34503 13:58:41.642243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass>
34504 13:58:41.642668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass
34506 13:58:41.675197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass
34508 13:58:41.675633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
34509 13:58:41.708306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass
34511 13:58:41.708876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass>
34512 13:58:41.742636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
34513 13:58:41.743138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
34515 13:58:41.777074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass
34517 13:58:41.777441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass>
34518 13:58:41.809924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
34519 13:58:41.810296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass
34521 13:58:41.842471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
34522 13:58:41.842913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
34524 13:58:41.876266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass>
34525 13:58:41.876728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass
34527 13:58:41.908794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
34528 13:58:41.909274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass
34530 13:58:41.940942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
34531 13:58:41.941401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
34533 13:58:41.975967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass>
34534 13:58:41.976414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass
34536 13:58:42.009466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
34537 13:58:42.009949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass
34539 13:58:42.041411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
34541 13:58:42.042074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
34542 13:58:42.072905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass>
34543 13:58:42.073379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass
34545 13:58:42.104608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
34546 13:58:42.105079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass
34548 13:58:42.136590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
34550 13:58:42.136959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
34551 13:58:42.168835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass
34553 13:58:42.169293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass>
34554 13:58:42.200198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
34555 13:58:42.200615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass
34557 13:58:42.231126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass
34559 13:58:42.231582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass>
34560 13:58:42.262653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
34561 13:58:42.263223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
34563 13:58:42.295705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass
34565 13:58:42.296170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass>
34566 13:58:42.328438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
34567 13:58:42.328844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass
34569 13:58:42.360459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
34570 13:58:42.360887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
34572 13:58:42.392196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass>
34573 13:58:42.392671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass
34575 13:58:42.423758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass
34577 13:58:42.424308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
34578 13:58:42.455815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
34579 13:58:42.456299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
34581 13:58:42.487930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass
34583 13:58:42.488599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass>
34584 13:58:42.520006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
34585 13:58:42.520501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass
34587 13:58:42.552242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
34588 13:58:42.552692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
34590 13:58:42.584140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass>
34591 13:58:42.584543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass
34593 13:58:42.616262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass
34595 13:58:42.616698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
34596 13:58:42.649017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
34597 13:58:42.649520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
34599 13:58:42.682215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass>
34600 13:58:42.682697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass
34602 13:58:42.714082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
34603 13:58:42.714539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass
34605 13:58:42.745645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
34606 13:58:42.746167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
34608 13:58:42.777516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass>
34609 13:58:42.777998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass
34611 13:58:42.809129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass>
34612 13:58:42.809609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass
34614 13:58:42.841710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass>
34615 13:58:42.842208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass
34617 13:58:42.873852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass>
34618 13:58:42.874316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass
34620 13:58:42.905665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass>
34621 13:58:42.906138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass
34623 13:58:42.937760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
34624 13:58:42.938257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
34626 13:58:42.940723 + set +x
34627 13:58:42.940931 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64_qemu 610605_1.1.3.5>
34628 13:58:42.941292 Received signal: <ENDRUN> 1_kselftest-arm64_qemu 610605_1.1.3.5
34629 13:58:42.941448 Ending use of test pattern.
34630 13:58:42.941597 Ending test lava.1_kselftest-arm64_qemu (610605_1.1.3.5), duration 330.81
34632 13:58:42.944023 <LAVA_TEST_RUNNER EXIT>
34633 13:58:42.944386 ok: lava_test_shell seems to have completed
34634 13:58:43.028008 arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: pass
arm64_btitest_bti_c_func_call_using_br_x0: pass
arm64_btitest_bti_c_func_call_using_br_x16: pass
arm64_btitest_bti_j_func_call_using_blr: pass
arm64_btitest_bti_j_func_call_using_br_x0: pass
arm64_btitest_bti_j_func_call_using_br_x16: pass
arm64_btitest_bti_jc_func_call_using_blr: pass
arm64_btitest_bti_jc_func_call_using_br_x0: pass
arm64_btitest_bti_jc_func_call_using_br_x16: pass
arm64_btitest_bti_none_func_call_using_blr: pass
arm64_btitest_bti_none_func_call_using_br_x0: pass
arm64_btitest_bti_none_func_call_using_br_x16: pass
arm64_btitest_nohint_func_call_using_blr: pass
arm64_btitest_nohint_func_call_using_br_x0: pass
arm64_btitest_nohint_func_call_using_br_x16: pass
arm64_btitest_paciasp_func_call_using_blr: pass
arm64_btitest_paciasp_func_call_using_br_x0: pass
arm64_btitest_paciasp_func_call_using_br_x16: pass
arm64_check_buffer_fill: fail
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_gcr_el1_cswitch: fail
arm64_check_ksm_options: fail
arm64_check_mmap_options: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: pass
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: pass
arm64_check_prctl_SYNC_ASYNC: pass
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: fail
arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode: pass
arm64_check_user_mem: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: pass
arm64_fake_sigreturn_sve_change_vl: pass
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_SSVE-VL-128-0: pass
arm64_fp-stress_SSVE-VL-16-0: pass
arm64_fp-stress_SSVE-VL-256-0: pass
arm64_fp-stress_SSVE-VL-32-0: pass
arm64_fp-stress_SSVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-112-0: pass
arm64_fp-stress_SVE-VL-128-0: pass
arm64_fp-stress_SVE-VL-144-0: pass
arm64_fp-stress_SVE-VL-16-0: pass
arm64_fp-stress_SVE-VL-160-0: pass
arm64_fp-stress_SVE-VL-176-0: pass
arm64_fp-stress_SVE-VL-192-0: pass
arm64_fp-stress_SVE-VL-208-0: pass
arm64_fp-stress_SVE-VL-224-0: pass
arm64_fp-stress_SVE-VL-240-0: pass
arm64_fp-stress_SVE-VL-256-0: pass
arm64_fp-stress_SVE-VL-32-0: pass
arm64_fp-stress_SVE-VL-48-0: pass
arm64_fp-stress_SVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-80-0: pass
arm64_fp-stress_SVE-VL-96-0: pass
arm64_fp-stress_ZA-VL-128-0: pass
arm64_fp-stress_ZA-VL-16-0: pass
arm64_fp-stress_ZA-VL-256-0: pass
arm64_fp-stress_ZA-VL-32-0: pass
arm64_fp-stress_ZA-VL-64-0: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: pass
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: pass
arm64_hwcap_sigill_SVE2_BITPERM: pass
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: pass
arm64_hwcap_sigill_SVE2_F64MM: pass
arm64_hwcap_sigill_SVE2_I8MM: pass
arm64_hwcap_sigill_SVE2_PMULL: pass
arm64_hwcap_sigill_SVE2_SHA3: pass
arm64_hwcap_sigill_SVE2_SM4: pass
arm64_hwcap_sigill_SVE_2: pass
arm64_hwcap_sigill_SVE_AES: pass
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: pass
arm64_nobtitest_bti_c_func_call_using_br_x0: pass
arm64_nobtitest_bti_c_func_call_using_br_x16: pass
arm64_nobtitest_bti_j_func_call_using_blr: pass
arm64_nobtitest_bti_j_func_call_using_br_x0: pass
arm64_nobtitest_bti_j_func_call_using_br_x16: pass
arm64_nobtitest_bti_jc_func_call_using_blr: pass
arm64_nobtitest_bti_jc_func_call_using_br_x0: pass
arm64_nobtitest_bti_jc_func_call_using_br_x16: pass
arm64_nobtitest_bti_none_func_call_using_blr: pass
arm64_nobtitest_bti_none_func_call_using_br_x0: pass
arm64_nobtitest_bti_none_func_call_using_br_x16: pass
arm64_nobtitest_nohint_func_call_using_blr: pass
arm64_nobtitest_nohint_func_call_using_br_x0: pass
arm64_nobtitest_nohint_func_call_using_br_x16: pass
arm64_nobtitest_paciasp_func_call_using_blr: pass
arm64_nobtitest_paciasp_func_call_using_br_x0: pass
arm64_nobtitest_paciasp_func_call_using_br_x16: pass
arm64_pac: pass
arm64_pac_global_context_switch_keep_keys: pass
arm64_pac_global_context_switch_keep_keys_generic: pass
arm64_pac_global_corrupt_pac: pass
arm64_pac_global_exec_changed_keys: pass
arm64_pac_global_pac_instructions_not_nop: pass
arm64_pac_global_pac_instructions_not_nop_generic: pass
arm64_pac_global_single_thread_different_keys: pass
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: pass
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: pass
arm64_ssve_regs: pass
arm64_sve-probe-vls: pass
arm64_sve-probe-vls_All_vector_lengths_valid: pass
arm64_sve-probe-vls_Enumerated_16_vector_lengths: pass
arm64_sve-ptrace: pass
arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_1008: pass
arm64_sve-ptrace_Set_SVE_VL_1024: pass
arm64_sve-ptrace_Set_SVE_VL_1040: pass
arm64_sve-ptrace_Set_SVE_VL_1056: pass
arm64_sve-ptrace_Set_SVE_VL_1072: pass
arm64_sve-ptrace_Set_SVE_VL_1088: pass
arm64_sve-ptrace_Set_SVE_VL_1104: pass
arm64_sve-ptrace_Set_SVE_VL_112: pass
arm64_sve-ptrace_Set_SVE_VL_1120: pass
arm64_sve-ptrace_Set_SVE_VL_1136: pass
arm64_sve-ptrace_Set_SVE_VL_1152: pass
arm64_sve-ptrace_Set_SVE_VL_1168: pass
arm64_sve-ptrace_Set_SVE_VL_1184: pass
arm64_sve-ptrace_Set_SVE_VL_1200: pass
arm64_sve-ptrace_Set_SVE_VL_1216: pass
arm64_sve-ptrace_Set_SVE_VL_1232: pass
arm64_sve-ptrace_Set_SVE_VL_1248: pass
arm64_sve-ptrace_Set_SVE_VL_1264: pass
arm64_sve-ptrace_Set_SVE_VL_128: pass
arm64_sve-ptrace_Set_SVE_VL_1280: pass
arm64_sve-ptrace_Set_SVE_VL_1296: pass
arm64_sve-ptrace_Set_SVE_VL_1312: pass
arm64_sve-ptrace_Set_SVE_VL_1328: pass
arm64_sve-ptrace_Set_SVE_VL_1344: pass
arm64_sve-ptrace_Set_SVE_VL_1360: pass
arm64_sve-ptrace_Set_SVE_VL_1376: pass
arm64_sve-ptrace_Set_SVE_VL_1392: pass
arm64_sve-ptrace_Set_SVE_VL_1408: pass
arm64_sve-ptrace_Set_SVE_VL_1424: pass
arm64_sve-ptrace_Set_SVE_VL_144: pass
arm64_sve-ptrace_Set_SVE_VL_1440: pass
arm64_sve-ptrace_Set_SVE_VL_1456: pass
arm64_sve-ptrace_Set_SVE_VL_1472: pass
arm64_sve-ptrace_Set_SVE_VL_1488: pass
arm64_sve-ptrace_Set_SVE_VL_1504: pass
arm64_sve-ptrace_Set_SVE_VL_1520: pass
arm64_sve-ptrace_Set_SVE_VL_1536: pass
arm64_sve-ptrace_Set_SVE_VL_1552: pass
arm64_sve-ptrace_Set_SVE_VL_1568: pass
arm64_sve-ptrace_Set_SVE_VL_1584: pass
arm64_sve-ptrace_Set_SVE_VL_16: pass
arm64_sve-ptrace_Set_SVE_VL_160: pass
arm64_sve-ptrace_Set_SVE_VL_1600: pass
arm64_sve-ptrace_Set_SVE_VL_1616: pass
arm64_sve-ptrace_Set_SVE_VL_1632: pass
arm64_sve-ptrace_Set_SVE_VL_1648: pass
arm64_sve-ptrace_Set_SVE_VL_1664: pass
arm64_sve-ptrace_Set_SVE_VL_1680: pass
arm64_sve-ptrace_Set_SVE_VL_1696: pass
arm64_sve-ptrace_Set_SVE_VL_1712: pass
arm64_sve-ptrace_Set_SVE_VL_1728: pass
arm64_sve-ptrace_Set_SVE_VL_1744: pass
arm64_sve-ptrace_Set_SVE_VL_176: pass
arm64_sve-ptrace_Set_SVE_VL_1760: pass
arm64_sve-ptrace_Set_SVE_VL_1776: pass
arm64_sve-ptrace_Set_SVE_VL_1792: pass
arm64_sve-ptrace_Set_SVE_VL_1808: pass
arm64_sve-ptrace_Set_SVE_VL_1824: pass
arm64_sve-ptrace_Set_SVE_VL_1840: pass
arm64_sve-ptrace_Set_SVE_VL_1856: pass
arm64_sve-ptrace_Set_SVE_VL_1872: pass
arm64_sve-ptrace_Set_SVE_VL_1888: pass
arm64_sve-ptrace_Set_SVE_VL_1904: pass
arm64_sve-ptrace_Set_SVE_VL_192: pass
arm64_sve-ptrace_Set_SVE_VL_1920: pass
arm64_sve-ptrace_Set_SVE_VL_1936: pass
arm64_sve-ptrace_Set_SVE_VL_1952: pass
arm64_sve-ptrace_Set_SVE_VL_1968: pass
arm64_sve-ptrace_Set_SVE_VL_1984: pass
arm64_sve-ptrace_Set_SVE_VL_2000: pass
arm64_sve-ptrace_Set_SVE_VL_2016: pass
arm64_sve-ptrace_Set_SVE_VL_2032: pass
arm64_sve-ptrace_Set_SVE_VL_2048: pass
arm64_sve-ptrace_Set_SVE_VL_2064: pass
arm64_sve-ptrace_Set_SVE_VL_208: pass
arm64_sve-ptrace_Set_SVE_VL_2080: pass
arm64_sve-ptrace_Set_SVE_VL_2096: pass
arm64_sve-ptrace_Set_SVE_VL_2112: pass
arm64_sve-ptrace_Set_SVE_VL_2128: pass
arm64_sve-ptrace_Set_SVE_VL_2144: pass
arm64_sve-ptrace_Set_SVE_VL_2160: pass
arm64_sve-ptrace_Set_SVE_VL_2176: pass
arm64_sve-ptrace_Set_SVE_VL_2192: pass
arm64_sve-ptrace_Set_SVE_VL_2208: pass
arm64_sve-ptrace_Set_SVE_VL_2224: pass
arm64_sve-ptrace_Set_SVE_VL_224: pass
arm64_sve-ptrace_Set_SVE_VL_2240: pass
arm64_sve-ptrace_Set_SVE_VL_2256: pass
arm64_sve-ptrace_Set_SVE_VL_2272: pass
arm64_sve-ptrace_Set_SVE_VL_2288: pass
arm64_sve-ptrace_Set_SVE_VL_2304: pass
arm64_sve-ptrace_Set_SVE_VL_2320: pass
arm64_sve-ptrace_Set_SVE_VL_2336: pass
arm64_sve-ptrace_Set_SVE_VL_2352: pass
arm64_sve-ptrace_Set_SVE_VL_2368: pass
arm64_sve-ptrace_Set_SVE_VL_2384: pass
arm64_sve-ptrace_Set_SVE_VL_240: pass
arm64_sve-ptrace_Set_SVE_VL_2400: pass
arm64_sve-ptrace_Set_SVE_VL_2416: pass
arm64_sve-ptrace_Set_SVE_VL_2432: pass
arm64_sve-ptrace_Set_SVE_VL_2448: pass
arm64_sve-ptrace_Set_SVE_VL_2464: pass
arm64_sve-ptrace_Set_SVE_VL_2480: pass
arm64_sve-ptrace_Set_SVE_VL_2496: pass
arm64_sve-ptrace_Set_SVE_VL_2512: pass
arm64_sve-ptrace_Set_SVE_VL_2528: pass
arm64_sve-ptrace_Set_SVE_VL_2544: pass
arm64_sve-ptrace_Set_SVE_VL_256: pass
arm64_sve-ptrace_Set_SVE_VL_2560: pass
arm64_sve-ptrace_Set_SVE_VL_2576: pass
arm64_sve-ptrace_Set_SVE_VL_2592: pass
arm64_sve-ptrace_Set_SVE_VL_2608: pass
arm64_sve-ptrace_Set_SVE_VL_2624: pass
arm64_sve-ptrace_Set_SVE_VL_2640: pass
arm64_sve-ptrace_Set_SVE_VL_2656: pass
arm64_sve-ptrace_Set_SVE_VL_2672: pass
arm64_sve-ptrace_Set_SVE_VL_2688: pass
arm64_sve-ptrace_Set_SVE_VL_2704: pass
arm64_sve-ptrace_Set_SVE_VL_272: pass
arm64_sve-ptrace_Set_SVE_VL_2720: pass
arm64_sve-ptrace_Set_SVE_VL_2736: pass
arm64_sve-ptrace_Set_SVE_VL_2752: pass
arm64_sve-ptrace_Set_SVE_VL_2768: pass
arm64_sve-ptrace_Set_SVE_VL_2784: pass
arm64_sve-ptrace_Set_SVE_VL_2800: pass
arm64_sve-ptrace_Set_SVE_VL_2816: pass
arm64_sve-ptrace_Set_SVE_VL_2832: pass
arm64_sve-ptrace_Set_SVE_VL_2848: pass
arm64_sve-ptrace_Set_SVE_VL_2864: pass
arm64_sve-ptrace_Set_SVE_VL_288: pass
arm64_sve-ptrace_Set_SVE_VL_2880: pass
arm64_sve-ptrace_Set_SVE_VL_2896: pass
arm64_sve-ptrace_Set_SVE_VL_2912: pass
arm64_sve-ptrace_Set_SVE_VL_2928: pass
arm64_sve-ptrace_Set_SVE_VL_2944: pass
arm64_sve-ptrace_Set_SVE_VL_2960: pass
arm64_sve-ptrace_Set_SVE_VL_2976: pass
arm64_sve-ptrace_Set_SVE_VL_2992: pass
arm64_sve-ptrace_Set_SVE_VL_3008: pass
arm64_sve-ptrace_Set_SVE_VL_3024: pass
arm64_sve-ptrace_Set_SVE_VL_304: pass
arm64_sve-ptrace_Set_SVE_VL_3040: pass
arm64_sve-ptrace_Set_SVE_VL_3056: pass
arm64_sve-ptrace_Set_SVE_VL_3072: pass
arm64_sve-ptrace_Set_SVE_VL_3088: pass
arm64_sve-ptrace_Set_SVE_VL_3104: pass
arm64_sve-ptrace_Set_SVE_VL_3120: pass
arm64_sve-ptrace_Set_SVE_VL_3136: pass
arm64_sve-ptrace_Set_SVE_VL_3152: pass
arm64_sve-ptrace_Set_SVE_VL_3168: pass
arm64_sve-ptrace_Set_SVE_VL_3184: pass
arm64_sve-ptrace_Set_SVE_VL_32: pass
arm64_sve-ptrace_Set_SVE_VL_320: pass
arm64_sve-ptrace_Set_SVE_VL_3200: pass
arm64_sve-ptrace_Set_SVE_VL_3216: pass
arm64_sve-ptrace_Set_SVE_VL_3232: pass
arm64_sve-ptrace_Set_SVE_VL_3248: pass
arm64_sve-ptrace_Set_SVE_VL_3264: pass
arm64_sve-ptrace_Set_SVE_VL_3280: pass
arm64_sve-ptrace_Set_SVE_VL_3296: pass
arm64_sve-ptrace_Set_SVE_VL_3312: pass
arm64_sve-ptrace_Set_SVE_VL_3328: pass
arm64_sve-ptrace_Set_SVE_VL_3344: pass
arm64_sve-ptrace_Set_SVE_VL_336: pass
arm64_sve-ptrace_Set_SVE_VL_3360: pass
arm64_sve-ptrace_Set_SVE_VL_3376: pass
arm64_sve-ptrace_Set_SVE_VL_3392: pass
arm64_sve-ptrace_Set_SVE_VL_3408: pass
arm64_sve-ptrace_Set_SVE_VL_3424: pass
arm64_sve-ptrace_Set_SVE_VL_3440: pass
arm64_sve-ptrace_Set_SVE_VL_3456: pass
arm64_sve-ptrace_Set_SVE_VL_3472: pass
arm64_sve-ptrace_Set_SVE_VL_3488: pass
arm64_sve-ptrace_Set_SVE_VL_3504: pass
arm64_sve-ptrace_Set_SVE_VL_352: pass
arm64_sve-ptrace_Set_SVE_VL_3520: pass
arm64_sve-ptrace_Set_SVE_VL_3536: pass
arm64_sve-ptrace_Set_SVE_VL_3552: pass
arm64_sve-ptrace_Set_SVE_VL_3568: pass
arm64_sve-ptrace_Set_SVE_VL_3584: pass
arm64_sve-ptrace_Set_SVE_VL_3600: pass
arm64_sve-ptrace_Set_SVE_VL_3616: pass
arm64_sve-ptrace_Set_SVE_VL_3632: pass
arm64_sve-ptrace_Set_SVE_VL_3648: pass
arm64_sve-ptrace_Set_SVE_VL_3664: pass
arm64_sve-ptrace_Set_SVE_VL_368: pass
arm64_sve-ptrace_Set_SVE_VL_3680: pass
arm64_sve-ptrace_Set_SVE_VL_3696: pass
arm64_sve-ptrace_Set_SVE_VL_3712: pass
arm64_sve-ptrace_Set_SVE_VL_3728: pass
arm64_sve-ptrace_Set_SVE_VL_3744: pass
arm64_sve-ptrace_Set_SVE_VL_3760: pass
arm64_sve-ptrace_Set_SVE_VL_3776: pass
arm64_sve-ptrace_Set_SVE_VL_3792: pass
arm64_sve-ptrace_Set_SVE_VL_3808: pass
arm64_sve-ptrace_Set_SVE_VL_3824: pass
arm64_sve-ptrace_Set_SVE_VL_384: pass
arm64_sve-ptrace_Set_SVE_VL_3840: pass
arm64_sve-ptrace_Set_SVE_VL_3856: pass
arm64_sve-ptrace_Set_SVE_VL_3872: pass
arm64_sve-ptrace_Set_SVE_VL_3888: pass
arm64_sve-ptrace_Set_SVE_VL_3904: pass
arm64_sve-ptrace_Set_SVE_VL_3920: pass
arm64_sve-ptrace_Set_SVE_VL_3936: pass
arm64_sve-ptrace_Set_SVE_VL_3952: pass
arm64_sve-ptrace_Set_SVE_VL_3968: pass
arm64_sve-ptrace_Set_SVE_VL_3984: pass
arm64_sve-ptrace_Set_SVE_VL_400: pass
arm64_sve-ptrace_Set_SVE_VL_4000: pass
arm64_sve-ptrace_Set_SVE_VL_4016: pass
arm64_sve-ptrace_Set_SVE_VL_4032: pass
arm64_sve-ptrace_Set_SVE_VL_4048: pass
arm64_sve-ptrace_Set_SVE_VL_4064: pass
arm64_sve-ptrace_Set_SVE_VL_4080: pass
arm64_sve-ptrace_Set_SVE_VL_4096: pass
arm64_sve-ptrace_Set_SVE_VL_4112: pass
arm64_sve-ptrace_Set_SVE_VL_4128: pass
arm64_sve-ptrace_Set_SVE_VL_4144: pass
arm64_sve-ptrace_Set_SVE_VL_416: pass
arm64_sve-ptrace_Set_SVE_VL_4160: pass
arm64_sve-ptrace_Set_SVE_VL_4176: pass
arm64_sve-ptrace_Set_SVE_VL_4192: pass
arm64_sve-ptrace_Set_SVE_VL_4208: pass
arm64_sve-ptrace_Set_SVE_VL_4224: pass
arm64_sve-ptrace_Set_SVE_VL_4240: pass
arm64_sve-ptrace_Set_SVE_VL_4256: pass
arm64_sve-ptrace_Set_SVE_VL_4272: pass
arm64_sve-ptrace_Set_SVE_VL_4288: pass
arm64_sve-ptrace_Set_SVE_VL_4304: pass
arm64_sve-ptrace_Set_SVE_VL_432: pass
arm64_sve-ptrace_Set_SVE_VL_4320: pass
arm64_sve-ptrace_Set_SVE_VL_4336: pass
arm64_sve-ptrace_Set_SVE_VL_4352: pass
arm64_sve-ptrace_Set_SVE_VL_4368: pass
arm64_sve-ptrace_Set_SVE_VL_4384: pass
arm64_sve-ptrace_Set_SVE_VL_4400: pass
arm64_sve-ptrace_Set_SVE_VL_4416: pass
arm64_sve-ptrace_Set_SVE_VL_4432: pass
arm64_sve-ptrace_Set_SVE_VL_4448: pass
arm64_sve-ptrace_Set_SVE_VL_4464: pass
arm64_sve-ptrace_Set_SVE_VL_448: pass
arm64_sve-ptrace_Set_SVE_VL_4480: pass
arm64_sve-ptrace_Set_SVE_VL_4496: pass
arm64_sve-ptrace_Set_SVE_VL_4512: pass
arm64_sve-ptrace_Set_SVE_VL_4528: pass
arm64_sve-ptrace_Set_SVE_VL_4544: pass
arm64_sve-ptrace_Set_SVE_VL_4560: pass
arm64_sve-ptrace_Set_SVE_VL_4576: pass
arm64_sve-ptrace_Set_SVE_VL_4592: pass
arm64_sve-ptrace_Set_SVE_VL_4608: pass
arm64_sve-ptrace_Set_SVE_VL_4624: pass
arm64_sve-ptrace_Set_SVE_VL_464: pass
arm64_sve-ptrace_Set_SVE_VL_4640: pass
arm64_sve-ptrace_Set_SVE_VL_4656: pass
arm64_sve-ptrace_Set_SVE_VL_4672: pass
arm64_sve-ptrace_Set_SVE_VL_4688: pass
arm64_sve-ptrace_Set_SVE_VL_4704: pass
arm64_sve-ptrace_Set_SVE_VL_4720: pass
arm64_sve-ptrace_Set_SVE_VL_4736: pass
arm64_sve-ptrace_Set_SVE_VL_4752: pass
arm64_sve-ptrace_Set_SVE_VL_4768: pass
arm64_sve-ptrace_Set_SVE_VL_4784: pass
arm64_sve-ptrace_Set_SVE_VL_48: pass
arm64_sve-ptrace_Set_SVE_VL_480: pass
arm64_sve-ptrace_Set_SVE_VL_4800: pass
arm64_sve-ptrace_Set_SVE_VL_4816: pass
arm64_sve-ptrace_Set_SVE_VL_4832: pass
arm64_sve-ptrace_Set_SVE_VL_4848: pass
arm64_sve-ptrace_Set_SVE_VL_4864: pass
arm64_sve-ptrace_Set_SVE_VL_4880: pass
arm64_sve-ptrace_Set_SVE_VL_4896: pass
arm64_sve-ptrace_Set_SVE_VL_4912: pass
arm64_sve-ptrace_Set_SVE_VL_4928: pass
arm64_sve-ptrace_Set_SVE_VL_4944: pass
arm64_sve-ptrace_Set_SVE_VL_496: pass
arm64_sve-ptrace_Set_SVE_VL_4960: pass
arm64_sve-ptrace_Set_SVE_VL_4976: pass
arm64_sve-ptrace_Set_SVE_VL_4992: pass
arm64_sve-ptrace_Set_SVE_VL_5008: pass
arm64_sve-ptrace_Set_SVE_VL_5024: pass
arm64_sve-ptrace_Set_SVE_VL_5040: pass
arm64_sve-ptrace_Set_SVE_VL_5056: pass
arm64_sve-ptrace_Set_SVE_VL_5072: pass
arm64_sve-ptrace_Set_SVE_VL_5088: pass
arm64_sve-ptrace_Set_SVE_VL_5104: pass
arm64_sve-ptrace_Set_SVE_VL_512: pass
arm64_sve-ptrace_Set_SVE_VL_5120: pass
arm64_sve-ptrace_Set_SVE_VL_5136: pass
arm64_sve-ptrace_Set_SVE_VL_5152: pass
arm64_sve-ptrace_Set_SVE_VL_5168: pass
arm64_sve-ptrace_Set_SVE_VL_5184: pass
arm64_sve-ptrace_Set_SVE_VL_5200: pass
arm64_sve-ptrace_Set_SVE_VL_5216: pass
arm64_sve-ptrace_Set_SVE_VL_5232: pass
arm64_sve-ptrace_Set_SVE_VL_5248: pass
arm64_sve-ptrace_Set_SVE_VL_5264: pass
arm64_sve-ptrace_Set_SVE_VL_528: pass
arm64_sve-ptrace_Set_SVE_VL_5280: pass
arm64_sve-ptrace_Set_SVE_VL_5296: pass
arm64_sve-ptrace_Set_SVE_VL_5312: pass
arm64_sve-ptrace_Set_SVE_VL_5328: pass
arm64_sve-ptrace_Set_SVE_VL_5344: pass
arm64_sve-ptrace_Set_SVE_VL_5360: pass
arm64_sve-ptrace_Set_SVE_VL_5376: pass
arm64_sve-ptrace_Set_SVE_VL_5392: pass
arm64_sve-ptrace_Set_SVE_VL_5408: pass
arm64_sve-ptrace_Set_SVE_VL_5424: pass
arm64_sve-ptrace_Set_SVE_VL_544: pass
arm64_sve-ptrace_Set_SVE_VL_5440: pass
arm64_sve-ptrace_Set_SVE_VL_5456: pass
arm64_sve-ptrace_Set_SVE_VL_5472: pass
arm64_sve-ptrace_Set_SVE_VL_5488: pass
arm64_sve-ptrace_Set_SVE_VL_5504: pass
arm64_sve-ptrace_Set_SVE_VL_5520: pass
arm64_sve-ptrace_Set_SVE_VL_5536: pass
arm64_sve-ptrace_Set_SVE_VL_5552: pass
arm64_sve-ptrace_Set_SVE_VL_5568: pass
arm64_sve-ptrace_Set_SVE_VL_5584: pass
arm64_sve-ptrace_Set_SVE_VL_560: pass
arm64_sve-ptrace_Set_SVE_VL_5600: pass
arm64_sve-ptrace_Set_SVE_VL_5616: pass
arm64_sve-ptrace_Set_SVE_VL_5632: pass
arm64_sve-ptrace_Set_SVE_VL_5648: pass
arm64_sve-ptrace_Set_SVE_VL_5664: pass
arm64_sve-ptrace_Set_SVE_VL_5680: pass
arm64_sve-ptrace_Set_SVE_VL_5696: pass
arm64_sve-ptrace_Set_SVE_VL_5712: pass
arm64_sve-ptrace_Set_SVE_VL_5728: pass
arm64_sve-ptrace_Set_SVE_VL_5744: pass
arm64_sve-ptrace_Set_SVE_VL_576: pass
arm64_sve-ptrace_Set_SVE_VL_5760: pass
arm64_sve-ptrace_Set_SVE_VL_5776: pass
arm64_sve-ptrace_Set_SVE_VL_5792: pass
arm64_sve-ptrace_Set_SVE_VL_5808: pass
arm64_sve-ptrace_Set_SVE_VL_5824: pass
arm64_sve-ptrace_Set_SVE_VL_5840: pass
arm64_sve-ptrace_Set_SVE_VL_5856: pass
arm64_sve-ptrace_Set_SVE_VL_5872: pass
arm64_sve-ptrace_Set_SVE_VL_5888: pass
arm64_sve-ptrace_Set_SVE_VL_5904: pass
arm64_sve-ptrace_Set_SVE_VL_592: pass
arm64_sve-ptrace_Set_SVE_VL_5920: pass
arm64_sve-ptrace_Set_SVE_VL_5936: pass
arm64_sve-ptrace_Set_SVE_VL_5952: pass
arm64_sve-ptrace_Set_SVE_VL_5968: pass
arm64_sve-ptrace_Set_SVE_VL_5984: pass
arm64_sve-ptrace_Set_SVE_VL_6000: pass
arm64_sve-ptrace_Set_SVE_VL_6016: pass
arm64_sve-ptrace_Set_SVE_VL_6032: pass
arm64_sve-ptrace_Set_SVE_VL_6048: pass
arm64_sve-ptrace_Set_SVE_VL_6064: pass
arm64_sve-ptrace_Set_SVE_VL_608: pass
arm64_sve-ptrace_Set_SVE_VL_6080: pass
arm64_sve-ptrace_Set_SVE_VL_6096: pass
arm64_sve-ptrace_Set_SVE_VL_6112: pass
arm64_sve-ptrace_Set_SVE_VL_6128: pass
arm64_sve-ptrace_Set_SVE_VL_6144: pass
arm64_sve-ptrace_Set_SVE_VL_6160: pass
arm64_sve-ptrace_Set_SVE_VL_6176: pass
arm64_sve-ptrace_Set_SVE_VL_6192: pass
arm64_sve-ptrace_Set_SVE_VL_6208: pass
arm64_sve-ptrace_Set_SVE_VL_6224: pass
arm64_sve-ptrace_Set_SVE_VL_624: pass
arm64_sve-ptrace_Set_SVE_VL_6240: pass
arm64_sve-ptrace_Set_SVE_VL_6256: pass
arm64_sve-ptrace_Set_SVE_VL_6272: pass
arm64_sve-ptrace_Set_SVE_VL_6288: pass
arm64_sve-ptrace_Set_SVE_VL_6304: pass
arm64_sve-ptrace_Set_SVE_VL_6320: pass
arm64_sve-ptrace_Set_SVE_VL_6336: pass
arm64_sve-ptrace_Set_SVE_VL_6352: pass
arm64_sve-ptrace_Set_SVE_VL_6368: pass
arm64_sve-ptrace_Set_SVE_VL_6384: pass
arm64_sve-ptrace_Set_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_640: pass
arm64_sve-ptrace_Set_SVE_VL_6400: pass
arm64_sve-ptrace_Set_SVE_VL_6416: pass
arm64_sve-ptrace_Set_SVE_VL_6432: pass
arm64_sve-ptrace_Set_SVE_VL_6448: pass
arm64_sve-ptrace_Set_SVE_VL_6464: pass
arm64_sve-ptrace_Set_SVE_VL_6480: pass
arm64_sve-ptrace_Set_SVE_VL_6496: pass
arm64_sve-ptrace_Set_SVE_VL_6512: pass
arm64_sve-ptrace_Set_SVE_VL_6528: pass
arm64_sve-ptrace_Set_SVE_VL_6544: pass
arm64_sve-ptrace_Set_SVE_VL_656: pass
arm64_sve-ptrace_Set_SVE_VL_6560: pass
arm64_sve-ptrace_Set_SVE_VL_6576: pass
arm64_sve-ptrace_Set_SVE_VL_6592: pass
arm64_sve-ptrace_Set_SVE_VL_6608: pass
arm64_sve-ptrace_Set_SVE_VL_6624: pass
arm64_sve-ptrace_Set_SVE_VL_6640: pass
arm64_sve-ptrace_Set_SVE_VL_6656: pass
arm64_sve-ptrace_Set_SVE_VL_6672: pass
arm64_sve-ptrace_Set_SVE_VL_6688: pass
arm64_sve-ptrace_Set_SVE_VL_6704: pass
arm64_sve-ptrace_Set_SVE_VL_672: pass
arm64_sve-ptrace_Set_SVE_VL_6720: pass
arm64_sve-ptrace_Set_SVE_VL_6736: pass
arm64_sve-ptrace_Set_SVE_VL_6752: pass
arm64_sve-ptrace_Set_SVE_VL_6768: pass
arm64_sve-ptrace_Set_SVE_VL_6784: pass
arm64_sve-ptrace_Set_SVE_VL_6800: pass
arm64_sve-ptrace_Set_SVE_VL_6816: pass
arm64_sve-ptrace_Set_SVE_VL_6832: pass
arm64_sve-ptrace_Set_SVE_VL_6848: pass
arm64_sve-ptrace_Set_SVE_VL_6864: pass
arm64_sve-ptrace_Set_SVE_VL_688: pass
arm64_sve-ptrace_Set_SVE_VL_6880: pass
arm64_sve-ptrace_Set_SVE_VL_6896: pass
arm64_sve-ptrace_Set_SVE_VL_6912: pass
arm64_sve-ptrace_Set_SVE_VL_6928: pass
arm64_sve-ptrace_Set_SVE_VL_6944: pass
arm64_sve-ptrace_Set_SVE_VL_6960: pass
arm64_sve-ptrace_Set_SVE_VL_6976: pass
arm64_sve-ptrace_Set_SVE_VL_6992: pass
arm64_sve-ptrace_Set_SVE_VL_7008: pass
arm64_sve-ptrace_Set_SVE_VL_7024: pass
arm64_sve-ptrace_Set_SVE_VL_704: pass
arm64_sve-ptrace_Set_SVE_VL_7040: pass
arm64_sve-ptrace_Set_SVE_VL_7056: pass
arm64_sve-ptrace_Set_SVE_VL_7072: pass
arm64_sve-ptrace_Set_SVE_VL_7088: pass
arm64_sve-ptrace_Set_SVE_VL_7104: pass
arm64_sve-ptrace_Set_SVE_VL_7120: pass
arm64_sve-ptrace_Set_SVE_VL_7136: pass
arm64_sve-ptrace_Set_SVE_VL_7152: pass
arm64_sve-ptrace_Set_SVE_VL_7168: pass
arm64_sve-ptrace_Set_SVE_VL_7184: pass
arm64_sve-ptrace_Set_SVE_VL_720: pass
arm64_sve-ptrace_Set_SVE_VL_7200: pass
arm64_sve-ptrace_Set_SVE_VL_7216: pass
arm64_sve-ptrace_Set_SVE_VL_7232: pass
arm64_sve-ptrace_Set_SVE_VL_7248: pass
arm64_sve-ptrace_Set_SVE_VL_7264: pass
arm64_sve-ptrace_Set_SVE_VL_7280: pass
arm64_sve-ptrace_Set_SVE_VL_7296: pass
arm64_sve-ptrace_Set_SVE_VL_7312: pass
arm64_sve-ptrace_Set_SVE_VL_7328: pass
arm64_sve-ptrace_Set_SVE_VL_7344: pass
arm64_sve-ptrace_Set_SVE_VL_736: pass
arm64_sve-ptrace_Set_SVE_VL_7360: pass
arm64_sve-ptrace_Set_SVE_VL_7376: pass
arm64_sve-ptrace_Set_SVE_VL_7392: pass
arm64_sve-ptrace_Set_SVE_VL_7408: pass
arm64_sve-ptrace_Set_SVE_VL_7424: pass
arm64_sve-ptrace_Set_SVE_VL_7440: pass
arm64_sve-ptrace_Set_SVE_VL_7456: pass
arm64_sve-ptrace_Set_SVE_VL_7472: pass
arm64_sve-ptrace_Set_SVE_VL_7488: pass
arm64_sve-ptrace_Set_SVE_VL_7504: pass
arm64_sve-ptrace_Set_SVE_VL_752: pass
arm64_sve-ptrace_Set_SVE_VL_7520: pass
arm64_sve-ptrace_Set_SVE_VL_7536: pass
arm64_sve-ptrace_Set_SVE_VL_7552: pass
arm64_sve-ptrace_Set_SVE_VL_7568: pass
arm64_sve-ptrace_Set_SVE_VL_7584: pass
arm64_sve-ptrace_Set_SVE_VL_7600: pass
arm64_sve-ptrace_Set_SVE_VL_7616: pass
arm64_sve-ptrace_Set_SVE_VL_7632: pass
arm64_sve-ptrace_Set_SVE_VL_7648: pass
arm64_sve-ptrace_Set_SVE_VL_7664: pass
arm64_sve-ptrace_Set_SVE_VL_768: pass
arm64_sve-ptrace_Set_SVE_VL_7680: pass
arm64_sve-ptrace_Set_SVE_VL_7696: pass
arm64_sve-ptrace_Set_SVE_VL_7712: pass
arm64_sve-ptrace_Set_SVE_VL_7728: pass
arm64_sve-ptrace_Set_SVE_VL_7744: pass
arm64_sve-ptrace_Set_SVE_VL_7760: pass
arm64_sve-ptrace_Set_SVE_VL_7776: pass
arm64_sve-ptrace_Set_SVE_VL_7792: pass
arm64_sve-ptrace_Set_SVE_VL_7808: pass
arm64_sve-ptrace_Set_SVE_VL_7824: pass
arm64_sve-ptrace_Set_SVE_VL_784: pass
arm64_sve-ptrace_Set_SVE_VL_7840: pass
arm64_sve-ptrace_Set_SVE_VL_7856: pass
arm64_sve-ptrace_Set_SVE_VL_7872: pass
arm64_sve-ptrace_Set_SVE_VL_7888: pass
arm64_sve-ptrace_Set_SVE_VL_7904: pass
arm64_sve-ptrace_Set_SVE_VL_7920: pass
arm64_sve-ptrace_Set_SVE_VL_7936: pass
arm64_sve-ptrace_Set_SVE_VL_7952: pass
arm64_sve-ptrace_Set_SVE_VL_7968: pass
arm64_sve-ptrace_Set_SVE_VL_7984: pass
arm64_sve-ptrace_Set_SVE_VL_80: pass
arm64_sve-ptrace_Set_SVE_VL_800: pass
arm64_sve-ptrace_Set_SVE_VL_8000: pass
arm64_sve-ptrace_Set_SVE_VL_8016: pass
arm64_sve-ptrace_Set_SVE_VL_8032: pass
arm64_sve-ptrace_Set_SVE_VL_8048: pass
arm64_sve-ptrace_Set_SVE_VL_8064: pass
arm64_sve-ptrace_Set_SVE_VL_8080: pass
arm64_sve-ptrace_Set_SVE_VL_8096: pass
arm64_sve-ptrace_Set_SVE_VL_8112: pass
arm64_sve-ptrace_Set_SVE_VL_8128: pass
arm64_sve-ptrace_Set_SVE_VL_8144: pass
arm64_sve-ptrace_Set_SVE_VL_816: pass
arm64_sve-ptrace_Set_SVE_VL_8160: pass
arm64_sve-ptrace_Set_SVE_VL_8176: pass
arm64_sve-ptrace_Set_SVE_VL_8192: pass
arm64_sve-ptrace_Set_SVE_VL_832: pass
arm64_sve-ptrace_Set_SVE_VL_848: pass
arm64_sve-ptrace_Set_SVE_VL_864: pass
arm64_sve-ptrace_Set_SVE_VL_880: pass
arm64_sve-ptrace_Set_SVE_VL_896: pass
arm64_sve-ptrace_Set_SVE_VL_912: pass
arm64_sve-ptrace_Set_SVE_VL_928: pass
arm64_sve-ptrace_Set_SVE_VL_944: pass
arm64_sve-ptrace_Set_SVE_VL_96: pass
arm64_sve-ptrace_Set_SVE_VL_960: pass
arm64_sve-ptrace_Set_SVE_VL_976: pass
arm64_sve-ptrace_Set_SVE_VL_992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_48: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_80: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_96: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_992: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve_regs: pass
arm64_sve_vl: pass
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_getpid_SVE_VL_112: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16: pass
arm64_syscall-abi_getpid_SVE_VL_160: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_syscall-abi_sched_yield_SVE_VL_112: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16: pass
arm64_syscall-abi_sched_yield_SVE_VL_160: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_default_value: pass
arm64_tpidr2_write_clone_read: pass
arm64_tpidr2_write_fork_read: pass
arm64_tpidr2_write_read: pass
arm64_tpidr2_write_sleep_read: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_current_VL_is_32: pass
arm64_vec-syscfg_SME_default_vector_length_32: pass
arm64_vec-syscfg_SME_maximum_vector_length_256: pass
arm64_vec-syscfg_SME_minimum_vector_length_16: pass
arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SME_prctl_set_min_max: pass
arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32: pass
arm64_vec-syscfg_SME_vector_length_set_on_exec: pass
arm64_vec-syscfg_SME_vector_length_used_default: pass
arm64_vec-syscfg_SME_vector_length_was_inherited: pass
arm64_vec-syscfg_SVE_current_VL_is_64: pass
arm64_vec-syscfg_SVE_default_vector_length_64: pass
arm64_vec-syscfg_SVE_maximum_vector_length_256: pass
arm64_vec-syscfg_SVE_minimum_vector_length_16: pass
arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SVE_prctl_set_min_max: pass
arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64: pass
arm64_vec-syscfg_SVE_vector_length_set_on_exec: pass
arm64_vec-syscfg_SVE_vector_length_used_default: pass
arm64_vec-syscfg_SVE_vector_length_was_inherited: pass
arm64_za-fork: pass
arm64_za-fork_fork_test: pass
arm64_za-ptrace: pass
arm64_za-ptrace_Data_match_for_VL_128: pass
arm64_za-ptrace_Data_match_for_VL_16: pass
arm64_za-ptrace_Data_match_for_VL_256: pass
arm64_za-ptrace_Data_match_for_VL_32: pass
arm64_za-ptrace_Data_match_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_128: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_16: pass
arm64_za-ptrace_Disabled_ZA_for_VL_160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_256: pass
arm64_za-ptrace_Disabled_ZA_for_VL_2560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_32: pass
arm64_za-ptrace_Disabled_ZA_for_VL_320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_48: skip
arm64_za-ptrace_Disabled_ZA_for_VL_480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_80: skip
arm64_za-ptrace_Disabled_ZA_for_VL_800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_96: skip
arm64_za-ptrace_Disabled_ZA_for_VL_960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_48: skip
arm64_za-ptrace_Get_and_set_data_for_VL_480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_80: skip
arm64_za-ptrace_Get_and_set_data_for_VL_800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_96: skip
arm64_za-ptrace_Get_and_set_data_for_VL_960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_992: skip
arm64_za-ptrace_Set_VL_1008: pass
arm64_za-ptrace_Set_VL_1024: pass
arm64_za-ptrace_Set_VL_1040: pass
arm64_za-ptrace_Set_VL_1056: pass
arm64_za-ptrace_Set_VL_1072: pass
arm64_za-ptrace_Set_VL_1088: pass
arm64_za-ptrace_Set_VL_1104: pass
arm64_za-ptrace_Set_VL_112: pass
arm64_za-ptrace_Set_VL_1120: pass
arm64_za-ptrace_Set_VL_1136: pass
arm64_za-ptrace_Set_VL_1152: pass
arm64_za-ptrace_Set_VL_1168: pass
arm64_za-ptrace_Set_VL_1184: pass
arm64_za-ptrace_Set_VL_1200: pass
arm64_za-ptrace_Set_VL_1216: pass
arm64_za-ptrace_Set_VL_1232: pass
arm64_za-ptrace_Set_VL_1248: pass
arm64_za-ptrace_Set_VL_1264: pass
arm64_za-ptrace_Set_VL_128: pass
arm64_za-ptrace_Set_VL_1280: pass
arm64_za-ptrace_Set_VL_1296: pass
arm64_za-ptrace_Set_VL_1312: pass
arm64_za-ptrace_Set_VL_1328: pass
arm64_za-ptrace_Set_VL_1344: pass
arm64_za-ptrace_Set_VL_1360: pass
arm64_za-ptrace_Set_VL_1376: pass
arm64_za-ptrace_Set_VL_1392: pass
arm64_za-ptrace_Set_VL_1408: pass
arm64_za-ptrace_Set_VL_1424: pass
arm64_za-ptrace_Set_VL_144: pass
arm64_za-ptrace_Set_VL_1440: pass
arm64_za-ptrace_Set_VL_1456: pass
arm64_za-ptrace_Set_VL_1472: pass
arm64_za-ptrace_Set_VL_1488: pass
arm64_za-ptrace_Set_VL_1504: pass
arm64_za-ptrace_Set_VL_1520: pass
arm64_za-ptrace_Set_VL_1536: pass
arm64_za-ptrace_Set_VL_1552: pass
arm64_za-ptrace_Set_VL_1568: pass
arm64_za-ptrace_Set_VL_1584: pass
arm64_za-ptrace_Set_VL_16: pass
arm64_za-ptrace_Set_VL_160: pass
arm64_za-ptrace_Set_VL_1600: pass
arm64_za-ptrace_Set_VL_1616: pass
arm64_za-ptrace_Set_VL_1632: pass
arm64_za-ptrace_Set_VL_1648: pass
arm64_za-ptrace_Set_VL_1664: pass
arm64_za-ptrace_Set_VL_1680: pass
arm64_za-ptrace_Set_VL_1696: pass
arm64_za-ptrace_Set_VL_1712: pass
arm64_za-ptrace_Set_VL_1728: pass
arm64_za-ptrace_Set_VL_1744: pass
arm64_za-ptrace_Set_VL_176: pass
arm64_za-ptrace_Set_VL_1760: pass
arm64_za-ptrace_Set_VL_1776: pass
arm64_za-ptrace_Set_VL_1792: pass
arm64_za-ptrace_Set_VL_1808: pass
arm64_za-ptrace_Set_VL_1824: pass
arm64_za-ptrace_Set_VL_1840: pass
arm64_za-ptrace_Set_VL_1856: pass
arm64_za-ptrace_Set_VL_1872: pass
arm64_za-ptrace_Set_VL_1888: pass
arm64_za-ptrace_Set_VL_1904: pass
arm64_za-ptrace_Set_VL_192: pass
arm64_za-ptrace_Set_VL_1920: pass
arm64_za-ptrace_Set_VL_1936: pass
arm64_za-ptrace_Set_VL_1952: pass
arm64_za-ptrace_Set_VL_1968: pass
arm64_za-ptrace_Set_VL_1984: pass
arm64_za-ptrace_Set_VL_2000: pass
arm64_za-ptrace_Set_VL_2016: pass
arm64_za-ptrace_Set_VL_2032: pass
arm64_za-ptrace_Set_VL_2048: pass
arm64_za-ptrace_Set_VL_2064: pass
arm64_za-ptrace_Set_VL_208: pass
arm64_za-ptrace_Set_VL_2080: pass
arm64_za-ptrace_Set_VL_2096: pass
arm64_za-ptrace_Set_VL_2112: pass
arm64_za-ptrace_Set_VL_2128: pass
arm64_za-ptrace_Set_VL_2144: pass
arm64_za-ptrace_Set_VL_2160: pass
arm64_za-ptrace_Set_VL_2176: pass
arm64_za-ptrace_Set_VL_2192: pass
arm64_za-ptrace_Set_VL_2208: pass
arm64_za-ptrace_Set_VL_2224: pass
arm64_za-ptrace_Set_VL_224: pass
arm64_za-ptrace_Set_VL_2240: pass
arm64_za-ptrace_Set_VL_2256: pass
arm64_za-ptrace_Set_VL_2272: pass
arm64_za-ptrace_Set_VL_2288: pass
arm64_za-ptrace_Set_VL_2304: pass
arm64_za-ptrace_Set_VL_2320: pass
arm64_za-ptrace_Set_VL_2336: pass
arm64_za-ptrace_Set_VL_2352: pass
arm64_za-ptrace_Set_VL_2368: pass
arm64_za-ptrace_Set_VL_2384: pass
arm64_za-ptrace_Set_VL_240: pass
arm64_za-ptrace_Set_VL_2400: pass
arm64_za-ptrace_Set_VL_2416: pass
arm64_za-ptrace_Set_VL_2432: pass
arm64_za-ptrace_Set_VL_2448: pass
arm64_za-ptrace_Set_VL_2464: pass
arm64_za-ptrace_Set_VL_2480: pass
arm64_za-ptrace_Set_VL_2496: pass
arm64_za-ptrace_Set_VL_2512: pass
arm64_za-ptrace_Set_VL_2528: pass
arm64_za-ptrace_Set_VL_2544: pass
arm64_za-ptrace_Set_VL_256: pass
arm64_za-ptrace_Set_VL_2560: pass
arm64_za-ptrace_Set_VL_2576: pass
arm64_za-ptrace_Set_VL_2592: pass
arm64_za-ptrace_Set_VL_2608: pass
arm64_za-ptrace_Set_VL_2624: pass
arm64_za-ptrace_Set_VL_2640: pass
arm64_za-ptrace_Set_VL_2656: pass
arm64_za-ptrace_Set_VL_2672: pass
arm64_za-ptrace_Set_VL_2688: pass
arm64_za-ptrace_Set_VL_2704: pass
arm64_za-ptrace_Set_VL_272: pass
arm64_za-ptrace_Set_VL_2720: pass
arm64_za-ptrace_Set_VL_2736: pass
arm64_za-ptrace_Set_VL_2752: pass
arm64_za-ptrace_Set_VL_2768: pass
arm64_za-ptrace_Set_VL_2784: pass
arm64_za-ptrace_Set_VL_2800: pass
arm64_za-ptrace_Set_VL_2816: pass
arm64_za-ptrace_Set_VL_2832: pass
arm64_za-ptrace_Set_VL_2848: pass
arm64_za-ptrace_Set_VL_2864: pass
arm64_za-ptrace_Set_VL_288: pass
arm64_za-ptrace_Set_VL_2880: pass
arm64_za-ptrace_Set_VL_2896: pass
arm64_za-ptrace_Set_VL_2912: pass
arm64_za-ptrace_Set_VL_2928: pass
arm64_za-ptrace_Set_VL_2944: pass
arm64_za-ptrace_Set_VL_2960: pass
arm64_za-ptrace_Set_VL_2976: pass
arm64_za-ptrace_Set_VL_2992: pass
arm64_za-ptrace_Set_VL_3008: pass
arm64_za-ptrace_Set_VL_3024: pass
arm64_za-ptrace_Set_VL_304: pass
arm64_za-ptrace_Set_VL_3040: pass
arm64_za-ptrace_Set_VL_3056: pass
arm64_za-ptrace_Set_VL_3072: pass
arm64_za-ptrace_Set_VL_3088: pass
arm64_za-ptrace_Set_VL_3104: pass
arm64_za-ptrace_Set_VL_3120: pass
arm64_za-ptrace_Set_VL_3136: pass
arm64_za-ptrace_Set_VL_3152: pass
arm64_za-ptrace_Set_VL_3168: pass
arm64_za-ptrace_Set_VL_3184: pass
arm64_za-ptrace_Set_VL_32: pass
arm64_za-ptrace_Set_VL_320: pass
arm64_za-ptrace_Set_VL_3200: pass
arm64_za-ptrace_Set_VL_3216: pass
arm64_za-ptrace_Set_VL_3232: pass
arm64_za-ptrace_Set_VL_3248: pass
arm64_za-ptrace_Set_VL_3264: pass
arm64_za-ptrace_Set_VL_3280: pass
arm64_za-ptrace_Set_VL_3296: pass
arm64_za-ptrace_Set_VL_3312: pass
arm64_za-ptrace_Set_VL_3328: pass
arm64_za-ptrace_Set_VL_3344: pass
arm64_za-ptrace_Set_VL_336: pass
arm64_za-ptrace_Set_VL_3360: pass
arm64_za-ptrace_Set_VL_3376: pass
arm64_za-ptrace_Set_VL_3392: pass
arm64_za-ptrace_Set_VL_3408: pass
arm64_za-ptrace_Set_VL_3424: pass
arm64_za-ptrace_Set_VL_3440: pass
arm64_za-ptrace_Set_VL_3456: pass
arm64_za-ptrace_Set_VL_3472: pass
arm64_za-ptrace_Set_VL_3488: pass
arm64_za-ptrace_Set_VL_3504: pass
arm64_za-ptrace_Set_VL_352: pass
arm64_za-ptrace_Set_VL_3520: pass
arm64_za-ptrace_Set_VL_3536: pass
arm64_za-ptrace_Set_VL_3552: pass
arm64_za-ptrace_Set_VL_3568: pass
arm64_za-ptrace_Set_VL_3584: pass
arm64_za-ptrace_Set_VL_3600: pass
arm64_za-ptrace_Set_VL_3616: pass
arm64_za-ptrace_Set_VL_3632: pass
arm64_za-ptrace_Set_VL_3648: pass
arm64_za-ptrace_Set_VL_3664: pass
arm64_za-ptrace_Set_VL_368: pass
arm64_za-ptrace_Set_VL_3680: pass
arm64_za-ptrace_Set_VL_3696: pass
arm64_za-ptrace_Set_VL_3712: pass
arm64_za-ptrace_Set_VL_3728: pass
arm64_za-ptrace_Set_VL_3744: pass
arm64_za-ptrace_Set_VL_3760: pass
arm64_za-ptrace_Set_VL_3776: pass
arm64_za-ptrace_Set_VL_3792: pass
arm64_za-ptrace_Set_VL_3808: pass
arm64_za-ptrace_Set_VL_3824: pass
arm64_za-ptrace_Set_VL_384: pass
arm64_za-ptrace_Set_VL_3840: pass
arm64_za-ptrace_Set_VL_3856: pass
arm64_za-ptrace_Set_VL_3872: pass
arm64_za-ptrace_Set_VL_3888: pass
arm64_za-ptrace_Set_VL_3904: pass
arm64_za-ptrace_Set_VL_3920: pass
arm64_za-ptrace_Set_VL_3936: pass
arm64_za-ptrace_Set_VL_3952: pass
arm64_za-ptrace_Set_VL_3968: pass
arm64_za-ptrace_Set_VL_3984: pass
arm64_za-ptrace_Set_VL_400: pass
arm64_za-ptrace_Set_VL_4000: pass
arm64_za-ptrace_Set_VL_4016: pass
arm64_za-ptrace_Set_VL_4032: pass
arm64_za-ptrace_Set_VL_4048: pass
arm64_za-ptrace_Set_VL_4064: pass
arm64_za-ptrace_Set_VL_4080: pass
arm64_za-ptrace_Set_VL_4096: pass
arm64_za-ptrace_Set_VL_4112: pass
arm64_za-ptrace_Set_VL_4128: pass
arm64_za-ptrace_Set_VL_4144: pass
arm64_za-ptrace_Set_VL_416: pass
arm64_za-ptrace_Set_VL_4160: pass
arm64_za-ptrace_Set_VL_4176: pass
arm64_za-ptrace_Set_VL_4192: pass
arm64_za-ptrace_Set_VL_4208: pass
arm64_za-ptrace_Set_VL_4224: pass
arm64_za-ptrace_Set_VL_4240: pass
arm64_za-ptrace_Set_VL_4256: pass
arm64_za-ptrace_Set_VL_4272: pass
arm64_za-ptrace_Set_VL_4288: pass
arm64_za-ptrace_Set_VL_4304: pass
arm64_za-ptrace_Set_VL_432: pass
arm64_za-ptrace_Set_VL_4320: pass
arm64_za-ptrace_Set_VL_4336: pass
arm64_za-ptrace_Set_VL_4352: pass
arm64_za-ptrace_Set_VL_4368: pass
arm64_za-ptrace_Set_VL_4384: pass
arm64_za-ptrace_Set_VL_4400: pass
arm64_za-ptrace_Set_VL_4416: pass
arm64_za-ptrace_Set_VL_4432: pass
arm64_za-ptrace_Set_VL_4448: pass
arm64_za-ptrace_Set_VL_4464: pass
arm64_za-ptrace_Set_VL_448: pass
arm64_za-ptrace_Set_VL_4480: pass
arm64_za-ptrace_Set_VL_4496: pass
arm64_za-ptrace_Set_VL_4512: pass
arm64_za-ptrace_Set_VL_4528: pass
arm64_za-ptrace_Set_VL_4544: pass
arm64_za-ptrace_Set_VL_4560: pass
arm64_za-ptrace_Set_VL_4576: pass
arm64_za-ptrace_Set_VL_4592: pass
arm64_za-ptrace_Set_VL_4608: pass
arm64_za-ptrace_Set_VL_4624: pass
arm64_za-ptrace_Set_VL_464: pass
arm64_za-ptrace_Set_VL_4640: pass
arm64_za-ptrace_Set_VL_4656: pass
arm64_za-ptrace_Set_VL_4672: pass
arm64_za-ptrace_Set_VL_4688: pass
arm64_za-ptrace_Set_VL_4704: pass
arm64_za-ptrace_Set_VL_4720: pass
arm64_za-ptrace_Set_VL_4736: pass
arm64_za-ptrace_Set_VL_4752: pass
arm64_za-ptrace_Set_VL_4768: pass
arm64_za-ptrace_Set_VL_4784: pass
arm64_za-ptrace_Set_VL_48: pass
arm64_za-ptrace_Set_VL_480: pass
arm64_za-ptrace_Set_VL_4800: pass
arm64_za-ptrace_Set_VL_4816: pass
arm64_za-ptrace_Set_VL_4832: pass
arm64_za-ptrace_Set_VL_4848: pass
arm64_za-ptrace_Set_VL_4864: pass
arm64_za-ptrace_Set_VL_4880: pass
arm64_za-ptrace_Set_VL_4896: pass
arm64_za-ptrace_Set_VL_4912: pass
arm64_za-ptrace_Set_VL_4928: pass
arm64_za-ptrace_Set_VL_4944: pass
arm64_za-ptrace_Set_VL_496: pass
arm64_za-ptrace_Set_VL_4960: pass
arm64_za-ptrace_Set_VL_4976: pass
arm64_za-ptrace_Set_VL_4992: pass
arm64_za-ptrace_Set_VL_5008: pass
arm64_za-ptrace_Set_VL_5024: pass
arm64_za-ptrace_Set_VL_5040: pass
arm64_za-ptrace_Set_VL_5056: pass
arm64_za-ptrace_Set_VL_5072: pass
arm64_za-ptrace_Set_VL_5088: pass
arm64_za-ptrace_Set_VL_5104: pass
arm64_za-ptrace_Set_VL_512: pass
arm64_za-ptrace_Set_VL_5120: pass
arm64_za-ptrace_Set_VL_5136: pass
arm64_za-ptrace_Set_VL_5152: pass
arm64_za-ptrace_Set_VL_5168: pass
arm64_za-ptrace_Set_VL_5184: pass
arm64_za-ptrace_Set_VL_5200: pass
arm64_za-ptrace_Set_VL_5216: pass
arm64_za-ptrace_Set_VL_5232: pass
arm64_za-ptrace_Set_VL_5248: pass
arm64_za-ptrace_Set_VL_5264: pass
arm64_za-ptrace_Set_VL_528: pass
arm64_za-ptrace_Set_VL_5280: pass
arm64_za-ptrace_Set_VL_5296: pass
arm64_za-ptrace_Set_VL_5312: pass
arm64_za-ptrace_Set_VL_5328: pass
arm64_za-ptrace_Set_VL_5344: pass
arm64_za-ptrace_Set_VL_5360: pass
arm64_za-ptrace_Set_VL_5376: pass
arm64_za-ptrace_Set_VL_5392: pass
arm64_za-ptrace_Set_VL_5408: pass
arm64_za-ptrace_Set_VL_5424: pass
arm64_za-ptrace_Set_VL_544: pass
arm64_za-ptrace_Set_VL_5440: pass
arm64_za-ptrace_Set_VL_5456: pass
arm64_za-ptrace_Set_VL_5472: pass
arm64_za-ptrace_Set_VL_5488: pass
arm64_za-ptrace_Set_VL_5504: pass
arm64_za-ptrace_Set_VL_5520: pass
arm64_za-ptrace_Set_VL_5536: pass
arm64_za-ptrace_Set_VL_5552: pass
arm64_za-ptrace_Set_VL_5568: pass
arm64_za-ptrace_Set_VL_5584: pass
arm64_za-ptrace_Set_VL_560: pass
arm64_za-ptrace_Set_VL_5600: pass
arm64_za-ptrace_Set_VL_5616: pass
arm64_za-ptrace_Set_VL_5632: pass
arm64_za-ptrace_Set_VL_5648: pass
arm64_za-ptrace_Set_VL_5664: pass
arm64_za-ptrace_Set_VL_5680: pass
arm64_za-ptrace_Set_VL_5696: pass
arm64_za-ptrace_Set_VL_5712: pass
arm64_za-ptrace_Set_VL_5728: pass
arm64_za-ptrace_Set_VL_5744: pass
arm64_za-ptrace_Set_VL_576: pass
arm64_za-ptrace_Set_VL_5760: pass
arm64_za-ptrace_Set_VL_5776: pass
arm64_za-ptrace_Set_VL_5792: pass
arm64_za-ptrace_Set_VL_5808: pass
arm64_za-ptrace_Set_VL_5824: pass
arm64_za-ptrace_Set_VL_5840: pass
arm64_za-ptrace_Set_VL_5856: pass
arm64_za-ptrace_Set_VL_5872: pass
arm64_za-ptrace_Set_VL_5888: pass
arm64_za-ptrace_Set_VL_5904: pass
arm64_za-ptrace_Set_VL_592: pass
arm64_za-ptrace_Set_VL_5920: pass
arm64_za-ptrace_Set_VL_5936: pass
arm64_za-ptrace_Set_VL_5952: pass
arm64_za-ptrace_Set_VL_5968: pass
arm64_za-ptrace_Set_VL_5984: pass
arm64_za-ptrace_Set_VL_6000: pass
arm64_za-ptrace_Set_VL_6016: pass
arm64_za-ptrace_Set_VL_6032: pass
arm64_za-ptrace_Set_VL_6048: pass
arm64_za-ptrace_Set_VL_6064: pass
arm64_za-ptrace_Set_VL_608: pass
arm64_za-ptrace_Set_VL_6080: pass
arm64_za-ptrace_Set_VL_6096: pass
arm64_za-ptrace_Set_VL_6112: pass
arm64_za-ptrace_Set_VL_6128: pass
arm64_za-ptrace_Set_VL_6144: pass
arm64_za-ptrace_Set_VL_6160: pass
arm64_za-ptrace_Set_VL_6176: pass
arm64_za-ptrace_Set_VL_6192: pass
arm64_za-ptrace_Set_VL_6208: pass
arm64_za-ptrace_Set_VL_6224: pass
arm64_za-ptrace_Set_VL_624: pass
arm64_za-ptrace_Set_VL_6240: pass
arm64_za-ptrace_Set_VL_6256: pass
arm64_za-ptrace_Set_VL_6272: pass
arm64_za-ptrace_Set_VL_6288: pass
arm64_za-ptrace_Set_VL_6304: pass
arm64_za-ptrace_Set_VL_6320: pass
arm64_za-ptrace_Set_VL_6336: pass
arm64_za-ptrace_Set_VL_6352: pass
arm64_za-ptrace_Set_VL_6368: pass
arm64_za-ptrace_Set_VL_6384: pass
arm64_za-ptrace_Set_VL_64: pass
arm64_za-ptrace_Set_VL_640: pass
arm64_za-ptrace_Set_VL_6400: pass
arm64_za-ptrace_Set_VL_6416: pass
arm64_za-ptrace_Set_VL_6432: pass
arm64_za-ptrace_Set_VL_6448: pass
arm64_za-ptrace_Set_VL_6464: pass
arm64_za-ptrace_Set_VL_6480: pass
arm64_za-ptrace_Set_VL_6496: pass
arm64_za-ptrace_Set_VL_6512: pass
arm64_za-ptrace_Set_VL_6528: pass
arm64_za-ptrace_Set_VL_6544: pass
arm64_za-ptrace_Set_VL_656: pass
arm64_za-ptrace_Set_VL_6560: pass
arm64_za-ptrace_Set_VL_6576: pass
arm64_za-ptrace_Set_VL_6592: pass
arm64_za-ptrace_Set_VL_6608: pass
arm64_za-ptrace_Set_VL_6624: pass
arm64_za-ptrace_Set_VL_6640: pass
arm64_za-ptrace_Set_VL_6656: pass
arm64_za-ptrace_Set_VL_6672: pass
arm64_za-ptrace_Set_VL_6688: pass
arm64_za-ptrace_Set_VL_6704: pass
arm64_za-ptrace_Set_VL_672: pass
arm64_za-ptrace_Set_VL_6720: pass
arm64_za-ptrace_Set_VL_6736: pass
arm64_za-ptrace_Set_VL_6752: pass
arm64_za-ptrace_Set_VL_6768: pass
arm64_za-ptrace_Set_VL_6784: pass
arm64_za-ptrace_Set_VL_6800: pass
arm64_za-ptrace_Set_VL_6816: pass
arm64_za-ptrace_Set_VL_6832: pass
arm64_za-ptrace_Set_VL_6848: pass
arm64_za-ptrace_Set_VL_6864: pass
arm64_za-ptrace_Set_VL_688: pass
arm64_za-ptrace_Set_VL_6880: pass
arm64_za-ptrace_Set_VL_6896: pass
arm64_za-ptrace_Set_VL_6912: pass
arm64_za-ptrace_Set_VL_6928: pass
arm64_za-ptrace_Set_VL_6944: pass
arm64_za-ptrace_Set_VL_6960: pass
arm64_za-ptrace_Set_VL_6976: pass
arm64_za-ptrace_Set_VL_6992: pass
arm64_za-ptrace_Set_VL_7008: pass
arm64_za-ptrace_Set_VL_7024: pass
arm64_za-ptrace_Set_VL_704: pass
arm64_za-ptrace_Set_VL_7040: pass
arm64_za-ptrace_Set_VL_7056: pass
arm64_za-ptrace_Set_VL_7072: pass
arm64_za-ptrace_Set_VL_7088: pass
arm64_za-ptrace_Set_VL_7104: pass
arm64_za-ptrace_Set_VL_7120: pass
arm64_za-ptrace_Set_VL_7136: pass
arm64_za-ptrace_Set_VL_7152: pass
arm64_za-ptrace_Set_VL_7168: pass
arm64_za-ptrace_Set_VL_7184: pass
arm64_za-ptrace_Set_VL_720: pass
arm64_za-ptrace_Set_VL_7200: pass
arm64_za-ptrace_Set_VL_7216: pass
arm64_za-ptrace_Set_VL_7232: pass
arm64_za-ptrace_Set_VL_7248: pass
arm64_za-ptrace_Set_VL_7264: pass
arm64_za-ptrace_Set_VL_7280: pass
arm64_za-ptrace_Set_VL_7296: pass
arm64_za-ptrace_Set_VL_7312: pass
arm64_za-ptrace_Set_VL_7328: pass
arm64_za-ptrace_Set_VL_7344: pass
arm64_za-ptrace_Set_VL_736: pass
arm64_za-ptrace_Set_VL_7360: pass
arm64_za-ptrace_Set_VL_7376: pass
arm64_za-ptrace_Set_VL_7392: pass
arm64_za-ptrace_Set_VL_7408: pass
arm64_za-ptrace_Set_VL_7424: pass
arm64_za-ptrace_Set_VL_7440: pass
arm64_za-ptrace_Set_VL_7456: pass
arm64_za-ptrace_Set_VL_7472: pass
arm64_za-ptrace_Set_VL_7488: pass
arm64_za-ptrace_Set_VL_7504: pass
arm64_za-ptrace_Set_VL_752: pass
arm64_za-ptrace_Set_VL_7520: pass
arm64_za-ptrace_Set_VL_7536: pass
arm64_za-ptrace_Set_VL_7552: pass
arm64_za-ptrace_Set_VL_7568: pass
arm64_za-ptrace_Set_VL_7584: pass
arm64_za-ptrace_Set_VL_7600: pass
arm64_za-ptrace_Set_VL_7616: pass
arm64_za-ptrace_Set_VL_7632: pass
arm64_za-ptrace_Set_VL_7648: pass
arm64_za-ptrace_Set_VL_7664: pass
arm64_za-ptrace_Set_VL_768: pass
arm64_za-ptrace_Set_VL_7680: pass
arm64_za-ptrace_Set_VL_7696: pass
arm64_za-ptrace_Set_VL_7712: pass
arm64_za-ptrace_Set_VL_7728: pass
arm64_za-ptrace_Set_VL_7744: pass
arm64_za-ptrace_Set_VL_7760: pass
arm64_za-ptrace_Set_VL_7776: pass
arm64_za-ptrace_Set_VL_7792: pass
arm64_za-ptrace_Set_VL_7808: pass
arm64_za-ptrace_Set_VL_7824: pass
arm64_za-ptrace_Set_VL_784: pass
arm64_za-ptrace_Set_VL_7840: pass
arm64_za-ptrace_Set_VL_7856: pass
arm64_za-ptrace_Set_VL_7872: pass
arm64_za-ptrace_Set_VL_7888: pass
arm64_za-ptrace_Set_VL_7904: pass
arm64_za-ptrace_Set_VL_7920: pass
arm64_za-ptrace_Set_VL_7936: pass
arm64_za-ptrace_Set_VL_7952: pass
arm64_za-ptrace_Set_VL_7968: pass
arm64_za-ptrace_Set_VL_7984: pass
arm64_za-ptrace_Set_VL_80: pass
arm64_za-ptrace_Set_VL_800: pass
arm64_za-ptrace_Set_VL_8000: pass
arm64_za-ptrace_Set_VL_8016: pass
arm64_za-ptrace_Set_VL_8032: pass
arm64_za-ptrace_Set_VL_8048: pass
arm64_za-ptrace_Set_VL_8064: pass
arm64_za-ptrace_Set_VL_8080: pass
arm64_za-ptrace_Set_VL_8096: pass
arm64_za-ptrace_Set_VL_8112: pass
arm64_za-ptrace_Set_VL_8128: pass
arm64_za-ptrace_Set_VL_8144: pass
arm64_za-ptrace_Set_VL_816: pass
arm64_za-ptrace_Set_VL_8160: pass
arm64_za-ptrace_Set_VL_8176: pass
arm64_za-ptrace_Set_VL_8192: pass
arm64_za-ptrace_Set_VL_832: pass
arm64_za-ptrace_Set_VL_848: pass
arm64_za-ptrace_Set_VL_864: pass
arm64_za-ptrace_Set_VL_880: pass
arm64_za-ptrace_Set_VL_896: pass
arm64_za-ptrace_Set_VL_912: pass
arm64_za-ptrace_Set_VL_928: pass
arm64_za-ptrace_Set_VL_944: pass
arm64_za-ptrace_Set_VL_96: pass
arm64_za-ptrace_Set_VL_960: pass
arm64_za-ptrace_Set_VL_976: pass
arm64_za-ptrace_Set_VL_992: pass
arm64_za_no_regs: pass
arm64_za_regs: pass
34635 13:58:43.031151 end: 3.1 lava-test-shell (duration 00:05:32) [common]
34636 13:58:43.031249 end: 3 lava-test-retry (duration 00:05:32) [common]
34637 13:58:43.031340 start: 4 finalize (timeout 00:03:15) [common]
34638 13:58:43.031430 start: 4.1 power-off (timeout 00:00:30) [common]
34639 13:58:43.031512 end: 4.1 power-off (duration 00:00:00) [common]
34640 13:58:43.031592 start: 4.2 read-feedback (timeout 00:03:15) [common]
34641 13:58:43.031769 Listened to connection for namespace 'common' for up to 1s
34642 13:58:43.032038 Listened to connection for namespace 'common' for up to 1s
34643 13:58:44.033744 Finalising connection for namespace 'common'
34645 13:58:44.134651 / # poweroff
34646 13:58:44.135112 Already disconnected
34647 13:58:44.135321 poweroff
34648 13:58:44.537817 end: 4.2 read-feedback (duration 00:00:02) [common]
34649 13:58:44.538074 Already disconnected
34650 13:58:44.538234 end: 4 finalize (duration 00:00:02) [common]
34651 13:58:44.538401 Cleaning after the job
34652 13:58:44.538594 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/610605/deployimages-oo_bgkjb/kernel
34653 13:58:44.547206 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/610605/deployimages-oo_bgkjb/ramdisk
34654 13:58:44.562743 Stopping the qemu container lava-docker-qemu-610605-2.1.1-glruuulwf2
34655 13:58:45.206563 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/610605
34656 13:58:45.300528 Job finished correctly