Boot log: mt8192-asurada-spherion-r0
- Warnings: 1
- Kernel Warnings: 16
- Errors: 0
- Kernel Errors: 35
- Boot result: PASS
1 01:02:02.924414 lava-dispatcher, installed at version: 2023.10
2 01:02:02.924617 start: 0 validate
3 01:02:02.924750 Start time: 2024-01-19 01:02:02.924743+00:00 (UTC)
4 01:02:02.924862 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:02:02.924995 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-igt%2F20230623.0%2Farm64%2Frootfs.cpio.gz exists
6 01:02:03.200703 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:02:03.201497 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.72-cip13-30-g79e2886a5da69%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 01:02:03.464769 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:02:03.465538 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.72-cip13-30-g79e2886a5da69%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8192-asurada-spherion-r0.dtb exists
10 01:02:03.737090 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:02:03.737876 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.72-cip13-30-g79e2886a5da69%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 01:02:04.007024 validate duration: 1.08
14 01:02:04.008392 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 01:02:04.008966 start: 1.1 download-retry (timeout 00:10:00) [common]
16 01:02:04.009465 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 01:02:04.010072 Not decompressing ramdisk as can be used compressed.
18 01:02:04.010529 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-igt/20230623.0/arm64/rootfs.cpio.gz
19 01:02:04.010901 saving as /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/ramdisk/rootfs.cpio.gz
20 01:02:04.011250 total size: 43284872 (41 MB)
21 01:02:04.017261 progress 0 % (0 MB)
22 01:02:04.051938 progress 5 % (2 MB)
23 01:02:04.067110 progress 10 % (4 MB)
24 01:02:04.079220 progress 15 % (6 MB)
25 01:02:04.090627 progress 20 % (8 MB)
26 01:02:04.101666 progress 25 % (10 MB)
27 01:02:04.112843 progress 30 % (12 MB)
28 01:02:04.123959 progress 35 % (14 MB)
29 01:02:04.134975 progress 40 % (16 MB)
30 01:02:04.145926 progress 45 % (18 MB)
31 01:02:04.156904 progress 50 % (20 MB)
32 01:02:04.168014 progress 55 % (22 MB)
33 01:02:04.179605 progress 60 % (24 MB)
34 01:02:04.191029 progress 65 % (26 MB)
35 01:02:04.202390 progress 70 % (28 MB)
36 01:02:04.213507 progress 75 % (30 MB)
37 01:02:04.224545 progress 80 % (33 MB)
38 01:02:04.235784 progress 85 % (35 MB)
39 01:02:04.246665 progress 90 % (37 MB)
40 01:02:04.257248 progress 95 % (39 MB)
41 01:02:04.267997 progress 100 % (41 MB)
42 01:02:04.268237 41 MB downloaded in 0.26 s (160.62 MB/s)
43 01:02:04.268394 end: 1.1.1 http-download (duration 00:00:00) [common]
45 01:02:04.268633 end: 1.1 download-retry (duration 00:00:00) [common]
46 01:02:04.268748 start: 1.2 download-retry (timeout 00:10:00) [common]
47 01:02:04.268857 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 01:02:04.268990 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.72-cip13-30-g79e2886a5da69/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 01:02:04.269060 saving as /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/kernel/Image
50 01:02:04.269118 total size: 51532288 (49 MB)
51 01:02:04.269176 No compression specified
52 01:02:04.270484 progress 0 % (0 MB)
53 01:02:04.284094 progress 5 % (2 MB)
54 01:02:04.297487 progress 10 % (4 MB)
55 01:02:04.310818 progress 15 % (7 MB)
56 01:02:04.324420 progress 20 % (9 MB)
57 01:02:04.337830 progress 25 % (12 MB)
58 01:02:04.350900 progress 30 % (14 MB)
59 01:02:04.364245 progress 35 % (17 MB)
60 01:02:04.377859 progress 40 % (19 MB)
61 01:02:04.390964 progress 45 % (22 MB)
62 01:02:04.404227 progress 50 % (24 MB)
63 01:02:04.417323 progress 55 % (27 MB)
64 01:02:04.430720 progress 60 % (29 MB)
65 01:02:04.444042 progress 65 % (31 MB)
66 01:02:04.457121 progress 70 % (34 MB)
67 01:02:04.470839 progress 75 % (36 MB)
68 01:02:04.484334 progress 80 % (39 MB)
69 01:02:04.497541 progress 85 % (41 MB)
70 01:02:04.510695 progress 90 % (44 MB)
71 01:02:04.523653 progress 95 % (46 MB)
72 01:02:04.536380 progress 100 % (49 MB)
73 01:02:04.536577 49 MB downloaded in 0.27 s (183.75 MB/s)
74 01:02:04.536759 end: 1.2.1 http-download (duration 00:00:00) [common]
76 01:02:04.536992 end: 1.2 download-retry (duration 00:00:00) [common]
77 01:02:04.537075 start: 1.3 download-retry (timeout 00:09:59) [common]
78 01:02:04.537159 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 01:02:04.537296 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.72-cip13-30-g79e2886a5da69/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8192-asurada-spherion-r0.dtb
80 01:02:04.537368 saving as /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/dtb/mt8192-asurada-spherion-r0.dtb
81 01:02:04.537429 total size: 47278 (0 MB)
82 01:02:04.537489 No compression specified
83 01:02:04.538531 progress 69 % (0 MB)
84 01:02:04.538800 progress 100 % (0 MB)
85 01:02:04.538958 0 MB downloaded in 0.00 s (29.54 MB/s)
86 01:02:04.539075 end: 1.3.1 http-download (duration 00:00:00) [common]
88 01:02:04.539283 end: 1.3 download-retry (duration 00:00:00) [common]
89 01:02:04.539366 start: 1.4 download-retry (timeout 00:09:59) [common]
90 01:02:04.539445 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 01:02:04.539549 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.72-cip13-30-g79e2886a5da69/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 01:02:04.539617 saving as /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/modules/modules.tar
93 01:02:04.539675 total size: 8625444 (8 MB)
94 01:02:04.539732 Using unxz to decompress xz
95 01:02:04.544097 progress 0 % (0 MB)
96 01:02:04.564904 progress 5 % (0 MB)
97 01:02:04.588548 progress 10 % (0 MB)
98 01:02:04.611479 progress 15 % (1 MB)
99 01:02:04.634039 progress 20 % (1 MB)
100 01:02:04.657126 progress 25 % (2 MB)
101 01:02:04.682705 progress 30 % (2 MB)
102 01:02:04.708596 progress 35 % (2 MB)
103 01:02:04.731457 progress 40 % (3 MB)
104 01:02:04.755065 progress 45 % (3 MB)
105 01:02:04.780568 progress 50 % (4 MB)
106 01:02:04.804531 progress 55 % (4 MB)
107 01:02:04.829069 progress 60 % (4 MB)
108 01:02:04.855542 progress 65 % (5 MB)
109 01:02:04.880151 progress 70 % (5 MB)
110 01:02:04.903399 progress 75 % (6 MB)
111 01:02:04.929942 progress 80 % (6 MB)
112 01:02:04.955214 progress 85 % (7 MB)
113 01:02:04.979942 progress 90 % (7 MB)
114 01:02:05.010818 progress 95 % (7 MB)
115 01:02:05.037671 progress 100 % (8 MB)
116 01:02:05.042500 8 MB downloaded in 0.50 s (16.36 MB/s)
117 01:02:05.042749 end: 1.4.1 http-download (duration 00:00:01) [common]
119 01:02:05.043010 end: 1.4 download-retry (duration 00:00:01) [common]
120 01:02:05.043099 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 01:02:05.043191 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 01:02:05.043269 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 01:02:05.043356 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 01:02:05.043573 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9
125 01:02:05.043704 makedir: /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin
126 01:02:05.043808 makedir: /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/tests
127 01:02:05.043905 makedir: /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/results
128 01:02:05.044017 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-add-keys
129 01:02:05.044167 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-add-sources
130 01:02:05.044303 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-background-process-start
131 01:02:05.044427 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-background-process-stop
132 01:02:05.044551 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-common-functions
133 01:02:05.044673 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-echo-ipv4
134 01:02:05.044833 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-install-packages
135 01:02:05.044954 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-installed-packages
136 01:02:05.045080 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-os-build
137 01:02:05.045202 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-probe-channel
138 01:02:05.045323 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-probe-ip
139 01:02:05.045444 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-target-ip
140 01:02:05.045564 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-target-mac
141 01:02:05.045685 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-target-storage
142 01:02:05.045813 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-test-case
143 01:02:05.045937 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-test-event
144 01:02:05.046059 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-test-feedback
145 01:02:05.046196 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-test-raise
146 01:02:05.046424 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-test-reference
147 01:02:05.046546 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-test-runner
148 01:02:05.046667 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-test-set
149 01:02:05.046790 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-test-shell
150 01:02:05.046915 Updating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-install-packages (oe)
151 01:02:05.047062 Updating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/bin/lava-installed-packages (oe)
152 01:02:05.047183 Creating /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/environment
153 01:02:05.047281 LAVA metadata
154 01:02:05.047355 - LAVA_JOB_ID=12571129
155 01:02:05.047419 - LAVA_DISPATCHER_IP=192.168.201.1
156 01:02:05.047518 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 01:02:05.047582 skipped lava-vland-overlay
158 01:02:05.047653 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 01:02:05.047730 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 01:02:05.047795 skipped lava-multinode-overlay
161 01:02:05.047865 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 01:02:05.047952 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 01:02:05.048027 Loading test definitions
164 01:02:05.048114 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 01:02:05.048198 Using /lava-12571129 at stage 0
166 01:02:05.048496 uuid=12571129_1.5.2.3.1 testdef=None
167 01:02:05.048581 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 01:02:05.048663 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 01:02:05.049219 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 01:02:05.049432 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 01:02:05.050043 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 01:02:05.050401 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 01:02:05.050998 runner path: /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/0/tests/0_igt-kms-mediatek test_uuid 12571129_1.5.2.3.1
176 01:02:05.051150 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 01:02:05.051349 Creating lava-test-runner.conf files
179 01:02:05.051411 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12571129/lava-overlay-u6edsfi9/lava-12571129/0 for stage 0
180 01:02:05.051497 - 0_igt-kms-mediatek
181 01:02:05.051591 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 01:02:05.051672 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 01:02:05.058372 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 01:02:05.058474 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 01:02:05.058555 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 01:02:05.058635 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 01:02:05.058721 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 01:02:06.441478 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 01:02:06.441880 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 01:02:06.441997 extracting modules file /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12571129/extract-overlay-ramdisk-38pkfufq/ramdisk
191 01:02:06.668164 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 01:02:06.668331 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 01:02:06.668429 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12571129/compress-overlay-1181qix1/overlay-1.5.2.4.tar.gz to ramdisk
194 01:02:06.668501 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12571129/compress-overlay-1181qix1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12571129/extract-overlay-ramdisk-38pkfufq/ramdisk
195 01:02:06.675382 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 01:02:06.675497 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 01:02:06.675584 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 01:02:06.675670 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 01:02:06.675743 Building ramdisk /var/lib/lava/dispatcher/tmp/12571129/extract-overlay-ramdisk-38pkfufq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12571129/extract-overlay-ramdisk-38pkfufq/ramdisk
200 01:02:07.709337 >> 369992 blocks
201 01:02:13.384693 rename /var/lib/lava/dispatcher/tmp/12571129/extract-overlay-ramdisk-38pkfufq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/ramdisk/ramdisk.cpio.gz
202 01:02:13.385221 end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
203 01:02:13.385348 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
204 01:02:13.385451 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
205 01:02:13.385559 Calling: 'lzma' '--keep' '/var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/kernel/Image'
206 01:02:25.638203 Returned 0 in 12 seconds
207 01:02:25.739334 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/dtb/mt8192-asurada-spherion-r0.dtb -i /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/kernel/image.itb
208 01:02:26.599935 output: FIT description: Kernel Image image with one or more FDT blobs
209 01:02:26.600416 output: Created: Fri Jan 19 01:02:26 2024
210 01:02:26.600501 output: Image 0 (kernel-1)
211 01:02:26.600565 output: Description:
212 01:02:26.600625 output: Created: Fri Jan 19 01:02:26 2024
213 01:02:26.600685 output: Type: Kernel Image
214 01:02:26.600803 output: Compression: lzma compressed
215 01:02:26.600860 output: Data Size: 12048624 Bytes = 11766.23 KiB = 11.49 MiB
216 01:02:26.600919 output: Architecture: AArch64
217 01:02:26.600974 output: OS: Linux
218 01:02:26.601029 output: Load Address: 0x00000000
219 01:02:26.601084 output: Entry Point: 0x00000000
220 01:02:26.601141 output: Hash algo: crc32
221 01:02:26.601195 output: Hash value: a52aa383
222 01:02:26.601250 output: Image 1 (fdt-1)
223 01:02:26.601303 output: Description: mt8192-asurada-spherion-r0
224 01:02:26.601355 output: Created: Fri Jan 19 01:02:26 2024
225 01:02:26.601406 output: Type: Flat Device Tree
226 01:02:26.601457 output: Compression: uncompressed
227 01:02:26.601508 output: Data Size: 47278 Bytes = 46.17 KiB = 0.05 MiB
228 01:02:26.601559 output: Architecture: AArch64
229 01:02:26.601610 output: Hash algo: crc32
230 01:02:26.601660 output: Hash value: cc4352de
231 01:02:26.601711 output: Image 2 (ramdisk-1)
232 01:02:26.601761 output: Description: unavailable
233 01:02:26.601811 output: Created: Fri Jan 19 01:02:26 2024
234 01:02:26.601862 output: Type: RAMDisk Image
235 01:02:26.601912 output: Compression: Unknown Compression
236 01:02:26.601963 output: Data Size: 56432484 Bytes = 55109.85 KiB = 53.82 MiB
237 01:02:26.602014 output: Architecture: AArch64
238 01:02:26.602065 output: OS: Linux
239 01:02:26.602117 output: Load Address: unavailable
240 01:02:26.602167 output: Entry Point: unavailable
241 01:02:26.602218 output: Hash algo: crc32
242 01:02:26.602268 output: Hash value: 8cab5b7b
243 01:02:26.602318 output: Default Configuration: 'conf-1'
244 01:02:26.602368 output: Configuration 0 (conf-1)
245 01:02:26.602418 output: Description: mt8192-asurada-spherion-r0
246 01:02:26.602468 output: Kernel: kernel-1
247 01:02:26.602518 output: Init Ramdisk: ramdisk-1
248 01:02:26.602568 output: FDT: fdt-1
249 01:02:26.602618 output: Loadables: kernel-1
250 01:02:26.602668 output:
251 01:02:26.602862 end: 1.5.8.1 prepare-fit (duration 00:00:13) [common]
252 01:02:26.602953 end: 1.5.8 prepare-kernel (duration 00:00:13) [common]
253 01:02:26.603057 end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
254 01:02:26.603148 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
255 01:02:26.603222 No LXC device requested
256 01:02:26.603299 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 01:02:26.603379 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
258 01:02:26.603451 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 01:02:26.603515 Checking files for TFTP limit of 4294967296 bytes.
260 01:02:26.604001 end: 1 tftp-deploy (duration 00:00:23) [common]
261 01:02:26.604101 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 01:02:26.604191 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 01:02:26.604317 substitutions:
264 01:02:26.604382 - {DTB}: 12571129/tftp-deploy-6oq74fuz/dtb/mt8192-asurada-spherion-r0.dtb
265 01:02:26.604442 - {INITRD}: 12571129/tftp-deploy-6oq74fuz/ramdisk/ramdisk.cpio.gz
266 01:02:26.604499 - {KERNEL}: 12571129/tftp-deploy-6oq74fuz/kernel/Image
267 01:02:26.604554 - {LAVA_MAC}: None
268 01:02:26.604620 - {PRESEED_CONFIG}: None
269 01:02:26.604764 - {PRESEED_LOCAL}: None
270 01:02:26.604834 - {RAMDISK}: 12571129/tftp-deploy-6oq74fuz/ramdisk/ramdisk.cpio.gz
271 01:02:26.604888 - {ROOT_PART}: None
272 01:02:26.604940 - {ROOT}: None
273 01:02:26.604993 - {SERVER_IP}: 192.168.201.1
274 01:02:26.605044 - {TEE}: None
275 01:02:26.605095 Parsed boot commands:
276 01:02:26.605147 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 01:02:26.605324 Parsed boot commands: tftpboot 192.168.201.1 12571129/tftp-deploy-6oq74fuz/kernel/image.itb 12571129/tftp-deploy-6oq74fuz/kernel/cmdline
278 01:02:26.605411 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 01:02:26.605492 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 01:02:26.605583 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 01:02:26.605661 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 01:02:26.605728 Not connected, no need to disconnect.
283 01:02:26.605798 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 01:02:26.605873 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 01:02:26.605934 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8192-asurada-spherion-r0-cbg-4'
286 01:02:26.610071 Setting prompt string to ['lava-test: # ']
287 01:02:26.610440 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 01:02:26.610548 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 01:02:26.610642 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 01:02:26.610773 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 01:02:26.611011 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-4' '--port=1' '--command=reboot'
292 01:02:31.762772 >> Command sent successfully.
293 01:02:31.774235 Returned 0 in 5 seconds
294 01:02:31.875495 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
296 01:02:31.877143 end: 2.2.2 reset-device (duration 00:00:05) [common]
297 01:02:31.877677 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
298 01:02:31.878157 Setting prompt string to 'Starting depthcharge on Spherion...'
299 01:02:31.878584 Changing prompt to 'Starting depthcharge on Spherion...'
300 01:02:31.878950 depthcharge-start: Wait for prompt Starting depthcharge on Spherion... (timeout 00:05:00)
301 01:02:31.880261 [Enter `^Ec?' for help]
302 01:02:32.047850
303 01:02:32.048685
304 01:02:32.049155 F0: 102B 0000
305 01:02:32.049524
306 01:02:32.049880 F3: 1001 0000 [0200]
307 01:02:32.050986
308 01:02:32.051455 F3: 1001 0000
309 01:02:32.051881
310 01:02:32.052225 F7: 102D 0000
311 01:02:32.052552
312 01:02:32.054958 F1: 0000 0000
313 01:02:32.055419
314 01:02:32.055782 V0: 0000 0000 [0001]
315 01:02:32.056131
316 01:02:32.057920 00: 0007 8000
317 01:02:32.058389
318 01:02:32.058749 01: 0000 0000
319 01:02:32.059094
320 01:02:32.061450 BP: 0C00 0209 [0000]
321 01:02:32.061907
322 01:02:32.062268 G0: 1182 0000
323 01:02:32.062605
324 01:02:32.065208 EC: 0000 0021 [4000]
325 01:02:32.065664
326 01:02:32.066025 S7: 0000 0000 [0000]
327 01:02:32.066361
328 01:02:32.068430 CC: 0000 0000 [0001]
329 01:02:32.069079
330 01:02:32.069454 T0: 0000 0040 [010F]
331 01:02:32.069837
332 01:02:32.071590 Jump to BL
333 01:02:32.072050
334 01:02:32.095050
335 01:02:32.095613
336 01:02:32.095976
337 01:02:32.103140 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 bootblock starting (log level: 8)...
338 01:02:32.106009 ARM64: Exception handlers installed.
339 01:02:32.108859 ARM64: Testing exception
340 01:02:32.112264 ARM64: Done test exception
341 01:02:32.118990 Backing address range [0x00000000:0x1000000000000) with new page table @0x0010d000
342 01:02:32.128988 Mapping address range [0x00000000:0x200000000) as cacheable | read-write | secure | device
343 01:02:32.135788 Backing address range [0x00000000:0x8000000000) with new page table @0x0010e000
344 01:02:32.146244 Mapping address range [0x00100000:0x00120000) as cacheable | read-write | secure | normal
345 01:02:32.152992 Backing address range [0x00000000:0x40000000) with new page table @0x0010f000
346 01:02:32.163102 Backing address range [0x00000000:0x00200000) with new page table @0x00110000
347 01:02:32.173963 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | normal
348 01:02:32.180068 Backing address range [0x00200000:0x00400000) with new page table @0x00111000
349 01:02:32.198264 Mapping address range [0x00114000:0x00115000) as non-cacheable | read-write | secure | normal
350 01:02:32.201840 WDT: Last reset was cold boot
351 01:02:32.204592 SPI1(PAD0) initialized at 2873684 Hz
352 01:02:32.208038 SPI5(PAD0) initialized at 992727 Hz
353 01:02:32.211901 VBOOT: Loading verstage.
354 01:02:32.218027 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
355 01:02:32.222128 FMAP: Found "FLASH" version 1.1 at 0x20000.
356 01:02:32.224347 FMAP: base = 0x0 size = 0x800000 #areas = 25
357 01:02:32.228019 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
358 01:02:32.237091 CBFS: mcache @0x00107c00 built for 77 files, used 0x1104 of 0x1800 bytes
359 01:02:32.243248 CBFS: Found 'fallback/verstage' @0x75500 size 0xa1eb in mcache @0x00108150
360 01:02:32.253346 read SPI 0x96554 0xa1eb: 4595 us, 9020 KB/s, 72.160 Mbps
361 01:02:32.253908
362 01:02:32.254273
363 01:02:32.264009 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 verstage starting (log level: 8)...
364 01:02:32.266608 ARM64: Exception handlers installed.
365 01:02:32.269688 ARM64: Testing exception
366 01:02:32.270308 ARM64: Done test exception
367 01:02:32.276495 FMAP: area RW_NVRAM found @ 57b000 (8192 bytes)
368 01:02:32.279988 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
369 01:02:32.294976 Probing TPM: . done!
370 01:02:32.295562 TPM ready after 0 ms
371 01:02:32.300833 Connected to device vid:did:rid of 1ae0:0028:00
372 01:02:32.307623 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
373 01:02:32.311628 Initialized TPM device CR50 revision 0
374 01:02:32.362828 tlcl_send_startup: Startup return code is 0
375 01:02:32.363391 TPM: setup succeeded
376 01:02:32.374561 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
377 01:02:32.383370 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
378 01:02:32.394684 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
379 01:02:32.402456 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
380 01:02:32.405942 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
381 01:02:32.408876 in-header: 03 07 00 00 08 00 00 00
382 01:02:32.412063 in-data: aa e4 47 04 13 02 00 00
383 01:02:32.416031 Chrome EC: UHEPI supported
384 01:02:32.422161 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
385 01:02:32.425647 in-header: 03 9d 00 00 08 00 00 00
386 01:02:32.430162 in-data: 10 20 20 08 00 00 00 00
387 01:02:32.430764 Phase 1
388 01:02:32.431929 FMAP: area GBB found @ 3f5000 (12032 bytes)
389 01:02:32.439409 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
390 01:02:32.445646 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
391 01:02:32.449090 Recovery requested (1009000e)
392 01:02:32.452477 TPM: Extending digest for VBOOT: boot mode into PCR 0
393 01:02:32.460873 tlcl_extend: response is 0
394 01:02:32.470370 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
395 01:02:32.475188 tlcl_extend: response is 0
396 01:02:32.480916 CBFS: Found 'fallback/romstage' @0x80 size 0x2173b in mcache @0x00107c2c
397 01:02:32.502504 read SPI 0x210d4 0x2173b: 15145 us, 9047 KB/s, 72.376 Mbps
398 01:02:32.508889 BS: bootblock times (exec / console): total (unknown) / 148 ms
399 01:02:32.509449
400 01:02:32.509817
401 01:02:32.519355 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 romstage starting (log level: 8)...
402 01:02:32.522773 ARM64: Exception handlers installed.
403 01:02:32.523238 ARM64: Testing exception
404 01:02:32.525905 ARM64: Done test exception
405 01:02:32.547555 pmic_efuse_setting: Set efuses in 11 msecs
406 01:02:32.551152 pmwrap_interface_init: Select PMIF_VLD_RDY
407 01:02:32.558637 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c9a
408 01:02:32.561428 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M01: 0x1c070c9a
409 01:02:32.565327 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070c9a
410 01:02:32.571730 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M03: 0x1c070c9a
411 01:02:32.576204 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M04: 0x1c070c9a
412 01:02:32.579793 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M05: 0x1c070c9a
413 01:02:32.586679 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M06: 0x1c070c9a
414 01:02:32.589334 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c9a
415 01:02:32.596572 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M08: 0xc9c
416 01:02:32.599971 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M09: 0x1c070c9a
417 01:02:32.603010 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M10: 0x1c070c9a
418 01:02:32.609570 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M11: 0xc9c
419 01:02:32.614340 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M12: 0xc9c
420 01:02:32.620367 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M01 FPM SWITCH: 0x1c070c8a
421 01:02:32.624886 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M02 FPM SWITCH: 0x1c070c8a
422 01:02:32.631166 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M03 FPM SWITCH: 0x1c070c8a
423 01:02:32.638038 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M04 FPM SWITCH: 0x1c070c8a
424 01:02:32.641529 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M05 FPM SWITCH: 0x1c070c8a
425 01:02:32.647516 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M06 FPM SWITCH: 0x1c070c8a
426 01:02:32.654935 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M07 FPM SWITCH: 0x1c070c8a
427 01:02:32.658414 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M08 FPM SWITCH: 0xc8c
428 01:02:32.664543 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M09 FPM SWITCH: 0x1c070c8a
429 01:02:32.671063 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M10 FPM SWITCH: 0x1c070c8a
430 01:02:32.674361 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M11 FPM SWITCH: 0xc8c
431 01:02:32.681013 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M12 FPM SWITCH: 0xc8c
432 01:02:32.687930 [SRCLKEN_RC]__rc_ctrl_bblpm_switch,193: M02 BBLPM SWITCH: 0x1c070caa
433 01:02:32.691465 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c92
434 01:02:32.697781 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070ca2
435 01:02:32.701656 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c82
436 01:02:32.709169 [SRCLKEN_RC]rc_dump_reg_info,132: SRCLKEN_RC_CFG:0x10
437 01:02:32.710663 [SRCLKEN_RC]rc_dump_reg_info,133: RC_CENTRAL_CFG1:0x401425
438 01:02:32.717439 [SRCLKEN_RC]rc_dump_reg_info,134: RC_CENTRAL_CFG2:0x1010
439 01:02:32.722267 [SRCLKEN_RC]rc_dump_reg_info,135: RC_CENTRAL_CFG3:0x400f
440 01:02:32.727823 [SRCLKEN_RC]rc_dump_reg_info,136: RC_CENTRAL_CFG4:0x20000
441 01:02:32.730859 [SRCLKEN_RC]rc_dump_reg_info,137: RC_DCXO_FPM_CFG:0x8
442 01:02:32.737367 [SRCLKEN_RC]rc_dump_reg_info,138: SUBSYS_INTF_CFG:0x1041efb
443 01:02:32.740570 [SRCLKEN_RC]rc_dump_reg_info,139: RC_SPI_STA_0:0x40010698
444 01:02:32.747245 [SRCLKEN_RC]rc_dump_reg_info,140: RC_PI_PO_STA:0xd15c3
445 01:02:32.750507 [SRCLKEN_RC]rc_dump_reg_info,144: M00: 0x1c070c92
446 01:02:32.754383 [SRCLKEN_RC]rc_dump_reg_info,144: M01: 0x1c070c8a
447 01:02:32.761152 [SRCLKEN_RC]rc_dump_reg_info,144: M02: 0x1c070ca2
448 01:02:32.764592 [SRCLKEN_RC]rc_dump_reg_info,144: M03: 0x1c070c8a
449 01:02:32.767304 [SRCLKEN_RC]rc_dump_reg_info,144: M04: 0x1c070c8a
450 01:02:32.774255 [SRCLKEN_RC]rc_dump_reg_info,144: M05: 0x1c070c8a
451 01:02:32.777046 [SRCLKEN_RC]rc_dump_reg_info,144: M06: 0x1c070c8a
452 01:02:32.780279 [SRCLKEN_RC]rc_dump_reg_info,144: M07: 0x1c070c82
453 01:02:32.787194 [SRCLKEN_RC]rc_dump_reg_info,144: M08: 0xc8c
454 01:02:32.790379 [SRCLKEN_RC]rc_dump_reg_info,144: M09: 0x1c070c8a
455 01:02:32.794093 [SRCLKEN_RC]rc_dump_reg_info,144: M10: 0x1c070c8a
456 01:02:32.796799 [SRCLKEN_RC]rc_dump_reg_info,144: M11: 0xc8c
457 01:02:32.803228 [SRCLKEN_RC]rc_dump_reg_info,144: M12: 0xc8c
458 01:02:32.810142 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x624d 0x53f0 0x8100 0x4c 0xf0f 0x9248
459 01:02:32.820387 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x1 0x1
460 01:02:32.823462 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
461 01:02:32.829808 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x4005 0x1f0 0x8100 0x4c 0xf0f 0x9248
462 01:02:32.839952 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x0 0x0
463 01:02:32.843091 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
464 01:02:32.849561 [RTC]rtc_boot,324: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
465 01:02:32.853310 [RTC]rtc_boot,327: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
466 01:02:32.860515 [RTC]rtc_enable_dcxo,68: con=0x486, osc32con=0xde70, sec=0x10
467 01:02:32.867513 [RTC]rtc_check_state,173: con=486, pwrkey1=a357, pwrkey2=67d2
468 01:02:32.869983 [RTC]rtc_osc_init,62: osc32con val = 0xde70
469 01:02:32.873635 [RTC]rtc_eosc_cali,20: PMIC_RG_FQMTR_CKSEL=0x4a
470 01:02:32.884820 [RTC]rtc_get_frequency_meter,154: input=15, output=765
471 01:02:32.894334 [RTC]rtc_get_frequency_meter,154: input=23, output=949
472 01:02:32.903462 [RTC]rtc_get_frequency_meter,154: input=19, output=857
473 01:02:32.913227 [RTC]rtc_get_frequency_meter,154: input=17, output=810
474 01:02:32.922868 [RTC]rtc_get_frequency_meter,154: input=16, output=788
475 01:02:32.932872 [RTC]rtc_get_frequency_meter,154: input=16, output=787
476 01:02:32.941622 [RTC]rtc_get_frequency_meter,154: input=17, output=812
477 01:02:32.945686 [RTC]rtc_eosc_cali,47: left: 16, middle: 16, right: 17
478 01:02:32.952534 [RTC]rtc_osc_init,66: EOSC32 cali val = 0xde70
479 01:02:32.955694 [RTC]rtc_boot_common,202: RTC_STATE_REBOOT
480 01:02:32.959187 [RTC]rtc_boot_common,220: irqsta=0, bbpu=81, con=486
481 01:02:32.965583 [RTC]rtc_bbpu_power_on,298: rtc_write_trigger=1
482 01:02:32.969075 [RTC]rtc_bbpu_power_on,300: done BBPU=0x81
483 01:02:32.972000 ADC[4]: Raw value=670800 ID=5
484 01:02:32.972563 ADC[3]: Raw value=212549 ID=1
485 01:02:32.975863 RAM Code: 0x51
486 01:02:32.979393 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
487 01:02:32.985657 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
488 01:02:32.992111 CBFS: Found 'sdram-lpddr4x-DISCRETE-2RANK-4GB' @0x75180 size 0x8 in mcache @0x00107f9c
489 01:02:32.998480 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_4GB_2_2
490 01:02:33.002078 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
491 01:02:33.005319 in-header: 03 07 00 00 08 00 00 00
492 01:02:33.008784 in-data: aa e4 47 04 13 02 00 00
493 01:02:33.012289 Chrome EC: UHEPI supported
494 01:02:33.020491 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
495 01:02:33.022201 in-header: 03 d5 00 00 08 00 00 00
496 01:02:33.025481 in-data: 98 20 60 08 00 00 00 00
497 01:02:33.028954 MRC: failed to locate region type 0.
498 01:02:33.035361 DRAM-K: Invalid data in flash (size: 0xffffffffffffffff, expected: 0xcf0)
499 01:02:33.038835 DRAM-K: Running full calibration
500 01:02:33.042272 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_4GB_2_2
501 01:02:33.045540 header.status = 0x0
502 01:02:33.049239 header.version = 0x6 (expected: 0x6)
503 01:02:33.052088 header.size = 0xd00 (expected: 0xd00)
504 01:02:33.056002 header.flags = 0x0
505 01:02:33.058962 CBFS: Found 'fallback/dram' @0x51540 size 0x1c583 in mcache @0x00107e40
506 01:02:33.077804 read SPI 0x72590 0x1c583: 12500 us, 9287 KB/s, 74.296 Mbps
507 01:02:33.084075 dram_init: MediaTek DRAM firmware version: 1.6.3, accepting param version 6
508 01:02:33.087246 dram_init: ddr_geometry: 0
509 01:02:33.091323 [EMI] MDL number = 0
510 01:02:33.091888 [EMI] Get MDL freq = 0
511 01:02:33.094264 dram_init: ddr_type: 0
512 01:02:33.094723 is_discrete_lpddr4: 1
513 01:02:33.097711 [Set_DRAM_Pinmux_Sel] DRAMPinmux = 0
514 01:02:33.098184
515 01:02:33.098786
516 01:02:33.101215 [Bian_co] ETT version 0.0.0.1
517 01:02:33.105142 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
518 01:02:33.105602
519 01:02:33.112679 dramc_set_vcore_voltage set vcore to 650000
520 01:02:33.113321 Read voltage for 800, 4
521 01:02:33.115846 Vio18 = 0
522 01:02:33.116676 Vcore = 650000
523 01:02:33.117142 Vdram = 0
524 01:02:33.118150 Vddq = 0
525 01:02:33.118606 Vmddr = 0
526 01:02:33.121990 dram_init: config_dvfs: 1
527 01:02:33.125170 [FAST_K] DramcSave_Time_For_Cal_Init SHU6, femmc_Ready=0
528 01:02:33.132888 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
529 01:02:33.134685 [SwImpedanceCal] DRVP=7, DRVN=16, ODTN=9
530 01:02:33.138620 freq_region=0, Reg: DRVP=7, DRVN=16, ODTN=9
531 01:02:33.141725 [SwImpedanceCal] DRVP=12, DRVN=24, ODTN=9
532 01:02:33.144776 freq_region=1, Reg: DRVP=12, DRVN=24, ODTN=9
533 01:02:33.148175 MEM_TYPE=3, freq_sel=18
534 01:02:33.153078 sv_algorithm_assistance_LP4_1600
535 01:02:33.154615 ============ PULL DRAM RESETB DOWN ============
536 01:02:33.158165 ========== PULL DRAM RESETB DOWN end =========
537 01:02:33.165408 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
538 01:02:33.168574 ===================================
539 01:02:33.169072 LPDDR4 DRAM CONFIGURATION
540 01:02:33.171713 ===================================
541 01:02:33.174586 EX_ROW_EN[0] = 0x0
542 01:02:33.178208 EX_ROW_EN[1] = 0x0
543 01:02:33.178671 LP4Y_EN = 0x0
544 01:02:33.181464 WORK_FSP = 0x0
545 01:02:33.181925 WL = 0x2
546 01:02:33.184418 RL = 0x2
547 01:02:33.184938 BL = 0x2
548 01:02:33.188958 RPST = 0x0
549 01:02:33.189439 RD_PRE = 0x0
550 01:02:33.191532 WR_PRE = 0x1
551 01:02:33.191992 WR_PST = 0x0
552 01:02:33.194881 DBI_WR = 0x0
553 01:02:33.195449 DBI_RD = 0x0
554 01:02:33.197976 OTF = 0x1
555 01:02:33.202230 ===================================
556 01:02:33.205049 ===================================
557 01:02:33.205514 ANA top config
558 01:02:33.208252 ===================================
559 01:02:33.211457 DLL_ASYNC_EN = 0
560 01:02:33.214543 ALL_SLAVE_EN = 1
561 01:02:33.215051 NEW_RANK_MODE = 1
562 01:02:33.217931 DLL_IDLE_MODE = 1
563 01:02:33.221753 LP45_APHY_COMB_EN = 1
564 01:02:33.224389 TX_ODT_DIS = 1
565 01:02:33.228203 NEW_8X_MODE = 1
566 01:02:33.231328 ===================================
567 01:02:33.234913 ===================================
568 01:02:33.235396 data_rate = 1600
569 01:02:33.238944 CKR = 1
570 01:02:33.241062 DQ_P2S_RATIO = 8
571 01:02:33.244360 ===================================
572 01:02:33.248264 CA_P2S_RATIO = 8
573 01:02:33.251592 DQ_CA_OPEN = 0
574 01:02:33.254196 DQ_SEMI_OPEN = 0
575 01:02:33.254672 CA_SEMI_OPEN = 0
576 01:02:33.257774 CA_FULL_RATE = 0
577 01:02:33.261018 DQ_CKDIV4_EN = 1
578 01:02:33.264910 CA_CKDIV4_EN = 1
579 01:02:33.267782 CA_PREDIV_EN = 0
580 01:02:33.271887 PH8_DLY = 0
581 01:02:33.272467 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
582 01:02:33.274682 DQ_AAMCK_DIV = 4
583 01:02:33.279371 CA_AAMCK_DIV = 4
584 01:02:33.280963 CA_ADMCK_DIV = 4
585 01:02:33.284637 DQ_TRACK_CA_EN = 0
586 01:02:33.287930 CA_PICK = 800
587 01:02:33.288540 CA_MCKIO = 800
588 01:02:33.291015 MCKIO_SEMI = 0
589 01:02:33.294174 PLL_FREQ = 3068
590 01:02:33.298315 DQ_UI_PI_RATIO = 32
591 01:02:33.300740 CA_UI_PI_RATIO = 0
592 01:02:33.304442 ===================================
593 01:02:33.307496 ===================================
594 01:02:33.311292 memory_type:LPDDR4
595 01:02:33.311867 GP_NUM : 10
596 01:02:33.314358 SRAM_EN : 1
597 01:02:33.314904 MD32_EN : 0
598 01:02:33.317648 ===================================
599 01:02:33.320684 [ANA_INIT] >>>>>>>>>>>>>>
600 01:02:33.324228 <<<<<< [CONFIGURE PHASE]: ANA_TX
601 01:02:33.327487 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
602 01:02:33.330875 ===================================
603 01:02:33.334418 data_rate = 1600,PCW = 0X7600
604 01:02:33.337998 ===================================
605 01:02:33.341065 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
606 01:02:33.344781 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
607 01:02:33.350960 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
608 01:02:33.354511 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
609 01:02:33.358409 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
610 01:02:33.365435 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
611 01:02:33.365976 [ANA_INIT] flow start
612 01:02:33.368436 [ANA_INIT] PLL >>>>>>>>
613 01:02:33.368923 [ANA_INIT] PLL <<<<<<<<
614 01:02:33.371116 [ANA_INIT] MIDPI >>>>>>>>
615 01:02:33.374359 [ANA_INIT] MIDPI <<<<<<<<
616 01:02:33.377655 [ANA_INIT] DLL >>>>>>>>
617 01:02:33.378088 [ANA_INIT] flow end
618 01:02:33.381081 ============ LP4 DIFF to SE enter ============
619 01:02:33.387674 ============ LP4 DIFF to SE exit ============
620 01:02:33.388199 [ANA_INIT] <<<<<<<<<<<<<
621 01:02:33.391360 [Flow] Enable top DCM control >>>>>
622 01:02:33.394886 [Flow] Enable top DCM control <<<<<
623 01:02:33.398196 Enable DLL master slave shuffle
624 01:02:33.404529 ==============================================================
625 01:02:33.405109 Gating Mode config
626 01:02:33.411692 ==============================================================
627 01:02:33.414838 Config description:
628 01:02:33.424829 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
629 01:02:33.430961 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
630 01:02:33.434046 SELPH_MODE 0: By rank 1: By Phase
631 01:02:33.441114 ==============================================================
632 01:02:33.444514 GAT_TRACK_EN = 1
633 01:02:33.445045 RX_GATING_MODE = 2
634 01:02:33.448160 RX_GATING_TRACK_MODE = 2
635 01:02:33.451519 SELPH_MODE = 1
636 01:02:33.454892 PICG_EARLY_EN = 1
637 01:02:33.458209 VALID_LAT_VALUE = 1
638 01:02:33.465844 ==============================================================
639 01:02:33.468495 Enter into Gating configuration >>>>
640 01:02:33.471160 Exit from Gating configuration <<<<
641 01:02:33.474812 Enter into DVFS_PRE_config >>>>>
642 01:02:33.484607 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
643 01:02:33.488246 Exit from DVFS_PRE_config <<<<<
644 01:02:33.490783 Enter into PICG configuration >>>>
645 01:02:33.494238 Exit from PICG configuration <<<<
646 01:02:33.497615 [RX_INPUT] configuration >>>>>
647 01:02:33.500638 [RX_INPUT] configuration <<<<<
648 01:02:33.504074 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
649 01:02:33.511551 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
650 01:02:33.517283 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
651 01:02:33.520786 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
652 01:02:33.528438 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
653 01:02:33.534352 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
654 01:02:33.537628 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
655 01:02:33.541276 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
656 01:02:33.548001 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
657 01:02:33.550986 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
658 01:02:33.554773 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
659 01:02:33.560996 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
660 01:02:33.564953 ===================================
661 01:02:33.565415 LPDDR4 DRAM CONFIGURATION
662 01:02:33.567347 ===================================
663 01:02:33.570796 EX_ROW_EN[0] = 0x0
664 01:02:33.571350 EX_ROW_EN[1] = 0x0
665 01:02:33.574297 LP4Y_EN = 0x0
666 01:02:33.574875 WORK_FSP = 0x0
667 01:02:33.577871 WL = 0x2
668 01:02:33.581275 RL = 0x2
669 01:02:33.581734 BL = 0x2
670 01:02:33.584006 RPST = 0x0
671 01:02:33.584558 RD_PRE = 0x0
672 01:02:33.588220 WR_PRE = 0x1
673 01:02:33.588836 WR_PST = 0x0
674 01:02:33.590760 DBI_WR = 0x0
675 01:02:33.591314 DBI_RD = 0x0
676 01:02:33.594432 OTF = 0x1
677 01:02:33.597609 ===================================
678 01:02:33.601794 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
679 01:02:33.604141 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
680 01:02:33.607662 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
681 01:02:33.611086 ===================================
682 01:02:33.614279 LPDDR4 DRAM CONFIGURATION
683 01:02:33.617411 ===================================
684 01:02:33.620672 EX_ROW_EN[0] = 0x10
685 01:02:33.621291 EX_ROW_EN[1] = 0x0
686 01:02:33.624553 LP4Y_EN = 0x0
687 01:02:33.625208 WORK_FSP = 0x0
688 01:02:33.627481 WL = 0x2
689 01:02:33.628049 RL = 0x2
690 01:02:33.631037 BL = 0x2
691 01:02:33.631599 RPST = 0x0
692 01:02:33.635111 RD_PRE = 0x0
693 01:02:33.635677 WR_PRE = 0x1
694 01:02:33.637383 WR_PST = 0x0
695 01:02:33.640781 DBI_WR = 0x0
696 01:02:33.641338 DBI_RD = 0x0
697 01:02:33.643961 OTF = 0x1
698 01:02:33.647429 ===================================
699 01:02:33.650818 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
700 01:02:33.655937 nWR fixed to 40
701 01:02:33.658938 [ModeRegInit_LP4] CH0 RK0
702 01:02:33.659683 [ModeRegInit_LP4] CH0 RK1
703 01:02:33.663278 [ModeRegInit_LP4] CH1 RK0
704 01:02:33.666082 [ModeRegInit_LP4] CH1 RK1
705 01:02:33.666639 match AC timing 12
706 01:02:33.672497 dramType 5, freq 800, readDBI 0, DivMode 1, cbtMode 0
707 01:02:33.676236 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
708 01:02:33.678957 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
709 01:02:33.686001 [TX_path_calculate] data rate=1600, WL=8, DQS_TotalUI=17
710 01:02:33.689165 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
711 01:02:33.689728 [EMI DOE] emi_dcm 0
712 01:02:33.696135 [UpdateDFSTbltoDDR3200] Get Highest Freq is 1600
713 01:02:33.696702 ==
714 01:02:33.699300 Dram Type= 6, Freq= 0, CH_0, rank 0
715 01:02:33.703340 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
716 01:02:33.703911 ==
717 01:02:33.709403 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
718 01:02:33.715803 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
719 01:02:33.722976 [CA 0] Center 37 (7~68) winsize 62
720 01:02:33.727485 [CA 1] Center 37 (6~68) winsize 63
721 01:02:33.730121 [CA 2] Center 35 (4~66) winsize 63
722 01:02:33.733248 [CA 3] Center 35 (4~66) winsize 63
723 01:02:33.736422 [CA 4] Center 34 (4~65) winsize 62
724 01:02:33.740076 [CA 5] Center 33 (3~64) winsize 62
725 01:02:33.740640
726 01:02:33.743164 [CmdBusTrainingLP45] Vref(ca) range 1: 34
727 01:02:33.743728
728 01:02:33.746890 [CATrainingPosCal] consider 1 rank data
729 01:02:33.749969 u2DelayCellTimex100 = 270/100 ps
730 01:02:33.753172 CA0 delay=37 (7~68),Diff = 4 PI (28 cell)
731 01:02:33.756642 CA1 delay=37 (6~68),Diff = 4 PI (28 cell)
732 01:02:33.762875 CA2 delay=35 (4~66),Diff = 2 PI (14 cell)
733 01:02:33.767167 CA3 delay=35 (4~66),Diff = 2 PI (14 cell)
734 01:02:33.770023 CA4 delay=34 (4~65),Diff = 1 PI (7 cell)
735 01:02:33.773311 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
736 01:02:33.773794
737 01:02:33.776412 CA PerBit enable=1, Macro0, CA PI delay=33
738 01:02:33.776914
739 01:02:33.779578 [CBTSetCACLKResult] CA Dly = 33
740 01:02:33.780061 CS Dly: 5 (0~36)
741 01:02:33.783064 ==
742 01:02:33.786038 Dram Type= 6, Freq= 0, CH_0, rank 1
743 01:02:33.789595 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
744 01:02:33.790080 ==
745 01:02:33.792909 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
746 01:02:33.799948 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
747 01:02:33.809225 [CA 0] Center 37 (6~68) winsize 63
748 01:02:33.812974 [CA 1] Center 37 (6~68) winsize 63
749 01:02:33.815935 [CA 2] Center 35 (4~66) winsize 63
750 01:02:33.819053 [CA 3] Center 35 (4~66) winsize 63
751 01:02:33.822980 [CA 4] Center 33 (3~64) winsize 62
752 01:02:33.825658 [CA 5] Center 34 (3~65) winsize 63
753 01:02:33.826123
754 01:02:33.829496 [CmdBusTrainingLP45] Vref(ca) range 1: 34
755 01:02:33.830059
756 01:02:33.832260 [CATrainingPosCal] consider 2 rank data
757 01:02:33.836135 u2DelayCellTimex100 = 270/100 ps
758 01:02:33.839477 CA0 delay=37 (7~68),Diff = 4 PI (28 cell)
759 01:02:33.842982 CA1 delay=37 (6~68),Diff = 4 PI (28 cell)
760 01:02:33.849268 CA2 delay=35 (4~66),Diff = 2 PI (14 cell)
761 01:02:33.853093 CA3 delay=35 (4~66),Diff = 2 PI (14 cell)
762 01:02:33.855977 CA4 delay=34 (4~64),Diff = 1 PI (7 cell)
763 01:02:33.859373 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
764 01:02:33.859830
765 01:02:33.862519 CA PerBit enable=1, Macro0, CA PI delay=33
766 01:02:33.863083
767 01:02:33.865715 [CBTSetCACLKResult] CA Dly = 33
768 01:02:33.866178 CS Dly: 5 (0~37)
769 01:02:33.866541
770 01:02:33.868987 ----->DramcWriteLeveling(PI) begin...
771 01:02:33.872361 ==
772 01:02:33.876264 Dram Type= 6, Freq= 0, CH_0, rank 0
773 01:02:33.879359 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
774 01:02:33.879934 ==
775 01:02:33.883813 Write leveling (Byte 0): 30 => 30
776 01:02:33.885600 Write leveling (Byte 1): 30 => 30
777 01:02:33.889118 DramcWriteLeveling(PI) end<-----
778 01:02:33.889678
779 01:02:33.890045 ==
780 01:02:33.892598 Dram Type= 6, Freq= 0, CH_0, rank 0
781 01:02:33.896164 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
782 01:02:33.896689 ==
783 01:02:33.899111 [Gating] SW mode calibration
784 01:02:33.906225 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
785 01:02:33.909184 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
786 01:02:33.916013 0 6 0 | B1->B0 | 3333 3232 | 1 0 | (1 0) (0 1)
787 01:02:33.919132 0 6 4 | B1->B0 | 2828 2626 | 0 0 | (0 0) (0 0)
788 01:02:33.922914 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
789 01:02:33.929667 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
790 01:02:33.933688 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
791 01:02:33.935391 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
792 01:02:33.942140 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
793 01:02:33.945821 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
794 01:02:33.948968 0 7 0 | B1->B0 | 2525 2e2e | 0 0 | (0 0) (0 0)
795 01:02:33.956343 0 7 4 | B1->B0 | 3a3a 3f3f | 0 0 | (0 0) (0 0)
796 01:02:33.959378 0 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
797 01:02:33.962962 0 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
798 01:02:33.968882 0 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
799 01:02:33.971967 0 7 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
800 01:02:33.975724 0 7 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
801 01:02:33.982513 0 7 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
802 01:02:33.985430 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
803 01:02:33.988922 0 8 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
804 01:02:33.995472 0 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
805 01:02:34.000154 0 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
806 01:02:34.002321 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
807 01:02:34.009047 0 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
808 01:02:34.012567 0 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
809 01:02:34.015319 0 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
810 01:02:34.022755 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
811 01:02:34.025348 0 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
812 01:02:34.028459 0 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
813 01:02:34.035437 0 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
814 01:02:34.038177 0 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
815 01:02:34.041860 0 9 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
816 01:02:34.048826 0 9 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
817 01:02:34.052024 0 9 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
818 01:02:34.055068 0 10 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
819 01:02:34.058662 Total UI for P1: 0, mck2ui 16
820 01:02:34.061428 best dqsien dly found for B1: ( 0, 9, 30)
821 01:02:34.065102 0 10 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
822 01:02:34.068537 Total UI for P1: 0, mck2ui 16
823 01:02:34.072240 best dqsien dly found for B0: ( 0, 10, 0)
824 01:02:34.078625 best DQS0 dly(MCK, UI, PI) = (0, 10, 0)
825 01:02:34.082348 best DQS1 dly(MCK, UI, PI) = (0, 9, 30)
826 01:02:34.082910
827 01:02:34.084894 best DQS0 P1 dly(MCK, UI, PI) = (0, 14, 0)
828 01:02:34.088083 best DQS1 P1 dly(MCK, UI, PI) = (0, 13, 30)
829 01:02:34.091305 [Gating] SW calibration Done
830 01:02:34.091765 ==
831 01:02:34.095415 Dram Type= 6, Freq= 0, CH_0, rank 0
832 01:02:34.098541 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
833 01:02:34.099104 ==
834 01:02:34.099520 RX Vref Scan: 0
835 01:02:34.099862
836 01:02:34.102291 RX Vref 0 -> 0, step: 1
837 01:02:34.102856
838 01:02:34.105257 RX Delay -130 -> 252, step: 16
839 01:02:34.108817 iDelay=222, Bit 0, Center 85 (-34 ~ 205) 240
840 01:02:34.112503 iDelay=222, Bit 1, Center 85 (-34 ~ 205) 240
841 01:02:34.118878 iDelay=222, Bit 2, Center 85 (-34 ~ 205) 240
842 01:02:34.122207 iDelay=222, Bit 3, Center 77 (-50 ~ 205) 256
843 01:02:34.125244 iDelay=222, Bit 4, Center 85 (-34 ~ 205) 240
844 01:02:34.128832 iDelay=222, Bit 5, Center 69 (-50 ~ 189) 240
845 01:02:34.132015 iDelay=222, Bit 6, Center 93 (-34 ~ 221) 256
846 01:02:34.139314 iDelay=222, Bit 7, Center 93 (-34 ~ 221) 256
847 01:02:34.141902 iDelay=222, Bit 8, Center 61 (-50 ~ 173) 224
848 01:02:34.145080 iDelay=222, Bit 9, Center 53 (-66 ~ 173) 240
849 01:02:34.148481 iDelay=222, Bit 10, Center 69 (-50 ~ 189) 240
850 01:02:34.151946 iDelay=222, Bit 11, Center 69 (-50 ~ 189) 240
851 01:02:34.158664 iDelay=222, Bit 12, Center 85 (-34 ~ 205) 240
852 01:02:34.161713 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
853 01:02:34.165055 iDelay=222, Bit 14, Center 85 (-34 ~ 205) 240
854 01:02:34.168445 iDelay=222, Bit 15, Center 85 (-34 ~ 205) 240
855 01:02:34.169065 ==
856 01:02:34.171783 Dram Type= 6, Freq= 0, CH_0, rank 0
857 01:02:34.179134 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
858 01:02:34.179701 ==
859 01:02:34.180069 DQS Delay:
860 01:02:34.180410 DQS0 = 0, DQS1 = 0
861 01:02:34.181648 DQM Delay:
862 01:02:34.182112 DQM0 = 84, DQM1 = 74
863 01:02:34.185475 DQ Delay:
864 01:02:34.188537 DQ0 =85, DQ1 =85, DQ2 =85, DQ3 =77
865 01:02:34.191876 DQ4 =85, DQ5 =69, DQ6 =93, DQ7 =93
866 01:02:34.195450 DQ8 =61, DQ9 =53, DQ10 =69, DQ11 =69
867 01:02:34.198284 DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85
868 01:02:34.198850
869 01:02:34.199218
870 01:02:34.199557 ==
871 01:02:34.201539 Dram Type= 6, Freq= 0, CH_0, rank 0
872 01:02:34.205355 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
873 01:02:34.205924 ==
874 01:02:34.206290
875 01:02:34.206627
876 01:02:34.209010 TX Vref Scan disable
877 01:02:34.209471 == TX Byte 0 ==
878 01:02:34.216131 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
879 01:02:34.218514 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
880 01:02:34.219079 == TX Byte 1 ==
881 01:02:34.225094 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
882 01:02:34.228481 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
883 01:02:34.229098 ==
884 01:02:34.232261 Dram Type= 6, Freq= 0, CH_0, rank 0
885 01:02:34.235578 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
886 01:02:34.236149 ==
887 01:02:34.249105 TX Vref=22, minBit 0, minWin=27, winSum=444
888 01:02:34.252270 TX Vref=24, minBit 4, minWin=27, winSum=450
889 01:02:34.255356 TX Vref=26, minBit 1, minWin=28, winSum=454
890 01:02:34.258422 TX Vref=28, minBit 2, minWin=28, winSum=457
891 01:02:34.261677 TX Vref=30, minBit 0, minWin=28, winSum=456
892 01:02:34.268661 TX Vref=32, minBit 0, minWin=28, winSum=455
893 01:02:34.272287 [TxChooseVref] Worse bit 2, Min win 28, Win sum 457, Final Vref 28
894 01:02:34.272918
895 01:02:34.275294 Final TX Range 1 Vref 28
896 01:02:34.275869
897 01:02:34.276243 ==
898 01:02:34.278282 Dram Type= 6, Freq= 0, CH_0, rank 0
899 01:02:34.281818 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
900 01:02:34.282336 ==
901 01:02:34.282712
902 01:02:34.284824
903 01:02:34.285303 TX Vref Scan disable
904 01:02:34.288327 == TX Byte 0 ==
905 01:02:34.291990 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
906 01:02:34.298521 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
907 01:02:34.299085 == TX Byte 1 ==
908 01:02:34.301546 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
909 01:02:34.308658 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
910 01:02:34.309274
911 01:02:34.309643 [DATLAT]
912 01:02:34.309983 Freq=800, CH0 RK0
913 01:02:34.310408
914 01:02:34.311746 DATLAT Default: 0xa
915 01:02:34.312205 0, 0xFFFF, sum = 0
916 01:02:34.315391 1, 0xFFFF, sum = 0
917 01:02:34.315979 2, 0xFFFF, sum = 0
918 01:02:34.318726 3, 0xFFFF, sum = 0
919 01:02:34.321575 4, 0xFFFF, sum = 0
920 01:02:34.322148 5, 0xFFFF, sum = 0
921 01:02:34.325415 6, 0xFFFF, sum = 0
922 01:02:34.325996 7, 0xFFFF, sum = 0
923 01:02:34.327842 8, 0x0, sum = 1
924 01:02:34.328315 9, 0x0, sum = 2
925 01:02:34.328685 10, 0x0, sum = 3
926 01:02:34.332196 11, 0x0, sum = 4
927 01:02:34.332811 best_step = 9
928 01:02:34.333184
929 01:02:34.333519 ==
930 01:02:34.334998 Dram Type= 6, Freq= 0, CH_0, rank 0
931 01:02:34.341942 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
932 01:02:34.342511 ==
933 01:02:34.342881 RX Vref Scan: 1
934 01:02:34.343222
935 01:02:34.344568 Set Vref Range= 32 -> 127
936 01:02:34.345092
937 01:02:34.349102 RX Vref 32 -> 127, step: 1
938 01:02:34.349665
939 01:02:34.352081 RX Delay -111 -> 252, step: 8
940 01:02:34.352647
941 01:02:34.354795 Set Vref, RX VrefLevel [Byte0]: 32
942 01:02:34.358154 [Byte1]: 32
943 01:02:34.358740
944 01:02:34.362524 Set Vref, RX VrefLevel [Byte0]: 33
945 01:02:34.364947 [Byte1]: 33
946 01:02:34.365405
947 01:02:34.368058 Set Vref, RX VrefLevel [Byte0]: 34
948 01:02:34.371641 [Byte1]: 34
949 01:02:34.372106
950 01:02:34.375039 Set Vref, RX VrefLevel [Byte0]: 35
951 01:02:34.377941 [Byte1]: 35
952 01:02:34.382350
953 01:02:34.382815 Set Vref, RX VrefLevel [Byte0]: 36
954 01:02:34.385393 [Byte1]: 36
955 01:02:34.390060
956 01:02:34.390523 Set Vref, RX VrefLevel [Byte0]: 37
957 01:02:34.393106 [Byte1]: 37
958 01:02:34.398041
959 01:02:34.398501 Set Vref, RX VrefLevel [Byte0]: 38
960 01:02:34.401196 [Byte1]: 38
961 01:02:34.405390
962 01:02:34.405853 Set Vref, RX VrefLevel [Byte0]: 39
963 01:02:34.408754 [Byte1]: 39
964 01:02:34.412949
965 01:02:34.413516 Set Vref, RX VrefLevel [Byte0]: 40
966 01:02:34.416318 [Byte1]: 40
967 01:02:34.420672
968 01:02:34.421265 Set Vref, RX VrefLevel [Byte0]: 41
969 01:02:34.424539 [Byte1]: 41
970 01:02:34.429292
971 01:02:34.429902 Set Vref, RX VrefLevel [Byte0]: 42
972 01:02:34.434849 [Byte1]: 42
973 01:02:34.435418
974 01:02:34.437904 Set Vref, RX VrefLevel [Byte0]: 43
975 01:02:34.441580 [Byte1]: 43
976 01:02:34.442154
977 01:02:34.444876 Set Vref, RX VrefLevel [Byte0]: 44
978 01:02:34.448214 [Byte1]: 44
979 01:02:34.451222
980 01:02:34.451792 Set Vref, RX VrefLevel [Byte0]: 45
981 01:02:34.454818 [Byte1]: 45
982 01:02:34.459954
983 01:02:34.460524 Set Vref, RX VrefLevel [Byte0]: 46
984 01:02:34.461782 [Byte1]: 46
985 01:02:34.466532
986 01:02:34.467099 Set Vref, RX VrefLevel [Byte0]: 47
987 01:02:34.469887 [Byte1]: 47
988 01:02:34.474927
989 01:02:34.475498 Set Vref, RX VrefLevel [Byte0]: 48
990 01:02:34.477101 [Byte1]: 48
991 01:02:34.481845
992 01:02:34.482407 Set Vref, RX VrefLevel [Byte0]: 49
993 01:02:34.485610 [Byte1]: 49
994 01:02:34.489337
995 01:02:34.489803 Set Vref, RX VrefLevel [Byte0]: 50
996 01:02:34.493212 [Byte1]: 50
997 01:02:34.497458
998 01:02:34.498016 Set Vref, RX VrefLevel [Byte0]: 51
999 01:02:34.501250 [Byte1]: 51
1000 01:02:34.504620
1001 01:02:34.505104 Set Vref, RX VrefLevel [Byte0]: 52
1002 01:02:34.508523 [Byte1]: 52
1003 01:02:34.512882
1004 01:02:34.513434 Set Vref, RX VrefLevel [Byte0]: 53
1005 01:02:34.515334 [Byte1]: 53
1006 01:02:34.519826
1007 01:02:34.520403 Set Vref, RX VrefLevel [Byte0]: 54
1008 01:02:34.523631 [Byte1]: 54
1009 01:02:34.527695
1010 01:02:34.528263 Set Vref, RX VrefLevel [Byte0]: 55
1011 01:02:34.532508 [Byte1]: 55
1012 01:02:34.534986
1013 01:02:34.535453 Set Vref, RX VrefLevel [Byte0]: 56
1014 01:02:34.539112 [Byte1]: 56
1015 01:02:34.543251
1016 01:02:34.543825 Set Vref, RX VrefLevel [Byte0]: 57
1017 01:02:34.546380 [Byte1]: 57
1018 01:02:34.550797
1019 01:02:34.551363 Set Vref, RX VrefLevel [Byte0]: 58
1020 01:02:34.553914 [Byte1]: 58
1021 01:02:34.558163
1022 01:02:34.558730 Set Vref, RX VrefLevel [Byte0]: 59
1023 01:02:34.561482 [Byte1]: 59
1024 01:02:34.566026
1025 01:02:34.566624 Set Vref, RX VrefLevel [Byte0]: 60
1026 01:02:34.569055 [Byte1]: 60
1027 01:02:34.573989
1028 01:02:34.574547 Set Vref, RX VrefLevel [Byte0]: 61
1029 01:02:34.576917 [Byte1]: 61
1030 01:02:34.581562
1031 01:02:34.582128 Set Vref, RX VrefLevel [Byte0]: 62
1032 01:02:34.584367 [Byte1]: 62
1033 01:02:34.588790
1034 01:02:34.589349 Set Vref, RX VrefLevel [Byte0]: 63
1035 01:02:34.591964 [Byte1]: 63
1036 01:02:34.596302
1037 01:02:34.596908 Set Vref, RX VrefLevel [Byte0]: 64
1038 01:02:34.599813 [Byte1]: 64
1039 01:02:34.604086
1040 01:02:34.604643 Set Vref, RX VrefLevel [Byte0]: 65
1041 01:02:34.608230 [Byte1]: 65
1042 01:02:34.611715
1043 01:02:34.612266 Set Vref, RX VrefLevel [Byte0]: 66
1044 01:02:34.614990 [Byte1]: 66
1045 01:02:34.619808
1046 01:02:34.620265 Set Vref, RX VrefLevel [Byte0]: 67
1047 01:02:34.623349 [Byte1]: 67
1048 01:02:34.627776
1049 01:02:34.628232 Set Vref, RX VrefLevel [Byte0]: 68
1050 01:02:34.630376 [Byte1]: 68
1051 01:02:34.635856
1052 01:02:34.636449 Set Vref, RX VrefLevel [Byte0]: 69
1053 01:02:34.638353 [Byte1]: 69
1054 01:02:34.642955
1055 01:02:34.643512 Set Vref, RX VrefLevel [Byte0]: 70
1056 01:02:34.646135 [Byte1]: 70
1057 01:02:34.650328
1058 01:02:34.650787 Set Vref, RX VrefLevel [Byte0]: 71
1059 01:02:34.652861 [Byte1]: 71
1060 01:02:34.657453
1061 01:02:34.658002 Set Vref, RX VrefLevel [Byte0]: 72
1062 01:02:34.661108 [Byte1]: 72
1063 01:02:34.664854
1064 01:02:34.665604 Set Vref, RX VrefLevel [Byte0]: 73
1065 01:02:34.668793 [Byte1]: 73
1066 01:02:34.672752
1067 01:02:34.673303 Set Vref, RX VrefLevel [Byte0]: 74
1068 01:02:34.676395 [Byte1]: 74
1069 01:02:34.680912
1070 01:02:34.681475 Set Vref, RX VrefLevel [Byte0]: 75
1071 01:02:34.683849 [Byte1]: 75
1072 01:02:34.689147
1073 01:02:34.689702 Final RX Vref Byte 0 = 51 to rank0
1074 01:02:34.691478 Final RX Vref Byte 1 = 50 to rank0
1075 01:02:34.696000 Final RX Vref Byte 0 = 51 to rank1
1076 01:02:34.698161 Final RX Vref Byte 1 = 50 to rank1==
1077 01:02:34.701082 Dram Type= 6, Freq= 0, CH_0, rank 0
1078 01:02:34.708081 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1079 01:02:34.708681 ==
1080 01:02:34.709097 DQS Delay:
1081 01:02:34.709432 DQS0 = 0, DQS1 = 0
1082 01:02:34.712528 DQM Delay:
1083 01:02:34.713016 DQM0 = 84, DQM1 = 73
1084 01:02:34.714430 DQ Delay:
1085 01:02:34.717926 DQ0 =80, DQ1 =84, DQ2 =80, DQ3 =80
1086 01:02:34.721373 DQ4 =88, DQ5 =76, DQ6 =92, DQ7 =92
1087 01:02:34.721826 DQ8 =64, DQ9 =56, DQ10 =72, DQ11 =64
1088 01:02:34.728049 DQ12 =80, DQ13 =80, DQ14 =84, DQ15 =84
1089 01:02:34.728592
1090 01:02:34.729007
1091 01:02:34.735174 [DQSOSCAuto] RK0, (LSB)MR18= 0x3737, (MSB)MR19= 0x606, tDQSOscB0 = 395 ps tDQSOscB1 = 395 ps
1092 01:02:34.739771 CH0 RK0: MR19=606, MR18=3737
1093 01:02:34.744668 CH0_RK0: MR19=0x606, MR18=0x3737, DQSOSC=395, MR23=63, INC=94, DEC=63
1094 01:02:34.745261
1095 01:02:34.749016 ----->DramcWriteLeveling(PI) begin...
1096 01:02:34.749581 ==
1097 01:02:34.751488 Dram Type= 6, Freq= 0, CH_0, rank 1
1098 01:02:34.755306 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1099 01:02:34.755899 ==
1100 01:02:34.758606 Write leveling (Byte 0): 29 => 29
1101 01:02:34.762098 Write leveling (Byte 1): 29 => 29
1102 01:02:34.765052 DramcWriteLeveling(PI) end<-----
1103 01:02:34.765501
1104 01:02:34.765850 ==
1105 01:02:34.768285 Dram Type= 6, Freq= 0, CH_0, rank 1
1106 01:02:34.771429 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1107 01:02:34.771989 ==
1108 01:02:34.774406 [Gating] SW mode calibration
1109 01:02:34.781297 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1110 01:02:34.787989 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1111 01:02:34.791193 0 6 0 | B1->B0 | 3131 2f2f | 0 0 | (0 1) (0 0)
1112 01:02:34.794858 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1113 01:02:34.801631 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1114 01:02:34.804960 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1115 01:02:34.807944 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1116 01:02:34.814762 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1117 01:02:34.817818 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1118 01:02:34.821155 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1119 01:02:34.827747 0 7 0 | B1->B0 | 3131 3232 | 0 1 | (0 0) (0 0)
1120 01:02:34.831353 0 7 4 | B1->B0 | 4141 4343 | 0 0 | (0 0) (0 0)
1121 01:02:34.835091 0 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1122 01:02:34.842422 0 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1123 01:02:34.844790 0 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1124 01:02:34.848534 0 7 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1125 01:02:34.854565 0 7 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1126 01:02:34.858306 0 7 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1127 01:02:34.861576 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1128 01:02:34.865075 0 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
1129 01:02:34.871280 0 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1130 01:02:34.875782 0 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1131 01:02:34.878392 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1132 01:02:34.884597 0 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1133 01:02:34.887818 0 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1134 01:02:34.891244 0 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1135 01:02:34.897724 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1136 01:02:34.900845 0 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1137 01:02:34.904664 0 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1138 01:02:34.911371 0 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1139 01:02:34.914514 0 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1140 01:02:34.918575 0 9 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1141 01:02:34.924570 0 9 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1142 01:02:34.927602 0 9 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1143 01:02:34.931140 0 10 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1144 01:02:34.938389 0 10 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1145 01:02:34.939025 Total UI for P1: 0, mck2ui 16
1146 01:02:34.944645 best dqsien dly found for B0: ( 0, 10, 0)
1147 01:02:34.945263 Total UI for P1: 0, mck2ui 16
1148 01:02:34.948050 best dqsien dly found for B1: ( 0, 10, 0)
1149 01:02:34.955681 best DQS0 dly(MCK, UI, PI) = (0, 10, 0)
1150 01:02:34.957935 best DQS1 dly(MCK, UI, PI) = (0, 10, 0)
1151 01:02:34.958491
1152 01:02:34.961327 best DQS0 P1 dly(MCK, UI, PI) = (0, 14, 0)
1153 01:02:34.964875 best DQS1 P1 dly(MCK, UI, PI) = (0, 14, 0)
1154 01:02:34.968427 [Gating] SW calibration Done
1155 01:02:34.969036 ==
1156 01:02:34.971215 Dram Type= 6, Freq= 0, CH_0, rank 1
1157 01:02:35.015299 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1158 01:02:35.015919 ==
1159 01:02:35.016478 RX Vref Scan: 0
1160 01:02:35.016979
1161 01:02:35.017744 RX Vref 0 -> 0, step: 1
1162 01:02:35.018098
1163 01:02:35.018421 RX Delay -130 -> 252, step: 16
1164 01:02:35.018734 iDelay=222, Bit 0, Center 77 (-50 ~ 205) 256
1165 01:02:35.019236 iDelay=222, Bit 1, Center 85 (-34 ~ 205) 240
1166 01:02:35.019699 iDelay=222, Bit 2, Center 77 (-50 ~ 205) 256
1167 01:02:35.020073 iDelay=222, Bit 3, Center 77 (-50 ~ 205) 256
1168 01:02:35.020611 iDelay=222, Bit 4, Center 93 (-18 ~ 205) 224
1169 01:02:35.021039 iDelay=222, Bit 5, Center 69 (-50 ~ 189) 240
1170 01:02:35.021353 iDelay=222, Bit 6, Center 101 (-18 ~ 221) 240
1171 01:02:35.021654 iDelay=222, Bit 7, Center 101 (-18 ~ 221) 240
1172 01:02:35.040373 iDelay=222, Bit 8, Center 61 (-50 ~ 173) 224
1173 01:02:35.041205 iDelay=222, Bit 9, Center 53 (-66 ~ 173) 240
1174 01:02:35.042113 iDelay=222, Bit 10, Center 69 (-50 ~ 189) 240
1175 01:02:35.042514 iDelay=222, Bit 11, Center 61 (-50 ~ 173) 224
1176 01:02:35.042858 iDelay=222, Bit 12, Center 77 (-34 ~ 189) 224
1177 01:02:35.043215 iDelay=222, Bit 13, Center 77 (-50 ~ 205) 256
1178 01:02:35.044271 iDelay=222, Bit 14, Center 85 (-34 ~ 205) 240
1179 01:02:35.047694 iDelay=222, Bit 15, Center 77 (-34 ~ 189) 224
1180 01:02:35.048254 ==
1181 01:02:35.048621 Dram Type= 6, Freq= 0, CH_0, rank 1
1182 01:02:35.054745 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1183 01:02:35.055299 ==
1184 01:02:35.055660 DQS Delay:
1185 01:02:35.058362 DQS0 = 0, DQS1 = 0
1186 01:02:35.058916 DQM Delay:
1187 01:02:35.059277 DQM0 = 85, DQM1 = 70
1188 01:02:35.061746 DQ Delay:
1189 01:02:35.064814 DQ0 =77, DQ1 =85, DQ2 =77, DQ3 =77
1190 01:02:35.068103 DQ4 =93, DQ5 =69, DQ6 =101, DQ7 =101
1191 01:02:35.071630 DQ8 =61, DQ9 =53, DQ10 =69, DQ11 =61
1192 01:02:35.074602 DQ12 =77, DQ13 =77, DQ14 =85, DQ15 =77
1193 01:02:35.075150
1194 01:02:35.075511
1195 01:02:35.075892 ==
1196 01:02:35.077402 Dram Type= 6, Freq= 0, CH_0, rank 1
1197 01:02:35.080931 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1198 01:02:35.081387 ==
1199 01:02:35.081748
1200 01:02:35.082081
1201 01:02:35.085084 TX Vref Scan disable
1202 01:02:35.088291 == TX Byte 0 ==
1203 01:02:35.090845 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1204 01:02:35.094630 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1205 01:02:35.098786 == TX Byte 1 ==
1206 01:02:35.101071 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1207 01:02:35.104467 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1208 01:02:35.105060 ==
1209 01:02:35.107655 Dram Type= 6, Freq= 0, CH_0, rank 1
1210 01:02:35.111538 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1211 01:02:35.114687 ==
1212 01:02:35.125269 TX Vref=22, minBit 0, minWin=27, winSum=443
1213 01:02:35.128669 TX Vref=24, minBit 0, minWin=27, winSum=449
1214 01:02:35.132298 TX Vref=26, minBit 2, minWin=28, winSum=456
1215 01:02:35.135632 TX Vref=28, minBit 2, minWin=28, winSum=461
1216 01:02:35.138656 TX Vref=30, minBit 2, minWin=28, winSum=460
1217 01:02:35.142189 TX Vref=32, minBit 2, minWin=28, winSum=459
1218 01:02:35.148809 [TxChooseVref] Worse bit 2, Min win 28, Win sum 461, Final Vref 28
1219 01:02:35.149343
1220 01:02:35.152301 Final TX Range 1 Vref 28
1221 01:02:35.152809
1222 01:02:35.153174 ==
1223 01:02:35.154938 Dram Type= 6, Freq= 0, CH_0, rank 1
1224 01:02:35.159198 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1225 01:02:35.159752 ==
1226 01:02:35.160114
1227 01:02:35.161388
1228 01:02:35.161836 TX Vref Scan disable
1229 01:02:35.165804 == TX Byte 0 ==
1230 01:02:35.168359 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1231 01:02:35.174847 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1232 01:02:35.175302 == TX Byte 1 ==
1233 01:02:35.178680 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1234 01:02:35.185336 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1235 01:02:35.185902
1236 01:02:35.186263 [DATLAT]
1237 01:02:35.186599 Freq=800, CH0 RK1
1238 01:02:35.186918
1239 01:02:35.189164 DATLAT Default: 0x9
1240 01:02:35.189617 0, 0xFFFF, sum = 0
1241 01:02:35.191680 1, 0xFFFF, sum = 0
1242 01:02:35.192138 2, 0xFFFF, sum = 0
1243 01:02:35.194835 3, 0xFFFF, sum = 0
1244 01:02:35.195387 4, 0xFFFF, sum = 0
1245 01:02:35.198616 5, 0xFFFF, sum = 0
1246 01:02:35.202036 6, 0xFFFF, sum = 0
1247 01:02:35.202592 7, 0xFFFF, sum = 0
1248 01:02:35.202954 8, 0x0, sum = 1
1249 01:02:35.204927 9, 0x0, sum = 2
1250 01:02:35.205385 10, 0x0, sum = 3
1251 01:02:35.208537 11, 0x0, sum = 4
1252 01:02:35.209159 best_step = 9
1253 01:02:35.209519
1254 01:02:35.209847 ==
1255 01:02:35.212018 Dram Type= 6, Freq= 0, CH_0, rank 1
1256 01:02:35.218202 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1257 01:02:35.218754 ==
1258 01:02:35.219112 RX Vref Scan: 0
1259 01:02:35.219447
1260 01:02:35.221422 RX Vref 0 -> 0, step: 1
1261 01:02:35.221872
1262 01:02:35.225050 RX Delay -111 -> 252, step: 8
1263 01:02:35.228598 iDelay=217, Bit 0, Center 80 (-39 ~ 200) 240
1264 01:02:35.231855 iDelay=217, Bit 1, Center 88 (-31 ~ 208) 240
1265 01:02:35.238253 iDelay=217, Bit 2, Center 84 (-31 ~ 200) 232
1266 01:02:35.241358 iDelay=217, Bit 3, Center 84 (-31 ~ 200) 232
1267 01:02:35.245347 iDelay=217, Bit 4, Center 88 (-31 ~ 208) 240
1268 01:02:35.248754 iDelay=217, Bit 5, Center 76 (-39 ~ 192) 232
1269 01:02:35.251335 iDelay=217, Bit 6, Center 92 (-23 ~ 208) 232
1270 01:02:35.258184 iDelay=217, Bit 7, Center 96 (-23 ~ 216) 240
1271 01:02:35.262110 iDelay=217, Bit 8, Center 64 (-47 ~ 176) 224
1272 01:02:35.265498 iDelay=217, Bit 9, Center 64 (-47 ~ 176) 224
1273 01:02:35.268199 iDelay=217, Bit 10, Center 76 (-39 ~ 192) 232
1274 01:02:35.271831 iDelay=217, Bit 11, Center 64 (-47 ~ 176) 224
1275 01:02:35.278247 iDelay=217, Bit 12, Center 80 (-31 ~ 192) 224
1276 01:02:35.282018 iDelay=217, Bit 13, Center 76 (-39 ~ 192) 232
1277 01:02:35.284512 iDelay=217, Bit 14, Center 84 (-31 ~ 200) 232
1278 01:02:35.288270 iDelay=217, Bit 15, Center 80 (-31 ~ 192) 224
1279 01:02:35.288866 ==
1280 01:02:35.291641 Dram Type= 6, Freq= 0, CH_0, rank 1
1281 01:02:35.298049 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1282 01:02:35.298606 ==
1283 01:02:35.298968 DQS Delay:
1284 01:02:35.299295 DQS0 = 0, DQS1 = 0
1285 01:02:35.302323 DQM Delay:
1286 01:02:35.302876 DQM0 = 86, DQM1 = 73
1287 01:02:35.305706 DQ Delay:
1288 01:02:35.308778 DQ0 =80, DQ1 =88, DQ2 =84, DQ3 =84
1289 01:02:35.309336 DQ4 =88, DQ5 =76, DQ6 =92, DQ7 =96
1290 01:02:35.312193 DQ8 =64, DQ9 =64, DQ10 =76, DQ11 =64
1291 01:02:35.317962 DQ12 =80, DQ13 =76, DQ14 =84, DQ15 =80
1292 01:02:35.318515
1293 01:02:35.318875
1294 01:02:35.324319 [DQSOSCAuto] RK1, (LSB)MR18= 0x4a4a, (MSB)MR19= 0x606, tDQSOscB0 = 391 ps tDQSOscB1 = 391 ps
1295 01:02:35.328286 CH0 RK1: MR19=606, MR18=4A4A
1296 01:02:35.335187 CH0_RK1: MR19=0x606, MR18=0x4A4A, DQSOSC=391, MR23=63, INC=96, DEC=64
1297 01:02:35.338300 [RxdqsGatingPostProcess] freq 800
1298 01:02:35.341305 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
1299 01:02:35.344700 Pre-setting of DQS Precalculation
1300 01:02:35.347770 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
1301 01:02:35.351726 ==
1302 01:02:35.354929 Dram Type= 6, Freq= 0, CH_1, rank 0
1303 01:02:35.357903 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1304 01:02:35.358287 ==
1305 01:02:35.361214 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1306 01:02:35.368368 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1307 01:02:35.378830 [CA 0] Center 36 (6~67) winsize 62
1308 01:02:35.380983 [CA 1] Center 36 (5~67) winsize 63
1309 01:02:35.384264 [CA 2] Center 34 (4~65) winsize 62
1310 01:02:35.388796 [CA 3] Center 34 (4~65) winsize 62
1311 01:02:35.390762 [CA 4] Center 33 (2~64) winsize 63
1312 01:02:35.394174 [CA 5] Center 33 (3~64) winsize 62
1313 01:02:35.394623
1314 01:02:35.397790 [CmdBusTrainingLP45] Vref(ca) range 1: 34
1315 01:02:35.398419
1316 01:02:35.401266 [CATrainingPosCal] consider 1 rank data
1317 01:02:35.404544 u2DelayCellTimex100 = 270/100 ps
1318 01:02:35.407639 CA0 delay=36 (6~67),Diff = 3 PI (21 cell)
1319 01:02:35.411279 CA1 delay=36 (5~67),Diff = 3 PI (21 cell)
1320 01:02:35.417734 CA2 delay=34 (4~65),Diff = 1 PI (7 cell)
1321 01:02:35.420947 CA3 delay=34 (4~65),Diff = 1 PI (7 cell)
1322 01:02:35.424582 CA4 delay=33 (2~64),Diff = 0 PI (0 cell)
1323 01:02:35.428219 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
1324 01:02:35.428831
1325 01:02:35.431704 CA PerBit enable=1, Macro0, CA PI delay=33
1326 01:02:35.432260
1327 01:02:35.434299 [CBTSetCACLKResult] CA Dly = 33
1328 01:02:35.434795 CS Dly: 4 (0~35)
1329 01:02:35.438104 ==
1330 01:02:35.438664 Dram Type= 6, Freq= 0, CH_1, rank 1
1331 01:02:35.444659 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1332 01:02:35.445256 ==
1333 01:02:35.448105 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1334 01:02:35.454269 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1335 01:02:35.463735 [CA 0] Center 36 (6~67) winsize 62
1336 01:02:35.466806 [CA 1] Center 36 (6~67) winsize 62
1337 01:02:35.470186 [CA 2] Center 34 (4~65) winsize 62
1338 01:02:35.473884 [CA 3] Center 34 (4~65) winsize 62
1339 01:02:35.477043 [CA 4] Center 33 (3~63) winsize 61
1340 01:02:35.481734 [CA 5] Center 32 (2~63) winsize 62
1341 01:02:35.482282
1342 01:02:35.483990 [CmdBusTrainingLP45] Vref(ca) range 1: 34
1343 01:02:35.484438
1344 01:02:35.487468 [CATrainingPosCal] consider 2 rank data
1345 01:02:35.491039 u2DelayCellTimex100 = 270/100 ps
1346 01:02:35.493945 CA0 delay=36 (6~67),Diff = 3 PI (21 cell)
1347 01:02:35.497238 CA1 delay=36 (6~67),Diff = 3 PI (21 cell)
1348 01:02:35.503530 CA2 delay=34 (4~65),Diff = 1 PI (7 cell)
1349 01:02:35.506835 CA3 delay=34 (4~65),Diff = 1 PI (7 cell)
1350 01:02:35.510332 CA4 delay=33 (3~63),Diff = 0 PI (0 cell)
1351 01:02:35.513353 CA5 delay=33 (3~63),Diff = 0 PI (0 cell)
1352 01:02:35.513803
1353 01:02:35.516608 CA PerBit enable=1, Macro0, CA PI delay=33
1354 01:02:35.517122
1355 01:02:35.519917 [CBTSetCACLKResult] CA Dly = 33
1356 01:02:35.520370 CS Dly: 4 (0~36)
1357 01:02:35.520777
1358 01:02:35.523426 ----->DramcWriteLeveling(PI) begin...
1359 01:02:35.526768 ==
1360 01:02:35.530908 Dram Type= 6, Freq= 0, CH_1, rank 0
1361 01:02:35.534054 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1362 01:02:35.534611 ==
1363 01:02:35.536953 Write leveling (Byte 0): 24 => 24
1364 01:02:35.540505 Write leveling (Byte 1): 25 => 25
1365 01:02:35.543450 DramcWriteLeveling(PI) end<-----
1366 01:02:35.544006
1367 01:02:35.544367 ==
1368 01:02:35.546905 Dram Type= 6, Freq= 0, CH_1, rank 0
1369 01:02:35.550025 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1370 01:02:35.550479 ==
1371 01:02:35.553666 [Gating] SW mode calibration
1372 01:02:35.560392 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1373 01:02:35.563477 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1374 01:02:35.570335 0 6 0 | B1->B0 | 2f2f 2424 | 1 0 | (1 0) (1 0)
1375 01:02:35.573701 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1376 01:02:35.576688 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1377 01:02:35.583770 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1378 01:02:35.587111 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1379 01:02:35.590510 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1380 01:02:35.596421 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1381 01:02:35.601367 0 6 28 | B1->B0 | 2525 3030 | 0 1 | (0 0) (0 0)
1382 01:02:35.603822 0 7 0 | B1->B0 | 3030 3f3f | 0 0 | (0 0) (1 1)
1383 01:02:35.609737 0 7 4 | B1->B0 | 4545 4646 | 1 0 | (0 0) (0 0)
1384 01:02:35.613666 0 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1385 01:02:35.617183 0 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1386 01:02:35.623525 0 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1387 01:02:35.627452 0 7 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1388 01:02:35.630291 0 7 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1389 01:02:35.636639 0 7 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1390 01:02:35.640400 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
1391 01:02:35.643420 0 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1392 01:02:35.650751 0 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1393 01:02:35.653832 0 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1394 01:02:35.656379 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1395 01:02:35.663577 0 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1396 01:02:35.666577 0 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1397 01:02:35.669608 0 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1398 01:02:35.676591 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1399 01:02:35.680339 0 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1400 01:02:35.683350 0 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1401 01:02:35.690215 0 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1402 01:02:35.692862 0 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1403 01:02:35.696877 0 9 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1404 01:02:35.699951 0 9 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1405 01:02:35.707847 0 9 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
1406 01:02:35.710082 0 10 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1407 01:02:35.712961 0 10 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1408 01:02:35.716401 Total UI for P1: 0, mck2ui 16
1409 01:02:35.719460 best dqsien dly found for B0: ( 0, 9, 30)
1410 01:02:35.722933 Total UI for P1: 0, mck2ui 16
1411 01:02:35.726632 best dqsien dly found for B1: ( 0, 10, 0)
1412 01:02:35.730178 best DQS0 dly(MCK, UI, PI) = (0, 9, 30)
1413 01:02:35.733448 best DQS1 dly(MCK, UI, PI) = (0, 10, 0)
1414 01:02:35.734007
1415 01:02:35.739952 best DQS0 P1 dly(MCK, UI, PI) = (0, 13, 30)
1416 01:02:35.743208 best DQS1 P1 dly(MCK, UI, PI) = (0, 14, 0)
1417 01:02:35.746322 [Gating] SW calibration Done
1418 01:02:35.746875 ==
1419 01:02:35.750053 Dram Type= 6, Freq= 0, CH_1, rank 0
1420 01:02:35.753514 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1421 01:02:35.754072 ==
1422 01:02:35.754438 RX Vref Scan: 0
1423 01:02:35.754778
1424 01:02:35.755974 RX Vref 0 -> 0, step: 1
1425 01:02:35.756431
1426 01:02:35.760403 RX Delay -130 -> 252, step: 16
1427 01:02:35.763750 iDelay=222, Bit 0, Center 85 (-34 ~ 205) 240
1428 01:02:35.766666 iDelay=222, Bit 1, Center 77 (-50 ~ 205) 256
1429 01:02:35.773033 iDelay=222, Bit 2, Center 69 (-50 ~ 189) 240
1430 01:02:35.776351 iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240
1431 01:02:35.779430 iDelay=222, Bit 4, Center 77 (-50 ~ 205) 256
1432 01:02:35.783893 iDelay=222, Bit 5, Center 93 (-34 ~ 221) 256
1433 01:02:35.786927 iDelay=222, Bit 6, Center 85 (-34 ~ 205) 240
1434 01:02:35.793219 iDelay=222, Bit 7, Center 77 (-50 ~ 205) 256
1435 01:02:35.796126 iDelay=222, Bit 8, Center 53 (-66 ~ 173) 240
1436 01:02:35.799641 iDelay=222, Bit 9, Center 61 (-66 ~ 189) 256
1437 01:02:35.803476 iDelay=222, Bit 10, Center 77 (-50 ~ 205) 256
1438 01:02:35.805807 iDelay=222, Bit 11, Center 61 (-66 ~ 189) 256
1439 01:02:35.813335 iDelay=222, Bit 12, Center 85 (-34 ~ 205) 240
1440 01:02:35.816551 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
1441 01:02:35.819831 iDelay=222, Bit 14, Center 77 (-50 ~ 205) 256
1442 01:02:35.822665 iDelay=222, Bit 15, Center 85 (-34 ~ 205) 240
1443 01:02:35.823127 ==
1444 01:02:35.826302 Dram Type= 6, Freq= 0, CH_1, rank 0
1445 01:02:35.833962 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1446 01:02:35.834523 ==
1447 01:02:35.834891 DQS Delay:
1448 01:02:35.835226 DQS0 = 0, DQS1 = 0
1449 01:02:35.837045 DQM Delay:
1450 01:02:35.837603 DQM0 = 81, DQM1 = 73
1451 01:02:35.839569 DQ Delay:
1452 01:02:35.843287 DQ0 =85, DQ1 =77, DQ2 =69, DQ3 =85
1453 01:02:35.843853 DQ4 =77, DQ5 =93, DQ6 =85, DQ7 =77
1454 01:02:35.846161 DQ8 =53, DQ9 =61, DQ10 =77, DQ11 =61
1455 01:02:35.852758 DQ12 =85, DQ13 =85, DQ14 =77, DQ15 =85
1456 01:02:35.853323
1457 01:02:35.853689
1458 01:02:35.854024 ==
1459 01:02:35.857337 Dram Type= 6, Freq= 0, CH_1, rank 0
1460 01:02:35.859061 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1461 01:02:35.859525 ==
1462 01:02:35.859886
1463 01:02:35.860222
1464 01:02:35.862631 TX Vref Scan disable
1465 01:02:35.863088 == TX Byte 0 ==
1466 01:02:35.869356 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
1467 01:02:35.872883 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
1468 01:02:35.873457 == TX Byte 1 ==
1469 01:02:35.879758 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
1470 01:02:35.882675 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
1471 01:02:35.883228 ==
1472 01:02:35.886739 Dram Type= 6, Freq= 0, CH_1, rank 0
1473 01:02:35.888904 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1474 01:02:35.889367 ==
1475 01:02:35.903078 TX Vref=22, minBit 1, minWin=27, winSum=445
1476 01:02:35.907477 TX Vref=24, minBit 0, minWin=27, winSum=448
1477 01:02:35.909729 TX Vref=26, minBit 0, minWin=28, winSum=455
1478 01:02:35.913050 TX Vref=28, minBit 3, minWin=28, winSum=458
1479 01:02:35.916666 TX Vref=30, minBit 3, minWin=28, winSum=457
1480 01:02:35.919361 TX Vref=32, minBit 3, minWin=28, winSum=458
1481 01:02:35.926549 [TxChooseVref] Worse bit 3, Min win 28, Win sum 458, Final Vref 28
1482 01:02:35.927184
1483 01:02:35.929622 Final TX Range 1 Vref 28
1484 01:02:35.930188
1485 01:02:35.930554 ==
1486 01:02:35.932997 Dram Type= 6, Freq= 0, CH_1, rank 0
1487 01:02:35.937245 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1488 01:02:35.937797 ==
1489 01:02:35.938162
1490 01:02:35.940413
1491 01:02:35.941005 TX Vref Scan disable
1492 01:02:35.942640 == TX Byte 0 ==
1493 01:02:35.946701 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
1494 01:02:35.949512 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
1495 01:02:35.953239 == TX Byte 1 ==
1496 01:02:35.956232 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
1497 01:02:35.959489 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
1498 01:02:35.963209
1499 01:02:35.963765 [DATLAT]
1500 01:02:35.964130 Freq=800, CH1 RK0
1501 01:02:35.964472
1502 01:02:35.965950 DATLAT Default: 0xa
1503 01:02:35.966425 0, 0xFFFF, sum = 0
1504 01:02:35.970188 1, 0xFFFF, sum = 0
1505 01:02:35.970753 2, 0xFFFF, sum = 0
1506 01:02:35.972648 3, 0xFFFF, sum = 0
1507 01:02:35.973262 4, 0xFFFF, sum = 0
1508 01:02:35.976295 5, 0xFFFF, sum = 0
1509 01:02:35.979244 6, 0xFFFF, sum = 0
1510 01:02:35.979805 7, 0xFFFF, sum = 0
1511 01:02:35.980178 8, 0x0, sum = 1
1512 01:02:35.983526 9, 0x0, sum = 2
1513 01:02:35.984099 10, 0x0, sum = 3
1514 01:02:35.987275 11, 0x0, sum = 4
1515 01:02:35.987743 best_step = 9
1516 01:02:35.988105
1517 01:02:35.988471 ==
1518 01:02:35.989248 Dram Type= 6, Freq= 0, CH_1, rank 0
1519 01:02:35.996032 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1520 01:02:35.996623 ==
1521 01:02:35.997070 RX Vref Scan: 1
1522 01:02:35.997421
1523 01:02:35.999410 Set Vref Range= 32 -> 127
1524 01:02:35.999867
1525 01:02:36.002719 RX Vref 32 -> 127, step: 1
1526 01:02:36.003270
1527 01:02:36.006014 RX Delay -111 -> 252, step: 8
1528 01:02:36.006473
1529 01:02:36.009700 Set Vref, RX VrefLevel [Byte0]: 32
1530 01:02:36.010257 [Byte1]: 32
1531 01:02:36.013727
1532 01:02:36.014285 Set Vref, RX VrefLevel [Byte0]: 33
1533 01:02:36.016952 [Byte1]: 33
1534 01:02:36.021400
1535 01:02:36.021957 Set Vref, RX VrefLevel [Byte0]: 34
1536 01:02:36.024850 [Byte1]: 34
1537 01:02:36.028985
1538 01:02:36.029442 Set Vref, RX VrefLevel [Byte0]: 35
1539 01:02:36.032431 [Byte1]: 35
1540 01:02:36.036995
1541 01:02:36.037563 Set Vref, RX VrefLevel [Byte0]: 36
1542 01:02:36.039968 [Byte1]: 36
1543 01:02:36.044101
1544 01:02:36.044664 Set Vref, RX VrefLevel [Byte0]: 37
1545 01:02:36.048039 [Byte1]: 37
1546 01:02:36.052929
1547 01:02:36.053493 Set Vref, RX VrefLevel [Byte0]: 38
1548 01:02:36.055731 [Byte1]: 38
1549 01:02:36.060042
1550 01:02:36.060597 Set Vref, RX VrefLevel [Byte0]: 39
1551 01:02:36.063528 [Byte1]: 39
1552 01:02:36.068165
1553 01:02:36.068761 Set Vref, RX VrefLevel [Byte0]: 40
1554 01:02:36.071018 [Byte1]: 40
1555 01:02:36.074594
1556 01:02:36.075048 Set Vref, RX VrefLevel [Byte0]: 41
1557 01:02:36.078769 [Byte1]: 41
1558 01:02:36.083250
1559 01:02:36.083809 Set Vref, RX VrefLevel [Byte0]: 42
1560 01:02:36.085486 [Byte1]: 42
1561 01:02:36.090370
1562 01:02:36.090924 Set Vref, RX VrefLevel [Byte0]: 43
1563 01:02:36.093544 [Byte1]: 43
1564 01:02:36.097891
1565 01:02:36.098448 Set Vref, RX VrefLevel [Byte0]: 44
1566 01:02:36.101459 [Byte1]: 44
1567 01:02:36.105426
1568 01:02:36.105899 Set Vref, RX VrefLevel [Byte0]: 45
1569 01:02:36.108994 [Byte1]: 45
1570 01:02:36.113377
1571 01:02:36.113931 Set Vref, RX VrefLevel [Byte0]: 46
1572 01:02:36.116818 [Byte1]: 46
1573 01:02:36.121500
1574 01:02:36.122053 Set Vref, RX VrefLevel [Byte0]: 47
1575 01:02:36.124096 [Byte1]: 47
1576 01:02:36.128516
1577 01:02:36.129117 Set Vref, RX VrefLevel [Byte0]: 48
1578 01:02:36.131757 [Byte1]: 48
1579 01:02:36.136377
1580 01:02:36.136971 Set Vref, RX VrefLevel [Byte0]: 49
1581 01:02:36.139631 [Byte1]: 49
1582 01:02:36.143984
1583 01:02:36.144540 Set Vref, RX VrefLevel [Byte0]: 50
1584 01:02:36.147515 [Byte1]: 50
1585 01:02:36.151451
1586 01:02:36.151908 Set Vref, RX VrefLevel [Byte0]: 51
1587 01:02:36.155164 [Byte1]: 51
1588 01:02:36.159805
1589 01:02:36.160360 Set Vref, RX VrefLevel [Byte0]: 52
1590 01:02:36.166703 [Byte1]: 52
1591 01:02:36.167263
1592 01:02:36.169246 Set Vref, RX VrefLevel [Byte0]: 53
1593 01:02:36.172213 [Byte1]: 53
1594 01:02:36.172808
1595 01:02:36.175891 Set Vref, RX VrefLevel [Byte0]: 54
1596 01:02:36.179004 [Byte1]: 54
1597 01:02:36.179562
1598 01:02:36.182246 Set Vref, RX VrefLevel [Byte0]: 55
1599 01:02:36.185325 [Byte1]: 55
1600 01:02:36.190498
1601 01:02:36.191060 Set Vref, RX VrefLevel [Byte0]: 56
1602 01:02:36.193320 [Byte1]: 56
1603 01:02:36.197746
1604 01:02:36.198331 Set Vref, RX VrefLevel [Byte0]: 57
1605 01:02:36.200900 [Byte1]: 57
1606 01:02:36.204875
1607 01:02:36.205438 Set Vref, RX VrefLevel [Byte0]: 58
1608 01:02:36.207920 [Byte1]: 58
1609 01:02:36.213693
1610 01:02:36.214249 Set Vref, RX VrefLevel [Byte0]: 59
1611 01:02:36.215740 [Byte1]: 59
1612 01:02:36.221279
1613 01:02:36.221854 Set Vref, RX VrefLevel [Byte0]: 60
1614 01:02:36.224038 [Byte1]: 60
1615 01:02:36.227997
1616 01:02:36.228567 Set Vref, RX VrefLevel [Byte0]: 61
1617 01:02:36.231283 [Byte1]: 61
1618 01:02:36.236014
1619 01:02:36.236589 Set Vref, RX VrefLevel [Byte0]: 62
1620 01:02:36.238889 [Byte1]: 62
1621 01:02:36.243476
1622 01:02:36.244033 Set Vref, RX VrefLevel [Byte0]: 63
1623 01:02:36.246698 [Byte1]: 63
1624 01:02:36.250782
1625 01:02:36.251343 Set Vref, RX VrefLevel [Byte0]: 64
1626 01:02:36.253875 [Byte1]: 64
1627 01:02:36.258424
1628 01:02:36.258987 Set Vref, RX VrefLevel [Byte0]: 65
1629 01:02:36.261580 [Byte1]: 65
1630 01:02:36.265968
1631 01:02:36.266424 Set Vref, RX VrefLevel [Byte0]: 66
1632 01:02:36.269745 [Byte1]: 66
1633 01:02:36.273813
1634 01:02:36.274373 Set Vref, RX VrefLevel [Byte0]: 67
1635 01:02:36.277448 [Byte1]: 67
1636 01:02:36.281533
1637 01:02:36.281989 Set Vref, RX VrefLevel [Byte0]: 68
1638 01:02:36.284904 [Byte1]: 68
1639 01:02:36.289452
1640 01:02:36.290006 Set Vref, RX VrefLevel [Byte0]: 69
1641 01:02:36.292179 [Byte1]: 69
1642 01:02:36.296656
1643 01:02:36.297267 Set Vref, RX VrefLevel [Byte0]: 70
1644 01:02:36.300904 [Byte1]: 70
1645 01:02:36.305803
1646 01:02:36.306362 Set Vref, RX VrefLevel [Byte0]: 71
1647 01:02:36.308382 [Byte1]: 71
1648 01:02:36.312188
1649 01:02:36.312776 Set Vref, RX VrefLevel [Byte0]: 72
1650 01:02:36.315264 [Byte1]: 72
1651 01:02:36.319617
1652 01:02:36.320224 Set Vref, RX VrefLevel [Byte0]: 73
1653 01:02:36.323163 [Byte1]: 73
1654 01:02:36.327218
1655 01:02:36.330986 Set Vref, RX VrefLevel [Byte0]: 74
1656 01:02:36.331559 [Byte1]: 74
1657 01:02:36.335454
1658 01:02:36.336017 Final RX Vref Byte 0 = 61 to rank0
1659 01:02:36.338996 Final RX Vref Byte 1 = 52 to rank0
1660 01:02:36.341304 Final RX Vref Byte 0 = 61 to rank1
1661 01:02:36.345476 Final RX Vref Byte 1 = 52 to rank1==
1662 01:02:36.348193 Dram Type= 6, Freq= 0, CH_1, rank 0
1663 01:02:36.355385 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1664 01:02:36.355950 ==
1665 01:02:36.356321 DQS Delay:
1666 01:02:36.356659 DQS0 = 0, DQS1 = 0
1667 01:02:36.358332 DQM Delay:
1668 01:02:36.358784 DQM0 = 79, DQM1 = 72
1669 01:02:36.361701 DQ Delay:
1670 01:02:36.365086 DQ0 =84, DQ1 =76, DQ2 =68, DQ3 =76
1671 01:02:36.368452 DQ4 =76, DQ5 =92, DQ6 =88, DQ7 =76
1672 01:02:36.369040 DQ8 =56, DQ9 =64, DQ10 =72, DQ11 =64
1673 01:02:36.374819 DQ12 =80, DQ13 =80, DQ14 =80, DQ15 =80
1674 01:02:36.375413
1675 01:02:36.375784
1676 01:02:36.381477 [DQSOSCAuto] RK0, (LSB)MR18= 0x4a4a, (MSB)MR19= 0x606, tDQSOscB0 = 391 ps tDQSOscB1 = 391 ps
1677 01:02:36.385874 CH1 RK0: MR19=606, MR18=4A4A
1678 01:02:36.392258 CH1_RK0: MR19=0x606, MR18=0x4A4A, DQSOSC=391, MR23=63, INC=96, DEC=64
1679 01:02:36.392857
1680 01:02:36.395050 ----->DramcWriteLeveling(PI) begin...
1681 01:02:36.395609 ==
1682 01:02:36.398990 Dram Type= 6, Freq= 0, CH_1, rank 1
1683 01:02:36.401335 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1684 01:02:36.401800 ==
1685 01:02:36.404805 Write leveling (Byte 0): 25 => 25
1686 01:02:36.407895 Write leveling (Byte 1): 23 => 23
1687 01:02:36.411841 DramcWriteLeveling(PI) end<-----
1688 01:02:36.412302
1689 01:02:36.412667 ==
1690 01:02:36.414802 Dram Type= 6, Freq= 0, CH_1, rank 1
1691 01:02:36.418303 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1692 01:02:36.418862 ==
1693 01:02:36.421502 [Gating] SW mode calibration
1694 01:02:36.427972 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1695 01:02:36.435537 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1696 01:02:36.438945 0 6 0 | B1->B0 | 2a2a 2323 | 0 0 | (1 0) (0 0)
1697 01:02:36.441627 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1698 01:02:36.448336 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1699 01:02:36.451518 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1700 01:02:36.454560 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1701 01:02:36.461669 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1702 01:02:36.464744 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1703 01:02:36.468441 0 6 28 | B1->B0 | 2323 3232 | 0 1 | (0 0) (0 0)
1704 01:02:36.475045 0 7 0 | B1->B0 | 3a3a 4646 | 0 0 | (0 0) (0 0)
1705 01:02:36.478435 0 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1706 01:02:36.481254 0 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1707 01:02:36.488048 0 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1708 01:02:36.491893 0 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1709 01:02:36.494247 0 7 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1710 01:02:36.501206 0 7 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1711 01:02:36.504591 0 7 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 1)
1712 01:02:36.509544 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
1713 01:02:36.514913 0 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1714 01:02:36.518537 0 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1715 01:02:36.521360 0 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1716 01:02:36.524776 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1717 01:02:36.531282 0 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1718 01:02:36.534661 0 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1719 01:02:36.537996 0 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1720 01:02:36.544791 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1721 01:02:36.548051 0 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1722 01:02:36.551443 0 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1723 01:02:36.558557 0 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1724 01:02:36.561088 0 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1725 01:02:36.564669 0 9 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1726 01:02:36.571778 0 9 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1727 01:02:36.575404 0 9 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1728 01:02:36.578262 0 10 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
1729 01:02:36.581864 Total UI for P1: 0, mck2ui 16
1730 01:02:36.585093 best dqsien dly found for B0: ( 0, 9, 28)
1731 01:02:36.591411 0 10 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1732 01:02:36.592014 Total UI for P1: 0, mck2ui 16
1733 01:02:36.597433 best dqsien dly found for B1: ( 0, 9, 30)
1734 01:02:36.601625 best DQS0 dly(MCK, UI, PI) = (0, 9, 28)
1735 01:02:36.605112 best DQS1 dly(MCK, UI, PI) = (0, 9, 30)
1736 01:02:36.605673
1737 01:02:36.607934 best DQS0 P1 dly(MCK, UI, PI) = (0, 13, 28)
1738 01:02:36.611134 best DQS1 P1 dly(MCK, UI, PI) = (0, 13, 30)
1739 01:02:36.614741 [Gating] SW calibration Done
1740 01:02:36.615306 ==
1741 01:02:36.619740 Dram Type= 6, Freq= 0, CH_1, rank 1
1742 01:02:36.621067 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1743 01:02:36.621536 ==
1744 01:02:36.624029 RX Vref Scan: 0
1745 01:02:36.624503
1746 01:02:36.624930 RX Vref 0 -> 0, step: 1
1747 01:02:36.625281
1748 01:02:36.627986 RX Delay -130 -> 252, step: 16
1749 01:02:36.631125 iDelay=222, Bit 0, Center 85 (-34 ~ 205) 240
1750 01:02:36.638777 iDelay=222, Bit 1, Center 77 (-50 ~ 205) 256
1751 01:02:36.641169 iDelay=222, Bit 2, Center 69 (-50 ~ 189) 240
1752 01:02:36.644378 iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240
1753 01:02:36.648067 iDelay=222, Bit 4, Center 77 (-50 ~ 205) 256
1754 01:02:36.650691 iDelay=222, Bit 5, Center 93 (-34 ~ 221) 256
1755 01:02:36.657892 iDelay=222, Bit 6, Center 85 (-34 ~ 205) 240
1756 01:02:36.661106 iDelay=222, Bit 7, Center 77 (-50 ~ 205) 256
1757 01:02:36.664293 iDelay=222, Bit 8, Center 61 (-66 ~ 189) 256
1758 01:02:36.667073 iDelay=222, Bit 9, Center 61 (-66 ~ 189) 256
1759 01:02:36.670729 iDelay=222, Bit 10, Center 69 (-50 ~ 189) 240
1760 01:02:36.677420 iDelay=222, Bit 11, Center 69 (-50 ~ 189) 240
1761 01:02:36.680683 iDelay=222, Bit 12, Center 77 (-50 ~ 205) 256
1762 01:02:36.684385 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
1763 01:02:36.687601 iDelay=222, Bit 14, Center 77 (-50 ~ 205) 256
1764 01:02:36.694080 iDelay=222, Bit 15, Center 85 (-34 ~ 205) 240
1765 01:02:36.694627 ==
1766 01:02:36.696915 Dram Type= 6, Freq= 0, CH_1, rank 1
1767 01:02:36.701382 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1768 01:02:36.701942 ==
1769 01:02:36.702314 DQS Delay:
1770 01:02:36.704423 DQS0 = 0, DQS1 = 0
1771 01:02:36.704917 DQM Delay:
1772 01:02:36.708683 DQM0 = 81, DQM1 = 73
1773 01:02:36.709214 DQ Delay:
1774 01:02:36.711069 DQ0 =85, DQ1 =77, DQ2 =69, DQ3 =85
1775 01:02:36.714074 DQ4 =77, DQ5 =93, DQ6 =85, DQ7 =77
1776 01:02:36.717360 DQ8 =61, DQ9 =61, DQ10 =69, DQ11 =69
1777 01:02:36.720994 DQ12 =77, DQ13 =85, DQ14 =77, DQ15 =85
1778 01:02:36.721456
1779 01:02:36.721820
1780 01:02:36.722155 ==
1781 01:02:36.725023 Dram Type= 6, Freq= 0, CH_1, rank 1
1782 01:02:36.727677 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1783 01:02:36.728240 ==
1784 01:02:36.728608
1785 01:02:36.730427
1786 01:02:36.730973 TX Vref Scan disable
1787 01:02:36.734305 == TX Byte 0 ==
1788 01:02:36.736690 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
1789 01:02:36.740477 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
1790 01:02:36.744741 == TX Byte 1 ==
1791 01:02:36.747027 Update DQ dly =573 (2 ,1, 29) DQ OEN =(1 ,6)
1792 01:02:36.750557 Update DQM dly =573 (2 ,1, 29) DQM OEN =(1 ,6)
1793 01:02:36.751023 ==
1794 01:02:36.753646 Dram Type= 6, Freq= 0, CH_1, rank 1
1795 01:02:36.760631 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1796 01:02:36.761211 ==
1797 01:02:36.772382 TX Vref=22, minBit 0, minWin=28, winSum=451
1798 01:02:36.775331 TX Vref=24, minBit 0, minWin=28, winSum=453
1799 01:02:36.779222 TX Vref=26, minBit 0, minWin=28, winSum=457
1800 01:02:36.782542 TX Vref=28, minBit 0, minWin=28, winSum=461
1801 01:02:36.785230 TX Vref=30, minBit 0, minWin=28, winSum=460
1802 01:02:36.791771 TX Vref=32, minBit 0, minWin=28, winSum=458
1803 01:02:36.795346 [TxChooseVref] Worse bit 0, Min win 28, Win sum 461, Final Vref 28
1804 01:02:36.795906
1805 01:02:36.798940 Final TX Range 1 Vref 28
1806 01:02:36.799492
1807 01:02:36.799859 ==
1808 01:02:36.803010 Dram Type= 6, Freq= 0, CH_1, rank 1
1809 01:02:36.805574 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1810 01:02:36.806038 ==
1811 01:02:36.808744
1812 01:02:36.809210
1813 01:02:36.809574 TX Vref Scan disable
1814 01:02:36.811866 == TX Byte 0 ==
1815 01:02:36.815853 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
1816 01:02:36.822234 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
1817 01:02:36.822794 == TX Byte 1 ==
1818 01:02:36.825221 Update DQ dly =573 (2 ,1, 29) DQ OEN =(1 ,6)
1819 01:02:36.833189 Update DQM dly =573 (2 ,1, 29) DQM OEN =(1 ,6)
1820 01:02:36.833744
1821 01:02:36.834110 [DATLAT]
1822 01:02:36.834449 Freq=800, CH1 RK1
1823 01:02:36.834779
1824 01:02:36.836033 DATLAT Default: 0x9
1825 01:02:36.836491 0, 0xFFFF, sum = 0
1826 01:02:36.839237 1, 0xFFFF, sum = 0
1827 01:02:36.839800 2, 0xFFFF, sum = 0
1828 01:02:36.842068 3, 0xFFFF, sum = 0
1829 01:02:36.845025 4, 0xFFFF, sum = 0
1830 01:02:36.845493 5, 0xFFFF, sum = 0
1831 01:02:36.849645 6, 0xFFFF, sum = 0
1832 01:02:36.850206 7, 0xFFFF, sum = 0
1833 01:02:36.850583 8, 0x0, sum = 1
1834 01:02:36.852559 9, 0x0, sum = 2
1835 01:02:36.853105 10, 0x0, sum = 3
1836 01:02:36.855930 11, 0x0, sum = 4
1837 01:02:36.856488 best_step = 9
1838 01:02:36.856914
1839 01:02:36.857262 ==
1840 01:02:36.858631 Dram Type= 6, Freq= 0, CH_1, rank 1
1841 01:02:36.865518 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1842 01:02:36.866089 ==
1843 01:02:36.866463 RX Vref Scan: 0
1844 01:02:36.866803
1845 01:02:36.869066 RX Vref 0 -> 0, step: 1
1846 01:02:36.869526
1847 01:02:36.872890 RX Delay -111 -> 252, step: 8
1848 01:02:36.875443 iDelay=209, Bit 0, Center 84 (-31 ~ 200) 232
1849 01:02:36.879060 iDelay=209, Bit 1, Center 80 (-39 ~ 200) 240
1850 01:02:36.885682 iDelay=209, Bit 2, Center 72 (-47 ~ 192) 240
1851 01:02:36.889107 iDelay=209, Bit 3, Center 80 (-39 ~ 200) 240
1852 01:02:36.891900 iDelay=209, Bit 4, Center 80 (-39 ~ 200) 240
1853 01:02:36.895351 iDelay=209, Bit 5, Center 92 (-23 ~ 208) 232
1854 01:02:36.898843 iDelay=209, Bit 6, Center 92 (-23 ~ 208) 232
1855 01:02:36.904829 iDelay=209, Bit 7, Center 80 (-39 ~ 200) 240
1856 01:02:36.909199 iDelay=209, Bit 8, Center 56 (-63 ~ 176) 240
1857 01:02:36.912128 iDelay=209, Bit 9, Center 64 (-55 ~ 184) 240
1858 01:02:36.915167 iDelay=209, Bit 10, Center 72 (-47 ~ 192) 240
1859 01:02:36.918929 iDelay=209, Bit 11, Center 64 (-55 ~ 184) 240
1860 01:02:36.925358 iDelay=209, Bit 12, Center 80 (-39 ~ 200) 240
1861 01:02:36.928398 iDelay=209, Bit 13, Center 84 (-31 ~ 200) 232
1862 01:02:36.932541 iDelay=209, Bit 14, Center 80 (-39 ~ 200) 240
1863 01:02:36.935633 iDelay=209, Bit 15, Center 80 (-39 ~ 200) 240
1864 01:02:36.936195 ==
1865 01:02:36.938424 Dram Type= 6, Freq= 0, CH_1, rank 1
1866 01:02:36.945329 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
1867 01:02:36.945887 ==
1868 01:02:36.946254 DQS Delay:
1869 01:02:36.946595 DQS0 = 0, DQS1 = 0
1870 01:02:36.948402 DQM Delay:
1871 01:02:36.948898 DQM0 = 82, DQM1 = 72
1872 01:02:36.952635 DQ Delay:
1873 01:02:36.955874 DQ0 =84, DQ1 =80, DQ2 =72, DQ3 =80
1874 01:02:36.956438 DQ4 =80, DQ5 =92, DQ6 =92, DQ7 =80
1875 01:02:36.958521 DQ8 =56, DQ9 =64, DQ10 =72, DQ11 =64
1876 01:02:36.961529 DQ12 =80, DQ13 =84, DQ14 =80, DQ15 =80
1877 01:02:36.965296
1878 01:02:36.965878
1879 01:02:36.972055 [DQSOSCAuto] RK1, (LSB)MR18= 0x4141, (MSB)MR19= 0x606, tDQSOscB0 = 393 ps tDQSOscB1 = 393 ps
1880 01:02:36.975698 CH1 RK1: MR19=606, MR18=4141
1881 01:02:36.982860 CH1_RK1: MR19=0x606, MR18=0x4141, DQSOSC=393, MR23=63, INC=95, DEC=63
1882 01:02:36.985230 [RxdqsGatingPostProcess] freq 800
1883 01:02:36.988762 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
1884 01:02:36.992137 Pre-setting of DQS Precalculation
1885 01:02:36.995452 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
1886 01:02:37.005472 sync_frequency_calibration_params sync calibration params of frequency 800 to shu:4
1887 01:02:37.011911 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
1888 01:02:37.012467
1889 01:02:37.012898
1890 01:02:37.015402 [Calibration Summary] 1600 Mbps
1891 01:02:37.015977 CH 0, Rank 0
1892 01:02:37.018269 SW Impedance : PASS
1893 01:02:37.018827 DUTY Scan : NO K
1894 01:02:37.022352 ZQ Calibration : PASS
1895 01:02:37.025720 Jitter Meter : NO K
1896 01:02:37.026178 CBT Training : PASS
1897 01:02:37.028099 Write leveling : PASS
1898 01:02:37.031689 RX DQS gating : PASS
1899 01:02:37.032247 RX DQ/DQS(RDDQC) : PASS
1900 01:02:37.035772 TX DQ/DQS : PASS
1901 01:02:37.038696 RX DATLAT : PASS
1902 01:02:37.039253 RX DQ/DQS(Engine): PASS
1903 01:02:37.041847 TX OE : NO K
1904 01:02:37.042409 All Pass.
1905 01:02:37.042780
1906 01:02:37.045410 CH 0, Rank 1
1907 01:02:37.045972 SW Impedance : PASS
1908 01:02:37.049007 DUTY Scan : NO K
1909 01:02:37.051454 ZQ Calibration : PASS
1910 01:02:37.051914 Jitter Meter : NO K
1911 01:02:37.054885 CBT Training : PASS
1912 01:02:37.058490 Write leveling : PASS
1913 01:02:37.059056 RX DQS gating : PASS
1914 01:02:37.061625 RX DQ/DQS(RDDQC) : PASS
1915 01:02:37.062087 TX DQ/DQS : PASS
1916 01:02:37.064875 RX DATLAT : PASS
1917 01:02:37.068663 RX DQ/DQS(Engine): PASS
1918 01:02:37.069261 TX OE : NO K
1919 01:02:37.072495 All Pass.
1920 01:02:37.073097
1921 01:02:37.073466 CH 1, Rank 0
1922 01:02:37.074814 SW Impedance : PASS
1923 01:02:37.075278 DUTY Scan : NO K
1924 01:02:37.078413 ZQ Calibration : PASS
1925 01:02:37.082080 Jitter Meter : NO K
1926 01:02:37.082939 CBT Training : PASS
1927 01:02:37.085116 Write leveling : PASS
1928 01:02:37.088645 RX DQS gating : PASS
1929 01:02:37.089251 RX DQ/DQS(RDDQC) : PASS
1930 01:02:37.091740 TX DQ/DQS : PASS
1931 01:02:37.095329 RX DATLAT : PASS
1932 01:02:37.095882 RX DQ/DQS(Engine): PASS
1933 01:02:37.098825 TX OE : NO K
1934 01:02:37.099384 All Pass.
1935 01:02:37.099754
1936 01:02:37.102753 CH 1, Rank 1
1937 01:02:37.103306 SW Impedance : PASS
1938 01:02:37.104971 DUTY Scan : NO K
1939 01:02:37.107764 ZQ Calibration : PASS
1940 01:02:37.108271 Jitter Meter : NO K
1941 01:02:37.111660 CBT Training : PASS
1942 01:02:37.112212 Write leveling : PASS
1943 01:02:37.114316 RX DQS gating : PASS
1944 01:02:37.118728 RX DQ/DQS(RDDQC) : PASS
1945 01:02:37.119185 TX DQ/DQS : PASS
1946 01:02:37.121226 RX DATLAT : PASS
1947 01:02:37.124601 RX DQ/DQS(Engine): PASS
1948 01:02:37.125263 TX OE : NO K
1949 01:02:37.128004 All Pass.
1950 01:02:37.128578
1951 01:02:37.128994 DramC Write-DBI off
1952 01:02:37.130983 PER_BANK_REFRESH: Hybrid Mode
1953 01:02:37.134326 TX_TRACKING: ON
1954 01:02:37.138381 [GetDramInforAfterCalByMRR] Vendor 6.
1955 01:02:37.141572 [GetDramInforAfterCalByMRR] Revision 606.
1956 01:02:37.144618 [GetDramInforAfterCalByMRR] Revision 2 0.
1957 01:02:37.145213 MR0 0x3939
1958 01:02:37.145580 MR8 0x1111
1959 01:02:37.151217 RK0, DieNum 1, Density 16Gb, RKsize 16Gb.
1960 01:02:37.151787
1961 01:02:37.152197 MR0 0x3939
1962 01:02:37.152542 MR8 0x1111
1963 01:02:37.154313 RK1, DieNum 1, Density 16Gb, RKsize 16Gb.
1964 01:02:37.154867
1965 01:02:37.164331 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
1966 01:02:37.167774 [FAST_K] Save calibration result to emmc
1967 01:02:37.170956 [FAST_K] Save calibration result to emmc
1968 01:02:37.174825 dram_init: config_dvfs: 1
1969 01:02:37.177681 dramc_set_vcore_voltage set vcore to 662500
1970 01:02:37.181561 Read voltage for 1200, 2
1971 01:02:37.182129 Vio18 = 0
1972 01:02:37.182502 Vcore = 662500
1973 01:02:37.185426 Vdram = 0
1974 01:02:37.185918 Vddq = 0
1975 01:02:37.186387 Vmddr = 0
1976 01:02:37.191285 [FAST_K] DramcSave_Time_For_Cal_Init SHU5, femmc_Ready=0
1977 01:02:37.194725 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
1978 01:02:37.197360 MEM_TYPE=3, freq_sel=15
1979 01:02:37.201217 sv_algorithm_assistance_LP4_1600
1980 01:02:37.204906 ============ PULL DRAM RESETB DOWN ============
1981 01:02:37.211625 ========== PULL DRAM RESETB DOWN end =========
1982 01:02:37.213934 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
1983 01:02:37.218609 ===================================
1984 01:02:37.221639 LPDDR4 DRAM CONFIGURATION
1985 01:02:37.225028 ===================================
1986 01:02:37.225515 EX_ROW_EN[0] = 0x0
1987 01:02:37.227939 EX_ROW_EN[1] = 0x0
1988 01:02:37.228509 LP4Y_EN = 0x0
1989 01:02:37.231726 WORK_FSP = 0x0
1990 01:02:37.232291 WL = 0x4
1991 01:02:37.234152 RL = 0x4
1992 01:02:37.234649 BL = 0x2
1993 01:02:37.237668 RPST = 0x0
1994 01:02:37.238239 RD_PRE = 0x0
1995 01:02:37.241473 WR_PRE = 0x1
1996 01:02:37.242032 WR_PST = 0x0
1997 01:02:37.244514 DBI_WR = 0x0
1998 01:02:37.245143 DBI_RD = 0x0
1999 01:02:37.247208 OTF = 0x1
2000 01:02:37.250515 ===================================
2001 01:02:37.254134 ===================================
2002 01:02:37.254704 ANA top config
2003 01:02:37.257548 ===================================
2004 01:02:37.260961 DLL_ASYNC_EN = 0
2005 01:02:37.264479 ALL_SLAVE_EN = 0
2006 01:02:37.267712 NEW_RANK_MODE = 1
2007 01:02:37.268277 DLL_IDLE_MODE = 1
2008 01:02:37.270964 LP45_APHY_COMB_EN = 1
2009 01:02:37.274503 TX_ODT_DIS = 1
2010 01:02:37.277987 NEW_8X_MODE = 1
2011 01:02:37.282056 ===================================
2012 01:02:37.283902 ===================================
2013 01:02:37.287759 data_rate = 2400
2014 01:02:37.288319 CKR = 1
2015 01:02:37.291122 DQ_P2S_RATIO = 8
2016 01:02:37.294332 ===================================
2017 01:02:37.298820 CA_P2S_RATIO = 8
2018 01:02:37.301253 DQ_CA_OPEN = 0
2019 01:02:37.304401 DQ_SEMI_OPEN = 0
2020 01:02:37.307601 CA_SEMI_OPEN = 0
2021 01:02:37.308152 CA_FULL_RATE = 0
2022 01:02:37.311434 DQ_CKDIV4_EN = 0
2023 01:02:37.314630 CA_CKDIV4_EN = 0
2024 01:02:37.317350 CA_PREDIV_EN = 0
2025 01:02:37.321256 PH8_DLY = 17
2026 01:02:37.324350 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
2027 01:02:37.325083 DQ_AAMCK_DIV = 4
2028 01:02:37.328240 CA_AAMCK_DIV = 4
2029 01:02:37.331119 CA_ADMCK_DIV = 4
2030 01:02:37.334403 DQ_TRACK_CA_EN = 0
2031 01:02:37.337432 CA_PICK = 1200
2032 01:02:37.340777 CA_MCKIO = 1200
2033 01:02:37.344020 MCKIO_SEMI = 0
2034 01:02:37.344576 PLL_FREQ = 2366
2035 01:02:37.347315 DQ_UI_PI_RATIO = 32
2036 01:02:37.350820 CA_UI_PI_RATIO = 0
2037 01:02:37.354153 ===================================
2038 01:02:37.356936 ===================================
2039 01:02:37.360766 memory_type:LPDDR4
2040 01:02:37.363635 GP_NUM : 10
2041 01:02:37.364098 SRAM_EN : 1
2042 01:02:37.367647 MD32_EN : 0
2043 01:02:37.370455 ===================================
2044 01:02:37.371007 [ANA_INIT] >>>>>>>>>>>>>>
2045 01:02:37.373688 <<<<<< [CONFIGURE PHASE]: ANA_TX
2046 01:02:37.377466 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
2047 01:02:37.380788 ===================================
2048 01:02:37.384369 data_rate = 2400,PCW = 0X5b00
2049 01:02:37.387642 ===================================
2050 01:02:37.390368 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
2051 01:02:37.397367 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2052 01:02:37.400611 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2053 01:02:37.407456 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
2054 01:02:37.411337 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
2055 01:02:37.414439 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
2056 01:02:37.414995 [ANA_INIT] flow start
2057 01:02:37.417695 [ANA_INIT] PLL >>>>>>>>
2058 01:02:37.420535 [ANA_INIT] PLL <<<<<<<<
2059 01:02:37.423750 [ANA_INIT] MIDPI >>>>>>>>
2060 01:02:37.424318 [ANA_INIT] MIDPI <<<<<<<<
2061 01:02:37.427003 [ANA_INIT] DLL >>>>>>>>
2062 01:02:37.430278 [ANA_INIT] DLL <<<<<<<<
2063 01:02:37.430743 [ANA_INIT] flow end
2064 01:02:37.433640 ============ LP4 DIFF to SE enter ============
2065 01:02:37.441103 ============ LP4 DIFF to SE exit ============
2066 01:02:37.441708 [ANA_INIT] <<<<<<<<<<<<<
2067 01:02:37.443607 [Flow] Enable top DCM control >>>>>
2068 01:02:37.447378 [Flow] Enable top DCM control <<<<<
2069 01:02:37.450525 Enable DLL master slave shuffle
2070 01:02:37.457407 ==============================================================
2071 01:02:37.458036 Gating Mode config
2072 01:02:37.463987 ==============================================================
2073 01:02:37.467202 Config description:
2074 01:02:37.477250 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
2075 01:02:37.483818 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
2076 01:02:37.486994 SELPH_MODE 0: By rank 1: By Phase
2077 01:02:37.493902 ==============================================================
2078 01:02:37.497199 GAT_TRACK_EN = 1
2079 01:02:37.497660 RX_GATING_MODE = 2
2080 01:02:37.500368 RX_GATING_TRACK_MODE = 2
2081 01:02:37.503992 SELPH_MODE = 1
2082 01:02:37.507664 PICG_EARLY_EN = 1
2083 01:02:37.510375 VALID_LAT_VALUE = 1
2084 01:02:37.516907 ==============================================================
2085 01:02:37.520590 Enter into Gating configuration >>>>
2086 01:02:37.524783 Exit from Gating configuration <<<<
2087 01:02:37.527658 Enter into DVFS_PRE_config >>>>>
2088 01:02:37.537414 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
2089 01:02:37.540750 Exit from DVFS_PRE_config <<<<<
2090 01:02:37.543812 Enter into PICG configuration >>>>
2091 01:02:37.547375 Exit from PICG configuration <<<<
2092 01:02:37.550682 [RX_INPUT] configuration >>>>>
2093 01:02:37.553655 [RX_INPUT] configuration <<<<<
2094 01:02:37.557408 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
2095 01:02:37.563976 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
2096 01:02:37.570769 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
2097 01:02:37.573547 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
2098 01:02:37.580205 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
2099 01:02:37.586753 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
2100 01:02:37.590774 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
2101 01:02:37.593772 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
2102 01:02:37.600500 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
2103 01:02:37.604003 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
2104 01:02:37.607068 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
2105 01:02:37.613594 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2106 01:02:37.617279 ===================================
2107 01:02:37.617779 LPDDR4 DRAM CONFIGURATION
2108 01:02:37.619864 ===================================
2109 01:02:37.623978 EX_ROW_EN[0] = 0x0
2110 01:02:37.626796 EX_ROW_EN[1] = 0x0
2111 01:02:37.627340 LP4Y_EN = 0x0
2112 01:02:37.630660 WORK_FSP = 0x0
2113 01:02:37.631472 WL = 0x4
2114 01:02:37.633682 RL = 0x4
2115 01:02:37.634142 BL = 0x2
2116 01:02:37.636781 RPST = 0x0
2117 01:02:37.637243 RD_PRE = 0x0
2118 01:02:37.640551 WR_PRE = 0x1
2119 01:02:37.641173 WR_PST = 0x0
2120 01:02:37.643923 DBI_WR = 0x0
2121 01:02:37.644529 DBI_RD = 0x0
2122 01:02:37.646680 OTF = 0x1
2123 01:02:37.650523 ===================================
2124 01:02:37.653542 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
2125 01:02:37.657701 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
2126 01:02:37.663118 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2127 01:02:37.666860 ===================================
2128 01:02:37.667582 LPDDR4 DRAM CONFIGURATION
2129 01:02:37.670638 ===================================
2130 01:02:37.673305 EX_ROW_EN[0] = 0x10
2131 01:02:37.673767 EX_ROW_EN[1] = 0x0
2132 01:02:37.676984 LP4Y_EN = 0x0
2133 01:02:37.677661 WORK_FSP = 0x0
2134 01:02:37.680093 WL = 0x4
2135 01:02:37.680552 RL = 0x4
2136 01:02:37.684152 BL = 0x2
2137 01:02:37.686687 RPST = 0x0
2138 01:02:37.687257 RD_PRE = 0x0
2139 01:02:37.690146 WR_PRE = 0x1
2140 01:02:37.690605 WR_PST = 0x0
2141 01:02:37.693265 DBI_WR = 0x0
2142 01:02:37.693740 DBI_RD = 0x0
2143 01:02:37.696538 OTF = 0x1
2144 01:02:37.700059 ===================================
2145 01:02:37.703117 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
2146 01:02:37.707383 ==
2147 01:02:37.709767 Dram Type= 6, Freq= 0, CH_0, rank 0
2148 01:02:37.713682 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2149 01:02:37.714204 ==
2150 01:02:37.716968 [Duty_Offset_Calibration]
2151 01:02:37.717534 B0:0 B1:2 CA:1
2152 01:02:37.717938
2153 01:02:37.720318 [DutyScan_Calibration_Flow] k_type=0
2154 01:02:37.729361
2155 01:02:37.729916 ==CLK 0==
2156 01:02:37.733586 Final CLK duty delay cell = 0
2157 01:02:37.736658 [0] MAX Duty = 5093%(X100), DQS PI = 12
2158 01:02:37.739750 [0] MIN Duty = 4938%(X100), DQS PI = 54
2159 01:02:37.740323 [0] AVG Duty = 5015%(X100)
2160 01:02:37.742720
2161 01:02:37.746088 CH0 CLK Duty spec in!! Max-Min= 155%
2162 01:02:37.749741 [DutyScan_Calibration_Flow] ====Done====
2163 01:02:37.750287
2164 01:02:37.752862 [DutyScan_Calibration_Flow] k_type=1
2165 01:02:37.768662
2166 01:02:37.769263 ==DQS 0 ==
2167 01:02:37.772988 Final DQS duty delay cell = 0
2168 01:02:37.775275 [0] MAX Duty = 5125%(X100), DQS PI = 30
2169 01:02:37.779078 [0] MIN Duty = 5031%(X100), DQS PI = 4
2170 01:02:37.779637 [0] AVG Duty = 5078%(X100)
2171 01:02:37.782179
2172 01:02:37.782727 ==DQS 1 ==
2173 01:02:37.785112 Final DQS duty delay cell = 0
2174 01:02:37.788508 [0] MAX Duty = 5062%(X100), DQS PI = 56
2175 01:02:37.792500 [0] MIN Duty = 4906%(X100), DQS PI = 16
2176 01:02:37.793118 [0] AVG Duty = 4984%(X100)
2177 01:02:37.796017
2178 01:02:37.799418 CH0 DQS 0 Duty spec in!! Max-Min= 94%
2179 01:02:37.799968
2180 01:02:37.802042 CH0 DQS 1 Duty spec in!! Max-Min= 156%
2181 01:02:37.805467 [DutyScan_Calibration_Flow] ====Done====
2182 01:02:37.805983
2183 01:02:37.808436 [DutyScan_Calibration_Flow] k_type=3
2184 01:02:37.824975
2185 01:02:37.825525 ==DQM 0 ==
2186 01:02:37.829241 Final DQM duty delay cell = 0
2187 01:02:37.832798 [0] MAX Duty = 5124%(X100), DQS PI = 20
2188 01:02:37.835250 [0] MIN Duty = 4969%(X100), DQS PI = 40
2189 01:02:37.838509 [0] AVG Duty = 5046%(X100)
2190 01:02:37.839073
2191 01:02:37.839558 ==DQM 1 ==
2192 01:02:37.841367 Final DQM duty delay cell = 0
2193 01:02:37.845503 [0] MAX Duty = 5000%(X100), DQS PI = 56
2194 01:02:37.848448 [0] MIN Duty = 4844%(X100), DQS PI = 0
2195 01:02:37.851856 [0] AVG Duty = 4922%(X100)
2196 01:02:37.852485
2197 01:02:37.855172 CH0 DQM 0 Duty spec in!! Max-Min= 155%
2198 01:02:37.855738
2199 01:02:37.858669 CH0 DQM 1 Duty spec in!! Max-Min= 156%
2200 01:02:37.862158 [DutyScan_Calibration_Flow] ====Done====
2201 01:02:37.862826
2202 01:02:37.864811 [DutyScan_Calibration_Flow] k_type=2
2203 01:02:37.880790
2204 01:02:37.881349 ==DQ 0 ==
2205 01:02:37.883024 Final DQ duty delay cell = -4
2206 01:02:37.886329 [-4] MAX Duty = 5062%(X100), DQS PI = 16
2207 01:02:37.889365 [-4] MIN Duty = 4813%(X100), DQS PI = 8
2208 01:02:37.893339 [-4] AVG Duty = 4937%(X100)
2209 01:02:37.893808
2210 01:02:37.894280 ==DQ 1 ==
2211 01:02:37.896968 Final DQ duty delay cell = -4
2212 01:02:37.900415 [-4] MAX Duty = 5062%(X100), DQS PI = 6
2213 01:02:37.903001 [-4] MIN Duty = 4907%(X100), DQS PI = 0
2214 01:02:37.906474 [-4] AVG Duty = 4984%(X100)
2215 01:02:37.907025
2216 01:02:37.910366 CH0 DQ 0 Duty spec in!! Max-Min= 249%
2217 01:02:37.910830
2218 01:02:37.913204 CH0 DQ 1 Duty spec in!! Max-Min= 155%
2219 01:02:37.916605 [DutyScan_Calibration_Flow] ====Done====
2220 01:02:37.917220 ==
2221 01:02:37.919839 Dram Type= 6, Freq= 0, CH_1, rank 0
2222 01:02:37.923399 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2223 01:02:37.923867 ==
2224 01:02:37.926468 [Duty_Offset_Calibration]
2225 01:02:37.926981 B0:0 B1:4 CA:-5
2226 01:02:37.927491
2227 01:02:37.929372 [DutyScan_Calibration_Flow] k_type=0
2228 01:02:37.940687
2229 01:02:37.941315 ==CLK 0==
2230 01:02:37.943709 Final CLK duty delay cell = 0
2231 01:02:37.947277 [0] MAX Duty = 5093%(X100), DQS PI = 42
2232 01:02:37.950345 [0] MIN Duty = 4907%(X100), DQS PI = 10
2233 01:02:37.950918 [0] AVG Duty = 5000%(X100)
2234 01:02:37.953905
2235 01:02:37.957251 CH1 CLK Duty spec in!! Max-Min= 186%
2236 01:02:37.960447 [DutyScan_Calibration_Flow] ====Done====
2237 01:02:37.961135
2238 01:02:37.964008 [DutyScan_Calibration_Flow] k_type=1
2239 01:02:37.979267
2240 01:02:37.979908 ==DQS 0 ==
2241 01:02:37.982827 Final DQS duty delay cell = 0
2242 01:02:37.985287 [0] MAX Duty = 5156%(X100), DQS PI = 50
2243 01:02:37.989018 [0] MIN Duty = 4875%(X100), DQS PI = 8
2244 01:02:37.992511 [0] AVG Duty = 5015%(X100)
2245 01:02:37.993112
2246 01:02:37.993483 ==DQS 1 ==
2247 01:02:37.995655 Final DQS duty delay cell = -4
2248 01:02:37.998458 [-4] MAX Duty = 5031%(X100), DQS PI = 36
2249 01:02:38.002951 [-4] MIN Duty = 4907%(X100), DQS PI = 8
2250 01:02:38.005123 [-4] AVG Duty = 4969%(X100)
2251 01:02:38.005585
2252 01:02:38.008667 CH1 DQS 0 Duty spec in!! Max-Min= 281%
2253 01:02:38.009170
2254 01:02:38.012108 CH1 DQS 1 Duty spec in!! Max-Min= 124%
2255 01:02:38.015072 [DutyScan_Calibration_Flow] ====Done====
2256 01:02:38.015628
2257 01:02:38.018539 [DutyScan_Calibration_Flow] k_type=3
2258 01:02:38.033951
2259 01:02:38.034504 ==DQM 0 ==
2260 01:02:38.037549 Final DQM duty delay cell = -4
2261 01:02:38.040499 [-4] MAX Duty = 5093%(X100), DQS PI = 0
2262 01:02:38.043853 [-4] MIN Duty = 4875%(X100), DQS PI = 6
2263 01:02:38.047483 [-4] AVG Duty = 4984%(X100)
2264 01:02:38.047940
2265 01:02:38.048304 ==DQM 1 ==
2266 01:02:38.050832 Final DQM duty delay cell = -4
2267 01:02:38.053886 [-4] MAX Duty = 5062%(X100), DQS PI = 36
2268 01:02:38.057564 [-4] MIN Duty = 4875%(X100), DQS PI = 28
2269 01:02:38.060740 [-4] AVG Duty = 4968%(X100)
2270 01:02:38.061297
2271 01:02:38.065131 CH1 DQM 0 Duty spec in!! Max-Min= 218%
2272 01:02:38.065685
2273 01:02:38.067762 CH1 DQM 1 Duty spec in!! Max-Min= 187%
2274 01:02:38.071812 [DutyScan_Calibration_Flow] ====Done====
2275 01:02:38.072372
2276 01:02:38.073900 [DutyScan_Calibration_Flow] k_type=2
2277 01:02:38.090782
2278 01:02:38.091327 ==DQ 0 ==
2279 01:02:38.094916 Final DQ duty delay cell = 0
2280 01:02:38.097421 [0] MAX Duty = 5093%(X100), DQS PI = 16
2281 01:02:38.100839 [0] MIN Duty = 4969%(X100), DQS PI = 12
2282 01:02:38.101299 [0] AVG Duty = 5031%(X100)
2283 01:02:38.104226
2284 01:02:38.104680 ==DQ 1 ==
2285 01:02:38.109246 Final DQ duty delay cell = 0
2286 01:02:38.110873 [0] MAX Duty = 5000%(X100), DQS PI = 38
2287 01:02:38.114433 [0] MIN Duty = 4875%(X100), DQS PI = 0
2288 01:02:38.114895 [0] AVG Duty = 4937%(X100)
2289 01:02:38.115262
2290 01:02:38.117578 CH1 DQ 0 Duty spec in!! Max-Min= 124%
2291 01:02:38.121352
2292 01:02:38.124647 CH1 DQ 1 Duty spec in!! Max-Min= 125%
2293 01:02:38.127729 [DutyScan_Calibration_Flow] ====Done====
2294 01:02:38.130967 nWR fixed to 30
2295 01:02:38.131428 [ModeRegInit_LP4] CH0 RK0
2296 01:02:38.134518 [ModeRegInit_LP4] CH0 RK1
2297 01:02:38.137715 [ModeRegInit_LP4] CH1 RK0
2298 01:02:38.138169 [ModeRegInit_LP4] CH1 RK1
2299 01:02:38.140649 match AC timing 6
2300 01:02:38.144449 dramType 5, freq 1200, readDBI 0, DivMode 1, cbtMode 0
2301 01:02:38.147528 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
2302 01:02:38.154236 [WriteLatency GET] Version:0-MR_RL_field_value:4-WL:12
2303 01:02:38.157677 [TX_path_calculate] data rate=2400, WL=12, DQS_TotalUI=25
2304 01:02:38.164314 [TX_path_calculate] DQS = (3,1) DQS_OE = (2,6)
2305 01:02:38.164906 ==
2306 01:02:38.168006 Dram Type= 6, Freq= 0, CH_0, rank 0
2307 01:02:38.171298 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2308 01:02:38.171867 ==
2309 01:02:38.177510 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2310 01:02:38.181656 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
2311 01:02:38.190871 [CA 0] Center 39 (9~70) winsize 62
2312 01:02:38.194071 [CA 1] Center 39 (8~70) winsize 63
2313 01:02:38.197710 [CA 2] Center 36 (5~67) winsize 63
2314 01:02:38.202471 [CA 3] Center 35 (4~66) winsize 63
2315 01:02:38.203915 [CA 4] Center 34 (3~65) winsize 63
2316 01:02:38.207931 [CA 5] Center 33 (3~64) winsize 62
2317 01:02:38.208387
2318 01:02:38.210881 [CmdBusTrainingLP45] Vref(ca) range 1: 39
2319 01:02:38.211338
2320 01:02:38.214301 [CATrainingPosCal] consider 1 rank data
2321 01:02:38.217784 u2DelayCellTimex100 = 270/100 ps
2322 01:02:38.220829 CA0 delay=39 (9~70),Diff = 6 PI (28 cell)
2323 01:02:38.224535 CA1 delay=39 (8~70),Diff = 6 PI (28 cell)
2324 01:02:38.230852 CA2 delay=36 (5~67),Diff = 3 PI (14 cell)
2325 01:02:38.234069 CA3 delay=35 (4~66),Diff = 2 PI (9 cell)
2326 01:02:38.237593 CA4 delay=34 (3~65),Diff = 1 PI (4 cell)
2327 01:02:38.240769 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
2328 01:02:38.241319
2329 01:02:38.245266 CA PerBit enable=1, Macro0, CA PI delay=33
2330 01:02:38.245815
2331 01:02:38.247008 [CBTSetCACLKResult] CA Dly = 33
2332 01:02:38.247472 CS Dly: 7 (0~38)
2333 01:02:38.250646 ==
2334 01:02:38.251195 Dram Type= 6, Freq= 0, CH_0, rank 1
2335 01:02:38.257691 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2336 01:02:38.258237 ==
2337 01:02:38.261517 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2338 01:02:38.267168 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
2339 01:02:38.276299 [CA 0] Center 39 (8~70) winsize 63
2340 01:02:38.280195 [CA 1] Center 39 (8~70) winsize 63
2341 01:02:38.283372 [CA 2] Center 36 (5~67) winsize 63
2342 01:02:38.286285 [CA 3] Center 35 (4~66) winsize 63
2343 01:02:38.290101 [CA 4] Center 34 (3~65) winsize 63
2344 01:02:38.293271 [CA 5] Center 34 (3~65) winsize 63
2345 01:02:38.293726
2346 01:02:38.296026 [CmdBusTrainingLP45] Vref(ca) range 1: 39
2347 01:02:38.296481
2348 01:02:38.299657 [CATrainingPosCal] consider 2 rank data
2349 01:02:38.302950 u2DelayCellTimex100 = 270/100 ps
2350 01:02:38.306162 CA0 delay=39 (9~70),Diff = 6 PI (28 cell)
2351 01:02:38.309534 CA1 delay=39 (8~70),Diff = 6 PI (28 cell)
2352 01:02:38.317350 CA2 delay=36 (5~67),Diff = 3 PI (14 cell)
2353 01:02:38.319572 CA3 delay=35 (4~66),Diff = 2 PI (9 cell)
2354 01:02:38.322902 CA4 delay=34 (3~65),Diff = 1 PI (4 cell)
2355 01:02:38.326020 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
2356 01:02:38.326480
2357 01:02:38.330503 CA PerBit enable=1, Macro0, CA PI delay=33
2358 01:02:38.331055
2359 01:02:38.332463 [CBTSetCACLKResult] CA Dly = 33
2360 01:02:38.332988 CS Dly: 7 (0~39)
2361 01:02:38.337013
2362 01:02:38.339545 ----->DramcWriteLeveling(PI) begin...
2363 01:02:38.340103 ==
2364 01:02:38.343312 Dram Type= 6, Freq= 0, CH_0, rank 0
2365 01:02:38.346210 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2366 01:02:38.346765 ==
2367 01:02:38.349666 Write leveling (Byte 0): 27 => 27
2368 01:02:38.353298 Write leveling (Byte 1): 27 => 27
2369 01:02:38.356429 DramcWriteLeveling(PI) end<-----
2370 01:02:38.357107
2371 01:02:38.357509 ==
2372 01:02:38.358920 Dram Type= 6, Freq= 0, CH_0, rank 0
2373 01:02:38.363543 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2374 01:02:38.364136 ==
2375 01:02:38.366432 [Gating] SW mode calibration
2376 01:02:38.373606 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 24 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2377 01:02:38.379358 RX_Path_delay_UI(43) -3 - DQSINCTL_UI(32) = u1StartUI(11)
2378 01:02:38.382479 0 11 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2379 01:02:38.385720 0 11 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2380 01:02:38.393809 0 11 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2381 01:02:38.396231 0 11 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2382 01:02:38.398901 0 11 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2383 01:02:38.405944 0 11 20 | B1->B0 | 2e2e 2929 | 0 1 | (0 1) (1 0)
2384 01:02:38.409402 0 11 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2385 01:02:38.412837 0 11 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2386 01:02:38.416605 0 12 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2387 01:02:38.424822 0 12 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2388 01:02:38.426025 0 12 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2389 01:02:38.429536 0 12 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2390 01:02:38.436158 0 12 16 | B1->B0 | 2323 2b2b | 0 0 | (0 0) (0 0)
2391 01:02:38.439409 0 12 20 | B1->B0 | 3636 3a3a | 1 1 | (0 0) (0 0)
2392 01:02:38.442798 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2393 01:02:38.449521 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2394 01:02:38.452582 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2395 01:02:38.457536 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2396 01:02:38.462773 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2397 01:02:38.466144 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2398 01:02:38.469683 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
2399 01:02:38.476764 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
2400 01:02:38.479471 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2401 01:02:38.483230 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2402 01:02:38.489665 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2403 01:02:38.492463 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2404 01:02:38.496102 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2405 01:02:38.502516 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2406 01:02:38.506023 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2407 01:02:38.508946 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2408 01:02:38.512342 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2409 01:02:38.519423 0 14 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2410 01:02:38.522876 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2411 01:02:38.526839 0 15 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2412 01:02:38.533080 0 15 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2413 01:02:38.535517 0 15 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2414 01:02:38.539198 0 15 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2415 01:02:38.545320 0 15 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
2416 01:02:38.549164 0 15 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2417 01:02:38.552300 Total UI for P1: 0, mck2ui 16
2418 01:02:38.555542 best dqsien dly found for B0: ( 0, 15, 20)
2419 01:02:38.559275 0 15 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2420 01:02:38.562327 Total UI for P1: 0, mck2ui 16
2421 01:02:38.565218 best dqsien dly found for B1: ( 0, 15, 22)
2422 01:02:38.568828 best DQS0 dly(MCK, UI, PI) = (0, 15, 20)
2423 01:02:38.573324 best DQS1 dly(MCK, UI, PI) = (0, 15, 22)
2424 01:02:38.576264
2425 01:02:38.579126 best DQS0 P1 dly(MCK, UI, PI) = (1, 3, 20)
2426 01:02:38.582294 best DQS1 P1 dly(MCK, UI, PI) = (1, 3, 22)
2427 01:02:38.585367 [Gating] SW calibration Done
2428 01:02:38.585837 ==
2429 01:02:38.589390 Dram Type= 6, Freq= 0, CH_0, rank 0
2430 01:02:38.592082 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2431 01:02:38.592828 ==
2432 01:02:38.593349 RX Vref Scan: 0
2433 01:02:38.593808
2434 01:02:38.595444 RX Vref 0 -> 0, step: 1
2435 01:02:38.595912
2436 01:02:38.598905 RX Delay -40 -> 252, step: 8
2437 01:02:38.602167 iDelay=200, Bit 0, Center 111 (40 ~ 183) 144
2438 01:02:38.605254 iDelay=200, Bit 1, Center 115 (40 ~ 191) 152
2439 01:02:38.612257 iDelay=200, Bit 2, Center 115 (40 ~ 191) 152
2440 01:02:38.615340 iDelay=200, Bit 3, Center 107 (32 ~ 183) 152
2441 01:02:38.618351 iDelay=200, Bit 4, Center 123 (48 ~ 199) 152
2442 01:02:38.621932 iDelay=200, Bit 5, Center 103 (32 ~ 175) 144
2443 01:02:38.625561 iDelay=200, Bit 6, Center 123 (48 ~ 199) 152
2444 01:02:38.632933 iDelay=200, Bit 7, Center 123 (48 ~ 199) 152
2445 01:02:38.635737 iDelay=200, Bit 8, Center 95 (24 ~ 167) 144
2446 01:02:38.638347 iDelay=200, Bit 9, Center 91 (24 ~ 159) 136
2447 01:02:38.642334 iDelay=200, Bit 10, Center 103 (32 ~ 175) 144
2448 01:02:38.645400 iDelay=200, Bit 11, Center 103 (40 ~ 167) 128
2449 01:02:38.652273 iDelay=200, Bit 12, Center 111 (40 ~ 183) 144
2450 01:02:38.655546 iDelay=200, Bit 13, Center 115 (48 ~ 183) 136
2451 01:02:38.659063 iDelay=200, Bit 14, Center 115 (48 ~ 183) 136
2452 01:02:38.662335 iDelay=200, Bit 15, Center 115 (40 ~ 191) 152
2453 01:02:38.662891 ==
2454 01:02:38.665668 Dram Type= 6, Freq= 0, CH_0, rank 0
2455 01:02:38.668702 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2456 01:02:38.672246 ==
2457 01:02:38.672853 DQS Delay:
2458 01:02:38.673226 DQS0 = 0, DQS1 = 0
2459 01:02:38.676115 DQM Delay:
2460 01:02:38.676657 DQM0 = 115, DQM1 = 106
2461 01:02:38.678478 DQ Delay:
2462 01:02:38.682015 DQ0 =111, DQ1 =115, DQ2 =115, DQ3 =107
2463 01:02:38.685952 DQ4 =123, DQ5 =103, DQ6 =123, DQ7 =123
2464 01:02:38.689239 DQ8 =95, DQ9 =91, DQ10 =103, DQ11 =103
2465 01:02:38.692521 DQ12 =111, DQ13 =115, DQ14 =115, DQ15 =115
2466 01:02:38.693109
2467 01:02:38.693777
2468 01:02:38.694160 ==
2469 01:02:38.695078 Dram Type= 6, Freq= 0, CH_0, rank 0
2470 01:02:38.698861 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2471 01:02:38.699416 ==
2472 01:02:38.699862
2473 01:02:38.700209
2474 01:02:38.702911 TX Vref Scan disable
2475 01:02:38.705577 == TX Byte 0 ==
2476 01:02:38.709173 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
2477 01:02:38.711753 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
2478 01:02:38.715269 == TX Byte 1 ==
2479 01:02:38.718790 Update DQ dly =842 (3 ,2, 10) DQ OEN =(2 ,7)
2480 01:02:38.722318 Update DQM dly =842 (3 ,2, 10) DQM OEN =(2 ,7)
2481 01:02:38.722886 ==
2482 01:02:38.725136 Dram Type= 6, Freq= 0, CH_0, rank 0
2483 01:02:38.728451 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2484 01:02:38.732455 ==
2485 01:02:38.741969 TX Vref=22, minBit 8, minWin=25, winSum=420
2486 01:02:38.745103 TX Vref=24, minBit 8, minWin=25, winSum=423
2487 01:02:38.748434 TX Vref=26, minBit 8, minWin=26, winSum=429
2488 01:02:38.752080 TX Vref=28, minBit 5, minWin=26, winSum=434
2489 01:02:38.754865 TX Vref=30, minBit 12, minWin=26, winSum=436
2490 01:02:38.761466 TX Vref=32, minBit 10, minWin=26, winSum=433
2491 01:02:38.764833 [TxChooseVref] Worse bit 12, Min win 26, Win sum 436, Final Vref 30
2492 01:02:38.765292
2493 01:02:38.768310 Final TX Range 1 Vref 30
2494 01:02:38.768637
2495 01:02:38.768937 ==
2496 01:02:38.771482 Dram Type= 6, Freq= 0, CH_0, rank 0
2497 01:02:38.774797 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2498 01:02:38.778115 ==
2499 01:02:38.778300
2500 01:02:38.778447
2501 01:02:38.778584 TX Vref Scan disable
2502 01:02:38.781708 == TX Byte 0 ==
2503 01:02:38.785560 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
2504 01:02:38.791941 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
2505 01:02:38.792158 == TX Byte 1 ==
2506 01:02:38.795205 Update DQ dly =842 (3 ,2, 10) DQ OEN =(2 ,7)
2507 01:02:38.798737 Update DQM dly =842 (3 ,2, 10) DQM OEN =(2 ,7)
2508 01:02:38.802924
2509 01:02:38.803478 [DATLAT]
2510 01:02:38.803842 Freq=1200, CH0 RK0
2511 01:02:38.804182
2512 01:02:38.805494 DATLAT Default: 0xd
2513 01:02:38.805948 0, 0xFFFF, sum = 0
2514 01:02:38.809417 1, 0xFFFF, sum = 0
2515 01:02:38.809885 2, 0xFFFF, sum = 0
2516 01:02:38.811724 3, 0xFFFF, sum = 0
2517 01:02:38.815719 4, 0xFFFF, sum = 0
2518 01:02:38.816278 5, 0xFFFF, sum = 0
2519 01:02:38.818414 6, 0xFFFF, sum = 0
2520 01:02:38.818970 7, 0xFFFF, sum = 0
2521 01:02:38.822605 8, 0xFFFF, sum = 0
2522 01:02:38.823254 9, 0xFFFF, sum = 0
2523 01:02:38.825387 10, 0xFFFF, sum = 0
2524 01:02:38.825903 11, 0x0, sum = 1
2525 01:02:38.828672 12, 0x0, sum = 2
2526 01:02:38.829180 13, 0x0, sum = 3
2527 01:02:38.832167 14, 0x0, sum = 4
2528 01:02:38.832774 best_step = 12
2529 01:02:38.833147
2530 01:02:38.833478 ==
2531 01:02:38.834858 Dram Type= 6, Freq= 0, CH_0, rank 0
2532 01:02:38.838266 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2533 01:02:38.838720 ==
2534 01:02:38.842265 RX Vref Scan: 1
2535 01:02:38.842820
2536 01:02:38.845594 Set Vref Range= 32 -> 127
2537 01:02:38.846047
2538 01:02:38.846403 RX Vref 32 -> 127, step: 1
2539 01:02:38.846738
2540 01:02:38.848860 RX Delay -21 -> 252, step: 4
2541 01:02:38.849392
2542 01:02:38.851811 Set Vref, RX VrefLevel [Byte0]: 32
2543 01:02:38.855433 [Byte1]: 32
2544 01:02:38.859210
2545 01:02:38.859758 Set Vref, RX VrefLevel [Byte0]: 33
2546 01:02:38.861944 [Byte1]: 33
2547 01:02:38.866325
2548 01:02:38.866858 Set Vref, RX VrefLevel [Byte0]: 34
2549 01:02:38.870511 [Byte1]: 34
2550 01:02:38.874677
2551 01:02:38.875254 Set Vref, RX VrefLevel [Byte0]: 35
2552 01:02:38.877948 [Byte1]: 35
2553 01:02:38.882675
2554 01:02:38.883223 Set Vref, RX VrefLevel [Byte0]: 36
2555 01:02:38.885591 [Byte1]: 36
2556 01:02:38.890441
2557 01:02:38.890993 Set Vref, RX VrefLevel [Byte0]: 37
2558 01:02:38.893433 [Byte1]: 37
2559 01:02:38.898272
2560 01:02:38.898822 Set Vref, RX VrefLevel [Byte0]: 38
2561 01:02:38.902407 [Byte1]: 38
2562 01:02:38.906375
2563 01:02:38.906928 Set Vref, RX VrefLevel [Byte0]: 39
2564 01:02:38.909509 [Byte1]: 39
2565 01:02:38.914957
2566 01:02:38.915505 Set Vref, RX VrefLevel [Byte0]: 40
2567 01:02:38.917587 [Byte1]: 40
2568 01:02:38.922462
2569 01:02:38.923013 Set Vref, RX VrefLevel [Byte0]: 41
2570 01:02:38.925348 [Byte1]: 41
2571 01:02:38.929662
2572 01:02:38.930293 Set Vref, RX VrefLevel [Byte0]: 42
2573 01:02:38.933686 [Byte1]: 42
2574 01:02:38.938416
2575 01:02:38.938967 Set Vref, RX VrefLevel [Byte0]: 43
2576 01:02:38.941474 [Byte1]: 43
2577 01:02:38.945732
2578 01:02:38.946278 Set Vref, RX VrefLevel [Byte0]: 44
2579 01:02:38.949260 [Byte1]: 44
2580 01:02:38.954820
2581 01:02:38.955367 Set Vref, RX VrefLevel [Byte0]: 45
2582 01:02:38.957143 [Byte1]: 45
2583 01:02:38.961608
2584 01:02:38.962166 Set Vref, RX VrefLevel [Byte0]: 46
2585 01:02:38.965149 [Byte1]: 46
2586 01:02:38.969061
2587 01:02:38.972679 Set Vref, RX VrefLevel [Byte0]: 47
2588 01:02:38.973176 [Byte1]: 47
2589 01:02:38.977921
2590 01:02:38.978504 Set Vref, RX VrefLevel [Byte0]: 48
2591 01:02:38.980692 [Byte1]: 48
2592 01:02:38.985604
2593 01:02:38.986188 Set Vref, RX VrefLevel [Byte0]: 49
2594 01:02:38.988828 [Byte1]: 49
2595 01:02:38.993856
2596 01:02:38.994543 Set Vref, RX VrefLevel [Byte0]: 50
2597 01:02:38.996443 [Byte1]: 50
2598 01:02:39.001260
2599 01:02:39.001824 Set Vref, RX VrefLevel [Byte0]: 51
2600 01:02:39.005278 [Byte1]: 51
2601 01:02:39.009197
2602 01:02:39.009751 Set Vref, RX VrefLevel [Byte0]: 52
2603 01:02:39.012556 [Byte1]: 52
2604 01:02:39.017099
2605 01:02:39.017651 Set Vref, RX VrefLevel [Byte0]: 53
2606 01:02:39.020541 [Byte1]: 53
2607 01:02:39.025373
2608 01:02:39.025925 Set Vref, RX VrefLevel [Byte0]: 54
2609 01:02:39.028826 [Byte1]: 54
2610 01:02:39.033037
2611 01:02:39.033593 Set Vref, RX VrefLevel [Byte0]: 55
2612 01:02:39.035872 [Byte1]: 55
2613 01:02:39.041655
2614 01:02:39.042212 Set Vref, RX VrefLevel [Byte0]: 56
2615 01:02:39.045103 [Byte1]: 56
2616 01:02:39.048950
2617 01:02:39.049504 Set Vref, RX VrefLevel [Byte0]: 57
2618 01:02:39.052047 [Byte1]: 57
2619 01:02:39.056511
2620 01:02:39.057155 Set Vref, RX VrefLevel [Byte0]: 58
2621 01:02:39.059945 [Byte1]: 58
2622 01:02:39.065415
2623 01:02:39.065981 Set Vref, RX VrefLevel [Byte0]: 59
2624 01:02:39.068936 [Byte1]: 59
2625 01:02:39.072560
2626 01:02:39.073174 Set Vref, RX VrefLevel [Byte0]: 60
2627 01:02:39.076291 [Byte1]: 60
2628 01:02:39.080339
2629 01:02:39.080944 Set Vref, RX VrefLevel [Byte0]: 61
2630 01:02:39.084092 [Byte1]: 61
2631 01:02:39.088472
2632 01:02:39.089106 Set Vref, RX VrefLevel [Byte0]: 62
2633 01:02:39.091390 [Byte1]: 62
2634 01:02:39.096431
2635 01:02:39.096943 Set Vref, RX VrefLevel [Byte0]: 63
2636 01:02:39.099402 [Byte1]: 63
2637 01:02:39.104224
2638 01:02:39.104681 Set Vref, RX VrefLevel [Byte0]: 64
2639 01:02:39.107372 [Byte1]: 64
2640 01:02:39.112178
2641 01:02:39.112639 Set Vref, RX VrefLevel [Byte0]: 65
2642 01:02:39.115009 [Byte1]: 65
2643 01:02:39.120045
2644 01:02:39.120614 Set Vref, RX VrefLevel [Byte0]: 66
2645 01:02:39.123867 [Byte1]: 66
2646 01:02:39.128174
2647 01:02:39.128951 Final RX Vref Byte 0 = 46 to rank0
2648 01:02:39.131504 Final RX Vref Byte 1 = 48 to rank0
2649 01:02:39.134957 Final RX Vref Byte 0 = 46 to rank1
2650 01:02:39.137999 Final RX Vref Byte 1 = 48 to rank1==
2651 01:02:39.141361 Dram Type= 6, Freq= 0, CH_0, rank 0
2652 01:02:39.148052 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2653 01:02:39.148620 ==
2654 01:02:39.149053 DQS Delay:
2655 01:02:39.149399 DQS0 = 0, DQS1 = 0
2656 01:02:39.151338 DQM Delay:
2657 01:02:39.151812 DQM0 = 113, DQM1 = 105
2658 01:02:39.154526 DQ Delay:
2659 01:02:39.158405 DQ0 =110, DQ1 =114, DQ2 =112, DQ3 =108
2660 01:02:39.161501 DQ4 =118, DQ5 =104, DQ6 =124, DQ7 =120
2661 01:02:39.165321 DQ8 =94, DQ9 =88, DQ10 =106, DQ11 =96
2662 01:02:39.168414 DQ12 =114, DQ13 =112, DQ14 =118, DQ15 =116
2663 01:02:39.169019
2664 01:02:39.169388
2665 01:02:39.175342 [DQSOSCAuto] RK0, (LSB)MR18= 0xb0b, (MSB)MR19= 0x404, tDQSOscB0 = 405 ps tDQSOscB1 = 405 ps
2666 01:02:39.178024 CH0 RK0: MR19=404, MR18=B0B
2667 01:02:39.185057 CH0_RK0: MR19=0x404, MR18=0xB0B, DQSOSC=405, MR23=63, INC=39, DEC=26
2668 01:02:39.185622
2669 01:02:39.188123 ----->DramcWriteLeveling(PI) begin...
2670 01:02:39.188692 ==
2671 01:02:39.192399 Dram Type= 6, Freq= 0, CH_0, rank 1
2672 01:02:39.194657 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2673 01:02:39.195135 ==
2674 01:02:39.197977 Write leveling (Byte 0): 27 => 27
2675 01:02:39.201207 Write leveling (Byte 1): 25 => 25
2676 01:02:39.204821 DramcWriteLeveling(PI) end<-----
2677 01:02:39.205276
2678 01:02:39.205676 ==
2679 01:02:39.207757 Dram Type= 6, Freq= 0, CH_0, rank 1
2680 01:02:39.211347 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2681 01:02:39.215513 ==
2682 01:02:39.216078 [Gating] SW mode calibration
2683 01:02:39.224815 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 24 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2684 01:02:39.228320 RX_Path_delay_UI(43) -3 - DQSINCTL_UI(32) = u1StartUI(11)
2685 01:02:39.231176 0 11 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2686 01:02:39.238130 0 11 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2687 01:02:39.243536 0 11 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2688 01:02:39.245101 0 11 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2689 01:02:39.251495 0 11 16 | B1->B0 | 3434 3434 | 1 1 | (1 0) (1 0)
2690 01:02:39.255139 0 11 20 | B1->B0 | 2929 2323 | 0 0 | (1 0) (0 0)
2691 01:02:39.257608 0 11 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2692 01:02:39.265383 0 11 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2693 01:02:39.267712 0 12 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2694 01:02:39.272137 0 12 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2695 01:02:39.277491 0 12 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2696 01:02:39.281633 0 12 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2697 01:02:39.284805 0 12 16 | B1->B0 | 2928 3737 | 1 0 | (0 0) (0 0)
2698 01:02:39.291297 0 12 20 | B1->B0 | 3e3e 4646 | 1 0 | (0 0) (0 0)
2699 01:02:39.294447 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2700 01:02:39.297737 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2701 01:02:39.304359 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2702 01:02:39.307647 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2703 01:02:39.311106 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2704 01:02:39.314550 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2705 01:02:39.321206 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
2706 01:02:39.325048 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
2707 01:02:39.327536 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2708 01:02:39.334137 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2709 01:02:39.337547 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2710 01:02:39.341035 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2711 01:02:39.347938 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2712 01:02:39.351580 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2713 01:02:39.354365 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2714 01:02:39.362202 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2715 01:02:39.364777 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2716 01:02:39.368112 0 14 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2717 01:02:39.374737 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2718 01:02:39.377691 0 15 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2719 01:02:39.381424 0 15 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2720 01:02:39.387605 0 15 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2721 01:02:39.391210 0 15 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
2722 01:02:39.394407 0 15 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2723 01:02:39.398146 Total UI for P1: 0, mck2ui 16
2724 01:02:39.401339 best dqsien dly found for B0: ( 0, 15, 16)
2725 01:02:39.404810 0 15 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2726 01:02:39.407744 Total UI for P1: 0, mck2ui 16
2727 01:02:39.411165 best dqsien dly found for B1: ( 0, 15, 20)
2728 01:02:39.414201 best DQS0 dly(MCK, UI, PI) = (0, 15, 16)
2729 01:02:39.420868 best DQS1 dly(MCK, UI, PI) = (0, 15, 20)
2730 01:02:39.421475
2731 01:02:39.424799 best DQS0 P1 dly(MCK, UI, PI) = (1, 3, 16)
2732 01:02:39.427717 best DQS1 P1 dly(MCK, UI, PI) = (1, 3, 20)
2733 01:02:39.430547 [Gating] SW calibration Done
2734 01:02:39.431001 ==
2735 01:02:39.435135 Dram Type= 6, Freq= 0, CH_0, rank 1
2736 01:02:39.437671 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2737 01:02:39.438227 ==
2738 01:02:39.440813 RX Vref Scan: 0
2739 01:02:39.441455
2740 01:02:39.441833 RX Vref 0 -> 0, step: 1
2741 01:02:39.442173
2742 01:02:39.444448 RX Delay -40 -> 252, step: 8
2743 01:02:39.447801 iDelay=200, Bit 0, Center 107 (32 ~ 183) 152
2744 01:02:39.451070 iDelay=200, Bit 1, Center 115 (40 ~ 191) 152
2745 01:02:39.457829 iDelay=200, Bit 2, Center 115 (40 ~ 191) 152
2746 01:02:39.462608 iDelay=200, Bit 3, Center 107 (40 ~ 175) 136
2747 01:02:39.464904 iDelay=200, Bit 4, Center 115 (40 ~ 191) 152
2748 01:02:39.468283 iDelay=200, Bit 5, Center 107 (32 ~ 183) 152
2749 01:02:39.470911 iDelay=200, Bit 6, Center 119 (48 ~ 191) 144
2750 01:02:39.477665 iDelay=200, Bit 7, Center 123 (48 ~ 199) 152
2751 01:02:39.480803 iDelay=200, Bit 8, Center 91 (24 ~ 159) 136
2752 01:02:39.484278 iDelay=200, Bit 9, Center 91 (24 ~ 159) 136
2753 01:02:39.487972 iDelay=200, Bit 10, Center 107 (32 ~ 183) 152
2754 01:02:39.490896 iDelay=200, Bit 11, Center 99 (32 ~ 167) 136
2755 01:02:39.497843 iDelay=200, Bit 12, Center 115 (48 ~ 183) 136
2756 01:02:39.500965 iDelay=200, Bit 13, Center 115 (48 ~ 183) 136
2757 01:02:39.504107 iDelay=200, Bit 14, Center 119 (48 ~ 191) 144
2758 01:02:39.507542 iDelay=200, Bit 15, Center 115 (48 ~ 183) 136
2759 01:02:39.508095 ==
2760 01:02:39.510583 Dram Type= 6, Freq= 0, CH_0, rank 1
2761 01:02:39.517680 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2762 01:02:39.518237 ==
2763 01:02:39.518599 DQS Delay:
2764 01:02:39.520935 DQS0 = 0, DQS1 = 0
2765 01:02:39.521397 DQM Delay:
2766 01:02:39.521783 DQM0 = 113, DQM1 = 106
2767 01:02:39.524413 DQ Delay:
2768 01:02:39.527606 DQ0 =107, DQ1 =115, DQ2 =115, DQ3 =107
2769 01:02:39.530512 DQ4 =115, DQ5 =107, DQ6 =119, DQ7 =123
2770 01:02:39.533896 DQ8 =91, DQ9 =91, DQ10 =107, DQ11 =99
2771 01:02:39.537593 DQ12 =115, DQ13 =115, DQ14 =119, DQ15 =115
2772 01:02:39.538145
2773 01:02:39.538506
2774 01:02:39.538840 ==
2775 01:02:39.540434 Dram Type= 6, Freq= 0, CH_0, rank 1
2776 01:02:39.544847 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2777 01:02:39.545396 ==
2778 01:02:39.547445
2779 01:02:39.548002
2780 01:02:39.548520 TX Vref Scan disable
2781 01:02:39.550480 == TX Byte 0 ==
2782 01:02:39.555250 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
2783 01:02:39.557196 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
2784 01:02:39.560866 == TX Byte 1 ==
2785 01:02:39.564285 Update DQ dly =840 (3 ,1, 40) DQ OEN =(2 ,6)
2786 01:02:39.567834 Update DQM dly =840 (3 ,1, 40) DQM OEN =(2 ,6)
2787 01:02:39.568422 ==
2788 01:02:39.570362 Dram Type= 6, Freq= 0, CH_0, rank 1
2789 01:02:39.577804 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2790 01:02:39.578361 ==
2791 01:02:39.587884 TX Vref=22, minBit 8, minWin=25, winSum=415
2792 01:02:39.591312 TX Vref=24, minBit 8, minWin=25, winSum=419
2793 01:02:39.595138 TX Vref=26, minBit 1, minWin=26, winSum=429
2794 01:02:39.598659 TX Vref=28, minBit 1, minWin=26, winSum=428
2795 01:02:39.600991 TX Vref=30, minBit 0, minWin=27, winSum=433
2796 01:02:39.604680 TX Vref=32, minBit 8, minWin=26, winSum=435
2797 01:02:39.611131 [TxChooseVref] Worse bit 0, Min win 27, Win sum 433, Final Vref 30
2798 01:02:39.611704
2799 01:02:39.615137 Final TX Range 1 Vref 30
2800 01:02:39.615689
2801 01:02:39.616172 ==
2802 01:02:39.619004 Dram Type= 6, Freq= 0, CH_0, rank 1
2803 01:02:39.622476 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2804 01:02:39.622933 ==
2805 01:02:39.623292
2806 01:02:39.624808
2807 01:02:39.625262 TX Vref Scan disable
2808 01:02:39.627859 == TX Byte 0 ==
2809 01:02:39.631139 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
2810 01:02:39.634698 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
2811 01:02:39.637419 == TX Byte 1 ==
2812 01:02:39.641114 Update DQ dly =840 (3 ,1, 40) DQ OEN =(2 ,6)
2813 01:02:39.644288 Update DQM dly =840 (3 ,1, 40) DQM OEN =(2 ,6)
2814 01:02:39.648110
2815 01:02:39.648665 [DATLAT]
2816 01:02:39.649087 Freq=1200, CH0 RK1
2817 01:02:39.649427
2818 01:02:39.650884 DATLAT Default: 0xc
2819 01:02:39.651335 0, 0xFFFF, sum = 0
2820 01:02:39.654224 1, 0xFFFF, sum = 0
2821 01:02:39.654718 2, 0xFFFF, sum = 0
2822 01:02:39.659021 3, 0xFFFF, sum = 0
2823 01:02:39.659584 4, 0xFFFF, sum = 0
2824 01:02:39.661189 5, 0xFFFF, sum = 0
2825 01:02:39.661649 6, 0xFFFF, sum = 0
2826 01:02:39.665258 7, 0xFFFF, sum = 0
2827 01:02:39.667611 8, 0xFFFF, sum = 0
2828 01:02:39.668170 9, 0xFFFF, sum = 0
2829 01:02:39.671308 10, 0xFFFF, sum = 0
2830 01:02:39.671781 11, 0x0, sum = 1
2831 01:02:39.674235 12, 0x0, sum = 2
2832 01:02:39.674795 13, 0x0, sum = 3
2833 01:02:39.675255 14, 0x0, sum = 4
2834 01:02:39.677574 best_step = 12
2835 01:02:39.678025
2836 01:02:39.678384 ==
2837 01:02:39.681433 Dram Type= 6, Freq= 0, CH_0, rank 1
2838 01:02:39.684243 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2839 01:02:39.684699 ==
2840 01:02:39.688817 RX Vref Scan: 0
2841 01:02:39.689280
2842 01:02:39.689631 RX Vref 0 -> 0, step: 1
2843 01:02:39.690446
2844 01:02:39.690818 RX Delay -21 -> 252, step: 4
2845 01:02:39.697945 iDelay=195, Bit 0, Center 110 (39 ~ 182) 144
2846 01:02:39.701699 iDelay=195, Bit 1, Center 116 (43 ~ 190) 148
2847 01:02:39.705178 iDelay=195, Bit 2, Center 112 (43 ~ 182) 140
2848 01:02:39.708410 iDelay=195, Bit 3, Center 108 (39 ~ 178) 140
2849 01:02:39.712358 iDelay=195, Bit 4, Center 118 (47 ~ 190) 144
2850 01:02:39.718536 iDelay=195, Bit 5, Center 106 (35 ~ 178) 144
2851 01:02:39.721651 iDelay=195, Bit 6, Center 124 (55 ~ 194) 140
2852 01:02:39.725092 iDelay=195, Bit 7, Center 124 (55 ~ 194) 140
2853 01:02:39.729135 iDelay=195, Bit 8, Center 94 (31 ~ 158) 128
2854 01:02:39.731185 iDelay=195, Bit 9, Center 90 (27 ~ 154) 128
2855 01:02:39.738272 iDelay=195, Bit 10, Center 110 (43 ~ 178) 136
2856 01:02:39.741463 iDelay=195, Bit 11, Center 96 (35 ~ 158) 124
2857 01:02:39.745268 iDelay=195, Bit 12, Center 114 (51 ~ 178) 128
2858 01:02:39.748170 iDelay=195, Bit 13, Center 112 (47 ~ 178) 132
2859 01:02:39.752167 iDelay=195, Bit 14, Center 116 (51 ~ 182) 132
2860 01:02:39.758222 iDelay=195, Bit 15, Center 114 (51 ~ 178) 128
2861 01:02:39.758781 ==
2862 01:02:39.761462 Dram Type= 6, Freq= 0, CH_0, rank 1
2863 01:02:39.764946 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2864 01:02:39.765492 ==
2865 01:02:39.766009 DQS Delay:
2866 01:02:39.768442 DQS0 = 0, DQS1 = 0
2867 01:02:39.769053 DQM Delay:
2868 01:02:39.771990 DQM0 = 114, DQM1 = 105
2869 01:02:39.772546 DQ Delay:
2870 01:02:39.774828 DQ0 =110, DQ1 =116, DQ2 =112, DQ3 =108
2871 01:02:39.778225 DQ4 =118, DQ5 =106, DQ6 =124, DQ7 =124
2872 01:02:39.781349 DQ8 =94, DQ9 =90, DQ10 =110, DQ11 =96
2873 01:02:39.784603 DQ12 =114, DQ13 =112, DQ14 =116, DQ15 =114
2874 01:02:39.785106
2875 01:02:39.785518
2876 01:02:39.794765 [DQSOSCAuto] RK1, (LSB)MR18= 0xd0d, (MSB)MR19= 0x404, tDQSOscB0 = 405 ps tDQSOscB1 = 405 ps
2877 01:02:39.798089 CH0 RK1: MR19=404, MR18=D0D
2878 01:02:39.802081 CH0_RK1: MR19=0x404, MR18=0xD0D, DQSOSC=405, MR23=63, INC=39, DEC=26
2879 01:02:39.804389 [RxdqsGatingPostProcess] freq 1200
2880 01:02:39.810982 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
2881 01:02:39.814323 Pre-setting of DQS Precalculation
2882 01:02:39.818057 [DualRankRxdatlatCal] RK0: 12, RK1: 12, Final_Datlat 12
2883 01:02:39.818612 ==
2884 01:02:39.821425 Dram Type= 6, Freq= 0, CH_1, rank 0
2885 01:02:39.827497 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2886 01:02:39.828163 ==
2887 01:02:39.831191 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2888 01:02:39.838086 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
2889 01:02:39.846491 [CA 0] Center 37 (7~67) winsize 61
2890 01:02:39.850107 [CA 1] Center 37 (7~68) winsize 62
2891 01:02:39.853219 [CA 2] Center 34 (3~65) winsize 63
2892 01:02:39.856397 [CA 3] Center 33 (3~64) winsize 62
2893 01:02:39.859719 [CA 4] Center 32 (1~63) winsize 63
2894 01:02:39.862921 [CA 5] Center 32 (1~63) winsize 63
2895 01:02:39.863377
2896 01:02:39.866102 [CmdBusTrainingLP45] Vref(ca) range 1: 39
2897 01:02:39.866555
2898 01:02:39.869917 [CATrainingPosCal] consider 1 rank data
2899 01:02:39.873454 u2DelayCellTimex100 = 270/100 ps
2900 01:02:39.876667 CA0 delay=37 (7~67),Diff = 5 PI (24 cell)
2901 01:02:39.879886 CA1 delay=37 (7~68),Diff = 5 PI (24 cell)
2902 01:02:39.887009 CA2 delay=34 (3~65),Diff = 2 PI (9 cell)
2903 01:02:39.890048 CA3 delay=33 (3~64),Diff = 1 PI (4 cell)
2904 01:02:39.893116 CA4 delay=32 (1~63),Diff = 0 PI (0 cell)
2905 01:02:39.896368 CA5 delay=32 (1~63),Diff = 0 PI (0 cell)
2906 01:02:39.896978
2907 01:02:39.899558 CA PerBit enable=1, Macro0, CA PI delay=32
2908 01:02:39.900014
2909 01:02:39.902772 [CBTSetCACLKResult] CA Dly = 32
2910 01:02:39.903222 CS Dly: 6 (0~37)
2911 01:02:39.906452 ==
2912 01:02:39.907005 Dram Type= 6, Freq= 0, CH_1, rank 1
2913 01:02:39.912878 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2914 01:02:39.913442 ==
2915 01:02:39.916622 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2916 01:02:39.923701 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
2917 01:02:39.931883 [CA 0] Center 37 (7~67) winsize 61
2918 01:02:39.934837 [CA 1] Center 37 (7~68) winsize 62
2919 01:02:39.938495 [CA 2] Center 33 (3~64) winsize 62
2920 01:02:39.942120 [CA 3] Center 33 (3~64) winsize 62
2921 01:02:39.945682 [CA 4] Center 32 (2~63) winsize 62
2922 01:02:39.948796 [CA 5] Center 32 (1~63) winsize 63
2923 01:02:39.949366
2924 01:02:39.951657 [CmdBusTrainingLP45] Vref(ca) range 1: 37
2925 01:02:39.952225
2926 01:02:39.955427 [CATrainingPosCal] consider 2 rank data
2927 01:02:39.958215 u2DelayCellTimex100 = 270/100 ps
2928 01:02:39.962069 CA0 delay=37 (7~67),Diff = 5 PI (24 cell)
2929 01:02:39.964941 CA1 delay=37 (7~68),Diff = 5 PI (24 cell)
2930 01:02:39.971977 CA2 delay=33 (3~64),Diff = 1 PI (4 cell)
2931 01:02:39.975162 CA3 delay=33 (3~64),Diff = 1 PI (4 cell)
2932 01:02:39.978080 CA4 delay=32 (2~63),Diff = 0 PI (0 cell)
2933 01:02:39.981827 CA5 delay=32 (1~63),Diff = 0 PI (0 cell)
2934 01:02:39.982287
2935 01:02:39.984298 CA PerBit enable=1, Macro0, CA PI delay=32
2936 01:02:39.984782
2937 01:02:39.988258 [CBTSetCACLKResult] CA Dly = 32
2938 01:02:39.988863 CS Dly: 6 (0~38)
2939 01:02:39.991715
2940 01:02:39.994990 ----->DramcWriteLeveling(PI) begin...
2941 01:02:39.995575 ==
2942 01:02:39.998163 Dram Type= 6, Freq= 0, CH_1, rank 0
2943 01:02:40.001793 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2944 01:02:40.002258 ==
2945 01:02:40.004998 Write leveling (Byte 0): 19 => 19
2946 01:02:40.007984 Write leveling (Byte 1): 23 => 23
2947 01:02:40.011459 DramcWriteLeveling(PI) end<-----
2948 01:02:40.012023
2949 01:02:40.012390 ==
2950 01:02:40.014199 Dram Type= 6, Freq= 0, CH_1, rank 0
2951 01:02:40.017930 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
2952 01:02:40.018395 ==
2953 01:02:40.020934 [Gating] SW mode calibration
2954 01:02:40.028502 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 24 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2955 01:02:40.034538 RX_Path_delay_UI(43) -3 - DQSINCTL_UI(32) = u1StartUI(11)
2956 01:02:40.038372 0 11 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2957 01:02:40.041414 0 11 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2958 01:02:40.047824 0 11 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2959 01:02:40.051064 0 11 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
2960 01:02:40.055905 0 11 16 | B1->B0 | 3333 2525 | 1 0 | (1 0) (1 0)
2961 01:02:40.062144 0 11 20 | B1->B0 | 2424 2323 | 0 0 | (1 0) (0 0)
2962 01:02:40.064893 0 11 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2963 01:02:40.067756 0 11 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2964 01:02:40.071525 0 12 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2965 01:02:40.077921 0 12 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2966 01:02:40.081082 0 12 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2967 01:02:40.084904 0 12 12 | B1->B0 | 2323 2525 | 0 0 | (0 0) (0 0)
2968 01:02:40.091675 0 12 16 | B1->B0 | 3232 4242 | 0 0 | (0 0) (0 0)
2969 01:02:40.094448 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2970 01:02:40.098340 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2971 01:02:40.104406 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2972 01:02:40.108472 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2973 01:02:40.111466 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2974 01:02:40.117700 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2975 01:02:40.120943 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2976 01:02:40.124336 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
2977 01:02:40.130954 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
2978 01:02:40.134891 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
2979 01:02:40.137644 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2980 01:02:40.145037 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2981 01:02:40.148075 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2982 01:02:40.151435 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2983 01:02:40.157935 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2984 01:02:40.160809 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2985 01:02:40.163907 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2986 01:02:40.172798 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2987 01:02:40.174215 0 14 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2988 01:02:40.177358 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2989 01:02:40.181045 0 15 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2990 01:02:40.188304 0 15 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2991 01:02:40.191488 0 15 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2992 01:02:40.194161 0 15 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
2993 01:02:40.200913 0 15 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2994 01:02:40.204252 Total UI for P1: 0, mck2ui 16
2995 01:02:40.208113 best dqsien dly found for B0: ( 0, 15, 16)
2996 01:02:40.210926 0 15 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2997 01:02:40.214033 Total UI for P1: 0, mck2ui 16
2998 01:02:40.217390 best dqsien dly found for B1: ( 0, 15, 20)
2999 01:02:40.221720 best DQS0 dly(MCK, UI, PI) = (0, 15, 16)
3000 01:02:40.224413 best DQS1 dly(MCK, UI, PI) = (0, 15, 20)
3001 01:02:40.225019
3002 01:02:40.227531 best DQS0 P1 dly(MCK, UI, PI) = (1, 3, 16)
3003 01:02:40.231200 best DQS1 P1 dly(MCK, UI, PI) = (1, 3, 20)
3004 01:02:40.234058 [Gating] SW calibration Done
3005 01:02:40.234619 ==
3006 01:02:40.237313 Dram Type= 6, Freq= 0, CH_1, rank 0
3007 01:02:40.244800 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3008 01:02:40.245349 ==
3009 01:02:40.245713 RX Vref Scan: 0
3010 01:02:40.246054
3011 01:02:40.247462 RX Vref 0 -> 0, step: 1
3012 01:02:40.247922
3013 01:02:40.250809 RX Delay -40 -> 252, step: 8
3014 01:02:40.253949 iDelay=208, Bit 0, Center 119 (40 ~ 199) 160
3015 01:02:40.257291 iDelay=208, Bit 1, Center 107 (32 ~ 183) 152
3016 01:02:40.260822 iDelay=208, Bit 2, Center 107 (32 ~ 183) 152
3017 01:02:40.265157 iDelay=208, Bit 3, Center 115 (40 ~ 191) 152
3018 01:02:40.270777 iDelay=208, Bit 4, Center 115 (40 ~ 191) 152
3019 01:02:40.274256 iDelay=208, Bit 5, Center 127 (48 ~ 207) 160
3020 01:02:40.278424 iDelay=208, Bit 6, Center 119 (40 ~ 199) 160
3021 01:02:40.281840 iDelay=208, Bit 7, Center 111 (32 ~ 191) 160
3022 01:02:40.284801 iDelay=208, Bit 8, Center 87 (16 ~ 159) 144
3023 01:02:40.290726 iDelay=208, Bit 9, Center 95 (24 ~ 167) 144
3024 01:02:40.294557 iDelay=208, Bit 10, Center 107 (32 ~ 183) 152
3025 01:02:40.297543 iDelay=208, Bit 11, Center 99 (32 ~ 167) 136
3026 01:02:40.301575 iDelay=208, Bit 12, Center 115 (40 ~ 191) 152
3027 01:02:40.304017 iDelay=208, Bit 13, Center 119 (48 ~ 191) 144
3028 01:02:40.311370 iDelay=208, Bit 14, Center 115 (40 ~ 191) 152
3029 01:02:40.313983 iDelay=208, Bit 15, Center 115 (40 ~ 191) 152
3030 01:02:40.314441 ==
3031 01:02:40.317838 Dram Type= 6, Freq= 0, CH_1, rank 0
3032 01:02:40.320464 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3033 01:02:40.321070 ==
3034 01:02:40.324244 DQS Delay:
3035 01:02:40.324860 DQS0 = 0, DQS1 = 0
3036 01:02:40.325235 DQM Delay:
3037 01:02:40.327641 DQM0 = 115, DQM1 = 106
3038 01:02:40.328197 DQ Delay:
3039 01:02:40.330765 DQ0 =119, DQ1 =107, DQ2 =107, DQ3 =115
3040 01:02:40.334061 DQ4 =115, DQ5 =127, DQ6 =119, DQ7 =111
3041 01:02:40.337513 DQ8 =87, DQ9 =95, DQ10 =107, DQ11 =99
3042 01:02:40.343872 DQ12 =115, DQ13 =119, DQ14 =115, DQ15 =115
3043 01:02:40.344429
3044 01:02:40.344889
3045 01:02:40.345241 ==
3046 01:02:40.347249 Dram Type= 6, Freq= 0, CH_1, rank 0
3047 01:02:40.350578 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3048 01:02:40.351138 ==
3049 01:02:40.351506
3050 01:02:40.351844
3051 01:02:40.353901 TX Vref Scan disable
3052 01:02:40.354358 == TX Byte 0 ==
3053 01:02:40.360606 Update DQ dly =836 (3 ,1, 36) DQ OEN =(2 ,6)
3054 01:02:40.363924 Update DQM dly =836 (3 ,1, 36) DQM OEN =(2 ,6)
3055 01:02:40.364479 == TX Byte 1 ==
3056 01:02:40.371065 Update DQ dly =840 (3 ,1, 40) DQ OEN =(2 ,6)
3057 01:02:40.373766 Update DQM dly =840 (3 ,1, 40) DQM OEN =(2 ,6)
3058 01:02:40.374226 ==
3059 01:02:40.377987 Dram Type= 6, Freq= 0, CH_1, rank 0
3060 01:02:40.380881 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3061 01:02:40.381437 ==
3062 01:02:40.393610 TX Vref=22, minBit 9, minWin=25, winSum=417
3063 01:02:40.396492 TX Vref=24, minBit 5, minWin=25, winSum=415
3064 01:02:40.399615 TX Vref=26, minBit 9, minWin=25, winSum=421
3065 01:02:40.403110 TX Vref=28, minBit 11, minWin=26, winSum=435
3066 01:02:40.406374 TX Vref=30, minBit 9, minWin=26, winSum=433
3067 01:02:40.413227 TX Vref=32, minBit 9, minWin=25, winSum=426
3068 01:02:40.416307 [TxChooseVref] Worse bit 11, Min win 26, Win sum 435, Final Vref 28
3069 01:02:40.416923
3070 01:02:40.419349 Final TX Range 1 Vref 28
3071 01:02:40.419809
3072 01:02:40.420171 ==
3073 01:02:40.423685 Dram Type= 6, Freq= 0, CH_1, rank 0
3074 01:02:40.426958 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3075 01:02:40.429800 ==
3076 01:02:40.430352
3077 01:02:40.430719
3078 01:02:40.431058 TX Vref Scan disable
3079 01:02:40.432973 == TX Byte 0 ==
3080 01:02:40.437216 Update DQ dly =836 (3 ,1, 36) DQ OEN =(2 ,6)
3081 01:02:40.443287 Update DQM dly =836 (3 ,1, 36) DQM OEN =(2 ,6)
3082 01:02:40.443841 == TX Byte 1 ==
3083 01:02:40.446928 Update DQ dly =839 (3 ,1, 39) DQ OEN =(2 ,6)
3084 01:02:40.452930 Update DQM dly =839 (3 ,1, 39) DQM OEN =(2 ,6)
3085 01:02:40.453485
3086 01:02:40.453852 [DATLAT]
3087 01:02:40.454194 Freq=1200, CH1 RK0
3088 01:02:40.454522
3089 01:02:40.456421 DATLAT Default: 0xd
3090 01:02:40.456919 0, 0xFFFF, sum = 0
3091 01:02:40.460293 1, 0xFFFF, sum = 0
3092 01:02:40.462549 2, 0xFFFF, sum = 0
3093 01:02:40.463017 3, 0xFFFF, sum = 0
3094 01:02:40.466173 4, 0xFFFF, sum = 0
3095 01:02:40.466737 5, 0xFFFF, sum = 0
3096 01:02:40.469113 6, 0xFFFF, sum = 0
3097 01:02:40.469578 7, 0xFFFF, sum = 0
3098 01:02:40.472644 8, 0xFFFF, sum = 0
3099 01:02:40.473243 9, 0xFFFF, sum = 0
3100 01:02:40.476316 10, 0xFFFF, sum = 0
3101 01:02:40.476936 11, 0x0, sum = 1
3102 01:02:40.479532 12, 0x0, sum = 2
3103 01:02:40.480095 13, 0x0, sum = 3
3104 01:02:40.483052 14, 0x0, sum = 4
3105 01:02:40.483615 best_step = 12
3106 01:02:40.483982
3107 01:02:40.484323 ==
3108 01:02:40.486982 Dram Type= 6, Freq= 0, CH_1, rank 0
3109 01:02:40.489440 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3110 01:02:40.489900 ==
3111 01:02:40.492559 RX Vref Scan: 1
3112 01:02:40.493101
3113 01:02:40.496262 Set Vref Range= 32 -> 127
3114 01:02:40.496761
3115 01:02:40.497141 RX Vref 32 -> 127, step: 1
3116 01:02:40.497485
3117 01:02:40.499315 RX Delay -29 -> 252, step: 4
3118 01:02:40.499774
3119 01:02:40.502318 Set Vref, RX VrefLevel [Byte0]: 32
3120 01:02:40.505657 [Byte1]: 32
3121 01:02:40.510117
3122 01:02:40.510666 Set Vref, RX VrefLevel [Byte0]: 33
3123 01:02:40.512910 [Byte1]: 33
3124 01:02:40.517743
3125 01:02:40.518199 Set Vref, RX VrefLevel [Byte0]: 34
3126 01:02:40.525395 [Byte1]: 34
3127 01:02:40.525949
3128 01:02:40.527443 Set Vref, RX VrefLevel [Byte0]: 35
3129 01:02:40.530685 [Byte1]: 35
3130 01:02:40.531147
3131 01:02:40.534052 Set Vref, RX VrefLevel [Byte0]: 36
3132 01:02:40.538095 [Byte1]: 36
3133 01:02:40.541648
3134 01:02:40.542201 Set Vref, RX VrefLevel [Byte0]: 37
3135 01:02:40.545269 [Byte1]: 37
3136 01:02:40.550520
3137 01:02:40.551070 Set Vref, RX VrefLevel [Byte0]: 38
3138 01:02:40.553012 [Byte1]: 38
3139 01:02:40.557609
3140 01:02:40.558157 Set Vref, RX VrefLevel [Byte0]: 39
3141 01:02:40.561178 [Byte1]: 39
3142 01:02:40.565494
3143 01:02:40.566047 Set Vref, RX VrefLevel [Byte0]: 40
3144 01:02:40.568920 [Byte1]: 40
3145 01:02:40.573571
3146 01:02:40.574124 Set Vref, RX VrefLevel [Byte0]: 41
3147 01:02:40.576617 [Byte1]: 41
3148 01:02:40.582711
3149 01:02:40.583468 Set Vref, RX VrefLevel [Byte0]: 42
3150 01:02:40.585191 [Byte1]: 42
3151 01:02:40.590659
3152 01:02:40.591145 Set Vref, RX VrefLevel [Byte0]: 43
3153 01:02:40.592291 [Byte1]: 43
3154 01:02:40.597322
3155 01:02:40.597863 Set Vref, RX VrefLevel [Byte0]: 44
3156 01:02:40.601064 [Byte1]: 44
3157 01:02:40.605428
3158 01:02:40.605879 Set Vref, RX VrefLevel [Byte0]: 45
3159 01:02:40.608758 [Byte1]: 45
3160 01:02:40.613445
3161 01:02:40.614000 Set Vref, RX VrefLevel [Byte0]: 46
3162 01:02:40.616770 [Byte1]: 46
3163 01:02:40.620996
3164 01:02:40.621546 Set Vref, RX VrefLevel [Byte0]: 47
3165 01:02:40.625917 [Byte1]: 47
3166 01:02:40.629129
3167 01:02:40.629581 Set Vref, RX VrefLevel [Byte0]: 48
3168 01:02:40.632124 [Byte1]: 48
3169 01:02:40.636697
3170 01:02:40.637168 Set Vref, RX VrefLevel [Byte0]: 49
3171 01:02:40.640407 [Byte1]: 49
3172 01:02:40.644878
3173 01:02:40.645427 Set Vref, RX VrefLevel [Byte0]: 50
3174 01:02:40.648662 [Byte1]: 50
3175 01:02:40.653434
3176 01:02:40.656841 Set Vref, RX VrefLevel [Byte0]: 51
3177 01:02:40.659420 [Byte1]: 51
3178 01:02:40.659967
3179 01:02:40.663480 Set Vref, RX VrefLevel [Byte0]: 52
3180 01:02:40.666286 [Byte1]: 52
3181 01:02:40.666836
3182 01:02:40.669629 Set Vref, RX VrefLevel [Byte0]: 53
3183 01:02:40.672626 [Byte1]: 53
3184 01:02:40.677030
3185 01:02:40.677582 Set Vref, RX VrefLevel [Byte0]: 54
3186 01:02:40.679804 [Byte1]: 54
3187 01:02:40.685216
3188 01:02:40.685767 Set Vref, RX VrefLevel [Byte0]: 55
3189 01:02:40.687865 [Byte1]: 55
3190 01:02:40.693049
3191 01:02:40.693605 Set Vref, RX VrefLevel [Byte0]: 56
3192 01:02:40.697617 [Byte1]: 56
3193 01:02:40.700884
3194 01:02:40.701441 Set Vref, RX VrefLevel [Byte0]: 57
3195 01:02:40.704441 [Byte1]: 57
3196 01:02:40.709159
3197 01:02:40.709711 Set Vref, RX VrefLevel [Byte0]: 58
3198 01:02:40.711888 [Byte1]: 58
3199 01:02:40.716424
3200 01:02:40.717039 Set Vref, RX VrefLevel [Byte0]: 59
3201 01:02:40.719960 [Byte1]: 59
3202 01:02:40.724350
3203 01:02:40.724860 Set Vref, RX VrefLevel [Byte0]: 60
3204 01:02:40.727960 [Byte1]: 60
3205 01:02:40.733170
3206 01:02:40.733636 Set Vref, RX VrefLevel [Byte0]: 61
3207 01:02:40.735832 [Byte1]: 61
3208 01:02:40.740659
3209 01:02:40.741195 Set Vref, RX VrefLevel [Byte0]: 62
3210 01:02:40.743491 [Byte1]: 62
3211 01:02:40.748790
3212 01:02:40.749560 Set Vref, RX VrefLevel [Byte0]: 63
3213 01:02:40.751431 [Byte1]: 63
3214 01:02:40.756845
3215 01:02:40.757397 Set Vref, RX VrefLevel [Byte0]: 64
3216 01:02:40.759495 [Byte1]: 64
3217 01:02:40.764467
3218 01:02:40.765068 Set Vref, RX VrefLevel [Byte0]: 65
3219 01:02:40.767725 [Byte1]: 65
3220 01:02:40.772370
3221 01:02:40.772968 Set Vref, RX VrefLevel [Byte0]: 66
3222 01:02:40.775832 [Byte1]: 66
3223 01:02:40.780930
3224 01:02:40.781480 Set Vref, RX VrefLevel [Byte0]: 67
3225 01:02:40.784057 [Byte1]: 67
3226 01:02:40.789553
3227 01:02:40.790105 Set Vref, RX VrefLevel [Byte0]: 68
3228 01:02:40.791290 [Byte1]: 68
3229 01:02:40.796978
3230 01:02:40.797534 Final RX Vref Byte 0 = 56 to rank0
3231 01:02:40.799574 Final RX Vref Byte 1 = 48 to rank0
3232 01:02:40.802993 Final RX Vref Byte 0 = 56 to rank1
3233 01:02:40.806536 Final RX Vref Byte 1 = 48 to rank1==
3234 01:02:40.810434 Dram Type= 6, Freq= 0, CH_1, rank 0
3235 01:02:40.815970 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3236 01:02:40.816427 ==
3237 01:02:40.816827 DQS Delay:
3238 01:02:40.817168 DQS0 = 0, DQS1 = 0
3239 01:02:40.819798 DQM Delay:
3240 01:02:40.820349 DQM0 = 113, DQM1 = 104
3241 01:02:40.823145 DQ Delay:
3242 01:02:40.826243 DQ0 =118, DQ1 =108, DQ2 =106, DQ3 =112
3243 01:02:40.829758 DQ4 =112, DQ5 =122, DQ6 =120, DQ7 =112
3244 01:02:40.832660 DQ8 =86, DQ9 =94, DQ10 =108, DQ11 =96
3245 01:02:40.835757 DQ12 =112, DQ13 =116, DQ14 =114, DQ15 =112
3246 01:02:40.836209
3247 01:02:40.836565
3248 01:02:40.842450 [DQSOSCAuto] RK0, (LSB)MR18= 0x1b1b, (MSB)MR19= 0x404, tDQSOscB0 = 399 ps tDQSOscB1 = 399 ps
3249 01:02:40.846394 CH1 RK0: MR19=404, MR18=1B1B
3250 01:02:40.852885 CH1_RK0: MR19=0x404, MR18=0x1B1B, DQSOSC=399, MR23=63, INC=41, DEC=27
3251 01:02:40.853431
3252 01:02:40.855913 ----->DramcWriteLeveling(PI) begin...
3253 01:02:40.856475 ==
3254 01:02:40.859368 Dram Type= 6, Freq= 0, CH_1, rank 1
3255 01:02:40.862594 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3256 01:02:40.866781 ==
3257 01:02:40.867362 Write leveling (Byte 0): 21 => 21
3258 01:02:40.869307 Write leveling (Byte 1): 22 => 22
3259 01:02:40.872901 DramcWriteLeveling(PI) end<-----
3260 01:02:40.873449
3261 01:02:40.873808 ==
3262 01:02:40.876205 Dram Type= 6, Freq= 0, CH_1, rank 1
3263 01:02:40.882576 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3264 01:02:40.883180 ==
3265 01:02:40.883551 [Gating] SW mode calibration
3266 01:02:40.892283 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 24 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
3267 01:02:40.896052 RX_Path_delay_UI(43) -3 - DQSINCTL_UI(32) = u1StartUI(11)
3268 01:02:40.899292 0 11 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3269 01:02:40.906093 0 11 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3270 01:02:40.909339 0 11 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3271 01:02:40.913103 0 11 12 | B1->B0 | 3434 2e2e | 1 1 | (1 1) (1 0)
3272 01:02:40.919631 0 11 16 | B1->B0 | 2e2e 2323 | 0 0 | (1 0) (0 0)
3273 01:02:40.922833 0 11 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3274 01:02:40.925691 0 11 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3275 01:02:40.932791 0 11 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3276 01:02:40.935749 0 12 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3277 01:02:40.938986 0 12 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3278 01:02:40.945682 0 12 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3279 01:02:40.949834 0 12 12 | B1->B0 | 2323 3535 | 0 1 | (0 0) (0 0)
3280 01:02:40.952642 0 12 16 | B1->B0 | 3a3a 4646 | 0 0 | (0 0) (0 0)
3281 01:02:40.959072 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3282 01:02:40.962361 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3283 01:02:40.966295 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3284 01:02:40.973150 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3285 01:02:40.975871 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3286 01:02:40.979339 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3287 01:02:40.987098 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
3288 01:02:40.989209 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
3289 01:02:40.992933 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3290 01:02:40.999172 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3291 01:02:41.003529 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3292 01:02:41.005468 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3293 01:02:41.008935 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3294 01:02:41.015620 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3295 01:02:41.018688 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3296 01:02:41.022004 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3297 01:02:41.029011 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3298 01:02:41.031813 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3299 01:02:41.035990 0 14 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3300 01:02:41.041848 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3301 01:02:41.046183 0 15 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3302 01:02:41.048798 0 15 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3303 01:02:41.055885 0 15 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3304 01:02:41.060050 0 15 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
3305 01:02:41.062293 Total UI for P1: 0, mck2ui 16
3306 01:02:41.065978 best dqsien dly found for B0: ( 0, 15, 12)
3307 01:02:41.068768 0 15 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3308 01:02:41.071920 Total UI for P1: 0, mck2ui 16
3309 01:02:41.075645 best dqsien dly found for B1: ( 0, 15, 14)
3310 01:02:41.078355 best DQS0 dly(MCK, UI, PI) = (0, 15, 12)
3311 01:02:41.081766 best DQS1 dly(MCK, UI, PI) = (0, 15, 14)
3312 01:02:41.085624
3313 01:02:41.088203 best DQS0 P1 dly(MCK, UI, PI) = (1, 3, 12)
3314 01:02:41.091960 best DQS1 P1 dly(MCK, UI, PI) = (1, 3, 14)
3315 01:02:41.096138 [Gating] SW calibration Done
3316 01:02:41.096688 ==
3317 01:02:41.098938 Dram Type= 6, Freq= 0, CH_1, rank 1
3318 01:02:41.102093 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3319 01:02:41.102638 ==
3320 01:02:41.103000 RX Vref Scan: 0
3321 01:02:41.105124
3322 01:02:41.105590 RX Vref 0 -> 0, step: 1
3323 01:02:41.105947
3324 01:02:41.108478 RX Delay -40 -> 252, step: 8
3325 01:02:41.112108 iDelay=208, Bit 0, Center 119 (48 ~ 191) 144
3326 01:02:41.114851 iDelay=208, Bit 1, Center 115 (40 ~ 191) 152
3327 01:02:41.122097 iDelay=208, Bit 2, Center 107 (32 ~ 183) 152
3328 01:02:41.125078 iDelay=208, Bit 3, Center 119 (48 ~ 191) 144
3329 01:02:41.128686 iDelay=208, Bit 4, Center 115 (40 ~ 191) 152
3330 01:02:41.132543 iDelay=208, Bit 5, Center 131 (56 ~ 207) 152
3331 01:02:41.134729 iDelay=208, Bit 6, Center 123 (48 ~ 199) 152
3332 01:02:41.141782 iDelay=208, Bit 7, Center 115 (40 ~ 191) 152
3333 01:02:41.144628 iDelay=208, Bit 8, Center 91 (16 ~ 167) 152
3334 01:02:41.148544 iDelay=208, Bit 9, Center 95 (24 ~ 167) 144
3335 01:02:41.151693 iDelay=208, Bit 10, Center 103 (32 ~ 175) 144
3336 01:02:41.155283 iDelay=208, Bit 11, Center 103 (32 ~ 175) 144
3337 01:02:41.162443 iDelay=208, Bit 12, Center 115 (40 ~ 191) 152
3338 01:02:41.165960 iDelay=208, Bit 13, Center 119 (48 ~ 191) 144
3339 01:02:41.168498 iDelay=208, Bit 14, Center 115 (40 ~ 191) 152
3340 01:02:41.172412 iDelay=208, Bit 15, Center 115 (48 ~ 183) 136
3341 01:02:41.173024 ==
3342 01:02:41.175366 Dram Type= 6, Freq= 0, CH_1, rank 1
3343 01:02:41.178917 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3344 01:02:41.181982 ==
3345 01:02:41.182545 DQS Delay:
3346 01:02:41.182905 DQS0 = 0, DQS1 = 0
3347 01:02:41.184822 DQM Delay:
3348 01:02:41.185274 DQM0 = 118, DQM1 = 107
3349 01:02:41.188416 DQ Delay:
3350 01:02:41.192093 DQ0 =119, DQ1 =115, DQ2 =107, DQ3 =119
3351 01:02:41.195205 DQ4 =115, DQ5 =131, DQ6 =123, DQ7 =115
3352 01:02:41.198378 DQ8 =91, DQ9 =95, DQ10 =103, DQ11 =103
3353 01:02:41.201888 DQ12 =115, DQ13 =119, DQ14 =115, DQ15 =115
3354 01:02:41.202459
3355 01:02:41.202828
3356 01:02:41.203166 ==
3357 01:02:41.205027 Dram Type= 6, Freq= 0, CH_1, rank 1
3358 01:02:41.209246 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3359 01:02:41.209722 ==
3360 01:02:41.210091
3361 01:02:41.210431
3362 01:02:41.212407 TX Vref Scan disable
3363 01:02:41.215605 == TX Byte 0 ==
3364 01:02:41.218648 Update DQ dly =839 (3 ,1, 39) DQ OEN =(2 ,6)
3365 01:02:41.223567 Update DQM dly =839 (3 ,1, 39) DQM OEN =(2 ,6)
3366 01:02:41.226079 == TX Byte 1 ==
3367 01:02:41.228221 Update DQ dly =839 (3 ,1, 39) DQ OEN =(2 ,6)
3368 01:02:41.231825 Update DQM dly =839 (3 ,1, 39) DQM OEN =(2 ,6)
3369 01:02:41.232400 ==
3370 01:02:41.235067 Dram Type= 6, Freq= 0, CH_1, rank 1
3371 01:02:41.241249 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3372 01:02:41.241712 ==
3373 01:02:41.251975 TX Vref=22, minBit 1, minWin=25, winSum=420
3374 01:02:41.255524 TX Vref=24, minBit 0, minWin=26, winSum=427
3375 01:02:41.258865 TX Vref=26, minBit 3, minWin=26, winSum=430
3376 01:02:41.262163 TX Vref=28, minBit 0, minWin=26, winSum=433
3377 01:02:41.265170 TX Vref=30, minBit 0, minWin=26, winSum=431
3378 01:02:41.269059 TX Vref=32, minBit 0, minWin=26, winSum=434
3379 01:02:41.275757 [TxChooseVref] Worse bit 0, Min win 26, Win sum 434, Final Vref 32
3380 01:02:41.276314
3381 01:02:41.279728 Final TX Range 1 Vref 32
3382 01:02:41.280284
3383 01:02:41.280654 ==
3384 01:02:41.281886 Dram Type= 6, Freq= 0, CH_1, rank 1
3385 01:02:41.285805 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3386 01:02:41.286360 ==
3387 01:02:41.286730
3388 01:02:41.289087
3389 01:02:41.289648 TX Vref Scan disable
3390 01:02:41.291660 == TX Byte 0 ==
3391 01:02:41.295200 Update DQ dly =838 (3 ,1, 38) DQ OEN =(2 ,6)
3392 01:02:41.298843 Update DQM dly =838 (3 ,1, 38) DQM OEN =(2 ,6)
3393 01:02:41.302095 == TX Byte 1 ==
3394 01:02:41.305749 Update DQ dly =838 (3 ,1, 38) DQ OEN =(2 ,6)
3395 01:02:41.308658 Update DQM dly =838 (3 ,1, 38) DQM OEN =(2 ,6)
3396 01:02:41.309207
3397 01:02:41.312053 [DATLAT]
3398 01:02:41.312601 Freq=1200, CH1 RK1
3399 01:02:41.313051
3400 01:02:41.315429 DATLAT Default: 0xc
3401 01:02:41.315896 0, 0xFFFF, sum = 0
3402 01:02:41.319184 1, 0xFFFF, sum = 0
3403 01:02:41.319765 2, 0xFFFF, sum = 0
3404 01:02:41.321594 3, 0xFFFF, sum = 0
3405 01:02:41.322055 4, 0xFFFF, sum = 0
3406 01:02:41.325320 5, 0xFFFF, sum = 0
3407 01:02:41.325781 6, 0xFFFF, sum = 0
3408 01:02:41.330025 7, 0xFFFF, sum = 0
3409 01:02:41.330488 8, 0xFFFF, sum = 0
3410 01:02:41.331544 9, 0xFFFF, sum = 0
3411 01:02:41.334801 10, 0xFFFF, sum = 0
3412 01:02:41.335262 11, 0x0, sum = 1
3413 01:02:41.335633 12, 0x0, sum = 2
3414 01:02:41.338707 13, 0x0, sum = 3
3415 01:02:41.339168 14, 0x0, sum = 4
3416 01:02:41.341709 best_step = 12
3417 01:02:41.342160
3418 01:02:41.342520 ==
3419 01:02:41.345559 Dram Type= 6, Freq= 0, CH_1, rank 1
3420 01:02:41.349148 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3421 01:02:41.349706 ==
3422 01:02:41.352259 RX Vref Scan: 0
3423 01:02:41.352856
3424 01:02:41.353230 RX Vref 0 -> 0, step: 1
3425 01:02:41.353571
3426 01:02:41.355842 RX Delay -29 -> 252, step: 4
3427 01:02:41.362291 iDelay=199, Bit 0, Center 116 (47 ~ 186) 140
3428 01:02:41.365275 iDelay=199, Bit 1, Center 112 (43 ~ 182) 140
3429 01:02:41.369096 iDelay=199, Bit 2, Center 110 (43 ~ 178) 136
3430 01:02:41.372565 iDelay=199, Bit 3, Center 112 (43 ~ 182) 140
3431 01:02:41.375951 iDelay=199, Bit 4, Center 114 (43 ~ 186) 144
3432 01:02:41.382124 iDelay=199, Bit 5, Center 126 (55 ~ 198) 144
3433 01:02:41.385375 iDelay=199, Bit 6, Center 122 (51 ~ 194) 144
3434 01:02:41.388907 iDelay=199, Bit 7, Center 112 (43 ~ 182) 140
3435 01:02:41.392860 iDelay=199, Bit 8, Center 88 (23 ~ 154) 132
3436 01:02:41.395498 iDelay=199, Bit 9, Center 90 (23 ~ 158) 136
3437 01:02:41.402329 iDelay=199, Bit 10, Center 106 (39 ~ 174) 136
3438 01:02:41.405702 iDelay=199, Bit 11, Center 98 (31 ~ 166) 136
3439 01:02:41.408446 iDelay=199, Bit 12, Center 114 (47 ~ 182) 136
3440 01:02:41.411669 iDelay=199, Bit 13, Center 114 (51 ~ 178) 128
3441 01:02:41.414973 iDelay=199, Bit 14, Center 116 (51 ~ 182) 132
3442 01:02:41.421845 iDelay=199, Bit 15, Center 114 (51 ~ 178) 128
3443 01:02:41.422417 ==
3444 01:02:41.424633 Dram Type= 6, Freq= 0, CH_1, rank 1
3445 01:02:41.428384 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3446 01:02:41.428999 ==
3447 01:02:41.429365 DQS Delay:
3448 01:02:41.431369 DQS0 = 0, DQS1 = 0
3449 01:02:41.431823 DQM Delay:
3450 01:02:41.435038 DQM0 = 115, DQM1 = 105
3451 01:02:41.435525 DQ Delay:
3452 01:02:41.438731 DQ0 =116, DQ1 =112, DQ2 =110, DQ3 =112
3453 01:02:41.442337 DQ4 =114, DQ5 =126, DQ6 =122, DQ7 =112
3454 01:02:41.444842 DQ8 =88, DQ9 =90, DQ10 =106, DQ11 =98
3455 01:02:41.448334 DQ12 =114, DQ13 =114, DQ14 =116, DQ15 =114
3456 01:02:41.448838
3457 01:02:41.449205
3458 01:02:41.458420 [DQSOSCAuto] RK1, (LSB)MR18= 0x707, (MSB)MR19= 0x404, tDQSOscB0 = 407 ps tDQSOscB1 = 407 ps
3459 01:02:41.461990 CH1 RK1: MR19=404, MR18=707
3460 01:02:41.465177 CH1_RK1: MR19=0x404, MR18=0x707, DQSOSC=407, MR23=63, INC=39, DEC=26
3461 01:02:41.468531 [RxdqsGatingPostProcess] freq 1200
3462 01:02:41.475246 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
3463 01:02:41.479558 Pre-setting of DQS Precalculation
3464 01:02:41.482304 [DualRankRxdatlatCal] RK0: 12, RK1: 12, Final_Datlat 12
3465 01:02:41.491746 sync_frequency_calibration_params sync calibration params of frequency 1200 to shu:2
3466 01:02:41.498396 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
3467 01:02:41.498958
3468 01:02:41.499318
3469 01:02:41.501343 [Calibration Summary] 2400 Mbps
3470 01:02:41.501798 CH 0, Rank 0
3471 01:02:41.504877 SW Impedance : PASS
3472 01:02:41.505431 DUTY Scan : NO K
3473 01:02:41.508263 ZQ Calibration : PASS
3474 01:02:41.511862 Jitter Meter : NO K
3475 01:02:41.512318 CBT Training : PASS
3476 01:02:41.515157 Write leveling : PASS
3477 01:02:41.518183 RX DQS gating : PASS
3478 01:02:41.518737 RX DQ/DQS(RDDQC) : PASS
3479 01:02:41.521312 TX DQ/DQS : PASS
3480 01:02:41.524492 RX DATLAT : PASS
3481 01:02:41.525006 RX DQ/DQS(Engine): PASS
3482 01:02:41.528186 TX OE : NO K
3483 01:02:41.528825 All Pass.
3484 01:02:41.529207
3485 01:02:41.531722 CH 0, Rank 1
3486 01:02:41.532172 SW Impedance : PASS
3487 01:02:41.535212 DUTY Scan : NO K
3488 01:02:41.538669 ZQ Calibration : PASS
3489 01:02:41.539228 Jitter Meter : NO K
3490 01:02:41.543102 CBT Training : PASS
3491 01:02:41.543558 Write leveling : PASS
3492 01:02:41.544376 RX DQS gating : PASS
3493 01:02:41.547995 RX DQ/DQS(RDDQC) : PASS
3494 01:02:41.548554 TX DQ/DQS : PASS
3495 01:02:41.551376 RX DATLAT : PASS
3496 01:02:41.554709 RX DQ/DQS(Engine): PASS
3497 01:02:41.555263 TX OE : NO K
3498 01:02:41.558075 All Pass.
3499 01:02:41.558529
3500 01:02:41.558884 CH 1, Rank 0
3501 01:02:41.561217 SW Impedance : PASS
3502 01:02:41.561695 DUTY Scan : NO K
3503 01:02:41.565406 ZQ Calibration : PASS
3504 01:02:41.567901 Jitter Meter : NO K
3505 01:02:41.568459 CBT Training : PASS
3506 01:02:41.571850 Write leveling : PASS
3507 01:02:41.576429 RX DQS gating : PASS
3508 01:02:41.577064 RX DQ/DQS(RDDQC) : PASS
3509 01:02:41.578578 TX DQ/DQS : PASS
3510 01:02:41.582260 RX DATLAT : PASS
3511 01:02:41.582820 RX DQ/DQS(Engine): PASS
3512 01:02:41.585607 TX OE : NO K
3513 01:02:41.586163 All Pass.
3514 01:02:41.586528
3515 01:02:41.588560 CH 1, Rank 1
3516 01:02:41.589163 SW Impedance : PASS
3517 01:02:41.591129 DUTY Scan : NO K
3518 01:02:41.591583 ZQ Calibration : PASS
3519 01:02:41.594928 Jitter Meter : NO K
3520 01:02:41.598057 CBT Training : PASS
3521 01:02:41.598613 Write leveling : PASS
3522 01:02:41.601577 RX DQS gating : PASS
3523 01:02:41.605112 RX DQ/DQS(RDDQC) : PASS
3524 01:02:41.605661 TX DQ/DQS : PASS
3525 01:02:41.608044 RX DATLAT : PASS
3526 01:02:41.611943 RX DQ/DQS(Engine): PASS
3527 01:02:41.612395 TX OE : NO K
3528 01:02:41.614563 All Pass.
3529 01:02:41.615120
3530 01:02:41.615481 DramC Write-DBI off
3531 01:02:41.618520 PER_BANK_REFRESH: Hybrid Mode
3532 01:02:41.619077 TX_TRACKING: ON
3533 01:02:41.628243 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 72, TRFC_05T 1, TXREFCNT 87, TRFCpb 30, TRFCpb_05T 1
3534 01:02:41.631079 [FAST_K] Save calibration result to emmc
3535 01:02:41.634968 dramc_set_vcore_voltage set vcore to 650000
3536 01:02:41.638433 Read voltage for 600, 5
3537 01:02:41.638989 Vio18 = 0
3538 01:02:41.641329 Vcore = 650000
3539 01:02:41.641884 Vdram = 0
3540 01:02:41.642246 Vddq = 0
3541 01:02:41.645132 Vmddr = 0
3542 01:02:41.647733 [FAST_K] DramcSave_Time_For_Cal_Init SHU4, femmc_Ready=0
3543 01:02:41.654602 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
3544 01:02:41.655195 MEM_TYPE=3, freq_sel=19
3545 01:02:41.658612 sv_algorithm_assistance_LP4_1600
3546 01:02:41.661251 ============ PULL DRAM RESETB DOWN ============
3547 01:02:41.667916 ========== PULL DRAM RESETB DOWN end =========
3548 01:02:41.671653 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3549 01:02:41.675331 ===================================
3550 01:02:41.677929 LPDDR4 DRAM CONFIGURATION
3551 01:02:41.681671 ===================================
3552 01:02:41.682232 EX_ROW_EN[0] = 0x0
3553 01:02:41.684571 EX_ROW_EN[1] = 0x0
3554 01:02:41.685191 LP4Y_EN = 0x0
3555 01:02:41.687994 WORK_FSP = 0x0
3556 01:02:41.690895 WL = 0x2
3557 01:02:41.691363 RL = 0x2
3558 01:02:41.695017 BL = 0x2
3559 01:02:41.695573 RPST = 0x0
3560 01:02:41.698596 RD_PRE = 0x0
3561 01:02:41.699153 WR_PRE = 0x1
3562 01:02:41.701701 WR_PST = 0x0
3563 01:02:41.702246 DBI_WR = 0x0
3564 01:02:41.704638 DBI_RD = 0x0
3565 01:02:41.705235 OTF = 0x1
3566 01:02:41.708434 ===================================
3567 01:02:41.711556 ===================================
3568 01:02:41.715138 ANA top config
3569 01:02:41.717907 ===================================
3570 01:02:41.718460 DLL_ASYNC_EN = 0
3571 01:02:41.721941 ALL_SLAVE_EN = 1
3572 01:02:41.724828 NEW_RANK_MODE = 1
3573 01:02:41.728868 DLL_IDLE_MODE = 1
3574 01:02:41.729414 LP45_APHY_COMB_EN = 1
3575 01:02:41.730930 TX_ODT_DIS = 1
3576 01:02:41.734535 NEW_8X_MODE = 1
3577 01:02:41.738643 ===================================
3578 01:02:41.741382 ===================================
3579 01:02:41.744429 data_rate = 1200
3580 01:02:41.749191 CKR = 1
3581 01:02:41.750512 DQ_P2S_RATIO = 8
3582 01:02:41.755700 ===================================
3583 01:02:41.756259 CA_P2S_RATIO = 8
3584 01:02:41.757110 DQ_CA_OPEN = 0
3585 01:02:41.761370 DQ_SEMI_OPEN = 0
3586 01:02:41.764249 CA_SEMI_OPEN = 0
3587 01:02:41.767805 CA_FULL_RATE = 0
3588 01:02:41.770716 DQ_CKDIV4_EN = 1
3589 01:02:41.771174 CA_CKDIV4_EN = 1
3590 01:02:41.773882 CA_PREDIV_EN = 0
3591 01:02:41.777605 PH8_DLY = 0
3592 01:02:41.780613 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
3593 01:02:41.783761 DQ_AAMCK_DIV = 4
3594 01:02:41.788848 CA_AAMCK_DIV = 4
3595 01:02:41.789396 CA_ADMCK_DIV = 4
3596 01:02:41.791361 DQ_TRACK_CA_EN = 0
3597 01:02:41.793945 CA_PICK = 600
3598 01:02:41.797122 CA_MCKIO = 600
3599 01:02:41.800573 MCKIO_SEMI = 0
3600 01:02:41.804403 PLL_FREQ = 2288
3601 01:02:41.806666 DQ_UI_PI_RATIO = 32
3602 01:02:41.807118 CA_UI_PI_RATIO = 0
3603 01:02:41.810137 ===================================
3604 01:02:41.813093 ===================================
3605 01:02:41.817602 memory_type:LPDDR4
3606 01:02:41.821185 GP_NUM : 10
3607 01:02:41.821738 SRAM_EN : 1
3608 01:02:41.823068 MD32_EN : 0
3609 01:02:41.826857 ===================================
3610 01:02:41.831054 [ANA_INIT] >>>>>>>>>>>>>>
3611 01:02:41.834036 <<<<<< [CONFIGURE PHASE]: ANA_TX
3612 01:02:41.836276 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
3613 01:02:41.840160 ===================================
3614 01:02:41.843697 data_rate = 1200,PCW = 0X5800
3615 01:02:41.846367 ===================================
3616 01:02:41.850358 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
3617 01:02:41.853453 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3618 01:02:41.860753 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3619 01:02:41.863557 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
3620 01:02:41.866482 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
3621 01:02:41.870206 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
3622 01:02:41.873237 [ANA_INIT] flow start
3623 01:02:41.876415 [ANA_INIT] PLL >>>>>>>>
3624 01:02:41.877034 [ANA_INIT] PLL <<<<<<<<
3625 01:02:41.879902 [ANA_INIT] MIDPI >>>>>>>>
3626 01:02:41.883209 [ANA_INIT] MIDPI <<<<<<<<
3627 01:02:41.883772 [ANA_INIT] DLL >>>>>>>>
3628 01:02:41.885960 [ANA_INIT] flow end
3629 01:02:41.890775 ============ LP4 DIFF to SE enter ============
3630 01:02:41.893620 ============ LP4 DIFF to SE exit ============
3631 01:02:41.896162 [ANA_INIT] <<<<<<<<<<<<<
3632 01:02:41.899869 [Flow] Enable top DCM control >>>>>
3633 01:02:41.903218 [Flow] Enable top DCM control <<<<<
3634 01:02:41.906062 Enable DLL master slave shuffle
3635 01:02:41.912774 ==============================================================
3636 01:02:41.913313 Gating Mode config
3637 01:02:41.919213 ==============================================================
3638 01:02:41.923048 Config description:
3639 01:02:41.929527 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
3640 01:02:41.936443 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
3641 01:02:41.943000 SELPH_MODE 0: By rank 1: By Phase
3642 01:02:41.949696 ==============================================================
3643 01:02:41.952365 GAT_TRACK_EN = 1
3644 01:02:41.952979 RX_GATING_MODE = 2
3645 01:02:41.956639 RX_GATING_TRACK_MODE = 2
3646 01:02:41.960168 SELPH_MODE = 1
3647 01:02:41.962369 PICG_EARLY_EN = 1
3648 01:02:41.965406 VALID_LAT_VALUE = 1
3649 01:02:41.971988 ==============================================================
3650 01:02:41.975571 Enter into Gating configuration >>>>
3651 01:02:41.979053 Exit from Gating configuration <<<<
3652 01:02:41.982060 Enter into DVFS_PRE_config >>>>>
3653 01:02:41.991808 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
3654 01:02:41.995435 Exit from DVFS_PRE_config <<<<<
3655 01:02:41.999520 Enter into PICG configuration >>>>
3656 01:02:42.002023 Exit from PICG configuration <<<<
3657 01:02:42.005192 [RX_INPUT] configuration >>>>>
3658 01:02:42.009429 [RX_INPUT] configuration <<<<<
3659 01:02:42.011957 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
3660 01:02:42.018231 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
3661 01:02:42.025435 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
3662 01:02:42.031945 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
3663 01:02:42.035029 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
3664 01:02:42.041316 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
3665 01:02:42.045303 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
3666 01:02:42.052124 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
3667 01:02:42.054920 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
3668 01:02:42.057995 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
3669 01:02:42.061397 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
3670 01:02:42.068646 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3671 01:02:42.071443 ===================================
3672 01:02:42.074566 LPDDR4 DRAM CONFIGURATION
3673 01:02:42.078270 ===================================
3674 01:02:42.078834 EX_ROW_EN[0] = 0x0
3675 01:02:42.081848 EX_ROW_EN[1] = 0x0
3676 01:02:42.082405 LP4Y_EN = 0x0
3677 01:02:42.084511 WORK_FSP = 0x0
3678 01:02:42.085152 WL = 0x2
3679 01:02:42.087548 RL = 0x2
3680 01:02:42.088003 BL = 0x2
3681 01:02:42.091517 RPST = 0x0
3682 01:02:42.092081 RD_PRE = 0x0
3683 01:02:42.094775 WR_PRE = 0x1
3684 01:02:42.095333 WR_PST = 0x0
3685 01:02:42.097541 DBI_WR = 0x0
3686 01:02:42.098047 DBI_RD = 0x0
3687 01:02:42.101119 OTF = 0x1
3688 01:02:42.104524 ===================================
3689 01:02:42.108079 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
3690 01:02:42.110860 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
3691 01:02:42.117740 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3692 01:02:42.120836 ===================================
3693 01:02:42.121401 LPDDR4 DRAM CONFIGURATION
3694 01:02:42.124148 ===================================
3695 01:02:42.127600 EX_ROW_EN[0] = 0x10
3696 01:02:42.131491 EX_ROW_EN[1] = 0x0
3697 01:02:42.132050 LP4Y_EN = 0x0
3698 01:02:42.134102 WORK_FSP = 0x0
3699 01:02:42.134563 WL = 0x2
3700 01:02:42.137471 RL = 0x2
3701 01:02:42.137926 BL = 0x2
3702 01:02:42.140796 RPST = 0x0
3703 01:02:42.141361 RD_PRE = 0x0
3704 01:02:42.144160 WR_PRE = 0x1
3705 01:02:42.144620 WR_PST = 0x0
3706 01:02:42.147400 DBI_WR = 0x0
3707 01:02:42.147890 DBI_RD = 0x0
3708 01:02:42.151313 OTF = 0x1
3709 01:02:42.153968 ===================================
3710 01:02:42.160758 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
3711 01:02:42.164033 nWR fixed to 30
3712 01:02:42.167643 [ModeRegInit_LP4] CH0 RK0
3713 01:02:42.168220 [ModeRegInit_LP4] CH0 RK1
3714 01:02:42.170725 [ModeRegInit_LP4] CH1 RK0
3715 01:02:42.174178 [ModeRegInit_LP4] CH1 RK1
3716 01:02:42.174752 match AC timing 16
3717 01:02:42.180686 dramType 5, freq 600, readDBI 0, DivMode 1, cbtMode 0
3718 01:02:42.184135 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3719 01:02:42.187816 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
3720 01:02:42.193682 [TX_path_calculate] data rate=1200, WL=8, DQS_TotalUI=17
3721 01:02:42.197621 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
3722 01:02:42.198185 ==
3723 01:02:42.200737 Dram Type= 6, Freq= 0, CH_0, rank 0
3724 01:02:42.203632 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3725 01:02:42.204198 ==
3726 01:02:42.210084 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3727 01:02:42.216512 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=39, u1VrefScanEnd=39
3728 01:02:42.219964 [CA 0] Center 35 (5~66) winsize 62
3729 01:02:42.223546 [CA 1] Center 35 (5~66) winsize 62
3730 01:02:42.226478 [CA 2] Center 34 (4~65) winsize 62
3731 01:02:42.229501 [CA 3] Center 34 (3~65) winsize 63
3732 01:02:42.232825 [CA 4] Center 34 (3~65) winsize 63
3733 01:02:42.236101 [CA 5] Center 33 (3~64) winsize 62
3734 01:02:42.236619
3735 01:02:42.240020 [CmdBusTrainingLP45] Vref(ca) range 1: 39
3736 01:02:42.240581
3737 01:02:42.243119 [CATrainingPosCal] consider 1 rank data
3738 01:02:42.246177 u2DelayCellTimex100 = 270/100 ps
3739 01:02:42.249547 CA0 delay=35 (5~66),Diff = 2 PI (19 cell)
3740 01:02:42.253453 CA1 delay=35 (5~66),Diff = 2 PI (19 cell)
3741 01:02:42.256931 CA2 delay=34 (4~65),Diff = 1 PI (9 cell)
3742 01:02:42.260532 CA3 delay=34 (3~65),Diff = 1 PI (9 cell)
3743 01:02:42.266329 CA4 delay=34 (3~65),Diff = 1 PI (9 cell)
3744 01:02:42.269112 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
3745 01:02:42.269574
3746 01:02:42.272626 CA PerBit enable=1, Macro0, CA PI delay=33
3747 01:02:42.273247
3748 01:02:42.276898 [CBTSetCACLKResult] CA Dly = 33
3749 01:02:42.277469 CS Dly: 5 (0~36)
3750 01:02:42.277838 ==
3751 01:02:42.279105 Dram Type= 6, Freq= 0, CH_0, rank 1
3752 01:02:42.285854 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3753 01:02:42.286419 ==
3754 01:02:42.289105 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3755 01:02:42.296288 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=39, u1VrefScanEnd=39
3756 01:02:42.299660 [CA 0] Center 35 (5~66) winsize 62
3757 01:02:42.302763 [CA 1] Center 35 (5~66) winsize 62
3758 01:02:42.305923 [CA 2] Center 34 (4~65) winsize 62
3759 01:02:42.309350 [CA 3] Center 34 (4~65) winsize 62
3760 01:02:42.313077 [CA 4] Center 33 (3~64) winsize 62
3761 01:02:42.316864 [CA 5] Center 33 (3~64) winsize 62
3762 01:02:42.317326
3763 01:02:42.319440 [CmdBusTrainingLP45] Vref(ca) range 1: 39
3764 01:02:42.319899
3765 01:02:42.322888 [CATrainingPosCal] consider 2 rank data
3766 01:02:42.325418 u2DelayCellTimex100 = 270/100 ps
3767 01:02:42.329018 CA0 delay=35 (5~66),Diff = 2 PI (19 cell)
3768 01:02:42.335367 CA1 delay=35 (5~66),Diff = 2 PI (19 cell)
3769 01:02:42.339147 CA2 delay=34 (4~65),Diff = 1 PI (9 cell)
3770 01:02:42.342629 CA3 delay=34 (4~65),Diff = 1 PI (9 cell)
3771 01:02:42.345302 CA4 delay=33 (3~64),Diff = 0 PI (0 cell)
3772 01:02:42.349307 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
3773 01:02:42.349873
3774 01:02:42.351926 CA PerBit enable=1, Macro0, CA PI delay=33
3775 01:02:42.352488
3776 01:02:42.355380 [CBTSetCACLKResult] CA Dly = 33
3777 01:02:42.355983 CS Dly: 5 (0~37)
3778 01:02:42.360125
3779 01:02:42.361773 ----->DramcWriteLeveling(PI) begin...
3780 01:02:42.362241 ==
3781 01:02:42.366186 Dram Type= 6, Freq= 0, CH_0, rank 0
3782 01:02:42.368344 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3783 01:02:42.368943 ==
3784 01:02:42.371754 Write leveling (Byte 0): 31 => 31
3785 01:02:42.375161 Write leveling (Byte 1): 28 => 28
3786 01:02:42.379212 DramcWriteLeveling(PI) end<-----
3787 01:02:42.379781
3788 01:02:42.380147 ==
3789 01:02:42.382001 Dram Type= 6, Freq= 0, CH_0, rank 0
3790 01:02:42.385115 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3791 01:02:42.385680 ==
3792 01:02:42.388824 [Gating] SW mode calibration
3793 01:02:42.394870 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
3794 01:02:42.401383 RX_Path_delay_UI(21) -3 - DQSINCTL_UI(16) = u1StartUI(5)
3795 01:02:42.404959 0 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3796 01:02:42.408744 0 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3797 01:02:42.414657 0 5 8 | B1->B0 | 3333 2e2e | 1 1 | (1 1) (1 0)
3798 01:02:42.417997 0 5 12 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
3799 01:02:42.421512 0 5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3800 01:02:42.427690 0 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3801 01:02:42.431610 0 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3802 01:02:42.434470 0 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3803 01:02:42.441021 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3804 01:02:42.444171 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3805 01:02:42.447641 0 6 8 | B1->B0 | 2a2a 3030 | 0 1 | (0 0) (1 1)
3806 01:02:42.454910 0 6 12 | B1->B0 | 4141 4646 | 0 0 | (0 0) (0 0)
3807 01:02:42.457893 0 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3808 01:02:42.460901 0 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3809 01:02:42.467595 0 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3810 01:02:42.471178 0 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3811 01:02:42.474213 0 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3812 01:02:42.481674 0 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3813 01:02:42.484079 0 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3814 01:02:42.487569 0 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
3815 01:02:42.494311 0 7 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3816 01:02:42.497707 0 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3817 01:02:42.500371 0 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3818 01:02:42.506887 0 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3819 01:02:42.510534 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3820 01:02:42.513576 0 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3821 01:02:42.520639 0 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3822 01:02:42.523584 0 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3823 01:02:42.527891 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3824 01:02:42.534301 0 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3825 01:02:42.536836 0 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3826 01:02:42.540622 0 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3827 01:02:42.546998 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3828 01:02:42.550097 0 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3829 01:02:42.553490 0 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3830 01:02:42.560139 0 9 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3831 01:02:42.560698 Total UI for P1: 0, mck2ui 16
3832 01:02:42.566377 best dqsien dly found for B0: ( 0, 9, 8)
3833 01:02:42.566922 Total UI for P1: 0, mck2ui 16
3834 01:02:42.573126 best dqsien dly found for B1: ( 0, 9, 8)
3835 01:02:42.576861 best DQS0 dly(MCK, UI, PI) = (0, 9, 8)
3836 01:02:42.579800 best DQS1 dly(MCK, UI, PI) = (0, 9, 8)
3837 01:02:42.580351
3838 01:02:42.583289 best DQS0 P1 dly(MCK, UI, PI) = (0, 13, 8)
3839 01:02:42.586464 best DQS1 P1 dly(MCK, UI, PI) = (0, 13, 8)
3840 01:02:42.590102 [Gating] SW calibration Done
3841 01:02:42.590651 ==
3842 01:02:42.593639 Dram Type= 6, Freq= 0, CH_0, rank 0
3843 01:02:42.596957 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3844 01:02:42.597545 ==
3845 01:02:42.599510 RX Vref Scan: 0
3846 01:02:42.600061
3847 01:02:42.600424 RX Vref 0 -> 0, step: 1
3848 01:02:42.600823
3849 01:02:42.603260 RX Delay -230 -> 252, step: 16
3850 01:02:42.606057 iDelay=218, Bit 0, Center 41 (-118 ~ 201) 320
3851 01:02:42.613085 iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320
3852 01:02:42.616458 iDelay=218, Bit 2, Center 41 (-118 ~ 201) 320
3853 01:02:42.619516 iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320
3854 01:02:42.623595 iDelay=218, Bit 4, Center 49 (-118 ~ 217) 336
3855 01:02:42.630425 iDelay=218, Bit 5, Center 41 (-118 ~ 201) 320
3856 01:02:42.632655 iDelay=218, Bit 6, Center 49 (-118 ~ 217) 336
3857 01:02:42.636205 iDelay=218, Bit 7, Center 49 (-118 ~ 217) 336
3858 01:02:42.639713 iDelay=218, Bit 8, Center 25 (-134 ~ 185) 320
3859 01:02:42.645561 iDelay=218, Bit 9, Center 17 (-150 ~ 185) 336
3860 01:02:42.649317 iDelay=218, Bit 10, Center 41 (-118 ~ 201) 320
3861 01:02:42.652301 iDelay=218, Bit 11, Center 25 (-134 ~ 185) 320
3862 01:02:42.656140 iDelay=218, Bit 12, Center 41 (-118 ~ 201) 320
3863 01:02:42.662150 iDelay=218, Bit 13, Center 41 (-118 ~ 201) 320
3864 01:02:42.665584 iDelay=218, Bit 14, Center 41 (-118 ~ 201) 320
3865 01:02:42.669289 iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320
3866 01:02:42.669843 ==
3867 01:02:42.672558 Dram Type= 6, Freq= 0, CH_0, rank 0
3868 01:02:42.675532 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3869 01:02:42.676106 ==
3870 01:02:42.679138 DQS Delay:
3871 01:02:42.679718 DQS0 = 0, DQS1 = 0
3872 01:02:42.682143 DQM Delay:
3873 01:02:42.682700 DQM0 = 44, DQM1 = 34
3874 01:02:42.683068 DQ Delay:
3875 01:02:42.685687 DQ0 =41, DQ1 =41, DQ2 =41, DQ3 =41
3876 01:02:42.688476 DQ4 =49, DQ5 =41, DQ6 =49, DQ7 =49
3877 01:02:42.691942 DQ8 =25, DQ9 =17, DQ10 =41, DQ11 =25
3878 01:02:42.695284 DQ12 =41, DQ13 =41, DQ14 =41, DQ15 =41
3879 01:02:42.695746
3880 01:02:42.696108
3881 01:02:42.700080 ==
3882 01:02:42.702180 Dram Type= 6, Freq= 0, CH_0, rank 0
3883 01:02:42.705247 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3884 01:02:42.705710 ==
3885 01:02:42.706073
3886 01:02:42.706412
3887 01:02:42.708370 TX Vref Scan disable
3888 01:02:42.708959 == TX Byte 0 ==
3889 01:02:42.714910 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
3890 01:02:42.718120 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
3891 01:02:42.718587 == TX Byte 1 ==
3892 01:02:42.725280 Update DQ dly =572 (2 ,1, 28) DQ OEN =(1 ,6)
3893 01:02:42.729143 Update DQM dly =572 (2 ,1, 28) DQM OEN =(1 ,6)
3894 01:02:42.729695 ==
3895 01:02:42.731511 Dram Type= 6, Freq= 0, CH_0, rank 0
3896 01:02:42.734934 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3897 01:02:42.735398 ==
3898 01:02:42.735763
3899 01:02:42.736388
3900 01:02:42.739895 TX Vref Scan disable
3901 01:02:42.742100 == TX Byte 0 ==
3902 01:02:42.745333 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
3903 01:02:42.748349 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
3904 01:02:42.751674 == TX Byte 1 ==
3905 01:02:42.754907 Update DQ dly =572 (2 ,1, 28) DQ OEN =(1 ,6)
3906 01:02:42.758059 Update DQM dly =572 (2 ,1, 28) DQM OEN =(1 ,6)
3907 01:02:42.761711
3908 01:02:42.762264 [DATLAT]
3909 01:02:42.762633 Freq=600, CH0 RK0
3910 01:02:42.762976
3911 01:02:42.764452 DATLAT Default: 0x9
3912 01:02:42.764937 0, 0xFFFF, sum = 0
3913 01:02:42.768676 1, 0xFFFF, sum = 0
3914 01:02:42.769282 2, 0xFFFF, sum = 0
3915 01:02:42.772345 3, 0xFFFF, sum = 0
3916 01:02:42.772991 4, 0xFFFF, sum = 0
3917 01:02:42.774362 5, 0xFFFF, sum = 0
3918 01:02:42.778076 6, 0xFFFF, sum = 0
3919 01:02:42.778639 7, 0x0, sum = 1
3920 01:02:42.779011 8, 0x0, sum = 2
3921 01:02:42.781642 9, 0x0, sum = 3
3922 01:02:42.782204 10, 0x0, sum = 4
3923 01:02:42.785081 best_step = 8
3924 01:02:42.785536
3925 01:02:42.785895 ==
3926 01:02:42.788360 Dram Type= 6, Freq= 0, CH_0, rank 0
3927 01:02:42.791133 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3928 01:02:42.791690 ==
3929 01:02:42.794568 RX Vref Scan: 1
3930 01:02:42.795113
3931 01:02:42.795478 RX Vref 0 -> 0, step: 1
3932 01:02:42.795819
3933 01:02:42.798678 RX Delay -195 -> 252, step: 8
3934 01:02:42.799235
3935 01:02:42.801280 Set Vref, RX VrefLevel [Byte0]: 46
3936 01:02:42.804238 [Byte1]: 48
3937 01:02:42.808377
3938 01:02:42.808974 Final RX Vref Byte 0 = 46 to rank0
3939 01:02:42.811622 Final RX Vref Byte 1 = 48 to rank0
3940 01:02:42.814801 Final RX Vref Byte 0 = 46 to rank1
3941 01:02:42.818777 Final RX Vref Byte 1 = 48 to rank1==
3942 01:02:42.821533 Dram Type= 6, Freq= 0, CH_0, rank 0
3943 01:02:42.829840 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3944 01:02:42.830397 ==
3945 01:02:42.830768 DQS Delay:
3946 01:02:42.831110 DQS0 = 0, DQS1 = 0
3947 01:02:42.831801 DQM Delay:
3948 01:02:42.832152 DQM0 = 40, DQM1 = 30
3949 01:02:42.834626 DQ Delay:
3950 01:02:42.837819 DQ0 =36, DQ1 =44, DQ2 =36, DQ3 =36
3951 01:02:42.841318 DQ4 =40, DQ5 =32, DQ6 =48, DQ7 =48
3952 01:02:42.844908 DQ8 =20, DQ9 =12, DQ10 =28, DQ11 =24
3953 01:02:42.848365 DQ12 =40, DQ13 =40, DQ14 =40, DQ15 =40
3954 01:02:42.849100
3955 01:02:42.849479
3956 01:02:42.854506 [DQSOSCAuto] RK0, (LSB)MR18= 0x5555, (MSB)MR19= 0x808, tDQSOscB0 = 393 ps tDQSOscB1 = 393 ps
3957 01:02:42.858709 CH0 RK0: MR19=808, MR18=5555
3958 01:02:42.864786 CH0_RK0: MR19=0x808, MR18=0x5555, DQSOSC=393, MR23=63, INC=169, DEC=113
3959 01:02:42.865342
3960 01:02:42.868161 ----->DramcWriteLeveling(PI) begin...
3961 01:02:42.868764 ==
3962 01:02:42.870910 Dram Type= 6, Freq= 0, CH_0, rank 1
3963 01:02:42.874818 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3964 01:02:42.875373 ==
3965 01:02:42.878839 Write leveling (Byte 0): 29 => 29
3966 01:02:42.881654 Write leveling (Byte 1): 29 => 29
3967 01:02:42.885231 DramcWriteLeveling(PI) end<-----
3968 01:02:42.885784
3969 01:02:42.886152 ==
3970 01:02:42.888045 Dram Type= 6, Freq= 0, CH_0, rank 1
3971 01:02:42.891691 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
3972 01:02:42.892252 ==
3973 01:02:42.894891 [Gating] SW mode calibration
3974 01:02:42.901209 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
3975 01:02:42.907449 RX_Path_delay_UI(21) -3 - DQSINCTL_UI(16) = u1StartUI(5)
3976 01:02:42.911435 0 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3977 01:02:42.917468 0 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3978 01:02:42.921068 0 5 8 | B1->B0 | 3030 3030 | 1 0 | (1 0) (0 0)
3979 01:02:42.924119 0 5 12 | B1->B0 | 2929 2323 | 0 0 | (1 1) (0 0)
3980 01:02:42.930364 0 5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3981 01:02:42.934127 0 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3982 01:02:42.937058 0 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3983 01:02:42.943704 0 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3984 01:02:42.948172 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3985 01:02:42.950256 0 6 4 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
3986 01:02:42.957415 0 6 8 | B1->B0 | 2929 3131 | 0 0 | (0 0) (0 0)
3987 01:02:42.960429 0 6 12 | B1->B0 | 4242 4646 | 0 0 | (0 0) (0 0)
3988 01:02:42.963623 0 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3989 01:02:42.972090 0 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3990 01:02:42.973648 0 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3991 01:02:42.977401 0 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3992 01:02:42.983681 0 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3993 01:02:42.987232 0 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
3994 01:02:42.990569 0 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3995 01:02:42.997213 0 7 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3996 01:02:43.000394 0 7 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3997 01:02:43.003673 0 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3998 01:02:43.010154 0 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3999 01:02:43.013608 0 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4000 01:02:43.016365 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4001 01:02:43.023326 0 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4002 01:02:43.026556 0 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4003 01:02:43.029905 0 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4004 01:02:43.036840 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4005 01:02:43.040129 0 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4006 01:02:43.043189 0 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4007 01:02:43.046686 0 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4008 01:02:43.052939 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4009 01:02:43.056456 0 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
4010 01:02:43.059821 0 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
4011 01:02:43.066169 0 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
4012 01:02:43.070250 Total UI for P1: 0, mck2ui 16
4013 01:02:43.073029 best dqsien dly found for B0: ( 0, 9, 6)
4014 01:02:43.075920 0 9 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4015 01:02:43.079635 Total UI for P1: 0, mck2ui 16
4016 01:02:43.083219 best dqsien dly found for B1: ( 0, 9, 10)
4017 01:02:43.086216 best DQS0 dly(MCK, UI, PI) = (0, 9, 6)
4018 01:02:43.089400 best DQS1 dly(MCK, UI, PI) = (0, 9, 10)
4019 01:02:43.089859
4020 01:02:43.093292 best DQS0 P1 dly(MCK, UI, PI) = (0, 13, 6)
4021 01:02:43.099756 best DQS1 P1 dly(MCK, UI, PI) = (0, 13, 10)
4022 01:02:43.100307 [Gating] SW calibration Done
4023 01:02:43.100675 ==
4024 01:02:43.102589 Dram Type= 6, Freq= 0, CH_0, rank 1
4025 01:02:43.109668 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4026 01:02:43.110222 ==
4027 01:02:43.110591 RX Vref Scan: 0
4028 01:02:43.110929
4029 01:02:43.112841 RX Vref 0 -> 0, step: 1
4030 01:02:43.113396
4031 01:02:43.115690 RX Delay -230 -> 252, step: 16
4032 01:02:43.120496 iDelay=218, Bit 0, Center 33 (-134 ~ 201) 336
4033 01:02:43.122447 iDelay=218, Bit 1, Center 49 (-118 ~ 217) 336
4034 01:02:43.126541 iDelay=218, Bit 2, Center 33 (-134 ~ 201) 336
4035 01:02:43.132570 iDelay=218, Bit 3, Center 33 (-134 ~ 201) 336
4036 01:02:43.135894 iDelay=218, Bit 4, Center 49 (-118 ~ 217) 336
4037 01:02:43.139792 iDelay=218, Bit 5, Center 33 (-134 ~ 201) 336
4038 01:02:43.142383 iDelay=218, Bit 6, Center 49 (-118 ~ 217) 336
4039 01:02:43.149058 iDelay=218, Bit 7, Center 49 (-118 ~ 217) 336
4040 01:02:43.152208 iDelay=218, Bit 8, Center 25 (-134 ~ 185) 320
4041 01:02:43.155958 iDelay=218, Bit 9, Center 17 (-134 ~ 169) 304
4042 01:02:43.159061 iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336
4043 01:02:43.166126 iDelay=218, Bit 11, Center 25 (-134 ~ 185) 320
4044 01:02:43.168877 iDelay=218, Bit 12, Center 41 (-118 ~ 201) 320
4045 01:02:43.172368 iDelay=218, Bit 13, Center 41 (-118 ~ 201) 320
4046 01:02:43.175674 iDelay=218, Bit 14, Center 41 (-118 ~ 201) 320
4047 01:02:43.182125 iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320
4048 01:02:43.182676 ==
4049 01:02:43.185033 Dram Type= 6, Freq= 0, CH_0, rank 1
4050 01:02:43.188400 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4051 01:02:43.189023 ==
4052 01:02:43.189396 DQS Delay:
4053 01:02:43.192897 DQS0 = 0, DQS1 = 0
4054 01:02:43.193753 DQM Delay:
4055 01:02:43.195224 DQM0 = 41, DQM1 = 33
4056 01:02:43.195675 DQ Delay:
4057 01:02:43.199166 DQ0 =33, DQ1 =49, DQ2 =33, DQ3 =33
4058 01:02:43.202093 DQ4 =49, DQ5 =33, DQ6 =49, DQ7 =49
4059 01:02:43.205092 DQ8 =25, DQ9 =17, DQ10 =33, DQ11 =25
4060 01:02:43.208328 DQ12 =41, DQ13 =41, DQ14 =41, DQ15 =41
4061 01:02:43.208856
4062 01:02:43.209343
4063 01:02:43.209818 ==
4064 01:02:43.211822 Dram Type= 6, Freq= 0, CH_0, rank 1
4065 01:02:43.215466 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4066 01:02:43.216024 ==
4067 01:02:43.216533
4068 01:02:43.217011
4069 01:02:43.218764 TX Vref Scan disable
4070 01:02:43.222406 == TX Byte 0 ==
4071 01:02:43.224978 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4072 01:02:43.228505 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4073 01:02:43.231991 == TX Byte 1 ==
4074 01:02:43.235075 Update DQ dly =573 (2 ,1, 29) DQ OEN =(1 ,6)
4075 01:02:43.239994 Update DQM dly =573 (2 ,1, 29) DQM OEN =(1 ,6)
4076 01:02:43.240453 ==
4077 01:02:43.241692 Dram Type= 6, Freq= 0, CH_0, rank 1
4078 01:02:43.248192 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4079 01:02:43.248797 ==
4080 01:02:43.249173
4081 01:02:43.249514
4082 01:02:43.249837 TX Vref Scan disable
4083 01:02:43.253533 == TX Byte 0 ==
4084 01:02:43.256547 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4085 01:02:43.265037 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4086 01:02:43.265616 == TX Byte 1 ==
4087 01:02:43.266698 Update DQ dly =573 (2 ,1, 29) DQ OEN =(1 ,6)
4088 01:02:43.273190 Update DQM dly =573 (2 ,1, 29) DQM OEN =(1 ,6)
4089 01:02:43.273823
4090 01:02:43.274190 [DATLAT]
4091 01:02:43.274529 Freq=600, CH0 RK1
4092 01:02:43.274854
4093 01:02:43.275531 DATLAT Default: 0x8
4094 01:02:43.275879 0, 0xFFFF, sum = 0
4095 01:02:43.279196 1, 0xFFFF, sum = 0
4096 01:02:43.282534 2, 0xFFFF, sum = 0
4097 01:02:43.283102 3, 0xFFFF, sum = 0
4098 01:02:43.286102 4, 0xFFFF, sum = 0
4099 01:02:43.286670 5, 0xFFFF, sum = 0
4100 01:02:43.289114 6, 0xFFFF, sum = 0
4101 01:02:43.289583 7, 0x0, sum = 1
4102 01:02:43.289954 8, 0x0, sum = 2
4103 01:02:43.292862 9, 0x0, sum = 3
4104 01:02:43.293437 10, 0x0, sum = 4
4105 01:02:43.295725 best_step = 8
4106 01:02:43.296276
4107 01:02:43.296636 ==
4108 01:02:43.299556 Dram Type= 6, Freq= 0, CH_0, rank 1
4109 01:02:43.302345 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4110 01:02:43.302805 ==
4111 01:02:43.305955 RX Vref Scan: 0
4112 01:02:43.306513
4113 01:02:43.306877 RX Vref 0 -> 0, step: 1
4114 01:02:43.307273
4115 01:02:43.309207 RX Delay -179 -> 252, step: 8
4116 01:02:43.316339 iDelay=205, Bit 0, Center 36 (-115 ~ 188) 304
4117 01:02:43.319756 iDelay=205, Bit 1, Center 40 (-115 ~ 196) 312
4118 01:02:43.322948 iDelay=205, Bit 2, Center 40 (-115 ~ 196) 312
4119 01:02:43.327030 iDelay=205, Bit 3, Center 36 (-115 ~ 188) 304
4120 01:02:43.332597 iDelay=205, Bit 4, Center 44 (-107 ~ 196) 304
4121 01:02:43.336177 iDelay=205, Bit 5, Center 32 (-123 ~ 188) 312
4122 01:02:43.339319 iDelay=205, Bit 6, Center 48 (-107 ~ 204) 312
4123 01:02:43.343206 iDelay=205, Bit 7, Center 48 (-107 ~ 204) 312
4124 01:02:43.349501 iDelay=205, Bit 8, Center 20 (-131 ~ 172) 304
4125 01:02:43.352579 iDelay=205, Bit 9, Center 20 (-131 ~ 172) 304
4126 01:02:43.356757 iDelay=205, Bit 10, Center 32 (-123 ~ 188) 312
4127 01:02:43.360437 iDelay=205, Bit 11, Center 24 (-123 ~ 172) 296
4128 01:02:43.366101 iDelay=205, Bit 12, Center 40 (-107 ~ 188) 296
4129 01:02:43.369000 iDelay=205, Bit 13, Center 36 (-115 ~ 188) 304
4130 01:02:43.372143 iDelay=205, Bit 14, Center 44 (-107 ~ 196) 304
4131 01:02:43.376538 iDelay=205, Bit 15, Center 44 (-107 ~ 196) 304
4132 01:02:43.377155 ==
4133 01:02:43.379285 Dram Type= 6, Freq= 0, CH_0, rank 1
4134 01:02:43.385636 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4135 01:02:43.386228 ==
4136 01:02:43.386597 DQS Delay:
4137 01:02:43.388877 DQS0 = 0, DQS1 = 0
4138 01:02:43.389424 DQM Delay:
4139 01:02:43.389793 DQM0 = 40, DQM1 = 32
4140 01:02:43.392081 DQ Delay:
4141 01:02:43.395542 DQ0 =36, DQ1 =40, DQ2 =40, DQ3 =36
4142 01:02:43.398650 DQ4 =44, DQ5 =32, DQ6 =48, DQ7 =48
4143 01:02:43.402516 DQ8 =20, DQ9 =20, DQ10 =32, DQ11 =24
4144 01:02:43.405113 DQ12 =40, DQ13 =36, DQ14 =44, DQ15 =44
4145 01:02:43.405569
4146 01:02:43.405930
4147 01:02:43.411541 [DQSOSCAuto] RK1, (LSB)MR18= 0x6b6b, (MSB)MR19= 0x808, tDQSOscB0 = 389 ps tDQSOscB1 = 389 ps
4148 01:02:43.415310 CH0 RK1: MR19=808, MR18=6B6B
4149 01:02:43.421577 CH0_RK1: MR19=0x808, MR18=0x6B6B, DQSOSC=389, MR23=63, INC=173, DEC=115
4150 01:02:43.424594 [RxdqsGatingPostProcess] freq 600
4151 01:02:43.431555 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4152 01:02:43.432091 Pre-setting of DQS Precalculation
4153 01:02:43.439186 [DualRankRxdatlatCal] RK0: 8, RK1: 8, Final_Datlat 8
4154 01:02:43.439779 ==
4155 01:02:43.441113 Dram Type= 6, Freq= 0, CH_1, rank 0
4156 01:02:43.444700 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4157 01:02:43.445277 ==
4158 01:02:43.450909 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4159 01:02:43.457780 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=39, u1VrefScanEnd=39
4160 01:02:43.460702 [CA 0] Center 35 (5~66) winsize 62
4161 01:02:43.464751 [CA 1] Center 35 (5~66) winsize 62
4162 01:02:43.469078 [CA 2] Center 33 (3~64) winsize 62
4163 01:02:43.471335 [CA 3] Center 33 (3~64) winsize 62
4164 01:02:43.474596 [CA 4] Center 33 (2~64) winsize 63
4165 01:02:43.477696 [CA 5] Center 33 (2~64) winsize 63
4166 01:02:43.478245
4167 01:02:43.480833 [CmdBusTrainingLP45] Vref(ca) range 1: 39
4168 01:02:43.481295
4169 01:02:43.485264 [CATrainingPosCal] consider 1 rank data
4170 01:02:43.487831 u2DelayCellTimex100 = 270/100 ps
4171 01:02:43.492109 CA0 delay=35 (5~66),Diff = 2 PI (19 cell)
4172 01:02:43.494337 CA1 delay=35 (5~66),Diff = 2 PI (19 cell)
4173 01:02:43.497285 CA2 delay=33 (3~64),Diff = 0 PI (0 cell)
4174 01:02:43.501119 CA3 delay=33 (3~64),Diff = 0 PI (0 cell)
4175 01:02:43.504433 CA4 delay=33 (2~64),Diff = 0 PI (0 cell)
4176 01:02:43.510487 CA5 delay=33 (2~64),Diff = 0 PI (0 cell)
4177 01:02:43.511041
4178 01:02:43.513880 CA PerBit enable=1, Macro0, CA PI delay=33
4179 01:02:43.514340
4180 01:02:43.517657 [CBTSetCACLKResult] CA Dly = 33
4181 01:02:43.518208 CS Dly: 4 (0~35)
4182 01:02:43.518574 ==
4183 01:02:43.520829 Dram Type= 6, Freq= 0, CH_1, rank 1
4184 01:02:43.524272 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4185 01:02:43.527173 ==
4186 01:02:43.531045 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4187 01:02:43.537258 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
4188 01:02:43.540860 [CA 0] Center 35 (5~65) winsize 61
4189 01:02:43.544516 [CA 1] Center 34 (4~65) winsize 62
4190 01:02:43.547145 [CA 2] Center 33 (3~64) winsize 62
4191 01:02:43.550476 [CA 3] Center 33 (3~64) winsize 62
4192 01:02:43.553972 [CA 4] Center 32 (2~63) winsize 62
4193 01:02:43.556496 [CA 5] Center 32 (2~63) winsize 62
4194 01:02:43.557028
4195 01:02:43.560035 [CmdBusTrainingLP45] Vref(ca) range 1: 37
4196 01:02:43.560600
4197 01:02:43.563828 [CATrainingPosCal] consider 2 rank data
4198 01:02:43.567537 u2DelayCellTimex100 = 270/100 ps
4199 01:02:43.571089 CA0 delay=35 (5~65),Diff = 3 PI (28 cell)
4200 01:02:43.574102 CA1 delay=35 (5~65),Diff = 3 PI (28 cell)
4201 01:02:43.576671 CA2 delay=33 (3~64),Diff = 1 PI (9 cell)
4202 01:02:43.583191 CA3 delay=33 (3~64),Diff = 1 PI (9 cell)
4203 01:02:43.587550 CA4 delay=32 (2~63),Diff = 0 PI (0 cell)
4204 01:02:43.589907 CA5 delay=32 (2~63),Diff = 0 PI (0 cell)
4205 01:02:43.590478
4206 01:02:43.593658 CA PerBit enable=1, Macro0, CA PI delay=32
4207 01:02:43.594225
4208 01:02:43.596285 [CBTSetCACLKResult] CA Dly = 32
4209 01:02:43.596905 CS Dly: 4 (0~36)
4210 01:02:43.597394
4211 01:02:43.599954 ----->DramcWriteLeveling(PI) begin...
4212 01:02:43.603276 ==
4213 01:02:43.606641 Dram Type= 6, Freq= 0, CH_1, rank 0
4214 01:02:43.609644 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4215 01:02:43.610215 ==
4216 01:02:43.613107 Write leveling (Byte 0): 26 => 26
4217 01:02:43.616643 Write leveling (Byte 1): 27 => 27
4218 01:02:43.619429 DramcWriteLeveling(PI) end<-----
4219 01:02:43.620019
4220 01:02:43.620617 ==
4221 01:02:43.622531 Dram Type= 6, Freq= 0, CH_1, rank 0
4222 01:02:43.626775 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4223 01:02:43.627351 ==
4224 01:02:43.630597 [Gating] SW mode calibration
4225 01:02:43.636939 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4226 01:02:43.639784 RX_Path_delay_UI(21) -3 - DQSINCTL_UI(16) = u1StartUI(5)
4227 01:02:43.646382 0 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4228 01:02:43.649418 0 5 4 | B1->B0 | 3434 3131 | 1 1 | (1 1) (1 1)
4229 01:02:43.652898 0 5 8 | B1->B0 | 3030 2525 | 0 0 | (0 1) (1 1)
4230 01:02:43.660212 0 5 12 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
4231 01:02:43.663051 0 5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4232 01:02:43.669359 0 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4233 01:02:43.672541 0 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4234 01:02:43.676100 0 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4235 01:02:43.680171 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4236 01:02:43.685845 0 6 4 | B1->B0 | 2323 2f2f | 0 0 | (0 0) (0 0)
4237 01:02:43.689228 0 6 8 | B1->B0 | 3232 3f3f | 0 0 | (1 1) (0 0)
4238 01:02:43.695952 0 6 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4239 01:02:43.699349 0 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4240 01:02:43.702854 0 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4241 01:02:43.705454 0 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4242 01:02:43.712006 0 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4243 01:02:43.716284 0 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4244 01:02:43.719113 0 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
4245 01:02:43.725582 0 7 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4246 01:02:43.728955 0 7 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4247 01:02:43.731871 0 7 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4248 01:02:43.738750 0 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4249 01:02:43.741798 0 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4250 01:02:43.745195 0 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4251 01:02:43.751809 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4252 01:02:43.754872 0 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4253 01:02:43.758517 0 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4254 01:02:43.764860 0 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4255 01:02:43.768353 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4256 01:02:43.771580 0 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4257 01:02:43.778418 0 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4258 01:02:43.782902 0 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4259 01:02:43.785455 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4260 01:02:43.791462 0 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4261 01:02:43.794901 0 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
4262 01:02:43.799022 0 9 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4263 01:02:43.801390 Total UI for P1: 0, mck2ui 16
4264 01:02:43.804678 best dqsien dly found for B0: ( 0, 9, 8)
4265 01:02:43.808133 Total UI for P1: 0, mck2ui 16
4266 01:02:43.812121 best dqsien dly found for B1: ( 0, 9, 10)
4267 01:02:43.814676 best DQS0 dly(MCK, UI, PI) = (0, 9, 8)
4268 01:02:43.818041 best DQS1 dly(MCK, UI, PI) = (0, 9, 10)
4269 01:02:43.818602
4270 01:02:43.824971 best DQS0 P1 dly(MCK, UI, PI) = (0, 13, 8)
4271 01:02:43.827793 best DQS1 P1 dly(MCK, UI, PI) = (0, 13, 10)
4272 01:02:43.831792 [Gating] SW calibration Done
4273 01:02:43.832350 ==
4274 01:02:43.834743 Dram Type= 6, Freq= 0, CH_1, rank 0
4275 01:02:43.837824 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4276 01:02:43.838301 ==
4277 01:02:43.838924 RX Vref Scan: 0
4278 01:02:43.839291
4279 01:02:43.841094 RX Vref 0 -> 0, step: 1
4280 01:02:43.841551
4281 01:02:43.844134 RX Delay -230 -> 252, step: 16
4282 01:02:43.847691 iDelay=218, Bit 0, Center 41 (-134 ~ 217) 352
4283 01:02:43.854029 iDelay=218, Bit 1, Center 33 (-134 ~ 201) 336
4284 01:02:43.857296 iDelay=218, Bit 2, Center 33 (-134 ~ 201) 336
4285 01:02:43.861110 iDelay=218, Bit 3, Center 33 (-134 ~ 201) 336
4286 01:02:43.863741 iDelay=218, Bit 4, Center 33 (-134 ~ 201) 336
4287 01:02:43.867526 iDelay=218, Bit 5, Center 49 (-118 ~ 217) 336
4288 01:02:43.874011 iDelay=218, Bit 6, Center 49 (-118 ~ 217) 336
4289 01:02:43.877112 iDelay=218, Bit 7, Center 33 (-134 ~ 201) 336
4290 01:02:43.880424 iDelay=218, Bit 8, Center 17 (-150 ~ 185) 336
4291 01:02:43.883864 iDelay=218, Bit 9, Center 17 (-150 ~ 185) 336
4292 01:02:43.890563 iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336
4293 01:02:43.893870 iDelay=218, Bit 11, Center 17 (-150 ~ 185) 336
4294 01:02:43.896651 iDelay=218, Bit 12, Center 33 (-134 ~ 201) 336
4295 01:02:43.899943 iDelay=218, Bit 13, Center 49 (-118 ~ 217) 336
4296 01:02:43.907078 iDelay=218, Bit 14, Center 33 (-134 ~ 201) 336
4297 01:02:43.909608 iDelay=218, Bit 15, Center 49 (-118 ~ 217) 336
4298 01:02:43.909997 ==
4299 01:02:43.913539 Dram Type= 6, Freq= 0, CH_1, rank 0
4300 01:02:43.916521 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4301 01:02:43.916720 ==
4302 01:02:43.920574 DQS Delay:
4303 01:02:43.920878 DQS0 = 0, DQS1 = 0
4304 01:02:43.923537 DQM Delay:
4305 01:02:43.923725 DQM0 = 38, DQM1 = 31
4306 01:02:43.923872 DQ Delay:
4307 01:02:43.926390 DQ0 =41, DQ1 =33, DQ2 =33, DQ3 =33
4308 01:02:43.929132 DQ4 =33, DQ5 =49, DQ6 =49, DQ7 =33
4309 01:02:43.933350 DQ8 =17, DQ9 =17, DQ10 =33, DQ11 =17
4310 01:02:43.936667 DQ12 =33, DQ13 =49, DQ14 =33, DQ15 =49
4311 01:02:43.936898
4312 01:02:43.937049
4313 01:02:43.937188 ==
4314 01:02:43.939197 Dram Type= 6, Freq= 0, CH_1, rank 0
4315 01:02:43.946329 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4316 01:02:43.946587 ==
4317 01:02:43.946736
4318 01:02:43.946873
4319 01:02:43.949005 TX Vref Scan disable
4320 01:02:43.949189 == TX Byte 0 ==
4321 01:02:43.952698 Update DQ dly =570 (2 ,1, 26) DQ OEN =(1 ,6)
4322 01:02:43.959435 Update DQM dly =570 (2 ,1, 26) DQM OEN =(1 ,6)
4323 01:02:43.959693 == TX Byte 1 ==
4324 01:02:43.962968 Update DQ dly =572 (2 ,1, 28) DQ OEN =(1 ,6)
4325 01:02:43.969614 Update DQM dly =572 (2 ,1, 28) DQM OEN =(1 ,6)
4326 01:02:43.969982 ==
4327 01:02:43.972974 Dram Type= 6, Freq= 0, CH_1, rank 0
4328 01:02:43.976536 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4329 01:02:43.977169 ==
4330 01:02:43.977535
4331 01:02:43.977870
4332 01:02:43.980333 TX Vref Scan disable
4333 01:02:43.982836 == TX Byte 0 ==
4334 01:02:43.986042 Update DQ dly =570 (2 ,1, 26) DQ OEN =(1 ,6)
4335 01:02:43.989836 Update DQM dly =570 (2 ,1, 26) DQM OEN =(1 ,6)
4336 01:02:43.992770 == TX Byte 1 ==
4337 01:02:43.997389 Update DQ dly =572 (2 ,1, 28) DQ OEN =(1 ,6)
4338 01:02:43.999755 Update DQM dly =572 (2 ,1, 28) DQM OEN =(1 ,6)
4339 01:02:44.000306
4340 01:02:44.002969 [DATLAT]
4341 01:02:44.003519 Freq=600, CH1 RK0
4342 01:02:44.003880
4343 01:02:44.006297 DATLAT Default: 0x9
4344 01:02:44.006751 0, 0xFFFF, sum = 0
4345 01:02:44.009266 1, 0xFFFF, sum = 0
4346 01:02:44.009739 2, 0xFFFF, sum = 0
4347 01:02:44.012581 3, 0xFFFF, sum = 0
4348 01:02:44.013178 4, 0xFFFF, sum = 0
4349 01:02:44.016109 5, 0xFFFF, sum = 0
4350 01:02:44.016675 6, 0xFFFF, sum = 0
4351 01:02:44.018860 7, 0x0, sum = 1
4352 01:02:44.019384 8, 0x0, sum = 2
4353 01:02:44.022797 9, 0x0, sum = 3
4354 01:02:44.023262 10, 0x0, sum = 4
4355 01:02:44.025638 best_step = 8
4356 01:02:44.026091
4357 01:02:44.026446 ==
4358 01:02:44.029052 Dram Type= 6, Freq= 0, CH_1, rank 0
4359 01:02:44.032398 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4360 01:02:44.032986 ==
4361 01:02:44.033354 RX Vref Scan: 1
4362 01:02:44.036173
4363 01:02:44.036760 RX Vref 0 -> 0, step: 1
4364 01:02:44.037136
4365 01:02:44.039086 RX Delay -195 -> 252, step: 8
4366 01:02:44.039547
4367 01:02:44.042486 Set Vref, RX VrefLevel [Byte0]: 56
4368 01:02:44.045620 [Byte1]: 48
4369 01:02:44.048974
4370 01:02:44.049422 Final RX Vref Byte 0 = 56 to rank0
4371 01:02:44.052549 Final RX Vref Byte 1 = 48 to rank0
4372 01:02:44.055610 Final RX Vref Byte 0 = 56 to rank1
4373 01:02:44.059541 Final RX Vref Byte 1 = 48 to rank1==
4374 01:02:44.062960 Dram Type= 6, Freq= 0, CH_1, rank 0
4375 01:02:44.069863 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4376 01:02:44.070419 ==
4377 01:02:44.070777 DQS Delay:
4378 01:02:44.071816 DQS0 = 0, DQS1 = 0
4379 01:02:44.072270 DQM Delay:
4380 01:02:44.072623 DQM0 = 37, DQM1 = 30
4381 01:02:44.075418 DQ Delay:
4382 01:02:44.078706 DQ0 =40, DQ1 =28, DQ2 =28, DQ3 =36
4383 01:02:44.082036 DQ4 =36, DQ5 =48, DQ6 =44, DQ7 =36
4384 01:02:44.085340 DQ8 =12, DQ9 =20, DQ10 =32, DQ11 =24
4385 01:02:44.089041 DQ12 =40, DQ13 =40, DQ14 =36, DQ15 =40
4386 01:02:44.089588
4387 01:02:44.089947
4388 01:02:44.094769 [DQSOSCAuto] RK0, (LSB)MR18= 0x6e6e, (MSB)MR19= 0x808, tDQSOscB0 = 389 ps tDQSOscB1 = 389 ps
4389 01:02:44.098571 CH1 RK0: MR19=808, MR18=6E6E
4390 01:02:44.105539 CH1_RK0: MR19=0x808, MR18=0x6E6E, DQSOSC=389, MR23=63, INC=173, DEC=115
4391 01:02:44.106092
4392 01:02:44.108898 ----->DramcWriteLeveling(PI) begin...
4393 01:02:44.109365 ==
4394 01:02:44.112001 Dram Type= 6, Freq= 0, CH_1, rank 1
4395 01:02:44.115198 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4396 01:02:44.115756 ==
4397 01:02:44.118462 Write leveling (Byte 0): 28 => 28
4398 01:02:44.122129 Write leveling (Byte 1): 28 => 28
4399 01:02:44.124979 DramcWriteLeveling(PI) end<-----
4400 01:02:44.125436
4401 01:02:44.125800 ==
4402 01:02:44.129212 Dram Type= 6, Freq= 0, CH_1, rank 1
4403 01:02:44.131782 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4404 01:02:44.135474 ==
4405 01:02:44.136047 [Gating] SW mode calibration
4406 01:02:44.144932 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4407 01:02:44.148651 RX_Path_delay_UI(21) -3 - DQSINCTL_UI(16) = u1StartUI(5)
4408 01:02:44.151526 0 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4409 01:02:44.158490 0 5 4 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 0)
4410 01:02:44.160981 0 5 8 | B1->B0 | 3030 2323 | 0 0 | (1 1) (0 0)
4411 01:02:44.165138 0 5 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4412 01:02:44.171622 0 5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4413 01:02:44.175099 0 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4414 01:02:44.177936 0 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4415 01:02:44.184213 0 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4416 01:02:44.188766 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4417 01:02:44.190877 0 6 4 | B1->B0 | 2424 2f2f | 0 0 | (0 0) (0 0)
4418 01:02:44.197596 0 6 8 | B1->B0 | 3232 4545 | 0 0 | (0 0) (0 0)
4419 01:02:44.201223 0 6 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4420 01:02:44.204123 0 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4421 01:02:44.210658 0 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4422 01:02:44.213997 0 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4423 01:02:44.217353 0 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4424 01:02:44.224837 0 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4425 01:02:44.227246 0 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
4426 01:02:44.230735 0 7 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4427 01:02:44.237712 0 7 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4428 01:02:44.240110 0 7 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4429 01:02:44.245387 0 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4430 01:02:44.252118 0 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4431 01:02:44.254241 0 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4432 01:02:44.257429 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4433 01:02:44.263658 0 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4434 01:02:44.267012 0 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4435 01:02:44.270449 0 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4436 01:02:44.277428 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4437 01:02:44.280385 0 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4438 01:02:44.283189 0 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4439 01:02:44.289625 0 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4440 01:02:44.293270 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4441 01:02:44.297475 0 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4442 01:02:44.303089 0 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
4443 01:02:44.303646 Total UI for P1: 0, mck2ui 16
4444 01:02:44.309800 best dqsien dly found for B0: ( 0, 9, 6)
4445 01:02:44.313310 0 9 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4446 01:02:44.318658 Total UI for P1: 0, mck2ui 16
4447 01:02:44.319603 best dqsien dly found for B1: ( 0, 9, 8)
4448 01:02:44.322877 best DQS0 dly(MCK, UI, PI) = (0, 9, 6)
4449 01:02:44.326102 best DQS1 dly(MCK, UI, PI) = (0, 9, 8)
4450 01:02:44.326561
4451 01:02:44.329497 best DQS0 P1 dly(MCK, UI, PI) = (0, 13, 6)
4452 01:02:44.332895 best DQS1 P1 dly(MCK, UI, PI) = (0, 13, 8)
4453 01:02:44.336312 [Gating] SW calibration Done
4454 01:02:44.336814 ==
4455 01:02:44.339193 Dram Type= 6, Freq= 0, CH_1, rank 1
4456 01:02:44.342762 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4457 01:02:44.343228 ==
4458 01:02:44.345901 RX Vref Scan: 0
4459 01:02:44.346523
4460 01:02:44.349361 RX Vref 0 -> 0, step: 1
4461 01:02:44.349820
4462 01:02:44.353009 RX Delay -230 -> 252, step: 16
4463 01:02:44.356579 iDelay=218, Bit 0, Center 41 (-118 ~ 201) 320
4464 01:02:44.359735 iDelay=218, Bit 1, Center 33 (-134 ~ 201) 336
4465 01:02:44.362674 iDelay=218, Bit 2, Center 33 (-134 ~ 201) 336
4466 01:02:44.369628 iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320
4467 01:02:44.372659 iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320
4468 01:02:44.375901 iDelay=218, Bit 5, Center 49 (-118 ~ 217) 336
4469 01:02:44.379048 iDelay=218, Bit 6, Center 49 (-118 ~ 217) 336
4470 01:02:44.382442 iDelay=218, Bit 7, Center 41 (-118 ~ 201) 320
4471 01:02:44.389380 iDelay=218, Bit 8, Center 17 (-150 ~ 185) 336
4472 01:02:44.392564 iDelay=218, Bit 9, Center 17 (-150 ~ 185) 336
4473 01:02:44.396139 iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336
4474 01:02:44.399166 iDelay=218, Bit 11, Center 17 (-150 ~ 185) 336
4475 01:02:44.406152 iDelay=218, Bit 12, Center 49 (-118 ~ 217) 336
4476 01:02:44.408917 iDelay=218, Bit 13, Center 49 (-118 ~ 217) 336
4477 01:02:44.412201 iDelay=218, Bit 14, Center 49 (-118 ~ 217) 336
4478 01:02:44.415636 iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320
4479 01:02:44.419113 ==
4480 01:02:44.419665 Dram Type= 6, Freq= 0, CH_1, rank 1
4481 01:02:44.424912 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4482 01:02:44.425381 ==
4483 01:02:44.425751 DQS Delay:
4484 01:02:44.428667 DQS0 = 0, DQS1 = 0
4485 01:02:44.429165 DQM Delay:
4486 01:02:44.432366 DQM0 = 41, DQM1 = 34
4487 01:02:44.432967 DQ Delay:
4488 01:02:44.435502 DQ0 =41, DQ1 =33, DQ2 =33, DQ3 =41
4489 01:02:44.438399 DQ4 =41, DQ5 =49, DQ6 =49, DQ7 =41
4490 01:02:44.441677 DQ8 =17, DQ9 =17, DQ10 =33, DQ11 =17
4491 01:02:44.445863 DQ12 =49, DQ13 =49, DQ14 =49, DQ15 =41
4492 01:02:44.446419
4493 01:02:44.446839
4494 01:02:44.447351 ==
4495 01:02:44.448510 Dram Type= 6, Freq= 0, CH_1, rank 1
4496 01:02:44.451773 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4497 01:02:44.452333 ==
4498 01:02:44.452702
4499 01:02:44.453105
4500 01:02:44.455096 TX Vref Scan disable
4501 01:02:44.458435 == TX Byte 0 ==
4502 01:02:44.461647 Update DQ dly =573 (2 ,1, 29) DQ OEN =(1 ,6)
4503 01:02:44.465497 Update DQM dly =573 (2 ,1, 29) DQM OEN =(1 ,6)
4504 01:02:44.468021 == TX Byte 1 ==
4505 01:02:44.472051 Update DQ dly =574 (2 ,1, 30) DQ OEN =(1 ,6)
4506 01:02:44.475339 Update DQM dly =574 (2 ,1, 30) DQM OEN =(1 ,6)
4507 01:02:44.475894 ==
4508 01:02:44.478259 Dram Type= 6, Freq= 0, CH_1, rank 1
4509 01:02:44.485119 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4510 01:02:44.485674 ==
4511 01:02:44.486040
4512 01:02:44.486380
4513 01:02:44.486710 TX Vref Scan disable
4514 01:02:44.489592 == TX Byte 0 ==
4515 01:02:44.492272 Update DQ dly =573 (2 ,1, 29) DQ OEN =(1 ,6)
4516 01:02:44.498803 Update DQM dly =573 (2 ,1, 29) DQM OEN =(1 ,6)
4517 01:02:44.499384 == TX Byte 1 ==
4518 01:02:44.502492 Update DQ dly =573 (2 ,1, 29) DQ OEN =(1 ,6)
4519 01:02:44.508874 Update DQM dly =573 (2 ,1, 29) DQM OEN =(1 ,6)
4520 01:02:44.509434
4521 01:02:44.509804 [DATLAT]
4522 01:02:44.510148 Freq=600, CH1 RK1
4523 01:02:44.510477
4524 01:02:44.512217 DATLAT Default: 0x8
4525 01:02:44.512809 0, 0xFFFF, sum = 0
4526 01:02:44.515313 1, 0xFFFF, sum = 0
4527 01:02:44.515780 2, 0xFFFF, sum = 0
4528 01:02:44.519131 3, 0xFFFF, sum = 0
4529 01:02:44.521789 4, 0xFFFF, sum = 0
4530 01:02:44.522258 5, 0xFFFF, sum = 0
4531 01:02:44.524996 6, 0xFFFF, sum = 0
4532 01:02:44.525467 7, 0x0, sum = 1
4533 01:02:44.525842 8, 0x0, sum = 2
4534 01:02:44.529371 9, 0x0, sum = 3
4535 01:02:44.529838 10, 0x0, sum = 4
4536 01:02:44.532395 best_step = 8
4537 01:02:44.532888
4538 01:02:44.533255 ==
4539 01:02:44.534886 Dram Type= 6, Freq= 0, CH_1, rank 1
4540 01:02:44.538456 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4541 01:02:44.538921 ==
4542 01:02:44.541686 RX Vref Scan: 0
4543 01:02:44.542234
4544 01:02:44.542639 RX Vref 0 -> 0, step: 1
4545 01:02:44.542972
4546 01:02:44.545026 RX Delay -195 -> 252, step: 8
4547 01:02:44.552546 iDelay=213, Bit 0, Center 40 (-115 ~ 196) 312
4548 01:02:44.556297 iDelay=213, Bit 1, Center 32 (-123 ~ 188) 312
4549 01:02:44.559650 iDelay=213, Bit 2, Center 28 (-131 ~ 188) 320
4550 01:02:44.562172 iDelay=213, Bit 3, Center 32 (-123 ~ 188) 312
4551 01:02:44.569060 iDelay=213, Bit 4, Center 36 (-123 ~ 196) 320
4552 01:02:44.572470 iDelay=213, Bit 5, Center 48 (-115 ~ 212) 328
4553 01:02:44.575944 iDelay=213, Bit 6, Center 44 (-115 ~ 204) 320
4554 01:02:44.579066 iDelay=213, Bit 7, Center 36 (-123 ~ 196) 320
4555 01:02:44.586169 iDelay=213, Bit 8, Center 12 (-147 ~ 172) 320
4556 01:02:44.589137 iDelay=213, Bit 9, Center 20 (-139 ~ 180) 320
4557 01:02:44.592576 iDelay=213, Bit 10, Center 28 (-131 ~ 188) 320
4558 01:02:44.596101 iDelay=213, Bit 11, Center 20 (-139 ~ 180) 320
4559 01:02:44.599382 iDelay=213, Bit 12, Center 36 (-123 ~ 196) 320
4560 01:02:44.606059 iDelay=213, Bit 13, Center 40 (-115 ~ 196) 312
4561 01:02:44.609625 iDelay=213, Bit 14, Center 36 (-123 ~ 196) 320
4562 01:02:44.613569 iDelay=213, Bit 15, Center 40 (-115 ~ 196) 312
4563 01:02:44.614122 ==
4564 01:02:44.615437 Dram Type= 6, Freq= 0, CH_1, rank 1
4565 01:02:44.622911 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4566 01:02:44.623480 ==
4567 01:02:44.623850 DQS Delay:
4568 01:02:44.624191 DQS0 = 0, DQS1 = 0
4569 01:02:44.625305 DQM Delay:
4570 01:02:44.625766 DQM0 = 37, DQM1 = 29
4571 01:02:44.629521 DQ Delay:
4572 01:02:44.634275 DQ0 =40, DQ1 =32, DQ2 =28, DQ3 =32
4573 01:02:44.634833 DQ4 =36, DQ5 =48, DQ6 =44, DQ7 =36
4574 01:02:44.635557 DQ8 =12, DQ9 =20, DQ10 =28, DQ11 =20
4575 01:02:44.641849 DQ12 =36, DQ13 =40, DQ14 =36, DQ15 =40
4576 01:02:44.642414
4577 01:02:44.642832
4578 01:02:44.648541 [DQSOSCAuto] RK1, (LSB)MR18= 0x5c5c, (MSB)MR19= 0x808, tDQSOscB0 = 392 ps tDQSOscB1 = 392 ps
4579 01:02:44.652131 CH1 RK1: MR19=808, MR18=5C5C
4580 01:02:44.658688 CH1_RK1: MR19=0x808, MR18=0x5C5C, DQSOSC=392, MR23=63, INC=170, DEC=113
4581 01:02:44.662809 [RxdqsGatingPostProcess] freq 600
4582 01:02:44.665052 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4583 01:02:44.668548 Pre-setting of DQS Precalculation
4584 01:02:44.675016 [DualRankRxdatlatCal] RK0: 8, RK1: 8, Final_Datlat 8
4585 01:02:44.681426 sync_frequency_calibration_params sync calibration params of frequency 600 to shu:5
4586 01:02:44.688285 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
4587 01:02:44.689086
4588 01:02:44.689473
4589 01:02:44.692078 [Calibration Summary] 1200 Mbps
4590 01:02:44.692635 CH 0, Rank 0
4591 01:02:44.694928 SW Impedance : PASS
4592 01:02:44.699357 DUTY Scan : NO K
4593 01:02:44.699918 ZQ Calibration : PASS
4594 01:02:44.701293 Jitter Meter : NO K
4595 01:02:44.704966 CBT Training : PASS
4596 01:02:44.705519 Write leveling : PASS
4597 01:02:44.709294 RX DQS gating : PASS
4598 01:02:44.711407 RX DQ/DQS(RDDQC) : PASS
4599 01:02:44.711956 TX DQ/DQS : PASS
4600 01:02:44.715444 RX DATLAT : PASS
4601 01:02:44.718037 RX DQ/DQS(Engine): PASS
4602 01:02:44.718493 TX OE : NO K
4603 01:02:44.718862 All Pass.
4604 01:02:44.721353
4605 01:02:44.721908 CH 0, Rank 1
4606 01:02:44.724385 SW Impedance : PASS
4607 01:02:44.724965 DUTY Scan : NO K
4608 01:02:44.728474 ZQ Calibration : PASS
4609 01:02:44.731172 Jitter Meter : NO K
4610 01:02:44.731718 CBT Training : PASS
4611 01:02:44.734947 Write leveling : PASS
4612 01:02:44.735413 RX DQS gating : PASS
4613 01:02:44.737653 RX DQ/DQS(RDDQC) : PASS
4614 01:02:44.741016 TX DQ/DQS : PASS
4615 01:02:44.741476 RX DATLAT : PASS
4616 01:02:44.744934 RX DQ/DQS(Engine): PASS
4617 01:02:44.747715 TX OE : NO K
4618 01:02:44.748267 All Pass.
4619 01:02:44.748639
4620 01:02:44.749033 CH 1, Rank 0
4621 01:02:44.751417 SW Impedance : PASS
4622 01:02:44.754019 DUTY Scan : NO K
4623 01:02:44.754481 ZQ Calibration : PASS
4624 01:02:44.757706 Jitter Meter : NO K
4625 01:02:44.761163 CBT Training : PASS
4626 01:02:44.761718 Write leveling : PASS
4627 01:02:44.764265 RX DQS gating : PASS
4628 01:02:44.767172 RX DQ/DQS(RDDQC) : PASS
4629 01:02:44.767633 TX DQ/DQS : PASS
4630 01:02:44.771018 RX DATLAT : PASS
4631 01:02:44.773981 RX DQ/DQS(Engine): PASS
4632 01:02:44.774441 TX OE : NO K
4633 01:02:44.777521 All Pass.
4634 01:02:44.777981
4635 01:02:44.778346 CH 1, Rank 1
4636 01:02:44.781048 SW Impedance : PASS
4637 01:02:44.781618 DUTY Scan : NO K
4638 01:02:44.783769 ZQ Calibration : PASS
4639 01:02:44.787877 Jitter Meter : NO K
4640 01:02:44.788431 CBT Training : PASS
4641 01:02:44.790975 Write leveling : PASS
4642 01:02:44.793659 RX DQS gating : PASS
4643 01:02:44.794122 RX DQ/DQS(RDDQC) : PASS
4644 01:02:44.797376 TX DQ/DQS : PASS
4645 01:02:44.797953 RX DATLAT : PASS
4646 01:02:44.800656 RX DQ/DQS(Engine): PASS
4647 01:02:44.804331 TX OE : NO K
4648 01:02:44.804929 All Pass.
4649 01:02:44.805298
4650 01:02:44.809044 DramC Write-DBI off
4651 01:02:44.809597 PER_BANK_REFRESH: Hybrid Mode
4652 01:02:44.811390 TX_TRACKING: ON
4653 01:02:44.821674 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 30, TRFC_05T 1, TXREFCNT 44, TRFCpb 9, TRFCpb_05T 1
4654 01:02:44.823901 [FAST_K] Save calibration result to emmc
4655 01:02:44.826973 dramc_set_vcore_voltage set vcore to 662500
4656 01:02:44.827433 Read voltage for 933, 3
4657 01:02:44.830523 Vio18 = 0
4658 01:02:44.830986 Vcore = 662500
4659 01:02:44.831351 Vdram = 0
4660 01:02:44.834310 Vddq = 0
4661 01:02:44.834785 Vmddr = 0
4662 01:02:44.840623 [FAST_K] DramcSave_Time_For_Cal_Init SHU3, femmc_Ready=0
4663 01:02:44.843760 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
4664 01:02:44.846784 MEM_TYPE=3, freq_sel=17
4665 01:02:44.850220 sv_algorithm_assistance_LP4_1600
4666 01:02:44.853613 ============ PULL DRAM RESETB DOWN ============
4667 01:02:44.856879 ========== PULL DRAM RESETB DOWN end =========
4668 01:02:44.863524 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4669 01:02:44.867235 ===================================
4670 01:02:44.867795 LPDDR4 DRAM CONFIGURATION
4671 01:02:44.870416 ===================================
4672 01:02:44.873136 EX_ROW_EN[0] = 0x0
4673 01:02:44.876531 EX_ROW_EN[1] = 0x0
4674 01:02:44.877139 LP4Y_EN = 0x0
4675 01:02:44.880236 WORK_FSP = 0x0
4676 01:02:44.880842 WL = 0x3
4677 01:02:44.883345 RL = 0x3
4678 01:02:44.883803 BL = 0x2
4679 01:02:44.886938 RPST = 0x0
4680 01:02:44.887500 RD_PRE = 0x0
4681 01:02:44.890132 WR_PRE = 0x1
4682 01:02:44.890692 WR_PST = 0x0
4683 01:02:44.894168 DBI_WR = 0x0
4684 01:02:44.894732 DBI_RD = 0x0
4685 01:02:44.897214 OTF = 0x1
4686 01:02:44.899995 ===================================
4687 01:02:44.902853 ===================================
4688 01:02:44.903311 ANA top config
4689 01:02:44.906865 ===================================
4690 01:02:44.910748 DLL_ASYNC_EN = 0
4691 01:02:44.912978 ALL_SLAVE_EN = 1
4692 01:02:44.916056 NEW_RANK_MODE = 1
4693 01:02:44.916517 DLL_IDLE_MODE = 1
4694 01:02:44.919674 LP45_APHY_COMB_EN = 1
4695 01:02:44.923895 TX_ODT_DIS = 1
4696 01:02:44.926439 NEW_8X_MODE = 1
4697 01:02:44.930037 ===================================
4698 01:02:44.933061 ===================================
4699 01:02:44.936298 data_rate = 1866
4700 01:02:44.936908 CKR = 1
4701 01:02:44.939600 DQ_P2S_RATIO = 8
4702 01:02:44.943590 ===================================
4703 01:02:44.946087 CA_P2S_RATIO = 8
4704 01:02:44.949644 DQ_CA_OPEN = 0
4705 01:02:44.952246 DQ_SEMI_OPEN = 0
4706 01:02:44.956620 CA_SEMI_OPEN = 0
4707 01:02:44.957238 CA_FULL_RATE = 0
4708 01:02:44.959180 DQ_CKDIV4_EN = 1
4709 01:02:44.962907 CA_CKDIV4_EN = 1
4710 01:02:44.965848 CA_PREDIV_EN = 0
4711 01:02:44.969207 PH8_DLY = 0
4712 01:02:44.972669 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
4713 01:02:44.973173 DQ_AAMCK_DIV = 4
4714 01:02:44.976048 CA_AAMCK_DIV = 4
4715 01:02:44.979529 CA_ADMCK_DIV = 4
4716 01:02:44.982256 DQ_TRACK_CA_EN = 0
4717 01:02:44.985950 CA_PICK = 933
4718 01:02:44.989635 CA_MCKIO = 933
4719 01:02:44.992424 MCKIO_SEMI = 0
4720 01:02:44.993178 PLL_FREQ = 3732
4721 01:02:44.995352 DQ_UI_PI_RATIO = 32
4722 01:02:44.998609 CA_UI_PI_RATIO = 0
4723 01:02:45.001941 ===================================
4724 01:02:45.005416 ===================================
4725 01:02:45.008764 memory_type:LPDDR4
4726 01:02:45.011731 GP_NUM : 10
4727 01:02:45.012320 SRAM_EN : 1
4728 01:02:45.015394 MD32_EN : 0
4729 01:02:45.018559 ===================================
4730 01:02:45.019021 [ANA_INIT] >>>>>>>>>>>>>>
4731 01:02:45.021738 <<<<<< [CONFIGURE PHASE]: ANA_TX
4732 01:02:45.025142 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
4733 01:02:45.029016 ===================================
4734 01:02:45.032390 data_rate = 1866,PCW = 0X8f00
4735 01:02:45.036198 ===================================
4736 01:02:45.038363 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
4737 01:02:45.045316 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4738 01:02:45.051603 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4739 01:02:45.055135 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
4740 01:02:45.058134 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
4741 01:02:45.061721 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
4742 01:02:45.065127 [ANA_INIT] flow start
4743 01:02:45.065683 [ANA_INIT] PLL >>>>>>>>
4744 01:02:45.068044 [ANA_INIT] PLL <<<<<<<<
4745 01:02:45.071890 [ANA_INIT] MIDPI >>>>>>>>
4746 01:02:45.072440 [ANA_INIT] MIDPI <<<<<<<<
4747 01:02:45.074905 [ANA_INIT] DLL >>>>>>>>
4748 01:02:45.077938 [ANA_INIT] flow end
4749 01:02:45.081876 ============ LP4 DIFF to SE enter ============
4750 01:02:45.084869 ============ LP4 DIFF to SE exit ============
4751 01:02:45.089274 [ANA_INIT] <<<<<<<<<<<<<
4752 01:02:45.091720 [Flow] Enable top DCM control >>>>>
4753 01:02:45.095196 [Flow] Enable top DCM control <<<<<
4754 01:02:45.098796 Enable DLL master slave shuffle
4755 01:02:45.101212 ==============================================================
4756 01:02:45.104883 Gating Mode config
4757 01:02:45.111538 ==============================================================
4758 01:02:45.112096 Config description:
4759 01:02:45.121411 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
4760 01:02:45.127759 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
4761 01:02:45.134691 SELPH_MODE 0: By rank 1: By Phase
4762 01:02:45.137583 ==============================================================
4763 01:02:45.140854 GAT_TRACK_EN = 1
4764 01:02:45.144831 RX_GATING_MODE = 2
4765 01:02:45.148340 RX_GATING_TRACK_MODE = 2
4766 01:02:45.151119 SELPH_MODE = 1
4767 01:02:45.155619 PICG_EARLY_EN = 1
4768 01:02:45.157439 VALID_LAT_VALUE = 1
4769 01:02:45.160907 ==============================================================
4770 01:02:45.164504 Enter into Gating configuration >>>>
4771 01:02:45.167664 Exit from Gating configuration <<<<
4772 01:02:45.171102 Enter into DVFS_PRE_config >>>>>
4773 01:02:45.184237 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
4774 01:02:45.188185 Exit from DVFS_PRE_config <<<<<
4775 01:02:45.190687 Enter into PICG configuration >>>>
4776 01:02:45.194676 Exit from PICG configuration <<<<
4777 01:02:45.195236 [RX_INPUT] configuration >>>>>
4778 01:02:45.197633 [RX_INPUT] configuration <<<<<
4779 01:02:45.204314 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
4780 01:02:45.207299 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
4781 01:02:45.214181 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
4782 01:02:45.220629 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
4783 01:02:45.227219 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
4784 01:02:45.233441 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
4785 01:02:45.236772 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
4786 01:02:45.240426 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
4787 01:02:45.246730 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
4788 01:02:45.250322 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
4789 01:02:45.253494 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
4790 01:02:45.256692 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4791 01:02:45.260753 ===================================
4792 01:02:45.263420 LPDDR4 DRAM CONFIGURATION
4793 01:02:45.266620 ===================================
4794 01:02:45.269975 EX_ROW_EN[0] = 0x0
4795 01:02:45.270532 EX_ROW_EN[1] = 0x0
4796 01:02:45.273682 LP4Y_EN = 0x0
4797 01:02:45.274231 WORK_FSP = 0x0
4798 01:02:45.277512 WL = 0x3
4799 01:02:45.278068 RL = 0x3
4800 01:02:45.280234 BL = 0x2
4801 01:02:45.280827 RPST = 0x0
4802 01:02:45.283966 RD_PRE = 0x0
4803 01:02:45.284520 WR_PRE = 0x1
4804 01:02:45.286705 WR_PST = 0x0
4805 01:02:45.289855 DBI_WR = 0x0
4806 01:02:45.290402 DBI_RD = 0x0
4807 01:02:45.293174 OTF = 0x1
4808 01:02:45.296456 ===================================
4809 01:02:45.300450 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
4810 01:02:45.303770 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
4811 01:02:45.306913 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4812 01:02:45.309722 ===================================
4813 01:02:45.313530 LPDDR4 DRAM CONFIGURATION
4814 01:02:45.316870 ===================================
4815 01:02:45.320136 EX_ROW_EN[0] = 0x10
4816 01:02:45.320683 EX_ROW_EN[1] = 0x0
4817 01:02:45.323632 LP4Y_EN = 0x0
4818 01:02:45.324185 WORK_FSP = 0x0
4819 01:02:45.326125 WL = 0x3
4820 01:02:45.326584 RL = 0x3
4821 01:02:45.329857 BL = 0x2
4822 01:02:45.330317 RPST = 0x0
4823 01:02:45.333127 RD_PRE = 0x0
4824 01:02:45.333624 WR_PRE = 0x1
4825 01:02:45.335967 WR_PST = 0x0
4826 01:02:45.339608 DBI_WR = 0x0
4827 01:02:45.340191 DBI_RD = 0x0
4828 01:02:45.342367 OTF = 0x1
4829 01:02:45.346949 ===================================
4830 01:02:45.349478 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
4831 01:02:45.354299 nWR fixed to 30
4832 01:02:45.358866 [ModeRegInit_LP4] CH0 RK0
4833 01:02:45.359328 [ModeRegInit_LP4] CH0 RK1
4834 01:02:45.361474 [ModeRegInit_LP4] CH1 RK0
4835 01:02:45.364602 [ModeRegInit_LP4] CH1 RK1
4836 01:02:45.365129 match AC timing 8
4837 01:02:45.371888 dramType 5, freq 933, readDBI 0, DivMode 1, cbtMode 0
4838 01:02:45.375132 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
4839 01:02:45.377909 [WriteLatency GET] Version:0-MR_RL_field_value:3-WL:10
4840 01:02:45.385215 [TX_path_calculate] data rate=1866, WL=10, DQS_TotalUI=21
4841 01:02:45.388178 [TX_path_calculate] DQS = (2,5) DQS_OE = (2,2)
4842 01:02:45.388698 ==
4843 01:02:45.391047 Dram Type= 6, Freq= 0, CH_0, rank 0
4844 01:02:45.394018 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4845 01:02:45.394559 ==
4846 01:02:45.401779 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4847 01:02:45.407459 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=39, u1VrefScanEnd=39
4848 01:02:45.410988 [CA 0] Center 38 (8~69) winsize 62
4849 01:02:45.414685 [CA 1] Center 38 (8~69) winsize 62
4850 01:02:45.417771 [CA 2] Center 36 (5~67) winsize 63
4851 01:02:45.420908 [CA 3] Center 36 (5~67) winsize 63
4852 01:02:45.424006 [CA 4] Center 34 (4~65) winsize 62
4853 01:02:45.427822 [CA 5] Center 34 (4~65) winsize 62
4854 01:02:45.428378
4855 01:02:45.430418 [CmdBusTrainingLP45] Vref(ca) range 1: 39
4856 01:02:45.430879
4857 01:02:45.434290 [CATrainingPosCal] consider 1 rank data
4858 01:02:45.437344 u2DelayCellTimex100 = 270/100 ps
4859 01:02:45.440491 CA0 delay=38 (8~69),Diff = 4 PI (24 cell)
4860 01:02:45.443846 CA1 delay=38 (8~69),Diff = 4 PI (24 cell)
4861 01:02:45.447648 CA2 delay=36 (5~67),Diff = 2 PI (12 cell)
4862 01:02:45.450910 CA3 delay=36 (5~67),Diff = 2 PI (12 cell)
4863 01:02:45.456838 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
4864 01:02:45.460959 CA5 delay=34 (4~65),Diff = 0 PI (0 cell)
4865 01:02:45.461519
4866 01:02:45.463438 CA PerBit enable=1, Macro0, CA PI delay=34
4867 01:02:45.463901
4868 01:02:45.466976 [CBTSetCACLKResult] CA Dly = 34
4869 01:02:45.467530 CS Dly: 7 (0~38)
4870 01:02:45.467893 ==
4871 01:02:45.470636 Dram Type= 6, Freq= 0, CH_0, rank 1
4872 01:02:45.477689 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4873 01:02:45.478250 ==
4874 01:02:45.480751 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4875 01:02:45.487136 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=39, u1VrefScanEnd=39
4876 01:02:45.490473 [CA 0] Center 38 (8~69) winsize 62
4877 01:02:45.493738 [CA 1] Center 38 (8~69) winsize 62
4878 01:02:45.498066 [CA 2] Center 36 (5~67) winsize 63
4879 01:02:45.499935 [CA 3] Center 35 (5~66) winsize 62
4880 01:02:45.503831 [CA 4] Center 34 (3~65) winsize 63
4881 01:02:45.506720 [CA 5] Center 34 (4~65) winsize 62
4882 01:02:45.507269
4883 01:02:45.509950 [CmdBusTrainingLP45] Vref(ca) range 1: 39
4884 01:02:45.510411
4885 01:02:45.514156 [CATrainingPosCal] consider 2 rank data
4886 01:02:45.517120 u2DelayCellTimex100 = 270/100 ps
4887 01:02:45.520657 CA0 delay=38 (8~69),Diff = 4 PI (24 cell)
4888 01:02:45.523637 CA1 delay=38 (8~69),Diff = 4 PI (24 cell)
4889 01:02:45.526733 CA2 delay=36 (5~67),Diff = 2 PI (12 cell)
4890 01:02:45.533468 CA3 delay=35 (5~66),Diff = 1 PI (6 cell)
4891 01:02:45.536215 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
4892 01:02:45.540053 CA5 delay=34 (4~65),Diff = 0 PI (0 cell)
4893 01:02:45.540691
4894 01:02:45.543037 CA PerBit enable=1, Macro0, CA PI delay=34
4895 01:02:45.543496
4896 01:02:45.546266 [CBTSetCACLKResult] CA Dly = 34
4897 01:02:45.546729 CS Dly: 7 (0~38)
4898 01:02:45.547091
4899 01:02:45.551126 ----->DramcWriteLeveling(PI) begin...
4900 01:02:45.552825 ==
4901 01:02:45.553288 Dram Type= 6, Freq= 0, CH_0, rank 0
4902 01:02:45.560187 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4903 01:02:45.560792 ==
4904 01:02:45.563912 Write leveling (Byte 0): 26 => 26
4905 01:02:45.566984 Write leveling (Byte 1): 25 => 25
4906 01:02:45.570624 DramcWriteLeveling(PI) end<-----
4907 01:02:45.571196
4908 01:02:45.571564 ==
4909 01:02:45.573093 Dram Type= 6, Freq= 0, CH_0, rank 0
4910 01:02:45.576781 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4911 01:02:45.577354 ==
4912 01:02:45.579715 [Gating] SW mode calibration
4913 01:02:45.586633 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 20 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
4914 01:02:45.589862 RX_Path_delay_UI(34) -3 - DQSINCTL_UI(24) = u1StartUI(10)
4915 01:02:45.596807 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4916 01:02:45.600035 0 10 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4917 01:02:45.602827 0 10 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4918 01:02:45.609734 0 10 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4919 01:02:45.613625 0 10 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4920 01:02:45.616924 0 10 20 | B1->B0 | 3434 2f2f | 1 1 | (1 0) (1 0)
4921 01:02:45.622813 0 10 24 | B1->B0 | 2f2f 2424 | 1 0 | (1 0) (0 0)
4922 01:02:45.626364 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4923 01:02:45.629350 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4924 01:02:45.635503 0 11 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4925 01:02:45.639655 0 11 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4926 01:02:45.642974 0 11 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4927 01:02:45.648859 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4928 01:02:45.652429 0 11 20 | B1->B0 | 2424 2e2e | 0 0 | (0 0) (1 1)
4929 01:02:45.656664 0 11 24 | B1->B0 | 3a3a 4646 | 0 0 | (1 1) (0 0)
4930 01:02:45.662751 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4931 01:02:45.666799 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4932 01:02:45.670461 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4933 01:02:45.677246 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4934 01:02:45.679153 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4935 01:02:45.682455 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4936 01:02:45.689239 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4937 01:02:45.692608 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4938 01:02:45.695809 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4939 01:02:45.702332 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4940 01:02:45.705583 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4941 01:02:45.708772 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4942 01:02:45.715191 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4943 01:02:45.719132 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4944 01:02:45.722049 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4945 01:02:45.728994 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4946 01:02:45.731726 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4947 01:02:45.735065 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4948 01:02:45.741817 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4949 01:02:45.745330 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4950 01:02:45.748808 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4951 01:02:45.756135 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4952 01:02:45.758346 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
4953 01:02:45.761831 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4954 01:02:45.765876 Total UI for P1: 0, mck2ui 16
4955 01:02:45.768866 best dqsien dly found for B0: ( 0, 14, 20)
4956 01:02:45.772466 Total UI for P1: 0, mck2ui 16
4957 01:02:45.775320 best dqsien dly found for B1: ( 0, 14, 20)
4958 01:02:45.778152 best DQS0 dly(MCK, UI, PI) = (0, 14, 20)
4959 01:02:45.781381 best DQS1 dly(MCK, UI, PI) = (0, 14, 20)
4960 01:02:45.781841
4961 01:02:45.788694 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 20)
4962 01:02:45.792333 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 20)
4963 01:02:45.792930 [Gating] SW calibration Done
4964 01:02:45.794790 ==
4965 01:02:45.798535 Dram Type= 6, Freq= 0, CH_0, rank 0
4966 01:02:45.801141 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4967 01:02:45.801606 ==
4968 01:02:45.801976 RX Vref Scan: 0
4969 01:02:45.802319
4970 01:02:45.805322 RX Vref 0 -> 0, step: 1
4971 01:02:45.805877
4972 01:02:45.808949 RX Delay -80 -> 252, step: 8
4973 01:02:45.811042 iDelay=208, Bit 0, Center 91 (-8 ~ 191) 200
4974 01:02:45.814491 iDelay=208, Bit 1, Center 95 (0 ~ 191) 192
4975 01:02:45.820990 iDelay=208, Bit 2, Center 91 (-8 ~ 191) 200
4976 01:02:45.824006 iDelay=208, Bit 3, Center 91 (-8 ~ 191) 200
4977 01:02:45.827512 iDelay=208, Bit 4, Center 99 (0 ~ 199) 200
4978 01:02:45.831102 iDelay=208, Bit 5, Center 87 (-8 ~ 183) 192
4979 01:02:45.834323 iDelay=208, Bit 6, Center 103 (0 ~ 207) 208
4980 01:02:45.837904 iDelay=208, Bit 7, Center 107 (8 ~ 207) 200
4981 01:02:45.844812 iDelay=208, Bit 8, Center 75 (-24 ~ 175) 200
4982 01:02:45.848869 iDelay=208, Bit 9, Center 71 (-24 ~ 167) 192
4983 01:02:45.852012 iDelay=208, Bit 10, Center 87 (-8 ~ 183) 192
4984 01:02:45.854798 iDelay=208, Bit 11, Center 83 (-8 ~ 175) 184
4985 01:02:45.857311 iDelay=208, Bit 12, Center 91 (-8 ~ 191) 200
4986 01:02:45.863876 iDelay=208, Bit 13, Center 91 (-8 ~ 191) 200
4987 01:02:45.867514 iDelay=208, Bit 14, Center 91 (-8 ~ 191) 200
4988 01:02:45.870869 iDelay=208, Bit 15, Center 91 (-8 ~ 191) 200
4989 01:02:45.871423 ==
4990 01:02:45.874037 Dram Type= 6, Freq= 0, CH_0, rank 0
4991 01:02:45.876977 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
4992 01:02:45.877454 ==
4993 01:02:45.880129 DQS Delay:
4994 01:02:45.880582 DQS0 = 0, DQS1 = 0
4995 01:02:45.883764 DQM Delay:
4996 01:02:45.884314 DQM0 = 95, DQM1 = 85
4997 01:02:45.884679 DQ Delay:
4998 01:02:45.887666 DQ0 =91, DQ1 =95, DQ2 =91, DQ3 =91
4999 01:02:45.890728 DQ4 =99, DQ5 =87, DQ6 =103, DQ7 =107
5000 01:02:45.893435 DQ8 =75, DQ9 =71, DQ10 =87, DQ11 =83
5001 01:02:45.897437 DQ12 =91, DQ13 =91, DQ14 =91, DQ15 =91
5002 01:02:45.897994
5003 01:02:45.898360
5004 01:02:45.900915 ==
5005 01:02:45.904199 Dram Type= 6, Freq= 0, CH_0, rank 0
5006 01:02:45.907633 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5007 01:02:45.908189 ==
5008 01:02:45.908553
5009 01:02:45.908936
5010 01:02:45.910126 TX Vref Scan disable
5011 01:02:45.910580 == TX Byte 0 ==
5012 01:02:45.913864 Update DQ dly =709 (2 ,5, 37) DQ OEN =(2 ,2)
5013 01:02:45.920171 Update DQM dly =709 (2 ,5, 37) DQM OEN =(2 ,2)
5014 01:02:45.920769 == TX Byte 1 ==
5015 01:02:45.926728 Update DQ dly =707 (2 ,5, 35) DQ OEN =(2 ,2)
5016 01:02:45.930391 Update DQM dly =707 (2 ,5, 35) DQM OEN =(2 ,2)
5017 01:02:45.930945 ==
5018 01:02:45.934512 Dram Type= 6, Freq= 0, CH_0, rank 0
5019 01:02:45.936286 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5020 01:02:45.936789 ==
5021 01:02:45.937165
5022 01:02:45.937500
5023 01:02:45.940407 TX Vref Scan disable
5024 01:02:45.944349 == TX Byte 0 ==
5025 01:02:45.946759 Update DQ dly =709 (2 ,5, 37) DQ OEN =(2 ,2)
5026 01:02:45.949606 Update DQM dly =709 (2 ,5, 37) DQM OEN =(2 ,2)
5027 01:02:45.954574 == TX Byte 1 ==
5028 01:02:45.956549 Update DQ dly =706 (2 ,5, 34) DQ OEN =(2 ,2)
5029 01:02:45.960130 Update DQM dly =706 (2 ,5, 34) DQM OEN =(2 ,2)
5030 01:02:45.960586
5031 01:02:45.963102 [DATLAT]
5032 01:02:45.963651 Freq=933, CH0 RK0
5033 01:02:45.964015
5034 01:02:45.966129 DATLAT Default: 0xd
5035 01:02:45.966586 0, 0xFFFF, sum = 0
5036 01:02:45.969731 1, 0xFFFF, sum = 0
5037 01:02:45.970371 2, 0xFFFF, sum = 0
5038 01:02:45.973183 3, 0xFFFF, sum = 0
5039 01:02:45.973648 4, 0xFFFF, sum = 0
5040 01:02:45.976282 5, 0xFFFF, sum = 0
5041 01:02:45.976889 6, 0xFFFF, sum = 0
5042 01:02:45.980078 7, 0xFFFF, sum = 0
5043 01:02:45.980638 8, 0xFFFF, sum = 0
5044 01:02:45.983556 9, 0xFFFF, sum = 0
5045 01:02:45.984138 10, 0x0, sum = 1
5046 01:02:45.985971 11, 0x0, sum = 2
5047 01:02:45.986437 12, 0x0, sum = 3
5048 01:02:45.990530 13, 0x0, sum = 4
5049 01:02:45.991089 best_step = 11
5050 01:02:45.991452
5051 01:02:45.991789 ==
5052 01:02:45.993017 Dram Type= 6, Freq= 0, CH_0, rank 0
5053 01:02:46.000010 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5054 01:02:46.000565 ==
5055 01:02:46.000977 RX Vref Scan: 1
5056 01:02:46.001318
5057 01:02:46.003171 RX Vref 0 -> 0, step: 1
5058 01:02:46.003722
5059 01:02:46.006365 RX Delay -69 -> 252, step: 4
5060 01:02:46.006919
5061 01:02:46.009482 Set Vref, RX VrefLevel [Byte0]: 46
5062 01:02:46.013033 [Byte1]: 48
5063 01:02:46.013583
5064 01:02:46.016543 Final RX Vref Byte 0 = 46 to rank0
5065 01:02:46.020155 Final RX Vref Byte 1 = 48 to rank0
5066 01:02:46.023096 Final RX Vref Byte 0 = 46 to rank1
5067 01:02:46.026237 Final RX Vref Byte 1 = 48 to rank1==
5068 01:02:46.029547 Dram Type= 6, Freq= 0, CH_0, rank 0
5069 01:02:46.033111 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5070 01:02:46.033704 ==
5071 01:02:46.036156 DQS Delay:
5072 01:02:46.036615 DQS0 = 0, DQS1 = 0
5073 01:02:46.037049 DQM Delay:
5074 01:02:46.039782 DQM0 = 98, DQM1 = 87
5075 01:02:46.040337 DQ Delay:
5076 01:02:46.042714 DQ0 =94, DQ1 =100, DQ2 =96, DQ3 =94
5077 01:02:46.045679 DQ4 =100, DQ5 =90, DQ6 =104, DQ7 =106
5078 01:02:46.049707 DQ8 =78, DQ9 =72, DQ10 =86, DQ11 =80
5079 01:02:46.052460 DQ12 =94, DQ13 =94, DQ14 =96, DQ15 =98
5080 01:02:46.052995
5081 01:02:46.053352
5082 01:02:46.062418 [DQSOSCAuto] RK0, (LSB)MR18= 0x2222, (MSB)MR19= 0x505, tDQSOscB0 = 411 ps tDQSOscB1 = 411 ps
5083 01:02:46.066030 CH0 RK0: MR19=505, MR18=2222
5084 01:02:46.069461 CH0_RK0: MR19=0x505, MR18=0x2222, DQSOSC=411, MR23=63, INC=64, DEC=42
5085 01:02:46.073033
5086 01:02:46.075715 ----->DramcWriteLeveling(PI) begin...
5087 01:02:46.076185 ==
5088 01:02:46.079286 Dram Type= 6, Freq= 0, CH_0, rank 1
5089 01:02:46.083203 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5090 01:02:46.083758 ==
5091 01:02:46.085869 Write leveling (Byte 0): 25 => 25
5092 01:02:46.089379 Write leveling (Byte 1): 25 => 25
5093 01:02:46.092312 DramcWriteLeveling(PI) end<-----
5094 01:02:46.092790
5095 01:02:46.093151 ==
5096 01:02:46.095891 Dram Type= 6, Freq= 0, CH_0, rank 1
5097 01:02:46.098774 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5098 01:02:46.099326 ==
5099 01:02:46.102245 [Gating] SW mode calibration
5100 01:02:46.109346 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 20 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5101 01:02:46.116187 RX_Path_delay_UI(34) -3 - DQSINCTL_UI(24) = u1StartUI(10)
5102 01:02:46.119398 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5103 01:02:46.122601 0 10 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5104 01:02:46.128663 0 10 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5105 01:02:46.132402 0 10 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5106 01:02:46.135354 0 10 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
5107 01:02:46.141515 0 10 20 | B1->B0 | 3333 2e2e | 1 0 | (1 0) (0 0)
5108 01:02:46.144749 0 10 24 | B1->B0 | 2727 2323 | 0 0 | (0 0) (1 0)
5109 01:02:46.149093 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5110 01:02:46.155238 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5111 01:02:46.158091 0 11 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5112 01:02:46.161523 0 11 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5113 01:02:46.168010 0 11 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5114 01:02:46.171911 0 11 16 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)
5115 01:02:46.175335 0 11 20 | B1->B0 | 2d2d 3636 | 0 0 | (0 0) (0 0)
5116 01:02:46.181489 0 11 24 | B1->B0 | 3e3e 4646 | 0 0 | (0 0) (0 0)
5117 01:02:46.185206 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5118 01:02:46.188425 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5119 01:02:46.194895 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5120 01:02:46.198053 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5121 01:02:46.202315 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5122 01:02:46.208270 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5123 01:02:46.211582 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5124 01:02:46.215088 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
5125 01:02:46.221595 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5126 01:02:46.224935 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5127 01:02:46.228382 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5128 01:02:46.234457 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5129 01:02:46.237307 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5130 01:02:46.241763 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5131 01:02:46.247914 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5132 01:02:46.250895 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5133 01:02:46.254256 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5134 01:02:46.261243 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5135 01:02:46.264606 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5136 01:02:46.268101 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5137 01:02:46.274100 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5138 01:02:46.277545 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5139 01:02:46.281078 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5140 01:02:46.287977 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
5141 01:02:46.288519 Total UI for P1: 0, mck2ui 16
5142 01:02:46.291365 best dqsien dly found for B0: ( 0, 14, 22)
5143 01:02:46.298119 0 14 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5144 01:02:46.300613 Total UI for P1: 0, mck2ui 16
5145 01:02:46.304416 best dqsien dly found for B1: ( 0, 14, 24)
5146 01:02:46.307624 best DQS0 dly(MCK, UI, PI) = (0, 14, 22)
5147 01:02:46.310374 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
5148 01:02:46.310830
5149 01:02:46.313705 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 22)
5150 01:02:46.317272 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 24)
5151 01:02:46.321096 [Gating] SW calibration Done
5152 01:02:46.321649 ==
5153 01:02:46.324476 Dram Type= 6, Freq= 0, CH_0, rank 1
5154 01:02:46.327371 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5155 01:02:46.327831 ==
5156 01:02:46.330905 RX Vref Scan: 0
5157 01:02:46.331361
5158 01:02:46.333424 RX Vref 0 -> 0, step: 1
5159 01:02:46.333878
5160 01:02:46.334242 RX Delay -80 -> 252, step: 8
5161 01:02:46.340591 iDelay=208, Bit 0, Center 91 (-8 ~ 191) 200
5162 01:02:46.343636 iDelay=208, Bit 1, Center 99 (0 ~ 199) 200
5163 01:02:46.347109 iDelay=208, Bit 2, Center 95 (0 ~ 191) 192
5164 01:02:46.351191 iDelay=208, Bit 3, Center 91 (0 ~ 183) 184
5165 01:02:46.353372 iDelay=208, Bit 4, Center 99 (0 ~ 199) 200
5166 01:02:46.357450 iDelay=208, Bit 5, Center 83 (-16 ~ 183) 200
5167 01:02:46.363396 iDelay=208, Bit 6, Center 103 (8 ~ 199) 192
5168 01:02:46.366746 iDelay=208, Bit 7, Center 107 (8 ~ 207) 200
5169 01:02:46.371005 iDelay=208, Bit 8, Center 75 (-16 ~ 167) 184
5170 01:02:46.374474 iDelay=208, Bit 9, Center 67 (-32 ~ 167) 200
5171 01:02:46.376917 iDelay=208, Bit 10, Center 83 (-16 ~ 183) 200
5172 01:02:46.384129 iDelay=208, Bit 11, Center 79 (-16 ~ 175) 192
5173 01:02:46.387901 iDelay=208, Bit 12, Center 99 (8 ~ 191) 184
5174 01:02:46.390542 iDelay=208, Bit 13, Center 91 (-8 ~ 191) 200
5175 01:02:46.393620 iDelay=208, Bit 14, Center 91 (-8 ~ 191) 200
5176 01:02:46.396593 iDelay=208, Bit 15, Center 99 (8 ~ 191) 184
5177 01:02:46.400364 ==
5178 01:02:46.400982 Dram Type= 6, Freq= 0, CH_0, rank 1
5179 01:02:46.407028 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5180 01:02:46.407586 ==
5181 01:02:46.407954 DQS Delay:
5182 01:02:46.410123 DQS0 = 0, DQS1 = 0
5183 01:02:46.410583 DQM Delay:
5184 01:02:46.413127 DQM0 = 96, DQM1 = 85
5185 01:02:46.413682 DQ Delay:
5186 01:02:46.416986 DQ0 =91, DQ1 =99, DQ2 =95, DQ3 =91
5187 01:02:46.419765 DQ4 =99, DQ5 =83, DQ6 =103, DQ7 =107
5188 01:02:46.422869 DQ8 =75, DQ9 =67, DQ10 =83, DQ11 =79
5189 01:02:46.426621 DQ12 =99, DQ13 =91, DQ14 =91, DQ15 =99
5190 01:02:46.427178
5191 01:02:46.427544
5192 01:02:46.427883 ==
5193 01:02:46.429364 Dram Type= 6, Freq= 0, CH_0, rank 1
5194 01:02:46.433153 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5195 01:02:46.433709 ==
5196 01:02:46.434077
5197 01:02:46.434413
5198 01:02:46.436259 TX Vref Scan disable
5199 01:02:46.439257 == TX Byte 0 ==
5200 01:02:46.442728 Update DQ dly =708 (2 ,5, 36) DQ OEN =(2 ,2)
5201 01:02:46.445999 Update DQM dly =708 (2 ,5, 36) DQM OEN =(2 ,2)
5202 01:02:46.449241 == TX Byte 1 ==
5203 01:02:46.453782 Update DQ dly =707 (2 ,5, 35) DQ OEN =(2 ,2)
5204 01:02:46.455768 Update DQM dly =707 (2 ,5, 35) DQM OEN =(2 ,2)
5205 01:02:46.456240 ==
5206 01:02:46.460030 Dram Type= 6, Freq= 0, CH_0, rank 1
5207 01:02:46.466334 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5208 01:02:46.467175 ==
5209 01:02:46.467609
5210 01:02:46.468051
5211 01:02:46.468390 TX Vref Scan disable
5212 01:02:46.469827 == TX Byte 0 ==
5213 01:02:46.473291 Update DQ dly =708 (2 ,5, 36) DQ OEN =(2 ,2)
5214 01:02:46.479899 Update DQM dly =708 (2 ,5, 36) DQM OEN =(2 ,2)
5215 01:02:46.480452 == TX Byte 1 ==
5216 01:02:46.482625 Update DQ dly =706 (2 ,5, 34) DQ OEN =(2 ,2)
5217 01:02:46.489521 Update DQM dly =706 (2 ,5, 34) DQM OEN =(2 ,2)
5218 01:02:46.489973
5219 01:02:46.490330 [DATLAT]
5220 01:02:46.490665 Freq=933, CH0 RK1
5221 01:02:46.490987
5222 01:02:46.493573 DATLAT Default: 0xb
5223 01:02:46.496324 0, 0xFFFF, sum = 0
5224 01:02:46.496947 1, 0xFFFF, sum = 0
5225 01:02:46.499973 2, 0xFFFF, sum = 0
5226 01:02:46.500432 3, 0xFFFF, sum = 0
5227 01:02:46.502960 4, 0xFFFF, sum = 0
5228 01:02:46.503418 5, 0xFFFF, sum = 0
5229 01:02:46.506176 6, 0xFFFF, sum = 0
5230 01:02:46.506635 7, 0xFFFF, sum = 0
5231 01:02:46.509405 8, 0xFFFF, sum = 0
5232 01:02:46.509861 9, 0xFFFF, sum = 0
5233 01:02:46.512375 10, 0x0, sum = 1
5234 01:02:46.512880 11, 0x0, sum = 2
5235 01:02:46.516124 12, 0x0, sum = 3
5236 01:02:46.516673 13, 0x0, sum = 4
5237 01:02:46.517107 best_step = 11
5238 01:02:46.519103
5239 01:02:46.519555 ==
5240 01:02:46.522771 Dram Type= 6, Freq= 0, CH_0, rank 1
5241 01:02:46.525981 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5242 01:02:46.526533 ==
5243 01:02:46.526900 RX Vref Scan: 0
5244 01:02:46.527360
5245 01:02:46.529184 RX Vref 0 -> 0, step: 1
5246 01:02:46.529635
5247 01:02:46.533265 RX Delay -77 -> 252, step: 4
5248 01:02:46.539085 iDelay=199, Bit 0, Center 94 (3 ~ 186) 184
5249 01:02:46.543148 iDelay=199, Bit 1, Center 98 (3 ~ 194) 192
5250 01:02:46.546446 iDelay=199, Bit 2, Center 96 (7 ~ 186) 180
5251 01:02:46.549066 iDelay=199, Bit 3, Center 92 (3 ~ 182) 180
5252 01:02:46.553003 iDelay=199, Bit 4, Center 102 (11 ~ 194) 184
5253 01:02:46.555451 iDelay=199, Bit 5, Center 88 (-5 ~ 182) 188
5254 01:02:46.562023 iDelay=199, Bit 6, Center 104 (15 ~ 194) 180
5255 01:02:46.565349 iDelay=199, Bit 7, Center 106 (15 ~ 198) 184
5256 01:02:46.570057 iDelay=199, Bit 8, Center 74 (-17 ~ 166) 184
5257 01:02:46.572077 iDelay=199, Bit 9, Center 72 (-17 ~ 162) 180
5258 01:02:46.576312 iDelay=199, Bit 10, Center 88 (-5 ~ 182) 188
5259 01:02:46.582926 iDelay=199, Bit 11, Center 78 (-9 ~ 166) 176
5260 01:02:46.585197 iDelay=199, Bit 12, Center 94 (7 ~ 182) 176
5261 01:02:46.589308 iDelay=199, Bit 13, Center 90 (-1 ~ 182) 184
5262 01:02:46.592658 iDelay=199, Bit 14, Center 98 (7 ~ 190) 184
5263 01:02:46.595431 iDelay=199, Bit 15, Center 94 (3 ~ 186) 184
5264 01:02:46.595893 ==
5265 01:02:46.599233 Dram Type= 6, Freq= 0, CH_0, rank 1
5266 01:02:46.605721 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5267 01:02:46.606278 ==
5268 01:02:46.606646 DQS Delay:
5269 01:02:46.608940 DQS0 = 0, DQS1 = 0
5270 01:02:46.609407 DQM Delay:
5271 01:02:46.609775 DQM0 = 97, DQM1 = 86
5272 01:02:46.612181 DQ Delay:
5273 01:02:46.615851 DQ0 =94, DQ1 =98, DQ2 =96, DQ3 =92
5274 01:02:46.618498 DQ4 =102, DQ5 =88, DQ6 =104, DQ7 =106
5275 01:02:46.622021 DQ8 =74, DQ9 =72, DQ10 =88, DQ11 =78
5276 01:02:46.625285 DQ12 =94, DQ13 =90, DQ14 =98, DQ15 =94
5277 01:02:46.625748
5278 01:02:46.626113
5279 01:02:46.631583 [DQSOSCAuto] RK1, (LSB)MR18= 0x2929, (MSB)MR19= 0x505, tDQSOscB0 = 408 ps tDQSOscB1 = 408 ps
5280 01:02:46.635695 CH0 RK1: MR19=505, MR18=2929
5281 01:02:46.641912 CH0_RK1: MR19=0x505, MR18=0x2929, DQSOSC=408, MR23=63, INC=65, DEC=43
5282 01:02:46.644807 [RxdqsGatingPostProcess] freq 933
5283 01:02:46.648885 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
5284 01:02:46.652413 Pre-setting of DQS Precalculation
5285 01:02:46.658934 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5286 01:02:46.659490 ==
5287 01:02:46.661395 Dram Type= 6, Freq= 0, CH_1, rank 0
5288 01:02:46.665288 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5289 01:02:46.665848 ==
5290 01:02:46.671577 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5291 01:02:46.678613 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=39, u1VrefScanEnd=39
5292 01:02:46.681824 [CA 0] Center 37 (6~68) winsize 63
5293 01:02:46.684316 [CA 1] Center 37 (6~68) winsize 63
5294 01:02:46.687866 [CA 2] Center 35 (5~65) winsize 61
5295 01:02:46.691317 [CA 3] Center 34 (4~65) winsize 62
5296 01:02:46.694455 [CA 4] Center 33 (3~63) winsize 61
5297 01:02:46.698017 [CA 5] Center 33 (3~64) winsize 62
5298 01:02:46.698470
5299 01:02:46.701364 [CmdBusTrainingLP45] Vref(ca) range 1: 39
5300 01:02:46.701819
5301 01:02:46.704537 [CATrainingPosCal] consider 1 rank data
5302 01:02:46.708152 u2DelayCellTimex100 = 270/100 ps
5303 01:02:46.711713 CA0 delay=37 (6~68),Diff = 4 PI (24 cell)
5304 01:02:46.714878 CA1 delay=37 (6~68),Diff = 4 PI (24 cell)
5305 01:02:46.718238 CA2 delay=35 (5~65),Diff = 2 PI (12 cell)
5306 01:02:46.720975 CA3 delay=34 (4~65),Diff = 1 PI (6 cell)
5307 01:02:46.724928 CA4 delay=33 (3~63),Diff = 0 PI (0 cell)
5308 01:02:46.727729 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
5309 01:02:46.728188
5310 01:02:46.734701 CA PerBit enable=1, Macro0, CA PI delay=33
5311 01:02:46.735162
5312 01:02:46.737925 [CBTSetCACLKResult] CA Dly = 33
5313 01:02:46.738338 CS Dly: 5 (0~36)
5314 01:02:46.738795 ==
5315 01:02:46.740786 Dram Type= 6, Freq= 0, CH_1, rank 1
5316 01:02:46.744126 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5317 01:02:46.744870 ==
5318 01:02:46.750557 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5319 01:02:46.758105 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
5320 01:02:46.760608 [CA 0] Center 37 (6~68) winsize 63
5321 01:02:46.764214 [CA 1] Center 37 (6~68) winsize 63
5322 01:02:46.767333 [CA 2] Center 34 (4~65) winsize 62
5323 01:02:46.771493 [CA 3] Center 34 (4~65) winsize 62
5324 01:02:46.774053 [CA 4] Center 33 (3~63) winsize 61
5325 01:02:46.777100 [CA 5] Center 33 (3~63) winsize 61
5326 01:02:46.777607
5327 01:02:46.781163 [CmdBusTrainingLP45] Vref(ca) range 1: 37
5328 01:02:46.781577
5329 01:02:46.783702 [CATrainingPosCal] consider 2 rank data
5330 01:02:46.788217 u2DelayCellTimex100 = 270/100 ps
5331 01:02:46.790721 CA0 delay=37 (6~68),Diff = 4 PI (24 cell)
5332 01:02:46.793792 CA1 delay=37 (6~68),Diff = 4 PI (24 cell)
5333 01:02:46.797092 CA2 delay=35 (5~65),Diff = 2 PI (12 cell)
5334 01:02:46.800366 CA3 delay=34 (4~65),Diff = 1 PI (6 cell)
5335 01:02:46.807261 CA4 delay=33 (3~63),Diff = 0 PI (0 cell)
5336 01:02:46.811356 CA5 delay=33 (3~63),Diff = 0 PI (0 cell)
5337 01:02:46.811772
5338 01:02:46.814579 CA PerBit enable=1, Macro0, CA PI delay=33
5339 01:02:46.815094
5340 01:02:46.816851 [CBTSetCACLKResult] CA Dly = 33
5341 01:02:46.817265 CS Dly: 5 (0~37)
5342 01:02:46.817588
5343 01:02:46.820761 ----->DramcWriteLeveling(PI) begin...
5344 01:02:46.821273 ==
5345 01:02:46.823810 Dram Type= 6, Freq= 0, CH_1, rank 0
5346 01:02:46.830670 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5347 01:02:46.831165 ==
5348 01:02:46.833880 Write leveling (Byte 0): 23 => 23
5349 01:02:46.834330 Write leveling (Byte 1): 23 => 23
5350 01:02:46.836651 DramcWriteLeveling(PI) end<-----
5351 01:02:46.837111
5352 01:02:46.840163 ==
5353 01:02:46.840807 Dram Type= 6, Freq= 0, CH_1, rank 0
5354 01:02:46.846754 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5355 01:02:46.847276 ==
5356 01:02:46.850416 [Gating] SW mode calibration
5357 01:02:46.856634 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 20 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5358 01:02:46.860563 RX_Path_delay_UI(34) -3 - DQSINCTL_UI(24) = u1StartUI(10)
5359 01:02:46.867062 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5360 01:02:46.870753 0 10 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5361 01:02:46.873377 0 10 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5362 01:02:46.879954 0 10 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
5363 01:02:46.883442 0 10 16 | B1->B0 | 3434 3131 | 1 0 | (1 1) (1 0)
5364 01:02:46.887373 0 10 20 | B1->B0 | 3434 2323 | 0 0 | (0 1) (1 0)
5365 01:02:46.893311 0 10 24 | B1->B0 | 2525 2323 | 0 0 | (0 0) (0 0)
5366 01:02:46.896700 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5367 01:02:46.900116 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5368 01:02:46.907246 0 11 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5369 01:02:46.909892 0 11 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5370 01:02:46.914057 0 11 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5371 01:02:46.920350 0 11 16 | B1->B0 | 2323 2f2f | 0 0 | (0 0) (0 0)
5372 01:02:46.923253 0 11 20 | B1->B0 | 2c2c 4343 | 1 0 | (0 0) (1 1)
5373 01:02:46.926417 0 11 24 | B1->B0 | 3d3d 4646 | 1 0 | (0 0) (0 0)
5374 01:02:46.933432 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5375 01:02:46.936143 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5376 01:02:46.940010 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5377 01:02:46.947421 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5378 01:02:46.949453 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5379 01:02:46.952672 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5380 01:02:46.959419 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
5381 01:02:46.963888 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5382 01:02:46.966045 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5383 01:02:46.972561 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5384 01:02:46.976760 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5385 01:02:46.979252 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5386 01:02:46.986009 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5387 01:02:46.989421 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5388 01:02:46.992625 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5389 01:02:46.996038 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5390 01:02:47.002346 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5391 01:02:47.006848 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5392 01:02:47.009791 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5393 01:02:47.015614 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5394 01:02:47.020654 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5395 01:02:47.022098 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5396 01:02:47.029257 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5397 01:02:47.032410 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5398 01:02:47.035638 Total UI for P1: 0, mck2ui 16
5399 01:02:47.039087 best dqsien dly found for B0: ( 0, 14, 16)
5400 01:02:47.041851 Total UI for P1: 0, mck2ui 16
5401 01:02:47.045197 best dqsien dly found for B1: ( 0, 14, 18)
5402 01:02:47.048390 best DQS0 dly(MCK, UI, PI) = (0, 14, 16)
5403 01:02:47.052613 best DQS1 dly(MCK, UI, PI) = (0, 14, 18)
5404 01:02:47.053208
5405 01:02:47.055590 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 16)
5406 01:02:47.062231 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 18)
5407 01:02:47.062839 [Gating] SW calibration Done
5408 01:02:47.063216 ==
5409 01:02:47.065350 Dram Type= 6, Freq= 0, CH_1, rank 0
5410 01:02:47.072318 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5411 01:02:47.072931 ==
5412 01:02:47.073301 RX Vref Scan: 0
5413 01:02:47.073638
5414 01:02:47.075654 RX Vref 0 -> 0, step: 1
5415 01:02:47.076211
5416 01:02:47.078636 RX Delay -80 -> 252, step: 8
5417 01:02:47.082175 iDelay=208, Bit 0, Center 99 (0 ~ 199) 200
5418 01:02:47.085204 iDelay=208, Bit 1, Center 91 (-8 ~ 191) 200
5419 01:02:47.088902 iDelay=208, Bit 2, Center 83 (-16 ~ 183) 200
5420 01:02:47.093734 iDelay=208, Bit 3, Center 91 (-8 ~ 191) 200
5421 01:02:47.098567 iDelay=208, Bit 4, Center 91 (-8 ~ 191) 200
5422 01:02:47.102933 iDelay=208, Bit 5, Center 107 (8 ~ 207) 200
5423 01:02:47.105229 iDelay=208, Bit 6, Center 107 (8 ~ 207) 200
5424 01:02:47.108920 iDelay=208, Bit 7, Center 95 (-8 ~ 199) 208
5425 01:02:47.111891 iDelay=208, Bit 8, Center 75 (-16 ~ 167) 184
5426 01:02:47.118151 iDelay=208, Bit 9, Center 75 (-24 ~ 175) 200
5427 01:02:47.122699 iDelay=208, Bit 10, Center 87 (-16 ~ 191) 208
5428 01:02:47.125021 iDelay=208, Bit 11, Center 79 (-16 ~ 175) 192
5429 01:02:47.128273 iDelay=208, Bit 12, Center 95 (0 ~ 191) 192
5430 01:02:47.131832 iDelay=208, Bit 13, Center 99 (0 ~ 199) 200
5431 01:02:47.138017 iDelay=208, Bit 14, Center 91 (-8 ~ 191) 200
5432 01:02:47.141439 iDelay=208, Bit 15, Center 99 (0 ~ 199) 200
5433 01:02:47.141995 ==
5434 01:02:47.144785 Dram Type= 6, Freq= 0, CH_1, rank 0
5435 01:02:47.147703 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5436 01:02:47.148233 ==
5437 01:02:47.148653 DQS Delay:
5438 01:02:47.151554 DQS0 = 0, DQS1 = 0
5439 01:02:47.152101 DQM Delay:
5440 01:02:47.154885 DQM0 = 95, DQM1 = 87
5441 01:02:47.155433 DQ Delay:
5442 01:02:47.158018 DQ0 =99, DQ1 =91, DQ2 =83, DQ3 =91
5443 01:02:47.161032 DQ4 =91, DQ5 =107, DQ6 =107, DQ7 =95
5444 01:02:47.165034 DQ8 =75, DQ9 =75, DQ10 =87, DQ11 =79
5445 01:02:47.168280 DQ12 =95, DQ13 =99, DQ14 =91, DQ15 =99
5446 01:02:47.168873
5447 01:02:47.169239
5448 01:02:47.169597 ==
5449 01:02:47.171399 Dram Type= 6, Freq= 0, CH_1, rank 0
5450 01:02:47.178970 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5451 01:02:47.179527 ==
5452 01:02:47.179885
5453 01:02:47.180237
5454 01:02:47.180621 TX Vref Scan disable
5455 01:02:47.181605 == TX Byte 0 ==
5456 01:02:47.184261 Update DQ dly =706 (2 ,5, 34) DQ OEN =(2 ,2)
5457 01:02:47.188480 Update DQM dly =706 (2 ,5, 34) DQM OEN =(2 ,2)
5458 01:02:47.191445 == TX Byte 1 ==
5459 01:02:47.195537 Update DQ dly =706 (2 ,5, 34) DQ OEN =(2 ,2)
5460 01:02:47.197825 Update DQM dly =706 (2 ,5, 34) DQM OEN =(2 ,2)
5461 01:02:47.201422 ==
5462 01:02:47.204855 Dram Type= 6, Freq= 0, CH_1, rank 0
5463 01:02:47.208392 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5464 01:02:47.208991 ==
5465 01:02:47.209358
5466 01:02:47.209691
5467 01:02:47.211264 TX Vref Scan disable
5468 01:02:47.211799 == TX Byte 0 ==
5469 01:02:47.218526 Update DQ dly =705 (2 ,5, 33) DQ OEN =(2 ,2)
5470 01:02:47.221100 Update DQM dly =705 (2 ,5, 33) DQM OEN =(2 ,2)
5471 01:02:47.221656 == TX Byte 1 ==
5472 01:02:47.228438 Update DQ dly =706 (2 ,5, 34) DQ OEN =(2 ,2)
5473 01:02:47.231115 Update DQM dly =706 (2 ,5, 34) DQM OEN =(2 ,2)
5474 01:02:47.231668
5475 01:02:47.232029 [DATLAT]
5476 01:02:47.234398 Freq=933, CH1 RK0
5477 01:02:47.234954
5478 01:02:47.235315 DATLAT Default: 0xd
5479 01:02:47.237092 0, 0xFFFF, sum = 0
5480 01:02:47.237568 1, 0xFFFF, sum = 0
5481 01:02:47.241255 2, 0xFFFF, sum = 0
5482 01:02:47.241813 3, 0xFFFF, sum = 0
5483 01:02:47.245298 4, 0xFFFF, sum = 0
5484 01:02:47.247391 5, 0xFFFF, sum = 0
5485 01:02:47.247849 6, 0xFFFF, sum = 0
5486 01:02:47.250977 7, 0xFFFF, sum = 0
5487 01:02:47.251535 8, 0xFFFF, sum = 0
5488 01:02:47.253602 9, 0xFFFF, sum = 0
5489 01:02:47.254062 10, 0x0, sum = 1
5490 01:02:47.257050 11, 0x0, sum = 2
5491 01:02:47.257511 12, 0x0, sum = 3
5492 01:02:47.257874 13, 0x0, sum = 4
5493 01:02:47.260877 best_step = 11
5494 01:02:47.261363
5495 01:02:47.261727 ==
5496 01:02:47.263928 Dram Type= 6, Freq= 0, CH_1, rank 0
5497 01:02:47.267635 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5498 01:02:47.268393 ==
5499 01:02:47.271210 RX Vref Scan: 1
5500 01:02:47.271762
5501 01:02:47.272206 RX Vref 0 -> 0, step: 1
5502 01:02:47.275080
5503 01:02:47.275629 RX Delay -69 -> 252, step: 4
5504 01:02:47.276005
5505 01:02:47.277167 Set Vref, RX VrefLevel [Byte0]: 56
5506 01:02:47.280830 [Byte1]: 48
5507 01:02:47.285308
5508 01:02:47.285860 Final RX Vref Byte 0 = 56 to rank0
5509 01:02:47.288393 Final RX Vref Byte 1 = 48 to rank0
5510 01:02:47.292309 Final RX Vref Byte 0 = 56 to rank1
5511 01:02:47.295922 Final RX Vref Byte 1 = 48 to rank1==
5512 01:02:47.298509 Dram Type= 6, Freq= 0, CH_1, rank 0
5513 01:02:47.304841 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5514 01:02:47.305381 ==
5515 01:02:47.305746 DQS Delay:
5516 01:02:47.308678 DQS0 = 0, DQS1 = 0
5517 01:02:47.309300 DQM Delay:
5518 01:02:47.309669 DQM0 = 93, DQM1 = 87
5519 01:02:47.311314 DQ Delay:
5520 01:02:47.315151 DQ0 =96, DQ1 =88, DQ2 =86, DQ3 =90
5521 01:02:47.318614 DQ4 =92, DQ5 =104, DQ6 =100, DQ7 =92
5522 01:02:47.322082 DQ8 =70, DQ9 =76, DQ10 =88, DQ11 =80
5523 01:02:47.324890 DQ12 =94, DQ13 =98, DQ14 =96, DQ15 =98
5524 01:02:47.325450
5525 01:02:47.325809
5526 01:02:47.331973 [DQSOSCAuto] RK0, (LSB)MR18= 0x3131, (MSB)MR19= 0x505, tDQSOscB0 = 406 ps tDQSOscB1 = 406 ps
5527 01:02:47.334708 CH1 RK0: MR19=505, MR18=3131
5528 01:02:47.341344 CH1_RK0: MR19=0x505, MR18=0x3131, DQSOSC=406, MR23=63, INC=65, DEC=43
5529 01:02:47.341888
5530 01:02:47.345422 ----->DramcWriteLeveling(PI) begin...
5531 01:02:47.346173 ==
5532 01:02:47.348644 Dram Type= 6, Freq= 0, CH_1, rank 1
5533 01:02:47.351345 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5534 01:02:47.351799 ==
5535 01:02:47.354549 Write leveling (Byte 0): 22 => 22
5536 01:02:47.358059 Write leveling (Byte 1): 22 => 22
5537 01:02:47.361862 DramcWriteLeveling(PI) end<-----
5538 01:02:47.362443
5539 01:02:47.362811 ==
5540 01:02:47.364439 Dram Type= 6, Freq= 0, CH_1, rank 1
5541 01:02:47.367888 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5542 01:02:47.368472 ==
5543 01:02:47.370909 [Gating] SW mode calibration
5544 01:02:47.378621 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 20 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5545 01:02:47.384523 RX_Path_delay_UI(34) -3 - DQSINCTL_UI(24) = u1StartUI(10)
5546 01:02:47.388142 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5547 01:02:47.394303 0 10 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5548 01:02:47.398554 0 10 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5549 01:02:47.401009 0 10 12 | B1->B0 | 3434 3333 | 1 1 | (1 1) (0 0)
5550 01:02:47.407402 0 10 16 | B1->B0 | 3434 2a2a | 1 0 | (1 0) (0 0)
5551 01:02:47.411319 0 10 20 | B1->B0 | 2d2d 2323 | 0 0 | (0 0) (0 0)
5552 01:02:47.414045 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5553 01:02:47.421179 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5554 01:02:47.424192 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5555 01:02:47.427178 0 11 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5556 01:02:47.434335 0 11 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5557 01:02:47.437875 0 11 12 | B1->B0 | 2323 2525 | 0 0 | (0 0) (0 0)
5558 01:02:47.440217 0 11 16 | B1->B0 | 2424 3d3d | 0 1 | (0 0) (0 0)
5559 01:02:47.447532 0 11 20 | B1->B0 | 3939 4646 | 0 0 | (1 1) (0 0)
5560 01:02:47.450664 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5561 01:02:47.454300 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5562 01:02:47.461073 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5563 01:02:47.464182 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5564 01:02:47.468156 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5565 01:02:47.473435 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5566 01:02:47.477104 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5567 01:02:47.480557 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
5568 01:02:47.487432 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5569 01:02:47.490754 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5570 01:02:47.493648 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5571 01:02:47.500076 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5572 01:02:47.503385 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5573 01:02:47.507532 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5574 01:02:47.514997 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5575 01:02:47.517561 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5576 01:02:47.520500 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5577 01:02:47.523163 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5578 01:02:47.529673 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5579 01:02:47.533439 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5580 01:02:47.537101 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5581 01:02:47.542865 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5582 01:02:47.546183 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5583 01:02:47.549738 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5584 01:02:47.556182 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5585 01:02:47.559882 Total UI for P1: 0, mck2ui 16
5586 01:02:47.563583 best dqsien dly found for B0: ( 0, 14, 18)
5587 01:02:47.566620 Total UI for P1: 0, mck2ui 16
5588 01:02:47.569538 best dqsien dly found for B1: ( 0, 14, 18)
5589 01:02:47.573234 best DQS0 dly(MCK, UI, PI) = (0, 14, 18)
5590 01:02:47.576222 best DQS1 dly(MCK, UI, PI) = (0, 14, 18)
5591 01:02:47.576682
5592 01:02:47.580081 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 18)
5593 01:02:47.582810 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 18)
5594 01:02:47.586433 [Gating] SW calibration Done
5595 01:02:47.586989 ==
5596 01:02:47.589383 Dram Type= 6, Freq= 0, CH_1, rank 1
5597 01:02:47.592844 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5598 01:02:47.593308 ==
5599 01:02:47.595852 RX Vref Scan: 0
5600 01:02:47.596308
5601 01:02:47.599771 RX Vref 0 -> 0, step: 1
5602 01:02:47.600327
5603 01:02:47.600695 RX Delay -80 -> 252, step: 8
5604 01:02:47.606474 iDelay=208, Bit 0, Center 99 (0 ~ 199) 200
5605 01:02:47.609182 iDelay=208, Bit 1, Center 91 (-8 ~ 191) 200
5606 01:02:47.612618 iDelay=208, Bit 2, Center 83 (-16 ~ 183) 200
5607 01:02:47.615752 iDelay=208, Bit 3, Center 95 (0 ~ 191) 192
5608 01:02:47.619261 iDelay=208, Bit 4, Center 95 (0 ~ 191) 192
5609 01:02:47.622474 iDelay=208, Bit 5, Center 107 (8 ~ 207) 200
5610 01:02:47.629952 iDelay=208, Bit 6, Center 103 (8 ~ 199) 192
5611 01:02:47.632677 iDelay=208, Bit 7, Center 91 (-8 ~ 191) 200
5612 01:02:47.635999 iDelay=208, Bit 8, Center 71 (-32 ~ 175) 208
5613 01:02:47.639008 iDelay=208, Bit 9, Center 75 (-24 ~ 175) 200
5614 01:02:47.642632 iDelay=208, Bit 10, Center 83 (-16 ~ 183) 200
5615 01:02:47.648800 iDelay=208, Bit 11, Center 79 (-24 ~ 183) 208
5616 01:02:47.652318 iDelay=208, Bit 12, Center 99 (0 ~ 199) 200
5617 01:02:47.656040 iDelay=208, Bit 13, Center 95 (0 ~ 191) 192
5618 01:02:47.658985 iDelay=208, Bit 14, Center 95 (0 ~ 191) 192
5619 01:02:47.663032 iDelay=208, Bit 15, Center 95 (0 ~ 191) 192
5620 01:02:47.663586 ==
5621 01:02:47.666420 Dram Type= 6, Freq= 0, CH_1, rank 1
5622 01:02:47.672497 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5623 01:02:47.673111 ==
5624 01:02:47.673478 DQS Delay:
5625 01:02:47.675750 DQS0 = 0, DQS1 = 0
5626 01:02:47.676302 DQM Delay:
5627 01:02:47.676662 DQM0 = 95, DQM1 = 86
5628 01:02:47.679308 DQ Delay:
5629 01:02:47.682397 DQ0 =99, DQ1 =91, DQ2 =83, DQ3 =95
5630 01:02:47.685217 DQ4 =95, DQ5 =107, DQ6 =103, DQ7 =91
5631 01:02:47.688704 DQ8 =71, DQ9 =75, DQ10 =83, DQ11 =79
5632 01:02:47.692283 DQ12 =99, DQ13 =95, DQ14 =95, DQ15 =95
5633 01:02:47.692939
5634 01:02:47.693309
5635 01:02:47.693646 ==
5636 01:02:47.696488 Dram Type= 6, Freq= 0, CH_1, rank 1
5637 01:02:47.698267 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5638 01:02:47.698722 ==
5639 01:02:47.699081
5640 01:02:47.699414
5641 01:02:47.702797 TX Vref Scan disable
5642 01:02:47.705252 == TX Byte 0 ==
5643 01:02:47.708631 Update DQ dly =706 (2 ,5, 34) DQ OEN =(2 ,2)
5644 01:02:47.712150 Update DQM dly =706 (2 ,5, 34) DQM OEN =(2 ,2)
5645 01:02:47.715091 == TX Byte 1 ==
5646 01:02:47.718701 Update DQ dly =705 (2 ,5, 33) DQ OEN =(2 ,2)
5647 01:02:47.721858 Update DQM dly =705 (2 ,5, 33) DQM OEN =(2 ,2)
5648 01:02:47.722408 ==
5649 01:02:47.725313 Dram Type= 6, Freq= 0, CH_1, rank 1
5650 01:02:47.729466 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5651 01:02:47.732037 ==
5652 01:02:47.732589
5653 01:02:47.732990
5654 01:02:47.733326 TX Vref Scan disable
5655 01:02:47.735018 == TX Byte 0 ==
5656 01:02:47.738971 Update DQ dly =705 (2 ,5, 33) DQ OEN =(2 ,2)
5657 01:02:47.746261 Update DQM dly =705 (2 ,5, 33) DQM OEN =(2 ,2)
5658 01:02:47.746823 == TX Byte 1 ==
5659 01:02:47.748453 Update DQ dly =705 (2 ,5, 33) DQ OEN =(2 ,2)
5660 01:02:47.755028 Update DQM dly =705 (2 ,5, 33) DQM OEN =(2 ,2)
5661 01:02:47.755585
5662 01:02:47.755942 [DATLAT]
5663 01:02:47.756277 Freq=933, CH1 RK1
5664 01:02:47.756599
5665 01:02:47.758415 DATLAT Default: 0xb
5666 01:02:47.761563 0, 0xFFFF, sum = 0
5667 01:02:47.762106 1, 0xFFFF, sum = 0
5668 01:02:47.764826 2, 0xFFFF, sum = 0
5669 01:02:47.765379 3, 0xFFFF, sum = 0
5670 01:02:47.768580 4, 0xFFFF, sum = 0
5671 01:02:47.769195 5, 0xFFFF, sum = 0
5672 01:02:47.771404 6, 0xFFFF, sum = 0
5673 01:02:47.771867 7, 0xFFFF, sum = 0
5674 01:02:47.775575 8, 0xFFFF, sum = 0
5675 01:02:47.776110 9, 0xFFFF, sum = 0
5676 01:02:47.778557 10, 0x0, sum = 1
5677 01:02:47.779015 11, 0x0, sum = 2
5678 01:02:47.782724 12, 0x0, sum = 3
5679 01:02:47.783288 13, 0x0, sum = 4
5680 01:02:47.783657 best_step = 11
5681 01:02:47.784666
5682 01:02:47.785097 ==
5683 01:02:47.788990 Dram Type= 6, Freq= 0, CH_1, rank 1
5684 01:02:47.791909 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5685 01:02:47.792494 ==
5686 01:02:47.793010 RX Vref Scan: 0
5687 01:02:47.793356
5688 01:02:47.794852 RX Vref 0 -> 0, step: 1
5689 01:02:47.795305
5690 01:02:47.798774 RX Delay -77 -> 252, step: 4
5691 01:02:47.805199 iDelay=203, Bit 0, Center 98 (7 ~ 190) 184
5692 01:02:47.809183 iDelay=203, Bit 1, Center 92 (-1 ~ 186) 188
5693 01:02:47.811295 iDelay=203, Bit 2, Center 88 (-5 ~ 182) 188
5694 01:02:47.814963 iDelay=203, Bit 3, Center 92 (-1 ~ 186) 188
5695 01:02:47.818475 iDelay=203, Bit 4, Center 96 (3 ~ 190) 188
5696 01:02:47.821584 iDelay=203, Bit 5, Center 106 (11 ~ 202) 192
5697 01:02:47.828639 iDelay=203, Bit 6, Center 104 (11 ~ 198) 188
5698 01:02:47.831717 iDelay=203, Bit 7, Center 94 (3 ~ 186) 184
5699 01:02:47.834933 iDelay=203, Bit 8, Center 74 (-17 ~ 166) 184
5700 01:02:47.838257 iDelay=203, Bit 9, Center 76 (-13 ~ 166) 180
5701 01:02:47.841339 iDelay=203, Bit 10, Center 86 (-5 ~ 178) 184
5702 01:02:47.848902 iDelay=203, Bit 11, Center 80 (-13 ~ 174) 188
5703 01:02:47.851992 iDelay=203, Bit 12, Center 96 (3 ~ 190) 188
5704 01:02:47.854811 iDelay=203, Bit 13, Center 96 (7 ~ 186) 180
5705 01:02:47.858684 iDelay=203, Bit 14, Center 96 (3 ~ 190) 188
5706 01:02:47.861514 iDelay=203, Bit 15, Center 96 (7 ~ 186) 180
5707 01:02:47.862137 ==
5708 01:02:47.864896 Dram Type= 6, Freq= 0, CH_1, rank 1
5709 01:02:47.871036 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 1
5710 01:02:47.871576 ==
5711 01:02:47.871936 DQS Delay:
5712 01:02:47.872270 DQS0 = 0, DQS1 = 0
5713 01:02:47.873971 DQM Delay:
5714 01:02:47.874430 DQM0 = 96, DQM1 = 87
5715 01:02:47.877584 DQ Delay:
5716 01:02:47.881207 DQ0 =98, DQ1 =92, DQ2 =88, DQ3 =92
5717 01:02:47.884701 DQ4 =96, DQ5 =106, DQ6 =104, DQ7 =94
5718 01:02:47.887565 DQ8 =74, DQ9 =76, DQ10 =86, DQ11 =80
5719 01:02:47.890838 DQ12 =96, DQ13 =96, DQ14 =96, DQ15 =96
5720 01:02:47.891392
5721 01:02:47.891749
5722 01:02:47.898262 [DQSOSCAuto] RK1, (LSB)MR18= 0x2424, (MSB)MR19= 0x505, tDQSOscB0 = 410 ps tDQSOscB1 = 410 ps
5723 01:02:47.901522 CH1 RK1: MR19=505, MR18=2424
5724 01:02:47.907419 CH1_RK1: MR19=0x505, MR18=0x2424, DQSOSC=410, MR23=63, INC=64, DEC=42
5725 01:02:47.910885 [RxdqsGatingPostProcess] freq 933
5726 01:02:47.914541 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
5727 01:02:47.917243 Pre-setting of DQS Precalculation
5728 01:02:47.924442 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5729 01:02:47.930843 sync_frequency_calibration_params sync calibration params of frequency 933 to shu:3
5730 01:02:47.937246 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
5731 01:02:47.937806
5732 01:02:47.938162
5733 01:02:47.940200 [Calibration Summary] 1866 Mbps
5734 01:02:47.940650 CH 0, Rank 0
5735 01:02:47.944196 SW Impedance : PASS
5736 01:02:47.947256 DUTY Scan : NO K
5737 01:02:47.947785 ZQ Calibration : PASS
5738 01:02:47.950283 Jitter Meter : NO K
5739 01:02:47.954823 CBT Training : PASS
5740 01:02:47.955373 Write leveling : PASS
5741 01:02:47.957472 RX DQS gating : PASS
5742 01:02:47.961275 RX DQ/DQS(RDDQC) : PASS
5743 01:02:47.961829 TX DQ/DQS : PASS
5744 01:02:47.963656 RX DATLAT : PASS
5745 01:02:47.967422 RX DQ/DQS(Engine): PASS
5746 01:02:47.968099 TX OE : NO K
5747 01:02:47.970371 All Pass.
5748 01:02:47.970951
5749 01:02:47.971439 CH 0, Rank 1
5750 01:02:47.973677 SW Impedance : PASS
5751 01:02:47.974241 DUTY Scan : NO K
5752 01:02:47.977274 ZQ Calibration : PASS
5753 01:02:47.979967 Jitter Meter : NO K
5754 01:02:47.980585 CBT Training : PASS
5755 01:02:47.983527 Write leveling : PASS
5756 01:02:47.987532 RX DQS gating : PASS
5757 01:02:47.987988 RX DQ/DQS(RDDQC) : PASS
5758 01:02:47.990074 TX DQ/DQS : PASS
5759 01:02:47.990497 RX DATLAT : PASS
5760 01:02:47.993754 RX DQ/DQS(Engine): PASS
5761 01:02:47.996986 TX OE : NO K
5762 01:02:47.997462 All Pass.
5763 01:02:47.997855
5764 01:02:47.998227 CH 1, Rank 0
5765 01:02:48.000183 SW Impedance : PASS
5766 01:02:48.002902 DUTY Scan : NO K
5767 01:02:48.003311 ZQ Calibration : PASS
5768 01:02:48.006407 Jitter Meter : NO K
5769 01:02:48.010041 CBT Training : PASS
5770 01:02:48.010452 Write leveling : PASS
5771 01:02:48.013662 RX DQS gating : PASS
5772 01:02:48.016396 RX DQ/DQS(RDDQC) : PASS
5773 01:02:48.016893 TX DQ/DQS : PASS
5774 01:02:48.020335 RX DATLAT : PASS
5775 01:02:48.023643 RX DQ/DQS(Engine): PASS
5776 01:02:48.024062 TX OE : NO K
5777 01:02:48.026584 All Pass.
5778 01:02:48.027029
5779 01:02:48.027384 CH 1, Rank 1
5780 01:02:48.029998 SW Impedance : PASS
5781 01:02:48.030484 DUTY Scan : NO K
5782 01:02:48.032850 ZQ Calibration : PASS
5783 01:02:48.037468 Jitter Meter : NO K
5784 01:02:48.037917 CBT Training : PASS
5785 01:02:48.039934 Write leveling : PASS
5786 01:02:48.042819 RX DQS gating : PASS
5787 01:02:48.043255 RX DQ/DQS(RDDQC) : PASS
5788 01:02:48.046450 TX DQ/DQS : PASS
5789 01:02:48.049416 RX DATLAT : PASS
5790 01:02:48.049860 RX DQ/DQS(Engine): PASS
5791 01:02:48.053026 TX OE : NO K
5792 01:02:48.053435 All Pass.
5793 01:02:48.053762
5794 01:02:48.055791 DramC Write-DBI off
5795 01:02:48.059557 PER_BANK_REFRESH: Hybrid Mode
5796 01:02:48.059965 TX_TRACKING: ON
5797 01:02:48.069764 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 53, TRFC_05T 1, TXREFCNT 68, TRFCpb 21, TRFCpb_05T 0
5798 01:02:48.072517 [FAST_K] Save calibration result to emmc
5799 01:02:48.076040 dramc_set_vcore_voltage set vcore to 650000
5800 01:02:48.078764 Read voltage for 400, 6
5801 01:02:48.079170 Vio18 = 0
5802 01:02:48.079493 Vcore = 650000
5803 01:02:48.082773 Vdram = 0
5804 01:02:48.083183 Vddq = 0
5805 01:02:48.083505 Vmddr = 0
5806 01:02:48.088593 [FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=0
5807 01:02:48.092526 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
5808 01:02:48.095623 MEM_TYPE=3, freq_sel=20
5809 01:02:48.098598 sv_algorithm_assistance_LP4_800
5810 01:02:48.102317 ============ PULL DRAM RESETB DOWN ============
5811 01:02:48.105634 ========== PULL DRAM RESETB DOWN end =========
5812 01:02:48.112282 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
5813 01:02:48.116216 ===================================
5814 01:02:48.118823 LPDDR4 DRAM CONFIGURATION
5815 01:02:48.121903 ===================================
5816 01:02:48.122333 EX_ROW_EN[0] = 0x0
5817 01:02:48.125572 EX_ROW_EN[1] = 0x0
5818 01:02:48.125983 LP4Y_EN = 0x0
5819 01:02:48.128413 WORK_FSP = 0x0
5820 01:02:48.128976 WL = 0x2
5821 01:02:48.131227 RL = 0x2
5822 01:02:48.131305 BL = 0x2
5823 01:02:48.135156 RPST = 0x0
5824 01:02:48.135235 RD_PRE = 0x0
5825 01:02:48.138453 WR_PRE = 0x1
5826 01:02:48.138532 WR_PST = 0x0
5827 01:02:48.141784 DBI_WR = 0x0
5828 01:02:48.141883 DBI_RD = 0x0
5829 01:02:48.144664 OTF = 0x1
5830 01:02:48.148126 ===================================
5831 01:02:48.151774 ===================================
5832 01:02:48.151865 ANA top config
5833 01:02:48.154518 ===================================
5834 01:02:48.158115 DLL_ASYNC_EN = 0
5835 01:02:48.161222 ALL_SLAVE_EN = 1
5836 01:02:48.164522 NEW_RANK_MODE = 1
5837 01:02:48.168577 DLL_IDLE_MODE = 1
5838 01:02:48.169012 LP45_APHY_COMB_EN = 1
5839 01:02:48.171907 TX_ODT_DIS = 1
5840 01:02:48.175061 NEW_8X_MODE = 1
5841 01:02:48.177871 ===================================
5842 01:02:48.181480 ===================================
5843 01:02:48.184833 data_rate = 800
5844 01:02:48.189163 CKR = 1
5845 01:02:48.189572 DQ_P2S_RATIO = 4
5846 01:02:48.191549 ===================================
5847 01:02:48.194536 CA_P2S_RATIO = 4
5848 01:02:48.198292 DQ_CA_OPEN = 0
5849 01:02:48.201528 DQ_SEMI_OPEN = 1
5850 01:02:48.205069 CA_SEMI_OPEN = 1
5851 01:02:48.207951 CA_FULL_RATE = 0
5852 01:02:48.208416 DQ_CKDIV4_EN = 0
5853 01:02:48.211208 CA_CKDIV4_EN = 1
5854 01:02:48.214968 CA_PREDIV_EN = 0
5855 01:02:48.218228 PH8_DLY = 0
5856 01:02:48.220828 SEMI_OPEN_CA_PICK_MCK_RATIO= 4
5857 01:02:48.224293 DQ_AAMCK_DIV = 0
5858 01:02:48.224879 CA_AAMCK_DIV = 0
5859 01:02:48.227744 CA_ADMCK_DIV = 4
5860 01:02:48.231045 DQ_TRACK_CA_EN = 0
5861 01:02:48.234504 CA_PICK = 800
5862 01:02:48.237973 CA_MCKIO = 400
5863 01:02:48.241261 MCKIO_SEMI = 400
5864 01:02:48.244268 PLL_FREQ = 3016
5865 01:02:48.247888 DQ_UI_PI_RATIO = 32
5866 01:02:48.248468 CA_UI_PI_RATIO = 32
5867 01:02:48.250923 ===================================
5868 01:02:48.254596 ===================================
5869 01:02:48.257367 memory_type:LPDDR4
5870 01:02:48.260456 GP_NUM : 10
5871 01:02:48.260983 SRAM_EN : 1
5872 01:02:48.264645 MD32_EN : 0
5873 01:02:48.267364 ===================================
5874 01:02:48.270623 [ANA_INIT] >>>>>>>>>>>>>>
5875 01:02:48.273606 <<<<<< [CONFIGURE PHASE]: ANA_TX
5876 01:02:48.277508 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
5877 01:02:48.280773 ===================================
5878 01:02:48.281187 data_rate = 800,PCW = 0X7400
5879 01:02:48.283517 ===================================
5880 01:02:48.287272 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
5881 01:02:48.293238 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
5882 01:02:48.306771 WARN: tr->DQ_AAMCK_DIV= 0, Because of DQ_SEMI_OPEN, It's don't care.<<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
5883 01:02:48.310579 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
5884 01:02:48.314198 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
5885 01:02:48.316446 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
5886 01:02:48.320085 [ANA_INIT] flow start
5887 01:02:48.320494 [ANA_INIT] PLL >>>>>>>>
5888 01:02:48.324101 [ANA_INIT] PLL <<<<<<<<
5889 01:02:48.327178 [ANA_INIT] MIDPI >>>>>>>>
5890 01:02:48.327585 [ANA_INIT] MIDPI <<<<<<<<
5891 01:02:48.330297 [ANA_INIT] DLL >>>>>>>>
5892 01:02:48.333111 [ANA_INIT] flow end
5893 01:02:48.336599 ============ LP4 DIFF to SE enter ============
5894 01:02:48.339791 ============ LP4 DIFF to SE exit ============
5895 01:02:48.342828 [ANA_INIT] <<<<<<<<<<<<<
5896 01:02:48.346384 [Flow] Enable top DCM control >>>>>
5897 01:02:48.349997 [Flow] Enable top DCM control <<<<<
5898 01:02:48.353629 Enable DLL master slave shuffle
5899 01:02:48.356272 ==============================================================
5900 01:02:48.359971 Gating Mode config
5901 01:02:48.366202 ==============================================================
5902 01:02:48.366611 Config description:
5903 01:02:48.376350 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
5904 01:02:48.382832 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
5905 01:02:48.389274 SELPH_MODE 0: By rank 1: By Phase
5906 01:02:48.392807 ==============================================================
5907 01:02:48.395820 GAT_TRACK_EN = 0
5908 01:02:48.399244 RX_GATING_MODE = 2
5909 01:02:48.402766 RX_GATING_TRACK_MODE = 2
5910 01:02:48.405929 SELPH_MODE = 1
5911 01:02:48.409083 PICG_EARLY_EN = 1
5912 01:02:48.412102 VALID_LAT_VALUE = 1
5913 01:02:48.416138 ==============================================================
5914 01:02:48.422419 Enter into Gating configuration >>>>
5915 01:02:48.423041 Exit from Gating configuration <<<<
5916 01:02:48.426635 Enter into DVFS_PRE_config >>>>>
5917 01:02:48.438958 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
5918 01:02:48.441888 Exit from DVFS_PRE_config <<<<<
5919 01:02:48.445330 Enter into PICG configuration >>>>
5920 01:02:48.448938 Exit from PICG configuration <<<<
5921 01:02:48.449411 [RX_INPUT] configuration >>>>>
5922 01:02:48.452497 [RX_INPUT] configuration <<<<<
5923 01:02:48.458990 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
5924 01:02:48.465271 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
5925 01:02:48.468800 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
5926 01:02:48.475192 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
5927 01:02:48.482399 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
5928 01:02:48.488779 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
5929 01:02:48.491834 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
5930 01:02:48.495555 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
5931 01:02:48.501593 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
5932 01:02:48.505226 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
5933 01:02:48.508953 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
5934 01:02:48.514665 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
5935 01:02:48.517781 ===================================
5936 01:02:48.517861 LPDDR4 DRAM CONFIGURATION
5937 01:02:48.521543 ===================================
5938 01:02:48.524396 EX_ROW_EN[0] = 0x0
5939 01:02:48.524480 EX_ROW_EN[1] = 0x0
5940 01:02:48.527833 LP4Y_EN = 0x0
5941 01:02:48.527912 WORK_FSP = 0x0
5942 01:02:48.531559 WL = 0x2
5943 01:02:48.534520 RL = 0x2
5944 01:02:48.534600 BL = 0x2
5945 01:02:48.537726 RPST = 0x0
5946 01:02:48.537878 RD_PRE = 0x0
5947 01:02:48.541089 WR_PRE = 0x1
5948 01:02:48.541227 WR_PST = 0x0
5949 01:02:48.545154 DBI_WR = 0x0
5950 01:02:48.545275 DBI_RD = 0x0
5951 01:02:48.547162 OTF = 0x1
5952 01:02:48.551359 ===================================
5953 01:02:48.554302 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
5954 01:02:48.559282 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
5955 01:02:48.564402 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
5956 01:02:48.567375 ===================================
5957 01:02:48.567507 LPDDR4 DRAM CONFIGURATION
5958 01:02:48.570927 ===================================
5959 01:02:48.574120 EX_ROW_EN[0] = 0x10
5960 01:02:48.574287 EX_ROW_EN[1] = 0x0
5961 01:02:48.578081 LP4Y_EN = 0x0
5962 01:02:48.578276 WORK_FSP = 0x0
5963 01:02:48.580756 WL = 0x2
5964 01:02:48.584690 RL = 0x2
5965 01:02:48.584941 BL = 0x2
5966 01:02:48.587928 RPST = 0x0
5967 01:02:48.588218 RD_PRE = 0x0
5968 01:02:48.591593 WR_PRE = 0x1
5969 01:02:48.591882 WR_PST = 0x0
5970 01:02:48.594002 DBI_WR = 0x0
5971 01:02:48.594373 DBI_RD = 0x0
5972 01:02:48.597543 OTF = 0x1
5973 01:02:48.600512 ===================================
5974 01:02:48.606817 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
5975 01:02:48.610523 nWR fixed to 30
5976 01:02:48.610947 [ModeRegInit_LP4] CH0 RK0
5977 01:02:48.614998 [ModeRegInit_LP4] CH0 RK1
5978 01:02:48.617600 [ModeRegInit_LP4] CH1 RK0
5979 01:02:48.620268 [ModeRegInit_LP4] CH1 RK1
5980 01:02:48.620678 match AC timing 18
5981 01:02:48.623754 dramType 5, freq 400, readDBI 0, DivMode 2, cbtMode 0
5982 01:02:48.631197 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
5983 01:02:48.633923 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
5984 01:02:48.636987 [TX_path_calculate] data rate=800, WL=8, DQS_TotalUI=17
5985 01:02:48.643191 [TX_path_calculate] DQS = (4,1) DQS_OE = (3,2)
5986 01:02:48.643270 ==
5987 01:02:48.646279 Dram Type= 6, Freq= 0, CH_0, rank 0
5988 01:02:48.649708 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
5989 01:02:48.649798 ==
5990 01:02:48.656313 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
5991 01:02:48.662717 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=39, u1VrefScanEnd=39
5992 01:02:48.667361 [CA 0] Center 36 (8~64) winsize 57
5993 01:02:48.667507 [CA 1] Center 36 (8~64) winsize 57
5994 01:02:48.669747 [CA 2] Center 36 (8~64) winsize 57
5995 01:02:48.672734 [CA 3] Center 36 (8~64) winsize 57
5996 01:02:48.676000 [CA 4] Center 36 (8~64) winsize 57
5997 01:02:48.679381 [CA 5] Center 36 (8~64) winsize 57
5998 01:02:48.679583
5999 01:02:48.682917 [CmdBusTrainingLP45] Vref(ca) range 1: 39
6000 01:02:48.683146
6001 01:02:48.689927 [CATrainingPosCal] consider 1 rank data
6002 01:02:48.690364 u2DelayCellTimex100 = 270/100 ps
6003 01:02:48.696628 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6004 01:02:48.700700 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6005 01:02:48.702473 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6006 01:02:48.705673 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6007 01:02:48.709546 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6008 01:02:48.713225 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6009 01:02:48.713635
6010 01:02:48.716240 CA PerBit enable=1, Macro0, CA PI delay=36
6011 01:02:48.716648
6012 01:02:48.719014 [CBTSetCACLKResult] CA Dly = 36
6013 01:02:48.722531 CS Dly: 1 (0~32)
6014 01:02:48.722938 ==
6015 01:02:48.726386 Dram Type= 6, Freq= 0, CH_0, rank 1
6016 01:02:48.729599 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6017 01:02:48.730011 ==
6018 01:02:48.736096 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6019 01:02:48.738933 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=39, u1VrefScanEnd=39
6020 01:02:48.742359 [CA 0] Center 36 (8~64) winsize 57
6021 01:02:48.746240 [CA 1] Center 36 (8~64) winsize 57
6022 01:02:48.749159 [CA 2] Center 36 (8~64) winsize 57
6023 01:02:48.752485 [CA 3] Center 36 (8~64) winsize 57
6024 01:02:48.755612 [CA 4] Center 36 (8~64) winsize 57
6025 01:02:48.759085 [CA 5] Center 36 (8~64) winsize 57
6026 01:02:48.759494
6027 01:02:48.762198 [CmdBusTrainingLP45] Vref(ca) range 1: 39
6028 01:02:48.762606
6029 01:02:48.765802 [CATrainingPosCal] consider 2 rank data
6030 01:02:48.769465 u2DelayCellTimex100 = 270/100 ps
6031 01:02:48.772220 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6032 01:02:48.776269 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6033 01:02:48.782278 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6034 01:02:48.784948 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6035 01:02:48.788521 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6036 01:02:48.792029 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6037 01:02:48.792435
6038 01:02:48.796640 CA PerBit enable=1, Macro0, CA PI delay=36
6039 01:02:48.797083
6040 01:02:48.799073 [CBTSetCACLKResult] CA Dly = 36
6041 01:02:48.799484 CS Dly: 1 (0~32)
6042 01:02:48.799808
6043 01:02:48.802470 ----->DramcWriteLeveling(PI) begin...
6044 01:02:48.805030 ==
6045 01:02:48.808433 Dram Type= 6, Freq= 0, CH_0, rank 0
6046 01:02:48.811828 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6047 01:02:48.811908 ==
6048 01:02:48.815173 Write leveling (Byte 0): 32 => 0
6049 01:02:48.817948 Write leveling (Byte 1): 32 => 0
6050 01:02:48.821252 DramcWriteLeveling(PI) end<-----
6051 01:02:48.821337
6052 01:02:48.821404 ==
6053 01:02:48.824949 Dram Type= 6, Freq= 0, CH_0, rank 0
6054 01:02:48.828182 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6055 01:02:48.828593 ==
6056 01:02:48.831882 [Gating] SW mode calibration
6057 01:02:48.838352 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6058 01:02:48.844957 RX_Path_delay_UI(27) -3 - DQSINCTL_UI(20) = u1StartUI(7)
6059 01:02:48.848129 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6060 01:02:48.851208 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6061 01:02:48.858188 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6062 01:02:48.861509 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
6063 01:02:48.865282 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6064 01:02:48.868239 0 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6065 01:02:48.874668 0 10 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6066 01:02:48.878568 0 10 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
6067 01:02:48.881326 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6068 01:02:48.884591 Total UI for P1: 0, mck2ui 16
6069 01:02:48.887808 best dqsien dly found for B0: ( 0, 10, 16)
6070 01:02:48.891224 Total UI for P1: 0, mck2ui 16
6071 01:02:48.895507 best dqsien dly found for B1: ( 0, 10, 24)
6072 01:02:48.898885 best DQS0 dly(MCK, UI, PI) = (0, 10, 16)
6073 01:02:48.904893 best DQS1 dly(MCK, UI, PI) = (0, 10, 24)
6074 01:02:48.905303
6075 01:02:48.907832 best DQS0 P1 dly(MCK, UI, PI) = (0, 12, 16)
6076 01:02:48.911352 best DQS1 P1 dly(MCK, UI, PI) = (0, 12, 24)
6077 01:02:48.914696 [Gating] SW calibration Done
6078 01:02:48.915103 ==
6079 01:02:48.917979 Dram Type= 6, Freq= 0, CH_0, rank 0
6080 01:02:48.921186 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6081 01:02:48.921664 ==
6082 01:02:48.924522 RX Vref Scan: 0
6083 01:02:48.925098
6084 01:02:48.925616 RX Vref 0 -> 0, step: 1
6085 01:02:48.926101
6086 01:02:48.927550 RX Delay -410 -> 252, step: 16
6087 01:02:48.934471 iDelay=230, Bit 0, Center -43 (-298 ~ 213) 512
6088 01:02:48.937402 iDelay=230, Bit 1, Center -43 (-298 ~ 213) 512
6089 01:02:48.941026 iDelay=230, Bit 2, Center -43 (-298 ~ 213) 512
6090 01:02:48.944069 iDelay=230, Bit 3, Center -43 (-298 ~ 213) 512
6091 01:02:48.950947 iDelay=230, Bit 4, Center -35 (-298 ~ 229) 528
6092 01:02:48.954128 iDelay=230, Bit 5, Center -51 (-298 ~ 197) 496
6093 01:02:48.958131 iDelay=230, Bit 6, Center -27 (-282 ~ 229) 512
6094 01:02:48.960338 iDelay=230, Bit 7, Center -27 (-282 ~ 229) 512
6095 01:02:48.967546 iDelay=230, Bit 8, Center -59 (-314 ~ 197) 512
6096 01:02:48.971149 iDelay=230, Bit 9, Center -59 (-314 ~ 197) 512
6097 01:02:48.973646 iDelay=230, Bit 10, Center -43 (-298 ~ 213) 512
6098 01:02:48.977149 iDelay=230, Bit 11, Center -51 (-298 ~ 197) 496
6099 01:02:48.984054 iDelay=230, Bit 12, Center -43 (-298 ~ 213) 512
6100 01:02:48.987620 iDelay=230, Bit 13, Center -43 (-298 ~ 213) 512
6101 01:02:48.990163 iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496
6102 01:02:48.994376 iDelay=230, Bit 15, Center -35 (-282 ~ 213) 496
6103 01:02:48.996803 ==
6104 01:02:49.000445 Dram Type= 6, Freq= 0, CH_0, rank 0
6105 01:02:49.003493 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6106 01:02:49.004049 ==
6107 01:02:49.004538 DQS Delay:
6108 01:02:49.007394 DQS0 = 51, DQS1 = 59
6109 01:02:49.007906 DQM Delay:
6110 01:02:49.009923 DQM0 = 12, DQM1 = 13
6111 01:02:49.010416 DQ Delay:
6112 01:02:49.013494 DQ0 =8, DQ1 =8, DQ2 =8, DQ3 =8
6113 01:02:49.016614 DQ4 =16, DQ5 =0, DQ6 =24, DQ7 =24
6114 01:02:49.020590 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =8
6115 01:02:49.023262 DQ12 =16, DQ13 =16, DQ14 =24, DQ15 =24
6116 01:02:49.023817
6117 01:02:49.024286
6118 01:02:49.024808 ==
6119 01:02:49.026836 Dram Type= 6, Freq= 0, CH_0, rank 0
6120 01:02:49.030149 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6121 01:02:49.030561 ==
6122 01:02:49.030885
6123 01:02:49.031189
6124 01:02:49.033127 TX Vref Scan disable
6125 01:02:49.033536 == TX Byte 0 ==
6126 01:02:49.039797 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6127 01:02:49.043211 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6128 01:02:49.043625 == TX Byte 1 ==
6129 01:02:49.049735 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6130 01:02:49.053165 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6131 01:02:49.053576 ==
6132 01:02:49.056248 Dram Type= 6, Freq= 0, CH_0, rank 0
6133 01:02:49.059541 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6134 01:02:49.059984 ==
6135 01:02:49.060311
6136 01:02:49.063347
6137 01:02:49.063754 TX Vref Scan disable
6138 01:02:49.065887 == TX Byte 0 ==
6139 01:02:49.069473 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6140 01:02:49.072668 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6141 01:02:49.076209 == TX Byte 1 ==
6142 01:02:49.079033 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6143 01:02:49.082629 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6144 01:02:49.082739
6145 01:02:49.085443 [DATLAT]
6146 01:02:49.085542 Freq=400, CH0 RK0
6147 01:02:49.085622
6148 01:02:49.088945 DATLAT Default: 0xf
6149 01:02:49.089025 0, 0xFFFF, sum = 0
6150 01:02:49.092642 1, 0xFFFF, sum = 0
6151 01:02:49.092730 2, 0xFFFF, sum = 0
6152 01:02:49.096340 3, 0xFFFF, sum = 0
6153 01:02:49.096421 4, 0xFFFF, sum = 0
6154 01:02:49.098969 5, 0xFFFF, sum = 0
6155 01:02:49.099385 6, 0xFFFF, sum = 0
6156 01:02:49.102759 7, 0xFFFF, sum = 0
6157 01:02:49.103265 8, 0xFFFF, sum = 0
6158 01:02:49.105862 9, 0xFFFF, sum = 0
6159 01:02:49.106185 10, 0xFFFF, sum = 0
6160 01:02:49.108996 11, 0xFFFF, sum = 0
6161 01:02:49.109076 12, 0x0, sum = 1
6162 01:02:49.112645 13, 0x0, sum = 2
6163 01:02:49.112767 14, 0x0, sum = 3
6164 01:02:49.115496 15, 0x0, sum = 4
6165 01:02:49.115583 best_step = 13
6166 01:02:49.115650
6167 01:02:49.115712 ==
6168 01:02:49.118432 Dram Type= 6, Freq= 0, CH_0, rank 0
6169 01:02:49.125654 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6170 01:02:49.125754 ==
6171 01:02:49.125832 RX Vref Scan: 1
6172 01:02:49.125906
6173 01:02:49.128651 RX Vref 0 -> 0, step: 1
6174 01:02:49.129101
6175 01:02:49.132154 RX Delay -359 -> 252, step: 8
6176 01:02:49.132626
6177 01:02:49.135589 Set Vref, RX VrefLevel [Byte0]: 46
6178 01:02:49.139001 [Byte1]: 48
6179 01:02:49.142395
6180 01:02:49.142803 Final RX Vref Byte 0 = 46 to rank0
6181 01:02:49.145945 Final RX Vref Byte 1 = 48 to rank0
6182 01:02:49.148542 Final RX Vref Byte 0 = 46 to rank1
6183 01:02:49.152188 Final RX Vref Byte 1 = 48 to rank1==
6184 01:02:49.155430 Dram Type= 6, Freq= 0, CH_0, rank 0
6185 01:02:49.162143 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6186 01:02:49.162599 ==
6187 01:02:49.162957 DQS Delay:
6188 01:02:49.165334 DQS0 = 52, DQS1 = 68
6189 01:02:49.165786 DQM Delay:
6190 01:02:49.166140 DQM0 = 9, DQM1 = 17
6191 01:02:49.168452 DQ Delay:
6192 01:02:49.172455 DQ0 =4, DQ1 =8, DQ2 =8, DQ3 =4
6193 01:02:49.172960 DQ4 =12, DQ5 =0, DQ6 =20, DQ7 =20
6194 01:02:49.175684 DQ8 =8, DQ9 =0, DQ10 =16, DQ11 =8
6195 01:02:49.178665 DQ12 =24, DQ13 =24, DQ14 =28, DQ15 =28
6196 01:02:49.179072
6197 01:02:49.179393
6198 01:02:49.188697 [DQSOSCAuto] RK0, (LSB)MR18= 0x9f9f, (MSB)MR19= 0xc0c, tDQSOscB0 = 389 ps tDQSOscB1 = 389 ps
6199 01:02:49.192227 CH0 RK0: MR19=C0C, MR18=9F9F
6200 01:02:49.198387 CH0_RK0: MR19=0xC0C, MR18=0x9F9F, DQSOSC=389, MR23=63, INC=390, DEC=260
6201 01:02:49.198996 ==
6202 01:02:49.201889 Dram Type= 6, Freq= 0, CH_0, rank 1
6203 01:02:49.204832 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6204 01:02:49.205219 ==
6205 01:02:49.208770 [Gating] SW mode calibration
6206 01:02:49.214930 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6207 01:02:49.221709 RX_Path_delay_UI(27) -3 - DQSINCTL_UI(20) = u1StartUI(7)
6208 01:02:49.224476 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6209 01:02:49.228196 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6210 01:02:49.234931 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6211 01:02:49.237888 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
6212 01:02:49.241062 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6213 01:02:49.247740 0 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6214 01:02:49.250812 0 10 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6215 01:02:49.254285 0 10 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
6216 01:02:49.260768 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6217 01:02:49.261186 Total UI for P1: 0, mck2ui 16
6218 01:02:49.267491 best dqsien dly found for B0: ( 0, 10, 16)
6219 01:02:49.268034 Total UI for P1: 0, mck2ui 16
6220 01:02:49.270906 best dqsien dly found for B1: ( 0, 10, 16)
6221 01:02:49.277786 best DQS0 dly(MCK, UI, PI) = (0, 10, 16)
6222 01:02:49.281512 best DQS1 dly(MCK, UI, PI) = (0, 10, 16)
6223 01:02:49.282083
6224 01:02:49.284639 best DQS0 P1 dly(MCK, UI, PI) = (0, 12, 16)
6225 01:02:49.287325 best DQS1 P1 dly(MCK, UI, PI) = (0, 12, 16)
6226 01:02:49.291017 [Gating] SW calibration Done
6227 01:02:49.291609 ==
6228 01:02:49.294831 Dram Type= 6, Freq= 0, CH_0, rank 1
6229 01:02:49.297616 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6230 01:02:49.298028 ==
6231 01:02:49.300547 RX Vref Scan: 0
6232 01:02:49.301109
6233 01:02:49.301507 RX Vref 0 -> 0, step: 1
6234 01:02:49.301995
6235 01:02:49.304565 RX Delay -410 -> 252, step: 16
6236 01:02:49.312232 iDelay=230, Bit 0, Center -43 (-298 ~ 213) 512
6237 01:02:49.314170 iDelay=230, Bit 1, Center -35 (-298 ~ 229) 528
6238 01:02:49.317305 iDelay=230, Bit 2, Center -35 (-282 ~ 213) 496
6239 01:02:49.320631 iDelay=230, Bit 3, Center -43 (-298 ~ 213) 512
6240 01:02:49.328654 iDelay=230, Bit 4, Center -27 (-282 ~ 229) 512
6241 01:02:49.331521 iDelay=230, Bit 5, Center -43 (-298 ~ 213) 512
6242 01:02:49.334154 iDelay=230, Bit 6, Center -27 (-282 ~ 229) 512
6243 01:02:49.336860 iDelay=230, Bit 7, Center -27 (-282 ~ 229) 512
6244 01:02:49.343600 iDelay=230, Bit 8, Center -51 (-298 ~ 197) 496
6245 01:02:49.347475 iDelay=230, Bit 9, Center -59 (-314 ~ 197) 512
6246 01:02:49.350350 iDelay=230, Bit 10, Center -43 (-298 ~ 213) 512
6247 01:02:49.353519 iDelay=230, Bit 11, Center -51 (-298 ~ 197) 496
6248 01:02:49.360675 iDelay=230, Bit 12, Center -35 (-282 ~ 213) 496
6249 01:02:49.364327 iDelay=230, Bit 13, Center -35 (-282 ~ 213) 496
6250 01:02:49.367426 iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496
6251 01:02:49.374063 iDelay=230, Bit 15, Center -35 (-282 ~ 213) 496
6252 01:02:49.374594 ==
6253 01:02:49.377284 Dram Type= 6, Freq= 0, CH_0, rank 1
6254 01:02:49.380912 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6255 01:02:49.381424 ==
6256 01:02:49.381758 DQS Delay:
6257 01:02:49.383803 DQS0 = 43, DQS1 = 59
6258 01:02:49.384358 DQM Delay:
6259 01:02:49.387707 DQM0 = 8, DQM1 = 16
6260 01:02:49.388157 DQ Delay:
6261 01:02:49.390505 DQ0 =0, DQ1 =8, DQ2 =8, DQ3 =0
6262 01:02:49.393648 DQ4 =16, DQ5 =0, DQ6 =16, DQ7 =16
6263 01:02:49.397151 DQ8 =8, DQ9 =0, DQ10 =16, DQ11 =8
6264 01:02:49.400170 DQ12 =24, DQ13 =24, DQ14 =24, DQ15 =24
6265 01:02:49.400789
6266 01:02:49.401156
6267 01:02:49.401491 ==
6268 01:02:49.403644 Dram Type= 6, Freq= 0, CH_0, rank 1
6269 01:02:49.406776 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6270 01:02:49.407336 ==
6271 01:02:49.407698
6272 01:02:49.408030
6273 01:02:49.411220 TX Vref Scan disable
6274 01:02:49.411773 == TX Byte 0 ==
6275 01:02:49.417433 Update DQ dly =578 (4 ,2, 2) DQ OEN =(3 ,3)
6276 01:02:49.421084 Update DQM dly =578 (4 ,2, 2) DQM OEN =(3 ,3)
6277 01:02:49.421638 == TX Byte 1 ==
6278 01:02:49.426800 Update DQ dly =578 (4 ,2, 2) DQ OEN =(3 ,3)
6279 01:02:49.430151 Update DQM dly =578 (4 ,2, 2) DQM OEN =(3 ,3)
6280 01:02:49.430735 ==
6281 01:02:49.433594 Dram Type= 6, Freq= 0, CH_0, rank 1
6282 01:02:49.436924 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6283 01:02:49.437486 ==
6284 01:02:49.437849
6285 01:02:49.438185
6286 01:02:49.439680 TX Vref Scan disable
6287 01:02:49.440136 == TX Byte 0 ==
6288 01:02:49.446599 Update DQ dly =578 (4 ,2, 2) DQ OEN =(3 ,3)
6289 01:02:49.449570 Update DQM dly =578 (4 ,2, 2) DQM OEN =(3 ,3)
6290 01:02:49.450100 == TX Byte 1 ==
6291 01:02:49.456820 Update DQ dly =578 (4 ,2, 2) DQ OEN =(3 ,3)
6292 01:02:49.459433 Update DQM dly =578 (4 ,2, 2) DQM OEN =(3 ,3)
6293 01:02:49.459885
6294 01:02:49.460238 [DATLAT]
6295 01:02:49.462677 Freq=400, CH0 RK1
6296 01:02:49.463125
6297 01:02:49.463479 DATLAT Default: 0xd
6298 01:02:49.466567 0, 0xFFFF, sum = 0
6299 01:02:49.467023 1, 0xFFFF, sum = 0
6300 01:02:49.469736 2, 0xFFFF, sum = 0
6301 01:02:49.470191 3, 0xFFFF, sum = 0
6302 01:02:49.472554 4, 0xFFFF, sum = 0
6303 01:02:49.473052 5, 0xFFFF, sum = 0
6304 01:02:49.476004 6, 0xFFFF, sum = 0
6305 01:02:49.479385 7, 0xFFFF, sum = 0
6306 01:02:49.479840 8, 0xFFFF, sum = 0
6307 01:02:49.482604 9, 0xFFFF, sum = 0
6308 01:02:49.483253 10, 0xFFFF, sum = 0
6309 01:02:49.485828 11, 0xFFFF, sum = 0
6310 01:02:49.486290 12, 0x0, sum = 1
6311 01:02:49.490081 13, 0x0, sum = 2
6312 01:02:49.490751 14, 0x0, sum = 3
6313 01:02:49.493253 15, 0x0, sum = 4
6314 01:02:49.493823 best_step = 13
6315 01:02:49.494189
6316 01:02:49.494525 ==
6317 01:02:49.495894 Dram Type= 6, Freq= 0, CH_0, rank 1
6318 01:02:49.499243 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6319 01:02:49.502155 ==
6320 01:02:49.502709 RX Vref Scan: 0
6321 01:02:49.503071
6322 01:02:49.505328 RX Vref 0 -> 0, step: 1
6323 01:02:49.505784
6324 01:02:49.509562 RX Delay -359 -> 252, step: 8
6325 01:02:49.515712 iDelay=217, Bit 0, Center -48 (-295 ~ 200) 496
6326 01:02:49.519515 iDelay=217, Bit 1, Center -36 (-287 ~ 216) 504
6327 01:02:49.522930 iDelay=217, Bit 2, Center -40 (-287 ~ 208) 496
6328 01:02:49.525411 iDelay=217, Bit 3, Center -44 (-287 ~ 200) 488
6329 01:02:49.531751 iDelay=217, Bit 4, Center -40 (-287 ~ 208) 496
6330 01:02:49.535422 iDelay=217, Bit 5, Center -48 (-295 ~ 200) 496
6331 01:02:49.538660 iDelay=217, Bit 6, Center -32 (-279 ~ 216) 496
6332 01:02:49.542067 iDelay=217, Bit 7, Center -32 (-279 ~ 216) 496
6333 01:02:49.548264 iDelay=217, Bit 8, Center -60 (-303 ~ 184) 488
6334 01:02:49.551889 iDelay=217, Bit 9, Center -64 (-303 ~ 176) 480
6335 01:02:49.554846 iDelay=217, Bit 10, Center -48 (-295 ~ 200) 496
6336 01:02:49.558710 iDelay=217, Bit 11, Center -60 (-303 ~ 184) 488
6337 01:02:49.565044 iDelay=217, Bit 12, Center -44 (-287 ~ 200) 488
6338 01:02:49.568195 iDelay=217, Bit 13, Center -44 (-287 ~ 200) 488
6339 01:02:49.571712 iDelay=217, Bit 14, Center -40 (-287 ~ 208) 496
6340 01:02:49.574782 iDelay=217, Bit 15, Center -44 (-287 ~ 200) 488
6341 01:02:49.578235 ==
6342 01:02:49.581201 Dram Type= 6, Freq= 0, CH_0, rank 1
6343 01:02:49.584891 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6344 01:02:49.585444 ==
6345 01:02:49.585805 DQS Delay:
6346 01:02:49.587971 DQS0 = 48, DQS1 = 64
6347 01:02:49.588516 DQM Delay:
6348 01:02:49.591670 DQM0 = 8, DQM1 = 13
6349 01:02:49.592379 DQ Delay:
6350 01:02:49.594829 DQ0 =0, DQ1 =12, DQ2 =8, DQ3 =4
6351 01:02:49.597844 DQ4 =8, DQ5 =0, DQ6 =16, DQ7 =16
6352 01:02:49.601580 DQ8 =4, DQ9 =0, DQ10 =16, DQ11 =4
6353 01:02:49.604623 DQ12 =20, DQ13 =20, DQ14 =24, DQ15 =20
6354 01:02:49.605355
6355 01:02:49.605941
6356 01:02:49.612042 [DQSOSCAuto] RK1, (LSB)MR18= 0xc2c2, (MSB)MR19= 0xc0c, tDQSOscB0 = 385 ps tDQSOscB1 = 385 ps
6357 01:02:49.615070 CH0 RK1: MR19=C0C, MR18=C2C2
6358 01:02:49.621073 CH0_RK1: MR19=0xC0C, MR18=0xC2C2, DQSOSC=385, MR23=63, INC=398, DEC=265
6359 01:02:49.626408 [RxdqsGatingPostProcess] freq 400
6360 01:02:49.627696 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 2
6361 01:02:49.631334 Pre-setting of DQS Precalculation
6362 01:02:49.637222 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
6363 01:02:49.637686 ==
6364 01:02:49.640891 Dram Type= 6, Freq= 0, CH_1, rank 0
6365 01:02:49.643977 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6366 01:02:49.644532 ==
6367 01:02:49.650796 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6368 01:02:49.659350 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=39, u1VrefScanEnd=39
6369 01:02:49.660606 [CA 0] Center 36 (8~64) winsize 57
6370 01:02:49.663870 [CA 1] Center 36 (8~64) winsize 57
6371 01:02:49.667590 [CA 2] Center 36 (8~64) winsize 57
6372 01:02:49.668145 [CA 3] Center 36 (8~64) winsize 57
6373 01:02:49.670413 [CA 4] Center 36 (8~64) winsize 57
6374 01:02:49.673541 [CA 5] Center 36 (8~64) winsize 57
6375 01:02:49.674004
6376 01:02:49.681882 [CmdBusTrainingLP45] Vref(ca) range 1: 39
6377 01:02:49.682436
6378 01:02:49.683987 [CATrainingPosCal] consider 1 rank data
6379 01:02:49.687224 u2DelayCellTimex100 = 270/100 ps
6380 01:02:49.690870 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6381 01:02:49.693467 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6382 01:02:49.697200 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6383 01:02:49.700520 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6384 01:02:49.703285 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6385 01:02:49.707146 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6386 01:02:49.707603
6387 01:02:49.710024 CA PerBit enable=1, Macro0, CA PI delay=36
6388 01:02:49.710481
6389 01:02:49.713512 [CBTSetCACLKResult] CA Dly = 36
6390 01:02:49.716857 CS Dly: 1 (0~32)
6391 01:02:49.717329 ==
6392 01:02:49.720772 Dram Type= 6, Freq= 0, CH_1, rank 1
6393 01:02:49.723305 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6394 01:02:49.723778 ==
6395 01:02:49.729920 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6396 01:02:49.737452 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
6397 01:02:49.738025 [CA 0] Center 36 (8~64) winsize 57
6398 01:02:49.740324 [CA 1] Center 36 (8~64) winsize 57
6399 01:02:49.743192 [CA 2] Center 36 (8~64) winsize 57
6400 01:02:49.746642 [CA 3] Center 36 (8~64) winsize 57
6401 01:02:49.749957 [CA 4] Center 36 (8~64) winsize 57
6402 01:02:49.753329 [CA 5] Center 36 (8~64) winsize 57
6403 01:02:49.753818
6404 01:02:49.756253 [CmdBusTrainingLP45] Vref(ca) range 1: 37
6405 01:02:49.756764
6406 01:02:49.760890 [CATrainingPosCal] consider 2 rank data
6407 01:02:49.763039 u2DelayCellTimex100 = 270/100 ps
6408 01:02:49.766262 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6409 01:02:49.773490 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6410 01:02:49.776666 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6411 01:02:49.780388 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6412 01:02:49.783393 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6413 01:02:49.786003 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6414 01:02:49.786477
6415 01:02:49.789258 CA PerBit enable=1, Macro0, CA PI delay=36
6416 01:02:49.789717
6417 01:02:49.793182 [CBTSetCACLKResult] CA Dly = 36
6418 01:02:49.796487 CS Dly: 1 (0~32)
6419 01:02:49.797107
6420 01:02:49.799182 ----->DramcWriteLeveling(PI) begin...
6421 01:02:49.799652 ==
6422 01:02:49.803093 Dram Type= 6, Freq= 0, CH_1, rank 0
6423 01:02:49.806257 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6424 01:02:49.806952 ==
6425 01:02:49.809302 Write leveling (Byte 0): 32 => 0
6426 01:02:49.812117 Write leveling (Byte 1): 32 => 0
6427 01:02:49.816322 DramcWriteLeveling(PI) end<-----
6428 01:02:49.816828
6429 01:02:49.817203 ==
6430 01:02:49.820286 Dram Type= 6, Freq= 0, CH_1, rank 0
6431 01:02:49.822467 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6432 01:02:49.822928 ==
6433 01:02:49.825778 [Gating] SW mode calibration
6434 01:02:49.832896 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6435 01:02:49.839005 RX_Path_delay_UI(27) -3 - DQSINCTL_UI(20) = u1StartUI(7)
6436 01:02:49.842277 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6437 01:02:49.846365 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6438 01:02:49.852189 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6439 01:02:49.855399 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
6440 01:02:49.858207 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6441 01:02:49.865673 0 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6442 01:02:49.869449 0 10 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6443 01:02:49.872403 0 10 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
6444 01:02:49.879029 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6445 01:02:49.879599 Total UI for P1: 0, mck2ui 16
6446 01:02:49.885347 best dqsien dly found for B0: ( 0, 10, 16)
6447 01:02:49.885900 Total UI for P1: 0, mck2ui 16
6448 01:02:49.891929 best dqsien dly found for B1: ( 0, 10, 16)
6449 01:02:49.895095 best DQS0 dly(MCK, UI, PI) = (0, 10, 16)
6450 01:02:49.898431 best DQS1 dly(MCK, UI, PI) = (0, 10, 16)
6451 01:02:49.899005
6452 01:02:49.902338 best DQS0 P1 dly(MCK, UI, PI) = (0, 12, 16)
6453 01:02:49.905708 best DQS1 P1 dly(MCK, UI, PI) = (0, 12, 16)
6454 01:02:49.908545 [Gating] SW calibration Done
6455 01:02:49.909170 ==
6456 01:02:49.911454 Dram Type= 6, Freq= 0, CH_1, rank 0
6457 01:02:49.915023 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6458 01:02:49.915581 ==
6459 01:02:49.918209 RX Vref Scan: 0
6460 01:02:49.918757
6461 01:02:49.919125 RX Vref 0 -> 0, step: 1
6462 01:02:49.921350
6463 01:02:49.921808 RX Delay -410 -> 252, step: 16
6464 01:02:49.928282 iDelay=230, Bit 0, Center -27 (-282 ~ 229) 512
6465 01:02:49.931705 iDelay=230, Bit 1, Center -43 (-298 ~ 213) 512
6466 01:02:49.935325 iDelay=230, Bit 2, Center -43 (-298 ~ 213) 512
6467 01:02:49.938095 iDelay=230, Bit 3, Center -43 (-298 ~ 213) 512
6468 01:02:49.944818 iDelay=230, Bit 4, Center -35 (-282 ~ 213) 496
6469 01:02:49.947981 iDelay=230, Bit 5, Center -19 (-266 ~ 229) 496
6470 01:02:49.950935 iDelay=230, Bit 6, Center -27 (-282 ~ 229) 512
6471 01:02:49.954776 iDelay=230, Bit 7, Center -43 (-298 ~ 213) 512
6472 01:02:49.961306 iDelay=230, Bit 8, Center -59 (-314 ~ 197) 512
6473 01:02:49.964279 iDelay=230, Bit 9, Center -59 (-314 ~ 197) 512
6474 01:02:49.968258 iDelay=230, Bit 10, Center -43 (-298 ~ 213) 512
6475 01:02:49.974435 iDelay=230, Bit 11, Center -51 (-298 ~ 197) 496
6476 01:02:49.977340 iDelay=230, Bit 12, Center -35 (-282 ~ 213) 496
6477 01:02:49.980811 iDelay=230, Bit 13, Center -27 (-282 ~ 229) 512
6478 01:02:49.984202 iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496
6479 01:02:49.991136 iDelay=230, Bit 15, Center -35 (-282 ~ 213) 496
6480 01:02:49.991703 ==
6481 01:02:49.994075 Dram Type= 6, Freq= 0, CH_1, rank 0
6482 01:02:49.998080 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6483 01:02:49.998659 ==
6484 01:02:49.999149 DQS Delay:
6485 01:02:50.000577 DQS0 = 43, DQS1 = 59
6486 01:02:50.001109 DQM Delay:
6487 01:02:50.004338 DQM0 = 8, DQM1 = 16
6488 01:02:50.005028 DQ Delay:
6489 01:02:50.007685 DQ0 =16, DQ1 =0, DQ2 =0, DQ3 =0
6490 01:02:50.010467 DQ4 =8, DQ5 =24, DQ6 =16, DQ7 =0
6491 01:02:50.014381 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =8
6492 01:02:50.017600 DQ12 =24, DQ13 =32, DQ14 =24, DQ15 =24
6493 01:02:50.018075
6494 01:02:50.018550
6495 01:02:50.018999 ==
6496 01:02:50.020326 Dram Type= 6, Freq= 0, CH_1, rank 0
6497 01:02:50.024542 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6498 01:02:50.025170 ==
6499 01:02:50.025659
6500 01:02:50.026111
6501 01:02:50.027260 TX Vref Scan disable
6502 01:02:50.030233 == TX Byte 0 ==
6503 01:02:50.034072 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6504 01:02:50.037375 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6505 01:02:50.040902 == TX Byte 1 ==
6506 01:02:50.043482 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6507 01:02:50.047145 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6508 01:02:50.047715 ==
6509 01:02:50.050101 Dram Type= 6, Freq= 0, CH_1, rank 0
6510 01:02:50.053410 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6511 01:02:50.056806 ==
6512 01:02:50.057280
6513 01:02:50.057755
6514 01:02:50.058205 TX Vref Scan disable
6515 01:02:50.059980 == TX Byte 0 ==
6516 01:02:50.063833 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6517 01:02:50.066456 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6518 01:02:50.070677 == TX Byte 1 ==
6519 01:02:50.073428 Update DQ dly =572 (4 ,1, 28) DQ OEN =(3 ,2)
6520 01:02:50.076860 Update DQM dly =572 (4 ,1, 28) DQM OEN =(3 ,2)
6521 01:02:50.077424
6522 01:02:50.080234 [DATLAT]
6523 01:02:50.080741 Freq=400, CH1 RK0
6524 01:02:50.081228
6525 01:02:50.083409 DATLAT Default: 0xf
6526 01:02:50.083974 0, 0xFFFF, sum = 0
6527 01:02:50.086603 1, 0xFFFF, sum = 0
6528 01:02:50.087185 2, 0xFFFF, sum = 0
6529 01:02:50.089551 3, 0xFFFF, sum = 0
6530 01:02:50.090046 4, 0xFFFF, sum = 0
6531 01:02:50.093247 5, 0xFFFF, sum = 0
6532 01:02:50.093827 6, 0xFFFF, sum = 0
6533 01:02:50.096286 7, 0xFFFF, sum = 0
6534 01:02:50.096809 8, 0xFFFF, sum = 0
6535 01:02:50.099994 9, 0xFFFF, sum = 0
6536 01:02:50.103499 10, 0xFFFF, sum = 0
6537 01:02:50.104073 11, 0xFFFF, sum = 0
6538 01:02:50.106621 12, 0x0, sum = 1
6539 01:02:50.107199 13, 0x0, sum = 2
6540 01:02:50.107693 14, 0x0, sum = 3
6541 01:02:50.109732 15, 0x0, sum = 4
6542 01:02:50.110208 best_step = 13
6543 01:02:50.110688
6544 01:02:50.111145 ==
6545 01:02:50.113497 Dram Type= 6, Freq= 0, CH_1, rank 0
6546 01:02:50.119653 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6547 01:02:50.120220 ==
6548 01:02:50.120813 RX Vref Scan: 1
6549 01:02:50.121280
6550 01:02:50.123244 RX Vref 0 -> 0, step: 1
6551 01:02:50.123811
6552 01:02:50.126945 RX Delay -359 -> 252, step: 8
6553 01:02:50.127515
6554 01:02:50.129649 Set Vref, RX VrefLevel [Byte0]: 56
6555 01:02:50.133642 [Byte1]: 48
6556 01:02:50.136944
6557 01:02:50.137519 Final RX Vref Byte 0 = 56 to rank0
6558 01:02:50.140012 Final RX Vref Byte 1 = 48 to rank0
6559 01:02:50.143837 Final RX Vref Byte 0 = 56 to rank1
6560 01:02:50.146541 Final RX Vref Byte 1 = 48 to rank1==
6561 01:02:50.149987 Dram Type= 6, Freq= 0, CH_1, rank 0
6562 01:02:50.155760 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6563 01:02:50.156227 ==
6564 01:02:50.156594 DQS Delay:
6565 01:02:50.160544 DQS0 = 48, DQS1 = 68
6566 01:02:50.161152 DQM Delay:
6567 01:02:50.161526 DQM0 = 9, DQM1 = 20
6568 01:02:50.163095 DQ Delay:
6569 01:02:50.165824 DQ0 =12, DQ1 =4, DQ2 =0, DQ3 =8
6570 01:02:50.166355 DQ4 =8, DQ5 =20, DQ6 =16, DQ7 =8
6571 01:02:50.169364 DQ8 =0, DQ9 =8, DQ10 =24, DQ11 =12
6572 01:02:50.172950 DQ12 =24, DQ13 =32, DQ14 =28, DQ15 =32
6573 01:02:50.177277
6574 01:02:50.177834
6575 01:02:50.183449 [DQSOSCAuto] RK0, (LSB)MR18= 0xdddd, (MSB)MR19= 0xc0c, tDQSOscB0 = 382 ps tDQSOscB1 = 382 ps
6576 01:02:50.185927 CH1 RK0: MR19=C0C, MR18=DDDD
6577 01:02:50.192522 CH1_RK0: MR19=0xC0C, MR18=0xDDDD, DQSOSC=382, MR23=63, INC=404, DEC=269
6578 01:02:50.193152 ==
6579 01:02:50.196823 Dram Type= 6, Freq= 0, CH_1, rank 1
6580 01:02:50.199106 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6581 01:02:50.199700 ==
6582 01:02:50.202365 [Gating] SW mode calibration
6583 01:02:50.209106 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6584 01:02:50.216108 RX_Path_delay_UI(27) -3 - DQSINCTL_UI(20) = u1StartUI(7)
6585 01:02:50.218699 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6586 01:02:50.222642 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6587 01:02:50.229207 0 8 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6588 01:02:50.232683 0 8 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
6589 01:02:50.235545 0 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6590 01:02:50.242091 0 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6591 01:02:50.245944 0 10 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6592 01:02:50.249188 0 10 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
6593 01:02:50.255547 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6594 01:02:50.256017 Total UI for P1: 0, mck2ui 16
6595 01:02:50.262099 best dqsien dly found for B0: ( 0, 10, 16)
6596 01:02:50.262666 Total UI for P1: 0, mck2ui 16
6597 01:02:50.265062 best dqsien dly found for B1: ( 0, 10, 16)
6598 01:02:50.272017 best DQS0 dly(MCK, UI, PI) = (0, 10, 16)
6599 01:02:50.274858 best DQS1 dly(MCK, UI, PI) = (0, 10, 16)
6600 01:02:50.275350
6601 01:02:50.278835 best DQS0 P1 dly(MCK, UI, PI) = (0, 12, 16)
6602 01:02:50.282170 best DQS1 P1 dly(MCK, UI, PI) = (0, 12, 16)
6603 01:02:50.285011 [Gating] SW calibration Done
6604 01:02:50.285574 ==
6605 01:02:50.289173 Dram Type= 6, Freq= 0, CH_1, rank 1
6606 01:02:50.291679 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6607 01:02:50.292278 ==
6608 01:02:50.295355 RX Vref Scan: 0
6609 01:02:50.295920
6610 01:02:50.296409 RX Vref 0 -> 0, step: 1
6611 01:02:50.296973
6612 01:02:50.298071 RX Delay -410 -> 252, step: 16
6613 01:02:50.305351 iDelay=230, Bit 0, Center -35 (-282 ~ 213) 496
6614 01:02:50.308405 iDelay=230, Bit 1, Center -35 (-282 ~ 213) 496
6615 01:02:50.311995 iDelay=230, Bit 2, Center -43 (-298 ~ 213) 512
6616 01:02:50.314769 iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496
6617 01:02:50.321710 iDelay=230, Bit 4, Center -35 (-282 ~ 213) 496
6618 01:02:50.324872 iDelay=230, Bit 5, Center -27 (-282 ~ 229) 512
6619 01:02:50.328210 iDelay=230, Bit 6, Center -27 (-282 ~ 229) 512
6620 01:02:50.331453 iDelay=230, Bit 7, Center -35 (-282 ~ 213) 496
6621 01:02:50.338528 iDelay=230, Bit 8, Center -59 (-314 ~ 197) 512
6622 01:02:50.341438 iDelay=230, Bit 9, Center -59 (-314 ~ 197) 512
6623 01:02:50.344547 iDelay=230, Bit 10, Center -43 (-298 ~ 213) 512
6624 01:02:50.347887 iDelay=230, Bit 11, Center -51 (-298 ~ 197) 496
6625 01:02:50.355053 iDelay=230, Bit 12, Center -27 (-282 ~ 229) 512
6626 01:02:50.358126 iDelay=230, Bit 13, Center -27 (-282 ~ 229) 512
6627 01:02:50.360973 iDelay=230, Bit 14, Center -27 (-282 ~ 229) 512
6628 01:02:50.367504 iDelay=230, Bit 15, Center -35 (-282 ~ 213) 496
6629 01:02:50.368054 ==
6630 01:02:50.371216 Dram Type= 6, Freq= 0, CH_1, rank 1
6631 01:02:50.375189 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6632 01:02:50.375755 ==
6633 01:02:50.376127 DQS Delay:
6634 01:02:50.378436 DQS0 = 43, DQS1 = 59
6635 01:02:50.379001 DQM Delay:
6636 01:02:50.381292 DQM0 = 9, DQM1 = 18
6637 01:02:50.381853 DQ Delay:
6638 01:02:50.384573 DQ0 =8, DQ1 =8, DQ2 =0, DQ3 =8
6639 01:02:50.388042 DQ4 =8, DQ5 =16, DQ6 =16, DQ7 =8
6640 01:02:50.391064 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =8
6641 01:02:50.394238 DQ12 =32, DQ13 =32, DQ14 =32, DQ15 =24
6642 01:02:50.394802
6643 01:02:50.395170
6644 01:02:50.395507 ==
6645 01:02:50.398517 Dram Type= 6, Freq= 0, CH_1, rank 1
6646 01:02:50.401026 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6647 01:02:50.401491 ==
6648 01:02:50.401859
6649 01:02:50.402197
6650 01:02:50.405089 TX Vref Scan disable
6651 01:02:50.405652 == TX Byte 0 ==
6652 01:02:50.410801 Update DQ dly =578 (4 ,2, 2) DQ OEN =(3 ,3)
6653 01:02:50.414669 Update DQM dly =578 (4 ,2, 2) DQM OEN =(3 ,3)
6654 01:02:50.415435 == TX Byte 1 ==
6655 01:02:50.420957 Update DQ dly =578 (4 ,2, 2) DQ OEN =(3 ,3)
6656 01:02:50.424157 Update DQM dly =578 (4 ,2, 2) DQM OEN =(3 ,3)
6657 01:02:50.424763 ==
6658 01:02:50.427345 Dram Type= 6, Freq= 0, CH_1, rank 1
6659 01:02:50.431272 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6660 01:02:50.431738 ==
6661 01:02:50.432105
6662 01:02:50.432443
6663 01:02:50.433672 TX Vref Scan disable
6664 01:02:50.434130 == TX Byte 0 ==
6665 01:02:50.440665 Update DQ dly =578 (4 ,2, 2) DQ OEN =(3 ,3)
6666 01:02:50.444383 Update DQM dly =578 (4 ,2, 2) DQM OEN =(3 ,3)
6667 01:02:50.444991 == TX Byte 1 ==
6668 01:02:50.450849 Update DQ dly =578 (4 ,2, 2) DQ OEN =(3 ,3)
6669 01:02:50.454080 Update DQM dly =578 (4 ,2, 2) DQM OEN =(3 ,3)
6670 01:02:50.454556
6671 01:02:50.455040 [DATLAT]
6672 01:02:50.457531 Freq=400, CH1 RK1
6673 01:02:50.458010
6674 01:02:50.458499 DATLAT Default: 0xd
6675 01:02:50.460900 0, 0xFFFF, sum = 0
6676 01:02:50.461385 1, 0xFFFF, sum = 0
6677 01:02:50.463722 2, 0xFFFF, sum = 0
6678 01:02:50.464305 3, 0xFFFF, sum = 0
6679 01:02:50.467021 4, 0xFFFF, sum = 0
6680 01:02:50.467504 5, 0xFFFF, sum = 0
6681 01:02:50.470603 6, 0xFFFF, sum = 0
6682 01:02:50.471184 7, 0xFFFF, sum = 0
6683 01:02:50.474281 8, 0xFFFF, sum = 0
6684 01:02:50.476699 9, 0xFFFF, sum = 0
6685 01:02:50.477201 10, 0xFFFF, sum = 0
6686 01:02:50.480188 11, 0xFFFF, sum = 0
6687 01:02:50.480649 12, 0x0, sum = 1
6688 01:02:50.484566 13, 0x0, sum = 2
6689 01:02:50.485173 14, 0x0, sum = 3
6690 01:02:50.485548 15, 0x0, sum = 4
6691 01:02:50.487200 best_step = 13
6692 01:02:50.487651
6693 01:02:50.488015 ==
6694 01:02:50.490729 Dram Type= 6, Freq= 0, CH_1, rank 1
6695 01:02:50.493464 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6696 01:02:50.493920 ==
6697 01:02:50.496799 RX Vref Scan: 0
6698 01:02:50.497350
6699 01:02:50.500532 RX Vref 0 -> 0, step: 1
6700 01:02:50.501126
6701 01:02:50.501490 RX Delay -359 -> 252, step: 8
6702 01:02:50.509252 iDelay=225, Bit 0, Center -36 (-279 ~ 208) 488
6703 01:02:50.512928 iDelay=225, Bit 1, Center -44 (-287 ~ 200) 488
6704 01:02:50.515249 iDelay=225, Bit 2, Center -48 (-295 ~ 200) 496
6705 01:02:50.521850 iDelay=225, Bit 3, Center -44 (-287 ~ 200) 488
6706 01:02:50.525842 iDelay=225, Bit 4, Center -40 (-287 ~ 208) 496
6707 01:02:50.528780 iDelay=225, Bit 5, Center -24 (-271 ~ 224) 496
6708 01:02:50.532308 iDelay=225, Bit 6, Center -32 (-279 ~ 216) 496
6709 01:02:50.538515 iDelay=225, Bit 7, Center -40 (-287 ~ 208) 496
6710 01:02:50.542171 iDelay=225, Bit 8, Center -64 (-311 ~ 184) 496
6711 01:02:50.544853 iDelay=225, Bit 9, Center -56 (-303 ~ 192) 496
6712 01:02:50.548572 iDelay=225, Bit 10, Center -48 (-295 ~ 200) 496
6713 01:02:50.555296 iDelay=225, Bit 11, Center -56 (-303 ~ 192) 496
6714 01:02:50.558133 iDelay=225, Bit 12, Center -40 (-287 ~ 208) 496
6715 01:02:50.561481 iDelay=225, Bit 13, Center -40 (-287 ~ 208) 496
6716 01:02:50.565657 iDelay=225, Bit 14, Center -40 (-287 ~ 208) 496
6717 01:02:50.571728 iDelay=225, Bit 15, Center -44 (-287 ~ 200) 488
6718 01:02:50.572280 ==
6719 01:02:50.575262 Dram Type= 6, Freq= 0, CH_1, rank 1
6720 01:02:50.578858 fsp= 0, odt_onoff= 0, Byte mode= 0, DivMode= 2
6721 01:02:50.579413 ==
6722 01:02:50.579780 DQS Delay:
6723 01:02:50.581428 DQS0 = 48, DQS1 = 64
6724 01:02:50.581882 DQM Delay:
6725 01:02:50.585341 DQM0 = 9, DQM1 = 15
6726 01:02:50.585892 DQ Delay:
6727 01:02:50.588464 DQ0 =12, DQ1 =4, DQ2 =0, DQ3 =4
6728 01:02:50.591638 DQ4 =8, DQ5 =24, DQ6 =16, DQ7 =8
6729 01:02:50.595109 DQ8 =0, DQ9 =8, DQ10 =16, DQ11 =8
6730 01:02:50.598930 DQ12 =24, DQ13 =24, DQ14 =24, DQ15 =20
6731 01:02:50.599499
6732 01:02:50.599991
6733 01:02:50.604668 [DQSOSCAuto] RK1, (LSB)MR18= 0xb6b6, (MSB)MR19= 0xc0c, tDQSOscB0 = 387 ps tDQSOscB1 = 387 ps
6734 01:02:50.608610 CH1 RK1: MR19=C0C, MR18=B6B6
6735 01:02:50.615264 CH1_RK1: MR19=0xC0C, MR18=0xB6B6, DQSOSC=387, MR23=63, INC=394, DEC=262
6736 01:02:50.618697 [RxdqsGatingPostProcess] freq 400
6737 01:02:50.624872 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 2
6738 01:02:50.627833 Pre-setting of DQS Precalculation
6739 01:02:50.630840 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
6740 01:02:50.637891 sync_frequency_calibration_params sync calibration params of frequency 400 to shu:6
6741 01:02:50.645099 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
6742 01:02:50.645668
6743 01:02:50.646153
6744 01:02:50.648057 [Calibration Summary] 800 Mbps
6745 01:02:50.651147 CH 0, Rank 0
6746 01:02:50.651617 SW Impedance : PASS
6747 01:02:50.654343 DUTY Scan : NO K
6748 01:02:50.657796 ZQ Calibration : PASS
6749 01:02:50.658293 Jitter Meter : NO K
6750 01:02:50.661176 CBT Training : PASS
6751 01:02:50.664177 Write leveling : PASS
6752 01:02:50.664781 RX DQS gating : PASS
6753 01:02:50.667956 RX DQ/DQS(RDDQC) : PASS
6754 01:02:50.671180 TX DQ/DQS : PASS
6755 01:02:50.671751 RX DATLAT : PASS
6756 01:02:50.674228 RX DQ/DQS(Engine): PASS
6757 01:02:50.674794 TX OE : NO K
6758 01:02:50.678059 All Pass.
6759 01:02:50.678624
6760 01:02:50.679107 CH 0, Rank 1
6761 01:02:50.681503 SW Impedance : PASS
6762 01:02:50.681972 DUTY Scan : NO K
6763 01:02:50.684460 ZQ Calibration : PASS
6764 01:02:50.688255 Jitter Meter : NO K
6765 01:02:50.688876 CBT Training : PASS
6766 01:02:50.691295 Write leveling : NO K
6767 01:02:50.694947 RX DQS gating : PASS
6768 01:02:50.695516 RX DQ/DQS(RDDQC) : PASS
6769 01:02:50.697754 TX DQ/DQS : PASS
6770 01:02:50.700656 RX DATLAT : PASS
6771 01:02:50.701272 RX DQ/DQS(Engine): PASS
6772 01:02:50.704216 TX OE : NO K
6773 01:02:50.704843 All Pass.
6774 01:02:50.705327
6775 01:02:50.707848 CH 1, Rank 0
6776 01:02:50.708416 SW Impedance : PASS
6777 01:02:50.711125 DUTY Scan : NO K
6778 01:02:50.713864 ZQ Calibration : PASS
6779 01:02:50.714429 Jitter Meter : NO K
6780 01:02:50.717518 CBT Training : PASS
6781 01:02:50.721532 Write leveling : PASS
6782 01:02:50.722165 RX DQS gating : PASS
6783 01:02:50.724224 RX DQ/DQS(RDDQC) : PASS
6784 01:02:50.727545 TX DQ/DQS : PASS
6785 01:02:50.728117 RX DATLAT : PASS
6786 01:02:50.730186 RX DQ/DQS(Engine): PASS
6787 01:02:50.730659 TX OE : NO K
6788 01:02:50.734476 All Pass.
6789 01:02:50.735045
6790 01:02:50.735537 CH 1, Rank 1
6791 01:02:50.736905 SW Impedance : PASS
6792 01:02:50.737375 DUTY Scan : NO K
6793 01:02:50.740851 ZQ Calibration : PASS
6794 01:02:50.743912 Jitter Meter : NO K
6795 01:02:50.744383 CBT Training : PASS
6796 01:02:50.747478 Write leveling : NO K
6797 01:02:50.750938 RX DQS gating : PASS
6798 01:02:50.751511 RX DQ/DQS(RDDQC) : PASS
6799 01:02:50.754129 TX DQ/DQS : PASS
6800 01:02:50.757104 RX DATLAT : PASS
6801 01:02:50.757664 RX DQ/DQS(Engine): PASS
6802 01:02:50.760349 TX OE : NO K
6803 01:02:50.760854 All Pass.
6804 01:02:50.761223
6805 01:02:50.763590 DramC Write-DBI off
6806 01:02:50.767371 PER_BANK_REFRESH: Hybrid Mode
6807 01:02:50.767961 TX_TRACKING: ON
6808 01:02:50.776839 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
6809 01:02:50.781161 [FAST_K] Save calibration result to emmc
6810 01:02:50.785117 dramc_set_vcore_voltage set vcore to 725000
6811 01:02:50.786548 Read voltage for 1600, 0
6812 01:02:50.787006 Vio18 = 0
6813 01:02:50.787372 Vcore = 725000
6814 01:02:50.790824 Vdram = 0
6815 01:02:50.791279 Vddq = 0
6816 01:02:50.791634 Vmddr = 0
6817 01:02:50.797669 [FAST_K] DramcSave_Time_For_Cal_Init SHU1, femmc_Ready=0
6818 01:02:50.800061 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
6819 01:02:50.803631 MEM_TYPE=3, freq_sel=13
6820 01:02:50.806656 sv_algorithm_assistance_LP4_3733
6821 01:02:50.809868 ============ PULL DRAM RESETB DOWN ============
6822 01:02:50.813554 ========== PULL DRAM RESETB DOWN end =========
6823 01:02:50.820083 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
6824 01:02:50.823399 ===================================
6825 01:02:50.827182 LPDDR4 DRAM CONFIGURATION
6826 01:02:50.829593 ===================================
6827 01:02:50.830072 EX_ROW_EN[0] = 0x0
6828 01:02:50.833376 EX_ROW_EN[1] = 0x0
6829 01:02:50.833848 LP4Y_EN = 0x0
6830 01:02:50.836776 WORK_FSP = 0x1
6831 01:02:50.837252 WL = 0x5
6832 01:02:50.839970 RL = 0x5
6833 01:02:50.840536 BL = 0x2
6834 01:02:50.843128 RPST = 0x0
6835 01:02:50.843599 RD_PRE = 0x0
6836 01:02:50.846414 WR_PRE = 0x1
6837 01:02:50.846988 WR_PST = 0x1
6838 01:02:50.849550 DBI_WR = 0x0
6839 01:02:50.853026 DBI_RD = 0x0
6840 01:02:50.853534 OTF = 0x1
6841 01:02:50.856286 ===================================
6842 01:02:50.859434 ===================================
6843 01:02:50.859897 ANA top config
6844 01:02:50.863147 ===================================
6845 01:02:50.866551 DLL_ASYNC_EN = 0
6846 01:02:50.869677 ALL_SLAVE_EN = 0
6847 01:02:50.872778 NEW_RANK_MODE = 1
6848 01:02:50.878098 DLL_IDLE_MODE = 1
6849 01:02:50.878673 LP45_APHY_COMB_EN = 1
6850 01:02:50.879588 TX_ODT_DIS = 0
6851 01:02:50.882996 NEW_8X_MODE = 1
6852 01:02:50.886675 ===================================
6853 01:02:50.889378 ===================================
6854 01:02:50.893019 data_rate = 3200
6855 01:02:50.896679 CKR = 1
6856 01:02:50.897295 DQ_P2S_RATIO = 8
6857 01:02:50.899795 ===================================
6858 01:02:50.903515 CA_P2S_RATIO = 8
6859 01:02:50.906244 DQ_CA_OPEN = 0
6860 01:02:50.909548 DQ_SEMI_OPEN = 0
6861 01:02:50.913281 CA_SEMI_OPEN = 0
6862 01:02:50.916063 CA_FULL_RATE = 0
6863 01:02:50.916650 DQ_CKDIV4_EN = 0
6864 01:02:50.919811 CA_CKDIV4_EN = 0
6865 01:02:50.923167 CA_PREDIV_EN = 0
6866 01:02:50.926115 PH8_DLY = 12
6867 01:02:50.929588 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
6868 01:02:50.932904 DQ_AAMCK_DIV = 4
6869 01:02:50.933468 CA_AAMCK_DIV = 4
6870 01:02:50.936868 CA_ADMCK_DIV = 4
6871 01:02:50.939767 DQ_TRACK_CA_EN = 0
6872 01:02:50.942481 CA_PICK = 1600
6873 01:02:50.946107 CA_MCKIO = 1600
6874 01:02:50.949677 MCKIO_SEMI = 0
6875 01:02:50.953281 PLL_FREQ = 3068
6876 01:02:50.955878 DQ_UI_PI_RATIO = 32
6877 01:02:50.956467 CA_UI_PI_RATIO = 0
6878 01:02:50.958995 ===================================
6879 01:02:50.962487 ===================================
6880 01:02:50.965919 memory_type:LPDDR4
6881 01:02:50.968917 GP_NUM : 10
6882 01:02:50.969394 SRAM_EN : 1
6883 01:02:50.972407 MD32_EN : 0
6884 01:02:50.976025 ===================================
6885 01:02:50.978878 [ANA_INIT] >>>>>>>>>>>>>>
6886 01:02:50.982642 <<<<<< [CONFIGURE PHASE]: ANA_TX
6887 01:02:50.985456 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
6888 01:02:50.989085 ===================================
6889 01:02:50.989672 data_rate = 3200,PCW = 0X7600
6890 01:02:50.992135 ===================================
6891 01:02:50.995415 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
6892 01:02:51.001873 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6893 01:02:51.008647 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6894 01:02:51.013006 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
6895 01:02:51.016053 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
6896 01:02:51.018710 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
6897 01:02:51.022293 [ANA_INIT] flow start
6898 01:02:51.022871 [ANA_INIT] PLL >>>>>>>>
6899 01:02:51.025218 [ANA_INIT] PLL <<<<<<<<
6900 01:02:51.028333 [ANA_INIT] MIDPI >>>>>>>>
6901 01:02:51.032149 [ANA_INIT] MIDPI <<<<<<<<
6902 01:02:51.032767 [ANA_INIT] DLL >>>>>>>>
6903 01:02:51.035519 [ANA_INIT] DLL <<<<<<<<
6904 01:02:51.039170 [ANA_INIT] flow end
6905 01:02:51.042216 ============ LP4 DIFF to SE enter ============
6906 01:02:51.046048 ============ LP4 DIFF to SE exit ============
6907 01:02:51.048242 [ANA_INIT] <<<<<<<<<<<<<
6908 01:02:51.052339 [Flow] Enable top DCM control >>>>>
6909 01:02:51.054938 [Flow] Enable top DCM control <<<<<
6910 01:02:51.057882 Enable DLL master slave shuffle
6911 01:02:51.061590 ==============================================================
6912 01:02:51.064827 Gating Mode config
6913 01:02:51.072165 ==============================================================
6914 01:02:51.072763 Config description:
6915 01:02:51.081330 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
6916 01:02:51.088694 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
6917 01:02:51.091520 SELPH_MODE 0: By rank 1: By Phase
6918 01:02:51.098526 ==============================================================
6919 01:02:51.101338 GAT_TRACK_EN = 1
6920 01:02:51.104589 RX_GATING_MODE = 2
6921 01:02:51.107804 RX_GATING_TRACK_MODE = 2
6922 01:02:51.111243 SELPH_MODE = 1
6923 01:02:51.114628 PICG_EARLY_EN = 1
6924 01:02:51.117997 VALID_LAT_VALUE = 1
6925 01:02:51.121090 ==============================================================
6926 01:02:51.124962 Enter into Gating configuration >>>>
6927 01:02:51.127699 Exit from Gating configuration <<<<
6928 01:02:51.130930 Enter into DVFS_PRE_config >>>>>
6929 01:02:51.144558 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
6930 01:02:51.147563 Exit from DVFS_PRE_config <<<<<
6931 01:02:51.148114 Enter into PICG configuration >>>>
6932 01:02:51.151034 Exit from PICG configuration <<<<
6933 01:02:51.153932 [RX_INPUT] configuration >>>>>
6934 01:02:51.157523 [RX_INPUT] configuration <<<<<
6935 01:02:51.164208 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
6936 01:02:51.167461 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
6937 01:02:51.174795 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
6938 01:02:51.181389 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
6939 01:02:51.187810 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
6940 01:02:51.193805 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
6941 01:02:51.196999 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
6942 01:02:51.200573 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
6943 01:02:51.204816 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
6944 01:02:51.210658 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
6945 01:02:51.213803 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
6946 01:02:51.217405 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
6947 01:02:51.220779 ===================================
6948 01:02:51.224089 LPDDR4 DRAM CONFIGURATION
6949 01:02:51.226829 ===================================
6950 01:02:51.230329 EX_ROW_EN[0] = 0x0
6951 01:02:51.230785 EX_ROW_EN[1] = 0x0
6952 01:02:51.233718 LP4Y_EN = 0x0
6953 01:02:51.234134 WORK_FSP = 0x1
6954 01:02:51.237264 WL = 0x5
6955 01:02:51.237719 RL = 0x5
6956 01:02:51.239763 BL = 0x2
6957 01:02:51.240219 RPST = 0x0
6958 01:02:51.243317 RD_PRE = 0x0
6959 01:02:51.243771 WR_PRE = 0x1
6960 01:02:51.247100 WR_PST = 0x1
6961 01:02:51.247555 DBI_WR = 0x0
6962 01:02:51.250381 DBI_RD = 0x0
6963 01:02:51.250838 OTF = 0x1
6964 01:02:51.253799 ===================================
6965 01:02:51.260087 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
6966 01:02:51.263709 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
6967 01:02:51.266805 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
6968 01:02:51.269632 ===================================
6969 01:02:51.273854 LPDDR4 DRAM CONFIGURATION
6970 01:02:51.277367 ===================================
6971 01:02:51.280980 EX_ROW_EN[0] = 0x10
6972 01:02:51.281434 EX_ROW_EN[1] = 0x0
6973 01:02:51.283073 LP4Y_EN = 0x0
6974 01:02:51.283526 WORK_FSP = 0x1
6975 01:02:51.286804 WL = 0x5
6976 01:02:51.287256 RL = 0x5
6977 01:02:51.289546 BL = 0x2
6978 01:02:51.289999 RPST = 0x0
6979 01:02:51.293828 RD_PRE = 0x0
6980 01:02:51.294282 WR_PRE = 0x1
6981 01:02:51.297367 WR_PST = 0x1
6982 01:02:51.297822 DBI_WR = 0x0
6983 01:02:51.299458 DBI_RD = 0x0
6984 01:02:51.299914 OTF = 0x1
6985 01:02:51.303830 ===================================
6986 01:02:51.309472 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
6987 01:02:51.309954 ==
6988 01:02:51.312974 Dram Type= 6, Freq= 0, CH_0, rank 0
6989 01:02:51.319255 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
6990 01:02:51.319338 ==
6991 01:02:51.319423 [Duty_Offset_Calibration]
6992 01:02:51.322593 B0:0 B1:2 CA:1
6993 01:02:51.322676
6994 01:02:51.325734 [DutyScan_Calibration_Flow] k_type=0
6995 01:02:51.335133
6996 01:02:51.335215 ==CLK 0==
6997 01:02:51.339078 Final CLK duty delay cell = 0
6998 01:02:51.341605 [0] MAX Duty = 5187%(X100), DQS PI = 24
6999 01:02:51.345184 [0] MIN Duty = 4938%(X100), DQS PI = 50
7000 01:02:51.348654 [0] AVG Duty = 5062%(X100)
7001 01:02:51.348772
7002 01:02:51.351927 CH0 CLK Duty spec in!! Max-Min= 249%
7003 01:02:51.355517 [DutyScan_Calibration_Flow] ====Done====
7004 01:02:51.355620
7005 01:02:51.358371 [DutyScan_Calibration_Flow] k_type=1
7006 01:02:51.375274
7007 01:02:51.375427 ==DQS 0 ==
7008 01:02:51.378090 Final DQS duty delay cell = 0
7009 01:02:51.382587 [0] MAX Duty = 5125%(X100), DQS PI = 22
7010 01:02:51.385671 [0] MIN Duty = 5031%(X100), DQS PI = 8
7011 01:02:51.389037 [0] AVG Duty = 5078%(X100)
7012 01:02:51.389461
7013 01:02:51.389899 ==DQS 1 ==
7014 01:02:51.391890 Final DQS duty delay cell = 0
7015 01:02:51.395556 [0] MAX Duty = 5031%(X100), DQS PI = 2
7016 01:02:51.399595 [0] MIN Duty = 4876%(X100), DQS PI = 16
7017 01:02:51.402417 [0] AVG Duty = 4953%(X100)
7018 01:02:51.402979
7019 01:02:51.405544 CH0 DQS 0 Duty spec in!! Max-Min= 94%
7020 01:02:51.406018
7021 01:02:51.409175 CH0 DQS 1 Duty spec in!! Max-Min= 155%
7022 01:02:51.412209 [DutyScan_Calibration_Flow] ====Done====
7023 01:02:51.412828
7024 01:02:51.415048 [DutyScan_Calibration_Flow] k_type=3
7025 01:02:51.432878
7026 01:02:51.433433 ==DQM 0 ==
7027 01:02:51.436142 Final DQM duty delay cell = 0
7028 01:02:51.438952 [0] MAX Duty = 5187%(X100), DQS PI = 22
7029 01:02:51.442372 [0] MIN Duty = 4907%(X100), DQS PI = 42
7030 01:02:51.445828 [0] AVG Duty = 5047%(X100)
7031 01:02:51.446421
7032 01:02:51.446903 ==DQM 1 ==
7033 01:02:51.449777 Final DQM duty delay cell = 0
7034 01:02:51.452380 [0] MAX Duty = 5031%(X100), DQS PI = 4
7035 01:02:51.455921 [0] MIN Duty = 4813%(X100), DQS PI = 12
7036 01:02:51.459245 [0] AVG Duty = 4922%(X100)
7037 01:02:51.459706
7038 01:02:51.462446 CH0 DQM 0 Duty spec in!! Max-Min= 280%
7039 01:02:51.462911
7040 01:02:51.466174 CH0 DQM 1 Duty spec in!! Max-Min= 218%
7041 01:02:51.469216 [DutyScan_Calibration_Flow] ====Done====
7042 01:02:51.469676
7043 01:02:51.472464 [DutyScan_Calibration_Flow] k_type=2
7044 01:02:51.489047
7045 01:02:51.489613 ==DQ 0 ==
7046 01:02:51.492580 Final DQ duty delay cell = 0
7047 01:02:51.496127 [0] MAX Duty = 5218%(X100), DQS PI = 18
7048 01:02:51.498662 [0] MIN Duty = 4938%(X100), DQS PI = 56
7049 01:02:51.499225 [0] AVG Duty = 5078%(X100)
7050 01:02:51.502193
7051 01:02:51.502745 ==DQ 1 ==
7052 01:02:51.505343 Final DQ duty delay cell = -4
7053 01:02:51.508367 [-4] MAX Duty = 5062%(X100), DQS PI = 2
7054 01:02:51.512917 [-4] MIN Duty = 4844%(X100), DQS PI = 34
7055 01:02:51.515984 [-4] AVG Duty = 4953%(X100)
7056 01:02:51.516534
7057 01:02:51.518711 CH0 DQ 0 Duty spec in!! Max-Min= 280%
7058 01:02:51.519261
7059 01:02:51.522128 CH0 DQ 1 Duty spec in!! Max-Min= 218%
7060 01:02:51.525543 [DutyScan_Calibration_Flow] ====Done====
7061 01:02:51.526095 ==
7062 01:02:51.528955 Dram Type= 6, Freq= 0, CH_1, rank 0
7063 01:02:51.531555 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7064 01:02:51.532016 ==
7065 01:02:51.535709 [Duty_Offset_Calibration]
7066 01:02:51.536275 B0:0 B1:4 CA:-5
7067 01:02:51.536643
7068 01:02:51.538573 [DutyScan_Calibration_Flow] k_type=0
7069 01:02:51.549610
7070 01:02:51.550451 ==CLK 0==
7071 01:02:51.552424 Final CLK duty delay cell = 0
7072 01:02:51.556149 [0] MAX Duty = 5156%(X100), DQS PI = 22
7073 01:02:51.559406 [0] MIN Duty = 4875%(X100), DQS PI = 50
7074 01:02:51.562844 [0] AVG Duty = 5015%(X100)
7075 01:02:51.563393
7076 01:02:51.565868 CH1 CLK Duty spec in!! Max-Min= 281%
7077 01:02:51.569458 [DutyScan_Calibration_Flow] ====Done====
7078 01:02:51.569920
7079 01:02:51.572495 [DutyScan_Calibration_Flow] k_type=1
7080 01:02:51.588958
7081 01:02:51.589514 ==DQS 0 ==
7082 01:02:51.592012 Final DQS duty delay cell = 0
7083 01:02:51.596092 [0] MAX Duty = 5187%(X100), DQS PI = 20
7084 01:02:51.598630 [0] MIN Duty = 4876%(X100), DQS PI = 42
7085 01:02:51.602746 [0] AVG Duty = 5031%(X100)
7086 01:02:51.603311
7087 01:02:51.603673 ==DQS 1 ==
7088 01:02:51.604805 Final DQS duty delay cell = -4
7089 01:02:51.608177 [-4] MAX Duty = 5000%(X100), DQS PI = 18
7090 01:02:51.611652 [-4] MIN Duty = 4844%(X100), DQS PI = 42
7091 01:02:51.615051 [-4] AVG Duty = 4922%(X100)
7092 01:02:51.615602
7093 01:02:51.618245 CH1 DQS 0 Duty spec in!! Max-Min= 311%
7094 01:02:51.618799
7095 01:02:51.621669 CH1 DQS 1 Duty spec in!! Max-Min= 156%
7096 01:02:51.625154 [DutyScan_Calibration_Flow] ====Done====
7097 01:02:51.625703
7098 01:02:51.628007 [DutyScan_Calibration_Flow] k_type=3
7099 01:02:51.644162
7100 01:02:51.644752 ==DQM 0 ==
7101 01:02:51.646906 Final DQM duty delay cell = -4
7102 01:02:51.650725 [-4] MAX Duty = 5093%(X100), DQS PI = 34
7103 01:02:51.653770 [-4] MIN Duty = 4782%(X100), DQS PI = 44
7104 01:02:51.656617 [-4] AVG Duty = 4937%(X100)
7105 01:02:51.657250
7106 01:02:51.657629 ==DQM 1 ==
7107 01:02:51.660911 Final DQM duty delay cell = -4
7108 01:02:51.663473 [-4] MAX Duty = 5093%(X100), DQS PI = 16
7109 01:02:51.666815 [-4] MIN Duty = 4907%(X100), DQS PI = 38
7110 01:02:51.670199 [-4] AVG Duty = 5000%(X100)
7111 01:02:51.670661
7112 01:02:51.674323 CH1 DQM 0 Duty spec in!! Max-Min= 311%
7113 01:02:51.674908
7114 01:02:51.677319 CH1 DQM 1 Duty spec in!! Max-Min= 186%
7115 01:02:51.680201 [DutyScan_Calibration_Flow] ====Done====
7116 01:02:51.680654
7117 01:02:51.684174 [DutyScan_Calibration_Flow] k_type=2
7118 01:02:51.702136
7119 01:02:51.702698 ==DQ 0 ==
7120 01:02:51.707161 Final DQ duty delay cell = 0
7121 01:02:51.708360 [0] MAX Duty = 5093%(X100), DQS PI = 20
7122 01:02:51.711871 [0] MIN Duty = 4969%(X100), DQS PI = 46
7123 01:02:51.714866 [0] AVG Duty = 5031%(X100)
7124 01:02:51.715420
7125 01:02:51.715783 ==DQ 1 ==
7126 01:02:51.718075 Final DQ duty delay cell = 0
7127 01:02:51.721556 [0] MAX Duty = 5031%(X100), DQS PI = 4
7128 01:02:51.724927 [0] MIN Duty = 4876%(X100), DQS PI = 28
7129 01:02:51.725481 [0] AVG Duty = 4953%(X100)
7130 01:02:51.728249
7131 01:02:51.731260 CH1 DQ 0 Duty spec in!! Max-Min= 124%
7132 01:02:51.731814
7133 01:02:51.734679 CH1 DQ 1 Duty spec in!! Max-Min= 155%
7134 01:02:51.737570 [DutyScan_Calibration_Flow] ====Done====
7135 01:02:51.741073 nWR fixed to 30
7136 01:02:51.741639 [ModeRegInit_LP4] CH0 RK0
7137 01:02:51.744082 [ModeRegInit_LP4] CH0 RK1
7138 01:02:51.747827 [ModeRegInit_LP4] CH1 RK0
7139 01:02:51.750882 [ModeRegInit_LP4] CH1 RK1
7140 01:02:51.751435 match AC timing 4
7141 01:02:51.757458 dramType 5, freq 1600, readDBI 0, DivMode 1, cbtMode 0
7142 01:02:51.760926 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
7143 01:02:51.764180 [WriteLatency GET] Version:0-MR_RL_field_value:5-WL:14
7144 01:02:51.771169 [TX_path_calculate] data rate=3200, WL=14, DQS_TotalUI=29
7145 01:02:51.774060 [TX_path_calculate] DQS = (3,5) DQS_OE = (3,2)
7146 01:02:51.774621 [MiockJmeterHQA]
7147 01:02:51.774988
7148 01:02:51.777810 [DramcMiockJmeter] u1RxGatingPI = 0
7149 01:02:51.780864 0 : 4368, 4140
7150 01:02:51.781447 4 : 4252, 4027
7151 01:02:51.785342 8 : 4363, 4137
7152 01:02:51.785947 12 : 4253, 4026
7153 01:02:51.786328 16 : 4363, 4137
7154 01:02:51.787545 20 : 4253, 4026
7155 01:02:51.788009 24 : 4252, 4027
7156 01:02:51.791565 28 : 4252, 4027
7157 01:02:51.792028 32 : 4257, 4031
7158 01:02:51.793696 36 : 4252, 4027
7159 01:02:51.794160 40 : 4363, 4137
7160 01:02:51.797228 44 : 4363, 4137
7161 01:02:51.797695 48 : 4250, 4027
7162 01:02:51.798060 52 : 4252, 4030
7163 01:02:51.800431 56 : 4249, 4027
7164 01:02:51.800940 60 : 4249, 4027
7165 01:02:51.804125 64 : 4253, 4029
7166 01:02:51.804680 68 : 4361, 4137
7167 01:02:51.807361 72 : 4250, 4027
7168 01:02:51.807913 76 : 4250, 4026
7169 01:02:51.811624 80 : 4250, 4026
7170 01:02:51.812187 84 : 4252, 4029
7171 01:02:51.812559 88 : 4250, 4027
7172 01:02:51.814089 92 : 4250, 4027
7173 01:02:51.814554 96 : 4360, 4137
7174 01:02:51.818941 100 : 4252, 1878
7175 01:02:51.819500 104 : 4363, 0
7176 01:02:51.820815 108 : 4363, 0
7177 01:02:51.821278 112 : 4247, 0
7178 01:02:51.821646 116 : 4363, 0
7179 01:02:51.823961 120 : 4250, 0
7180 01:02:51.824421 124 : 4250, 0
7181 01:02:51.824825 128 : 4259, 0
7182 01:02:51.827825 132 : 4250, 0
7183 01:02:51.828387 136 : 4250, 0
7184 01:02:51.831943 140 : 4253, 0
7185 01:02:51.832508 144 : 4249, 0
7186 01:02:51.832951 148 : 4250, 0
7187 01:02:51.833720 152 : 4250, 0
7188 01:02:51.834088 156 : 4250, 0
7189 01:02:51.837259 160 : 4360, 0
7190 01:02:51.837821 164 : 4360, 0
7191 01:02:51.838197 168 : 4250, 0
7192 01:02:51.840813 172 : 4360, 0
7193 01:02:51.841281 176 : 4360, 0
7194 01:02:51.843979 180 : 4249, 0
7195 01:02:51.844544 184 : 4249, 0
7196 01:02:51.844983 188 : 4249, 0
7197 01:02:51.846966 192 : 4253, 0
7198 01:02:51.847663 196 : 4249, 0
7199 01:02:51.850267 200 : 4249, 0
7200 01:02:51.850823 204 : 4255, 0
7201 01:02:51.851196 208 : 4250, 0
7202 01:02:51.853661 212 : 4249, 0
7203 01:02:51.854124 216 : 4360, 0
7204 01:02:51.857724 220 : 4250, 336
7205 01:02:51.858203 224 : 4252, 3934
7206 01:02:51.858572 228 : 4360, 4138
7207 01:02:51.860045 232 : 4361, 4137
7208 01:02:51.860507 236 : 4252, 4027
7209 01:02:51.863680 240 : 4365, 4142
7210 01:02:51.864139 244 : 4250, 4027
7211 01:02:51.867957 248 : 4250, 4027
7212 01:02:51.868419 252 : 4250, 4027
7213 01:02:51.870049 256 : 4258, 4034
7214 01:02:51.870511 260 : 4250, 4027
7215 01:02:51.873909 264 : 4250, 4027
7216 01:02:51.874465 268 : 4250, 4027
7217 01:02:51.876941 272 : 4255, 4031
7218 01:02:51.877447 276 : 4360, 4138
7219 01:02:51.880454 280 : 4361, 4137
7220 01:02:51.880977 284 : 4360, 4138
7221 01:02:51.881353 288 : 4250, 4026
7222 01:02:51.883715 292 : 4363, 4137
7223 01:02:51.884222 296 : 4361, 4137
7224 01:02:51.886697 300 : 4249, 4027
7225 01:02:51.887164 304 : 4250, 4027
7226 01:02:51.890425 308 : 4249, 4027
7227 01:02:51.890908 312 : 4252, 4029
7228 01:02:51.893341 316 : 4249, 4027
7229 01:02:51.893840 320 : 4250, 4027
7230 01:02:51.897163 324 : 4249, 4027
7231 01:02:51.897722 328 : 4252, 4029
7232 01:02:51.900065 332 : 4360, 4138
7233 01:02:51.900528 336 : 4363, 3995
7234 01:02:51.903691 340 : 4250, 1935
7235 01:02:51.904249
7236 01:02:51.904610 MIOCK jitter meter ch=0
7237 01:02:51.904997
7238 01:02:51.906771 1T = (340-100) = 240 dly cells
7239 01:02:51.913334 Clock freq = 1534 MHz, period = 651 ps, 1 dly cell = 271/100 ps
7240 01:02:51.913962 ==
7241 01:02:51.917012 Dram Type= 6, Freq= 0, CH_0, rank 0
7242 01:02:51.920572 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7243 01:02:51.921057 ==
7244 01:02:51.926604 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7245 01:02:51.930714 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7246 01:02:51.933016 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7247 01:02:51.940801 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7248 01:02:51.949257 [CA 0] Center 41 (11~72) winsize 62
7249 01:02:51.952007 [CA 1] Center 41 (11~72) winsize 62
7250 01:02:51.955050 [CA 2] Center 37 (7~67) winsize 61
7251 01:02:51.958459 [CA 3] Center 37 (7~67) winsize 61
7252 01:02:51.961870 [CA 4] Center 35 (5~66) winsize 62
7253 01:02:51.965494 [CA 5] Center 35 (5~65) winsize 61
7254 01:02:51.965957
7255 01:02:51.968377 [CmdBusTrainingLP45] Vref(ca) range 0: 32
7256 01:02:51.968870
7257 01:02:51.972105 [CATrainingPosCal] consider 1 rank data
7258 01:02:51.975200 u2DelayCellTimex100 = 271/100 ps
7259 01:02:51.982066 CA0 delay=41 (11~72),Diff = 6 PI (21 cell)
7260 01:02:51.984952 CA1 delay=41 (11~72),Diff = 6 PI (21 cell)
7261 01:02:51.988222 CA2 delay=37 (7~67),Diff = 2 PI (7 cell)
7262 01:02:51.991546 CA3 delay=37 (7~67),Diff = 2 PI (7 cell)
7263 01:02:51.994887 CA4 delay=35 (5~66),Diff = 0 PI (0 cell)
7264 01:02:51.998159 CA5 delay=35 (5~65),Diff = 0 PI (0 cell)
7265 01:02:51.998617
7266 01:02:52.001569 CA PerBit enable=1, Macro0, CA PI delay=35
7267 01:02:52.002028
7268 01:02:52.004543 [CBTSetCACLKResult] CA Dly = 35
7269 01:02:52.007997 CS Dly: 11 (0~42)
7270 01:02:52.011435 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7271 01:02:52.014532 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7272 01:02:52.014989 ==
7273 01:02:52.018381 Dram Type= 6, Freq= 0, CH_0, rank 1
7274 01:02:52.024847 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7275 01:02:52.025407 ==
7276 01:02:52.027875 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7277 01:02:52.031870 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7278 01:02:52.037832 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7279 01:02:52.044229 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7280 01:02:52.051481 [CA 0] Center 42 (12~73) winsize 62
7281 01:02:52.056360 [CA 1] Center 42 (12~73) winsize 62
7282 01:02:52.058398 [CA 2] Center 38 (9~68) winsize 60
7283 01:02:52.061112 [CA 3] Center 38 (9~67) winsize 59
7284 01:02:52.064880 [CA 4] Center 36 (6~66) winsize 61
7285 01:02:52.067432 [CA 5] Center 36 (6~66) winsize 61
7286 01:02:52.067895
7287 01:02:52.071214 [CmdBusTrainingLP45] Vref(ca) range 0: 30
7288 01:02:52.071670
7289 01:02:52.075269 [CATrainingPosCal] consider 2 rank data
7290 01:02:52.078341 u2DelayCellTimex100 = 271/100 ps
7291 01:02:52.085196 CA0 delay=42 (12~72),Diff = 7 PI (25 cell)
7292 01:02:52.087864 CA1 delay=42 (12~72),Diff = 7 PI (25 cell)
7293 01:02:52.090625 CA2 delay=38 (9~67),Diff = 3 PI (10 cell)
7294 01:02:52.094779 CA3 delay=38 (9~67),Diff = 3 PI (10 cell)
7295 01:02:52.097134 CA4 delay=36 (6~66),Diff = 1 PI (3 cell)
7296 01:02:52.101339 CA5 delay=35 (6~65),Diff = 0 PI (0 cell)
7297 01:02:52.101794
7298 01:02:52.103808 CA PerBit enable=1, Macro0, CA PI delay=35
7299 01:02:52.104261
7300 01:02:52.107215 [CBTSetCACLKResult] CA Dly = 35
7301 01:02:52.110762 CS Dly: 11 (0~42)
7302 01:02:52.113704 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7303 01:02:52.117227 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7304 01:02:52.117666
7305 01:02:52.120876 ----->DramcWriteLeveling(PI) begin...
7306 01:02:52.121345 ==
7307 01:02:52.123736 Dram Type= 6, Freq= 0, CH_0, rank 0
7308 01:02:52.130399 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7309 01:02:52.130978 ==
7310 01:02:52.134996 Write leveling (Byte 0): 29 => 29
7311 01:02:52.137282 Write leveling (Byte 1): 27 => 27
7312 01:02:52.137735 DramcWriteLeveling(PI) end<-----
7313 01:02:52.141501
7314 01:02:52.142093 ==
7315 01:02:52.143993 Dram Type= 6, Freq= 0, CH_0, rank 0
7316 01:02:52.147038 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7317 01:02:52.147493 ==
7318 01:02:52.150537 [Gating] SW mode calibration
7319 01:02:52.156772 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 28 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
7320 01:02:52.160699 RX_Path_delay_UI(52) -3 - DQSINCTL_UI(40) = u1StartUI(12)
7321 01:02:52.167159 0 12 0 | B1->B0 | 2323 2626 | 0 1 | (0 0) (0 0)
7322 01:02:52.170769 0 12 4 | B1->B0 | 2727 3434 | 0 1 | (0 0) (1 1)
7323 01:02:52.173378 0 12 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7324 01:02:52.180660 0 12 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7325 01:02:52.183527 0 12 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7326 01:02:52.186623 0 12 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7327 01:02:52.193383 0 12 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7328 01:02:52.196685 0 12 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
7329 01:02:52.200816 0 13 0 | B1->B0 | 3434 3232 | 1 1 | (1 1) (1 0)
7330 01:02:52.207066 0 13 4 | B1->B0 | 3333 2424 | 1 0 | (1 0) (0 0)
7331 01:02:52.210318 0 13 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7332 01:02:52.213459 0 13 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7333 01:02:52.220154 0 13 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7334 01:02:52.223550 0 13 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7335 01:02:52.226162 0 13 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7336 01:02:52.233343 0 13 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7337 01:02:52.236027 0 14 0 | B1->B0 | 2323 3333 | 0 0 | (0 0) (0 0)
7338 01:02:52.239222 0 14 4 | B1->B0 | 3232 4646 | 1 0 | (0 0) (0 0)
7339 01:02:52.246992 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7340 01:02:52.249219 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7341 01:02:52.253404 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7342 01:02:52.259518 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7343 01:02:52.263106 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7344 01:02:52.266228 0 14 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7345 01:02:52.273116 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7346 01:02:52.275591 0 15 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
7347 01:02:52.279074 0 15 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
7348 01:02:52.285597 0 15 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7349 01:02:52.289539 0 15 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7350 01:02:52.292585 0 15 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7351 01:02:52.299128 0 15 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7352 01:02:52.302759 0 15 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7353 01:02:52.305407 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7354 01:02:52.313559 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7355 01:02:52.315897 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7356 01:02:52.318526 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7357 01:02:52.325841 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7358 01:02:52.328426 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7359 01:02:52.332292 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7360 01:02:52.338660 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7361 01:02:52.342573 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7362 01:02:52.346084 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
7363 01:02:52.352791 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7364 01:02:52.353369 Total UI for P1: 0, mck2ui 16
7365 01:02:52.358909 best dqsien dly found for B0: ( 1, 1, 0)
7366 01:02:52.359370 Total UI for P1: 0, mck2ui 16
7367 01:02:52.365302 best dqsien dly found for B1: ( 1, 1, 4)
7368 01:02:52.368157 best DQS0 dly(MCK, UI, PI) = (1, 1, 0)
7369 01:02:52.372598 best DQS1 dly(MCK, UI, PI) = (1, 1, 4)
7370 01:02:52.373114
7371 01:02:52.375292 best DQS0 P1 dly(MCK, UI, PI) = (1, 5, 0)
7372 01:02:52.379128 best DQS1 P1 dly(MCK, UI, PI) = (1, 5, 4)
7373 01:02:52.382180 [Gating] SW calibration Done
7374 01:02:52.382729 ==
7375 01:02:52.385526 Dram Type= 6, Freq= 0, CH_0, rank 0
7376 01:02:52.388870 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7377 01:02:52.389430 ==
7378 01:02:52.391865 RX Vref Scan: 0
7379 01:02:52.392322
7380 01:02:52.392682 RX Vref 0 -> 0, step: 1
7381 01:02:52.393058
7382 01:02:52.395086 RX Delay 0 -> 252, step: 8
7383 01:02:52.398179 iDelay=200, Bit 0, Center 127 (72 ~ 183) 112
7384 01:02:52.404776 iDelay=200, Bit 1, Center 131 (72 ~ 191) 120
7385 01:02:52.408319 iDelay=200, Bit 2, Center 127 (72 ~ 183) 112
7386 01:02:52.411342 iDelay=200, Bit 3, Center 127 (72 ~ 183) 112
7387 01:02:52.415742 iDelay=200, Bit 4, Center 135 (80 ~ 191) 112
7388 01:02:52.417888 iDelay=200, Bit 5, Center 119 (64 ~ 175) 112
7389 01:02:52.422007 iDelay=200, Bit 6, Center 135 (80 ~ 191) 112
7390 01:02:52.427859 iDelay=200, Bit 7, Center 139 (80 ~ 199) 120
7391 01:02:52.431303 iDelay=200, Bit 8, Center 115 (64 ~ 167) 104
7392 01:02:52.435044 iDelay=200, Bit 9, Center 103 (48 ~ 159) 112
7393 01:02:52.438370 iDelay=200, Bit 10, Center 123 (64 ~ 183) 120
7394 01:02:52.444742 iDelay=200, Bit 11, Center 115 (64 ~ 167) 104
7395 01:02:52.447932 iDelay=200, Bit 12, Center 131 (80 ~ 183) 104
7396 01:02:52.451218 iDelay=200, Bit 13, Center 131 (72 ~ 191) 120
7397 01:02:52.454893 iDelay=200, Bit 14, Center 139 (80 ~ 199) 120
7398 01:02:52.457997 iDelay=200, Bit 15, Center 135 (80 ~ 191) 112
7399 01:02:52.461064 ==
7400 01:02:52.464318 Dram Type= 6, Freq= 0, CH_0, rank 0
7401 01:02:52.467326 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7402 01:02:52.467855 ==
7403 01:02:52.468511 DQS Delay:
7404 01:02:52.470854 DQS0 = 0, DQS1 = 0
7405 01:02:52.471309 DQM Delay:
7406 01:02:52.474377 DQM0 = 130, DQM1 = 124
7407 01:02:52.474929 DQ Delay:
7408 01:02:52.477307 DQ0 =127, DQ1 =131, DQ2 =127, DQ3 =127
7409 01:02:52.481375 DQ4 =135, DQ5 =119, DQ6 =135, DQ7 =139
7410 01:02:52.484380 DQ8 =115, DQ9 =103, DQ10 =123, DQ11 =115
7411 01:02:52.487578 DQ12 =131, DQ13 =131, DQ14 =139, DQ15 =135
7412 01:02:52.488127
7413 01:02:52.488489
7414 01:02:52.488887 ==
7415 01:02:52.491224 Dram Type= 6, Freq= 0, CH_0, rank 0
7416 01:02:52.497428 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7417 01:02:52.497988 ==
7418 01:02:52.498353
7419 01:02:52.498690
7420 01:02:52.499011 TX Vref Scan disable
7421 01:02:52.501964 == TX Byte 0 ==
7422 01:02:52.504614 Update DQ dly =984 (3 ,6, 24) DQ OEN =(3 ,3)
7423 01:02:52.511062 Update DQM dly =984 (3 ,6, 24) DQM OEN =(3 ,3)
7424 01:02:52.511611 == TX Byte 1 ==
7425 01:02:52.513922 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
7426 01:02:52.521058 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
7427 01:02:52.521601 ==
7428 01:02:52.524369 Dram Type= 6, Freq= 0, CH_0, rank 0
7429 01:02:52.527350 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7430 01:02:52.527809 ==
7431 01:02:52.539637
7432 01:02:52.543150 TX Vref early break, caculate TX vref
7433 01:02:52.546698 TX Vref=16, minBit 8, minWin=22, winSum=373
7434 01:02:52.549548 TX Vref=18, minBit 4, minWin=23, winSum=384
7435 01:02:52.553256 TX Vref=20, minBit 8, minWin=23, winSum=389
7436 01:02:52.556309 TX Vref=22, minBit 9, minWin=23, winSum=398
7437 01:02:52.559923 TX Vref=24, minBit 8, minWin=24, winSum=407
7438 01:02:52.566542 TX Vref=26, minBit 8, minWin=25, winSum=411
7439 01:02:52.569275 TX Vref=28, minBit 3, minWin=25, winSum=420
7440 01:02:52.572632 TX Vref=30, minBit 6, minWin=24, winSum=407
7441 01:02:52.576808 TX Vref=32, minBit 1, minWin=24, winSum=402
7442 01:02:52.579302 TX Vref=34, minBit 8, minWin=23, winSum=395
7443 01:02:52.586203 [TxChooseVref] Worse bit 3, Min win 25, Win sum 420, Final Vref 28
7444 01:02:52.586770
7445 01:02:52.589437 Final TX Range 0 Vref 28
7446 01:02:52.589893
7447 01:02:52.590254 ==
7448 01:02:52.592384 Dram Type= 6, Freq= 0, CH_0, rank 0
7449 01:02:52.596160 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7450 01:02:52.596782 ==
7451 01:02:52.597164
7452 01:02:52.597503
7453 01:02:52.599131 TX Vref Scan disable
7454 01:02:52.606718 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =271/100 ps
7455 01:02:52.607272 == TX Byte 0 ==
7456 01:02:52.609354 u2DelayCellOfst[0]=14 cells (4 PI)
7457 01:02:52.613136 u2DelayCellOfst[1]=18 cells (5 PI)
7458 01:02:52.616175 u2DelayCellOfst[2]=14 cells (4 PI)
7459 01:02:52.620358 u2DelayCellOfst[3]=10 cells (3 PI)
7460 01:02:52.622430 u2DelayCellOfst[4]=7 cells (2 PI)
7461 01:02:52.626280 u2DelayCellOfst[5]=0 cells (0 PI)
7462 01:02:52.629618 u2DelayCellOfst[6]=18 cells (5 PI)
7463 01:02:52.632458 u2DelayCellOfst[7]=18 cells (5 PI)
7464 01:02:52.635957 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
7465 01:02:52.639283 Update DQM dly =984 (3 ,6, 24) DQM OEN =(3 ,3)
7466 01:02:52.642403 == TX Byte 1 ==
7467 01:02:52.645692 u2DelayCellOfst[8]=3 cells (1 PI)
7468 01:02:52.646242 u2DelayCellOfst[9]=0 cells (0 PI)
7469 01:02:52.650214 u2DelayCellOfst[10]=10 cells (3 PI)
7470 01:02:52.652659 u2DelayCellOfst[11]=7 cells (2 PI)
7471 01:02:52.655404 u2DelayCellOfst[12]=18 cells (5 PI)
7472 01:02:52.659294 u2DelayCellOfst[13]=18 cells (5 PI)
7473 01:02:52.662932 u2DelayCellOfst[14]=21 cells (6 PI)
7474 01:02:52.665356 u2DelayCellOfst[15]=18 cells (5 PI)
7475 01:02:52.669617 Update DQ dly =977 (3 ,6, 17) DQ OEN =(3 ,3)
7476 01:02:52.675714 Update DQM dly =980 (3 ,6, 20) DQM OEN =(3 ,3)
7477 01:02:52.676263 DramC Write-DBI on
7478 01:02:52.676627 ==
7479 01:02:52.679270 Dram Type= 6, Freq= 0, CH_0, rank 0
7480 01:02:52.685292 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7481 01:02:52.685836 ==
7482 01:02:52.686200
7483 01:02:52.686631
7484 01:02:52.686974 TX Vref Scan disable
7485 01:02:52.688993 == TX Byte 0 ==
7486 01:02:52.692514 Update DQM dly =728 (2 ,6, 24) DQM OEN =(3 ,3)
7487 01:02:52.695968 == TX Byte 1 ==
7488 01:02:52.699197 Update DQM dly =722 (2 ,6, 18) DQM OEN =(3 ,3)
7489 01:02:52.702926 DramC Write-DBI off
7490 01:02:52.703477
7491 01:02:52.703841 [DATLAT]
7492 01:02:52.704177 Freq=1600, CH0 RK0
7493 01:02:52.704504
7494 01:02:52.705530 DATLAT Default: 0xf
7495 01:02:52.709185 0, 0xFFFF, sum = 0
7496 01:02:52.709804 1, 0xFFFF, sum = 0
7497 01:02:52.713221 2, 0xFFFF, sum = 0
7498 01:02:52.713787 3, 0xFFFF, sum = 0
7499 01:02:52.715745 4, 0xFFFF, sum = 0
7500 01:02:52.716306 5, 0xFFFF, sum = 0
7501 01:02:52.718868 6, 0xFFFF, sum = 0
7502 01:02:52.719435 7, 0xFFFF, sum = 0
7503 01:02:52.722821 8, 0xFFFF, sum = 0
7504 01:02:52.723408 9, 0xFFFF, sum = 0
7505 01:02:52.725877 10, 0xFFFF, sum = 0
7506 01:02:52.726442 11, 0xFFFF, sum = 0
7507 01:02:52.729699 12, 0xBFF, sum = 0
7508 01:02:52.730267 13, 0x0, sum = 1
7509 01:02:52.732947 14, 0x0, sum = 2
7510 01:02:52.733511 15, 0x0, sum = 3
7511 01:02:52.736102 16, 0x0, sum = 4
7512 01:02:52.736672 best_step = 14
7513 01:02:52.737074
7514 01:02:52.737414 ==
7515 01:02:52.739193 Dram Type= 6, Freq= 0, CH_0, rank 0
7516 01:02:52.742716 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7517 01:02:52.745567 ==
7518 01:02:52.746124 RX Vref Scan: 1
7519 01:02:52.746492
7520 01:02:52.748823 Set Vref Range= 24 -> 127
7521 01:02:52.749277
7522 01:02:52.751901 RX Vref 24 -> 127, step: 1
7523 01:02:52.752457
7524 01:02:52.752881 RX Delay 3 -> 252, step: 4
7525 01:02:52.753229
7526 01:02:52.755278 Set Vref, RX VrefLevel [Byte0]: 24
7527 01:02:52.758409 [Byte1]: 24
7528 01:02:52.762966
7529 01:02:52.763527 Set Vref, RX VrefLevel [Byte0]: 25
7530 01:02:52.766680 [Byte1]: 25
7531 01:02:52.770777
7532 01:02:52.771235 Set Vref, RX VrefLevel [Byte0]: 26
7533 01:02:52.773773 [Byte1]: 26
7534 01:02:52.777752
7535 01:02:52.778208 Set Vref, RX VrefLevel [Byte0]: 27
7536 01:02:52.781189 [Byte1]: 27
7537 01:02:52.785451
7538 01:02:52.786008 Set Vref, RX VrefLevel [Byte0]: 28
7539 01:02:52.788674 [Byte1]: 28
7540 01:02:52.792749
7541 01:02:52.793209 Set Vref, RX VrefLevel [Byte0]: 29
7542 01:02:52.796232 [Byte1]: 29
7543 01:02:52.801387
7544 01:02:52.801941 Set Vref, RX VrefLevel [Byte0]: 30
7545 01:02:52.804234 [Byte1]: 30
7546 01:02:52.808530
7547 01:02:52.809135 Set Vref, RX VrefLevel [Byte0]: 31
7548 01:02:52.812158 [Byte1]: 31
7549 01:02:52.816231
7550 01:02:52.816835 Set Vref, RX VrefLevel [Byte0]: 32
7551 01:02:52.820060 [Byte1]: 32
7552 01:02:52.823672
7553 01:02:52.824228 Set Vref, RX VrefLevel [Byte0]: 33
7554 01:02:52.827347 [Byte1]: 33
7555 01:02:52.831381
7556 01:02:52.831953 Set Vref, RX VrefLevel [Byte0]: 34
7557 01:02:52.834724 [Byte1]: 34
7558 01:02:52.839050
7559 01:02:52.839681 Set Vref, RX VrefLevel [Byte0]: 35
7560 01:02:52.842216 [Byte1]: 35
7561 01:02:52.847737
7562 01:02:52.848294 Set Vref, RX VrefLevel [Byte0]: 36
7563 01:02:52.849868 [Byte1]: 36
7564 01:02:52.855139
7565 01:02:52.855696 Set Vref, RX VrefLevel [Byte0]: 37
7566 01:02:52.858010 [Byte1]: 37
7567 01:02:52.861873
7568 01:02:52.862326 Set Vref, RX VrefLevel [Byte0]: 38
7569 01:02:52.865615 [Byte1]: 38
7570 01:02:52.869704
7571 01:02:52.870286 Set Vref, RX VrefLevel [Byte0]: 39
7572 01:02:52.872882 [Byte1]: 39
7573 01:02:52.877919
7574 01:02:52.878472 Set Vref, RX VrefLevel [Byte0]: 40
7575 01:02:52.880491 [Byte1]: 40
7576 01:02:52.884873
7577 01:02:52.885330 Set Vref, RX VrefLevel [Byte0]: 41
7578 01:02:52.889154 [Byte1]: 41
7579 01:02:52.892349
7580 01:02:52.892827 Set Vref, RX VrefLevel [Byte0]: 42
7581 01:02:52.895621 [Byte1]: 42
7582 01:02:52.900669
7583 01:02:52.901293 Set Vref, RX VrefLevel [Byte0]: 43
7584 01:02:52.904126 [Byte1]: 43
7585 01:02:52.908495
7586 01:02:52.909105 Set Vref, RX VrefLevel [Byte0]: 44
7587 01:02:52.911506 [Byte1]: 44
7588 01:02:52.915405
7589 01:02:52.915977 Set Vref, RX VrefLevel [Byte0]: 45
7590 01:02:52.918789 [Byte1]: 45
7591 01:02:52.924152
7592 01:02:52.924732 Set Vref, RX VrefLevel [Byte0]: 46
7593 01:02:52.926893 [Byte1]: 46
7594 01:02:52.931574
7595 01:02:52.932137 Set Vref, RX VrefLevel [Byte0]: 47
7596 01:02:52.934351 [Byte1]: 47
7597 01:02:52.939650
7598 01:02:52.940207 Set Vref, RX VrefLevel [Byte0]: 48
7599 01:02:52.942222 [Byte1]: 48
7600 01:02:52.946015
7601 01:02:52.946576 Set Vref, RX VrefLevel [Byte0]: 49
7602 01:02:52.949266 [Byte1]: 49
7603 01:02:52.955087
7604 01:02:52.955643 Set Vref, RX VrefLevel [Byte0]: 50
7605 01:02:52.957525 [Byte1]: 50
7606 01:02:52.961710
7607 01:02:52.962272 Set Vref, RX VrefLevel [Byte0]: 51
7608 01:02:52.965321 [Byte1]: 51
7609 01:02:52.969531
7610 01:02:52.970083 Set Vref, RX VrefLevel [Byte0]: 52
7611 01:02:52.972266 [Byte1]: 52
7612 01:02:52.976990
7613 01:02:52.977535 Set Vref, RX VrefLevel [Byte0]: 53
7614 01:02:52.980016 [Byte1]: 53
7615 01:02:52.984860
7616 01:02:52.985404 Set Vref, RX VrefLevel [Byte0]: 54
7617 01:02:52.987987 [Byte1]: 54
7618 01:02:52.992285
7619 01:02:52.992898 Set Vref, RX VrefLevel [Byte0]: 55
7620 01:02:52.995312 [Byte1]: 55
7621 01:02:53.000097
7622 01:02:53.000756 Set Vref, RX VrefLevel [Byte0]: 56
7623 01:02:53.003127 [Byte1]: 56
7624 01:02:53.007320
7625 01:02:53.007864 Set Vref, RX VrefLevel [Byte0]: 57
7626 01:02:53.010959 [Byte1]: 57
7627 01:02:53.015164
7628 01:02:53.015715 Set Vref, RX VrefLevel [Byte0]: 58
7629 01:02:53.018422 [Byte1]: 58
7630 01:02:53.023654
7631 01:02:53.024217 Set Vref, RX VrefLevel [Byte0]: 59
7632 01:02:53.026512 [Byte1]: 59
7633 01:02:53.031062
7634 01:02:53.031612 Set Vref, RX VrefLevel [Byte0]: 60
7635 01:02:53.033594 [Byte1]: 60
7636 01:02:53.038061
7637 01:02:53.038619 Set Vref, RX VrefLevel [Byte0]: 61
7638 01:02:53.041552 [Byte1]: 61
7639 01:02:53.045628
7640 01:02:53.046177 Set Vref, RX VrefLevel [Byte0]: 62
7641 01:02:53.049628 [Byte1]: 62
7642 01:02:53.053793
7643 01:02:53.054342 Set Vref, RX VrefLevel [Byte0]: 63
7644 01:02:53.057073 [Byte1]: 63
7645 01:02:53.060691
7646 01:02:53.061193 Set Vref, RX VrefLevel [Byte0]: 64
7647 01:02:53.065403 [Byte1]: 64
7648 01:02:53.068983
7649 01:02:53.069536 Set Vref, RX VrefLevel [Byte0]: 65
7650 01:02:53.072230 [Byte1]: 65
7651 01:02:53.076823
7652 01:02:53.077278 Set Vref, RX VrefLevel [Byte0]: 66
7653 01:02:53.080071 [Byte1]: 66
7654 01:02:53.083769
7655 01:02:53.084319 Set Vref, RX VrefLevel [Byte0]: 67
7656 01:02:53.087357 [Byte1]: 67
7657 01:02:53.091625
7658 01:02:53.092081 Set Vref, RX VrefLevel [Byte0]: 68
7659 01:02:53.094946 [Byte1]: 68
7660 01:02:53.099127
7661 01:02:53.099678 Set Vref, RX VrefLevel [Byte0]: 69
7662 01:02:53.102801 [Byte1]: 69
7663 01:02:53.106583
7664 01:02:53.107040 Set Vref, RX VrefLevel [Byte0]: 70
7665 01:02:53.110039 [Byte1]: 70
7666 01:02:53.114548
7667 01:02:53.115151 Set Vref, RX VrefLevel [Byte0]: 71
7668 01:02:53.118153 [Byte1]: 71
7669 01:02:53.122031
7670 01:02:53.122486 Set Vref, RX VrefLevel [Byte0]: 72
7671 01:02:53.125700 [Byte1]: 72
7672 01:02:53.130664
7673 01:02:53.131231 Final RX Vref Byte 0 = 54 to rank0
7674 01:02:53.132975 Final RX Vref Byte 1 = 56 to rank0
7675 01:02:53.136789 Final RX Vref Byte 0 = 54 to rank1
7676 01:02:53.139998 Final RX Vref Byte 1 = 56 to rank1==
7677 01:02:53.143321 Dram Type= 6, Freq= 0, CH_0, rank 0
7678 01:02:53.149649 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7679 01:02:53.150213 ==
7680 01:02:53.150582 DQS Delay:
7681 01:02:53.150919 DQS0 = 0, DQS1 = 0
7682 01:02:53.152948 DQM Delay:
7683 01:02:53.153404 DQM0 = 126, DQM1 = 121
7684 01:02:53.155988 DQ Delay:
7685 01:02:53.160159 DQ0 =122, DQ1 =128, DQ2 =124, DQ3 =122
7686 01:02:53.164396 DQ4 =130, DQ5 =116, DQ6 =138, DQ7 =134
7687 01:02:53.167382 DQ8 =110, DQ9 =104, DQ10 =122, DQ11 =112
7688 01:02:53.169567 DQ12 =126, DQ13 =126, DQ14 =136, DQ15 =134
7689 01:02:53.170036
7690 01:02:53.170399
7691 01:02:53.170735
7692 01:02:53.173124 [DramC_TX_OE_Calibration] TA2
7693 01:02:53.176400 Original DQ_B0 (3 6) =30, OEN = 27
7694 01:02:53.179467 Original DQ_B1 (3 6) =30, OEN = 27
7695 01:02:53.184242 24, 0x0, End_B0=24 End_B1=24
7696 01:02:53.184838 25, 0x0, End_B0=25 End_B1=25
7697 01:02:53.186117 26, 0x0, End_B0=26 End_B1=26
7698 01:02:53.189311 27, 0x0, End_B0=27 End_B1=27
7699 01:02:53.193016 28, 0x0, End_B0=28 End_B1=28
7700 01:02:53.196633 29, 0x0, End_B0=29 End_B1=29
7701 01:02:53.197232 30, 0x0, End_B0=30 End_B1=30
7702 01:02:53.200334 31, 0x4545, End_B0=30 End_B1=30
7703 01:02:53.202679 Byte0 end_step=30 best_step=27
7704 01:02:53.205900 Byte1 end_step=30 best_step=27
7705 01:02:53.209407 Byte0 TX OE(2T, 0.5T) = (3, 3)
7706 01:02:53.212873 Byte1 TX OE(2T, 0.5T) = (3, 3)
7707 01:02:53.213432
7708 01:02:53.213792
7709 01:02:53.219074 [DQSOSCAuto] RK0, (LSB)MR18= 0x1d1d, (MSB)MR19= 0x303, tDQSOscB0 = 395 ps tDQSOscB1 = 395 ps
7710 01:02:53.222179 CH0 RK0: MR19=303, MR18=1D1D
7711 01:02:53.229044 CH0_RK0: MR19=0x303, MR18=0x1D1D, DQSOSC=395, MR23=63, INC=23, DEC=15
7712 01:02:53.229502
7713 01:02:53.232494 ----->DramcWriteLeveling(PI) begin...
7714 01:02:53.233027 ==
7715 01:02:53.235446 Dram Type= 6, Freq= 0, CH_0, rank 1
7716 01:02:53.238844 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7717 01:02:53.239302 ==
7718 01:02:53.242256 Write leveling (Byte 0): 28 => 28
7719 01:02:53.245791 Write leveling (Byte 1): 25 => 25
7720 01:02:53.249336 DramcWriteLeveling(PI) end<-----
7721 01:02:53.249794
7722 01:02:53.250162 ==
7723 01:02:53.253323 Dram Type= 6, Freq= 0, CH_0, rank 1
7724 01:02:53.255859 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7725 01:02:53.256317 ==
7726 01:02:53.258719 [Gating] SW mode calibration
7727 01:02:53.265669 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 28 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
7728 01:02:53.272772 RX_Path_delay_UI(52) -3 - DQSINCTL_UI(40) = u1StartUI(12)
7729 01:02:53.275574 0 12 0 | B1->B0 | 2323 2727 | 0 0 | (0 0) (0 0)
7730 01:02:53.282359 0 12 4 | B1->B0 | 2c2c 3434 | 1 1 | (1 1) (1 1)
7731 01:02:53.285186 0 12 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7732 01:02:53.289555 0 12 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7733 01:02:53.294910 0 12 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7734 01:02:53.298466 0 12 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
7735 01:02:53.303346 0 12 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
7736 01:02:53.308262 0 12 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
7737 01:02:53.312908 0 13 0 | B1->B0 | 3434 3232 | 1 1 | (1 1) (1 0)
7738 01:02:53.316109 0 13 4 | B1->B0 | 3232 2323 | 1 0 | (1 0) (1 0)
7739 01:02:53.322239 0 13 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7740 01:02:53.324687 0 13 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7741 01:02:53.328230 0 13 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7742 01:02:53.335075 0 13 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7743 01:02:53.338311 0 13 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7744 01:02:53.341536 0 13 28 | B1->B0 | 2323 2a2a | 0 0 | (0 0) (0 0)
7745 01:02:53.348189 0 14 0 | B1->B0 | 2323 3d3d | 0 0 | (0 0) (0 0)
7746 01:02:53.351158 0 14 4 | B1->B0 | 3a3a 4646 | 0 0 | (0 0) (0 0)
7747 01:02:53.355075 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7748 01:02:53.361120 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7749 01:02:53.364896 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7750 01:02:53.368966 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7751 01:02:53.374769 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7752 01:02:53.377799 0 14 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7753 01:02:53.381396 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
7754 01:02:53.387670 0 15 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
7755 01:02:53.391358 0 15 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7756 01:02:53.394918 0 15 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7757 01:02:53.397993 0 15 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7758 01:02:53.405632 0 15 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7759 01:02:53.407862 0 15 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7760 01:02:53.411265 0 15 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7761 01:02:53.417541 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7762 01:02:53.421663 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7763 01:02:53.424291 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7764 01:02:53.431453 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7765 01:02:53.435190 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7766 01:02:53.438010 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7767 01:02:53.444851 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7768 01:02:53.447709 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7769 01:02:53.450891 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7770 01:02:53.457353 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
7771 01:02:53.461267 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7772 01:02:53.464093 Total UI for P1: 0, mck2ui 16
7773 01:02:53.467765 best dqsien dly found for B0: ( 1, 1, 0)
7774 01:02:53.470795 Total UI for P1: 0, mck2ui 16
7775 01:02:53.474032 best dqsien dly found for B1: ( 1, 1, 4)
7776 01:02:53.477646 best DQS0 dly(MCK, UI, PI) = (1, 1, 0)
7777 01:02:53.480845 best DQS1 dly(MCK, UI, PI) = (1, 1, 4)
7778 01:02:53.481400
7779 01:02:53.484803 best DQS0 P1 dly(MCK, UI, PI) = (1, 5, 0)
7780 01:02:53.487291 best DQS1 P1 dly(MCK, UI, PI) = (1, 5, 4)
7781 01:02:53.491357 [Gating] SW calibration Done
7782 01:02:53.491931 ==
7783 01:02:53.493431 Dram Type= 6, Freq= 0, CH_0, rank 1
7784 01:02:53.497732 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7785 01:02:53.501156 ==
7786 01:02:53.501717 RX Vref Scan: 0
7787 01:02:53.502082
7788 01:02:53.504200 RX Vref 0 -> 0, step: 1
7789 01:02:53.504805
7790 01:02:53.505172 RX Delay 0 -> 252, step: 8
7791 01:02:53.510848 iDelay=200, Bit 0, Center 127 (72 ~ 183) 112
7792 01:02:53.514112 iDelay=200, Bit 1, Center 135 (80 ~ 191) 112
7793 01:02:53.517108 iDelay=200, Bit 2, Center 131 (72 ~ 191) 120
7794 01:02:53.520967 iDelay=200, Bit 3, Center 123 (64 ~ 183) 120
7795 01:02:53.523843 iDelay=200, Bit 4, Center 131 (72 ~ 191) 120
7796 01:02:53.530569 iDelay=200, Bit 5, Center 119 (64 ~ 175) 112
7797 01:02:53.533510 iDelay=200, Bit 6, Center 139 (80 ~ 199) 120
7798 01:02:53.536664 iDelay=200, Bit 7, Center 143 (88 ~ 199) 112
7799 01:02:53.540469 iDelay=200, Bit 8, Center 111 (56 ~ 167) 112
7800 01:02:53.543753 iDelay=200, Bit 9, Center 111 (56 ~ 167) 112
7801 01:02:53.549988 iDelay=200, Bit 10, Center 123 (64 ~ 183) 120
7802 01:02:53.553098 iDelay=200, Bit 11, Center 119 (64 ~ 175) 112
7803 01:02:53.556991 iDelay=200, Bit 12, Center 131 (72 ~ 191) 120
7804 01:02:53.559665 iDelay=200, Bit 13, Center 135 (80 ~ 191) 112
7805 01:02:53.567554 iDelay=200, Bit 14, Center 135 (80 ~ 191) 112
7806 01:02:53.569629 iDelay=200, Bit 15, Center 131 (72 ~ 191) 120
7807 01:02:53.570090 ==
7808 01:02:53.573024 Dram Type= 6, Freq= 0, CH_0, rank 1
7809 01:02:53.576471 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7810 01:02:53.576986 ==
7811 01:02:53.580079 DQS Delay:
7812 01:02:53.580626 DQS0 = 0, DQS1 = 0
7813 01:02:53.581059 DQM Delay:
7814 01:02:53.583486 DQM0 = 131, DQM1 = 124
7815 01:02:53.584041 DQ Delay:
7816 01:02:53.586402 DQ0 =127, DQ1 =135, DQ2 =131, DQ3 =123
7817 01:02:53.589617 DQ4 =131, DQ5 =119, DQ6 =139, DQ7 =143
7818 01:02:53.592926 DQ8 =111, DQ9 =111, DQ10 =123, DQ11 =119
7819 01:02:53.601149 DQ12 =131, DQ13 =135, DQ14 =135, DQ15 =131
7820 01:02:53.601703
7821 01:02:53.602064
7822 01:02:53.602398 ==
7823 01:02:53.603082 Dram Type= 6, Freq= 0, CH_0, rank 1
7824 01:02:53.606457 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7825 01:02:53.607009 ==
7826 01:02:53.607375
7827 01:02:53.607712
7828 01:02:53.609873 TX Vref Scan disable
7829 01:02:53.610425 == TX Byte 0 ==
7830 01:02:53.616837 Update DQ dly =984 (3 ,6, 24) DQ OEN =(3 ,3)
7831 01:02:53.619856 Update DQM dly =984 (3 ,6, 24) DQM OEN =(3 ,3)
7832 01:02:53.623858 == TX Byte 1 ==
7833 01:02:53.626510 Update DQ dly =978 (3 ,6, 18) DQ OEN =(3 ,3)
7834 01:02:53.629647 Update DQM dly =978 (3 ,6, 18) DQM OEN =(3 ,3)
7835 01:02:53.630199 ==
7836 01:02:53.633313 Dram Type= 6, Freq= 0, CH_0, rank 1
7837 01:02:53.635942 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7838 01:02:53.636492 ==
7839 01:02:53.651433
7840 01:02:53.654990 TX Vref early break, caculate TX vref
7841 01:02:53.658324 TX Vref=16, minBit 8, minWin=22, winSum=373
7842 01:02:53.661208 TX Vref=18, minBit 10, minWin=22, winSum=382
7843 01:02:53.664501 TX Vref=20, minBit 1, minWin=23, winSum=393
7844 01:02:53.668110 TX Vref=22, minBit 9, minWin=23, winSum=400
7845 01:02:53.671149 TX Vref=24, minBit 8, minWin=24, winSum=404
7846 01:02:53.677381 TX Vref=26, minBit 8, minWin=25, winSum=413
7847 01:02:53.682076 TX Vref=28, minBit 8, minWin=25, winSum=417
7848 01:02:53.684935 TX Vref=30, minBit 8, minWin=24, winSum=410
7849 01:02:53.688409 TX Vref=32, minBit 8, minWin=24, winSum=404
7850 01:02:53.690520 TX Vref=34, minBit 7, minWin=24, winSum=399
7851 01:02:53.698014 TX Vref=36, minBit 8, minWin=23, winSum=389
7852 01:02:53.701481 [TxChooseVref] Worse bit 8, Min win 25, Win sum 417, Final Vref 28
7853 01:02:53.701949
7854 01:02:53.704044 Final TX Range 0 Vref 28
7855 01:02:53.704602
7856 01:02:53.705028 ==
7857 01:02:53.707306 Dram Type= 6, Freq= 0, CH_0, rank 1
7858 01:02:53.711392 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7859 01:02:53.714666 ==
7860 01:02:53.715226
7861 01:02:53.715586
7862 01:02:53.715922 TX Vref Scan disable
7863 01:02:53.720585 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =271/100 ps
7864 01:02:53.721189 == TX Byte 0 ==
7865 01:02:53.724069 u2DelayCellOfst[0]=14 cells (4 PI)
7866 01:02:53.728058 u2DelayCellOfst[1]=18 cells (5 PI)
7867 01:02:53.730413 u2DelayCellOfst[2]=10 cells (3 PI)
7868 01:02:53.733672 u2DelayCellOfst[3]=14 cells (4 PI)
7869 01:02:53.737669 u2DelayCellOfst[4]=10 cells (3 PI)
7870 01:02:53.739854 u2DelayCellOfst[5]=0 cells (0 PI)
7871 01:02:53.743656 u2DelayCellOfst[6]=18 cells (5 PI)
7872 01:02:53.747156 u2DelayCellOfst[7]=18 cells (5 PI)
7873 01:02:53.750348 Update DQ dly =981 (3 ,6, 21) DQ OEN =(3 ,3)
7874 01:02:53.756939 Update DQM dly =983 (3 ,6, 23) DQM OEN =(3 ,3)
7875 01:02:53.757506 == TX Byte 1 ==
7876 01:02:53.760535 u2DelayCellOfst[8]=3 cells (1 PI)
7877 01:02:53.763271 u2DelayCellOfst[9]=0 cells (0 PI)
7878 01:02:53.766669 u2DelayCellOfst[10]=10 cells (3 PI)
7879 01:02:53.770029 u2DelayCellOfst[11]=7 cells (2 PI)
7880 01:02:53.773391 u2DelayCellOfst[12]=18 cells (5 PI)
7881 01:02:53.776549 u2DelayCellOfst[13]=18 cells (5 PI)
7882 01:02:53.780098 u2DelayCellOfst[14]=21 cells (6 PI)
7883 01:02:53.783233 u2DelayCellOfst[15]=18 cells (5 PI)
7884 01:02:53.786943 Update DQ dly =975 (3 ,6, 15) DQ OEN =(3 ,3)
7885 01:02:53.790090 Update DQM dly =978 (3 ,6, 18) DQM OEN =(3 ,3)
7886 01:02:53.793333 DramC Write-DBI on
7887 01:02:53.793888 ==
7888 01:02:53.796912 Dram Type= 6, Freq= 0, CH_0, rank 1
7889 01:02:53.799431 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7890 01:02:53.799887 ==
7891 01:02:53.800246
7892 01:02:53.800580
7893 01:02:53.803233 TX Vref Scan disable
7894 01:02:53.806551 == TX Byte 0 ==
7895 01:02:53.809774 Update DQM dly =727 (2 ,6, 23) DQM OEN =(3 ,3)
7896 01:02:53.810352 == TX Byte 1 ==
7897 01:02:53.817528 Update DQM dly =720 (2 ,6, 16) DQM OEN =(3 ,3)
7898 01:02:53.818087 DramC Write-DBI off
7899 01:02:53.818453
7900 01:02:53.818788 [DATLAT]
7901 01:02:53.820064 Freq=1600, CH0 RK1
7902 01:02:53.820519
7903 01:02:53.822712 DATLAT Default: 0xe
7904 01:02:53.823270 0, 0xFFFF, sum = 0
7905 01:02:53.825869 1, 0xFFFF, sum = 0
7906 01:02:53.826332 2, 0xFFFF, sum = 0
7907 01:02:53.829464 3, 0xFFFF, sum = 0
7908 01:02:53.830030 4, 0xFFFF, sum = 0
7909 01:02:53.833869 5, 0xFFFF, sum = 0
7910 01:02:53.834434 6, 0xFFFF, sum = 0
7911 01:02:53.835466 7, 0xFFFF, sum = 0
7912 01:02:53.835928 8, 0xFFFF, sum = 0
7913 01:02:53.839684 9, 0xFFFF, sum = 0
7914 01:02:53.840252 10, 0xFFFF, sum = 0
7915 01:02:53.843392 11, 0xFFFF, sum = 0
7916 01:02:53.843955 12, 0xCFFF, sum = 0
7917 01:02:53.845521 13, 0x0, sum = 1
7918 01:02:53.845981 14, 0x0, sum = 2
7919 01:02:53.849107 15, 0x0, sum = 3
7920 01:02:53.849668 16, 0x0, sum = 4
7921 01:02:53.852579 best_step = 14
7922 01:02:53.853193
7923 01:02:53.853562 ==
7924 01:02:53.855878 Dram Type= 6, Freq= 0, CH_0, rank 1
7925 01:02:53.858734 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7926 01:02:53.859227 ==
7927 01:02:53.862844 RX Vref Scan: 0
7928 01:02:53.863426
7929 01:02:53.863919 RX Vref 0 -> 0, step: 1
7930 01:02:53.864375
7931 01:02:53.866190 RX Delay 11 -> 252, step: 4
7932 01:02:53.872073 iDelay=195, Bit 0, Center 124 (71 ~ 178) 108
7933 01:02:53.875121 iDelay=195, Bit 1, Center 130 (79 ~ 182) 104
7934 01:02:53.878994 iDelay=195, Bit 2, Center 128 (75 ~ 182) 108
7935 01:02:53.882109 iDelay=195, Bit 3, Center 124 (71 ~ 178) 108
7936 01:02:53.885784 iDelay=195, Bit 4, Center 132 (75 ~ 190) 116
7937 01:02:53.892437 iDelay=195, Bit 5, Center 120 (67 ~ 174) 108
7938 01:02:53.895319 iDelay=195, Bit 6, Center 138 (83 ~ 194) 112
7939 01:02:53.898361 iDelay=195, Bit 7, Center 138 (83 ~ 194) 112
7940 01:02:53.902078 iDelay=195, Bit 8, Center 110 (55 ~ 166) 112
7941 01:02:53.905389 iDelay=195, Bit 9, Center 106 (51 ~ 162) 112
7942 01:02:53.912508 iDelay=195, Bit 10, Center 122 (67 ~ 178) 112
7943 01:02:53.915072 iDelay=195, Bit 11, Center 112 (59 ~ 166) 108
7944 01:02:53.918687 iDelay=195, Bit 12, Center 126 (71 ~ 182) 112
7945 01:02:53.922506 iDelay=195, Bit 13, Center 128 (75 ~ 182) 108
7946 01:02:53.928829 iDelay=195, Bit 14, Center 132 (79 ~ 186) 108
7947 01:02:53.932535 iDelay=195, Bit 15, Center 132 (79 ~ 186) 108
7948 01:02:53.933141 ==
7949 01:02:53.935244 Dram Type= 6, Freq= 0, CH_0, rank 1
7950 01:02:53.938824 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7951 01:02:53.939385 ==
7952 01:02:53.939751 DQS Delay:
7953 01:02:53.941840 DQS0 = 0, DQS1 = 0
7954 01:02:53.942294 DQM Delay:
7955 01:02:53.945394 DQM0 = 129, DQM1 = 121
7956 01:02:53.945949 DQ Delay:
7957 01:02:53.948187 DQ0 =124, DQ1 =130, DQ2 =128, DQ3 =124
7958 01:02:53.951649 DQ4 =132, DQ5 =120, DQ6 =138, DQ7 =138
7959 01:02:53.954828 DQ8 =110, DQ9 =106, DQ10 =122, DQ11 =112
7960 01:02:53.961276 DQ12 =126, DQ13 =128, DQ14 =132, DQ15 =132
7961 01:02:53.961733
7962 01:02:53.962091
7963 01:02:53.962423
7964 01:02:53.962746 [DramC_TX_OE_Calibration] TA2
7965 01:02:53.965397 Original DQ_B0 (3 6) =30, OEN = 27
7966 01:02:53.968053 Original DQ_B1 (3 6) =30, OEN = 27
7967 01:02:53.971328 24, 0x0, End_B0=24 End_B1=24
7968 01:02:53.974676 25, 0x0, End_B0=25 End_B1=25
7969 01:02:53.977971 26, 0x0, End_B0=26 End_B1=26
7970 01:02:53.978437 27, 0x0, End_B0=27 End_B1=27
7971 01:02:53.981231 28, 0x0, End_B0=28 End_B1=28
7972 01:02:53.985126 29, 0x0, End_B0=29 End_B1=29
7973 01:02:53.987911 30, 0x0, End_B0=30 End_B1=30
7974 01:02:53.991202 31, 0x4141, End_B0=30 End_B1=30
7975 01:02:53.994519 Byte0 end_step=30 best_step=27
7976 01:02:53.994978 Byte1 end_step=30 best_step=27
7977 01:02:53.997380 Byte0 TX OE(2T, 0.5T) = (3, 3)
7978 01:02:54.000902 Byte1 TX OE(2T, 0.5T) = (3, 3)
7979 01:02:54.001498
7980 01:02:54.002086
7981 01:02:54.011724 [DQSOSCAuto] RK1, (LSB)MR18= 0x1f1f, (MSB)MR19= 0x303, tDQSOscB0 = 394 ps tDQSOscB1 = 394 ps
7982 01:02:54.012311 CH0 RK1: MR19=303, MR18=1F1F
7983 01:02:54.017730 CH0_RK1: MR19=0x303, MR18=0x1F1F, DQSOSC=394, MR23=63, INC=23, DEC=15
7984 01:02:54.021238 [RxdqsGatingPostProcess] freq 1600
7985 01:02:54.028184 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 2
7986 01:02:54.030867 Pre-setting of DQS Precalculation
7987 01:02:54.034284 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
7988 01:02:54.034869 ==
7989 01:02:54.037471 Dram Type= 6, Freq= 0, CH_1, rank 0
7990 01:02:54.044887 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
7991 01:02:54.045465 ==
7992 01:02:54.047457 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7993 01:02:54.053938 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
7994 01:02:54.058202 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
7995 01:02:54.063516 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7996 01:02:54.071107 [CA 0] Center 41 (11~71) winsize 61
7997 01:02:54.074067 [CA 1] Center 40 (10~70) winsize 61
7998 01:02:54.077568 [CA 2] Center 36 (6~66) winsize 61
7999 01:02:54.080678 [CA 3] Center 35 (6~65) winsize 60
8000 01:02:54.085281 [CA 4] Center 33 (3~63) winsize 61
8001 01:02:54.087828 [CA 5] Center 33 (4~63) winsize 60
8002 01:02:54.088403
8003 01:02:54.090837 [CmdBusTrainingLP45] Vref(ca) range 0: 32
8004 01:02:54.091313
8005 01:02:54.095014 [CATrainingPosCal] consider 1 rank data
8006 01:02:54.097409 u2DelayCellTimex100 = 271/100 ps
8007 01:02:54.101022 CA0 delay=41 (11~71),Diff = 8 PI (28 cell)
8008 01:02:54.107518 CA1 delay=40 (10~70),Diff = 7 PI (25 cell)
8009 01:02:54.111030 CA2 delay=36 (6~66),Diff = 3 PI (10 cell)
8010 01:02:54.114087 CA3 delay=35 (6~65),Diff = 2 PI (7 cell)
8011 01:02:54.117235 CA4 delay=33 (3~63),Diff = 0 PI (0 cell)
8012 01:02:54.120593 CA5 delay=33 (4~63),Diff = 0 PI (0 cell)
8013 01:02:54.121110
8014 01:02:54.124247 CA PerBit enable=1, Macro0, CA PI delay=33
8015 01:02:54.124761
8016 01:02:54.127453 [CBTSetCACLKResult] CA Dly = 33
8017 01:02:54.131722 CS Dly: 8 (0~39)
8018 01:02:54.134008 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8019 01:02:54.137421 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8020 01:02:54.137895 ==
8021 01:02:54.141147 Dram Type= 6, Freq= 0, CH_1, rank 1
8022 01:02:54.143517 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8023 01:02:54.147621 ==
8024 01:02:54.150428 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
8025 01:02:54.153619 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
8026 01:02:54.160501 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
8027 01:02:54.167371 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
8028 01:02:54.174044 [CA 0] Center 40 (10~70) winsize 61
8029 01:02:54.176525 [CA 1] Center 39 (9~70) winsize 62
8030 01:02:54.179655 [CA 2] Center 35 (6~65) winsize 60
8031 01:02:54.183293 [CA 3] Center 35 (6~65) winsize 60
8032 01:02:54.186802 [CA 4] Center 33 (4~63) winsize 60
8033 01:02:54.189486 [CA 5] Center 33 (4~63) winsize 60
8034 01:02:54.189941
8035 01:02:54.193246 [CmdBusTrainingLP45] Vref(ca) range 0: 32
8036 01:02:54.193699
8037 01:02:54.196900 [CATrainingPosCal] consider 2 rank data
8038 01:02:54.200096 u2DelayCellTimex100 = 271/100 ps
8039 01:02:54.203024 CA0 delay=40 (11~70),Diff = 7 PI (25 cell)
8040 01:02:54.209606 CA1 delay=40 (10~70),Diff = 7 PI (25 cell)
8041 01:02:54.212765 CA2 delay=35 (6~65),Diff = 2 PI (7 cell)
8042 01:02:54.216238 CA3 delay=35 (6~65),Diff = 2 PI (7 cell)
8043 01:02:54.219847 CA4 delay=33 (4~63),Diff = 0 PI (0 cell)
8044 01:02:54.223105 CA5 delay=33 (4~63),Diff = 0 PI (0 cell)
8045 01:02:54.223659
8046 01:02:54.225976 CA PerBit enable=1, Macro0, CA PI delay=33
8047 01:02:54.226487
8048 01:02:54.229465 [CBTSetCACLKResult] CA Dly = 33
8049 01:02:54.233307 CS Dly: 9 (0~41)
8050 01:02:54.236962 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8051 01:02:54.239163 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8052 01:02:54.239623
8053 01:02:54.242329 ----->DramcWriteLeveling(PI) begin...
8054 01:02:54.242786 ==
8055 01:02:54.245822 Dram Type= 6, Freq= 0, CH_1, rank 0
8056 01:02:54.252818 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8057 01:02:54.253394 ==
8058 01:02:54.256123 Write leveling (Byte 0): 22 => 22
8059 01:02:54.256747 Write leveling (Byte 1): 21 => 21
8060 01:02:54.259332 DramcWriteLeveling(PI) end<-----
8061 01:02:54.259881
8062 01:02:54.263028 ==
8063 01:02:54.263510 Dram Type= 6, Freq= 0, CH_1, rank 0
8064 01:02:54.269513 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8065 01:02:54.270098 ==
8066 01:02:54.272230 [Gating] SW mode calibration
8067 01:02:54.278743 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 28 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8068 01:02:54.282344 RX_Path_delay_UI(52) -3 - DQSINCTL_UI(40) = u1StartUI(12)
8069 01:02:54.289177 0 12 0 | B1->B0 | 2424 3434 | 0 1 | (0 0) (1 1)
8070 01:02:54.291867 0 12 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8071 01:02:54.295491 0 12 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8072 01:02:54.302526 0 12 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8073 01:02:54.305756 0 12 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8074 01:02:54.308944 0 12 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8075 01:02:54.315868 0 12 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
8076 01:02:54.319028 0 12 28 | B1->B0 | 3434 2626 | 1 0 | (1 0) (1 0)
8077 01:02:54.322550 0 13 0 | B1->B0 | 3232 2323 | 0 0 | (0 0) (0 0)
8078 01:02:54.328507 0 13 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
8079 01:02:54.331944 0 13 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8080 01:02:54.335347 0 13 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8081 01:02:54.341734 0 13 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8082 01:02:54.344825 0 13 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8083 01:02:54.348476 0 13 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8084 01:02:54.355324 0 13 28 | B1->B0 | 2323 4444 | 0 0 | (0 0) (0 0)
8085 01:02:54.358566 0 14 0 | B1->B0 | 3e3e 4646 | 1 0 | (0 0) (0 0)
8086 01:02:54.361466 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8087 01:02:54.368778 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8088 01:02:54.371504 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8089 01:02:54.375215 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8090 01:02:54.381823 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8091 01:02:54.384609 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
8092 01:02:54.388781 0 14 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
8093 01:02:54.394559 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8094 01:02:54.397830 0 15 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8095 01:02:54.401624 0 15 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8096 01:02:54.407881 0 15 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8097 01:02:54.411049 0 15 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8098 01:02:54.414637 0 15 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8099 01:02:54.421625 0 15 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8100 01:02:54.424400 0 15 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8101 01:02:54.427947 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8102 01:02:54.434384 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8103 01:02:54.437231 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8104 01:02:54.441391 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8105 01:02:54.447702 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8106 01:02:54.451509 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8107 01:02:54.455203 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8108 01:02:54.460437 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8109 01:02:54.463719 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
8110 01:02:54.467974 Total UI for P1: 0, mck2ui 16
8111 01:02:54.471517 best dqsien dly found for B0: ( 1, 0, 28)
8112 01:02:54.473880 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
8113 01:02:54.477341 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8114 01:02:54.480196 Total UI for P1: 0, mck2ui 16
8115 01:02:54.483994 best dqsien dly found for B1: ( 1, 1, 0)
8116 01:02:54.490555 best DQS0 dly(MCK, UI, PI) = (1, 0, 28)
8117 01:02:54.493920 best DQS1 dly(MCK, UI, PI) = (1, 1, 0)
8118 01:02:54.494488
8119 01:02:54.497617 best DQS0 P1 dly(MCK, UI, PI) = (1, 4, 28)
8120 01:02:54.501181 best DQS1 P1 dly(MCK, UI, PI) = (1, 5, 0)
8121 01:02:54.503415 [Gating] SW calibration Done
8122 01:02:54.503874 ==
8123 01:02:54.507098 Dram Type= 6, Freq= 0, CH_1, rank 0
8124 01:02:54.510313 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8125 01:02:54.510878 ==
8126 01:02:54.513438 RX Vref Scan: 0
8127 01:02:54.513998
8128 01:02:54.514363 RX Vref 0 -> 0, step: 1
8129 01:02:54.514705
8130 01:02:54.517717 RX Delay 0 -> 252, step: 8
8131 01:02:54.520349 iDelay=200, Bit 0, Center 135 (80 ~ 191) 112
8132 01:02:54.523714 iDelay=200, Bit 1, Center 127 (72 ~ 183) 112
8133 01:02:54.530445 iDelay=200, Bit 2, Center 119 (64 ~ 175) 112
8134 01:02:54.533978 iDelay=200, Bit 3, Center 127 (72 ~ 183) 112
8135 01:02:54.536432 iDelay=200, Bit 4, Center 127 (72 ~ 183) 112
8136 01:02:54.541257 iDelay=200, Bit 5, Center 139 (80 ~ 199) 120
8137 01:02:54.542888 iDelay=200, Bit 6, Center 135 (80 ~ 191) 112
8138 01:02:54.550213 iDelay=200, Bit 7, Center 127 (72 ~ 183) 112
8139 01:02:54.553289 iDelay=200, Bit 8, Center 107 (48 ~ 167) 120
8140 01:02:54.557258 iDelay=200, Bit 9, Center 115 (56 ~ 175) 120
8141 01:02:54.559279 iDelay=200, Bit 10, Center 127 (72 ~ 183) 112
8142 01:02:54.566007 iDelay=200, Bit 11, Center 119 (64 ~ 175) 112
8143 01:02:54.569520 iDelay=200, Bit 12, Center 135 (80 ~ 191) 112
8144 01:02:54.573442 iDelay=200, Bit 13, Center 139 (80 ~ 199) 120
8145 01:02:54.576573 iDelay=200, Bit 14, Center 135 (80 ~ 191) 112
8146 01:02:54.579685 iDelay=200, Bit 15, Center 135 (80 ~ 191) 112
8147 01:02:54.583100 ==
8148 01:02:54.586125 Dram Type= 6, Freq= 0, CH_1, rank 0
8149 01:02:54.589031 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8150 01:02:54.589494 ==
8151 01:02:54.589860 DQS Delay:
8152 01:02:54.592538 DQS0 = 0, DQS1 = 0
8153 01:02:54.593049 DQM Delay:
8154 01:02:54.596063 DQM0 = 129, DQM1 = 126
8155 01:02:54.596614 DQ Delay:
8156 01:02:54.598994 DQ0 =135, DQ1 =127, DQ2 =119, DQ3 =127
8157 01:02:54.603101 DQ4 =127, DQ5 =139, DQ6 =135, DQ7 =127
8158 01:02:54.606118 DQ8 =107, DQ9 =115, DQ10 =127, DQ11 =119
8159 01:02:54.609632 DQ12 =135, DQ13 =139, DQ14 =135, DQ15 =135
8160 01:02:54.610187
8161 01:02:54.610552
8162 01:02:54.610889 ==
8163 01:02:54.612671 Dram Type= 6, Freq= 0, CH_1, rank 0
8164 01:02:54.619199 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8165 01:02:54.619759 ==
8166 01:02:54.620132
8167 01:02:54.620473
8168 01:02:54.620864 TX Vref Scan disable
8169 01:02:54.623324 == TX Byte 0 ==
8170 01:02:54.626373 Update DQ dly =976 (3 ,6, 16) DQ OEN =(3 ,3)
8171 01:02:54.632561 Update DQM dly =976 (3 ,6, 16) DQM OEN =(3 ,3)
8172 01:02:54.633193 == TX Byte 1 ==
8173 01:02:54.636239 Update DQ dly =975 (3 ,6, 15) DQ OEN =(3 ,3)
8174 01:02:54.642445 Update DQM dly =975 (3 ,6, 15) DQM OEN =(3 ,3)
8175 01:02:54.643032 ==
8176 01:02:54.646837 Dram Type= 6, Freq= 0, CH_1, rank 0
8177 01:02:54.649389 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8178 01:02:54.649970 ==
8179 01:02:54.662175
8180 01:02:54.667028 TX Vref early break, caculate TX vref
8181 01:02:54.668999 TX Vref=16, minBit 0, minWin=21, winSum=368
8182 01:02:54.672025 TX Vref=18, minBit 1, minWin=22, winSum=378
8183 01:02:54.675481 TX Vref=20, minBit 0, minWin=22, winSum=387
8184 01:02:54.679112 TX Vref=22, minBit 3, minWin=23, winSum=394
8185 01:02:54.681944 TX Vref=24, minBit 0, minWin=24, winSum=402
8186 01:02:54.689462 TX Vref=26, minBit 3, minWin=24, winSum=414
8187 01:02:54.692210 TX Vref=28, minBit 3, minWin=24, winSum=411
8188 01:02:54.696530 TX Vref=30, minBit 3, minWin=23, winSum=407
8189 01:02:54.698820 TX Vref=32, minBit 0, minWin=24, winSum=398
8190 01:02:54.701969 TX Vref=34, minBit 3, minWin=23, winSum=395
8191 01:02:54.704845 TX Vref=36, minBit 0, minWin=23, winSum=379
8192 01:02:54.712686 [TxChooseVref] Worse bit 3, Min win 24, Win sum 414, Final Vref 26
8193 01:02:54.713318
8194 01:02:54.715257 Final TX Range 0 Vref 26
8195 01:02:54.715999
8196 01:02:54.716384 ==
8197 01:02:54.718851 Dram Type= 6, Freq= 0, CH_1, rank 0
8198 01:02:54.722135 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8199 01:02:54.722693 ==
8200 01:02:54.723065
8201 01:02:54.723404
8202 01:02:54.725866 TX Vref Scan disable
8203 01:02:54.732146 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =271/100 ps
8204 01:02:54.732745 == TX Byte 0 ==
8205 01:02:54.735854 u2DelayCellOfst[0]=14 cells (4 PI)
8206 01:02:54.738829 u2DelayCellOfst[1]=10 cells (3 PI)
8207 01:02:54.741429 u2DelayCellOfst[2]=0 cells (0 PI)
8208 01:02:54.745018 u2DelayCellOfst[3]=3 cells (1 PI)
8209 01:02:54.748331 u2DelayCellOfst[4]=7 cells (2 PI)
8210 01:02:54.752558 u2DelayCellOfst[5]=14 cells (4 PI)
8211 01:02:54.755240 u2DelayCellOfst[6]=14 cells (4 PI)
8212 01:02:54.758826 u2DelayCellOfst[7]=3 cells (1 PI)
8213 01:02:54.762485 Update DQ dly =974 (3 ,6, 14) DQ OEN =(3 ,3)
8214 01:02:54.765803 Update DQM dly =976 (3 ,6, 16) DQM OEN =(3 ,3)
8215 01:02:54.768474 == TX Byte 1 ==
8216 01:02:54.771498 u2DelayCellOfst[8]=0 cells (0 PI)
8217 01:02:54.772053 u2DelayCellOfst[9]=3 cells (1 PI)
8218 01:02:54.774510 u2DelayCellOfst[10]=7 cells (2 PI)
8219 01:02:54.778759 u2DelayCellOfst[11]=3 cells (1 PI)
8220 01:02:54.781494 u2DelayCellOfst[12]=14 cells (4 PI)
8221 01:02:54.785584 u2DelayCellOfst[13]=18 cells (5 PI)
8222 01:02:54.788857 u2DelayCellOfst[14]=18 cells (5 PI)
8223 01:02:54.791288 u2DelayCellOfst[15]=14 cells (4 PI)
8224 01:02:54.794834 Update DQ dly =973 (3 ,6, 13) DQ OEN =(3 ,3)
8225 01:02:54.801332 Update DQM dly =975 (3 ,6, 15) DQM OEN =(3 ,3)
8226 01:02:54.801797 DramC Write-DBI on
8227 01:02:54.802163 ==
8228 01:02:54.804632 Dram Type= 6, Freq= 0, CH_1, rank 0
8229 01:02:54.811582 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8230 01:02:54.812040 ==
8231 01:02:54.812408
8232 01:02:54.812799
8233 01:02:54.813260 TX Vref Scan disable
8234 01:02:54.815556 == TX Byte 0 ==
8235 01:02:54.818509 Update DQM dly =718 (2 ,6, 14) DQM OEN =(3 ,3)
8236 01:02:54.821369 == TX Byte 1 ==
8237 01:02:54.824828 Update DQM dly =716 (2 ,6, 12) DQM OEN =(3 ,3)
8238 01:02:54.828221 DramC Write-DBI off
8239 01:02:54.828697
8240 01:02:54.829217 [DATLAT]
8241 01:02:54.829674 Freq=1600, CH1 RK0
8242 01:02:54.830204
8243 01:02:54.831669 DATLAT Default: 0xf
8244 01:02:54.832144 0, 0xFFFF, sum = 0
8245 01:02:54.835162 1, 0xFFFF, sum = 0
8246 01:02:54.837803 2, 0xFFFF, sum = 0
8247 01:02:54.838288 3, 0xFFFF, sum = 0
8248 01:02:54.841547 4, 0xFFFF, sum = 0
8249 01:02:54.842028 5, 0xFFFF, sum = 0
8250 01:02:54.844868 6, 0xFFFF, sum = 0
8251 01:02:54.845349 7, 0xFFFF, sum = 0
8252 01:02:54.848540 8, 0xFFFF, sum = 0
8253 01:02:54.849070 9, 0xFFFF, sum = 0
8254 01:02:54.851402 10, 0xFFFF, sum = 0
8255 01:02:54.851888 11, 0xFFFF, sum = 0
8256 01:02:54.855199 12, 0xFFF, sum = 0
8257 01:02:54.855680 13, 0x0, sum = 1
8258 01:02:54.858213 14, 0x0, sum = 2
8259 01:02:54.858697 15, 0x0, sum = 3
8260 01:02:54.861202 16, 0x0, sum = 4
8261 01:02:54.861670 best_step = 14
8262 01:02:54.862032
8263 01:02:54.862377 ==
8264 01:02:54.864688 Dram Type= 6, Freq= 0, CH_1, rank 0
8265 01:02:54.869325 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8266 01:02:54.871318 ==
8267 01:02:54.871779 RX Vref Scan: 1
8268 01:02:54.872170
8269 01:02:54.875780 Set Vref Range= 24 -> 127
8270 01:02:54.876236
8271 01:02:54.876602 RX Vref 24 -> 127, step: 1
8272 01:02:54.878715
8273 01:02:54.879173 RX Delay 3 -> 252, step: 4
8274 01:02:54.879540
8275 01:02:54.881343 Set Vref, RX VrefLevel [Byte0]: 24
8276 01:02:54.884621 [Byte1]: 24
8277 01:02:54.888325
8278 01:02:54.888835 Set Vref, RX VrefLevel [Byte0]: 25
8279 01:02:54.891366 [Byte1]: 25
8280 01:02:54.895743
8281 01:02:54.896205 Set Vref, RX VrefLevel [Byte0]: 26
8282 01:02:54.899287 [Byte1]: 26
8283 01:02:54.903539
8284 01:02:54.904012 Set Vref, RX VrefLevel [Byte0]: 27
8285 01:02:54.906990 [Byte1]: 27
8286 01:02:54.911496
8287 01:02:54.911973 Set Vref, RX VrefLevel [Byte0]: 28
8288 01:02:54.914767 [Byte1]: 28
8289 01:02:54.919178
8290 01:02:54.919652 Set Vref, RX VrefLevel [Byte0]: 29
8291 01:02:54.922040 [Byte1]: 29
8292 01:02:54.926299
8293 01:02:54.926903 Set Vref, RX VrefLevel [Byte0]: 30
8294 01:02:54.929559 [Byte1]: 30
8295 01:02:54.933802
8296 01:02:54.934316 Set Vref, RX VrefLevel [Byte0]: 31
8297 01:02:54.937342 [Byte1]: 31
8298 01:02:54.941958
8299 01:02:54.942471 Set Vref, RX VrefLevel [Byte0]: 32
8300 01:02:54.944529 [Byte1]: 32
8301 01:02:54.949331
8302 01:02:54.949553 Set Vref, RX VrefLevel [Byte0]: 33
8303 01:02:54.952904 [Byte1]: 33
8304 01:02:54.957169
8305 01:02:54.957435 Set Vref, RX VrefLevel [Byte0]: 34
8306 01:02:54.960012 [Byte1]: 34
8307 01:02:54.965053
8308 01:02:54.965321 Set Vref, RX VrefLevel [Byte0]: 35
8309 01:02:54.968195 [Byte1]: 35
8310 01:02:54.972435
8311 01:02:54.972701 Set Vref, RX VrefLevel [Byte0]: 36
8312 01:02:54.975801 [Byte1]: 36
8313 01:02:54.980415
8314 01:02:54.980683 Set Vref, RX VrefLevel [Byte0]: 37
8315 01:02:54.983128 [Byte1]: 37
8316 01:02:54.987595
8317 01:02:54.987863 Set Vref, RX VrefLevel [Byte0]: 38
8318 01:02:54.990993 [Byte1]: 38
8319 01:02:54.995080
8320 01:02:54.995306 Set Vref, RX VrefLevel [Byte0]: 39
8321 01:02:54.998379 [Byte1]: 39
8322 01:02:55.003048
8323 01:02:55.003398 Set Vref, RX VrefLevel [Byte0]: 40
8324 01:02:55.006675 [Byte1]: 40
8325 01:02:55.011210
8326 01:02:55.011635 Set Vref, RX VrefLevel [Byte0]: 41
8327 01:02:55.013976 [Byte1]: 41
8328 01:02:55.018557
8329 01:02:55.019135 Set Vref, RX VrefLevel [Byte0]: 42
8330 01:02:55.022302 [Byte1]: 42
8331 01:02:55.027137
8332 01:02:55.027830 Set Vref, RX VrefLevel [Byte0]: 43
8333 01:02:55.030096 [Byte1]: 43
8334 01:02:55.033361
8335 01:02:55.033817 Set Vref, RX VrefLevel [Byte0]: 44
8336 01:02:55.037161 [Byte1]: 44
8337 01:02:55.042016
8338 01:02:55.042574 Set Vref, RX VrefLevel [Byte0]: 45
8339 01:02:55.044634 [Byte1]: 45
8340 01:02:55.049266
8341 01:02:55.049827 Set Vref, RX VrefLevel [Byte0]: 46
8342 01:02:55.052946 [Byte1]: 46
8343 01:02:55.057028
8344 01:02:55.057600 Set Vref, RX VrefLevel [Byte0]: 47
8345 01:02:55.059894 [Byte1]: 47
8346 01:02:55.064668
8347 01:02:55.065279 Set Vref, RX VrefLevel [Byte0]: 48
8348 01:02:55.067696 [Byte1]: 48
8349 01:02:55.072396
8350 01:02:55.073034 Set Vref, RX VrefLevel [Byte0]: 49
8351 01:02:55.075959 [Byte1]: 49
8352 01:02:55.079919
8353 01:02:55.080480 Set Vref, RX VrefLevel [Byte0]: 50
8354 01:02:55.083491 [Byte1]: 50
8355 01:02:55.087311
8356 01:02:55.087863 Set Vref, RX VrefLevel [Byte0]: 51
8357 01:02:55.091256 [Byte1]: 51
8358 01:02:55.095346
8359 01:02:55.095917 Set Vref, RX VrefLevel [Byte0]: 52
8360 01:02:55.098388 [Byte1]: 52
8361 01:02:55.102560
8362 01:02:55.103303 Set Vref, RX VrefLevel [Byte0]: 53
8363 01:02:55.105489 [Byte1]: 53
8364 01:02:55.110481
8365 01:02:55.110959 Set Vref, RX VrefLevel [Byte0]: 54
8366 01:02:55.113467 [Byte1]: 54
8367 01:02:55.118125
8368 01:02:55.118701 Set Vref, RX VrefLevel [Byte0]: 55
8369 01:02:55.121127 [Byte1]: 55
8370 01:02:55.125424
8371 01:02:55.125900 Set Vref, RX VrefLevel [Byte0]: 56
8372 01:02:55.128951 [Byte1]: 56
8373 01:02:55.133024
8374 01:02:55.133499 Set Vref, RX VrefLevel [Byte0]: 57
8375 01:02:55.136939 [Byte1]: 57
8376 01:02:55.140944
8377 01:02:55.141422 Set Vref, RX VrefLevel [Byte0]: 58
8378 01:02:55.144129 [Byte1]: 58
8379 01:02:55.148909
8380 01:02:55.149486 Set Vref, RX VrefLevel [Byte0]: 59
8381 01:02:55.152379 [Byte1]: 59
8382 01:02:55.155877
8383 01:02:55.156355 Set Vref, RX VrefLevel [Byte0]: 60
8384 01:02:55.159100 [Byte1]: 60
8385 01:02:55.163812
8386 01:02:55.164420 Set Vref, RX VrefLevel [Byte0]: 61
8387 01:02:55.166984 [Byte1]: 61
8388 01:02:55.171644
8389 01:02:55.172218 Set Vref, RX VrefLevel [Byte0]: 62
8390 01:02:55.175604 [Byte1]: 62
8391 01:02:55.179491
8392 01:02:55.179962 Set Vref, RX VrefLevel [Byte0]: 63
8393 01:02:55.181997 [Byte1]: 63
8394 01:02:55.187564
8395 01:02:55.188140 Set Vref, RX VrefLevel [Byte0]: 64
8396 01:02:55.190042 [Byte1]: 64
8397 01:02:55.194597
8398 01:02:55.195072 Set Vref, RX VrefLevel [Byte0]: 65
8399 01:02:55.197490 [Byte1]: 65
8400 01:02:55.202500
8401 01:02:55.203080 Set Vref, RX VrefLevel [Byte0]: 66
8402 01:02:55.205317 [Byte1]: 66
8403 01:02:55.210050
8404 01:02:55.213129 Set Vref, RX VrefLevel [Byte0]: 67
8405 01:02:55.216240 [Byte1]: 67
8406 01:02:55.216868
8407 01:02:55.219827 Set Vref, RX VrefLevel [Byte0]: 68
8408 01:02:55.223836 [Byte1]: 68
8409 01:02:55.224418
8410 01:02:55.226036 Set Vref, RX VrefLevel [Byte0]: 69
8411 01:02:55.229272 [Byte1]: 69
8412 01:02:55.232581
8413 01:02:55.233230 Set Vref, RX VrefLevel [Byte0]: 70
8414 01:02:55.236760 [Byte1]: 70
8415 01:02:55.240242
8416 01:02:55.240755 Set Vref, RX VrefLevel [Byte0]: 71
8417 01:02:55.243882 [Byte1]: 71
8418 01:02:55.248328
8419 01:02:55.248848 Set Vref, RX VrefLevel [Byte0]: 72
8420 01:02:55.251081 [Byte1]: 72
8421 01:02:55.255581
8422 01:02:55.256158 Set Vref, RX VrefLevel [Byte0]: 73
8423 01:02:55.259137 [Byte1]: 73
8424 01:02:55.263372
8425 01:02:55.263849 Set Vref, RX VrefLevel [Byte0]: 74
8426 01:02:55.266358 [Byte1]: 74
8427 01:02:55.270982
8428 01:02:55.271556 Final RX Vref Byte 0 = 61 to rank0
8429 01:02:55.273987 Final RX Vref Byte 1 = 54 to rank0
8430 01:02:55.277663 Final RX Vref Byte 0 = 61 to rank1
8431 01:02:55.281504 Final RX Vref Byte 1 = 54 to rank1==
8432 01:02:55.283965 Dram Type= 6, Freq= 0, CH_1, rank 0
8433 01:02:55.290599 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8434 01:02:55.291139 ==
8435 01:02:55.291515 DQS Delay:
8436 01:02:55.293847 DQS0 = 0, DQS1 = 0
8437 01:02:55.294297 DQM Delay:
8438 01:02:55.294656 DQM0 = 128, DQM1 = 124
8439 01:02:55.297371 DQ Delay:
8440 01:02:55.300930 DQ0 =134, DQ1 =122, DQ2 =118, DQ3 =126
8441 01:02:55.304409 DQ4 =130, DQ5 =138, DQ6 =136, DQ7 =126
8442 01:02:55.307138 DQ8 =106, DQ9 =114, DQ10 =126, DQ11 =114
8443 01:02:55.311039 DQ12 =132, DQ13 =134, DQ14 =134, DQ15 =134
8444 01:02:55.311623
8445 01:02:55.311986
8446 01:02:55.312319
8447 01:02:55.313909 [DramC_TX_OE_Calibration] TA2
8448 01:02:55.317906 Original DQ_B0 (3 6) =30, OEN = 27
8449 01:02:55.320459 Original DQ_B1 (3 6) =30, OEN = 27
8450 01:02:55.323649 24, 0x0, End_B0=24 End_B1=24
8451 01:02:55.324133 25, 0x0, End_B0=25 End_B1=25
8452 01:02:55.326885 26, 0x0, End_B0=26 End_B1=26
8453 01:02:55.330820 27, 0x0, End_B0=27 End_B1=27
8454 01:02:55.333705 28, 0x0, End_B0=28 End_B1=28
8455 01:02:55.337176 29, 0x0, End_B0=29 End_B1=29
8456 01:02:55.337772 30, 0x0, End_B0=30 End_B1=30
8457 01:02:55.340655 31, 0x4141, End_B0=30 End_B1=30
8458 01:02:55.344008 Byte0 end_step=30 best_step=27
8459 01:02:55.347123 Byte1 end_step=30 best_step=27
8460 01:02:55.351095 Byte0 TX OE(2T, 0.5T) = (3, 3)
8461 01:02:55.354045 Byte1 TX OE(2T, 0.5T) = (3, 3)
8462 01:02:55.354633
8463 01:02:55.355117
8464 01:02:55.360891 [DQSOSCAuto] RK0, (LSB)MR18= 0x2929, (MSB)MR19= 0x303, tDQSOscB0 = 389 ps tDQSOscB1 = 389 ps
8465 01:02:55.363443 CH1 RK0: MR19=303, MR18=2929
8466 01:02:55.370442 CH1_RK0: MR19=0x303, MR18=0x2929, DQSOSC=389, MR23=63, INC=24, DEC=16
8467 01:02:55.371025
8468 01:02:55.373513 ----->DramcWriteLeveling(PI) begin...
8469 01:02:55.374105 ==
8470 01:02:55.377013 Dram Type= 6, Freq= 0, CH_1, rank 1
8471 01:02:55.380372 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8472 01:02:55.380989 ==
8473 01:02:55.384556 Write leveling (Byte 0): 22 => 22
8474 01:02:55.387361 Write leveling (Byte 1): 21 => 21
8475 01:02:55.390175 DramcWriteLeveling(PI) end<-----
8476 01:02:55.390751
8477 01:02:55.391240 ==
8478 01:02:55.393486 Dram Type= 6, Freq= 0, CH_1, rank 1
8479 01:02:55.396347 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8480 01:02:55.396872 ==
8481 01:02:55.400237 [Gating] SW mode calibration
8482 01:02:55.407127 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 28 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8483 01:02:55.413833 RX_Path_delay_UI(52) -3 - DQSINCTL_UI(40) = u1StartUI(12)
8484 01:02:55.416967 0 12 0 | B1->B0 | 3232 3434 | 0 1 | (0 0) (1 1)
8485 01:02:55.423290 0 12 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8486 01:02:55.426618 0 12 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8487 01:02:55.429527 0 12 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8488 01:02:55.436283 0 12 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8489 01:02:55.439876 0 12 20 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 0)
8490 01:02:55.443271 0 12 24 | B1->B0 | 3434 2a2a | 1 1 | (1 1) (1 0)
8491 01:02:55.449621 0 12 28 | B1->B0 | 3434 2323 | 1 0 | (1 0) (0 0)
8492 01:02:55.453757 0 13 0 | B1->B0 | 2424 2323 | 0 0 | (1 0) (0 0)
8493 01:02:55.456356 0 13 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
8494 01:02:55.462889 0 13 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8495 01:02:55.466163 0 13 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8496 01:02:55.469320 0 13 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8497 01:02:55.476443 0 13 20 | B1->B0 | 2323 2525 | 0 0 | (0 0) (0 0)
8498 01:02:55.479216 0 13 24 | B1->B0 | 2323 3d3d | 0 0 | (0 0) (0 0)
8499 01:02:55.483211 0 13 28 | B1->B0 | 2323 4646 | 0 0 | (0 0) (0 0)
8500 01:02:55.489912 0 14 0 | B1->B0 | 3f3f 4646 | 0 0 | (0 0) (0 0)
8501 01:02:55.493446 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8502 01:02:55.495798 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8503 01:02:55.502183 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8504 01:02:55.505753 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8505 01:02:55.509122 0 14 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8506 01:02:55.515528 0 14 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
8507 01:02:55.519412 0 14 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
8508 01:02:55.522995 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8509 01:02:55.526126 0 15 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8510 01:02:55.532117 0 15 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8511 01:02:55.535220 0 15 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8512 01:02:55.542713 0 15 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8513 01:02:55.545542 0 15 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8514 01:02:55.549197 0 15 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8515 01:02:55.552106 0 15 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8516 01:02:55.558818 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8517 01:02:55.561988 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8518 01:02:55.568249 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8519 01:02:55.571736 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8520 01:02:55.575176 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8521 01:02:55.582175 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8522 01:02:55.584837 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
8523 01:02:55.588901 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
8524 01:02:55.591679 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8525 01:02:55.595459 Total UI for P1: 0, mck2ui 16
8526 01:02:55.598533 best dqsien dly found for B0: ( 1, 0, 26)
8527 01:02:55.601487 Total UI for P1: 0, mck2ui 16
8528 01:02:55.604812 best dqsien dly found for B1: ( 1, 0, 30)
8529 01:02:55.608059 best DQS0 dly(MCK, UI, PI) = (1, 0, 26)
8530 01:02:55.615114 best DQS1 dly(MCK, UI, PI) = (1, 0, 30)
8531 01:02:55.615672
8532 01:02:55.618442 best DQS0 P1 dly(MCK, UI, PI) = (1, 4, 26)
8533 01:02:55.621277 best DQS1 P1 dly(MCK, UI, PI) = (1, 4, 30)
8534 01:02:55.624636 [Gating] SW calibration Done
8535 01:02:55.625146 ==
8536 01:02:55.628083 Dram Type= 6, Freq= 0, CH_1, rank 1
8537 01:02:55.631356 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8538 01:02:55.631910 ==
8539 01:02:55.634749 RX Vref Scan: 0
8540 01:02:55.635304
8541 01:02:55.635672 RX Vref 0 -> 0, step: 1
8542 01:02:55.636013
8543 01:02:55.639099 RX Delay 0 -> 252, step: 8
8544 01:02:55.641421 iDelay=200, Bit 0, Center 135 (80 ~ 191) 112
8545 01:02:55.644832 iDelay=200, Bit 1, Center 123 (64 ~ 183) 120
8546 01:02:55.651271 iDelay=200, Bit 2, Center 119 (64 ~ 175) 112
8547 01:02:55.655405 iDelay=200, Bit 3, Center 127 (72 ~ 183) 112
8548 01:02:55.658146 iDelay=200, Bit 4, Center 131 (72 ~ 191) 120
8549 01:02:55.661423 iDelay=200, Bit 5, Center 143 (88 ~ 199) 112
8550 01:02:55.664782 iDelay=200, Bit 6, Center 139 (80 ~ 199) 120
8551 01:02:55.671223 iDelay=200, Bit 7, Center 131 (72 ~ 191) 120
8552 01:02:55.674641 iDelay=200, Bit 8, Center 107 (48 ~ 167) 120
8553 01:02:55.677556 iDelay=200, Bit 9, Center 115 (56 ~ 175) 120
8554 01:02:55.681491 iDelay=200, Bit 10, Center 127 (64 ~ 191) 128
8555 01:02:55.684540 iDelay=200, Bit 11, Center 115 (56 ~ 175) 120
8556 01:02:55.690906 iDelay=200, Bit 12, Center 135 (72 ~ 199) 128
8557 01:02:55.694263 iDelay=200, Bit 13, Center 139 (80 ~ 199) 120
8558 01:02:55.697882 iDelay=200, Bit 14, Center 131 (72 ~ 191) 120
8559 01:02:55.701185 iDelay=200, Bit 15, Center 135 (80 ~ 191) 112
8560 01:02:55.701740 ==
8561 01:02:55.704428 Dram Type= 6, Freq= 0, CH_1, rank 1
8562 01:02:55.711637 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8563 01:02:55.712194 ==
8564 01:02:55.712557 DQS Delay:
8565 01:02:55.713881 DQS0 = 0, DQS1 = 0
8566 01:02:55.714328 DQM Delay:
8567 01:02:55.717919 DQM0 = 131, DQM1 = 125
8568 01:02:55.718366 DQ Delay:
8569 01:02:55.720312 DQ0 =135, DQ1 =123, DQ2 =119, DQ3 =127
8570 01:02:55.723831 DQ4 =131, DQ5 =143, DQ6 =139, DQ7 =131
8571 01:02:55.727290 DQ8 =107, DQ9 =115, DQ10 =127, DQ11 =115
8572 01:02:55.730877 DQ12 =135, DQ13 =139, DQ14 =131, DQ15 =135
8573 01:02:55.731490
8574 01:02:55.731855
8575 01:02:55.732184 ==
8576 01:02:55.733754 Dram Type= 6, Freq= 0, CH_1, rank 1
8577 01:02:55.740512 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8578 01:02:55.741033 ==
8579 01:02:55.741432
8580 01:02:55.741767
8581 01:02:55.742086 TX Vref Scan disable
8582 01:02:55.743966 == TX Byte 0 ==
8583 01:02:55.747135 Update DQ dly =976 (3 ,6, 16) DQ OEN =(3 ,3)
8584 01:02:55.753885 Update DQM dly =976 (3 ,6, 16) DQM OEN =(3 ,3)
8585 01:02:55.754471 == TX Byte 1 ==
8586 01:02:55.756874 Update DQ dly =975 (3 ,6, 15) DQ OEN =(3 ,3)
8587 01:02:55.763752 Update DQM dly =975 (3 ,6, 15) DQM OEN =(3 ,3)
8588 01:02:55.764312 ==
8589 01:02:55.767341 Dram Type= 6, Freq= 0, CH_1, rank 1
8590 01:02:55.770436 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8591 01:02:55.771014 ==
8592 01:02:55.782907
8593 01:02:55.785698 TX Vref early break, caculate TX vref
8594 01:02:55.788585 TX Vref=16, minBit 4, minWin=22, winSum=380
8595 01:02:55.792377 TX Vref=18, minBit 1, minWin=22, winSum=387
8596 01:02:55.796921 TX Vref=20, minBit 3, minWin=23, winSum=395
8597 01:02:55.799257 TX Vref=22, minBit 0, minWin=23, winSum=397
8598 01:02:55.802580 TX Vref=24, minBit 3, minWin=24, winSum=413
8599 01:02:55.809255 TX Vref=26, minBit 0, minWin=25, winSum=420
8600 01:02:55.812477 TX Vref=28, minBit 0, minWin=25, winSum=418
8601 01:02:55.815751 TX Vref=30, minBit 0, minWin=25, winSum=420
8602 01:02:55.819263 TX Vref=32, minBit 0, minWin=24, winSum=410
8603 01:02:55.821784 TX Vref=34, minBit 0, minWin=23, winSum=398
8604 01:02:55.829286 [TxChooseVref] Worse bit 0, Min win 25, Win sum 420, Final Vref 26
8605 01:02:55.829910
8606 01:02:55.832139 Final TX Range 0 Vref 26
8607 01:02:55.832753
8608 01:02:55.833252 ==
8609 01:02:55.835665 Dram Type= 6, Freq= 0, CH_1, rank 1
8610 01:02:55.838377 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8611 01:02:55.838960 ==
8612 01:02:55.839457
8613 01:02:55.839917
8614 01:02:55.842354 TX Vref Scan disable
8615 01:02:55.848875 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =271/100 ps
8616 01:02:55.849444 == TX Byte 0 ==
8617 01:02:55.851828 u2DelayCellOfst[0]=14 cells (4 PI)
8618 01:02:55.856374 u2DelayCellOfst[1]=7 cells (2 PI)
8619 01:02:55.858753 u2DelayCellOfst[2]=0 cells (0 PI)
8620 01:02:55.861469 u2DelayCellOfst[3]=3 cells (1 PI)
8621 01:02:55.865208 u2DelayCellOfst[4]=7 cells (2 PI)
8622 01:02:55.868387 u2DelayCellOfst[5]=10 cells (3 PI)
8623 01:02:55.871670 u2DelayCellOfst[6]=14 cells (4 PI)
8624 01:02:55.875833 u2DelayCellOfst[7]=3 cells (1 PI)
8625 01:02:55.878797 Update DQ dly =975 (3 ,6, 15) DQ OEN =(3 ,3)
8626 01:02:55.881903 Update DQM dly =977 (3 ,6, 17) DQM OEN =(3 ,3)
8627 01:02:55.885144 == TX Byte 1 ==
8628 01:02:55.885705 u2DelayCellOfst[8]=0 cells (0 PI)
8629 01:02:55.888414 u2DelayCellOfst[9]=3 cells (1 PI)
8630 01:02:55.891599 u2DelayCellOfst[10]=10 cells (3 PI)
8631 01:02:55.894864 u2DelayCellOfst[11]=3 cells (1 PI)
8632 01:02:55.898880 u2DelayCellOfst[12]=14 cells (4 PI)
8633 01:02:55.901538 u2DelayCellOfst[13]=18 cells (5 PI)
8634 01:02:55.904553 u2DelayCellOfst[14]=18 cells (5 PI)
8635 01:02:55.907997 u2DelayCellOfst[15]=18 cells (5 PI)
8636 01:02:55.911490 Update DQ dly =973 (3 ,6, 13) DQ OEN =(3 ,3)
8637 01:02:55.917820 Update DQM dly =975 (3 ,6, 15) DQM OEN =(3 ,3)
8638 01:02:55.918409 DramC Write-DBI on
8639 01:02:55.918779 ==
8640 01:02:55.921712 Dram Type= 6, Freq= 0, CH_1, rank 1
8641 01:02:55.927910 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8642 01:02:55.928477 ==
8643 01:02:55.928891
8644 01:02:55.929235
8645 01:02:55.929561 TX Vref Scan disable
8646 01:02:55.931541 == TX Byte 0 ==
8647 01:02:55.935462 Update DQM dly =718 (2 ,6, 14) DQM OEN =(3 ,3)
8648 01:02:55.938111 == TX Byte 1 ==
8649 01:02:55.941698 Update DQM dly =717 (2 ,6, 13) DQM OEN =(3 ,3)
8650 01:02:55.942262 DramC Write-DBI off
8651 01:02:55.944824
8652 01:02:55.945283 [DATLAT]
8653 01:02:55.945653 Freq=1600, CH1 RK1
8654 01:02:55.945997
8655 01:02:55.948346 DATLAT Default: 0xe
8656 01:02:55.948837 0, 0xFFFF, sum = 0
8657 01:02:55.951553 1, 0xFFFF, sum = 0
8658 01:02:55.952117 2, 0xFFFF, sum = 0
8659 01:02:55.954854 3, 0xFFFF, sum = 0
8660 01:02:55.957847 4, 0xFFFF, sum = 0
8661 01:02:55.958316 5, 0xFFFF, sum = 0
8662 01:02:55.960937 6, 0xFFFF, sum = 0
8663 01:02:55.961403 7, 0xFFFF, sum = 0
8664 01:02:55.964452 8, 0xFFFF, sum = 0
8665 01:02:55.965027 9, 0xFFFF, sum = 0
8666 01:02:55.967619 10, 0xFFFF, sum = 0
8667 01:02:55.968085 11, 0xFFFF, sum = 0
8668 01:02:55.971192 12, 0xF7F, sum = 0
8669 01:02:55.971766 13, 0x0, sum = 1
8670 01:02:55.974411 14, 0x0, sum = 2
8671 01:02:55.974983 15, 0x0, sum = 3
8672 01:02:55.978023 16, 0x0, sum = 4
8673 01:02:55.978594 best_step = 14
8674 01:02:55.978961
8675 01:02:55.979303 ==
8676 01:02:55.981463 Dram Type= 6, Freq= 0, CH_1, rank 1
8677 01:02:55.984876 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8678 01:02:55.987657 ==
8679 01:02:55.988118 RX Vref Scan: 0
8680 01:02:55.988483
8681 01:02:55.991315 RX Vref 0 -> 0, step: 1
8682 01:02:55.991876
8683 01:02:55.992253 RX Delay 3 -> 252, step: 4
8684 01:02:55.998424 iDelay=195, Bit 0, Center 130 (79 ~ 182) 104
8685 01:02:56.002041 iDelay=195, Bit 1, Center 122 (67 ~ 178) 112
8686 01:02:56.005199 iDelay=195, Bit 2, Center 118 (67 ~ 170) 104
8687 01:02:56.009048 iDelay=195, Bit 3, Center 124 (71 ~ 178) 108
8688 01:02:56.012766 iDelay=195, Bit 4, Center 126 (71 ~ 182) 112
8689 01:02:56.019085 iDelay=195, Bit 5, Center 138 (83 ~ 194) 112
8690 01:02:56.021991 iDelay=195, Bit 6, Center 134 (79 ~ 190) 112
8691 01:02:56.025611 iDelay=195, Bit 7, Center 126 (71 ~ 182) 112
8692 01:02:56.028348 iDelay=195, Bit 8, Center 104 (47 ~ 162) 116
8693 01:02:56.031671 iDelay=195, Bit 9, Center 110 (55 ~ 166) 112
8694 01:02:56.038382 iDelay=195, Bit 10, Center 124 (67 ~ 182) 116
8695 01:02:56.041672 iDelay=195, Bit 11, Center 114 (59 ~ 170) 112
8696 01:02:56.045033 iDelay=195, Bit 12, Center 132 (75 ~ 190) 116
8697 01:02:56.047795 iDelay=195, Bit 13, Center 132 (79 ~ 186) 108
8698 01:02:56.054914 iDelay=195, Bit 14, Center 134 (79 ~ 190) 112
8699 01:02:56.057913 iDelay=195, Bit 15, Center 132 (79 ~ 186) 108
8700 01:02:56.058376 ==
8701 01:02:56.061026 Dram Type= 6, Freq= 0, CH_1, rank 1
8702 01:02:56.064448 fsp= 1, odt_onoff= 1, Byte mode= 0, DivMode= 1
8703 01:02:56.064951 ==
8704 01:02:56.068063 DQS Delay:
8705 01:02:56.068629 DQS0 = 0, DQS1 = 0
8706 01:02:56.069064 DQM Delay:
8707 01:02:56.071468 DQM0 = 127, DQM1 = 122
8708 01:02:56.072031 DQ Delay:
8709 01:02:56.074378 DQ0 =130, DQ1 =122, DQ2 =118, DQ3 =124
8710 01:02:56.078358 DQ4 =126, DQ5 =138, DQ6 =134, DQ7 =126
8711 01:02:56.081237 DQ8 =104, DQ9 =110, DQ10 =124, DQ11 =114
8712 01:02:56.087653 DQ12 =132, DQ13 =132, DQ14 =134, DQ15 =132
8713 01:02:56.088288
8714 01:02:56.088665
8715 01:02:56.089070
8716 01:02:56.090935 [DramC_TX_OE_Calibration] TA2
8717 01:02:56.091395 Original DQ_B0 (3 6) =30, OEN = 27
8718 01:02:56.094891 Original DQ_B1 (3 6) =30, OEN = 27
8719 01:02:56.097460 24, 0x0, End_B0=24 End_B1=24
8720 01:02:56.102204 25, 0x0, End_B0=25 End_B1=25
8721 01:02:56.104937 26, 0x0, End_B0=26 End_B1=26
8722 01:02:56.108098 27, 0x0, End_B0=27 End_B1=27
8723 01:02:56.108668 28, 0x0, End_B0=28 End_B1=28
8724 01:02:56.110934 29, 0x0, End_B0=29 End_B1=29
8725 01:02:56.115178 30, 0x0, End_B0=30 End_B1=30
8726 01:02:56.117572 31, 0x4141, End_B0=30 End_B1=30
8727 01:02:56.121237 Byte0 end_step=30 best_step=27
8728 01:02:56.124146 Byte1 end_step=30 best_step=27
8729 01:02:56.124608 Byte0 TX OE(2T, 0.5T) = (3, 3)
8730 01:02:56.127247 Byte1 TX OE(2T, 0.5T) = (3, 3)
8731 01:02:56.127709
8732 01:02:56.128072
8733 01:02:56.137845 [DQSOSCAuto] RK1, (LSB)MR18= 0x1f1f, (MSB)MR19= 0x303, tDQSOscB0 = 394 ps tDQSOscB1 = 394 ps
8734 01:02:56.138413 CH1 RK1: MR19=303, MR18=1F1F
8735 01:02:56.144818 CH1_RK1: MR19=0x303, MR18=0x1F1F, DQSOSC=394, MR23=63, INC=23, DEC=15
8736 01:02:56.147809 [RxdqsGatingPostProcess] freq 1600
8737 01:02:56.154156 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 2
8738 01:02:56.157374 Pre-setting of DQS Precalculation
8739 01:02:56.160590 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
8740 01:02:56.170963 sync_frequency_calibration_params sync calibration params of frequency 1600 to shu:0
8741 01:02:56.177032 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
8742 01:02:56.177485
8743 01:02:56.177858
8744 01:02:56.180142 [Calibration Summary] 3200 Mbps
8745 01:02:56.180594 CH 0, Rank 0
8746 01:02:56.183903 SW Impedance : PASS
8747 01:02:56.184454 DUTY Scan : NO K
8748 01:02:56.187460 ZQ Calibration : PASS
8749 01:02:56.190373 Jitter Meter : NO K
8750 01:02:56.190831 CBT Training : PASS
8751 01:02:56.194079 Write leveling : PASS
8752 01:02:56.197289 RX DQS gating : PASS
8753 01:02:56.197741 RX DQ/DQS(RDDQC) : PASS
8754 01:02:56.200359 TX DQ/DQS : PASS
8755 01:02:56.204215 RX DATLAT : PASS
8756 01:02:56.204698 RX DQ/DQS(Engine): PASS
8757 01:02:56.206958 TX OE : PASS
8758 01:02:56.207412 All Pass.
8759 01:02:56.207773
8760 01:02:56.210103 CH 0, Rank 1
8761 01:02:56.210554 SW Impedance : PASS
8762 01:02:56.214584 DUTY Scan : NO K
8763 01:02:56.215138 ZQ Calibration : PASS
8764 01:02:56.217589 Jitter Meter : NO K
8765 01:02:56.220554 CBT Training : PASS
8766 01:02:56.221044 Write leveling : PASS
8767 01:02:56.223668 RX DQS gating : PASS
8768 01:02:56.227434 RX DQ/DQS(RDDQC) : PASS
8769 01:02:56.227989 TX DQ/DQS : PASS
8770 01:02:56.231366 RX DATLAT : PASS
8771 01:02:56.234377 RX DQ/DQS(Engine): PASS
8772 01:02:56.234833 TX OE : PASS
8773 01:02:56.237206 All Pass.
8774 01:02:56.237712
8775 01:02:56.238072 CH 1, Rank 0
8776 01:02:56.240428 SW Impedance : PASS
8777 01:02:56.240949 DUTY Scan : NO K
8778 01:02:56.243179 ZQ Calibration : PASS
8779 01:02:56.246251 Jitter Meter : NO K
8780 01:02:56.246711 CBT Training : PASS
8781 01:02:56.250411 Write leveling : PASS
8782 01:02:56.253220 RX DQS gating : PASS
8783 01:02:56.253785 RX DQ/DQS(RDDQC) : PASS
8784 01:02:56.256830 TX DQ/DQS : PASS
8785 01:02:56.259573 RX DATLAT : PASS
8786 01:02:56.260032 RX DQ/DQS(Engine): PASS
8787 01:02:56.263612 TX OE : PASS
8788 01:02:56.264079 All Pass.
8789 01:02:56.264439
8790 01:02:56.266223 CH 1, Rank 1
8791 01:02:56.266682 SW Impedance : PASS
8792 01:02:56.270971 DUTY Scan : NO K
8793 01:02:56.273457 ZQ Calibration : PASS
8794 01:02:56.273920 Jitter Meter : NO K
8795 01:02:56.277671 CBT Training : PASS
8796 01:02:56.278235 Write leveling : PASS
8797 01:02:56.279623 RX DQS gating : PASS
8798 01:02:56.282878 RX DQ/DQS(RDDQC) : PASS
8799 01:02:56.283361 TX DQ/DQS : PASS
8800 01:02:56.286353 RX DATLAT : PASS
8801 01:02:56.289482 RX DQ/DQS(Engine): PASS
8802 01:02:56.289946 TX OE : PASS
8803 01:02:56.293125 All Pass.
8804 01:02:56.293585
8805 01:02:56.293946 DramC Write-DBI on
8806 01:02:56.296638 PER_BANK_REFRESH: Hybrid Mode
8807 01:02:56.299900 TX_TRACKING: ON
8808 01:02:56.306197 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 115, TRFCpb 44, TRFCpb_05T 0
8809 01:02:56.316522 sync_frequency_calibration_params_to_shu sync calibration params of frequency 1600 to shu:1
8810 01:02:56.323023 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
8811 01:02:56.326930 [FAST_K] Save calibration result to emmc
8812 01:02:56.329685 sync common calibartion params.
8813 01:02:56.330250 sync cbt_mode0:0, 1:0
8814 01:02:56.332655 dram_init: ddr_geometry: 0
8815 01:02:56.336591 dram_init: ddr_geometry: 0
8816 01:02:56.339847 dram_init: ddr_geometry: 0
8817 01:02:56.340310 0:dram_rank_size:80000000
8818 01:02:56.343056 1:dram_rank_size:80000000
8819 01:02:56.349516 sync rank num:2, rank0_size:0x80000000, rank1_size:0x80000000
8820 01:02:56.350079 DFS_SHUFFLE_HW_MODE: ON
8821 01:02:56.352760 dramc_set_vcore_voltage set vcore to 725000
8822 01:02:56.356275 Read voltage for 1600, 0
8823 01:02:56.356883 Vio18 = 0
8824 01:02:56.359435 Vcore = 725000
8825 01:02:56.359995 Vdram = 0
8826 01:02:56.360359 Vddq = 0
8827 01:02:56.362379 Vmddr = 0
8828 01:02:56.362840 switch to 3200 Mbps bootup
8829 01:02:56.366082 [DramcRunTimeConfig]
8830 01:02:56.366543 PHYPLL
8831 01:02:56.369902 DPM_CONTROL_AFTERK: ON
8832 01:02:56.370460 PER_BANK_REFRESH: ON
8833 01:02:56.372369 REFRESH_OVERHEAD_REDUCTION: ON
8834 01:02:56.376811 CMD_PICG_NEW_MODE: OFF
8835 01:02:56.377371 XRTWTW_NEW_MODE: ON
8836 01:02:56.379534 XRTRTR_NEW_MODE: ON
8837 01:02:56.379993 TX_TRACKING: ON
8838 01:02:56.383814 RDSEL_TRACKING: OFF
8839 01:02:56.385671 DQS Precalculation for DVFS: ON
8840 01:02:56.386131 RX_TRACKING: OFF
8841 01:02:56.389018 HW_GATING DBG: ON
8842 01:02:56.389604 ZQCS_ENABLE_LP4: ON
8843 01:02:56.392643 RX_PICG_NEW_MODE: ON
8844 01:02:56.393146 TX_PICG_NEW_MODE: ON
8845 01:02:56.395327 ENABLE_RX_DCM_DPHY: ON
8846 01:02:56.399480 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
8847 01:02:56.402255 DUMMY_READ_FOR_TRACKING: OFF
8848 01:02:56.402716 !!! SPM_CONTROL_AFTERK: OFF
8849 01:02:56.405563 !!! SPM could not control APHY
8850 01:02:56.408792 IMPEDANCE_TRACKING: ON
8851 01:02:56.409263 TEMP_SENSOR: ON
8852 01:02:56.411899 HW_SAVE_FOR_SR: OFF
8853 01:02:56.416172 CLK_FREE_FUN_FOR_DRAMC_PSEL: OFF
8854 01:02:56.418643 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: OFF
8855 01:02:56.422303 Read ODT Tracking: ON
8856 01:02:56.422892 Refresh Rate DeBounce: ON
8857 01:02:56.425667 DFS_NO_QUEUE_FLUSH: ON
8858 01:02:56.428881 DFS_NO_QUEUE_FLUSH_LATENCY_CNT: OFF
8859 01:02:56.433119 ENABLE_DFS_RUNTIME_MRW: OFF
8860 01:02:56.433679 DDR_RESERVE_NEW_MODE: ON
8861 01:02:56.435194 MR_CBT_SWITCH_FREQ: ON
8862 01:02:56.438719 =========================
8863 01:02:56.456527 [MEM] 1st complex R/W mem test pass (start addr:0x4c400000)
8864 01:02:56.459411 dram_init: ddr_geometry: 0
8865 01:02:56.477236 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
8866 01:02:56.480847 dram_init: dram init end (result: 0)
8867 01:02:56.487078 DRAM-K: Full calibration passed in 23438 msecs
8868 01:02:56.490750 MRC: failed to locate region type 0.
8869 01:02:56.491215 DRAM rank0 size:0x80000000,
8870 01:02:56.494017 DRAM rank1 size=0x80000000
8871 01:02:56.504464 Mapping address range [0x40000000:0x140000000) as cacheable | read-write | non-secure | normal
8872 01:02:56.511347 Mapping address range [0x40000000:0x40100000) as non-cacheable | read-write | non-secure | normal
8873 01:02:56.517199 Backing address range [0x40000000:0x80000000) with new page table @0x00112000
8874 01:02:56.523729 Backing address range [0x40000000:0x40200000) with new page table @0x00113000
8875 01:02:56.527020 DRAM rank0 size:0x80000000,
8876 01:02:56.530432 DRAM rank1 size=0x80000000
8877 01:02:56.530999 CBMEM:
8878 01:02:56.533581 IMD: root @ 0xfffff000 254 entries.
8879 01:02:56.537632 IMD: root @ 0xffffec00 62 entries.
8880 01:02:56.539857 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
8881 01:02:56.543903 WARNING: RO_VPD is uninitialized or empty.
8882 01:02:56.550144 FMAP: area RW_VPD found @ 577000 (16384 bytes)
8883 01:02:56.556594 CBFS: Found 'fallback/ramstage' @0x21840 size 0xe01e in mcache @0x00107c80
8884 01:02:56.570033 read SPI 0x42894 0xe01e: 6224 us, 9218 KB/s, 73.744 Mbps
8885 01:02:56.581259 BS: romstage times (exec / console): total (unknown) / 22973 ms
8886 01:02:56.581828
8887 01:02:56.582199
8888 01:02:56.590898 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 ramstage starting (log level: 8)...
8889 01:02:56.594380 ARM64: Exception handlers installed.
8890 01:02:56.597641 ARM64: Testing exception
8891 01:02:56.600631 ARM64: Done test exception
8892 01:02:56.601243 Enumerating buses...
8893 01:02:56.604027 Show all devs... Before device enumeration.
8894 01:02:56.607335 Root Device: enabled 1
8895 01:02:56.611011 CPU_CLUSTER: 0: enabled 1
8896 01:02:56.611574 CPU: 00: enabled 1
8897 01:02:56.614138 Compare with tree...
8898 01:02:56.614709 Root Device: enabled 1
8899 01:02:56.617578 CPU_CLUSTER: 0: enabled 1
8900 01:02:56.621169 CPU: 00: enabled 1
8901 01:02:56.621732 Root Device scanning...
8902 01:02:56.624839 scan_static_bus for Root Device
8903 01:02:56.627118 CPU_CLUSTER: 0 enabled
8904 01:02:56.630697 scan_static_bus for Root Device done
8905 01:02:56.633905 scan_bus: bus Root Device finished in 8 msecs
8906 01:02:56.634468 done
8907 01:02:56.640542 BS: BS_DEV_ENUMERATE run times (exec / console): 0 / 35 ms
8908 01:02:56.643821 FMAP: area RW_MRC_CACHE found @ 57d000 (8192 bytes)
8909 01:02:56.650600 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
8910 01:02:56.654010 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 10 ms
8911 01:02:56.656676 Allocating resources...
8912 01:02:56.660313 Reading resources...
8913 01:02:56.663363 Root Device read_resources bus 0 link: 0
8914 01:02:56.666769 DRAM rank0 size:0x80000000,
8915 01:02:56.667438 DRAM rank1 size=0x80000000
8916 01:02:56.670733 CPU_CLUSTER: 0 read_resources bus 0 link: 0
8917 01:02:56.673285 CPU: 00 missing read_resources
8918 01:02:56.680327 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
8919 01:02:56.683471 Root Device read_resources bus 0 link: 0 done
8920 01:02:56.683936 Done reading resources.
8921 01:02:56.690234 Show resources in subtree (Root Device)...After reading.
8922 01:02:56.694098 Root Device child on link 0 CPU_CLUSTER: 0
8923 01:02:56.696792 CPU_CLUSTER: 0 child on link 0 CPU: 00
8924 01:02:56.706827 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
8925 01:02:56.707400 CPU: 00
8926 01:02:56.711294 Root Device assign_resources, bus 0 link: 0
8927 01:02:56.713382 CPU_CLUSTER: 0 missing set_resources
8928 01:02:56.720404 Root Device assign_resources, bus 0 link: 0 done
8929 01:02:56.721017 Done setting resources.
8930 01:02:56.726429 Show resources in subtree (Root Device)...After assigning values.
8931 01:02:56.730619 Root Device child on link 0 CPU_CLUSTER: 0
8932 01:02:56.733344 CPU_CLUSTER: 0 child on link 0 CPU: 00
8933 01:02:56.742731 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
8934 01:02:56.743324 CPU: 00
8935 01:02:56.746028 Done allocating resources.
8936 01:02:56.752489 BS: BS_DEV_RESOURCES run times (exec / console): 0 / 91 ms
8937 01:02:56.753022 Enabling resources...
8938 01:02:56.753398 done.
8939 01:02:56.760252 BS: BS_DEV_ENABLE run times (exec / console): 0 / 3 ms
8940 01:02:56.760854 Initializing devices...
8941 01:02:56.762631 Root Device init
8942 01:02:56.765930 init hardware done!
8943 01:02:56.766393 0x00000018: ctrlr->caps
8944 01:02:56.769208 52.000 MHz: ctrlr->f_max
8945 01:02:56.773090 0.400 MHz: ctrlr->f_min
8946 01:02:56.773666 0x40ff8080: ctrlr->voltages
8947 01:02:56.776506 sclk: 390625
8948 01:02:56.777126 Bus Width = 1
8949 01:02:56.777498 sclk: 390625
8950 01:02:56.779554 Bus Width = 1
8951 01:02:56.780123 Early init status = 3
8952 01:02:56.786016 out: cmd=0x12e: 03 c9 2e 01 00 00 04 00 01 00 00 00
8953 01:02:56.789038 in-header: 03 fc 00 00 01 00 00 00
8954 01:02:56.793008 in-data: 00
8955 01:02:56.796428 out: cmd=0x12d: 03 c8 2d 01 00 00 05 00 01 00 00 00 01
8956 01:02:56.800831 in-header: 03 fd 00 00 00 00 00 00
8957 01:02:56.804088 in-data:
8958 01:02:56.807475 out: cmd=0x12e: 03 ca 2e 01 00 00 04 00 00 00 00 00
8959 01:02:56.811235 in-header: 03 fc 00 00 01 00 00 00
8960 01:02:56.814482 in-data: 00
8961 01:02:56.817729 out: cmd=0x12d: 03 c9 2d 01 00 00 05 00 00 00 00 00 01
8962 01:02:56.822296 in-header: 03 fd 00 00 00 00 00 00
8963 01:02:56.825324 in-data:
8964 01:02:56.828881 [SSUSB] Setting up USB HOST controller...
8965 01:02:56.832638 [SSUSB] u3phy_ports_enable u2p:1, u3p:1
8966 01:02:56.835858 [SSUSB] phy power-on done.
8967 01:02:56.839232 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
8968 01:02:56.845768 CBFS: Found 'dpm.dm' @0x2fe00 size 0x20 in mcache @0xffffc13c
8969 01:02:56.848770 mtk_init_mcu: Loaded (and reset) dpm.dm in 9 msecs (40 bytes)
8970 01:02:56.855354 CBFS: Found 'dpm.pm' @0x2fe80 size 0x2ad3 in mcache @0xffffc16c
8971 01:02:56.862519 read SPI 0x50eb0 0x2ad3: 1174 us, 9338 KB/s, 74.704 Mbps
8972 01:02:56.869196 mtk_init_mcu: Loaded (and reset) dpm.pm in 13 msecs (14004 bytes)
8973 01:02:56.875248 CBFS: Found 'spm_firmware.bin' @0x4f580 size 0x1f6a in mcache @0xffffc204
8974 01:02:56.881865 read SPI 0x705bc 0x1f6a: 923 us, 8712 KB/s, 69.696 Mbps
8975 01:02:56.885324 SPM: binary array size = 0x9dc
8976 01:02:56.888322 SPM: spmfw (version pcm_suspend_v1.45_20201028_mtcmosapi_align16)
8977 01:02:56.895052 spm_kick_im_to_fetch: ptr = 0x80000010, pmem/dmem words = 0x9c4/0x18
8978 01:02:56.901963 mtk_init_mcu: Loaded (and reset) spm_firmware.bin in 27 msecs (10173 bytes)
8979 01:02:56.908170 SPM: spm_init done in 34 msecs, spm pc = 0x3f4
8980 01:02:56.911669 configure_display: Starting display init
8981 01:02:56.945717 anx7625_power_on_init: Init interface.
8982 01:02:56.949362 anx7625_disable_pd_protocol: Disabled PD feature.
8983 01:02:56.952419 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
8984 01:02:56.979958 anx7625_start_dp_work: Secure OCM version=00
8985 01:02:56.983577 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
8986 01:02:56.998694 sp_tx_get_edid_block: EDID Block = 1
8987 01:02:57.101106 Extracted contents:
8988 01:02:57.104504 header: 00 ff ff ff ff ff ff 00
8989 01:02:57.107199 serial number: 26 cf 7d 05 00 00 00 00 00 1e
8990 01:02:57.110849 version: 01 04
8991 01:02:57.113727 basic params: 95 1f 11 78 0a
8992 01:02:57.117440 chroma info: 76 90 94 55 54 90 27 21 50 54
8993 01:02:57.121096 established: 00 00 00
8994 01:02:57.127056 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
8995 01:02:57.131067 descriptor 1: 38 36 80 a0 70 38 20 40 18 30 3c 00 35 ae 10 00 00 19
8996 01:02:57.137103 descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
8997 01:02:57.144085 descriptor 3: 00 00 00 fe 00 49 6e 66 6f 56 69 73 69 6f 6e 0a 20 20
8998 01:02:57.150626 descriptor 4: 00 00 00 fe 00 52 31 34 30 4e 57 46 35 20 52 48 20 0a
8999 01:02:57.153560 extensions: 00
9000 01:02:57.154127 checksum: fb
9001 01:02:57.154495
9002 01:02:57.156678 Manufacturer: IVO Model 57d Serial Number 0
9003 01:02:57.160195 Made week 0 of 2020
9004 01:02:57.163684 EDID version: 1.4
9005 01:02:57.164248 Digital display
9006 01:02:57.167121 6 bits per primary color channel
9007 01:02:57.167697 DisplayPort interface
9008 01:02:57.170736 Maximum image size: 31 cm x 17 cm
9009 01:02:57.173512 Gamma: 220%
9010 01:02:57.174079 Check DPMS levels
9011 01:02:57.179991 Supported color formats: RGB 4:4:4, YCrCb 4:2:2
9012 01:02:57.183096 First detailed timing is preferred timing
9013 01:02:57.183564 Established timings supported:
9014 01:02:57.186398 Standard timings supported:
9015 01:02:57.189420 Detailed timings
9016 01:02:57.192951 Hex of detail: 383680a07038204018303c0035ae10000019
9017 01:02:57.199718 Detailed mode (IN HEX): Clock 138800 KHz, 135 mm x ae mm
9018 01:02:57.203339 0780 0798 07c8 0820 hborder 0
9019 01:02:57.206996 0438 043b 0447 0458 vborder 0
9020 01:02:57.209703 -hsync -vsync
9021 01:02:57.210249 Did detailed timing
9022 01:02:57.216100 Hex of detail: 000000000000000000000000000000000000
9023 01:02:57.219213 Manufacturer-specified data, tag 0
9024 01:02:57.223667 Hex of detail: 000000fe00496e666f566973696f6e0a2020
9025 01:02:57.226138 ASCII string: InfoVision
9026 01:02:57.229137 Hex of detail: 000000fe00523134304e574635205248200a
9027 01:02:57.232905 ASCII string: R140NWF5 RH
9028 01:02:57.233477 Checksum
9029 01:02:57.236523 Checksum: 0xfb (valid)
9030 01:02:57.239244 configure_display: 'IVO R140NWF5 RH ' 1920x1080@0Hz
9031 01:02:57.242583 DSI data_rate: 832800000 bps
9032 01:02:57.248986 anx7625_parse_edid: detected IVO panel, use k value 0x3b
9033 01:02:57.252739 anx7625_parse_edid: pixelclock(138800).
9034 01:02:57.255577 hactive(1920), hsync(48), hfp(24), hbp(88)
9035 01:02:57.259070 vactive(1080), vsync(12), vfp(3), vbp(17)
9036 01:02:57.262527 anx7625_dsi_config: config dsi.
9037 01:02:57.269364 anx7625_dsi_video_config: compute M(11370496), N(552960), divider(4).
9038 01:02:57.282373 anx7625_dsi_config: success to config DSI
9039 01:02:57.286128 anx7625_dp_start: MIPI phy setup OK.
9040 01:02:57.289233 mtk_ddp_mode_set display resolution: 1920x1080@0 bpp 4
9041 01:02:57.293408 mtk_ddp_mode_set invalid vrefresh 60
9042 01:02:57.296216 main_disp_path_setup
9043 01:02:57.296677 ovl_layer_smi_id_en
9044 01:02:57.299381 ovl_layer_smi_id_en
9045 01:02:57.299951 ccorr_config
9046 01:02:57.300315 aal_config
9047 01:02:57.303013 gamma_config
9048 01:02:57.303570 postmask_config
9049 01:02:57.307077 dither_config
9050 01:02:57.309114 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
9051 01:02:57.315603 x_res x y_res: 1920 x 1080, size: 8294400 at 0x0
9052 01:02:57.319203 Root Device init finished in 552 msecs
9053 01:02:57.323418 CPU_CLUSTER: 0 init
9054 01:02:57.329412 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | device
9055 01:02:57.332179 INFRA2APU_SRAM_PROT_EN 0x10001e98 = 0x3fffffff
9056 01:02:57.335971 APU_MBOX 0x190000b0 = 0x10001
9057 01:02:57.338634 APU_MBOX 0x190001b0 = 0x10001
9058 01:02:57.342059 APU_MBOX 0x190005b0 = 0x10001
9059 01:02:57.345723 APU_MBOX 0x190006b0 = 0x10001
9060 01:02:57.351938 CBFS: Found 'mcupm.bin' @0x329c0 size 0xe237 in mcache @0xffffc19c
9061 01:02:57.362256 read SPI 0x539f4 0xe237: 6247 us, 9270 KB/s, 74.160 Mbps
9062 01:02:57.374348 mtk_init_mcu: Loaded (and reset) mcupm.bin in 24 msecs (117884 bytes)
9063 01:02:57.380306 CBFS: Found 'sspm.bin' @0x40c40 size 0xe8ef in mcache @0xffffc1d0
9064 01:02:57.393094 read SPI 0x61c74 0xe8ef: 6409 us, 9304 KB/s, 74.432 Mbps
9065 01:02:57.401525 mtk_init_mcu: Loaded (and reset) sspm.bin in 21 msecs (137228 bytes)
9066 01:02:57.404594 CPU_CLUSTER: 0 init finished in 81 msecs
9067 01:02:57.408181 Devices initialized
9068 01:02:57.411054 Show all devs... After init.
9069 01:02:57.411547 Root Device: enabled 1
9070 01:02:57.414260 CPU_CLUSTER: 0: enabled 1
9071 01:02:57.417704 CPU: 00: enabled 1
9072 01:02:57.421166 BS: BS_DEV_INIT run times (exec / console): 211 / 447 ms
9073 01:02:57.425285 FMAP: area RW_ELOG found @ 57f000 (4096 bytes)
9074 01:02:57.427490 ELOG: NV offset 0x57f000 size 0x1000
9075 01:02:57.434226 read SPI 0x57f000 0x1000: 488 us, 8393 KB/s, 67.144 Mbps
9076 01:02:57.441715 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
9077 01:02:57.444218 ELOG: Event(17) added with size 13 at 2024-01-19 01:02:57 UTC
9078 01:02:57.450807 out: cmd=0x121: 03 db 21 01 00 00 00 00
9079 01:02:57.453924 in-header: 03 eb 00 00 2c 00 00 00
9080 01:02:57.464979 in-data: 78 64 00 00 00 00 00 00 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9081 01:02:57.470769 ELOG: Event(A1) added with size 10 at 2024-01-19 01:02:57 UTC
9082 01:02:57.477351 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
9083 01:02:57.483878 ELOG: Event(A0) added with size 9 at 2024-01-19 01:02:57 UTC
9084 01:02:57.487488 elog_add_boot_reason: Logged dev mode boot
9085 01:02:57.494135 BS: BS_POST_DEVICE entry times (exec / console): 2 / 64 ms
9086 01:02:57.494691 Finalize devices...
9087 01:02:57.497847 Devices finalized
9088 01:02:57.500343 BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
9089 01:02:57.503605 Writing coreboot table at 0xffe64000
9090 01:02:57.506750 0. 000000000010a000-0000000000113fff: RAMSTAGE
9091 01:02:57.514033 1. 0000000040000000-00000000400fffff: RAM
9092 01:02:57.516606 2. 0000000040100000-000000004032afff: RAMSTAGE
9093 01:02:57.520085 3. 000000004032b000-00000000545fffff: RAM
9094 01:02:57.523582 4. 0000000054600000-000000005465ffff: BL31
9095 01:02:57.527482 5. 0000000054660000-00000000ffe63fff: RAM
9096 01:02:57.533480 6. 00000000ffe64000-00000000ffffffff: CONFIGURATION TABLES
9097 01:02:57.537680 7. 0000000100000000-000000013fffffff: RAM
9098 01:02:57.540380 Passing 5 GPIOs to payload:
9099 01:02:57.543444 NAME | PORT | POLARITY | VALUE
9100 01:02:57.550039 EC in RW | 0x000000aa | low | undefined
9101 01:02:57.553445 EC interrupt | 0x00000005 | low | undefined
9102 01:02:57.556822 TPM interrupt | 0x000000ab | high | undefined
9103 01:02:57.564251 SD card detect | 0x00000011 | high | undefined
9104 01:02:57.566455 speaker enable | 0x00000093 | high | undefined
9105 01:02:57.570097 out: cmd=0x6: 03 f7 06 00 00 00 00 00
9106 01:02:57.573269 in-header: 03 f8 00 00 02 00 00 00
9107 01:02:57.576342 in-data: 03 00
9108 01:02:57.580155 ADC[4]: Raw value=669327 ID=5
9109 01:02:57.580779 ADC[3]: Raw value=212180 ID=1
9110 01:02:57.582858 RAM Code: 0x51
9111 01:02:57.587008 ADC[6]: Raw value=74410 ID=0
9112 01:02:57.587561 ADC[5]: Raw value=211444 ID=1
9113 01:02:57.589434 SKU Code: 0x1
9114 01:02:57.596488 Wrote coreboot table at: 0xffe64000, 0x3ac bytes, checksum 2791
9115 01:02:57.597095 coreboot table: 964 bytes.
9116 01:02:57.599870 IMD ROOT 0. 0xfffff000 0x00001000
9117 01:02:57.603069 IMD SMALL 1. 0xffffe000 0x00001000
9118 01:02:57.606123 RO MCACHE 2. 0xffffc000 0x00001104
9119 01:02:57.609274 CONSOLE 3. 0xfff7c000 0x00080000
9120 01:02:57.613432 FMAP 4. 0xfff7b000 0x00000452
9121 01:02:57.616502 TIME STAMP 5. 0xfff7a000 0x00000910
9122 01:02:57.619268 VBOOT WORK 6. 0xfff66000 0x00014000
9123 01:02:57.622840 RAMOOPS 7. 0xffe66000 0x00100000
9124 01:02:57.626257 COREBOOT 8. 0xffe64000 0x00002000
9125 01:02:57.629338 IMD small region:
9126 01:02:57.632514 IMD ROOT 0. 0xffffec00 0x00000400
9127 01:02:57.635651 VPD 1. 0xffffeb80 0x0000006c
9128 01:02:57.639373 MMC STATUS 2. 0xffffeb60 0x00000004
9129 01:02:57.642723 BS: BS_WRITE_TABLES run times (exec / console): 1 / 137 ms
9130 01:02:57.645306 Probing TPM: done!
9131 01:02:57.649642 Connected to device vid:did:rid of 1ae0:0028:00
9132 01:02:57.660086 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
9133 01:02:57.664214 Initialized TPM device CR50 revision 0
9134 01:02:57.666816 Checking cr50 for pending updates
9135 01:02:57.671065 Reading cr50 TPM mode
9136 01:02:57.679320 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 22 ms
9137 01:02:57.686003 CBFS: Found 'fallback/payload' @0x3780c0 size 0x4f1b0 in mcache @0xffffd098
9138 01:02:57.726182 read SPI 0x3990ec 0x4f1b0: 34848 us, 9297 KB/s, 74.376 Mbps
9139 01:02:57.729988 Checking segment from ROM address 0x40100000
9140 01:02:57.733108 Checking segment from ROM address 0x4010001c
9141 01:02:57.740511 Loading segment from ROM address 0x40100000
9142 01:02:57.741120 code (compression=0)
9143 01:02:57.749970 New segment dstaddr 0x80000000 memsize 0x21a7280 srcaddr 0x40100038 filesize 0x4f178
9144 01:02:57.756034 Loading Segment: addr: 0x80000000 memsz: 0x00000000021a7280 filesz: 0x000000000004f178
9145 01:02:57.756596 it's not compressed!
9146 01:02:57.763426 [ 0x80000000, 8004f178, 0x821a7280) <- 40100038
9147 01:02:57.769639 Clearing Segment: addr: 0x000000008004f178 memsz: 0x0000000002158108
9148 01:02:57.787670 Loading segment from ROM address 0x4010001c
9149 01:02:57.788227 Entry Point 0x80000000
9150 01:02:57.790876 Loaded segments
9151 01:02:57.794208 BS: BS_PAYLOAD_LOAD run times (exec / console): 48 / 61 ms
9152 01:02:57.800131 Jumping to boot code at 0x80000000(0xffe64000)
9153 01:02:57.806600 CPU0: stack: 0x0010a000 - 0x0010d000, lowest used address 0x0010c500, stack used: 2816 bytes
9154 01:02:57.813486 CBFS: Found 'fallback/bl31' @0x6db40 size 0x74a8 in mcache @0xffffc290
9155 01:02:57.821283 read SPI 0x8eb68 0x74a8: 3223 us, 9265 KB/s, 74.120 Mbps
9156 01:02:57.824741 Checking segment from ROM address 0x40100000
9157 01:02:57.828396 Checking segment from ROM address 0x4010001c
9158 01:02:57.834732 Loading segment from ROM address 0x40100000
9159 01:02:57.835285 code (compression=1)
9160 01:02:57.841597 New segment dstaddr 0x54600000 memsize 0x2e000 srcaddr 0x40100038 filesize 0x7470
9161 01:02:57.850845 Loading Segment: addr: 0x54600000 memsz: 0x000000000002e000 filesz: 0x0000000000007470
9162 01:02:57.851388 using LZMA
9163 01:02:57.860005 [ 0x54600000, 54614abc, 0x5462e000) <- 40100038
9164 01:02:57.866044 Clearing Segment: addr: 0x0000000054614abc memsz: 0x0000000000019544
9165 01:02:57.869311 Loading segment from ROM address 0x4010001c
9166 01:02:57.869788 Entry Point 0x54601000
9167 01:02:57.873325 Loaded segments
9168 01:02:57.876062 NOTICE: MT8192 bl31_setup
9169 01:02:57.883086 NOTICE: BL31: v2.4(debug):v2.4-448-gce3ebc861
9170 01:02:57.886484 NOTICE: BL31: Built : Sat Sep 11 09:59:37 UTC 2021
9171 01:02:57.890138 WARNING: region 0:
9172 01:02:57.892741 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9173 01:02:57.893213 WARNING: region 1:
9174 01:02:57.899485 WARNING: sa:0x8000, ea:0x83ff, apc0: 0x80b6db40 apc1: 0xb6db6d
9175 01:02:57.903209 WARNING: region 2:
9176 01:02:57.907068 WARNING: sa:0x1000, ea:0x113f, apc0: 0x80b6d168 apc1: 0xb6db6d
9177 01:02:57.909825 WARNING: region 3:
9178 01:02:57.913329 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9179 01:02:57.916493 WARNING: region 4:
9180 01:02:57.923308 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9181 01:02:57.923852 WARNING: region 5:
9182 01:02:57.926468 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9183 01:02:57.930010 WARNING: region 6:
9184 01:02:57.934225 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9185 01:02:57.936549 WARNING: region 7:
9186 01:02:57.940026 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9187 01:02:57.947027 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_0: 0x14000000
9188 01:02:57.950439 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_1: 0x0
9189 01:02:57.952915 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_0: 0xffffffff
9190 01:02:57.959898 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_1: 0xfff
9191 01:02:57.964190 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_0: 0xffffffff
9192 01:02:57.966712 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_1: 0x3f00
9193 01:02:57.972850 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_0: 0xffffffff
9194 01:02:57.977618 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_1: 0x3fff
9195 01:02:57.983147 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_0: 0xffffffff
9196 01:02:57.986398 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_1: 0x3fff
9197 01:02:57.989487 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_0: 0xffffffff
9198 01:02:57.996571 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_1: 0x3fff
9199 01:02:57.999611 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_0: 0xffffffff
9200 01:02:58.002612 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_1: 0x3fff
9201 01:02:58.010407 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_0: 0xffffffff
9202 01:02:58.012572 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_1: 0x3fff
9203 01:02:58.019740 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_0: 0xffffffff
9204 01:02:58.022586 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_1: 0x3fff
9205 01:02:58.026145 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_0: 0xffffffff
9206 01:02:58.033760 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_1: 0x3fff
9207 01:02:58.036360 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_0: 0xffffffff
9208 01:02:58.040179 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_1: 0x3fff
9209 01:02:58.046972 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_0: 0xffffffff
9210 01:02:58.050100 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_1: 0x3fff
9211 01:02:58.056313 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_0: 0xffffffff
9212 01:02:58.060137 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_1: 0x3fff
9213 01:02:58.063670 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_0: 0xffffffff
9214 01:02:58.069163 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_1: 0x3fff
9215 01:02:58.072974 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_0: 0xffffffff
9216 01:02:58.079984 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_1: 0x3fff
9217 01:02:58.083132 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_0: 0xffffffff
9218 01:02:58.085973 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_1: 0x3fff
9219 01:02:58.093038 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_0: 0x0
9220 01:02:58.096908 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_1: 0x0
9221 01:02:58.099278 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_2: 0x0
9222 01:02:58.103029 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_3: 0x0
9223 01:02:58.110062 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_4: 0x0
9224 01:02:58.113660 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_5: 0x0
9225 01:02:58.116419 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_6: 0x0
9226 01:02:58.119750 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_7: 0x0
9227 01:02:58.125871 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_8: 0x0
9228 01:02:58.129312 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_9: 0x0
9229 01:02:58.132933 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_10: 0x0
9230 01:02:58.136873 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_11: 0x0
9231 01:02:58.142610 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_12: 0x0
9232 01:02:58.145671 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_13: 0x0
9233 01:02:58.149301 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_14: 0x0
9234 01:02:58.152338 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_15: 0x0
9235 01:02:58.160479 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_0: 0xffffffff
9236 01:02:58.162963 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_1: 0xffffffff
9237 01:02:58.169327 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_2: 0xffffffff
9238 01:02:58.172026 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_3: 0xffffffff
9239 01:02:58.179827 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_4: 0xffffffff
9240 01:02:58.182587 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_5: 0xffffffff
9241 01:02:58.185955 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_6: 0xffffffff
9242 01:02:58.192872 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_7: 0xffffffff
9243 01:02:58.195838 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_8: 0xffffffff
9244 01:02:58.203274 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_9: 0xffffffff
9245 01:02:58.205568 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_10: 0xffffffff
9246 01:02:58.212249 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_11: 0xffffffff
9247 01:02:58.215422 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_12: 0xffffffff
9248 01:02:58.222516 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_13: 0xffffffff
9249 01:02:58.225307 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_14: 0xffffffff
9250 01:02:58.229357 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_15: 0xffffffff
9251 01:02:58.235767 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_0: 0xffffffff
9252 01:02:58.239214 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_1: 0xffffffff
9253 01:02:58.245723 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_2: 0xffffffff
9254 01:02:58.249404 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_3: 0xffffffff
9255 01:02:58.255628 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_4: 0xffffffff
9256 01:02:58.259188 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_5: 0xffffffff
9257 01:02:58.263039 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_6: 0xffffffff
9258 01:02:58.269459 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_7: 0xffffffff
9259 01:02:58.272596 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_8: 0xffffffff
9260 01:02:58.279275 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_9: 0xffffffff
9261 01:02:58.282750 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_10: 0xffffffff
9262 01:02:58.289159 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_11: 0xffffffff
9263 01:02:58.292169 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_12: 0xffffffff
9264 01:02:58.295847 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_13: 0xffffffff
9265 01:02:58.301865 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_14: 0xffffffff
9266 01:02:58.305832 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_15: 0xffffffff
9267 01:02:58.312240 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_0: 0xffffffff
9268 01:02:58.316295 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_1: 0xffffffff
9269 01:02:58.322268 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_2: 0xffffffff
9270 01:02:58.325257 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_3: 0xffffffff
9271 01:02:58.329136 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_4: 0xffffffff
9272 01:02:58.335668 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_5: 0xcfff30ff
9273 01:02:58.339093 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_6: 0xffffffff
9274 01:02:58.345760 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_7: 0xffffffff
9275 01:02:58.348957 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_8: 0xffffffff
9276 01:02:58.355413 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_9: 0xffffffff
9277 01:02:58.359103 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_10: 0xffffffff
9278 01:02:58.365376 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_11: 0xffffffff
9279 01:02:58.368774 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_12: 0xffffffff
9280 01:02:58.372553 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_13: 0xffffffff
9281 01:02:58.378788 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_14: 0xffffffff
9282 01:02:58.382046 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_15: 0xffffffff
9283 01:02:58.388945 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_0: 0x0
9284 01:02:58.391950 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_1: 0x0
9285 01:02:58.396018 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_2: 0x0
9286 01:02:58.398510 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_3: 0x0
9287 01:02:58.405978 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_4: 0x0
9288 01:02:58.409174 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_0: 0xffffffff
9289 01:02:58.412036 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_1: 0xffffffff
9290 01:02:58.418854 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_2: 0xffffffff
9291 01:02:58.422387 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_3: 0xffffffff
9292 01:02:58.428891 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_4: 0xfff
9293 01:02:58.431786 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_0: 0xffffffff
9294 01:02:58.434987 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_1: 0xffffffff
9295 01:02:58.441899 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_2: 0xffffffff
9296 01:02:58.445037 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_3: 0xffffffff
9297 01:02:58.451700 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_4: 0xfff
9298 01:02:58.455372 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_0: 0xffffffff
9299 01:02:58.458042 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_1: 0xffffffff
9300 01:02:58.464774 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_2: 0xffffffff
9301 01:02:58.468444 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_3: 0xffffffff
9302 01:02:58.474797 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_4: 0xfff
9303 01:02:58.477945 INFO: [DEVAPC] (INFRA_AO)MAS_SEC_0: 0x18
9304 01:02:58.481405 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_0: 0x10000000
9305 01:02:58.487871 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_1: 0x1000004
9306 01:02:58.492094 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_2: 0x0
9307 01:02:58.494958 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_3: 0x0
9308 01:02:58.498003 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_4: 0x0
9309 01:02:58.501755 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_5: 0x0
9310 01:02:58.508011 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_6: 0x10000
9311 01:02:58.511211 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_0: 0xffffffff
9312 01:02:58.517727 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_1: 0xffffffff
9313 01:02:58.520967 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_2: 0xffffffff
9314 01:02:58.524446 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_3: 0x3fffffff
9315 01:02:58.530983 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_4: 0xffffffff
9316 01:02:58.534510 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_5: 0xffffffff
9317 01:02:58.540887 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_6: 0x3ffff
9318 01:02:58.544637 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_0: 0xfffc03fc
9319 01:02:58.547604 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_1: 0xfff3ffff
9320 01:02:58.554633 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_2: 0xfffcfccf
9321 01:02:58.557735 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_3: 0xff3fffff
9322 01:02:58.564688 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_4: 0xffff3ffc
9323 01:02:58.567806 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_5: 0xffffffff
9324 01:02:58.571361 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_6: 0x3ffff
9325 01:02:58.577279 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_0: 0xff3f33ff
9326 01:02:58.581456 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_1: 0xffffffff
9327 01:02:58.587880 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_2: 0xffffffff
9328 01:02:58.591041 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_3: 0xffffffff
9329 01:02:58.595368 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_4: 0xffffffff
9330 01:02:58.601605 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_5: 0xffffffff
9331 01:02:58.603999 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_6: 0x3ffff
9332 01:02:58.607443 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_0: 0xffffffff
9333 01:02:58.614542 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_1: 0xffffffff
9334 01:02:58.618038 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_2: 0xffffffff
9335 01:02:58.624415 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_3: 0xffffffff
9336 01:02:58.627328 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_4: 0xffffffff
9337 01:02:58.630336 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_5: 0xffffffff
9338 01:02:58.637110 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_6: 0x3ffff
9339 01:02:58.640881 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_0: 0xffffffff
9340 01:02:58.647190 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_1: 0xffffffff
9341 01:02:58.650634 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_2: 0xffffffff
9342 01:02:58.653919 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_3: 0xffffffff
9343 01:02:58.661509 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_4: 0xffffffff
9344 01:02:58.664482 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_5: 0xffffffff
9345 01:02:58.667516 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_6: 0x3ffff
9346 01:02:58.674151 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_0: 0xffffffff
9347 01:02:58.676861 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_1: 0xffffffff
9348 01:02:58.684046 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_2: 0xffffffff
9349 01:02:58.687022 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_3: 0xffffffff
9350 01:02:58.693379 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_4: 0xffffffff
9351 01:02:58.697206 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_5: 0xffffffff
9352 01:02:58.700635 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_6: 0x3ffff
9353 01:02:58.708276 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_0: 0xffffffff
9354 01:02:58.710380 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_1: 0xffffffff
9355 01:02:58.717198 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_2: 0xffffffff
9356 01:02:58.720185 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_3: 0xffffffff
9357 01:02:58.723812 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_4: 0xffffffff
9358 01:02:58.730330 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_5: 0xffffffff
9359 01:02:58.733346 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_6: 0x3ffff
9360 01:02:58.736551 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_0: 0xfffff3ff
9361 01:02:58.743651 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_1: 0xffffffff
9362 01:02:58.746475 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_2: 0xffffffff
9363 01:02:58.753255 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_3: 0xffffffff
9364 01:02:58.756911 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_4: 0xffffffff
9365 01:02:58.763147 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_5: 0xffffffff
9366 01:02:58.766824 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_6: 0x3ffff
9367 01:02:58.769311 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_0: 0xffffffff
9368 01:02:58.776301 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_1: 0xffffffff
9369 01:02:58.779081 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_2: 0xffffffff
9370 01:02:58.786004 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_3: 0xffffffff
9371 01:02:58.790188 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_4: 0xffffffff
9372 01:02:58.792431 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_5: 0xffffffff
9373 01:02:58.799235 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_6: 0x3ffff
9374 01:02:58.802159 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_0: 0xffffffff
9375 01:02:58.809079 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_1: 0xffffffff
9376 01:02:58.812306 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_2: 0xffffffff
9377 01:02:58.816079 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_3: 0xffffffff
9378 01:02:58.823143 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_4: 0xffffffff
9379 01:02:58.825378 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_5: 0xffffffff
9380 01:02:58.832511 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_6: 0x3ffff
9381 01:02:58.835506 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_0: 0xffffffff
9382 01:02:58.842353 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_1: 0xffffffff
9383 01:02:58.845666 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_2: 0xffffffff
9384 01:02:58.849268 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_3: 0xffffffff
9385 01:02:58.855018 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_4: 0xffffffff
9386 01:02:58.858686 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_5: 0xffffffff
9387 01:02:58.864891 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_6: 0x3ffff
9388 01:02:58.868328 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_0: 0xffffffff
9389 01:02:58.874839 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_1: 0xffffffff
9390 01:02:58.878046 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_2: 0xffffffff
9391 01:02:58.881382 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_3: 0xffffffff
9392 01:02:58.888229 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_4: 0xffffffff
9393 01:02:58.891472 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_5: 0xffffffff
9394 01:02:58.897901 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_6: 0x3ffff
9395 01:02:58.902469 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_0: 0xffffffff
9396 01:02:58.904481 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_1: 0xffffffff
9397 01:02:58.911654 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_2: 0xffffffff
9398 01:02:58.914794 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_3: 0xffffffff
9399 01:02:58.921424 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_4: 0xffffffff
9400 01:02:58.925265 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_5: 0xffffffff
9401 01:02:58.931174 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_6: 0x3ffff
9402 01:02:58.934450 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_0: 0xffffffff
9403 01:02:58.937728 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_1: 0xffffffff
9404 01:02:58.944763 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_2: 0xffffffff
9405 01:02:58.947711 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_3: 0xffffffff
9406 01:02:58.954872 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_4: 0xffffffff
9407 01:02:58.957646 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_5: 0xffffffff
9408 01:02:58.964703 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_6: 0x3ffff
9409 01:02:58.967386 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_0: 0xffffffff
9410 01:02:58.973680 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_1: 0xffffffff
9411 01:02:58.976656 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_2: 0xffffffff
9412 01:02:58.980410 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_3: 0xffffffff
9413 01:02:58.987223 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_4: 0xffffffff
9414 01:02:58.990657 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_5: 0xffffffff
9415 01:02:58.996537 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_6: 0x3ffff
9416 01:02:59.000813 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_0: 0x0
9417 01:02:59.003642 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_1: 0x0
9418 01:02:59.006733 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_2: 0x0
9419 01:02:59.014135 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_3: 0x0
9420 01:02:59.016460 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_4: 0x0
9421 01:02:59.020104 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_0: 0xffffffff
9422 01:02:59.026588 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_1: 0xffffffff
9423 01:02:59.031259 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_2: 0xffffffff
9424 01:02:59.033413 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_3: 0xffffffff
9425 01:02:59.040235 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_4: 0xf
9426 01:02:59.043900 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_0: 0xffffffff
9427 01:02:59.046685 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_1: 0xffffffff
9428 01:02:59.053004 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_2: 0xffffffff
9429 01:02:59.055997 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_3: 0xffffffff
9430 01:02:59.063654 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_4: 0xf
9431 01:02:59.066600 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_0: 0xffffffff
9432 01:02:59.069087 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_1: 0xffffffff
9433 01:02:59.076055 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_2: 0xffffffff
9434 01:02:59.079476 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_3: 0xffffffff
9435 01:02:59.082314 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_4: 0xf
9436 01:02:59.089342 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_0: 0xffffffff
9437 01:02:59.093037 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_1: 0xffffffff
9438 01:02:59.099090 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_2: 0xffffffff
9439 01:02:59.101787 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_3: 0xffffffff
9440 01:02:59.105405 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_4: 0xf
9441 01:02:59.112148 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_0: 0xffffffff
9442 01:02:59.116017 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_1: 0xffffffff
9443 01:02:59.122627 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_2: 0xffffffff
9444 01:02:59.125246 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_3: 0xffffffff
9445 01:02:59.128659 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_4: 0xf
9446 01:02:59.135010 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_0: 0xffffffff
9447 01:02:59.138417 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_1: 0xffffffff
9448 01:02:59.141802 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_2: 0xffffffff
9449 01:02:59.149088 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_3: 0xffffffff
9450 01:02:59.151719 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_4: 0xf
9451 01:02:59.155490 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_0: 0xffffffff
9452 01:02:59.161896 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_1: 0xffffffff
9453 01:02:59.165031 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_2: 0xffffffff
9454 01:02:59.171577 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_3: 0xffffffff
9455 01:02:59.174920 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_4: 0xf
9456 01:02:59.178048 INFO: [DEVAPC] (PERI_AO_SYS2)D0_APC_0: 0x0
9457 01:02:59.181111 INFO: [DEVAPC] (PERI_AO_SYS2)D1_APC_0: 0x3
9458 01:02:59.187814 INFO: [DEVAPC] (PERI_AO_SYS2)D2_APC_0: 0x3
9459 01:02:59.191803 INFO: [DEVAPC] (PERI_AO_SYS2)D3_APC_0: 0x3
9460 01:02:59.194185 INFO: [DEVAPC] (PERI_AO)MAS_SEC_0: 0x0
9461 01:02:59.197553 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_0: 0x400400
9462 01:02:59.204471 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_1: 0x0
9463 01:02:59.208205 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_2: 0x0
9464 01:02:59.211110 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_3: 0x0
9465 01:02:59.214216 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_4: 0x0
9466 01:02:59.220886 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_5: 0x0
9467 01:02:59.224016 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_6: 0x140000
9468 01:02:59.227169 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_7: 0x0
9469 01:02:59.234100 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_0: 0xffffffff
9470 01:02:59.237701 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_1: 0xffffffff
9471 01:02:59.244392 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_2: 0xffffffff
9472 01:02:59.247106 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_3: 0xffffffff
9473 01:02:59.250601 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_4: 0xffffffff
9474 01:02:59.257300 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_5: 0xffffffff
9475 01:02:59.260372 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_6: 0xffffffff
9476 01:02:59.266632 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_7: 0x3f
9477 01:02:59.270302 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_0: 0xfffffff3
9478 01:02:59.272947 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_1: 0xffffefff
9479 01:02:59.280058 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_2: 0xffffffff
9480 01:02:59.283515 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_3: 0xffffffff
9481 01:02:59.289827 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_4: 0xffffffff
9482 01:02:59.293064 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_5: 0xcfffffff
9483 01:02:59.300335 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_6: 0xf3fcffff
9484 01:02:59.303422 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_7: 0x3f
9485 01:02:59.306609 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_0: 0xffffffff
9486 01:02:59.313278 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_1: 0xffffffff
9487 01:02:59.316615 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_2: 0xffffffff
9488 01:02:59.323894 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_3: 0xffffffff
9489 01:02:59.326234 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_4: 0xffffffff
9490 01:02:59.332662 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_5: 0xffffffff
9491 01:02:59.336283 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_6: 0xffffffff
9492 01:02:59.339974 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_7: 0x3f
9493 01:02:59.346740 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_0: 0xffffffff
9494 01:02:59.349380 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_1: 0xffffffff
9495 01:02:59.357168 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_2: 0xffffffff
9496 01:02:59.360340 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_3: 0xffffffff
9497 01:02:59.362939 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_4: 0xffffffff
9498 01:02:59.369332 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_5: 0xffffffff
9499 01:02:59.373136 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_6: 0xffffffff
9500 01:02:59.380485 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_7: 0x3f
9501 01:02:59.382732 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_0: 0xffffffff
9502 01:02:59.387727 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_1: 0xffffffff
9503 01:02:59.392989 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_2: 0xffffffff
9504 01:02:59.396813 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_3: 0xffffffff
9505 01:02:59.402480 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_4: 0xffffffff
9506 01:02:59.405947 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_5: 0xffffffff
9507 01:02:59.412487 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_6: 0xffffffff
9508 01:02:59.416513 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_7: 0x3f
9509 01:02:59.419749 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_0: 0xffffffff
9510 01:02:59.426260 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_1: 0xffffffff
9511 01:02:59.429131 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_2: 0xffffffff
9512 01:02:59.436163 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_3: 0xffffffff
9513 01:02:59.439601 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_4: 0xffffffff
9514 01:02:59.442380 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_5: 0xffffffff
9515 01:02:59.448927 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_6: 0xffffffff
9516 01:02:59.451877 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_7: 0x3f
9517 01:02:59.459348 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_0: 0xffffffff
9518 01:02:59.462011 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_1: 0xffffffff
9519 01:02:59.469537 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_2: 0xffffffff
9520 01:02:59.472963 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_3: 0xffffffff
9521 01:02:59.475332 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_4: 0xffffffff
9522 01:02:59.481403 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_5: 0xffffffff
9523 01:02:59.486337 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_6: 0xffffffff
9524 01:02:59.491834 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_7: 0x3f
9525 01:02:59.495212 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_0: 0xffffffff
9526 01:02:59.498958 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_1: 0xffffffff
9527 01:02:59.504878 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_2: 0xffffffff
9528 01:02:59.507956 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_3: 0xffffffff
9529 01:02:59.514960 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_4: 0xffffffff
9530 01:02:59.518105 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_5: 0xffffffff
9531 01:02:59.524410 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_6: 0xffffffff
9532 01:02:59.528282 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_7: 0x3f
9533 01:02:59.531427 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_0: 0xffffffff
9534 01:02:59.537884 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_1: 0xffffffff
9535 01:02:59.541991 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_2: 0xffffffff
9536 01:02:59.549117 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_3: 0xffffffff
9537 01:02:59.551246 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_4: 0xffffffff
9538 01:02:59.554316 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_5: 0xffffffff
9539 01:02:59.561291 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_6: 0xffffffff
9540 01:02:59.564378 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_7: 0x3f
9541 01:02:59.570966 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_0: 0xffffffff
9542 01:02:59.574149 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_1: 0xffffffff
9543 01:02:59.581424 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_2: 0xffffffff
9544 01:02:59.584883 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_3: 0xffffffff
9545 01:02:59.590756 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_4: 0xffffffff
9546 01:02:59.594086 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_5: 0xffffffff
9547 01:02:59.597491 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_6: 0xffffffff
9548 01:02:59.604240 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_7: 0x3f
9549 01:02:59.606955 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_0: 0xffffffff
9550 01:02:59.613795 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_1: 0xffffffff
9551 01:02:59.616931 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_2: 0xffffffff
9552 01:02:59.624418 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_3: 0xffffffff
9553 01:02:59.627269 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_4: 0xffffffff
9554 01:02:59.633386 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_5: 0xffffffff
9555 01:02:59.636879 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_6: 0xffffffff
9556 01:02:59.640306 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_7: 0x3f
9557 01:02:59.647285 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_0: 0xffffffff
9558 01:02:59.651084 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_1: 0xffffffff
9559 01:02:59.656982 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_2: 0xffffffff
9560 01:02:59.660878 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_3: 0xffffffff
9561 01:02:59.666914 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_4: 0xffffffff
9562 01:02:59.670603 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_5: 0xffffffff
9563 01:02:59.672901 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_6: 0xffffffff
9564 01:02:59.679878 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_7: 0x3f
9565 01:02:59.683402 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_0: 0xffffffff
9566 01:02:59.689667 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_1: 0xffffffff
9567 01:02:59.693699 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_2: 0xffffffff
9568 01:02:59.700211 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_3: 0xffffffff
9569 01:02:59.703131 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_4: 0xffffffff
9570 01:02:59.709466 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_5: 0xffffffff
9571 01:02:59.713615 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_6: 0xffffffff
9572 01:02:59.716185 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_7: 0x3f
9573 01:02:59.722874 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_0: 0xffffffff
9574 01:02:59.726012 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_1: 0xffffffff
9575 01:02:59.732362 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_2: 0xffffffff
9576 01:02:59.736841 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_3: 0xffffffff
9577 01:02:59.742343 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_4: 0xffffffff
9578 01:02:59.745968 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_5: 0xffffffff
9579 01:02:59.752103 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_6: 0xffffffff
9580 01:02:59.755355 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_7: 0x3f
9581 01:02:59.759527 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_0: 0xffffffff
9582 01:02:59.766169 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_1: 0xffffffff
9583 01:02:59.769455 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_2: 0xffffffff
9584 01:02:59.775444 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_3: 0xffffffff
9585 01:02:59.779511 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_4: 0xffffffff
9586 01:02:59.785698 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_5: 0xffffffff
9587 01:02:59.789233 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_6: 0xffffffff
9588 01:02:59.791865 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_7: 0x3f
9589 01:02:59.798911 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_0: 0x0
9590 01:02:59.801792 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_1: 0x10000
9591 01:02:59.808877 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_0: 0xffffffff
9592 01:02:59.811360 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_1: 0x3fffff
9593 01:02:59.818453 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_0: 0xffffcff3
9594 01:02:59.821592 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_1: 0x3fcfff
9595 01:02:59.828125 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_0: 0xffffffff
9596 01:02:59.832057 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_1: 0x3fffff
9597 01:02:59.838008 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_0: 0xffffffff
9598 01:02:59.841397 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_1: 0x3fffff
9599 01:02:59.847624 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_0: 0xffffffff
9600 01:02:59.851494 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_1: 0x3fffff
9601 01:02:59.858090 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_0: 0xffffffff
9602 01:02:59.861063 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_1: 0x3fffff
9603 01:02:59.868055 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_0: 0xffffffff
9604 01:02:59.870732 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_1: 0x3fffff
9605 01:02:59.877945 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_0: 0xffffffff
9606 01:02:59.880397 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_1: 0x3fffff
9607 01:02:59.887481 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_0: 0xffffffff
9608 01:02:59.890558 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_1: 0x3fffff
9609 01:02:59.897068 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_0: 0xffffffff
9610 01:02:59.900875 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_1: 0x3fffff
9611 01:02:59.907157 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_0: 0xffffffff
9612 01:02:59.910005 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_1: 0x3fffff
9613 01:02:59.918132 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_0: 0xffffffff
9614 01:02:59.921092 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_1: 0x3fffff
9615 01:02:59.927227 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_0: 0xffffffff
9616 01:02:59.930315 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_1: 0x3fffff
9617 01:02:59.936694 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_0: 0xffffffff
9618 01:02:59.939994 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_1: 0x3fffff
9619 01:02:59.947550 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_0: 0xffffffff
9620 01:02:59.949860 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_1: 0x3fffff
9621 01:02:59.953679 INFO: [DEVAPC] (PERI_PAR_AO)MAS_SEC_0: 0x0
9622 01:02:59.956920 INFO: [APUAPC] vio 0
9623 01:02:59.963290 INFO: [APUAPC] set_apusys_ao_apc - SUCCESS!
9624 01:02:59.966813 INFO: [APUAPC] set_apusys_noc_dapc - SUCCESS!
9625 01:02:59.969769 INFO: [APUAPC] D0_APC_0: 0x400510
9626 01:02:59.973380 INFO: [APUAPC] D0_APC_1: 0x0
9627 01:02:59.976622 INFO: [APUAPC] D0_APC_2: 0x1540
9628 01:02:59.979631 INFO: [APUAPC] D0_APC_3: 0x0
9629 01:02:59.983594 INFO: [APUAPC] D1_APC_0: 0xffffffff
9630 01:02:59.986558 INFO: [APUAPC] D1_APC_1: 0xffffffff
9631 01:02:59.989793 INFO: [APUAPC] D1_APC_2: 0x3fffff
9632 01:02:59.992693 INFO: [APUAPC] D1_APC_3: 0x0
9633 01:02:59.996111 INFO: [APUAPC] D2_APC_0: 0xffffffff
9634 01:02:59.999603 INFO: [APUAPC] D2_APC_1: 0xffffffff
9635 01:03:00.003375 INFO: [APUAPC] D2_APC_2: 0x3fffff
9636 01:03:00.006753 INFO: [APUAPC] D2_APC_3: 0x0
9637 01:03:00.009967 INFO: [APUAPC] D3_APC_0: 0xffffffff
9638 01:03:00.012539 INFO: [APUAPC] D3_APC_1: 0xffffffff
9639 01:03:00.015562 INFO: [APUAPC] D3_APC_2: 0x3fffff
9640 01:03:00.015671 INFO: [APUAPC] D3_APC_3: 0x0
9641 01:03:00.022713 INFO: [APUAPC] D4_APC_0: 0xffffffff
9642 01:03:00.026236 INFO: [APUAPC] D4_APC_1: 0xffffffff
9643 01:03:00.029119 INFO: [APUAPC] D4_APC_2: 0x3fffff
9644 01:03:00.029333 INFO: [APUAPC] D4_APC_3: 0x0
9645 01:03:00.032851 INFO: [APUAPC] D5_APC_0: 0xffffffff
9646 01:03:00.039482 INFO: [APUAPC] D5_APC_1: 0xffffffff
9647 01:03:00.043432 INFO: [APUAPC] D5_APC_2: 0x3fffff
9648 01:03:00.043715 INFO: [APUAPC] D5_APC_3: 0x0
9649 01:03:00.046558 INFO: [APUAPC] D6_APC_0: 0xffffffff
9650 01:03:00.049317 INFO: [APUAPC] D6_APC_1: 0xffffffff
9651 01:03:00.052791 INFO: [APUAPC] D6_APC_2: 0x3fffff
9652 01:03:00.056066 INFO: [APUAPC] D6_APC_3: 0x0
9653 01:03:00.059500 INFO: [APUAPC] D7_APC_0: 0xffffffff
9654 01:03:00.062485 INFO: [APUAPC] D7_APC_1: 0xffffffff
9655 01:03:00.065564 INFO: [APUAPC] D7_APC_2: 0x3fffff
9656 01:03:00.069435 INFO: [APUAPC] D7_APC_3: 0x0
9657 01:03:00.072401 INFO: [APUAPC] D8_APC_0: 0xffffffff
9658 01:03:00.075405 INFO: [APUAPC] D8_APC_1: 0xffffffff
9659 01:03:00.079050 INFO: [APUAPC] D8_APC_2: 0x3fffff
9660 01:03:00.083087 INFO: [APUAPC] D8_APC_3: 0x0
9661 01:03:00.085999 INFO: [APUAPC] D9_APC_0: 0xffffffff
9662 01:03:00.088507 INFO: [APUAPC] D9_APC_1: 0xffffffff
9663 01:03:00.092284 INFO: [APUAPC] D9_APC_2: 0x3fffff
9664 01:03:00.095755 INFO: [APUAPC] D9_APC_3: 0x0
9665 01:03:00.098891 INFO: [APUAPC] D10_APC_0: 0xffffffff
9666 01:03:00.102730 INFO: [APUAPC] D10_APC_1: 0xffffffff
9667 01:03:00.105178 INFO: [APUAPC] D10_APC_2: 0x3fffff
9668 01:03:00.108612 INFO: [APUAPC] D10_APC_3: 0x0
9669 01:03:00.111776 INFO: [APUAPC] D11_APC_0: 0xffffffff
9670 01:03:00.115731 INFO: [APUAPC] D11_APC_1: 0xffffffff
9671 01:03:00.118935 INFO: [APUAPC] D11_APC_2: 0x3fffff
9672 01:03:00.121981 INFO: [APUAPC] D11_APC_3: 0x0
9673 01:03:00.125033 INFO: [APUAPC] D12_APC_0: 0xffffffff
9674 01:03:00.128474 INFO: [APUAPC] D12_APC_1: 0xffffffff
9675 01:03:00.132384 INFO: [APUAPC] D12_APC_2: 0x3fffff
9676 01:03:00.136076 INFO: [APUAPC] D12_APC_3: 0x0
9677 01:03:00.138828 INFO: [APUAPC] D13_APC_0: 0xffffffff
9678 01:03:00.141515 INFO: [APUAPC] D13_APC_1: 0xffffffff
9679 01:03:00.145271 INFO: [APUAPC] D13_APC_2: 0x3fffff
9680 01:03:00.148557 INFO: [APUAPC] D13_APC_3: 0x0
9681 01:03:00.152463 INFO: [APUAPC] D14_APC_0: 0xffffffff
9682 01:03:00.154639 INFO: [APUAPC] D14_APC_1: 0xffffffff
9683 01:03:00.158374 INFO: [APUAPC] D14_APC_2: 0x3fffff
9684 01:03:00.161382 INFO: [APUAPC] D14_APC_3: 0x0
9685 01:03:00.164676 INFO: [APUAPC] D15_APC_0: 0xffffffff
9686 01:03:00.168894 INFO: [APUAPC] D15_APC_1: 0xffffffff
9687 01:03:00.175369 INFO: [APUAPC] D15_APC_2: 0x3fffff
9688 01:03:00.175937 INFO: [APUAPC] D15_APC_3: 0x0
9689 01:03:00.177900 INFO: [APUAPC] APC_CON: 0x4
9690 01:03:00.181460 INFO: [NOCDAPC] D0_APC_0: 0x0
9691 01:03:00.184516 INFO: [NOCDAPC] D0_APC_1: 0x0
9692 01:03:00.187960 INFO: [NOCDAPC] D1_APC_0: 0x0
9693 01:03:00.191662 INFO: [NOCDAPC] D1_APC_1: 0xfff
9694 01:03:00.194682 INFO: [NOCDAPC] D2_APC_0: 0x0
9695 01:03:00.197475 INFO: [NOCDAPC] D2_APC_1: 0xfff
9696 01:03:00.201405 INFO: [NOCDAPC] D3_APC_0: 0x0
9697 01:03:00.204554 INFO: [NOCDAPC] D3_APC_1: 0xfff
9698 01:03:00.205207 INFO: [NOCDAPC] D4_APC_0: 0x0
9699 01:03:00.207599 INFO: [NOCDAPC] D4_APC_1: 0xfff
9700 01:03:00.210748 INFO: [NOCDAPC] D5_APC_0: 0x0
9701 01:03:00.214174 INFO: [NOCDAPC] D5_APC_1: 0xfff
9702 01:03:00.217244 INFO: [NOCDAPC] D6_APC_0: 0x0
9703 01:03:00.220594 INFO: [NOCDAPC] D6_APC_1: 0xfff
9704 01:03:00.223815 INFO: [NOCDAPC] D7_APC_0: 0x0
9705 01:03:00.227533 INFO: [NOCDAPC] D7_APC_1: 0xfff
9706 01:03:00.231347 INFO: [NOCDAPC] D8_APC_0: 0x0
9707 01:03:00.234826 INFO: [NOCDAPC] D8_APC_1: 0xfff
9708 01:03:00.237462 INFO: [NOCDAPC] D9_APC_0: 0x0
9709 01:03:00.237921 INFO: [NOCDAPC] D9_APC_1: 0xfff
9710 01:03:00.241219 INFO: [NOCDAPC] D10_APC_0: 0x0
9711 01:03:00.244301 INFO: [NOCDAPC] D10_APC_1: 0xfff
9712 01:03:00.247783 INFO: [NOCDAPC] D11_APC_0: 0x0
9713 01:03:00.251464 INFO: [NOCDAPC] D11_APC_1: 0xfff
9714 01:03:00.254604 INFO: [NOCDAPC] D12_APC_0: 0x0
9715 01:03:00.257418 INFO: [NOCDAPC] D12_APC_1: 0xfff
9716 01:03:00.260612 INFO: [NOCDAPC] D13_APC_0: 0x0
9717 01:03:00.263635 INFO: [NOCDAPC] D13_APC_1: 0xfff
9718 01:03:00.267155 INFO: [NOCDAPC] D14_APC_0: 0x0
9719 01:03:00.270402 INFO: [NOCDAPC] D14_APC_1: 0xfff
9720 01:03:00.273432 INFO: [NOCDAPC] D15_APC_0: 0x0
9721 01:03:00.277258 INFO: [NOCDAPC] D15_APC_1: 0xfff
9722 01:03:00.281523 INFO: [NOCDAPC] APC_CON: 0x4
9723 01:03:00.283976 INFO: [APUAPC] set_apusys_apc done
9724 01:03:00.287229 INFO: [DEVAPC] devapc_init done
9725 01:03:00.290722 INFO: GICv3 without legacy support detected.
9726 01:03:00.293767 INFO: ARM GICv3 driver initialized in EL3
9727 01:03:00.297075 INFO: Maximum SPI INTID supported: 639
9728 01:03:00.300026 INFO: BL31: Initializing runtime services
9729 01:03:00.306601 WARNING: BL31: cortex_a55: CPU workaround for 1530923 was missing!
9730 01:03:00.309946 INFO: SPM: enable CPC mode
9731 01:03:00.316621 INFO: mcdi ready for mcusys-off-idle and system suspend
9732 01:03:00.319442 INFO: BL31: Preparing for EL3 exit to normal world
9733 01:03:00.323246 INFO: Entry point address = 0x80000000
9734 01:03:00.326686 INFO: SPSR = 0x8
9735 01:03:00.330958
9736 01:03:00.331544
9737 01:03:00.331941
9738 01:03:00.334442 Starting depthcharge on Spherion...
9739 01:03:00.335054
9740 01:03:00.335419 Wipe memory regions:
9741 01:03:00.335756
9742 01:03:00.338308 end: 2.2.3 depthcharge-start (duration 00:00:28) [common]
9743 01:03:00.338855 start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
9744 01:03:00.339298 Setting prompt string to ['asurada:']
9745 01:03:00.339711 bootloader-commands: Wait for prompt ['asurada:'] (timeout 00:04:26)
9746 01:03:00.340415 [0x00000040000000, 0x00000054600000)
9747 01:03:00.460217
9748 01:03:00.460830 [0x00000054660000, 0x00000080000000)
9749 01:03:00.720895
9750 01:03:00.721452 [0x000000821a7280, 0x000000ffe64000)
9751 01:03:01.464838
9752 01:03:01.465386 [0x00000100000000, 0x00000140000000)
9753 01:03:01.846874
9754 01:03:01.848855 Initializing XHCI USB controller at 0x11200000.
9755 01:03:02.886380
9756 01:03:02.889936 [firmware-asurada-13885.B-collabora] Dec 7 2021 09:38:38
9757 01:03:02.890497
9758 01:03:02.890856
9759 01:03:02.891188
9760 01:03:02.891987 Setting prompt string to ['asurada:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
9762 01:03:02.993385 asurada: tftpboot 192.168.201.1 12571129/tftp-deploy-6oq74fuz/kernel/image.itb 12571129/tftp-deploy-6oq74fuz/kernel/cmdline
9763 01:03:02.994033 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
9764 01:03:02.994522 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:24)
9765 01:03:02.999854 tftpboot 192.168.201.1 12571129/tftp-deploy-6oq74fuz/kernel/image.itp-deploy-6oq74fuz/kernel/cmdline
9766 01:03:03.000419
9767 01:03:03.000822 Waiting for link
9768 01:03:03.160187
9769 01:03:03.160761 R8152: Initializing
9770 01:03:03.161129
9771 01:03:03.163297 Version 9 (ocp_data = 6010)
9772 01:03:03.163854
9773 01:03:03.166427 R8152: Done initializing
9774 01:03:03.166979
9775 01:03:03.167333 Adding net device
9776 01:03:05.048946
9777 01:03:05.049527 done.
9778 01:03:05.049961
9779 01:03:05.050341 MAC: 00:e0:4c:68:03:bd
9780 01:03:05.050677
9781 01:03:05.051330 Sending DHCP discover... done.
9782 01:03:05.051685
9783 01:03:05.054620 Waiting for reply... done.
9784 01:03:05.055062
9785 01:03:05.058010 Sending DHCP request... done.
9786 01:03:05.058458
9787 01:03:05.064421 Waiting for reply... done.
9788 01:03:05.064899
9789 01:03:05.065253 My ip is 192.168.201.16
9790 01:03:05.065579
9791 01:03:05.067103 The DHCP server ip is 192.168.201.1
9792 01:03:05.067564
9793 01:03:05.074335 TFTP server IP predefined by user: 192.168.201.1
9794 01:03:05.074886
9795 01:03:05.080700 Bootfile predefined by user: 12571129/tftp-deploy-6oq74fuz/kernel/image.itb
9796 01:03:05.081304
9797 01:03:05.083899 Sending tftp read request... done.
9798 01:03:05.084389
9799 01:03:05.090238 Waiting for the transfer...
9800 01:03:05.090797
9801 01:03:05.394977 00000000 ################################################################
9802 01:03:05.395117
9803 01:03:05.683711 00080000 ################################################################
9804 01:03:05.683852
9805 01:03:05.970673 00100000 ################################################################
9806 01:03:05.970813
9807 01:03:06.262546 00180000 ################################################################
9808 01:03:06.262683
9809 01:03:06.548212 00200000 ################################################################
9810 01:03:06.548350
9811 01:03:06.800421 00280000 ################################################################
9812 01:03:06.800555
9813 01:03:07.081468 00300000 ################################################################
9814 01:03:07.081609
9815 01:03:07.356018 00380000 ################################################################
9816 01:03:07.356145
9817 01:03:07.616971 00400000 ################################################################
9818 01:03:07.617112
9819 01:03:07.880634 00480000 ################################################################
9820 01:03:07.880817
9821 01:03:08.160616 00500000 ################################################################
9822 01:03:08.160798
9823 01:03:08.415158 00580000 ################################################################
9824 01:03:08.415289
9825 01:03:08.697507 00600000 ################################################################
9826 01:03:08.697647
9827 01:03:08.995935 00680000 ################################################################
9828 01:03:08.996070
9829 01:03:09.255945 00700000 ################################################################
9830 01:03:09.256079
9831 01:03:09.512635 00780000 ################################################################
9832 01:03:09.512815
9833 01:03:09.775674 00800000 ################################################################
9834 01:03:09.775807
9835 01:03:10.056104 00880000 ################################################################
9836 01:03:10.056239
9837 01:03:10.334979 00900000 ################################################################
9838 01:03:10.335161
9839 01:03:10.627028 00980000 ################################################################
9840 01:03:10.627170
9841 01:03:10.913930 00a00000 ################################################################
9842 01:03:10.914068
9843 01:03:11.206302 00a80000 ################################################################
9844 01:03:11.206435
9845 01:03:11.481362 00b00000 ################################################################
9846 01:03:11.481497
9847 01:03:11.733401 00b80000 ################################################################
9848 01:03:11.733528
9849 01:03:12.001947 00c00000 ################################################################
9850 01:03:12.002089
9851 01:03:12.285368 00c80000 ################################################################
9852 01:03:12.285501
9853 01:03:12.561664 00d00000 ################################################################
9854 01:03:12.561798
9855 01:03:12.830552 00d80000 ################################################################
9856 01:03:12.830682
9857 01:03:13.115772 00e00000 ################################################################
9858 01:03:13.115910
9859 01:03:13.408628 00e80000 ################################################################
9860 01:03:13.408813
9861 01:03:13.679093 00f00000 ################################################################
9862 01:03:13.679225
9863 01:03:13.929511 00f80000 ################################################################
9864 01:03:13.929641
9865 01:03:14.182247 01000000 ################################################################
9866 01:03:14.182376
9867 01:03:14.475847 01080000 ################################################################
9868 01:03:14.475977
9869 01:03:14.741267 01100000 ################################################################
9870 01:03:14.741403
9871 01:03:15.004126 01180000 ################################################################
9872 01:03:15.004257
9873 01:03:15.264384 01200000 ################################################################
9874 01:03:15.264521
9875 01:03:15.523048 01280000 ################################################################
9876 01:03:15.523183
9877 01:03:15.812831 01300000 ################################################################
9878 01:03:15.812966
9879 01:03:16.063497 01380000 ################################################################
9880 01:03:16.063630
9881 01:03:16.316886 01400000 ################################################################
9882 01:03:16.317010
9883 01:03:16.571740 01480000 ################################################################
9884 01:03:16.571870
9885 01:03:16.826682 01500000 ################################################################
9886 01:03:16.826814
9887 01:03:17.090324 01580000 ################################################################
9888 01:03:17.090460
9889 01:03:17.344570 01600000 ################################################################
9890 01:03:17.344702
9891 01:03:17.595511 01680000 ################################################################
9892 01:03:17.595678
9893 01:03:17.846707 01700000 ################################################################
9894 01:03:17.846833
9895 01:03:18.109169 01780000 ################################################################
9896 01:03:18.109306
9897 01:03:18.364173 01800000 ################################################################
9898 01:03:18.364321
9899 01:03:18.615467 01880000 ################################################################
9900 01:03:18.615596
9901 01:03:18.872565 01900000 ################################################################
9902 01:03:18.872725
9903 01:03:19.148942 01980000 ################################################################
9904 01:03:19.149079
9905 01:03:19.446244 01a00000 ################################################################
9906 01:03:19.446382
9907 01:03:19.715228 01a80000 ################################################################
9908 01:03:19.715366
9909 01:03:19.986838 01b00000 ################################################################
9910 01:03:19.986976
9911 01:03:20.261747 01b80000 ################################################################
9912 01:03:20.261894
9913 01:03:20.529718 01c00000 ################################################################
9914 01:03:20.529852
9915 01:03:20.823973 01c80000 ################################################################
9916 01:03:20.824113
9917 01:03:21.120807 01d00000 ################################################################
9918 01:03:21.120944
9919 01:03:21.417053 01d80000 ################################################################
9920 01:03:21.417201
9921 01:03:21.670746 01e00000 ################################################################
9922 01:03:21.670880
9923 01:03:21.955436 01e80000 ################################################################
9924 01:03:21.955571
9925 01:03:22.248353 01f00000 ################################################################
9926 01:03:22.248486
9927 01:03:22.512284 01f80000 ################################################################
9928 01:03:22.512427
9929 01:03:22.762750 02000000 ################################################################
9930 01:03:22.762886
9931 01:03:23.047137 02080000 ################################################################
9932 01:03:23.047287
9933 01:03:23.309928 02100000 ################################################################
9934 01:03:23.310071
9935 01:03:23.559763 02180000 ################################################################
9936 01:03:23.559903
9937 01:03:23.810929 02200000 ################################################################
9938 01:03:23.811060
9939 01:03:24.062014 02280000 ################################################################
9940 01:03:24.062180
9941 01:03:24.313536 02300000 ################################################################
9942 01:03:24.313668
9943 01:03:24.569854 02380000 ################################################################
9944 01:03:24.570013
9945 01:03:24.821729 02400000 ################################################################
9946 01:03:24.821892
9947 01:03:25.101007 02480000 ################################################################
9948 01:03:25.101139
9949 01:03:25.391465 02500000 ################################################################
9950 01:03:25.391622
9951 01:03:25.676623 02580000 ################################################################
9952 01:03:25.676824
9953 01:03:25.964629 02600000 ################################################################
9954 01:03:25.964816
9955 01:03:26.241579 02680000 ################################################################
9956 01:03:26.241734
9957 01:03:26.523699 02700000 ################################################################
9958 01:03:26.523836
9959 01:03:26.793092 02780000 ################################################################
9960 01:03:26.793251
9961 01:03:27.044216 02800000 ################################################################
9962 01:03:27.044368
9963 01:03:27.295851 02880000 ################################################################
9964 01:03:27.295998
9965 01:03:27.576509 02900000 ################################################################
9966 01:03:27.576672
9967 01:03:27.876610 02980000 ################################################################
9968 01:03:27.877208
9969 01:03:28.181341 02a00000 ################################################################
9970 01:03:28.181478
9971 01:03:28.475202 02a80000 ################################################################
9972 01:03:28.475335
9973 01:03:28.748543 02b00000 ################################################################
9974 01:03:28.748688
9975 01:03:29.042359 02b80000 ################################################################
9976 01:03:29.042499
9977 01:03:29.319536 02c00000 ################################################################
9978 01:03:29.319695
9979 01:03:29.595558 02c80000 ################################################################
9980 01:03:29.595711
9981 01:03:29.879106 02d00000 ################################################################
9982 01:03:29.879263
9983 01:03:30.137799 02d80000 ################################################################
9984 01:03:30.137971
9985 01:03:30.392531 02e00000 ################################################################
9986 01:03:30.392684
9987 01:03:30.681895 02e80000 ################################################################
9988 01:03:30.682039
9989 01:03:30.933079 02f00000 ################################################################
9990 01:03:30.933217
9991 01:03:31.208415 02f80000 ################################################################
9992 01:03:31.208558
9993 01:03:31.505145 03000000 ################################################################
9994 01:03:31.505283
9995 01:03:31.791959 03080000 ################################################################
9996 01:03:31.792096
9997 01:03:32.055094 03100000 ################################################################
9998 01:03:32.055225
9999 01:03:32.326519 03180000 ################################################################
10000 01:03:32.326657
10001 01:03:32.577404 03200000 ################################################################
10002 01:03:32.577537
10003 01:03:32.840115 03280000 ################################################################
10004 01:03:32.840252
10005 01:03:33.108848 03300000 ################################################################
10006 01:03:33.108982
10007 01:03:33.389644 03380000 ################################################################
10008 01:03:33.389785
10009 01:03:33.679478 03400000 ################################################################
10010 01:03:33.679619
10011 01:03:33.943366 03480000 ################################################################
10012 01:03:33.943503
10013 01:03:34.215045 03500000 ################################################################
10014 01:03:34.215182
10015 01:03:34.508974 03580000 ################################################################
10016 01:03:34.509113
10017 01:03:34.800805 03600000 ################################################################
10018 01:03:34.800938
10019 01:03:35.084256 03680000 ################################################################
10020 01:03:35.084392
10021 01:03:35.376366 03700000 ################################################################
10022 01:03:35.376500
10023 01:03:35.645860 03780000 ################################################################
10024 01:03:35.646001
10025 01:03:35.937724 03800000 ################################################################
10026 01:03:35.937858
10027 01:03:36.210468 03880000 ################################################################
10028 01:03:36.210604
10029 01:03:36.469674 03900000 ################################################################
10030 01:03:36.469814
10031 01:03:36.736837 03980000 ################################################################
10032 01:03:36.736970
10033 01:03:37.021227 03a00000 ################################################################
10034 01:03:37.021361
10035 01:03:37.291855 03a80000 ################################################################
10036 01:03:37.291991
10037 01:03:37.550840 03b00000 ################################################################
10038 01:03:37.550971
10039 01:03:37.824184 03b80000 ################################################################
10040 01:03:37.824318
10041 01:03:38.116261 03c00000 ################################################################
10042 01:03:38.116397
10043 01:03:38.411109 03c80000 ################################################################
10044 01:03:38.411247
10045 01:03:38.697698 03d00000 ################################################################
10046 01:03:38.697831
10047 01:03:38.981332 03d80000 ################################################################
10048 01:03:38.981470
10049 01:03:39.269681 03e00000 ################################################################
10050 01:03:39.269818
10051 01:03:39.556999 03e80000 ################################################################
10052 01:03:39.557135
10053 01:03:39.854011 03f00000 ################################################################
10054 01:03:39.854153
10055 01:03:40.138813 03f80000 ################################################################
10056 01:03:40.138976
10057 01:03:40.434991 04000000 ################################################################
10058 01:03:40.435129
10059 01:03:40.732224 04080000 ################################################################
10060 01:03:40.732357
10061 01:03:40.917941 04100000 ############################################## done.
10062 01:03:40.918072
10063 01:03:40.921062 The bootfile was 68530418 bytes long.
10064 01:03:40.921141
10065 01:03:40.925662 Sending tftp read request... done.
10066 01:03:40.925747
10067 01:03:40.928102 Waiting for the transfer...
10068 01:03:40.928191
10069 01:03:40.928262 00000000 # done.
10070 01:03:40.931314
10071 01:03:40.938158 Command line loaded dynamically from TFTP file: 12571129/tftp-deploy-6oq74fuz/kernel/cmdline
10072 01:03:40.938265
10073 01:03:40.952160 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10074 01:03:40.952375
10075 01:03:40.952482 Loading FIT.
10076 01:03:40.952578
10077 01:03:40.955620 Image ramdisk-1 has 56432484 bytes.
10078 01:03:40.955846
10079 01:03:40.958490 Image fdt-1 has 47278 bytes.
10080 01:03:40.958737
10081 01:03:40.961570 Image kernel-1 has 12048624 bytes.
10082 01:03:40.961732
10083 01:03:40.972142 Compat preference: google,spherion-rev3-sku1 google,spherion-rev3 google,spherion-sku1 google,spherion
10084 01:03:40.972457
10085 01:03:40.988768 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,spherion-rev3 (match) google,spherion-rev2 google,spherion-rev1 google,spherion-rev0 google,spherion mediatek,mt8192
10086 01:03:40.989328
10087 01:03:40.994701 Choosing best match conf-1 for compat google,spherion-rev3.
10088 01:03:40.995180
10089 01:03:41.002506 Connected to device vid:did:rid of 1ae0:0028:00
10090 01:03:41.010224
10091 01:03:41.013129 tpm_get_response: command 0x17b, return code 0x0
10092 01:03:41.013585
10093 01:03:41.015568 ec_init: CrosEC protocol v3 supported (256, 248)
10094 01:03:41.020645
10095 01:03:41.023131 tpm_cleanup: add release locality here.
10096 01:03:41.023594
10097 01:03:41.023953 Shutting down all USB controllers.
10098 01:03:41.026517
10099 01:03:41.026973 Removing current net device
10100 01:03:41.027336
10101 01:03:41.033186 Exiting depthcharge with code 4 at timestamp: 68934446
10102 01:03:41.033639
10103 01:03:41.036367 LZMA decompressing kernel-1 to 0x821a6718
10104 01:03:41.036863
10105 01:03:41.040282 LZMA decompressing kernel-1 to 0x40000000
10106 01:03:42.537702
10107 01:03:42.538251 jumping to kernel
10108 01:03:42.540417 end: 2.2.4 bootloader-commands (duration 00:00:42) [common]
10109 01:03:42.540986 start: 2.2.5 auto-login-action (timeout 00:03:44) [common]
10110 01:03:42.541403 Setting prompt string to ['Linux version [0-9]']
10111 01:03:42.541785 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10112 01:03:42.542217 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
10113 01:03:42.589000
10114 01:03:42.592857 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050]
10115 01:03:42.596004 start: 2.2.5.1 login-action (timeout 00:03:44) [common]
10116 01:03:42.596567 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
10117 01:03:42.597016 Setting prompt string to []
10118 01:03:42.597442 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
10119 01:03:42.597849 Using line separator: #'\n'#
10120 01:03:42.598202 No login prompt set.
10121 01:03:42.598535 Parsing kernel messages
10122 01:03:42.598840 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
10123 01:03:42.599386 [login-action] Waiting for messages, (timeout 00:03:44)
10124 01:03:42.616420 [ 0.000000] Linux version 6.1.72-cip13 (KernelCI@build-j81675-arm64-gcc-10-defconfig-arm64-chromebook-jxb7j) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Fri Jan 19 00:37:44 UTC 2024
10125 01:03:42.618457 [ 0.000000] random: crng init done
10126 01:03:42.625536 [ 0.000000] Machine model: Google Spherion (rev0 - 3)
10127 01:03:42.628186 [ 0.000000] efi: UEFI not found.
10128 01:03:42.634915 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
10129 01:03:42.641853 [ 0.000000] OF: reserved mem: initialized node scp@50000000, compatible id shared-dma-pool
10130 01:03:42.651678 [ 0.000000] software IO TLB: Reserved memory: created restricted DMA pool at 0x00000000c0000000, size 64 MiB
10131 01:03:42.662082 [ 0.000000] OF: reserved mem: initialized node wifi@c0000000, compatible id restricted-dma-pool
10132 01:03:42.668103 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
10133 01:03:42.674648 [ 0.000000] printk: bootconsole [mtk8250] enabled
10134 01:03:42.681823 [ 0.000000] NUMA: No NUMA configuration found
10135 01:03:42.688143 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
10136 01:03:42.692348 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7d5a00-0x13f7d7fff]
10137 01:03:42.695128 [ 0.000000] Zone ranges:
10138 01:03:42.701153 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
10139 01:03:42.704815 [ 0.000000] DMA32 empty
10140 01:03:42.711929 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
10141 01:03:42.714669 [ 0.000000] Movable zone start for each node
10142 01:03:42.718314 [ 0.000000] Early memory node ranges
10143 01:03:42.724295 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
10144 01:03:42.731252 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
10145 01:03:42.737215 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
10146 01:03:42.743646 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
10147 01:03:42.750277 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
10148 01:03:42.757245 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
10149 01:03:42.787822 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
10150 01:03:42.794147 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
10151 01:03:42.801014 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
10152 01:03:42.804310 [ 0.000000] psci: probing for conduit method from DT.
10153 01:03:42.811102 [ 0.000000] psci: PSCIv1.1 detected in firmware.
10154 01:03:42.814672 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
10155 01:03:42.821249 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
10156 01:03:42.823885 [ 0.000000] psci: SMC Calling Convention v1.2
10157 01:03:42.831078 [ 0.000000] percpu: Embedded 21 pages/cpu s45224 r8192 d32600 u86016
10158 01:03:42.833568 [ 0.000000] Detected VIPT I-cache on CPU0
10159 01:03:42.840700 [ 0.000000] CPU features: detected: GIC system register CPU interface
10160 01:03:42.846953 [ 0.000000] CPU features: detected: Virtualization Host Extensions
10161 01:03:42.853758 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
10162 01:03:42.860084 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
10163 01:03:42.870155 [ 0.000000] CPU features: detected: Qualcomm erratum 1009, or ARM erratum 1286807, 2441009
10164 01:03:42.877127 [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
10165 01:03:42.880289 [ 0.000000] alternatives: applying boot alternatives
10166 01:03:42.886882 [ 0.000000] Fallback order for Node 0: 0
10167 01:03:42.893346 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
10168 01:03:42.897100 [ 0.000000] Policy zone: Normal
10169 01:03:42.911102 [ 0.000000] Kernel command line: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10170 01:03:42.919116 <5>[ 0.000000] Unknown kernel command line parameters "tftpserverip=192.168.201.1", will be passed to user space.
10171 01:03:42.930235 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
10172 01:03:42.940993 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
10173 01:03:42.947251 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
10174 01:03:42.950589 <6>[ 0.000000] software IO TLB: area num 8.
10175 01:03:43.005962 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
10176 01:03:43.086114 <6>[ 0.000000] Memory: 3797736K/4191232K available (17984K kernel code, 4116K rwdata, 19604K rodata, 8448K init, 615K bss, 360728K reserved, 32768K cma-reserved)
10177 01:03:43.092635 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
10178 01:03:43.099266 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
10179 01:03:43.102364 <6>[ 0.000000] rcu: RCU event tracing is enabled.
10180 01:03:43.108494 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
10181 01:03:43.115183 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
10182 01:03:43.118426 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
10183 01:03:43.128686 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
10184 01:03:43.135616 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
10185 01:03:43.142217 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
10186 01:03:43.149558 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
10187 01:03:43.151328 <6>[ 0.000000] GICv3: 608 SPIs implemented
10188 01:03:43.155422 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
10189 01:03:43.163698 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
10190 01:03:43.164809 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
10191 01:03:43.171487 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c040000
10192 01:03:43.184618 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@100[1] /cpus/cpu@200[2] /cpus/cpu@300[3] }
10193 01:03:43.197684 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@400[4] /cpus/cpu@500[5] /cpus/cpu@600[6] /cpus/cpu@700[7] }
10194 01:03:43.204278 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
10195 01:03:43.212900 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
10196 01:03:43.225906 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
10197 01:03:43.232551 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
10198 01:03:43.239399 <6>[ 0.009186] Console: colour dummy device 80x25
10199 01:03:43.248524 <6>[ 0.013910] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
10200 01:03:43.255540 <6>[ 0.024351] pid_max: default: 32768 minimum: 301
10201 01:03:43.259150 <6>[ 0.029251] LSM: Security Framework initializing
10202 01:03:43.265999 <6>[ 0.034165] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
10203 01:03:43.275454 <6>[ 0.041772] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
10204 01:03:43.281983 <6>[ 0.051001] cblist_init_generic: Setting adjustable number of callback queues.
10205 01:03:43.288246 <6>[ 0.058443] cblist_init_generic: Setting shift to 3 and lim to 1.
10206 01:03:43.298264 <6>[ 0.064782] cblist_init_generic: Setting adjustable number of callback queues.
10207 01:03:43.301766 <6>[ 0.072255] cblist_init_generic: Setting shift to 3 and lim to 1.
10208 01:03:43.308437 <6>[ 0.078694] rcu: Hierarchical SRCU implementation.
10209 01:03:43.314700 <6>[ 0.083709] rcu: Max phase no-delay instances is 1000.
10210 01:03:43.321695 <6>[ 0.090738] EFI services will not be available.
10211 01:03:43.324387 <6>[ 0.095690] smp: Bringing up secondary CPUs ...
10212 01:03:43.332796 <6>[ 0.100735] Detected VIPT I-cache on CPU1
10213 01:03:43.339481 <6>[ 0.100804] GICv3: CPU1: found redistributor 100 region 0:0x000000000c060000
10214 01:03:43.345790 <6>[ 0.100834] CPU1: Booted secondary processor 0x0000000100 [0x412fd050]
10215 01:03:43.349091 <6>[ 0.101162] Detected VIPT I-cache on CPU2
10216 01:03:43.359078 <6>[ 0.101209] GICv3: CPU2: found redistributor 200 region 0:0x000000000c080000
10217 01:03:43.366463 <6>[ 0.101224] CPU2: Booted secondary processor 0x0000000200 [0x412fd050]
10218 01:03:43.368884 <6>[ 0.101476] Detected VIPT I-cache on CPU3
10219 01:03:43.376039 <6>[ 0.101522] GICv3: CPU3: found redistributor 300 region 0:0x000000000c0a0000
10220 01:03:43.382479 <6>[ 0.101536] CPU3: Booted secondary processor 0x0000000300 [0x412fd050]
10221 01:03:43.385472 <6>[ 0.101837] CPU features: detected: Spectre-v4
10222 01:03:43.392012 <6>[ 0.101843] CPU features: detected: Spectre-BHB
10223 01:03:43.395686 <6>[ 0.101848] Detected PIPT I-cache on CPU4
10224 01:03:43.402213 <6>[ 0.101903] GICv3: CPU4: found redistributor 400 region 0:0x000000000c0c0000
10225 01:03:43.410007 <6>[ 0.101919] CPU4: Booted secondary processor 0x0000000400 [0x414fd0b0]
10226 01:03:43.415550 <6>[ 0.102208] Detected PIPT I-cache on CPU5
10227 01:03:43.421642 <6>[ 0.102271] GICv3: CPU5: found redistributor 500 region 0:0x000000000c0e0000
10228 01:03:43.428312 <6>[ 0.102290] CPU5: Booted secondary processor 0x0000000500 [0x414fd0b0]
10229 01:03:43.431776 <6>[ 0.102569] Detected PIPT I-cache on CPU6
10230 01:03:43.438709 <6>[ 0.102629] GICv3: CPU6: found redistributor 600 region 0:0x000000000c100000
10231 01:03:43.447975 <6>[ 0.102646] CPU6: Booted secondary processor 0x0000000600 [0x414fd0b0]
10232 01:03:43.451823 <6>[ 0.102945] Detected PIPT I-cache on CPU7
10233 01:03:43.458041 <6>[ 0.103008] GICv3: CPU7: found redistributor 700 region 0:0x000000000c120000
10234 01:03:43.464677 <6>[ 0.103024] CPU7: Booted secondary processor 0x0000000700 [0x414fd0b0]
10235 01:03:43.467830 <6>[ 0.103072] smp: Brought up 1 node, 8 CPUs
10236 01:03:43.475445 <6>[ 0.244341] SMP: Total of 8 processors activated.
10237 01:03:43.477671 <6>[ 0.249262] CPU features: detected: 32-bit EL0 Support
10238 01:03:43.487670 <6>[ 0.254625] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
10239 01:03:43.495512 <6>[ 0.263424] CPU features: detected: Common not Private translations
10240 01:03:43.501074 <6>[ 0.269900] CPU features: detected: CRC32 instructions
10241 01:03:43.507386 <6>[ 0.275251] CPU features: detected: RCpc load-acquire (LDAPR)
10242 01:03:43.510559 <6>[ 0.281211] CPU features: detected: LSE atomic instructions
10243 01:03:43.517426 <6>[ 0.286992] CPU features: detected: Privileged Access Never
10244 01:03:43.524273 <6>[ 0.292807] CPU features: detected: RAS Extension Support
10245 01:03:43.530547 <6>[ 0.298416] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
10246 01:03:43.533619 <6>[ 0.305637] CPU: All CPU(s) started at EL2
10247 01:03:43.540303 <6>[ 0.309981] alternatives: applying system-wide alternatives
10248 01:03:43.549715 <6>[ 0.319839] devtmpfs: initialized
10249 01:03:43.564336 <6>[ 0.328136] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
10250 01:03:43.571018 <6>[ 0.338101] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
10251 01:03:43.577835 <6>[ 0.346344] pinctrl core: initialized pinctrl subsystem
10252 01:03:43.581052 <6>[ 0.352992] DMI not present or invalid.
10253 01:03:43.587274 <6>[ 0.357399] NET: Registered PF_NETLINK/PF_ROUTE protocol family
10254 01:03:43.597273 <6>[ 0.364274] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
10255 01:03:43.603401 <6>[ 0.371723] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
10256 01:03:43.614394 <6>[ 0.379817] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
10257 01:03:43.617333 <6>[ 0.387973] audit: initializing netlink subsys (disabled)
10258 01:03:43.627120 <5>[ 0.393673] audit: type=2000 audit(0.280:1): state=initialized audit_enabled=0 res=1
10259 01:03:43.633757 <6>[ 0.394367] thermal_sys: Registered thermal governor 'step_wise'
10260 01:03:43.640242 <6>[ 0.401642] thermal_sys: Registered thermal governor 'power_allocator'
10261 01:03:43.643871 <6>[ 0.407898] cpuidle: using governor menu
10262 01:03:43.650206 <6>[ 0.418862] NET: Registered PF_QIPCRTR protocol family
10263 01:03:43.656596 <6>[ 0.424339] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
10264 01:03:43.663401 <6>[ 0.431445] ASID allocator initialised with 32768 entries
10265 01:03:43.666202 <6>[ 0.437991] Serial: AMBA PL011 UART driver
10266 01:03:43.676278 <4>[ 0.446714] Trying to register duplicate clock ID: 134
10267 01:03:43.732542 <6>[ 0.506141] KASLR enabled
10268 01:03:43.746855 <6>[ 0.513885] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
10269 01:03:43.753653 <6>[ 0.520902] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
10270 01:03:43.759648 <6>[ 0.527393] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
10271 01:03:43.766389 <6>[ 0.534402] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
10272 01:03:43.773447 <6>[ 0.540890] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
10273 01:03:43.780081 <6>[ 0.547899] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
10274 01:03:43.786935 <6>[ 0.554387] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
10275 01:03:43.792795 <6>[ 0.561392] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
10276 01:03:43.796259 <6>[ 0.568831] ACPI: Interpreter disabled.
10277 01:03:43.804477 <6>[ 0.575228] iommu: Default domain type: Translated
10278 01:03:43.811396 <6>[ 0.580379] iommu: DMA domain TLB invalidation policy: strict mode
10279 01:03:43.815713 <5>[ 0.587039] SCSI subsystem initialized
10280 01:03:43.821516 <6>[ 0.591292] usbcore: registered new interface driver usbfs
10281 01:03:43.828334 <6>[ 0.597027] usbcore: registered new interface driver hub
10282 01:03:43.830893 <6>[ 0.602579] usbcore: registered new device driver usb
10283 01:03:43.838310 <6>[ 0.608693] pps_core: LinuxPPS API ver. 1 registered
10284 01:03:43.848359 <6>[ 0.613889] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
10285 01:03:43.851295 <6>[ 0.623235] PTP clock support registered
10286 01:03:43.855270 <6>[ 0.627478] EDAC MC: Ver: 3.0.0
10287 01:03:43.862258 <6>[ 0.632670] FPGA manager framework
10288 01:03:43.869446 <6>[ 0.636348] Advanced Linux Sound Architecture Driver Initialized.
10289 01:03:43.871927 <6>[ 0.643123] vgaarb: loaded
10290 01:03:43.878652 <6>[ 0.646274] clocksource: Switched to clocksource arch_sys_counter
10291 01:03:43.882288 <5>[ 0.652702] VFS: Disk quotas dquot_6.6.0
10292 01:03:43.889058 <6>[ 0.656888] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
10293 01:03:43.892059 <6>[ 0.664082] pnp: PnP ACPI: disabled
10294 01:03:43.900526 <6>[ 0.670800] NET: Registered PF_INET protocol family
10295 01:03:43.907666 <6>[ 0.676184] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
10296 01:03:43.919032 <6>[ 0.686188] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
10297 01:03:43.928842 <6>[ 0.694977] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
10298 01:03:43.936419 <6>[ 0.702945] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
10299 01:03:43.943417 <6>[ 0.711352] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
10300 01:03:43.952576 <6>[ 0.720002] TCP: Hash tables configured (established 32768 bind 32768)
10301 01:03:43.959413 <6>[ 0.726863] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
10302 01:03:43.966711 <6>[ 0.733886] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
10303 01:03:43.972749 <6>[ 0.741413] NET: Registered PF_UNIX/PF_LOCAL protocol family
10304 01:03:43.979135 <6>[ 0.747556] RPC: Registered named UNIX socket transport module.
10305 01:03:43.982463 <6>[ 0.753712] RPC: Registered udp transport module.
10306 01:03:43.989097 <6>[ 0.758646] RPC: Registered tcp transport module.
10307 01:03:43.995748 <6>[ 0.763579] RPC: Registered tcp NFSv4.1 backchannel transport module.
10308 01:03:44.000742 <6>[ 0.770246] PCI: CLS 0 bytes, default 64
10309 01:03:44.002480 <6>[ 0.774574] Unpacking initramfs...
10310 01:03:44.020127 <6>[ 0.786802] hw perfevents: enabled with armv8_cortex_a55 PMU driver, 7 counters available
10311 01:03:44.029806 <6>[ 0.795459] hw perfevents: enabled with armv8_cortex_a76 PMU driver, 7 counters available
10312 01:03:44.032669 <6>[ 0.804298] kvm [1]: IPA Size Limit: 40 bits
10313 01:03:44.039652 <6>[ 0.808829] kvm [1]: GICv3: no GICV resource entry
10314 01:03:44.043347 <6>[ 0.813852] kvm [1]: disabling GICv2 emulation
10315 01:03:44.049672 <6>[ 0.818543] kvm [1]: GIC system register CPU interface enabled
10316 01:03:44.052895 <6>[ 0.824719] kvm [1]: vgic interrupt IRQ18
10317 01:03:44.059539 <6>[ 0.829077] kvm [1]: VHE mode initialized successfully
10318 01:03:44.066181 <5>[ 0.835501] Initialise system trusted keyrings
10319 01:03:44.073106 <6>[ 0.840328] workingset: timestamp_bits=42 max_order=20 bucket_order=0
10320 01:03:44.079515 <6>[ 0.850189] squashfs: version 4.0 (2009/01/31) Phillip Lougher
10321 01:03:44.086486 <5>[ 0.856583] NFS: Registering the id_resolver key type
10322 01:03:44.090038 <5>[ 0.861887] Key type id_resolver registered
10323 01:03:44.096266 <5>[ 0.866303] Key type id_legacy registered
10324 01:03:44.103345 <6>[ 0.870582] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
10325 01:03:44.109710 <6>[ 0.877508] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
10326 01:03:44.115961 <6>[ 0.885261] 9p: Installing v9fs 9p2000 file system support
10327 01:03:44.152507 <5>[ 0.922871] Key type asymmetric registered
10328 01:03:44.155748 <5>[ 0.927211] Asymmetric key parser 'x509' registered
10329 01:03:44.166267 <6>[ 0.932359] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
10330 01:03:44.169475 <6>[ 0.939975] io scheduler mq-deadline registered
10331 01:03:44.172434 <6>[ 0.944761] io scheduler kyber registered
10332 01:03:44.191963 <6>[ 0.961810] EINJ: ACPI disabled.
10333 01:03:44.223341 <4>[ 0.987271] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10334 01:03:44.233313 <4>[ 0.997898] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10335 01:03:44.248703 <6>[ 1.018777] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
10336 01:03:44.256424 <6>[ 1.026834] printk: console [ttyS0] disabled
10337 01:03:44.284890 <6>[ 1.051487] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 255, base_baud = 1625000) is a ST16650V2
10338 01:03:44.291832 <6>[ 1.060966] printk: console [ttyS0] enabled
10339 01:03:44.294242 <6>[ 1.060966] printk: console [ttyS0] enabled
10340 01:03:44.301588 <6>[ 1.069866] printk: bootconsole [mtk8250] disabled
10341 01:03:44.304756 <6>[ 1.069866] printk: bootconsole [mtk8250] disabled
10342 01:03:44.311114 <6>[ 1.081104] SuperH (H)SCI(F) driver initialized
10343 01:03:44.314206 <6>[ 1.086391] msm_serial: driver initialized
10344 01:03:44.328193 <6>[ 1.095347] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14005000
10345 01:03:44.337742 <6>[ 1.103900] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14006000
10346 01:03:44.345218 <6>[ 1.112443] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14007000
10347 01:03:44.354753 <6>[ 1.121074] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@14009000
10348 01:03:44.364621 <6>[ 1.129787] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400a000
10349 01:03:44.371415 <6>[ 1.138501] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@1400b000
10350 01:03:44.381864 <6>[ 1.147042] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@1400c000
10351 01:03:44.388118 <6>[ 1.155835] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14014000
10352 01:03:44.397618 <6>[ 1.164378] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14015000
10353 01:03:44.409101 <6>[ 1.179948] loop: module loaded
10354 01:03:44.416444 <6>[ 1.185917] vgpu11_sshub: Bringing 400000uV into 575000-575000uV
10355 01:03:44.438602 <4>[ 1.209267] mtk-pmic-keys: Failed to locate of_node [id: -1]
10356 01:03:44.446306 <6>[ 1.216280] megasas: 07.719.03.00-rc1
10357 01:03:44.455868 <6>[ 1.226007] spi-nor spi2.0: w25q64jwm (8192 Kbytes)
10358 01:03:44.464672 <6>[ 1.233648] tpm_tis_spi spi1.0: TPM ready IRQ confirmed on attempt 2
10359 01:03:44.480200 <6>[ 1.250360] tpm_tis_spi spi1.0: 2.0 TPM (device-id 0x28, rev-id 0)
10360 01:03:44.536150 <6>[ 1.300286] tpm_tis_spi spi1.0: Cr50 firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2
10361 01:03:46.413242 <6>[ 3.183917] Freeing initrd memory: 55104K
10362 01:03:46.424402 <6>[ 3.194199] mtk-spi-nor 11234000.spi: spi frequency: 52000000 Hz
10363 01:03:46.434242 <6>[ 3.205287] tun: Universal TUN/TAP device driver, 1.6
10364 01:03:46.437684 <6>[ 3.211361] thunder_xcv, ver 1.0
10365 01:03:46.441129 <6>[ 3.214869] thunder_bgx, ver 1.0
10366 01:03:46.443893 <6>[ 3.218367] nicpf, ver 1.0
10367 01:03:46.454631 <6>[ 3.222393] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
10368 01:03:46.457741 <6>[ 3.229869] hns3: Copyright (c) 2017 Huawei Corporation.
10369 01:03:46.465220 <6>[ 3.235457] hclge is initializing
10370 01:03:46.467956 <6>[ 3.239038] e1000: Intel(R) PRO/1000 Network Driver
10371 01:03:46.474511 <6>[ 3.244166] e1000: Copyright (c) 1999-2006 Intel Corporation.
10372 01:03:46.478551 <6>[ 3.250182] e1000e: Intel(R) PRO/1000 Network Driver
10373 01:03:46.484491 <6>[ 3.255398] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
10374 01:03:46.491344 <6>[ 3.261583] igb: Intel(R) Gigabit Ethernet Network Driver
10375 01:03:46.498622 <6>[ 3.267233] igb: Copyright (c) 2007-2014 Intel Corporation.
10376 01:03:46.505371 <6>[ 3.273069] igbvf: Intel(R) Gigabit Virtual Function Network Driver
10377 01:03:46.512039 <6>[ 3.279587] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
10378 01:03:46.515184 <6>[ 3.286052] sky2: driver version 1.30
10379 01:03:46.521054 <6>[ 3.291055] VFIO - User Level meta-driver version: 0.3
10380 01:03:46.528380 <6>[ 3.299289] usbcore: registered new interface driver usb-storage
10381 01:03:46.534860 <6>[ 3.305736] usbcore: registered new device driver onboard-usb-hub
10382 01:03:46.543866 <6>[ 3.314919] mt6397-rtc mt6359-rtc: registered as rtc0
10383 01:03:46.554391 <6>[ 3.320408] mt6397-rtc mt6359-rtc: setting system clock to 2024-01-19T01:03:46 UTC (1705626226)
10384 01:03:46.557312 <6>[ 3.330035] i2c_dev: i2c /dev entries driver
10385 01:03:46.574597 <6>[ 3.341811] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
10386 01:03:46.594978 <6>[ 3.365797] cpu cpu0: EM: created perf domain
10387 01:03:46.598232 <6>[ 3.370717] cpu cpu4: EM: created perf domain
10388 01:03:46.605732 <6>[ 3.376255] sdhci: Secure Digital Host Controller Interface driver
10389 01:03:46.612263 <6>[ 3.382689] sdhci: Copyright(c) Pierre Ossman
10390 01:03:46.619039 <6>[ 3.387600] Synopsys Designware Multimedia Card Interface Driver
10391 01:03:46.625601 <6>[ 3.394199] sdhci-pltfm: SDHCI platform and OF driver helper
10392 01:03:46.628491 <6>[ 3.394275] mmc0: CQHCI version 5.10
10393 01:03:46.634970 <6>[ 3.404542] ledtrig-cpu: registered to indicate activity on CPUs
10394 01:03:46.641971 <6>[ 3.411553] SMCCC: SOC_ID: ID = jep106:0426:8192 Revision = 0x00000000
10395 01:03:46.648375 <6>[ 3.418594] usbcore: registered new interface driver usbhid
10396 01:03:46.652357 <6>[ 3.424415] usbhid: USB HID core driver
10397 01:03:46.658318 <6>[ 3.428612] spi_master spi0: will run message pump with realtime priority
10398 01:03:46.708053 <6>[ 3.471910] input: cros_ec as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input0
10399 01:03:46.726759 <6>[ 3.487352] input: cros_ec_buttons as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input1
10400 01:03:46.730298 <6>[ 3.500923] mmc0: Command Queue Engine enabled
10401 01:03:46.737054 <6>[ 3.501980] cros-ec-spi spi0.0: Chrome EC device registered
10402 01:03:46.743361 <6>[ 3.505678] mmc0: new HS400 Enhanced strobe MMC card at address 0001
10403 01:03:46.747010 <6>[ 3.518659] mmcblk0: mmc0:0001 DA4064 58.2 GiB
10404 01:03:46.756880 <6>[ 3.524359] mt6359-sound mt6359-sound: mt6359_parse_dt() failed to read mic-type-1, use default (0)
10405 01:03:46.763887 <6>[ 3.528543] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
10406 01:03:46.770651 <6>[ 3.534638] NET: Registered PF_PACKET protocol family
10407 01:03:46.773687 <6>[ 3.540908] mmcblk0boot0: mmc0:0001 DA4064 4.00 MiB
10408 01:03:46.780076 <6>[ 3.544976] 9pnet: Installing 9P2000 support
10409 01:03:46.783941 <6>[ 3.550776] mmcblk0boot1: mmc0:0001 DA4064 4.00 MiB
10410 01:03:46.786661 <5>[ 3.554671] Key type dns_resolver registered
10411 01:03:46.794276 <6>[ 3.560536] mmcblk0rpmb: mmc0:0001 DA4064 16.0 MiB, chardev (507:0)
10412 01:03:46.800476 <6>[ 3.564896] registered taskstats version 1
10413 01:03:46.803675 <5>[ 3.575281] Loading compiled-in X.509 certificates
10414 01:03:46.832858 <4>[ 3.597181] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10415 01:03:46.842506 <4>[ 3.607909] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10416 01:03:46.849329 <3>[ 3.618465] debugfs: File 'uA_load' in directory '/' already present!
10417 01:03:46.856695 <3>[ 3.625165] debugfs: File 'min_uV' in directory '/' already present!
10418 01:03:46.862742 <3>[ 3.631832] debugfs: File 'max_uV' in directory '/' already present!
10419 01:03:46.869590 <3>[ 3.638451] debugfs: File 'constraint_flags' in directory '/' already present!
10420 01:03:46.881905 <3>[ 3.648035] mediatek-mutex 14001000.mutex: error -2 can't parse gce-client-reg property (0)
10421 01:03:46.889871 <6>[ 3.660839] xhci-mtk 11200000.usb: uwk - reg:0x420, version:102
10422 01:03:46.898145 <6>[ 3.667834] xhci-mtk 11200000.usb: xHCI Host Controller
10423 01:03:46.903959 <6>[ 3.673350] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
10424 01:03:46.914080 <6>[ 3.681182] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
10425 01:03:46.921013 <6>[ 3.690598] xhci-mtk 11200000.usb: irq 271, io mem 0x11200000
10426 01:03:46.926964 <6>[ 3.696653] xhci-mtk 11200000.usb: xHCI Host Controller
10427 01:03:46.933501 <6>[ 3.702127] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
10428 01:03:46.940580 <6>[ 3.709773] xhci-mtk 11200000.usb: Host supports USB 3.1 Enhanced SuperSpeed
10429 01:03:46.948449 <6>[ 3.717386] hub 1-0:1.0: USB hub found
10430 01:03:46.949853 <6>[ 3.721392] hub 1-0:1.0: 1 port detected
10431 01:03:46.956608 <6>[ 3.725663] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
10432 01:03:46.964089 <6>[ 3.734326] hub 2-0:1.0: USB hub found
10433 01:03:46.967683 <6>[ 3.738339] hub 2-0:1.0: 1 port detected
10434 01:03:46.976511 <6>[ 3.746920] mtk-msdc 11f70000.mmc: Got CD GPIO
10435 01:03:46.988272 <6>[ 3.754207] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_resume()
10436 01:03:46.993312 <6>[ 3.762242] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_enable_clock()
10437 01:03:47.003159 <4>[ 3.770121] mt8192-audio 11210000.syscon:mt8192-afe-pcm: No cache defaults, reading back from HW
10438 01:03:47.013599 <6>[ 3.779641] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_suspend()
10439 01:03:47.019959 <6>[ 3.787717] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_disable_clock()
10440 01:03:47.026958 <6>[ 3.795740] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_adda_register()
10441 01:03:47.036170 <6>[ 3.803651] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_pcm_register()
10442 01:03:47.042978 <6>[ 3.811467] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_tdm_register()
10443 01:03:47.053448 <6>[ 3.819282] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 39
10444 01:03:47.062785 <6>[ 3.829663] mtk-iommu 1401d000.m4u: bound 14003000.larb (ops mtk_smi_larb_component_ops)
10445 01:03:47.069807 <6>[ 3.838020] mtk-iommu 1401d000.m4u: bound 14004000.larb (ops mtk_smi_larb_component_ops)
10446 01:03:47.079802 <6>[ 3.846379] mtk-iommu 1401d000.m4u: bound 1f002000.larb (ops mtk_smi_larb_component_ops)
10447 01:03:47.085598 <6>[ 3.854717] mtk-iommu 1401d000.m4u: bound 1602e000.larb (ops mtk_smi_larb_component_ops)
10448 01:03:47.096479 <6>[ 3.863056] mtk-iommu 1401d000.m4u: bound 1600d000.larb (ops mtk_smi_larb_component_ops)
10449 01:03:47.102330 <6>[ 3.871394] mtk-iommu 1401d000.m4u: bound 17010000.larb (ops mtk_smi_larb_component_ops)
10450 01:03:47.112836 <6>[ 3.879733] mtk-iommu 1401d000.m4u: bound 1502e000.larb (ops mtk_smi_larb_component_ops)
10451 01:03:47.123035 <6>[ 3.888070] mtk-iommu 1401d000.m4u: bound 1582e000.larb (ops mtk_smi_larb_component_ops)
10452 01:03:47.128668 <6>[ 3.896421] mtk-iommu 1401d000.m4u: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
10453 01:03:47.138467 <6>[ 3.904760] mtk-iommu 1401d000.m4u: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
10454 01:03:47.145023 <6>[ 3.913099] mtk-iommu 1401d000.m4u: bound 1a00f000.larb (ops mtk_smi_larb_component_ops)
10455 01:03:47.155018 <6>[ 3.921436] mtk-iommu 1401d000.m4u: bound 1a010000.larb (ops mtk_smi_larb_component_ops)
10456 01:03:47.161555 <6>[ 3.929775] mtk-iommu 1401d000.m4u: bound 1a011000.larb (ops mtk_smi_larb_component_ops)
10457 01:03:47.171931 <6>[ 3.938113] mtk-iommu 1401d000.m4u: bound 1b10f000.larb (ops mtk_smi_larb_component_ops)
10458 01:03:47.178412 <6>[ 3.946450] mtk-iommu 1401d000.m4u: bound 1b00f000.larb (ops mtk_smi_larb_component_ops)
10459 01:03:47.185142 <6>[ 3.955204] mediatek-disp-ovl 14005000.ovl: Adding to iommu group 0
10460 01:03:47.191778 <6>[ 3.962331] mediatek-disp-ovl 14006000.ovl: Adding to iommu group 0
10461 01:03:47.198820 <6>[ 3.969070] mediatek-disp-ovl 14014000.ovl: Adding to iommu group 0
10462 01:03:47.208106 <6>[ 3.975798] mediatek-disp-rdma 14007000.rdma: Adding to iommu group 0
10463 01:03:47.215559 <6>[ 3.982706] mediatek-disp-rdma 14015000.rdma: Adding to iommu group 0
10464 01:03:47.221440 <6>[ 3.989558] mediatek-drm mediatek-drm.1.auto: bound 14005000.ovl (ops mtk_disp_ovl_component_ops)
10465 01:03:47.231281 <6>[ 3.998687] mediatek-drm mediatek-drm.1.auto: bound 14006000.ovl (ops mtk_disp_ovl_component_ops)
10466 01:03:47.240928 <6>[ 4.007806] mediatek-drm mediatek-drm.1.auto: bound 14007000.rdma (ops mtk_disp_rdma_component_ops)
10467 01:03:47.251237 <6>[ 4.017099] mediatek-drm mediatek-drm.1.auto: bound 14009000.color (ops mtk_disp_color_component_ops)
10468 01:03:47.261049 <6>[ 4.026565] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ccorr (ops mtk_disp_ccorr_component_ops)
10469 01:03:47.267294 <6>[ 4.036032] mediatek-drm mediatek-drm.1.auto: bound 1400b000.aal (ops mtk_disp_aal_component_ops)
10470 01:03:47.278008 <6>[ 4.045150] mediatek-drm mediatek-drm.1.auto: bound 1400c000.gamma (ops mtk_disp_gamma_component_ops)
10471 01:03:47.287585 <6>[ 4.054615] mediatek-drm mediatek-drm.1.auto: bound 14014000.ovl (ops mtk_disp_ovl_component_ops)
10472 01:03:47.297663 <6>[ 4.063738] mediatek-drm mediatek-drm.1.auto: bound 14015000.rdma (ops mtk_disp_rdma_component_ops)
10473 01:03:47.307745 <6>[ 4.073032] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 14 is disabled or missing
10474 01:03:47.317675 <6>[ 4.083192] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 10 is disabled or missing
10475 01:03:47.327330 <6>[ 4.095145] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 0
10476 01:03:47.374836 <6>[ 4.142540] usb 1-1: new high-speed USB device number 2 using xhci-mtk
10477 01:03:47.529871 <6>[ 4.300368] hub 1-1:1.0: USB hub found
10478 01:03:47.532584 <6>[ 4.304887] hub 1-1:1.0: 4 ports detected
10479 01:03:47.542338 <6>[ 4.313597] hub 1-1:1.0: USB hub found
10480 01:03:47.546129 <6>[ 4.317975] hub 1-1:1.0: 4 ports detected
10481 01:03:47.655413 <6>[ 4.422886] usb 2-1: new SuperSpeed USB device number 2 using xhci-mtk
10482 01:03:47.681912 <6>[ 4.452462] hub 2-1:1.0: USB hub found
10483 01:03:47.685172 <6>[ 4.456964] hub 2-1:1.0: 3 ports detected
10484 01:03:47.693864 <6>[ 4.464994] hub 2-1:1.0: USB hub found
10485 01:03:47.697147 <6>[ 4.469439] hub 2-1:1.0: 3 ports detected
10486 01:03:47.871168 <6>[ 4.638569] usb 1-1.4: new high-speed USB device number 3 using xhci-mtk
10487 01:03:48.004037 <6>[ 4.774292] hub 1-1.4:1.0: USB hub found
10488 01:03:48.006502 <6>[ 4.778856] hub 1-1.4:1.0: 2 ports detected
10489 01:03:48.014502 <6>[ 4.785525] hub 1-1.4:1.0: USB hub found
10490 01:03:48.017949 <6>[ 4.790009] hub 1-1.4:1.0: 2 ports detected
10491 01:03:48.087219 <6>[ 4.854695] usb 2-1.3: new SuperSpeed USB device number 3 using xhci-mtk
10492 01:03:48.315091 <6>[ 5.082583] usb 1-1.4.1: new high-speed USB device number 4 using xhci-mtk
10493 01:03:48.506905 <6>[ 5.274553] usb 1-1.4.2: new high-speed USB device number 5 using xhci-mtk
10494 01:03:59.624179 <6>[ 16.399627] ALSA device list:
10495 01:03:59.630395 <6>[ 16.402914] No soundcards found.
10496 01:03:59.638539 <6>[ 16.410775] Freeing unused kernel memory: 8448K
10497 01:03:59.641643 <6>[ 16.415763] Run /init as init process
10498 01:03:59.688000 <6>[ 16.459958] NET: Registered PF_INET6 protocol family
10499 01:03:59.694088 <6>[ 16.466151] Segment Routing with IPv6
10500 01:03:59.697670 <6>[ 16.470095] In-situ OAM (IOAM) with IPv6
10501 01:03:59.731875 <30>[ 16.484138] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
10502 01:03:59.734423 <30>[ 16.507887] systemd[1]: Detected architecture arm64.
10503 01:03:59.734898
10504 01:03:59.741062 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
10505 01:03:59.741611
10506 01:03:59.754902 <30>[ 16.526529] systemd[1]: Set hostname to <debian-bullseye-arm64>.
10507 01:03:59.871032 <30>[ 16.640093] systemd[1]: Queued start job for default target Graphical Interface.
10508 01:03:59.907219 <30>[ 16.679433] systemd[1]: Created slice system-getty.slice.
10509 01:03:59.913970 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
10510 01:03:59.931097 <30>[ 16.703036] systemd[1]: Created slice system-modprobe.slice.
10511 01:03:59.937934 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
10512 01:03:59.954537 <30>[ 16.727149] systemd[1]: Created slice system-serial\x2dgetty.slice.
10513 01:03:59.961988 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
10514 01:03:59.979730 <30>[ 16.752004] systemd[1]: Created slice User and Session Slice.
10515 01:03:59.986352 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
10516 01:04:00.005613 <30>[ 16.775071] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
10517 01:04:00.016138 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
10518 01:04:00.034051 <30>[ 16.803039] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
10519 01:04:00.042068 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
10520 01:04:00.061193 <30>[ 16.826533] systemd[1]: Condition check resulted in Arbitrary Executable File Formats File System Automount Point being skipped.
10521 01:04:00.067889 <30>[ 16.838579] systemd[1]: Reached target Local Encrypted Volumes.
10522 01:04:00.074103 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
10523 01:04:00.090753 <30>[ 16.862993] systemd[1]: Reached target Paths.
10524 01:04:00.097152 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
10525 01:04:00.110085 <30>[ 16.882554] systemd[1]: Reached target Remote File Systems.
10526 01:04:00.116812 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
10527 01:04:00.134622 <30>[ 16.906922] systemd[1]: Reached target Slices.
10528 01:04:00.141394 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
10529 01:04:00.153927 <30>[ 16.926580] systemd[1]: Reached target Swap.
10530 01:04:00.157552 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
10531 01:04:00.177782 <30>[ 16.947061] systemd[1]: Listening on initctl Compatibility Named Pipe.
10532 01:04:00.184482 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
10533 01:04:00.191280 <30>[ 16.962249] systemd[1]: Listening on Journal Audit Socket.
10534 01:04:00.197896 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
10535 01:04:00.210583 <30>[ 16.983033] systemd[1]: Listening on Journal Socket (/dev/log).
10536 01:04:00.217444 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
10537 01:04:00.235381 <30>[ 17.007782] systemd[1]: Listening on Journal Socket.
10538 01:04:00.242389 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
10539 01:04:00.255812 <30>[ 17.027111] systemd[1]: Listening on udev Control Socket.
10540 01:04:00.262010 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
10541 01:04:00.279260 <30>[ 17.051575] systemd[1]: Listening on udev Kernel Socket.
10542 01:04:00.286874 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
10543 01:04:00.342721 <30>[ 17.114732] systemd[1]: Mounting Huge Pages File System...
10544 01:04:00.348932 Mounting [0;1;39mHuge Pages File System[0m...
10545 01:04:00.366295 <30>[ 17.138543] systemd[1]: Mounting POSIX Message Queue File System...
10546 01:04:00.373680 Mounting [0;1;39mPOSIX Message Queue File System[0m...
10547 01:04:00.394166 <30>[ 17.166601] systemd[1]: Mounting Kernel Debug File System...
10548 01:04:00.400576 Mounting [0;1;39mKernel Debug File System[0m...
10549 01:04:00.417485 <30>[ 17.186665] systemd[1]: Condition check resulted in Kernel Trace File System being skipped.
10550 01:04:00.445614 <30>[ 17.214855] systemd[1]: Starting Create list of static device nodes for the current kernel...
10551 01:04:00.452524 Starting [0;1;39mCreate list of st…odes for the current kernel[0m...
10552 01:04:00.474786 <30>[ 17.247241] systemd[1]: Starting Load Kernel Module configfs...
10553 01:04:00.481573 Starting [0;1;39mLoad Kernel Module configfs[0m...
10554 01:04:00.497358 <30>[ 17.268946] systemd[1]: Starting Load Kernel Module drm...
10555 01:04:00.502748 Starting [0;1;39mLoad Kernel Module drm[0m...
10556 01:04:00.521691 <30>[ 17.290877] systemd[1]: Condition check resulted in Set Up Additional Binary Formats being skipped.
10557 01:04:00.570779 <30>[ 17.343242] systemd[1]: Starting Journal Service...
10558 01:04:00.577625 Starting [0;1;39mJournal Service[0m...
10559 01:04:00.595181 <30>[ 17.367668] systemd[1]: Starting Load Kernel Modules...
10560 01:04:00.602085 Starting [0;1;39mLoad Kernel Modules[0m...
10561 01:04:00.621121 <30>[ 17.389691] systemd[1]: Starting Remount Root and Kernel File Systems...
10562 01:04:00.627504 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
10563 01:04:00.644906 <30>[ 17.417414] systemd[1]: Starting Coldplug All udev Devices...
10564 01:04:00.651445 Starting [0;1;39mColdplug All udev Devices[0m...
10565 01:04:00.673633 <30>[ 17.445730] systemd[1]: Started Journal Service.
10566 01:04:00.680458 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
10567 01:04:00.701398 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
10568 01:04:00.719333 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
10569 01:04:00.735220 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
10570 01:04:00.756227 [[0;32m OK [0m] Finished [0;1;39mCreate list of st… nodes for the current kernel[0m.
10571 01:04:00.772522 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
10572 01:04:00.789331 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
10573 01:04:00.808022 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
10574 01:04:00.828045 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
10575 01:04:00.842700 See 'systemctl status systemd-remount-fs.service' for details.
10576 01:04:00.880638 Mounting [0;1;39mKernel Configuration File System[0m...
10577 01:04:00.901131 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
10578 01:04:00.914633 <46>[ 17.683586] systemd-journald[183]: Received client request to flush runtime journal.
10579 01:04:00.922826 Starting [0;1;39mLoad/Save Random Seed[0m...
10580 01:04:00.942590 Starting [0;1;39mApply Kernel Variables[0m...
10581 01:04:00.963832 Starting [0;1;39mCreate System Users[0m...
10582 01:04:00.981756 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
10583 01:04:00.999974 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
10584 01:04:01.023013 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
10585 01:04:01.039879 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
10586 01:04:01.056949 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
10587 01:04:01.072599 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
10588 01:04:01.111041 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
10589 01:04:01.132785 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
10590 01:04:01.147354 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
10591 01:04:01.162444 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
10592 01:04:01.215005 Starting [0;1;39mCreate Volatile Files and Directories[0m...
10593 01:04:01.241355 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
10594 01:04:01.260776 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
10595 01:04:01.280109 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
10596 01:04:01.336414 Starting [0;1;39mNetwork Time Synchronization[0m...
10597 01:04:01.355464 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
10598 01:04:01.398367 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
10599 01:04:01.409553 <6>[ 18.178257] mtk-scp 10500000.scp: assigned reserved memory node scp@50000000
10600 01:04:01.436664 <6>[ 18.208680] remoteproc remoteproc0: scp is available
10601 01:04:01.443173 <6>[ 18.214114] remoteproc remoteproc0: powering up scp
10602 01:04:01.452846 [[0;32m OK [<6>[ 18.219634] remoteproc remoteproc0: Booting fw image mediatek/mt8192/scp.img, size 309164
10603 01:04:01.459029 0m] Finished [0<6>[ 18.229372] mtk-scp 10500000.scp: IPI buf addr 0x000ffdb0
10604 01:04:01.469249 ;1;39mUpdate UTMP about System Boot/Shutdown[0m<6>[ 18.240180] mtk-pcie-gen3 11230000.pcie: host bridge /soc/pcie@11230000 ranges:
10605 01:04:01.469844 .
10606 01:04:01.479573 <3>[ 18.245447] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10607 01:04:01.489712 <6>[ 18.248293] mtk-pcie-gen3 11230000.pcie: MEM 0x0012000000..0x00127fffff -> 0x0012000000
10608 01:04:01.496648 <3>[ 18.256763] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10609 01:04:01.506111 <6>[ 18.265118] mtk-pcie-gen3 11230000.pcie: IO 0x0012800000..0x0012ffffff -> 0x0012800000
10610 01:04:01.512256 <4>[ 18.271681] elants_i2c 4-0010: supply vcc33 not found, using dummy regulator
10611 01:04:01.519037 <3>[ 18.273245] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10612 01:04:01.528552 <4>[ 18.277635] elants_i2c 4-0010: supply vccio not found, using dummy regulator
10613 01:04:01.536177 <3>[ 18.277977] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10614 01:04:01.542043 <3>[ 18.277987] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10615 01:04:01.551704 <3>[ 18.277991] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10616 01:04:01.558887 <3>[ 18.277996] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10617 01:04:01.568252 <3>[ 18.277999] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10618 01:04:01.575290 <3>[ 18.295563] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10619 01:04:01.585576 <6>[ 18.307611] sbs-battery 5-000b: sbs-battery: battery gas gauge device registered
10620 01:04:01.588640 <6>[ 18.314155] mc: Linux media interface: v0.10
10621 01:04:01.597783 <3>[ 18.322693] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10622 01:04:01.605206 <6>[ 18.337676] usbcore: registered new device driver r8152-cfgselector
10623 01:04:01.611786 <3>[ 18.345538] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10624 01:04:01.617638 <6>[ 18.362781] mtk-scp 10500000.scp: creating channel cros-ec-rpmsg addr 0xd
10625 01:04:01.628062 <6>[ 18.366043] mtk-scp 10500000.scp: SCP is ready. FW version asurada_scp_v2.0.20536+a3bcde3e
10626 01:04:01.634557 <6>[ 18.366095] remoteproc remoteproc0: remote processor scp is now up
10627 01:04:01.641394 <3>[ 18.366437] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10628 01:04:01.651455 <3>[ 18.367058] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10629 01:04:01.657650 <3>[ 18.367080] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10630 01:04:01.664437 <3>[ 18.367101] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10631 01:04:01.674735 <3>[ 18.367147] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10632 01:04:01.680893 <3>[ 18.367173] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10633 01:04:01.690739 <3>[ 18.367412] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10634 01:04:01.697450 <6>[ 18.403768] mtk-pcie-gen3 11230000.pcie: PCI host bridge to bus 0000:00
10635 01:04:01.708403 <6>[ 18.407223] elan_i2c 3-0015: Elan Touchpad: Module ID: 0x0128, Firmware: 0x0002, Sample: 0x0004, IAP: 0x0003
10636 01:04:01.714004 <6>[ 18.410785] pci_bus 0000:00: root bus resource [bus 00-ff]
10637 01:04:01.720588 <6>[ 18.412945] input: Elan Touchscreen as /devices/platform/soc/11f00000.i2c/i2c-4/4-0010/input/input2
10638 01:04:01.731213 <6>[ 18.419404] input: Elan Touchpad as /devices/platform/soc/11d21000.i2c/i2c-3/3-0015/input/input3
10639 01:04:01.741025 <6>[ 18.420249] cros-ec-dev cros-ec-dev.10.auto: CrOS System Control Processor MCU detected
10640 01:04:01.747405 <6>[ 18.422037] cros-ec-rpmsg 10500000.scp.cros-ec-rpmsg.13.-1: Chrome EC device registered
10641 01:04:01.753987 <6>[ 18.427480] pci_bus 0000:00: root bus resource [mem 0x12000000-0x127fffff]
10642 01:04:01.764042 <4>[ 18.432110] sbs-battery 5-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
10643 01:04:01.770646 <4>[ 18.432110] Fallback method does not support PEC.
10644 01:04:01.776990 <6>[ 18.436392] r8152-cfgselector 2-1.3: reset SuperSpeed USB device number 3 using xhci-mtk
10645 01:04:01.787671 <6>[ 18.443318] pci_bus 0000:00: root bus resource [io 0x0000-0x7fffff] (bus address [0x12800000-0x12ffffff])
10646 01:04:01.794311 <6>[ 18.443399] pci 0000:00:00.0: [14c3:6786] type 01 class 0x060400
10647 01:04:01.800613 <6>[ 18.444402] videodev: Linux video capture interface: v2.00
10648 01:04:01.803975 <6>[ 18.461111] Bluetooth: Core ver 2.22
10649 01:04:01.810555 <6>[ 18.468410] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit pref]
10650 01:04:01.816940 <6>[ 18.475173] NET: Registered PF_BLUETOOTH protocol family
10651 01:04:01.820423 <6>[ 18.485146] pci 0000:00:00.0: supports D1 D2
10652 01:04:01.826933 <6>[ 18.490651] Bluetooth: HCI device and connection manager initialized
10653 01:04:01.834195 <6>[ 18.499925] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
10654 01:04:01.840940 <6>[ 18.501226] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
10655 01:04:01.847911 <6>[ 18.509263] Bluetooth: HCI socket layer initialized
10656 01:04:01.853799 <6>[ 18.509673] usb 1-1.4.1: Found UVC 1.10 device HD User Facing (04f2:b741)
10657 01:04:01.867013 <6>[ 18.511153] input: HD User Facing: HD User Facing as /devices/platform/soc/11200000.usb/usb1/1-1/1-1.4/1-1.4.1/1-1.4.1:1.0/input/input4
10658 01:04:01.873912 <6>[ 18.511308] usbcore: registered new interface driver uvcvideo
10659 01:04:01.885478 <4>[ 18.514056] r8152 2-1.3:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
10660 01:04:01.890743 <4>[ 18.514064] r8152 2-1.3:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
10661 01:04:01.896512 <6>[ 18.517763] pci 0000:01:00.0: [14c3:7961] type 00 class 0x028000
10662 01:04:01.903398 <6>[ 18.526223] Bluetooth: L2CAP socket layer initialized
10663 01:04:01.909675 <6>[ 18.532699] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit pref]
10664 01:04:01.916258 <6>[ 18.533291] mtk-vcodec-enc 17020000.vcodec: Adding to iommu group 0
10665 01:04:01.920015 <6>[ 18.546495] Bluetooth: SCO socket layer initialized
10666 01:04:01.930387 <6>[ 18.554673] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x00003fff 64bit pref]
10667 01:04:01.933514 <6>[ 18.570553] r8152 2-1.3:1.0 eth0: v1.12.13
10668 01:04:01.941282 <6>[ 18.570832] pci 0000:01:00.0: reg 0x20: [mem 0x00000000-0x00000fff 64bit pref]
10669 01:04:01.945977 <6>[ 18.576662] usbcore: registered new interface driver r8152
10670 01:04:01.952349 <6>[ 18.580489] pci 0000:01:00.0: supports D1 D2
10671 01:04:01.958312 <6>[ 18.612077] usbcore: registered new interface driver cdc_ether
10672 01:04:01.965183 <6>[ 18.619636] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
10673 01:04:01.972346 <3>[ 18.619801] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10674 01:04:01.979147 <6>[ 18.620379] usbcore: registered new interface driver btusb
10675 01:04:01.988875 <4>[ 18.625167] bluetooth hci0: Direct firmware load for mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin failed with error -2
10676 01:04:01.996030 <6>[ 18.630341] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
10677 01:04:02.002145 <6>[ 18.630379] pci 0000:00:00.0: BAR 15: assigned [mem 0x12000000-0x121fffff 64bit pref]
10678 01:04:02.012387 <6>[ 18.630382] pci 0000:00:00.0: BAR 0: assigned [mem 0x12200000-0x12203fff 64bit pref]
10679 01:04:02.019273 <6>[ 18.630390] pci 0000:01:00.0: BAR 0: assigned [mem 0x12000000-0x120fffff 64bit pref]
10680 01:04:02.026959 <6>[ 18.630402] pci 0000:01:00.0: BAR 2: assigned [mem 0x12100000-0x12103fff 64bit pref]
10681 01:04:02.036050 <6>[ 18.630415] pci 0000:01:00.0: BAR 4: assigned [mem 0x12104000-0x12104fff 64bit pref]
10682 01:04:02.040114 <6>[ 18.630427] pci 0000:00:00.0: PCI bridge to [bus 01]
10683 01:04:02.049411 <6>[ 18.630432] pci 0000:00:00.0: bridge window [mem 0x12000000-0x121fffff 64bit pref]
10684 01:04:02.056007 <6>[ 18.630568] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
10685 01:04:02.062129 <6>[ 18.631017] pcieport 0000:00:00.0: PME: Signaling with IRQ 283
10686 01:04:02.065733 <6>[ 18.631468] pcieport 0000:00:00.0: AER: enabled with IRQ 283
10687 01:04:02.072144 <6>[ 18.632482] usbcore: registered new interface driver r8153_ecm
10688 01:04:02.078889 <3>[ 18.644466] Bluetooth: hci0: Failed to load firmware file (-2)
10689 01:04:02.085855 <5>[ 18.652497] cfg80211: Loading compiled-in X.509 certificates for regulatory database
10690 01:04:02.092952 <3>[ 18.659571] Bluetooth: hci0: Failed to set up firmware (-2)
10691 01:04:02.099107 <6>[ 18.669872] r8152 2-1.3:1.0 enx00e04c6803bd: renamed from eth0
10692 01:04:02.109364 <4>[ 18.673939] Bluetooth: hci0: HCI Enhanced Setup Synchronous Connection command is advertised, but not supported.
10693 01:04:02.116250 <5>[ 18.680779] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
10694 01:04:02.126107 <3>[ 18.726896] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10695 01:04:02.132876 <5>[ 18.728380] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
10696 01:04:02.142712 <3>[ 18.728551] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -6
10697 01:04:02.153271 <3>[ 18.746828] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10698 01:04:02.159392 <3>[ 18.747587] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -6
10699 01:04:02.170247 <4>[ 18.756123] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
10700 01:04:02.176846 <3>[ 18.792319] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10701 01:04:02.183859 <6>[ 18.797076] cfg80211: failed to load regulatory.db
10702 01:04:02.190289 <6>[ 18.840161] mt7921e 0000:01:00.0: assigned reserved memory node wifi@c0000000
10703 01:04:02.200128 <3>[ 18.868258] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10704 01:04:02.206283 <6>[ 18.870933] mt7921e 0000:01:00.0: enabling device (0000 -> 0002)
10705 01:04:02.212624 <3>[ 18.895475] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10706 01:04:02.219704 <6>[ 18.923292] mt7921e 0000:01:00.0: ASIC revision: 79610010
10707 01:04:02.230282 <3>[ 18.950520] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10708 01:04:02.232915 [[0;32m OK [0m] Found device [0;1;39m/dev/ttyS0[0m.
10709 01:04:02.259525 <3>[ 19.028863] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10710 01:04:02.284970 <6>[ 19.053915] mt7921e 0000:01:00.0: HW/SW Version: 0x8a108a10, Build Time: 20231109190918a
10711 01:04:02.285555 <6>[ 19.053915]
10712 01:04:02.367108 [[0;32m OK [0m] Created slice [0;1;39msystem-systemd\x2dbacklight.slice[0m.
10713 01:04:02.382320 [[0;32m OK [0m] Reached target [0;1;39mBluetooth[0m.
10714 01:04:02.402367 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
10715 01:04:02.418992 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
10716 01:04:02.441192 [[0;32m OK [0m] Listening on [0;1;39mLoad/Save RF …itch Status /dev/rfkill Watch[0m.
10717 01:04:02.477729 Starting [0;1;39mLoad/Save Screen …of leds:white:kbd_backlight[0m...
10718 01:04:02.494750 Starting [0;1;39mLoad/Save RF Kill Switch Status[0m...
10719 01:04:02.511696 [[0;32m OK [0m] Started [0;1;39mLoad/Save RF Kill Switch Status[0m.
10720 01:04:02.531169 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Screen …s of leds:white:kbd_backlight[0m.
10721 01:04:02.556839 [[0;32m OK [0m] Reached target [0;1;39mSystem Initializatio<6>[ 19.324578] mt7921e 0000:01:00.0: WM Firmware Version: ____010000, Build Time: 20231109190959
10722 01:04:02.557407 n[0m.
10723 01:04:02.573904 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
10724 01:04:02.589399 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
10725 01:04:02.602307 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
10726 01:04:02.621617 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
10727 01:04:02.634626 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
10728 01:04:02.650277 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
10729 01:04:02.681983 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
10730 01:04:02.713828 Starting [0;1;39mUser Login Management[0m...
10731 01:04:02.735149 Starting [0;1;39mPermit User Sessions[0m...
10732 01:04:02.757511 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
10733 01:04:02.779188 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
10734 01:04:02.848877 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
10735 01:04:02.896595 [[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyS0[0m.
10736 01:04:02.911519 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
10737 01:04:02.926776 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
10738 01:04:02.943527 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
10739 01:04:02.992287 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
10740 01:04:03.029651 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
10741 01:04:03.083195
10742 01:04:03.083745
10743 01:04:03.086330 Debian GNU/Linux 11 debian-bullseye-arm64 ttyS0
10744 01:04:03.086883
10745 01:04:03.090001 debian-bullseye-arm64 login: root (automatic login)
10746 01:04:03.090460
10747 01:04:03.090818
10748 01:04:03.104085 Linux debian-bullseye-arm64 6.1.72-cip13 #1 SMP PREEMPT Fri Jan 19 00:37:44 UTC 2024 aarch64
10749 01:04:03.104624
10750 01:04:03.110582 The programs included with the Debian GNU/Linux system are free software;
10751 01:04:03.117594 the exact distribution terms for each program are described in the
10752 01:04:03.120738 individual files in /usr/share/doc/*/copyright.
10753 01:04:03.121204
10754 01:04:03.128003 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
10755 01:04:03.129975 permitted by applicable law.
10756 01:04:03.131364 Matched prompt #10: / #
10758 01:04:03.132548 Setting prompt string to ['/ #']
10759 01:04:03.133088 end: 2.2.5.1 login-action (duration 00:00:21) [common]
10761 01:04:03.134149 end: 2.2.5 auto-login-action (duration 00:00:21) [common]
10762 01:04:03.134606 start: 2.2.6 expect-shell-connection (timeout 00:03:23) [common]
10763 01:04:03.134986 Setting prompt string to ['/ #']
10764 01:04:03.135322 Forcing a shell prompt, looking for ['/ #']
10766 01:04:03.186265 / #
10767 01:04:03.186905 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
10768 01:04:03.187584 Waiting using forced prompt support (timeout 00:02:30)
10769 01:04:03.193524
10770 01:04:03.194455 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
10771 01:04:03.194970 start: 2.2.7 export-device-env (timeout 00:03:23) [common]
10772 01:04:03.195466 end: 2.2.7 export-device-env (duration 00:00:00) [common]
10773 01:04:03.195917 end: 2.2 depthcharge-retry (duration 00:01:37) [common]
10774 01:04:03.196355 end: 2 depthcharge-action (duration 00:01:37) [common]
10775 01:04:03.196854 start: 3 lava-test-retry (timeout 00:08:01) [common]
10776 01:04:03.197326 start: 3.1 lava-test-shell (timeout 00:08:01) [common]
10777 01:04:03.197705 Using namespace: common
10779 01:04:03.298818 / # #
10780 01:04:03.299504 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
10781 01:04:03.305864 #
10782 01:04:03.306631 Using /lava-12571129
10784 01:04:03.407877 / # export SHELL=/bin/sh
10785 01:04:03.408648 export SHELL=/bin/sh<6>[ 20.179130] mt7921e 0000:01:00.0 wlp1s0: renamed from wlan0
10786 01:04:03.414762
10788 01:04:03.516546 / # . /lava-12571129/environment
10789 01:04:03.523663 . /lava-12571129/environment
10791 01:04:03.625640 / # /lava-12571129/bin/lava-test-runner /lava-12571129/0
10792 01:04:03.626262 Test shell timeout: 10s (minimum of the action and connection timeout)
10793 01:04:03.632282 /lava-12571129/bin/lava-test-runner /lava-12571129/0
10794 01:04:03.658501 + export TESTRUN_ID=0_igt-kms-medi<8>[ 20.429678] <LAVA_SIGNAL_STARTRUN 0_igt-kms-mediatek 12571129_1.5.2.3.1>
10795 01:04:03.659346 Received signal: <STARTRUN> 0_igt-kms-mediatek 12571129_1.5.2.3.1
10796 01:04:03.659755 Starting test lava.0_igt-kms-mediatek (12571129_1.5.2.3.1)
10797 01:04:03.660195 Skipping test definition patterns.
10798 01:04:03.661499 atek
10799 01:04:03.664469 + cd /lava-12571129/0/tests/0_igt-kms-mediatek
10800 01:04:03.664983 + cat uuid
10801 01:04:03.668482 + UUID=12571129_1.5.2.3.1
10802 01:04:03.669088 + set +x
10803 01:04:03.681161 + IGT_FORCE_DRIVER=mediatek /usr/bin/igt-parser.sh core_auth core_getclient core_getstats<8>[ 20.454017] <LAVA_SIGNAL_TESTSET START core_auth>
10804 01:04:03.682006 Received signal: <TESTSET> START core_auth
10805 01:04:03.682422 Starting test_set core_auth
10806 01:04:03.697727 core_getversion core_setmaster_vs_auth drm_read kms_addfb_basic kms_atomic kms_flip_event_leak kms_prop_blob kms_setmode kms_vb<14>[ 20.470181] [IGT] core_auth: executing
10807 01:04:03.698292 lank
10808 01:04:03.705250 <14>[ 20.474620] [IGT] core_auth: starting subtest getclient-simple
10809 01:04:03.711519 IGT-Version: 1.2<14>[ 20.481321] [IGT] core_auth: finished subtest getclient-simple, SUCCESS
10810 01:04:03.717825 7.1-g621c2d3 (aa<14>[ 20.489538] [IGT] core_auth: exiting, ret=0
10811 01:04:03.721228 rch64) (Linux: 6.1.72-cip13 aarch64)
10812 01:04:03.730629 Starting subtest: getclien<8>[ 20.501012] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-simple RESULT=pass>
10813 01:04:03.731367 t-simple
10814 01:04:03.732030 Received signal: <TESTCASE> TEST_CASE_ID=getclient-simple RESULT=pass
10816 01:04:03.733971 Opened device: /dev/dri/card0
10817 01:04:03.737808 [1mSubtest getclient-simple: SUCCESS (0.000s)[0m
10818 01:04:03.746879 <14>[ 20.519716] [IGT] core_auth: executing
10819 01:04:03.753395 IGT-Version: 1.2<14>[ 20.524089] [IGT] core_auth: starting subtest getclient-master-drop
10820 01:04:03.763362 7.1-g621c2d3 (aa<14>[ 20.532128] [IGT] core_auth: finished subtest getclient-master-drop, SUCCESS
10821 01:04:03.769938 rch64) (Linux: 6<14>[ 20.540860] [IGT] core_auth: exiting, ret=0
10822 01:04:03.770501 .1.72-cip13 aarch64)
10823 01:04:03.774221 Starting subtest: getclient-master-drop
10824 01:04:03.783199 O<8>[ 20.552259] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-master-drop RESULT=pass>
10825 01:04:03.784019 Received signal: <TESTCASE> TEST_CASE_ID=getclient-master-drop RESULT=pass
10827 01:04:03.786344 pened device: /dev/dri/card0
10828 01:04:03.790134 [1mSubtest getclient-master-drop: SUCCESS (0.000s)[0m
10829 01:04:03.799254 <14>[ 20.571421] [IGT] core_auth: executing
10830 01:04:03.805514 IGT-Version: 1.2<14>[ 20.575805] [IGT] core_auth: starting subtest basic-auth
10831 01:04:03.811839 7.1-g621c2d3 (aa<14>[ 20.582789] [IGT] core_auth: finished subtest basic-auth, SUCCESS
10832 01:04:03.818997 rch64) (Linux: 6<14>[ 20.590619] [IGT] core_auth: exiting, ret=0
10833 01:04:03.823123 .1.72-cip13 aarch64)
10834 01:04:03.824962 Opened device: /dev/dri/card0
10835 01:04:03.831529 Starting su<8>[ 20.601848] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-auth RESULT=pass>
10836 01:04:03.832076 btest: basic-auth
10837 01:04:03.832767 Received signal: <TESTCASE> TEST_CASE_ID=basic-auth RESULT=pass
10839 01:04:03.838332 [1mSubtest basic-auth: SUCCESS (0.000s)[0m
10840 01:04:03.848546 <14>[ 20.620836] [IGT] core_auth: executing
10841 01:04:03.854883 IGT-Version: 1.2<14>[ 20.625189] [IGT] core_auth: starting subtest many-magics
10842 01:04:03.857633 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
10843 01:04:03.867718 Opened dev<14>[ 20.637484] [IGT] core_auth: finished subtest many-magics, SUCCESS
10844 01:04:03.871508 ice: /dev/dri/ca<14>[ 20.644433] [IGT] core_auth: exiting, ret=0
10845 01:04:03.874807 rd0
10846 01:04:03.875561 Starting subtest: many-magics
10847 01:04:03.884750 Reopening device failed afte<8>[ 20.654599] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=many-magics RESULT=pass>
10848 01:04:03.885596 Received signal: <TESTCASE> TEST_CASE_ID=many-magics RESULT=pass
10850 01:04:03.887482 r 1020 opens
10851 01:04:03.891005 [<8>[ 20.664094] <LAVA_SIGNAL_TESTSET STOP>
10852 01:04:03.891859 Received signal: <TESTSET> STOP
10853 01:04:03.892259 Closing test_set core_auth
10854 01:04:03.894662 1mSubtest many-magics: SUCCESS (0.005s)[0m
10855 01:04:03.917638 <14>[ 20.689843] [IGT] core_getclient: executing
10856 01:04:03.924219 IGT-Version: 1.2<14>[ 20.694671] [IGT] core_getclient: exiting, ret=0
10857 01:04:03.927187 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
10858 01:04:03.937795 Opened device: /dev/dri/ca<8>[ 20.706593] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getclient RESULT=pass>
10859 01:04:03.938335 rd0
10860 01:04:03.938973 Received signal: <TESTCASE> TEST_CASE_ID=core_getclient RESULT=pass
10862 01:04:03.940554 SUCCESS (0.006s)
10863 01:04:03.984866 <14>[ 20.757411] [IGT] core_getstats: executing
10864 01:04:03.991422 IGT-Version: 1.2<14>[ 20.762260] [IGT] core_getstats: exiting, ret=0
10865 01:04:03.995088 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
10866 01:04:04.004816 Opened dev<8>[ 20.773713] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getstats RESULT=pass>
10867 01:04:04.005420 ice: /dev/dri/card0
10868 01:04:04.006067 Received signal: <TESTCASE> TEST_CASE_ID=core_getstats RESULT=pass
10870 01:04:04.008413 SUCCESS (0.006s)
10871 01:04:04.053325 <14>[ 20.826045] [IGT] core_getversion: executing
10872 01:04:04.059852 IGT-Version: 1.2<14>[ 20.831214] [IGT] core_getversion: exiting, ret=0
10873 01:04:04.062942 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
10874 01:04:04.072913 Opened device: /dev/dri/ca<8>[ 20.843012] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getversion RESULT=pass>
10875 01:04:04.073382 rd0
10876 01:04:04.074019 Received signal: <TESTCASE> TEST_CASE_ID=core_getversion RESULT=pass
10878 01:04:04.076028 SUCCESS (0.006s)
10879 01:04:04.099921 <14>[ 20.873330] [IGT] core_setmaster_vs_auth: executing
10880 01:04:04.106832 IGT-Version: 1.2<14>[ 20.878842] [IGT] core_setmaster_vs_auth: exiting, ret=0
10881 01:04:04.113465 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
10882 01:04:04.124297 Opened device: /dev/dri/ca<8>[ 20.891402] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass>
10883 01:04:04.124750 rd0
10884 01:04:04.125180 SUCCESS (0.007s)
10885 01:04:04.125807 Received signal: <TESTCASE> TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass
10887 01:04:04.141105 <8>[ 20.914719] <LAVA_SIGNAL_TESTSET START drm_read>
10888 01:04:04.141360 Received signal: <TESTSET> START drm_read
10889 01:04:04.141429 Starting test_set drm_read
10890 01:04:04.156380 <14>[ 20.929353] [IGT] drm_read: executing
10891 01:04:04.162936 IGT-Version: 1.2<14>[ 20.933751] [IGT] drm_read: exiting, ret=77
10892 01:04:04.167827 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
10893 01:04:04.173107 Opened dev<8>[ 20.945012] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-buffer RESULT=skip>
10894 01:04:04.173807 Received signal: <TESTCASE> TEST_CASE_ID=invalid-buffer RESULT=skip
10896 01:04:04.177069 ice: /dev/dri/card0
10897 01:04:04.179301 No KMS driver or no outputs, pipes: 8, outputs: 0
10898 01:04:04.186221 [1mSubtest invalid-buffer: SKIP (0.000s)[0m
10899 01:04:04.189246 <14>[ 20.963577] [IGT] drm_read: executing
10900 01:04:04.196115 IGT-Version: 1.2<14>[ 20.967994] [IGT] drm_read: exiting, ret=77
10901 01:04:04.199074 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
10902 01:04:04.209527 Opened device: /dev/dri/ca<8>[ 20.979299] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=fault-buffer RESULT=skip>
10903 01:04:04.210041 rd0
10904 01:04:04.210665 Received signal: <TESTCASE> TEST_CASE_ID=fault-buffer RESULT=skip
10906 01:04:04.216277 No KMS driver or no outputs, pipes: 8, outputs: 0
10907 01:04:04.219367 [1mSubtest fault-buffer: SKIP (0.000s)[0m
10908 01:04:04.226043 <14>[ 20.998950] [IGT] drm_read: executing
10909 01:04:04.232753 IGT-Version: 1.2<14>[ 21.003383] [IGT] drm_read: exiting, ret=77
10910 01:04:04.236515 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
10911 01:04:04.242899 Opened dev<8>[ 21.014659] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-block RESULT=skip>
10912 01:04:04.243749 Received signal: <TESTCASE> TEST_CASE_ID=empty-block RESULT=skip
10914 01:04:04.246204 ice: /dev/dri/card0
10915 01:04:04.249038 No KMS driver or no outputs, pipes: 8, outputs: 0
10916 01:04:04.252888 [1mSubtest empty-block: SKIP (0.000s)[0m
10917 01:04:04.261090 <14>[ 21.032931] [IGT] drm_read: executing
10918 01:04:04.266825 IGT-Version: 1.2<14>[ 21.037331] [IGT] drm_read: exiting, ret=77
10919 01:04:04.277098 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 21.047041] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-nonblock RESULT=skip>
10920 01:04:04.277682 h64)
10921 01:04:04.278457 Received signal: <TESTCASE> TEST_CASE_ID=empty-nonblock RESULT=skip
10923 01:04:04.280112 Opened device: /dev/dri/card0
10924 01:04:04.282929 No KMS driver or no outputs, pipes: 8, outputs: 0
10925 01:04:04.293669 [1mSubtest empty-nonblock: SKIP (0.000s<14>[ 21.065297] [IGT] drm_read: executing
10926 01:04:04.294230 )[0m
10927 01:04:04.296452 <14>[ 21.070049] [IGT] drm_read: exiting, ret=77
10928 01:04:04.309702 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6<8>[ 21.078770] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-block RESULT=skip>
10929 01:04:04.310271 .1.72-cip13 aarch64)
10930 01:04:04.310927 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-block RESULT=skip
10932 01:04:04.312985 Opened device: /dev/dri/card0
10933 01:04:04.317506 No KMS driver or no outputs, pipes: 8, outputs: 0
10934 01:04:04.323414 [1mSubtest short-buffer<14>[ 21.097482] [IGT] drm_read: executing
10935 01:04:04.329650 -block: SKIP (0.<14>[ 21.101995] [IGT] drm_read: exiting, ret=77
10936 01:04:04.330201 000s)[0m
10937 01:04:04.342609 IGT-Version: 1.27.1-g621c2d3 (aarch64<8>[ 21.111302] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-nonblock RESULT=skip>
10938 01:04:04.343457 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-nonblock RESULT=skip
10940 01:04:04.345413 ) (Linux: 6.1.72-cip13 aarch64)
10941 01:04:04.345874 Opened device: /dev/dri/card0
10942 01:04:04.352268 No KMS driver or no outputs, pipes: 8, outputs: 0
10943 01:04:04.356142 [1mSubtest short-buffer-nonblock: SKIP (0.000s)[0m
10944 01:04:04.359506 <14>[ 21.133950] [IGT] drm_read: executing
10945 01:04:04.365257 IGT-Version: 1.2<14>[ 21.138693] [IGT] drm_read: exiting, ret=77
10946 01:04:04.379180 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 21.148289] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-wakeup RESULT=skip>
10947 01:04:04.379762 h64)
10948 01:04:04.380534 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-wakeup RESULT=skip
10950 01:04:04.382346 Received signal: <TESTSET> STOP
10951 01:04:04.382766 Closing test_set drm_read
10952 01:04:04.385092 Opened dev<8>[ 21.157295] <LAVA_SIGNAL_TESTSET STOP>
10953 01:04:04.385680 ice: /dev/dri/card0
10954 01:04:04.388886 No KMS driver or no outputs, pipes: 8, outputs: 0
10955 01:04:04.395030 [1mSubtest short-buffer-wakeup: SKIP (0.000s)[0m
10956 01:04:04.402030 <8>[ 21.174722] <LAVA_SIGNAL_TESTSET START kms_addfb_basic>
10957 01:04:04.402923 Received signal: <TESTSET> START kms_addfb_basic
10958 01:04:04.403346 Starting test_set kms_addfb_basic
10959 01:04:04.423073 <14>[ 21.196170] [IGT] kms_addfb_basic: executing
10960 01:04:04.436844 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<14>[ 21.205211] [IGT] kms_addfb_basic: starting subtest unused-handle
10961 01:04:04.437414 h64)
10962 01:04:04.443167 Opened dev<14>[ 21.213117] [IGT] kms_addfb_basic: finished subtest unused-handle, SUCCESS
10963 01:04:04.446597 ice: /dev/dri/card0
10964 01:04:04.449588 Starting subtest: unused-handle
10965 01:04:04.456853 [1mSubtest unused-handle: SUCCESS (0.000s<14>[ 21.229452] [IGT] kms_addfb_basic: exiting, ret=0
10966 01:04:04.457429 )[0m
10967 01:04:04.469829 Test requirement not met in function igt_require_i915, fi<8>[ 21.239351] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-handle RESULT=pass>
10968 01:04:04.470731 Received signal: <TESTCASE> TEST_CASE_ID=unused-handle RESULT=pass
10970 01:04:04.472553 le ../lib/drmtest.c:720:
10971 01:04:04.476102 Test requirement: is_i915_device(fd)
10972 01:04:04.482426 Test requirement not met in function igt_require<14>[ 21.257467] [IGT] kms_addfb_basic: executing
10973 01:04:04.486633 _i915, file ../lib/drmtest.c:720:
10974 01:04:04.495892 Test requirement: is_i915_dev<14>[ 21.266570] [IGT] kms_addfb_basic: starting subtest unused-pitches
10975 01:04:04.496442 ice(fd)
10976 01:04:04.507117 No KMS <14>[ 21.274580] [IGT] kms_addfb_basic: finished subtest unused-pitches, SUCCESS
10977 01:04:04.509104 driver or no outputs, pipes: 8, outputs: 0
10978 01:04:04.518955 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.7<14>[ 21.291058] [IGT] kms_addfb_basic: exiting, ret=0
10979 01:04:04.519520 2-cip13 aarch64)
10980 01:04:04.522521 Opened device: /dev/dri/card0
10981 01:04:04.532605 Starting subtes<8>[ 21.302029] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-pitches RESULT=pass>
10982 01:04:04.533208 t: unused-pitches
10983 01:04:04.533863 Received signal: <TESTCASE> TEST_CASE_ID=unused-pitches RESULT=pass
10985 01:04:04.538605 [1mSubtest unused-pitches: SUCCESS (0.000s)[0m
10986 01:04:04.549040 Test requirement not met in function igt_require_i915, file ../lib/drmtest.<14>[ 21.320680] [IGT] kms_addfb_basic: executing
10987 01:04:04.549611 c:720:
10988 01:04:04.551855 Test requirement: is_i915_device(fd)
10989 01:04:04.563035 Test requirement n<14>[ 21.330780] [IGT] kms_addfb_basic: starting subtest unused-offsets
10990 01:04:04.570006 ot met in functi<14>[ 21.338832] [IGT] kms_addfb_basic: finished subtest unused-offsets, SUCCESS
10991 01:04:04.574967 on igt_require_i915, file ../lib/drmtest.c:720:
10992 01:04:04.578749 Test requirement: is_i915_device(fd)
10993 01:04:04.582610 No KMS dr<14>[ 21.355293] [IGT] kms_addfb_basic: exiting, ret=0
10994 01:04:04.584924 iver or no outputs, pipes: 8, outputs: 0
10995 01:04:04.594572 IGT-Version: 1.27.1-g6<8>[ 21.366461] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-offsets RESULT=pass>
10996 01:04:04.594838 Received signal: <TESTCASE> TEST_CASE_ID=unused-offsets RESULT=pass
10998 01:04:04.597678 21c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
10999 01:04:04.601029 Opened device: /dev/dri/card0
11000 01:04:04.604285 Starting subtest: unused-offsets
11001 01:04:04.611087 [1mSubtest unused-offsets: SUC<14>[ 21.384865] [IGT] kms_addfb_basic: executing
11002 01:04:04.615088 CESS (0.000s)[0m
11003 01:04:04.624431 Test requirement not met in function igt_requ<14>[ 21.395091] [IGT] kms_addfb_basic: starting subtest unused-modifier
11004 01:04:04.634195 ire_i915, file .<14>[ 21.403217] [IGT] kms_addfb_basic: finished subtest unused-modifier, SUCCESS
11005 01:04:04.634375 ./lib/drmtest.c:720:
11006 01:04:04.637966 Test requirement: is_i915_device(fd)
11007 01:04:04.647243 Test requirement not met in function<14>[ 21.419697] [IGT] kms_addfb_basic: exiting, ret=0
11008 01:04:04.651061 igt_require_i915, file ../lib/drmtest.c:720:
11009 01:04:04.660693 Test requirement: is_i915_device(<8>[ 21.431107] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-modifier RESULT=pass>
11010 01:04:04.660917 fd)
11011 01:04:04.661287 Received signal: <TESTCASE> TEST_CASE_ID=unused-modifier RESULT=pass
11013 01:04:04.668104 No KMS driver or no outputs, pipes: 8, outputs: 0
11014 01:04:04.671252 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11015 01:04:04.677847 Opened device: /de<14>[ 21.450914] [IGT] kms_addfb_basic: executing
11016 01:04:04.680779 v/dri/card0
11017 01:04:04.684274 Starting subtest: unused-modifier
11018 01:04:04.691156 [1mSubtest unus<14>[ 21.460993] [IGT] kms_addfb_basic: starting subtest clobberred-modifier
11019 01:04:04.700813 ed-modifier: SUC<14>[ 21.469515] [IGT] kms_addfb_basic: finished subtest clobberred-modifier, SKIP
11020 01:04:04.701236 CESS (0.000s)[0m
11021 01:04:04.714640 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:<14>[ 21.486015] [IGT] kms_addfb_basic: exiting, ret=77
11022 01:04:04.715202 720:
11023 01:04:04.717429 Test requirement: is_i915_device(fd)
11024 01:04:04.727897 Test requirement not met in function<8>[ 21.497403] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clobberred-modifier RESULT=skip>
11025 01:04:04.728794 Received signal: <TESTCASE> TEST_CASE_ID=clobberred-modifier RESULT=skip
11027 01:04:04.733884 igt_require_i915, file ../lib/drmtest.c:720:
11028 01:04:04.737122 Test requirement: is_i915_device(fd)
11029 01:04:04.744077 No KMS driver or no outputs, pipes: 8, outp<14>[ 21.517521] [IGT] kms_addfb_basic: executing
11030 01:04:04.744624 uts: 0
11031 01:04:04.757116 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-ci<14>[ 21.526562] [IGT] kms_addfb_basic: starting subtest invalid-smem-bo-on-discrete
11032 01:04:04.760307 p13 aarch64)
11033 01:04:04.766861 Op<14>[ 21.535583] [IGT] kms_addfb_basic: finished subtest invalid-smem-bo-on-discrete, SKIP
11034 01:04:04.771435 ened device: /dev/dri/card0
11035 01:04:04.773759 Starting subtest: clobberred-modifier
11036 01:04:04.780350 Test requirement not met in <14>[ 21.552936] [IGT] kms_addfb_basic: exiting, ret=77
11037 01:04:04.787395 function igt_require_i915, file ../lib/drmtest.c:720:
11038 01:04:04.794281 Test requ<8>[ 21.562813] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip>
11039 01:04:04.795129 Received signal: <TESTCASE> TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip
11041 01:04:04.797242 irement: is_i915_device(fd)
11042 01:04:04.800511 [1mSubtest clobberred-modifier: SKIP (0.000s)[0m
11043 01:04:04.810890 Test requirement not met in function igt_requir<14>[ 21.582254] [IGT] kms_addfb_basic: executing
11044 01:04:04.813366 e_i915, file ../lib/drmtest.c:720:
11045 01:04:04.823843 Test requirement: is_i915_de<14>[ 21.592578] [IGT] kms_addfb_basic: starting subtest legacy-format
11046 01:04:04.824385 vice(fd)
11047 01:04:04.836603 Test requirement not met in function igt_require_i915,<14>[ 21.605448] [IGT] kms_addfb_basic: finished subtest legacy-format, SUCCESS
11048 01:04:04.837449 file ../lib/drmtest.c:720:
11049 01:04:04.839728 Test requirement: is_i915_device(fd)
11050 01:04:04.849736 No KMS driver or no outputs, <14>[ 21.620855] [IGT] kms_addfb_basic: exiting, ret=0
11051 01:04:04.850199 pipes: 8, outputs: 0
11052 01:04:04.859718 Received signal: <TESTCASE> TEST_CASE_ID=legacy-format RESULT=pass
11054 01:04:04.863067 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Li<8>[ 21.631929] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=legacy-format RESULT=pass>
11055 01:04:04.863622 nux: 6.1.72-cip13 aarch64)
11056 01:04:04.866394 Opened device: /dev/dri/card0
11057 01:04:04.869779 Starting subtest: invalid-smem-bo-on-discrete
11058 01:04:04.881303 Test requirement not met in function i<14>[ 21.651204] [IGT] kms_addfb_basic: executing
11059 01:04:04.882628 gt_require_intel, file ../lib/drmtest.c:715:
11060 01:04:04.892881 Test requirement: is_intel_device(<14>[ 21.662671] [IGT] kms_addfb_basic: starting subtest no-handle
11061 01:04:04.893440 fd)
11062 01:04:04.899980 [1mSubtest<14>[ 21.669594] [IGT] kms_addfb_basic: finished subtest no-handle, SUCCESS
11063 01:04:04.902762 invalid-smem-bo-on-discrete: SKIP (0.000s)[0m
11064 01:04:04.912830 Test requirement not met in fun<14>[ 21.683739] [IGT] kms_addfb_basic: exiting, ret=0
11065 01:04:04.922725 ction igt_require_i915, file ../lib/drmtest.c:72<8>[ 21.693821] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=no-handle RESULT=pass>
11066 01:04:04.923292 0:
11067 01:04:04.923950 Received signal: <TESTCASE> TEST_CASE_ID=no-handle RESULT=pass
11069 01:04:04.925646 Test requirement: is_i915_device(fd)
11070 01:04:04.932759 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11071 01:04:04.939353 Test requirement: i<14>[ 21.711885] [IGT] kms_addfb_basic: executing
11072 01:04:04.942335 s_i915_device(fd)
11073 01:04:04.946078 No KMS driver or no outputs, pipes: 8, outputs: 0
11074 01:04:04.952301 IGT-Versio<14>[ 21.724224] [IGT] kms_addfb_basic: starting subtest basic
11075 01:04:04.961963 n: 1.27.1-g621c2<14>[ 21.730814] [IGT] kms_addfb_basic: finished subtest basic, SUCCESS
11076 01:04:04.966525 d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11077 01:04:04.968890 Opened device: /dev/dri/card0
11078 01:04:04.971920 Start<14>[ 21.744341] [IGT] kms_addfb_basic: exiting, ret=0
11079 01:04:04.975190 ing subtest: legacy-format
11080 01:04:04.984703 Successfully fuzzed 10000 {bpp, dept<8>[ 21.754866] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
11081 01:04:04.985205 h} variations
11082 01:04:04.985839 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11084 01:04:04.992018 [1mSubtest legacy-format: SUCCESS (0.005s)[0m
11085 01:04:05.001716 Test requirement not met in function igt_require_i915, file ../l<14>[ 21.773367] [IGT] kms_addfb_basic: executing
11086 01:04:05.002275 ib/drmtest.c:720:
11087 01:04:05.004500 Test requirement: is_i915_device(fd)
11088 01:04:05.014999 Test requirement not me<14>[ 21.784698] [IGT] kms_addfb_basic: starting subtest bad-pitch-0
11089 01:04:05.021532 t in function ig<14>[ 21.791829] [IGT] kms_addfb_basic: finished subtest bad-pitch-0, SUCCESS
11090 01:04:05.024792 t_require_i915, file ../lib/drmtest.c:720:
11091 01:04:05.034802 Test requirement: is_i915_device(fd)<14>[ 21.805822] [IGT] kms_addfb_basic: exiting, ret=0
11092 01:04:05.035362
11093 01:04:05.038084 No KMS driver or no outputs, pipes: 8, outputs: 0
11094 01:04:05.047600 IGT-Version<8>[ 21.816506] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-0 RESULT=pass>
11095 01:04:05.048479 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-0 RESULT=pass
11097 01:04:05.051590 : 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11098 01:04:05.055130 Opened device: /dev/dri/card0
11099 01:04:05.057601 Starting subtest: no-handle
11100 01:04:05.060628 [1mSubte<14>[ 21.834451] [IGT] kms_addfb_basic: executing
11101 01:04:05.065320 st no-handle: SUCCESS (0.000s)[0m
11102 01:04:05.074814 Test requirement not met in function igt_req<14>[ 21.846698] [IGT] kms_addfb_basic: starting subtest bad-pitch-32
11103 01:04:05.084243 uire_i915, file <14>[ 21.853878] [IGT] kms_addfb_basic: finished subtest bad-pitch-32, SUCCESS
11104 01:04:05.088450 ../lib/drmtest.c:720:
11105 01:04:05.090774 Test requirement: is_i915_device(fd)
11106 01:04:05.098142 Test requirement no<14>[ 21.868192] [IGT] kms_addfb_basic: exiting, ret=0
11107 01:04:05.100803 t met in function igt_require_i915, file ../lib/drmtest.c:720:
11108 01:04:05.110853 Test requirement<8>[ 21.880049] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-32 RESULT=pass>
11109 01:04:05.112095 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-32 RESULT=pass
11111 01:04:05.113414 : is_i915_device(fd)
11112 01:04:05.117202 No KMS driver or no outputs, pipes: 8, outputs: 0
11113 01:04:05.123377 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11114 01:04:05.126806 O<14>[ 21.899610] [IGT] kms_addfb_basic: executing
11115 01:04:05.130828 pened device: /dev/dri/card0
11116 01:04:05.133227 Starting subtest: basic
11117 01:04:05.140103 [1mSubtest basic: SUCCES<14>[ 21.911817] [IGT] kms_addfb_basic: starting subtest bad-pitch-63
11118 01:04:05.143451 S (0.000s)[0m
11119 01:04:05.150301 <14>[ 21.919114] [IGT] kms_addfb_basic: finished subtest bad-pitch-63, SUCCESS
11120 01:04:05.163258 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720<14>[ 21.933174] [IGT] kms_addfb_basic: exiting, ret=0
11121 01:04:05.163826 :
11122 01:04:05.166300 Test requirement: is_i915_device(fd)
11123 01:04:05.173912 Test requirement not me<8>[ 21.945080] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-63 RESULT=pass>
11124 01:04:05.174824 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-63 RESULT=pass
11126 01:04:05.179262 t in function igt_require_i915, file ../lib/drmtest.c:720:
11127 01:04:05.184330 Test requirement: is_i915_device(fd)
11128 01:04:05.192869 No KMS driver or no outputs, pipes: 8, outputs<14>[ 21.963577] [IGT] kms_addfb_basic: executing
11129 01:04:05.193410 : 0
11130 01:04:05.199607 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11131 01:04:05.206048 Opene<14>[ 21.975638] [IGT] kms_addfb_basic: starting subtest bad-pitch-128
11132 01:04:05.212811 d device: /dev/d<14>[ 21.982906] [IGT] kms_addfb_basic: finished subtest bad-pitch-128, SUCCESS
11133 01:04:05.216157 ri/card0
11134 01:04:05.216833 Starting subtest: bad-pitch-0
11135 01:04:05.225473 [1mSubtest bad-pitch-0: SUCCESS (0.000<14>[ 21.997302] [IGT] kms_addfb_basic: exiting, ret=0
11136 01:04:05.225896 s)[0m
11137 01:04:05.238597 Test requirement not met in function igt_require_i915, f<8>[ 22.009091] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-128 RESULT=pass>
11138 01:04:05.239096 ile ../lib/drmtest.c:720:
11139 01:04:05.239694 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-128 RESULT=pass
11141 01:04:05.242493 Test requirement: is_i915_device(fd)
11142 01:04:05.256099 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:72<14>[ 22.027467] [IGT] kms_addfb_basic: executing
11143 01:04:05.256544 0:
11144 01:04:05.259096 Test requirement: is_i915_device(fd)
11145 01:04:05.268568 No KMS driver or no outputs, pipes: 8,<14>[ 22.039686] [IGT] kms_addfb_basic: starting subtest bad-pitch-256
11146 01:04:05.269055 outputs: 0
11147 01:04:05.278472 IGT<14>[ 22.046975] [IGT] kms_addfb_basic: finished subtest bad-pitch-256, SUCCESS
11148 01:04:05.282397 -Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11149 01:04:05.288775 Opened device<14>[ 22.061272] [IGT] kms_addfb_basic: exiting, ret=0
11150 01:04:05.293013 : /dev/dri/card0
11151 01:04:05.294880 Starting subtest: bad-pitch-32
11152 01:04:05.305127 [1mSubtest bad-pitch-32: SUCC<8>[ 22.073150] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-256 RESULT=pass>
11153 01:04:05.305561 ESS (0.000s)[0m
11154 01:04:05.306268 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-256 RESULT=pass
11156 01:04:05.311433 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11157 01:04:05.315353 Test requirement: is_i915_device(fd)
11158 01:04:05.321141 Test <14>[ 22.092819] [IGT] kms_addfb_basic: executing
11159 01:04:05.327550 requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11160 01:04:05.334442 Te<14>[ 22.105022] [IGT] kms_addfb_basic: starting subtest bad-pitch-1024
11161 01:04:05.345253 st requirement: <14>[ 22.112435] [IGT] kms_addfb_basic: finished subtest bad-pitch-1024, SUCCESS
11162 01:04:05.345836 is_i915_device(fd)
11163 01:04:05.347686 No KMS driver or no outputs, pipes: 8, outputs: 0
11164 01:04:05.354342 IGT-Versi<14>[ 22.126897] [IGT] kms_addfb_basic: exiting, ret=0
11165 01:04:05.360856 on: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11166 01:04:05.367642 Opened device: /dev<8>[ 22.138824] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-1024 RESULT=pass>
11167 01:04:05.368548 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-1024 RESULT=pass
11169 01:04:05.371114 /dri/card0
11170 01:04:05.374765 Starting subtest: bad-pitch-63
11171 01:04:05.378262 [1mSubtest bad-pitch-63: SUCCESS (0.000s)[0m
11172 01:04:05.387952 Test requirement not met in function igt_require_i91<14>[ 22.158708] [IGT] kms_addfb_basic: executing
11173 01:04:05.388518 5, file ../lib/drmtest.c:720:
11174 01:04:05.392147 Test requirement: is_i915_device(fd)
11175 01:04:05.400463 Test requir<14>[ 22.170744] [IGT] kms_addfb_basic: starting subtest bad-pitch-999
11176 01:04:05.408200 ement not met in<14>[ 22.178013] [IGT] kms_addfb_basic: finished subtest bad-pitch-999, SUCCESS
11177 01:04:05.415031 function igt_require_i915, file ../lib/drmtest.c:720:
11178 01:04:05.420684 Test requirement: is_i91<14>[ 22.192439] [IGT] kms_addfb_basic: exiting, ret=0
11179 01:04:05.421288 5_device(fd)
11180 01:04:05.427336 No KMS driver or no outputs, pipes: 8, outputs: 0
11181 01:04:05.433718 <8>[ 22.203834] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-999 RESULT=pass>
11182 01:04:05.434263
11183 01:04:05.434902 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-999 RESULT=pass
11185 01:04:05.440323 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11186 01:04:05.444086 Opened device: /dev/dri/card0
11187 01:04:05.444641 Starting subtest: bad-pitch-128
11188 01:04:05.450887 [1mSubte<14>[ 22.222533] [IGT] kms_addfb_basic: executing
11189 01:04:05.453265 st bad-pitch-128: SUCCESS (0.000s)[0m
11190 01:04:05.463570 Test requirement not met in function igt<14>[ 22.234758] [IGT] kms_addfb_basic: starting subtest bad-pitch-65536
11191 01:04:05.473002 _require_i915, f<14>[ 22.242124] [IGT] kms_addfb_basic: finished subtest bad-pitch-65536, SUCCESS
11192 01:04:05.476689 ile ../lib/drmtest.c:720:
11193 01:04:05.479716 Test requirement: is_i915_device(fd)
11194 01:04:05.486454 Test requiremen<14>[ 22.256635] [IGT] kms_addfb_basic: exiting, ret=0
11195 01:04:05.490642 t not met in function igt_require_i915, file ../lib/drmtest.c:720:
11196 01:04:05.500159 Test require<8>[ 22.268529] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-65536 RESULT=pass>
11197 01:04:05.501057 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-65536 RESULT=pass
11199 01:04:05.503249 ment: is_i915_device(fd)
11200 01:04:05.506249 No KMS driver or no outputs, pipes: 8, outputs: 0
11201 01:04:05.517227 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.<14>[ 22.288121] [IGT] kms_addfb_basic: executing
11202 01:04:05.517784 72-cip13 aarch64)
11203 01:04:05.520363 Opened device: /dev/dri/card0
11204 01:04:05.523582 Starting subtest: bad-pitch-256
11205 01:04:05.529911 [1mSubtest b<14>[ 22.301073] [IGT] kms_addfb_basic: starting subtest invalid-get-prop-any
11206 01:04:05.539623 ad-pitch-256: SU<14>[ 22.308668] [IGT] kms_addfb_basic: finished subtest invalid-get-prop-any, SUCCESS
11207 01:04:05.543008 CCESS (0.000s)[0m
11208 01:04:05.549092 Test requirement not met in <14>[ 22.321556] [IGT] kms_addfb_basic: exiting, ret=0
11209 01:04:05.559028 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
11211 01:04:05.562102 function igt_require_i915, file ../lib/drmtest.c<8>[ 22.331097] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
11212 01:04:05.562645 :720:
11213 01:04:05.566072 Test requirement: is_i915_device(fd)
11214 01:04:05.575579 Test requirement not met in function igt_require_i915, file ../lib/<14>[ 22.348401] [IGT] kms_addfb_basic: executing
11215 01:04:05.576145 drmtest.c:720:
11216 01:04:05.578926 Test requirement: is_i915_device(fd)
11217 01:04:05.592406 No KMS driver or no outputs, pipes: 8, out<14>[ 22.361272] [IGT] kms_addfb_basic: starting subtest invalid-get-prop
11218 01:04:05.593042 puts: 0
11219 01:04:05.598533 IGT-Ver<14>[ 22.368544] [IGT] kms_addfb_basic: finished subtest invalid-get-prop, SUCCESS
11220 01:04:05.608460 sion: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-c<14>[ 22.381084] [IGT] kms_addfb_basic: exiting, ret=0
11221 01:04:05.609215 ip13 aarch64)
11222 01:04:05.611778 Opened device: /dev/dri/card0
11223 01:04:05.615131 Starting subtest: bad-pitch-1024
11224 01:04:05.622470 <8>[ 22.392106] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
11225 01:04:05.623320 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
11227 01:04:05.628310 [1mSubtest bad-pitch-1024: SUCCESS (0.000s)[0m
11228 01:04:05.637682 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:7<14>[ 22.412011] [IGT] kms_addfb_basic: executing
11229 01:04:05.638239 20:
11230 01:04:05.641529 Test requirement: is_i915_device(fd)
11231 01:04:05.654618 Test requirement not met in function igt_require_i915<14>[ 22.424796] [IGT] kms_addfb_basic: starting subtest invalid-set-prop-any
11232 01:04:05.664588 , file ../lib/dr<14>[ 22.432225] [IGT] kms_addfb_basic: finished subtest invalid-set-prop-any, SUCCESS
11233 01:04:05.665239 mtest.c:720:
11234 01:04:05.671431 Test requirement: is_i915_device(f<14>[ 22.445218] [IGT] kms_addfb_basic: exiting, ret=0
11235 01:04:05.674669 d)
11236 01:04:05.677596 No KMS driver or no outputs, pipes: 8, outputs: 0
11237 01:04:05.684616 IGT-Versi<8>[ 22.455042] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
11238 01:04:05.685563 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
11240 01:04:05.690702 on: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11241 01:04:05.694743 Opened device: /dev/dri/card0
11242 01:04:05.697446 Starting subtest: bad-pitch-999
11243 01:04:05.702324 [1<14>[ 22.473780] [IGT] kms_addfb_basic: executing
11244 01:04:05.707297 mSubtest bad-pitch-999: SUCCESS (0.000s)[0m
11245 01:04:05.717467 Test requirement not met in function igt_require_i<14>[ 22.487773] [IGT] kms_addfb_basic: starting subtest invalid-set-prop
11246 01:04:05.727194 915, file ../lib<14>[ 22.494960] [IGT] kms_addfb_basic: finished subtest invalid-set-prop, SUCCESS
11247 01:04:05.727946 /drmtest.c:720:
11248 01:04:05.733741 Test requirement: is_i915_devic<14>[ 22.507639] [IGT] kms_addfb_basic: exiting, ret=0
11249 01:04:05.736775 e(fd)
11250 01:04:05.747173 Test requirement not met in function igt_require_i915, fi<8>[ 22.518440] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
11251 01:04:05.748023 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
11253 01:04:05.751166 le ../lib/drmtest.c:720:
11254 01:04:05.754128 Test requirement: is_i915_device(fd)
11255 01:04:05.758015 No KMS driver or no outputs, pipes: 8, outputs: 0
11256 01:04:05.767165 IGT-Version: 1.27.1-g621c2d3 <14>[ 22.537059] [IGT] kms_addfb_basic: executing
11257 01:04:05.770234 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11258 01:04:05.770790 Opened device: /dev/dri/card0
11259 01:04:05.773595 Starting subtest: bad-pitch-65536
11260 01:04:05.783114 [1mSubtest bad-pitch<14>[ 22.553114] [IGT] kms_addfb_basic: starting subtest master-rmfb
11261 01:04:05.790131 -65536: SUCCESS <14>[ 22.560722] [IGT] kms_addfb_basic: finished subtest master-rmfb, SUCCESS
11262 01:04:05.793058 (0.000s)[0m
11263 01:04:05.799908 Test requirement n<14>[ 22.571124] [IGT] kms_addfb_basic: exiting, ret=0
11264 01:04:05.803189 ot met in function igt_require_i915, file ../lib/drmtest.c:720:
11265 01:04:05.810217 Received signal: <TESTCASE> TEST_CASE_ID=master-rmfb RESULT=pass
11267 01:04:05.813697 <8>[ 22.581342] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=master-rmfb RESULT=pass>
11268 01:04:05.814260
11269 01:04:05.816554 Test requirement: is_i915_device(fd)
11270 01:04:05.823240 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11271 01:04:05.826262 Test r<14>[ 22.600432] [IGT] kms_addfb_basic: executing
11272 01:04:05.829194 equirement: is_i915_device(fd)
11273 01:04:05.836051 No KMS driver or no outputs, pipes: 8, outputs: 0
11274 01:04:05.845781 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 a<14>[ 22.617077] [IGT] kms_addfb_basic: starting subtest addfb25-modifier-no-flag
11275 01:04:05.849495 arch64)
11276 01:04:05.855865 Opened <14>[ 22.625346] [IGT] kms_addfb_basic: finished subtest addfb25-modifier-no-flag, SUCCESS
11277 01:04:05.862530 device: /dev/dri<14>[ 22.635144] [IGT] kms_addfb_basic: exiting, ret=0
11278 01:04:05.866436 /card0
11279 01:04:05.868816 Starting subtest: invalid-get-prop-any
11280 01:04:05.875787 [1mSubtest inva<8>[ 22.645552] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass>
11281 01:04:05.876653 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass
11283 01:04:05.878836 lid-get-prop-any: SUCCESS (0.000s)[0m
11284 01:04:05.888807 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11285 01:04:05.891790 Test <14>[ 22.665056] [IGT] kms_addfb_basic: executing
11286 01:04:05.894935 requirement: is_i915_device(fd)
11287 01:04:05.902479 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11288 01:04:05.912697 Test requirement: is_i915_de<14>[ 22.682527] [IGT] kms_addfb_basic: starting subtest addfb25-bad-modifier
11289 01:04:05.913286 vice(fd)
11290 01:04:05.918271 No KMS driver or no outputs, pipes: 8, outputs: 0
11291 01:04:05.925255 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11292 01:04:05.925771 Opened device: /dev/dri/card0
11293 01:04:05.928265 Starting subtest: invalid-get-prop
11294 01:04:05.934701 [1mSubtest invalid-get-prop: SUCCESS (0.000s)[0m
11295 01:04:05.941160 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11296 01:04:05.945016 Test requirement: is_i915_device(fd)
11297 01:04:05.950852 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11298 01:04:05.954847 Test requirement: is_i915_device(fd)
11299 01:04:05.957719 No KMS driver or no outputs, pipes: 8, outputs: 0
11300 01:04:05.964534 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11301 01:04:05.967569 Opened device: /dev/dri/card0
11302 01:04:05.970970 Starting subtest: invalid-set-prop-any
11303 01:04:05.977487 [1mSubtest invalid-set-prop-any: SUCCESS (0.000s)[0m
11304 01:04:05.984038 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11305 01:04:05.987495 Test requirement: is_i915_device(fd)
11306 01:04:05.993635 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11307 01:04:05.997582 Test requirement: is_i915_device(fd)
11308 01:04:06.000594 No KMS driver or no outputs, pipes: 8, outputs: 0
11309 01:04:06.006734 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11310 01:04:06.010059 Opened device: /dev/dri/card0
11311 01:04:06.013771 Starting subtest: invalid-set-prop
11312 01:04:06.016673 [1mSubtest invalid-set-prop: SUCCESS (0.000s)[0m
11313 01:04:06.026534 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11314 01:04:06.030511 Test requirement: is_i915_device(fd)
11315 01:04:06.037161 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11316 01:04:06.040431 Test requirement: is_i915_device(fd)
11317 01:04:06.043231 No KMS driver or no outputs, pipes: 8, outputs: 0
11318 01:04:06.050208 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11319 01:04:06.053854 Opened device: /dev/dri/card0
11320 01:04:06.057185 Starting subtest: master-rmfb
11321 01:04:06.059920 [1mSubtest master-rmfb: SUCCESS (0.000s)[0m
11322 01:04:06.066963 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11323 01:04:06.070098 Test requirement: is_i915_device(fd)
11324 01:04:06.076495 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11325 01:04:06.079596 Test requirement: is_i915_device(fd)
11326 01:04:06.086921 No KMS driver or no outputs, pipes: 8, outputs: 0
11327 01:04:06.089473 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11328 01:04:06.093640 Opened device: /dev/dri/card0
11329 01:04:06.097423 Starting subtest: addfb25-modifier-no-flag
11330 01:04:06.103015 [1mSubtest addfb25-modifier-no-flag: SUCCESS (0.000s)[0m
11331 01:04:06.109531 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11332 01:04:06.115149 Test requirement: is_i915_device(fd)
11333 01:04:06.120050 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11334 01:04:06.122802 Test requirement: is_i915_device(fd)
11335 01:04:06.129992 No KMS driver or no outputs, pipes: 8, outputs: 0
11336 01:04:06.133055 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11337 01:04:06.136662 Opened device: /dev/dri/card0
11338 01:04:06.140137 Starting subtest: addfb25-bad-modifier
11339 01:04:06.149346 (kms_addfb_basic:431) CRITICAL: Test assertion failure function addfb25_tests, file ../tests/kms_addfb_basic.c:662:
11340 01:04:06.168929 (kms_addfb_basic:431) CRITICAL: Failed assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1
11341 01:04:06.172935 (kms_addfb_basic:431) CRITICAL: error: 0 != -1
11342 01:04:06.173488 Stack trace:
11343 01:04:06.179170 #0 ../lib/igt_core.c:1971 __igt_fail_assert()
11344 01:04:06.182227 #1 [<unknown>+0xb88847e0]
11345 01:04:06.182682 #2 [<unknown>+0xb8886278]
11346 01:04:06.185505 #3 [<unknown>+0xb888167c]
11347 01:04:06.189301 #4 [__libc_start_main+0xe8]
11348 01:04:06.191958 #5 [<unknown>+0xb88816b4]
11349 01:04:06.192515 #6 [<unknown>+0xb88816b4]
11350 01:04:06.195450 Subtest addfb25-bad-modifier failed.
11351 01:04:06.198736 **** DEBUG ****
11352 01:04:06.205332 (kms_addfb_basic:431) ioctl_wrappers-DEBUG: Test requirement passed: igt_has_fb_modifiers(fd)
11353 01:04:06.215453 (kms_addfb_basic:431) CRITICAL: Test assertion failure function addfb25_tests, file ../tests/kms_addfb_basic.c:662:
11354 01:04:06.235150 (kms_addfb_basic:431) CRITICAL: Failed assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1
11355 01:04:06.238466 (kms_addfb_basic:431) CRITICAL: error: 0 != -1
11356 01:04:06.241407 (kms_addfb_basic:431) igt_core-INFO: Stack trace:
11357 01:04:06.251135 (kms_addfb_basic:431) igt_core-INFO: #0 ../lib/igt_core.c:1971 __igt_fail_assert()
11358 01:04:06.258186 (kms_addfb<14>[ 23.028249] [IGT] kms_addfb_basic: finished subtest addfb25-bad-modifier, FAIL
11359 01:04:06.264189 _basic:431) igt_<14>[ 23.037243] [IGT] kms_addfb_basic: exiting, ret=98
11360 01:04:06.267817 core-INFO: #1 [<unknown>+0xb88847e0]
11361 01:04:06.281222 (kms_addfb_basic:431) igt_core-INFO: #<8>[ 23.049623] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-bad-modifier RESULT=fail>
11362 01:04:06.281695 2 [<unknown>+0xb8886278]
11363 01:04:06.282464 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-bad-modifier RESULT=fail
11365 01:04:06.287449 (kms_addfb_basic:431) igt_core-INFO: #3 [<unknown>+0xb888167c]
11366 01:04:06.297454 (kms_addfb_basic:431) igt_core-INFO: #4 [__libc_st<14>[ 23.070155] [IGT] kms_addfb_basic: executing
11367 01:04:06.297997 art_main+0xe8]
11368 01:04:06.304654 (kms_addfb_basic:431) igt_core-INFO: #5 [<unknown>+0xb88816b4]
11369 01:04:06.313985 (kms_addfb_basic:431) igt_core-INFO: #6 [<unknown>+0xb88816b<14>[ 23.087373] [IGT] kms_addfb_basic: exiting, ret=77
11370 01:04:06.314504 4]
11371 01:04:06.318474 **** END ****
11372 01:04:06.320453 [1mSubtest addfb25-bad-modifier: FAIL (0.338s)[0m
11373 01:04:06.330381 Test r<8>[ 23.098760] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip>
11374 01:04:06.331461 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip
11376 01:04:06.336954 equirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11377 01:04:06.340308 Test requirement: is_i915_device(fd)
11378 01:04:06.347272 Test requirement not met in f<14>[ 23.120089] [IGT] kms_addfb_basic: executing
11379 01:04:06.353540 unction igt_require_i915, file ../lib/drmtest.c:720:
11380 01:04:06.357545 Test requirement: is_i915_device(fd)
11381 01:04:06.360106 No KMS driver or no outputs, pipes: 8, outputs: 0
11382 01:04:06.366875 I<14>[ 23.137987] [IGT] kms_addfb_basic: exiting, ret=77
11383 01:04:06.370046 GT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11384 01:04:06.380100 Opened devi<8>[ 23.149390] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip>
11385 01:04:06.380941 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip
11387 01:04:06.383494 ce: /dev/dri/card0
11388 01:04:06.389628 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11389 01:04:06.396380 Test requirement: is_i915<14>[ 23.169582] [IGT] kms_addfb_basic: executing
11390 01:04:06.396967 _device(fd)
11391 01:04:06.403290 [1mSubtest addfb25-x-tiled-mismatch-legacy: SKIP (0.000s)[0m
11392 01:04:06.413155 Test requirement not met in function igt_require_i915, file ../lib/<14>[ 23.186637] [IGT] kms_addfb_basic: exiting, ret=77
11393 01:04:06.416294 drmtest.c:720:
11394 01:04:06.419789 Test requirement: is_i915_device(fd)
11395 01:04:06.429906 No KMS driver or no output<8>[ 23.197679] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip>
11396 01:04:06.430758 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip
11398 01:04:06.432895 s, pipes: 8, outputs: 0
11399 01:04:06.439308 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11400 01:04:06.439769 Opened device: /dev/dri/card0
11401 01:04:06.445751 Test requirement n<14>[ 23.219120] [IGT] kms_addfb_basic: executing
11402 01:04:06.452599 ot met in function igt_require_i915, file ../lib/drmtest.c:720:
11403 01:04:06.456015 Test requirement: is_i915_device(fd)
11404 01:04:06.465702 [1mSubtest addfb25-x-tiled-legacy: SKIP <14>[ 23.237069] [IGT] kms_addfb_basic: exiting, ret=77
11405 01:04:06.466266 (0.000s)[0m
11406 01:04:06.479324 Test requirement not met in function igt_require_i<8>[ 23.248275] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip>
11407 01:04:06.480177 Received signal: <TESTCASE> TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip
11409 01:04:06.482149 915, file ../lib/drmtest.c:720:
11410 01:04:06.485764 Test requirement: is_i915_device(fd)
11411 01:04:06.489909 No KMS driver or no outputs, pipes: 8, outputs: 0
11412 01:04:06.495795 IGT-Version: 1.27.1-g6<14>[ 23.267285] [IGT] kms_addfb_basic: executing
11413 01:04:06.498864 21c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11414 01:04:06.502529 Opened device: /dev/dri/card0
11415 01:04:06.511663 Test requirement not met in function igt_require_i915, file ../li<14>[ 23.285249] [IGT] kms_addfb_basic: exiting, ret=77
11416 01:04:06.515268 b/drmtest.c:720:
11417 01:04:06.518489 Test requirement: is_i915_device(fd)
11418 01:04:06.525677 [1mSubt<8>[ 23.296568] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip>
11419 01:04:06.526527 Received signal: <TESTCASE> TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip
11421 01:04:06.531632 est addfb25-framebuffer-vs-set-tiling: SKIP (0.000s)[0m
11422 01:04:06.538087 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11423 01:04:06.545177 Tes<14>[ 23.316109] [IGT] kms_addfb_basic: executing
11424 01:04:06.548237 t requirement: is_i915_device(fd)
11425 01:04:06.551145 No KMS driver or no outputs, pipes: 8, outputs: 0
11426 01:04:06.561195 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip1<14>[ 23.333895] [IGT] kms_addfb_basic: exiting, ret=77
11427 01:04:06.561751 3 aarch64)
11428 01:04:06.565381 Opened device: /dev/dri/card0
11429 01:04:06.574635 Test requirement not met in function <8>[ 23.345398] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tile-pitch-mismatch RESULT=skip>
11430 01:04:06.575467 Received signal: <TESTCASE> TEST_CASE_ID=tile-pitch-mismatch RESULT=skip
11432 01:04:06.581707 igt_require_i915, file ../lib/drmtest.c:720:
11433 01:04:06.584809 Test requirement: is_i915_device(fd)
11434 01:04:06.592368 Test requirement not met in function igt_req<14>[ 23.365286] [IGT] kms_addfb_basic: executing
11435 01:04:06.596286 uire_i915, file ../lib/drmtest.c:720:
11436 01:04:06.597786 Test requirement: is_i915_device(fd)
11437 01:04:06.605423 [1mSubtest basic-x-tiled-legacy: SKIP (0.000s)[0m
11438 01:04:06.611193 No KMS driver <14>[ 23.381917] [IGT] kms_addfb_basic: exiting, ret=77
11439 01:04:06.615361 or no outputs, pipes: 8, outputs: 0
11440 01:04:06.624454 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Lin<8>[ 23.393482] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip>
11441 01:04:06.625348 Received signal: <TESTCASE> TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip
11443 01:04:06.627608 ux: 6.1.72-cip13 aarch64)
11444 01:04:06.630706 Opened device: /dev/dri/card0
11445 01:04:06.641206 Test requirement not met in function igt_require_i915, file ../lib/drm<14>[ 23.413500] [IGT] kms_addfb_basic: executing
11446 01:04:06.641756 test.c:720:
11447 01:04:06.644875 Test requirement: is_i915_device(fd)
11448 01:04:06.651178 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11449 01:04:06.657486 Test requi<14>[ 23.430535] [IGT] kms_addfb_basic: exiting, ret=77
11450 01:04:06.660769 rement: is_i915_device(fd)
11451 01:04:06.670629 [1mSubtest framebuffer-vs-set-tiling: SKIP (0.000s)<8>[ 23.441611] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=size-max RESULT=skip>
11452 01:04:06.671365 [0m
11453 01:04:06.672122 Received signal: <TESTCASE> TEST_CASE_ID=size-max RESULT=skip
11455 01:04:06.676742 No KMS driver or no outputs, pipes: 8, outputs: 0
11456 01:04:06.683325 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11457 01:04:06.686743 Opened device: /dev/dri/card0
11458 01:04:06.693904 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11459 01:04:06.700018 Test requirement: is_i915_devic<14>[ 23.472562] [IGT] kms_addfb_basic: executing
11460 01:04:06.700580 e(fd)
11461 01:04:06.706645 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11462 01:04:06.710464 Test requirement: is_i915_device(fd)
11463 01:04:06.720355 [1mSubtest tile-pitch-mismatch: SKIP (0.000s)[<14>[ 23.491872] [IGT] kms_addfb_basic: exiting, ret=77
11464 01:04:06.720966 0m
11465 01:04:06.727094 No KMS driver or no outputs, pipes: 8, outputs: 0
11466 01:04:06.732958 IGT-Versi<8>[ 23.503498] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-wide RESULT=skip>
11467 01:04:06.733804 Received signal: <TESTCASE> TEST_CASE_ID=too-wide RESULT=skip
11469 01:04:06.736405 on: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11470 01:04:06.739882 Opened device: /dev/dri/card0
11471 01:04:06.749849 Test requirement not met in function<14>[ 23.521603] [IGT] kms_addfb_basic: executing
11472 01:04:06.752825 igt_require_i915, file ../lib/drmtest.c:720:
11473 01:04:06.756632 Test requirement: is_i915_device(fd)
11474 01:04:06.766530 Test requirement not met in function igt_require_i915, file<14>[ 23.538459] [IGT] kms_addfb_basic: exiting, ret=77
11475 01:04:06.770278 ../lib/drmtest.c:720:
11476 01:04:06.773255 Test requirement: is_i915_device(fd)
11477 01:04:06.779760 [1mSubtest basic-<8>[ 23.549645] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-high RESULT=skip>
11478 01:04:06.780602 Received signal: <TESTCASE> TEST_CASE_ID=too-high RESULT=skip
11480 01:04:06.783470 y-tiled-legacy: SKIP (0.000s)[0m
11481 01:04:06.785873 No KMS driver or no outputs, pipes: 8, outputs: 0
11482 01:04:06.796702 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Li<14>[ 23.568875] [IGT] kms_addfb_basic: executing
11483 01:04:06.799391 nux: 6.1.72-cip13 aarch64)
11484 01:04:06.799940 Opened device: /dev/dri/card0
11485 01:04:06.808909 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11486 01:04:06.812196 Te<14>[ 23.585501] [IGT] kms_addfb_basic: exiting, ret=77
11487 01:04:06.816551 st requirement: is_i915_device(fd)
11488 01:04:06.825443 Test requirement not met in function igt_req<8>[ 23.596986] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small RESULT=skip>
11489 01:04:06.826189 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small RESULT=skip
11491 01:04:06.828884 uire_i915, file ../lib/drmtest.c:720:
11492 01:04:06.831990 Test requirement: is_i915_device(fd)
11493 01:04:06.838837 No KMS driver or no outputs, pipes: 8, outputs: 0
11494 01:04:06.841985 <14>[ 23.616109] [IGT] kms_addfb_basic: executing
11495 01:04:06.845674 [1mSubtest size-max: SKIP (0.000s)[0m
11496 01:04:06.852477 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11497 01:04:06.855327 Opened device: /dev/dri/card0
11498 01:04:06.861383 Te<14>[ 23.633041] [IGT] kms_addfb_basic: exiting, ret=77
11499 01:04:06.868600 st requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11500 01:04:06.875154 <8>[ 23.644356] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=small-bo RESULT=skip>
11501 01:04:06.875248
11502 01:04:06.875502 Received signal: <TESTCASE> TEST_CASE_ID=small-bo RESULT=skip
11504 01:04:06.878300 Test requirement: is_i915_device(fd)
11505 01:04:06.885992 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11506 01:04:06.892269 Test requirement: is_i<14>[ 23.663526] [IGT] kms_addfb_basic: executing
11507 01:04:06.892692 915_device(fd)
11508 01:04:06.898074 No KMS driver or no outputs, pipes: 8, outputs: 0
11509 01:04:06.901167 [1mSubtest too-wide: SKIP (0.000s)[0m
11510 01:04:06.907574 IGT-Version: 1.27.1-g621c2d3 (aarch6<14>[ 23.681745] [IGT] kms_addfb_basic: exiting, ret=77
11511 01:04:06.910822 4) (Linux: 6.1.72-cip13 aarch64)
11512 01:04:06.914356 Opened device: /dev/dri/card0
11513 01:04:06.925337 Test requiremen<8>[ 23.692925] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip>
11514 01:04:06.926041 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip
11516 01:04:06.931379 t not met in function igt_require_i915, file ../lib/drmtest.c:720:
11517 01:04:06.934256 Test requirement: is_i915_device(fd)
11518 01:04:06.941366 Test requirement not m<14>[ 23.713523] [IGT] kms_addfb_basic: executing
11519 01:04:06.944621 et in function igt_require_i915, file ../lib/drmtest.c:720:
11520 01:04:06.947866 Test requirement: is_i915_device(fd)
11521 01:04:06.957846 No KMS driver or no outputs, pipes: 8, output<14>[ 23.730507] [IGT] kms_addfb_basic: exiting, ret=77
11522 01:04:06.957960 s: 0
11523 01:04:06.960720 [1mSubtest too-high: SKIP (0.000s)[0m
11524 01:04:06.970671 IGT-Version: 1.27.1-g621c2d3 (aar<8>[ 23.741601] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip>
11525 01:04:06.971017 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip
11527 01:04:06.974537 ch64) (Linux: 6.1.72-cip13 aarch64)
11528 01:04:06.977686 Opened device: /dev/dri/card0
11529 01:04:06.987532 Test requirement not met in function igt_require_i915, file <14>[ 23.762010] [IGT] kms_addfb_basic: executing
11530 01:04:06.990670 ../lib/drmtest.c:720:
11531 01:04:06.995238 Test requirement: is_i915_device(fd)
11532 01:04:07.001667 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11533 01:04:07.007194 <14>[ 23.778733] [IGT] kms_addfb_basic: exiting, ret=77
11534 01:04:07.011073 Test requirement: is_i915_device(fd)
11535 01:04:07.020530 No KMS driver or no outputs, pipes: 8, out<8>[ 23.790042] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip>
11536 01:04:07.021181 puts: 0
11537 01:04:07.021841 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip
11539 01:04:07.027280 [1mSubtest bo-too-small: SKIP (0.000s)[0m
11540 01:04:07.030457 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11541 01:04:07.037144 Opened device: /dev/<14>[ 23.810599] [IGT] kms_addfb_basic: executing
11542 01:04:07.041702 dri/card0
11543 01:04:07.047316 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11544 01:04:07.050655 Test requirement: is_i915_device(fd)
11545 01:04:07.057575 Test require<14>[ 23.828565] [IGT] kms_addfb_basic: exiting, ret=77
11546 01:04:07.064162 ment not met in function igt_require_i915, file ../lib/drmtest.c:720:
11547 01:04:07.071488 Test requ<8>[ 23.839959] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip>
11548 01:04:07.072338 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip
11550 01:04:07.073649 irement: is_i915_device(fd)
11551 01:04:07.076801 No KMS driver or no outputs, pipes: 8, outputs: 0
11552 01:04:07.083535 [1mSubtest small-bo: SKIP (0.000s)[0m
11553 01:04:07.087454 IGT-Ver<14>[ 23.860520] [IGT] kms_addfb_basic: executing
11554 01:04:07.093602 sion: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11555 01:04:07.097366 Opened device: /dev/dri/card0
11556 01:04:07.103780 Test requirement not met in function igt_require_i<14>[ 23.877398] [IGT] kms_addfb_basic: exiting, ret=77
11557 01:04:07.106937 915, file ../lib/drmtest.c:720:
11558 01:04:07.110228 Test requirement: is_i915_device(fd)
11559 01:04:07.119764 Test requ<8>[ 23.889169] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-4-tiled RESULT=skip>
11560 01:04:07.120615 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-4-tiled RESULT=skip
11562 01:04:07.126228 irement not met in function igt_<8>[ 23.899342] <LAVA_SIGNAL_TESTSET STOP>
11563 01:04:07.126977 Received signal: <TESTSET> STOP
11564 01:04:07.127374 Closing test_set kms_addfb_basic
11565 01:04:07.129583 require_i915, file ../lib/drmtest.c:720:
11566 01:04:07.132951 Test requirement: is_i915_device(fd)
11567 01:04:07.136378 No KMS driver or no outputs, pipes: 8, outputs: 0
11568 01:04:07.146694 [1mSubtest bo-too-small-due-to-tiling: SKIP <8>[ 23.918132] <LAVA_SIGNAL_TESTSET START kms_atomic>
11569 01:04:07.147253 (0.000s)[0m
11570 01:04:07.147900 Received signal: <TESTSET> START kms_atomic
11571 01:04:07.148322 Starting test_set kms_atomic
11572 01:04:07.152528 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11573 01:04:07.156087 Opened device: /dev/dri/card0
11574 01:04:07.162892 Test requirem<14>[ 23.934733] [IGT] kms_atomic: executing
11575 01:04:07.166242 ent not met in f<14>[ 23.940125] [IGT] kms_atomic: exiting, ret=77
11576 01:04:07.173532 unction igt_require_i915, file ../lib/drmtest.c:720:
11577 01:04:07.179828 Test requi<8>[ 23.950143] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-overlay-legacy RESULT=skip>
11578 01:04:07.180668 Received signal: <TESTCASE> TEST_CASE_ID=plane-overlay-legacy RESULT=skip
11580 01:04:07.182313 rement: is_i915_device(fd)
11581 01:04:07.189522 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:
11582 01:04:07.196261 Test requirement:<14>[ 23.970159] [IGT] kms_atomic: executing
11583 01:04:07.202383 is_i915_device(<14>[ 23.974863] [IGT] kms_atomic: exiting, ret=77
11584 01:04:07.202939 fd)
11585 01:04:07.216102 No KMS driver or no outputs, pipes: 8, outp<8>[ 23.984769] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-legacy RESULT=skip>
11586 01:04:07.216668 uts: 0
11587 01:04:07.217406 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-legacy RESULT=skip
11589 01:04:07.219244 [1mSubtest addfb25-y-tiled-legacy: SKIP (0.000s)[0m
11590 01:04:07.228884 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch<14>[ 24.003575] [IGT] kms_atomic: executing
11591 01:04:07.229439 64)
11592 01:04:07.235636 Opened devi<14>[ 24.008221] [IGT] kms_atomic: exiting, ret=77
11593 01:04:07.239112 ce: /dev/dri/card0
11594 01:04:07.252562 Test requirement not met in function igt_require_i915, file <8>[ 24.019586] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip>
11595 01:04:07.253382 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip
11597 01:04:07.254973 ../lib/drmtest.c:720:
11598 01:04:07.258710 Test requirement: is_i915_device(fd)
11599 01:04:07.268384 Test requirement not met in function igt_require_i915, file ../lib/<14>[ 24.041047] [IGT] kms_atomic: executing
11600 01:04:07.268894 drmtest.c:720:
11601 01:04:07.271854 <14>[ 24.045640] [IGT] kms_atomic: exiting, ret=77
11602 01:04:07.275206 Test requirement: is_i915_device(fd)
11603 01:04:07.284917 No KMS dri<8>[ 24.055549] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-immutable-zpos RESULT=skip>
11604 01:04:07.285743 Received signal: <TESTCASE> TEST_CASE_ID=plane-immutable-zpos RESULT=skip
11606 01:04:07.287973 ver or no outputs, pipes: 8, outputs: 0
11607 01:04:07.295753 [1mSubtest addfb25-yf-tiled-legacy: SKIP (0.000s)[0m
11608 01:04:07.301739 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: <14>[ 24.074673] [IGT] kms_atomic: executing
11609 01:04:07.308210 6.1.72-cip13 aar<14>[ 24.080377] [IGT] kms_atomic: exiting, ret=77
11610 01:04:07.308809 ch64)
11611 01:04:07.311736 Opened device: /dev/dri/card0
11612 01:04:07.321966 Test requirement not met in function igt_r<8>[ 24.091821] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test-only RESULT=skip>
11613 01:04:07.322813 Received signal: <TESTCASE> TEST_CASE_ID=test-only RESULT=skip
11615 01:04:07.324756 equire_i915, file ../lib/drmtest.c:720:
11616 01:04:07.328450 Test requirement: is_i915_device(fd)
11617 01:04:07.338479 Test requirement not met in function igt_require_i915, file ../li<14>[ 24.111430] [IGT] kms_atomic: executing
11618 01:04:07.345020 b/drmtest.c:720:<14>[ 24.117011] [IGT] kms_atomic: exiting, ret=77
11619 01:04:07.345481
11620 01:04:07.347891 Test requirement: is_i915_device(fd)
11621 01:04:07.357768 No KMS driver or no outp<8>[ 24.128209] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-cursor-legacy RESULT=skip>
11622 01:04:07.358511 Received signal: <TESTCASE> TEST_CASE_ID=plane-cursor-legacy RESULT=skip
11624 01:04:07.361061 uts, pipes: 8, outputs: 0
11625 01:04:07.364450 [1mSubtest addfb25-y-tiled-small-legacy: SKIP (0.000s)[0m
11626 01:04:07.375113 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-ci<14>[ 24.147289] [IGT] kms_atomic: executing
11627 01:04:07.375666 p13 aarch64)
11628 01:04:07.381518 Op<14>[ 24.153076] [IGT] kms_atomic: exiting, ret=77
11629 01:04:07.384219 ened device: /dev/dri/card0
11630 01:04:07.394286 Test requirement not met in functio<8>[ 24.164399] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params RESULT=skip>
11631 01:04:07.395115 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params RESULT=skip
11633 01:04:07.397465 n igt_require_i915, file ../lib/drmtest.c:720:
11634 01:04:07.400581 Test requirement: is_i915_device(fd)
11635 01:04:07.411428 Test requirement not met in function igt_require_i915, fil<14>[ 24.183382] [IGT] kms_atomic: executing
11636 01:04:07.417461 e ../lib/drmtest<14>[ 24.189249] [IGT] kms_atomic: exiting, ret=77
11637 01:04:07.418007 .c:720:
11638 01:04:07.421096 Test requirement: is_i915_device(fd)
11639 01:04:07.431218 No KMS driver or no outputs, pipe<8>[ 24.200780] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params-fence RESULT=skip>
11640 01:04:07.432074 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params-fence RESULT=skip
11642 01:04:07.433880 s: 8, outputs: 0
11643 01:04:07.437682 [1mSubtest addfb25-4-tiled: SKIP (0.000s)[0m
11644 01:04:07.444174 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11645 01:04:07.447549 Opened d<14>[ 24.221426] [IGT] kms_atomic: executing
11646 01:04:07.453670 evice: /dev/dri/<14>[ 24.227369] [IGT] kms_atomic: exiting, ret=77
11647 01:04:07.457133 card0
11648 01:04:07.467878 No KMS driver or no outputs, pipes: 8, ou<8>[ 24.237275] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params RESULT=skip>
11649 01:04:07.468450 tputs: 0
11650 01:04:07.469145 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params RESULT=skip
11652 01:04:07.473630 [1mSubtest plane-overlay-legacy: SKIP (0.000s)[0m
11653 01:04:07.477068 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11654 01:04:07.483285 Opened devi<14>[ 24.256222] [IGT] kms_atomic: executing
11655 01:04:07.489948 ce: /dev/dri/car<14>[ 24.262148] [IGT] kms_atomic: exiting, ret=77
11656 01:04:07.490490 d0
11657 01:04:07.493411 No KMS driver or no outputs, pipes: 8, outputs: 0
11658 01:04:07.503241 [1mSubtest plane-primary<8>[ 24.273667] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip>
11659 01:04:07.504128 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip
11661 01:04:07.506865 -legacy: SKIP (0.000s)[0m
11662 01:04:07.513491 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11663 01:04:07.517378 Opened device: /dev/dri/card0
11664 01:04:07.520070 No KMS driver o<14>[ 24.294475] [IGT] kms_atomic: executing
11665 01:04:07.526682 r no outputs, pi<14>[ 24.300143] [IGT] kms_atomic: exiting, ret=77
11666 01:04:07.529938 pes: 8, outputs: 0
11667 01:04:07.543557 [1mSubtest plane-primary-overlay-mutable-zpos: SKIP (0.000s<8>[ 24.311570] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic-invalid-params RESULT=skip>
11668 01:04:07.544119 )[0m
11669 01:04:07.544811 Received signal: <TESTCASE> TEST_CASE_ID=atomic-invalid-params RESULT=skip
11671 01:04:07.549622 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11672 01:04:07.553310 Opened device: /dev/dri/card0
11673 01:04:07.559594 No KMS driver or no outputs, pipes: <14>[ 24.332018] [IGT] kms_atomic: executing
11674 01:04:07.560160 8, outputs: 0
11675 01:04:07.566616 <14>[ 24.337719] [IGT] kms_atomic: exiting, ret=77
11676 01:04:07.569368 [1mSubtest plane-immutable-zpos: SKIP (0.000s)[0m
11677 01:04:07.579568 IGT-Version:<8>[ 24.349086] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic_plane_damage RESULT=skip>
11678 01:04:07.580403 Received signal: <TESTCASE> TEST_CASE_ID=atomic_plane_damage RESULT=skip
11680 01:04:07.582422 1.27.1-g621c2d3<8>[ 24.358079] <LAVA_SIGNAL_TESTSET STOP>
11681 01:04:07.583148 Received signal: <TESTSET> STOP
11682 01:04:07.583527 Closing test_set kms_atomic
11683 01:04:07.585990 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11684 01:04:07.589754 Opened device: /dev/dri/card0
11685 01:04:07.596148 No KMS driver or no outputs, pipes: 8, outputs: 0
11686 01:04:07.602671 [1mSubtest test-only: SKIP (0.000s)<8>[ 24.375739] <LAVA_SIGNAL_TESTSET START kms_flip_event_leak>
11687 01:04:07.603517 Received signal: <TESTSET> START kms_flip_event_leak
11688 01:04:07.603905 Starting test_set kms_flip_event_leak
11689 01:04:07.605989 [0m
11690 01:04:07.609167 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11691 01:04:07.612667 Opened device: /dev/dri/card0
11692 01:04:07.618886 No KMS driver or no o<14>[ 24.392234] [IGT] kms_flip_event_leak: executing
11693 01:04:07.625353 utputs, pipes: 8<14>[ 24.398761] [IGT] kms_flip_event_leak: exiting, ret=77
11694 01:04:07.629376 , outputs: 0
11695 01:04:07.635742 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
11697 01:04:07.638431 [1mSubtest plane-cursor-legacy: S<8>[ 24.409180] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
11698 01:04:07.641917 KIP (0.000s)[0m<8>[ 24.416899] <LAVA_SIGNAL_TESTSET STOP>
11699 01:04:07.642396
11700 01:04:07.643023 Received signal: <TESTSET> STOP
11701 01:04:07.643387 Closing test_set kms_flip_event_leak
11702 01:04:07.648459 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11703 01:04:07.652476 Opened device: /dev/dri/card0
11704 01:04:07.656819 No KMS driver or no outputs, pipes: 8, outputs: 0
11705 01:04:07.662105 [1mSubtest plane-invalid-params: SKIP (0.000s)[0m
11706 01:04:07.668695 IGT-Version: 1.27<8>[ 24.439251] <LAVA_SIGNAL_TESTSET START kms_prop_blob>
11707 01:04:07.669573 Received signal: <TESTSET> START kms_prop_blob
11708 01:04:07.669964 Starting test_set kms_prop_blob
11709 01:04:07.671734 .1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11710 01:04:07.675354 Opened device: /dev/dri/card0
11711 01:04:07.681878 No KMS driver or no outputs, pipes: 8, outpu<14>[ 24.455783] [IGT] kms_prop_blob: executing
11712 01:04:07.685212 ts: 0
11713 01:04:07.691641 [1mSubte<14>[ 24.461888] [IGT] kms_prop_blob: starting subtest basic
11714 01:04:07.698317 st plane-invalid<14>[ 24.468511] [IGT] kms_prop_blob: finished subtest basic, SUCCESS
11715 01:04:07.705480 -params-fence: S<14>[ 24.476359] [IGT] kms_prop_blob: exiting, ret=0
11716 01:04:07.706052 KIP (0.000s)[0m
11717 01:04:07.715101 IGT-Version: 1.27.1-g621c2d3 (<8>[ 24.486738] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
11718 01:04:07.715946 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11720 01:04:07.717888 aarch64) (Linux: 6.1.72-cip13 aarch64)
11721 01:04:07.721494 Opened device: /dev/dri/card0
11722 01:04:07.724987 No KMS driver or no outputs, pipes: 8, outputs: 0
11723 01:04:07.731258 [1mSu<14>[ 24.503279] [IGT] kms_prop_blob: executing
11724 01:04:07.737982 btest crtc-inval<14>[ 24.509032] [IGT] kms_prop_blob: starting subtest blob-prop-core
11725 01:04:07.747520 id-params: SKIP <14>[ 24.516615] [IGT] kms_prop_blob: finished subtest blob-prop-core, SUCCESS
11726 01:04:07.748067 (0.000s)[0m
11727 01:04:07.754012 IG<14>[ 24.525162] [IGT] kms_prop_blob: exiting, ret=0
11728 01:04:07.764681 T-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1<8>[ 24.535306] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-core RESULT=pass>
11729 01:04:07.765465 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-core RESULT=pass
11731 01:04:07.767874 .72-cip13 aarch64)
11732 01:04:07.768432 Opened device: /dev/dri/card0
11733 01:04:07.775176 No KMS driver or no outputs, pipes: 8, outputs: 0
11734 01:04:07.781304 [1mSubtest crtc-invalid-p<14>[ 24.552559] [IGT] kms_prop_blob: executing
11735 01:04:07.788030 arams-fence: SKI<14>[ 24.558688] [IGT] kms_prop_blob: starting subtest blob-prop-validate
11736 01:04:07.790920 P (0.000s)[0m
11737 01:04:07.797947 <14>[ 24.566626] [IGT] kms_prop_blob: finished subtest blob-prop-validate, SUCCESS
11738 01:04:07.804187 IGT-Version: 1.2<14>[ 24.575493] [IGT] kms_prop_blob: exiting, ret=0
11739 01:04:07.813578 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 24.585724] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-validate RESULT=pass>
11740 01:04:07.814413 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-validate RESULT=pass
11742 01:04:07.817232 h64)
11743 01:04:07.817695 Opened device: /dev/dri/card0
11744 01:04:07.823826 No KMS driver or no outputs, pipes: 8, outputs: 0
11745 01:04:07.830258 [1mSubtest atomic-inval<14>[ 24.603152] [IGT] kms_prop_blob: executing
11746 01:04:07.837863 id-params: SKIP <14>[ 24.608071] [IGT] kms_prop_blob: starting subtest blob-prop-lifetime
11747 01:04:07.841100 (0.000s)[0m
11748 01:04:07.847158 IG<14>[ 24.615862] [IGT] kms_prop_blob: finished subtest blob-prop-lifetime, SUCCESS
11749 01:04:07.853402 T-Version: 1.27.<14>[ 24.624742] [IGT] kms_prop_blob: exiting, ret=0
11750 01:04:07.863107 1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch6<8>[ 24.635020] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-lifetime RESULT=pass>
11751 01:04:07.863665 4)
11752 01:04:07.864310 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-lifetime RESULT=pass
11754 01:04:07.866479 Opened device: /dev/dri/card0
11755 01:04:07.873228 No KMS driver or no outputs, pipes: 8, outputs: 0
11756 01:04:07.880005 [1mSubtest atomic_plane_d<14>[ 24.652363] [IGT] kms_prop_blob: executing
11757 01:04:07.885940 amage: SKIP (0.0<14>[ 24.657158] [IGT] kms_prop_blob: starting subtest blob-multiple
11758 01:04:07.886451 00s)[0m
11759 01:04:07.897114 IGT-Ve<14>[ 24.664730] [IGT] kms_prop_blob: finished subtest blob-multiple, SUCCESS
11760 01:04:07.899893 <14>[ 24.673120] [IGT] kms_prop_blob: exiting, ret=0
11761 01:04:07.906440 rsion: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11762 01:04:07.913781 <8>[ 24.683554] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-multiple RESULT=pass>
11763 01:04:07.914642 Received signal: <TESTCASE> TEST_CASE_ID=blob-multiple RESULT=pass
11765 01:04:07.916558 Opened device: /dev/dri/card0
11766 01:04:07.919635 No KMS driver or no outputs, pipes: 8, outputs: 0
11767 01:04:07.923360 [1mSubtest basic: SKIP (0.000s)[0m
11768 01:04:07.929417 IGT-Vers<14>[ 24.701667] [IGT] kms_prop_blob: executing
11769 01:04:07.936158 ion: 1.27.1-g621<14>[ 24.706657] [IGT] kms_prop_blob: starting subtest invalid-get-prop-any
11770 01:04:07.946416 c2d3 (aarch64) (<14>[ 24.714616] [IGT] kms_prop_blob: finished subtest invalid-get-prop-any, SUCCESS
11771 01:04:07.949106 <14>[ 24.723684] [IGT] kms_prop_blob: exiting, ret=0
11772 01:04:07.953484 Linux: 6.1.72-cip13 aarch64)
11773 01:04:07.956164 Opened device: /dev/dri/card0
11774 01:04:07.962194 Sta<8>[ 24.733852] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
11775 01:04:07.963024 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
11777 01:04:07.965319 rting subtest: basic
11778 01:04:07.968850 [1mSubtest basic: SUCCESS (0.000s)[0m
11779 01:04:07.979960 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch<14>[ 24.752813] [IGT] kms_prop_blob: executing
11780 01:04:07.980517 64)
11781 01:04:07.988320 Opened devi<14>[ 24.757728] [IGT] kms_prop_blob: starting subtest invalid-get-prop
11782 01:04:07.996017 ce: /dev/dri/car<14>[ 24.765463] [IGT] kms_prop_blob: finished subtest invalid-get-prop, SUCCESS
11783 01:04:08.001974 <14>[ 24.774176] [IGT] kms_prop_blob: exiting, ret=0
11784 01:04:08.002438 d0
11785 01:04:08.005309 Starting subtest: blob-prop-core
11786 01:04:08.012364 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
11788 01:04:08.016506 [1mSubtest blob-prop-core<8>[ 24.784332] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
11789 01:04:08.017012 : SUCCESS (0.000s)[0m
11790 01:04:08.021880 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11791 01:04:08.024825 Opened device: /dev/dri/card0
11792 01:04:08.031788 Starting subtest: b<14>[ 24.803512] [IGT] kms_prop_blob: executing
11793 01:04:08.039130 lob-prop-validat<14>[ 24.809260] [IGT] kms_prop_blob: starting subtest invalid-set-prop-any
11794 01:04:08.039705 e
11795 01:04:08.048417 [1mSubtest b<14>[ 24.817336] [IGT] kms_prop_blob: finished subtest invalid-set-prop-any, SUCCESS
11796 01:04:08.054555 lob-prop-validat<14>[ 24.826509] [IGT] kms_prop_blob: exiting, ret=0
11797 01:04:08.058640 e: SUCCESS (0.000s)[0m
11798 01:04:08.064837 IGT-Version: 1.27.1-g62<8>[ 24.836755] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
11799 01:04:08.065579 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
11801 01:04:08.071841 1c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11802 01:04:08.075174 Opened device: /dev/dri/card0
11803 01:04:08.078099 Starting subtest: blob-prop-lifetime
11804 01:04:08.081163 [1mSubtest <14>[ 24.854743] [IGT] kms_prop_blob: executing
11805 01:04:08.091778 blob-prop-lifeti<14>[ 24.860446] [IGT] kms_prop_blob: starting subtest invalid-set-prop
11806 01:04:08.097487 me: SUCCESS (0.0<14>[ 24.868181] [IGT] kms_prop_blob: finished subtest invalid-set-prop, SUCCESS
11807 01:04:08.103757 <14>[ 24.876901] [IGT] kms_prop_blob: exiting, ret=0
11808 01:04:08.103838 00s)[0m
11809 01:04:08.113665 IGT-Version: 1.27.1-g621c2d3 (aarch64)<8>[ 24.885719] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
11810 01:04:08.113921 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
11812 01:04:08.120096 (Linux: 6.1.72-<8>[ 24.894360] <LAVA_SIGNAL_TESTSET STOP>
11813 01:04:08.120178 cip13 aarch64)
11814 01:04:08.120448 Received signal: <TESTSET> STOP
11815 01:04:08.120514 Closing test_set kms_prop_blob
11816 01:04:08.123888 Opened device: /dev/dri/card0
11817 01:04:08.127699 Starting subtest: blob-multiple
11818 01:04:08.130672 [1mSubtest blob-multiple: SUCCESS (0.000s)[0m
11819 01:04:08.140953 IGT-Version: 1.27.1-g621c2d3 (a<8>[ 24.911663] <LAVA_SIGNAL_TESTSET START kms_setmode>
11820 01:04:08.141625 Received signal: <TESTSET> START kms_setmode
11821 01:04:08.141974 Starting test_set kms_setmode
11822 01:04:08.143856 arch64) (Linux: 6.1.72-cip13 aarch64)
11823 01:04:08.146945 Opened device: /dev/dri/card0
11824 01:04:08.150405 Starting subtest: invalid-get-prop-any
11825 01:04:08.156846 [1mSubtest invalid-get-prop-any: SUCCESS (0.000s)<14>[ 24.930536] [IGT] kms_setmode: executing
11826 01:04:08.157262 [0m
11827 01:04:08.164070 IGT-Versio<14>[ 24.936424] [IGT] kms_setmode: starting subtest basic
11828 01:04:08.171236 n: 1.27.1-g621c2<14>[ 24.943011] [IGT] kms_setmode: finished subtest basic, SKIP
11829 01:04:08.177381 <14>[ 24.950347] [IGT] kms_setmode: exiting, ret=77
11830 01:04:08.180692 d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11831 01:04:08.186792 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
11833 01:04:08.190188 Opened device: /dev/<8>[ 24.960529] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
11834 01:04:08.190611 dri/card0
11835 01:04:08.194761 Starting subtest: invalid-get-prop
11836 01:04:08.196799 [1mSubtest invalid-get-prop: SUCCESS (0.000s)[0m
11837 01:04:08.207313 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux<14>[ 24.978837] [IGT] kms_setmode: executing
11838 01:04:08.213175 : 6.1.72-cip13 a<14>[ 24.984344] [IGT] kms_setmode: starting subtest basic-clone-single-crtc
11839 01:04:08.213643 arch64)
11840 01:04:08.223905 Opened <14>[ 24.992439] [IGT] kms_setmode: finished subtest basic-clone-single-crtc, SKIP
11841 01:04:08.230070 device: /dev/dri<14>[ 25.001362] [IGT] kms_setmode: exiting, ret=77
11842 01:04:08.230633 /card0
11843 01:04:08.233271 Starting subtest: invalid-set-prop-any
11844 01:04:08.240010 <8>[ 25.011493] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-clone-single-crtc RESULT=skip>
11845 01:04:08.240862 Received signal: <TESTCASE> TEST_CASE_ID=basic-clone-single-crtc RESULT=skip
11847 01:04:08.246474 [1mSubtest invalid-set-prop-any: SUCCESS (0.000s)[0m
11848 01:04:08.257042 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-ci<14>[ 25.029358] [IGT] kms_setmode: executing
11849 01:04:08.257590 p13 aarch64)
11850 01:04:08.263237 Op<14>[ 25.034007] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc
11851 01:04:08.272986 ened device: /de<14>[ 25.042363] [IGT] kms_setmode: finished subtest invalid-clone-single-crtc, SKIP
11852 01:04:08.277284 <14>[ 25.051425] [IGT] kms_setmode: exiting, ret=77
11853 01:04:08.280096 v/dri/card0
11854 01:04:08.283604 Starting subtest: invalid-set-prop
11855 01:04:08.289313 <8>[ 25.060349] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip>
11856 01:04:08.289783
11857 01:04:08.290435 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip
11859 01:04:08.296093 [1mSubtest invalid-set-prop: SUCCESS (0.000s)[0m
11860 01:04:08.303212 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13<14>[ 25.078203] [IGT] kms_setmode: executing
11861 01:04:08.306079 aarch64)
11862 01:04:08.312692 Opene<14>[ 25.082855] [IGT] kms_setmode: starting subtest invalid-clone-exclusive-crtc
11863 01:04:08.322930 d device: /dev/d<14>[ 25.091421] [IGT] kms_setmode: finished subtest invalid-clone-exclusive-crtc, SKIP
11864 01:04:08.326241 <14>[ 25.100754] [IGT] kms_setmode: exiting, ret=77
11865 01:04:08.329443 ri/card0
11866 01:04:08.329997 Starting subtest: basic
11867 01:04:08.332258 No dynamic tests executed.
11868 01:04:08.342303 <8>[ 25.111119] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip>
11869 01:04:08.343125 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip
11871 01:04:08.345149 [1mSubtest basic: SKIP (0.000s)[0m
11872 01:04:08.352083 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11873 01:04:08.352640 Opened device: /dev/dri/card0
11874 01:04:08.358960 Starti<14>[ 25.130752] [IGT] kms_setmode: executing
11875 01:04:08.365207 ng subtest: basi<14>[ 25.136682] [IGT] kms_setmode: starting subtest clone-exclusive-crtc
11876 01:04:08.375739 c-clone-single-c<14>[ 25.144548] [IGT] kms_setmode: finished subtest clone-exclusive-crtc, SKIP
11877 01:04:08.376301 rtc
11878 01:04:08.381551 No dynamic <14>[ 25.153261] [IGT] kms_setmode: exiting, ret=77
11879 01:04:08.382113 tests executed.
11880 01:04:08.391805 [1mSubtest basic-clone-single-<8>[ 25.163361] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clone-exclusive-crtc RESULT=skip>
11881 01:04:08.392629 Received signal: <TESTCASE> TEST_CASE_ID=clone-exclusive-crtc RESULT=skip
11883 01:04:08.395299 crtc: SKIP (0.000s)[0m
11884 01:04:08.401605 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11885 01:04:08.407905 Opened device: /d<14>[ 25.180907] [IGT] kms_setmode: executing
11886 01:04:08.408366 ev/dri/card0
11887 01:04:08.414746 St<14>[ 25.186627] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc-stealing
11888 01:04:08.425029 arting subtest: <14>[ 25.194792] [IGT] kms_setmode: finished subtest invalid-clone-single-crtc-stealing, SKIP
11889 01:04:08.431389 invalid-clone-si<14>[ 25.204563] [IGT] kms_setmode: exiting, ret=77
11890 01:04:08.434310 ngle-crtc
11891 01:04:08.434773 No dynamic tests executed.
11892 01:04:08.447545 [1mSubtest invalid-clone<8>[ 25.215116] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip>
11893 01:04:08.448404 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip
11895 01:04:08.450993 -single-crtc: SK<8>[ 25.226258] <LAVA_SIGNAL_TESTSET STOP>
11896 01:04:08.451727 Received signal: <TESTSET> STOP
11897 01:04:08.452108 Closing test_set kms_setmode
11898 01:04:08.455170 IP (0.000s)[0m
11899 01:04:08.461969 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11900 01:04:08.463734 Opened device: /dev/dri/card0
11901 01:04:08.470987 Starting subtest: invalid-clone-exclusive-<8>[ 25.243481] <LAVA_SIGNAL_TESTSET START kms_vblank>
11902 01:04:08.471546 crtc
11903 01:04:08.472193 Received signal: <TESTSET> START kms_vblank
11904 01:04:08.472579 Starting test_set kms_vblank
11905 01:04:08.474040 No dynamic tests executed.
11906 01:04:08.480261 [1mSubtest invalid-clone-exclusive-crtc: SKIP (0.000s)[0m
11907 01:04:08.490347 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch<14>[ 25.262927] [IGT] kms_vblank: executing
11908 01:04:08.490898 64)
11909 01:04:08.496802 Opened devi<14>[ 25.268335] [IGT] kms_vblank: exiting, ret=77
11910 01:04:08.497345 ce: /dev/dri/card0
11911 01:04:08.506880 Starting subtest: clone-excl<8>[ 25.278050] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid RESULT=skip>
11912 01:04:08.507440 usive-crtc
11913 01:04:08.508092 Received signal: <TESTCASE> TEST_CASE_ID=invalid RESULT=skip
11915 01:04:08.510179 No dynamic tests executed.
11916 01:04:08.514406 [1mSubtest clone-exclusive-crtc: SKIP (0.000s)[0m
11917 01:04:08.523756 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.<14>[ 25.295795] [IGT] kms_vblank: executing
11918 01:04:08.530878 72-cip13 aarch64<14>[ 25.301800] [IGT] kms_vblank: exiting, ret=77
11919 01:04:08.531468 )
11920 01:04:08.533216 Opened device: /dev/dri/card0
11921 01:04:08.543253 Starting subtest: invalid-clone-single-crtc-st<8>[ 25.313264] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-id RESULT=skip>
11922 01:04:08.543817 ealing
11923 01:04:08.544469 Received signal: <TESTCASE> TEST_CASE_ID=crtc-id RESULT=skip
11925 01:04:08.546332 No dynamic tests executed.
11926 01:04:08.553248 [1mSubtest invalid-clone-single-crtc-stealing: SKIP (0.000s)[0m
11927 01:04:08.559789 IGT-Version: 1.27.1-g621c2d3 (aarch64) (L<14>[ 25.332532] [IGT] kms_vblank: executing
11928 01:04:08.566404 inux: 6.1.72-cip<14>[ 25.338305] [IGT] kms_vblank: exiting, ret=77
11929 01:04:08.567142 13 aarch64)
11930 01:04:08.569549 Opened device: /dev/dri/card0
11931 01:04:08.576428 No K<8>[ 25.348113] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip>
11932 01:04:08.577337 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip
11934 01:04:08.582688 MS driver or no outputs, pipes: 8, outputs: 0
11935 01:04:08.585868 [1mSubtest invalid: SKIP (0.000s)[0m
11936 01:04:08.592787 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip<14>[ 25.367196] [IGT] kms_vblank: executing
11937 01:04:08.596335 13 aarch64)
11938 01:04:08.600186 Ope<14>[ 25.373076] [IGT] kms_vblank: exiting, ret=77
11939 01:04:08.602936 ned device: /dev/dri/card0
11940 01:04:08.612883 No KMS driver or no outputs, pipes: <8>[ 25.384171] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle RESULT=skip>
11941 01:04:08.613723 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle RESULT=skip
11943 01:04:08.615589 8, outputs: 0
11944 01:04:08.619308 [1mSubtest crtc-id: SKIP (0.000s)[0m
11945 01:04:08.625443 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11946 01:04:08.628949 Opened device: /dev<14>[ 25.403023] [IGT] kms_vblank: executing
11947 01:04:08.632504 /dri/card0
11948 01:04:08.635482 No K<14>[ 25.408906] [IGT] kms_vblank: exiting, ret=77
11949 01:04:08.639356 MS driver or no outputs, pipes: 8, outputs: 0
11950 01:04:08.653187 [1mSubtest pipe-A-accuracy-idle:<8>[ 25.420199] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip>
11951 01:04:08.653752 SKIP (0.000s)[0m
11952 01:04:08.654403 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip
11954 01:04:08.658666 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11955 01:04:08.661939 Opened device: /dev/dri/card0
11956 01:04:08.669138 No KMS driver or no out<14>[ 25.440805] [IGT] kms_vblank: executing
11957 01:04:08.675614 puts, pipes: 8, <14>[ 25.446851] [IGT] kms_vblank: exiting, ret=77
11958 01:04:08.676175 outputs: 0
11959 01:04:08.678644 [1mSubtest pipe-A-query-idle: SKIP (0.000s)[0m
11960 01:04:08.688307 IG<8>[ 25.457867] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked RESULT=skip>
11961 01:04:08.689157 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked RESULT=skip
11963 01:04:08.691716 T-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11964 01:04:08.694560 Opened device: /dev/dri/card0
11965 01:04:08.701269 No KMS driver or no outputs, <14>[ 25.476506] [IGT] kms_vblank: executing
11966 01:04:08.710012 pipes: 8, output<14>[ 25.481328] [IGT] kms_vblank: exiting, ret=77
11967 01:04:08.710571 s: 0
11968 01:04:08.721721 [1mSubtest pipe-A-query-idle-hang: SKIP (<8>[ 25.491209] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip>
11969 01:04:08.722288 0.000s)[0m
11970 01:04:08.722989 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip
11972 01:04:08.727963 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11973 01:04:08.731094 Opened device: /dev/dri/card0
11974 01:04:08.738084 No KMS driver <14>[ 25.510311] [IGT] kms_vblank: executing
11975 01:04:08.741179 or no outputs, p<14>[ 25.515100] [IGT] kms_vblank: exiting, ret=77
11976 01:04:08.744385 ipes: 8, outputs: 0
11977 01:04:08.748902 [1mSubtest pipe-A-query-forked: SKIP (0.000s)[0m
11978 01:04:08.757782 IGT-Ver<8>[ 25.526586] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy RESULT=skip>
11979 01:04:08.758666 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy RESULT=skip
11981 01:04:08.760668 sion: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
11982 01:04:08.765396 Opened device: /dev/dri/card0
11983 01:04:08.770991 No KMS driver or no outputs, pipes: 8, outputs: 0
11984 01:04:08.774268 <14>[ 25.546459] [IGT] kms_vblank: executing
11985 01:04:08.774824
11986 01:04:08.780665 [1mSubtest pip<14>[ 25.552434] [IGT] kms_vblank: exiting, ret=77
11987 01:04:08.784483 e-A-query-forked-hang: SKIP (0.000s)[0m
11988 01:04:08.793732 IGT-Version: 1.27.1-g621c2d3 (aarch64)<8>[ 25.563823] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip>
11989 01:04:08.794666 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip
11991 01:04:08.796874 (Linux: 6.1.72-cip13 aarch64)
11992 01:04:08.800578 Opened device: /dev/dri/card0
11993 01:04:08.803969 No KMS driver or no outputs, pipes: 8, outputs: 0
11994 01:04:08.810219 [1mSubtest pipe-A-query-busy:<14>[ 25.584593] [IGT] kms_vblank: executing
11995 01:04:08.817209 SKIP (0.000s)[<14>[ 25.590209] [IGT] kms_vblank: exiting, ret=77
11996 01:04:08.817757 0m
11997 01:04:08.830001 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 <8>[ 25.601456] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip>
11998 01:04:08.830850 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip
12000 01:04:08.833673 aarch64)
12001 01:04:08.834135 Opened device: /dev/dri/card0
12002 01:04:08.840496 No KMS driver or no outputs, pipes: 8, outputs: 0
12003 01:04:08.846471 [1mSubtest pipe-A-query-busy-hang: SKIP (0.000s)[0<14>[ 25.620713] [IGT] kms_vblank: executing
12004 01:04:08.846944 m
12005 01:04:08.853615 IGT-Version: <14>[ 25.626833] [IGT] kms_vblank: exiting, ret=77
12006 01:04:08.859597 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12007 01:04:08.866884 Opened <8>[ 25.636671] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip>
12008 01:04:08.867624 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip
12010 01:04:08.870143 device: /dev/dri/card0
12011 01:04:08.873203 No KMS driver or no outputs, pipes: 8, outputs: 0
12012 01:04:08.883960 [1mSubtest pipe-A-query-forked-busy: SKIP (0.000s)[<14>[ 25.656484] [IGT] kms_vblank: executing
12013 01:04:08.884251 0m
12014 01:04:08.890024 IGT-Version:<14>[ 25.662225] [IGT] kms_vblank: exiting, ret=77
12015 01:04:08.895727 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12016 01:04:08.902289 Opened device: /dev/dr<8>[ 25.673671] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle RESULT=skip>
12017 01:04:08.902782 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle RESULT=skip
12019 01:04:08.905521 i/card0
12020 01:04:08.909024 No KMS driver or no outputs, pipes: 8, outputs: 0
12021 01:04:08.915132 [1mSubtest pipe-A-query-forked-busy-hang: SKIP (0.000s)[0m
12022 01:04:08.918734 IGT-Ve<14>[ 25.693422] [IGT] kms_vblank: executing
12023 01:04:08.925418 rsion: 1.27.1-g6<14>[ 25.698097] [IGT] kms_vblank: exiting, ret=77
12024 01:04:08.928843 21c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12025 01:04:08.939108 Opened device: /<8>[ 25.708181] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip>
12026 01:04:08.939666 dev/dri/card0
12027 01:04:08.940314 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip
12029 01:04:08.945201 No KMS driver or no outputs, pipes: 8, outputs: 0
12030 01:04:08.948616 [1mSubtest pipe-A-wait-idle: SKIP (0.000s)[0m
12031 01:04:08.955612 IGT-Version: <14>[ 25.727321] [IGT] kms_vblank: executing
12032 01:04:08.958689 1.27.1-g621c2d3 <14>[ 25.732881] [IGT] kms_vblank: exiting, ret=77
12033 01:04:08.965556 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12034 01:04:08.972155 Opened device: /dev/dri<8>[ 25.744146] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked RESULT=skip>
12035 01:04:08.973054 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked RESULT=skip
12037 01:04:08.976284 /card0
12038 01:04:08.978955 No KMS driver or no outputs, pipes: 8, outputs: 0
12039 01:04:08.982082 [1mSubtest pipe-A-wait-idle-hang: SKIP (0.000s)[0m
12040 01:04:08.988243 IGT-Version: 1.<14>[ 25.762773] [IGT] kms_vblank: executing
12041 01:04:08.995195 27.1-g621c2d3 (a<14>[ 25.767408] [IGT] kms_vblank: exiting, ret=77
12042 01:04:08.998524 arch64) (Linux: 6.1.72-cip13 aarch64)
12043 01:04:09.008764 Opened device: /dev/dri/c<8>[ 25.778571] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip>
12044 01:04:09.009328 ard0
12045 01:04:09.009968 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip
12047 01:04:09.011778 No KMS driver or no outputs, pipes: 8, outputs: 0
12048 01:04:09.018285 [1mSubtest pipe-A-wait-forked: SKIP (0.000s)[0m
12049 01:04:09.026514 IGT-Version: 1.27.1-g621c2d3 (aarch6<14>[ 25.798544] [IGT] kms_vblank: executing
12050 01:04:09.031851 4) (Linux: 6.1.7<14>[ 25.803860] [IGT] kms_vblank: exiting, ret=77
12051 01:04:09.032428 2-cip13 aarch64)
12052 01:04:09.036081 Opened device: /dev/dri/card0
12053 01:04:09.045460 No KMS driver or no outputs, pi<8>[ 25.815196] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy RESULT=skip>
12054 01:04:09.046304 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy RESULT=skip
12056 01:04:09.048489 pes: 8, outputs: 0
12057 01:04:09.051802 [1mSubtest pipe-A-wait-forked-hang: SKIP (0.000s)[0m
12058 01:04:09.061122 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)<14>[ 25.835418] [IGT] kms_vblank: executing
12059 01:04:09.061665
12060 01:04:09.068318 Opened device:<14>[ 25.841040] [IGT] kms_vblank: exiting, ret=77
12061 01:04:09.072339 /dev/dri/card0
12062 01:04:09.075592 No KMS driver or no outputs, pipes: 8, outputs: 0
12063 01:04:09.085104 [1mSubtest <8>[ 25.852374] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip>
12064 01:04:09.086012 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip
12066 01:04:09.087390 pipe-A-wait-busy: SKIP (0.000s)[0m
12067 01:04:09.091672 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12068 01:04:09.094801 Opened device: /dev/dri/card0
12069 01:04:09.101060 No KMS<14>[ 25.872711] [IGT] kms_vblank: executing
12070 01:04:09.107791 driver or no ou<14>[ 25.878883] [IGT] kms_vblank: exiting, ret=77
12071 01:04:09.108427 tputs, pipes: 8, outputs: 0
12072 01:04:09.121695 [1mSubtest pipe-A-wait-busy-hang: <8>[ 25.889954] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip>
12073 01:04:09.122248 SKIP (0.000s)[0m
12074 01:04:09.122889 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip
12076 01:04:09.127801 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12077 01:04:09.131567 Opened device: /dev/dri/card0
12078 01:04:09.137350 No KMS driver or no outp<14>[ 25.909595] [IGT] kms_vblank: executing
12079 01:04:09.144322 uts, pipes: 8, o<14>[ 25.915270] [IGT] kms_vblank: exiting, ret=77
12080 01:04:09.144813 utputs: 0
12081 01:04:09.154166 [1mSubtest pipe-A-wait-forked-busy: <8>[ 25.924981] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip>
12082 01:04:09.155006 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip
12084 01:04:09.157127 SKIP (0.000s)[0m
12085 01:04:09.163757 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12086 01:04:09.167754 Opened device: /dev/dri/card0
12087 01:04:09.170956 No KMS driver or no outp<14>[ 25.944858] [IGT] kms_vblank: executing
12088 01:04:09.178460 uts, pipes: 8, o<14>[ 25.950783] [IGT] kms_vblank: exiting, ret=77
12089 01:04:09.180376 utputs: 0
12090 01:04:09.190883 [1mSubtest pipe-A-wait-forked-busy-hang: SKIP (0.000<8>[ 25.961703] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip>
12091 01:04:09.191724 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip
12093 01:04:09.193364 s)[0m
12094 01:04:09.200322 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12095 01:04:09.200915 Opened device: /dev/dri/card0
12096 01:04:09.206826 No KMS driver or no outputs, pipes: 8, outputs: 0
12097 01:04:09.209863 [1mSubtest pipe-A-ts-continuation-idle: SKIP (0.000s)[0m
12098 01:04:09.220679 <14>[ 25.993687] [IGT] kms_vblank: executing
12099 01:04:09.227468 IGT-Version: 1.2<14>[ 25.998946] [IGT] kms_vblank: exiting, ret=77
12100 01:04:09.230370 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12101 01:04:09.240343 Opened dev<8>[ 26.009652] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip>
12102 01:04:09.241303 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip
12104 01:04:09.244195 ice: /dev/dri/card0
12105 01:04:09.246977 No KMS driver or no outputs, pipes: 8, outputs: 0
12106 01:04:09.253326 [1mSubtest pipe-A-ts-continuation-idle-hang: SKIP (0.000s)[0m
12107 01:04:09.256779 <14>[ 26.029986] [IGT] kms_vblank: executing
12108 01:04:09.263053 IGT-Version: 1.2<14>[ 26.035131] [IGT] kms_vblank: exiting, ret=77
12109 01:04:09.276263 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 26.044969] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip>
12110 01:04:09.276886 h64)
12111 01:04:09.277536 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip
12113 01:04:09.279450 Opened device: /dev/dri/card0
12114 01:04:09.283273 No KMS driver or no outputs, pipes: 8, outputs: 0
12115 01:04:09.289610 [1mSubtest pipe-A-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12116 01:04:09.296918 <14>[ 26.069313] [IGT] kms_vblank: executing
12117 01:04:09.303087 IGT-Version: 1.2<14>[ 26.073993] [IGT] kms_vblank: exiting, ret=77
12118 01:04:09.313448 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip
12120 01:04:09.316302 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 26.083801] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip>
12121 01:04:09.316934 h64)
12122 01:04:09.318981 Opened device: /dev/dri/card0
12123 01:04:09.322310 No KMS driver or no outputs, pipes: 8, outputs: 0
12124 01:04:09.332466 [1mSubtest pipe-A-ts-continuation-dpms-suspend: SKIP (0<14>[ 26.104121] [IGT] kms_vblank: executing
12125 01:04:09.333078 .000s)[0m
12126 01:04:09.335998 <14>[ 26.109983] [IGT] kms_vblank: exiting, ret=77
12127 01:04:09.348832 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6<8>[ 26.119465] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip>
12128 01:04:09.349663 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip
12130 01:04:09.352701 .1.72-cip13 aarch64)
12131 01:04:09.355148 Opened device: /dev/dri/card0
12132 01:04:09.358473 No KMS driver or no outputs, pipes: 8, outputs: 0
12133 01:04:09.365195 [1mSubtest pipe-A-ts-co<14>[ 26.138061] [IGT] kms_vblank: executing
12134 01:04:09.371751 ntinuation-suspe<14>[ 26.143878] [IGT] kms_vblank: exiting, ret=77
12135 01:04:09.372316 nd: SKIP (0.000s)[0m
12136 01:04:09.385470 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip<8>[ 26.155337] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip>
12137 01:04:09.386329 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip
12139 01:04:09.388140 13 aarch64)
12140 01:04:09.392383 Opened device: /dev/dri/card0
12141 01:04:09.395745 No KMS driver or no outputs, pipes: 8, outputs: 0
12142 01:04:09.406800 [1mSubtest pipe-A-ts-continuation-modeset: SKIP <14>[ 26.176550] [IGT] kms_vblank: executing
12143 01:04:09.407355 (0.000s)[0m
12144 01:04:09.408211 <14>[ 26.182440] [IGT] kms_vblank: exiting, ret=77
12145 01:04:09.421613 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6<8>[ 26.191997] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip>
12146 01:04:09.422480 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip
12148 01:04:09.425503 .1.72-cip13 aarch64)
12149 01:04:09.428475 Opened device: /dev/dri/card0
12150 01:04:09.431088 No KMS driver or no outputs, pipes: 8, outputs: 0
12151 01:04:09.437922 [1mSubtest pipe-A-ts-co<14>[ 26.212016] [IGT] kms_vblank: executing
12152 01:04:09.444791 ntinuation-modes<14>[ 26.216775] [IGT] kms_vblank: exiting, ret=77
12153 01:04:09.448213 et-hang: SKIP (0.000s)[0m
12154 01:04:09.461520 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.7<8>[ 26.228058] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip>
12155 01:04:09.462080 2-cip13 aarch64)
12156 01:04:09.462728 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip
12158 01:04:09.464285 Opened device: /dev/dri/card0
12159 01:04:09.468683 No KMS driver or no outputs, pipes: 8, outputs: 0
12160 01:04:09.477750 [1mSubtest pipe-A-ts-continuation-modeset-r<14>[ 26.249624] [IGT] kms_vblank: executing
12161 01:04:09.485007 pm: SKIP (0.000s<14>[ 26.255584] [IGT] kms_vblank: exiting, ret=77
12162 01:04:09.485560 )[0m
12163 01:04:09.497014 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip<8>[ 26.265503] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip>
12164 01:04:09.497472 13 aarch64)
12165 01:04:09.498113 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip
12167 01:04:09.500687 Opened device: /dev/dri/card0
12168 01:04:09.503736 No KMS driver or no outputs, pipes: 8, outputs: 0
12169 01:04:09.510454 [1mSubtest pipe-B-accuracy-idle:<14>[ 26.284765] [IGT] kms_vblank: executing
12170 01:04:09.517057 SKIP (0.000s)[<14>[ 26.290239] [IGT] kms_vblank: exiting, ret=77
12171 01:04:09.517522 0m
12172 01:04:09.530588 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 <8>[ 26.301395] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle RESULT=skip>
12173 01:04:09.531282 aarch64)
12174 01:04:09.532064 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle RESULT=skip
12176 01:04:09.533609 Opened device: /dev/dri/card0
12177 01:04:09.540618 No KMS driver or no outputs, pipes: 8, outputs: 0
12178 01:04:09.543841 [1mSubtest pipe-B-query-idle: SKIP (0.000s)[0m
12179 01:04:09.546869 <14>[ 26.320457] [IGT] kms_vblank: executing
12180 01:04:09.553030 IGT-Version: 1.2<14>[ 26.326075] [IGT] kms_vblank: exiting, ret=77
12181 01:04:09.556926 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12182 01:04:09.566728 Opened dev<8>[ 26.337334] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip>
12183 01:04:09.567589 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip
12185 01:04:09.569515 ice: /dev/dri/card0
12186 01:04:09.573361 No KMS driver or no outputs, pipes: 8, outputs: 0
12187 01:04:09.576206 [1mSubtest pipe-B-query-idle-hang: SKIP (0.000s)[0m
12188 01:04:09.583569 <14>[ 26.356626] [IGT] kms_vblank: executing
12189 01:04:09.590123 IGT-Version: 1.2<14>[ 26.361230] [IGT] kms_vblank: exiting, ret=77
12190 01:04:09.599818 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 26.371184] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked RESULT=skip>
12191 01:04:09.600385 h64)
12192 01:04:09.601075 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked RESULT=skip
12194 01:04:09.603109 Opened device: /dev/dri/card0
12195 01:04:09.606682 No KMS driver or no outputs, pipes: 8, outputs: 0
12196 01:04:09.616594 [1mSubtest pipe-B-query-forked: SKIP (0<14>[ 26.389776] [IGT] kms_vblank: executing
12197 01:04:09.617210 .000s)[0m
12198 01:04:09.622900 <14>[ 26.394892] [IGT] kms_vblank: exiting, ret=77
12199 01:04:09.636077 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 26.404177] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip>
12200 01:04:09.636640 h64)
12201 01:04:09.637376 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip
12203 01:04:09.639635 Opened device: /dev/dri/card0
12204 01:04:09.643311 No KMS driver or no outputs, pipes: 8, outputs: 0
12205 01:04:09.649344 [1mSubtest pipe-B-query-forked-hang: SKIP (0.000s)[0m
12206 01:04:09.662233 <14>[ 26.436082] [IGT] kms_vblank: executing
12207 01:04:09.669284 IGT-Version: 1.2<14>[ 26.441152] [IGT] kms_vblank: exiting, ret=77
12208 01:04:09.672426 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12209 01:04:09.682519 Opened dev<8>[ 26.451957] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy RESULT=skip>
12210 01:04:09.683075 ice: /dev/dri/card0
12211 01:04:09.683716 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy RESULT=skip
12213 01:04:09.685619 No KMS driver or no outputs, pipes: 8, outputs: 0
12214 01:04:09.692694 [1mSubtest pipe-B-query-busy: SKIP (0.000s)[0m
12215 01:04:09.695453 <14>[ 26.470768] [IGT] kms_vblank: executing
12216 01:04:09.702389 IGT-Version: 1.2<14>[ 26.475378] [IGT] kms_vblank: exiting, ret=77
12217 01:04:09.708891 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12218 01:04:09.715436 Opened dev<8>[ 26.486580] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip>
12219 01:04:09.716257 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip
12221 01:04:09.718786 ice: /dev/dri/card0
12222 01:04:09.722113 No KMS driver or no outputs, pipes: 8, outputs: 0
12223 01:04:09.728703 [1mSubtest pipe-B-query-busy-hang: SKIP (0.000s)[0m
12224 01:04:09.732237 <14>[ 26.506518] [IGT] kms_vblank: executing
12225 01:04:09.738984 IGT-Version: 1.2<14>[ 26.511166] [IGT] kms_vblank: exiting, ret=77
12226 01:04:09.741857 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12227 01:04:09.751696 Opened dev<8>[ 26.522260] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip>
12228 01:04:09.752568 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip
12230 01:04:09.754908 ice: /dev/dri/card0
12231 01:04:09.758015 No KMS driver or no outputs, pipes: 8, outputs: 0
12232 01:04:09.764823 [1mSubtest pipe-B-query-forked-busy: SKIP (0.000s)[0m
12233 01:04:09.768082 <14>[ 26.542378] [IGT] kms_vblank: executing
12234 01:04:09.774929 IGT-Version: 1.2<14>[ 26.547085] [IGT] kms_vblank: exiting, ret=77
12235 01:04:09.778232 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12236 01:04:09.788435 Opened dev<8>[ 26.558454] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip>
12237 01:04:09.789306 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip
12239 01:04:09.790985 ice: /dev/dri/card0
12240 01:04:09.795054 No KMS driver or no outputs, pipes: 8, outputs: 0
12241 01:04:09.801044 [1mSubtest pipe-B-query-forked-busy-hang: SKIP (0.000s)[0m
12242 01:04:09.805040 <14>[ 26.578645] [IGT] kms_vblank: executing
12243 01:04:09.811787 IGT-Version: 1.2<14>[ 26.583254] [IGT] kms_vblank: exiting, ret=77
12244 01:04:09.814012 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12245 01:04:09.825222 Opened dev<8>[ 26.594576] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle RESULT=skip>
12246 01:04:09.825684 ice: /dev/dri/card0
12247 01:04:09.826306 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle RESULT=skip
12249 01:04:09.831098 No KMS driver or no outputs, pipes: 8, outputs: 0
12250 01:04:09.833688 [1mSubtest pipe-B-wait-idle: SKIP (0.000s)[0m
12251 01:04:09.837167 <14>[ 26.612998] [IGT] kms_vblank: executing
12252 01:04:09.844318 IGT-Version: 1.2<14>[ 26.617679] [IGT] kms_vblank: exiting, ret=77
12253 01:04:09.857170 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 26.627491] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip>
12254 01:04:09.857341 h64)
12255 01:04:09.857610 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip
12257 01:04:09.860534 Opened device: /dev/dri/card0
12258 01:04:09.863785 No KMS driver or no outputs, pipes: 8, outputs: 0
12259 01:04:09.870606 [1mSubtest pipe-B-wait-idle-hang: SKIP (0.000s)[0m
12260 01:04:09.873855 <14>[ 26.646597] [IGT] kms_vblank: executing
12261 01:04:09.880420 IGT-Version: 1.2<14>[ 26.652314] [IGT] kms_vblank: exiting, ret=77
12262 01:04:09.883716 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12263 01:04:09.893815 Opened device: /dev/dri/ca<8>[ 26.663758] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked RESULT=skip>
12264 01:04:09.894351 rd0
12265 01:04:09.895193 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked RESULT=skip
12267 01:04:09.900449 No KMS driver or no outputs, pipes: 8, outputs: 0
12268 01:04:09.903760 [1mSubtest pipe-B-wait-forked: SKIP (0.000s)[0m
12269 01:04:09.911162 <14>[ 26.683797] [IGT] kms_vblank: executing
12270 01:04:09.917347 IGT-Version: 1.2<14>[ 26.688408] [IGT] kms_vblank: exiting, ret=77
12271 01:04:09.920677 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12272 01:04:09.932123 Opened device: /dev/dri/ca<8>[ 26.699982] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip>
12273 01:04:09.932689 rd0
12274 01:04:09.933395 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip
12276 01:04:09.934603 No KMS driver or no outputs, pipes: 8, outputs: 0
12277 01:04:09.940627 [1mSubtest pipe-B-wait-forked-hang: SKIP (0.000s)[0m
12278 01:04:09.946852 <14>[ 26.720660] [IGT] kms_vblank: executing
12279 01:04:09.954164 IGT-Version: 1.2<14>[ 26.725290] [IGT] kms_vblank: exiting, ret=77
12280 01:04:09.957041 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12281 01:04:09.964236 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy RESULT=skip
12283 01:04:09.966639 Opened dev<8>[ 26.735274] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy RESULT=skip>
12284 01:04:09.967120 ice: /dev/dri/card0
12285 01:04:09.970254 No KMS driver or no outputs, pipes: 8, outputs: 0
12286 01:04:09.977831 [1mSubtest pipe-B-wait-busy: SKIP (0.000s)[0m
12287 01:04:09.980081 <14>[ 26.753935] [IGT] kms_vblank: executing
12288 01:04:09.987381 IGT-Version: 1.2<14>[ 26.759179] [IGT] kms_vblank: exiting, ret=77
12289 01:04:09.990078 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12290 01:04:10.000598 Opened device: /dev/dri/ca<8>[ 26.770789] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip>
12291 01:04:10.001226 rd0
12292 01:04:10.001883 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip
12294 01:04:10.006903 No KMS driver or no outputs, pipes: 8, outputs: 0
12295 01:04:10.009610 [1mSubtest pipe-B-wait-busy-hang: SKIP (0.000s)[0m
12296 01:04:10.029361 <14>[ 26.802884] [IGT] kms_vblank: executing
12297 01:04:10.036189 IGT-Version: 1.2<14>[ 26.808024] [IGT] kms_vblank: exiting, ret=77
12298 01:04:10.039750 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12299 01:04:10.049482 Opened device: /dev/dri/ca<8>[ 26.819271] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip>
12300 01:04:10.050064 rd0
12301 01:04:10.050713 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip
12303 01:04:10.056193 No KMS driver or no outputs, pipes: 8, outputs: 0
12304 01:04:10.059318 [1mSubtest pipe-B-wait-forked-busy: SKIP (0.000s)[0m
12305 01:04:10.065963 <14>[ 26.839647] [IGT] kms_vblank: executing
12306 01:04:10.072577 IGT-Version: 1.2<14>[ 26.844306] [IGT] kms_vblank: exiting, ret=77
12307 01:04:10.075939 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12308 01:04:10.086574 Opened dev<8>[ 26.854311] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip>
12309 01:04:10.087141 ice: /dev/dri/card0
12310 01:04:10.087826 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip
12312 01:04:10.092756 No KMS driver or no outputs, pipes: 8, outputs: 0
12313 01:04:10.103522 [1mSubtest pipe-B-wait-forked-busy-hang: SKIP (0.000s)<14>[ 26.874225] [IGT] kms_vblank: executing
12314 01:04:10.104095 [0m
12315 01:04:10.105997 IGT-Version: 1.2<14>[ 26.879989] [IGT] kms_vblank: exiting, ret=77
12316 01:04:10.113205 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12317 01:04:10.122485 Opened dev<8>[ 26.890532] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip>
12318 01:04:10.123061 ice: /dev/dri/card0
12319 01:04:10.123730 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip
12321 01:04:10.128867 No KMS driver or no outputs, pipes: 8, outputs: 0
12322 01:04:10.132898 [1mSubtest pipe-B-ts-continuation-idle: SKIP (0.000s)[0m
12323 01:04:10.141619 <14>[ 26.914696] [IGT] kms_vblank: executing
12324 01:04:10.147846 IGT-Version: 1.2<14>[ 26.919481] [IGT] kms_vblank: exiting, ret=77
12325 01:04:10.161107 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 26.929293] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip>
12326 01:04:10.161682 h64)
12327 01:04:10.162332 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip
12329 01:04:10.164152 Opened device: /dev/dri/card0
12330 01:04:10.167720 No KMS driver or no outputs, pipes: 8, outputs: 0
12331 01:04:10.174502 [1mSubtest pipe-B-ts-continuation-idle-<14>[ 26.948998] [IGT] kms_vblank: executing
12332 01:04:10.181449 hang: SKIP (0.00<14>[ 26.954017] [IGT] kms_vblank: exiting, ret=77
12333 01:04:10.182006 0s)[0m
12334 01:04:10.194170 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-c<8>[ 26.963980] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip>
12335 01:04:10.194959 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip
12337 01:04:10.197227 ip13 aarch64)
12338 01:04:10.200927 Opened device: /dev/dri/card0
12339 01:04:10.204154 No KMS driver or no outputs, pipes: 8, outputs: 0
12340 01:04:10.211386 [1mSubtest pipe-B-ts-continuat<14>[ 26.983766] [IGT] kms_vblank: executing
12341 01:04:10.217251 ion-dpms-rpm: SK<14>[ 26.989616] [IGT] kms_vblank: exiting, ret=77
12342 01:04:10.217809 IP (0.000s)[0m
12343 01:04:10.230507 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: <8>[ 27.000863] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip>
12344 01:04:10.231350 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip
12346 01:04:10.233404 6.1.72-cip13 aarch64)
12347 01:04:10.237083 Opened device: /dev/dri/card0
12348 01:04:10.240867 No KMS driver or no outputs, pipes: 8, outputs: 0
12349 01:04:10.246607 [1mSubtest pipe-B-ts-c<14>[ 27.020971] [IGT] kms_vblank: executing
12350 01:04:10.253974 ontinuation-dpms<14>[ 27.025875] [IGT] kms_vblank: exiting, ret=77
12351 01:04:10.256419 -suspend: SKIP (0.000s)[0m
12352 01:04:10.269572 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.<8>[ 27.037388] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip>
12353 01:04:10.270131 72-cip13 aarch64)
12354 01:04:10.270788 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip
12356 01:04:10.272844 Opened device: /dev/dri/card0
12357 01:04:10.276360 No KMS driver or no outputs, pipes: 8, outputs: 0
12358 01:04:10.283293 [1mSubtest pipe-B-ts-conti<14>[ 27.057848] [IGT] kms_vblank: executing
12359 01:04:10.290232 nuation-suspend:<14>[ 27.062814] [IGT] kms_vblank: exiting, ret=77
12360 01:04:10.293081 SKIP (0.000s)[0m
12361 01:04:10.303214 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linu<8>[ 27.072762] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip>
12362 01:04:10.304072 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip
12364 01:04:10.306274 x: 6.1.72-cip13 aarch64)
12365 01:04:10.309902 Opened device: /dev/dri/card0
12366 01:04:10.315264 No KMS driver or no outputs, pipes: 8, outputs: 0
12367 01:04:10.319684 [1mSubtest pipe-B-t<14>[ 27.092284] [IGT] kms_vblank: executing
12368 01:04:10.326190 s-continuation-m<14>[ 27.098313] [IGT] kms_vblank: exiting, ret=77
12369 01:04:10.329183 odeset: SKIP (0.000s)[0m
12370 01:04:10.339682 IGT-Version: 1.27.1-g621c2d3 (aarch64<8>[ 27.109568] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip>
12371 01:04:10.340537 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip
12373 01:04:10.342439 ) (Linux: 6.1.72-cip13 aarch64)
12374 01:04:10.345964 Opened device: /dev/dri/card0
12375 01:04:10.349095 No KMS driver or no outputs, pipes: 8, outputs: 0
12376 01:04:10.355826 [1mSubtest pipe-B-ts-continu<14>[ 27.130209] [IGT] kms_vblank: executing
12377 01:04:10.363481 ation-modeset-ha<14>[ 27.135836] [IGT] kms_vblank: exiting, ret=77
12378 01:04:10.365550 ng: SKIP (0.000s)[0m
12379 01:04:10.378859 IGT-Version: 1.27.1-g621c2d3 (aarch64) (L<8>[ 27.145764] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip>
12380 01:04:10.379422 inux: 6.1.72-cip13 aarch64)
12381 01:04:10.380119 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip
12383 01:04:10.381812 Opened device: /dev/dri/card0
12384 01:04:10.388995 No KMS driver or no outputs, pipes: 8, outputs: 0
12385 01:04:10.395385 [1mSubtest pipe-B-ts-continuatio<14>[ 27.167154] [IGT] kms_vblank: executing
12386 01:04:10.398928 n-modeset-rpm: S<14>[ 27.173278] [IGT] kms_vblank: exiting, ret=77
12387 01:04:10.402615 KIP (0.000s)[0m
12388 01:04:10.415098 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aa<8>[ 27.184469] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip>
12389 01:04:10.415664 rch64)
12390 01:04:10.416310 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip
12392 01:04:10.418998 Opened device: /dev/dri/card0
12393 01:04:10.422298 No KMS driver or no outputs, pipes: 8, outputs: 0
12394 01:04:10.431982 [1mSubtest pipe-C-accuracy-idle: SKIP<14>[ 27.204433] [IGT] kms_vblank: executing
12395 01:04:10.432555 (0.000s)[0m
12396 01:04:10.435049 <14>[ 27.209290] [IGT] kms_vblank: exiting, ret=77
12397 01:04:10.447974 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6<8>[ 27.219027] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle RESULT=skip>
12398 01:04:10.448983 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle RESULT=skip
12400 01:04:10.451522 .1.72-cip13 aarch64)
12401 01:04:10.452084 Opened device: /dev/dri/card0
12402 01:04:10.458262 No KMS driver or no outputs, pipes: 8, outputs: 0
12403 01:04:10.464277 [1mSubtest pipe-C-query<14>[ 27.237377] [IGT] kms_vblank: executing
12404 01:04:10.467774 -idle: SKIP (0.0<14>[ 27.242558] [IGT] kms_vblank: exiting, ret=77
12405 01:04:10.470774 00s)[0m
12406 01:04:10.480892 IGT-Version: 1.27.1-g621c2d3 (aarch64)<8>[ 27.252098] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip>
12407 01:04:10.481711 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip
12409 01:04:10.485046 (Linux: 6.1.72-cip13 aarch64)
12410 01:04:10.488827 Opened device: /dev/dri/card0
12411 01:04:10.491049 No KMS driver or no outputs, pipes: 8, outputs: 0
12412 01:04:10.498021 [1mSubtest pipe-C-query-idle-<14>[ 27.271360] [IGT] kms_vblank: executing
12413 01:04:10.504858 hang: SKIP (0.00<14>[ 27.277196] [IGT] kms_vblank: exiting, ret=77
12414 01:04:10.505406 0s)[0m
12415 01:04:10.517657 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-c<8>[ 27.288286] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked RESULT=skip>
12416 01:04:10.518217 ip13 aarch64)
12417 01:04:10.518867 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked RESULT=skip
12419 01:04:10.520530 Opened device: /dev/dri/card0
12420 01:04:10.527994 No KMS driver or no outputs, pipes: 8, outputs: 0
12421 01:04:10.534014 [1mSubtest pipe-C-query-forked: SKIP (0.000s)<14>[ 27.307490] [IGT] kms_vblank: executing
12422 01:04:10.534574 [0m
12423 01:04:10.541225 <14>[ 27.313226] [IGT] kms_vblank: exiting, ret=77
12424 01:04:10.544294 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12425 01:04:10.553970 Opened dev<8>[ 27.323907] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip>
12426 01:04:10.554821 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip
12428 01:04:10.557272 ice: /dev/dri/card0
12429 01:04:10.560827 No KMS driver or no outputs, pipes: 8, outputs: 0
12430 01:04:10.567160 [1mSubtest pipe-C-query-forked-hang: SKIP (0.000s)[0m
12431 01:04:10.569984 <14>[ 27.344120] [IGT] kms_vblank: executing
12432 01:04:10.576554 IGT-Version: 1.2<14>[ 27.348930] [IGT] kms_vblank: exiting, ret=77
12433 01:04:10.580556 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12434 01:04:10.590513 Opened dev<8>[ 27.358885] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy RESULT=skip>
12435 01:04:10.591051 ice: /dev/dri/card0
12436 01:04:10.591873 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy RESULT=skip
12438 01:04:10.596571 No KMS driver or no outputs, pipes: 8, outputs: 0
12439 01:04:10.600316 [1mSubtest pipe-C-query-busy: SKIP (0.000s)[0m
12440 01:04:10.603713 <14>[ 27.377728] [IGT] kms_vblank: executing
12441 01:04:10.609763 IGT-Version: 1.2<14>[ 27.382965] [IGT] kms_vblank: exiting, ret=77
12442 01:04:10.616164 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12443 01:04:10.623626 Opened dev<8>[ 27.394221] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip>
12444 01:04:10.624363 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip
12446 01:04:10.626459 ice: /dev/dri/card0
12447 01:04:10.629728 No KMS driver or no outputs, pipes: 8, outputs: 0
12448 01:04:10.636022 [1mSubtest pipe-C-query-busy-hang: SKIP (0.000s)[0m
12449 01:04:10.639689 <14>[ 27.413612] [IGT] kms_vblank: executing
12450 01:04:10.645956 IGT-Version: 1.2<14>[ 27.418353] [IGT] kms_vblank: exiting, ret=77
12451 01:04:10.649438 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12452 01:04:10.659012 Opened dev<8>[ 27.428369] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip>
12453 01:04:10.659140 ice: /dev/dri/card0
12454 01:04:10.659417 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip
12456 01:04:10.666040 No KMS driver or no outputs, pipes: 8, outputs: 0
12457 01:04:10.669296 [1mSubtest pipe-C-query-forked-busy: SKIP (0.000s)[0m
12458 01:04:10.675952 <14>[ 27.447799] [IGT] kms_vblank: executing
12459 01:04:10.676069
12460 01:04:10.679510 IGT-Version: 1.2<14>[ 27.453453] [IGT] kms_vblank: exiting, ret=77
12461 01:04:10.685661 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12462 01:04:10.695813 Opened dev<8>[ 27.464474] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip>
12463 01:04:10.695908 ice: /dev/dri/card0
12464 01:04:10.696148 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip
12466 01:04:10.702153 No KMS driver or no outputs, pipes: 8, outputs: 0
12467 01:04:10.705565 [1mSubtest pipe-C-query-forked-busy-hang: SKIP (0.000s)[0m
12468 01:04:10.708854 <14>[ 27.484722] [IGT] kms_vblank: executing
12469 01:04:10.715529 IGT-Version: 1.2<14>[ 27.489635] [IGT] kms_vblank: exiting, ret=77
12470 01:04:10.728511 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 27.499461] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle RESULT=skip>
12471 01:04:10.728673 h64)
12472 01:04:10.728973 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle RESULT=skip
12474 01:04:10.732226 Opened device: /dev/dri/card0
12475 01:04:10.735302 No KMS driver or no outputs, pipes: 8, outputs: 0
12476 01:04:10.738966 [1mSubtest pipe-C-wait-idle: SKIP (0.000s)[0m
12477 01:04:10.745809 <14>[ 27.518182] [IGT] kms_vblank: executing
12478 01:04:10.752146 IGT-Version: 1.2<14>[ 27.523460] [IGT] kms_vblank: exiting, ret=77
12479 01:04:10.755159 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12480 01:04:10.764651 Opened dev<8>[ 27.533491] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip>
12481 01:04:10.764860 ice: /dev/dri/card0
12482 01:04:10.765179 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip
12484 01:04:10.771835 No KMS driver or no outputs, pipes: 8, outputs: 0
12485 01:04:10.775262 [1mSubtest pipe-C-wait-idle-hang: SKIP (0.000s)[0m
12486 01:04:10.778239 <14>[ 27.553219] [IGT] kms_vblank: executing
12487 01:04:10.785217 IGT-Version: 1.2<14>[ 27.558217] [IGT] kms_vblank: exiting, ret=77
12488 01:04:10.791144 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12489 01:04:10.798630 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked RESULT=skip
12491 01:04:10.802570 Opened device: /dev/dri/ca<8>[ 27.569608] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked RESULT=skip>
12492 01:04:10.803135 rd0
12493 01:04:10.804525 No KMS driver or no outputs, pipes: 8, outputs: 0
12494 01:04:10.807882 [1mSubtest pipe-C-wait-forked: SKIP (0.000s)[0m
12495 01:04:10.816823 <14>[ 27.590243] [IGT] kms_vblank: executing
12496 01:04:10.823302 IGT-Version: 1.2<14>[ 27.594959] [IGT] kms_vblank: exiting, ret=77
12497 01:04:10.826628 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12498 01:04:10.836244 Opened dev<8>[ 27.605202] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip>
12499 01:04:10.836837 ice: /dev/dri/card0
12500 01:04:10.837483 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip
12502 01:04:10.843264 No KMS driver or no outputs, pipes: 8, outputs: 0
12503 01:04:10.846798 [1mSubtest pipe-C-wait-forked-hang: SKIP (0.000s)[0m
12504 01:04:10.850493 <14>[ 27.624198] [IGT] kms_vblank: executing
12505 01:04:10.856353 IGT-Version: 1.2<14>[ 27.629976] [IGT] kms_vblank: exiting, ret=77
12506 01:04:10.863295 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12507 01:04:10.873149 Opened device: /dev/dri/ca<8>[ 27.641469] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy RESULT=skip>
12508 01:04:10.873701 rd0
12509 01:04:10.874374 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy RESULT=skip
12511 01:04:10.876251 No KMS driver or no outputs, pipes: 8, outputs: 0
12512 01:04:10.879870 [1mSubtest pipe-C-wait-busy: SKIP (0.000s)[0m
12513 01:04:10.887477 <14>[ 27.661003] [IGT] kms_vblank: executing
12514 01:04:10.893877 IGT-Version: 1.2<14>[ 27.665738] [IGT] kms_vblank: exiting, ret=77
12515 01:04:10.897416 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12516 01:04:10.907080 Opened dev<8>[ 27.675711] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip>
12517 01:04:10.907649 ice: /dev/dri/card0
12518 01:04:10.908302 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip
12520 01:04:10.914407 No KMS driver or no outputs, pipes: 8, outputs: 0
12521 01:04:10.916896 [1mSubtest pipe-C-wait-busy-hang: SKIP (0.000s)[0m
12522 01:04:10.920639 <14>[ 27.694996] [IGT] kms_vblank: executing
12523 01:04:10.927419 IGT-Version: 1.2<14>[ 27.700382] [IGT] kms_vblank: exiting, ret=77
12524 01:04:10.934231 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12525 01:04:10.943753 Opened device: /dev/dri/ca<8>[ 27.711909] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip>
12526 01:04:10.944321 rd0
12527 01:04:10.944971 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip
12529 01:04:10.946422 No KMS driver or no outputs, pipes: 8, outputs: 0
12530 01:04:10.953693 [1mSubtest pipe-C-wait-forked-busy: SKIP (0.000s)[0m
12531 01:04:10.956755 <14>[ 27.732042] [IGT] kms_vblank: executing
12532 01:04:10.963842 IGT-Version: 1.2<14>[ 27.736663] [IGT] kms_vblank: exiting, ret=77
12533 01:04:10.969784 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12534 01:04:10.980587 Opened device: /dev/dri/ca<8>[ 27.748099] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip>
12535 01:04:10.981221 rd0
12536 01:04:10.981871 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip
12538 01:04:10.982990 No KMS driver or no outputs, pipes: 8, outputs: 0
12539 01:04:10.989665 [1mSubtest pipe-C-wait-forked-busy-hang: SKIP (0.000s)[0m
12540 01:04:10.993253 <14>[ 27.768831] [IGT] kms_vblank: executing
12541 01:04:10.999554 IGT-Version: 1.2<14>[ 27.773584] [IGT] kms_vblank: exiting, ret=77
12542 01:04:11.012869 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 27.783513] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip>
12543 01:04:11.013449 h64)
12544 01:04:11.014097 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip
12546 01:04:11.016194 Opened device: /dev/dri/card0
12547 01:04:11.019936 No KMS driver or no outputs, pipes: 8, outputs: 0
12548 01:04:11.030164 [1mSubtest pipe-C-ts-continuation-idle:<14>[ 27.802163] [IGT] kms_vblank: executing
12549 01:04:11.035612 SKIP (0.000s)[<14>[ 27.807636] [IGT] kms_vblank: exiting, ret=77
12550 01:04:11.036164 0m
12551 01:04:11.049584 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 <8>[ 27.818823] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip>
12552 01:04:11.050171 aarch64)
12553 01:04:11.050825 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip
12555 01:04:11.052578 Opened device: /dev/dri/card0
12556 01:04:11.055601 No KMS driver or no outputs, pipes: 8, outputs: 0
12557 01:04:11.065349 [1mSubtest pipe-C-ts-continuation-idle-hang: SKIP (<14>[ 27.838993] [IGT] kms_vblank: executing
12558 01:04:11.065941 0.000s)[0m
12559 01:04:11.072882 <14>[ 27.844834] [IGT] kms_vblank: exiting, ret=77
12560 01:04:11.086886 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 27.855845] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip>
12561 01:04:11.087455 h64)
12562 01:04:11.088145 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip
12564 01:04:11.089543 Opened device: /dev/dri/card0
12565 01:04:11.093337 No KMS driver or no outputs, pipes: 8, outputs: 0
12566 01:04:11.102010 [1mSubtest pipe-C-ts-continuation-dpms-rpm: SKIP (0.000<14>[ 27.875843] [IGT] kms_vblank: executing
12567 01:04:11.102587 s)[0m
12568 01:04:11.108912 <14>[ 27.881751] [IGT] kms_vblank: exiting, ret=77
12569 01:04:11.121915 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 27.891016] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip>
12570 01:04:11.122467 h64)
12571 01:04:11.123108 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip
12573 01:04:11.125280 Opened device: /dev/dri/card0
12574 01:04:11.131945 No KMS driver or no outputs, pipes: 8, outputs: 0
12575 01:04:11.138448 [1mSubtest pipe-C-ts-continuation-dpms-<14>[ 27.912340] [IGT] kms_vblank: executing
12576 01:04:11.145310 suspend: SKIP (0<14>[ 27.917023] [IGT] kms_vblank: exiting, ret=77
12577 01:04:11.145873 .000s)[0m
12578 01:04:11.158762 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.7<8>[ 27.928271] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip>
12579 01:04:11.159307 2-cip13 aarch64)
12580 01:04:11.159957 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip
12582 01:04:11.161225 Opened device: /dev/dri/card0
12583 01:04:11.168965 No KMS driver or no outputs, pipes: 8, outputs: 0
12584 01:04:11.175054 [1mSubtest pipe-C-ts-continuation-suspend: <14>[ 27.948393] [IGT] kms_vblank: executing
12585 01:04:11.181454 SKIP (0.000s)[0<14>[ 27.954196] [IGT] kms_vblank: exiting, ret=77
12586 01:04:11.181918 m
12587 01:04:11.194755 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux<8>[ 27.963831] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip>
12588 01:04:11.195297 : 6.1.72-cip13 aarch64)
12589 01:04:11.195942 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip
12591 01:04:11.197810 Opened device: /dev/dri/card0
12592 01:04:11.205036 No KMS driver or no outputs, pipes: 8, outputs: 0
12593 01:04:11.210860 [1mSubtest pipe-C-ts-continuation-mo<14>[ 27.983747] [IGT] kms_vblank: executing
12594 01:04:11.217538 deset: SKIP (0.0<14>[ 27.989763] [IGT] kms_vblank: exiting, ret=77
12595 01:04:11.218096 00s)[0m
12596 01:04:11.231642 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-<8>[ 28.000951] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip>
12597 01:04:11.232498 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip
12599 01:04:11.234255 cip13 aarch64)
12600 01:04:11.234714 Opened device: /dev/dri/card0
12601 01:04:11.240897 No KMS driver or no outputs, pipes: 8, outputs: 0
12602 01:04:11.247768 [1mSubtest pipe-C-ts-continuation-modeset-han<14>[ 28.021389] [IGT] kms_vblank: executing
12603 01:04:11.254268 g: SKIP (0.000s)<14>[ 28.027214] [IGT] kms_vblank: exiting, ret=77
12604 01:04:11.254834 [0m
12605 01:04:11.267656 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Li<8>[ 28.036921] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip>
12606 01:04:11.268503 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip
12608 01:04:11.270538 nux: 6.1.72-cip13 aarch64)
12609 01:04:11.274210 Opened device: /dev/dri/card0
12610 01:04:11.277899 No KMS driver or no outputs, pipes: 8, outputs: 0
12611 01:04:11.284022 [1mSubtest pipe-C-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12612 01:04:11.287184 <14>[ 28.061490] [IGT] kms_vblank: executing
12613 01:04:11.293554 IGT-Version: 1.2<14>[ 28.066154] [IGT] kms_vblank: exiting, ret=77
12614 01:04:11.297230 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12615 01:04:11.307244 Opened dev<8>[ 28.076125] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip>
12616 01:04:11.307906 ice: /dev/dri/card0
12617 01:04:11.308565 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip
12619 01:04:11.314027 No KMS driver or no outputs, pipes: 8, outputs: 0
12620 01:04:11.316581 [1mSubtest pipe-D-accuracy-idle: SKIP (0.000s)[0m
12621 01:04:11.327962 <14>[ 28.100337] [IGT] kms_vblank: executing
12622 01:04:11.333503 IGT-Version: 1.2<14>[ 28.105000] [IGT] kms_vblank: exiting, ret=77
12623 01:04:11.336865 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12624 01:04:11.346179 Opened dev<8>[ 28.115097] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle RESULT=skip>
12625 01:04:11.346755 ice: /dev/dri/card0
12626 01:04:11.347403 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle RESULT=skip
12628 01:04:11.353678 No KMS driver or no outputs, pipes: 8, outputs: 0
12629 01:04:11.356307 [1mSubtest pipe-D-query-idle: SKIP (0.000s)[0m
12630 01:04:11.365721 <14>[ 28.138793] [IGT] kms_vblank: executing
12631 01:04:11.371826 IGT-Version: 1.2<14>[ 28.143570] [IGT] kms_vblank: exiting, ret=77
12632 01:04:11.375750 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12633 01:04:11.385306 Opened dev<8>[ 28.153601] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip>
12634 01:04:11.385878 ice: /dev/dri/card0
12635 01:04:11.386531 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip
12637 01:04:11.391869 No KMS driver or no outputs, pipes: 8, outputs: 0
12638 01:04:11.394817 [1mSubtest pipe-D-query-idle-hang: SKIP (0.000s)[0m
12639 01:04:11.404917 <14>[ 28.178024] [IGT] kms_vblank: executing
12640 01:04:11.411186 IGT-Version: 1.2<14>[ 28.182793] [IGT] kms_vblank: exiting, ret=77
12641 01:04:11.415010 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12642 01:04:11.424191 Opened dev<8>[ 28.192777] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked RESULT=skip>
12643 01:04:11.424812 ice: /dev/dri/card0
12644 01:04:11.425472 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked RESULT=skip
12646 01:04:11.430995 No KMS driver or no outputs, pipes: 8, outputs: 0
12647 01:04:11.434253 [1mSubtest pipe-D-query-forked: SKIP (0.000s)[0m
12648 01:04:11.437269 <14>[ 28.212728] [IGT] kms_vblank: executing
12649 01:04:11.444509 IGT-Version: 1.2<14>[ 28.217405] [IGT] kms_vblank: exiting, ret=77
12650 01:04:11.457441 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 28.227162] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip>
12651 01:04:11.458010 h64)
12652 01:04:11.458650 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip
12654 01:04:11.460254 Opened device: /dev/dri/card0
12655 01:04:11.464040 No KMS driver or no outputs, pipes: 8, outputs: 0
12656 01:04:11.470029 [1mSubtest pipe-D-query-forked-hang: SKIP (0.000s)[0m
12657 01:04:11.473391 <14>[ 28.246929] [IGT] kms_vblank: executing
12658 01:04:11.473856
12659 01:04:11.480203 IGT-Version: 1.2<14>[ 28.252549] [IGT] kms_vblank: exiting, ret=77
12660 01:04:11.483839 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12661 01:04:11.494195 Opened dev<8>[ 28.263732] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy RESULT=skip>
12662 01:04:11.494853 ice: /dev/dri/card0
12663 01:04:11.495508 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy RESULT=skip
12665 01:04:11.500629 No KMS driver or no outputs, pipes: 8, outputs: 0
12666 01:04:11.504006 [1mSubtest pipe-D-query-busy: SKIP (0.000s)[0m
12667 01:04:11.509600 <14>[ 28.282988] [IGT] kms_vblank: executing
12668 01:04:11.513353 IGT-Version: 1.2<14>[ 28.287603] [IGT] kms_vblank: exiting, ret=77
12669 01:04:11.519955 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12670 01:04:11.524281 Opened device: /dev/dri/card0
12671 01:04:11.529687 No KMS driv<8>[ 28.300679] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip>
12672 01:04:11.530548 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip
12674 01:04:11.532791 er or no outputs, pipes: 8, outputs: 0
12675 01:04:11.540057 [1mSubtest pipe-D-query-busy-hang: SKIP (0.000s)[0m
12676 01:04:11.547493 <14>[ 28.320920] [IGT] kms_vblank: executing
12677 01:04:11.553874 IGT-Version: 1.2<14>[ 28.325612] [IGT] kms_vblank: exiting, ret=77
12678 01:04:11.557166 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12679 01:04:11.566902 Opened dev<8>[ 28.335536] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip>
12680 01:04:11.567466 ice: /dev/dri/card0
12681 01:04:11.568115 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip
12683 01:04:11.573575 No KMS driver or no outputs, pipes: 8, outputs: 0
12684 01:04:11.576689 [1mSubtest pipe-D-query-forked-busy: SKIP (0.000s)[0m
12685 01:04:11.580358 <14>[ 28.355963] [IGT] kms_vblank: executing
12686 01:04:11.580961
12687 01:04:11.587828 IGT-Version: 1.<14>[ 28.360677] [IGT] kms_vblank: exiting, ret=77
12688 01:04:11.593848 27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12689 01:04:11.600209 Opened de<8>[ 28.371979] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip>
12690 01:04:11.601093 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip
12692 01:04:11.603456 vice: /dev/dri/card0
12693 01:04:11.606949 No KMS driver or no outputs, pipes: 8, outputs: 0
12694 01:04:11.613993 [1mSubtest pipe-D-query-forked-busy-hang: SKIP (0.000s)[0m
12695 01:04:11.616928 <14>[ 28.391686] [IGT] kms_vblank: executing
12696 01:04:11.623402 IGT-Version: 1.2<14>[ 28.397029] [IGT] kms_vblank: exiting, ret=77
12697 01:04:11.630464 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12698 01:04:11.639946 Opened device: /dev/dri/ca<8>[ 28.408447] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle RESULT=skip>
12699 01:04:11.640508 rd0
12700 01:04:11.641218 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle RESULT=skip
12702 01:04:11.642852 No KMS driver or no outputs, pipes: 8, outputs: 0
12703 01:04:11.646745 [1mSubtest pipe-D-wait-idle: SKIP (0.000s)[0m
12704 01:04:11.654470 <14>[ 28.428228] [IGT] kms_vblank: executing
12705 01:04:11.661682 IGT-Version: 1.2<14>[ 28.432956] [IGT] kms_vblank: exiting, ret=77
12706 01:04:11.664421 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12707 01:04:11.674767 Opened dev<8>[ 28.443000] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip>
12708 01:04:11.675312 ice: /dev/dri/card0
12709 01:04:11.675956 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip
12711 01:04:11.681497 No KMS driver or no outputs, pipes: 8, outputs: 0
12712 01:04:11.684519 [1mSubtest pipe-D-wait-idle-hang: SKIP (0.000s)[0m
12713 01:04:11.687315 <14>[ 28.461990] [IGT] kms_vblank: executing
12714 01:04:11.694258 IGT-Version: 1.2<14>[ 28.467693] [IGT] kms_vblank: exiting, ret=77
12715 01:04:11.701018 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12716 01:04:11.707771 Opened device: /dev/dri/ca<8>[ 28.479169] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked RESULT=skip>
12717 01:04:11.708620 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked RESULT=skip
12719 01:04:11.711284 rd0
12720 01:04:11.714639 No KMS driver or no outputs, pipes: 8, outputs: 0
12721 01:04:11.717668 [1mSubtest pipe-D-wait-forked: SKIP (0.000s)[0m
12722 01:04:11.725214 <14>[ 28.499337] [IGT] kms_vblank: executing
12723 01:04:11.732381 IGT-Version: 1.2<14>[ 28.503961] [IGT] kms_vblank: exiting, ret=77
12724 01:04:11.735628 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12725 01:04:11.746380 Opened device: /dev/dri/ca<8>[ 28.515477] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip>
12726 01:04:11.746943 rd0
12727 01:04:11.747592 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip
12729 01:04:11.753413 No KMS driver or no outputs, pipes: 8, outputs: 0
12730 01:04:11.755186 [1mSubtest pipe-D-wait-forked-hang: SKIP (0.000s)[0m
12731 01:04:11.763242 <14>[ 28.535925] [IGT] kms_vblank: executing
12732 01:04:11.769349 IGT-Version: 1.2<14>[ 28.540541] [IGT] kms_vblank: exiting, ret=77
12733 01:04:11.772378 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12734 01:04:11.779482 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy RESULT=skip
12736 01:04:11.781937 Opened dev<8>[ 28.550794] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy RESULT=skip>
12737 01:04:11.782408 ice: /dev/dri/card0
12738 01:04:11.785074 No KMS driver or no outputs, pipes: 8, outputs: 0
12739 01:04:11.792036 [1mSubtest pipe-D-wait-busy: SKIP (0.000s)[0m
12740 01:04:11.795764 <14>[ 28.569316] [IGT] kms_vblank: executing
12741 01:04:11.802035 IGT-Version: 1.2<14>[ 28.574447] [IGT] kms_vblank: exiting, ret=77
12742 01:04:11.805446 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12743 01:04:11.815597 Opened device: /dev/dri/ca<8>[ 28.585834] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip>
12744 01:04:11.816161 rd0
12745 01:04:11.816837 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip
12747 01:04:11.822528 No KMS driver or no outputs, pipes: 8, outputs: 0
12748 01:04:11.826065 [1mSubtest pipe-D-wait-busy-hang: SKIP (0.000s)[0m
12749 01:04:11.833336 <14>[ 28.606330] [IGT] kms_vblank: executing
12750 01:04:11.839534 IGT-Version: 1.2<14>[ 28.610970] [IGT] kms_vblank: exiting, ret=77
12751 01:04:11.843470 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12752 01:04:11.852088 Opened dev<8>[ 28.622113] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip>
12753 01:04:11.852640 ice: /dev/dri/card0
12754 01:04:11.853323 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip
12756 01:04:11.859421 No KMS driver or no outputs, pipes: 8, outputs: 0
12757 01:04:11.862335 [1mSubtest pipe-D-wait-forked-busy: SKIP (0.000s)[0m
12758 01:04:11.865808 <14>[ 28.641439] [IGT] kms_vblank: executing
12759 01:04:11.872625 IGT-Version: 1.2<14>[ 28.646124] [IGT] kms_vblank: exiting, ret=77
12760 01:04:11.878866 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12761 01:04:11.885586 Opened dev<8>[ 28.656081] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip>
12762 01:04:11.886434 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip
12764 01:04:11.889287 ice: /dev/dri/card0
12765 01:04:11.892081 No KMS driver or no outputs, pipes: 8, outputs: 0
12766 01:04:11.901738 [1mSubtest pipe-D-wait-forked-busy-hang: SKIP (0.000s)<14>[ 28.675874] [IGT] kms_vblank: executing
12767 01:04:11.902298 [0m
12768 01:04:11.908342 <14>[ 28.681567] [IGT] kms_vblank: exiting, ret=77
12769 01:04:11.915758 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12770 01:04:11.921848 Opened dev<8>[ 28.691943] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip>
12771 01:04:11.922677 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip
12773 01:04:11.925030 ice: /dev/dri/card0
12774 01:04:11.929094 No KMS driver or no outputs, pipes: 8, outputs: 0
12775 01:04:11.938683 [1mSubtest pipe-D-ts-continuation-idle: SKIP (0.000s)[<14>[ 28.712472] [IGT] kms_vblank: executing
12776 01:04:11.939246 0m
12777 01:04:11.945321 IGT-Version: 1.2<14>[ 28.717430] [IGT] kms_vblank: exiting, ret=77
12778 01:04:11.958109 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 28.727544] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip>
12779 01:04:11.958681 h64)
12780 01:04:11.959333 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip
12782 01:04:11.962539 Opened device: /dev/dri/card0
12783 01:04:11.965293 No KMS driver or no outputs, pipes: 8, outputs: 0
12784 01:04:11.971421 [1mSubtest pipe-D-ts-continuation-idle-hang: SKIP (0.000s)[0m
12785 01:04:11.979064 <14>[ 28.752155] [IGT] kms_vblank: executing
12786 01:04:11.985434 IGT-Version: 1.2<14>[ 28.756903] [IGT] kms_vblank: exiting, ret=77
12787 01:04:11.988327 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12788 01:04:11.998342 Opened dev<8>[ 28.766893] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip>
12789 01:04:11.999175 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip
12791 01:04:12.002469 ice: /dev/dri/card0
12792 01:04:12.005396 No KMS driver or no outputs, pipes: 8, outputs: 0
12793 01:04:12.011297 [1mSubtest pipe-D-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12794 01:04:12.018805 <14>[ 28.792209] [IGT] kms_vblank: executing
12795 01:04:12.025007 IGT-Version: 1.2<14>[ 28.796901] [IGT] kms_vblank: exiting, ret=77
12796 01:04:12.028449 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12797 01:04:12.038207 Opened dev<8>[ 28.807007] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip>
12798 01:04:12.039063 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip
12800 01:04:12.041951 ice: /dev/dri/card0
12801 01:04:12.044818 No KMS driver or no outputs, pipes: 8, outputs: 0
12802 01:04:12.051764 [1mSubtest pipe-D-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12803 01:04:12.058715 <14>[ 28.832238] [IGT] kms_vblank: executing
12804 01:04:12.065108 IGT-Version: 1.2<14>[ 28.836910] [IGT] kms_vblank: exiting, ret=77
12805 01:04:12.069107 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12806 01:04:12.080429 Opened dev<8>[ 28.847028] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip>
12807 01:04:12.081054 ice: /dev/dri/card0
12808 01:04:12.081703 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip
12810 01:04:12.085312 No KMS driver or no outputs, pipes: 8, outputs: 0
12811 01:04:12.088855 [1mSubtest pipe-D-ts-continuation-suspend: SKIP (0.000s)[0m
12812 01:04:12.098596 <14>[ 28.872604] [IGT] kms_vblank: executing
12813 01:04:12.105558 IGT-Version: 1.2<14>[ 28.877266] [IGT] kms_vblank: exiting, ret=77
12814 01:04:12.108397 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12815 01:04:12.118484 Opened dev<8>[ 28.887255] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip>
12816 01:04:12.119047 ice: /dev/dri/card0
12817 01:04:12.119692 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip
12819 01:04:12.125176 No KMS driver or no outputs, pipes: 8, outputs: 0
12820 01:04:12.128893 [1mSubtest pipe-D-ts-continuation-modeset: SKIP (0.000s)[0m
12821 01:04:12.138309 <14>[ 28.912091] [IGT] kms_vblank: executing
12822 01:04:12.145686 IGT-Version: 1.2<14>[ 28.916818] [IGT] kms_vblank: exiting, ret=77
12823 01:04:12.148369 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12824 01:04:12.158471 Opened dev<8>[ 28.926972] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip>
12825 01:04:12.159322 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip
12827 01:04:12.161981 ice: /dev/dri/card0
12828 01:04:12.164772 No KMS driver or no outputs, pipes: 8, outputs: 0
12829 01:04:12.171916 [1mSubtest pipe-D-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12830 01:04:12.179279 <14>[ 28.952578] [IGT] kms_vblank: executing
12831 01:04:12.185190 IGT-Version: 1.2<14>[ 28.957343] [IGT] kms_vblank: exiting, ret=77
12832 01:04:12.188800 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12833 01:04:12.198500 Opened dev<8>[ 28.967364] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip>
12834 01:04:12.199325 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip
12836 01:04:12.201848 ice: /dev/dri/card0
12837 01:04:12.205194 No KMS driver or no outputs, pipes: 8, outputs: 0
12838 01:04:12.211846 [1mSubtest pipe-D-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12839 01:04:12.218763 <14>[ 28.992556] [IGT] kms_vblank: executing
12840 01:04:12.225076 IGT-Version: 1.2<14>[ 28.997294] [IGT] kms_vblank: exiting, ret=77
12841 01:04:12.228819 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12842 01:04:12.238850 Opened dev<8>[ 29.007211] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip>
12843 01:04:12.239418 ice: /dev/dri/card0
12844 01:04:12.240072 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip
12846 01:04:12.244987 No KMS driver or no outputs, pipes: 8, outputs: 0
12847 01:04:12.248877 [1mSubtest pipe-E-accuracy-idle: SKIP (0.000s)[0m
12848 01:04:12.257880 <14>[ 29.030929] [IGT] kms_vblank: executing
12849 01:04:12.264137 IGT-Version: 1.2<14>[ 29.035690] [IGT] kms_vblank: exiting, ret=77
12850 01:04:12.267146 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12851 01:04:12.277622 Opened dev<8>[ 29.045672] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle RESULT=skip>
12852 01:04:12.278164 ice: /dev/dri/card0
12853 01:04:12.278806 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle RESULT=skip
12855 01:04:12.283415 No KMS driver or no outputs, pipes: 8, outputs: 0
12856 01:04:12.287315 [1mSubtest pipe-E-query-idle: SKIP (0.000s)[0m
12857 01:04:12.290230 <14>[ 29.065404] [IGT] kms_vblank: executing
12858 01:04:12.297152 IGT-Version: 1.2<14>[ 29.070165] [IGT] kms_vblank: exiting, ret=77
12859 01:04:12.300040 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12860 01:04:12.311205 Opened dev<8>[ 29.080154] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip>
12861 01:04:12.311948 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip
12863 01:04:12.313388 ice: /dev/dri/card0
12864 01:04:12.317306 No KMS driver or no outputs, pipes: 8, outputs: 0
12865 01:04:12.320675 [1mSubtest pipe-E-query-idle-hang: SKIP (0.000s)[0m
12866 01:04:12.327027 <14>[ 29.100988] [IGT] kms_vblank: executing
12867 01:04:12.334275 IGT-Version: 1.2<14>[ 29.105677] [IGT] kms_vblank: exiting, ret=77
12868 01:04:12.343282 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 29.115486] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked RESULT=skip>
12869 01:04:12.343715 h64)
12870 01:04:12.344354 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked RESULT=skip
12872 01:04:12.346856 Opened device: /dev/dri/card0
12873 01:04:12.353390 No KMS driver or no outputs, pipes: 8, outputs: 0
12874 01:04:12.357749 [1mSubtest pipe-E-query-forked: SKIP (0.000s)[0m
12875 01:04:12.359953 <14>[ 29.134340] [IGT] kms_vblank: executing
12876 01:04:12.366504 IGT-Version: 1.2<14>[ 29.140062] [IGT] kms_vblank: exiting, ret=77
12877 01:04:12.370241 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12878 01:04:12.383577 Opened device: /dev/dri/ca<8>[ 29.151716] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip>
12879 01:04:12.384062 rd0
12880 01:04:12.384697 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip
12882 01:04:12.386465 No KMS driver or no outputs, pipes: 8, outputs: 0
12883 01:04:12.393429 [1mSubtest pipe-E-query-forked-hang: SKIP (0.000s)[0m
12884 01:04:12.396432 <14>[ 29.172072] [IGT] kms_vblank: executing
12885 01:04:12.403810 IGT-Version: 1.2<14>[ 29.176678] [IGT] kms_vblank: exiting, ret=77
12886 01:04:12.410276 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12887 01:04:12.417017 Opened dev<8>[ 29.187924] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy RESULT=skip>
12888 01:04:12.417750 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy RESULT=skip
12890 01:04:12.420094 ice: /dev/dri/card0
12891 01:04:12.422947 No KMS driver or no outputs, pipes: 8, outputs: 0
12892 01:04:12.426454 [1mSubtest pipe-E-query-busy: SKIP (0.000s)[0m
12893 01:04:12.433015 <14>[ 29.206940] [IGT] kms_vblank: executing
12894 01:04:12.441487 IGT-Version: 1.2<14>[ 29.211545] [IGT] kms_vblank: exiting, ret=77
12895 01:04:12.442736 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12896 01:04:12.453080 Opened dev<8>[ 29.222841] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip>
12897 01:04:12.453797 ice: /dev/dri/card0
12898 01:04:12.454451 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip
12900 01:04:12.459964 No KMS driver or no outputs, pipes: 8, outputs: 0
12901 01:04:12.463004 [1mSubtest pipe-E-query-busy-hang: SKIP (0.000s)[0m
12902 01:04:12.469533 <14>[ 29.242389] [IGT] kms_vblank: executing
12903 01:04:12.472774 IGT-Version: 1.2<14>[ 29.247045] [IGT] kms_vblank: exiting, ret=77
12904 01:04:12.480304 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12905 01:04:12.486094 Opened dev<8>[ 29.258123] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip>
12906 01:04:12.486923 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip
12908 01:04:12.489254 ice: /dev/dri/card0
12909 01:04:12.492223 No KMS driver or no outputs, pipes: 8, outputs: 0
12910 01:04:12.499189 [1mSubtest pipe-E-query-forked-busy: SKIP (0.000s)[0m
12911 01:04:12.503244 <14>[ 29.278041] [IGT] kms_vblank: executing
12912 01:04:12.509425 IGT-Version: 1.2<14>[ 29.282820] [IGT] kms_vblank: exiting, ret=77
12913 01:04:12.523107 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 29.292452] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip>
12914 01:04:12.523677 h64)
12915 01:04:12.524324 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip
12917 01:04:12.525615 Opened device: /dev/dri/card0
12918 01:04:12.529476 No KMS driver or no outputs, pipes: 8, outputs: 0
12919 01:04:12.538770 [1mSubtest pipe-E-query-forked-busy-hang: SKIP (0.000s)<14>[ 29.312787] [IGT] kms_vblank: executing
12920 01:04:12.539315 [0m
12921 01:04:12.546059 <14>[ 29.318466] [IGT] kms_vblank: exiting, ret=77
12922 01:04:12.555992 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle RESULT=skip
12924 01:04:12.559205 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 29.327596] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle RESULT=skip>
12925 01:04:12.559767 h64)
12926 01:04:12.562278 Opened device: /dev/dri/card0
12927 01:04:12.565449 No KMS driver or no outputs, pipes: 8, outputs: 0
12928 01:04:12.568505 [1mSubtest pipe-E-wait-idle: SKIP (0.000s)[0m
12929 01:04:12.577774 <14>[ 29.351855] [IGT] kms_vblank: executing
12930 01:04:12.584682 IGT-Version: 1.2<14>[ 29.356595] [IGT] kms_vblank: exiting, ret=77
12931 01:04:12.588057 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12932 01:04:12.598383 Opened dev<8>[ 29.366708] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip>
12933 01:04:12.598945 ice: /dev/dri/card0
12934 01:04:12.599593 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip
12936 01:04:12.604617 No KMS driver or no outputs, pipes: 8, outputs: 0
12937 01:04:12.608068 [1mSubtest pipe-E-wait-idle-hang: SKIP (0.000s)[0m
12938 01:04:12.611130 <14>[ 29.386857] [IGT] kms_vblank: executing
12939 01:04:12.617768 IGT-Version: 1.2<14>[ 29.391569] [IGT] kms_vblank: exiting, ret=77
12940 01:04:12.624676 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12941 01:04:12.631431 Opened dev<8>[ 29.402843] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked RESULT=skip>
12942 01:04:12.632281 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked RESULT=skip
12944 01:04:12.634682 ice: /dev/dri/card0
12945 01:04:12.638096 No KMS driver or no outputs, pipes: 8, outputs: 0
12946 01:04:12.641664 [1mSubtest pipe-E-wait-forked: SKIP (0.000s)[0m
12947 01:04:12.647915 <14>[ 29.421726] [IGT] kms_vblank: executing
12948 01:04:12.655343 IGT-Version: 1.2<14>[ 29.426468] [IGT] kms_vblank: exiting, ret=77
12949 01:04:12.658195 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12950 01:04:12.667610 Opened dev<8>[ 29.436459] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip>
12951 01:04:12.668181 ice: /dev/dri/card0
12952 01:04:12.668865 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip
12954 01:04:12.674367 No KMS driver or no outputs, pipes: 8, outputs: 0
12955 01:04:12.677915 [1mSubtest pipe-E-wait-forked-hang: SKIP (0.000s)[0m
12956 01:04:12.680539 <14>[ 29.456994] [IGT] kms_vblank: executing
12957 01:04:12.687482 IGT-Version: 1.2<14>[ 29.461634] [IGT] kms_vblank: exiting, ret=77
12958 01:04:12.701203 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 29.471529] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy RESULT=skip>
12959 01:04:12.701751 h64)
12960 01:04:12.702398 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy RESULT=skip
12962 01:04:12.704364 Opened device: /dev/dri/card0
12963 01:04:12.707948 No KMS driver or no outputs, pipes: 8, outputs: 0
12964 01:04:12.713935 [1mSubtest pipe-E-wait-busy: SKIP (0.00<14>[ 29.490037] [IGT] kms_vblank: executing
12965 01:04:12.717675 0s)[0m
12966 01:04:12.721013 <14>[ 29.494840] [IGT] kms_vblank: exiting, ret=77
12967 01:04:12.734593 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 29.504003] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip>
12968 01:04:12.735157 h64)
12969 01:04:12.735803 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip
12971 01:04:12.737744 Opened device: /dev/dri/card0
12972 01:04:12.743355 No KMS driver or no outputs, pipes: 8, outputs: 0
12973 01:04:12.747404 [1mSubtest pipe-E-wait-busy-hang: SKIP (0.000s)[0m
12974 01:04:12.750455 <14>[ 29.524537] [IGT] kms_vblank: executing
12975 01:04:12.757522 IGT-Version: 1.2<14>[ 29.530293] [IGT] kms_vblank: exiting, ret=77
12976 01:04:12.769996 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 29.539934] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip>
12977 01:04:12.770551 h64)
12978 01:04:12.771198 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip
12980 01:04:12.773339 Opened device: /dev/dri/card0
12981 01:04:12.777370 No KMS driver or no outputs, pipes: 8, outputs: 0
12982 01:04:12.783448 [1mSubtest pipe-E-wait-forked-busy: SKI<14>[ 29.559151] [IGT] kms_vblank: executing
12983 01:04:12.786548 P (0.000s)[0m
12984 01:04:12.789789 <14>[ 29.564033] [IGT] kms_vblank: exiting, ret=77
12985 01:04:12.803187 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 29.575115] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip>
12986 01:04:12.804031 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip
12988 01:04:12.806472 h64)
12989 01:04:12.806929 Opened device: /dev/dri/card0
12990 01:04:12.813822 No KMS driver or no outputs, pipes: 8, outputs: 0
12991 01:04:12.823204 [1mSubtest pipe-E-wait-forked-busy-hang: SKIP (0.000s)<14>[ 29.595040] [IGT] kms_vblank: executing
12992 01:04:12.823996 [0m
12993 01:04:12.830100 IGT-Version: 1.2<14>[ 29.600871] [IGT] kms_vblank: exiting, ret=77
12994 01:04:12.832912 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
12995 01:04:12.842546 Opened device: /dev/dri/ca<8>[ 29.612516] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip>
12996 01:04:12.843081 rd0
12997 01:04:12.843724 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip
12999 01:04:12.849270 No KMS driver or no outputs, pipes: 8, outputs: 0
13000 01:04:12.852582 [1mSubtest pipe-E-ts-continuation-idle: SKIP (0.000s)[0m
13001 01:04:12.859868 <14>[ 29.633200] [IGT] kms_vblank: executing
13002 01:04:12.866481 IGT-Version: 1.2<14>[ 29.637907] [IGT] kms_vblank: exiting, ret=77
13003 01:04:12.869100 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13004 01:04:12.879748 Opened dev<8>[ 29.648011] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip>
13005 01:04:12.880624 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip
13007 01:04:12.882756 ice: /dev/dri/card0
13008 01:04:12.885711 No KMS driver or no outputs, pipes: 8, outputs: 0
13009 01:04:12.895399 [1mSubtest pipe-E-ts-continuation-idle-hang: SKIP (0.00<14>[ 29.667799] [IGT] kms_vblank: executing
13010 01:04:12.895860 0s)[0m
13011 01:04:12.898883 <14>[ 29.673783] [IGT] kms_vblank: exiting, ret=77
13012 01:04:12.915165 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 29.684381] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip>
13013 01:04:12.915495 h64)
13014 01:04:12.915987 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip
13016 01:04:12.918771 Opened device: /dev/dri/card0
13017 01:04:12.922236 No KMS driver or no outputs, pipes: 8, outputs: 0
13018 01:04:12.928256 [1mSubtest pipe-E-ts-continuation-dpms-<14>[ 29.704254] [IGT] kms_vblank: executing
13019 01:04:12.935734 rpm: SKIP (0.000<14>[ 29.709074] [IGT] kms_vblank: exiting, ret=77
13020 01:04:12.936276 s)[0m
13021 01:04:12.948777 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip
13023 01:04:12.952171 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-ci<8>[ 29.718856] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip>
13024 01:04:12.952773 p13 aarch64)
13025 01:04:12.955526 Opened device: /dev/dri/card0
13026 01:04:12.958514 No KMS driver or no outputs, pipes: 8, outputs: 0
13027 01:04:12.965708 [1mSubtest pipe-E-ts-continuati<14>[ 29.739421] [IGT] kms_vblank: executing
13028 01:04:12.972421 on-dpms-suspend:<14>[ 29.744971] [IGT] kms_vblank: exiting, ret=77
13029 01:04:12.975221 SKIP (0.000s)[0m
13030 01:04:12.985526 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linu<8>[ 29.755935] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip>
13031 01:04:12.986368 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip
13033 01:04:12.988368 x: 6.1.72-cip13 aarch64)
13034 01:04:12.991741 Opened device: /dev/dri/card0
13035 01:04:12.994893 No KMS driver or no outputs, pipes: 8, outputs: 0
13036 01:04:13.001551 [1mSubtest pipe-E-ts-continuation-s<14>[ 29.776000] [IGT] kms_vblank: executing
13037 01:04:13.008160 uspend: SKIP (0.<14>[ 29.781963] [IGT] kms_vblank: exiting, ret=77
13038 01:04:13.008784 000s)[0m
13039 01:04:13.022196 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72<8>[ 29.793259] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip>
13040 01:04:13.023012 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip
13042 01:04:13.024908 -cip13 aarch64)
13043 01:04:13.028156 Opened device: /dev/dri/card0
13044 01:04:13.031156 No KMS driver or no outputs, pipes: 8, outputs: 0
13045 01:04:13.041541 [1mSubtest pipe-E-ts-continuation-modeset: S<14>[ 29.813070] [IGT] kms_vblank: executing
13046 01:04:13.044188 KIP (0.000s)[0m<14>[ 29.819125] [IGT] kms_vblank: exiting, ret=77
13047 01:04:13.044648
13048 01:04:13.057692 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux:<8>[ 29.828880] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip>
13049 01:04:13.058535 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip
13051 01:04:13.061477 6.1.72-cip13 aarch64)
13052 01:04:13.064367 Opened device: /dev/dri/card0
13053 01:04:13.067987 No KMS driver or no outputs, pipes: 8, outputs: 0
13054 01:04:13.074282 [1mSubtest pipe-E-ts-<14>[ 29.848423] [IGT] kms_vblank: executing
13055 01:04:13.081807 continuation-mod<14>[ 29.853757] [IGT] kms_vblank: exiting, ret=77
13056 01:04:13.084112 eset-hang: SKIP (0.000s)[0m
13057 01:04:13.097448 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1<8>[ 29.865098] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip>
13058 01:04:13.097996 .72-cip13 aarch64)
13059 01:04:13.098639 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip
13061 01:04:13.100675 Opened device: /dev/dri/card0
13062 01:04:13.104622 No KMS driver or no outputs, pipes: 8, outputs: 0
13063 01:04:13.113987 [1mSubtest pipe-E-ts-continuation-modeset<14>[ 29.886662] [IGT] kms_vblank: executing
13064 01:04:13.121585 -rpm: SKIP (0.00<14>[ 29.892553] [IGT] kms_vblank: exiting, ret=77
13065 01:04:13.122144 0s)[0m
13066 01:04:13.134089 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-c<8>[ 29.902811] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip>
13067 01:04:13.134641 ip13 aarch64)
13068 01:04:13.135288 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip
13070 01:04:13.136808 Opened device: /dev/dri/card0
13071 01:04:13.140496 No KMS driver or no outputs, pipes: 8, outputs: 0
13072 01:04:13.147668 [1mSubtest pipe-F-accuracy-idle: SKIP (0.000s)[0m
13073 01:04:13.160918 <14>[ 29.934357] [IGT] kms_vblank: executing
13074 01:04:13.167789 IGT-Version: 1.2<14>[ 29.939600] [IGT] kms_vblank: exiting, ret=77
13075 01:04:13.170377 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13076 01:04:13.180431 Opened device: /dev/dri/ca<8>[ 29.950492] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle RESULT=skip>
13077 01:04:13.181048 rd0
13078 01:04:13.181786 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle RESULT=skip
13080 01:04:13.187243 No KMS driver or no outputs, pipes: 8, outputs: 0
13081 01:04:13.190949 [1mSubtest pipe-F-query-idle: SKIP (0.000s)[0m
13082 01:04:13.196664 <14>[ 29.970254] [IGT] kms_vblank: executing
13083 01:04:13.203249 IGT-Version: 1.2<14>[ 29.975059] [IGT] kms_vblank: exiting, ret=77
13084 01:04:13.213023 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 29.984842] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip>
13085 01:04:13.213495 h64)
13086 01:04:13.214130 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip
13088 01:04:13.216750 Opened device: /dev/dri/card0
13089 01:04:13.223227 No KMS driver or no outputs, pipes: 8, outputs: 0
13090 01:04:13.226123 [1mSubtest pipe-F-query-idle-hang: SKIP (0.000s)[0m
13091 01:04:13.230257 <14>[ 30.004039] [IGT] kms_vblank: executing
13092 01:04:13.236935 IGT-Version: 1.2<14>[ 30.009998] [IGT] kms_vblank: exiting, ret=77
13093 01:04:13.243166 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13094 01:04:13.249681 Opened dev<8>[ 30.021266] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked RESULT=skip>
13095 01:04:13.250547 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked RESULT=skip
13097 01:04:13.253170 ice: /dev/dri/card0
13098 01:04:13.256099 No KMS driver or no outputs, pipes: 8, outputs: 0
13099 01:04:13.259857 [1mSubtest pipe-F-query-forked: SKIP (0.000s)[0m
13100 01:04:13.266817 <14>[ 30.039987] [IGT] kms_vblank: executing
13101 01:04:13.273020 IGT-Version: 1.2<14>[ 30.044710] [IGT] kms_vblank: exiting, ret=77
13102 01:04:13.277247 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13103 01:04:13.285916 Opened dev<8>[ 30.054786] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip>
13104 01:04:13.286477 ice: /dev/dri/card0
13105 01:04:13.287127 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip
13107 01:04:13.292505 No KMS driver or no outputs, pipes: 8, outputs: 0
13108 01:04:13.296774 [1mSubtest pipe-F-query-forked-hang: SKIP (0.000s)[0m
13109 01:04:13.299326 <14>[ 30.073914] [IGT] kms_vblank: executing
13110 01:04:13.299782
13111 01:04:13.306129 IGT-Version: 1.2<14>[ 30.080038] [IGT] kms_vblank: exiting, ret=77
13112 01:04:13.312932 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13113 01:04:13.319219 Opened dev<8>[ 30.090230] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy RESULT=skip>
13114 01:04:13.320062 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy RESULT=skip
13116 01:04:13.322762 ice: /dev/dri/card0
13117 01:04:13.326102 No KMS driver or no outputs, pipes: 8, outputs: 0
13118 01:04:13.329868 [1mSubtest pipe-F-query-busy: SKIP (0.000s)[0m
13119 01:04:13.348316 <14>[ 30.121601] [IGT] kms_vblank: executing
13120 01:04:13.354823 IGT-Version: 1.2<14>[ 30.126856] [IGT] kms_vblank: exiting, ret=77
13121 01:04:13.358101 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13122 01:04:13.368102 Opened dev<8>[ 30.137597] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip>
13123 01:04:13.368665 ice: /dev/dri/card0
13124 01:04:13.369380 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip
13126 01:04:13.374629 No KMS driver or no outputs, pipes: 8, outputs: 0
13127 01:04:13.377455 [1mSubtest pipe-F-query-busy-hang: SKIP (0.000s)[0m
13128 01:04:13.381053 <14>[ 30.156344] [IGT] kms_vblank: executing
13129 01:04:13.387851 IGT-Version: 1.2<14>[ 30.161270] [IGT] kms_vblank: exiting, ret=77
13130 01:04:13.394166 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13131 01:04:13.400653 Opened dev<8>[ 30.172501] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip>
13132 01:04:13.401511 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip
13134 01:04:13.404172 ice: /dev/dri/card0
13135 01:04:13.408040 No KMS driver or no outputs, pipes: 8, outputs: 0
13136 01:04:13.413966 [1mSubtest pipe-F-query-forked-busy: SKIP (0.000s)[0m
13137 01:04:13.417023 <14>[ 30.192242] [IGT] kms_vblank: executing
13138 01:04:13.424261 IGT-Version: 1.2<14>[ 30.196860] [IGT] kms_vblank: exiting, ret=77
13139 01:04:13.426960 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13140 01:04:13.436742 Opened dev<8>[ 30.208072] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip>
13141 01:04:13.437580 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip
13143 01:04:13.440411 ice: /dev/dri/card0
13144 01:04:13.443810 No KMS driver or no outputs, pipes: 8, outputs: 0
13145 01:04:13.450078 [1mSubtest pipe-F-query-forked-busy-hang: SKIP (0.000s)[0m
13146 01:04:13.454021 <14>[ 30.228242] [IGT] kms_vblank: executing
13147 01:04:13.460664 IGT-Version: 1.2<14>[ 30.233138] [IGT] kms_vblank: exiting, ret=77
13148 01:04:13.469941 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 30.242950] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle RESULT=skip>
13149 01:04:13.470777 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle RESULT=skip
13151 01:04:13.473510 h64)
13152 01:04:13.473965 Opened device: /dev/dri/card0
13153 01:04:13.479936 No KMS driver or no outputs, pipes: 8, outputs: 0
13154 01:04:13.483370 [1mSubtest pipe-F-wait-idle: SKIP (0.000s)[0m
13155 01:04:13.486519 <14>[ 30.261663] [IGT] kms_vblank: executing
13156 01:04:13.492823 IGT-Version: 1.2<14>[ 30.267043] [IGT] kms_vblank: exiting, ret=77
13157 01:04:13.506627 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 30.276759] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip>
13158 01:04:13.507196 h64)
13159 01:04:13.507841 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip
13161 01:04:13.509742 Opened device: /dev/dri/card0
13162 01:04:13.513180 No KMS driver or no outputs, pipes: 8, outputs: 0
13163 01:04:13.519669 [1mSubtest pipe-F-wait-idle-hang: SKIP (0.000s)[0m
13164 01:04:13.523120 <14>[ 30.295903] [IGT] kms_vblank: executing
13165 01:04:13.529437 IGT-Version: 1.2<14>[ 30.301706] [IGT] kms_vblank: exiting, ret=77
13166 01:04:13.533106 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13167 01:04:13.543030 Opened device: /dev/dri/ca<8>[ 30.313165] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked RESULT=skip>
13168 01:04:13.543590 rd0
13169 01:04:13.544232 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked RESULT=skip
13171 01:04:13.549465 No KMS driver or no outputs, pipes: 8, outputs: 0
13172 01:04:13.552337 [1mSubtest pipe-F-wait-forked: SKIP (0.000s)[0m
13173 01:04:13.559406 <14>[ 30.333570] [IGT] kms_vblank: executing
13174 01:04:13.566286 IGT-Version: 1.2<14>[ 30.338248] [IGT] kms_vblank: exiting, ret=77
13175 01:04:13.570390 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13176 01:04:13.579391 Opened dev<8>[ 30.348259] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip>
13177 01:04:13.579937 ice: /dev/dri/card0
13178 01:04:13.580572 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip
13180 01:04:13.586512 No KMS driver or no outputs, pipes: 8, outputs: 0
13181 01:04:13.589388 [1mSubtest pipe-F-wait-forked-hang: SKIP (0.000s)[0m
13182 01:04:13.592599 <14>[ 30.367675] [IGT] kms_vblank: executing
13183 01:04:13.599385 IGT-Version: 1.2<14>[ 30.373285] [IGT] kms_vblank: exiting, ret=77
13184 01:04:13.606908 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13185 01:04:13.612524 Opened dev<8>[ 30.384547] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy RESULT=skip>
13186 01:04:13.613417 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy RESULT=skip
13188 01:04:13.615838 ice: /dev/dri/card0
13189 01:04:13.619865 No KMS driver or no outputs, pipes: 8, outputs: 0
13190 01:04:13.622340 [1mSubtest pipe-F-wait-busy: SKIP (0.000s)[0m
13191 01:04:13.629125 <14>[ 30.402976] [IGT] kms_vblank: executing
13192 01:04:13.635667 IGT-Version: 1.2<14>[ 30.407605] [IGT] kms_vblank: exiting, ret=77
13193 01:04:13.639501 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13194 01:04:13.648666 Opened device: /dev/dri/ca<8>[ 30.419064] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip>
13195 01:04:13.649303 rd0
13196 01:04:13.649958 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip
13198 01:04:13.655434 No KMS driver or no outputs, pipes: 8, outputs: 0
13199 01:04:13.659015 [1mSubtest pipe-F-wait-busy-hang: SKIP (0.000s)[0m
13200 01:04:13.666107 <14>[ 30.439822] [IGT] kms_vblank: executing
13201 01:04:13.672591 IGT-Version: 1.2<14>[ 30.444439] [IGT] kms_vblank: exiting, ret=77
13202 01:04:13.675871 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13203 01:04:13.685599 Opened device: /dev/dri/ca<8>[ 30.455917] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip>
13204 01:04:13.686147 rd0
13205 01:04:13.686786 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip
13207 01:04:13.692067 No KMS driver or no outputs, pipes: 8, outputs: 0
13208 01:04:13.696022 [1mSubtest pipe-F-wait-forked-busy: SKIP (0.000s)[0m
13209 01:04:13.703515 <14>[ 30.476369] [IGT] kms_vblank: executing
13210 01:04:13.709252 IGT-Version: 1.2<14>[ 30.481044] [IGT] kms_vblank: exiting, ret=77
13211 01:04:13.712062 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13212 01:04:13.722650 Opened dev<8>[ 30.490977] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip>
13213 01:04:13.723206 ice: /dev/dri/card0
13214 01:04:13.723850 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip
13216 01:04:13.729023 No KMS driver or no outputs, pipes: 8, outputs: 0
13217 01:04:13.735616 [1mSubtest pipe-F-wait-forked-busy-hang: SKIP (0.000s)<14>[ 30.510901] [IGT] kms_vblank: executing
13218 01:04:13.738987 [0m
13219 01:04:13.742031 <14>[ 30.516487] [IGT] kms_vblank: exiting, ret=77
13220 01:04:13.748768 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13221 01:04:13.758608 Opened dev<8>[ 30.526916] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip>
13222 01:04:13.759073 ice: /dev/dri/card0
13223 01:04:13.759708 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip
13225 01:04:13.765370 No KMS driver or no outputs, pipes: 8, outputs: 0
13226 01:04:13.769701 [1mSubtest pipe-F-ts-continuation-idle: SKIP (0.000s)[0m
13227 01:04:13.772338 <14>[ 30.548169] [IGT] kms_vblank: executing
13228 01:04:13.778349 IGT-Version: 1.2<14>[ 30.552836] [IGT] kms_vblank: exiting, ret=77
13229 01:04:13.785137 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13230 01:04:13.794961 Opened dev<8>[ 30.562792] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip>
13231 01:04:13.795522 ice: /dev/dri/card0
13232 01:04:13.796166 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip
13234 01:04:13.801599 No KMS driver or no outputs, pipes: 8, outputs: 0
13235 01:04:13.808842 [1mSubtest pipe-F-ts-continuation-idle-hang: SKIP (0.00<14>[ 30.582706] [IGT] kms_vblank: executing
13236 01:04:13.813363 0s)[0m
13237 01:04:13.816568 <14>[ 30.588674] [IGT] kms_vblank: exiting, ret=77
13238 01:04:13.821854 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13239 01:04:13.832095 Opened dev<8>[ 30.599382] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip>
13240 01:04:13.832650 ice: /dev/dri/card0
13241 01:04:13.833358 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip
13243 01:04:13.838262 No KMS driver or no outputs, pipes: 8, outputs: 0
13244 01:04:13.842213 [1mSubtest pipe-F-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13245 01:04:13.848216 <14>[ 30.620647] [IGT] kms_vblank: executing
13246 01:04:13.851450 IGT-Version: 1.2<14>[ 30.625922] [IGT] kms_vblank: exiting, ret=77
13247 01:04:13.858012 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13248 01:04:13.867973 Opened dev<8>[ 30.637168] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip>
13249 01:04:13.868539 ice: /dev/dri/card0
13250 01:04:13.869240 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip
13252 01:04:13.874504 No KMS driver or no outputs, pipes: 8, outputs: 0
13253 01:04:13.881401 [1mSubtest pipe-F-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13254 01:04:13.884510 <14>[ 30.657607] [IGT] kms_vblank: executing
13255 01:04:13.891135 IGT-Version: 1.2<14>[ 30.663211] [IGT] kms_vblank: exiting, ret=77
13256 01:04:13.900784 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 30.672967] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip>
13257 01:04:13.901618 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip
13259 01:04:13.905090 h64)
13260 01:04:13.905548 Opened device: /dev/dri/card0
13261 01:04:13.910824 No KMS driver or no outputs, pipes: 8, outputs: 0
13262 01:04:13.918058 [1mSubtest pipe-F-ts-continuation-suspe<14>[ 30.691960] [IGT] kms_vblank: executing
13263 01:04:13.924790 nd: SKIP (0.000s<14>[ 30.697402] [IGT] kms_vblank: exiting, ret=77
13264 01:04:13.925342 )[0m
13265 01:04:13.931536 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13266 01:04:13.941262 Ope<8>[ 30.708754] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip>
13267 01:04:13.941818 ned device: /dev/dri/card0
13268 01:04:13.942469 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip
13270 01:04:13.947825 No KMS driver or no outputs, pipes: 8, outputs: 0
13271 01:04:13.950732 [1mSubtest pipe-F-ts-continuation-modeset: SKIP (0.000s)[0m
13272 01:04:13.958036 <14>[ 30.729964] [IGT] kms_vblank: executing
13273 01:04:13.964174 IGT-Version: 1.2<14>[ 30.735673] [IGT] kms_vblank: exiting, ret=77
13274 01:04:13.974554 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip
13276 01:04:13.977402 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 30.745420] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip>
13277 01:04:13.977879 h64)
13278 01:04:13.978237 Opened device: /dev/dri/card0
13279 01:04:13.983804 No KMS driver or no outputs, pipes: 8, outputs: 0
13280 01:04:13.990401 [1mSubtest pipe-F-ts-continuation-modes<14>[ 30.765495] [IGT] kms_vblank: executing
13281 01:04:13.996941 et-hang: SKIP (0<14>[ 30.770374] [IGT] kms_vblank: exiting, ret=77
13282 01:04:13.997498 .000s)[0m
13283 01:04:14.010872 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.7<8>[ 30.780337] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip>
13284 01:04:14.011717 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip
13286 01:04:14.013428 2-cip13 aarch64)
13287 01:04:14.017028 Opened device: /dev/dri/card0
13288 01:04:14.020282 No KMS driver or no outputs, pipes: 8, outputs: 0
13289 01:04:14.026927 [1mSubtest pipe-F-ts-contin<14>[ 30.800554] [IGT] kms_vblank: executing
13290 01:04:14.033374 uation-modeset-r<14>[ 30.806228] [IGT] kms_vblank: exiting, ret=77
13291 01:04:14.036485 pm: SKIP (0.000s)[0m
13292 01:04:14.046544 IGT-Version: 1.27.1-g621c2d3 (aarch64) (L<8>[ 30.817513] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip>
13293 01:04:14.047372 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip
13295 01:04:14.050608 inux: 6.1.72-cip13 aarch64)
13296 01:04:14.051163 Opened device: /dev/dri/card0
13297 01:04:14.056675 No KMS driver or no outputs, pipes: 8, outputs: 0
13298 01:04:14.063519 [1mSubtest pipe-G-accuracy-idle:<14>[ 30.836418] [IGT] kms_vblank: executing
13299 01:04:14.069643 SKIP (0.000s)[<14>[ 30.842581] [IGT] kms_vblank: exiting, ret=77
13300 01:04:14.070214 0m
13301 01:04:14.083041 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 <8>[ 30.852315] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle RESULT=skip>
13302 01:04:14.083597 aarch64)
13303 01:04:14.084243 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle RESULT=skip
13305 01:04:14.086872 Opened device: /dev/dri/card0
13306 01:04:14.090047 No KMS driver or no outputs, pipes: 8, outputs: 0
13307 01:04:14.096945 [1mSubtest pipe-G-query-idle: SKIP <14>[ 30.871250] [IGT] kms_vblank: executing
13308 01:04:14.099872 (0.000s)[0m
13309 01:04:14.103057 <14>[ 30.876912] [IGT] kms_vblank: exiting, ret=77
13310 01:04:14.117461 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 30.887911] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip>
13311 01:04:14.118020 h64)
13312 01:04:14.118674 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip
13314 01:04:14.119826 Opened device: /dev/dri/card0
13315 01:04:14.125948 No KMS driver or no outputs, pipes: 8, outputs: 0
13316 01:04:14.130402 [1mSubtest pipe-G-query-idle-hang: SKIP (0.000s)[0m
13317 01:04:14.134750 <14>[ 30.907387] [IGT] kms_vblank: executing
13318 01:04:14.140253 IGT-Version: 1.2<14>[ 30.912952] [IGT] kms_vblank: exiting, ret=77
13319 01:04:14.146235 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13320 01:04:14.152768 Opened dev<8>[ 30.924155] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked RESULT=skip>
13321 01:04:14.153616 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked RESULT=skip
13323 01:04:14.155380 ice: /dev/dri/card0
13324 01:04:14.159346 No KMS driver or no outputs, pipes: 8, outputs: 0
13325 01:04:14.163322 [1mSubtest pipe-G-query-forked: SKIP (0.000s)[0m
13326 01:04:14.169514 <14>[ 30.943488] [IGT] kms_vblank: executing
13327 01:04:14.175808 IGT-Version: 1.2<14>[ 30.948087] [IGT] kms_vblank: exiting, ret=77
13328 01:04:14.180189 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13329 01:04:14.189321 Opened device: /dev/dri/ca<8>[ 30.959764] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip>
13330 01:04:14.189867 rd0
13331 01:04:14.190510 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip
13333 01:04:14.195821 No KMS driver or no outputs, pipes: 8, outputs: 0
13334 01:04:14.199663 [1mSubtest pipe-G-query-forked-hang: SKIP (0.000s)[0m
13335 01:04:14.206114 <14>[ 30.980134] [IGT] kms_vblank: executing
13336 01:04:14.212816 IGT-Version: 1.2<14>[ 30.984836] [IGT] kms_vblank: exiting, ret=77
13337 01:04:14.217182 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13338 01:04:14.223373 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy RESULT=skip
13340 01:04:14.226161 Opened dev<8>[ 30.995252] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy RESULT=skip>
13341 01:04:14.226727 ice: /dev/dri/card0
13342 01:04:14.229921 No KMS driver or no outputs, pipes: 8, outputs: 0
13343 01:04:14.235749 [1mSubtest pipe-G-query-busy: SKIP (0.000s)[0m
13344 01:04:14.239965 <14>[ 31.014897] [IGT] kms_vblank: executing
13345 01:04:14.245814 IGT-Version: 1.2<14>[ 31.019539] [IGT] kms_vblank: exiting, ret=77
13346 01:04:14.252876 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13347 01:04:14.262403 Opened device: /dev/dri/ca<8>[ 31.030936] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip>
13348 01:04:14.262969 rd0
13349 01:04:14.263620 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip
13351 01:04:14.265875 No KMS driver or no outputs, pipes: 8, outputs: 0
13352 01:04:14.272576 [1mSubtest pipe-G-query-busy-hang: SKIP (0.000s)[0m
13353 01:04:14.275948 <14>[ 31.051535] [IGT] kms_vblank: executing
13354 01:04:14.282789 IGT-Version: 1.2<14>[ 31.056187] [IGT] kms_vblank: exiting, ret=77
13355 01:04:14.288908 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13356 01:04:14.298837 Opened device: /dev/dri/ca<8>[ 31.067830] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip>
13357 01:04:14.299461 rd0
13358 01:04:14.300113 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip
13360 01:04:14.301620 No KMS driver or no outputs, pipes: 8, outputs: 0
13361 01:04:14.308861 [1mSubtest pipe-G-query-forked-busy: SKIP (0.000s)[0m
13362 01:04:14.312032 <14>[ 31.088258] [IGT] kms_vblank: executing
13363 01:04:14.318951 IGT-Version: 1.2<14>[ 31.092895] [IGT] kms_vblank: exiting, ret=77
13364 01:04:14.325467 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13365 01:04:14.334835 Opened dev<8>[ 31.103096] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip>
13366 01:04:14.335387 ice: /dev/dri/card0
13367 01:04:14.336029 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip
13369 01:04:14.338615 No KMS driver or no outputs, pipes: 8, outputs: 0
13370 01:04:14.348416 [1mSubtest pipe-G-query-forked-busy-hang: SKIP (0.000s)<14>[ 31.122770] [IGT] kms_vblank: executing
13371 01:04:14.349021 [0m
13372 01:04:14.355539 <14>[ 31.128517] [IGT] kms_vblank: exiting, ret=77
13373 01:04:14.361439 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13374 01:04:14.368069 Opened dev<8>[ 31.139171] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle RESULT=skip>
13375 01:04:14.368920 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle RESULT=skip
13377 01:04:14.371223 ice: /dev/dri/card0
13378 01:04:14.375106 No KMS driver or no outputs, pipes: 8, outputs: 0
13379 01:04:14.377919 [1mSubtest pipe-G-wait-idle: SKIP (0.000s)[0m
13380 01:04:14.385094 <14>[ 31.158859] [IGT] kms_vblank: executing
13381 01:04:14.391758 IGT-Version: 1.2<14>[ 31.163539] [IGT] kms_vblank: exiting, ret=77
13382 01:04:14.395451 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13383 01:04:14.404310 Opened device: /dev/dri/ca<8>[ 31.175178] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip>
13384 01:04:14.404820 rd0
13385 01:04:14.405464 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip
13387 01:04:14.411800 No KMS driver or no outputs, pipes: 8, outputs: 0
13388 01:04:14.414973 [1mSubtest pipe-G-wait-idle-hang: SKIP (0.000s)[0m
13389 01:04:14.421472 <14>[ 31.195301] [IGT] kms_vblank: executing
13390 01:04:14.428600 IGT-Version: 1.2<14>[ 31.199956] [IGT] kms_vblank: exiting, ret=77
13391 01:04:14.431640 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13392 01:04:14.441387 Opened device: /dev/dri/ca<8>[ 31.211302] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked RESULT=skip>
13393 01:04:14.441958 rd0
13394 01:04:14.442604 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked RESULT=skip
13396 01:04:14.444251 No KMS driver or no outputs, pipes: 8, outputs: 0
13397 01:04:14.451414 [1mSubtest pipe-G-wait-forked: SKIP (0.000s)[0m
13398 01:04:14.457722 <14>[ 31.231621] [IGT] kms_vblank: executing
13399 01:04:14.464427 IGT-Version: 1.2<14>[ 31.236272] [IGT] kms_vblank: exiting, ret=77
13400 01:04:14.469083 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13401 01:04:14.477532 Opened device: /dev/dri/ca<8>[ 31.247743] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip>
13402 01:04:14.478077 rd0
13403 01:04:14.478939 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip
13405 01:04:14.484396 No KMS driver or no outputs, pipes: 8, outputs: 0
13406 01:04:14.487760 [1mSubtest pipe-G-wait-forked-hang: SKIP (0.000s)[0m
13407 01:04:14.494477 <14>[ 31.268507] [IGT] kms_vblank: executing
13408 01:04:14.501336 IGT-Version: 1.2<14>[ 31.273215] [IGT] kms_vblank: exiting, ret=77
13409 01:04:14.510588 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 31.282933] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy RESULT=skip>
13410 01:04:14.511148 h64)
13411 01:04:14.511790 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy RESULT=skip
13413 01:04:14.514502 Opened device: /dev/dri/card0
13414 01:04:14.517419 No KMS driver or no outputs, pipes: 8, outputs: 0
13415 01:04:14.527587 [1mSubtest pipe-G-wait-busy: SKIP (0.00<14>[ 31.301294] [IGT] kms_vblank: executing
13416 01:04:14.528149 0s)[0m
13417 01:04:14.530715 <14>[ 31.306325] [IGT] kms_vblank: exiting, ret=77
13418 01:04:14.544874 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip
13420 01:04:14.547055 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 31.315618] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip>
13421 01:04:14.547596 h64)
13422 01:04:14.550674 Opened device: /dev/dri/card0
13423 01:04:14.553912 No KMS driver or no outputs, pipes: 8, outputs: 0
13424 01:04:14.557039 [1mSubtest pipe-G-wait-busy-hang: SKIP (0.000s)[0m
13425 01:04:14.566387 <14>[ 31.340253] [IGT] kms_vblank: executing
13426 01:04:14.572942 IGT-Version: 1.2<14>[ 31.344916] [IGT] kms_vblank: exiting, ret=77
13427 01:04:14.575860 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13428 01:04:14.585767 Opened dev<8>[ 31.354914] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip>
13429 01:04:14.586331 ice: /dev/dri/card0
13430 01:04:14.586985 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip
13432 01:04:14.592787 No KMS driver or no outputs, pipes: 8, outputs: 0
13433 01:04:14.596586 [1mSubtest pipe-G-wait-forked-busy: SKIP (0.000s)[0m
13434 01:04:14.599966 <14>[ 31.375395] [IGT] kms_vblank: executing
13435 01:04:14.606297 IGT-Version: 1.2<14>[ 31.380034] [IGT] kms_vblank: exiting, ret=77
13436 01:04:14.612972 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13437 01:04:14.623151 Opened device: /dev/dri/ca<8>[ 31.391504] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip>
13438 01:04:14.623713 rd0
13439 01:04:14.624362 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip
13441 01:04:14.625741 No KMS driver or no outputs, pipes: 8, outputs: 0
13442 01:04:14.632905 [1mSubtest pipe-G-wait-forked-busy-hang: SKIP (0.000s)[0m
13443 01:04:14.639350 <14>[ 31.412362] [IGT] kms_vblank: executing
13444 01:04:14.642139 IGT-Version: 1.2<14>[ 31.417083] [IGT] kms_vblank: exiting, ret=77
13445 01:04:14.649342 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13446 01:04:14.658555 Opened device: /dev/dri/ca<8>[ 31.428879] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip>
13447 01:04:14.659137 rd0
13448 01:04:14.659788 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip
13450 01:04:14.665515 No KMS driver or no outputs, pipes: 8, outputs: 0
13451 01:04:14.668540 [1mSubtest pipe-G-ts-continuation-idle: SKIP (0.000s)[0m
13452 01:04:14.675567 <14>[ 31.449184] [IGT] kms_vblank: executing
13453 01:04:14.682515 IGT-Version: 1.2<14>[ 31.453832] [IGT] kms_vblank: exiting, ret=77
13454 01:04:14.685115 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13455 01:04:14.694876 Opened dev<8>[ 31.463885] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip>
13456 01:04:14.695451 ice: /dev/dri/card0
13457 01:04:14.696219 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip
13459 01:04:14.701474 No KMS driver or no outputs, pipes: 8, outputs: 0
13460 01:04:14.711634 [1mSubtest pipe-G-ts-continuation-idle-hang: SKIP (0.00<14>[ 31.483785] [IGT] kms_vblank: executing
13461 01:04:14.712209 0s)[0m
13462 01:04:14.715029 <14>[ 31.489732] [IGT] kms_vblank: exiting, ret=77
13463 01:04:14.728423 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip
13465 01:04:14.731297 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 31.500217] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip>
13466 01:04:14.731774 h64)
13467 01:04:14.732247 Opened device: /dev/dri/card0
13468 01:04:14.738194 No KMS driver or no outputs, pipes: 8, outputs: 0
13469 01:04:14.748324 [1mSubtest pipe-G-ts-continuation-dpms-rpm: SKIP (0.000<14>[ 31.520458] [IGT] kms_vblank: executing
13470 01:04:14.748960 s)[0m
13471 01:04:14.752363 <14>[ 31.526317] [IGT] kms_vblank: exiting, ret=77
13472 01:04:14.764842 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6<8>[ 31.535248] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip>
13473 01:04:14.765717 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip
13475 01:04:14.768216 .1.72-cip13 aarch64)
13476 01:04:14.771449 Opened device: /dev/dri/card0
13477 01:04:14.774382 No KMS driver or no outputs, pipes: 8, outputs: 0
13478 01:04:14.781190 [1mSubtest pipe-G-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13479 01:04:14.784263 <14>[ 31.560178] [IGT] kms_vblank: executing
13480 01:04:14.791493 IGT-Version: 1.2<14>[ 31.564849] [IGT] kms_vblank: exiting, ret=77
13481 01:04:14.797879 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13482 01:04:14.805203 Opened dev<8>[ 31.574772] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip>
13483 01:04:14.805933 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip
13485 01:04:14.807487 ice: /dev/dri/card0
13486 01:04:14.812257 No KMS driver or no outputs, pipes: 8, outputs: 0
13487 01:04:14.817663 [1mSubtest pipe-G-ts-continuation-suspend: SKIP (0.000s)[0m
13488 01:04:14.826102 <14>[ 31.600291] [IGT] kms_vblank: executing
13489 01:04:14.832585 IGT-Version: 1.2<14>[ 31.605087] [IGT] kms_vblank: exiting, ret=77
13490 01:04:14.836530 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13491 01:04:14.845873 Opened dev<8>[ 31.615058] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip>
13492 01:04:14.846727 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip
13494 01:04:14.849256 ice: /dev/dri/card0
13495 01:04:14.853332 No KMS driver or no outputs, pipes: 8, outputs: 0
13496 01:04:14.859175 [1mSubtest pipe-G-ts-continuation-modeset: SKIP (0.000s)[0m
13497 01:04:14.866409 <14>[ 31.640315] [IGT] kms_vblank: executing
13498 01:04:14.872888 IGT-Version: 1.2<14>[ 31.645023] [IGT] kms_vblank: exiting, ret=77
13499 01:04:14.886078 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 31.654915] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip>
13500 01:04:14.886653 h64)
13501 01:04:14.887348 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip
13503 01:04:14.889688 Opened device: /dev/dri/card0
13504 01:04:14.893018 No KMS driver or no outputs, pipes: 8, outputs: 0
13505 01:04:14.898954 [1mSubtest pipe-G-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13506 01:04:14.902625 <14>[ 31.678635] [IGT] kms_vblank: executing
13507 01:04:14.910867 IGT-Version: 1.2<14>[ 31.683380] [IGT] kms_vblank: exiting, ret=77
13508 01:04:14.922674 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 31.693112] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip>
13509 01:04:14.923246 h64)
13510 01:04:14.923897 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip
13512 01:04:14.925600 Opened device: /dev/dri/card0
13513 01:04:14.932486 No KMS driver or no outputs, pipes: 8, outputs: 0
13514 01:04:14.939203 [1mSubtest pipe-G-ts-continuation-modes<14>[ 31.713190] [IGT] kms_vblank: executing
13515 01:04:14.946550 et-rpm: SKIP (0.<14>[ 31.718033] [IGT] kms_vblank: exiting, ret=77
13516 01:04:14.947102 000s)[0m
13517 01:04:14.959632 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72<8>[ 31.728116] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip>
13518 01:04:14.960204 -cip13 aarch64)
13519 01:04:14.960865 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip
13521 01:04:14.962349 Opened device: /dev/dri/card0
13522 01:04:14.965653 No KMS driver or no outputs, pipes: 8, outputs: 0
13523 01:04:14.972286 [1mSubtest pipe-H-accuracy-i<14>[ 31.746976] [IGT] kms_vblank: executing
13524 01:04:14.979170 dle: SKIP (0.000<14>[ 31.752763] [IGT] kms_vblank: exiting, ret=77
13525 01:04:14.979744 s)[0m
13526 01:04:14.985315 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13527 01:04:14.992089 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle RESULT=skip
13529 01:04:14.995805 Op<8>[ 31.764043] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle RESULT=skip>
13530 01:04:14.996282 ened device: /dev/dri/card0
13531 01:04:15.002183 No KMS driver or no outputs, pipes: 8, outputs: 0
13532 01:04:15.005331 [1mSubtest pipe-H-query-idle: SKIP (0.000s)[0m
13533 01:04:15.008543 <14>[ 31.784505] [IGT] kms_vblank: executing
13534 01:04:15.015310 IGT-Version: 1.2<14>[ 31.789177] [IGT] kms_vblank: exiting, ret=77
13535 01:04:15.021790 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13536 01:04:15.028580 Opened dev<8>[ 31.799109] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip>
13537 01:04:15.029571 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip
13539 01:04:15.031609 ice: /dev/dri/card0
13540 01:04:15.035584 No KMS driver or no outputs, pipes: 8, outputs: 0
13541 01:04:15.042513 [1mSubtest pipe-H-query-idle-hang: SKIP (0.000s)[0m
13542 01:04:15.045922 <14>[ 31.818745] [IGT] kms_vblank: executing
13543 01:04:15.052013 IGT-Version: 1.2<14>[ 31.824021] [IGT] kms_vblank: exiting, ret=77
13544 01:04:15.055042 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13545 01:04:15.065393 Opened dev<8>[ 31.835343] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked RESULT=skip>
13546 01:04:15.065945 ice: /dev/dri/card0
13547 01:04:15.066589 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked RESULT=skip
13549 01:04:15.071636 No KMS driver or no outputs, pipes: 8, outputs: 0
13550 01:04:15.074907 [1mSubtest pipe-H-query-forked: SKIP (0.000s)[0m
13551 01:04:15.078685 <14>[ 31.854030] [IGT] kms_vblank: executing
13552 01:04:15.085207 IGT-Version: 1.2<14>[ 31.858871] [IGT] kms_vblank: exiting, ret=77
13553 01:04:15.098061 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 31.868487] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip>
13554 01:04:15.098637 h64)
13555 01:04:15.099551 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip
13557 01:04:15.101652 Opened device: /dev/dri/card0
13558 01:04:15.106468 No KMS driver or no outputs, pipes: 8, outputs: 0
13559 01:04:15.111486 [1mSubtest pipe-H-query-forked-hang: SKIP (0.000s)[0m
13560 01:04:15.114994 <14>[ 31.888388] [IGT] kms_vblank: executing
13561 01:04:15.115459
13562 01:04:15.121472 IGT-Version: 1.2<14>[ 31.893980] [IGT] kms_vblank: exiting, ret=77
13563 01:04:15.125834 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13564 01:04:15.134674 Opened device: /dev/dri/ca<8>[ 31.905514] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy RESULT=skip>
13565 01:04:15.135292 rd0
13566 01:04:15.135953 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy RESULT=skip
13568 01:04:15.141709 No KMS driver or no outputs, pipes: 8, outputs: 0
13569 01:04:15.144824 [1mSubtest pipe-H-query-busy: SKIP (0.000s)[0m
13570 01:04:15.152474 <14>[ 31.925354] [IGT] kms_vblank: executing
13571 01:04:15.158787 IGT-Version: 1.2<14>[ 31.929981] [IGT] kms_vblank: exiting, ret=77
13572 01:04:15.161293 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13573 01:04:15.171115 Opened dev<8>[ 31.940160] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip>
13574 01:04:15.171685 ice: /dev/dri/card0
13575 01:04:15.172338 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip
13577 01:04:15.177835 No KMS driver or no outputs, pipes: 8, outputs: 0
13578 01:04:15.180681 [1mSubtest pipe-H-query-busy-hang: SKIP (0.000s)[0m
13579 01:04:15.184846 <14>[ 31.959141] [IGT] kms_vblank: executing
13580 01:04:15.192201 IGT-Version: 1.2<14>[ 31.964954] [IGT] kms_vblank: exiting, ret=77
13581 01:04:15.197485 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13582 01:04:15.204237 Opened dev<8>[ 31.976146] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip>
13583 01:04:15.205177 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip
13585 01:04:15.207925 ice: /dev/dri/card0
13586 01:04:15.210797 No KMS driver or no outputs, pipes: 8, outputs: 0
13587 01:04:15.217603 [1mSubtest pipe-H-query-forked-busy: SKIP (0.000s)[0m
13588 01:04:15.220785 <14>[ 31.995636] [IGT] kms_vblank: executing
13589 01:04:15.227507 IGT-Version: 1.2<14>[ 32.000252] [IGT] kms_vblank: exiting, ret=77
13590 01:04:15.230773 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13591 01:04:15.241449 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip
13593 01:04:15.244228 Opened device: /dev/dri/ca<8>[ 32.011835] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip>
13594 01:04:15.244697 rd0
13595 01:04:15.248144 No KMS driver or no outputs, pipes: 8, outputs: 0
13596 01:04:15.253741 [1mSubtest pipe-H-query-forked-busy-hang: SKIP (0.000s)[0m
13597 01:04:15.257761 <14>[ 32.032848] [IGT] kms_vblank: executing
13598 01:04:15.263918 IGT-Version: 1.2<14>[ 32.037624] [IGT] kms_vblank: exiting, ret=77
13599 01:04:15.270348 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13600 01:04:15.277002 Opened device: /dev/dri/ca<8>[ 32.049214] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle RESULT=skip>
13601 01:04:15.277854 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle RESULT=skip
13603 01:04:15.280788 rd0
13604 01:04:15.283862 No KMS driver or no outputs, pipes: 8, outputs: 0
13605 01:04:15.287457 [1mSubtest pipe-H-wait-idle: SKIP (0.000s)[0m
13606 01:04:15.294714 <14>[ 32.068729] [IGT] kms_vblank: executing
13607 01:04:15.301019 IGT-Version: 1.2<14>[ 32.073423] [IGT] kms_vblank: exiting, ret=77
13608 01:04:15.305140 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13609 01:04:15.314905 Opened dev<8>[ 32.084107] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip>
13610 01:04:15.315478 ice: /dev/dri/card0
13611 01:04:15.316126 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip
13613 01:04:15.321403 No KMS driver or no outputs, pipes: 8, outputs: 0
13614 01:04:15.324133 [1mSubtest pipe-H-wait-idle-hang: SKIP (0.000s)[0m
13615 01:04:15.328506 <14>[ 32.102627] [IGT] kms_vblank: executing
13616 01:04:15.334145 IGT-Version: 1.2<14>[ 32.108059] [IGT] kms_vblank: exiting, ret=77
13617 01:04:15.340901 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13618 01:04:15.347739 Opened device: /dev/dri/ca<8>[ 32.119538] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked RESULT=skip>
13619 01:04:15.348570 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked RESULT=skip
13621 01:04:15.350863 rd0
13622 01:04:15.354379 No KMS driver or no outputs, pipes: 8, outputs: 0
13623 01:04:15.357938 [1mSubtest pipe-H-wait-forked: SKIP (0.000s)[0m
13624 01:04:15.365764 <14>[ 32.139713] [IGT] kms_vblank: executing
13625 01:04:15.372988 IGT-Version: 1.2<14>[ 32.144429] [IGT] kms_vblank: exiting, ret=77
13626 01:04:15.382692 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 32.154292] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip>
13627 01:04:15.383296 h64)
13628 01:04:15.383953 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip
13630 01:04:15.385469 Opened device: /dev/dri/card0
13631 01:04:15.392674 No KMS driver or no outputs, pipes: 8, outputs: 0
13632 01:04:15.398493 [1mSubtest pipe-H-wait-forked-hang: SKI<14>[ 32.173166] [IGT] kms_vblank: executing
13633 01:04:15.399045 P (0.000s)[0m
13634 01:04:15.406120 <14>[ 32.178105] [IGT] kms_vblank: exiting, ret=77
13635 01:04:15.418789 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 32.188007] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy RESULT=skip>
13636 01:04:15.419362 h64)
13637 01:04:15.420018 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy RESULT=skip
13639 01:04:15.421685 Opened device: /dev/dri/card0
13640 01:04:15.426177 No KMS driver or no outputs, pipes: 8, outputs: 0
13641 01:04:15.431885 [1mSubtest pipe-H-wait-busy: SKIP (0.00<14>[ 32.206904] [IGT] kms_vblank: executing
13642 01:04:15.435311 0s)[0m
13643 01:04:15.438496 <14>[ 32.212478] [IGT] kms_vblank: exiting, ret=77
13644 01:04:15.445143 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13645 01:04:15.452432 Opened dev<8>[ 32.223217] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip>
13646 01:04:15.453342 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip
13648 01:04:15.454850 ice: /dev/dri/card0
13649 01:04:15.458471 No KMS driver or no outputs, pipes: 8, outputs: 0
13650 01:04:15.465199 [1mSubtest pipe-H-wait-busy-hang: SKIP (0.000s)[0m
13651 01:04:15.468236 <14>[ 32.243572] [IGT] kms_vblank: executing
13652 01:04:15.475253 IGT-Version: 1.2<14>[ 32.248190] [IGT] kms_vblank: exiting, ret=77
13653 01:04:15.478170 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13654 01:04:15.489115 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip
13656 01:04:15.491000 Opened device: /dev/dri/ca<8>[ 32.259908] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip>
13657 01:04:15.491463 rd0
13658 01:04:15.494775 No KMS driver or no outputs, pipes: 8, outputs: 0
13659 01:04:15.499261 [1mSubtest pipe-H-wait-forked-busy: SKIP (0.000s)[0m
13660 01:04:15.505811 <14>[ 32.280095] [IGT] kms_vblank: executing
13661 01:04:15.513142 IGT-Version: 1.2<14>[ 32.284746] [IGT] kms_vblank: exiting, ret=77
13662 01:04:15.516841 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13663 01:04:15.525996 Opened dev<8>[ 32.296035] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip>
13664 01:04:15.526566 ice: /dev/dri/card0
13665 01:04:15.527212 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip
13667 01:04:15.532392 No KMS driver or no outputs, pipes: 8, outputs: 0
13668 01:04:15.535930 [1mSubtest pipe-H-wait-forked-busy-hang: SKIP (0.000s)[0m
13669 01:04:15.542621 <14>[ 32.315767] [IGT] kms_vblank: executing
13670 01:04:15.548899 IGT-Version: 1.2<14>[ 32.320698] [IGT] kms_vblank: exiting, ret=77
13671 01:04:15.551982 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13672 01:04:15.562380 Opened device: /dev/dri/ca<8>[ 32.332128] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip>
13673 01:04:15.562943 rd0
13674 01:04:15.563587 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip
13676 01:04:15.568283 No KMS driver or no outputs, pipes: 8, outputs: 0
13677 01:04:15.572215 [1mSubtest pipe-H-ts-continuation-idle: SKIP (0.000s)[0m
13678 01:04:15.578822 <14>[ 32.352912] [IGT] kms_vblank: executing
13679 01:04:15.585313 IGT-Version: 1.2<14>[ 32.357689] [IGT] kms_vblank: exiting, ret=77
13680 01:04:15.595809 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip
13682 01:04:15.598640 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 32.367477] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip>
13683 01:04:15.599115 h64)
13684 01:04:15.602692 Opened device: /dev/dri/card0
13685 01:04:15.605049 No KMS driver or no outputs, pipes: 8, outputs: 0
13686 01:04:15.612447 [1mSubtest pipe-H-ts-continuation-idle-<14>[ 32.386173] [IGT] kms_vblank: executing
13687 01:04:15.618915 hang: SKIP (0.00<14>[ 32.392163] [IGT] kms_vblank: exiting, ret=77
13688 01:04:15.619475 0s)[0m
13689 01:04:15.625474 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13690 01:04:15.635916 O<8>[ 32.403481] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip>
13691 01:04:15.636820 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip
13693 01:04:15.638537 pened device: /dev/dri/card0
13694 01:04:15.642455 No KMS driver or no outputs, pipes: 8, outputs: 0
13695 01:04:15.648378 [1mSubtest pipe-H-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13696 01:04:15.651800 <14>[ 32.424769] [IGT] kms_vblank: executing
13697 01:04:15.652365
13698 01:04:15.658113 IGT-Version: 1.2<14>[ 32.430839] [IGT] kms_vblank: exiting, ret=77
13699 01:04:15.671928 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 32.440441] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip>
13700 01:04:15.672511 h64)
13701 01:04:15.673223 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip
13703 01:04:15.675079 Opened device: /dev/dri/card0
13704 01:04:15.678454 No KMS driver or no outputs, pipes: 8, outputs: 0
13705 01:04:15.688049 [1mSubtest pipe-H-ts-continuation-dpms-suspend: SKIP (0<14>[ 32.460793] [IGT] kms_vblank: executing
13706 01:04:15.688626 .000s)[0m
13707 01:04:15.691288 <14>[ 32.466851] [IGT] kms_vblank: exiting, ret=77
13708 01:04:15.698200 IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13709 01:04:15.707713 Opened dev<8>[ 32.477747] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip>
13710 01:04:15.708450 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip
13712 01:04:15.710720 ice: /dev/dri/card0
13713 01:04:15.715176 No KMS driver or no outputs, pipes: 8, outputs: 0
13714 01:04:15.721167 [1mSubtest pipe-H-ts-continuation-suspend: SKIP (0.000s)[0m
13715 01:04:15.724916 <14>[ 32.499118] [IGT] kms_vblank: executing
13716 01:04:15.731177 IGT-Version: 1.2<14>[ 32.504100] [IGT] kms_vblank: exiting, ret=77
13717 01:04:15.735299 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarch64)
13718 01:04:15.747686 Opened device: /dev/dri/ca<8>[ 32.515621] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip>
13719 01:04:15.748254 rd0
13720 01:04:15.748907 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip
13722 01:04:15.750923 No KMS driver or no outputs, pipes: 8, outputs: 0
13723 01:04:15.757520 [1mSubtest pipe-H-ts-continuation-modeset: SKIP (0.000s)[0m
13724 01:04:15.761821 <14>[ 32.536766] [IGT] kms_vblank: executing
13725 01:04:15.767460 IGT-Version: 1.2<14>[ 32.541526] [IGT] kms_vblank: exiting, ret=77
13726 01:04:15.780751 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 32.551409] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip>
13727 01:04:15.781342 h64)
13728 01:04:15.781991 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip
13730 01:04:15.783682 Opened device: /dev/dri/card0
13731 01:04:15.787196 No KMS driver or no outputs, pipes: 8, outputs: 0
13732 01:04:15.793489 [1mSubtest pipe-H-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13733 01:04:15.802210 <14>[ 32.576279] [IGT] kms_vblank: executing
13734 01:04:15.809201 IGT-Version: 1.2<14>[ 32.581042] [IGT] kms_vblank: exiting, ret=77
13735 01:04:15.822289 7.1-g621c2d3 (aarch64) (Linux: 6.1.72-cip13 aarc<8>[ 32.590821] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip>
13736 01:04:15.822871 h64)
13737 01:04:15.823519 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip
13739 01:04:15.829100 Opened device: /dev/dri/ca<8>[ 32.601189] <LAVA_SIGNAL_TESTSET STOP>
13740 01:04:15.829666 rd0
13741 01:04:15.830310 Received signal: <TESTSET> STOP
13742 01:04:15.830671 Closing test_set kms_vblank
13743 01:04:15.834875 No KMS driv<8>[ 32.607813] <LAVA_SIGNAL_ENDRUN 0_igt-kms-mediatek 12571129_1.5.2.3.1>
13744 01:04:15.835729 Received signal: <ENDRUN> 0_igt-kms-mediatek 12571129_1.5.2.3.1
13745 01:04:15.836192 Ending use of test pattern.
13746 01:04:15.836540 Ending test lava.0_igt-kms-mediatek (12571129_1.5.2.3.1), duration 12.18
13748 01:04:15.838417 er or no outputs, pipes: 8, outputs: 0
13749 01:04:15.845686 [1mSubtest pipe-H-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13750 01:04:15.846255 + set +x
13751 01:04:15.848472 <LAVA_TEST_RUNNER EXIT>
13752 01:04:15.849365 ok: lava_test_shell seems to have completed
13753 01:04:15.869565 addfb25-4-tiled:
result: skip
set: kms_addfb_basic
addfb25-bad-modifier:
result: fail
set: kms_addfb_basic
addfb25-framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
addfb25-modifier-no-flag:
result: pass
set: kms_addfb_basic
addfb25-x-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-x-tiled-mismatch-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-small-legacy:
result: skip
set: kms_addfb_basic
addfb25-yf-tiled-legacy:
result: skip
set: kms_addfb_basic
atomic-invalid-params:
result: skip
set: kms_atomic
atomic_plane_damage:
result: skip
set: kms_atomic
bad-pitch-0:
result: pass
set: kms_addfb_basic
bad-pitch-1024:
result: pass
set: kms_addfb_basic
bad-pitch-128:
result: pass
set: kms_addfb_basic
bad-pitch-256:
result: pass
set: kms_addfb_basic
bad-pitch-32:
result: pass
set: kms_addfb_basic
bad-pitch-63:
result: pass
set: kms_addfb_basic
bad-pitch-65536:
result: pass
set: kms_addfb_basic
bad-pitch-999:
result: pass
set: kms_addfb_basic
basic:
result: skip
set: kms_setmode
basic-auth:
result: pass
set: core_auth
basic-clone-single-crtc:
result: skip
set: kms_setmode
basic-x-tiled-legacy:
result: skip
set: kms_addfb_basic
basic-y-tiled-legacy:
result: skip
set: kms_addfb_basic
blob-multiple:
result: pass
set: kms_prop_blob
blob-prop-core:
result: pass
set: kms_prop_blob
blob-prop-lifetime:
result: pass
set: kms_prop_blob
blob-prop-validate:
result: pass
set: kms_prop_blob
bo-too-small:
result: skip
set: kms_addfb_basic
bo-too-small-due-to-tiling:
result: skip
set: kms_addfb_basic
clobberred-modifier:
result: skip
set: kms_addfb_basic
clone-exclusive-crtc:
result: skip
set: kms_setmode
core_getclient: pass
core_getstats: pass
core_getversion: pass
core_setmaster_vs_auth: pass
crtc-id:
result: skip
set: kms_vblank
crtc-invalid-params:
result: skip
set: kms_atomic
crtc-invalid-params-fence:
result: skip
set: kms_atomic
empty-block:
result: skip
set: drm_read
empty-nonblock:
result: skip
set: drm_read
fault-buffer:
result: skip
set: drm_read
framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
getclient-master-drop:
result: pass
set: core_auth
getclient-simple:
result: pass
set: core_auth
invalid:
result: skip
set: kms_vblank
invalid-buffer:
result: skip
set: drm_read
invalid-clone-exclusive-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc-stealing:
result: skip
set: kms_setmode
invalid-get-prop:
result: pass
set: kms_prop_blob
invalid-get-prop-any:
result: pass
set: kms_prop_blob
invalid-set-prop:
result: pass
set: kms_prop_blob
invalid-set-prop-any:
result: pass
set: kms_prop_blob
invalid-smem-bo-on-discrete:
result: skip
set: kms_addfb_basic
legacy-format:
result: pass
set: kms_addfb_basic
many-magics:
result: pass
set: core_auth
master-rmfb:
result: pass
set: kms_addfb_basic
no-handle:
result: pass
set: kms_addfb_basic
pipe-A-accuracy-idle:
result: skip
set: kms_vblank
pipe-A-query-busy:
result: skip
set: kms_vblank
pipe-A-query-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked:
result: skip
set: kms_vblank
pipe-A-query-forked-busy:
result: skip
set: kms_vblank
pipe-A-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked-hang:
result: skip
set: kms_vblank
pipe-A-query-idle:
result: skip
set: kms_vblank
pipe-A-query-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-A-wait-busy:
result: skip
set: kms_vblank
pipe-A-wait-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked-hang:
result: skip
set: kms_vblank
pipe-A-wait-idle:
result: skip
set: kms_vblank
pipe-A-wait-idle-hang:
result: skip
set: kms_vblank
pipe-B-accuracy-idle:
result: skip
set: kms_vblank
pipe-B-query-busy:
result: skip
set: kms_vblank
pipe-B-query-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked:
result: skip
set: kms_vblank
pipe-B-query-forked-busy:
result: skip
set: kms_vblank
pipe-B-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked-hang:
result: skip
set: kms_vblank
pipe-B-query-idle:
result: skip
set: kms_vblank
pipe-B-query-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-B-wait-busy:
result: skip
set: kms_vblank
pipe-B-wait-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked-hang:
result: skip
set: kms_vblank
pipe-B-wait-idle:
result: skip
set: kms_vblank
pipe-B-wait-idle-hang:
result: skip
set: kms_vblank
pipe-C-accuracy-idle:
result: skip
set: kms_vblank
pipe-C-query-busy:
result: skip
set: kms_vblank
pipe-C-query-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked:
result: skip
set: kms_vblank
pipe-C-query-forked-busy:
result: skip
set: kms_vblank
pipe-C-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked-hang:
result: skip
set: kms_vblank
pipe-C-query-idle:
result: skip
set: kms_vblank
pipe-C-query-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-C-wait-busy:
result: skip
set: kms_vblank
pipe-C-wait-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked-hang:
result: skip
set: kms_vblank
pipe-C-wait-idle:
result: skip
set: kms_vblank
pipe-C-wait-idle-hang:
result: skip
set: kms_vblank
pipe-D-accuracy-idle:
result: skip
set: kms_vblank
pipe-D-query-busy:
result: skip
set: kms_vblank
pipe-D-query-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked:
result: skip
set: kms_vblank
pipe-D-query-forked-busy:
result: skip
set: kms_vblank
pipe-D-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked-hang:
result: skip
set: kms_vblank
pipe-D-query-idle:
result: skip
set: kms_vblank
pipe-D-query-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-D-wait-busy:
result: skip
set: kms_vblank
pipe-D-wait-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked-hang:
result: skip
set: kms_vblank
pipe-D-wait-idle:
result: skip
set: kms_vblank
pipe-D-wait-idle-hang:
result: skip
set: kms_vblank
pipe-E-accuracy-idle:
result: skip
set: kms_vblank
pipe-E-query-busy:
result: skip
set: kms_vblank
pipe-E-query-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked:
result: skip
set: kms_vblank
pipe-E-query-forked-busy:
result: skip
set: kms_vblank
pipe-E-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked-hang:
result: skip
set: kms_vblank
pipe-E-query-idle:
result: skip
set: kms_vblank
pipe-E-query-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-E-wait-busy:
result: skip
set: kms_vblank
pipe-E-wait-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked-hang:
result: skip
set: kms_vblank
pipe-E-wait-idle:
result: skip
set: kms_vblank
pipe-E-wait-idle-hang:
result: skip
set: kms_vblank
pipe-F-accuracy-idle:
result: skip
set: kms_vblank
pipe-F-query-busy:
result: skip
set: kms_vblank
pipe-F-query-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked:
result: skip
set: kms_vblank
pipe-F-query-forked-busy:
result: skip
set: kms_vblank
pipe-F-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked-hang:
result: skip
set: kms_vblank
pipe-F-query-idle:
result: skip
set: kms_vblank
pipe-F-query-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-F-wait-busy:
result: skip
set: kms_vblank
pipe-F-wait-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked-hang:
result: skip
set: kms_vblank
pipe-F-wait-idle:
result: skip
set: kms_vblank
pipe-F-wait-idle-hang:
result: skip
set: kms_vblank
pipe-G-accuracy-idle:
result: skip
set: kms_vblank
pipe-G-query-busy:
result: skip
set: kms_vblank
pipe-G-query-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked:
result: skip
set: kms_vblank
pipe-G-query-forked-busy:
result: skip
set: kms_vblank
pipe-G-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked-hang:
result: skip
set: kms_vblank
pipe-G-query-idle:
result: skip
set: kms_vblank
pipe-G-query-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-G-wait-busy:
result: skip
set: kms_vblank
pipe-G-wait-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked-hang:
result: skip
set: kms_vblank
pipe-G-wait-idle:
result: skip
set: kms_vblank
pipe-G-wait-idle-hang:
result: skip
set: kms_vblank
pipe-H-accuracy-idle:
result: skip
set: kms_vblank
pipe-H-query-busy:
result: skip
set: kms_vblank
pipe-H-query-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked:
result: skip
set: kms_vblank
pipe-H-query-forked-busy:
result: skip
set: kms_vblank
pipe-H-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked-hang:
result: skip
set: kms_vblank
pipe-H-query-idle:
result: skip
set: kms_vblank
pipe-H-query-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-H-wait-busy:
result: skip
set: kms_vblank
pipe-H-wait-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked-hang:
result: skip
set: kms_vblank
pipe-H-wait-idle:
result: skip
set: kms_vblank
pipe-H-wait-idle-hang:
result: skip
set: kms_vblank
plane-cursor-legacy:
result: skip
set: kms_atomic
plane-immutable-zpos:
result: skip
set: kms_atomic
plane-invalid-params:
result: skip
set: kms_atomic
plane-invalid-params-fence:
result: skip
set: kms_atomic
plane-overlay-legacy:
result: skip
set: kms_atomic
plane-primary-legacy:
result: skip
set: kms_atomic
plane-primary-overlay-mutable-zpos:
result: skip
set: kms_atomic
short-buffer-block:
result: skip
set: drm_read
short-buffer-nonblock:
result: skip
set: drm_read
short-buffer-wakeup:
result: skip
set: drm_read
size-max:
result: skip
set: kms_addfb_basic
small-bo:
result: skip
set: kms_addfb_basic
test-only:
result: skip
set: kms_atomic
tile-pitch-mismatch:
result: skip
set: kms_addfb_basic
too-high:
result: skip
set: kms_addfb_basic
too-wide:
result: skip
set: kms_addfb_basic
unused-handle:
result: pass
set: kms_addfb_basic
unused-modifier:
result: pass
set: kms_addfb_basic
unused-offsets:
result: pass
set: kms_addfb_basic
unused-pitches:
result: pass
set: kms_addfb_basic
13754 01:04:15.870451 end: 3.1 lava-test-shell (duration 00:00:13) [common]
13755 01:04:15.870788 end: 3 lava-test-retry (duration 00:00:13) [common]
13756 01:04:15.871134 start: 4 finalize (timeout 00:07:48) [common]
13757 01:04:15.871483 start: 4.1 power-off (timeout 00:00:30) [common]
13758 01:04:15.872020 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-4' '--port=1' '--command=off'
13759 01:04:15.975606 >> Command sent successfully.
13760 01:04:15.985164 Returned 0 in 0 seconds
13761 01:04:16.086700 end: 4.1 power-off (duration 00:00:00) [common]
13763 01:04:16.088384 start: 4.2 read-feedback (timeout 00:07:48) [common]
13764 01:04:16.089795 Listened to connection for namespace 'common' for up to 1s
13765 01:04:17.089769 Finalising connection for namespace 'common'
13766 01:04:17.090507 Disconnecting from shell: Finalise
13767 01:04:17.091031 / #
13768 01:04:17.192202 end: 4.2 read-feedback (duration 00:00:01) [common]
13769 01:04:17.193033 end: 4 finalize (duration 00:00:01) [common]
13770 01:04:17.193734 Cleaning after the job
13771 01:04:17.194320 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/ramdisk
13772 01:04:17.230310 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/kernel
13773 01:04:17.247605 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/dtb
13774 01:04:17.247875 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12571129/tftp-deploy-6oq74fuz/modules
13775 01:04:17.257712 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12571129
13776 01:04:17.373916 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12571129
13777 01:04:17.374094 Job finished correctly