Boot log: mt8183-kukui-jacuzzi-juniper-sku16

    1 20:08:47.608238  lava-dispatcher, installed at version: 2024.03
    2 20:08:47.608462  start: 0 validate
    3 20:08:47.608657  Start time: 2024-05-28 20:08:47.608649+00:00 (UTC)
    4 20:08:47.608799  Using caching service: 'http://localhost/cache/?uri=%s'
    5 20:08:47.608982  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
    6 20:08:47.869661  Using caching service: 'http://localhost/cache/?uri=%s'
    7 20:08:47.869853  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
    8 20:08:48.127540  Using caching service: 'http://localhost/cache/?uri=%s'
    9 20:08:48.127719  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
   10 20:08:48.385594  Using caching service: 'http://localhost/cache/?uri=%s'
   11 20:08:48.385764  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 20:08:48.901103  validate duration: 1.29
   14 20:08:48.901444  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 20:08:48.901560  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 20:08:48.901665  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 20:08:48.901803  Not decompressing ramdisk as can be used compressed.
   18 20:08:48.901888  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
   19 20:08:48.901952  saving as /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/ramdisk/rootfs.cpio.gz
   20 20:08:48.902016  total size: 47897469 (45 MB)
   21 20:08:48.903277  progress   0 % (0 MB)
   22 20:08:48.916454  progress   5 % (2 MB)
   23 20:08:48.929145  progress  10 % (4 MB)
   24 20:08:48.942185  progress  15 % (6 MB)
   25 20:08:48.954725  progress  20 % (9 MB)
   26 20:08:48.968084  progress  25 % (11 MB)
   27 20:08:48.980893  progress  30 % (13 MB)
   28 20:08:48.993554  progress  35 % (16 MB)
   29 20:08:49.006353  progress  40 % (18 MB)
   30 20:08:49.018913  progress  45 % (20 MB)
   31 20:08:49.031406  progress  50 % (22 MB)
   32 20:08:49.044056  progress  55 % (25 MB)
   33 20:08:49.056754  progress  60 % (27 MB)
   34 20:08:49.069437  progress  65 % (29 MB)
   35 20:08:49.082115  progress  70 % (32 MB)
   36 20:08:49.095132  progress  75 % (34 MB)
   37 20:08:49.112372  progress  80 % (36 MB)
   38 20:08:49.125324  progress  85 % (38 MB)
   39 20:08:49.138036  progress  90 % (41 MB)
   40 20:08:49.150649  progress  95 % (43 MB)
   41 20:08:49.163093  progress 100 % (45 MB)
   42 20:08:49.163405  45 MB downloaded in 0.26 s (174.76 MB/s)
   43 20:08:49.163637  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 20:08:49.163896  end: 1.1 download-retry (duration 00:00:00) [common]
   46 20:08:49.163986  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 20:08:49.164073  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 20:08:49.164215  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
   49 20:08:49.164285  saving as /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/kernel/Image
   50 20:08:49.164351  total size: 54682112 (52 MB)
   51 20:08:49.164415  No compression specified
   52 20:08:49.165634  progress   0 % (0 MB)
   53 20:08:49.180042  progress   5 % (2 MB)
   54 20:08:49.194398  progress  10 % (5 MB)
   55 20:08:49.208805  progress  15 % (7 MB)
   56 20:08:49.223085  progress  20 % (10 MB)
   57 20:08:49.237370  progress  25 % (13 MB)
   58 20:08:49.251375  progress  30 % (15 MB)
   59 20:08:49.265562  progress  35 % (18 MB)
   60 20:08:49.279577  progress  40 % (20 MB)
   61 20:08:49.293583  progress  45 % (23 MB)
   62 20:08:49.307807  progress  50 % (26 MB)
   63 20:08:49.321968  progress  55 % (28 MB)
   64 20:08:49.336238  progress  60 % (31 MB)
   65 20:08:49.350307  progress  65 % (33 MB)
   66 20:08:49.364490  progress  70 % (36 MB)
   67 20:08:49.378599  progress  75 % (39 MB)
   68 20:08:49.392831  progress  80 % (41 MB)
   69 20:08:49.406948  progress  85 % (44 MB)
   70 20:08:49.421084  progress  90 % (46 MB)
   71 20:08:49.435252  progress  95 % (49 MB)
   72 20:08:49.449051  progress 100 % (52 MB)
   73 20:08:49.449368  52 MB downloaded in 0.29 s (182.97 MB/s)
   74 20:08:49.449559  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 20:08:49.449834  end: 1.2 download-retry (duration 00:00:00) [common]
   77 20:08:49.449944  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 20:08:49.450050  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 20:08:49.450209  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   80 20:08:49.450311  saving as /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   81 20:08:49.450394  total size: 57695 (0 MB)
   82 20:08:49.450496  No compression specified
   83 20:08:49.452184  progress  56 % (0 MB)
   84 20:08:49.452502  progress 100 % (0 MB)
   85 20:08:49.452744  0 MB downloaded in 0.00 s (23.45 MB/s)
   86 20:08:49.452895  end: 1.3.1 http-download (duration 00:00:00) [common]
   88 20:08:49.453161  end: 1.3 download-retry (duration 00:00:00) [common]
   89 20:08:49.453303  start: 1.4 download-retry (timeout 00:09:59) [common]
   90 20:08:49.453408  start: 1.4.1 http-download (timeout 00:09:59) [common]
   91 20:08:49.453549  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
   92 20:08:49.453625  saving as /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/modules/modules.tar
   93 20:08:49.453711  total size: 8607916 (8 MB)
   94 20:08:49.453816  Using unxz to decompress xz
   95 20:08:49.458595  progress   0 % (0 MB)
   96 20:08:49.479900  progress   5 % (0 MB)
   97 20:08:49.505842  progress  10 % (0 MB)
   98 20:08:49.533113  progress  15 % (1 MB)
   99 20:08:49.559825  progress  20 % (1 MB)
  100 20:08:49.586551  progress  25 % (2 MB)
  101 20:08:49.612328  progress  30 % (2 MB)
  102 20:08:49.637120  progress  35 % (2 MB)
  103 20:08:49.664218  progress  40 % (3 MB)
  104 20:08:49.689991  progress  45 % (3 MB)
  105 20:08:49.715113  progress  50 % (4 MB)
  106 20:08:49.741052  progress  55 % (4 MB)
  107 20:08:49.766554  progress  60 % (4 MB)
  108 20:08:49.791436  progress  65 % (5 MB)
  109 20:08:49.819006  progress  70 % (5 MB)
  110 20:08:49.847114  progress  75 % (6 MB)
  111 20:08:49.871192  progress  80 % (6 MB)
  112 20:08:49.895745  progress  85 % (7 MB)
  113 20:08:49.920329  progress  90 % (7 MB)
  114 20:08:49.950266  progress  95 % (7 MB)
  115 20:08:49.978989  progress 100 % (8 MB)
  116 20:08:49.984774  8 MB downloaded in 0.53 s (15.46 MB/s)
  117 20:08:49.985129  end: 1.4.1 http-download (duration 00:00:01) [common]
  119 20:08:49.985553  end: 1.4 download-retry (duration 00:00:01) [common]
  120 20:08:49.985693  start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
  121 20:08:49.985825  start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
  122 20:08:49.985956  end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
  123 20:08:49.986081  start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
  124 20:08:49.986400  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt
  125 20:08:49.986590  makedir: /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin
  126 20:08:49.986741  makedir: /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/tests
  127 20:08:49.986895  makedir: /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/results
  128 20:08:49.987054  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-add-keys
  129 20:08:49.987264  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-add-sources
  130 20:08:49.987449  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-background-process-start
  131 20:08:49.987631  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-background-process-stop
  132 20:08:49.987802  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-common-functions
  133 20:08:49.987987  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-echo-ipv4
  134 20:08:49.988167  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-install-packages
  135 20:08:49.988342  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-installed-packages
  136 20:08:49.988513  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-os-build
  137 20:08:49.988691  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-probe-channel
  138 20:08:49.988869  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-probe-ip
  139 20:08:49.989038  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-target-ip
  140 20:08:49.989219  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-target-mac
  141 20:08:49.989404  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-target-storage
  142 20:08:49.989581  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-test-case
  143 20:08:49.989757  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-test-event
  144 20:08:49.989941  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-test-feedback
  145 20:08:49.990119  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-test-raise
  146 20:08:49.990289  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-test-reference
  147 20:08:49.990469  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-test-runner
  148 20:08:49.990648  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-test-set
  149 20:08:49.990822  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-test-shell
  150 20:08:49.991005  Updating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-install-packages (oe)
  151 20:08:49.991223  Updating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/bin/lava-installed-packages (oe)
  152 20:08:49.991397  Creating /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/environment
  153 20:08:49.991542  LAVA metadata
  154 20:08:49.991655  - LAVA_JOB_ID=14063044
  155 20:08:49.991749  - LAVA_DISPATCHER_IP=192.168.201.1
  156 20:08:49.991919  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  157 20:08:49.992021  skipped lava-vland-overlay
  158 20:08:49.992144  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  159 20:08:49.992265  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  160 20:08:49.992381  skipped lava-multinode-overlay
  161 20:08:49.992490  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  162 20:08:49.992615  start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
  163 20:08:49.992729  Loading test definitions
  164 20:08:49.992869  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  165 20:08:49.992981  Using /lava-14063044 at stage 0
  166 20:08:49.993452  uuid=14063044_1.5.2.3.1 testdef=None
  167 20:08:49.993576  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  168 20:08:49.993702  start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
  169 20:08:49.994454  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  171 20:08:49.994807  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  172 20:08:49.995720  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  174 20:08:49.996083  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  175 20:08:49.996977  runner path: /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/0/tests/0_igt-gpu-panfrost test_uuid 14063044_1.5.2.3.1
  176 20:08:49.997202  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  178 20:08:49.997536  Creating lava-test-runner.conf files
  179 20:08:49.997632  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14063044/lava-overlay-q8g0i7tt/lava-14063044/0 for stage 0
  180 20:08:49.997765  - 0_igt-gpu-panfrost
  181 20:08:49.997906  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  182 20:08:49.998030  start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
  183 20:08:50.007988  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  184 20:08:50.008187  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  185 20:08:50.008321  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  186 20:08:50.008456  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  187 20:08:50.008575  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  188 20:08:51.784183  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:02) [common]
  189 20:08:51.784678  start: 1.5.4 extract-modules (timeout 00:09:57) [common]
  190 20:08:51.784847  extracting modules file /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14063044/extract-overlay-ramdisk-lax0_p15/ramdisk
  191 20:08:52.021633  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  192 20:08:52.021845  start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
  193 20:08:52.021973  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14063044/compress-overlay-ijuzndmj/overlay-1.5.2.4.tar.gz to ramdisk
  194 20:08:52.022063  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14063044/compress-overlay-ijuzndmj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14063044/extract-overlay-ramdisk-lax0_p15/ramdisk
  195 20:08:52.028923  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  196 20:08:52.029051  start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
  197 20:08:52.029171  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  198 20:08:52.029332  start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
  199 20:08:52.029446  Building ramdisk /var/lib/lava/dispatcher/tmp/14063044/extract-overlay-ramdisk-lax0_p15/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14063044/extract-overlay-ramdisk-lax0_p15/ramdisk
  200 20:08:53.198377  >> 465919 blocks

  201 20:08:59.369419  rename /var/lib/lava/dispatcher/tmp/14063044/extract-overlay-ramdisk-lax0_p15/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/ramdisk/ramdisk.cpio.gz
  202 20:08:59.369863  end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
  203 20:08:59.369991  start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
  204 20:08:59.370093  start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
  205 20:08:59.370203  Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/kernel/Image']
  206 20:09:13.062160  Returned 0 in 13 seconds
  207 20:09:13.162976  mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/kernel/image.itb
  208 20:09:14.103255  output: FIT description: Kernel Image image with one or more FDT blobs
  209 20:09:14.103632  output: Created:         Tue May 28 21:09:13 2024
  210 20:09:14.103705  output:  Image 0 (kernel-1)
  211 20:09:14.103769  output:   Description:  
  212 20:09:14.103828  output:   Created:      Tue May 28 21:09:13 2024
  213 20:09:14.103889  output:   Type:         Kernel Image
  214 20:09:14.103951  output:   Compression:  lzma compressed
  215 20:09:14.104008  output:   Data Size:    13061303 Bytes = 12755.18 KiB = 12.46 MiB
  216 20:09:14.104066  output:   Architecture: AArch64
  217 20:09:14.104126  output:   OS:           Linux
  218 20:09:14.104183  output:   Load Address: 0x00000000
  219 20:09:14.104263  output:   Entry Point:  0x00000000
  220 20:09:14.104362  output:   Hash algo:    crc32
  221 20:09:14.104432  output:   Hash value:   0578ee26
  222 20:09:14.104501  output:  Image 1 (fdt-1)
  223 20:09:14.104561  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  224 20:09:14.104618  output:   Created:      Tue May 28 21:09:13 2024
  225 20:09:14.104673  output:   Type:         Flat Device Tree
  226 20:09:14.104729  output:   Compression:  uncompressed
  227 20:09:14.104783  output:   Data Size:    57695 Bytes = 56.34 KiB = 0.06 MiB
  228 20:09:14.104836  output:   Architecture: AArch64
  229 20:09:14.104889  output:   Hash algo:    crc32
  230 20:09:14.104940  output:   Hash value:   a9713552
  231 20:09:14.104992  output:  Image 2 (ramdisk-1)
  232 20:09:14.105044  output:   Description:  unavailable
  233 20:09:14.105097  output:   Created:      Tue May 28 21:09:13 2024
  234 20:09:14.105150  output:   Type:         RAMDisk Image
  235 20:09:14.105202  output:   Compression:  Unknown Compression
  236 20:09:14.105255  output:   Data Size:    60990676 Bytes = 59561.21 KiB = 58.17 MiB
  237 20:09:14.105319  output:   Architecture: AArch64
  238 20:09:14.105371  output:   OS:           Linux
  239 20:09:14.105423  output:   Load Address: unavailable
  240 20:09:14.105475  output:   Entry Point:  unavailable
  241 20:09:14.105528  output:   Hash algo:    crc32
  242 20:09:14.105579  output:   Hash value:   691f2a84
  243 20:09:14.105632  output:  Default Configuration: 'conf-1'
  244 20:09:14.105684  output:  Configuration 0 (conf-1)
  245 20:09:14.105736  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  246 20:09:14.105789  output:   Kernel:       kernel-1
  247 20:09:14.105841  output:   Init Ramdisk: ramdisk-1
  248 20:09:14.105893  output:   FDT:          fdt-1
  249 20:09:14.105945  output:   Loadables:    kernel-1
  250 20:09:14.105997  output: 
  251 20:09:14.106206  end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
  252 20:09:14.106300  end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
  253 20:09:14.106402  end: 1.5 prepare-tftp-overlay (duration 00:00:24) [common]
  254 20:09:14.106491  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
  255 20:09:14.106570  No LXC device requested
  256 20:09:14.106649  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 20:09:14.106734  start: 1.7 deploy-device-env (timeout 00:09:35) [common]
  258 20:09:14.106810  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 20:09:14.106881  Checking files for TFTP limit of 4294967296 bytes.
  260 20:09:14.107372  end: 1 tftp-deploy (duration 00:00:25) [common]
  261 20:09:14.107471  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 20:09:14.107562  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 20:09:14.107684  substitutions:
  264 20:09:14.107749  - {DTB}: 14063044/tftp-deploy-jrug4lml/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
  265 20:09:14.107814  - {INITRD}: 14063044/tftp-deploy-jrug4lml/ramdisk/ramdisk.cpio.gz
  266 20:09:14.107874  - {KERNEL}: 14063044/tftp-deploy-jrug4lml/kernel/Image
  267 20:09:14.107931  - {LAVA_MAC}: None
  268 20:09:14.107986  - {PRESEED_CONFIG}: None
  269 20:09:14.108040  - {PRESEED_LOCAL}: None
  270 20:09:14.108094  - {RAMDISK}: 14063044/tftp-deploy-jrug4lml/ramdisk/ramdisk.cpio.gz
  271 20:09:14.108149  - {ROOT_PART}: None
  272 20:09:14.108202  - {ROOT}: None
  273 20:09:14.108256  - {SERVER_IP}: 192.168.201.1
  274 20:09:14.108308  - {TEE}: None
  275 20:09:14.108361  Parsed boot commands:
  276 20:09:14.108414  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  277 20:09:14.108582  Parsed boot commands: tftpboot 192.168.201.1 14063044/tftp-deploy-jrug4lml/kernel/image.itb 14063044/tftp-deploy-jrug4lml/kernel/cmdline 
  278 20:09:14.108669  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  279 20:09:14.108753  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  280 20:09:14.108845  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  281 20:09:14.108929  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  282 20:09:14.108998  Not connected, no need to disconnect.
  283 20:09:14.109071  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  284 20:09:14.109149  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  285 20:09:14.109214  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
  286 20:09:14.113015  Setting prompt string to ['lava-test: # ']
  287 20:09:14.113424  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  288 20:09:14.113530  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  289 20:09:14.113621  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  290 20:09:14.113709  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  291 20:09:14.113893  Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-3']
  292 20:09:38.010250  Returned 0 in 23 seconds
  293 20:09:38.111364  end: 2.2.2.1 pdu-reboot (duration 00:00:24) [common]
  295 20:09:38.114997  end: 2.2.2 reset-device (duration 00:00:24) [common]
  296 20:09:38.115847  start: 2.2.3 depthcharge-start (timeout 00:04:36) [common]
  297 20:09:38.116509  Setting prompt string to 'Starting depthcharge on Juniper...'
  298 20:09:38.116890  Changing prompt to 'Starting depthcharge on Juniper...'
  299 20:09:38.117251  depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
  300 20:09:38.120005  [Enter `^Ec?' for help]

  301 20:09:38.120585  [DL] 00000000 00000000 010701

  302 20:09:38.121064  

  303 20:09:38.121502  

  304 20:09:38.121931  F0: 102B 0000

  305 20:09:38.122476  

  306 20:09:38.123081  F3: 1006 0033 [0200]

  307 20:09:38.123694  

  308 20:09:38.124172  F3: 4001 00E0 [0200]

  309 20:09:38.124625  

  310 20:09:38.125063  F3: 0000 0000

  311 20:09:38.125478  

  312 20:09:38.125775  V0: 0000 0000 [0001]

  313 20:09:38.126061  

  314 20:09:38.126340  00: 1027 0002

  315 20:09:38.126639  

  316 20:09:38.126920  01: 0000 0000

  317 20:09:38.127203  

  318 20:09:38.127480  BP: 0C00 0251 [0000]

  319 20:09:38.127760  

  320 20:09:38.128034  G0: 1182 0000

  321 20:09:38.128309  

  322 20:09:38.128581  EC: 0004 0000 [0001]

  323 20:09:38.128855  

  324 20:09:38.129125  S7: 0000 0000 [0000]

  325 20:09:38.129451  

  326 20:09:38.129729  CC: 0000 0000 [0001]

  327 20:09:38.130002  

  328 20:09:38.130274  T0: 0000 00DB [000F]

  329 20:09:38.130550  

  330 20:09:38.130820  Jump to BL

  331 20:09:38.131094  

  332 20:09:38.131366  


  333 20:09:38.131638  

  334 20:09:38.131910  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...

  335 20:09:38.132201  ARM64: Exception handlers installed.

  336 20:09:38.132481  ARM64: Testing exception

  337 20:09:38.132751  ARM64: Done test exception

  338 20:09:38.133021  WDT: Last reset was cold boot

  339 20:09:38.133389  SPI0(PAD0) initialized at 992727 Hz

  340 20:09:38.133712  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

  341 20:09:38.134211  Manufacturer: ef

  342 20:09:38.134806  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  343 20:09:38.135386  Probing TPM: . done!

  344 20:09:38.135859  TPM ready after 0 ms

  345 20:09:38.136311  Connected to device vid:did:rid of 1ae0:0028:00

  346 20:09:38.136755  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c

  347 20:09:38.137194  Initialized TPM device CR50 revision 0

  348 20:09:38.137545  tlcl_send_startup: Startup return code is 0

  349 20:09:38.137834  TPM: setup succeeded

  350 20:09:38.138177  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  351 20:09:38.138550  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  352 20:09:38.138775  in-header: 03 19 00 00 08 00 00 00 

  353 20:09:38.139002  in-data: a2 e0 47 00 13 00 00 00 

  354 20:09:38.139394  Chrome EC: UHEPI supported

  355 20:09:38.139776  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  356 20:09:38.140107  in-header: 03 a1 00 00 08 00 00 00 

  357 20:09:38.140390  in-data: 84 60 60 10 00 00 00 00 

  358 20:09:38.140603  Phase 1

  359 20:09:38.140803  FMAP: area GBB found @ 3f5000 (12032 bytes)

  360 20:09:38.141082  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  361 20:09:38.141407  VB2:vb2_check_recovery() Recovery was requested manually

  362 20:09:38.141692  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0

  363 20:09:38.142001  Recovery requested (1009000e)

  364 20:09:38.142303  tlcl_extend: response is 0

  365 20:09:38.142612  tlcl_extend: response is 0

  366 20:09:38.142920  

  367 20:09:38.143215  

  368 20:09:38.143471  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...

  369 20:09:38.143714  ARM64: Exception handlers installed.

  370 20:09:38.143947  ARM64: Testing exception

  371 20:09:38.144174  ARM64: Done test exception

  372 20:09:38.144404  [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x200b

  373 20:09:38.144634  [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2

  374 20:09:38.144863  [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a

  375 20:09:38.145092  [RTC]rtc_get_frequency_meter,134: input=0xf, output=864

  376 20:09:38.145323  [RTC]rtc_get_frequency_meter,134: input=0x7, output=733

  377 20:09:38.145478  [RTC]rtc_get_frequency_meter,134: input=0xb, output=799

  378 20:09:38.145628  [RTC]rtc_get_frequency_meter,134: input=0x9, output=766

  379 20:09:38.145776  [RTC]rtc_get_frequency_meter,134: input=0xa, output=782

  380 20:09:38.145925  [RTC]rtc_get_frequency_meter,134: input=0xa, output=781

  381 20:09:38.146072  [RTC]rtc_get_frequency_meter,134: input=0xb, output=796

  382 20:09:38.146220  [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b

  383 20:09:38.146368  [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482

  384 20:09:38.146516  [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1

  385 20:09:38.146662  [RTC]rtc_bbpu_power_on,376: done BBPU=0x9

  386 20:09:38.146810  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  387 20:09:38.146957  in-header: 03 19 00 00 08 00 00 00 

  388 20:09:38.147105  in-data: a2 e0 47 00 13 00 00 00 

  389 20:09:38.147250  Chrome EC: UHEPI supported

  390 20:09:38.147396  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  391 20:09:38.147572  in-header: 03 a1 00 00 08 00 00 00 

  392 20:09:38.147804  in-data: 84 60 60 10 00 00 00 00 

  393 20:09:38.147989  Skip loading cached calibration data

  394 20:09:38.148143  out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00 

  395 20:09:38.148294  in-header: 03 a1 00 00 08 00 00 00 

  396 20:09:38.148413  in-data: 84 60 60 10 00 00 00 00 

  397 20:09:38.148531  out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10 

  398 20:09:38.148650  in-header: 03 a1 00 00 08 00 00 00 

  399 20:09:38.148767  in-data: 84 60 60 10 00 00 00 00 

  400 20:09:38.148884  ADC[3]: Raw value=1035697 ID=8

  401 20:09:38.149002  Manufacturer: ef

  402 20:09:38.149119  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  403 20:09:38.149237  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  404 20:09:38.149392  CBFS @ 21000 size 3d4000

  405 20:09:38.149512  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  406 20:09:38.149632  CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'

  407 20:09:38.149852  CBFS: Found @ offset 3c880 size 4b

  408 20:09:38.150079  DRAM-K: Full Calibration

  409 20:09:38.150302  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  410 20:09:38.150527  CBFS @ 21000 size 3d4000

  411 20:09:38.150723  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  412 20:09:38.150912  CBFS: Locating 'fallback/dram'

  413 20:09:38.151104  CBFS: Found @ offset 24b00 size 12268

  414 20:09:38.151292  read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps

  415 20:09:38.151481  ddr_geometry: 1, config: 0x0

  416 20:09:38.151668  header.status = 0x0

  417 20:09:38.151863  header.magic = 0x44524d4b (expected: 0x44524d4b)

  418 20:09:38.152051  header.version = 0x5 (expected: 0x5)

  419 20:09:38.152485  header.size = 0x8f0 (expected: 0x8f0)

  420 20:09:38.152790  header.config = 0x0

  421 20:09:38.153075  header.flags = 0x0

  422 20:09:38.153381  header.checksum = 0x0

  423 20:09:38.153613  dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5

  424 20:09:38.153727  Set DRAM voltage: vdram1 = 1125000, vddq = 600000

  425 20:09:38.153833  Get DRAM voltage to vdram1 = 1125000, vddq = 600000

  426 20:09:38.153937  ddr_geometry:1

  427 20:09:38.154038  [EMI] new MDL number = 1

  428 20:09:38.154139  dram_cbt_mode_extern: 0

  429 20:09:38.154244  dram_cbt_mode [RK0]: 0, [RK1]: 0

  430 20:09:38.154392  Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]

  431 20:09:38.154539  

  432 20:09:38.154694  

  433 20:09:38.154848  [Bianco] ETT version 0.0.0.1

  434 20:09:38.155002   dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6

  435 20:09:38.155156  

  436 20:09:38.155319  vSetVcoreByFreq with vcore:762500, freq=1600

  437 20:09:38.155478  

  438 20:09:38.155634  [DramcInit]

  439 20:09:38.155787  AutoRefreshCKEOff AutoREF OFF

  440 20:09:38.155941  DDRPhyPLLSetting-CKEOFF

  441 20:09:38.156095  DDRPhyPLLSetting-CKEON

  442 20:09:38.156246  

  443 20:09:38.156398  Enable WDQS

  444 20:09:38.156551  [ModeRegInit_LP4] CH0 RK0

  445 20:09:38.156705  Write Rank0 MR13 =0x18

  446 20:09:38.156858  Write Rank0 MR12 =0x5d

  447 20:09:38.157010  Write Rank0 MR1 =0x56

  448 20:09:38.157162  Write Rank0 MR2 =0x1a

  449 20:09:38.157327  Write Rank0 MR11 =0x0

  450 20:09:38.157430  Write Rank0 MR22 =0x38

  451 20:09:38.157529  Write Rank0 MR14 =0x5d

  452 20:09:38.157628  Write Rank0 MR3 =0x30

  453 20:09:38.157728  Write Rank0 MR13 =0x58

  454 20:09:38.157827  Write Rank0 MR12 =0x5d

  455 20:09:38.157925  Write Rank0 MR1 =0x56

  456 20:09:38.158023  Write Rank0 MR2 =0x2d

  457 20:09:38.158124  Write Rank0 MR11 =0x23

  458 20:09:38.158223  Write Rank0 MR22 =0x34

  459 20:09:38.158325  Write Rank0 MR14 =0x10

  460 20:09:38.158409  Write Rank0 MR3 =0x30

  461 20:09:38.158493  Write Rank0 MR13 =0xd8

  462 20:09:38.158578  [ModeRegInit_LP4] CH0 RK1

  463 20:09:38.158662  Write Rank1 MR13 =0x18

  464 20:09:38.158747  Write Rank1 MR12 =0x5d

  465 20:09:38.158830  Write Rank1 MR1 =0x56

  466 20:09:38.158915  Write Rank1 MR2 =0x1a

  467 20:09:38.158999  Write Rank1 MR11 =0x0

  468 20:09:38.159083  Write Rank1 MR22 =0x38

  469 20:09:38.159167  Write Rank1 MR14 =0x5d

  470 20:09:38.159250  Write Rank1 MR3 =0x30

  471 20:09:38.159334  Write Rank1 MR13 =0x58

  472 20:09:38.159417  Write Rank1 MR12 =0x5d

  473 20:09:38.159501  Write Rank1 MR1 =0x56

  474 20:09:38.159583  Write Rank1 MR2 =0x2d

  475 20:09:38.159667  Write Rank1 MR11 =0x23

  476 20:09:38.159750  Write Rank1 MR22 =0x34

  477 20:09:38.159833  Write Rank1 MR14 =0x10

  478 20:09:38.159917  Write Rank1 MR3 =0x30

  479 20:09:38.160000  Write Rank1 MR13 =0xd8

  480 20:09:38.160084  [ModeRegInit_LP4] CH1 RK0

  481 20:09:38.160167  Write Rank0 MR13 =0x18

  482 20:09:38.160252  Write Rank0 MR12 =0x5d

  483 20:09:38.160336  Write Rank0 MR1 =0x56

  484 20:09:38.160419  Write Rank0 MR2 =0x1a

  485 20:09:38.160503  Write Rank0 MR11 =0x0

  486 20:09:38.160587  Write Rank0 MR22 =0x38

  487 20:09:38.160671  Write Rank0 MR14 =0x5d

  488 20:09:38.160756  Write Rank0 MR3 =0x30

  489 20:09:38.160893  Write Rank0 MR13 =0x58

  490 20:09:38.161026  Write Rank0 MR12 =0x5d

  491 20:09:38.161157  Write Rank0 MR1 =0x56

  492 20:09:38.161290  Write Rank0 MR2 =0x2d

  493 20:09:38.161380  Write Rank0 MR11 =0x23

  494 20:09:38.161464  Write Rank0 MR22 =0x34

  495 20:09:38.161550  Write Rank0 MR14 =0x10

  496 20:09:38.161634  Write Rank0 MR3 =0x30

  497 20:09:38.161726  Write Rank0 MR13 =0xd8

  498 20:09:38.161847  [ModeRegInit_LP4] CH1 RK1

  499 20:09:38.161942  Write Rank1 MR13 =0x18

  500 20:09:38.162028  Write Rank1 MR12 =0x5d

  501 20:09:38.162114  Write Rank1 MR1 =0x56

  502 20:09:38.162217  Write Rank1 MR2 =0x1a

  503 20:09:38.162358  Write Rank1 MR11 =0x0

  504 20:09:38.162510  Write Rank1 MR22 =0x38

  505 20:09:38.162668  Write Rank1 MR14 =0x5d

  506 20:09:38.162821  Write Rank1 MR3 =0x30

  507 20:09:38.162970  Write Rank1 MR13 =0x58

  508 20:09:38.163105  Write Rank1 MR12 =0x5d

  509 20:09:38.163252  Write Rank1 MR1 =0x56

  510 20:09:38.163380  Write Rank1 MR2 =0x2d

  511 20:09:38.163496  Write Rank1 MR11 =0x23

  512 20:09:38.163622  Write Rank1 MR22 =0x34

  513 20:09:38.163757  Write Rank1 MR14 =0x10

  514 20:09:38.163874  Write Rank1 MR3 =0x30

  515 20:09:38.164011  Write Rank1 MR13 =0xd8

  516 20:09:38.164132  match AC timing 3

  517 20:09:38.164263  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  518 20:09:38.164383  [MiockJmeterHQA]

  519 20:09:38.164462  vSetVcoreByFreq with vcore:762500, freq=1600

  520 20:09:38.164539  

  521 20:09:38.164615  	MIOCK jitter meter	ch=0

  522 20:09:38.164691  

  523 20:09:38.164765  1T = (100-18) = 82 dly cells

  524 20:09:38.164868  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps

  525 20:09:38.164985  vSetVcoreByFreq with vcore:725000, freq=1200

  526 20:09:38.165106  

  527 20:09:38.165225  	MIOCK jitter meter	ch=0

  528 20:09:38.165325  

  529 20:09:38.165412  1T = (95-17) = 78 dly cells

  530 20:09:38.165532  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps

  531 20:09:38.165651  vSetVcoreByFreq with vcore:725000, freq=800

  532 20:09:38.165766  

  533 20:09:38.165884  	MIOCK jitter meter	ch=0

  534 20:09:38.166000  

  535 20:09:38.166115  1T = (95-17) = 78 dly cells

  536 20:09:38.166235  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps

  537 20:09:38.166354  vSetVcoreByFreq with vcore:762500, freq=1600

  538 20:09:38.166471  vSetVcoreByFreq with vcore:762500, freq=1600

  539 20:09:38.166589  

  540 20:09:38.166711  	K DRVP

  541 20:09:38.166829  1. OCD DRVP=0 CALOUT=0

  542 20:09:38.166949  1. OCD DRVP=1 CALOUT=0

  543 20:09:38.167069  1. OCD DRVP=2 CALOUT=0

  544 20:09:38.167188  1. OCD DRVP=3 CALOUT=0

  545 20:09:38.167307  1. OCD DRVP=4 CALOUT=0

  546 20:09:38.167425  1. OCD DRVP=5 CALOUT=0

  547 20:09:38.167545  1. OCD DRVP=6 CALOUT=0

  548 20:09:38.167664  1. OCD DRVP=7 CALOUT=0

  549 20:09:38.167783  1. OCD DRVP=8 CALOUT=0

  550 20:09:38.167901  1. OCD DRVP=9 CALOUT=1

  551 20:09:38.168018  

  552 20:09:38.168133  1. OCD DRVP calibration OK! DRVP=9

  553 20:09:38.168262  

  554 20:09:38.168364  

  555 20:09:38.168461  

  556 20:09:38.168529  	K ODTN

  557 20:09:38.168595  3. OCD ODTN=0 ,CALOUT=1

  558 20:09:38.168673  3. OCD ODTN=1 ,CALOUT=1

  559 20:09:38.168742  3. OCD ODTN=2 ,CALOUT=1

  560 20:09:38.168812  3. OCD ODTN=3 ,CALOUT=1

  561 20:09:38.168918  3. OCD ODTN=4 ,CALOUT=1

  562 20:09:38.169023  3. OCD ODTN=5 ,CALOUT=1

  563 20:09:38.169128  3. OCD ODTN=6 ,CALOUT=1

  564 20:09:38.169233  3. OCD ODTN=7 ,CALOUT=0

  565 20:09:38.169325  

  566 20:09:38.169393  3. OCD ODTN calibration OK! ODTN=7

  567 20:09:38.169463  

  568 20:09:38.169530  [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7

  569 20:09:38.169596  term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15

  570 20:09:38.169666  term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)

  571 20:09:38.169733  

  572 20:09:38.169798  	K DRVP

  573 20:09:38.169869  1. OCD DRVP=0 CALOUT=0

  574 20:09:38.169937  1. OCD DRVP=1 CALOUT=0

  575 20:09:38.170004  1. OCD DRVP=2 CALOUT=0

  576 20:09:38.170107  1. OCD DRVP=3 CALOUT=0

  577 20:09:38.170212  1. OCD DRVP=4 CALOUT=0

  578 20:09:38.170317  1. OCD DRVP=5 CALOUT=0

  579 20:09:38.170422  1. OCD DRVP=6 CALOUT=0

  580 20:09:38.170527  1. OCD DRVP=7 CALOUT=0

  581 20:09:38.170634  1. OCD DRVP=8 CALOUT=0

  582 20:09:38.170740  1. OCD DRVP=9 CALOUT=0

  583 20:09:38.171013  1. OCD DRVP=10 CALOUT=1

  584 20:09:38.171126  

  585 20:09:38.171232  1. OCD DRVP calibration OK! DRVP=10

  586 20:09:38.171338  

  587 20:09:38.171440  

  588 20:09:38.171542  

  589 20:09:38.171644  	K ODTN

  590 20:09:38.171747  3. OCD ODTN=0 ,CALOUT=1

  591 20:09:38.171854  3. OCD ODTN=1 ,CALOUT=1

  592 20:09:38.171960  3. OCD ODTN=2 ,CALOUT=1

  593 20:09:38.172068  3. OCD ODTN=3 ,CALOUT=1

  594 20:09:38.172173  3. OCD ODTN=4 ,CALOUT=1

  595 20:09:38.172280  3. OCD ODTN=5 ,CALOUT=1

  596 20:09:38.172386  3. OCD ODTN=6 ,CALOUT=1

  597 20:09:38.172491  3. OCD ODTN=7 ,CALOUT=1

  598 20:09:38.172597  3. OCD ODTN=8 ,CALOUT=1

  599 20:09:38.172702  3. OCD ODTN=9 ,CALOUT=1

  600 20:09:38.172807  3. OCD ODTN=10 ,CALOUT=1

  601 20:09:38.172913  3. OCD ODTN=11 ,CALOUT=1

  602 20:09:38.173018  3. OCD ODTN=12 ,CALOUT=1

  603 20:09:38.173123  3. OCD ODTN=13 ,CALOUT=1

  604 20:09:38.173228  3. OCD ODTN=14 ,CALOUT=0

  605 20:09:38.173320  

  606 20:09:38.173381  3. OCD ODTN calibration OK! ODTN=14

  607 20:09:38.173442  

  608 20:09:38.173502  [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14

  609 20:09:38.173562  term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14

  610 20:09:38.173622  term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)

  611 20:09:38.173682  

  612 20:09:38.173742  [DramcInit]

  613 20:09:38.173801  AutoRefreshCKEOff AutoREF OFF

  614 20:09:38.173861  DDRPhyPLLSetting-CKEOFF

  615 20:09:38.173920  DDRPhyPLLSetting-CKEON

  616 20:09:38.173978  

  617 20:09:38.174037  Enable WDQS

  618 20:09:38.174096  ==

  619 20:09:38.174155  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  620 20:09:38.174215  fsp= 1, odt_onoff= 1, Byte mode= 0

  621 20:09:38.174276  ==

  622 20:09:38.174335  [Duty_Offset_Calibration]

  623 20:09:38.174394  

  624 20:09:38.174453  ===========================

  625 20:09:38.174512  	B0:0	B1:1	CA:1

  626 20:09:38.174571  ==

  627 20:09:38.174631  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

  628 20:09:38.174690  fsp= 1, odt_onoff= 1, Byte mode= 0

  629 20:09:38.174770  ==

  630 20:09:38.174832  [Duty_Offset_Calibration]

  631 20:09:38.174892  

  632 20:09:38.174951  ===========================

  633 20:09:38.175011  	B0:1	B1:1	CA:0

  634 20:09:38.175070  [ModeRegInit_LP4] CH0 RK0

  635 20:09:38.175129  Write Rank0 MR13 =0x18

  636 20:09:38.175188  Write Rank0 MR12 =0x5d

  637 20:09:38.175247  Write Rank0 MR1 =0x56

  638 20:09:38.175306  Write Rank0 MR2 =0x1a

  639 20:09:38.175364  Write Rank0 MR11 =0x0

  640 20:09:38.175423  Write Rank0 MR22 =0x38

  641 20:09:38.175482  Write Rank0 MR14 =0x5d

  642 20:09:38.175540  Write Rank0 MR3 =0x30

  643 20:09:38.175599  Write Rank0 MR13 =0x58

  644 20:09:38.175658  Write Rank0 MR12 =0x5d

  645 20:09:38.175717  Write Rank0 MR1 =0x56

  646 20:09:38.175775  Write Rank0 MR2 =0x2d

  647 20:09:38.175834  Write Rank0 MR11 =0x23

  648 20:09:38.175893  Write Rank0 MR22 =0x34

  649 20:09:38.175952  Write Rank0 MR14 =0x10

  650 20:09:38.176010  Write Rank0 MR3 =0x30

  651 20:09:38.176069  Write Rank0 MR13 =0xd8

  652 20:09:38.176127  [ModeRegInit_LP4] CH0 RK1

  653 20:09:38.176186  Write Rank1 MR13 =0x18

  654 20:09:38.176244  Write Rank1 MR12 =0x5d

  655 20:09:38.176303  Write Rank1 MR1 =0x56

  656 20:09:38.176362  Write Rank1 MR2 =0x1a

  657 20:09:38.176421  Write Rank1 MR11 =0x0

  658 20:09:38.176480  Write Rank1 MR22 =0x38

  659 20:09:38.176539  Write Rank1 MR14 =0x5d

  660 20:09:38.176598  Write Rank1 MR3 =0x30

  661 20:09:38.176657  Write Rank1 MR13 =0x58

  662 20:09:38.176715  Write Rank1 MR12 =0x5d

  663 20:09:38.176800  Write Rank1 MR1 =0x56

  664 20:09:38.176894  Write Rank1 MR2 =0x2d

  665 20:09:38.176986  Write Rank1 MR11 =0x23

  666 20:09:38.177079  Write Rank1 MR22 =0x34

  667 20:09:38.177171  Write Rank1 MR14 =0x10

  668 20:09:38.177269  Write Rank1 MR3 =0x30

  669 20:09:38.177333  Write Rank1 MR13 =0xd8

  670 20:09:38.177392  [ModeRegInit_LP4] CH1 RK0

  671 20:09:38.177451  Write Rank0 MR13 =0x18

  672 20:09:38.177510  Write Rank0 MR12 =0x5d

  673 20:09:38.177569  Write Rank0 MR1 =0x56

  674 20:09:38.177628  Write Rank0 MR2 =0x1a

  675 20:09:38.177687  Write Rank0 MR11 =0x0

  676 20:09:38.177746  Write Rank0 MR22 =0x38

  677 20:09:38.177805  Write Rank0 MR14 =0x5d

  678 20:09:38.177864  Write Rank0 MR3 =0x30

  679 20:09:38.177922  Write Rank0 MR13 =0x58

  680 20:09:38.177981  Write Rank0 MR12 =0x5d

  681 20:09:38.178040  Write Rank0 MR1 =0x56

  682 20:09:38.178098  Write Rank0 MR2 =0x2d

  683 20:09:38.178157  Write Rank0 MR11 =0x23

  684 20:09:38.178216  Write Rank0 MR22 =0x34

  685 20:09:38.178283  Write Rank0 MR14 =0x10

  686 20:09:38.178337  Write Rank0 MR3 =0x30

  687 20:09:38.178390  Write Rank0 MR13 =0xd8

  688 20:09:38.178444  [ModeRegInit_LP4] CH1 RK1

  689 20:09:38.178497  Write Rank1 MR13 =0x18

  690 20:09:38.178550  Write Rank1 MR12 =0x5d

  691 20:09:38.178604  Write Rank1 MR1 =0x56

  692 20:09:38.178657  Write Rank1 MR2 =0x1a

  693 20:09:38.178710  Write Rank1 MR11 =0x0

  694 20:09:38.178763  Write Rank1 MR22 =0x38

  695 20:09:38.178838  Write Rank1 MR14 =0x5d

  696 20:09:38.178909  Write Rank1 MR3 =0x30

  697 20:09:38.178990  Write Rank1 MR13 =0x58

  698 20:09:38.179046  Write Rank1 MR12 =0x5d

  699 20:09:38.179100  Write Rank1 MR1 =0x56

  700 20:09:38.179154  Write Rank1 MR2 =0x2d

  701 20:09:38.179208  Write Rank1 MR11 =0x23

  702 20:09:38.179262  Write Rank1 MR22 =0x34

  703 20:09:38.179315  Write Rank1 MR14 =0x10

  704 20:09:38.179369  Write Rank1 MR3 =0x30

  705 20:09:38.179422  Write Rank1 MR13 =0xd8

  706 20:09:38.179476  match AC timing 3

  707 20:09:38.179530  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  708 20:09:38.179585  DramC Write-DBI off

  709 20:09:38.179639  DramC Read-DBI off

  710 20:09:38.179693  Write Rank0 MR13 =0x59

  711 20:09:38.179747  ==

  712 20:09:38.179801  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  713 20:09:38.179856  fsp= 1, odt_onoff= 1, Byte mode= 0

  714 20:09:38.179911  ==

  715 20:09:38.179965  === u2Vref_new: 0x56 --> 0x2d

  716 20:09:38.180026  === u2Vref_new: 0x58 --> 0x38

  717 20:09:38.180085  === u2Vref_new: 0x5a --> 0x39

  718 20:09:38.180139  === u2Vref_new: 0x5c --> 0x3c

  719 20:09:38.180193  === u2Vref_new: 0x5e --> 0x3d

  720 20:09:38.180251  === u2Vref_new: 0x60 --> 0xa0

  721 20:09:38.180305  

  722 20:09:38.180360  CBT Vref found, early break!

  723 20:09:38.180413  [CA 0] Center 33 (4~63) winsize 60

  724 20:09:38.180467  [CA 1] Center 34 (5~63) winsize 59

  725 20:09:38.180521  [CA 2] Center 28 (0~57) winsize 58

  726 20:09:38.180575  [CA 3] Center 24 (-3~51) winsize 55

  727 20:09:38.180629  [CA 4] Center 25 (-2~52) winsize 55

  728 20:09:38.180684  [CA 5] Center 30 (2~58) winsize 57

  729 20:09:38.180737  

  730 20:09:38.180791  [CATrainingPosCal] consider 1 rank data

  731 20:09:38.180845  u2DelayCellTimex100 = 762/100 ps

  732 20:09:38.180899  CA0 delay=33 (4~63),Diff = 9 PI (11 cell)

  733 20:09:38.180953  CA1 delay=34 (5~63),Diff = 10 PI (12 cell)

  734 20:09:38.181008  CA2 delay=28 (0~57),Diff = 4 PI (5 cell)

  735 20:09:38.181062  CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)

  736 20:09:38.181116  CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)

  737 20:09:38.181170  CA5 delay=30 (2~58),Diff = 6 PI (7 cell)

  738 20:09:38.181224  

  739 20:09:38.181286  CA PerBit enable=1, Macro0, CA PI delay=24

  740 20:09:38.181342  === u2Vref_new: 0x56 --> 0x2d

  741 20:09:38.181397  

  742 20:09:38.181452  Vref(ca) range 1: 22

  743 20:09:38.181506  

  744 20:09:38.181560  CS Dly= 10 (41-0-32)

  745 20:09:38.181614  Write Rank0 MR13 =0xd8

  746 20:09:38.181667  Write Rank0 MR13 =0xd8

  747 20:09:38.181721  Write Rank0 MR12 =0x56

  748 20:09:38.181978  Write Rank1 MR13 =0x59

  749 20:09:38.182116  ==

  750 20:09:38.182251  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

  751 20:09:38.182384  fsp= 1, odt_onoff= 1, Byte mode= 0

  752 20:09:38.182516  ==

  753 20:09:38.182650  === u2Vref_new: 0x56 --> 0x2d

  754 20:09:38.182783  === u2Vref_new: 0x58 --> 0x38

  755 20:09:38.182915  === u2Vref_new: 0x5a --> 0x39

  756 20:09:38.183048  === u2Vref_new: 0x5c --> 0x3c

  757 20:09:38.183140  === u2Vref_new: 0x5e --> 0x3d

  758 20:09:38.183199  === u2Vref_new: 0x60 --> 0xa0

  759 20:09:38.183267  [CA 0] Center 34 (5~63) winsize 59

  760 20:09:38.183321  [CA 1] Center 34 (6~63) winsize 58

  761 20:09:38.183375  [CA 2] Center 29 (0~58) winsize 59

  762 20:09:38.183428  [CA 3] Center 23 (-4~51) winsize 56

  763 20:09:38.183481  [CA 4] Center 24 (-3~51) winsize 55

  764 20:09:38.183534  [CA 5] Center 30 (1~59) winsize 59

  765 20:09:38.183586  

  766 20:09:38.183640  [CATrainingPosCal] consider 2 rank data

  767 20:09:38.183693  u2DelayCellTimex100 = 762/100 ps

  768 20:09:38.183746  CA0 delay=34 (5~63),Diff = 10 PI (12 cell)

  769 20:09:38.183802  CA1 delay=34 (6~63),Diff = 10 PI (12 cell)

  770 20:09:38.183860  CA2 delay=28 (0~57),Diff = 4 PI (5 cell)

  771 20:09:38.183915  CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)

  772 20:09:38.183970  CA4 delay=24 (-2~51),Diff = 0 PI (0 cell)

  773 20:09:38.184024  CA5 delay=30 (2~58),Diff = 6 PI (7 cell)

  774 20:09:38.184081  

  775 20:09:38.184140  CA PerBit enable=1, Macro0, CA PI delay=24

  776 20:09:38.184195  === u2Vref_new: 0x56 --> 0x2d

  777 20:09:38.184249  

  778 20:09:38.184302  Vref(ca) range 1: 22

  779 20:09:38.184355  

  780 20:09:38.184407  CS Dly= 11 (42-0-32)

  781 20:09:38.184459  Write Rank1 MR13 =0xd8

  782 20:09:38.184512  Write Rank1 MR13 =0xd8

  783 20:09:38.184564  Write Rank1 MR12 =0x56

  784 20:09:38.184617  [RankSwap] Rank num 2, (Multi 1), Rank 0

  785 20:09:38.184670  Write Rank0 MR2 =0xad

  786 20:09:38.184723  [Write Leveling]

  787 20:09:38.184776  delay  byte0  byte1  byte2  byte3

  788 20:09:38.184828  

  789 20:09:38.184880  10    0   0   

  790 20:09:38.184948  11    0   0   

  791 20:09:38.185034  12    0   0   

  792 20:09:38.185118  13    0   0   

  793 20:09:38.185202  14    0   0   

  794 20:09:38.185313  15    0   0   

  795 20:09:38.185414  16    0   0   

  796 20:09:38.185499  17    0   0   

  797 20:09:38.185583  18    0   0   

  798 20:09:38.185664  19    0   0   

  799 20:09:38.185719  20    0   0   

  800 20:09:38.185774  21    0   0   

  801 20:09:38.185827  22    0   0   

  802 20:09:38.185881  23    0   0   

  803 20:09:38.185934  24    0   0   

  804 20:09:38.185987  25    0   0   

  805 20:09:38.186040  26    0   ff   

  806 20:09:38.186093  27    0   ff   

  807 20:09:38.186147  28    0   ff   

  808 20:09:38.186200  29    0   ff   

  809 20:09:38.186253  30    0   ff   

  810 20:09:38.186306  31    0   ff   

  811 20:09:38.186360  32    0   ff   

  812 20:09:38.186413  33    ff   ff   

  813 20:09:38.186467  34    ff   ff   

  814 20:09:38.186519  35    ff   ff   

  815 20:09:38.186572  36    ff   ff   

  816 20:09:38.186626  37    ff   ff   

  817 20:09:38.186679  38    ff   ff   

  818 20:09:38.186733  39    ff   ff   

  819 20:09:38.186787  pass bytecount = 0xff (0xff: all bytes pass) 

  820 20:09:38.186840  

  821 20:09:38.186893  DQS0 dly: 33

  822 20:09:38.186945  DQS1 dly: 26

  823 20:09:38.186998  Write Rank0 MR2 =0x2d

  824 20:09:38.187050  [RankSwap] Rank num 2, (Multi 1), Rank 0

  825 20:09:38.187104  Write Rank0 MR1 =0xd6

  826 20:09:38.187156  [Gating]

  827 20:09:38.187209  ==

  828 20:09:38.187261  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  829 20:09:38.187314  fsp= 1, odt_onoff= 1, Byte mode= 0

  830 20:09:38.187368  ==

  831 20:09:38.187421  3 1 0 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  832 20:09:38.187475  3 1 4 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  833 20:09:38.187529  3 1 8 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  834 20:09:38.187583  3 1 12 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  835 20:09:38.187637  3 1 16 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  836 20:09:38.187691  3 1 20 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  837 20:09:38.187745  3 1 24 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  838 20:09:38.187799  3 1 28 |2c2c 2c2b  |(11 0)(11 11) |(0 0)(1 0)| 0

  839 20:09:38.187852  3 2 0 |2d2d 2c2c  |(11 11)(11 10) |(0 0)(0 0)| 0

  840 20:09:38.187906  3 2 4 |3534 404  |(11 11)(11 11) |(0 0)(0 0)| 0

  841 20:09:38.187960  3 2 8 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  842 20:09:38.188014  3 2 12 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  843 20:09:38.188068  3 2 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  844 20:09:38.188122  3 2 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  845 20:09:38.188175  3 2 24 |3534 3534  |(11 11)(11 11) |(0 0)(1 1)| 0

  846 20:09:38.188229  3 2 28 |3534 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

  847 20:09:38.188282  3 3 0 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  848 20:09:38.188336  3 3 4 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  849 20:09:38.188390  3 3 8 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  850 20:09:38.188444  3 3 12 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  851 20:09:38.188497  3 3 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  852 20:09:38.188551  3 3 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  853 20:09:38.188604  3 3 24 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  854 20:09:38.188658  3 3 28 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  855 20:09:38.188711  3 4 0 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

  856 20:09:38.188765  3 4 4 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  857 20:09:38.188818  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  858 20:09:38.188872  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  859 20:09:38.188926  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  860 20:09:38.188979  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  861 20:09:38.189033  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  862 20:09:38.189087  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  863 20:09:38.189141  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  864 20:09:38.189195  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  865 20:09:38.189248  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  866 20:09:38.189341  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  867 20:09:38.189396  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  868 20:09:38.189450  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  869 20:09:38.189503  [Byte 0] Lead/lag falling Transition (3, 5, 20)

  870 20:09:38.189556  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

  871 20:09:38.189610  [Byte 0] Lead/lag Transition tap number (2)

  872 20:09:38.189663  [Byte 1] Lead/lag falling Transition (3, 5, 24)

  873 20:09:38.189908  3 5 28 |3e3d 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

  874 20:09:38.189969  [Byte 1] Lead/lag Transition tap number (2)

  875 20:09:38.190024  3 6 0 |202 3d3d  |(1 1)(11 11) |(0 0)(0 0)| 0

  876 20:09:38.190078  3 6 4 |4646 403  |(0 0)(11 11) |(0 0)(0 0)| 0

  877 20:09:38.190133  [Byte 0]First pass (3, 6, 4)

  878 20:09:38.190186  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  879 20:09:38.190240  [Byte 1]First pass (3, 6, 8)

  880 20:09:38.190293  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  881 20:09:38.190347  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  882 20:09:38.190400  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  883 20:09:38.190454  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  884 20:09:38.190508  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  885 20:09:38.190562  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  886 20:09:38.190616  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  887 20:09:38.190669  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  888 20:09:38.190723  All bytes gating window > 1UI, Early break!

  889 20:09:38.190776  

  890 20:09:38.190828  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)

  891 20:09:38.190881  

  892 20:09:38.190934  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)

  893 20:09:38.190986  

  894 20:09:38.191038  

  895 20:09:38.191091  

  896 20:09:38.191143  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)

  897 20:09:38.191196  

  898 20:09:38.191248  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)

  899 20:09:38.191301  

  900 20:09:38.191353  

  901 20:09:38.191405  Write Rank0 MR1 =0x56

  902 20:09:38.191458  

  903 20:09:38.191510  best RODT dly(2T, 0.5T) = (2, 2)

  904 20:09:38.191562  

  905 20:09:38.191615  best RODT dly(2T, 0.5T) = (2, 2)

  906 20:09:38.191667  ==

  907 20:09:38.191719  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  908 20:09:38.191773  fsp= 1, odt_onoff= 1, Byte mode= 0

  909 20:09:38.191825  ==

  910 20:09:38.191878  Start DQ dly to find pass range UseTestEngine =0

  911 20:09:38.191931  x-axis: bit #, y-axis: DQ dly (-127~63)

  912 20:09:38.191983  RX Vref Scan = 0

  913 20:09:38.192036  -26, [0] xxxxxxxx xxxxxxxx [MSB]

  914 20:09:38.192092  -25, [0] xxxxxxxx xxxxxxxx [MSB]

  915 20:09:38.192146  -24, [0] xxxxxxxx xxxxxxxx [MSB]

  916 20:09:38.192200  -23, [0] xxxxxxxx xxxxxxxx [MSB]

  917 20:09:38.192254  -22, [0] xxxxxxxx xxxxxxxx [MSB]

  918 20:09:38.192307  -21, [0] xxxxxxxx xxxxxxxx [MSB]

  919 20:09:38.192361  -20, [0] xxxxxxxx xxxxxxxx [MSB]

  920 20:09:38.192414  -19, [0] xxxxxxxx xxxxxxxx [MSB]

  921 20:09:38.192467  -18, [0] xxxxxxxx xxxxxxxx [MSB]

  922 20:09:38.192521  -17, [0] xxxxxxxx xxxxxxxx [MSB]

  923 20:09:38.192575  -16, [0] xxxxxxxx xxxxxxxx [MSB]

  924 20:09:38.192628  -15, [0] xxxxxxxx xxxxxxxx [MSB]

  925 20:09:38.192681  -14, [0] xxxxxxxx xxxxxxxx [MSB]

  926 20:09:38.192734  -13, [0] xxxxxxxx xxxxxxxx [MSB]

  927 20:09:38.192788  -12, [0] xxxxxxxx xxxxxxxx [MSB]

  928 20:09:38.192841  -11, [0] xxxxxxxx xxxxxxxx [MSB]

  929 20:09:38.192894  -10, [0] xxxxxxxx xxxxxxxx [MSB]

  930 20:09:38.192947  -9, [0] xxxxxxxx xxxxxxxx [MSB]

  931 20:09:38.193000  -8, [0] xxxxxxxx xxxxxxxx [MSB]

  932 20:09:38.193053  -7, [0] xxxxxxxx xxxxxxxx [MSB]

  933 20:09:38.193106  -6, [0] xxxxxxxx xxxxxxxx [MSB]

  934 20:09:38.193160  -5, [0] xxxxxxxx xxxxxxxx [MSB]

  935 20:09:38.193213  -4, [0] xxxxxxxx xxxxxxxx [MSB]

  936 20:09:38.193274  -3, [0] xxxxxxxx xxxxxxxx [MSB]

  937 20:09:38.193366  -2, [0] xxxxxxxx xxxxxxxx [MSB]

  938 20:09:38.193420  -1, [0] xxxxxxxx xxxxxxxx [MSB]

  939 20:09:38.193475  0, [0] xxxoxoxx xxxxxxxx [MSB]

  940 20:09:38.193530  1, [0] xxxoxoxx xxxoxxxx [MSB]

  941 20:09:38.193584  2, [0] xxxoxoxx xxxoxxxx [MSB]

  942 20:09:38.193637  3, [0] xxxoxooo oxxoxoox [MSB]

  943 20:09:38.193694  4, [0] xxxoxooo ooxoxooo [MSB]

  944 20:09:38.193748  5, [0] xxxoxooo ooxooooo [MSB]

  945 20:09:38.193802  6, [0] xxxoxooo ooxooooo [MSB]

  946 20:09:38.193856  7, [0] xxoooooo ooxooooo [MSB]

  947 20:09:38.193910  8, [0] xooooooo oooooooo [MSB]

  948 20:09:38.193963  9, [0] xooooooo oooooooo [MSB]

  949 20:09:38.194017  32, [0] oooxoooo oooooooo [MSB]

  950 20:09:38.194070  33, [0] oooxoooo oooooxoo [MSB]

  951 20:09:38.194124  34, [0] oooxoxxo oooooxxo [MSB]

  952 20:09:38.194178  35, [0] oooxoxxx xooooxxo [MSB]

  953 20:09:38.194231  36, [0] oooxoxxx xooxoxxx [MSB]

  954 20:09:38.194284  37, [0] oooxoxxx xxoxxxxx [MSB]

  955 20:09:38.194338  38, [0] oooxoxxx xxoxxxxx [MSB]

  956 20:09:38.194390  39, [0] oooxoxxx xxoxxxxx [MSB]

  957 20:09:38.194443  40, [0] xooxxxxx xxoxxxxx [MSB]

  958 20:09:38.194503  41, [0] xoxxxxxx xxoxxxxx [MSB]

  959 20:09:38.194558  42, [0] xxxxxxxx xxxxxxxx [MSB]

  960 20:09:38.194611  iDelay=42, Bit 0, Center 24 (10 ~ 39) 30

  961 20:09:38.194664  iDelay=42, Bit 1, Center 24 (8 ~ 41) 34

  962 20:09:38.194717  iDelay=42, Bit 2, Center 23 (7 ~ 40) 34

  963 20:09:38.194769  iDelay=42, Bit 3, Center 15 (0 ~ 31) 32

  964 20:09:38.194821  iDelay=42, Bit 4, Center 23 (7 ~ 39) 33

  965 20:09:38.194874  iDelay=42, Bit 5, Center 16 (0 ~ 33) 34

  966 20:09:38.194926  iDelay=42, Bit 6, Center 18 (3 ~ 33) 31

  967 20:09:38.194979  iDelay=42, Bit 7, Center 18 (3 ~ 34) 32

  968 20:09:38.195031  iDelay=42, Bit 8, Center 18 (3 ~ 34) 32

  969 20:09:38.195083  iDelay=42, Bit 9, Center 20 (4 ~ 36) 33

  970 20:09:38.195135  iDelay=42, Bit 10, Center 24 (8 ~ 41) 34

  971 20:09:38.195187  iDelay=42, Bit 11, Center 18 (1 ~ 35) 35

  972 20:09:38.195240  iDelay=42, Bit 12, Center 20 (5 ~ 36) 32

  973 20:09:38.195292  iDelay=42, Bit 13, Center 17 (3 ~ 32) 30

  974 20:09:38.195344  iDelay=42, Bit 14, Center 18 (3 ~ 33) 31

  975 20:09:38.195397  iDelay=42, Bit 15, Center 19 (4 ~ 35) 32

  976 20:09:38.195449  ==

  977 20:09:38.195501  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  978 20:09:38.195554  fsp= 1, odt_onoff= 1, Byte mode= 0

  979 20:09:38.195606  ==

  980 20:09:38.195658  DQS Delay:

  981 20:09:38.195710  DQS0 = 0, DQS1 = 0

  982 20:09:38.195763  DQM Delay:

  983 20:09:38.195815  DQM0 = 20, DQM1 = 19

  984 20:09:38.195866  DQ Delay:

  985 20:09:38.195918  DQ0 =24, DQ1 =24, DQ2 =23, DQ3 =15

  986 20:09:38.195971  DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18

  987 20:09:38.196023  DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =18

  988 20:09:38.196075  DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =19

  989 20:09:38.196128  

  990 20:09:38.196181  

  991 20:09:38.196233  DramC Write-DBI off

  992 20:09:38.196285  ==

  993 20:09:38.196338  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  994 20:09:38.196391  fsp= 1, odt_onoff= 1, Byte mode= 0

  995 20:09:38.196444  ==

  996 20:09:38.196508  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

  997 20:09:38.196601  

  998 20:09:38.196698  Begin, DQ Scan Range 922~1178

  999 20:09:38.196781  

 1000 20:09:38.196865  

 1001 20:09:38.196962  	TX Vref Scan disable

 1002 20:09:38.197076  922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]

 1003 20:09:38.197194  923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]

 1004 20:09:38.197304  924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]

 1005 20:09:38.197584  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 1006 20:09:38.197725  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1007 20:09:38.197861  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1008 20:09:38.197997  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1009 20:09:38.198130  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1010 20:09:38.198263  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1011 20:09:38.198395  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1012 20:09:38.198529  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1013 20:09:38.198636  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1014 20:09:38.198694  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1015 20:09:38.198750  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1016 20:09:38.198804  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1017 20:09:38.198860  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1018 20:09:38.198916  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1019 20:09:38.198971  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1020 20:09:38.199025  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1021 20:09:38.199079  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1022 20:09:38.199133  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1023 20:09:38.199187  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1024 20:09:38.199241  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1025 20:09:38.199301  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1026 20:09:38.199358  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1027 20:09:38.199413  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1028 20:09:38.199467  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1029 20:09:38.199521  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1030 20:09:38.199574  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1031 20:09:38.199627  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1032 20:09:38.199681  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1033 20:09:38.199734  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1034 20:09:38.199788  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1035 20:09:38.199841  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1036 20:09:38.199894  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1037 20:09:38.199946  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1038 20:09:38.199999  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1039 20:09:38.200051  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1040 20:09:38.200104  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1041 20:09:38.200157  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1042 20:09:38.200211  962 |3 6 2|[0] xxxxxxxx oxxoxxxx [MSB]

 1043 20:09:38.200264  963 |3 6 3|[0] xxxxxxxx ooxoxoox [MSB]

 1044 20:09:38.200316  964 |3 6 4|[0] xxxxxxxx ooxoooxx [MSB]

 1045 20:09:38.200369  965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]

 1046 20:09:38.200422  966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]

 1047 20:09:38.200475  967 |3 6 7|[0] xxxxxxxx ooxooooo [MSB]

 1048 20:09:38.200528  968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]

 1049 20:09:38.200597  969 |3 6 9|[0] xxxoxxxx oooooooo [MSB]

 1050 20:09:38.200665  970 |3 6 10|[0] xxxoxoox oooooooo [MSB]

 1051 20:09:38.200717  971 |3 6 11|[0] xxxoxoox oooooooo [MSB]

 1052 20:09:38.200770  972 |3 6 12|[0] xxxoxoox oooooooo [MSB]

 1053 20:09:38.200822  973 |3 6 13|[0] xxxoxooo oooooooo [MSB]

 1054 20:09:38.200875  974 |3 6 14|[0] xxxooooo oooooooo [MSB]

 1055 20:09:38.200927  975 |3 6 15|[0] xxoooooo oooooooo [MSB]

 1056 20:09:38.200980  986 |3 6 26|[0] oooooooo oooxoxoo [MSB]

 1057 20:09:38.201033  987 |3 6 27|[0] oooooooo xxoxxxoo [MSB]

 1058 20:09:38.201086  988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]

 1059 20:09:38.201139  989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]

 1060 20:09:38.201192  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 1061 20:09:38.201245  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 1062 20:09:38.201337  992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]

 1063 20:09:38.201391  993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]

 1064 20:09:38.201444  994 |3 6 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1065 20:09:38.201497  Byte0, DQ PI dly=982, DQM PI dly= 982

 1066 20:09:38.201549  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)

 1067 20:09:38.201601  

 1068 20:09:38.201653  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)

 1069 20:09:38.201706  

 1070 20:09:38.201758  Byte1, DQ PI dly=975, DQM PI dly= 975

 1071 20:09:38.201810  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)

 1072 20:09:38.201862  

 1073 20:09:38.201913  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)

 1074 20:09:38.201965  

 1075 20:09:38.202017  ==

 1076 20:09:38.202069  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1077 20:09:38.202122  fsp= 1, odt_onoff= 1, Byte mode= 0

 1078 20:09:38.202175  ==

 1079 20:09:38.202227  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1080 20:09:38.202280  

 1081 20:09:38.202332  Begin, DQ Scan Range 951~1015

 1082 20:09:38.202383  Write Rank0 MR14 =0x0

 1083 20:09:38.202435  

 1084 20:09:38.202487  	CH=0, VrefRange= 0, VrefLevel = 0

 1085 20:09:38.202539  TX Bit0 (977~994) 18 985,   Bit8 (965~983) 19 974,

 1086 20:09:38.202592  TX Bit1 (977~993) 17 985,   Bit9 (966~982) 17 974,

 1087 20:09:38.202644  TX Bit2 (976~993) 18 984,   Bit10 (969~988) 20 978,

 1088 20:09:38.202697  TX Bit3 (970~986) 17 978,   Bit11 (965~982) 18 973,

 1089 20:09:38.202749  TX Bit4 (976~993) 18 984,   Bit12 (967~983) 17 975,

 1090 20:09:38.202801  TX Bit5 (972~987) 16 979,   Bit13 (966~982) 17 974,

 1091 20:09:38.202853  TX Bit6 (974~988) 15 981,   Bit14 (967~983) 17 975,

 1092 20:09:38.202906  TX Bit7 (977~991) 15 984,   Bit15 (968~983) 16 975,

 1093 20:09:38.202957  

 1094 20:09:38.203009  Write Rank0 MR14 =0x2

 1095 20:09:38.203060  

 1096 20:09:38.203112  	CH=0, VrefRange= 0, VrefLevel = 2

 1097 20:09:38.203164  TX Bit0 (977~994) 18 985,   Bit8 (964~983) 20 973,

 1098 20:09:38.203216  TX Bit1 (977~993) 17 985,   Bit9 (966~983) 18 974,

 1099 20:09:38.203268  TX Bit2 (976~993) 18 984,   Bit10 (969~989) 21 979,

 1100 20:09:38.203321  TX Bit3 (970~986) 17 978,   Bit11 (965~982) 18 973,

 1101 20:09:38.203373  TX Bit4 (975~994) 20 984,   Bit12 (966~983) 18 974,

 1102 20:09:38.203425  TX Bit5 (971~988) 18 979,   Bit13 (966~982) 17 974,

 1103 20:09:38.203488  TX Bit6 (973~989) 17 981,   Bit14 (967~983) 17 975,

 1104 20:09:38.203541  TX Bit7 (976~991) 16 983,   Bit15 (969~983) 15 976,

 1105 20:09:38.203593  

 1106 20:09:38.203645  Write Rank0 MR14 =0x4

 1107 20:09:38.203697  

 1108 20:09:38.203748  	CH=0, VrefRange= 0, VrefLevel = 4

 1109 20:09:38.203801  TX Bit0 (977~995) 19 986,   Bit8 (963~983) 21 973,

 1110 20:09:38.203853  TX Bit1 (977~993) 17 985,   Bit9 (966~983) 18 974,

 1111 20:09:38.204101  TX Bit2 (976~993) 18 984,   Bit10 (969~989) 21 979,

 1112 20:09:38.204192  TX Bit3 (970~987) 18 978,   Bit11 (964~983) 20 973,

 1113 20:09:38.204257  TX Bit4 (975~994) 20 984,   Bit12 (966~983) 18 974,

 1114 20:09:38.204312  TX Bit5 (971~989) 19 980,   Bit13 (965~983) 19 974,

 1115 20:09:38.204366  TX Bit6 (973~990) 18 981,   Bit14 (966~984) 19 975,

 1116 20:09:38.204419  TX Bit7 (976~991) 16 983,   Bit15 (968~984) 17 976,

 1117 20:09:38.204471  

 1118 20:09:38.204523  Write Rank0 MR14 =0x6

 1119 20:09:38.204575  

 1120 20:09:38.204627  	CH=0, VrefRange= 0, VrefLevel = 6

 1121 20:09:38.204680  TX Bit0 (977~995) 19 986,   Bit8 (963~984) 22 973,

 1122 20:09:38.204733  TX Bit1 (977~994) 18 985,   Bit9 (966~984) 19 975,

 1123 20:09:38.204785  TX Bit2 (976~993) 18 984,   Bit10 (969~989) 21 979,

 1124 20:09:38.204838  TX Bit3 (969~987) 19 978,   Bit11 (964~983) 20 973,

 1125 20:09:38.204897  TX Bit4 (975~994) 20 984,   Bit12 (966~984) 19 975,

 1126 20:09:38.204980  TX Bit5 (971~989) 19 980,   Bit13 (965~983) 19 974,

 1127 20:09:38.205063  TX Bit6 (972~991) 20 981,   Bit14 (966~985) 20 975,

 1128 20:09:38.205145  TX Bit7 (976~992) 17 984,   Bit15 (968~985) 18 976,

 1129 20:09:38.205226  

 1130 20:09:38.205349  Write Rank0 MR14 =0x8

 1131 20:09:38.205404  

 1132 20:09:38.205457  	CH=0, VrefRange= 0, VrefLevel = 8

 1133 20:09:38.205509  TX Bit0 (977~995) 19 986,   Bit8 (963~984) 22 973,

 1134 20:09:38.205561  TX Bit1 (976~994) 19 985,   Bit9 (966~984) 19 975,

 1135 20:09:38.205614  TX Bit2 (976~994) 19 985,   Bit10 (968~990) 23 979,

 1136 20:09:38.205667  TX Bit3 (969~988) 20 978,   Bit11 (963~983) 21 973,

 1137 20:09:38.205720  TX Bit4 (975~995) 21 985,   Bit12 (966~984) 19 975,

 1138 20:09:38.205772  TX Bit5 (970~990) 21 980,   Bit13 (965~983) 19 974,

 1139 20:09:38.205825  TX Bit6 (972~991) 20 981,   Bit14 (966~985) 20 975,

 1140 20:09:38.205878  TX Bit7 (976~992) 17 984,   Bit15 (968~985) 18 976,

 1141 20:09:38.205930  

 1142 20:09:38.205982  wait MRW command Rank0 MR14 =0xa fired (1)

 1143 20:09:38.206034  Write Rank0 MR14 =0xa

 1144 20:09:38.206086  

 1145 20:09:38.206138  	CH=0, VrefRange= 0, VrefLevel = 10

 1146 20:09:38.206190  TX Bit0 (976~996) 21 986,   Bit8 (962~985) 24 973,

 1147 20:09:38.206243  TX Bit1 (976~995) 20 985,   Bit9 (965~984) 20 974,

 1148 20:09:38.206295  TX Bit2 (975~994) 20 984,   Bit10 (968~990) 23 979,

 1149 20:09:38.206348  TX Bit3 (969~988) 20 978,   Bit11 (963~983) 21 973,

 1150 20:09:38.206400  TX Bit4 (974~995) 22 984,   Bit12 (965~985) 21 975,

 1151 20:09:38.206452  TX Bit5 (970~991) 22 980,   Bit13 (964~984) 21 974,

 1152 20:09:38.206505  TX Bit6 (971~991) 21 981,   Bit14 (966~986) 21 976,

 1153 20:09:38.206558  TX Bit7 (975~992) 18 983,   Bit15 (967~986) 20 976,

 1154 20:09:38.206609  

 1155 20:09:38.206661  Write Rank0 MR14 =0xc

 1156 20:09:38.206714  

 1157 20:09:38.206765  	CH=0, VrefRange= 0, VrefLevel = 12

 1158 20:09:38.206818  TX Bit0 (976~996) 21 986,   Bit8 (962~985) 24 973,

 1159 20:09:38.206870  TX Bit1 (976~995) 20 985,   Bit9 (965~985) 21 975,

 1160 20:09:38.206923  TX Bit2 (975~994) 20 984,   Bit10 (968~990) 23 979,

 1161 20:09:38.206982  TX Bit3 (969~990) 22 979,   Bit11 (963~984) 22 973,

 1162 20:09:38.207040  TX Bit4 (974~995) 22 984,   Bit12 (965~985) 21 975,

 1163 20:09:38.207096  TX Bit5 (970~991) 22 980,   Bit13 (963~984) 22 973,

 1164 20:09:38.207149  TX Bit6 (971~992) 22 981,   Bit14 (965~986) 22 975,

 1165 20:09:38.207202  TX Bit7 (975~993) 19 984,   Bit15 (967~987) 21 977,

 1166 20:09:38.207254  

 1167 20:09:38.207306  Write Rank0 MR14 =0xe

 1168 20:09:38.207358  

 1169 20:09:38.207410  	CH=0, VrefRange= 0, VrefLevel = 14

 1170 20:09:38.207462  TX Bit0 (976~997) 22 986,   Bit8 (962~986) 25 974,

 1171 20:09:38.207514  TX Bit1 (976~995) 20 985,   Bit9 (965~986) 22 975,

 1172 20:09:38.207566  TX Bit2 (975~995) 21 985,   Bit10 (968~990) 23 979,

 1173 20:09:38.207618  TX Bit3 (969~990) 22 979,   Bit11 (962~984) 23 973,

 1174 20:09:38.207671  TX Bit4 (974~996) 23 985,   Bit12 (965~986) 22 975,

 1175 20:09:38.207729  TX Bit5 (970~991) 22 980,   Bit13 (963~984) 22 973,

 1176 20:09:38.207786  TX Bit6 (970~992) 23 981,   Bit14 (964~987) 24 975,

 1177 20:09:38.207842  TX Bit7 (974~993) 20 983,   Bit15 (967~988) 22 977,

 1178 20:09:38.207895  

 1179 20:09:38.207946  wait MRW command Rank0 MR14 =0x10 fired (1)

 1180 20:09:38.207999  Write Rank0 MR14 =0x10

 1181 20:09:38.208051  

 1182 20:09:38.208104  	CH=0, VrefRange= 0, VrefLevel = 16

 1183 20:09:38.208156  TX Bit0 (976~998) 23 987,   Bit8 (962~986) 25 974,

 1184 20:09:38.208208  TX Bit1 (975~995) 21 985,   Bit9 (964~986) 23 975,

 1185 20:09:38.208260  TX Bit2 (975~995) 21 985,   Bit10 (967~990) 24 978,

 1186 20:09:38.208313  TX Bit3 (968~991) 24 979,   Bit11 (962~985) 24 973,

 1187 20:09:38.208365  TX Bit4 (973~996) 24 984,   Bit12 (964~986) 23 975,

 1188 20:09:38.208417  TX Bit5 (970~991) 22 980,   Bit13 (963~985) 23 974,

 1189 20:09:38.208469  TX Bit6 (970~992) 23 981,   Bit14 (964~988) 25 976,

 1190 20:09:38.208528  TX Bit7 (974~993) 20 983,   Bit15 (967~988) 22 977,

 1191 20:09:38.208585  

 1192 20:09:38.208656  Write Rank0 MR14 =0x12

 1193 20:09:38.208737  

 1194 20:09:38.208818  	CH=0, VrefRange= 0, VrefLevel = 18

 1195 20:09:38.208900  TX Bit0 (975~998) 24 986,   Bit8 (961~987) 27 974,

 1196 20:09:38.208982  TX Bit1 (975~996) 22 985,   Bit9 (963~986) 24 974,

 1197 20:09:38.209064  TX Bit2 (975~996) 22 985,   Bit10 (967~991) 25 979,

 1198 20:09:38.209145  TX Bit3 (968~991) 24 979,   Bit11 (961~985) 25 973,

 1199 20:09:38.209228  TX Bit4 (973~997) 25 985,   Bit12 (964~986) 23 975,

 1200 20:09:38.209338  TX Bit5 (969~992) 24 980,   Bit13 (962~985) 24 973,

 1201 20:09:38.209398  TX Bit6 (970~992) 23 981,   Bit14 (963~988) 26 975,

 1202 20:09:38.209481  TX Bit7 (973~994) 22 983,   Bit15 (967~989) 23 978,

 1203 20:09:38.209562  

 1204 20:09:38.209643  Write Rank0 MR14 =0x14

 1205 20:09:38.209723  

 1206 20:09:38.209804  	CH=0, VrefRange= 0, VrefLevel = 20

 1207 20:09:38.209886  TX Bit0 (975~999) 25 987,   Bit8 (961~987) 27 974,

 1208 20:09:38.209968  TX Bit1 (975~997) 23 986,   Bit9 (963~988) 26 975,

 1209 20:09:38.210051  TX Bit2 (974~996) 23 985,   Bit10 (968~991) 24 979,

 1210 20:09:38.210117  TX Bit3 (968~991) 24 979,   Bit11 (962~986) 25 974,

 1211 20:09:38.210200  TX Bit4 (972~998) 27 985,   Bit12 (963~987) 25 975,

 1212 20:09:38.210475  TX Bit5 (969~992) 24 980,   Bit13 (962~986) 25 974,

 1213 20:09:38.210607  TX Bit6 (969~993) 25 981,   Bit14 (963~988) 26 975,

 1214 20:09:38.210736  TX Bit7 (972~994) 23 983,   Bit15 (966~989) 24 977,

 1215 20:09:38.210864  

 1216 20:09:38.210991  Write Rank0 MR14 =0x16

 1217 20:09:38.211116  

 1218 20:09:38.211243  	CH=0, VrefRange= 0, VrefLevel = 22

 1219 20:09:38.211370  TX Bit0 (975~999) 25 987,   Bit8 (961~986) 26 973,

 1220 20:09:38.211499  TX Bit1 (975~997) 23 986,   Bit9 (963~988) 26 975,

 1221 20:09:38.211587  TX Bit2 (974~997) 24 985,   Bit10 (967~991) 25 979,

 1222 20:09:38.211670  TX Bit3 (968~992) 25 980,   Bit11 (961~986) 26 973,

 1223 20:09:38.211752  TX Bit4 (972~998) 27 985,   Bit12 (962~987) 26 974,

 1224 20:09:38.211835  TX Bit5 (969~992) 24 980,   Bit13 (961~986) 26 973,

 1225 20:09:38.211919  TX Bit6 (969~993) 25 981,   Bit14 (963~987) 25 975,

 1226 20:09:38.212002  TX Bit7 (972~995) 24 983,   Bit15 (966~989) 24 977,

 1227 20:09:38.212089  

 1228 20:09:38.212179  Write Rank0 MR14 =0x18

 1229 20:09:38.212302  

 1230 20:09:38.212383  	CH=0, VrefRange= 0, VrefLevel = 24

 1231 20:09:38.212525  TX Bit0 (975~999) 25 987,   Bit8 (961~986) 26 973,

 1232 20:09:38.212631  TX Bit1 (974~997) 24 985,   Bit9 (963~988) 26 975,

 1233 20:09:38.212750  TX Bit2 (973~997) 25 985,   Bit10 (967~991) 25 979,

 1234 20:09:38.212839  TX Bit3 (968~992) 25 980,   Bit11 (961~986) 26 973,

 1235 20:09:38.212926  TX Bit4 (973~998) 26 985,   Bit12 (962~987) 26 974,

 1236 20:09:38.213014  TX Bit5 (968~992) 25 980,   Bit13 (962~985) 24 973,

 1237 20:09:38.213103  TX Bit6 (969~993) 25 981,   Bit14 (962~987) 26 974,

 1238 20:09:38.213191  TX Bit7 (971~995) 25 983,   Bit15 (966~990) 25 978,

 1239 20:09:38.213286  

 1240 20:09:38.213404  Write Rank0 MR14 =0x1a

 1241 20:09:38.213491  

 1242 20:09:38.213590  	CH=0, VrefRange= 0, VrefLevel = 26

 1243 20:09:38.213675  TX Bit0 (975~999) 25 987,   Bit8 (961~986) 26 973,

 1244 20:09:38.213761  TX Bit1 (974~997) 24 985,   Bit9 (963~988) 26 975,

 1245 20:09:38.213847  TX Bit2 (973~997) 25 985,   Bit10 (967~991) 25 979,

 1246 20:09:38.213934  TX Bit3 (968~992) 25 980,   Bit11 (961~986) 26 973,

 1247 20:09:38.214053  TX Bit4 (973~998) 26 985,   Bit12 (962~987) 26 974,

 1248 20:09:38.214140  TX Bit5 (968~992) 25 980,   Bit13 (962~985) 24 973,

 1249 20:09:38.214228  TX Bit6 (969~993) 25 981,   Bit14 (962~987) 26 974,

 1250 20:09:38.214313  TX Bit7 (971~995) 25 983,   Bit15 (966~990) 25 978,

 1251 20:09:38.214397  

 1252 20:09:38.214482  Write Rank0 MR14 =0x1c

 1253 20:09:38.214565  

 1254 20:09:38.214649  	CH=0, VrefRange= 0, VrefLevel = 28

 1255 20:09:38.214734  TX Bit0 (975~999) 25 987,   Bit8 (961~986) 26 973,

 1256 20:09:38.214821  TX Bit1 (974~997) 24 985,   Bit9 (963~988) 26 975,

 1257 20:09:38.214906  TX Bit2 (973~997) 25 985,   Bit10 (967~991) 25 979,

 1258 20:09:38.214992  TX Bit3 (968~992) 25 980,   Bit11 (961~986) 26 973,

 1259 20:09:38.215078  TX Bit4 (973~998) 26 985,   Bit12 (962~987) 26 974,

 1260 20:09:38.215164  TX Bit5 (968~992) 25 980,   Bit13 (962~985) 24 973,

 1261 20:09:38.215249  TX Bit6 (969~993) 25 981,   Bit14 (962~987) 26 974,

 1262 20:09:38.215335  TX Bit7 (971~995) 25 983,   Bit15 (966~990) 25 978,

 1263 20:09:38.215420  

 1264 20:09:38.215504  Write Rank0 MR14 =0x1e

 1265 20:09:38.215587  

 1266 20:09:38.215672  	CH=0, VrefRange= 0, VrefLevel = 30

 1267 20:09:38.215757  TX Bit0 (975~999) 25 987,   Bit8 (961~986) 26 973,

 1268 20:09:38.215842  TX Bit1 (974~997) 24 985,   Bit9 (963~988) 26 975,

 1269 20:09:38.215929  TX Bit2 (973~997) 25 985,   Bit10 (967~991) 25 979,

 1270 20:09:38.216012  TX Bit3 (968~992) 25 980,   Bit11 (961~986) 26 973,

 1271 20:09:38.216097  TX Bit4 (973~998) 26 985,   Bit12 (962~987) 26 974,

 1272 20:09:38.216182  TX Bit5 (968~992) 25 980,   Bit13 (962~985) 24 973,

 1273 20:09:38.216264  TX Bit6 (969~993) 25 981,   Bit14 (962~987) 26 974,

 1274 20:09:38.216346  TX Bit7 (971~995) 25 983,   Bit15 (966~990) 25 978,

 1275 20:09:38.216430  

 1276 20:09:38.216511  

 1277 20:09:38.216591  TX Vref found, early break! 369< 383

 1278 20:09:38.216673  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 1279 20:09:38.216756  u1DelayCellOfst[0]=8 cells (7 PI)

 1280 20:09:38.216812  u1DelayCellOfst[1]=6 cells (5 PI)

 1281 20:09:38.216864  u1DelayCellOfst[2]=6 cells (5 PI)

 1282 20:09:38.216917  u1DelayCellOfst[3]=0 cells (0 PI)

 1283 20:09:38.216969  u1DelayCellOfst[4]=6 cells (5 PI)

 1284 20:09:38.217021  u1DelayCellOfst[5]=0 cells (0 PI)

 1285 20:09:38.217073  u1DelayCellOfst[6]=1 cells (1 PI)

 1286 20:09:38.217125  u1DelayCellOfst[7]=3 cells (3 PI)

 1287 20:09:38.217177  Byte0, DQ PI dly=980, DQM PI dly= 983

 1288 20:09:38.217230  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)

 1289 20:09:38.217336  

 1290 20:09:38.217418  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)

 1291 20:09:38.217486  

 1292 20:09:38.217539  u1DelayCellOfst[8]=0 cells (0 PI)

 1293 20:09:38.217591  u1DelayCellOfst[9]=2 cells (2 PI)

 1294 20:09:38.217644  u1DelayCellOfst[10]=7 cells (6 PI)

 1295 20:09:38.217696  u1DelayCellOfst[11]=0 cells (0 PI)

 1296 20:09:38.217749  u1DelayCellOfst[12]=1 cells (1 PI)

 1297 20:09:38.217800  u1DelayCellOfst[13]=0 cells (0 PI)

 1298 20:09:38.217851  u1DelayCellOfst[14]=1 cells (1 PI)

 1299 20:09:38.217903  u1DelayCellOfst[15]=6 cells (5 PI)

 1300 20:09:38.217955  Byte1, DQ PI dly=973, DQM PI dly= 976

 1301 20:09:38.218007  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)

 1302 20:09:38.218058  

 1303 20:09:38.218110  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)

 1304 20:09:38.218162  

 1305 20:09:38.218213  Write Rank0 MR14 =0x18

 1306 20:09:38.218265  

 1307 20:09:38.218315  Final TX Range 0 Vref 24

 1308 20:09:38.218367  

 1309 20:09:38.218419  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 1310 20:09:38.218472  

 1311 20:09:38.218577  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 1312 20:09:38.218668  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1313 20:09:38.218765  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1314 20:09:38.218828  Write Rank0 MR3 =0xb0

 1315 20:09:38.218881  DramC Write-DBI on

 1316 20:09:38.218934  ==

 1317 20:09:38.218986  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1318 20:09:38.219038  fsp= 1, odt_onoff= 1, Byte mode= 0

 1319 20:09:38.219091  ==

 1320 20:09:38.219337  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 1321 20:09:38.219399  

 1322 20:09:38.219452  Begin, DQ Scan Range 696~760

 1323 20:09:38.219505  

 1324 20:09:38.219558  

 1325 20:09:38.219609  	TX Vref Scan disable

 1326 20:09:38.219661  696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1327 20:09:38.219714  697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1328 20:09:38.219767  698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1329 20:09:38.219820  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1330 20:09:38.219873  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1331 20:09:38.219925  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1332 20:09:38.219978  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1333 20:09:38.220032  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1334 20:09:38.220086  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1335 20:09:38.220138  705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]

 1336 20:09:38.220191  706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]

 1337 20:09:38.220243  707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]

 1338 20:09:38.220295  708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]

 1339 20:09:38.220348  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 1340 20:09:38.220400  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 1341 20:09:38.220452  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 1342 20:09:38.220504  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 1343 20:09:38.220556  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 1344 20:09:38.220609  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 1345 20:09:38.220662  733 |2 6 29|[0] oooooooo xxxxxxxx [MSB]

 1346 20:09:38.220715  734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]

 1347 20:09:38.220767  735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]

 1348 20:09:38.220820  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 1349 20:09:38.220872  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 1350 20:09:38.220924  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 1351 20:09:38.220977  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 1352 20:09:38.221029  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 1353 20:09:38.221082  741 |2 6 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1354 20:09:38.221133  Byte0, DQ PI dly=727, DQM PI dly= 727

 1355 20:09:38.221185  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)

 1356 20:09:38.221237  

 1357 20:09:38.221352  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)

 1358 20:09:38.221427  

 1359 20:09:38.221481  Byte1, DQ PI dly=718, DQM PI dly= 718

 1360 20:09:38.221533  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 14)

 1361 20:09:38.221586  

 1362 20:09:38.221637  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 14)

 1363 20:09:38.221689  

 1364 20:09:38.221741  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 1365 20:09:38.221794  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1366 20:09:38.221846  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1367 20:09:38.221897  wait MRW command Rank0 MR3 =0x30 fired (1)

 1368 20:09:38.221949  Write Rank0 MR3 =0x30

 1369 20:09:38.222001  DramC Write-DBI off

 1370 20:09:38.222053  

 1371 20:09:38.222103  [DATLAT]

 1372 20:09:38.222155  Freq=1600, CH0 RK0, use_rxtx_scan=0

 1373 20:09:38.222207  

 1374 20:09:38.222258  DATLAT Default: 0xf

 1375 20:09:38.222309  7, 0xFFFF, sum=0

 1376 20:09:38.222362  8, 0xFFFF, sum=0

 1377 20:09:38.222414  9, 0xFFFF, sum=0

 1378 20:09:38.222466  10, 0xFFFF, sum=0

 1379 20:09:38.222518  11, 0xFFFF, sum=0

 1380 20:09:38.222571  12, 0xFFFF, sum=0

 1381 20:09:38.222623  13, 0xFFFF, sum=0

 1382 20:09:38.222675  14, 0x0, sum=1

 1383 20:09:38.222727  15, 0x0, sum=2

 1384 20:09:38.222779  16, 0x0, sum=3

 1385 20:09:38.222831  17, 0x0, sum=4

 1386 20:09:38.222883  pattern=2 first_step=14 total pass=5 best_step=16

 1387 20:09:38.222935  ==

 1388 20:09:38.222986  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1389 20:09:38.223038  fsp= 1, odt_onoff= 1, Byte mode= 0

 1390 20:09:38.223090  ==

 1391 20:09:38.223141  Start DQ dly to find pass range UseTestEngine =1

 1392 20:09:38.223193  x-axis: bit #, y-axis: DQ dly (-127~63)

 1393 20:09:38.223245  RX Vref Scan = 1

 1394 20:09:38.223296  

 1395 20:09:38.223346  RX Vref found, early break!

 1396 20:09:38.223397  

 1397 20:09:38.223448  Final RX Vref 13, apply to both rank0 and 1

 1398 20:09:38.223500  ==

 1399 20:09:38.223552  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1400 20:09:38.223603  fsp= 1, odt_onoff= 1, Byte mode= 0

 1401 20:09:38.223655  ==

 1402 20:09:38.223706  DQS Delay:

 1403 20:09:38.223757  DQS0 = 0, DQS1 = 0

 1404 20:09:38.223808  DQM Delay:

 1405 20:09:38.223859  DQM0 = 20, DQM1 = 19

 1406 20:09:38.223911  DQ Delay:

 1407 20:09:38.223962  DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15

 1408 20:09:38.224014  DQ4 =22, DQ5 =16, DQ6 =18, DQ7 =19

 1409 20:09:38.224065  DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =16

 1410 20:09:38.224116  DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20

 1411 20:09:38.224167  

 1412 20:09:38.224218  

 1413 20:09:38.224269  

 1414 20:09:38.224321  [DramC_TX_OE_Calibration] TA2

 1415 20:09:38.224372  Original DQ_B0 (3 6) =30, OEN = 27

 1416 20:09:38.224424  Original DQ_B1 (3 6) =30, OEN = 27

 1417 20:09:38.224476  23, 0x0, End_B0=23 End_B1=23

 1418 20:09:38.224563  24, 0x0, End_B0=24 End_B1=24

 1419 20:09:38.224615  25, 0x0, End_B0=25 End_B1=25

 1420 20:09:38.224667  26, 0x0, End_B0=26 End_B1=26

 1421 20:09:38.224719  27, 0x0, End_B0=27 End_B1=27

 1422 20:09:38.224771  28, 0x0, End_B0=28 End_B1=28

 1423 20:09:38.224823  29, 0x0, End_B0=29 End_B1=29

 1424 20:09:38.224876  30, 0x0, End_B0=30 End_B1=30

 1425 20:09:38.224927  31, 0xFFFF, End_B0=30 End_B1=30

 1426 20:09:38.224980  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1427 20:09:38.225031  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1428 20:09:38.225083  

 1429 20:09:38.225133  

 1430 20:09:38.225185  Write Rank0 MR23 =0x3f

 1431 20:09:38.225236  [DQSOSC]

 1432 20:09:38.225329  [DQSOSCAuto] RK0, (LSB)MR18= 0xa9, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps

 1433 20:09:38.225383  CH0_RK0: MR19=0x3, MR18=0xA9, DQSOSC=336, MR23=63, INC=21, DEC=32

 1434 20:09:38.225435  Write Rank0 MR23 =0x3f

 1435 20:09:38.225487  [DQSOSC]

 1436 20:09:38.225538  [DQSOSCAuto] RK0, (LSB)MR18= 0xaa, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps

 1437 20:09:38.225591  CH0 RK0: MR19=3, MR18=AA

 1438 20:09:38.225642  [RankSwap] Rank num 2, (Multi 1), Rank 1

 1439 20:09:38.225694  Write Rank0 MR2 =0xad

 1440 20:09:38.225746  [Write Leveling]

 1441 20:09:38.225797  delay  byte0  byte1  byte2  byte3

 1442 20:09:38.225848  

 1443 20:09:38.225899  10    0   0   

 1444 20:09:38.225952  11    0   0   

 1445 20:09:38.226004  12    0   0   

 1446 20:09:38.226056  13    0   0   

 1447 20:09:38.226108  14    0   0   

 1448 20:09:38.226160  15    0   0   

 1449 20:09:38.226212  16    0   0   

 1450 20:09:38.226264  17    0   0   

 1451 20:09:38.226315  18    0   0   

 1452 20:09:38.226367  19    0   0   

 1453 20:09:38.226419  20    0   0   

 1454 20:09:38.226471  21    0   0   

 1455 20:09:38.226524  22    0   0   

 1456 20:09:38.226583  23    0   0   

 1457 20:09:38.226667  24    0   0   

 1458 20:09:38.226723  25    0   0   

 1459 20:09:38.226776  26    0   0   

 1460 20:09:38.226828  27    0   0   

 1461 20:09:38.226879  28    0   0   

 1462 20:09:38.226931  29    0   ff   

 1463 20:09:38.226983  30    0   ff   

 1464 20:09:38.227035  31    0   ff   

 1465 20:09:38.227086  32    0   ff   

 1466 20:09:38.227336  33    0   ff   

 1467 20:09:38.227468  34    0   ff   

 1468 20:09:38.227597  35    ff   ff   

 1469 20:09:38.227726  36    ff   ff   

 1470 20:09:38.227855  37    ff   ff   

 1471 20:09:38.227983  38    ff   ff   

 1472 20:09:38.228112  39    ff   ff   

 1473 20:09:38.228239  40    ff   ff   

 1474 20:09:38.228369  41    ff   ff   

 1475 20:09:38.228475  pass bytecount = 0xff (0xff: all bytes pass) 

 1476 20:09:38.228533  

 1477 20:09:38.228587  DQS0 dly: 35

 1478 20:09:38.228639  DQS1 dly: 29

 1479 20:09:38.228692  Write Rank0 MR2 =0x2d

 1480 20:09:38.228745  [RankSwap] Rank num 2, (Multi 1), Rank 0

 1481 20:09:38.228797  Write Rank1 MR1 =0xd6

 1482 20:09:38.228848  [Gating]

 1483 20:09:38.228899  ==

 1484 20:09:38.228951  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1485 20:09:38.229003  fsp= 1, odt_onoff= 1, Byte mode= 0

 1486 20:09:38.229055  ==

 1487 20:09:38.229107  3 1 0 |2c2b 2c2b  |(11 11)(11 11) |(1 1)(1 1)| 0

 1488 20:09:38.229159  3 1 4 |2c2b 2c2b  |(11 11)(11 11) |(0 0)(0 0)| 0

 1489 20:09:38.229213  3 1 8 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 1)| 0

 1490 20:09:38.229271  3 1 12 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1491 20:09:38.229357  3 1 16 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1492 20:09:38.229410  3 1 20 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1493 20:09:38.229463  3 1 24 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1494 20:09:38.229516  3 1 28 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1495 20:09:38.229569  3 2 0 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1496 20:09:38.229621  3 2 4 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1497 20:09:38.229674  3 2 8 |2c2c 2c2b  |(11 10)(11 11) |(0 0)(1 0)| 0

 1498 20:09:38.229727  3 2 12 |3534 2c2c  |(11 11)(11 0) |(0 0)(0 0)| 0

 1499 20:09:38.229780  3 2 16 |3534 303  |(11 11)(11 11) |(0 0)(0 0)| 0

 1500 20:09:38.229832  3 2 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1501 20:09:38.229885  3 2 24 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1502 20:09:38.229937  3 2 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1503 20:09:38.229989  3 3 0 |3534 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1504 20:09:38.230042  3 3 4 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1505 20:09:38.230095  3 3 8 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1506 20:09:38.230147  3 3 12 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1507 20:09:38.230199  3 3 16 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1508 20:09:38.230251  [Byte 0] Lead/lag Transition tap number (1)

 1509 20:09:38.230303  [Byte 1] Lead/lag falling Transition (3, 3, 16)

 1510 20:09:38.230354  3 3 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1511 20:09:38.230407  3 3 24 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1512 20:09:38.230459  3 3 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1513 20:09:38.230512  3 4 0 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1514 20:09:38.230564  3 4 4 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1515 20:09:38.230617  3 4 8 |201 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1516 20:09:38.230670  3 4 12 |1515 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1517 20:09:38.230722  3 4 16 |3d3d 201  |(11 11)(11 11) |(1 1)(1 1)| 0

 1518 20:09:38.230775  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1519 20:09:38.230828  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1520 20:09:38.230880  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1521 20:09:38.230932  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1522 20:09:38.230984  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1523 20:09:38.231036  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1524 20:09:38.231089  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1525 20:09:38.231141  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1526 20:09:38.231193  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1527 20:09:38.231246  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1528 20:09:38.231298  3 5 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1529 20:09:38.231351  3 6 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1530 20:09:38.231403  [Byte 0] Lead/lag falling Transition (3, 6, 0)

 1531 20:09:38.231456  3 6 4 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 1532 20:09:38.231508  [Byte 0] Lead/lag Transition tap number (2)

 1533 20:09:38.231560  [Byte 1] Lead/lag Transition tap number (1)

 1534 20:09:38.231611  3 6 8 |909 3d3d  |(11 11)(11 11) |(0 0)(0 0)| 0

 1535 20:09:38.231664  3 6 12 |3434 3e3d  |(1 1)(11 11) |(0 0)(0 0)| 0

 1536 20:09:38.231717  3 6 16 |4646 605  |(0 0)(11 11) |(0 0)(0 0)| 0

 1537 20:09:38.231769  [Byte 0]First pass (3, 6, 16)

 1538 20:09:38.231821  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1539 20:09:38.231873  [Byte 1]First pass (3, 6, 20)

 1540 20:09:38.231924  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1541 20:09:38.231977  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1542 20:09:38.232029  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1543 20:09:38.232081  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1544 20:09:38.232134  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1545 20:09:38.232186  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1546 20:09:38.232238  3 7 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1547 20:09:38.232291  3 7 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1548 20:09:38.232342  All bytes gating window > 1UI, Early break!

 1549 20:09:38.232395  

 1550 20:09:38.232446  best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)

 1551 20:09:38.232498  

 1552 20:09:38.232548  best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)

 1553 20:09:38.232600  

 1554 20:09:38.232651  

 1555 20:09:38.232702  

 1556 20:09:38.232752  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)

 1557 20:09:38.232804  

 1558 20:09:38.232854  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)

 1559 20:09:38.232906  

 1560 20:09:38.232956  

 1561 20:09:38.233007  Write Rank1 MR1 =0x56

 1562 20:09:38.233059  

 1563 20:09:38.233110  best RODT dly(2T, 0.5T) = (2, 3)

 1564 20:09:38.233162  

 1565 20:09:38.233212  best RODT dly(2T, 0.5T) = (2, 3)

 1566 20:09:38.233272  ==

 1567 20:09:38.233359  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1568 20:09:38.233412  fsp= 1, odt_onoff= 1, Byte mode= 0

 1569 20:09:38.233463  ==

 1570 20:09:38.233515  Start DQ dly to find pass range UseTestEngine =0

 1571 20:09:38.233568  x-axis: bit #, y-axis: DQ dly (-127~63)

 1572 20:09:38.233620  RX Vref Scan = 0

 1573 20:09:38.233671  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 1574 20:09:38.233724  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 1575 20:09:38.233777  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 1576 20:09:38.233830  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 1577 20:09:38.234077  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 1578 20:09:38.234137  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 1579 20:09:38.234191  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 1580 20:09:38.234244  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 1581 20:09:38.234297  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 1582 20:09:38.234349  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 1583 20:09:38.234402  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 1584 20:09:38.234454  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 1585 20:09:38.234506  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 1586 20:09:38.234558  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 1587 20:09:38.234610  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 1588 20:09:38.234662  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 1589 20:09:38.234715  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 1590 20:09:38.234767  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 1591 20:09:38.234819  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 1592 20:09:38.234871  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 1593 20:09:38.234923  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 1594 20:09:38.234975  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 1595 20:09:38.235028  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 1596 20:09:38.235080  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 1597 20:09:38.235132  -2, [0] xxxxxxxx xxxxxxxx [MSB]

 1598 20:09:38.235184  -1, [0] xxxoxxxx xxxoxoxx [MSB]

 1599 20:09:38.235236  0, [0] xxxoxxxx oxxoxoxx [MSB]

 1600 20:09:38.235290  1, [0] xxxoxoxx oxxoxoox [MSB]

 1601 20:09:38.235342  2, [0] xxxoxooo ooxoooox [MSB]

 1602 20:09:38.235394  3, [0] xxxoxooo ooxooooo [MSB]

 1603 20:09:38.235445  4, [0] xxxoxooo ooxooooo [MSB]

 1604 20:09:38.235498  5, [0] xxxoxooo ooxooooo [MSB]

 1605 20:09:38.235550  6, [0] xxxooooo oooooooo [MSB]

 1606 20:09:38.235602  7, [0] xooooooo oooooooo [MSB]

 1607 20:09:38.235654  8, [0] xooooooo oooooooo [MSB]

 1608 20:09:38.235706  35, [0] oooxoooo oooxoooo [MSB]

 1609 20:09:38.235758  36, [0] oooxoxoo oooxoxxo [MSB]

 1610 20:09:38.235811  37, [0] oooxoxxx xooxoxxo [MSB]

 1611 20:09:38.235863  38, [0] oooxoxxx xxoxxxxo [MSB]

 1612 20:09:38.235915  39, [0] oooxoxxx xxoxxxxo [MSB]

 1613 20:09:38.235967  40, [0] oooxoxxx xxoxxxxx [MSB]

 1614 20:09:38.236019  41, [0] oooxoxxx xxoxxxxx [MSB]

 1615 20:09:38.236071  42, [0] oooxxxxx xxoxxxxx [MSB]

 1616 20:09:38.236124  43, [0] xxxxxxxx xxxxxxxx [MSB]

 1617 20:09:38.236176  iDelay=43, Bit 0, Center 25 (9 ~ 42) 34

 1618 20:09:38.236227  iDelay=43, Bit 1, Center 24 (7 ~ 42) 36

 1619 20:09:38.236278  iDelay=43, Bit 2, Center 24 (7 ~ 42) 36

 1620 20:09:38.236330  iDelay=43, Bit 3, Center 16 (-1 ~ 34) 36

 1621 20:09:38.236381  iDelay=43, Bit 4, Center 23 (6 ~ 41) 36

 1622 20:09:38.236433  iDelay=43, Bit 5, Center 18 (1 ~ 35) 35

 1623 20:09:38.236484  iDelay=43, Bit 6, Center 19 (2 ~ 36) 35

 1624 20:09:38.236535  iDelay=43, Bit 7, Center 19 (2 ~ 36) 35

 1625 20:09:38.236587  iDelay=43, Bit 8, Center 18 (0 ~ 36) 37

 1626 20:09:38.236638  iDelay=43, Bit 9, Center 19 (2 ~ 37) 36

 1627 20:09:38.236689  iDelay=43, Bit 10, Center 24 (6 ~ 42) 37

 1628 20:09:38.236740  iDelay=43, Bit 11, Center 16 (-1 ~ 34) 36

 1629 20:09:38.236792  iDelay=43, Bit 12, Center 19 (2 ~ 37) 36

 1630 20:09:38.236843  iDelay=43, Bit 13, Center 17 (-1 ~ 35) 37

 1631 20:09:38.236894  iDelay=43, Bit 14, Center 18 (1 ~ 35) 35

 1632 20:09:38.236945  iDelay=43, Bit 15, Center 21 (3 ~ 39) 37

 1633 20:09:38.236996  ==

 1634 20:09:38.237047  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1635 20:09:38.237099  fsp= 1, odt_onoff= 1, Byte mode= 0

 1636 20:09:38.237151  ==

 1637 20:09:38.237201  DQS Delay:

 1638 20:09:38.237252  DQS0 = 0, DQS1 = 0

 1639 20:09:38.237342  DQM Delay:

 1640 20:09:38.237393  DQM0 = 21, DQM1 = 19

 1641 20:09:38.237445  DQ Delay:

 1642 20:09:38.237496  DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =16

 1643 20:09:38.237548  DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =19

 1644 20:09:38.237599  DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =16

 1645 20:09:38.237650  DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =21

 1646 20:09:38.237702  

 1647 20:09:38.237753  

 1648 20:09:38.237803  DramC Write-DBI off

 1649 20:09:38.237855  ==

 1650 20:09:38.237907  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1651 20:09:38.237959  fsp= 1, odt_onoff= 1, Byte mode= 0

 1652 20:09:38.238011  ==

 1653 20:09:38.238062  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 1654 20:09:38.238114  

 1655 20:09:38.238165  Begin, DQ Scan Range 925~1181

 1656 20:09:38.238217  

 1657 20:09:38.238267  

 1658 20:09:38.238318  	TX Vref Scan disable

 1659 20:09:38.238370  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 1660 20:09:38.238422  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1661 20:09:38.238475  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1662 20:09:38.238528  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1663 20:09:38.238580  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1664 20:09:38.238632  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1665 20:09:38.238684  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1666 20:09:38.238736  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1667 20:09:38.238788  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1668 20:09:38.238840  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1669 20:09:38.238893  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1670 20:09:38.238945  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1671 20:09:38.238996  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1672 20:09:38.239048  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1673 20:09:38.239100  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1674 20:09:38.239153  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1675 20:09:38.239205  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1676 20:09:38.239257  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1677 20:09:38.239309  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1678 20:09:38.239361  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1679 20:09:38.239413  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1680 20:09:38.239465  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1681 20:09:38.239518  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1682 20:09:38.239570  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1683 20:09:38.239622  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1684 20:09:38.239675  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1685 20:09:38.239727  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1686 20:09:38.239779  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1687 20:09:38.239831  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1688 20:09:38.239883  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1689 20:09:38.239937  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1690 20:09:38.239989  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1691 20:09:38.240041  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1692 20:09:38.240093  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1693 20:09:38.240145  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1694 20:09:38.240197  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1695 20:09:38.240249  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1696 20:09:38.240497  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1697 20:09:38.240599  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 1698 20:09:38.240656  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 1699 20:09:38.240710  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 1700 20:09:38.240764  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 1701 20:09:38.240817  967 |3 6 7|[0] xxxxxxxx xxxoxoxx [MSB]

 1702 20:09:38.240869  968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]

 1703 20:09:38.240922  969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]

 1704 20:09:38.240975  970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]

 1705 20:09:38.241028  971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]

 1706 20:09:38.241080  972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]

 1707 20:09:38.241133  973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]

 1708 20:09:38.241185  974 |3 6 14|[0] xxxoxoox oooooooo [MSB]

 1709 20:09:38.241237  975 |3 6 15|[0] xxxoxoox oooooooo [MSB]

 1710 20:09:38.241332  976 |3 6 16|[0] xxxoxooo oooooooo [MSB]

 1711 20:09:38.241385  977 |3 6 17|[0] xoxooooo oooooooo [MSB]

 1712 20:09:38.241438  989 |3 6 29|[0] oooooooo oooooxoo [MSB]

 1713 20:09:38.241507  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 1714 20:09:38.241563  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 1715 20:09:38.241616  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 1716 20:09:38.241668  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 1717 20:09:38.241721  994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]

 1718 20:09:38.241773  995 |3 6 35|[0] oooooxoo xxxxxxxx [MSB]

 1719 20:09:38.241826  996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]

 1720 20:09:38.241878  997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]

 1721 20:09:38.241931  998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]

 1722 20:09:38.241983  999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1723 20:09:38.242036  Byte0, DQ PI dly=986, DQM PI dly= 986

 1724 20:09:38.242088  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)

 1725 20:09:38.242141  

 1726 20:09:38.242194  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)

 1727 20:09:38.242246  

 1728 20:09:38.242297  Byte1, DQ PI dly=978, DQM PI dly= 978

 1729 20:09:38.242349  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)

 1730 20:09:38.242400  

 1731 20:09:38.242451  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)

 1732 20:09:38.242503  

 1733 20:09:38.242554  ==

 1734 20:09:38.242606  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1735 20:09:38.242657  fsp= 1, odt_onoff= 1, Byte mode= 0

 1736 20:09:38.242709  ==

 1737 20:09:38.242760  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1738 20:09:38.242812  

 1739 20:09:38.242864  Begin, DQ Scan Range 954~1018

 1740 20:09:38.242916  Write Rank1 MR14 =0x0

 1741 20:09:38.242967  

 1742 20:09:38.243019  	CH=0, VrefRange= 0, VrefLevel = 0

 1743 20:09:38.243071  TX Bit0 (980~999) 20 989,   Bit8 (969~985) 17 977,

 1744 20:09:38.243124  TX Bit1 (979~998) 20 988,   Bit9 (970~985) 16 977,

 1745 20:09:38.243176  TX Bit2 (979~997) 19 988,   Bit10 (975~990) 16 982,

 1746 20:09:38.243228  TX Bit3 (974~991) 18 982,   Bit11 (968~985) 18 976,

 1747 20:09:38.243280  TX Bit4 (979~998) 20 988,   Bit12 (969~985) 17 977,

 1748 20:09:38.243332  TX Bit5 (977~991) 15 984,   Bit13 (969~984) 16 976,

 1749 20:09:38.243384  TX Bit6 (977~992) 16 984,   Bit14 (970~985) 16 977,

 1750 20:09:38.243436  TX Bit7 (978~994) 17 986,   Bit15 (973~988) 16 980,

 1751 20:09:38.243488  

 1752 20:09:38.243539  Write Rank1 MR14 =0x2

 1753 20:09:38.243590  

 1754 20:09:38.243641  	CH=0, VrefRange= 0, VrefLevel = 2

 1755 20:09:38.243693  TX Bit0 (980~999) 20 989,   Bit8 (969~985) 17 977,

 1756 20:09:38.243745  TX Bit1 (978~998) 21 988,   Bit9 (969~985) 17 977,

 1757 20:09:38.243796  TX Bit2 (979~997) 19 988,   Bit10 (975~990) 16 982,

 1758 20:09:38.243848  TX Bit3 (974~992) 19 983,   Bit11 (968~985) 18 976,

 1759 20:09:38.243900  TX Bit4 (979~998) 20 988,   Bit12 (969~986) 18 977,

 1760 20:09:38.243952  TX Bit5 (976~991) 16 983,   Bit13 (969~984) 16 976,

 1761 20:09:38.244004  TX Bit6 (977~993) 17 985,   Bit14 (969~985) 17 977,

 1762 20:09:38.244056  TX Bit7 (978~995) 18 986,   Bit15 (974~989) 16 981,

 1763 20:09:38.244108  

 1764 20:09:38.244160  Write Rank1 MR14 =0x4

 1765 20:09:38.244211  

 1766 20:09:38.244262  	CH=0, VrefRange= 0, VrefLevel = 4

 1767 20:09:38.244314  TX Bit0 (979~999) 21 989,   Bit8 (969~986) 18 977,

 1768 20:09:38.244366  TX Bit1 (978~998) 21 988,   Bit9 (969~986) 18 977,

 1769 20:09:38.244418  TX Bit2 (979~998) 20 988,   Bit10 (975~990) 16 982,

 1770 20:09:38.244470  TX Bit3 (973~992) 20 982,   Bit11 (968~986) 19 977,

 1771 20:09:38.244521  TX Bit4 (978~998) 21 988,   Bit12 (969~986) 18 977,

 1772 20:09:38.244573  TX Bit5 (976~991) 16 983,   Bit13 (969~985) 17 977,

 1773 20:09:38.244625  TX Bit6 (976~993) 18 984,   Bit14 (969~986) 18 977,

 1774 20:09:38.244677  TX Bit7 (978~995) 18 986,   Bit15 (972~989) 18 980,

 1775 20:09:38.244729  

 1776 20:09:38.244780  Write Rank1 MR14 =0x6

 1777 20:09:38.244832  

 1778 20:09:38.244884  	CH=0, VrefRange= 0, VrefLevel = 6

 1779 20:09:38.244935  TX Bit0 (979~999) 21 989,   Bit8 (968~986) 19 977,

 1780 20:09:38.245005  TX Bit1 (978~998) 21 988,   Bit9 (969~987) 19 978,

 1781 20:09:38.245058  TX Bit2 (978~998) 21 988,   Bit10 (974~991) 18 982,

 1782 20:09:38.245112  TX Bit3 (973~993) 21 983,   Bit11 (968~986) 19 977,

 1783 20:09:38.245163  TX Bit4 (978~998) 21 988,   Bit12 (969~987) 19 978,

 1784 20:09:38.245216  TX Bit5 (976~992) 17 984,   Bit13 (968~985) 18 976,

 1785 20:09:38.245275  TX Bit6 (976~994) 19 985,   Bit14 (969~986) 18 977,

 1786 20:09:38.245366  TX Bit7 (978~996) 19 987,   Bit15 (972~989) 18 980,

 1787 20:09:38.245417  

 1788 20:09:38.245468  Write Rank1 MR14 =0x8

 1789 20:09:38.245520  

 1790 20:09:38.245571  	CH=0, VrefRange= 0, VrefLevel = 8

 1791 20:09:38.245623  TX Bit0 (979~1000) 22 989,   Bit8 (969~987) 19 978,

 1792 20:09:38.245675  TX Bit1 (978~999) 22 988,   Bit9 (969~989) 21 979,

 1793 20:09:38.245727  TX Bit2 (978~998) 21 988,   Bit10 (974~991) 18 982,

 1794 20:09:38.245779  TX Bit3 (972~993) 22 982,   Bit11 (968~987) 20 977,

 1795 20:09:38.245831  TX Bit4 (978~999) 22 988,   Bit12 (968~988) 21 978,

 1796 20:09:38.245883  TX Bit5 (975~992) 18 983,   Bit13 (968~985) 18 976,

 1797 20:09:38.245935  TX Bit6 (976~994) 19 985,   Bit14 (969~987) 19 978,

 1798 20:09:38.245987  TX Bit7 (978~997) 20 987,   Bit15 (972~990) 19 981,

 1799 20:09:38.246040  

 1800 20:09:38.246092  Write Rank1 MR14 =0xa

 1801 20:09:38.246144  

 1802 20:09:38.246195  	CH=0, VrefRange= 0, VrefLevel = 10

 1803 20:09:38.246247  TX Bit0 (979~1000) 22 989,   Bit8 (968~988) 21 978,

 1804 20:09:38.246489  TX Bit1 (978~999) 22 988,   Bit9 (969~989) 21 979,

 1805 20:09:38.246547  TX Bit2 (978~999) 22 988,   Bit10 (973~991) 19 982,

 1806 20:09:38.246600  TX Bit3 (972~993) 22 982,   Bit11 (968~987) 20 977,

 1807 20:09:38.246652  TX Bit4 (978~999) 22 988,   Bit12 (968~989) 22 978,

 1808 20:09:38.246704  TX Bit5 (975~993) 19 984,   Bit13 (968~986) 19 977,

 1809 20:09:38.246756  TX Bit6 (975~995) 21 985,   Bit14 (968~988) 21 978,

 1810 20:09:38.246809  TX Bit7 (977~997) 21 987,   Bit15 (971~990) 20 980,

 1811 20:09:38.246860  

 1812 20:09:38.246911  Write Rank1 MR14 =0xc

 1813 20:09:38.246962  

 1814 20:09:38.247014  	CH=0, VrefRange= 0, VrefLevel = 12

 1815 20:09:38.247065  TX Bit0 (978~1000) 23 989,   Bit8 (968~988) 21 978,

 1816 20:09:38.247117  TX Bit1 (978~999) 22 988,   Bit9 (968~989) 22 978,

 1817 20:09:38.247168  TX Bit2 (978~999) 22 988,   Bit10 (973~991) 19 982,

 1818 20:09:38.247220  TX Bit3 (971~994) 24 982,   Bit11 (968~988) 21 978,

 1819 20:09:38.247271  TX Bit4 (978~999) 22 988,   Bit12 (968~989) 22 978,

 1820 20:09:38.247323  TX Bit5 (974~993) 20 983,   Bit13 (968~987) 20 977,

 1821 20:09:38.247375  TX Bit6 (975~996) 22 985,   Bit14 (968~989) 22 978,

 1822 20:09:38.247426  TX Bit7 (977~997) 21 987,   Bit15 (971~990) 20 980,

 1823 20:09:38.247478  

 1824 20:09:38.247529  Write Rank1 MR14 =0xe

 1825 20:09:38.247580  

 1826 20:09:38.247631  	CH=0, VrefRange= 0, VrefLevel = 14

 1827 20:09:38.247682  TX Bit0 (978~1001) 24 989,   Bit8 (968~989) 22 978,

 1828 20:09:38.247734  TX Bit1 (978~999) 22 988,   Bit9 (969~989) 21 979,

 1829 20:09:38.247786  TX Bit2 (978~999) 22 988,   Bit10 (972~992) 21 982,

 1830 20:09:38.247838  TX Bit3 (971~994) 24 982,   Bit11 (967~989) 23 978,

 1831 20:09:38.247890  TX Bit4 (978~1000) 23 989,   Bit12 (968~989) 22 978,

 1832 20:09:38.247942  TX Bit5 (974~993) 20 983,   Bit13 (968~987) 20 977,

 1833 20:09:38.247994  TX Bit6 (975~996) 22 985,   Bit14 (968~989) 22 978,

 1834 20:09:38.248046  TX Bit7 (977~998) 22 987,   Bit15 (970~990) 21 980,

 1835 20:09:38.248099  

 1836 20:09:38.248150  Write Rank1 MR14 =0x10

 1837 20:09:38.248201  

 1838 20:09:38.248252  	CH=0, VrefRange= 0, VrefLevel = 16

 1839 20:09:38.248304  TX Bit0 (978~1001) 24 989,   Bit8 (968~989) 22 978,

 1840 20:09:38.248355  TX Bit1 (977~1000) 24 988,   Bit9 (968~990) 23 979,

 1841 20:09:38.248407  TX Bit2 (978~1000) 23 989,   Bit10 (972~992) 21 982,

 1842 20:09:38.248459  TX Bit3 (971~995) 25 983,   Bit11 (967~989) 23 978,

 1843 20:09:38.248530  TX Bit4 (977~1000) 24 988,   Bit12 (968~989) 22 978,

 1844 20:09:38.248585  TX Bit5 (974~994) 21 984,   Bit13 (967~988) 22 977,

 1845 20:09:38.248638  TX Bit6 (974~997) 24 985,   Bit14 (968~989) 22 978,

 1846 20:09:38.248690  TX Bit7 (976~998) 23 987,   Bit15 (970~991) 22 980,

 1847 20:09:38.248741  

 1848 20:09:38.248793  Write Rank1 MR14 =0x12

 1849 20:09:38.248845  

 1850 20:09:38.248896  	CH=0, VrefRange= 0, VrefLevel = 18

 1851 20:09:38.248948  TX Bit0 (978~1002) 25 990,   Bit8 (967~989) 23 978,

 1852 20:09:38.249000  TX Bit1 (977~1000) 24 988,   Bit9 (968~990) 23 979,

 1853 20:09:38.249052  TX Bit2 (978~1000) 23 989,   Bit10 (972~993) 22 982,

 1854 20:09:38.249104  TX Bit3 (971~996) 26 983,   Bit11 (967~989) 23 978,

 1855 20:09:38.249156  TX Bit4 (977~1000) 24 988,   Bit12 (968~990) 23 979,

 1856 20:09:38.249209  TX Bit5 (973~995) 23 984,   Bit13 (967~989) 23 978,

 1857 20:09:38.249270  TX Bit6 (973~997) 25 985,   Bit14 (968~990) 23 979,

 1858 20:09:38.249387  TX Bit7 (976~999) 24 987,   Bit15 (970~991) 22 980,

 1859 20:09:38.249439  

 1860 20:09:38.249491  Write Rank1 MR14 =0x14

 1861 20:09:38.249542  

 1862 20:09:38.249593  	CH=0, VrefRange= 0, VrefLevel = 20

 1863 20:09:38.249644  TX Bit0 (978~1002) 25 990,   Bit8 (967~990) 24 978,

 1864 20:09:38.249697  TX Bit1 (977~1000) 24 988,   Bit9 (968~990) 23 979,

 1865 20:09:38.249749  TX Bit2 (977~1000) 24 988,   Bit10 (972~993) 22 982,

 1866 20:09:38.249800  TX Bit3 (970~996) 27 983,   Bit11 (967~989) 23 978,

 1867 20:09:38.249852  TX Bit4 (977~1001) 25 989,   Bit12 (967~990) 24 978,

 1868 20:09:38.249904  TX Bit5 (972~995) 24 983,   Bit13 (966~989) 24 977,

 1869 20:09:38.249956  TX Bit6 (973~998) 26 985,   Bit14 (967~990) 24 978,

 1870 20:09:38.250007  TX Bit7 (976~999) 24 987,   Bit15 (969~991) 23 980,

 1871 20:09:38.250060  

 1872 20:09:38.250111  Write Rank1 MR14 =0x16

 1873 20:09:38.250162  

 1874 20:09:38.250213  	CH=0, VrefRange= 0, VrefLevel = 22

 1875 20:09:38.250265  TX Bit0 (978~1003) 26 990,   Bit8 (967~990) 24 978,

 1876 20:09:38.250317  TX Bit1 (977~1001) 25 989,   Bit9 (968~990) 23 979,

 1877 20:09:38.250369  TX Bit2 (977~1000) 24 988,   Bit10 (970~993) 24 981,

 1878 20:09:38.250421  TX Bit3 (970~996) 27 983,   Bit11 (967~990) 24 978,

 1879 20:09:38.250473  TX Bit4 (977~1001) 25 989,   Bit12 (968~990) 23 979,

 1880 20:09:38.250525  TX Bit5 (972~996) 25 984,   Bit13 (967~989) 23 978,

 1881 20:09:38.250578  TX Bit6 (972~998) 27 985,   Bit14 (967~990) 24 978,

 1882 20:09:38.250629  TX Bit7 (976~999) 24 987,   Bit15 (969~991) 23 980,

 1883 20:09:38.250681  

 1884 20:09:38.250732  Write Rank1 MR14 =0x18

 1885 20:09:38.250784  

 1886 20:09:38.250835  	CH=0, VrefRange= 0, VrefLevel = 24

 1887 20:09:38.250887  TX Bit0 (978~1003) 26 990,   Bit8 (967~990) 24 978,

 1888 20:09:38.250939  TX Bit1 (977~1001) 25 989,   Bit9 (968~990) 23 979,

 1889 20:09:38.250991  TX Bit2 (977~1000) 24 988,   Bit10 (970~993) 24 981,

 1890 20:09:38.251043  TX Bit3 (970~996) 27 983,   Bit11 (967~990) 24 978,

 1891 20:09:38.251094  TX Bit4 (977~1001) 25 989,   Bit12 (968~990) 23 979,

 1892 20:09:38.251146  TX Bit5 (972~996) 25 984,   Bit13 (967~989) 23 978,

 1893 20:09:38.251199  TX Bit6 (972~998) 27 985,   Bit14 (967~990) 24 978,

 1894 20:09:38.251251  TX Bit7 (976~999) 24 987,   Bit15 (969~991) 23 980,

 1895 20:09:38.251303  

 1896 20:09:38.251354  Write Rank1 MR14 =0x1a

 1897 20:09:38.251424  

 1898 20:09:38.251478  	CH=0, VrefRange= 0, VrefLevel = 26

 1899 20:09:38.251530  TX Bit0 (978~1003) 26 990,   Bit8 (967~990) 24 978,

 1900 20:09:38.251582  TX Bit1 (977~1001) 25 989,   Bit9 (968~990) 23 979,

 1901 20:09:38.251635  TX Bit2 (977~1000) 24 988,   Bit10 (970~993) 24 981,

 1902 20:09:38.251687  TX Bit3 (970~996) 27 983,   Bit11 (967~990) 24 978,

 1903 20:09:38.251928  TX Bit4 (977~1001) 25 989,   Bit12 (968~990) 23 979,

 1904 20:09:38.251986  TX Bit5 (972~996) 25 984,   Bit13 (967~989) 23 978,

 1905 20:09:38.252039  TX Bit6 (972~998) 27 985,   Bit14 (967~990) 24 978,

 1906 20:09:38.252091  TX Bit7 (976~999) 24 987,   Bit15 (969~991) 23 980,

 1907 20:09:38.488360  

 1908 20:09:38.488879  Write Rank1 MR14 =0x1c

 1909 20:09:38.489245  

 1910 20:09:38.489640  	CH=0, VrefRange= 0, VrefLevel = 28

 1911 20:09:38.489973  TX Bit0 (978~1003) 26 990,   Bit8 (967~990) 24 978,

 1912 20:09:38.490369  TX Bit1 (977~1001) 25 989,   Bit9 (968~990) 23 979,

 1913 20:09:38.490747  TX Bit2 (977~1000) 24 988,   Bit10 (970~993) 24 981,

 1914 20:09:38.491138  TX Bit3 (970~996) 27 983,   Bit11 (967~990) 24 978,

 1915 20:09:38.491477  TX Bit4 (977~1001) 25 989,   Bit12 (968~990) 23 979,

 1916 20:09:38.491796  TX Bit5 (972~996) 25 984,   Bit13 (967~989) 23 978,

 1917 20:09:38.492102  TX Bit6 (972~998) 27 985,   Bit14 (967~990) 24 978,

 1918 20:09:38.492406  TX Bit7 (976~999) 24 987,   Bit15 (969~991) 23 980,

 1919 20:09:38.492683  

 1920 20:09:38.492955  Write Rank1 MR14 =0x1e

 1921 20:09:38.493224  

 1922 20:09:38.493539  	CH=0, VrefRange= 0, VrefLevel = 30

 1923 20:09:38.493907  TX Bit0 (978~1003) 26 990,   Bit8 (967~990) 24 978,

 1924 20:09:38.494195  TX Bit1 (977~1001) 25 989,   Bit9 (968~990) 23 979,

 1925 20:09:38.494469  TX Bit2 (977~1000) 24 988,   Bit10 (970~993) 24 981,

 1926 20:09:38.494745  TX Bit3 (970~996) 27 983,   Bit11 (967~990) 24 978,

 1927 20:09:38.495018  TX Bit4 (977~1001) 25 989,   Bit12 (968~990) 23 979,

 1928 20:09:38.495288  TX Bit5 (972~996) 25 984,   Bit13 (967~989) 23 978,

 1929 20:09:38.495556  TX Bit6 (972~998) 27 985,   Bit14 (967~990) 24 978,

 1930 20:09:38.495827  TX Bit7 (976~999) 24 987,   Bit15 (969~991) 23 980,

 1931 20:09:38.496097  

 1932 20:09:38.496359  

 1933 20:09:38.496710  TX Vref found, early break! 369< 371

 1934 20:09:38.497011  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 1935 20:09:38.497461  u1DelayCellOfst[0]=8 cells (7 PI)

 1936 20:09:38.497765  u1DelayCellOfst[1]=7 cells (6 PI)

 1937 20:09:38.498300  u1DelayCellOfst[2]=6 cells (5 PI)

 1938 20:09:38.498623  u1DelayCellOfst[3]=0 cells (0 PI)

 1939 20:09:38.498901  u1DelayCellOfst[4]=7 cells (6 PI)

 1940 20:09:38.499176  u1DelayCellOfst[5]=1 cells (1 PI)

 1941 20:09:38.499447  u1DelayCellOfst[6]=2 cells (2 PI)

 1942 20:09:38.499719  u1DelayCellOfst[7]=5 cells (4 PI)

 1943 20:09:38.499987  Byte0, DQ PI dly=983, DQM PI dly= 986

 1944 20:09:38.500356  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)

 1945 20:09:38.500638  

 1946 20:09:38.500908  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)

 1947 20:09:38.501179  

 1948 20:09:38.501481  u1DelayCellOfst[8]=0 cells (0 PI)

 1949 20:09:38.501755  u1DelayCellOfst[9]=1 cells (1 PI)

 1950 20:09:38.502023  u1DelayCellOfst[10]=3 cells (3 PI)

 1951 20:09:38.502290  u1DelayCellOfst[11]=0 cells (0 PI)

 1952 20:09:38.502559  u1DelayCellOfst[12]=1 cells (1 PI)

 1953 20:09:38.502827  u1DelayCellOfst[13]=0 cells (0 PI)

 1954 20:09:38.503096  u1DelayCellOfst[14]=0 cells (0 PI)

 1955 20:09:38.503361  u1DelayCellOfst[15]=2 cells (2 PI)

 1956 20:09:38.503651  Byte1, DQ PI dly=978, DQM PI dly= 979

 1957 20:09:38.504108  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)

 1958 20:09:38.504397  

 1959 20:09:38.504667  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)

 1960 20:09:38.504941  

 1961 20:09:38.505225  Write Rank1 MR14 =0x16

 1962 20:09:38.505572  

 1963 20:09:38.505845  Final TX Range 0 Vref 22

 1964 20:09:38.506114  

 1965 20:09:38.506382  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 1966 20:09:38.506718  

 1967 20:09:38.507029  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 1968 20:09:38.507371  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1969 20:09:38.507663  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1970 20:09:38.507941  Write Rank1 MR3 =0xb0

 1971 20:09:38.508211  DramC Write-DBI on

 1972 20:09:38.508480  ==

 1973 20:09:38.508748  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1974 20:09:38.509022  fsp= 1, odt_onoff= 1, Byte mode= 0

 1975 20:09:38.509325  ==

 1976 20:09:38.509605  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 1977 20:09:38.509881  

 1978 20:09:38.510236  Begin, DQ Scan Range 699~763

 1979 20:09:38.510519  

 1980 20:09:38.510827  

 1981 20:09:38.511100  	TX Vref Scan disable

 1982 20:09:38.511370  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1983 20:09:38.511647  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1984 20:09:38.511926  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1985 20:09:38.512202  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1986 20:09:38.512475  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1987 20:09:38.512745  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1988 20:09:38.513019  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1989 20:09:38.513354  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1990 20:09:38.513585  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 1991 20:09:38.513785  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 1992 20:09:38.513978  709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 1993 20:09:38.514170  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 1994 20:09:38.514364  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 1995 20:09:38.514557  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 1996 20:09:38.514751  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 1997 20:09:38.515039  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 1998 20:09:38.515332  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 1999 20:09:38.515539  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 2000 20:09:38.515737  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 2001 20:09:38.515934  735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]

 2002 20:09:38.516128  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 2003 20:09:38.516321  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 2004 20:09:38.516515  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 2005 20:09:38.516711  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 2006 20:09:38.516920  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 2007 20:09:38.517253  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 2008 20:09:38.517486  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 2009 20:09:38.517686  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 2010 20:09:38.517882  744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]

 2011 20:09:38.518076  745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]

 2012 20:09:38.518274  Byte0, DQ PI dly=731, DQM PI dly= 731

 2013 20:09:38.518419  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)

 2014 20:09:38.518566  

 2015 20:09:38.518986  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)

 2016 20:09:38.519153  

 2017 20:09:38.519302  Byte1, DQ PI dly=722, DQM PI dly= 722

 2018 20:09:38.519449  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)

 2019 20:09:38.519598  

 2020 20:09:38.519742  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)

 2021 20:09:38.519889  

 2022 20:09:38.520035  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 2023 20:09:38.520213  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2024 20:09:38.520376  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2025 20:09:38.520524  Write Rank1 MR3 =0x30

 2026 20:09:38.520669  DramC Write-DBI off

 2027 20:09:38.520813  

 2028 20:09:38.520957  [DATLAT]

 2029 20:09:38.521102  Freq=1600, CH0 RK1, use_rxtx_scan=0

 2030 20:09:38.521248  

 2031 20:09:38.521414  DATLAT Default: 0x10

 2032 20:09:38.521558  7, 0xFFFF, sum=0

 2033 20:09:38.521707  8, 0xFFFF, sum=0

 2034 20:09:38.521858  9, 0xFFFF, sum=0

 2035 20:09:38.522006  10, 0xFFFF, sum=0

 2036 20:09:38.522153  11, 0xFFFF, sum=0

 2037 20:09:38.522300  12, 0xFFFF, sum=0

 2038 20:09:38.522448  13, 0xFFFF, sum=0

 2039 20:09:38.522597  14, 0x0, sum=1

 2040 20:09:38.522743  15, 0x0, sum=2

 2041 20:09:38.522895  16, 0x0, sum=3

 2042 20:09:38.523043  17, 0x0, sum=4

 2043 20:09:38.523188  pattern=2 first_step=14 total pass=5 best_step=16

 2044 20:09:38.523369  ==

 2045 20:09:38.523499  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2046 20:09:38.523619  fsp= 1, odt_onoff= 1, Byte mode= 0

 2047 20:09:38.523736  ==

 2048 20:09:38.523853  Start DQ dly to find pass range UseTestEngine =1

 2049 20:09:38.523972  x-axis: bit #, y-axis: DQ dly (-127~63)

 2050 20:09:38.524090  RX Vref Scan = 0

 2051 20:09:38.524205  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2052 20:09:38.524325  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2053 20:09:38.524445  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2054 20:09:38.524564  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2055 20:09:38.524699  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2056 20:09:38.524880  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2057 20:09:38.525083  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2058 20:09:38.525300  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2059 20:09:38.525497  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2060 20:09:38.525682  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2061 20:09:38.525866  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2062 20:09:38.526051  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2063 20:09:38.526235  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2064 20:09:38.526421  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2065 20:09:38.526606  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2066 20:09:38.526790  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2067 20:09:38.526974  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2068 20:09:38.527158  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2069 20:09:38.527342  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2070 20:09:38.527526  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2071 20:09:38.527709  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2072 20:09:38.527892  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2073 20:09:38.528076  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 2074 20:09:38.528271  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 2075 20:09:38.528424  -2, [0] xxxoxxxx xxxxxxxx [MSB]

 2076 20:09:38.528576  -1, [0] xxxoxxxx xxxxxoxx [MSB]

 2077 20:09:38.528729  0, [0] xxxoxxxx oxxxxoxx [MSB]

 2078 20:09:38.528883  1, [0] xxxoxoxx ooxoxoox [MSB]

 2079 20:09:38.529037  2, [0] xxxoxooo ooxoooox [MSB]

 2080 20:09:38.529191  3, [0] xxxoxooo ooxooooo [MSB]

 2081 20:09:38.529358  4, [0] xxxoxooo ooxooooo [MSB]

 2082 20:09:38.529523  5, [0] xxxooooo ooxooooo [MSB]

 2083 20:09:38.529680  6, [0] xxxooooo oooooooo [MSB]

 2084 20:09:38.529835  7, [0] xooooooo oooooooo [MSB]

 2085 20:09:38.529989  34, [0] oooxoooo oooxoooo [MSB]

 2086 20:09:38.530135  35, [0] oooxoxoo oooxoxoo [MSB]

 2087 20:09:38.530239  36, [0] oooxoxxo oooxoxoo [MSB]

 2088 20:09:38.530339  37, [0] oooxoxxx xooxxxxo [MSB]

 2089 20:09:38.530443  38, [0] oooxoxxx xxoxxxxo [MSB]

 2090 20:09:38.530543  39, [0] oooxoxxx xxoxxxxx [MSB]

 2091 20:09:38.530642  40, [0] oooxoxxx xxoxxxxx [MSB]

 2092 20:09:38.530741  41, [0] oooxxxxx xxoxxxxx [MSB]

 2093 20:09:38.530840  42, [0] oooxxxxx xxxxxxxx [MSB]

 2094 20:09:38.530940  43, [0] oxxxxxxx xxxxxxxx [MSB]

 2095 20:09:38.531039  44, [0] xxxxxxxx xxxxxxxx [MSB]

 2096 20:09:38.531138  iDelay=44, Bit 0, Center 25 (8 ~ 43) 36

 2097 20:09:38.531235  iDelay=44, Bit 1, Center 24 (7 ~ 42) 36

 2098 20:09:38.531332  iDelay=44, Bit 2, Center 24 (7 ~ 42) 36

 2099 20:09:38.531429  iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36

 2100 20:09:38.531526  iDelay=44, Bit 4, Center 22 (5 ~ 40) 36

 2101 20:09:38.531623  iDelay=44, Bit 5, Center 17 (1 ~ 34) 34

 2102 20:09:38.531720  iDelay=44, Bit 6, Center 18 (2 ~ 35) 34

 2103 20:09:38.531817  iDelay=44, Bit 7, Center 19 (2 ~ 36) 35

 2104 20:09:38.531914  iDelay=44, Bit 8, Center 18 (0 ~ 36) 37

 2105 20:09:38.532011  iDelay=44, Bit 9, Center 19 (1 ~ 37) 37

 2106 20:09:38.532108  iDelay=44, Bit 10, Center 23 (6 ~ 41) 36

 2107 20:09:38.532206  iDelay=44, Bit 11, Center 17 (1 ~ 33) 33

 2108 20:09:38.532303  iDelay=44, Bit 12, Center 19 (2 ~ 36) 35

 2109 20:09:38.532400  iDelay=44, Bit 13, Center 16 (-1 ~ 34) 36

 2110 20:09:38.532497  iDelay=44, Bit 14, Center 18 (1 ~ 36) 36

 2111 20:09:38.532593  iDelay=44, Bit 15, Center 20 (3 ~ 38) 36

 2112 20:09:38.532690  ==

 2113 20:09:38.532786  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2114 20:09:38.532885  fsp= 1, odt_onoff= 1, Byte mode= 0

 2115 20:09:38.532983  ==

 2116 20:09:38.533080  DQS Delay:

 2117 20:09:38.533175  DQS0 = 0, DQS1 = 0

 2118 20:09:38.533292  DQM Delay:

 2119 20:09:38.533406  DQM0 = 20, DQM1 = 18

 2120 20:09:38.533495  DQ Delay:

 2121 20:09:38.533579  DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15

 2122 20:09:38.533662  DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19

 2123 20:09:38.533745  DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17

 2124 20:09:38.533828  DQ12 =19, DQ13 =16, DQ14 =18, DQ15 =20

 2125 20:09:38.533912  

 2126 20:09:38.533995  

 2127 20:09:38.534077  

 2128 20:09:38.534160  [DramC_TX_OE_Calibration] TA2

 2129 20:09:38.534244  Original DQ_B0 (3 6) =30, OEN = 27

 2130 20:09:38.534328  Original DQ_B1 (3 6) =30, OEN = 27

 2131 20:09:38.534411  23, 0x0, End_B0=23 End_B1=23

 2132 20:09:38.534497  24, 0x0, End_B0=24 End_B1=24

 2133 20:09:38.534582  25, 0x0, End_B0=25 End_B1=25

 2134 20:09:38.534667  26, 0x0, End_B0=26 End_B1=26

 2135 20:09:38.534751  27, 0x0, End_B0=27 End_B1=27

 2136 20:09:38.534836  28, 0x0, End_B0=28 End_B1=28

 2137 20:09:38.534920  29, 0x0, End_B0=29 End_B1=29

 2138 20:09:38.535003  30, 0x0, End_B0=30 End_B1=30

 2139 20:09:38.535088  31, 0xFFFF, End_B0=30 End_B1=30

 2140 20:09:38.535173  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2141 20:09:38.535258  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2142 20:09:38.535342  

 2143 20:09:38.535425  

 2144 20:09:38.535507  Write Rank1 MR23 =0x3f

 2145 20:09:38.535592  [DQSOSC]

 2146 20:09:38.535676  [DQSOSCAuto] RK1, (LSB)MR18= 0x7c, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps

 2147 20:09:38.535978  CH0_RK1: MR19=0x3, MR18=0x7C, DQSOSC=353, MR23=63, INC=19, DEC=29

 2148 20:09:38.536072  Write Rank1 MR23 =0x3f

 2149 20:09:38.536157  [DQSOSC]

 2150 20:09:38.536241  [DQSOSCAuto] RK1, (LSB)MR18= 0x7d, (MSB)MR19= 0x3, tDQSOscB0 = 352 ps tDQSOscB1 = 0 ps

 2151 20:09:38.536326  CH0 RK1: MR19=3, MR18=7D

 2152 20:09:38.536415  [RxdqsGatingPostProcess] freq 1600

 2153 20:09:38.536529  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 2154 20:09:38.536616  Rank: 0

 2155 20:09:38.536701  best DQS0 dly(2T, 0.5T) = (2, 5)

 2156 20:09:38.536784  best DQS1 dly(2T, 0.5T) = (2, 5)

 2157 20:09:38.536867  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 2158 20:09:38.536950  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 2159 20:09:38.537034  Rank: 1

 2160 20:09:38.537117  best DQS0 dly(2T, 0.5T) = (2, 6)

 2161 20:09:38.537200  best DQS1 dly(2T, 0.5T) = (2, 6)

 2162 20:09:38.537291  best DQS0 P1 dly(2T, 0.5T) = (3, 2)

 2163 20:09:38.537376  best DQS1 P1 dly(2T, 0.5T) = (3, 2)

 2164 20:09:38.537459  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 2165 20:09:38.537567  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 2166 20:09:38.537657  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 2167 20:09:38.537742  Write Rank0 MR13 =0x59

 2168 20:09:38.537826  ==

 2169 20:09:38.537909  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2170 20:09:38.537993  fsp= 1, odt_onoff= 1, Byte mode= 0

 2171 20:09:38.538076  ==

 2172 20:09:38.538159  === u2Vref_new: 0x56 --> 0x3a

 2173 20:09:38.538254  === u2Vref_new: 0x58 --> 0x58

 2174 20:09:38.538328  === u2Vref_new: 0x5a --> 0x5a

 2175 20:09:38.538402  === u2Vref_new: 0x5c --> 0x78

 2176 20:09:38.538475  === u2Vref_new: 0x5e --> 0x7a

 2177 20:09:38.538549  === u2Vref_new: 0x60 --> 0x90

 2178 20:09:38.538622  [CA 0] Center 36 (9~63) winsize 55

 2179 20:09:38.538696  [CA 1] Center 34 (6~63) winsize 58

 2180 20:09:38.538769  [CA 2] Center 32 (3~61) winsize 59

 2181 20:09:38.538842  [CA 3] Center 33 (3~63) winsize 61

 2182 20:09:38.538914  [CA 4] Center 33 (3~63) winsize 61

 2183 20:09:38.538988  [CA 5] Center 25 (-2~52) winsize 55

 2184 20:09:38.539061  

 2185 20:09:38.539134  [CATrainingPosCal] consider 1 rank data

 2186 20:09:38.539207  u2DelayCellTimex100 = 762/100 ps

 2187 20:09:38.539280  CA0 delay=36 (9~63),Diff = 11 PI (14 cell)

 2188 20:09:38.539353  CA1 delay=34 (6~63),Diff = 9 PI (11 cell)

 2189 20:09:38.539427  CA2 delay=32 (3~61),Diff = 7 PI (8 cell)

 2190 20:09:38.539500  CA3 delay=33 (3~63),Diff = 8 PI (10 cell)

 2191 20:09:38.539574  CA4 delay=33 (3~63),Diff = 8 PI (10 cell)

 2192 20:09:38.539647  CA5 delay=25 (-2~52),Diff = 0 PI (0 cell)

 2193 20:09:38.539721  

 2194 20:09:38.539794  CA PerBit enable=1, Macro0, CA PI delay=25

 2195 20:09:38.539867  === u2Vref_new: 0x56 --> 0x3a

 2196 20:09:38.539940  

 2197 20:09:38.540012  Vref(ca) range 1: 22

 2198 20:09:38.540085  

 2199 20:09:38.540185  CS Dly= 10 (41-0-32)

 2200 20:09:38.540262  Write Rank0 MR13 =0xd8

 2201 20:09:38.540335  Write Rank0 MR13 =0xd8

 2202 20:09:38.540408  Write Rank0 MR12 =0x56

 2203 20:09:38.540480  Write Rank1 MR13 =0x59

 2204 20:09:38.540553  ==

 2205 20:09:38.540625  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 2206 20:09:38.540699  fsp= 1, odt_onoff= 1, Byte mode= 0

 2207 20:09:38.540772  ==

 2208 20:09:38.540845  === u2Vref_new: 0x56 --> 0x3a

 2209 20:09:38.540918  === u2Vref_new: 0x58 --> 0x58

 2210 20:09:38.540991  === u2Vref_new: 0x5a --> 0x5a

 2211 20:09:38.541064  === u2Vref_new: 0x5c --> 0x78

 2212 20:09:38.541137  === u2Vref_new: 0x5e --> 0x7a

 2213 20:09:38.541210  === u2Vref_new: 0x60 --> 0x90

 2214 20:09:38.541293  [CA 0] Center 36 (9~63) winsize 55

 2215 20:09:38.541369  [CA 1] Center 35 (7~63) winsize 57

 2216 20:09:38.541442  [CA 2] Center 32 (3~62) winsize 60

 2217 20:09:38.541515  [CA 3] Center 32 (3~62) winsize 60

 2218 20:09:38.541587  [CA 4] Center 33 (4~63) winsize 60

 2219 20:09:38.541660  [CA 5] Center 26 (-1~53) winsize 55

 2220 20:09:38.541732  

 2221 20:09:38.541805  [CATrainingPosCal] consider 2 rank data

 2222 20:09:38.541878  u2DelayCellTimex100 = 762/100 ps

 2223 20:09:38.541952  CA0 delay=36 (9~63),Diff = 11 PI (14 cell)

 2224 20:09:38.542025  CA1 delay=35 (7~63),Diff = 10 PI (12 cell)

 2225 20:09:38.542098  CA2 delay=32 (3~61),Diff = 7 PI (8 cell)

 2226 20:09:38.542171  CA3 delay=32 (3~62),Diff = 7 PI (8 cell)

 2227 20:09:38.542244  CA4 delay=33 (4~63),Diff = 8 PI (10 cell)

 2228 20:09:38.542317  CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)

 2229 20:09:38.542390  

 2230 20:09:38.542463  CA PerBit enable=1, Macro0, CA PI delay=25

 2231 20:09:38.542536  === u2Vref_new: 0x58 --> 0x58

 2232 20:09:38.542610  

 2233 20:09:38.542682  Vref(ca) range 1: 24

 2234 20:09:38.542755  

 2235 20:09:38.542827  CS Dly= 11 (42-0-32)

 2236 20:09:38.542900  Write Rank1 MR13 =0xd8

 2237 20:09:38.542973  Write Rank1 MR13 =0xd8

 2238 20:09:38.543045  Write Rank1 MR12 =0x58

 2239 20:09:38.543118  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2240 20:09:38.543191  Write Rank0 MR2 =0xad

 2241 20:09:38.543293  [Write Leveling]

 2242 20:09:38.543363  delay  byte0  byte1  byte2  byte3

 2243 20:09:38.543429  

 2244 20:09:38.543494  10    0   0   

 2245 20:09:38.543561  11    0   0   

 2246 20:09:38.543627  12    0   0   

 2247 20:09:38.543693  13    0   0   

 2248 20:09:38.543758  14    0   0   

 2249 20:09:38.543824  15    0   0   

 2250 20:09:38.543889  16    0   0   

 2251 20:09:38.543954  17    0   0   

 2252 20:09:38.544018  18    0   0   

 2253 20:09:38.544083  19    0   0   

 2254 20:09:38.544148  20    0   0   

 2255 20:09:38.544214  21    0   0   

 2256 20:09:38.544279  22    0   0   

 2257 20:09:38.544344  23    0   0   

 2258 20:09:38.544409  24    0   0   

 2259 20:09:38.544475  25    0   0   

 2260 20:09:38.544540  26    0   0   

 2261 20:09:38.544606  27    0   0   

 2262 20:09:38.544671  28    0   0   

 2263 20:09:38.544737  29    0   0   

 2264 20:09:38.544803  30    0   0   

 2265 20:09:38.544867  31    0   ff   

 2266 20:09:38.544933  32    0   ff   

 2267 20:09:38.544998  33    0   ff   

 2268 20:09:38.545063  34    ff   ff   

 2269 20:09:38.545129  35    ff   ff   

 2270 20:09:38.545195  36    ff   ff   

 2271 20:09:38.545266  37    ff   ff   

 2272 20:09:38.545334  38    ff   ff   

 2273 20:09:38.545399  39    ff   ff   

 2274 20:09:38.545465  40    ff   ff   

 2275 20:09:38.545531  pass bytecount = 0xff (0xff: all bytes pass) 

 2276 20:09:38.545596  

 2277 20:09:38.545661  DQS0 dly: 34

 2278 20:09:38.545725  DQS1 dly: 31

 2279 20:09:38.545790  Write Rank0 MR2 =0x2d

 2280 20:09:38.545855  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2281 20:09:38.545920  Write Rank0 MR1 =0xd6

 2282 20:09:38.545993  [Gating]

 2283 20:09:38.546075  ==

 2284 20:09:38.546160  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2285 20:09:38.546230  fsp= 1, odt_onoff= 1, Byte mode= 0

 2286 20:09:38.546296  ==

 2287 20:09:38.546361  3 1 0 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2288 20:09:38.547470  3 1 4 |100f 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2289 20:09:38.553801  3 1 8 |3635 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2290 20:09:38.557527  3 1 12 |3535 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2291 20:09:38.560456  3 1 16 |a09 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2292 20:09:38.567034  3 1 20 |3535 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2293 20:09:38.570783  3 1 24 |3534 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2294 20:09:38.573709  3 1 28 |403 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2295 20:09:38.577038  3 2 0 |3d3d 201  |(11 11)(11 11) |(1 1)(1 1)| 0

 2296 20:09:38.583712  3 2 4 |3c3b 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2297 20:09:38.586976  3 2 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2298 20:09:38.590408  3 2 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2299 20:09:38.597184  3 2 16 |3c3c 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2300 20:09:38.600566  3 2 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2301 20:09:38.604025  3 2 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2302 20:09:38.610586  3 2 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2303 20:09:38.614373  [Byte 0] Lead/lag falling Transition (3, 2, 28)

 2304 20:09:38.617663  3 3 0 |201 3d3d  |(11 11)(11 11) |(0 1)(1 1)| 0

 2305 20:09:38.621495  3 3 4 |3534 605  |(11 11)(11 11) |(0 1)(1 1)| 0

 2306 20:09:38.627740  3 3 8 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2307 20:09:38.630757  3 3 12 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2308 20:09:38.634394  [Byte 1] Lead/lag falling Transition (3, 3, 12)

 2309 20:09:38.640915  3 3 16 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2310 20:09:38.644048  3 3 20 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2311 20:09:38.647608  3 3 24 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2312 20:09:38.650944  3 3 28 |201 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2313 20:09:38.657325  3 4 0 |3d3d 201  |(11 11)(11 11) |(1 1)(1 1)| 0

 2314 20:09:38.660734  3 4 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2315 20:09:38.664551  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2316 20:09:38.670693  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2317 20:09:38.674030  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2318 20:09:38.677370  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2319 20:09:38.684356  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2320 20:09:38.687716  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2321 20:09:38.691235  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2322 20:09:38.694523  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2323 20:09:38.701043  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2324 20:09:38.704208  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2325 20:09:38.707817  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2326 20:09:38.714161  [Byte 0] Lead/lag falling Transition (3, 5, 16)

 2327 20:09:38.717692  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 2328 20:09:38.720682  [Byte 0] Lead/lag Transition tap number (2)

 2329 20:09:38.724150  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 2330 20:09:38.731056  [Byte 1] Lead/lag falling Transition (3, 5, 24)

 2331 20:09:38.734287  3 5 28 |202 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 2332 20:09:38.737567  [Byte 1] Lead/lag Transition tap number (2)

 2333 20:09:38.741178  3 6 0 |4646 202  |(0 0)(11 11) |(0 0)(0 0)| 0

 2334 20:09:38.744303  [Byte 0]First pass (3, 6, 0)

 2335 20:09:38.747851  3 6 4 |4646 4444  |(0 0)(11 11) |(0 0)(0 0)| 0

 2336 20:09:38.754394  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2337 20:09:38.754890  [Byte 1]First pass (3, 6, 8)

 2338 20:09:38.761091  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2339 20:09:38.764414  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2340 20:09:38.768118  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2341 20:09:38.771340  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2342 20:09:38.775070  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2343 20:09:38.781776  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2344 20:09:38.784147  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2345 20:09:38.787916  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2346 20:09:38.791138  All bytes gating window > 1UI, Early break!

 2347 20:09:38.791560  

 2348 20:09:38.794755  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)

 2349 20:09:38.795368  

 2350 20:09:38.797857  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)

 2351 20:09:38.798293  

 2352 20:09:38.798621  

 2353 20:09:38.801116  

 2354 20:09:38.804613  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)

 2355 20:09:38.805231  

 2356 20:09:38.807897  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)

 2357 20:09:38.808312  

 2358 20:09:38.808640  

 2359 20:09:38.811051  Write Rank0 MR1 =0x56

 2360 20:09:38.811466  

 2361 20:09:38.814959  best RODT dly(2T, 0.5T) = (2, 2)

 2362 20:09:38.815373  

 2363 20:09:38.815702  best RODT dly(2T, 0.5T) = (2, 2)

 2364 20:09:38.817844  ==

 2365 20:09:38.821365  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2366 20:09:38.824610  fsp= 1, odt_onoff= 1, Byte mode= 0

 2367 20:09:38.825207  ==

 2368 20:09:38.828005  Start DQ dly to find pass range UseTestEngine =0

 2369 20:09:38.831269  x-axis: bit #, y-axis: DQ dly (-127~63)

 2370 20:09:38.834606  RX Vref Scan = 0

 2371 20:09:38.838813  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2372 20:09:38.841362  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2373 20:09:38.841821  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2374 20:09:38.844694  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2375 20:09:38.848303  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2376 20:09:38.851336  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2377 20:09:38.854887  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2378 20:09:38.858009  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2379 20:09:38.862005  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2380 20:09:38.864796  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2381 20:09:38.865220  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2382 20:09:38.868361  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2383 20:09:38.871602  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2384 20:09:38.874791  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2385 20:09:38.878286  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2386 20:09:38.881596  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2387 20:09:38.885118  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2388 20:09:38.887923  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2389 20:09:38.888386  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2390 20:09:38.891402  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2391 20:09:38.894839  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2392 20:09:38.898428  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2393 20:09:38.901688  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 2394 20:09:38.904994  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 2395 20:09:38.908140  -2, [0] xxxxxxxx xxxxxxxx [MSB]

 2396 20:09:38.908566  -1, [0] xxxxxxxx xxxxxxxx [MSB]

 2397 20:09:38.911671  0, [0] xxxoxxxx xxxxxxxx [MSB]

 2398 20:09:38.915017  1, [0] xxxoxxxx xxxxxxxo [MSB]

 2399 20:09:38.918416  2, [0] xxooxxxx xxxxxxxo [MSB]

 2400 20:09:38.921752  3, [0] xxoooxxo oxoxxoxo [MSB]

 2401 20:09:38.925083  4, [0] xxoooxxo oooxooxo [MSB]

 2402 20:09:38.925587  5, [0] xxoooxxo oooooooo [MSB]

 2403 20:09:38.928081  6, [0] xooooxxo oooooooo [MSB]

 2404 20:09:38.931603  7, [0] xoooooxo oooooooo [MSB]

 2405 20:09:38.934719  8, [0] ooooooxo oooooooo [MSB]

 2406 20:09:38.938323  32, [0] ooxxoooo oooooooo [MSB]

 2407 20:09:38.941820  33, [0] ooxxoooo ooooooox [MSB]

 2408 20:09:38.942298  34, [0] ooxxoooo ooooooox [MSB]

 2409 20:09:38.944911  35, [0] ooxxxooo ooxoooox [MSB]

 2410 20:09:38.948550  36, [0] ooxxxoox xoxoooox [MSB]

 2411 20:09:38.951843  37, [0] ooxxxoox xxxxoxxx [MSB]

 2412 20:09:38.954799  38, [0] ooxxxoox xxxxoxxx [MSB]

 2413 20:09:38.958264  39, [0] ooxxxoox xxxxxxxx [MSB]

 2414 20:09:38.961949  40, [0] oxxxxoox xxxxxxxx [MSB]

 2415 20:09:38.962422  41, [0] xxxxxxxx xxxxxxxx [MSB]

 2416 20:09:38.965014  iDelay=41, Bit 0, Center 24 (8 ~ 40) 33

 2417 20:09:38.971684  iDelay=41, Bit 1, Center 22 (6 ~ 39) 34

 2418 20:09:38.974611  iDelay=41, Bit 2, Center 16 (2 ~ 31) 30

 2419 20:09:38.978162  iDelay=41, Bit 3, Center 15 (0 ~ 31) 32

 2420 20:09:38.981511  iDelay=41, Bit 4, Center 18 (3 ~ 34) 32

 2421 20:09:38.985114  iDelay=41, Bit 5, Center 23 (7 ~ 40) 34

 2422 20:09:38.988147  iDelay=41, Bit 6, Center 24 (9 ~ 40) 32

 2423 20:09:38.991612  iDelay=41, Bit 7, Center 19 (3 ~ 35) 33

 2424 20:09:38.995084  iDelay=41, Bit 8, Center 19 (3 ~ 35) 33

 2425 20:09:38.998548  iDelay=41, Bit 9, Center 20 (4 ~ 36) 33

 2426 20:09:39.001930  iDelay=41, Bit 10, Center 18 (3 ~ 34) 32

 2427 20:09:39.004823  iDelay=41, Bit 11, Center 20 (5 ~ 36) 32

 2428 20:09:39.008478  iDelay=41, Bit 12, Center 21 (4 ~ 38) 35

 2429 20:09:39.011792  iDelay=41, Bit 13, Center 19 (3 ~ 36) 34

 2430 20:09:39.015517  iDelay=41, Bit 14, Center 20 (5 ~ 36) 32

 2431 20:09:39.018696  iDelay=41, Bit 15, Center 16 (1 ~ 32) 32

 2432 20:09:39.021699  ==

 2433 20:09:39.025161  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2434 20:09:39.028499  fsp= 1, odt_onoff= 1, Byte mode= 0

 2435 20:09:39.028926  ==

 2436 20:09:39.029300  DQS Delay:

 2437 20:09:39.031514  DQS0 = 0, DQS1 = 0

 2438 20:09:39.031937  DQM Delay:

 2439 20:09:39.035404  DQM0 = 20, DQM1 = 19

 2440 20:09:39.035828  DQ Delay:

 2441 20:09:39.038534  DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15

 2442 20:09:39.041534  DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =19

 2443 20:09:39.044698  DQ8 =19, DQ9 =20, DQ10 =18, DQ11 =20

 2444 20:09:39.048441  DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =16

 2445 20:09:39.048860  

 2446 20:09:39.049196  

 2447 20:09:39.051581  DramC Write-DBI off

 2448 20:09:39.052002  ==

 2449 20:09:39.055040  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2450 20:09:39.057998  fsp= 1, odt_onoff= 1, Byte mode= 0

 2451 20:09:39.058420  ==

 2452 20:09:39.064812  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 2453 20:09:39.065236  

 2454 20:09:39.065634  Begin, DQ Scan Range 927~1183

 2455 20:09:39.065955  

 2456 20:09:39.066257  

 2457 20:09:39.068372  	TX Vref Scan disable

 2458 20:09:39.071404  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 2459 20:09:39.074860  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 2460 20:09:39.078156  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 2461 20:09:39.081757  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 2462 20:09:39.084656  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 2463 20:09:39.088165  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 2464 20:09:39.091656  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 2465 20:09:39.098319  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 2466 20:09:39.101361  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 2467 20:09:39.104760  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 2468 20:09:39.108090  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 2469 20:09:39.111652  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 2470 20:09:39.114807  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 2471 20:09:39.118274  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 2472 20:09:39.121372  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 2473 20:09:39.124818  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 2474 20:09:39.127938  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 2475 20:09:39.131333  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 2476 20:09:39.134508  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 2477 20:09:39.138070  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 2478 20:09:39.141320  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 2479 20:09:39.145083  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 2480 20:09:39.151464  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 2481 20:09:39.154686  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 2482 20:09:39.158377  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 2483 20:09:39.161576  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 2484 20:09:39.164507  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 2485 20:09:39.168285  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 2486 20:09:39.171108  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 2487 20:09:39.174512  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 2488 20:09:39.177960  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2489 20:09:39.181059  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2490 20:09:39.184638  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2491 20:09:39.188208  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2492 20:09:39.191143  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2493 20:09:39.194801  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2494 20:09:39.197788  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2495 20:09:39.201542  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2496 20:09:39.204453  965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]

 2497 20:09:39.207587  966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]

 2498 20:09:39.211352  967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]

 2499 20:09:39.217693  968 |3 6 8|[0] xxxxxxxx ooxxxxxo [MSB]

 2500 20:09:39.221009  969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]

 2501 20:09:39.224730  970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]

 2502 20:09:39.227520  971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]

 2503 20:09:39.230779  972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]

 2504 20:09:39.234620  973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]

 2505 20:09:39.237451  974 |3 6 14|[0] xxoooxxo oooooooo [MSB]

 2506 20:09:39.241014  975 |3 6 15|[0] xooooxxo oooooooo [MSB]

 2507 20:09:39.244132  976 |3 6 16|[0] xoooooxo oooooooo [MSB]

 2508 20:09:39.251043  989 |3 6 29|[0] oooooooo ooooooox [MSB]

 2509 20:09:39.254359  990 |3 6 30|[0] oooooooo ooooooox [MSB]

 2510 20:09:39.257765  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 2511 20:09:39.261102  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 2512 20:09:39.264643  993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]

 2513 20:09:39.267896  994 |3 6 34|[0] ooxxoooo xxxxxxxx [MSB]

 2514 20:09:39.271115  995 |3 6 35|[0] ooxxooox xxxxxxxx [MSB]

 2515 20:09:39.274886  996 |3 6 36|[0] ooxxooox xxxxxxxx [MSB]

 2516 20:09:39.277787  997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]

 2517 20:09:39.281543  Byte0, DQ PI dly=984, DQM PI dly= 984

 2518 20:09:39.285095  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)

 2519 20:09:39.285691  

 2520 20:09:39.291335  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)

 2521 20:09:39.291969  

 2522 20:09:39.294320  Byte1, DQ PI dly=977, DQM PI dly= 977

 2523 20:09:39.297799  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)

 2524 20:09:39.298339  

 2525 20:09:39.301394  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)

 2526 20:09:39.301877  

 2527 20:09:39.304433  ==

 2528 20:09:39.307688  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2529 20:09:39.311156  fsp= 1, odt_onoff= 1, Byte mode= 0

 2530 20:09:39.311678  ==

 2531 20:09:39.314904  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 2532 20:09:39.315345  

 2533 20:09:39.318019  Begin, DQ Scan Range 953~1017

 2534 20:09:39.320711  Write Rank0 MR14 =0x0

 2535 20:09:39.328764  

 2536 20:09:39.329182  	CH=1, VrefRange= 0, VrefLevel = 0

 2537 20:09:39.335602  TX Bit0 (978~996) 19 987,   Bit8 (969~985) 17 977,

 2538 20:09:39.338931  TX Bit1 (977~994) 18 985,   Bit9 (969~984) 16 976,

 2539 20:09:39.345560  TX Bit2 (976~991) 16 983,   Bit10 (970~985) 16 977,

 2540 20:09:39.348819  TX Bit3 (974~989) 16 981,   Bit11 (971~988) 18 979,

 2541 20:09:39.352328  TX Bit4 (977~992) 16 984,   Bit12 (970~988) 19 979,

 2542 20:09:39.358719  TX Bit5 (977~995) 19 986,   Bit13 (972~988) 17 980,

 2543 20:09:39.362261  TX Bit6 (978~995) 18 986,   Bit14 (970~986) 17 978,

 2544 20:09:39.365539  TX Bit7 (976~991) 16 983,   Bit15 (967~985) 19 976,

 2545 20:09:39.365961  

 2546 20:09:39.368728  Write Rank0 MR14 =0x2

 2547 20:09:39.377669  

 2548 20:09:39.378116  	CH=1, VrefRange= 0, VrefLevel = 2

 2549 20:09:39.384288  TX Bit0 (977~997) 21 987,   Bit8 (969~985) 17 977,

 2550 20:09:39.387839  TX Bit1 (977~994) 18 985,   Bit9 (968~985) 18 976,

 2551 20:09:39.394513  TX Bit2 (976~991) 16 983,   Bit10 (969~986) 18 977,

 2552 20:09:39.397736  TX Bit3 (973~990) 18 981,   Bit11 (971~989) 19 980,

 2553 20:09:39.401250  TX Bit4 (976~992) 17 984,   Bit12 (970~989) 20 979,

 2554 20:09:39.407982  TX Bit5 (977~996) 20 986,   Bit13 (971~988) 18 979,

 2555 20:09:39.410946  TX Bit6 (978~996) 19 987,   Bit14 (971~987) 17 979,

 2556 20:09:39.414458  TX Bit7 (976~991) 16 983,   Bit15 (967~985) 19 976,

 2557 20:09:39.414881  

 2558 20:09:39.417571  Write Rank0 MR14 =0x4

 2559 20:09:39.426398  

 2560 20:09:39.426816  	CH=1, VrefRange= 0, VrefLevel = 4

 2561 20:09:39.433312  TX Bit0 (978~997) 20 987,   Bit8 (968~986) 19 977,

 2562 20:09:39.437550  TX Bit1 (977~995) 19 986,   Bit9 (968~986) 19 977,

 2563 20:09:39.443723  TX Bit2 (975~991) 17 983,   Bit10 (969~986) 18 977,

 2564 20:09:39.446559  TX Bit3 (973~990) 18 981,   Bit11 (970~989) 20 979,

 2565 20:09:39.450124  TX Bit4 (976~992) 17 984,   Bit12 (970~989) 20 979,

 2566 20:09:39.456554  TX Bit5 (977~996) 20 986,   Bit13 (971~989) 19 980,

 2567 20:09:39.460089  TX Bit6 (978~996) 19 987,   Bit14 (970~987) 18 978,

 2568 20:09:39.463226  TX Bit7 (976~991) 16 983,   Bit15 (966~985) 20 975,

 2569 20:09:39.463651  

 2570 20:09:39.466657  Write Rank0 MR14 =0x6

 2571 20:09:39.475813  

 2572 20:09:39.476231  	CH=1, VrefRange= 0, VrefLevel = 6

 2573 20:09:39.482671  TX Bit0 (977~997) 21 987,   Bit8 (968~986) 19 977,

 2574 20:09:39.485917  TX Bit1 (976~995) 20 985,   Bit9 (968~986) 19 977,

 2575 20:09:39.492287  TX Bit2 (975~992) 18 983,   Bit10 (969~987) 19 978,

 2576 20:09:39.495768  TX Bit3 (972~990) 19 981,   Bit11 (971~990) 20 980,

 2577 20:09:39.498974  TX Bit4 (976~993) 18 984,   Bit12 (970~990) 21 980,

 2578 20:09:39.505554  TX Bit5 (977~997) 21 987,   Bit13 (971~990) 20 980,

 2579 20:09:39.509055  TX Bit6 (978~997) 20 987,   Bit14 (970~987) 18 978,

 2580 20:09:39.512317  TX Bit7 (976~992) 17 984,   Bit15 (966~986) 21 976,

 2581 20:09:39.512741  

 2582 20:09:39.515017  Write Rank0 MR14 =0x8

 2583 20:09:39.524568  

 2584 20:09:39.524984  	CH=1, VrefRange= 0, VrefLevel = 8

 2585 20:09:39.531205  TX Bit0 (977~998) 22 987,   Bit8 (968~987) 20 977,

 2586 20:09:39.534629  TX Bit1 (976~996) 21 986,   Bit9 (968~987) 20 977,

 2587 20:09:39.541085  TX Bit2 (975~992) 18 983,   Bit10 (969~987) 19 978,

 2588 20:09:39.544437  TX Bit3 (972~991) 20 981,   Bit11 (970~990) 21 980,

 2589 20:09:39.548127  TX Bit4 (976~993) 18 984,   Bit12 (969~990) 22 979,

 2590 20:09:39.554364  TX Bit5 (976~997) 22 986,   Bit13 (971~990) 20 980,

 2591 20:09:39.557803  TX Bit6 (977~997) 21 987,   Bit14 (970~988) 19 979,

 2592 20:09:39.561111  TX Bit7 (976~992) 17 984,   Bit15 (966~986) 21 976,

 2593 20:09:39.561715  

 2594 20:09:39.564559  Write Rank0 MR14 =0xa

 2595 20:09:39.573595  

 2596 20:09:39.576920  	CH=1, VrefRange= 0, VrefLevel = 10

 2597 20:09:39.580442  TX Bit0 (977~998) 22 987,   Bit8 (968~987) 20 977,

 2598 20:09:39.583642  TX Bit1 (976~997) 22 986,   Bit9 (968~987) 20 977,

 2599 20:09:39.590520  TX Bit2 (974~992) 19 983,   Bit10 (969~988) 20 978,

 2600 20:09:39.593657  TX Bit3 (971~991) 21 981,   Bit11 (970~991) 22 980,

 2601 20:09:39.597400  TX Bit4 (976~994) 19 985,   Bit12 (969~991) 23 980,

 2602 20:09:39.604092  TX Bit5 (976~998) 23 987,   Bit13 (970~991) 22 980,

 2603 20:09:39.606880  TX Bit6 (977~998) 22 987,   Bit14 (969~989) 21 979,

 2604 20:09:39.610222  TX Bit7 (975~992) 18 983,   Bit15 (966~987) 22 976,

 2605 20:09:39.613302  

 2606 20:09:39.613382  Write Rank0 MR14 =0xc

 2607 20:09:39.622554  

 2608 20:09:39.625738  	CH=1, VrefRange= 0, VrefLevel = 12

 2609 20:09:39.629564  TX Bit0 (977~998) 22 987,   Bit8 (968~988) 21 978,

 2610 20:09:39.632702  TX Bit1 (976~997) 22 986,   Bit9 (968~988) 21 978,

 2611 20:09:39.639301  TX Bit2 (974~992) 19 983,   Bit10 (969~989) 21 979,

 2612 20:09:39.642746  TX Bit3 (971~991) 21 981,   Bit11 (969~991) 23 980,

 2613 20:09:39.645851  TX Bit4 (975~995) 21 985,   Bit12 (969~991) 23 980,

 2614 20:09:39.652590  TX Bit5 (976~998) 23 987,   Bit13 (970~991) 22 980,

 2615 20:09:39.656451  TX Bit6 (977~998) 22 987,   Bit14 (969~990) 22 979,

 2616 20:09:39.659363  TX Bit7 (975~993) 19 984,   Bit15 (965~987) 23 976,

 2617 20:09:39.659786  

 2618 20:09:39.662656  Write Rank0 MR14 =0xe

 2619 20:09:39.672246  

 2620 20:09:39.675822  	CH=1, VrefRange= 0, VrefLevel = 14

 2621 20:09:39.678985  TX Bit0 (977~999) 23 988,   Bit8 (967~989) 23 978,

 2622 20:09:39.682067  TX Bit1 (976~997) 22 986,   Bit9 (968~989) 22 978,

 2623 20:09:39.688915  TX Bit2 (974~993) 20 983,   Bit10 (968~989) 22 978,

 2624 20:09:39.691900  TX Bit3 (971~991) 21 981,   Bit11 (969~991) 23 980,

 2625 20:09:39.695548  TX Bit4 (975~995) 21 985,   Bit12 (969~991) 23 980,

 2626 20:09:39.701732  TX Bit5 (976~998) 23 987,   Bit13 (970~991) 22 980,

 2627 20:09:39.705033  TX Bit6 (977~998) 22 987,   Bit14 (969~990) 22 979,

 2628 20:09:39.708649  TX Bit7 (975~994) 20 984,   Bit15 (965~987) 23 976,

 2629 20:09:39.711950  

 2630 20:09:39.712459  Write Rank0 MR14 =0x10

 2631 20:09:39.721723  

 2632 20:09:39.724768  	CH=1, VrefRange= 0, VrefLevel = 16

 2633 20:09:39.728422  TX Bit0 (977~999) 23 988,   Bit8 (967~990) 24 978,

 2634 20:09:39.731291  TX Bit1 (975~997) 23 986,   Bit9 (967~989) 23 978,

 2635 20:09:39.738362  TX Bit2 (973~994) 22 983,   Bit10 (969~990) 22 979,

 2636 20:09:39.741201  TX Bit3 (970~992) 23 981,   Bit11 (969~991) 23 980,

 2637 20:09:39.745227  TX Bit4 (975~996) 22 985,   Bit12 (969~991) 23 980,

 2638 20:09:39.751856  TX Bit5 (976~999) 24 987,   Bit13 (970~991) 22 980,

 2639 20:09:39.754640  TX Bit6 (977~999) 23 988,   Bit14 (969~991) 23 980,

 2640 20:09:39.758167  TX Bit7 (974~994) 21 984,   Bit15 (965~988) 24 976,

 2641 20:09:39.758590  

 2642 20:09:39.761199  Write Rank0 MR14 =0x12

 2643 20:09:39.770803  

 2644 20:09:39.774378  	CH=1, VrefRange= 0, VrefLevel = 18

 2645 20:09:39.777940  TX Bit0 (976~999) 24 987,   Bit8 (967~990) 24 978,

 2646 20:09:39.780897  TX Bit1 (975~998) 24 986,   Bit9 (967~989) 23 978,

 2647 20:09:39.787659  TX Bit2 (973~994) 22 983,   Bit10 (968~991) 24 979,

 2648 20:09:39.791148  TX Bit3 (970~992) 23 981,   Bit11 (969~992) 24 980,

 2649 20:09:39.794326  TX Bit4 (974~997) 24 985,   Bit12 (969~991) 23 980,

 2650 20:09:39.800855  TX Bit5 (976~999) 24 987,   Bit13 (969~991) 23 980,

 2651 20:09:39.804363  TX Bit6 (977~999) 23 988,   Bit14 (969~991) 23 980,

 2652 20:09:39.808085  TX Bit7 (974~995) 22 984,   Bit15 (965~989) 25 977,

 2653 20:09:39.808509  

 2654 20:09:39.811140  Write Rank0 MR14 =0x14

 2655 20:09:39.820349  

 2656 20:09:39.823688  	CH=1, VrefRange= 0, VrefLevel = 20

 2657 20:09:39.826951  TX Bit0 (976~999) 24 987,   Bit8 (967~991) 25 979,

 2658 20:09:39.830066  TX Bit1 (975~998) 24 986,   Bit9 (967~990) 24 978,

 2659 20:09:39.836814  TX Bit2 (972~995) 24 983,   Bit10 (968~991) 24 979,

 2660 20:09:39.840017  TX Bit3 (970~993) 24 981,   Bit11 (969~992) 24 980,

 2661 20:09:39.843511  TX Bit4 (974~997) 24 985,   Bit12 (968~992) 25 980,

 2662 20:09:39.850413  TX Bit5 (976~999) 24 987,   Bit13 (969~991) 23 980,

 2663 20:09:39.853756  TX Bit6 (977~999) 23 988,   Bit14 (969~991) 23 980,

 2664 20:09:39.856991  TX Bit7 (974~996) 23 985,   Bit15 (964~989) 26 976,

 2665 20:09:39.859967  

 2666 20:09:39.860392  Write Rank0 MR14 =0x16

 2667 20:09:39.869481  

 2668 20:09:39.872973  	CH=1, VrefRange= 0, VrefLevel = 22

 2669 20:09:39.876289  TX Bit0 (976~999) 24 987,   Bit8 (967~991) 25 979,

 2670 20:09:39.879202  TX Bit1 (974~998) 25 986,   Bit9 (966~990) 25 978,

 2671 20:09:39.885915  TX Bit2 (972~995) 24 983,   Bit10 (967~991) 25 979,

 2672 20:09:39.889521  TX Bit3 (970~993) 24 981,   Bit11 (969~992) 24 980,

 2673 20:09:39.893437  TX Bit4 (973~997) 25 985,   Bit12 (968~992) 25 980,

 2674 20:09:39.899288  TX Bit5 (975~999) 25 987,   Bit13 (969~991) 23 980,

 2675 20:09:39.902887  TX Bit6 (976~999) 24 987,   Bit14 (968~991) 24 979,

 2676 20:09:39.906278  TX Bit7 (973~996) 24 984,   Bit15 (964~988) 25 976,

 2677 20:09:39.909444  

 2678 20:09:39.909947  Write Rank0 MR14 =0x18

 2679 20:09:39.919076  

 2680 20:09:39.919568  	CH=1, VrefRange= 0, VrefLevel = 24

 2681 20:09:39.925942  TX Bit0 (976~1000) 25 988,   Bit8 (966~991) 26 978,

 2682 20:09:39.929118  TX Bit1 (974~999) 26 986,   Bit9 (966~991) 26 978,

 2683 20:09:39.936674  TX Bit2 (971~995) 25 983,   Bit10 (967~991) 25 979,

 2684 20:09:39.939398  TX Bit3 (969~992) 24 980,   Bit11 (968~992) 25 980,

 2685 20:09:39.942234  TX Bit4 (973~998) 26 985,   Bit12 (968~992) 25 980,

 2686 20:09:39.949042  TX Bit5 (975~999) 25 987,   Bit13 (969~991) 23 980,

 2687 20:09:39.952231  TX Bit6 (976~999) 24 987,   Bit14 (968~991) 24 979,

 2688 20:09:39.955830  TX Bit7 (973~996) 24 984,   Bit15 (963~988) 26 975,

 2689 20:09:39.958703  

 2690 20:09:39.959120  Write Rank0 MR14 =0x1a

 2691 20:09:39.968781  

 2692 20:09:39.969202  	CH=1, VrefRange= 0, VrefLevel = 26

 2693 20:09:39.975628  TX Bit0 (976~1000) 25 988,   Bit8 (966~991) 26 978,

 2694 20:09:39.979103  TX Bit1 (974~999) 26 986,   Bit9 (966~991) 26 978,

 2695 20:09:39.985296  TX Bit2 (971~995) 25 983,   Bit10 (967~991) 25 979,

 2696 20:09:39.988631  TX Bit3 (969~992) 24 980,   Bit11 (968~992) 25 980,

 2697 20:09:39.992213  TX Bit4 (973~998) 26 985,   Bit12 (968~992) 25 980,

 2698 20:09:39.998727  TX Bit5 (975~999) 25 987,   Bit13 (969~991) 23 980,

 2699 20:09:40.002362  TX Bit6 (976~999) 24 987,   Bit14 (968~991) 24 979,

 2700 20:09:40.005427  TX Bit7 (973~996) 24 984,   Bit15 (963~988) 26 975,

 2701 20:09:40.005939  

 2702 20:09:40.008954  Write Rank0 MR14 =0x1c

 2703 20:09:40.018480  

 2704 20:09:40.021661  	CH=1, VrefRange= 0, VrefLevel = 28

 2705 20:09:40.025353  TX Bit0 (976~1000) 25 988,   Bit8 (966~991) 26 978,

 2706 20:09:40.028586  TX Bit1 (974~999) 26 986,   Bit9 (966~991) 26 978,

 2707 20:09:40.035141  TX Bit2 (971~995) 25 983,   Bit10 (967~991) 25 979,

 2708 20:09:40.037907  TX Bit3 (969~992) 24 980,   Bit11 (968~992) 25 980,

 2709 20:09:40.041600  TX Bit4 (973~998) 26 985,   Bit12 (968~992) 25 980,

 2710 20:09:40.047913  TX Bit5 (975~999) 25 987,   Bit13 (969~991) 23 980,

 2711 20:09:40.051412  TX Bit6 (976~999) 24 987,   Bit14 (968~991) 24 979,

 2712 20:09:40.054736  TX Bit7 (973~996) 24 984,   Bit15 (963~988) 26 975,

 2713 20:09:40.057773  

 2714 20:09:40.058482  Write Rank0 MR14 =0x1e

 2715 20:09:40.067918  

 2716 20:09:40.068483  	CH=1, VrefRange= 0, VrefLevel = 30

 2717 20:09:40.074706  TX Bit0 (976~1000) 25 988,   Bit8 (966~991) 26 978,

 2718 20:09:40.078046  TX Bit1 (974~999) 26 986,   Bit9 (966~991) 26 978,

 2719 20:09:40.084318  TX Bit2 (971~995) 25 983,   Bit10 (967~991) 25 979,

 2720 20:09:40.087609  TX Bit3 (969~992) 24 980,   Bit11 (968~992) 25 980,

 2721 20:09:40.091000  TX Bit4 (973~998) 26 985,   Bit12 (968~992) 25 980,

 2722 20:09:40.097934  TX Bit5 (975~999) 25 987,   Bit13 (969~991) 23 980,

 2723 20:09:40.101285  TX Bit6 (976~999) 24 987,   Bit14 (968~991) 24 979,

 2724 20:09:40.104072  TX Bit7 (973~996) 24 984,   Bit15 (963~988) 26 975,

 2725 20:09:40.108253  

 2726 20:09:40.111205  wait MRW command Rank0 MR14 =0x20 fired (1)

 2727 20:09:40.111646  Write Rank0 MR14 =0x20

 2728 20:09:40.121254  

 2729 20:09:40.124589  	CH=1, VrefRange= 0, VrefLevel = 32

 2730 20:09:40.127708  TX Bit0 (976~1000) 25 988,   Bit8 (966~991) 26 978,

 2731 20:09:40.131010  TX Bit1 (974~999) 26 986,   Bit9 (966~991) 26 978,

 2732 20:09:40.137833  TX Bit2 (971~995) 25 983,   Bit10 (967~991) 25 979,

 2733 20:09:40.141516  TX Bit3 (969~992) 24 980,   Bit11 (968~992) 25 980,

 2734 20:09:40.144388  TX Bit4 (973~998) 26 985,   Bit12 (968~992) 25 980,

 2735 20:09:40.151382  TX Bit5 (975~999) 25 987,   Bit13 (969~991) 23 980,

 2736 20:09:40.154586  TX Bit6 (976~999) 24 987,   Bit14 (968~991) 24 979,

 2737 20:09:40.157944  TX Bit7 (973~996) 24 984,   Bit15 (963~988) 26 975,

 2738 20:09:40.158584  

 2739 20:09:40.161345  

 2740 20:09:40.164739  TX Vref found, early break! 367< 379

 2741 20:09:40.167865  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 2742 20:09:40.171338  u1DelayCellOfst[0]=10 cells (8 PI)

 2743 20:09:40.174366  u1DelayCellOfst[1]=7 cells (6 PI)

 2744 20:09:40.177573  u1DelayCellOfst[2]=3 cells (3 PI)

 2745 20:09:40.181398  u1DelayCellOfst[3]=0 cells (0 PI)

 2746 20:09:40.184389  u1DelayCellOfst[4]=6 cells (5 PI)

 2747 20:09:40.184811  u1DelayCellOfst[5]=8 cells (7 PI)

 2748 20:09:40.187596  u1DelayCellOfst[6]=8 cells (7 PI)

 2749 20:09:40.191054  u1DelayCellOfst[7]=5 cells (4 PI)

 2750 20:09:40.194370  Byte0, DQ PI dly=980, DQM PI dly= 984

 2751 20:09:40.201359  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)

 2752 20:09:40.201809  

 2753 20:09:40.204473  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)

 2754 20:09:40.204898  

 2755 20:09:40.207655  u1DelayCellOfst[8]=3 cells (3 PI)

 2756 20:09:40.211252  u1DelayCellOfst[9]=3 cells (3 PI)

 2757 20:09:40.214384  u1DelayCellOfst[10]=5 cells (4 PI)

 2758 20:09:40.218055  u1DelayCellOfst[11]=6 cells (5 PI)

 2759 20:09:40.221091  u1DelayCellOfst[12]=6 cells (5 PI)

 2760 20:09:40.221752  u1DelayCellOfst[13]=6 cells (5 PI)

 2761 20:09:40.224564  u1DelayCellOfst[14]=5 cells (4 PI)

 2762 20:09:40.227492  u1DelayCellOfst[15]=0 cells (0 PI)

 2763 20:09:40.230962  Byte1, DQ PI dly=975, DQM PI dly= 977

 2764 20:09:40.238080  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)

 2765 20:09:40.238796  

 2766 20:09:40.241024  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)

 2767 20:09:40.241793  

 2768 20:09:40.244161  Write Rank0 MR14 =0x18

 2769 20:09:40.244589  

 2770 20:09:40.244999  Final TX Range 0 Vref 24

 2771 20:09:40.245477  

 2772 20:09:40.251063  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 2773 20:09:40.251346  

 2774 20:09:40.257545  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 2775 20:09:40.267278  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2776 20:09:40.273751  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2777 20:09:40.273836  Write Rank0 MR3 =0xb0

 2778 20:09:40.277325  DramC Write-DBI on

 2779 20:09:40.277407  ==

 2780 20:09:40.280426  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2781 20:09:40.284095  fsp= 1, odt_onoff= 1, Byte mode= 0

 2782 20:09:40.284178  ==

 2783 20:09:40.290693  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 2784 20:09:40.290775  

 2785 20:09:40.290840  Begin, DQ Scan Range 697~761

 2786 20:09:40.290903  

 2787 20:09:40.294044  

 2788 20:09:40.294125  	TX Vref Scan disable

 2789 20:09:40.297311  697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 2790 20:09:40.300948  698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 2791 20:09:40.303669  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 2792 20:09:40.307352  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 2793 20:09:40.310726  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2794 20:09:40.314097  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2795 20:09:40.320774  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2796 20:09:40.323950  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2797 20:09:40.327186  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2798 20:09:40.330561  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2799 20:09:40.334055  707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]

 2800 20:09:40.337320  708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]

 2801 20:09:40.340966  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 2802 20:09:40.344253  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 2803 20:09:40.347333  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 2804 20:09:40.350530  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 2805 20:09:40.353922  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 2806 20:09:40.357576  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 2807 20:09:40.360650  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 2808 20:09:40.369355  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 2809 20:09:40.372473  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 2810 20:09:40.375804  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 2811 20:09:40.379067  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 2812 20:09:40.382271  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 2813 20:09:40.385748  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 2814 20:09:40.389176  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 2815 20:09:40.392459  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 2816 20:09:40.395650  744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]

 2817 20:09:40.399204  Byte0, DQ PI dly=729, DQM PI dly= 729

 2818 20:09:40.402553  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)

 2819 20:09:40.402979  

 2820 20:09:40.409209  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)

 2821 20:09:40.409703  

 2822 20:09:40.412263  Byte1, DQ PI dly=721, DQM PI dly= 721

 2823 20:09:40.416004  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)

 2824 20:09:40.416503  

 2825 20:09:40.419170  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)

 2826 20:09:40.419591  

 2827 20:09:40.425707  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 2828 20:09:40.432602  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2829 20:09:40.442507  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2830 20:09:40.442932  Write Rank0 MR3 =0x30

 2831 20:09:40.445800  DramC Write-DBI off

 2832 20:09:40.446236  

 2833 20:09:40.446568  [DATLAT]

 2834 20:09:40.449253  Freq=1600, CH1 RK0, use_rxtx_scan=0

 2835 20:09:40.449728  

 2836 20:09:40.452519  DATLAT Default: 0xf

 2837 20:09:40.452939  7, 0xFFFF, sum=0

 2838 20:09:40.455871  8, 0xFFFF, sum=0

 2839 20:09:40.456302  9, 0xFFFF, sum=0

 2840 20:09:40.456646  10, 0xFFFF, sum=0

 2841 20:09:40.459587  11, 0xFFFF, sum=0

 2842 20:09:40.460016  12, 0xFFFF, sum=0

 2843 20:09:40.462430  13, 0xFFFF, sum=0

 2844 20:09:40.462955  14, 0x0, sum=1

 2845 20:09:40.465989  15, 0x0, sum=2

 2846 20:09:40.466415  16, 0x0, sum=3

 2847 20:09:40.469495  17, 0x0, sum=4

 2848 20:09:40.472271  pattern=2 first_step=14 total pass=5 best_step=16

 2849 20:09:40.472693  ==

 2850 20:09:40.479201  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2851 20:09:40.479621  fsp= 1, odt_onoff= 1, Byte mode= 0

 2852 20:09:40.482315  ==

 2853 20:09:40.485791  Start DQ dly to find pass range UseTestEngine =1

 2854 20:09:40.488570  x-axis: bit #, y-axis: DQ dly (-127~63)

 2855 20:09:40.488992  RX Vref Scan = 1

 2856 20:09:40.605415  

 2857 20:09:40.605973  RX Vref found, early break!

 2858 20:09:40.606344  

 2859 20:09:40.612702  Final RX Vref 13, apply to both rank0 and 1

 2860 20:09:40.613322  ==

 2861 20:09:40.615428  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2862 20:09:40.618546  fsp= 1, odt_onoff= 1, Byte mode= 0

 2863 20:09:40.619016  ==

 2864 20:09:40.619386  DQS Delay:

 2865 20:09:40.621858  DQS0 = 0, DQS1 = 0

 2866 20:09:40.622321  DQM Delay:

 2867 20:09:40.625325  DQM0 = 20, DQM1 = 18

 2868 20:09:40.625879  DQ Delay:

 2869 20:09:40.629080  DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15

 2870 20:09:40.632021  DQ4 =19, DQ5 =23, DQ6 =25, DQ7 =19

 2871 20:09:40.635848  DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19

 2872 20:09:40.638336  DQ12 =20, DQ13 =19, DQ14 =19, DQ15 =17

 2873 20:09:40.638818  

 2874 20:09:40.639159  

 2875 20:09:40.639468  

 2876 20:09:40.641759  [DramC_TX_OE_Calibration] TA2

 2877 20:09:40.645327  Original DQ_B0 (3 6) =30, OEN = 27

 2878 20:09:40.648305  Original DQ_B1 (3 6) =30, OEN = 27

 2879 20:09:40.651671  23, 0x0, End_B0=23 End_B1=23

 2880 20:09:40.652095  24, 0x0, End_B0=24 End_B1=24

 2881 20:09:40.655300  25, 0x0, End_B0=25 End_B1=25

 2882 20:09:40.658417  26, 0x0, End_B0=26 End_B1=26

 2883 20:09:40.661974  27, 0x0, End_B0=27 End_B1=27

 2884 20:09:40.662505  28, 0x0, End_B0=28 End_B1=28

 2885 20:09:40.665755  29, 0x0, End_B0=29 End_B1=29

 2886 20:09:40.668896  30, 0x0, End_B0=30 End_B1=30

 2887 20:09:40.672082  31, 0xFFFF, End_B0=30 End_B1=30

 2888 20:09:40.678651  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2889 20:09:40.681760  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2890 20:09:40.682183  

 2891 20:09:40.682564  

 2892 20:09:40.685123  Write Rank0 MR23 =0x3f

 2893 20:09:40.685588  [DQSOSC]

 2894 20:09:40.692206  [DQSOSCAuto] RK0, (LSB)MR18= 0xbe, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps

 2895 20:09:40.698494  CH1_RK0: MR19=0x3, MR18=0xBE, DQSOSC=328, MR23=63, INC=22, DEC=34

 2896 20:09:40.701837  Write Rank0 MR23 =0x3f

 2897 20:09:40.702274  [DQSOSC]

 2898 20:09:40.708697  [DQSOSCAuto] RK0, (LSB)MR18= 0xba, (MSB)MR19= 0x3, tDQSOscB0 = 330 ps tDQSOscB1 = 0 ps

 2899 20:09:40.711573  CH1 RK0: MR19=3, MR18=BA

 2900 20:09:40.715793  [RankSwap] Rank num 2, (Multi 1), Rank 1

 2901 20:09:40.718572  Write Rank0 MR2 =0xad

 2902 20:09:40.719033  [Write Leveling]

 2903 20:09:40.722105  delay  byte0  byte1  byte2  byte3

 2904 20:09:40.722521  

 2905 20:09:40.725763  10    0   0   

 2906 20:09:40.726289  11    0   0   

 2907 20:09:40.726627  12    0   0   

 2908 20:09:40.728492  13    0   0   

 2909 20:09:40.729017  14    0   0   

 2910 20:09:40.732181  15    0   0   

 2911 20:09:40.732625  16    0   0   

 2912 20:09:40.732959  17    0   0   

 2913 20:09:40.735467  18    0   0   

 2914 20:09:40.735891  19    0   0   

 2915 20:09:40.738887  20    0   0   

 2916 20:09:40.739310  21    0   0   

 2917 20:09:40.741685  22    0   0   

 2918 20:09:40.742106  23    0   0   

 2919 20:09:40.742442  24    0   0   

 2920 20:09:40.745377  25    0   0   

 2921 20:09:40.745903  26    0   0   

 2922 20:09:40.748689  27    0   0   

 2923 20:09:40.749109  28    0   0   

 2924 20:09:40.749487  29    0   0   

 2925 20:09:40.751934  30    0   0   

 2926 20:09:40.752474  31    0   0   

 2927 20:09:40.755500  32    0   ff   

 2928 20:09:40.756024  33    0   ff   

 2929 20:09:40.758495  34    0   ff   

 2930 20:09:40.759018  35    ff   ff   

 2931 20:09:40.759358  36    ff   ff   

 2932 20:09:40.761970  37    ff   ff   

 2933 20:09:40.762497  38    ff   ff   

 2934 20:09:40.765243  39    ff   ff   

 2935 20:09:40.765811  40    ff   ff   

 2936 20:09:40.768309  41    ff   ff   

 2937 20:09:40.772314  pass bytecount = 0xff (0xff: all bytes pass) 

 2938 20:09:40.772833  

 2939 20:09:40.773170  DQS0 dly: 35

 2940 20:09:40.775033  DQS1 dly: 32

 2941 20:09:40.775591  Write Rank0 MR2 =0x2d

 2942 20:09:40.778109  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2943 20:09:40.781830  Write Rank1 MR1 =0xd6

 2944 20:09:40.782348  [Gating]

 2945 20:09:40.782686  ==

 2946 20:09:40.789066  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 2947 20:09:40.791468  fsp= 1, odt_onoff= 1, Byte mode= 0

 2948 20:09:40.791963  ==

 2949 20:09:40.795426  3 1 0 |2827 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2950 20:09:40.801506  3 1 4 |3635 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2951 20:09:40.805403  3 1 8 |201 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2952 20:09:40.808777  3 1 12 |1212 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2953 20:09:40.811721  3 1 16 |3332 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2954 20:09:40.818494  3 1 20 |3433 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2955 20:09:40.821959  3 1 24 |3635 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2956 20:09:40.825142  3 1 28 |d0c 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2957 20:09:40.831967  3 2 0 |3d3d 706  |(11 11)(11 11) |(1 1)(1 1)| 0

 2958 20:09:40.835209  3 2 4 |3b3b 3d3d  |(0 0)(11 11) |(1 1)(1 1)| 0

 2959 20:09:40.838885  [Byte 0] Lead/lag Transition tap number (1)

 2960 20:09:40.841932  3 2 8 |2625 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 2961 20:09:40.848392  3 2 12 |202 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2962 20:09:40.851730  3 2 16 |3c3b 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2963 20:09:40.855287  3 2 20 |3b3b 3d3d  |(0 0)(11 11) |(0 0)(1 1)| 0

 2964 20:09:40.862019  3 2 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2965 20:09:40.865011  3 2 28 |202 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2966 20:09:40.868574  3 3 0 |504 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2967 20:09:40.872045  [Byte 0] Lead/lag falling Transition (3, 3, 0)

 2968 20:09:40.878233  3 3 4 |3534 202  |(11 11)(11 11) |(0 1)(1 1)| 0

 2969 20:09:40.882114  3 3 8 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2970 20:09:40.885341  [Byte 1] Lead/lag falling Transition (3, 3, 8)

 2971 20:09:40.888262  3 3 12 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2972 20:09:40.895421  3 3 16 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2973 20:09:40.898651  3 3 20 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2974 20:09:40.901486  3 3 24 |3534 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2975 20:09:40.908628  3 3 28 |201 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2976 20:09:40.911802  3 4 0 |3d3d b0a  |(11 11)(11 11) |(1 1)(1 1)| 0

 2977 20:09:40.915081  3 4 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2978 20:09:40.921897  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2979 20:09:40.925199  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2980 20:09:40.928259  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2981 20:09:40.934909  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2982 20:09:40.938237  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2983 20:09:40.941577  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2984 20:09:40.948146  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2985 20:09:40.951355  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2986 20:09:40.954634  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2987 20:09:40.958609  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2988 20:09:40.964843  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2989 20:09:40.968269  [Byte 0] Lead/lag falling Transition (3, 5, 16)

 2990 20:09:40.971582  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 2991 20:09:40.974858  [Byte 0] Lead/lag Transition tap number (2)

 2992 20:09:40.981797  [Byte 1] Lead/lag falling Transition (3, 5, 20)

 2993 20:09:40.985286  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 2994 20:09:40.989081  [Byte 1] Lead/lag Transition tap number (2)

 2995 20:09:40.992015  3 5 28 |202 3d3d  |(11 11)(11 11) |(0 0)(0 0)| 0

 2996 20:09:40.998521  3 6 0 |4646 202  |(0 0)(11 11) |(0 0)(0 0)| 0

 2997 20:09:40.999112  [Byte 0]First pass (3, 6, 0)

 2998 20:09:41.005108  3 6 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2999 20:09:41.005750  [Byte 1]First pass (3, 6, 4)

 3000 20:09:41.011776  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3001 20:09:41.015364  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3002 20:09:41.018476  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3003 20:09:41.021846  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3004 20:09:41.028647  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3005 20:09:41.031915  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3006 20:09:41.035307  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3007 20:09:41.038525  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3008 20:09:41.041504  All bytes gating window > 1UI, Early break!

 3009 20:09:41.041990  

 3010 20:09:41.045411  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)

 3011 20:09:41.046020  

 3012 20:09:41.051664  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 24)

 3013 20:09:41.052148  

 3014 20:09:41.052644  

 3015 20:09:41.053104  

 3016 20:09:41.054780  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)

 3017 20:09:41.055276  

 3018 20:09:41.058264  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 24)

 3019 20:09:41.058821  

 3020 20:09:41.059317  

 3021 20:09:41.061543  Write Rank1 MR1 =0x56

 3022 20:09:41.062024  

 3023 20:09:41.065846  best RODT dly(2T, 0.5T) = (2, 2)

 3024 20:09:41.066429  

 3025 20:09:41.067743  best RODT dly(2T, 0.5T) = (2, 2)

 3026 20:09:41.068371  ==

 3027 20:09:41.071646  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3028 20:09:41.074638  fsp= 1, odt_onoff= 1, Byte mode= 0

 3029 20:09:41.075120  ==

 3030 20:09:41.081619  Start DQ dly to find pass range UseTestEngine =0

 3031 20:09:41.085503  x-axis: bit #, y-axis: DQ dly (-127~63)

 3032 20:09:41.086079  RX Vref Scan = 0

 3033 20:09:41.088663  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3034 20:09:41.091470  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3035 20:09:41.094585  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3036 20:09:41.098624  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3037 20:09:41.099209  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3038 20:09:41.101450  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3039 20:09:41.105228  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3040 20:09:41.108749  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3041 20:09:41.111640  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3042 20:09:41.114721  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3043 20:09:41.118276  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3044 20:09:41.121470  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3045 20:09:41.125210  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3046 20:09:41.125844  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3047 20:09:41.128236  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3048 20:09:41.131545  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3049 20:09:41.134680  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3050 20:09:41.137949  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3051 20:09:41.141167  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3052 20:09:41.144679  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3053 20:09:41.145219  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3054 20:09:41.148121  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3055 20:09:41.151234  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3056 20:09:41.154572  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 3057 20:09:41.158152  -2, [0] xxxoxxxx xxxxxxxx [MSB]

 3058 20:09:41.161748  -1, [0] xxxoxxxx xxxxxxxo [MSB]

 3059 20:09:41.165023  0, [0] xxooxxxo xxxxxxxo [MSB]

 3060 20:09:41.165507  1, [0] xxoooxxo xxxxxxxo [MSB]

 3061 20:09:41.168112  2, [0] xxoooxxo oooxxxxo [MSB]

 3062 20:09:41.171217  3, [0] xxoooxxo oooxxooo [MSB]

 3063 20:09:41.174849  4, [0] xxoooxxo oooooooo [MSB]

 3064 20:09:41.178222  5, [0] xoooooxo oooooooo [MSB]

 3065 20:09:41.181351  6, [0] xoooooxo oooooooo [MSB]

 3066 20:09:41.181779  34, [0] ooxxoooo oooooooo [MSB]

 3067 20:09:41.184910  35, [0] ooxxoooo ooooooox [MSB]

 3068 20:09:41.188558  36, [0] ooxxoooo ooooooox [MSB]

 3069 20:09:41.191423  37, [0] ooxxoooo ooxoooox [MSB]

 3070 20:09:41.194552  38, [0] ooxxxooo xoxooxox [MSB]

 3071 20:09:41.198292  39, [0] ooxxxoox xxxxoxxx [MSB]

 3072 20:09:41.201199  40, [0] ooxxxoox xxxxoxxx [MSB]

 3073 20:09:41.201673  41, [0] ooxxxoox xxxxxxxx [MSB]

 3074 20:09:41.204608  42, [0] oxxxxxxx xxxxxxxx [MSB]

 3075 20:09:41.208748  43, [0] xxxxxxxx xxxxxxxx [MSB]

 3076 20:09:41.211054  iDelay=43, Bit 0, Center 24 (7 ~ 42) 36

 3077 20:09:41.214472  iDelay=43, Bit 1, Center 23 (5 ~ 41) 37

 3078 20:09:41.217949  iDelay=43, Bit 2, Center 16 (0 ~ 33) 34

 3079 20:09:41.221277  iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36

 3080 20:09:41.224842  iDelay=43, Bit 4, Center 19 (1 ~ 37) 37

 3081 20:09:41.231544  iDelay=43, Bit 5, Center 23 (5 ~ 41) 37

 3082 20:09:41.234617  iDelay=43, Bit 6, Center 24 (7 ~ 41) 35

 3083 20:09:41.237901  iDelay=43, Bit 7, Center 19 (0 ~ 38) 39

 3084 20:09:41.241504  iDelay=43, Bit 8, Center 19 (2 ~ 37) 36

 3085 20:09:41.245408  iDelay=43, Bit 9, Center 20 (2 ~ 38) 37

 3086 20:09:41.248150  iDelay=43, Bit 10, Center 19 (2 ~ 36) 35

 3087 20:09:41.251115  iDelay=43, Bit 11, Center 21 (4 ~ 38) 35

 3088 20:09:41.254667  iDelay=43, Bit 12, Center 22 (4 ~ 40) 37

 3089 20:09:41.258066  iDelay=43, Bit 13, Center 20 (3 ~ 37) 35

 3090 20:09:41.261129  iDelay=43, Bit 14, Center 20 (3 ~ 38) 36

 3091 20:09:41.264483  iDelay=43, Bit 15, Center 16 (-1 ~ 34) 36

 3092 20:09:41.264960  ==

 3093 20:09:41.271168  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3094 20:09:41.274152  fsp= 1, odt_onoff= 1, Byte mode= 0

 3095 20:09:41.274610  ==

 3096 20:09:41.274948  DQS Delay:

 3097 20:09:41.277784  DQS0 = 0, DQS1 = 0

 3098 20:09:41.278222  DQM Delay:

 3099 20:09:41.280807  DQM0 = 20, DQM1 = 19

 3100 20:09:41.281369  DQ Delay:

 3101 20:09:41.284616  DQ0 =24, DQ1 =23, DQ2 =16, DQ3 =15

 3102 20:09:41.287525  DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19

 3103 20:09:41.290856  DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =21

 3104 20:09:41.294091  DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16

 3105 20:09:41.294612  

 3106 20:09:41.294996  

 3107 20:09:41.295371  DramC Write-DBI off

 3108 20:09:41.297671  ==

 3109 20:09:41.300835  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3110 20:09:41.304174  fsp= 1, odt_onoff= 1, Byte mode= 0

 3111 20:09:41.304742  ==

 3112 20:09:41.307823  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 3113 20:09:41.308345  

 3114 20:09:41.310829  Begin, DQ Scan Range 928~1184

 3115 20:09:41.311444  

 3116 20:09:41.311988  

 3117 20:09:41.314229  	TX Vref Scan disable

 3118 20:09:41.317558  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 3119 20:09:41.320611  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 3120 20:09:41.324315  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 3121 20:09:41.328091  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 3122 20:09:41.331452  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 3123 20:09:41.334019  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 3124 20:09:41.337426  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 3125 20:09:41.340696  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 3126 20:09:41.347270  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 3127 20:09:41.350628  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 3128 20:09:41.354197  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 3129 20:09:41.357139  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 3130 20:09:41.361145  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 3131 20:09:41.364371  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 3132 20:09:41.367566  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 3133 20:09:41.370940  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 3134 20:09:41.374052  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 3135 20:09:41.377250  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 3136 20:09:41.380472  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 3137 20:09:41.383573  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 3138 20:09:41.387073  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 3139 20:09:41.390328  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 3140 20:09:41.394173  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 3141 20:09:41.397158  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 3142 20:09:41.403784  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 3143 20:09:41.407387  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 3144 20:09:41.410436  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 3145 20:09:41.413786  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 3146 20:09:41.417537  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 3147 20:09:41.420550  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 3148 20:09:41.423573  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 3149 20:09:41.426961  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 3150 20:09:41.430837  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3151 20:09:41.434252  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3152 20:09:41.437641  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3153 20:09:41.440538  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 3154 20:09:41.444198  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 3155 20:09:41.447311  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 3156 20:09:41.450895  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 3157 20:09:41.454350  967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]

 3158 20:09:41.457348  968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]

 3159 20:09:41.460418  969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]

 3160 20:09:41.463772  970 |3 6 10|[0] xxxxxxxx oooooxoo [MSB]

 3161 20:09:41.467381  971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]

 3162 20:09:41.470737  972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]

 3163 20:09:41.477299  973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]

 3164 20:09:41.480505  974 |3 6 14|[0] xxooxxxx oooooooo [MSB]

 3165 20:09:41.484469  975 |3 6 15|[0] xxoooxxx oooooooo [MSB]

 3166 20:09:41.487367  976 |3 6 16|[0] xxoooxxo oooooooo [MSB]

 3167 20:09:41.490608  977 |3 6 17|[0] xooooooo oooooooo [MSB]

 3168 20:09:41.494296  988 |3 6 28|[0] oooooooo ooooooox [MSB]

 3169 20:09:41.497164  989 |3 6 29|[0] oooooooo ooooooox [MSB]

 3170 20:09:41.500827  990 |3 6 30|[0] oooooooo ooooooox [MSB]

 3171 20:09:41.507242  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 3172 20:09:41.510480  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 3173 20:09:41.513925  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 3174 20:09:41.517204  994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]

 3175 20:09:41.520516  995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]

 3176 20:09:41.524328  996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]

 3177 20:09:41.527142  997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]

 3178 20:09:41.530292  998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]

 3179 20:09:41.533775  999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]

 3180 20:09:41.537291  Byte0, DQ PI dly=985, DQM PI dly= 985

 3181 20:09:41.540095  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)

 3182 20:09:41.540656  

 3183 20:09:41.547212  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)

 3184 20:09:41.547638  

 3185 20:09:41.550604  Byte1, DQ PI dly=978, DQM PI dly= 978

 3186 20:09:41.554390  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)

 3187 20:09:41.554818  

 3188 20:09:41.557495  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)

 3189 20:09:41.558031  

 3190 20:09:41.558369  ==

 3191 20:09:41.564443  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3192 20:09:41.567086  fsp= 1, odt_onoff= 1, Byte mode= 0

 3193 20:09:41.567545  ==

 3194 20:09:41.570702  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 3195 20:09:41.571228  

 3196 20:09:41.573703  Begin, DQ Scan Range 954~1018

 3197 20:09:41.576727  Write Rank1 MR14 =0x0

 3198 20:09:41.585571  

 3199 20:09:41.586133  	CH=1, VrefRange= 0, VrefLevel = 0

 3200 20:09:41.591567  TX Bit0 (979~998) 20 988,   Bit8 (971~986) 16 978,

 3201 20:09:41.594875  TX Bit1 (978~995) 18 986,   Bit9 (970~986) 17 978,

 3202 20:09:41.601733  TX Bit2 (976~991) 16 983,   Bit10 (973~986) 14 979,

 3203 20:09:41.605033  TX Bit3 (975~991) 17 983,   Bit11 (974~990) 17 982,

 3204 20:09:41.608606  TX Bit4 (977~992) 16 984,   Bit12 (972~987) 16 979,

 3205 20:09:41.615456  TX Bit5 (978~996) 19 987,   Bit13 (974~986) 13 980,

 3206 20:09:41.618559  TX Bit6 (978~997) 20 987,   Bit14 (972~987) 16 979,

 3207 20:09:41.621607  TX Bit7 (977~992) 16 984,   Bit15 (968~985) 18 976,

 3208 20:09:41.622142  

 3209 20:09:41.625040  Write Rank1 MR14 =0x2

 3210 20:09:41.633896  

 3211 20:09:41.634314  	CH=1, VrefRange= 0, VrefLevel = 2

 3212 20:09:41.640397  TX Bit0 (979~998) 20 988,   Bit8 (970~987) 18 978,

 3213 20:09:41.643781  TX Bit1 (978~996) 19 987,   Bit9 (970~987) 18 978,

 3214 20:09:41.650410  TX Bit2 (976~991) 16 983,   Bit10 (973~987) 15 980,

 3215 20:09:41.654349  TX Bit3 (974~991) 18 982,   Bit11 (973~991) 19 982,

 3216 20:09:41.657332  TX Bit4 (976~993) 18 984,   Bit12 (972~988) 17 980,

 3217 20:09:41.663788  TX Bit5 (978~997) 20 987,   Bit13 (974~987) 14 980,

 3218 20:09:41.667134  TX Bit6 (978~998) 21 988,   Bit14 (972~988) 17 980,

 3219 20:09:41.670567  TX Bit7 (977~992) 16 984,   Bit15 (968~985) 18 976,

 3220 20:09:41.671073  

 3221 20:09:41.673884  Write Rank1 MR14 =0x4

 3222 20:09:41.682754  

 3223 20:09:41.683174  	CH=1, VrefRange= 0, VrefLevel = 4

 3224 20:09:41.689372  TX Bit0 (979~998) 20 988,   Bit8 (970~987) 18 978,

 3225 20:09:41.692650  TX Bit1 (978~997) 20 987,   Bit9 (970~986) 17 978,

 3226 20:09:41.699803  TX Bit2 (975~992) 18 983,   Bit10 (971~987) 17 979,

 3227 20:09:41.702952  TX Bit3 (974~991) 18 982,   Bit11 (973~991) 19 982,

 3228 20:09:41.706536  TX Bit4 (976~993) 18 984,   Bit12 (972~989) 18 980,

 3229 20:09:41.712770  TX Bit5 (978~997) 20 987,   Bit13 (974~987) 14 980,

 3230 20:09:41.716375  TX Bit6 (978~998) 21 988,   Bit14 (972~988) 17 980,

 3231 20:09:41.719756  TX Bit7 (977~993) 17 985,   Bit15 (968~985) 18 976,

 3232 20:09:41.720235  

 3233 20:09:41.722867  Write Rank1 MR14 =0x6

 3234 20:09:41.731767  

 3235 20:09:41.732185  	CH=1, VrefRange= 0, VrefLevel = 6

 3236 20:09:41.738585  TX Bit0 (978~998) 21 988,   Bit8 (970~988) 19 979,

 3237 20:09:41.742058  TX Bit1 (978~997) 20 987,   Bit9 (970~988) 19 979,

 3238 20:09:41.748287  TX Bit2 (975~992) 18 983,   Bit10 (972~988) 17 980,

 3239 20:09:41.752393  TX Bit3 (974~992) 19 983,   Bit11 (972~991) 20 981,

 3240 20:09:41.755357  TX Bit4 (976~994) 19 985,   Bit12 (971~990) 20 980,

 3241 20:09:41.761804  TX Bit5 (978~998) 21 988,   Bit13 (974~989) 16 981,

 3242 20:09:41.765352  TX Bit6 (978~998) 21 988,   Bit14 (971~990) 20 980,

 3243 20:09:41.768351  TX Bit7 (977~993) 17 985,   Bit15 (968~986) 19 977,

 3244 20:09:41.768853  

 3245 20:09:41.771550  Write Rank1 MR14 =0x8

 3246 20:09:41.780717  

 3247 20:09:41.781139  	CH=1, VrefRange= 0, VrefLevel = 8

 3248 20:09:41.787433  TX Bit0 (978~999) 22 988,   Bit8 (970~988) 19 979,

 3249 20:09:41.790822  TX Bit1 (978~998) 21 988,   Bit9 (969~988) 20 978,

 3250 20:09:41.797335  TX Bit2 (975~992) 18 983,   Bit10 (971~989) 19 980,

 3251 20:09:41.801162  TX Bit3 (973~992) 20 982,   Bit11 (972~992) 21 982,

 3252 20:09:41.804199  TX Bit4 (976~995) 20 985,   Bit12 (971~990) 20 980,

 3253 20:09:41.810696  TX Bit5 (977~998) 22 987,   Bit13 (973~989) 17 981,

 3254 20:09:41.814147  TX Bit6 (977~998) 22 987,   Bit14 (971~990) 20 980,

 3255 20:09:41.817433  TX Bit7 (977~994) 18 985,   Bit15 (967~986) 20 976,

 3256 20:09:41.817857  

 3257 20:09:41.820584  Write Rank1 MR14 =0xa

 3258 20:09:41.829824  

 3259 20:09:41.833691  	CH=1, VrefRange= 0, VrefLevel = 10

 3260 20:09:41.836789  TX Bit0 (978~999) 22 988,   Bit8 (970~989) 20 979,

 3261 20:09:41.840082  TX Bit1 (977~998) 22 987,   Bit9 (969~989) 21 979,

 3262 20:09:41.846732  TX Bit2 (974~993) 20 983,   Bit10 (970~990) 21 980,

 3263 20:09:41.850185  TX Bit3 (973~992) 20 982,   Bit11 (971~992) 22 981,

 3264 20:09:41.853523  TX Bit4 (976~995) 20 985,   Bit12 (971~991) 21 981,

 3265 20:09:41.860385  TX Bit5 (977~998) 22 987,   Bit13 (972~990) 19 981,

 3266 20:09:41.863402  TX Bit6 (977~999) 23 988,   Bit14 (971~991) 21 981,

 3267 20:09:41.866313  TX Bit7 (976~994) 19 985,   Bit15 (967~986) 20 976,

 3268 20:09:41.869902  

 3269 20:09:41.870320  Write Rank1 MR14 =0xc

 3270 20:09:41.879789  

 3271 20:09:41.880203  	CH=1, VrefRange= 0, VrefLevel = 12

 3272 20:09:41.886275  TX Bit0 (978~1000) 23 989,   Bit8 (970~990) 21 980,

 3273 20:09:41.889901  TX Bit1 (977~998) 22 987,   Bit9 (969~989) 21 979,

 3274 20:09:41.895965  TX Bit2 (974~993) 20 983,   Bit10 (969~990) 22 979,

 3275 20:09:41.899463  TX Bit3 (972~993) 22 982,   Bit11 (971~992) 22 981,

 3276 20:09:41.903052  TX Bit4 (975~996) 22 985,   Bit12 (970~991) 22 980,

 3277 20:09:41.909752  TX Bit5 (977~998) 22 987,   Bit13 (972~990) 19 981,

 3278 20:09:41.912788  TX Bit6 (978~999) 22 988,   Bit14 (970~991) 22 980,

 3279 20:09:41.916439  TX Bit7 (976~995) 20 985,   Bit15 (967~987) 21 977,

 3280 20:09:41.916863  

 3281 20:09:41.919168  Write Rank1 MR14 =0xe

 3282 20:09:41.928835  

 3283 20:09:41.932222  	CH=1, VrefRange= 0, VrefLevel = 14

 3284 20:09:41.935486  TX Bit0 (978~1000) 23 989,   Bit8 (969~990) 22 979,

 3285 20:09:41.938945  TX Bit1 (977~998) 22 987,   Bit9 (969~990) 22 979,

 3286 20:09:41.945681  TX Bit2 (975~994) 20 984,   Bit10 (969~990) 22 979,

 3287 20:09:41.948855  TX Bit3 (972~993) 22 982,   Bit11 (971~992) 22 981,

 3288 20:09:41.952033  TX Bit4 (975~997) 23 986,   Bit12 (970~992) 23 981,

 3289 20:09:41.958965  TX Bit5 (977~998) 22 987,   Bit13 (971~991) 21 981,

 3290 20:09:41.962031  TX Bit6 (977~1000) 24 988,   Bit14 (970~991) 22 980,

 3291 20:09:41.965362  TX Bit7 (976~995) 20 985,   Bit15 (967~987) 21 977,

 3292 20:09:41.965786  

 3293 20:09:41.969132  Write Rank1 MR14 =0x10

 3294 20:09:41.978215  

 3295 20:09:41.981667  	CH=1, VrefRange= 0, VrefLevel = 16

 3296 20:09:41.985017  TX Bit0 (977~1000) 24 988,   Bit8 (969~991) 23 980,

 3297 20:09:41.988357  TX Bit1 (977~999) 23 988,   Bit9 (969~990) 22 979,

 3298 20:09:41.995225  TX Bit2 (974~994) 21 984,   Bit10 (969~991) 23 980,

 3299 20:09:41.998438  TX Bit3 (971~994) 24 982,   Bit11 (970~993) 24 981,

 3300 20:09:42.001770  TX Bit4 (975~997) 23 986,   Bit12 (970~992) 23 981,

 3301 20:09:42.008316  TX Bit5 (977~999) 23 988,   Bit13 (970~991) 22 980,

 3302 20:09:42.011665  TX Bit6 (977~1000) 24 988,   Bit14 (970~991) 22 980,

 3303 20:09:42.015147  TX Bit7 (976~996) 21 986,   Bit15 (967~987) 21 977,

 3304 20:09:42.015687  

 3305 20:09:42.018702  Write Rank1 MR14 =0x12

 3306 20:09:42.028137  

 3307 20:09:42.031402  	CH=1, VrefRange= 0, VrefLevel = 18

 3308 20:09:42.034854  TX Bit0 (978~1001) 24 989,   Bit8 (969~991) 23 980,

 3309 20:09:42.038034  TX Bit1 (977~999) 23 988,   Bit9 (969~991) 23 980,

 3310 20:09:42.045009  TX Bit2 (973~994) 22 983,   Bit10 (969~991) 23 980,

 3311 20:09:42.048385  TX Bit3 (971~994) 24 982,   Bit11 (970~993) 24 981,

 3312 20:09:42.051430  TX Bit4 (974~997) 24 985,   Bit12 (970~992) 23 981,

 3313 20:09:42.058328  TX Bit5 (977~999) 23 988,   Bit13 (971~991) 21 981,

 3314 20:09:42.061698  TX Bit6 (977~1000) 24 988,   Bit14 (970~992) 23 981,

 3315 20:09:42.064686  TX Bit7 (976~997) 22 986,   Bit15 (967~988) 22 977,

 3316 20:09:42.068358  

 3317 20:09:42.068768  Write Rank1 MR14 =0x14

 3318 20:09:42.077572  

 3319 20:09:42.080880  	CH=1, VrefRange= 0, VrefLevel = 20

 3320 20:09:42.084250  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3321 20:09:42.087567  TX Bit1 (977~999) 23 988,   Bit9 (969~991) 23 980,

 3322 20:09:42.094300  TX Bit2 (973~996) 24 984,   Bit10 (969~991) 23 980,

 3323 20:09:42.097937  TX Bit3 (971~995) 25 983,   Bit11 (970~993) 24 981,

 3324 20:09:42.100864  TX Bit4 (974~997) 24 985,   Bit12 (969~992) 24 980,

 3325 20:09:42.107554  TX Bit5 (976~999) 24 987,   Bit13 (971~992) 22 981,

 3326 20:09:42.110990  TX Bit6 (976~1000) 25 988,   Bit14 (969~992) 24 980,

 3327 20:09:42.114347  TX Bit7 (976~997) 22 986,   Bit15 (966~989) 24 977,

 3328 20:09:42.117539  

 3329 20:09:42.117619  Write Rank1 MR14 =0x16

 3330 20:09:42.127476  

 3331 20:09:42.130826  	CH=1, VrefRange= 0, VrefLevel = 22

 3332 20:09:42.134060  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3333 20:09:42.138022  TX Bit1 (976~999) 24 987,   Bit9 (968~991) 24 979,

 3334 20:09:42.144295  TX Bit2 (972~997) 26 984,   Bit10 (968~991) 24 979,

 3335 20:09:42.147298  TX Bit3 (970~995) 26 982,   Bit11 (970~993) 24 981,

 3336 20:09:42.151063  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3337 20:09:42.157461  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3338 20:09:42.160628  TX Bit6 (977~1000) 24 988,   Bit14 (969~992) 24 980,

 3339 20:09:42.164131  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3340 20:09:42.167533  

 3341 20:09:42.167613  Write Rank1 MR14 =0x18

 3342 20:09:42.177364  

 3343 20:09:42.180740  	CH=1, VrefRange= 0, VrefLevel = 24

 3344 20:09:42.184482  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3345 20:09:42.187615  TX Bit1 (976~999) 24 987,   Bit9 (968~991) 24 979,

 3346 20:09:42.193907  TX Bit2 (972~997) 26 984,   Bit10 (968~991) 24 979,

 3347 20:09:42.197168  TX Bit3 (970~995) 26 982,   Bit11 (970~993) 24 981,

 3348 20:09:42.200675  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3349 20:09:42.207845  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3350 20:09:42.210753  TX Bit6 (977~1000) 24 988,   Bit14 (969~992) 24 980,

 3351 20:09:42.217086  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3352 20:09:42.217168  

 3353 20:09:42.217233  Write Rank1 MR14 =0x1a

 3354 20:09:42.227902  

 3355 20:09:42.230864  	CH=1, VrefRange= 0, VrefLevel = 26

 3356 20:09:42.234149  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3357 20:09:42.237489  TX Bit1 (976~999) 24 987,   Bit9 (968~991) 24 979,

 3358 20:09:42.244190  TX Bit2 (972~997) 26 984,   Bit10 (968~991) 24 979,

 3359 20:09:42.247266  TX Bit3 (970~995) 26 982,   Bit11 (970~993) 24 981,

 3360 20:09:42.250711  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3361 20:09:42.257202  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3362 20:09:42.260603  TX Bit6 (977~1000) 24 988,   Bit14 (969~992) 24 980,

 3363 20:09:42.267653  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3364 20:09:42.267736  

 3365 20:09:42.267801  Write Rank1 MR14 =0x1c

 3366 20:09:42.277552  

 3367 20:09:42.280556  	CH=1, VrefRange= 0, VrefLevel = 28

 3368 20:09:42.284229  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3369 20:09:42.287150  TX Bit1 (976~999) 24 987,   Bit9 (968~991) 24 979,

 3370 20:09:42.293897  TX Bit2 (972~997) 26 984,   Bit10 (968~991) 24 979,

 3371 20:09:42.297493  TX Bit3 (970~995) 26 982,   Bit11 (970~993) 24 981,

 3372 20:09:42.300470  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3373 20:09:42.307933  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3374 20:09:42.310793  TX Bit6 (977~1000) 24 988,   Bit14 (969~992) 24 980,

 3375 20:09:42.317182  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3376 20:09:42.317321  

 3377 20:09:42.320766  wait MRW command Rank1 MR14 =0x1e fired (1)

 3378 20:09:42.320847  Write Rank1 MR14 =0x1e

 3379 20:09:42.331254  

 3380 20:09:42.334689  	CH=1, VrefRange= 0, VrefLevel = 30

 3381 20:09:42.337918  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3382 20:09:42.341128  TX Bit1 (976~999) 24 987,   Bit9 (968~991) 24 979,

 3383 20:09:42.347549  TX Bit2 (972~997) 26 984,   Bit10 (968~991) 24 979,

 3384 20:09:42.351454  TX Bit3 (970~995) 26 982,   Bit11 (970~993) 24 981,

 3385 20:09:42.354531  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3386 20:09:42.361480  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3387 20:09:42.364881  TX Bit6 (977~1000) 24 988,   Bit14 (969~992) 24 980,

 3388 20:09:42.367872  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3389 20:09:42.367954  

 3390 20:09:42.371385  Write Rank1 MR14 =0x20

 3391 20:09:42.381153  

 3392 20:09:42.384760  	CH=1, VrefRange= 0, VrefLevel = 32

 3393 20:09:42.387498  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3394 20:09:42.391083  TX Bit1 (976~999) 24 987,   Bit9 (968~991) 24 979,

 3395 20:09:42.397928  TX Bit2 (972~997) 26 984,   Bit10 (968~991) 24 979,

 3396 20:09:42.401208  TX Bit3 (970~995) 26 982,   Bit11 (970~993) 24 981,

 3397 20:09:42.404207  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3398 20:09:42.411941  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3399 20:09:42.414193  TX Bit6 (977~1000) 24 988,   Bit14 (969~992) 24 980,

 3400 20:09:42.417971  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3401 20:09:42.421234  

 3402 20:09:42.421359  

 3403 20:09:42.424576  TX Vref found, early break! 365< 368

 3404 20:09:42.427663  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 3405 20:09:42.430828  u1DelayCellOfst[0]=8 cells (7 PI)

 3406 20:09:42.434452  u1DelayCellOfst[1]=6 cells (5 PI)

 3407 20:09:42.437725  u1DelayCellOfst[2]=2 cells (2 PI)

 3408 20:09:42.441232  u1DelayCellOfst[3]=0 cells (0 PI)

 3409 20:09:42.441358  u1DelayCellOfst[4]=5 cells (4 PI)

 3410 20:09:42.444336  u1DelayCellOfst[5]=7 cells (6 PI)

 3411 20:09:42.448034  u1DelayCellOfst[6]=7 cells (6 PI)

 3412 20:09:42.451021  u1DelayCellOfst[7]=5 cells (4 PI)

 3413 20:09:42.454881  Byte0, DQ PI dly=982, DQM PI dly= 985

 3414 20:09:42.461104  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)

 3415 20:09:42.461186  

 3416 20:09:42.464415  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)

 3417 20:09:42.464497  

 3418 20:09:42.467904  u1DelayCellOfst[8]=3 cells (3 PI)

 3419 20:09:42.471355  u1DelayCellOfst[9]=2 cells (2 PI)

 3420 20:09:42.474378  u1DelayCellOfst[10]=2 cells (2 PI)

 3421 20:09:42.478043  u1DelayCellOfst[11]=5 cells (4 PI)

 3422 20:09:42.478123  u1DelayCellOfst[12]=3 cells (3 PI)

 3423 20:09:42.481418  u1DelayCellOfst[13]=5 cells (4 PI)

 3424 20:09:42.484385  u1DelayCellOfst[14]=3 cells (3 PI)

 3425 20:09:42.487856  u1DelayCellOfst[15]=0 cells (0 PI)

 3426 20:09:42.491012  Byte1, DQ PI dly=977, DQM PI dly= 979

 3427 20:09:42.498008  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)

 3428 20:09:42.498089  

 3429 20:09:42.500992  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)

 3430 20:09:42.501072  

 3431 20:09:42.504466  Write Rank1 MR14 =0x16

 3432 20:09:42.504546  

 3433 20:09:42.504610  Final TX Range 0 Vref 22

 3434 20:09:42.504671  

 3435 20:09:42.511028  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 3436 20:09:42.511110  

 3437 20:09:42.518195  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3438 20:09:42.524425  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3439 20:09:42.534477  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3440 20:09:42.534559  Write Rank1 MR3 =0xb0

 3441 20:09:42.537844  DramC Write-DBI on

 3442 20:09:42.537924  ==

 3443 20:09:42.541142  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3444 20:09:42.544821  fsp= 1, odt_onoff= 1, Byte mode= 0

 3445 20:09:42.544902  ==

 3446 20:09:42.550824  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 3447 20:09:42.550904  

 3448 20:09:42.550968  Begin, DQ Scan Range 699~763

 3449 20:09:42.551028  

 3450 20:09:42.551085  

 3451 20:09:42.554346  	TX Vref Scan disable

 3452 20:09:42.557834  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 3453 20:09:42.560968  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 3454 20:09:42.564341  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 3455 20:09:42.567656  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 3456 20:09:42.571015  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 3457 20:09:42.574309  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3458 20:09:42.577694  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3459 20:09:42.580799  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3460 20:09:42.587536  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 3461 20:09:42.591030  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 3462 20:09:42.594195  709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 3463 20:09:42.598167  710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 3464 20:09:42.600750  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 3465 20:09:42.604062  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 3466 20:09:42.607942  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 3467 20:09:42.611098  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 3468 20:09:42.613986  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 3469 20:09:42.617497  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 3470 20:09:42.621133  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 3471 20:09:42.623904  718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]

 3472 20:09:42.632185  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 3473 20:09:42.636052  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 3474 20:09:42.639340  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 3475 20:09:42.642178  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 3476 20:09:42.645593  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 3477 20:09:42.648719  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 3478 20:09:42.652345  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 3479 20:09:42.655628  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 3480 20:09:42.658890  744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]

 3481 20:09:42.662391  Byte0, DQ PI dly=731, DQM PI dly= 731

 3482 20:09:42.665630  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)

 3483 20:09:42.665871  

 3484 20:09:42.672053  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)

 3485 20:09:42.672340  

 3486 20:09:42.675384  Byte1, DQ PI dly=723, DQM PI dly= 723

 3487 20:09:42.679092  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)

 3488 20:09:42.679419  

 3489 20:09:42.682161  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)

 3490 20:09:42.682612  

 3491 20:09:42.688923  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 3492 20:09:42.699094  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3493 20:09:42.705541  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3494 20:09:42.705959  Write Rank1 MR3 =0x30

 3495 20:09:42.709050  DramC Write-DBI off

 3496 20:09:42.709599  

 3497 20:09:42.709932  [DATLAT]

 3498 20:09:42.712599  Freq=1600, CH1 RK1, use_rxtx_scan=0

 3499 20:09:42.713114  

 3500 20:09:42.715605  DATLAT Default: 0x10

 3501 20:09:42.716119  7, 0xFFFF, sum=0

 3502 20:09:42.719172  8, 0xFFFF, sum=0

 3503 20:09:42.719687  9, 0xFFFF, sum=0

 3504 20:09:42.722453  10, 0xFFFF, sum=0

 3505 20:09:42.722967  11, 0xFFFF, sum=0

 3506 20:09:42.725566  12, 0xFFFF, sum=0

 3507 20:09:42.726082  13, 0xFFFF, sum=0

 3508 20:09:42.728699  14, 0x0, sum=1

 3509 20:09:42.729220  15, 0x0, sum=2

 3510 20:09:42.729628  16, 0x0, sum=3

 3511 20:09:42.732103  17, 0x0, sum=4

 3512 20:09:42.735302  pattern=2 first_step=14 total pass=5 best_step=16

 3513 20:09:42.735806  ==

 3514 20:09:42.741886  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3515 20:09:42.745394  fsp= 1, odt_onoff= 1, Byte mode= 0

 3516 20:09:42.745818  ==

 3517 20:09:42.749041  Start DQ dly to find pass range UseTestEngine =1

 3518 20:09:42.752304  x-axis: bit #, y-axis: DQ dly (-127~63)

 3519 20:09:42.755477  RX Vref Scan = 0

 3520 20:09:42.756041  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3521 20:09:42.758914  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3522 20:09:42.762671  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3523 20:09:42.765378  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3524 20:09:42.768687  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3525 20:09:42.771588  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3526 20:09:42.775307  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3527 20:09:42.778410  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3528 20:09:42.781611  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3529 20:09:42.782128  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3530 20:09:42.784658  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3531 20:09:42.788708  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3532 20:09:42.791445  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3533 20:09:42.795176  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3534 20:09:42.798648  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3535 20:09:42.801339  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3536 20:09:42.804855  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3537 20:09:42.805325  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3538 20:09:42.808666  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3539 20:09:42.811951  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3540 20:09:42.815255  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3541 20:09:42.818498  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3542 20:09:42.821693  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3543 20:09:42.824551  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 3544 20:09:42.824980  -2, [0] xxxoxxxx xxxxxxxx [MSB]

 3545 20:09:42.828238  -1, [0] xxxoxxxx xxxxxxxx [MSB]

 3546 20:09:42.831518  0, [0] xxooxxxx xxxxxxxo [MSB]

 3547 20:09:42.835050  1, [0] xxooxxxx oxxxxxxo [MSB]

 3548 20:09:42.838142  2, [0] xxoooxxo oooxxxxo [MSB]

 3549 20:09:42.841689  3, [0] xxoooxxo ooooxooo [MSB]

 3550 20:09:42.844664  4, [0] xxoooxxo oooooooo [MSB]

 3551 20:09:42.845136  5, [0] xoooooxo oooooooo [MSB]

 3552 20:09:42.847914  6, [0] ooooooxo oooooooo [MSB]

 3553 20:09:42.852377  34, [0] oooxoooo oooooooo [MSB]

 3554 20:09:42.855407  35, [0] oooxoooo ooooooox [MSB]

 3555 20:09:42.859248  36, [0] ooxxoooo ooooooox [MSB]

 3556 20:09:42.862301  37, [0] ooxxxoox ooxooxxx [MSB]

 3557 20:09:42.865442  38, [0] ooxxxoox xxxooxxx [MSB]

 3558 20:09:42.868932  39, [0] ooxxxoox xxxxoxxx [MSB]

 3559 20:09:42.869395  40, [0] ooxxxoox xxxxxxxx [MSB]

 3560 20:09:42.872354  41, [0] oxxxxoox xxxxxxxx [MSB]

 3561 20:09:42.875546  42, [0] oxxxxxox xxxxxxxx [MSB]

 3562 20:09:42.878963  43, [0] xxxxxxxx xxxxxxxx [MSB]

 3563 20:09:42.882749  iDelay=43, Bit 0, Center 24 (6 ~ 42) 37

 3564 20:09:42.885540  iDelay=43, Bit 1, Center 22 (5 ~ 40) 36

 3565 20:09:42.888898  iDelay=43, Bit 2, Center 17 (0 ~ 35) 36

 3566 20:09:42.892206  iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36

 3567 20:09:42.895340  iDelay=43, Bit 4, Center 19 (2 ~ 36) 35

 3568 20:09:42.898779  iDelay=43, Bit 5, Center 23 (5 ~ 41) 37

 3569 20:09:42.905370  iDelay=43, Bit 6, Center 24 (7 ~ 42) 36

 3570 20:09:42.908843  iDelay=43, Bit 7, Center 19 (2 ~ 36) 35

 3571 20:09:42.912328  iDelay=43, Bit 8, Center 19 (1 ~ 37) 37

 3572 20:09:42.915934  iDelay=43, Bit 9, Center 19 (2 ~ 37) 36

 3573 20:09:42.919445  iDelay=43, Bit 10, Center 19 (2 ~ 36) 35

 3574 20:09:42.922350  iDelay=43, Bit 11, Center 20 (3 ~ 38) 36

 3575 20:09:42.925909  iDelay=43, Bit 12, Center 21 (4 ~ 39) 36

 3576 20:09:42.928741  iDelay=43, Bit 13, Center 19 (3 ~ 36) 34

 3577 20:09:42.932339  iDelay=43, Bit 14, Center 19 (3 ~ 36) 34

 3578 20:09:42.936192  iDelay=43, Bit 15, Center 17 (0 ~ 34) 35

 3579 20:09:42.936722  ==

 3580 20:09:42.942332  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3581 20:09:42.945699  fsp= 1, odt_onoff= 1, Byte mode= 0

 3582 20:09:42.946164  ==

 3583 20:09:42.946523  DQS Delay:

 3584 20:09:42.949302  DQS0 = 0, DQS1 = 0

 3585 20:09:42.949728  DQM Delay:

 3586 20:09:42.950064  DQM0 = 20, DQM1 = 19

 3587 20:09:42.952741  DQ Delay:

 3588 20:09:42.955663  DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15

 3589 20:09:42.959152  DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19

 3590 20:09:42.962540  DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20

 3591 20:09:42.965690  DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17

 3592 20:09:42.966111  

 3593 20:09:42.966438  

 3594 20:09:42.966741  

 3595 20:09:42.969636  [DramC_TX_OE_Calibration] TA2

 3596 20:09:42.973107  Original DQ_B0 (3 6) =30, OEN = 27

 3597 20:09:42.973708  Original DQ_B1 (3 6) =30, OEN = 27

 3598 20:09:42.976016  23, 0x0, End_B0=23 End_B1=23

 3599 20:09:42.978892  24, 0x0, End_B0=24 End_B1=24

 3600 20:09:42.982394  25, 0x0, End_B0=25 End_B1=25

 3601 20:09:42.985856  26, 0x0, End_B0=26 End_B1=26

 3602 20:09:42.986321  27, 0x0, End_B0=27 End_B1=27

 3603 20:09:42.988794  28, 0x0, End_B0=28 End_B1=28

 3604 20:09:42.992211  29, 0x0, End_B0=29 End_B1=29

 3605 20:09:42.995420  30, 0x0, End_B0=30 End_B1=30

 3606 20:09:42.998875  31, 0xFFFF, End_B0=30 End_B1=30

 3607 20:09:43.003050  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3608 20:09:43.008759  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3609 20:09:43.009183  

 3610 20:09:43.009566  

 3611 20:09:43.012459  Write Rank1 MR23 =0x3f

 3612 20:09:43.013084  [DQSOSC]

 3613 20:09:43.018865  [DQSOSCAuto] RK1, (LSB)MR18= 0xb3, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps

 3614 20:09:43.025914  CH1_RK1: MR19=0x3, MR18=0xB3, DQSOSC=332, MR23=63, INC=22, DEC=33

 3615 20:09:43.026388  Write Rank1 MR23 =0x3f

 3616 20:09:43.029109  [DQSOSC]

 3617 20:09:43.035839  [DQSOSCAuto] RK1, (LSB)MR18= 0xb4, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps

 3618 20:09:43.038909  CH1 RK1: MR19=3, MR18=B4

 3619 20:09:43.042291  [RxdqsGatingPostProcess] freq 1600

 3620 20:09:43.045934  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 3621 20:09:43.048638  Rank: 0

 3622 20:09:43.049058  best DQS0 dly(2T, 0.5T) = (2, 5)

 3623 20:09:43.052214  best DQS1 dly(2T, 0.5T) = (2, 5)

 3624 20:09:43.055794  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 3625 20:09:43.058797  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 3626 20:09:43.059220  Rank: 1

 3627 20:09:43.062482  best DQS0 dly(2T, 0.5T) = (2, 5)

 3628 20:09:43.065389  best DQS1 dly(2T, 0.5T) = (2, 5)

 3629 20:09:43.068875  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 3630 20:09:43.072750  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 3631 20:09:43.078825  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 3632 20:09:43.082587  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 3633 20:09:43.085521  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 3634 20:09:43.085945  

 3635 20:09:43.086275  

 3636 20:09:43.089120  [Calibration Summary] Freqency 1600

 3637 20:09:43.089687  CH 0, Rank 0

 3638 20:09:43.092512  All Pass.

 3639 20:09:43.093036  

 3640 20:09:43.093432  CH 0, Rank 1

 3641 20:09:43.093753  All Pass.

 3642 20:09:43.094047  

 3643 20:09:43.095547  CH 1, Rank 0

 3644 20:09:43.095964  All Pass.

 3645 20:09:43.096297  

 3646 20:09:43.096608  CH 1, Rank 1

 3647 20:09:43.098660  All Pass.

 3648 20:09:43.099075  

 3649 20:09:43.105560  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3650 20:09:43.112168  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3651 20:09:43.118774  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3652 20:09:43.122094  Write Rank0 MR3 =0xb0

 3653 20:09:43.129218  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3654 20:09:43.135676  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3655 20:09:43.142029  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3656 20:09:43.142454  Write Rank1 MR3 =0xb0

 3657 20:09:43.148951  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3658 20:09:43.155457  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3659 20:09:43.165507  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3660 20:09:43.166025  Write Rank0 MR3 =0xb0

 3661 20:09:43.172323  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3662 20:09:43.178607  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3663 20:09:43.185591  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3664 20:09:43.188686  Write Rank1 MR3 =0xb0

 3665 20:09:43.189196  DramC Write-DBI on

 3666 20:09:43.191952  [GetDramInforAfterCalByMRR] Vendor 1.

 3667 20:09:43.195484  [GetDramInforAfterCalByMRR] Revision 7.

 3668 20:09:43.199186  MR8 12

 3669 20:09:43.202196  CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3670 20:09:43.202620  MR8 12

 3671 20:09:43.209027  CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3672 20:09:43.209589  MR8 12

 3673 20:09:43.212451  CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3674 20:09:43.215391  MR8 12

 3675 20:09:43.218851  CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3676 20:09:43.228835  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0

 3677 20:09:43.229391  Write Rank0 MR13 =0xd0

 3678 20:09:43.232603  Write Rank1 MR13 =0xd0

 3679 20:09:43.235865  Write Rank0 MR13 =0xd0

 3680 20:09:43.236376  Write Rank1 MR13 =0xd0

 3681 20:09:43.238533  Save calibration result to emmc

 3682 20:09:43.238956  

 3683 20:09:43.239288  

 3684 20:09:43.242246  [DramcModeReg_Check] Freq_1600, FSP_1

 3685 20:09:43.245188  FSP_1, CH_0, RK0

 3686 20:09:43.245636  Write Rank0 MR13 =0xd8

 3687 20:09:43.248758  		MR12 = 0x56 (global = 0x56)	match

 3688 20:09:43.252013  		MR14 = 0x18 (global = 0x18)	match

 3689 20:09:43.255100  FSP_1, CH_0, RK1

 3690 20:09:43.255517  Write Rank1 MR13 =0xd8

 3691 20:09:43.259310  		MR12 = 0x56 (global = 0x56)	match

 3692 20:09:43.261771  		MR14 = 0x16 (global = 0x16)	match

 3693 20:09:43.265314  FSP_1, CH_1, RK0

 3694 20:09:43.265739  Write Rank0 MR13 =0xd8

 3695 20:09:43.268907  		MR12 = 0x56 (global = 0x56)	match

 3696 20:09:43.271849  		MR14 = 0x18 (global = 0x18)	match

 3697 20:09:43.275375  FSP_1, CH_1, RK1

 3698 20:09:43.275798  Write Rank1 MR13 =0xd8

 3699 20:09:43.279033  		MR12 = 0x58 (global = 0x58)	match

 3700 20:09:43.281902  		MR14 = 0x16 (global = 0x16)	match

 3701 20:09:43.282324  

 3702 20:09:43.288472  [MEM_TEST] 02: After DFS, before run time config

 3703 20:09:43.295150  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3704 20:09:43.295708  

 3705 20:09:43.298626  [TA2_TEST]

 3706 20:09:43.299044  === TA2 HW

 3707 20:09:43.299378  TA2 PAT: XTALK

 3708 20:09:43.304854  HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0

 3709 20:09:43.308679  HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0

 3710 20:09:43.315311  HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0

 3711 20:09:43.318522  HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0

 3712 20:09:43.319056  

 3713 20:09:43.319412  

 3714 20:09:43.321633  Settings after calibration

 3715 20:09:43.322056  

 3716 20:09:43.325073  [DramcRunTimeConfig]

 3717 20:09:43.328244  TransferPLLToSPMControl - MODE SW PHYPLL

 3718 20:09:43.328671  TX_TRACKING: ON

 3719 20:09:43.331570  RX_TRACKING: ON

 3720 20:09:43.332029  HW_GATING: ON

 3721 20:09:43.335378  HW_GATING DBG: OFF

 3722 20:09:43.335914  ddr_geometry:1

 3723 20:09:43.336263  ddr_geometry:1

 3724 20:09:43.338194  ddr_geometry:1

 3725 20:09:43.338663  ddr_geometry:1

 3726 20:09:43.341740  ddr_geometry:1

 3727 20:09:43.342358  ddr_geometry:1

 3728 20:09:43.345519  ddr_geometry:1

 3729 20:09:43.345938  ddr_geometry:1

 3730 20:09:43.348608  High Freq DUMMY_READ_FOR_TRACKING: ON

 3731 20:09:43.351947  ZQCS_ENABLE_LP4: OFF

 3732 20:09:43.352367  LOWPOWER_GOLDEN_SETTINGS(DCM): ON

 3733 20:09:43.354760  DUMMY_READ_FOR_DQS_GATING_RETRY: OFF

 3734 20:09:43.358624  SPM_CONTROL_AFTERK: ON

 3735 20:09:43.361630  IMPEDANCE_TRACKING: ON

 3736 20:09:43.362047  TEMP_SENSOR: ON

 3737 20:09:43.365209  PER_BANK_REFRESH: ON

 3738 20:09:43.365774  HW_SAVE_FOR_SR: ON

 3739 20:09:43.368845  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

 3740 20:09:43.372015  CLK_FREE_FUN_FOR_DRAMC_PSEL: ON

 3741 20:09:43.375555  PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON

 3742 20:09:43.378603  Read ODT Tracking: ON

 3743 20:09:43.379125  =========================

 3744 20:09:43.382042  

 3745 20:09:43.382461  [TA2_TEST]

 3746 20:09:43.382793  === TA2 HW

 3747 20:09:43.388532  HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0

 3748 20:09:43.391642  HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0

 3749 20:09:43.395116  HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0

 3750 20:09:43.402227  HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0

 3751 20:09:43.402746  

 3752 20:09:43.404976  [MEM_TEST] 03: After run time config

 3753 20:09:43.415869  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3754 20:09:43.419328  [complex_mem_test] start addr:0x40024000, len:131072

 3755 20:09:43.623793  1st complex R/W mem test pass

 3756 20:09:43.630193  save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0 

 3757 20:09:43.633202  sync preloader write leveling

 3758 20:09:43.636578  sync preloader cbt_mr12

 3759 20:09:43.640020  sync preloader cbt_clk_dly

 3760 20:09:43.640484  sync preloader cbt_cmd_dly

 3761 20:09:43.643139  sync preloader cbt_cs

 3762 20:09:43.647040  sync preloader cbt_ca_perbit_delay

 3763 20:09:43.647591  sync preloader clk_delay

 3764 20:09:43.650156  sync preloader dqs_delay

 3765 20:09:43.653166  sync preloader u1Gating2T_Save

 3766 20:09:43.656709  sync preloader u1Gating05T_Save

 3767 20:09:43.660302  sync preloader u1Gatingfine_tune_Save

 3768 20:09:43.663666  sync preloader u1Gatingucpass_count_Save

 3769 20:09:43.666375  sync preloader u1TxWindowPerbitVref_Save

 3770 20:09:43.670027  sync preloader u1TxCenter_min_Save

 3771 20:09:43.673439  sync preloader u1TxCenter_max_Save

 3772 20:09:43.676703  sync preloader u1Txwin_center_Save

 3773 20:09:43.679673  sync preloader u1Txfirst_pass_Save

 3774 20:09:43.683029  sync preloader u1Txlast_pass_Save

 3775 20:09:43.683586  sync preloader u1RxDatlat_Save

 3776 20:09:43.686541  sync preloader u1RxWinPerbitVref_Save

 3777 20:09:43.693320  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3778 20:09:43.696697  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3779 20:09:43.699647  sync preloader delay_cell_unit

 3780 20:09:43.706307  save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1 

 3781 20:09:43.709663  sync preloader write leveling

 3782 20:09:43.710081  sync preloader cbt_mr12

 3783 20:09:43.713614  sync preloader cbt_clk_dly

 3784 20:09:43.716884  sync preloader cbt_cmd_dly

 3785 20:09:43.717497  sync preloader cbt_cs

 3786 20:09:43.719805  sync preloader cbt_ca_perbit_delay

 3787 20:09:43.723306  sync preloader clk_delay

 3788 20:09:43.726938  sync preloader dqs_delay

 3789 20:09:43.727358  sync preloader u1Gating2T_Save

 3790 20:09:43.730375  sync preloader u1Gating05T_Save

 3791 20:09:43.733434  sync preloader u1Gatingfine_tune_Save

 3792 20:09:43.736551  sync preloader u1Gatingucpass_count_Save

 3793 20:09:43.739693  sync preloader u1TxWindowPerbitVref_Save

 3794 20:09:43.743292  sync preloader u1TxCenter_min_Save

 3795 20:09:43.746495  sync preloader u1TxCenter_max_Save

 3796 20:09:43.750229  sync preloader u1Txwin_center_Save

 3797 20:09:43.753156  sync preloader u1Txfirst_pass_Save

 3798 20:09:43.756374  sync preloader u1Txlast_pass_Save

 3799 20:09:43.759961  sync preloader u1RxDatlat_Save

 3800 20:09:43.763041  sync preloader u1RxWinPerbitVref_Save

 3801 20:09:43.766378  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3802 20:09:43.769770  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3803 20:09:43.773250  sync preloader delay_cell_unit

 3804 20:09:43.779897  save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2 

 3805 20:09:43.782843  sync preloader write leveling

 3806 20:09:43.786029  sync preloader cbt_mr12

 3807 20:09:43.786111  sync preloader cbt_clk_dly

 3808 20:09:43.789499  sync preloader cbt_cmd_dly

 3809 20:09:43.792862  sync preloader cbt_cs

 3810 20:09:43.796004  sync preloader cbt_ca_perbit_delay

 3811 20:09:43.796112  sync preloader clk_delay

 3812 20:09:43.799220  sync preloader dqs_delay

 3813 20:09:43.802512  sync preloader u1Gating2T_Save

 3814 20:09:43.805864  sync preloader u1Gating05T_Save

 3815 20:09:43.809501  sync preloader u1Gatingfine_tune_Save

 3816 20:09:43.812547  sync preloader u1Gatingucpass_count_Save

 3817 20:09:43.816019  sync preloader u1TxWindowPerbitVref_Save

 3818 20:09:43.819649  sync preloader u1TxCenter_min_Save

 3819 20:09:43.822987  sync preloader u1TxCenter_max_Save

 3820 20:09:43.826002  sync preloader u1Txwin_center_Save

 3821 20:09:43.829379  sync preloader u1Txfirst_pass_Save

 3822 20:09:43.832639  sync preloader u1Txlast_pass_Save

 3823 20:09:43.832709  sync preloader u1RxDatlat_Save

 3824 20:09:43.835926  sync preloader u1RxWinPerbitVref_Save

 3825 20:09:43.842581  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3826 20:09:43.846026  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3827 20:09:43.849300  sync preloader delay_cell_unit

 3828 20:09:43.853082  just_for_test_dump_coreboot_params dump all params

 3829 20:09:43.853153  dump source = 0x0

 3830 20:09:43.855865  dump params frequency:1600

 3831 20:09:43.859505  dump params rank number:2

 3832 20:09:43.859577  

 3833 20:09:43.862627   dump params write leveling

 3834 20:09:43.865797  write leveling[0][0][0] = 0x21

 3835 20:09:43.865872  write leveling[0][0][1] = 0x1a

 3836 20:09:43.869205  write leveling[0][1][0] = 0x23

 3837 20:09:43.872723  write leveling[0][1][1] = 0x1d

 3838 20:09:43.875942  write leveling[1][0][0] = 0x22

 3839 20:09:43.879439  write leveling[1][0][1] = 0x1f

 3840 20:09:43.882719  write leveling[1][1][0] = 0x23

 3841 20:09:43.882790  write leveling[1][1][1] = 0x20

 3842 20:09:43.885897  dump params cbt_cs

 3843 20:09:43.885992  cbt_cs[0][0] = 0xa

 3844 20:09:43.889137  cbt_cs[0][1] = 0xa

 3845 20:09:43.889209  cbt_cs[1][0] = 0xa

 3846 20:09:43.892638  cbt_cs[1][1] = 0xa

 3847 20:09:43.892705  dump params cbt_mr12

 3848 20:09:43.895900  cbt_mr12[0][0] = 0x16

 3849 20:09:43.899367  cbt_mr12[0][1] = 0x16

 3850 20:09:43.899448  cbt_mr12[1][0] = 0x16

 3851 20:09:43.903052  cbt_mr12[1][1] = 0x18

 3852 20:09:43.903137  dump params tx window

 3853 20:09:43.906162  tx_center_min[0][0][0] = 980

 3854 20:09:43.910021  tx_center_max[0][0][0] =  987

 3855 20:09:43.912422  tx_center_min[0][0][1] = 973

 3856 20:09:43.915912  tx_center_max[0][0][1] =  979

 3857 20:09:43.916014  tx_center_min[0][1][0] = 983

 3858 20:09:43.919095  tx_center_max[0][1][0] =  990

 3859 20:09:43.922881  tx_center_min[0][1][1] = 978

 3860 20:09:43.925735  tx_center_max[0][1][1] =  981

 3861 20:09:43.929533  tx_center_min[1][0][0] = 980

 3862 20:09:43.929608  tx_center_max[1][0][0] =  988

 3863 20:09:43.932243  tx_center_min[1][0][1] = 975

 3864 20:09:43.935958  tx_center_max[1][0][1] =  980

 3865 20:09:43.939172  tx_center_min[1][1][0] = 982

 3866 20:09:43.942676  tx_center_max[1][1][0] =  989

 3867 20:09:43.942745  tx_center_min[1][1][1] = 977

 3868 20:09:43.945639  tx_center_max[1][1][1] =  981

 3869 20:09:43.949210  dump params tx window

 3870 20:09:43.949332  tx_win_center[0][0][0] = 987

 3871 20:09:43.952460  tx_first_pass[0][0][0] =  975

 3872 20:09:43.955619  tx_last_pass[0][0][0] =	999

 3873 20:09:43.959424  tx_win_center[0][0][1] = 985

 3874 20:09:43.962301  tx_first_pass[0][0][1] =  974

 3875 20:09:43.962396  tx_last_pass[0][0][1] =	997

 3876 20:09:43.965510  tx_win_center[0][0][2] = 985

 3877 20:09:43.969320  tx_first_pass[0][0][2] =  973

 3878 20:09:43.972532  tx_last_pass[0][0][2] =	997

 3879 20:09:43.972643  tx_win_center[0][0][3] = 980

 3880 20:09:43.975672  tx_first_pass[0][0][3] =  968

 3881 20:09:43.979071  tx_last_pass[0][0][3] =	992

 3882 20:09:43.982640  tx_win_center[0][0][4] = 985

 3883 20:09:43.985885  tx_first_pass[0][0][4] =  973

 3884 20:09:43.985966  tx_last_pass[0][0][4] =	998

 3885 20:09:43.989154  tx_win_center[0][0][5] = 980

 3886 20:09:43.992428  tx_first_pass[0][0][5] =  968

 3887 20:09:43.995560  tx_last_pass[0][0][5] =	992

 3888 20:09:43.995642  tx_win_center[0][0][6] = 981

 3889 20:09:43.999519  tx_first_pass[0][0][6] =  969

 3890 20:09:44.002937  tx_last_pass[0][0][6] =	993

 3891 20:09:44.006013  tx_win_center[0][0][7] = 983

 3892 20:09:44.009232  tx_first_pass[0][0][7] =  971

 3893 20:09:44.009335  tx_last_pass[0][0][7] =	995

 3894 20:09:44.012423  tx_win_center[0][0][8] = 973

 3895 20:09:44.015582  tx_first_pass[0][0][8] =  961

 3896 20:09:44.018835  tx_last_pass[0][0][8] =	986

 3897 20:09:44.018907  tx_win_center[0][0][9] = 975

 3898 20:09:44.022736  tx_first_pass[0][0][9] =  963

 3899 20:09:44.026003  tx_last_pass[0][0][9] =	988

 3900 20:09:44.029051  tx_win_center[0][0][10] = 979

 3901 20:09:44.032746  tx_first_pass[0][0][10] =  967

 3902 20:09:44.032816  tx_last_pass[0][0][10] =	991

 3903 20:09:44.035790  tx_win_center[0][0][11] = 973

 3904 20:09:44.039254  tx_first_pass[0][0][11] =  961

 3905 20:09:44.042428  tx_last_pass[0][0][11] =	986

 3906 20:09:44.045948  tx_win_center[0][0][12] = 974

 3907 20:09:44.046029  tx_first_pass[0][0][12] =  962

 3908 20:09:44.049200  tx_last_pass[0][0][12] =	987

 3909 20:09:44.052725  tx_win_center[0][0][13] = 973

 3910 20:09:44.055843  tx_first_pass[0][0][13] =  962

 3911 20:09:44.059629  tx_last_pass[0][0][13] =	985

 3912 20:09:44.059711  tx_win_center[0][0][14] = 974

 3913 20:09:44.062635  tx_first_pass[0][0][14] =  962

 3914 20:09:44.065685  tx_last_pass[0][0][14] =	987

 3915 20:09:44.069066  tx_win_center[0][0][15] = 978

 3916 20:09:44.072328  tx_first_pass[0][0][15] =  966

 3917 20:09:44.072410  tx_last_pass[0][0][15] =	990

 3918 20:09:47.410663  tx_win_center[0][1][0] = 990

 3919 20:09:47.411153  tx_first_pass[0][1][0] =  978

 3920 20:09:47.411504  tx_last_pass[0][1][0] =	1003

 3921 20:09:47.411987  tx_win_center[0][1][1] = 989

 3922 20:09:47.412303  tx_first_pass[0][1][1] =  977

 3923 20:09:47.412599  tx_last_pass[0][1][1] =	1001

 3924 20:09:47.412885  tx_win_center[0][1][2] = 988

 3925 20:09:47.413173  tx_first_pass[0][1][2] =  977

 3926 20:09:47.413526  tx_last_pass[0][1][2] =	1000

 3927 20:09:47.413814  tx_win_center[0][1][3] = 983

 3928 20:09:47.414126  tx_first_pass[0][1][3] =  970

 3929 20:09:47.414643  tx_last_pass[0][1][3] =	996

 3930 20:09:47.414947  tx_win_center[0][1][4] = 989

 3931 20:09:47.415231  tx_first_pass[0][1][4] =  977

 3932 20:09:47.415512  tx_last_pass[0][1][4] =	1001

 3933 20:09:47.415791  tx_win_center[0][1][5] = 984

 3934 20:09:47.416069  tx_first_pass[0][1][5] =  972

 3935 20:09:47.416285  tx_last_pass[0][1][5] =	996

 3936 20:09:47.416338  tx_win_center[0][1][6] = 985

 3937 20:09:47.416392  tx_first_pass[0][1][6] =  972

 3938 20:09:47.416445  tx_last_pass[0][1][6] =	998

 3939 20:09:47.416498  tx_win_center[0][1][7] = 987

 3940 20:09:47.416551  tx_first_pass[0][1][7] =  976

 3941 20:09:47.416604  tx_last_pass[0][1][7] =	999

 3942 20:09:47.416657  tx_win_center[0][1][8] = 978

 3943 20:09:47.416710  tx_first_pass[0][1][8] =  967

 3944 20:09:47.416763  tx_last_pass[0][1][8] =	990

 3945 20:09:47.416815  tx_win_center[0][1][9] = 979

 3946 20:09:47.416868  tx_first_pass[0][1][9] =  968

 3947 20:09:47.416921  tx_last_pass[0][1][9] =	990

 3948 20:09:47.416974  tx_win_center[0][1][10] = 981

 3949 20:09:47.417028  tx_first_pass[0][1][10] =  970

 3950 20:09:47.417081  tx_last_pass[0][1][10] =	993

 3951 20:09:47.417134  tx_win_center[0][1][11] = 978

 3952 20:09:47.417187  tx_first_pass[0][1][11] =  967

 3953 20:09:47.417240  tx_last_pass[0][1][11] =	990

 3954 20:09:47.417304  tx_win_center[0][1][12] = 979

 3955 20:09:47.417358  tx_first_pass[0][1][12] =  968

 3956 20:09:47.417411  tx_last_pass[0][1][12] =	990

 3957 20:09:47.417464  tx_win_center[0][1][13] = 978

 3958 20:09:47.417517  tx_first_pass[0][1][13] =  967

 3959 20:09:47.417587  tx_last_pass[0][1][13] =	989

 3960 20:09:47.417643  tx_win_center[0][1][14] = 978

 3961 20:09:47.417696  tx_first_pass[0][1][14] =  967

 3962 20:09:47.417749  tx_last_pass[0][1][14] =	990

 3963 20:09:47.417802  tx_win_center[0][1][15] = 980

 3964 20:09:47.417855  tx_first_pass[0][1][15] =  969

 3965 20:09:47.417908  tx_last_pass[0][1][15] =	991

 3966 20:09:47.417961  tx_win_center[1][0][0] = 988

 3967 20:09:47.418014  tx_first_pass[1][0][0] =  976

 3968 20:09:47.418067  tx_last_pass[1][0][0] =	1000

 3969 20:09:47.418120  tx_win_center[1][0][1] = 986

 3970 20:09:47.418173  tx_first_pass[1][0][1] =  974

 3971 20:09:47.418226  tx_last_pass[1][0][1] =	999

 3972 20:09:47.418278  tx_win_center[1][0][2] = 983

 3973 20:09:47.418331  tx_first_pass[1][0][2] =  971

 3974 20:09:47.418384  tx_last_pass[1][0][2] =	995

 3975 20:09:47.418437  tx_win_center[1][0][3] = 980

 3976 20:09:47.418490  tx_first_pass[1][0][3] =  969

 3977 20:09:47.418543  tx_last_pass[1][0][3] =	992

 3978 20:09:47.418596  tx_win_center[1][0][4] = 985

 3979 20:09:47.418649  tx_first_pass[1][0][4] =  973

 3980 20:09:47.418702  tx_last_pass[1][0][4] =	998

 3981 20:09:47.418754  tx_win_center[1][0][5] = 987

 3982 20:09:47.418807  tx_first_pass[1][0][5] =  975

 3983 20:09:47.418860  tx_last_pass[1][0][5] =	999

 3984 20:09:47.418919  tx_win_center[1][0][6] = 987

 3985 20:09:47.418975  tx_first_pass[1][0][6] =  976

 3986 20:09:47.419028  tx_last_pass[1][0][6] =	999

 3987 20:09:47.419081  tx_win_center[1][0][7] = 984

 3988 20:09:47.419134  tx_first_pass[1][0][7] =  973

 3989 20:09:47.419187  tx_last_pass[1][0][7] =	996

 3990 20:09:47.419239  tx_win_center[1][0][8] = 978

 3991 20:09:47.419292  tx_first_pass[1][0][8] =  966

 3992 20:09:47.419345  tx_last_pass[1][0][8] =	991

 3993 20:09:47.419397  tx_win_center[1][0][9] = 978

 3994 20:09:47.419449  tx_first_pass[1][0][9] =  966

 3995 20:09:47.419502  tx_last_pass[1][0][9] =	991

 3996 20:09:47.419555  tx_win_center[1][0][10] = 979

 3997 20:09:47.419608  tx_first_pass[1][0][10] =  967

 3998 20:09:47.419660  tx_last_pass[1][0][10] =	991

 3999 20:09:47.419713  tx_win_center[1][0][11] = 980

 4000 20:09:47.419766  tx_first_pass[1][0][11] =  968

 4001 20:09:47.419819  tx_last_pass[1][0][11] =	992

 4002 20:09:47.419872  tx_win_center[1][0][12] = 980

 4003 20:09:47.419926  tx_first_pass[1][0][12] =  968

 4004 20:09:47.419978  tx_last_pass[1][0][12] =	992

 4005 20:09:47.420031  tx_win_center[1][0][13] = 980

 4006 20:09:47.420084  tx_first_pass[1][0][13] =  969

 4007 20:09:47.420137  tx_last_pass[1][0][13] =	991

 4008 20:09:47.420190  tx_win_center[1][0][14] = 979

 4009 20:09:47.420243  tx_first_pass[1][0][14] =  968

 4010 20:09:47.420296  tx_last_pass[1][0][14] =	991

 4011 20:09:47.420348  tx_win_center[1][0][15] = 975

 4012 20:09:47.420401  tx_first_pass[1][0][15] =  963

 4013 20:09:47.420454  tx_last_pass[1][0][15] =	988

 4014 20:09:47.420507  tx_win_center[1][1][0] = 989

 4015 20:09:47.420560  tx_first_pass[1][1][0] =  977

 4016 20:09:47.420614  tx_last_pass[1][1][0] =	1001

 4017 20:09:47.420666  tx_win_center[1][1][1] = 987

 4018 20:09:47.420718  tx_first_pass[1][1][1] =  976

 4019 20:09:47.420771  tx_last_pass[1][1][1] =	999

 4020 20:09:47.420824  tx_win_center[1][1][2] = 984

 4021 20:09:47.420878  tx_first_pass[1][1][2] =  972

 4022 20:09:47.420931  tx_last_pass[1][1][2] =	997

 4023 20:09:47.420984  tx_win_center[1][1][3] = 982

 4024 20:09:47.421037  tx_first_pass[1][1][3] =  970

 4025 20:09:47.421091  tx_last_pass[1][1][3] =	995

 4026 20:09:47.421145  tx_win_center[1][1][4] = 986

 4027 20:09:47.421198  tx_first_pass[1][1][4] =  974

 4028 20:09:47.421252  tx_last_pass[1][1][4] =	998

 4029 20:09:47.421350  tx_win_center[1][1][5] = 988

 4030 20:09:47.421403  tx_first_pass[1][1][5] =  976

 4031 20:09:47.421457  tx_last_pass[1][1][5] =	1000

 4032 20:09:47.421510  tx_win_center[1][1][6] = 988

 4033 20:09:47.421572  tx_first_pass[1][1][6] =  977

 4034 20:09:47.421696  tx_last_pass[1][1][6] =	1000

 4035 20:09:47.421756  tx_win_center[1][1][7] = 986

 4036 20:09:47.421811  tx_first_pass[1][1][7] =  975

 4037 20:09:47.421865  tx_last_pass[1][1][7] =	997

 4038 20:09:47.421919  tx_win_center[1][1][8] = 980

 4039 20:09:47.421972  tx_first_pass[1][1][8] =  969

 4040 20:09:47.422026  tx_last_pass[1][1][8] =	991

 4041 20:09:47.422079  tx_win_center[1][1][9] = 979

 4042 20:09:47.422133  tx_first_pass[1][1][9] =  968

 4043 20:09:47.422186  tx_last_pass[1][1][9] =	991

 4044 20:09:47.422240  tx_win_center[1][1][10] = 979

 4045 20:09:47.422293  tx_first_pass[1][1][10] =  968

 4046 20:09:47.422346  tx_last_pass[1][1][10] =	991

 4047 20:09:47.422400  tx_win_center[1][1][11] = 981

 4048 20:09:47.422494  tx_first_pass[1][1][11] =  970

 4049 20:09:47.422548  tx_last_pass[1][1][11] =	993

 4050 20:09:47.422601  tx_win_center[1][1][12] = 980

 4051 20:09:47.422655  tx_first_pass[1][1][12] =  969

 4052 20:09:47.422905  tx_last_pass[1][1][12] =	992

 4053 20:09:47.422966  tx_win_center[1][1][13] = 981

 4054 20:09:47.423020  tx_first_pass[1][1][13] =  970

 4055 20:09:47.423074  tx_last_pass[1][1][13] =	992

 4056 20:09:47.423129  tx_win_center[1][1][14] = 980

 4057 20:09:47.423182  tx_first_pass[1][1][14] =  969

 4058 20:09:47.423235  tx_last_pass[1][1][14] =	992

 4059 20:09:47.423289  tx_win_center[1][1][15] = 977

 4060 20:09:47.423343  tx_first_pass[1][1][15] =  966

 4061 20:09:47.423396  tx_last_pass[1][1][15] =	989

 4062 20:09:47.423450  dump params rx window

 4063 20:09:47.423503  rx_firspass[0][0][0] = 9

 4064 20:09:47.423556  rx_lastpass[0][0][0] =  42

 4065 20:09:47.423616  rx_firspass[0][0][1] = 8

 4066 20:09:47.423671  rx_lastpass[0][0][1] =  40

 4067 20:09:47.423724  rx_firspass[0][0][2] = 9

 4068 20:09:47.423777  rx_lastpass[0][0][2] =  39

 4069 20:09:47.423830  rx_firspass[0][0][3] = -2

 4070 20:09:47.423882  rx_lastpass[0][0][3] =  31

 4071 20:09:47.423935  rx_firspass[0][0][4] = 7

 4072 20:09:47.423987  rx_lastpass[0][0][4] =  39

 4073 20:09:47.424040  rx_firspass[0][0][5] = 3

 4074 20:09:47.424093  rx_lastpass[0][0][5] =  29

 4075 20:09:47.424145  rx_firspass[0][0][6] = 2

 4076 20:09:47.424199  rx_lastpass[0][0][6] =  32

 4077 20:09:47.424251  rx_firspass[0][0][7] = 4

 4078 20:09:47.424304  rx_lastpass[0][0][7] =  34

 4079 20:09:47.424358  rx_firspass[0][0][8] = 2

 4080 20:09:47.424411  rx_lastpass[0][0][8] =  34

 4081 20:09:47.424464  rx_firspass[0][0][9] = 5

 4082 20:09:47.424516  rx_lastpass[0][0][9] =  35

 4083 20:09:47.424569  rx_firspass[0][0][10] = 9

 4084 20:09:47.424622  rx_lastpass[0][0][10] =  38

 4085 20:09:47.424675  rx_firspass[0][0][11] = 3

 4086 20:09:47.424729  rx_lastpass[0][0][11] =  31

 4087 20:09:47.424782  rx_firspass[0][0][12] = 5

 4088 20:09:47.424835  rx_lastpass[0][0][12] =  34

 4089 20:09:47.424889  rx_firspass[0][0][13] = 1

 4090 20:09:47.424942  rx_lastpass[0][0][13] =  31

 4091 20:09:47.424995  rx_firspass[0][0][14] = 3

 4092 20:09:47.425047  rx_lastpass[0][0][14] =  33

 4093 20:09:47.425101  rx_firspass[0][0][15] = 4

 4094 20:09:47.425178  rx_lastpass[0][0][15] =  35

 4095 20:09:47.425232  rx_firspass[0][1][0] = 8

 4096 20:09:47.425297  rx_lastpass[0][1][0] =  43

 4097 20:09:47.425352  rx_firspass[0][1][1] = 7

 4098 20:09:47.425406  rx_lastpass[0][1][1] =  42

 4099 20:09:47.425461  rx_firspass[0][1][2] = 7

 4100 20:09:47.425515  rx_lastpass[0][1][2] =  42

 4101 20:09:47.425569  rx_firspass[0][1][3] = -2

 4102 20:09:47.425623  rx_lastpass[0][1][3] =  33

 4103 20:09:47.425679  rx_firspass[0][1][4] = 5

 4104 20:09:47.425732  rx_lastpass[0][1][4] =  40

 4105 20:09:47.425786  rx_firspass[0][1][5] = 1

 4106 20:09:47.425841  rx_lastpass[0][1][5] =  34

 4107 20:09:47.425895  rx_firspass[0][1][6] = 2

 4108 20:09:47.425950  rx_lastpass[0][1][6] =  35

 4109 20:09:47.426004  rx_firspass[0][1][7] = 2

 4110 20:09:47.426058  rx_lastpass[0][1][7] =  36

 4111 20:09:47.426112  rx_firspass[0][1][8] = 0

 4112 20:09:47.426166  rx_lastpass[0][1][8] =  36

 4113 20:09:47.426220  rx_firspass[0][1][9] = 1

 4114 20:09:47.426274  rx_lastpass[0][1][9] =  37

 4115 20:09:47.426328  rx_firspass[0][1][10] = 6

 4116 20:09:47.426383  rx_lastpass[0][1][10] =  41

 4117 20:09:47.426437  rx_firspass[0][1][11] = 1

 4118 20:09:47.426492  rx_lastpass[0][1][11] =  33

 4119 20:09:47.426546  rx_firspass[0][1][12] = 2

 4120 20:09:47.426600  rx_lastpass[0][1][12] =  36

 4121 20:09:47.426654  rx_firspass[0][1][13] = -1

 4122 20:09:47.426708  rx_lastpass[0][1][13] =  34

 4123 20:09:47.426762  rx_firspass[0][1][14] = 1

 4124 20:09:47.426816  rx_lastpass[0][1][14] =  36

 4125 20:09:47.426870  rx_firspass[0][1][15] = 3

 4126 20:09:47.426924  rx_lastpass[0][1][15] =  38

 4127 20:09:47.426978  rx_firspass[1][0][0] = 7

 4128 20:09:47.427031  rx_lastpass[1][0][0] =  42

 4129 20:09:47.427086  rx_firspass[1][0][1] = 6

 4130 20:09:47.427140  rx_lastpass[1][0][1] =  40

 4131 20:09:47.427194  rx_firspass[1][0][2] = 0

 4132 20:09:47.427247  rx_lastpass[1][0][2] =  33

 4133 20:09:47.427301  rx_firspass[1][0][3] = -1

 4134 20:09:47.427355  rx_lastpass[1][0][3] =  32

 4135 20:09:47.427409  rx_firspass[1][0][4] = 3

 4136 20:09:47.427464  rx_lastpass[1][0][4] =  34

 4137 20:09:47.427518  rx_firspass[1][0][5] = 8

 4138 20:09:47.427572  rx_lastpass[1][0][5] =  40

 4139 20:09:47.427626  rx_firspass[1][0][6] = 9

 4140 20:09:47.427680  rx_lastpass[1][0][6] =  41

 4141 20:09:47.427734  rx_firspass[1][0][7] = 4

 4142 20:09:47.427788  rx_lastpass[1][0][7] =  34

 4143 20:09:47.427841  rx_firspass[1][0][8] = 2

 4144 20:09:47.427895  rx_lastpass[1][0][8] =  36

 4145 20:09:47.427949  rx_firspass[1][0][9] = 3

 4146 20:09:47.428003  rx_lastpass[1][0][9] =  36

 4147 20:09:47.428057  rx_firspass[1][0][10] = 1

 4148 20:09:47.428111  rx_lastpass[1][0][10] =  35

 4149 20:09:47.428166  rx_firspass[1][0][11] = 3

 4150 20:09:47.428219  rx_lastpass[1][0][11] =  36

 4151 20:09:47.428273  rx_firspass[1][0][12] = 4

 4152 20:09:47.428328  rx_lastpass[1][0][12] =  36

 4153 20:09:47.428383  rx_firspass[1][0][13] = 5

 4154 20:09:47.428437  rx_lastpass[1][0][13] =  34

 4155 20:09:47.428490  rx_firspass[1][0][14] = 3

 4156 20:09:47.428544  rx_lastpass[1][0][14] =  35

 4157 20:09:47.428599  rx_firspass[1][0][15] = 0

 4158 20:09:47.428652  rx_lastpass[1][0][15] =  33

 4159 20:09:47.428706  rx_firspass[1][1][0] = 6

 4160 20:09:47.428760  rx_lastpass[1][1][0] =  42

 4161 20:09:47.428814  rx_firspass[1][1][1] = 5

 4162 20:09:47.428868  rx_lastpass[1][1][1] =  40

 4163 20:09:47.428922  rx_firspass[1][1][2] = 0

 4164 20:09:47.428976  rx_lastpass[1][1][2] =  35

 4165 20:09:47.429030  rx_firspass[1][1][3] = -2

 4166 20:09:47.429084  rx_lastpass[1][1][3] =  33

 4167 20:09:47.429149  rx_firspass[1][1][4] = 2

 4168 20:09:47.429236  rx_lastpass[1][1][4] =  36

 4169 20:09:47.429305  rx_firspass[1][1][5] = 5

 4170 20:09:47.429361  rx_lastpass[1][1][5] =  41

 4171 20:09:47.429416  rx_firspass[1][1][6] = 7

 4172 20:09:47.429470  rx_lastpass[1][1][6] =  42

 4173 20:09:47.429525  rx_firspass[1][1][7] = 2

 4174 20:09:47.429589  rx_lastpass[1][1][7] =  36

 4175 20:09:47.429660  rx_firspass[1][1][8] = 1

 4176 20:09:47.429749  rx_lastpass[1][1][8] =  37

 4177 20:09:47.429806  rx_firspass[1][1][9] = 2

 4178 20:09:47.429861  rx_lastpass[1][1][9] =  37

 4179 20:09:47.429916  rx_firspass[1][1][10] = 2

 4180 20:09:47.429971  rx_lastpass[1][1][10] =  36

 4181 20:09:47.430026  rx_firspass[1][1][11] = 3

 4182 20:09:47.430080  rx_lastpass[1][1][11] =  38

 4183 20:09:47.430135  rx_firspass[1][1][12] = 4

 4184 20:09:47.430189  rx_lastpass[1][1][12] =  39

 4185 20:09:47.430243  rx_firspass[1][1][13] = 3

 4186 20:09:47.430298  rx_lastpass[1][1][13] =  36

 4187 20:09:47.430352  rx_firspass[1][1][14] = 3

 4188 20:09:47.430406  rx_lastpass[1][1][14] =  36

 4189 20:09:47.430461  rx_firspass[1][1][15] = 0

 4190 20:09:47.430515  rx_lastpass[1][1][15] =  34

 4191 20:09:47.430569  dump params clk_delay

 4192 20:09:47.430623  clk_delay[0] = -1

 4193 20:09:47.430677  clk_delay[1] = 0

 4194 20:09:47.430731  dump params dqs_delay

 4195 20:09:47.430785  dqs_delay[0][0] = 0

 4196 20:09:47.430838  dqs_delay[0][1] = -1

 4197 20:09:47.430893  dqs_delay[1][0] = -1

 4198 20:09:47.430946  dqs_delay[1][1] = 0

 4199 20:09:47.431000  dump params delay_cell_unit = 762

 4200 20:09:47.431054  dump source = 0x0

 4201 20:09:47.431108  dump params frequency:1200

 4202 20:09:47.431356  dump params rank number:2

 4203 20:09:47.431417  

 4204 20:09:47.431473   dump params write leveling

 4205 20:09:47.431528  write leveling[0][0][0] = 0x0

 4206 20:09:47.431583  write leveling[0][0][1] = 0x0

 4207 20:09:47.431637  write leveling[0][1][0] = 0x0

 4208 20:09:47.431691  write leveling[0][1][1] = 0x0

 4209 20:09:47.431746  write leveling[1][0][0] = 0x0

 4210 20:09:47.431800  write leveling[1][0][1] = 0x0

 4211 20:09:47.431857  write leveling[1][1][0] = 0x0

 4212 20:09:47.431912  write leveling[1][1][1] = 0x0

 4213 20:09:47.431967  dump params cbt_cs

 4214 20:09:47.432021  cbt_cs[0][0] = 0x0

 4215 20:09:47.432076  cbt_cs[0][1] = 0x0

 4216 20:09:47.432132  cbt_cs[1][0] = 0x0

 4217 20:09:47.432186  cbt_cs[1][1] = 0x0

 4218 20:09:47.432240  dump params cbt_mr12

 4219 20:09:47.432294  cbt_mr12[0][0] = 0x0

 4220 20:09:47.432348  cbt_mr12[0][1] = 0x0

 4221 20:09:47.432402  cbt_mr12[1][0] = 0x0

 4222 20:09:47.432456  cbt_mr12[1][1] = 0x0

 4223 20:09:47.432511  dump params tx window

 4224 20:09:47.432565  tx_center_min[0][0][0] = 0

 4225 20:09:47.432619  tx_center_max[0][0][0] =  0

 4226 20:09:47.432674  tx_center_min[0][0][1] = 0

 4227 20:09:47.432728  tx_center_max[0][0][1] =  0

 4228 20:09:47.432783  tx_center_min[0][1][0] = 0

 4229 20:09:47.432837  tx_center_max[0][1][0] =  0

 4230 20:09:47.432891  tx_center_min[0][1][1] = 0

 4231 20:09:47.432946  tx_center_max[0][1][1] =  0

 4232 20:09:47.433000  tx_center_min[1][0][0] = 0

 4233 20:09:47.433054  tx_center_max[1][0][0] =  0

 4234 20:09:47.433108  tx_center_min[1][0][1] = 0

 4235 20:09:47.433162  tx_center_max[1][0][1] =  0

 4236 20:09:47.433216  tx_center_min[1][1][0] = 0

 4237 20:09:47.433280  tx_center_max[1][1][0] =  0

 4238 20:09:47.433336  tx_center_min[1][1][1] = 0

 4239 20:09:47.433390  tx_center_max[1][1][1] =  0

 4240 20:09:47.433445  dump params tx window

 4241 20:09:47.433498  tx_win_center[0][0][0] = 0

 4242 20:09:47.433553  tx_first_pass[0][0][0] =  0

 4243 20:09:47.433607  tx_last_pass[0][0][0] =	0

 4244 20:09:47.433662  tx_win_center[0][0][1] = 0

 4245 20:09:47.433717  tx_first_pass[0][0][1] =  0

 4246 20:09:47.433771  tx_last_pass[0][0][1] =	0

 4247 20:09:47.433826  tx_win_center[0][0][2] = 0

 4248 20:09:47.433880  tx_first_pass[0][0][2] =  0

 4249 20:09:47.433935  tx_last_pass[0][0][2] =	0

 4250 20:09:47.433989  tx_win_center[0][0][3] = 0

 4251 20:09:47.434044  tx_first_pass[0][0][3] =  0

 4252 20:09:47.434097  tx_last_pass[0][0][3] =	0

 4253 20:09:47.434152  tx_win_center[0][0][4] = 0

 4254 20:09:47.434206  tx_first_pass[0][0][4] =  0

 4255 20:09:47.434261  tx_last_pass[0][0][4] =	0

 4256 20:09:47.434315  tx_win_center[0][0][5] = 0

 4257 20:09:47.434369  tx_first_pass[0][0][5] =  0

 4258 20:09:47.434423  tx_last_pass[0][0][5] =	0

 4259 20:09:47.434478  tx_win_center[0][0][6] = 0

 4260 20:09:47.434532  tx_first_pass[0][0][6] =  0

 4261 20:09:47.434586  tx_last_pass[0][0][6] =	0

 4262 20:09:47.434641  tx_win_center[0][0][7] = 0

 4263 20:09:47.434695  tx_first_pass[0][0][7] =  0

 4264 20:09:47.434749  tx_last_pass[0][0][7] =	0

 4265 20:09:47.434803  tx_win_center[0][0][8] = 0

 4266 20:09:47.434858  tx_first_pass[0][0][8] =  0

 4267 20:09:47.434912  tx_last_pass[0][0][8] =	0

 4268 20:09:47.434966  tx_win_center[0][0][9] = 0

 4269 20:09:47.435020  tx_first_pass[0][0][9] =  0

 4270 20:09:47.435075  tx_last_pass[0][0][9] =	0

 4271 20:09:47.435130  tx_win_center[0][0][10] = 0

 4272 20:09:47.435185  tx_first_pass[0][0][10] =  0

 4273 20:09:47.435239  tx_last_pass[0][0][10] =	0

 4274 20:09:47.435294  tx_win_center[0][0][11] = 0

 4275 20:09:47.435348  tx_first_pass[0][0][11] =  0

 4276 20:09:47.435403  tx_last_pass[0][0][11] =	0

 4277 20:09:47.435458  tx_win_center[0][0][12] = 0

 4278 20:09:47.435512  tx_first_pass[0][0][12] =  0

 4279 20:09:47.435566  tx_last_pass[0][0][12] =	0

 4280 20:09:47.435620  tx_win_center[0][0][13] = 0

 4281 20:09:47.435675  tx_first_pass[0][0][13] =  0

 4282 20:09:47.435729  tx_last_pass[0][0][13] =	0

 4283 20:09:47.435783  tx_win_center[0][0][14] = 0

 4284 20:09:47.435837  tx_first_pass[0][0][14] =  0

 4285 20:09:47.435892  tx_last_pass[0][0][14] =	0

 4286 20:09:47.435946  tx_win_center[0][0][15] = 0

 4287 20:09:47.436000  tx_first_pass[0][0][15] =  0

 4288 20:09:47.436055  tx_last_pass[0][0][15] =	0

 4289 20:09:47.436109  tx_win_center[0][1][0] = 0

 4290 20:09:47.436164  tx_first_pass[0][1][0] =  0

 4291 20:09:47.436218  tx_last_pass[0][1][0] =	0

 4292 20:09:47.436272  tx_win_center[0][1][1] = 0

 4293 20:09:47.436327  tx_first_pass[0][1][1] =  0

 4294 20:09:47.436381  tx_last_pass[0][1][1] =	0

 4295 20:09:47.436435  tx_win_center[0][1][2] = 0

 4296 20:09:47.436489  tx_first_pass[0][1][2] =  0

 4297 20:09:47.436543  tx_last_pass[0][1][2] =	0

 4298 20:09:47.436597  tx_win_center[0][1][3] = 0

 4299 20:09:47.436651  tx_first_pass[0][1][3] =  0

 4300 20:09:47.436705  tx_last_pass[0][1][3] =	0

 4301 20:09:47.436760  tx_win_center[0][1][4] = 0

 4302 20:09:47.436813  tx_first_pass[0][1][4] =  0

 4303 20:09:47.436867  tx_last_pass[0][1][4] =	0

 4304 20:09:47.436921  tx_win_center[0][1][5] = 0

 4305 20:09:47.436974  tx_first_pass[0][1][5] =  0

 4306 20:09:47.437028  tx_last_pass[0][1][5] =	0

 4307 20:09:47.437082  tx_win_center[0][1][6] = 0

 4308 20:09:47.437135  tx_first_pass[0][1][6] =  0

 4309 20:09:47.437190  tx_last_pass[0][1][6] =	0

 4310 20:09:47.437243  tx_win_center[0][1][7] = 0

 4311 20:09:47.437309  tx_first_pass[0][1][7] =  0

 4312 20:09:47.437363  tx_last_pass[0][1][7] =	0

 4313 20:09:47.437418  tx_win_center[0][1][8] = 0

 4314 20:09:47.437472  tx_first_pass[0][1][8] =  0

 4315 20:09:47.437526  tx_last_pass[0][1][8] =	0

 4316 20:09:47.437579  tx_win_center[0][1][9] = 0

 4317 20:09:47.437633  tx_first_pass[0][1][9] =  0

 4318 20:09:47.437687  tx_last_pass[0][1][9] =	0

 4319 20:09:47.437740  tx_win_center[0][1][10] = 0

 4320 20:09:47.437794  tx_first_pass[0][1][10] =  0

 4321 20:09:47.437848  tx_last_pass[0][1][10] =	0

 4322 20:09:47.437902  tx_win_center[0][1][11] = 0

 4323 20:09:47.437956  tx_first_pass[0][1][11] =  0

 4324 20:09:47.438010  tx_last_pass[0][1][11] =	0

 4325 20:09:47.438063  tx_win_center[0][1][12] = 0

 4326 20:09:47.438117  tx_first_pass[0][1][12] =  0

 4327 20:09:47.438172  tx_last_pass[0][1][12] =	0

 4328 20:09:47.438226  tx_win_center[0][1][13] = 0

 4329 20:09:47.438280  tx_first_pass[0][1][13] =  0

 4330 20:09:47.438334  tx_last_pass[0][1][13] =	0

 4331 20:09:47.438388  tx_win_center[0][1][14] = 0

 4332 20:09:47.438442  tx_first_pass[0][1][14] =  0

 4333 20:09:47.438496  tx_last_pass[0][1][14] =	0

 4334 20:09:47.438550  tx_win_center[0][1][15] = 0

 4335 20:09:47.438606  tx_first_pass[0][1][15] =  0

 4336 20:09:47.438660  tx_last_pass[0][1][15] =	0

 4337 20:09:47.438714  tx_win_center[1][0][0] = 0

 4338 20:09:47.438768  tx_first_pass[1][0][0] =  0

 4339 20:09:47.438822  tx_last_pass[1][0][0] =	0

 4340 20:09:47.438876  tx_win_center[1][0][1] = 0

 4341 20:09:47.438930  tx_first_pass[1][0][1] =  0

 4342 20:09:47.438983  tx_last_pass[1][0][1] =	0

 4343 20:09:47.439037  tx_win_center[1][0][2] = 0

 4344 20:09:47.439091  tx_first_pass[1][0][2] =  0

 4345 20:09:47.439145  tx_last_pass[1][0][2] =	0

 4346 20:09:47.439198  tx_win_center[1][0][3] = 0

 4347 20:09:47.439251  tx_first_pass[1][0][3] =  0

 4348 20:09:47.439305  tx_last_pass[1][0][3] =	0

 4349 20:09:47.439359  tx_win_center[1][0][4] = 0

 4350 20:09:47.439607  tx_first_pass[1][0][4] =  0

 4351 20:09:47.439667  tx_last_pass[1][0][4] =	0

 4352 20:09:47.439722  tx_win_center[1][0][5] = 0

 4353 20:09:47.439776  tx_first_pass[1][0][5] =  0

 4354 20:09:47.439830  tx_last_pass[1][0][5] =	0

 4355 20:09:47.439884  tx_win_center[1][0][6] = 0

 4356 20:09:47.439939  tx_first_pass[1][0][6] =  0

 4357 20:09:47.439993  tx_last_pass[1][0][6] =	0

 4358 20:09:47.440047  tx_win_center[1][0][7] = 0

 4359 20:09:47.440101  tx_first_pass[1][0][7] =  0

 4360 20:09:47.440155  tx_last_pass[1][0][7] =	0

 4361 20:09:47.440222  tx_win_center[1][0][8] = 0

 4362 20:09:47.440274  tx_first_pass[1][0][8] =  0

 4363 20:09:47.440327  tx_last_pass[1][0][8] =	0

 4364 20:09:47.440379  tx_win_center[1][0][9] = 0

 4365 20:09:47.440432  tx_first_pass[1][0][9] =  0

 4366 20:09:47.440484  tx_last_pass[1][0][9] =	0

 4367 20:09:47.440537  tx_win_center[1][0][10] = 0

 4368 20:09:47.440589  tx_first_pass[1][0][10] =  0

 4369 20:09:47.440642  tx_last_pass[1][0][10] =	0

 4370 20:09:47.440695  tx_win_center[1][0][11] = 0

 4371 20:09:47.440747  tx_first_pass[1][0][11] =  0

 4372 20:09:47.440800  tx_last_pass[1][0][11] =	0

 4373 20:09:47.440853  tx_win_center[1][0][12] = 0

 4374 20:09:47.440905  tx_first_pass[1][0][12] =  0

 4375 20:09:47.440958  tx_last_pass[1][0][12] =	0

 4376 20:09:47.441011  tx_win_center[1][0][13] = 0

 4377 20:09:47.441065  tx_first_pass[1][0][13] =  0

 4378 20:09:47.441117  tx_last_pass[1][0][13] =	0

 4379 20:09:47.441170  tx_win_center[1][0][14] = 0

 4380 20:09:47.441223  tx_first_pass[1][0][14] =  0

 4381 20:09:47.441318  tx_last_pass[1][0][14] =	0

 4382 20:09:47.441373  tx_win_center[1][0][15] = 0

 4383 20:09:47.441425  tx_first_pass[1][0][15] =  0

 4384 20:09:47.441478  tx_last_pass[1][0][15] =	0

 4385 20:09:47.441530  tx_win_center[1][1][0] = 0

 4386 20:09:47.441583  tx_first_pass[1][1][0] =  0

 4387 20:09:47.441635  tx_last_pass[1][1][0] =	0

 4388 20:09:47.441688  tx_win_center[1][1][1] = 0

 4389 20:09:47.441740  tx_first_pass[1][1][1] =  0

 4390 20:09:47.441792  tx_last_pass[1][1][1] =	0

 4391 20:09:47.441844  tx_win_center[1][1][2] = 0

 4392 20:09:47.441897  tx_first_pass[1][1][2] =  0

 4393 20:09:47.441949  tx_last_pass[1][1][2] =	0

 4394 20:09:47.442001  tx_win_center[1][1][3] = 0

 4395 20:09:47.442054  tx_first_pass[1][1][3] =  0

 4396 20:09:47.442106  tx_last_pass[1][1][3] =	0

 4397 20:09:47.442159  tx_win_center[1][1][4] = 0

 4398 20:09:47.442211  tx_first_pass[1][1][4] =  0

 4399 20:09:47.442264  tx_last_pass[1][1][4] =	0

 4400 20:09:47.442317  tx_win_center[1][1][5] = 0

 4401 20:09:47.442369  tx_first_pass[1][1][5] =  0

 4402 20:09:47.442421  tx_last_pass[1][1][5] =	0

 4403 20:09:47.442473  tx_win_center[1][1][6] = 0

 4404 20:09:47.442526  tx_first_pass[1][1][6] =  0

 4405 20:09:47.442578  tx_last_pass[1][1][6] =	0

 4406 20:09:47.442630  tx_win_center[1][1][7] = 0

 4407 20:09:47.442683  tx_first_pass[1][1][7] =  0

 4408 20:09:47.442735  tx_last_pass[1][1][7] =	0

 4409 20:09:47.442788  tx_win_center[1][1][8] = 0

 4410 20:09:47.442840  tx_first_pass[1][1][8] =  0

 4411 20:09:47.442892  tx_last_pass[1][1][8] =	0

 4412 20:09:47.442945  tx_win_center[1][1][9] = 0

 4413 20:09:47.442997  tx_first_pass[1][1][9] =  0

 4414 20:09:47.443050  tx_last_pass[1][1][9] =	0

 4415 20:09:47.443102  tx_win_center[1][1][10] = 0

 4416 20:09:47.443154  tx_first_pass[1][1][10] =  0

 4417 20:09:47.443208  tx_last_pass[1][1][10] =	0

 4418 20:09:47.443261  tx_win_center[1][1][11] = 0

 4419 20:09:47.443313  tx_first_pass[1][1][11] =  0

 4420 20:09:47.443366  tx_last_pass[1][1][11] =	0

 4421 20:09:47.443419  tx_win_center[1][1][12] = 0

 4422 20:09:47.443471  tx_first_pass[1][1][12] =  0

 4423 20:09:47.443523  tx_last_pass[1][1][12] =	0

 4424 20:09:47.443575  tx_win_center[1][1][13] = 0

 4425 20:09:47.443628  tx_first_pass[1][1][13] =  0

 4426 20:09:47.443680  tx_last_pass[1][1][13] =	0

 4427 20:09:47.443733  tx_win_center[1][1][14] = 0

 4428 20:09:47.443785  tx_first_pass[1][1][14] =  0

 4429 20:09:47.443837  tx_last_pass[1][1][14] =	0

 4430 20:09:47.443890  tx_win_center[1][1][15] = 0

 4431 20:09:47.443942  tx_first_pass[1][1][15] =  0

 4432 20:09:47.443995  tx_last_pass[1][1][15] =	0

 4433 20:09:47.444047  dump params rx window

 4434 20:09:47.444099  rx_firspass[0][0][0] = 0

 4435 20:09:47.444152  rx_lastpass[0][0][0] =  0

 4436 20:09:47.444204  rx_firspass[0][0][1] = 0

 4437 20:09:47.444255  rx_lastpass[0][0][1] =  0

 4438 20:09:47.444308  rx_firspass[0][0][2] = 0

 4439 20:09:47.444361  rx_lastpass[0][0][2] =  0

 4440 20:09:47.444413  rx_firspass[0][0][3] = 0

 4441 20:09:47.444465  rx_lastpass[0][0][3] =  0

 4442 20:09:47.444517  rx_firspass[0][0][4] = 0

 4443 20:09:47.444570  rx_lastpass[0][0][4] =  0

 4444 20:09:47.444622  rx_firspass[0][0][5] = 0

 4445 20:09:47.444674  rx_lastpass[0][0][5] =  0

 4446 20:09:47.444726  rx_firspass[0][0][6] = 0

 4447 20:09:47.444779  rx_lastpass[0][0][6] =  0

 4448 20:09:47.444831  rx_firspass[0][0][7] = 0

 4449 20:09:47.444884  rx_lastpass[0][0][7] =  0

 4450 20:09:47.444936  rx_firspass[0][0][8] = 0

 4451 20:09:47.444988  rx_lastpass[0][0][8] =  0

 4452 20:09:47.445041  rx_firspass[0][0][9] = 0

 4453 20:09:47.445093  rx_lastpass[0][0][9] =  0

 4454 20:09:47.445144  rx_firspass[0][0][10] = 0

 4455 20:09:47.445197  rx_lastpass[0][0][10] =  0

 4456 20:09:47.445249  rx_firspass[0][0][11] = 0

 4457 20:09:47.445339  rx_lastpass[0][0][11] =  0

 4458 20:09:47.445393  rx_firspass[0][0][12] = 0

 4459 20:09:47.445446  rx_lastpass[0][0][12] =  0

 4460 20:09:47.445498  rx_firspass[0][0][13] = 0

 4461 20:09:47.445551  rx_lastpass[0][0][13] =  0

 4462 20:09:47.445603  rx_firspass[0][0][14] = 0

 4463 20:09:47.445655  rx_lastpass[0][0][14] =  0

 4464 20:09:47.445707  rx_firspass[0][0][15] = 0

 4465 20:09:47.445759  rx_lastpass[0][0][15] =  0

 4466 20:09:47.445811  rx_firspass[0][1][0] = 0

 4467 20:09:47.445864  rx_lastpass[0][1][0] =  0

 4468 20:09:47.445915  rx_firspass[0][1][1] = 0

 4469 20:09:47.445968  rx_lastpass[0][1][1] =  0

 4470 20:09:47.446020  rx_firspass[0][1][2] = 0

 4471 20:09:47.446072  rx_lastpass[0][1][2] =  0

 4472 20:09:47.446125  rx_firspass[0][1][3] = 0

 4473 20:09:47.446177  rx_lastpass[0][1][3] =  0

 4474 20:09:47.446230  rx_firspass[0][1][4] = 0

 4475 20:09:47.446282  rx_lastpass[0][1][4] =  0

 4476 20:09:47.446334  rx_firspass[0][1][5] = 0

 4477 20:09:47.446386  rx_lastpass[0][1][5] =  0

 4478 20:09:47.446438  rx_firspass[0][1][6] = 0

 4479 20:09:47.446491  rx_lastpass[0][1][6] =  0

 4480 20:09:47.446543  rx_firspass[0][1][7] = 0

 4481 20:09:47.446595  rx_lastpass[0][1][7] =  0

 4482 20:09:47.446647  rx_firspass[0][1][8] = 0

 4483 20:09:47.446699  rx_lastpass[0][1][8] =  0

 4484 20:09:47.446752  rx_firspass[0][1][9] = 0

 4485 20:09:47.446804  rx_lastpass[0][1][9] =  0

 4486 20:09:47.446856  rx_firspass[0][1][10] = 0

 4487 20:09:47.446909  rx_lastpass[0][1][10] =  0

 4488 20:09:47.446962  rx_firspass[0][1][11] = 0

 4489 20:09:47.447014  rx_lastpass[0][1][11] =  0

 4490 20:09:47.447067  rx_firspass[0][1][12] = 0

 4491 20:09:47.447118  rx_lastpass[0][1][12] =  0

 4492 20:09:47.447171  rx_firspass[0][1][13] = 0

 4493 20:09:47.447223  rx_lastpass[0][1][13] =  0

 4494 20:09:47.447275  rx_firspass[0][1][14] = 0

 4495 20:09:47.447328  rx_lastpass[0][1][14] =  0

 4496 20:09:47.447380  rx_firspass[0][1][15] = 0

 4497 20:09:47.447625  rx_lastpass[0][1][15] =  0

 4498 20:09:47.447684  rx_firspass[1][0][0] = 0

 4499 20:09:47.447738  rx_lastpass[1][0][0] =  0

 4500 20:09:47.447791  rx_firspass[1][0][1] = 0

 4501 20:09:47.447844  rx_lastpass[1][0][1] =  0

 4502 20:09:47.447897  rx_firspass[1][0][2] = 0

 4503 20:09:47.447949  rx_lastpass[1][0][2] =  0

 4504 20:09:47.448002  rx_firspass[1][0][3] = 0

 4505 20:09:47.448054  rx_lastpass[1][0][3] =  0

 4506 20:09:47.448107  rx_firspass[1][0][4] = 0

 4507 20:09:47.448159  rx_lastpass[1][0][4] =  0

 4508 20:09:47.448211  rx_firspass[1][0][5] = 0

 4509 20:09:47.448264  rx_lastpass[1][0][5] =  0

 4510 20:09:47.448317  rx_firspass[1][0][6] = 0

 4511 20:09:47.448369  rx_lastpass[1][0][6] =  0

 4512 20:09:47.448422  rx_firspass[1][0][7] = 0

 4513 20:09:47.448474  rx_lastpass[1][0][7] =  0

 4514 20:09:47.448526  rx_firspass[1][0][8] = 0

 4515 20:09:47.448579  rx_lastpass[1][0][8] =  0

 4516 20:09:47.448631  rx_firspass[1][0][9] = 0

 4517 20:09:47.448683  rx_lastpass[1][0][9] =  0

 4518 20:09:47.448735  rx_firspass[1][0][10] = 0

 4519 20:09:47.448787  rx_lastpass[1][0][10] =  0

 4520 20:09:47.448840  rx_firspass[1][0][11] = 0

 4521 20:09:47.448892  rx_lastpass[1][0][11] =  0

 4522 20:09:47.448944  rx_firspass[1][0][12] = 0

 4523 20:09:47.448996  rx_lastpass[1][0][12] =  0

 4524 20:09:47.449049  rx_firspass[1][0][13] = 0

 4525 20:09:47.449101  rx_lastpass[1][0][13] =  0

 4526 20:09:47.449153  rx_firspass[1][0][14] = 0

 4527 20:09:47.449205  rx_lastpass[1][0][14] =  0

 4528 20:09:47.449263  rx_firspass[1][0][15] = 0

 4529 20:09:47.449347  rx_lastpass[1][0][15] =  0

 4530 20:09:47.449400  rx_firspass[1][1][0] = 0

 4531 20:09:47.449452  rx_lastpass[1][1][0] =  0

 4532 20:09:47.449504  rx_firspass[1][1][1] = 0

 4533 20:09:47.449557  rx_lastpass[1][1][1] =  0

 4534 20:09:47.449609  rx_firspass[1][1][2] = 0

 4535 20:09:47.449661  rx_lastpass[1][1][2] =  0

 4536 20:09:47.449713  rx_firspass[1][1][3] = 0

 4537 20:09:47.449766  rx_lastpass[1][1][3] =  0

 4538 20:09:47.449818  rx_firspass[1][1][4] = 0

 4539 20:09:47.449871  rx_lastpass[1][1][4] =  0

 4540 20:09:47.449923  rx_firspass[1][1][5] = 0

 4541 20:09:47.449975  rx_lastpass[1][1][5] =  0

 4542 20:09:47.450028  rx_firspass[1][1][6] = 0

 4543 20:09:47.450080  rx_lastpass[1][1][6] =  0

 4544 20:09:47.450132  rx_firspass[1][1][7] = 0

 4545 20:09:47.450185  rx_lastpass[1][1][7] =  0

 4546 20:09:47.450237  rx_firspass[1][1][8] = 0

 4547 20:09:47.450288  rx_lastpass[1][1][8] =  0

 4548 20:09:47.450340  rx_firspass[1][1][9] = 0

 4549 20:09:47.450393  rx_lastpass[1][1][9] =  0

 4550 20:09:47.450445  rx_firspass[1][1][10] = 0

 4551 20:09:47.450497  rx_lastpass[1][1][10] =  0

 4552 20:09:47.450549  rx_firspass[1][1][11] = 0

 4553 20:09:47.450601  rx_lastpass[1][1][11] =  0

 4554 20:09:47.450653  rx_firspass[1][1][12] = 0

 4555 20:09:47.450705  rx_lastpass[1][1][12] =  0

 4556 20:09:47.450757  rx_firspass[1][1][13] = 0

 4557 20:09:47.450810  rx_lastpass[1][1][13] =  0

 4558 20:09:47.450862  rx_firspass[1][1][14] = 0

 4559 20:09:47.450915  rx_lastpass[1][1][14] =  0

 4560 20:09:47.450967  rx_firspass[1][1][15] = 0

 4561 20:09:47.451020  rx_lastpass[1][1][15] =  0

 4562 20:09:47.451072  dump params clk_delay

 4563 20:09:47.451124  clk_delay[0] = 0

 4564 20:09:47.451177  clk_delay[1] = 0

 4565 20:09:47.451229  dump params dqs_delay

 4566 20:09:47.451282  dqs_delay[0][0] = 0

 4567 20:09:47.451334  dqs_delay[0][1] = 0

 4568 20:09:47.451386  dqs_delay[1][0] = 0

 4569 20:09:47.451439  dqs_delay[1][1] = 0

 4570 20:09:47.451491  dump params delay_cell_unit = 762

 4571 20:09:47.451544  dump source = 0x0

 4572 20:09:47.451596  dump params frequency:800

 4573 20:09:47.451649  dump params rank number:2

 4574 20:09:47.451700  

 4575 20:09:47.451753   dump params write leveling

 4576 20:09:47.451806  write leveling[0][0][0] = 0x0

 4577 20:09:47.451859  write leveling[0][0][1] = 0x0

 4578 20:09:47.451911  write leveling[0][1][0] = 0x0

 4579 20:09:47.451963  write leveling[0][1][1] = 0x0

 4580 20:09:47.452015  write leveling[1][0][0] = 0x0

 4581 20:09:47.452068  write leveling[1][0][1] = 0x0

 4582 20:09:47.452120  write leveling[1][1][0] = 0x0

 4583 20:09:47.452172  write leveling[1][1][1] = 0x0

 4584 20:09:47.452225  dump params cbt_cs

 4585 20:09:47.452278  cbt_cs[0][0] = 0x0

 4586 20:09:47.452331  cbt_cs[0][1] = 0x0

 4587 20:09:47.452383  cbt_cs[1][0] = 0x0

 4588 20:09:47.452435  cbt_cs[1][1] = 0x0

 4589 20:09:47.452487  dump params cbt_mr12

 4590 20:09:47.452539  cbt_mr12[0][0] = 0x0

 4591 20:09:47.452592  cbt_mr12[0][1] = 0x0

 4592 20:09:47.452644  cbt_mr12[1][0] = 0x0

 4593 20:09:47.452696  cbt_mr12[1][1] = 0x0

 4594 20:09:47.452748  dump params tx window

 4595 20:09:47.452801  tx_center_min[0][0][0] = 0

 4596 20:09:47.452853  tx_center_max[0][0][0] =  0

 4597 20:09:47.452906  tx_center_min[0][0][1] = 0

 4598 20:09:47.452958  tx_center_max[0][0][1] =  0

 4599 20:09:47.453011  tx_center_min[0][1][0] = 0

 4600 20:09:47.453064  tx_center_max[0][1][0] =  0

 4601 20:09:47.453116  tx_center_min[0][1][1] = 0

 4602 20:09:47.453169  tx_center_max[0][1][1] =  0

 4603 20:09:47.453221  tx_center_min[1][0][0] = 0

 4604 20:09:47.453294  tx_center_max[1][0][0] =  0

 4605 20:09:47.453361  tx_center_min[1][0][1] = 0

 4606 20:09:47.453413  tx_center_max[1][0][1] =  0

 4607 20:09:47.453466  tx_center_min[1][1][0] = 0

 4608 20:09:47.453519  tx_center_max[1][1][0] =  0

 4609 20:09:47.453571  tx_center_min[1][1][1] = 0

 4610 20:09:47.453623  tx_center_max[1][1][1] =  0

 4611 20:09:47.453676  dump params tx window

 4612 20:09:47.453728  tx_win_center[0][0][0] = 0

 4613 20:09:47.453780  tx_first_pass[0][0][0] =  0

 4614 20:09:47.453832  tx_last_pass[0][0][0] =	0

 4615 20:09:47.453884  tx_win_center[0][0][1] = 0

 4616 20:09:47.453937  tx_first_pass[0][0][1] =  0

 4617 20:09:47.453989  tx_last_pass[0][0][1] =	0

 4618 20:09:47.454042  tx_win_center[0][0][2] = 0

 4619 20:09:47.454095  tx_first_pass[0][0][2] =  0

 4620 20:09:47.454147  tx_last_pass[0][0][2] =	0

 4621 20:09:47.454200  tx_win_center[0][0][3] = 0

 4622 20:09:47.454252  tx_first_pass[0][0][3] =  0

 4623 20:09:47.454304  tx_last_pass[0][0][3] =	0

 4624 20:09:47.454357  tx_win_center[0][0][4] = 0

 4625 20:09:47.454409  tx_first_pass[0][0][4] =  0

 4626 20:09:47.454463  tx_last_pass[0][0][4] =	0

 4627 20:09:47.454515  tx_win_center[0][0][5] = 0

 4628 20:09:47.454568  tx_first_pass[0][0][5] =  0

 4629 20:09:47.454621  tx_last_pass[0][0][5] =	0

 4630 20:09:47.454673  tx_win_center[0][0][6] = 0

 4631 20:09:47.454725  tx_first_pass[0][0][6] =  0

 4632 20:09:47.454778  tx_last_pass[0][0][6] =	0

 4633 20:09:47.454831  tx_win_center[0][0][7] = 0

 4634 20:09:47.454883  tx_first_pass[0][0][7] =  0

 4635 20:09:47.454935  tx_last_pass[0][0][7] =	0

 4636 20:09:47.454988  tx_win_center[0][0][8] = 0

 4637 20:09:47.455040  tx_first_pass[0][0][8] =  0

 4638 20:09:47.455092  tx_last_pass[0][0][8] =	0

 4639 20:09:47.455145  tx_win_center[0][0][9] = 0

 4640 20:09:47.455197  tx_first_pass[0][0][9] =  0

 4641 20:09:47.455249  tx_last_pass[0][0][9] =	0

 4642 20:09:47.455302  tx_win_center[0][0][10] = 0

 4643 20:09:47.455354  tx_first_pass[0][0][10] =  0

 4644 20:09:47.455406  tx_last_pass[0][0][10] =	0

 4645 20:09:47.455458  tx_win_center[0][0][11] = 0

 4646 20:09:47.455510  tx_first_pass[0][0][11] =  0

 4647 20:09:47.455562  tx_last_pass[0][0][11] =	0

 4648 20:09:47.455614  tx_win_center[0][0][12] = 0

 4649 20:09:47.455666  tx_first_pass[0][0][12] =  0

 4650 20:09:47.455718  tx_last_pass[0][0][12] =	0

 4651 20:09:47.455960  tx_win_center[0][0][13] = 0

 4652 20:09:47.456018  tx_first_pass[0][0][13] =  0

 4653 20:09:47.456072  tx_last_pass[0][0][13] =	0

 4654 20:09:47.456126  tx_win_center[0][0][14] = 0

 4655 20:09:47.456179  tx_first_pass[0][0][14] =  0

 4656 20:09:47.456231  tx_last_pass[0][0][14] =	0

 4657 20:09:47.456283  tx_win_center[0][0][15] = 0

 4658 20:09:47.456335  tx_first_pass[0][0][15] =  0

 4659 20:09:47.456389  tx_last_pass[0][0][15] =	0

 4660 20:09:47.456442  tx_win_center[0][1][0] = 0

 4661 20:09:47.456494  tx_first_pass[0][1][0] =  0

 4662 20:09:47.456547  tx_last_pass[0][1][0] =	0

 4663 20:09:47.456600  tx_win_center[0][1][1] = 0

 4664 20:09:47.456653  tx_first_pass[0][1][1] =  0

 4665 20:09:47.456705  tx_last_pass[0][1][1] =	0

 4666 20:09:47.456758  tx_win_center[0][1][2] = 0

 4667 20:09:47.456811  tx_first_pass[0][1][2] =  0

 4668 20:09:47.456864  tx_last_pass[0][1][2] =	0

 4669 20:09:47.456916  tx_win_center[0][1][3] = 0

 4670 20:09:47.456968  tx_first_pass[0][1][3] =  0

 4671 20:09:47.457020  tx_last_pass[0][1][3] =	0

 4672 20:09:47.457073  tx_win_center[0][1][4] = 0

 4673 20:09:47.457126  tx_first_pass[0][1][4] =  0

 4674 20:09:47.457179  tx_last_pass[0][1][4] =	0

 4675 20:09:47.457231  tx_win_center[0][1][5] = 0

 4676 20:09:47.457314  tx_first_pass[0][1][5] =  0

 4677 20:09:47.457383  tx_last_pass[0][1][5] =	0

 4678 20:09:47.457436  tx_win_center[0][1][6] = 0

 4679 20:09:47.457489  tx_first_pass[0][1][6] =  0

 4680 20:09:47.457541  tx_last_pass[0][1][6] =	0

 4681 20:09:47.457593  tx_win_center[0][1][7] = 0

 4682 20:09:47.457646  tx_first_pass[0][1][7] =  0

 4683 20:09:47.457698  tx_last_pass[0][1][7] =	0

 4684 20:09:47.457750  tx_win_center[0][1][8] = 0

 4685 20:09:47.457802  tx_first_pass[0][1][8] =  0

 4686 20:09:47.457855  tx_last_pass[0][1][8] =	0

 4687 20:09:47.457907  tx_win_center[0][1][9] = 0

 4688 20:09:47.457959  tx_first_pass[0][1][9] =  0

 4689 20:09:47.458012  tx_last_pass[0][1][9] =	0

 4690 20:09:47.458064  tx_win_center[0][1][10] = 0

 4691 20:09:47.458117  tx_first_pass[0][1][10] =  0

 4692 20:09:47.458169  tx_last_pass[0][1][10] =	0

 4693 20:09:47.458222  tx_win_center[0][1][11] = 0

 4694 20:09:47.458275  tx_first_pass[0][1][11] =  0

 4695 20:09:47.458328  tx_last_pass[0][1][11] =	0

 4696 20:09:47.458380  tx_win_center[0][1][12] = 0

 4697 20:09:47.458433  tx_first_pass[0][1][12] =  0

 4698 20:09:47.458485  tx_last_pass[0][1][12] =	0

 4699 20:09:47.458538  tx_win_center[0][1][13] = 0

 4700 20:09:47.458590  tx_first_pass[0][1][13] =  0

 4701 20:09:47.458642  tx_last_pass[0][1][13] =	0

 4702 20:09:47.458694  tx_win_center[0][1][14] = 0

 4703 20:09:47.458747  tx_first_pass[0][1][14] =  0

 4704 20:09:47.458800  tx_last_pass[0][1][14] =	0

 4705 20:09:47.458851  tx_win_center[0][1][15] = 0

 4706 20:09:47.458904  tx_first_pass[0][1][15] =  0

 4707 20:09:47.458956  tx_last_pass[0][1][15] =	0

 4708 20:09:47.459010  tx_win_center[1][0][0] = 0

 4709 20:09:47.459063  tx_first_pass[1][0][0] =  0

 4710 20:09:47.459115  tx_last_pass[1][0][0] =	0

 4711 20:09:47.459168  tx_win_center[1][0][1] = 0

 4712 20:09:47.459221  tx_first_pass[1][0][1] =  0

 4713 20:09:47.459274  tx_last_pass[1][0][1] =	0

 4714 20:09:47.459326  tx_win_center[1][0][2] = 0

 4715 20:09:47.459378  tx_first_pass[1][0][2] =  0

 4716 20:09:47.459431  tx_last_pass[1][0][2] =	0

 4717 20:09:47.459484  tx_win_center[1][0][3] = 0

 4718 20:09:47.459536  tx_first_pass[1][0][3] =  0

 4719 20:09:47.459589  tx_last_pass[1][0][3] =	0

 4720 20:09:47.459641  tx_win_center[1][0][4] = 0

 4721 20:09:47.459694  tx_first_pass[1][0][4] =  0

 4722 20:09:47.459746  tx_last_pass[1][0][4] =	0

 4723 20:09:47.459798  tx_win_center[1][0][5] = 0

 4724 20:09:47.459851  tx_first_pass[1][0][5] =  0

 4725 20:09:47.459903  tx_last_pass[1][0][5] =	0

 4726 20:09:47.459956  tx_win_center[1][0][6] = 0

 4727 20:09:47.460008  tx_first_pass[1][0][6] =  0

 4728 20:09:47.460060  tx_last_pass[1][0][6] =	0

 4729 20:09:47.460113  tx_win_center[1][0][7] = 0

 4730 20:09:47.460166  tx_first_pass[1][0][7] =  0

 4731 20:09:47.460218  tx_last_pass[1][0][7] =	0

 4732 20:09:47.460271  tx_win_center[1][0][8] = 0

 4733 20:09:47.460323  tx_first_pass[1][0][8] =  0

 4734 20:09:47.460376  tx_last_pass[1][0][8] =	0

 4735 20:09:47.460429  tx_win_center[1][0][9] = 0

 4736 20:09:47.460482  tx_first_pass[1][0][9] =  0

 4737 20:09:47.460535  tx_last_pass[1][0][9] =	0

 4738 20:09:47.460587  tx_win_center[1][0][10] = 0

 4739 20:09:47.460640  tx_first_pass[1][0][10] =  0

 4740 20:09:47.460692  tx_last_pass[1][0][10] =	0

 4741 20:09:47.460744  tx_win_center[1][0][11] = 0

 4742 20:09:47.460797  tx_first_pass[1][0][11] =  0

 4743 20:09:47.460850  tx_last_pass[1][0][11] =	0

 4744 20:09:47.460902  tx_win_center[1][0][12] = 0

 4745 20:09:47.460954  tx_first_pass[1][0][12] =  0

 4746 20:09:47.461006  tx_last_pass[1][0][12] =	0

 4747 20:09:47.461059  tx_win_center[1][0][13] = 0

 4748 20:09:47.461112  tx_first_pass[1][0][13] =  0

 4749 20:09:47.461166  tx_last_pass[1][0][13] =	0

 4750 20:09:47.461219  tx_win_center[1][0][14] = 0

 4751 20:09:47.461312  tx_first_pass[1][0][14] =  0

 4752 20:09:47.461366  tx_last_pass[1][0][14] =	0

 4753 20:09:47.461418  tx_win_center[1][0][15] = 0

 4754 20:09:47.461470  tx_first_pass[1][0][15] =  0

 4755 20:09:47.461523  tx_last_pass[1][0][15] =	0

 4756 20:09:47.461576  tx_win_center[1][1][0] = 0

 4757 20:09:47.461628  tx_first_pass[1][1][0] =  0

 4758 20:09:47.461681  tx_last_pass[1][1][0] =	0

 4759 20:09:47.461733  tx_win_center[1][1][1] = 0

 4760 20:09:47.461786  tx_first_pass[1][1][1] =  0

 4761 20:09:47.461838  tx_last_pass[1][1][1] =	0

 4762 20:09:47.461891  tx_win_center[1][1][2] = 0

 4763 20:09:47.461946  tx_first_pass[1][1][2] =  0

 4764 20:09:47.461999  tx_last_pass[1][1][2] =	0

 4765 20:09:47.462052  tx_win_center[1][1][3] = 0

 4766 20:09:47.462104  tx_first_pass[1][1][3] =  0

 4767 20:09:47.462157  tx_last_pass[1][1][3] =	0

 4768 20:09:47.462209  tx_win_center[1][1][4] = 0

 4769 20:09:47.462262  tx_first_pass[1][1][4] =  0

 4770 20:09:47.462315  tx_last_pass[1][1][4] =	0

 4771 20:09:47.462367  tx_win_center[1][1][5] = 0

 4772 20:09:47.462420  tx_first_pass[1][1][5] =  0

 4773 20:09:47.462472  tx_last_pass[1][1][5] =	0

 4774 20:09:47.462524  tx_win_center[1][1][6] = 0

 4775 20:09:47.462577  tx_first_pass[1][1][6] =  0

 4776 20:09:47.462630  tx_last_pass[1][1][6] =	0

 4777 20:09:47.462682  tx_win_center[1][1][7] = 0

 4778 20:09:47.462735  tx_first_pass[1][1][7] =  0

 4779 20:09:47.462788  tx_last_pass[1][1][7] =	0

 4780 20:09:47.462840  tx_win_center[1][1][8] = 0

 4781 20:09:47.462893  tx_first_pass[1][1][8] =  0

 4782 20:09:47.462945  tx_last_pass[1][1][8] =	0

 4783 20:09:47.462998  tx_win_center[1][1][9] = 0

 4784 20:09:47.463051  tx_first_pass[1][1][9] =  0

 4785 20:09:47.463103  tx_last_pass[1][1][9] =	0

 4786 20:09:47.463156  tx_win_center[1][1][10] = 0

 4787 20:09:47.463208  tx_first_pass[1][1][10] =  0

 4788 20:09:47.463260  tx_last_pass[1][1][10] =	0

 4789 20:09:47.463313  tx_win_center[1][1][11] = 0

 4790 20:09:47.463367  tx_first_pass[1][1][11] =  0

 4791 20:09:47.463420  tx_last_pass[1][1][11] =	0

 4792 20:09:47.463472  tx_win_center[1][1][12] = 0

 4793 20:09:47.463524  tx_first_pass[1][1][12] =  0

 4794 20:09:47.463577  tx_last_pass[1][1][12] =	0

 4795 20:09:47.463819  tx_win_center[1][1][13] = 0

 4796 20:09:47.463877  tx_first_pass[1][1][13] =  0

 4797 20:09:47.463931  tx_last_pass[1][1][13] =	0

 4798 20:09:47.463984  tx_win_center[1][1][14] = 0

 4799 20:09:47.464037  tx_first_pass[1][1][14] =  0

 4800 20:09:47.464089  tx_last_pass[1][1][14] =	0

 4801 20:09:47.464143  tx_win_center[1][1][15] = 0

 4802 20:09:47.464195  tx_first_pass[1][1][15] =  0

 4803 20:09:47.464248  tx_last_pass[1][1][15] =	0

 4804 20:09:47.464300  dump params rx window

 4805 20:09:47.464353  rx_firspass[0][0][0] = 0

 4806 20:09:47.464406  rx_lastpass[0][0][0] =  0

 4807 20:09:47.464458  rx_firspass[0][0][1] = 0

 4808 20:09:47.464510  rx_lastpass[0][0][1] =  0

 4809 20:09:47.464563  rx_firspass[0][0][2] = 0

 4810 20:09:47.464615  rx_lastpass[0][0][2] =  0

 4811 20:09:47.464667  rx_firspass[0][0][3] = 0

 4812 20:09:47.464719  rx_lastpass[0][0][3] =  0

 4813 20:09:47.464771  rx_firspass[0][0][4] = 0

 4814 20:09:47.464823  rx_lastpass[0][0][4] =  0

 4815 20:09:47.464875  rx_firspass[0][0][5] = 0

 4816 20:09:47.464928  rx_lastpass[0][0][5] =  0

 4817 20:09:47.464980  rx_firspass[0][0][6] = 0

 4818 20:09:47.465032  rx_lastpass[0][0][6] =  0

 4819 20:09:47.465085  rx_firspass[0][0][7] = 0

 4820 20:09:47.465137  rx_lastpass[0][0][7] =  0

 4821 20:09:47.465190  rx_firspass[0][0][8] = 0

 4822 20:09:47.465242  rx_lastpass[0][0][8] =  0

 4823 20:09:47.465336  rx_firspass[0][0][9] = 0

 4824 20:09:47.465389  rx_lastpass[0][0][9] =  0

 4825 20:09:47.465442  rx_firspass[0][0][10] = 0

 4826 20:09:47.465494  rx_lastpass[0][0][10] =  0

 4827 20:09:47.465546  rx_firspass[0][0][11] = 0

 4828 20:09:47.465599  rx_lastpass[0][0][11] =  0

 4829 20:09:47.465651  rx_firspass[0][0][12] = 0

 4830 20:09:47.465704  rx_lastpass[0][0][12] =  0

 4831 20:09:47.465757  rx_firspass[0][0][13] = 0

 4832 20:09:47.465809  rx_lastpass[0][0][13] =  0

 4833 20:09:47.465862  rx_firspass[0][0][14] = 0

 4834 20:09:47.465914  rx_lastpass[0][0][14] =  0

 4835 20:09:47.465965  rx_firspass[0][0][15] = 0

 4836 20:09:47.466017  rx_lastpass[0][0][15] =  0

 4837 20:09:47.466070  rx_firspass[0][1][0] = 0

 4838 20:09:47.466123  rx_lastpass[0][1][0] =  0

 4839 20:09:47.466175  rx_firspass[0][1][1] = 0

 4840 20:09:47.466227  rx_lastpass[0][1][1] =  0

 4841 20:09:47.466279  rx_firspass[0][1][2] = 0

 4842 20:09:47.466331  rx_lastpass[0][1][2] =  0

 4843 20:09:47.466384  rx_firspass[0][1][3] = 0

 4844 20:09:47.466436  rx_lastpass[0][1][3] =  0

 4845 20:09:47.466488  rx_firspass[0][1][4] = 0

 4846 20:09:47.466541  rx_lastpass[0][1][4] =  0

 4847 20:09:47.466593  rx_firspass[0][1][5] = 0

 4848 20:09:47.466645  rx_lastpass[0][1][5] =  0

 4849 20:09:47.466698  rx_firspass[0][1][6] = 0

 4850 20:09:47.466750  rx_lastpass[0][1][6] =  0

 4851 20:09:47.466802  rx_firspass[0][1][7] = 0

 4852 20:09:47.466855  rx_lastpass[0][1][7] =  0

 4853 20:09:47.466907  rx_firspass[0][1][8] = 0

 4854 20:09:47.466959  rx_lastpass[0][1][8] =  0

 4855 20:09:47.467011  rx_firspass[0][1][9] = 0

 4856 20:09:47.467064  rx_lastpass[0][1][9] =  0

 4857 20:09:47.467116  rx_firspass[0][1][10] = 0

 4858 20:09:47.467169  rx_lastpass[0][1][10] =  0

 4859 20:09:47.467221  rx_firspass[0][1][11] = 0

 4860 20:09:47.467273  rx_lastpass[0][1][11] =  0

 4861 20:09:47.467326  rx_firspass[0][1][12] = 0

 4862 20:09:47.467378  rx_lastpass[0][1][12] =  0

 4863 20:09:47.467430  rx_firspass[0][1][13] = 0

 4864 20:09:47.467482  rx_lastpass[0][1][13] =  0

 4865 20:09:47.467535  rx_firspass[0][1][14] = 0

 4866 20:09:47.467588  rx_lastpass[0][1][14] =  0

 4867 20:09:47.467640  rx_firspass[0][1][15] = 0

 4868 20:09:47.467693  rx_lastpass[0][1][15] =  0

 4869 20:09:47.467745  rx_firspass[1][0][0] = 0

 4870 20:09:47.467798  rx_lastpass[1][0][0] =  0

 4871 20:09:47.467849  rx_firspass[1][0][1] = 0

 4872 20:09:47.467902  rx_lastpass[1][0][1] =  0

 4873 20:09:47.467955  rx_firspass[1][0][2] = 0

 4874 20:09:47.468008  rx_lastpass[1][0][2] =  0

 4875 20:09:47.468060  rx_firspass[1][0][3] = 0

 4876 20:09:47.468113  rx_lastpass[1][0][3] =  0

 4877 20:09:47.468165  rx_firspass[1][0][4] = 0

 4878 20:09:47.468217  rx_lastpass[1][0][4] =  0

 4879 20:09:47.468270  rx_firspass[1][0][5] = 0

 4880 20:09:47.468322  rx_lastpass[1][0][5] =  0

 4881 20:09:47.468374  rx_firspass[1][0][6] = 0

 4882 20:09:47.468425  rx_lastpass[1][0][6] =  0

 4883 20:09:47.468477  rx_firspass[1][0][7] = 0

 4884 20:09:47.468529  rx_lastpass[1][0][7] =  0

 4885 20:09:47.468581  rx_firspass[1][0][8] = 0

 4886 20:09:47.468634  rx_lastpass[1][0][8] =  0

 4887 20:09:47.468686  rx_firspass[1][0][9] = 0

 4888 20:09:47.468739  rx_lastpass[1][0][9] =  0

 4889 20:09:47.468791  rx_firspass[1][0][10] = 0

 4890 20:09:47.468843  rx_lastpass[1][0][10] =  0

 4891 20:09:47.468896  rx_firspass[1][0][11] = 0

 4892 20:09:47.468948  rx_lastpass[1][0][11] =  0

 4893 20:09:47.469001  rx_firspass[1][0][12] = 0

 4894 20:09:47.469053  rx_lastpass[1][0][12] =  0

 4895 20:09:47.469105  rx_firspass[1][0][13] = 0

 4896 20:09:47.469157  rx_lastpass[1][0][13] =  0

 4897 20:09:47.469209  rx_firspass[1][0][14] = 0

 4898 20:09:47.469264  rx_lastpass[1][0][14] =  0

 4899 20:09:47.469354  rx_firspass[1][0][15] = 0

 4900 20:09:47.469406  rx_lastpass[1][0][15] =  0

 4901 20:09:47.469459  rx_firspass[1][1][0] = 0

 4902 20:09:47.469512  rx_lastpass[1][1][0] =  0

 4903 20:09:47.469564  rx_firspass[1][1][1] = 0

 4904 20:09:47.469616  rx_lastpass[1][1][1] =  0

 4905 20:09:47.469669  rx_firspass[1][1][2] = 0

 4906 20:09:47.469721  rx_lastpass[1][1][2] =  0

 4907 20:09:47.469773  rx_firspass[1][1][3] = 0

 4908 20:09:47.469825  rx_lastpass[1][1][3] =  0

 4909 20:09:47.469878  rx_firspass[1][1][4] = 0

 4910 20:09:47.469930  rx_lastpass[1][1][4] =  0

 4911 20:09:47.469983  rx_firspass[1][1][5] = 0

 4912 20:09:47.470034  rx_lastpass[1][1][5] =  0

 4913 20:09:47.470087  rx_firspass[1][1][6] = 0

 4914 20:09:47.470139  rx_lastpass[1][1][6] =  0

 4915 20:09:47.470192  rx_firspass[1][1][7] = 0

 4916 20:09:47.470244  rx_lastpass[1][1][7] =  0

 4917 20:09:47.470296  rx_firspass[1][1][8] = 0

 4918 20:09:47.470348  rx_lastpass[1][1][8] =  0

 4919 20:09:47.470401  rx_firspass[1][1][9] = 0

 4920 20:09:47.470453  rx_lastpass[1][1][9] =  0

 4921 20:09:47.470506  rx_firspass[1][1][10] = 0

 4922 20:09:47.470558  rx_lastpass[1][1][10] =  0

 4923 20:09:47.470610  rx_firspass[1][1][11] = 0

 4924 20:09:47.470662  rx_lastpass[1][1][11] =  0

 4925 20:09:47.470714  rx_firspass[1][1][12] = 0

 4926 20:09:47.470767  rx_lastpass[1][1][12] =  0

 4927 20:09:47.470820  rx_firspass[1][1][13] = 0

 4928 20:09:47.470873  rx_lastpass[1][1][13] =  0

 4929 20:09:47.470925  rx_firspass[1][1][14] = 0

 4930 20:09:47.470977  rx_lastpass[1][1][14] =  0

 4931 20:09:47.471029  rx_firspass[1][1][15] = 0

 4932 20:09:47.471082  rx_lastpass[1][1][15] =  0

 4933 20:09:47.471134  dump params clk_delay

 4934 20:09:47.471186  clk_delay[0] = 0

 4935 20:09:47.471238  clk_delay[1] = 0

 4936 20:09:47.471291  dump params dqs_delay

 4937 20:09:47.471343  dqs_delay[0][0] = 0

 4938 20:09:47.471395  dqs_delay[0][1] = 0

 4939 20:09:47.471448  dqs_delay[1][0] = 0

 4940 20:09:47.471500  dqs_delay[1][1] = 0

 4941 20:09:47.471552  dump params delay_cell_unit = 762

 4942 20:09:47.471605  mt_set_emi_preloader end

 4943 20:09:47.471657  [mt_mem_init] dram size: 0x100000000, rank number: 2 

 4944 20:09:47.471711  [complex_mem_test] start addr:0x40000000, len:20480

 4945 20:09:47.471954  [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0

 4946 20:09:47.472014  [complex_mem_test] start addr:0x80000000, len:20480

 4947 20:09:47.472068  [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0

 4948 20:09:47.472122  [complex_mem_test] start addr:0xc0000000, len:20480

 4949 20:09:47.472175  [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0

 4950 20:09:47.472227  [complex_mem_test] start addr:0x56000000, len:8192

 4951 20:09:47.472280  [MEM] 1st complex R/W mem test pass (start addr:0x56000000)

 4952 20:09:47.472334  ddr_geometry:1

 4953 20:09:47.472386  [complex_mem_test] start addr:0x80000000, len:8192

 4954 20:09:47.598896  [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)

 4955 20:09:47.599094  dram_init: dram init end (result: 0)

 4956 20:09:47.599203  Successfully loaded DRAM blobs and ran DRAM calibration

 4957 20:09:47.599304  Mapping address range [0000000040000000:0000000140000000) as     cacheable | read-write | non-secure | normal

 4958 20:09:47.599404  CBMEM:

 4959 20:09:47.599498  IMD: root @ 00000000fffff000 254 entries.

 4960 20:09:47.599592  IMD: root @ 00000000ffffec00 62 entries.

 4961 20:09:47.599684  VBOOT: copying vboot_working_data (256 bytes) to CBMEM...

 4962 20:09:47.599776  out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00 

 4963 20:09:47.599892  in-header: 03 a1 00 00 08 00 00 00 

 4964 20:09:47.600052  in-data: 84 60 60 10 00 00 00 00 

 4965 20:09:47.600150  Chrome EC: clear events_b mask to 0x0000000020004000

 4966 20:09:47.600263  out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00 

 4967 20:09:47.600367  in-header: 03 fd 00 00 00 00 00 00 

 4968 20:09:47.600468  in-data: 

 4969 20:09:47.600569  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 4970 20:09:47.600671  CBFS @ 21000 size 3d4000

 4971 20:09:47.600777  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 4972 20:09:47.600876  CBFS: Locating 'fallback/ramstage'

 4973 20:09:47.600975  CBFS: Found @ offset 10d40 size d563

 4974 20:09:47.601073  read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps

 4975 20:09:47.601173  Accumulated console time in romstage 12842 ms

 4976 20:09:47.601287  

 4977 20:09:47.601388  

 4978 20:09:47.601488  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...

 4979 20:09:47.601589  ARM64: Exception handlers installed.

 4980 20:09:47.601688  ARM64: Testing exception

 4981 20:09:47.601786  ARM64: Done test exception

 4982 20:09:47.601884  FMAP: area RO_VPD found @ 3f8000 (32768 bytes)

 4983 20:09:47.601983  Manufacturer: ef

 4984 20:09:47.602081  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

 4985 20:09:47.602180  WARNING: RO_VPD is uninitialized or empty.

 4986 20:09:47.602280  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 4987 20:09:47.602380  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 4988 20:09:47.602501  read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps

 4989 20:09:47.602604  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

 4990 20:09:47.602704  BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0

 4991 20:09:47.602804  Enumerating buses...

 4992 20:09:47.602902  Show all devs... Before device enumeration.

 4993 20:09:47.603000  Root Device: enabled 1

 4994 20:09:47.603099  CPU_CLUSTER: 0: enabled 1

 4995 20:09:47.603197  CPU: 00: enabled 1

 4996 20:09:47.603295  Compare with tree...

 4997 20:09:47.603393  Root Device: enabled 1

 4998 20:09:47.603491   CPU_CLUSTER: 0: enabled 1

 4999 20:09:47.603590    CPU: 00: enabled 1

 5000 20:09:47.603688  Root Device scanning...

 5001 20:09:47.603786  root_dev_scan_bus for Root Device

 5002 20:09:47.603883  CPU_CLUSTER: 0 enabled

 5003 20:09:47.603982  root_dev_scan_bus for Root Device done

 5004 20:09:47.604081  scan_bus: scanning of bus Root Device took 10690 usecs

 5005 20:09:47.604178  done

 5006 20:09:47.604275  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0

 5007 20:09:47.604373  Allocating resources...

 5008 20:09:47.604471  Reading resources...

 5009 20:09:47.604569  Root Device read_resources bus 0 link: 0

 5010 20:09:47.604668  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 5011 20:09:47.604765  CPU: 00 missing read_resources

 5012 20:09:47.604863  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 5013 20:09:47.604961  Root Device read_resources bus 0 link: 0 done

 5014 20:09:47.605059  Done reading resources.

 5015 20:09:47.605173  Show resources in subtree (Root Device)...After reading.

 5016 20:09:47.605314   Root Device child on link 0 CPU_CLUSTER: 0

 5017 20:09:47.605494    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5018 20:09:47.605616    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5019 20:09:47.605733     CPU: 00

 5020 20:09:47.605848  Setting resources...

 5021 20:09:47.605962  Root Device assign_resources, bus 0 link: 0

 5022 20:09:47.606076  CPU_CLUSTER: 0 missing set_resources

 5023 20:09:47.606188  Root Device assign_resources, bus 0 link: 0

 5024 20:09:47.606301  Done setting resources.

 5025 20:09:47.606413  Show resources in subtree (Root Device)...After assigning values.

 5026 20:09:47.606527   Root Device child on link 0 CPU_CLUSTER: 0

 5027 20:09:47.606640    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5028 20:09:47.606754    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5029 20:09:47.606868     CPU: 00

 5030 20:09:47.606980  Done allocating resources.

 5031 20:09:47.607094  BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0

 5032 20:09:47.607206  Enabling resources...

 5033 20:09:47.607318  done.

 5034 20:09:47.607430  BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0

 5035 20:09:47.607542  Initializing devices...

 5036 20:09:47.607653  Root Device init ...

 5037 20:09:47.607765  mainboard_init: Starting display init.

 5038 20:09:47.607876  ADC[4]: Raw value=76494 ID=0

 5039 20:09:47.607989  anx7625_power_on_init: Init interface.

 5040 20:09:47.608102  anx7625_disable_pd_protocol: Disabled PD feature.

 5041 20:09:47.608214  anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.

 5042 20:09:47.608579  anx7625_start_dp_work: Secure OCM version=00

 5043 20:09:47.608706  anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91

 5044 20:09:47.608821  sp_tx_get_edid_block: EDID Block = 1

 5045 20:09:47.608934  Extracted contents:

 5046 20:09:47.609047  header:          00 ff ff ff ff ff ff 00

 5047 20:09:47.609160  serial number:   06 af 5c 14 00 00 00 00 00 1a

 5048 20:09:47.609286  version:         01 04

 5049 20:09:47.609402  basic params:    95 1a 0e 78 02

 5050 20:09:47.609515  chroma info:     99 85 95 55 56 92 28 22 50 54

 5051 20:09:47.609627  established:     00 00 00

 5052 20:09:47.609739  standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01

 5053 20:09:47.609852  descriptor 1:    ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18

 5054 20:09:47.609965  descriptor 2:    00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20

 5055 20:09:47.610078  descriptor 3:    00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20

 5056 20:09:47.610190  descriptor 4:    00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a

 5057 20:09:47.610302  extensions:      00

 5058 20:09:47.610414  checksum:        ae

 5059 20:09:47.610525  

 5060 20:09:47.610637  Manufacturer: AUO Model 145c Serial Number 0

 5061 20:09:47.610748  Made week 0 of 2016

 5062 20:09:47.610859  EDID version: 1.4

 5063 20:09:47.610973  Digital display

 5064 20:09:47.611086  6 bits per primary color channel

 5065 20:09:47.611202  DisplayPort interface

 5066 20:09:47.611315  Maximum image size: 26 cm x 14 cm

 5067 20:09:47.611430  Gamma: 220%

 5068 20:09:47.611542  Check DPMS levels

 5069 20:09:47.611656  Supported color formats: RGB 4:4:4

 5070 20:09:47.611770  First detailed timing is preferred timing

 5071 20:09:47.611884  Established timings supported:

 5072 20:09:47.611997  Standard timings supported:

 5073 20:09:47.612110  Detailed timings

 5074 20:09:47.612259  Hex of detail: ce1d56ea50001a3030204600009010000018

 5075 20:09:47.612377  Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm

 5076 20:09:47.612493                 0556 0586 05a6 0640 hborder 0

 5077 20:09:47.612607                 0300 0304 030a 031a vborder 0

 5078 20:09:47.612721                 -hsync -vsync 

 5079 20:09:47.612835  Did detailed timing

 5080 20:09:47.612948  Hex of detail: 0000000f0000000000000000000000000020

 5081 20:09:47.613064  Manufacturer-specified data, tag 15

 5082 20:09:47.613177  Hex of detail: 000000fe0041554f0a202020202020202020

 5083 20:09:47.613305  ASCII string: AUO

 5084 20:09:47.613422  Hex of detail: 000000fe004231313658414230312e34200a

 5085 20:09:47.613536  ASCII string: B116XAB01.4 

 5086 20:09:47.613650  Checksum

 5087 20:09:47.613762  Checksum: 0xae (valid)

 5088 20:09:47.613876  get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz

 5089 20:09:47.613990  DSI data_rate: 457800000 bps

 5090 20:09:47.614104  anx7625_parse_edid: set default k value to 0x3d for panel

 5091 20:09:47.614218  anx7625_parse_edid: pixelclock(76300).

 5092 20:09:47.614330   hactive(1366), hsync(32), hfp(48), hbp(154)

 5093 20:09:47.614444   vactive(768), vsync(6), vfp(4), vbp(16)

 5094 20:09:47.614558  anx7625_dsi_config: config dsi.

 5095 20:09:47.614670  anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).

 5096 20:09:47.614792  anx7625_dsi_config: success to config DSI

 5097 20:09:47.615009  anx7625_dp_start: MIPI phy setup OK.

 5098 20:09:47.615136  [SSUSB] Setting up USB HOST controller...

 5099 20:09:47.615253  [SSUSB] u3phy_ports_enable u2p:1, u3p:0

 5100 20:09:47.615367  [SSUSB] phy power-on done.

 5101 20:09:47.615481  out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00 

 5102 20:09:47.615596  in-header: 03 fc 01 00 00 00 00 00 

 5103 20:09:47.615711  in-data: 

 5104 20:09:47.615825  handle_proto3_response: EC response with error code: 1

 5105 20:09:47.615940  SPM: pcm index = 1

 5106 20:09:47.616053  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5107 20:09:47.616166  CBFS @ 21000 size 3d4000

 5108 20:09:47.616280  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5109 20:09:47.616394  CBFS: Locating 'pcm_allinone_lp4_3200.bin'

 5110 20:09:47.616508  CBFS: Found @ offset 1e7c0 size 1026

 5111 20:09:47.616621  read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps

 5112 20:09:47.616735  SPM: binary array size = 2988

 5113 20:09:47.616849  SPM: version = pcm_allinone_v1.17.2_20180829

 5114 20:09:47.616962  SPM binary loaded in 32 msecs

 5115 20:09:47.617073  spm_kick_im_to_fetch: ptr = 000000004021eec2

 5116 20:09:47.617186  spm_kick_im_to_fetch: len = 2988

 5117 20:09:47.617312  SPM: spm_kick_pcm_to_run

 5118 20:09:47.617429  SPM: spm_kick_pcm_to_run done

 5119 20:09:47.617541  SPM: spm_init done in 52 msecs

 5120 20:09:47.617654  Root Device init finished in 494994 usecs

 5121 20:09:47.617768  CPU_CLUSTER: 0 init ...

 5122 20:09:47.617881  Mapping address range [0000000000200000:0000000000280000) as     cacheable | read-write |     secure | device

 5123 20:09:47.617998  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5124 20:09:47.618112  CBFS @ 21000 size 3d4000

 5125 20:09:47.618225  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5126 20:09:47.618340  CBFS: Locating 'sspm.bin'

 5127 20:09:47.618454  CBFS: Found @ offset 208c0 size 41cb

 5128 20:09:47.618566  read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps

 5129 20:09:47.618681  CPU_CLUSTER: 0 init finished in 42801 usecs

 5130 20:09:47.618794  Devices initialized

 5131 20:09:47.618907  Show all devs... After init.

 5132 20:09:47.619021  Root Device: enabled 1

 5133 20:09:47.619134  CPU_CLUSTER: 0: enabled 1

 5134 20:09:47.619263  CPU: 00: enabled 1

 5135 20:09:47.619384  BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0

 5136 20:09:47.619499  FMAP: area RW_ELOG found @ 558000 (4096 bytes)

 5137 20:09:47.619614  ELOG: NV offset 0x558000 size 0x1000

 5138 20:09:47.619728  read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps

 5139 20:09:47.619842  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 5140 20:09:47.619955  ELOG: Event(17) added with size 13 at 2024-05-28 20:09:47 UTC

 5141 20:09:47.620098  out: cmd=0x121: 03 db 21 01 00 00 00 00 

 5142 20:09:47.620219  in-header: 03 01 00 00 2c 00 00 00 

 5143 20:09:47.627610  in-data: 2f 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 bd 42 01 00 06 80 00 00 75 56 02 00 06 80 00 00 87 7d 04 00 06 80 00 00 e4 71 05 00 

 5144 20:09:47.630995  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

 5145 20:09:47.633862  in-header: 03 19 00 00 08 00 00 00 

 5146 20:09:47.637438  in-data: a2 e0 47 00 13 00 00 00 

 5147 20:09:47.640595  Chrome EC: UHEPI supported

 5148 20:09:47.646894  out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00 

 5149 20:09:47.650683  in-header: 03 e1 00 00 08 00 00 00 

 5150 20:09:47.654349  in-data: 84 20 60 10 00 00 00 00 

 5151 20:09:47.657327  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

 5152 20:09:47.664136  out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00 

 5153 20:09:47.667728  in-header: 03 e1 00 00 08 00 00 00 

 5154 20:09:47.670731  in-data: 84 20 60 10 00 00 00 00 

 5155 20:09:47.677362  ELOG: Event(A1) added with size 10 at 2024-05-28 20:09:47 UTC

 5156 20:09:47.683770  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 5157 20:09:47.686726  ELOG: Event(A0) added with size 9 at 2024-05-28 20:09:47 UTC

 5158 20:09:47.694009  elog_add_boot_reason: Logged dev mode boot

 5159 20:09:47.694434  Finalize devices...

 5160 20:09:47.697085  Devices finalized

 5161 20:09:47.700237  BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0

 5162 20:09:47.703503  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 5163 20:09:47.710357  ELOG: Event(91) added with size 10 at 2024-05-28 20:09:47 UTC

 5164 20:09:47.713414  Writing coreboot table at 0xffeda000

 5165 20:09:47.716947   0. 0000000000114000-000000000011efff: RAMSTAGE

 5166 20:09:47.723328   1. 0000000040000000-000000004023cfff: RAMSTAGE

 5167 20:09:47.726750   2. 000000004023d000-00000000545fffff: RAM

 5168 20:09:47.729783   3. 0000000054600000-000000005465ffff: BL31

 5169 20:09:47.733040   4. 0000000054660000-00000000ffed9fff: RAM

 5170 20:09:47.739600   5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES

 5171 20:09:47.743369   6. 0000000100000000-000000013fffffff: RAM

 5172 20:09:47.747067  Passing 5 GPIOs to payload:

 5173 20:09:47.750243              NAME |       PORT | POLARITY |     VALUE

 5174 20:09:47.753046     write protect | 0x00000096 |      low |      high

 5175 20:09:47.759904          EC in RW | 0x000000b1 |     high | undefined

 5176 20:09:47.763593      EC interrupt | 0x00000097 |      low | undefined

 5177 20:09:47.769955     TPM interrupt | 0x00000099 |     high | undefined

 5178 20:09:47.773074    speaker enable | 0x000000af |     high | undefined

 5179 20:09:47.776466  out: cmd=0x6: 03 f7 06 00 00 00 00 00 

 5180 20:09:47.780402  in-header: 03 f7 00 00 02 00 00 00 

 5181 20:09:47.783162  in-data: 04 00 

 5182 20:09:47.783585  Board ID: 4

 5183 20:09:47.786567  ADC[3]: Raw value=1035341 ID=8

 5184 20:09:47.786989  RAM code: 8

 5185 20:09:47.787322  SKU ID: 16

 5186 20:09:47.792723  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5187 20:09:47.793152  CBFS @ 21000 size 3d4000

 5188 20:09:47.800139  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5189 20:09:47.806119  Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum ad5f

 5190 20:09:47.809625  coreboot table: 940 bytes.

 5191 20:09:47.813172  IMD ROOT    0. 00000000fffff000 00001000

 5192 20:09:47.816289  IMD SMALL   1. 00000000ffffe000 00001000

 5193 20:09:47.819451  CONSOLE     2. 00000000fffde000 00020000

 5194 20:09:47.823146  FMAP        3. 00000000fffdd000 0000047c

 5195 20:09:47.826342  TIME STAMP  4. 00000000fffdc000 00000910

 5196 20:09:47.829920  RAMOOPS     5. 00000000ffedc000 00100000

 5197 20:09:47.832957  COREBOOT    6. 00000000ffeda000 00002000

 5198 20:09:47.836680  IMD small region:

 5199 20:09:47.840078    IMD ROOT    0. 00000000ffffec00 00000400

 5200 20:09:47.842780    VBOOT WORK  1. 00000000ffffeb00 00000100

 5201 20:09:47.846141    EC HOSTEVENT 2. 00000000ffffeae0 00000008

 5202 20:09:47.849345    VPD         3. 00000000ffffea60 0000006c

 5203 20:09:47.855995  BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0

 5204 20:09:47.862751  out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00 

 5205 20:09:47.866718  in-header: 03 e1 00 00 08 00 00 00 

 5206 20:09:47.869648  in-data: 84 20 60 10 00 00 00 00 

 5207 20:09:47.872849  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5208 20:09:47.876244  CBFS @ 21000 size 3d4000

 5209 20:09:47.879619  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5210 20:09:47.883160  CBFS: Locating 'fallback/payload'

 5211 20:09:47.891416  CBFS: Found @ offset dc040 size 439a0

 5212 20:09:47.978613  read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps

 5213 20:09:47.982576  Checking segment from ROM address 0x0000000040003a00

 5214 20:09:47.988728  Checking segment from ROM address 0x0000000040003a1c

 5215 20:09:47.992593  Loading segment from ROM address 0x0000000040003a00

 5216 20:09:47.995427    code (compression=0)

 5217 20:09:48.005553    New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968

 5218 20:09:48.012733  Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968

 5219 20:09:48.015517  it's not compressed!

 5220 20:09:48.018681  [ 0x80000000, 80043968, 0x811994a0) <- 40003a38

 5221 20:09:48.025487  Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38

 5222 20:09:48.033473  Loading segment from ROM address 0x0000000040003a1c

 5223 20:09:48.037056    Entry Point 0x0000000080000000

 5224 20:09:48.037479  Loaded segments

 5225 20:09:48.043940  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0

 5226 20:09:48.047004  Jumping to boot code at 0000000080000000(00000000ffeda000)

 5227 20:09:48.056603  CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes

 5228 20:09:48.060444  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5229 20:09:48.063528  CBFS @ 21000 size 3d4000

 5230 20:09:48.070605  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5231 20:09:48.071136  CBFS: Locating 'fallback/bl31'

 5232 20:09:48.073961  CBFS: Found @ offset 36dc0 size 5820

 5233 20:09:48.087640  read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps

 5234 20:09:48.090475  Checking segment from ROM address 0x0000000040003a00

 5235 20:09:48.097362  Checking segment from ROM address 0x0000000040003a1c

 5236 20:09:48.100836  Loading segment from ROM address 0x0000000040003a00

 5237 20:09:48.103834    code (compression=1)

 5238 20:09:48.110801    New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8

 5239 20:09:48.120851  Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8

 5240 20:09:48.121444  using LZMA

 5241 20:09:48.129806  [ 0x54600000, 5460f420, 0x54629000) <- 40003a38

 5242 20:09:48.135889  Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0

 5243 20:09:48.139172  Loading segment from ROM address 0x0000000040003a1c

 5244 20:09:48.142596    Entry Point 0x0000000054601000

 5245 20:09:48.143035  Loaded segments

 5246 20:09:48.145928  NOTICE:  MT8183 bl31_setup

 5247 20:09:48.153058  NOTICE:  BL31: v2.1(debug):v2.1-806-g3addeb68c

 5248 20:09:48.156603  NOTICE:  BL31: Built : Sun Jan 30 03:25:20 UTC 2022

 5249 20:09:48.160253  INFO:    [DEVAPC] dump DEVAPC registers:

 5250 20:09:48.169405  INFO:    [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0

 5251 20:09:48.176404  INFO:    [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0

 5252 20:09:48.186409  INFO:    [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0

 5253 20:09:48.192870  INFO:    [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0

 5254 20:09:48.202600  INFO:    [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0

 5255 20:09:48.209827  INFO:    [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0

 5256 20:09:48.219586  INFO:    [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0

 5257 20:09:48.226667  INFO:    [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0

 5258 20:09:48.232969  INFO:    [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0

 5259 20:09:48.243168  INFO:    [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0

 5260 20:09:48.249703  INFO:    [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0

 5261 20:09:48.259519  INFO:    [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0

 5262 20:09:48.266200  INFO:    [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0

 5263 20:09:48.272687  INFO:    [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0

 5264 20:09:48.282603  INFO:    [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0

 5265 20:09:48.289688  INFO:    [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0

 5266 20:09:48.295906  INFO:    [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0

 5267 20:09:48.302401  INFO:    [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0

 5268 20:09:48.312677  INFO:    [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0

 5269 20:09:48.319171  INFO:    [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0

 5270 20:09:48.326242  INFO:    [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0

 5271 20:09:48.332622  INFO:    [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0

 5272 20:09:48.336247  INFO:    [DEVAPC] MAS_DOM_0 = 0x1

 5273 20:09:48.339849  INFO:    [DEVAPC] MAS_DOM_1 = 0x200

 5274 20:09:48.342604  INFO:    [DEVAPC] MAS_DOM_2 = 0x0

 5275 20:09:48.345469  INFO:    [DEVAPC] MAS_DOM_3 = 0x2000

 5276 20:09:48.348899  INFO:    [DEVAPC] MAS_SEC_0 = 0x8000000

 5277 20:09:48.355838  INFO:    [DEVAPC]  (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0

 5278 20:09:48.358913  INFO:    [DEVAPC]  (MM)MAS_DOMAIN_REMAP_0 = 0x24

 5279 20:09:48.362301  WARNING: region 0:

 5280 20:09:48.365917  WARNING: 	apc:0x168, sa:0x0, ea:0xfff

 5281 20:09:48.369447  WARNING: region 1:

 5282 20:09:48.372320  WARNING: 	apc:0x140, sa:0x1000, ea:0x128f

 5283 20:09:48.372853  WARNING: region 2:

 5284 20:09:48.375492  WARNING: 	apc:0x168, sa:0x1290, ea:0x1fff

 5285 20:09:48.379765  WARNING: region 3:

 5286 20:09:48.382434  WARNING: 	apc:0x168, sa:0x2000, ea:0xbfff

 5287 20:09:48.383053  WARNING: region 4:

 5288 20:09:48.388848  WARNING: 	apc:0x168, sa:0xc000, ea:0x1ffff

 5289 20:09:48.388931  WARNING: region 5:

 5290 20:09:48.392119  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5291 20:09:48.395075  WARNING: region 6:

 5292 20:09:48.395178  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5293 20:09:48.398697  WARNING: region 7:

 5294 20:09:48.402334  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5295 20:09:48.408556  INFO:    GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3

 5296 20:09:48.412256  INFO:    SPM: enable SPMC mode

 5297 20:09:48.415491  NOTICE:  spm_boot_init() start

 5298 20:09:48.419115  NOTICE:  spm_boot_init() end

 5299 20:09:48.421858  INFO:    BL31: Initializing runtime services

 5300 20:09:48.425339  INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied

 5301 20:09:48.432170  INFO:    BL31: Preparing for EL3 exit to normal world

 5302 20:09:48.435491  INFO:    Entry point address = 0x80000000

 5303 20:09:48.438425  INFO:    SPSR = 0x8

 5304 20:09:48.459574  

 5305 20:09:48.460096  

 5306 20:09:48.460436  

 5307 20:09:48.462032  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 5308 20:09:48.462833  start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
 5309 20:09:48.463519  Setting prompt string to ['jacuzzi:']
 5310 20:09:48.464111  bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
 5311 20:09:48.465230  Starting depthcharge on Juniper...

 5312 20:09:48.465891  

 5313 20:09:48.466439  vboot_handoff: creating legacy vboot_handoff structure

 5314 20:09:48.466899  

 5315 20:09:48.469580  ec_init(0): CrosEC protocol v3 supported (544, 544)

 5316 20:09:48.470003  

 5317 20:09:48.472948  Wipe memory regions:

 5318 20:09:48.473395  

 5319 20:09:48.476385  	[0x00000040000000, 0x00000054600000)

 5320 20:09:48.518945  

 5321 20:09:48.519457  	[0x00000054660000, 0x00000080000000)

 5322 20:09:48.610612  

 5323 20:09:48.611138  	[0x000000811994a0, 0x000000ffeda000)

 5324 20:09:48.870411  

 5325 20:09:48.870985  	[0x00000100000000, 0x00000140000000)

 5326 20:09:49.002749  

 5327 20:09:49.005885  Initializing XHCI USB controller at 0x11200000.

 5328 20:09:49.028918  

 5329 20:09:49.032593  [firmware-jacuzzi-12573.B-collabora] Jun  8 2022 08:18:54

 5330 20:09:49.032815  

 5331 20:09:49.032935  


 5332 20:09:49.033326  Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5334 20:09:49.134120  jacuzzi: tftpboot 192.168.201.1 14063044/tftp-deploy-jrug4lml/kernel/image.itb 14063044/tftp-deploy-jrug4lml/kernel/cmdline 

 5335 20:09:49.134750  Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5336 20:09:49.135171  bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:25)
 5337 20:09:49.139743  tftpboot 192.168.201.1 14063044/tftp-deploy-jrug4lml/kernel/image.ittp-deploy-jrug4lml/kernel/cmdline 

 5338 20:09:49.140208  

 5339 20:09:49.140651  Waiting for link

 5340 20:09:49.543537  

 5341 20:09:49.544046  R8152: Initializing

 5342 20:09:49.544497  

 5343 20:09:49.546720  Version 9 (ocp_data = 6010)

 5344 20:09:49.547238  

 5345 20:09:49.549800  R8152: Done initializing

 5346 20:09:49.550221  

 5347 20:09:49.550552  Adding net device

 5348 20:09:49.935161  

 5349 20:09:49.935670  done.

 5350 20:09:49.936030  

 5351 20:09:49.936405  MAC: 00:e0:4c:71:a7:1f

 5352 20:09:49.936761  

 5353 20:09:49.938033  Sending DHCP discover... done.

 5354 20:09:49.938493  

 5355 20:09:49.941760  Waiting for reply... done.

 5356 20:09:49.942311  

 5357 20:09:49.944989  Sending DHCP request... done.

 5358 20:09:49.945526  

 5359 20:09:49.945987  Waiting for reply... done.

 5360 20:09:49.946434  

 5361 20:09:49.948429  My ip is 192.168.201.23

 5362 20:09:49.948850  

 5363 20:09:49.951702  The DHCP server ip is 192.168.201.1

 5364 20:09:49.952072  

 5365 20:09:49.954907  TFTP server IP predefined by user: 192.168.201.1

 5366 20:09:49.955333  

 5367 20:09:49.961844  Bootfile predefined by user: 14063044/tftp-deploy-jrug4lml/kernel/image.itb

 5368 20:09:49.962365  

 5369 20:09:49.964818  Sending tftp read request... done.

 5370 20:09:49.965237  

 5371 20:09:49.973158  Waiting for the transfer... 

 5372 20:09:49.973746  

 5373 20:09:50.247578  00000000 ################################################################

 5374 20:09:50.247724  

 5375 20:09:50.506489  00080000 ################################################################

 5376 20:09:50.506640  

 5377 20:09:50.764911  00100000 ################################################################

 5378 20:09:50.765056  

 5379 20:09:51.023706  00180000 ################################################################

 5380 20:09:51.023862  

 5381 20:09:51.278395  00200000 ################################################################

 5382 20:09:51.278546  

 5383 20:09:51.535948  00280000 ################################################################

 5384 20:09:51.536121  

 5385 20:09:51.816869  00300000 ################################################################

 5386 20:09:51.817051  

 5387 20:09:52.064902  00380000 ################################################################

 5388 20:09:52.065079  

 5389 20:09:52.313965  00400000 ################################################################

 5390 20:09:52.314140  

 5391 20:09:52.559470  00480000 ################################################################

 5392 20:09:52.559621  

 5393 20:09:52.811591  00500000 ################################################################

 5394 20:09:52.811766  

 5395 20:09:53.070877  00580000 ################################################################

 5396 20:09:53.071031  

 5397 20:09:53.328049  00600000 ################################################################

 5398 20:09:53.328203  

 5399 20:09:53.590981  00680000 ################################################################

 5400 20:09:53.591128  

 5401 20:09:53.839695  00700000 ################################################################

 5402 20:09:53.839871  

 5403 20:09:54.088584  00780000 ################################################################

 5404 20:09:54.088764  

 5405 20:09:54.334809  00800000 ################################################################

 5406 20:09:54.334957  

 5407 20:09:54.580549  00880000 ################################################################

 5408 20:09:54.580697  

 5409 20:09:54.839061  00900000 ################################################################

 5410 20:09:54.839201  

 5411 20:09:55.098480  00980000 ################################################################

 5412 20:09:55.098623  

 5413 20:09:55.358817  00a00000 ################################################################

 5414 20:09:55.358962  

 5415 20:09:55.620367  00a80000 ################################################################

 5416 20:09:55.620509  

 5417 20:09:55.893665  00b00000 ################################################################

 5418 20:09:55.893811  

 5419 20:09:56.176717  00b80000 ################################################################

 5420 20:09:56.176864  

 5421 20:09:56.480116  00c00000 ################################################################

 5422 20:09:56.480249  

 5423 20:09:56.744354  00c80000 ################################################################

 5424 20:09:56.744497  

 5425 20:09:56.999813  00d00000 ################################################################

 5426 20:09:56.999958  

 5427 20:09:57.253140  00d80000 ################################################################

 5428 20:09:57.253314  

 5429 20:09:57.502576  00e00000 ################################################################

 5430 20:09:57.502723  

 5431 20:09:57.748275  00e80000 ################################################################

 5432 20:09:57.748441  

 5433 20:09:58.006640  00f00000 ################################################################

 5434 20:09:58.006781  

 5435 20:09:58.272861  00f80000 ################################################################

 5436 20:09:58.273012  

 5437 20:09:58.517605  01000000 ################################################################

 5438 20:09:58.517754  

 5439 20:09:58.771990  01080000 ################################################################

 5440 20:09:58.772143  

 5441 20:09:59.026118  01100000 ################################################################

 5442 20:09:59.026264  

 5443 20:09:59.296711  01180000 ################################################################

 5444 20:09:59.296861  

 5445 20:09:59.548886  01200000 ################################################################

 5446 20:09:59.549032  

 5447 20:09:59.816196  01280000 ################################################################

 5448 20:09:59.816342  

 5449 20:10:00.064821  01300000 ################################################################

 5450 20:10:00.065004  

 5451 20:10:00.313351  01380000 ################################################################

 5452 20:10:00.313505  

 5453 20:10:00.565125  01400000 ################################################################

 5454 20:10:00.565313  

 5455 20:10:00.821245  01480000 ################################################################

 5456 20:10:00.821435  

 5457 20:10:01.094298  01500000 ################################################################

 5458 20:10:01.094438  

 5459 20:10:01.363498  01580000 ################################################################

 5460 20:10:01.363646  

 5461 20:10:01.621886  01600000 ################################################################

 5462 20:10:01.622035  

 5463 20:10:01.866214  01680000 ################################################################

 5464 20:10:01.866360  

 5465 20:10:02.128954  01700000 ################################################################

 5466 20:10:02.129101  

 5467 20:10:02.381419  01780000 ################################################################

 5468 20:10:02.381571  

 5469 20:10:02.637822  01800000 ################################################################

 5470 20:10:02.637973  

 5471 20:10:02.890417  01880000 ################################################################

 5472 20:10:02.890563  

 5473 20:10:03.150315  01900000 ################################################################

 5474 20:10:03.150464  

 5475 20:10:03.399644  01980000 ################################################################

 5476 20:10:03.399790  

 5477 20:10:03.648882  01a00000 ################################################################

 5478 20:10:03.649030  

 5479 20:10:03.898141  01a80000 ################################################################

 5480 20:10:03.898291  

 5481 20:10:04.144697  01b00000 ################################################################

 5482 20:10:04.144847  

 5483 20:10:04.390235  01b80000 ################################################################

 5484 20:10:04.390383  

 5485 20:10:04.636322  01c00000 ################################################################

 5486 20:10:04.636474  

 5487 20:10:04.884070  01c80000 ################################################################

 5488 20:10:04.884217  

 5489 20:10:05.139283  01d00000 ################################################################

 5490 20:10:05.139423  

 5491 20:10:05.390126  01d80000 ################################################################

 5492 20:10:05.390269  

 5493 20:10:05.677858  01e00000 ################################################################

 5494 20:10:05.678004  

 5495 20:10:05.974937  01e80000 ################################################################

 5496 20:10:05.975080  

 5497 20:10:06.267684  01f00000 ################################################################

 5498 20:10:06.267834  

 5499 20:10:06.548533  01f80000 ################################################################

 5500 20:10:06.548671  

 5501 20:10:06.815068  02000000 ################################################################

 5502 20:10:06.815218  

 5503 20:10:07.073180  02080000 ################################################################

 5504 20:10:07.073334  

 5505 20:10:07.342103  02100000 ################################################################

 5506 20:10:07.342240  

 5507 20:10:07.621073  02180000 ################################################################

 5508 20:10:07.621220  

 5509 20:10:07.893119  02200000 ################################################################

 5510 20:10:07.893309  

 5511 20:10:08.182851  02280000 ################################################################

 5512 20:10:08.182998  

 5513 20:10:08.464370  02300000 ################################################################

 5514 20:10:08.464515  

 5515 20:10:08.749982  02380000 ################################################################

 5516 20:10:08.750162  

 5517 20:10:09.013791  02400000 ################################################################

 5518 20:10:09.013942  

 5519 20:10:09.284549  02480000 ################################################################

 5520 20:10:09.284693  

 5521 20:10:09.546830  02500000 ################################################################

 5522 20:10:09.546976  

 5523 20:10:09.802192  02580000 ################################################################

 5524 20:10:09.802343  

 5525 20:10:10.069086  02600000 ################################################################

 5526 20:10:10.069231  

 5527 20:10:10.338221  02680000 ################################################################

 5528 20:10:10.338368  

 5529 20:10:10.605244  02700000 ################################################################

 5530 20:10:10.605436  

 5531 20:10:10.887130  02780000 ################################################################

 5532 20:10:10.887279  

 5533 20:10:11.167771  02800000 ################################################################

 5534 20:10:11.167922  

 5535 20:10:11.444492  02880000 ################################################################

 5536 20:10:11.444646  

 5537 20:10:11.698751  02900000 ################################################################

 5538 20:10:11.698902  

 5539 20:10:11.952418  02980000 ################################################################

 5540 20:10:11.952564  

 5541 20:10:12.218511  02a00000 ################################################################

 5542 20:10:12.218655  

 5543 20:10:12.493129  02a80000 ################################################################

 5544 20:10:12.493330  

 5545 20:10:12.763232  02b00000 ################################################################

 5546 20:10:12.763406  

 5547 20:10:13.018382  02b80000 ################################################################

 5548 20:10:13.018537  

 5549 20:10:13.273759  02c00000 ################################################################

 5550 20:10:13.273905  

 5551 20:10:13.546373  02c80000 ################################################################

 5552 20:10:13.546544  

 5553 20:10:13.817393  02d00000 ################################################################

 5554 20:10:13.817564  

 5555 20:10:14.093781  02d80000 ################################################################

 5556 20:10:14.093952  

 5557 20:10:14.368486  02e00000 ################################################################

 5558 20:10:14.368635  

 5559 20:10:14.645050  02e80000 ################################################################

 5560 20:10:14.645218  

 5561 20:10:14.903261  02f00000 ################################################################

 5562 20:10:14.903409  

 5563 20:10:15.176061  02f80000 ################################################################

 5564 20:10:15.176237  

 5565 20:10:15.460705  03000000 ################################################################

 5566 20:10:15.460855  

 5567 20:10:15.742520  03080000 ################################################################

 5568 20:10:15.742670  

 5569 20:10:16.013000  03100000 ################################################################

 5570 20:10:16.013170  

 5571 20:10:16.294243  03180000 ################################################################

 5572 20:10:16.294397  

 5573 20:10:16.572067  03200000 ################################################################

 5574 20:10:16.572210  

 5575 20:10:16.863322  03280000 ################################################################

 5576 20:10:16.863472  

 5577 20:10:17.165534  03300000 ################################################################

 5578 20:10:17.165678  

 5579 20:10:17.462803  03380000 ################################################################

 5580 20:10:17.462953  

 5581 20:10:17.752759  03400000 ################################################################

 5582 20:10:17.752910  

 5583 20:10:18.046026  03480000 ################################################################

 5584 20:10:18.046163  

 5585 20:10:18.341360  03500000 ################################################################

 5586 20:10:18.341506  

 5587 20:10:18.628034  03580000 ################################################################

 5588 20:10:18.628201  

 5589 20:10:18.920938  03600000 ################################################################

 5590 20:10:18.921097  

 5591 20:10:19.223147  03680000 ################################################################

 5592 20:10:19.223292  

 5593 20:10:19.515474  03700000 ################################################################

 5594 20:10:19.515619  

 5595 20:10:19.803839  03780000 ################################################################

 5596 20:10:19.803992  

 5597 20:10:20.100558  03800000 ################################################################

 5598 20:10:20.100707  

 5599 20:10:20.404754  03880000 ################################################################

 5600 20:10:20.404904  

 5601 20:10:20.696743  03900000 ################################################################

 5602 20:10:20.696888  

 5603 20:10:20.992510  03980000 ################################################################

 5604 20:10:20.992658  

 5605 20:10:21.278474  03a00000 ################################################################

 5606 20:10:21.278618  

 5607 20:10:21.540145  03a80000 ################################################################

 5608 20:10:21.540292  

 5609 20:10:21.793234  03b00000 ################################################################

 5610 20:10:21.793398  

 5611 20:10:22.052815  03b80000 ################################################################

 5612 20:10:22.052963  

 5613 20:10:22.310900  03c00000 ################################################################

 5614 20:10:22.311041  

 5615 20:10:22.567909  03c80000 ################################################################

 5616 20:10:22.568058  

 5617 20:10:22.837957  03d00000 ################################################################

 5618 20:10:22.838101  

 5619 20:10:23.098419  03d80000 ################################################################

 5620 20:10:23.098565  

 5621 20:10:23.355455  03e00000 ################################################################

 5622 20:10:23.355592  

 5623 20:10:23.613930  03e80000 ################################################################

 5624 20:10:23.614072  

 5625 20:10:23.869315  03f00000 ################################################################

 5626 20:10:23.869457  

 5627 20:10:24.126658  03f80000 ################################################################

 5628 20:10:24.126803  

 5629 20:10:24.401474  04000000 ################################################################

 5630 20:10:24.401620  

 5631 20:10:24.677699  04080000 ################################################################

 5632 20:10:24.677853  

 5633 20:10:24.949734  04100000 ################################################################

 5634 20:10:24.949892  

 5635 20:10:25.241406  04180000 ################################################################

 5636 20:10:25.241577  

 5637 20:10:25.531471  04200000 ################################################################

 5638 20:10:25.531642  

 5639 20:10:25.809482  04280000 ################################################################

 5640 20:10:25.809628  

 5641 20:10:26.085384  04300000 ################################################################

 5642 20:10:26.085533  

 5643 20:10:26.357834  04380000 ################################################################

 5644 20:10:26.357987  

 5645 20:10:26.628741  04400000 ################################################################

 5646 20:10:26.628886  

 5647 20:10:26.885510  04480000 ################################################################

 5648 20:10:26.885653  

 5649 20:10:27.144339  04500000 ################################################################

 5650 20:10:27.144505  

 5651 20:10:27.401020  04580000 ################################################################

 5652 20:10:27.401170  

 5653 20:10:27.668018  04600000 ################################################################

 5654 20:10:27.668167  

 5655 20:10:27.759931  04680000 ####################### done.

 5656 20:10:27.760083  

 5657 20:10:27.763000  The bootfile was 74111722 bytes long.

 5658 20:10:27.763105  

 5659 20:10:27.766398  Sending tftp read request... done.

 5660 20:10:27.766484  

 5661 20:10:27.766568  Waiting for the transfer... 

 5662 20:10:27.766649  

 5663 20:10:27.769520  00000000 # done.

 5664 20:10:27.769626  

 5665 20:10:27.776395  Command line loaded dynamically from TFTP file: 14063044/tftp-deploy-jrug4lml/kernel/cmdline

 5666 20:10:27.776481  

 5667 20:10:27.793225  The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 5668 20:10:27.793358  

 5669 20:10:27.796324  Loading FIT.

 5670 20:10:27.796414  

 5671 20:10:27.800062  Image ramdisk-1 has 60990676 bytes.

 5672 20:10:27.800242  

 5673 20:10:27.800366  Image fdt-1 has 57695 bytes.

 5674 20:10:27.802942  

 5675 20:10:27.803069  Image kernel-1 has 13061303 bytes.

 5676 20:10:27.803153  

 5677 20:10:27.813100  Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper

 5678 20:10:27.813248  

 5679 20:10:27.826538  Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183

 5680 20:10:27.826683  

 5681 20:10:27.830039  Choosing best match conf-1 for compat google,juniper-sku16.

 5682 20:10:27.834695  

 5683 20:10:27.839507  Connected to device vid:did:rid of 1ae0:0028:00

 5684 20:10:27.847687  

 5685 20:10:27.851226  tpm_get_response: command 0x17b, return code 0x0

 5686 20:10:27.851630  

 5687 20:10:27.854534  tpm_cleanup: add release locality here.

 5688 20:10:27.854938  

 5689 20:10:27.857869  Shutting down all USB controllers.

 5690 20:10:27.858387  

 5691 20:10:27.861464  Removing current net device

 5692 20:10:27.862024  

 5693 20:10:27.864740  Exiting depthcharge with code 4 at timestamp: 55803606

 5694 20:10:27.865299  

 5695 20:10:27.868245  LZMA decompressing kernel-1 to 0x80193568

 5696 20:10:27.868693  

 5697 20:10:27.871178  LZMA decompressing kernel-1 to 0x40000000

 5698 20:10:29.731340  

 5699 20:10:29.731858  jumping to kernel

 5700 20:10:29.735189  end: 2.2.4 bootloader-commands (duration 00:00:41) [common]
 5701 20:10:29.735864  start: 2.2.5 auto-login-action (timeout 00:03:44) [common]
 5702 20:10:29.736447  Setting prompt string to ['Linux version [0-9]']
 5703 20:10:29.736999  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5704 20:10:29.737605  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 5705 20:10:29.806454  

 5706 20:10:29.810146  [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]

 5707 20:10:29.813964  start: 2.2.5.1 login-action (timeout 00:03:44) [common]
 5708 20:10:29.814481  The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
 5709 20:10:29.814912  Setting prompt string to []
 5710 20:10:29.815412  Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
 5711 20:10:29.815941  Using line separator: #'\n'#
 5712 20:10:29.816325  No login prompt set.
 5713 20:10:29.816752  Parsing kernel messages
 5714 20:10:29.817240  ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
 5715 20:10:29.817916  [login-action] Waiting for messages, (timeout 00:03:44)
 5716 20:10:29.818346  Waiting using forced prompt support (timeout 00:01:52)
 5717 20:10:29.833056  [    0.000000] Linux version 6.1.91-cip21 (KernelCI@build-j208563-arm64-gcc-10-defconfig-arm64-chromebook-j5dkg) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue May 28 13:24:21 UTC 2024

 5718 20:10:29.836491  [    0.000000] random: crng init done

 5719 20:10:29.843280  [    0.000000] Machine model: Google juniper sku16 board

 5720 20:10:29.846157  [    0.000000] efi: UEFI not found.

 5721 20:10:29.852729  [    0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB

 5722 20:10:29.859431  [    0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool

 5723 20:10:29.869496  [    0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')

 5724 20:10:29.872966  [    0.000000] printk: bootconsole [mtk8250] enabled

 5725 20:10:29.881318  [    0.000000] NUMA: No NUMA configuration found

 5726 20:10:29.888422  [    0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]

 5727 20:10:29.895048  [    0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]

 5728 20:10:29.895636  [    0.000000] Zone ranges:

 5729 20:10:29.901865  [    0.000000]   DMA      [mem 0x0000000040000000-0x00000000ffffffff]

 5730 20:10:29.904847  [    0.000000]   DMA32    empty

 5731 20:10:29.911655  [    0.000000]   Normal   [mem 0x0000000100000000-0x000000013fffffff]

 5732 20:10:29.914565  [    0.000000] Movable zone start for each node

 5733 20:10:29.917834  [    0.000000] Early memory node ranges

 5734 20:10:29.924811  [    0.000000]   node   0: [mem 0x0000000040000000-0x000000004fffffff]

 5735 20:10:29.931509  [    0.000000]   node   0: [mem 0x0000000050000000-0x00000000528fffff]

 5736 20:10:29.938198  [    0.000000]   node   0: [mem 0x0000000052900000-0x00000000545fffff]

 5737 20:10:29.944422  [    0.000000]   node   0: [mem 0x0000000054700000-0x00000000ffdfffff]

 5738 20:10:29.951424  [    0.000000]   node   0: [mem 0x0000000100000000-0x000000013fffffff]

 5739 20:10:29.957692  [    0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]

 5740 20:10:29.973747  [    0.000000] On node 0, zone DMA: 256 pages in unavailable ranges

 5741 20:10:29.980763  [    0.000000] On node 0, zone Normal: 512 pages in unavailable ranges

 5742 20:10:29.987191  [    0.000000] cma: Reserved 32 MiB at 0x00000000fde00000

 5743 20:10:29.990400  [    0.000000] psci: probing for conduit method from DT.

 5744 20:10:29.997215  [    0.000000] psci: PSCIv1.1 detected in firmware.

 5745 20:10:30.000590  [    0.000000] psci: Using standard PSCI v0.2 function IDs

 5746 20:10:30.007284  [    0.000000] psci: MIGRATE_INFO_TYPE not supported.

 5747 20:10:30.010413  [    0.000000] psci: SMC Calling Convention v1.1

 5748 20:10:30.017187  [    0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016

 5749 20:10:30.020464  [    0.000000] Detected VIPT I-cache on CPU0

 5750 20:10:30.027112  [    0.000000] CPU features: detected: GIC system register CPU interface

 5751 20:10:30.033633  [    0.000000] CPU features: kernel page table isolation forced ON by KASLR

 5752 20:10:30.040435  [    0.000000] CPU features: detected: Kernel page table isolation (KPTI)

 5753 20:10:30.046839  [    0.000000] CPU features: detected: ARM erratum 845719

 5754 20:10:30.050436  [    0.000000] alternatives: applying boot alternatives

 5755 20:10:30.053522  [    0.000000] Fallback order for Node 0: 0 

 5756 20:10:30.060204  [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 1031424

 5757 20:10:30.063850  [    0.000000] Policy zone: Normal

 5758 20:10:30.083777  [    0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 5759 20:10:30.093618  <5>[    0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.

 5760 20:10:30.104034  <6>[    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)

 5761 20:10:30.110631  <6>[    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)

 5762 20:10:30.117420  <6>[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off

 5763 20:10:30.123805  <6>[    0.000000] software IO TLB: area num 8.

 5764 20:10:30.148410  <6>[    0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)

 5765 20:10:30.206728  <6>[    0.000000] Memory: 3855644K/4191232K available (18112K kernel code, 4120K rwdata, 22500K rodata, 8512K init, 616K bss, 302820K reserved, 32768K cma-reserved)

 5766 20:10:30.213090  <6>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1

 5767 20:10:30.219924  <6>[    0.000000] rcu: Preemptible hierarchical RCU implementation.

 5768 20:10:30.222857  <6>[    0.000000] rcu: 	RCU event tracing is enabled.

 5769 20:10:30.229881  <6>[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.

 5770 20:10:30.236018  <6>[    0.000000] 	Trampoline variant of Tasks RCU enabled.

 5771 20:10:30.239859  <6>[    0.000000] 	Tracing variant of Tasks RCU enabled.

 5772 20:10:30.249464  <6>[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.

 5773 20:10:30.256490  <6>[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8

 5774 20:10:30.259634  <6>[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0

 5775 20:10:30.271433  <6>[    0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem

 5776 20:10:30.278270  <6>[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode

 5777 20:10:30.281746  <6>[    0.000000] GICv3: 640 SPIs implemented

 5778 20:10:30.285093  <6>[    0.000000] GICv3: 0 Extended SPIs implemented

 5779 20:10:30.288118  <6>[    0.000000] Root IRQ handler: gic_handle_irq

 5780 20:10:30.294650  <6>[    0.000000] GICv3: GICv3 features: 16 PPIs

 5781 20:10:30.301735  <6>[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000

 5782 20:10:30.312111  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }

 5783 20:10:30.324914  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }

 5784 20:10:30.331183  <6>[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.

 5785 20:10:30.343162  <6>[    0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).

 5786 20:10:30.356494  <6>[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns

 5787 20:10:30.363289  <6>[    0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns

 5788 20:10:30.369801  <6>[    0.009477] Console: colour dummy device 80x25

 5789 20:10:30.373531  <6>[    0.014508] printk: console [tty1] enabled

 5790 20:10:30.383352  <6>[    0.018894] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)

 5791 20:10:30.389841  <6>[    0.029359] pid_max: default: 32768 minimum: 301

 5792 20:10:30.393362  <6>[    0.034240] LSM: Security Framework initializing

 5793 20:10:30.403315  <6>[    0.039155] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5794 20:10:30.409860  <6>[    0.046778] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5795 20:10:30.416619  <4>[    0.055651] cacheinfo: Unable to detect cache hierarchy for CPU 0

 5796 20:10:30.426521  <6>[    0.062280] cblist_init_generic: Setting adjustable number of callback queues.

 5797 20:10:30.429761  <6>[    0.069726] cblist_init_generic: Setting shift to 3 and lim to 1.

 5798 20:10:30.439790  <6>[    0.076079] cblist_init_generic: Setting adjustable number of callback queues.

 5799 20:10:30.447013  <6>[    0.083524] cblist_init_generic: Setting shift to 3 and lim to 1.

 5800 20:10:30.449692  <6>[    0.089923] rcu: Hierarchical SRCU implementation.

 5801 20:10:30.456403  <6>[    0.094948] rcu: 	Max phase no-delay instances is 1000.

 5802 20:10:30.463257  <6>[    0.102892] EFI services will not be available.

 5803 20:10:30.466616  <6>[    0.107841] smp: Bringing up secondary CPUs ...

 5804 20:10:30.477431  <6>[    0.113077] Detected VIPT I-cache on CPU1

 5805 20:10:30.484106  <4>[    0.113122] cacheinfo: Unable to detect cache hierarchy for CPU 1

 5806 20:10:30.490838  <6>[    0.113131] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000

 5807 20:10:30.497102  <6>[    0.113162] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]

 5808 20:10:30.500493  <6>[    0.113646] Detected VIPT I-cache on CPU2

 5809 20:10:30.507006  <4>[    0.113678] cacheinfo: Unable to detect cache hierarchy for CPU 2

 5810 20:10:30.513809  <6>[    0.113683] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000

 5811 20:10:30.520344  <6>[    0.113696] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]

 5812 20:10:30.524088  <6>[    0.114141] Detected VIPT I-cache on CPU3

 5813 20:10:30.530390  <4>[    0.114171] cacheinfo: Unable to detect cache hierarchy for CPU 3

 5814 20:10:30.537174  <6>[    0.114176] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000

 5815 20:10:30.543844  <6>[    0.114187] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]

 5816 20:10:30.550313  <6>[    0.114762] CPU features: detected: Spectre-v2

 5817 20:10:30.553647  <6>[    0.114772] CPU features: detected: Spectre-BHB

 5818 20:10:30.560773  <6>[    0.114776] CPU features: detected: ARM erratum 858921

 5819 20:10:30.564012  <6>[    0.114781] Detected VIPT I-cache on CPU4

 5820 20:10:30.570245  <4>[    0.114829] cacheinfo: Unable to detect cache hierarchy for CPU 4

 5821 20:10:30.576715  <6>[    0.114837] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000

 5822 20:10:30.583557  <6>[    0.114845] arch_timer: Enabling local workaround for ARM erratum 858921

 5823 20:10:30.590291  <6>[    0.114856] arch_timer: CPU4: Trapping CNTVCT access

 5824 20:10:30.596818  <6>[    0.114863] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]

 5825 20:10:30.600169  <6>[    0.115348] Detected VIPT I-cache on CPU5

 5826 20:10:30.606796  <4>[    0.115389] cacheinfo: Unable to detect cache hierarchy for CPU 5

 5827 20:10:30.613236  <6>[    0.115394] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000

 5828 20:10:30.620604  <6>[    0.115401] arch_timer: Enabling local workaround for ARM erratum 858921

 5829 20:10:30.627117  <6>[    0.115407] arch_timer: CPU5: Trapping CNTVCT access

 5830 20:10:30.633551  <6>[    0.115412] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]

 5831 20:10:30.636703  <6>[    0.115948] Detected VIPT I-cache on CPU6

 5832 20:10:30.643673  <4>[    0.115993] cacheinfo: Unable to detect cache hierarchy for CPU 6

 5833 20:10:30.649899  <6>[    0.115999] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000

 5834 20:10:30.657101  <6>[    0.116006] arch_timer: Enabling local workaround for ARM erratum 858921

 5835 20:10:30.663256  <6>[    0.116012] arch_timer: CPU6: Trapping CNTVCT access

 5836 20:10:30.669705  <6>[    0.116017] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]

 5837 20:10:30.673308  <6>[    0.116549] Detected VIPT I-cache on CPU7

 5838 20:10:30.679948  <4>[    0.116593] cacheinfo: Unable to detect cache hierarchy for CPU 7

 5839 20:10:30.686471  <6>[    0.116599] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000

 5840 20:10:30.696332  <6>[    0.116606] arch_timer: Enabling local workaround for ARM erratum 858921

 5841 20:10:30.700252  <6>[    0.116612] arch_timer: CPU7: Trapping CNTVCT access

 5842 20:10:30.706616  <6>[    0.116617] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]

 5843 20:10:30.709633  <6>[    0.116666] smp: Brought up 1 node, 8 CPUs

 5844 20:10:30.716508  <6>[    0.355534] SMP: Total of 8 processors activated.

 5845 20:10:30.719801  <6>[    0.360471] CPU features: detected: 32-bit EL0 Support

 5846 20:10:30.726512  <6>[    0.365842] CPU features: detected: 32-bit EL1 Support

 5847 20:10:30.732984  <6>[    0.371208] CPU features: detected: CRC32 instructions

 5848 20:10:30.736461  <6>[    0.376636] CPU: All CPU(s) started at EL2

 5849 20:10:30.743237  <6>[    0.380974] alternatives: applying system-wide alternatives

 5850 20:10:30.749670  <6>[    0.389026] devtmpfs: initialized

 5851 20:10:30.761827  <6>[    0.397943] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns

 5852 20:10:30.771734  <6>[    0.407894] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)

 5853 20:10:30.774920  <6>[    0.415622] pinctrl core: initialized pinctrl subsystem

 5854 20:10:30.783484  <6>[    0.422745] DMI not present or invalid.

 5855 20:10:30.790087  <6>[    0.427113] NET: Registered PF_NETLINK/PF_ROUTE protocol family

 5856 20:10:30.797108  <6>[    0.434002] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations

 5857 20:10:30.803465  <6>[    0.441513] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations

 5858 20:10:30.813536  <6>[    0.449683] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations

 5859 20:10:30.820444  <6>[    0.457828] audit: initializing netlink subsys (disabled)

 5860 20:10:30.826818  <5>[    0.463510] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1

 5861 20:10:30.833365  <6>[    0.464465] thermal_sys: Registered thermal governor 'step_wise'

 5862 20:10:30.840074  <6>[    0.471461] thermal_sys: Registered thermal governor 'power_allocator'

 5863 20:10:30.843537  <6>[    0.477707] cpuidle: using governor menu

 5864 20:10:30.850150  <6>[    0.488655] NET: Registered PF_QIPCRTR protocol family

 5865 20:10:30.856717  <6>[    0.494132] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.

 5866 20:10:30.863325  <6>[    0.501224] ASID allocator initialised with 32768 entries

 5867 20:10:30.866519  <6>[    0.508007] Serial: AMBA PL011 UART driver

 5868 20:10:30.878655  <4>[    0.518397] Trying to register duplicate clock ID: 113

 5869 20:10:30.938380  <6>[    0.574900] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5870 20:10:30.953030  <6>[    0.589247] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5871 20:10:30.956155  <6>[    0.598988] KASLR enabled

 5872 20:10:30.970640  <6>[    0.606978] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages

 5873 20:10:30.977058  <6>[    0.613981] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page

 5874 20:10:30.983972  <6>[    0.620460] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages

 5875 20:10:30.990615  <6>[    0.627451] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page

 5876 20:10:30.997207  <6>[    0.633925] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages

 5877 20:10:31.004200  <6>[    0.640915] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page

 5878 20:10:31.010629  <6>[    0.647389] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages

 5879 20:10:31.017041  <6>[    0.654378] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page

 5880 20:10:31.020534  <6>[    0.661954] ACPI: Interpreter disabled.

 5881 20:10:31.030264  <6>[    0.669920] iommu: Default domain type: Translated 

 5882 20:10:31.036895  <6>[    0.675029] iommu: DMA domain TLB invalidation policy: strict mode 

 5883 20:10:31.040098  <5>[    0.681662] SCSI subsystem initialized

 5884 20:10:31.046625  <6>[    0.686082] usbcore: registered new interface driver usbfs

 5885 20:10:31.053409  <6>[    0.691810] usbcore: registered new interface driver hub

 5886 20:10:31.056610  <6>[    0.697352] usbcore: registered new device driver usb

 5887 20:10:31.063786  <6>[    0.703650] pps_core: LinuxPPS API ver. 1 registered

 5888 20:10:31.073674  <6>[    0.708834] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>

 5889 20:10:31.076812  <6>[    0.718158] PTP clock support registered

 5890 20:10:31.080172  <6>[    0.722409] EDAC MC: Ver: 3.0.0

 5891 20:10:31.088176  <6>[    0.728061] FPGA manager framework

 5892 20:10:31.095226  <6>[    0.731748] Advanced Linux Sound Architecture Driver Initialized.

 5893 20:10:31.098244  <6>[    0.738488] vgaarb: loaded

 5894 20:10:31.101537  <6>[    0.741604] clocksource: Switched to clocksource arch_sys_counter

 5895 20:10:31.108380  <5>[    0.748035] VFS: Disk quotas dquot_6.6.0

 5896 20:10:31.114702  <6>[    0.752210] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)

 5897 20:10:31.118637  <6>[    0.759385] pnp: PnP ACPI: disabled

 5898 20:10:31.126360  <6>[    0.766241] NET: Registered PF_INET protocol family

 5899 20:10:31.133061  <6>[    0.771475] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)

 5900 20:10:31.145402  <6>[    0.781383] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)

 5901 20:10:31.154803  <6>[    0.790135] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)

 5902 20:10:31.161628  <6>[    0.798087] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)

 5903 20:10:31.168193  <6>[    0.806318] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)

 5904 20:10:31.175061  <6>[    0.814412] TCP: Hash tables configured (established 32768 bind 32768)

 5905 20:10:31.185202  <6>[    0.821242] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5906 20:10:31.191683  <6>[    0.828215] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5907 20:10:31.197973  <6>[    0.835695] NET: Registered PF_UNIX/PF_LOCAL protocol family

 5908 20:10:31.204850  <6>[    0.841830] RPC: Registered named UNIX socket transport module.

 5909 20:10:31.208311  <6>[    0.847975] RPC: Registered udp transport module.

 5910 20:10:31.211560  <6>[    0.852899] RPC: Registered tcp transport module.

 5911 20:10:31.221198  <6>[    0.857822] RPC: Registered tcp NFSv4.1 backchannel transport module.

 5912 20:10:31.224742  <6>[    0.864476] PCI: CLS 0 bytes, default 64

 5913 20:10:31.228097  <6>[    0.868726] Unpacking initramfs...

 5914 20:10:31.237876  <6>[    0.872782] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available

 5915 20:10:31.244492  <6>[    0.881506] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available

 5916 20:10:31.251081  <6>[    0.890422] kvm [1]: IPA Size Limit: 40 bits

 5917 20:10:31.254365  <6>[    0.896748] kvm [1]: vgic-v2@c420000

 5918 20:10:31.261011  <6>[    0.900571] kvm [1]: GIC system register CPU interface enabled

 5919 20:10:31.267881  <6>[    0.906747] kvm [1]: vgic interrupt IRQ18

 5920 20:10:31.271272  <6>[    0.911111] kvm [1]: Hyp mode initialized successfully

 5921 20:10:31.277580  <5>[    0.917406] Initialise system trusted keyrings

 5922 20:10:31.284335  <6>[    0.922191] workingset: timestamp_bits=42 max_order=20 bucket_order=0

 5923 20:10:31.292609  <6>[    0.932124] squashfs: version 4.0 (2009/01/31) Phillip Lougher

 5924 20:10:31.299051  <5>[    0.938532] NFS: Registering the id_resolver key type

 5925 20:10:31.302489  <5>[    0.943837] Key type id_resolver registered

 5926 20:10:31.308864  <5>[    0.948251] Key type id_legacy registered

 5927 20:10:31.315887  <6>[    0.952551] nfs4filelayout_init: NFSv4 File Layout Driver Registering...

 5928 20:10:31.322358  <6>[    0.959469] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...

 5929 20:10:31.329099  <6>[    0.967195] 9p: Installing v9fs 9p2000 file system support

 5930 20:10:31.356376  <5>[    0.996281] Key type asymmetric registered

 5931 20:10:31.359807  <5>[    1.000618] Asymmetric key parser 'x509' registered

 5932 20:10:31.369712  <6>[    1.005765] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)

 5933 20:10:31.373046  <6>[    1.013374] io scheduler mq-deadline registered

 5934 20:10:31.376260  <6>[    1.018129] io scheduler kyber registered

 5935 20:10:31.399094  <6>[    1.038830] EINJ: ACPI disabled.

 5936 20:10:31.405635  <4>[    1.042608] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17

 5937 20:10:31.443752  <6>[    1.083431] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled

 5938 20:10:31.452427  <6>[    1.091995] printk: console [ttyS0] disabled

 5939 20:10:31.480057  <6>[    1.116640] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2

 5940 20:10:31.486708  <6>[    1.126112] printk: console [ttyS0] enabled

 5941 20:10:31.490309  <6>[    1.126112] printk: console [ttyS0] enabled

 5942 20:10:31.496821  <6>[    1.135028] printk: bootconsole [mtk8250] disabled

 5943 20:10:31.500001  <6>[    1.135028] printk: bootconsole [mtk8250] disabled

 5944 20:10:31.510042  <3>[    1.145545] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47

 5945 20:10:31.516499  <3>[    1.153926] mt6577-uart 11003000.serial: Error applying setting, reverse things back

 5946 20:10:31.546109  <6>[    1.182313] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2

 5947 20:10:31.552848  <6>[    1.191957] serial serial0: tty port ttyS1 registered

 5948 20:10:31.559597  <6>[    1.198580] SuperH (H)SCI(F) driver initialized

 5949 20:10:31.562828  <6>[    1.204079] msm_serial: driver initialized

 5950 20:10:31.577755  <6>[    1.214347] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000

 5951 20:10:31.588376  <6>[    1.222940] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000

 5952 20:10:31.594514  <6>[    1.231518] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000

 5953 20:10:31.604527  <6>[    1.240091] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000

 5954 20:10:31.611173  <6>[    1.248744] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000

 5955 20:10:31.621069  <6>[    1.257405] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000

 5956 20:10:31.631319  <6>[    1.266145] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000

 5957 20:10:31.637982  <6>[    1.274886] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000

 5958 20:10:31.647778  <6>[    1.283452] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000

 5959 20:10:31.657529  <6>[    1.292253] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000

 5960 20:10:31.665120  <4>[    1.304670] cacheinfo: Unable to detect cache hierarchy for CPU 0

 5961 20:10:31.674181  <6>[    1.314039] loop: module loaded

 5962 20:10:31.686249  <6>[    1.325918] vsim1: Bringing 1800000uV into 2700000-2700000uV

 5963 20:10:31.704285  <6>[    1.343851] megasas: 07.719.03.00-rc1

 5964 20:10:31.712733  <6>[    1.352571] spi-nor spi1.0: w25q64dw (8192 Kbytes)

 5965 20:10:31.721615  <6>[    1.361002] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2

 5966 20:10:31.738348  <6>[    1.377846] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)

 5967 20:10:31.795765  <6>[    1.428155] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d

 5968 20:10:33.276730  <6>[    2.916306] Freeing initrd memory: 59556K

 5969 20:10:33.292229  <4>[    2.928284] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'

 5970 20:10:33.298730  <4>[    2.937533] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.91-cip21 #1

 5971 20:10:33.305827  <4>[    2.944231] Hardware name: Google juniper sku16 board (DT)

 5972 20:10:33.309205  <4>[    2.949970] Call trace:

 5973 20:10:33.312614  <4>[    2.952670]  dump_backtrace.part.0+0xe0/0xf0

 5974 20:10:33.315622  <4>[    2.957206]  show_stack+0x18/0x30

 5975 20:10:33.318833  <4>[    2.960778]  dump_stack_lvl+0x68/0x84

 5976 20:10:33.325892  <4>[    2.964698]  dump_stack+0x18/0x34

 5977 20:10:33.328704  <4>[    2.968268]  sysfs_warn_dup+0x64/0x80

 5978 20:10:33.332377  <4>[    2.972190]  sysfs_do_create_link_sd+0xf0/0x100

 5979 20:10:33.335167  <4>[    2.976977]  sysfs_create_link+0x20/0x40

 5980 20:10:33.342322  <4>[    2.981156]  bus_add_device+0x68/0x10c

 5981 20:10:33.345562  <4>[    2.985162]  device_add+0x340/0x7ac

 5982 20:10:33.348856  <4>[    2.988905]  of_device_add+0x44/0x60

 5983 20:10:33.355226  <4>[    2.992739]  of_platform_device_create_pdata+0x90/0x120

 5984 20:10:33.359027  <4>[    2.998220]  of_platform_bus_create+0x170/0x370

 5985 20:10:33.362048  <4>[    3.003007]  of_platform_populate+0x50/0xfc

 5986 20:10:33.368981  <4>[    3.007446]  parse_mtd_partitions+0x1dc/0x510

 5987 20:10:33.371957  <4>[    3.012060]  mtd_device_parse_register+0xf8/0x2e0

 5988 20:10:33.375763  <4>[    3.017018]  spi_nor_probe+0x21c/0x2f0

 5989 20:10:33.382049  <4>[    3.021024]  spi_mem_probe+0x6c/0xb0

 5990 20:10:33.385153  <4>[    3.024856]  spi_probe+0x84/0xe4

 5991 20:10:33.388475  <4>[    3.028338]  really_probe+0xbc/0x2e0

 5992 20:10:33.391519  <4>[    3.032168]  __driver_probe_device+0x78/0x11c

 5993 20:10:33.398579  <4>[    3.036780]  driver_probe_device+0xd8/0x160

 5994 20:10:33.401958  <4>[    3.041217]  __device_attach_driver+0xb8/0x134

 5995 20:10:33.404920  <4>[    3.045916]  bus_for_each_drv+0x78/0xd0

 5996 20:10:33.408395  <4>[    3.050006]  __device_attach+0xa8/0x1c0

 5997 20:10:33.415098  <4>[    3.054096]  device_initial_probe+0x14/0x20

 5998 20:10:33.418610  <4>[    3.058534]  bus_probe_device+0x9c/0xa4

 5999 20:10:33.421749  <4>[    3.062624]  device_add+0x3ac/0x7ac

 6000 20:10:33.424811  <4>[    3.066366]  __spi_add_device+0x78/0x120

 6001 20:10:33.431612  <4>[    3.070544]  spi_add_device+0x40/0x7c

 6002 20:10:33.434833  <4>[    3.074461]  spi_register_controller+0x610/0xad0

 6003 20:10:33.441747  <4>[    3.079333]  devm_spi_register_controller+0x4c/0xa4

 6004 20:10:33.444749  <4>[    3.084466]  mtk_spi_probe+0x3f8/0x650

 6005 20:10:33.448140  <4>[    3.088470]  platform_probe+0x68/0xe0

 6006 20:10:33.451695  <4>[    3.092388]  really_probe+0xbc/0x2e0

 6007 20:10:33.455511  <4>[    3.096218]  __driver_probe_device+0x78/0x11c

 6008 20:10:33.461554  <4>[    3.100830]  driver_probe_device+0xd8/0x160

 6009 20:10:33.465060  <4>[    3.105267]  __driver_attach+0x94/0x19c

 6010 20:10:33.468347  <4>[    3.109358]  bus_for_each_dev+0x70/0xd0

 6011 20:10:33.471820  <4>[    3.113447]  driver_attach+0x24/0x30

 6012 20:10:33.478201  <4>[    3.117277]  bus_add_driver+0x154/0x20c

 6013 20:10:33.481677  <4>[    3.121367]  driver_register+0x78/0x130

 6014 20:10:33.484737  <4>[    3.125457]  __platform_driver_register+0x28/0x34

 6015 20:10:33.491516  <4>[    3.130417]  mtk_spi_driver_init+0x1c/0x28

 6016 20:10:33.494663  <4>[    3.134771]  do_one_initcall+0x50/0x1d0

 6017 20:10:33.498620  <4>[    3.138861]  kernel_init_freeable+0x21c/0x288

 6018 20:10:33.501765  <4>[    3.143474]  kernel_init+0x24/0x12c

 6019 20:10:33.508046  <4>[    3.147219]  ret_from_fork+0x10/0x20

 6020 20:10:33.516653  <6>[    3.156099] tun: Universal TUN/TAP device driver, 1.6

 6021 20:10:33.520087  <6>[    3.162409] thunder_xcv, ver 1.0

 6022 20:10:33.523430  <6>[    3.165919] thunder_bgx, ver 1.0

 6023 20:10:33.526768  <6>[    3.169416] nicpf, ver 1.0

 6024 20:10:33.538190  <6>[    3.173781] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version

 6025 20:10:33.541644  <6>[    3.181264] hns3: Copyright (c) 2017 Huawei Corporation.

 6026 20:10:33.544386  <6>[    3.186874] hclge is initializing

 6027 20:10:33.550936  <6>[    3.190458] e1000: Intel(R) PRO/1000 Network Driver

 6028 20:10:33.557753  <6>[    3.195593] e1000: Copyright (c) 1999-2006 Intel Corporation.

 6029 20:10:33.561824  <6>[    3.201621] e1000e: Intel(R) PRO/1000 Network Driver

 6030 20:10:33.568374  <6>[    3.206843] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.

 6031 20:10:33.574810  <6>[    3.213035] igb: Intel(R) Gigabit Ethernet Network Driver

 6032 20:10:33.581135  <6>[    3.218690] igb: Copyright (c) 2007-2014 Intel Corporation.

 6033 20:10:33.588026  <6>[    3.224532] igbvf: Intel(R) Gigabit Virtual Function Network Driver

 6034 20:10:33.594378  <6>[    3.231055] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.

 6035 20:10:33.597913  <6>[    3.237613] sky2: driver version 1.30

 6036 20:10:33.604251  <6>[    3.242861] usbcore: registered new device driver r8152-cfgselector

 6037 20:10:33.611115  <6>[    3.249407] usbcore: registered new interface driver r8152

 6038 20:10:33.617476  <6>[    3.255238] VFIO - User Level meta-driver version: 0.3

 6039 20:10:33.624223  <6>[    3.263029] mtu3 11201000.usb: uwk - reg:0x420, version:101

 6040 20:10:33.630542  <4>[    3.268900] mtu3 11201000.usb: supply vbus not found, using dummy regulator

 6041 20:10:33.637608  <6>[    3.276176] mtu3 11201000.usb: dr_mode: 1, drd: auto

 6042 20:10:33.644179  <6>[    3.281402] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0

 6043 20:10:33.647825  <6>[    3.287588] mtu3 11201000.usb: usb3-drd: 0

 6044 20:10:33.654614  <6>[    3.293112] mtu3 11201000.usb: xHCI platform device register success...

 6045 20:10:33.665757  <4>[    3.301752] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator

 6046 20:10:33.672389  <6>[    3.309730] xhci-mtk 11200000.usb: xHCI Host Controller

 6047 20:10:33.678994  <6>[    3.315231] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1

 6048 20:10:33.685842  <6>[    3.322949] xhci-mtk 11200000.usb: USB3 root hub has no ports

 6049 20:10:33.695820  <6>[    3.328956] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010

 6050 20:10:33.699024  <6>[    3.338382] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000

 6051 20:10:33.705488  <6>[    3.344455] xhci-mtk 11200000.usb: xHCI Host Controller

 6052 20:10:33.711887  <6>[    3.349943] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2

 6053 20:10:33.718528  <6>[    3.357603] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed

 6054 20:10:33.725423  <6>[    3.364413] hub 1-0:1.0: USB hub found

 6055 20:10:33.728508  <6>[    3.368442] hub 1-0:1.0: 1 port detected

 6056 20:10:33.738690  <6>[    3.373783] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.

 6057 20:10:33.741865  <6>[    3.382387] hub 2-0:1.0: USB hub found

 6058 20:10:33.748383  <3>[    3.386414] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)

 6059 20:10:33.755202  <6>[    3.394304] usbcore: registered new interface driver usb-storage

 6060 20:10:33.761815  <6>[    3.400888] usbcore: registered new device driver onboard-usb-hub

 6061 20:10:33.773489  <4>[    3.409707] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator

 6062 20:10:33.782312  <6>[    3.421922] mt6397-rtc mt6358-rtc: registered as rtc0

 6063 20:10:33.792186  <6>[    3.427405] mt6397-rtc mt6358-rtc: setting system clock to 2024-05-28T20:10:33 UTC (1716927033)

 6064 20:10:33.795557  <6>[    3.437282] i2c_dev: i2c /dev entries driver

 6065 20:10:33.807914  <6>[    3.443668] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 6066 20:10:33.817545  <6>[    3.452053] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 6067 20:10:33.820787  <6>[    3.460960] i2c 4-0058: Fixed dependency cycle(s) with /panel

 6068 20:10:33.830488  <6>[    3.467040] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000

 6069 20:10:33.837173  <3>[    3.474507] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.

 6070 20:10:33.855198  <6>[    3.491627] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)

 6071 20:10:33.863492  <6>[    3.503067] cpu cpu0: EM: created perf domain

 6072 20:10:33.873381  <6>[    3.508579] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz

 6073 20:10:33.880342  <6>[    3.519886] cpu cpu4: EM: created perf domain

 6074 20:10:33.887375  <6>[    3.526785] sdhci: Secure Digital Host Controller Interface driver

 6075 20:10:33.893630  <6>[    3.533240] sdhci: Copyright(c) Pierre Ossman

 6076 20:10:33.900433  <6>[    3.538644] Synopsys Designware Multimedia Card Interface Driver

 6077 20:10:33.907141  <6>[    3.539162] mtk-msdc 11240000.mmc: allocated mmc-pwrseq

 6078 20:10:33.910525  <6>[    3.545704] sdhci-pltfm: SDHCI platform and OF driver helper

 6079 20:10:33.919599  <6>[    3.559303] ledtrig-cpu: registered to indicate activity on CPUs

 6080 20:10:33.927457  <6>[    3.567026] usbcore: registered new interface driver usbhid

 6081 20:10:33.930521  <6>[    3.572872] usbhid: USB HID core driver

 6082 20:10:33.941552  <6>[    3.577134] spi_master spi2: will run message pump with realtime priority

 6083 20:10:33.948601  <4>[    3.577138] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator

 6084 20:10:33.955118  <4>[    3.591389] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator

 6085 20:10:33.968483  <6>[    3.596382] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0

 6086 20:10:33.981641  <6>[    3.613766] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1

 6087 20:10:33.988610  <4>[    3.626078] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 6088 20:10:33.995172  <6>[    3.628563] cros-ec-spi spi2.0: Chrome EC device registered

 6089 20:10:34.008441  <4>[    3.645073] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 6090 20:10:34.020377  <4>[    3.656810] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 6091 20:10:34.027221  <4>[    3.665926] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 6092 20:10:34.034120  <6>[    3.667926] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14

 6093 20:10:34.040476  <6>[    3.677699] mmc1: new ultra high speed SDR104 SDIO card at address 0001

 6094 20:10:34.043843  <6>[    3.678302] mmc0: new HS400 MMC card at address 0001

 6095 20:10:34.052120  <6>[    3.691681] mmcblk0: mmc0:0001 TB2932 29.2 GiB 

 6096 20:10:34.061337  <6>[    3.701255]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12

 6097 20:10:34.071531  <6>[    3.707766] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound

 6098 20:10:34.077995  <6>[    3.708941] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB 

 6099 20:10:34.088269  <6>[    3.722150] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6100 20:10:34.094935  <6>[    3.722931] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB 

 6101 20:10:34.098017  <6>[    3.734465] NET: Registered PF_PACKET protocol family

 6102 20:10:34.104759  <6>[    3.739174] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)

 6103 20:10:34.111500  <6>[    3.743678] 9pnet: Installing 9P2000 support

 6104 20:10:34.121151  <6>[    3.749726] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2

 6105 20:10:34.131520  <6>[    3.749817] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c

 6106 20:10:34.137919  <5>[    3.776863] Key type dns_resolver registered

 6107 20:10:34.141495  <6>[    3.781798] registered taskstats version 1

 6108 20:10:34.148254  <5>[    3.786163] Loading compiled-in X.509 certificates

 6109 20:10:34.165503  <6>[    3.801624] usb 1-1: new high-speed USB device number 2 using xhci-mtk

 6110 20:10:34.193115  <3>[    3.829083] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517

 6111 20:10:34.220240  <4>[    3.856220] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW

 6112 20:10:34.234394  <6>[    3.866916] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20

 6113 20:10:34.247693  <6>[    3.879886] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6114 20:10:34.261067  <3>[    3.891533] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!

 6115 20:10:34.275001  <3>[    3.907512] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'

 6116 20:10:34.281749  <3>[    3.919983] debugfs: File 'Playback' in directory 'dapm' already present!

 6117 20:10:34.288010  <3>[    3.927032] debugfs: File 'Capture' in directory 'dapm' already present!

 6118 20:10:34.305520  <6>[    3.938248] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4

 6119 20:10:34.316449  <6>[    3.951975] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)

 6120 20:10:34.319438  <6>[    3.957567] hub 1-1:1.0: USB hub found

 6121 20:10:34.329214  <6>[    3.960526] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)

 6122 20:10:34.332750  <6>[    3.964851] hub 1-1:1.0: 3 ports detected

 6123 20:10:34.342441  <6>[    3.973028] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)

 6124 20:10:34.349127  <6>[    3.985825] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)

 6125 20:10:34.359277  <6>[    3.994343] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)

 6126 20:10:34.366232  <6>[    4.002861] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)

 6127 20:10:34.376156  <6>[    4.011377] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)

 6128 20:10:34.382631  <6>[    4.020605] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0

 6129 20:10:34.389322  <6>[    4.028127] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0

 6130 20:10:34.396315  <6>[    4.035478] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0

 6131 20:10:34.403534  <6>[    4.042771] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0

 6132 20:10:34.414377  <6>[    4.050213] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0

 6133 20:10:34.420700  <6>[    4.058503] panfrost 13040000.gpu: clock rate = 511999970

 6134 20:10:34.430587  <6>[    4.064202] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet

 6135 20:10:34.437453  <6>[    4.074478] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0

 6136 20:10:34.447706  <6>[    4.082490] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400

 6137 20:10:34.457154  <6>[    4.090922] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7

 6138 20:10:34.463987  <6>[    4.102999] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1

 6139 20:10:34.477742  <6>[    4.113963] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0

 6140 20:10:34.487909  <6>[    4.123135] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)

 6141 20:10:34.497990  <6>[    4.132306] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)

 6142 20:10:34.508279  <6>[    4.141433] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)

 6143 20:10:34.514322  <6>[    4.150561] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)

 6144 20:10:34.524338  <6>[    4.159861] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)

 6145 20:10:34.534398  <6>[    4.169162] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)

 6146 20:10:34.544653  <6>[    4.178635] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)

 6147 20:10:34.554055  <6>[    4.188107] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)

 6148 20:10:34.561143  <6>[    4.197232] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)

 6149 20:10:34.634561  <6>[    4.270204] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)

 6150 20:10:34.644226  <6>[    4.279447] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing

 6151 20:10:34.655855  <6>[    4.291869] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1

 6152 20:10:34.669370  <6>[    4.305640] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk

 6153 20:10:35.347830  <6>[    4.489879] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk

 6154 20:10:35.357998  <4>[    4.593330] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2

 6155 20:10:35.364156  <4>[    4.593350] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)

 6156 20:10:35.371112  <6>[    4.630614] r8152 1-1.2:1.0 eth0: v1.12.13

 6157 20:10:35.377872  <6>[    4.709633] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk

 6158 20:10:35.384458  <6>[    4.967254] Console: switching to colour frame buffer device 170x48

 6159 20:10:35.391227  <6>[    5.027858] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device

 6160 20:10:35.408278  <6>[    5.043950] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5

 6161 20:10:35.414472  <6>[    5.051961] input: volume-buttons as /devices/platform/volume-buttons/input/input6

 6162 20:10:36.609792  <6>[    6.249435] r8152 1-1.2:1.0 eth0: carrier on

 6163 20:10:36.650217  <5>[    6.273648] Sending DHCP requests ., OK

 6164 20:10:36.656477  <6>[    6.293885] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23

 6165 20:10:36.659964  <6>[    6.302336] IP-Config: Complete:

 6166 20:10:36.673154  <6>[    6.305907]      device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1

 6167 20:10:36.679999  <6>[    6.316807]      host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)

 6168 20:10:36.690477  <6>[    6.326287]      bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=

 6169 20:10:36.693470  <6>[    6.326297]      nameserver0=192.168.201.1

 6170 20:10:36.696731  <6>[    6.338694] clk: Disabling unused clocks

 6171 20:10:36.701024  <6>[    6.343819] ALSA device list:

 6172 20:10:36.711116  <6>[    6.350449]   #0: mt8183_mt6358_ts3a227_max98357

 6173 20:10:36.722545  <6>[    6.362009] Freeing unused kernel memory: 8512K

 6174 20:10:36.730446  <6>[    6.369593] Run /init as init process

 6175 20:10:36.764503  <6>[    6.403653] NET: Registered PF_INET6 protocol family

 6176 20:10:36.771784  <6>[    6.410703] Segment Routing with IPv6

 6177 20:10:36.774922  <6>[    6.415343] In-situ OAM (IOAM) with IPv6

 6178 20:10:36.822213  <30>[    6.434340] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)

 6179 20:10:36.830469  <30>[    6.469583] systemd[1]: Detected architecture arm64.

 6180 20:10:36.830902  

 6181 20:10:36.836764  Welcome to Debian GNU/Linux 12 (bookworm)!

 6182 20:10:36.837199  


 6183 20:10:36.850439  <30>[    6.489705] systemd[1]: Hostname set to <debian-bookworm-arm64>.

 6184 20:10:37.022739  <30>[    6.658845] systemd[1]: Queued start job for default target graphical.target.

 6185 20:10:37.043881  <30>[    6.679412] systemd[1]: Created slice system-getty.slice - Slice /system/getty.

 6186 20:10:37.053367  [  OK  ] Created slice system-getty.slice - Slice /system/getty.


 6187 20:10:37.074540  <30>[    6.710437] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.

 6188 20:10:37.084728  [  OK  ] Created slice system-modpr…lice - Slice /system/modprobe.


 6189 20:10:37.103116  <30>[    6.739073] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.

 6190 20:10:37.115332  [  OK  ] Created slice system-seria… - Slice /system/serial-getty.


 6191 20:10:37.134969  <30>[    6.770730] systemd[1]: Created slice user.slice - User and Session Slice.

 6192 20:10:37.145275  [  OK  ] Created slice user.slice - User and Session Slice.


 6193 20:10:37.165316  <30>[    6.798203] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.

 6194 20:10:37.178074  [  OK  ] Started systemd-ask-passwo…quests to Console Directory Watch.


 6195 20:10:37.197515  <30>[    6.830021] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.

 6196 20:10:37.209657  [  OK  ] Started systemd-ask-passwo… Requests to Wall Directory Watch.


 6197 20:10:37.235855  <30>[    6.861949] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).

 6198 20:10:37.255544  <30>[    6.891414] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...

 6199 20:10:37.263109           Expecting device dev-ttyS0.device - /dev/ttyS0...


 6200 20:10:37.281764  <30>[    6.917798] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.

 6201 20:10:37.294797  [  OK  ] Reached target cryptsetup.…get - Local Encrypted Volumes.


 6202 20:10:37.314212  <30>[    6.949872] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.

 6203 20:10:37.327977  [  OK  ] Reached target integrityse…Local Integrity Protected Volumes.


 6204 20:10:37.342863  <30>[    6.982101] systemd[1]: Reached target paths.target - Path Units.

 6205 20:10:37.357332  [  OK  ] Reached target paths.target - Path Units.


 6206 20:10:37.373618  <30>[    7.009822] systemd[1]: Reached target remote-fs.target - Remote File Systems.

 6207 20:10:37.386373  [  OK  ] Reached target remote-fs.target - Remote File Systems.


 6208 20:10:37.398620  <30>[    7.037779] systemd[1]: Reached target slices.target - Slice Units.

 6209 20:10:37.413453  [  OK  ] Reached target slices.target - Slice Units.


 6210 20:10:37.426684  <30>[    7.065831] systemd[1]: Reached target swap.target - Swaps.

 6211 20:10:37.437401  [  OK  ] Reached target swap.target - Swaps.


 6212 20:10:37.457768  <30>[    7.093855] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.

 6213 20:10:37.471231  [  OK  ] Reached target veritysetup… - Local Verity Protected Volumes.


 6214 20:10:37.490102  <30>[    7.126278] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.

 6215 20:10:37.504212  [  OK  ] Listening on systemd-initc… initctl Compatibility Named Pipe.


 6216 20:10:37.523459  <30>[    7.159448] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.

 6217 20:10:37.537212  [  OK  ] Listening on systemd-journ…socket - Journal Audit Socket.


 6218 20:10:37.554363  <30>[    7.190517] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).

 6219 20:10:37.568553  [  OK  ] Listening on systemd-journ…t - Journal Socket (/dev/log).


 6220 20:10:37.586645  <30>[    7.222550] systemd[1]: Listening on systemd-journald.socket - Journal Socket.

 6221 20:10:37.598962  [  OK  ] Listening on systemd-journald.socket - Journal Socket.


 6222 20:10:37.618545  <30>[    7.254501] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.

 6223 20:10:37.632162  [  OK  ] Listening on systemd-udevd….socket - udev Control Socket.


 6224 20:10:37.650641  <30>[    7.286296] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.

 6225 20:10:37.663711  [  OK  ] Listening on systemd-udevd…l.socket - udev Kernel Socket.


 6226 20:10:37.722213  <30>[    7.358446] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...

 6227 20:10:37.735217           Mounting dev-hugepages.mount - Huge Pages File System...


 6228 20:10:37.748831  <30>[    7.384865] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...

 6229 20:10:37.759835           Mounting dev-mqueue.mount…POSIX Message Queue File System...


 6230 20:10:37.802307  <30>[    7.438346] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...

 6231 20:10:37.815735           Mounting sys-kernel-debug.… - Kernel Debug File System...


 6232 20:10:37.841214  <30>[    7.470473] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).

 6233 20:10:37.864717  <30>[    7.500386] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...

 6234 20:10:37.877114           Starting kmod-static-nodes…ate List of Static Device Nodes...


 6235 20:10:37.914171  <30>[    7.550270] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...

 6236 20:10:37.928318           Starting modprobe@configfs…m - Load Kernel Module configfs...


 6237 20:10:37.952171  <30>[    7.588206] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...

 6238 20:10:37.969127           Startin<6>[    7.602722] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com

 6239 20:10:37.972190  g modprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...


 6240 20:10:37.993392  <30>[    7.629256] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...

 6241 20:10:38.005170           Starting modprobe@drm.service - Load Kernel Module drm...


 6242 20:10:38.027735  <30>[    7.663552] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...

 6243 20:10:38.042209           Starting modprobe@efi_psto…- Load Kernel Module efi_pstore...


 6244 20:10:38.065078  <30>[    7.700473] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...

 6245 20:10:38.077633           Starting modprobe@loop.ser…e - Load Kernel Module loop...


 6246 20:10:38.118893  <30>[    7.754798] systemd[1]: Starting systemd-journald.service - Journal Service...

 6247 20:10:38.128632           Starting systemd-journald.service - Journal Service...


 6248 20:10:38.149180  <30>[    7.785305] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...

 6249 20:10:38.158969           Starting systemd-modules-l…rvice - Load Kernel Modules...


 6250 20:10:38.185695  <30>[    7.818486] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...

 6251 20:10:38.197779           Starting systemd-network-g… units from Kernel command line...


 6252 20:10:38.219099  <30>[    7.854944] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...

 6253 20:10:38.233025           Starting systemd-remount-f…nt Root and Kernel File Systems...


 6254 20:10:38.253987  <30>[    7.889512] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...

 6255 20:10:38.264324           Starting systemd-udev-trig…[0m - Coldplug All udev Devices...


 6256 20:10:38.286338  <30>[    7.921863] systemd[1]: Started systemd-journald.service - Journal Service.

 6257 20:10:38.296022  [  OK  ] Started systemd-journald.service - Journal Service.


 6258 20:10:38.320187  [  OK  ] Mounted dev-hugepages.mount - Huge Pages File System.


 6259 20:10:38.338634  [  OK  ] Mounted dev-mqueue.mount[…- POSIX Message Queue File System.


 6260 20:10:38.354141  [  OK  ] Mounted sys-kernel-debug.m…nt - Kernel Debug File System.


 6261 20:10:38.371080  [  OK  ] Finished kmod-static-nodes…reate List of Static Device Nodes.


 6262 20:10:38.392267  [  OK  ] Finished modprobe@configfs…[0m - Load Kernel Module configfs.


 6263 20:10:38.412095  [  OK  ] Finished modprobe@dm_mod.s…e - Load Kernel Module dm_mod.


 6264 20:10:38.432677  [  OK  ] Finished modprobe@drm.service - Load Kernel Module drm.


 6265 20:10:38.451325  [  OK  ] Finished modprobe@efi_psto…m - Load Kernel Module efi_pstore.


 6266 20:10:38.470691  [  OK  ] Finished modprobe@loop.service - Load Kernel Module loop.


 6267 20:10:38.495497  [  OK  ] Finished systemd-modules-l…service - Load Kernel Modules.


 6268 20:10:38.514952  [  OK  ] Finished systemd-network-g…rk units from Kernel command line.


 6269 20:10:38.536051  [  OK  ] Reached target network-pre…get - Preparation for Network.


 6270 20:10:38.578797           Mounting sys-kernel-config…ernel Configuration File System...


 6271 20:10:38.608181           Starting systemd-sysctl.se…ce - Apply Kernel Variables...


 6272 20:10:38.631466  [FAILED] Failed to start systemd-re…ount Root and Kernel File Systems.


 6273 20:10:38.638082  See 'systemctl status systemd-remount-fs.service' for details.


 6274 20:10:38.650376  [  OK  ] Finished systemd-udev-trig…e - Coldplug All udev Devices.


 6275 20:10:38.667447  [  OK  ] Mounted sys-kernel-config.… Kernel Configuration File System.


 6276 20:10:38.688179  [  OK  ] Finished systemd-sysctl.service - Apply Kernel Variables.


 6277 20:10:38.738380           Starting systemd-journal-f…h Journal to Persistent Storage...


 6278 20:10:38.760399  <46>[    8.396587] systemd-journald[204]: Received client request to flush runtime journal.

 6279 20:10:38.772715           Starting systemd-random-se…ice - Load/Save Random Seed...


 6280 20:10:38.796079           Starting systemd-sysusers.…rvice - Create System Users...


 6281 20:10:38.818963  [  OK  ] Finished systemd-random-se…rvice - Load/Save Random Seed.


 6282 20:10:38.841006  [  OK  ] Finished systemd-journal-f…ush Journal to Persistent Storage.


 6283 20:10:38.860939  [  OK  ] Finished systemd-sysusers.service - Create System Users.


 6284 20:10:38.910639           Starting systemd-tmpfiles-…ate Static Device Nodes in /dev...


 6285 20:10:38.950027  [  OK  ] Finished systemd-tmpfiles-…reate Static Device Nodes in /dev.


 6286 20:10:38.971456  [  OK  ] Reached target local-fs-pr…reparation for Local File Systems.


 6287 20:10:38.991070  [  OK  ] Reached target local-fs.target - Local File Systems.


 6288 20:10:39.034842           Starting systemd-tmpfiles-… Volatile Files and Directories...


 6289 20:10:39.059034           Starting systemd-udevd.ser…ger for Device Events and Files...


 6290 20:10:39.082629  [  OK  ] Finished systemd-tmpfiles-…te Volatile Files and Directories.


 6291 20:10:39.110572           Starting systemd-timesyncd… - Network Time Synchronization...


 6292 20:10:39.132825           Starting systemd-update-ut…rd System Boot/Shutdown in UTMP...


 6293 20:10:39.150165  [  OK  ] Started systemd-udevd.serv…nager for Device Events and Files.


 6294 20:10:39.180871  [  OK  ] Finished systemd-update-ut…cord System Boot/Shutdown in UTMP.


 6295 20:10:39.198948  [  OK  ] Started systemd-timesyncd.…0m - Network Time Synchronization.


 6296 20:10:39.227874  [  OK  ] Found device dev-ttyS0.device - /dev/ttyS0.


 6297 20:10:39.338162  <3>[    8.971257] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015

 6298 20:10:39.344793  <3>[    8.982244] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22

 6299 20:10:39.348475  <6>[    8.984387] mc: Linux media interface: v0.10

 6300 20:10:39.362869  <3>[    8.989055] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7  on device pinctrl_paris

 6301 20:10:39.369142  <3>[    8.989064] elan_i2c 2-0015: Error applying setting, reverse things back

 6302 20:10:39.375885  <3>[    8.997213] thermal_sys: Failed to find 'trips' node

 6303 20:10:39.382796  <5>[    9.015394] cfg80211: Loading compiled-in X.509 certificates for regulatory database

 6304 20:10:39.389183  <3>[    9.019581] thermal_sys: Failed to find trip points for thermal-sensor1 id=0

 6305 20:10:39.399236  <3>[    9.019594] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22

 6306 20:10:39.405985  <4>[    9.019599] generic-adc-thermal: probe of thermal-sensor1 failed with error -22

 6307 20:10:39.412376  <3>[    9.023639] thermal_sys: Failed to find 'trips' node

 6308 20:10:39.415768  <3>[    9.024130] mtk-scp 10500000.scp: invalid resource

 6309 20:10:39.426082  <6>[    9.024184] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000

 6310 20:10:39.429210  <6>[    9.033943] videodev: Linux video capture interface: v2.00

 6311 20:10:39.435765  <3>[    9.034946] thermal_sys: Failed to find trip points for thermal-sensor2 id=0

 6312 20:10:39.446287  <3>[    9.034956] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22

 6313 20:10:39.452698  <6>[    9.039026] remoteproc remoteproc0: scp is available

 6314 20:10:39.459296  <4>[    9.039266] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6315 20:10:39.466900  <6>[    9.039273] remoteproc remoteproc0: powering up scp

 6316 20:10:39.476393  <4>[    9.039290] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6317 20:10:39.483331  <3>[    9.039293] remoteproc remoteproc0: request_firmware failed: -2

 6318 20:10:39.489999  <5>[    9.044041] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'

 6319 20:10:39.496274  <4>[    9.050947] generic-adc-thermal: probe of thermal-sensor2 failed with error -22

 6320 20:10:39.506751  <3>[    9.052870] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6321 20:10:39.517133  <5>[    9.056683] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'

 6322 20:10:39.526814  <3>[    9.061791] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6323 20:10:39.533163  <4>[    9.069059] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2

 6324 20:10:39.543856  <4>[    9.073713] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator

 6325 20:10:39.550607  <3>[    9.074621] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6326 20:10:39.561120  <4>[    9.076822] elants_i2c 0-0010: supply vccio not found, using dummy regulator

 6327 20:10:39.564438  <6>[    9.082076] cfg80211: failed to load regulatory.db

 6328 20:10:39.575090  <3>[    9.085524] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6329 20:10:39.584809  <3>[    9.085537] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6330 20:10:39.594767  <3>[    9.085542] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6331 20:10:39.601336  <3>[    9.085548] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6332 20:10:39.611555  <3>[    9.085553] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6333 20:10:39.618266  <3>[    9.088119] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6334 20:10:39.624970  <6>[    9.088956]  cs_system_cfg: CoreSight Configuration manager initialised

 6335 20:10:39.637815  <6>[    9.107607] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered

 6336 20:10:39.644259  <6>[    9.119672] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized

 6337 20:10:39.654936  <6>[    9.231736] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7

 6338 20:10:39.660854  <6>[    9.237922] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized

 6339 20:10:39.667469  <6>[    9.256438] Bluetooth: Core ver 2.22

 6340 20:10:39.674068  <6>[    9.270935] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized

 6341 20:10:39.680724  <6>[    9.273567] NET: Registered PF_BLUETOOTH protocol family

 6342 20:10:39.687278  <6>[    9.274979] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)

 6343 20:10:39.694048  <6>[    9.281359] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized

 6344 20:10:39.700806  <6>[    9.282281] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0

 6345 20:10:39.707778  <6>[    9.282412] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0

 6346 20:10:39.718590  <6>[    9.283075] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)

 6347 20:10:39.724990  <6>[    9.283087] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1

 6348 20:10:39.733750  <6>[    9.289145] Bluetooth: HCI device and connection manager initialized

 6349 20:10:39.747216  <6>[    9.294053] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8

 6350 20:10:39.753616  <6>[    9.294178] usbcore: registered new interface driver uvcvideo

 6351 20:10:39.761231  <6>[    9.298601] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized

 6352 20:10:39.766610  <6>[    9.306397] Bluetooth: HCI socket layer initialized

 6353 20:10:39.773405  <6>[    9.310464] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized

 6354 20:10:39.780220  <6>[    9.318359] Bluetooth: L2CAP socket layer initialized

 6355 20:10:39.803194  <46>[    9.319593] systemd-journald[204]: Data hash table of /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal has a fill level at 75.2 (1539 of 2047 items, 524288 file size, 340 bytes per hash table item), suggesting rotation.

 6356 20:10:39.816570  <46>[    9.319612] systemd-journald[204]: /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal: Journal header limits reached or header out-of-date, rotating.

 6357 20:10:39.827616  <6>[    9.324126] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized

 6358 20:10:39.831591  <6>[    9.330330] Bluetooth: SCO socket layer initialized

 6359 20:10:39.838924  <6>[    9.338325] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized

 6360 20:10:39.850369  <6>[    9.360278] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000

 6361 20:10:39.854386  <6>[    9.373126] Bluetooth: HCI UART driver ver 2.3

 6362 20:10:39.861485  <6>[    9.379389] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0

 6363 20:10:39.869242  <6>[    9.391169] Bluetooth: HCI UART protocol H4 registered

 6364 20:10:39.872725  <6>[    9.391212] Bluetooth: HCI UART protocol LL registered

 6365 20:10:39.886021  <6>[    9.397557] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77

 6366 20:10:39.892480  <6>[    9.405118] Bluetooth: HCI UART protocol Three-wire (H5) registered

 6367 20:10:39.902650  <4>[    9.465161] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.

 6368 20:10:39.905586  <4>[    9.465161] Fallback method does not support PEC.

 6369 20:10:39.912897  <6>[    9.470774] Bluetooth: HCI UART protocol Broadcom registered

 6370 20:10:39.922727  <3>[    9.478069] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6371 20:10:39.930675  <6>[    9.483521] Bluetooth: HCI UART protocol QCA registered

 6372 20:10:39.938107  <6>[    9.484907] Bluetooth: hci0: setting up ROME/QCA6390

 6373 20:10:39.944587  <3>[    9.489091] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6374 20:10:39.951569  <3>[    9.494548] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6375 20:10:39.962174  <6>[    9.498118] Bluetooth: HCI UART protocol Marvell registered

 6376 20:10:39.975970  <3>[    9.501042] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6377 20:10:39.987675  <3>[    9.511867] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6378 20:10:39.999287  <6>[    9.559335] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91

 6379 20:10:40.009122  <3>[    9.575661] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6380 20:10:40.019432  <3>[    9.576219] power_supply sbs-12-000b: driver failed to report `capacity_level' property: -6

 6381 20:10:40.029702  <3>[    9.581473] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6382 20:10:40.050650  <3>[    9.683307] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6383 20:10:40.058294  <3>[    9.687414] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6384 20:10:40.061750  <3>[    9.695786] Bluetooth: hci0: Frame reassembly failed (-84)

 6385 20:10:40.172198  [  OK  ] Created slice system-syste…- Slice /system/systemd-backlight.


 6386 20:10:40.190780  [  OK  ] Reached target sound.target - Sound Card.


 6387 20:10:40.206309  [  OK  ] Reached target time-set.target - System Time Set.


 6388 20:10:40.256303           Starting systemd-backlight…ess of backlight:backlight_lcd0...


 6389 20:10:40.281953  [  OK  ] Finished systemd-backlight…tness of backlight:backlight_lcd0.


 6390 20:10:40.318361  [  OK  ] Reached target bluetooth.target - Bluetooth Support.


 6391 20:10:40.338413  [  OK  ] Reached target sysinit.target - System Initialization.


 6392 20:10:40.345147  <6>[    9.982313] Bluetooth: hci0: QCA Product ID   :0x00000008

 6393 20:10:40.351842  <6>[    9.990488] Bluetooth: hci0: QCA SOC Version  :0x00000044

 6394 20:10:40.359957  <6>[    9.998961] Bluetooth: hci0: QCA ROM Version  :0x00000302

 6395 20:10:40.366583  <6>[    9.998969] Bluetooth: hci0: QCA Patch Version:0x00000111

 6396 20:10:40.376527  [  OK  ] Started fstrim.time<6>[    9.998976] Bluetooth: hci0: QCA controller version 0x00440302

 6397 20:10:40.380103  r - Discard unused blocks once a week.


 6398 20:10:40.387089  <6>[    9.998982] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin

 6399 20:10:40.398357  <4>[    9.999062] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2

 6400 20:10:40.409370  <3>[    9.999074] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)

 6401 20:10:40.419760  <6>[   10.002324] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1

 6402 20:10:40.430219  <3>[   10.068862] Bluetooth: hci0: QCA Failed to download patch (-2)

 6403 20:10:40.436864  <4>[   10.072699] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 6404 20:10:40.453584  [  OK  ] Started systemd-tmpfiles-c… Cleanup of Temporary Directories.


 6405 20:10:40.459692  <4>[   10.096710] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 6406 20:10:40.476161  [  OK  ] Reached target time<4>[   10.111974] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 6407 20:10:40.482247  rs.target - Timer Units.


 6408 20:10:40.489408  <4>[   10.126206] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 6409 20:10:40.500891  [  OK  ] Listening on dbus.socket[…- D-Bus System Message Bus Socket.


 6410 20:10:40.507757  [  OK  ] Reached target sockets.target - Socket Units.


 6411 20:10:40.521315  [  OK  ] Listening on systemd-rfkil…l Switch Status /dev/rfkill Watch.


 6412 20:10:40.539721  [  OK  ] Reached target basic.target - Basic System.


 6413 20:10:40.590738           Starting dbus.service - D-Bus System Message Bus...


 6414 20:10:40.621936           Starting systemd-logind.se…ice - User Login Management...


 6415 20:10:40.645736           Starting systemd-user-sess…vice - Permit User Sessions...


 6416 20:10:40.668520  [  OK  ] Started dbus.service - D-Bus System Message Bus.


 6417 20:10:40.703119  [  OK  ] Finished systemd-user-sess…ervice - Permit User Sessions.


 6418 20:10:40.750281  [  OK  ] Started getty@tty1.service - Getty on tty1.


 6419 20:10:40.771430  [  OK  ] Started serial-getty@ttyS0…rvice - Serial Getty on ttyS0.


 6420 20:10:40.792232  [  OK  ] Reached target getty.target - Login Prompts.


 6421 20:10:40.846349           Starting systemd-rfkill.se…Load/Save RF Kill Switch Status...


 6422 20:10:40.866154  [  OK  ] Started systemd-rfkill.ser…- Load/Save RF Kill Switch Status.


 6423 20:10:40.885638  [  OK  ] Started systemd-logind.service - User Login Management.


 6424 20:10:40.906683  [  OK  ] Reached target multi-user.target - Multi-User System.


 6425 20:10:40.924380  [  OK  ] Reached target graphical.target - Graphical Interface.


 6426 20:10:40.968388           Starting systemd-update-ut… Record Runlevel Change in UTMP...


 6427 20:10:41.000255  [  OK  ] Finished systemd-update-ut… - Record Runlevel Change in UTMP.


 6428 20:10:41.043316  


 6429 20:10:41.046652  Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0

 6430 20:10:41.046736  

 6431 20:10:41.049641  debian-bookworm-arm64 login: root (automatic login)

 6432 20:10:41.049724  


 6433 20:10:41.074499  Linux debian-bookworm-arm64 6.1.91-cip21 #1 SMP PREEMPT Tue May 28 13:24:21 UTC 2024 aarch64

 6434 20:10:41.074688  

 6435 20:10:41.081090  The programs included with the Debian GNU/Linux system are free software;

 6436 20:10:41.087531  the exact distribution terms for each program are described in the

 6437 20:10:41.090852  individual files in /usr/share/doc/*/copyright.

 6438 20:10:41.091026  

 6439 20:10:41.097793  Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent

 6440 20:10:41.100740  permitted by applicable law.

 6441 20:10:41.101599  Matched prompt #10: / #
 6443 20:10:41.102207  Setting prompt string to ['/ #']
 6444 20:10:41.102460  end: 2.2.5.1 login-action (duration 00:00:11) [common]
 6446 20:10:41.103037  end: 2.2.5 auto-login-action (duration 00:00:11) [common]
 6447 20:10:41.103280  start: 2.2.6 expect-shell-connection (timeout 00:03:33) [common]
 6448 20:10:41.103513  Setting prompt string to ['/ #']
 6449 20:10:41.103804  Forcing a shell prompt, looking for ['/ #']
 6451 20:10:41.154420  / # 

 6452 20:10:41.154907  expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
 6453 20:10:41.155394  Waiting using forced prompt support (timeout 00:02:30)
 6454 20:10:41.160918  

 6455 20:10:41.161847  end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
 6456 20:10:41.162450  start: 2.2.7 export-device-env (timeout 00:03:33) [common]
 6457 20:10:41.163056  end: 2.2.7 export-device-env (duration 00:00:00) [common]
 6458 20:10:41.163608  end: 2.2 depthcharge-retry (duration 00:01:27) [common]
 6459 20:10:41.164195  end: 2 depthcharge-action (duration 00:01:27) [common]
 6460 20:10:41.164886  start: 3 lava-test-retry (timeout 00:08:08) [common]
 6461 20:10:41.165515  start: 3.1 lava-test-shell (timeout 00:08:08) [common]
 6462 20:10:41.166038  Using namespace: common
 6464 20:10:41.267330  / # #

 6465 20:10:41.267933  lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
 6466 20:10:41.273494  #

 6467 20:10:41.274237  Using /lava-14063044
 6469 20:10:41.375358  / # export SHELL=/bin/sh

 6470 20:10:41.381947  export SHELL=/bin/sh

 6472 20:10:41.483396  / # . /lava-14063044/environment

 6473 20:10:41.489615  . /lava-14063044/environment

 6475 20:10:41.591055  / # /lava-14063044/bin/lava-test-runner /lava-14063044/0

 6476 20:10:41.591597  Test shell timeout: 10s (minimum of the action and connection timeout)
 6477 20:10:41.596949  /lava-14063044/bin/lava-test-runner /lava-14063044/0

 6478 20:10:41.629089  + export TESTRUN_ID=0_igt-gpu-pa<8>[   11.266642] <LAVA_SIGNAL_STARTRUN 0_igt-gpu-panfrost 14063044_1.5.2.3.1>

 6479 20:10:41.629871  Received signal: <STARTRUN> 0_igt-gpu-panfrost 14063044_1.5.2.3.1
 6480 20:10:41.630284  Starting test lava.0_igt-gpu-panfrost (14063044_1.5.2.3.1)
 6481 20:10:41.630800  Skipping test definition patterns.
 6482 20:10:41.632078  nfrost

 6483 20:10:41.635662  + cd /lava-14063044/0/tests/0_igt-gpu-panfrost

 6484 20:10:41.636092  + cat uuid

 6485 20:10:41.638575  + UUID=14063044_1.5.2.3.1

 6486 20:10:41.639143  + set +x

 6487 20:10:41.649148  + IGT_FORCE_DRIVER=panfrost /usr/bin/igt-parser.sh panfrost_gem_new panfrost_get_param panfrost_prime panfrost_submit

 6488 20:10:41.657903  <8>[   11.297000] <LAVA_SIGNAL_TESTSET START panfrost_gem_new>

 6489 20:10:41.658838  Received signal: <TESTSET> START panfrost_gem_new
 6490 20:10:41.659350  Starting test_set panfrost_gem_new
 6491 20:10:41.681186  <6>[   11.320224] Console: switching to colour dummy device 80x25

 6492 20:10:41.687988  <14>[   11.326680] [IGT] panfrost_gem_new: executing

 6493 20:10:41.694348  IGT-Version: 1.2<14>[   11.331949] [IGT] panfrost_gem_new: starting subtest gem-new-4096

 6494 20:10:41.704243  8-ga44ebfe (aarc<14>[   11.340214] [IGT] panfrost_gem_new: finished subtest gem-new-4096, SUCCESS

 6495 20:10:41.710879  h64) (Linux: 6.1<14>[   11.349081] [IGT] panfrost_gem_new: exiting, ret=0

 6496 20:10:41.713953  .91-cip21 aarch64)

 6497 20:10:41.717416  Using IGT_SRANDOM=1716927041 for randomisation

 6498 20:10:41.720984  Opened device: /dev/dri/card0

 6499 20:10:41.724202  Starting subtest: gem-new-4096

 6500 20:10:41.727535  Subtest gem-new-4096: SUCCESS (0.000s)

 6501 20:10:41.751658  <6>[   11.374776] Console: switching to colour frame buffer device 170x48

 6502 20:10:41.767546  <8>[   11.403508] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-4096 RESULT=pass>

 6503 20:10:41.768237  Received signal: <TESTCASE> TEST_CASE_ID=gem-new-4096 RESULT=pass
 6505 20:10:41.788047  <6>[   11.427027] Console: switching to colour dummy device 80x25

 6506 20:10:41.794605  <14>[   11.433043] [IGT] panfrost_gem_new: executing

 6507 20:10:41.801218  IGT-Version: 1.2<14>[   11.438072] [IGT] panfrost_gem_new: starting subtest gem-new-0

 6508 20:10:41.810916  8-ga44ebfe (aarc<14>[   11.445655] [IGT] panfrost_gem_new: finished subtest gem-new-0, SUCCESS

 6509 20:10:41.817700  h64) (Linux: 6.1<14>[   11.454132] [IGT] panfrost_gem_new: exiting, ret=0

 6510 20:10:41.818126  .91-cip21 aarch64)

 6511 20:10:41.820996  Using IGT_SRANDOM=1716927041 for randomisation

 6512 20:10:41.824559  Opened device: /dev/dri/card0

 6513 20:10:41.827328  Starting subtest: gem-new-0

 6514 20:10:41.830744  Subtest gem-new-0: SUCCESS (0.000s)

 6515 20:10:41.868287  <6>[   11.490283] Console: switching to colour frame buffer device 170x48

 6516 20:10:41.880440  <8>[   11.519621] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-0 RESULT=pass>

 6517 20:10:41.881298  Received signal: <TESTCASE> TEST_CASE_ID=gem-new-0 RESULT=pass
 6519 20:10:41.903491  <6>[   11.542362] Console: switching to colour dummy device 80x25

 6520 20:10:41.910034  <14>[   11.548402] [IGT] panfrost_gem_new: executing

 6521 20:10:41.916431  IGT-Version: 1.2<14>[   11.553434] [IGT] panfrost_gem_new: starting subtest gem-new-zeroed

 6522 20:10:41.926781  8-ga44ebfe (aarc<14>[   11.562734] [IGT] panfrost_gem_new: finished subtest gem-new-zeroed, SUCCESS

 6523 20:10:41.933177  h64) (Linux: 6.1<14>[   11.570341] [IGT] panfrost_gem_new: exiting, ret=0

 6524 20:10:41.933645  .91-cip21 aarch64)

 6525 20:10:41.939504  Using IGT_SRANDOM=1716927041 for randomisation

 6526 20:10:41.942860  Opened device: /dev/dri/card0

 6527 20:10:41.946430  Starting subtest: gem-new-zeroed

 6528 20:10:41.949253  Subtest gem-new-zeroed: SUCCESS (0.001s)

 6529 20:10:41.984140  <6>[   11.606808] Console: switching to colour frame buffer device 170x48

 6530 20:10:42.000988  <8>[   11.636760] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-zeroed RESULT=pass>

 6531 20:10:42.001246  Received signal: <TESTCASE> TEST_CASE_ID=gem-new-zeroed RESULT=pass
 6533 20:10:42.003614  <8>[   11.645542] <LAVA_SIGNAL_TESTSET STOP>

 6534 20:10:42.003873  Received signal: <TESTSET> STOP
 6535 20:10:42.004043  Closing test_set panfrost_gem_new
 6536 20:10:42.043992  <8>[   11.683204] <LAVA_SIGNAL_TESTSET START panfrost_get_param>

 6537 20:10:42.044252  Received signal: <TESTSET> START panfrost_get_param
 6538 20:10:42.044323  Starting test_set panfrost_get_param
 6539 20:10:42.066990  <6>[   11.706440] Console: switching to colour dummy device 80x25

 6540 20:10:42.073746  <14>[   11.712847] [IGT] panfrost_get_param: executing

 6541 20:10:42.080595  IGT-Version: 1.2<14>[   11.718298] [IGT] panfrost_get_param: starting subtest base-params

 6542 20:10:42.090107  8-ga44ebfe (aarc<14>[   11.726345] [IGT] panfrost_get_param: finished subtest base-params, SUCCESS

 6543 20:10:42.096737  h64) (Linux: 6.1<14>[   11.735304] [IGT] panfrost_get_param: exiting, ret=0

 6544 20:10:42.100297  .91-cip21 aarch64)

 6545 20:10:42.103590  Using IGT_SRANDOM=1716927041 for randomisation

 6546 20:10:42.106775  Opened device: /dev/dri/card0

 6547 20:10:42.110144  Starting subtest: base-params

 6548 20:10:42.113487  Subtest base-params: SUCCESS (0.000s)

 6549 20:10:42.150143  <6>[   11.773021] Console: switching to colour frame buffer device 170x48

 6550 20:10:42.166535  <8>[   11.802780] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=base-params RESULT=pass>

 6551 20:10:42.166795  Received signal: <TESTCASE> TEST_CASE_ID=base-params RESULT=pass
 6553 20:10:42.187369  <6>[   11.826807] Console: switching to colour dummy device 80x25

 6554 20:10:42.194077  <14>[   11.832857] [IGT] panfrost_get_param: executing

 6555 20:10:42.200562  IGT-Version: 1.2<14>[   11.838069] [IGT] panfrost_get_param: starting subtest get-bad-param

 6556 20:10:42.211004  8-ga44ebfe (aarc<14>[   11.846363] [IGT] panfrost_get_param: finished subtest get-bad-param, SUCCESS

 6557 20:10:42.217254  h64) (Linux: 6.1<14>[   11.855425] [IGT] panfrost_get_param: exiting, ret=0

 6558 20:10:42.220808  .91-cip21 aarch64)

 6559 20:10:42.223604  Using IGT_SRANDOM=1716927041 for randomisation

 6560 20:10:42.227141  Opened device: /dev/dri/card0

 6561 20:10:42.230344  Starting subtest: get-bad-param

 6562 20:10:42.233640  Subtest get-bad-param: SUCCESS (0.000s)

 6563 20:10:42.266664  <6>[   11.889246] Console: switching to colour frame buffer device 170x48

 6564 20:10:42.281861  <8>[   11.918046] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-param RESULT=pass>

 6565 20:10:42.282124  Received signal: <TESTCASE> TEST_CASE_ID=get-bad-param RESULT=pass
 6567 20:10:42.302495  <6>[   11.941932] Console: switching to colour dummy device 80x25

 6568 20:10:42.309099  <14>[   11.947895] [IGT] panfrost_get_param: executing

 6569 20:10:42.316249  IGT-Version: 1.2<14>[   11.953329] [IGT] panfrost_get_param: starting subtest get-bad-padding

 6570 20:10:42.325616  <14>[   11.961595] [IGT] panfrost_get_param: finished subtest get-bad-padding, SUCCESS

 6571 20:10:42.332352  8-ga44ebfe (aarc<14>[   11.969615] [IGT] panfrost_get_param: exiting, ret=0

 6572 20:10:42.335598  h64) (Linux: 6.1.91-cip21 aarch64)

 6573 20:10:42.338628  Using IGT_SRANDOM=1716927042 for randomisation

 6574 20:10:42.341847  Opened device: /dev/dri/card0

 6575 20:10:42.345721  Starting subtest: get-bad-padding

 6576 20:10:42.348556  Subtest get-bad-padding: SUCCESS (0.000s)

 6577 20:10:42.383372  <6>[   12.005646] Console: switching to colour frame buffer device 170x48

 6578 20:10:42.400983  <8>[   12.036608] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-padding RESULT=pass>

 6579 20:10:42.401244  Received signal: <TESTCASE> TEST_CASE_ID=get-bad-padding RESULT=pass
 6581 20:10:42.404465  Received signal: <TESTSET> STOP
 6582 20:10:42.404546  Closing test_set panfrost_get_param
 6583 20:10:42.407373  <8>[   12.045989] <LAVA_SIGNAL_TESTSET STOP>

 6584 20:10:42.431616  <8>[   12.070696] <LAVA_SIGNAL_TESTSET START panfrost_prime>

 6585 20:10:42.431870  Received signal: <TESTSET> START panfrost_prime
 6586 20:10:42.431942  Starting test_set panfrost_prime
 6587 20:10:42.453195  <6>[   12.092470] Console: switching to colour dummy device 80x25

 6588 20:10:42.460350  <14>[   12.098459] [IGT] panfrost_prime: executing

 6589 20:10:42.466244  IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)

 6590 20:10:42.469605  Using IGT_SRANDOM=1716927042 for randomisation

 6591 20:10:42.472804  Opened device: /dev/dri/card0

 6592 20:10:42.497433  <14>[   12.136834] [IGT] panfrost_prime: starting subtest gem-prime-import

 6593 20:10:42.500857  Starting subtest: gem-prime-import

 6594 20:10:42.514198  (panfrost_prime:354) CRITICAL: Test assertion failure functi<14>[   12.151864] [IGT] panfrost_prime: finished subtest gem-prime-import, FAIL

 6595 20:10:42.520879  on igt_has_dumb,<14>[   12.160336] [IGT] panfrost_prime: exiting, ret=98

 6596 20:10:42.524097   file ../tests/panfrost_prime.c:44:

 6597 20:10:42.534318  (panfrost_prime:354) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP

 6598 20:10:42.540849  (panfrost_prime:354) CRITICAL: Last errno: 9, Bad file descriptor

 6599 20:10:42.540933  Stack trace:

 6600 20:10:42.543916    #0 ../lib/igt_core.c:1989 __igt_fail_assert()

 6601 20:10:42.547317    #1 [<unknown>+0xd54c1358]

 6602 20:10:42.550834    #2 [<unknown>+0xd54c0f2c]

 6603 20:10:42.554280    #3 [__libc_init_first+0x80]

 6604 20:10:42.557729    #4 [__libc_start_main+0x98]

 6605 20:10:42.557810    #5 [<unknown>+0xd54c0f70]

 6606 20:10:42.560775  Subtest gem-prime-import failed.

 6607 20:10:42.564348  **** DEBUG ****

 6608 20:10:42.570890  (panfrost_prime:354) CRITICA<6>[   12.191504] Console: switching to colour frame buffer device 170x48

 6609 20:10:42.587612  L: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:<8>[   12.223139] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-prime-import RESULT=fail>

 6610 20:10:42.587696  44:

 6611 20:10:42.587938  Received signal: <TESTCASE> TEST_CASE_ID=gem-prime-import RESULT=fail
 6613 20:10:42.594182  (panfrost_prime:354) CRITIC<8>[   12.232723] <LAVA_SIGNAL_TESTSET STOP>

 6614 20:10:42.594436  Received signal: <TESTSET> STOP
 6615 20:10:42.594507  Closing test_set panfrost_prime
 6616 20:10:42.600932  AL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP

 6617 20:10:42.607439  (panfrost_prime:354) CRITICAL: Last errno: 9, Bad file descriptor

 6618 20:10:42.610910  (panfrost_prime:354) igt_core-INFO: Stack trace:

 6619 20:10:42.617561  Received signal: <TESTSET> START panfrost_submit
 6620 20:10:42.617641  Starting test_set panfrost_submit
 6621 20:10:42.620884  (panfrost_prime:354) igt_core-INF<8>[   12.257549] <LAVA_SIGNAL_TESTSET START panfrost_submit>

 6622 20:10:42.623820  O:   #0 ../lib/igt_core.c:1989 __igt_fail_assert()

 6623 20:10:42.631146  (panfrost_prime:354) igt_core-INFO:   #1 [<unknown>+0xd54c1358]

 6624 20:10:42.637320  (panfrost_prime:354) igt_core-INFO:   #2 [<unknown>+0xd54c0f2c]

 6625 20:10:42.644118  (panfrost_prime:354) igt_c<6>[   12.282485] Console: switching to colour dummy device 80x25

 6626 20:10:42.647112  <14>[   12.288665] [IGT] panfrost_submit: executing

 6627 20:10:42.657234  ore-INFO:   #3 [<14>[   12.293724] [IGT] panfrost_submit: starting subtest pan-submit

 6628 20:10:42.663792  __libc_init_firs<14>[   12.301738] [IGT] panfrost_submit: finished subtest pan-submit, SUCCESS

 6629 20:10:42.667266  t+0x80]

 6630 20:10:42.670439  (panfro<14>[   12.309430] [IGT] panfrost_submit: exiting, ret=0

 6631 20:10:42.677116  st_prime:354) igt_core-INFO:   #4 [__libc_start_main+0x98]

 6632 20:10:42.683778  (panfrost_prime:354) igt_core-INFO:   #5 [<unknown>+0xd54c0f70]

 6633 20:10:42.683860  ****  END  ****

 6634 20:10:42.687785  Subtest gem-prime-import: FAIL (0.008s)

 6635 20:10:42.696979  (panfrost_prime:354) drmtest-WARNING: Don't attempt to close standard/invalid file descriptor: -1

 6636 20:10:42.703838  IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)

 6637 20:10:42.706973  Using IGT_SRANDOM=1716927042 for randomisation

 6638 20:10:42.710804  Opened device: /dev/dri/card0

 6639 20:10:42.716959  Starting su<6>[   12.338183] Console: switching to colour frame buffer device 170x48

 6640 20:10:42.720498  btest: pan-submit

 6641 20:10:42.723871  Subtest pan-submit: SUCCESS (0.001s)

 6642 20:10:42.730542  <8>[   12.368142] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit RESULT=pass>

 6643 20:10:42.730801  Received signal: <TESTCASE> TEST_CASE_ID=pan-submit RESULT=pass
 6645 20:10:42.752341  <6>[   12.391635] Console: switching to colour dummy device 80x25

 6646 20:10:42.758988  <14>[   12.397701] [IGT] panfrost_submit: executing

 6647 20:10:42.765636  IGT-Version: 1.2<14>[   12.402651] [IGT] panfrost_submit: starting subtest pan-submit-error-no-jc

 6648 20:10:42.775517  <14>[   12.411175] [IGT] panfrost_submit: finished subtest pan-submit-error-no-jc, SUCCESS

 6649 20:10:42.782058  8-ga44ebfe (aarc<14>[   12.419539] [IGT] panfrost_submit: exiting, ret=0

 6650 20:10:42.785332  h64) (Linux: 6.1.91-cip21 aarch64)

 6651 20:10:42.788926  Using IGT_SRANDOM=1716927042 for randomisation

 6652 20:10:42.791966  Opened device: /dev/dri/card0

 6653 20:10:42.795188  Starting subtest: pan-submit-error-no-jc

 6654 20:10:42.801859  Subtest pan-submit-error-no-jc: SUCCESS (0.000s)

 6655 20:10:42.831820  <6>[   12.454370] Console: switching to colour frame buffer device 170x48

 6656 20:10:42.847690  <8>[   12.483885] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass>

 6657 20:10:42.847955  Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass
 6659 20:10:42.869593  <6>[   12.508568] Console: switching to colour dummy device 80x25

 6660 20:10:42.875887  <14>[   12.514601] [IGT] panfrost_submit: executing

 6661 20:10:42.885698  IGT-Version: 1.2<14>[   12.519584] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-in-syncs

 6662 20:10:42.895521  8-ga44ebfe (aarc<14>[   12.529033] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-in-syncs, SUCCESS

 6663 20:10:42.902572  h64) (Linux: 6.1<14>[   12.539289] [IGT] panfrost_submit: exiting, ret=0

 6664 20:10:42.902661  .91-cip21 aarch64)

 6665 20:10:42.908853  Using IGT_SRANDOM=1716927042 for randomisation

 6666 20:10:42.908935  Opened device: /dev/dri/card0

 6667 20:10:42.915622  Starting subtest: pan-submit-error-bad-in-syncs

 6668 20:10:42.922112  Subtest pan-submit-error-bad-in-syncs: SUCCESS (0.000s)

 6669 20:10:42.947876  <6>[   12.570853] Console: switching to colour frame buffer device 170x48

 6670 20:10:42.964295  <8>[   12.600312] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass>

 6671 20:10:42.964560  Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass
 6673 20:10:42.987675  <6>[   12.626773] Console: switching to colour dummy device 80x25

 6674 20:10:42.994035  <14>[   12.633036] [IGT] panfrost_submit: executing

 6675 20:10:43.003917  IGT-Version: 1.2<14>[   12.638375] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-bo-handles

 6676 20:10:43.014129  8-ga44ebfe (aarc<14>[   12.648161] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-bo-handles, SUCCESS

 6677 20:10:43.020514  h64) (Linux: 6.1<14>[   12.658516] [IGT] panfrost_submit: exiting, ret=0

 6678 20:10:43.020598  .91-cip21 aarch64)

 6679 20:10:43.027270  Using IGT_SRANDOM=1716927042 for randomisation

 6680 20:10:43.030949  Opened device: /dev/dri/card0

 6681 20:10:43.033980  Starting subtest: pan-submit-error-bad-bo-handles

 6682 20:10:43.040464  Subtest pan-submit-error-bad-bo-handles: SUCCESS (0.000s)

 6683 20:10:43.064210  <6>[   12.687189] Console: switching to colour frame buffer device 170x48

 6684 20:10:43.080750  <8>[   12.716921] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass>

 6685 20:10:43.081012  Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass
 6687 20:10:43.104244  <6>[   12.743619] Console: switching to colour dummy device 80x25

 6688 20:10:43.110701  <14>[   12.749582] [IGT] panfrost_submit: executing

 6689 20:10:43.121294  IGT-Version: 1.2<14>[   12.754733] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-requirements

 6690 20:10:43.130499  8-ga44ebfe (aarc<14>[   12.764513] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-requirements, SUCCESS

 6691 20:10:43.137482  h64) (Linux: 6.1<14>[   12.775070] [IGT] panfrost_submit: exiting, ret=0

 6692 20:10:43.137566  .91-cip21 aarch64)

 6693 20:10:43.144246  Using IGT_SRANDOM=1716927042 for randomisation

 6694 20:10:43.147363  Opened device: /dev/dri/card0

 6695 20:10:43.150727  Starting subtest: pan-submit-error-bad-requirements

 6696 20:10:43.157061  Subtest pan-submit-error-bad-requirements: SUCCESS (0.000s)

 6697 20:10:43.180698  <6>[   12.803414] Console: switching to colour frame buffer device 170x48

 6698 20:10:43.196907  <8>[   12.832954] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass>

 6699 20:10:43.197304  Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass
 6701 20:10:43.219652  <6>[   12.858493] Console: switching to colour dummy device 80x25

 6702 20:10:43.226032  <14>[   12.864518] [IGT] panfrost_submit: executing

 6703 20:10:43.235757  IGT-Version: 1.2<14>[   12.869477] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-out-sync

 6704 20:10:43.245871  8-ga44ebfe (aarc<14>[   12.879094] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-out-sync, SUCCESS

 6705 20:10:43.252462  h64) (Linux: 6.1<14>[   12.889136] [IGT] panfrost_submit: exiting, ret=0

 6706 20:10:43.253017  .91-cip21 aarch64)

 6707 20:10:43.255750  Using IGT_SRANDOM=1716927043 for randomisation

 6708 20:10:43.259481  Opened device: /dev/dri/card0

 6709 20:10:43.265995  Starting subtest: pan-submit-error-bad-out-sync

 6710 20:10:43.269033  Subtest pan-submit-error-bad-out-sync: SUCCESS (0.000s)

 6711 20:10:43.297419  <6>[   12.919863] Console: switching to colour frame buffer device 170x48

 6712 20:10:43.313617  <8>[   12.949278] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass>

 6713 20:10:43.314315  Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass
 6715 20:10:43.335422  <6>[   12.974330] Console: switching to colour dummy device 80x25

 6716 20:10:43.341767  <14>[   12.980410] [IGT] panfrost_submit: executing

 6717 20:10:43.348799  IGT-Version: 1.2<14>[   12.985485] [IGT] panfrost_submit: starting subtest pan-reset

 6718 20:10:43.354901  8-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)

 6719 20:10:43.358333  Using IGT_SRANDOM=1716927043 for randomisation

 6720 20:10:43.362036  Opened device: /dev/dri/card0

 6721 20:10:43.362465  Starting subtest: pan-reset

 6722 20:10:43.874018  <3>[   13.506697] panfrost 13040000.gpu: gpu sched timeout, js=1, config=0x7300, status=0x8, head=0x2000040, tail=0x2000040, sched_job=00000000d3730908

 6723 20:10:43.885496  Subtest pan-<14>[   13.521772] [IGT] panfrost_submit: finished subtest pan-reset, SUCCESS

 6724 20:10:43.891975  reset: SUCCESS (<14>[   13.530144] [IGT] panfrost_submit: exiting, ret=0

 6725 20:10:43.892059  0.529s)

 6726 20:10:43.951402  <6>[   13.573056] Console: switching to colour frame buffer device 170x48

 6727 20:10:43.967400  Received signal: <TESTCASE> TEST_CASE_ID=pan-reset RESULT=pass
 6729 20:10:43.970479  <8>[   13.606591] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-reset RESULT=pass>

 6730 20:10:43.991138  <6>[   13.630155] Console: switching to colour dummy device 80x25

 6731 20:10:43.997847  <14>[   13.636182] [IGT] panfrost_submit: executing

 6732 20:10:44.004289  IGT-Version: 1.2<14>[   13.641118] [IGT] panfrost_submit: starting subtest pan-submit-and-close

 6733 20:10:44.014632  8-ga44ebfe (aarc<14>[   13.650220] [IGT] panfrost_submit: finished subtest pan-submit-and-close, SUCCESS

 6734 20:10:44.020861  h64) (Linux: 6.1<14>[   13.658828] [IGT] panfrost_submit: exiting, ret=0

 6735 20:10:44.024213  .91-cip21 aarch64)

 6736 20:10:44.027691  Using IGT_SRANDOM=1716927043 for randomisation

 6737 20:10:44.030938  Opened device: /dev/dri/card0

 6738 20:10:44.033990  Starting subtest: pan-submit-and-close

 6739 20:10:44.037513  Subtest pan-submit-and-close: SUCCESS (0.001s)

 6740 20:10:44.062158  <6>[   13.684414] Console: switching to colour frame buffer device 170x48

 6741 20:10:44.079023  <8>[   13.714967] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-and-close RESULT=pass>

 6742 20:10:44.079856  Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-and-close RESULT=pass
 6744 20:10:44.100211  <6>[   13.738980] Console: switching to colour dummy device 80x25

 6745 20:10:44.106639  <14>[   13.744949] [IGT] panfrost_submit: executing

 6746 20:10:44.113377  IGT-Version: 1.2<14>[   13.750097] [IGT] panfrost_submit: starting subtest pan-unhandled-pagefault

 6747 20:10:44.119891  8-ga44ebfe (aarch64) (Linux: 6.1.91-cip21 aarch64)

 6748 20:10:44.123147  Using IGT_SRANDOM=1716927043 for randomisation

 6749 20:10:44.126311  Opened device: /dev/dri/card0

 6750 20:10:44.129738  Starting subtest: pan-unhandled-pagefault

 6751 20:10:44.229138  (panfrost_submit:384) CRITICAL: Test assertion failure function __igt_unique____real_main65, fil<14>[   13.866104] [IGT] panfrost_submit: finished subtest pan-unhandled-pagefault, FAIL

 6752 20:10:44.235805  e ../tests/panfr<14>[   13.875170] [IGT] panfrost_submit: exiting, ret=98

 6753 20:10:44.239497  ost_submit.c:178:

 6754 20:10:44.252353  (panfrost_submit:384) CRITICAL: Failed assertion: syncobj_wait(fd, &submit->args->out_sync, 1, abs_timeout(SHORT_TIME_NSEC), 0, NULL)

 6755 20:10:44.252439  Stack trace:

 6756 20:10:44.255911    #0 ../lib/igt_core.c:1989 __igt_fail_assert()

 6757 20:10:44.258851    #1 [<unknown>+0xe9c51980]

 6758 20:10:44.262605    #2 [<unknown>+0xe9c50dec]

 6759 20:10:44.265913    #3 [__libc_init_first+0x80]

 6760 20:10:44.268892    #4 [__libc_start_main+0x98]

 6761 20:10:44.268974    #5 [<unknown>+0xe9c50e30]

 6762 20:10:44.272555  Subtest pan-unhandled-pagefault failed.

 6763 20:10:44.275898  **** DEBUG ****

 6764 20:10:44.285850  (panfrost_submit:384) CRITICAL: Test assertion failure function __igt_unique____real_main65, file ../tests/panfrost_submit.c:178:

 6765 20:10:44.298876  (panfrost_submit:384) CRITICAL: Failed assertion: syncobj_wait(fd, &submit->args->out<6>[   13.920185] Console: switching to colour frame buffer device 170x48

 6766 20:10:44.305961  _sync, 1, abs_timeout(SHORT_TIME_NSEC), 0, NULL)

 6767 20:10:44.315995  (panfrost_submit:384) igt_core-INFO: Stack tra<8>[   13.952161] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-unhandled-pagefault RESULT=fail>

 6768 20:10:44.316725  Received signal: <TESTCASE> TEST_CASE_ID=pan-unhandled-pagefault RESULT=fail
 6770 20:10:44.319357  ce:

 6771 20:10:44.325997  (panfrost_submit:384) igt_core-INFO:   #0 .<8>[   13.964300] <LAVA_SIGNAL_TESTSET STOP>

 6772 20:10:44.326672  Received signal: <TESTSET> STOP
 6773 20:10:44.327019  Closing test_set panfrost_submit
 6774 20:10:44.332470  ./lib/igt_core.c<8>[   13.970808] <LAVA_SIGNAL_ENDRUN 0_igt-gpu-panfrost 14063044_1.5.2.3.1>

 6775 20:10:44.333151  Received signal: <ENDRUN> 0_igt-gpu-panfrost 14063044_1.5.2.3.1
 6776 20:10:44.333599  Ending use of test pattern.
 6777 20:10:44.333922  Ending test lava.0_igt-gpu-panfrost (14063044_1.5.2.3.1), duration 2.70
 6779 20:10:44.335983  :1989 __igt_fail_assert()

 6780 20:10:44.342593  (panfrost_submit:384) igt_core-INFO:   #1 [<unknown>+0xe9c51980]

 6781 20:10:44.349549  (panfrost_submit:384) igt_core-INFO:   #2 [<unknown>+0xe9c50dec]

 6782 20:10:44.352870  (panfrost_submit:384) igt_core-INFO:   #3 [__libc_init_first+0x80]

 6783 20:10:44.359009  (panfrost_submit:384) igt_core-INFO:   #4 [__libc_start_main+0x98]

 6784 20:10:44.365796  (panfrost_submit:384) igt_core-INFO:   #5 [<unknown>+0xe9c50e30]

 6785 20:10:44.366224  ****  END  ****

 6786 20:10:44.372056  Subtest pan-unhandled-pagefault: FAIL (0.107s)

 6787 20:10:44.372480  + set +x

 6788 20:10:44.375323  <LAVA_TEST_RUNNER EXIT>

 6789 20:10:44.376007  ok: lava_test_shell seems to have completed
 6790 20:10:44.377637  base-params:
  result: pass
  set: panfrost_get_param
gem-new-0:
  result: pass
  set: panfrost_gem_new
gem-new-4096:
  result: pass
  set: panfrost_gem_new
gem-new-zeroed:
  result: pass
  set: panfrost_gem_new
gem-prime-import:
  result: fail
  set: panfrost_prime
get-bad-padding:
  result: pass
  set: panfrost_get_param
get-bad-param:
  result: pass
  set: panfrost_get_param
pan-reset:
  result: pass
  set: panfrost_submit
pan-submit:
  result: pass
  set: panfrost_submit
pan-submit-and-close:
  result: pass
  set: panfrost_submit
pan-submit-error-bad-bo-handles:
  result: pass
  set: panfrost_submit
pan-submit-error-bad-in-syncs:
  result: pass
  set: panfrost_submit
pan-submit-error-bad-out-sync:
  result: pass
  set: panfrost_submit
pan-submit-error-bad-requirements:
  result: pass
  set: panfrost_submit
pan-submit-error-no-jc:
  result: pass
  set: panfrost_submit
pan-unhandled-pagefault:
  result: fail
  set: panfrost_submit

 6791 20:10:44.378140  end: 3.1 lava-test-shell (duration 00:00:03) [common]
 6792 20:10:44.378571  end: 3 lava-test-retry (duration 00:00:03) [common]
 6793 20:10:44.379036  start: 4 finalize (timeout 00:08:05) [common]
 6794 20:10:44.379476  start: 4.1 power-off (timeout 00:00:30) [common]
 6795 20:10:44.380254  Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
 6796 20:10:45.831209  >> Command sent successfully.

 6797 20:10:45.838962  Returned 0 in 1 seconds
 6798 20:10:45.939864  end: 4.1 power-off (duration 00:00:02) [common]
 6800 20:10:45.941471  start: 4.2 read-feedback (timeout 00:08:03) [common]
 6801 20:10:45.942811  Listened to connection for namespace 'common' for up to 1s
 6803 20:10:45.944148  Listened to connection for namespace 'common' for up to 1s
 6804 20:10:46.943447  Finalising connection for namespace 'common'
 6805 20:10:46.944143  Disconnecting from shell: Finalise
 6806 20:10:47.045230  end: 4.2 read-feedback (duration 00:00:01) [common]
 6807 20:10:47.045977  end: 4 finalize (duration 00:00:03) [common]
 6808 20:10:47.046633  Cleaning after the job
 6809 20:10:47.047145  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/ramdisk
 6810 20:10:47.075379  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/kernel
 6811 20:10:47.101708  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/dtb
 6812 20:10:47.101963  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063044/tftp-deploy-jrug4lml/modules
 6813 20:10:47.108564  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14063044
 6814 20:10:47.215455  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14063044
 6815 20:10:47.215639  Job finished correctly